1616 files changed, 75036 insertions, 20635 deletions

diff --git a/arch/Kconfig b/arch/Kconfig
index beea3ccebb5e..7f418bbc261a 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -9,6 +9,7 @@ config OPROFILE
         depends on TRACING_SUPPORT
         select TRACING
         select RING_BUFFER
+        select RING_BUFFER_ALLOW_SWAP
         help
           OProfile is a profiling system capable of profiling the
           whole system, include the kernel, kernel modules, libraries,
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 9fb8aae5c391..443448154f32 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -45,6 +45,14 @@ config GENERIC_CALIBRATE_DELAY
         bool
         default y
 
+config GENERIC_TIME
+        bool
+        default y
+
+config ARCH_USES_GETTIMEOFFSET
+        bool
+        default y
+
 config ZONE_DMA
         bool
         default y
diff --git a/arch/alpha/boot/tools/objstrip.c b/arch/alpha/boot/tools/objstrip.c
index ef1838230291..9d0727d18aee 100644
--- a/arch/alpha/boot/tools/objstrip.c
+++ b/arch/alpha/boot/tools/objstrip.c
@@ -93,7 +93,7 @@ main (int argc, char *argv[])
     ofd = 1;
     if (i < argc) {
         ofd = open(argv[i++], O_WRONLY | O_CREAT | O_TRUNC, 0666);
-        if (fd == -1) {
+        if (ofd == -1) {
             perror("open");
             exit(1);
         }
diff --git a/arch/alpha/include/asm/fcntl.h b/arch/alpha/include/asm/fcntl.h
index 25da0017ec87..e42823e954aa 100644
--- a/arch/alpha/include/asm/fcntl.h
+++ b/arch/alpha/include/asm/fcntl.h
@@ -26,6 +26,8 @@
 #define F_GETOWN        6       /*  for sockets. */
 #define F_SETSIG        10      /*  for sockets. */
 #define F_GETSIG        11      /*  for sockets. */
+#define F_SETOWN_EX     12
+#define F_GETOWN_EX     13
 
 /* for posix fcntl() and lockf() */
 #define F_RDLCK         1
diff --git a/arch/alpha/include/asm/hardirq.h b/arch/alpha/include/asm/hardirq.h
index 88971460fa6c..242c09ba98c4 100644
--- a/arch/alpha/include/asm/hardirq.h
+++ b/arch/alpha/include/asm/hardirq.h
@@ -1,17 +1,9 @@
 #ifndef _ALPHA_HARDIRQ_H
 #define _ALPHA_HARDIRQ_H
 
-#include <linux/threads.h>
-#include <linux/cache.h>
-
-
-/* entry.S is sensitive to the offsets of these fields */
-typedef struct {
-        unsigned long __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
 void ack_bad_irq(unsigned int irq);
+#define ack_bad_irq ack_bad_irq
+
+#include <asm-generic/hardirq.h>
 
 #endif /* _ALPHA_HARDIRQ_H */
diff --git a/arch/alpha/include/asm/mman.h b/arch/alpha/include/asm/mman.h
index 90d7c35d2867..99c56d47879d 100644
--- a/arch/alpha/include/asm/mman.h
+++ b/arch/alpha/include/asm/mman.h
@@ -28,6 +28,8 @@
 #define MAP_NORESERVE   0x10000         /* don't check for reservations */
 #define MAP_POPULATE    0x20000         /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x40000         /* do not block on IO */
+#define MAP_STACK       0x80000         /* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB     0x100000        /* create a huge page mapping */
 
 #define MS_ASYNC        1               /* sync memory asynchronously */
 #define MS_SYNC         2               /* synchronous memory sync */
@@ -48,6 +50,9 @@
 #define MADV_DONTFORK   10              /* don't inherit across fork */
 #define MADV_DOFORK     11              /* do inherit across fork */
 
+#define MADV_MERGEABLE   12             /* KSM may merge identical pages */
+#define MADV_UNMERGEABLE 13             /* KSM may not merge identical pages */
+
 /* compatibility flags */
 #define MAP_FILE        0
 
diff --git a/arch/alpha/include/asm/pci.h b/arch/alpha/include/asm/pci.h
index d22ace99d13d..dd8dcabf160f 100644
--- a/arch/alpha/include/asm/pci.h
+++ b/arch/alpha/include/asm/pci.h
@@ -52,7 +52,6 @@ struct pci_controller {
    bus numbers.  */
 
 #define pcibios_assign_all_busses()     1
-#define pcibios_scan_all_fns(a, b)      0
 
 #define PCIBIOS_MIN_IO          alpha_mv.min_io_address
 #define PCIBIOS_MIN_MEM         alpha_mv.min_mem_address
diff --git a/arch/alpha/include/asm/smp.h b/arch/alpha/include/asm/smp.h
index 547e90951cec..3f390e8cc0b3 100644
--- a/arch/alpha/include/asm/smp.h
+++ b/arch/alpha/include/asm/smp.h
@@ -47,7 +47,7 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS];
 extern int smp_num_cpus;
 
 extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi(cpumask_t mask);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 
 #else /* CONFIG_SMP */
 
diff --git a/arch/alpha/include/asm/topology.h b/arch/alpha/include/asm/topology.h
index b4f284c72ff3..36b3a30ba0e5 100644
--- a/arch/alpha/include/asm/topology.h
+++ b/arch/alpha/include/asm/topology.h
@@ -22,23 +22,6 @@ static inline int cpu_to_node(int cpu)
         return node;
 }
 
-static inline cpumask_t node_to_cpumask(int node)
-{
-        cpumask_t node_cpu_mask = CPU_MASK_NONE;
-        int cpu;
-
-        for_each_online_cpu(cpu) {
-                if (cpu_to_node(cpu) == node)
-                        cpu_set(cpu, node_cpu_mask);
-        }
-
-#ifdef DEBUG_NUMA
-        printk("node %d: cpu_mask: %016lx\n", node, node_cpu_mask);
-#endif
-
-        return node_cpu_mask;
-}
-
 extern struct cpumask node_to_cpumask_map[];
 /* FIXME: This is dumb, recalculating every time.  But simple. */
 static const struct cpumask *cpumask_of_node(int node)
@@ -55,7 +38,6 @@ static const struct cpumask *cpumask_of_node(int node)
         return &node_to_cpumask_map[node];
 }
 
-#define pcibus_to_cpumask(bus)  (cpu_online_map)
 #define cpumask_of_pcibus(bus)  (cpu_online_mask)
 
 #endif /* !CONFIG_NUMA */
diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c
index e302daecbe56..8e059e58b0ac 100644
--- a/arch/alpha/kernel/core_marvel.c
+++ b/arch/alpha/kernel/core_marvel.c
@@ -1016,7 +1016,7 @@ marvel_agp_bind_memory(alpha_agp_info *agp, off_t pg_start, struct agp_memory *m
 {
         struct marvel_agp_aperture *aper = agp->aperture.sysdata;
         return iommu_bind(aper->arena, aper->pg_start + pg_start, 
-                          mem->page_count, mem->memory);
+                          mem->page_count, mem->pages);
 }
 
 static int 
diff --git a/arch/alpha/kernel/core_titan.c b/arch/alpha/kernel/core_titan.c
index 319fcb74611e..76686497b1e2 100644
--- a/arch/alpha/kernel/core_titan.c
+++ b/arch/alpha/kernel/core_titan.c
@@ -680,7 +680,7 @@ titan_agp_bind_memory(alpha_agp_info *agp, off_t pg_start, struct agp_memory *me
 {
         struct titan_agp_aperture *aper = agp->aperture.sysdata;
         return iommu_bind(aper->arena, aper->pg_start + pg_start, 
-                          mem->page_count, mem->memory);
+                          mem->page_count, mem->pages);
 }
 
 static int 
diff --git a/arch/alpha/kernel/init_task.c b/arch/alpha/kernel/init_task.c
index 19b86328ffd7..6f80ca4f9766 100644
--- a/arch/alpha/kernel/init_task.c
+++ b/arch/alpha/kernel/init_task.c
@@ -13,6 +13,5 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 struct task_struct init_task = INIT_TASK(init_task);
 EXPORT_SYMBOL(init_task);
 
-union thread_union init_thread_union
-        __attribute__((section(".data.init_thread")))
-        = { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
diff --git a/arch/alpha/kernel/pci_impl.h b/arch/alpha/kernel/pci_impl.h
index 00edd04b585e..85457b2d4516 100644
--- a/arch/alpha/kernel/pci_impl.h
+++ b/arch/alpha/kernel/pci_impl.h
@@ -198,7 +198,7 @@ extern unsigned long size_for_memory(unsigned long max);
 
 extern int iommu_reserve(struct pci_iommu_arena *, long, long);
 extern int iommu_release(struct pci_iommu_arena *, long, long);
-extern int iommu_bind(struct pci_iommu_arena *, long, long, unsigned long *);
+extern int iommu_bind(struct pci_iommu_arena *, long, long, struct page **);
 extern int iommu_unbind(struct pci_iommu_arena *, long, long);
 
 
diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c
index bfb880af959d..8449504f5e0b 100644
--- a/arch/alpha/kernel/pci_iommu.c
+++ b/arch/alpha/kernel/pci_iommu.c
@@ -268,11 +268,7 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size,
            assume it doesn't support sg mapping, and, since we tried to
            use direct_map above, it now must be considered an error. */
         if (! alpha_mv.mv_pci_tbi) {
-                static int been_here = 0; /* Only print the message once. */
-                if (!been_here) {
-                    printk(KERN_WARNING "pci_map_single: no HW sg\n");
-                    been_here = 1;
-                }
+                printk_once(KERN_WARNING "pci_map_single: no HW sg\n");
                 return 0;
         }
 
@@ -880,7 +876,7 @@ iommu_release(struct pci_iommu_arena *arena, long pg_start, long pg_count)
 
 int
 iommu_bind(struct pci_iommu_arena *arena, long pg_start, long pg_count, 
-           unsigned long *physaddrs)
+           struct page **pages)
 {
         unsigned long flags;
         unsigned long *ptes;
@@ -900,7 +896,7 @@ iommu_bind(struct pci_iommu_arena *arena, long pg_start, long pg_count,
         }
                 
         for(i = 0, j = pg_start; i < pg_count; i++, j++)
-                ptes[j] = mk_iommu_pte(physaddrs[i]);
+                ptes[j] = mk_iommu_pte(page_to_phys(pages[i]));
 
         spin_unlock_irqrestore(&arena->lock, flags);
 
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 3a2fb7a02db4..289039bb6bb2 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -19,7 +19,6 @@
 #include <linux/ptrace.h>
 #include <linux/slab.h>
 #include <linux/user.h>
-#include <linux/utsname.h>
 #include <linux/time.h>
 #include <linux/major.h>
 #include <linux/stat.h>
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index b1fe5674c3a1..42aa078a5e4d 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -548,16 +548,16 @@ setup_profiling_timer(unsigned int multiplier)
 
 
 static void
-send_ipi_message(cpumask_t to_whom, enum ipi_message_type operation)
+send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation)
 {
         int i;
 
         mb();
-        for_each_cpu_mask(i, to_whom)
+        for_each_cpu(i, to_whom)
                 set_bit(operation, &ipi_data[i].bits);
 
         mb();
-        for_each_cpu_mask(i, to_whom)
+        for_each_cpu(i, to_whom)
                 wripir(i);
 }
 
@@ -624,7 +624,7 @@ smp_send_reschedule(int cpu)
                 printk(KERN_WARNING
                        "smp_send_reschedule: Sending IPI to self.\n");
 #endif
-        send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE);
+        send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
 }
 
 void
@@ -636,17 +636,17 @@ smp_send_stop(void)
         if (hard_smp_processor_id() != boot_cpu_id)
                 printk(KERN_WARNING "smp_send_stop: Not on boot cpu.\n");
 #endif
-        send_ipi_message(to_whom, IPI_CPU_STOP);
+        send_ipi_message(&to_whom, IPI_CPU_STOP);
 }
 
-void arch_send_call_function_ipi(cpumask_t mask)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         send_ipi_message(mask, IPI_CALL_FUNC);
 }
 
 void arch_send_call_function_single_ipi(int cpu)
 {
-        send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE);
+        send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
 }
 
 static void
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index b04e2cbf23a4..5d0826654c61 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -408,28 +408,17 @@ time_init(void)
  * part.  So we can't do the "find absolute time in terms of cycles" thing
  * that the other ports do.
  */
-void
-do_gettimeofday(struct timeval *tv)
+u32 arch_gettimeoffset(void)
 {
-        unsigned long flags;
-        unsigned long sec, usec, seq;
-        unsigned long delta_cycles, delta_usec, partial_tick;
-
-        do {
-                seq = read_seqbegin_irqsave(&xtime_lock, flags);
-
-                delta_cycles = rpcc() - state.last_time;
-                sec = xtime.tv_sec;
-                usec = (xtime.tv_nsec / 1000);
-                partial_tick = state.partial_tick;
-
-        } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-
 #ifdef CONFIG_SMP
         /* Until and unless we figure out how to get cpu cycle counters
            in sync and keep them there, we can't use the rpcc tricks.  */
-        delta_usec = 0;
+        return 0;
 #else
+        unsigned long delta_cycles, delta_usec, partial_tick;
+
+        delta_cycles = rpcc() - state.last_time;
+        partial_tick = state.partial_tick;
         /*
          * usec = cycles * ticks_per_cycle * 2**48 * 1e6 / (2**48 * ticks)
          *      = cycles * (s_t_p_c) * 1e6 / (2**48 * ticks)
@@ -446,64 +435,10 @@ do_gettimeofday(struct timeval *tv)
         delta_usec = (delta_cycles * state.scaled_ticks_per_cycle 
                       + partial_tick) * 15625;
         delta_usec = ((delta_usec / ((1UL << (FIX_SHIFT-6-1)) * HZ)) + 1) / 2;
+        return delta_usec * 1000;
 #endif
-
-        usec += delta_usec;
-        if (usec >= 1000000) {
-                sec += 1;
-                usec -= 1000000;
-        }
-
-        tv->tv_sec = sec;
-        tv->tv_usec = usec;
 }
 
-EXPORT_SYMBOL(do_gettimeofday);
-
-int
-do_settimeofday(struct timespec *tv)
-{
-        time_t wtm_sec, sec = tv->tv_sec;
-        long wtm_nsec, nsec = tv->tv_nsec;
-        unsigned long delta_nsec;
-
-        if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
-                return -EINVAL;
-
-        write_seqlock_irq(&xtime_lock);
-
-        /* The offset that is added into time in do_gettimeofday above
-           must be subtracted out here to keep a coherent view of the
-           time.  Without this, a full-tick error is possible.  */
-
-#ifdef CONFIG_SMP
-        delta_nsec = 0;
-#else
-        delta_nsec = rpcc() - state.last_time;
-        delta_nsec = (delta_nsec * state.scaled_ticks_per_cycle 
-                      + state.partial_tick) * 15625;
-        delta_nsec = ((delta_nsec / ((1UL << (FIX_SHIFT-6-1)) * HZ)) + 1) / 2;
-        delta_nsec *= 1000;
-#endif
-
-        nsec -= delta_nsec;
-
-        wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
-        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
-        set_normalized_timespec(&xtime, sec, nsec);
-        set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
-        ntp_clear();
-
-        write_sequnlock_irq(&xtime_lock);
-        clock_was_set();
-        return 0;
-}
-
-EXPORT_SYMBOL(do_settimeofday);
-
-
 /*
  * In order to set the CMOS clock precisely, set_rtc_mmss has to be
  * called 500 ms after the second nowtime has started, because when
diff --git a/arch/alpha/kernel/vmlinux.lds.S b/arch/alpha/kernel/vmlinux.lds.S
index 6dc03c35caa0..2906665b1c10 100644
--- a/arch/alpha/kernel/vmlinux.lds.S
+++ b/arch/alpha/kernel/vmlinux.lds.S
@@ -1,5 +1,6 @@
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/page.h>
+#include <asm/thread_info.h>
 
 OUTPUT_FORMAT("elf64-alpha")
 OUTPUT_ARCH(alpha)
@@ -31,88 +32,21 @@ SECTIONS
         } :kernel
 
         RODATA
-
-        /* Exception table */
-        . = ALIGN(16);
-        __ex_table : {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
+        EXCEPTION_TABLE(16)
 
         /* Will be freed after init */
-        . = ALIGN(PAGE_SIZE);
-        /* Init code and data */
-        __init_begin = .;
-        .init.text : {
-                _sinittext = .;
-                INIT_TEXT
-                _einittext = .;
-        }
-        .init.data : {
-                INIT_DATA
-        }
-
-        . = ALIGN(16);
-        .init.setup : {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
-        }
-
-        . = ALIGN(8);
-        .initcall.init : {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
-        }
-
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
-        .init.ramfs : {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
-        }
-#endif
-
-        . = ALIGN(8);
-        .con_initcall.init : {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
-        }
-
-        . = ALIGN(8);
-        SECURITY_INIT
-
+        __init_begin = ALIGN(PAGE_SIZE);
+        INIT_TEXT_SECTION(PAGE_SIZE)
+        INIT_DATA_SECTION(16)
         PERCPU(PAGE_SIZE)
-
-        . = ALIGN(2 * PAGE_SIZE);
+        /* Align to THREAD_SIZE rather than PAGE_SIZE here so any padding page
+           needed for the THREAD_SIZE aligned init_task gets freed after init */
+        . = ALIGN(THREAD_SIZE);
         __init_end = .;
         /* Freed after init ends here */
 
-        /* Note 2 page alignment above.  */
-        .data.init_thread : {
-                *(.data.init_thread)
-        }
-
-        . = ALIGN(PAGE_SIZE);
-        .data.page_aligned : {
-                *(.data.page_aligned)
-        }
-
-        . = ALIGN(64);
-        .data.cacheline_aligned : {
-                *(.data.cacheline_aligned)
-        }
-
         _data = .;
-        /* Data */
-        .data : {
-                DATA_DATA
-                CONSTRUCTORS
-        }
+        RW_DATA_SECTION(64, PAGE_SIZE, THREAD_SIZE)
 
         .got : {
                 *(.got)
@@ -122,16 +56,7 @@ SECTIONS
         }
         _edata = .;     /* End of data section */
 
-        __bss_start = .;
-        .sbss : {
-                *(.sbss)
-                *(.scommon)
-        }
-        .bss : {
-                *(.bss)
-                *(COMMON)
-        }
-        __bss_stop = .;
+        BSS_SECTION(0, 0, 0)
         _end = .;
 
         .mdebug 0 : {
diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c
index af71d38c8e41..a0902c20d677 100644
--- a/arch/alpha/mm/init.c
+++ b/arch/alpha/mm/init.c
@@ -299,7 +299,7 @@ printk_memory_info(void)
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
         printk("Memory: %luk/%luk available (%luk kernel code, %luk reserved, %luk data, %luk init)\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                max_mapnr << (PAGE_SHIFT-10),
                codesize >> 10,
                reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/alpha/mm/numa.c b/arch/alpha/mm/numa.c
index 0eab55749423..10b403554b65 100644
--- a/arch/alpha/mm/numa.c
+++ b/arch/alpha/mm/numa.c
@@ -349,7 +349,7 @@ void __init mem_init(void)
 
         printk("Memory: %luk/%luk available (%luk kernel code, %luk reserved, "
                "%luk data, %luk init)\n",
-               (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                num_physpages << (PAGE_SHIFT-10),
                codesize >> 10,
                reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d778a699f577..1c4119c60040 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -46,6 +46,10 @@ config GENERIC_CLOCKEVENTS_BROADCAST
         depends on GENERIC_CLOCKEVENTS
         default y if SMP && !LOCAL_TIMERS
 
+config HAVE_TCM
+        bool
+        select GENERIC_ALLOCATOR
+
 config NO_IOPORT
         bool
 
@@ -649,6 +653,7 @@ config ARCH_U300
         bool "ST-Ericsson U300 Series"
         depends on MMU
         select CPU_ARM926T
+        select HAVE_TCM
         select ARM_AMBA
         select ARM_VIC
         select GENERIC_TIME
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 7350557a81e0..a73caaf66763 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -14,7 +14,7 @@ LDFLAGS_vmlinux	:=-p --no-undefined -X
 ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
 LDFLAGS_vmlinux += --be8
 endif
-CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
+
 OBJCOPYFLAGS    :=-O binary -R .note -R .note.gnu.build-id -R .comment -S
 GZFLAGS         :=-9
 #KBUILD_CFLAGS  +=-pipe
@@ -25,7 +25,7 @@ KBUILD_CFLAGS	+=$(call cc-option,-marm,)
 # Select a platform tht is kept up-to-date
 KBUILD_DEFCONFIG := versatile_defconfig
 
-# defines filename extension depending memory manement type.
+# defines filename extension depending memory management type.
 ifeq ($(CONFIG_MMU),)
 MMUEXT          := -nommu
 endif
@@ -279,7 +279,7 @@ define archhelp
   echo  '                  (supply initrd image via make variable INITRD=<path>)'
   echo  '  install       - Install uncompressed kernel'
   echo  '  zinstall      - Install compressed kernel'
-  echo  '                  Install using (your) ~/bin/installkernel or'
-  echo  '                  (distribution) /sbin/installkernel or'
+  echo  '                  Install using (your) ~/bin/$(INSTALLKERNEL) or'
+  echo  '                  (distribution) /sbin/$(INSTALLKERNEL) or'
   echo  '                  install to $$(INSTALL_PATH) and run lilo'
 endef
diff --git a/arch/arm/boot/install.sh b/arch/arm/boot/install.sh
index 9f9bed207345..06ea7d42ce8e 100644
--- a/arch/arm/boot/install.sh
+++ b/arch/arm/boot/install.sh
@@ -21,8 +21,8 @@
 #
 
 # User may have a custom install script
-if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
-if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 if [ "$(basename $2)" = "zImage" ]; then
 # Compressed install
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 2293f0ce061e..bd36c778c819 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -865,6 +865,7 @@ void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir
 
         spin_unlock_irqrestore(&lchip->lock, flags);
 }
+EXPORT_SYMBOL(locomo_gpio_set_dir);
 
 int locomo_gpio_read_level(struct device *dev, unsigned int bits)
 {
@@ -882,6 +883,7 @@ int locomo_gpio_read_level(struct device *dev, unsigned int bits)
         ret &= bits;
         return ret;
 }
+EXPORT_SYMBOL(locomo_gpio_read_level);
 
 int locomo_gpio_read_output(struct device *dev, unsigned int bits)
 {
@@ -899,6 +901,7 @@ int locomo_gpio_read_output(struct device *dev, unsigned int bits)
         ret &= bits;
         return ret;
 }
+EXPORT_SYMBOL(locomo_gpio_read_output);
 
 void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set)
 {
@@ -920,6 +923,7 @@ void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set)
 
         spin_unlock_irqrestore(&lchip->lock, flags);
 }
+EXPORT_SYMBOL(locomo_gpio_write);
 
 static void locomo_m62332_sendbit(void *mapbase, int bit)
 {
@@ -1084,13 +1088,12 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
 
         spin_unlock_irqrestore(&lchip->lock, flags);
 }
+EXPORT_SYMBOL(locomo_m62332_senddata);
 
 /*
  *      Frontlight control
  */
 
-static struct locomo *locomo_chip_driver(struct locomo_dev *ldev);
-
 void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
 {
         unsigned long flags;
@@ -1182,11 +1185,13 @@ int locomo_driver_register(struct locomo_driver *driver)
         driver->drv.bus = &locomo_bus_type;
         return driver_register(&driver->drv);
 }
+EXPORT_SYMBOL(locomo_driver_register);
 
 void locomo_driver_unregister(struct locomo_driver *driver)
 {
         driver_unregister(&driver->drv);
 }
+EXPORT_SYMBOL(locomo_driver_unregister);
 
 static int __init locomo_init(void)
 {
@@ -1208,11 +1213,3 @@ module_exit(locomo_exit);
 MODULE_DESCRIPTION("Sharp LoCoMo core driver");
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("John Lenz <lenz@cs.wisc.edu>");
-
-EXPORT_SYMBOL(locomo_driver_register);
-EXPORT_SYMBOL(locomo_driver_unregister);
-EXPORT_SYMBOL(locomo_gpio_set_dir);
-EXPORT_SYMBOL(locomo_gpio_read_level);
-EXPORT_SYMBOL(locomo_gpio_read_output);
-EXPORT_SYMBOL(locomo_gpio_write);
-EXPORT_SYMBOL(locomo_m62332_senddata);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 920ced0b73c5..f232941de8ab 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -22,6 +22,7 @@
 #include <linux/list.h>
 #include <linux/io.h>
 #include <linux/sysdev.h>
+#include <linux/device.h>
 #include <linux/amba/bus.h>
 
 #include <asm/mach/irq.h>
diff --git a/arch/arm/configs/da830_omapl137_defconfig b/arch/arm/configs/da830_omapl137_defconfig
new file mode 100644
index 000000000000..7c8e38f5c5ab
--- /dev/null
+++ b/arch/arm/configs/da830_omapl137_defconfig
@@ -0,0 +1,1254 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc2-davinci1
+# Wed May 13 15:33:29 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+CONFIG_ARCH_DAVINCI=y
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+CONFIG_CP_INTC=y
+
+#
+# TI DaVinci Implementations
+#
+
+#
+# DaVinci Core Type
+#
+# CONFIG_ARCH_DAVINCI_DM644x is not set
+# CONFIG_ARCH_DAVINCI_DM646x is not set
+# CONFIG_ARCH_DAVINCI_DM355 is not set
+CONFIG_ARCH_DAVINCI_DA830=y
+
+#
+# DaVinci Board Type
+#
+CONFIG_MACH_DAVINCI_DA830_EVM=y
+CONFIG_DAVINCI_MUX=y
+# CONFIG_DAVINCI_MUX_DEBUG is not set
+# CONFIG_DAVINCI_MUX_WARNINGS is not set
+CONFIG_DAVINCI_RESET_CLOCKS=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+CONFIG_CPU_DCACHE_WRITETHROUGH=y
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_LEDS=y
+# CONFIG_LEDS_CPU is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_NF_DEFRAG_IPV4 is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_IP6_NF_QUEUE is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+CONFIG_LXT_PHY=y
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+CONFIG_LSI_ET1011C_PHY=y
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+CONFIG_TI_DAVINCI_EMAC=y
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+CONFIG_NETCONSOLE=y
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+CONFIG_NETPOLL_TRAP=y
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_XTKBD=m
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_DAVINCI=y
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+CONFIG_GPIO_PCF857X=m
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_DAVINCI_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_SOC=m
+CONFIG_SND_DAVINCI_SOC=m
+CONFIG_SND_SOC_I2C_AND_SPI=m
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PERIPHERAL is not set
+# CONFIG_USB_MUSB_OTG is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=m
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=m
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=m
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/da850_omapl138_defconfig b/arch/arm/configs/da850_omapl138_defconfig
new file mode 100644
index 000000000000..842a70b079bf
--- /dev/null
+++ b/arch/arm/configs/da850_omapl138_defconfig
@@ -0,0 +1,1229 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-davinci1
+# Mon Jun 29 07:54:15 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+CONFIG_ARCH_DAVINCI=y
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+CONFIG_CP_INTC=y
+
+#
+# TI DaVinci Implementations
+#
+
+#
+# DaVinci Core Type
+#
+# CONFIG_ARCH_DAVINCI_DM644x is not set
+# CONFIG_ARCH_DAVINCI_DM355 is not set
+# CONFIG_ARCH_DAVINCI_DM646x is not set
+# CONFIG_ARCH_DAVINCI_DA830 is not set
+CONFIG_ARCH_DAVINCI_DA850=y
+CONFIG_ARCH_DAVINCI_DA8XX=y
+# CONFIG_ARCH_DAVINCI_DM365 is not set
+
+#
+# DaVinci Board Type
+#
+CONFIG_MACH_DAVINCI_DA850_EVM=y
+CONFIG_DAVINCI_MUX=y
+# CONFIG_DAVINCI_MUX_DEBUG is not set
+# CONFIG_DAVINCI_MUX_WARNINGS is not set
+CONFIG_DAVINCI_RESET_CLOCKS=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_LEDS=y
+# CONFIG_LEDS_CPU is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_NF_DEFRAG_IPV4 is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_IP6_NF_QUEUE is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+CONFIG_LXT_PHY=y
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+CONFIG_LSI_ET1011C_PHY=y
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_TI_DAVINCI_EMAC is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+CONFIG_NETCONSOLE=y
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+CONFIG_NETPOLL_TRAP=y
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_XTKBD=m
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+# CONFIG_VT_CONSOLE is not set
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=3
+CONFIG_SERIAL_8250_RUNTIME_UARTS=3
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_DAVINCI=y
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+CONFIG_GPIO_PCF857X=m
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_DAVINCI_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_SOC=m
+CONFIG_SND_DAVINCI_SOC=m
+CONFIG_SND_SOC_I2C_AND_SPI=m
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=m
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=m
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=m
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index ac18662f38cc..ddffe39d9f87 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30-rc7
-# Tue May 26 07:24:28 2009
+# Linux kernel version: 2.6.31-rc3-davinci1
+# Fri Jul 17 08:26:52 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -9,7 +9,6 @@ CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -18,14 +17,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -62,8 +60,7 @@ CONFIG_FAIR_GROUP_SCHED=y
 CONFIG_USER_SCHED=y
 # CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
@@ -80,7 +77,6 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -93,8 +89,13 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+
+#
+# Performance Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
@@ -106,6 +107,11 @@ CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -118,7 +124,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -145,13 +151,14 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -160,26 +167,27 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_LOKI is not set
 # CONFIG_ARCH_MV78XX0 is not set
-# CONFIG_ARCH_MXC is not set
 # CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
-# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_MSM is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
 CONFIG_ARCH_DAVINCI=y
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_MSM is not set
-# CONFIG_ARCH_W90X900 is not set
 CONFIG_AINTC=y
+CONFIG_ARCH_DAVINCI_DMx=y
 
 #
 # TI DaVinci Implementations
@@ -191,6 +199,9 @@ CONFIG_AINTC=y
 CONFIG_ARCH_DAVINCI_DM644x=y
 CONFIG_ARCH_DAVINCI_DM355=y
 CONFIG_ARCH_DAVINCI_DM646x=y
+# CONFIG_ARCH_DAVINCI_DA830 is not set
+# CONFIG_ARCH_DAVINCI_DA850 is not set
+CONFIG_ARCH_DAVINCI_DM365=y
 
 #
 # DaVinci Board Type
@@ -200,6 +211,7 @@ CONFIG_MACH_SFFSDR=y
 CONFIG_MACH_DAVINCI_DM355_EVM=y
 CONFIG_MACH_DM355_LEOPARD=y
 CONFIG_MACH_DAVINCI_DM6467_EVM=y
+CONFIG_MACH_DAVINCI_DM365_EVM=y
 CONFIG_DAVINCI_MUX=y
 CONFIG_DAVINCI_MUX_DEBUG=y
 CONFIG_DAVINCI_MUX_WARNINGS=y
@@ -227,7 +239,6 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
 # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
-# CONFIG_OUTER_CACHE is not set
 CONFIG_COMMON_CLKDEV=y
 
 #
@@ -252,7 +263,6 @@ CONFIG_PREEMPT=y
 CONFIG_HZ=100
 CONFIG_AEABI=y
 # CONFIG_OABI_COMPAT is not set
-# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
 # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
 # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 # CONFIG_HIGHMEM is not set
@@ -268,12 +278,13 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_LEDS=y
 # CONFIG_LEDS_CPU is not set
 CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
 
 #
 # Boot options
@@ -415,6 +426,7 @@ CONFIG_NETFILTER_ADVANCED=y
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
 
@@ -553,6 +565,7 @@ CONFIG_BLK_DEV_RAM_SIZE=32768
 # CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
 CONFIG_MISC_DEVICES=y
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
@@ -564,6 +577,7 @@ CONFIG_MISC_DEVICES=y
 #
 CONFIG_EEPROM_AT24=y
 # CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
 # CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 CONFIG_IDE=m
@@ -609,10 +623,6 @@ CONFIG_BLK_DEV_SD=m
 # CONFIG_BLK_DEV_SR is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 # CONFIG_SCSI_CONSTANTS is not set
 # CONFIG_SCSI_LOGGING is not set
@@ -637,7 +647,6 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
-CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -684,6 +693,7 @@ CONFIG_DM9000_DEBUGLEVEL=4
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 
@@ -748,18 +758,21 @@ CONFIG_INPUT_EVBUG=m
 #
 CONFIG_INPUT_KEYBOARD=y
 CONFIG_KEYBOARD_ATKBD=m
-# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-CONFIG_KEYBOARD_XTKBD=m
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+CONFIG_KEYBOARD_XTKBD=m
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
 # CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
@@ -773,6 +786,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
 # CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
 # CONFIG_INPUT_MISC is not set
 
 #
@@ -832,6 +846,7 @@ CONFIG_I2C_HELPER_AUTO=y
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
 CONFIG_I2C_DAVINCI=y
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SIMTEC is not set
@@ -854,7 +869,6 @@ CONFIG_I2C_DAVINCI=y
 #
 # CONFIG_DS1682 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -935,6 +949,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_ADS7828 is not set
 # CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83781D is not set
 # CONFIG_SENSORS_W83791D is not set
@@ -986,52 +1001,8 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-CONFIG_VIDEO_DEV=y
-CONFIG_VIDEO_V4L2_COMMON=y
-CONFIG_VIDEO_ALLOW_V4L1=y
-CONFIG_VIDEO_V4L1_COMPAT=y
-# CONFIG_DVB_CORE is not set
-CONFIG_VIDEO_MEDIA=y
-
-#
-# Multimedia drivers
-#
-# CONFIG_MEDIA_ATTACH is not set
-CONFIG_MEDIA_TUNER=y
-# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
-CONFIG_MEDIA_TUNER_SIMPLE=y
-CONFIG_MEDIA_TUNER_TDA8290=y
-CONFIG_MEDIA_TUNER_TDA9887=y
-CONFIG_MEDIA_TUNER_TEA5761=y
-CONFIG_MEDIA_TUNER_TEA5767=y
-CONFIG_MEDIA_TUNER_MT20XX=y
-CONFIG_MEDIA_TUNER_XC2028=y
-CONFIG_MEDIA_TUNER_XC5000=y
-CONFIG_MEDIA_TUNER_MC44S803=y
-CONFIG_VIDEO_V4L2=y
-CONFIG_VIDEO_V4L1=y
-CONFIG_VIDEO_CAPTURE_DRIVERS=y
-# CONFIG_VIDEO_ADV_DEBUG is not set
-# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
-CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
-# CONFIG_VIDEO_VIVI is not set
-# CONFIG_VIDEO_CPIA is not set
-# CONFIG_VIDEO_CPIA2 is not set
-# CONFIG_VIDEO_SAA5246A is not set
-# CONFIG_VIDEO_SAA5249 is not set
-# CONFIG_SOC_CAMERA is not set
-# CONFIG_V4L_USB_DRIVERS is not set
-# CONFIG_RADIO_ADAPTERS is not set
-CONFIG_DAB=y
-# CONFIG_USB_DABUSB is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -1102,6 +1073,11 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
 CONFIG_SND_DRIVERS=y
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
@@ -1112,9 +1088,16 @@ CONFIG_SND_USB=y
 # CONFIG_SND_USB_AUDIO is not set
 # CONFIG_SND_USB_CAIAQ is not set
 CONFIG_SND_SOC=m
-# CONFIG_SND_DAVINCI_SOC is not set
+CONFIG_SND_DAVINCI_SOC=m
+CONFIG_SND_DAVINCI_SOC_I2S=m
+CONFIG_SND_DAVINCI_SOC_MCASP=m
+CONFIG_SND_DAVINCI_SOC_EVM=m
+CONFIG_SND_DM6467_SOC_EVM=m
+# CONFIG_SND_DAVINCI_SOC_SFFSDR is not set
 CONFIG_SND_SOC_I2C_AND_SPI=m
 # CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_SPDIF=m
+CONFIG_SND_SOC_TLV320AIC3X=m
 # CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=m
@@ -1143,7 +1126,7 @@ CONFIG_HID_BELKIN=m
 CONFIG_HID_CHERRY=m
 CONFIG_HID_CHICONY=m
 CONFIG_HID_CYPRESS=m
-# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_DRAGONRISE is not set
 CONFIG_HID_EZKEY=m
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=m
@@ -1160,10 +1143,11 @@ CONFIG_HID_PETALYNX=m
 CONFIG_HID_SAMSUNG=m
 CONFIG_HID_SONY=m
 CONFIG_HID_SUNPLUS=m
-# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
 # CONFIG_HID_TOPSEED is not set
-# CONFIG_THRUSTMASTER_FF is not set
-# CONFIG_ZEROPLUS_FF is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -1266,6 +1250,7 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
@@ -1285,17 +1270,20 @@ CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_OMAP is not set
 # CONFIG_USB_GADGET_PXA25X is not set
 # CONFIG_USB_GADGET_PXA27X is not set
-# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
 # CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
 # CONFIG_USB_GADGET_M66592 is not set
 # CONFIG_USB_GADGET_AMD5536UDC is not set
 # CONFIG_USB_GADGET_FSL_QE is not set
 # CONFIG_USB_GADGET_CI13XXX is not set
 # CONFIG_USB_GADGET_NET2280 is not set
 # CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
 # CONFIG_USB_GADGET_DUMMY_HCD is not set
 CONFIG_USB_GADGET_DUALSPEED=y
 CONFIG_USB_ZERO=m
+# CONFIG_USB_AUDIO is not set
 CONFIG_USB_ETH=m
 CONFIG_USB_ETH_RNDIS=y
 CONFIG_USB_GADGETFS=m
@@ -1311,7 +1299,7 @@ CONFIG_USB_CDC_COMPOSITE=m
 #
 CONFIG_USB_OTG_UTILS=y
 # CONFIG_USB_GPIO_VBUS is not set
-# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_NOP_USB_XCEIV=m
 CONFIG_MMC=m
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
@@ -1328,7 +1316,6 @@ CONFIG_MMC_BLOCK=m
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
-# CONFIG_MMC_DAVINCI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_ACCESSIBILITY is not set
 CONFIG_NEW_LEDS=y
@@ -1340,7 +1327,7 @@ CONFIG_LEDS_CLASS=m
 # CONFIG_LEDS_PCA9532 is not set
 CONFIG_LEDS_GPIO=m
 CONFIG_LEDS_GPIO_PLATFORM=y
-# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP3944 is not set
 # CONFIG_LEDS_PCA955X is not set
 # CONFIG_LEDS_BD2802 is not set
 
@@ -1386,6 +1373,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1433,14 +1421,16 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-CONFIG_FILE_LOCKING=y
 CONFIG_XFS_FS=m
 # CONFIG_XFS_QUOTA is not set
 # CONFIG_XFS_POSIX_ACL is not set
 # CONFIG_XFS_RT is not set
 # CONFIG_XFS_DEBUG is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1623,6 +1613,7 @@ CONFIG_TIMER_STATS=y
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_SLUB_DEBUG_ON is not set
 # CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
 CONFIG_DEBUG_PREEMPT=y
 CONFIG_DEBUG_RT_MUTEXES=y
 CONFIG_DEBUG_PI_LIST=y
@@ -1654,18 +1645,16 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_TRACING_SUPPORT=y
-
-#
-# Tracers
-#
+CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
-# CONFIG_CONTEXT_SWITCH_TRACER is not set
-# CONFIG_EVENT_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
 # CONFIG_BOOT_TRACER is not set
-# CONFIG_TRACE_BRANCH_PROFILING is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
 # CONFIG_STACK_TRACER is not set
 # CONFIG_KMEMTRACE is not set
 # CONFIG_WORKQUEUE_TRACER is not set
diff --git a/arch/arm/configs/littleton_defconfig b/arch/arm/configs/littleton_defconfig
deleted file mode 100644
index 1db496908052..000000000000
--- a/arch/arm/configs/littleton_defconfig
+++ /dev/null
@@ -1,783 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-rc5
-# Fri Dec 21 11:06:19 2007
-#
-CONFIG_ARM=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_GENERIC_TIME=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ZONE_DMA=y
-CONFIG_ARCH_MTD_XIP=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# General setup
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_LOCK_KERNEL=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-# CONFIG_AUDIT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
-CONFIG_FAIR_GROUP_SCHED=y
-CONFIG_FAIR_USER_SCHED=y
-# CONFIG_FAIR_CGROUP_SCHED is not set
-CONFIG_SYSFS_DEPRECATED=y
-# CONFIG_RELAY is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL=y
-# CONFIG_EMBEDDED is not set
-CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
-CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
-# CONFIG_SLOB is not set
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-# CONFIG_BLK_DEV_BSG is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-
-#
-# System Type
-#
-# CONFIG_ARCH_AAEC2000 is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_VERSATILE is not set
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_IOP13XX is not set
-# CONFIG_ARCH_IOP32X is not set
-# CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP23XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
-# CONFIG_ARCH_MXC is not set
-# CONFIG_ARCH_PNX4008 is not set
-CONFIG_ARCH_PXA=y
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_OMAP is not set
-
-#
-# Intel PXA2xx/PXA3xx Implementations
-#
-
-#
-# Supported PXA3xx Processor Variants
-#
-CONFIG_CPU_PXA300=y
-CONFIG_CPU_PXA310=y
-# CONFIG_CPU_PXA320 is not set
-# CONFIG_ARCH_LUBBOCK is not set
-# CONFIG_MACH_LOGICPD_PXA270 is not set
-# CONFIG_MACH_MAINSTONE is not set
-# CONFIG_ARCH_PXA_IDP is not set
-# CONFIG_PXA_SHARPSL is not set
-# CONFIG_MACH_TRIZEPS4 is not set
-# CONFIG_MACH_EM_X270 is not set
-# CONFIG_MACH_ZYLONITE is not set
-CONFIG_MACH_LITTLETON=y
-# CONFIG_MACH_ARMCORE is not set
-CONFIG_PXA3xx=y
-CONFIG_PXA_SSP=y
-
-#
-# Boot options
-#
-
-#
-# Power management
-#
-
-#
-# Processor Type
-#
-CONFIG_CPU_32=y
-CONFIG_CPU_XSC3=y
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_TLB_V4WBI=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_IO_36=y
-
-#
-# Processor Features
-#
-# CONFIG_ARM_THUMB is not set
-# CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
-CONFIG_IWMMXT=y
-
-#
-# Bus support
-#
-# CONFIG_PCI_SYSCALL is not set
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-# CONFIG_PCCARD is not set
-
-#
-# Kernel Features
-#
-CONFIG_TICK_ONESHOT=y
-# CONFIG_NO_HZ is not set
-# CONFIG_HIGH_RES_TIMERS is not set
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_PREEMPT=y
-CONFIG_HZ=100
-CONFIG_AEABI=y
-CONFIG_OABI_COMPAT=y
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
-CONFIG_VIRT_TO_BUS=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Boot options
-#
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=64M"
-# CONFIG_XIP_KERNEL is not set
-# CONFIG_KEXEC is not set
-
-#
-# CPU Frequency scaling
-#
-# CONFIG_CPU_FREQ is not set
-
-#
-# Floating point emulation
-#
-
-#
-# At least one emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-# CONFIG_FPE_FASTFPE is not set
-
-#
-# Userspace binary formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BINFMT_MISC is not set
-
-#
-# Power management options
-#
-# CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_XFRM_MODE_TRANSPORT=y
-CONFIG_INET_XFRM_MODE_TUNNEL=y
-CONFIG_INET_XFRM_MODE_BEET=y
-# CONFIG_INET_LRO is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_IP_DCCP is not set
-# CONFIG_IP_SCTP is not set
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_RFKILL is not set
-# CONFIG_NET_9P is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_FW_LOADER=y
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
-# CONFIG_SYS_HYPERVISOR is not set
-# CONFIG_CONNECTOR is not set
-# CONFIG_MTD is not set
-# CONFIG_PARPORT is not set
-# CONFIG_BLK_DEV is not set
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SCSI_NETLINK is not set
-# CONFIG_ATA is not set
-# CONFIG_MD is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_MACVLAN is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_VETH is not set
-# CONFIG_PHYLIB is not set
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_AX88796 is not set
-CONFIG_SMC91X=y
-# CONFIG_DM9000 is not set
-# CONFIG_SMC911X is not set
-# CONFIG_IBM_NEW_EMAC_ZMII is not set
-# CONFIG_IBM_NEW_EMAC_RGMII is not set
-# CONFIG_IBM_NEW_EMAC_TAH is not set
-# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-# CONFIG_B44 is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_ISDN is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-# CONFIG_INPUT_POLLDEV is not set
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TABLET is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_VT_HW_CONSOLE_BINDING is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_IPMI_HANDLER is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_NVRAM is not set
-# CONFIG_R3964 is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_TCG_TPM is not set
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-# CONFIG_W1 is not set
-# CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON is not set
-# CONFIG_WATCHDOG is not set
-
-#
-# Sonics Silicon Backplane
-#
-CONFIG_SSB_POSSIBLE=y
-# CONFIG_SSB is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_SM501 is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
-
-#
-# Graphics support
-#
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-CONFIG_FB=y
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB_DDC is not set
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-# CONFIG_FB_SYS_FILLRECT is not set
-# CONFIG_FB_SYS_COPYAREA is not set
-# CONFIG_FB_SYS_IMAGEBLIT is not set
-# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
-# CONFIG_FB_SVGALIB is not set
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-
-#
-# Frame buffer hardware drivers
-#
-# CONFIG_FB_S1D13XXX is not set
-CONFIG_FB_PXA=y
-# CONFIG_FB_PXA_PARAMETERS is not set
-# CONFIG_FB_MBX is not set
-# CONFIG_FB_VIRTUAL is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Display device support
-#
-# CONFIG_DISPLAY_SUPPORT is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
-# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-CONFIG_FONTS=y
-# CONFIG_FONT_8x8 is not set
-CONFIG_FONT_8x16=y
-# CONFIG_FONT_6x11 is not set
-# CONFIG_FONT_7x14 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-# CONFIG_FONT_MINI_4x6 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_SUN12x22 is not set
-# CONFIG_FONT_10x18 is not set
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_LOGO_LINUX_CLUT224=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_MMC is not set
-# CONFIG_NEW_LEDS is not set
-CONFIG_RTC_LIB=y
-# CONFIG_RTC_CLASS is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_INOTIFY is not set
-# CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-CONFIG_NETWORK_FILESYSTEMS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_DIRECTIO=y
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_ACL_SUPPORT=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_BIND34 is not set
-CONFIG_RPCSEC_GSS_KRB5=y
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_NLS is not set
-# CONFIG_DLM is not set
-# CONFIG_INSTRUMENTATION is not set
-
-#
-# Kernel hacking
-#
-CONFIG_PRINTK_TIME=y
-CONFIG_ENABLE_WARN_DEPRECATED=y
-CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
-CONFIG_DETECT_SOFTLOCKUP=y
-CONFIG_SCHED_DEBUG=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_TIMER_STATS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_PREEMPT is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_PROVE_LOCKING is not set
-# CONFIG_LOCK_STAT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_LIST is not set
-# CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
-CONFIG_FORCED_INLINING=y
-# CONFIG_BOOT_PRINTK_DELAY is not set
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_FAULT_INJECTION is not set
-# CONFIG_SAMPLES is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_ICEDCC is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_BLKCIPHER=y
-CONFIG_CRYPTO_MANAGER=y
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=y
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=y
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_SEED is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_AUTHENC is not set
-CONFIG_CRYPTO_HW=y
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-CONFIG_CRC_CCITT=y
-# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
-CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/n770_defconfig b/arch/arm/configs/n770_defconfig
index 672f6db06a52..a1657b73683f 100644
--- a/arch/arm/configs/n770_defconfig
+++ b/arch/arm/configs/n770_defconfig
@@ -875,7 +875,7 @@ CONFIG_FB_OMAP_LCDC_EXTERNAL=y
 CONFIG_FB_OMAP_LCDC_HWA742=y
 # CONFIG_FB_OMAP_LCDC_BLIZZARD is not set
 CONFIG_FB_OMAP_MANUAL_UPDATE=y
-# CONFIG_FB_OMAP_LCD_MIPID is not set
+CONFIG_FB_OMAP_LCD_MIPID=y
 # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
 CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
 # CONFIG_FB_OMAP_DMA_TUNE is not set
diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig
new file mode 100644
index 000000000000..8da75dede52e
--- /dev/null
+++ b/arch/arm/configs/n8x0_defconfig
@@ -0,0 +1,1104 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31-rc5
+# Thu Aug  6 22:17:23 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+# CONFIG_CLASSIC_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Performance Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+CONFIG_ARCH_OMAP=y
+
+#
+# TI OMAP Implementations
+#
+CONFIG_ARCH_OMAP_OTG=y
+# CONFIG_ARCH_OMAP1 is not set
+CONFIG_ARCH_OMAP2=y
+# CONFIG_ARCH_OMAP3 is not set
+# CONFIG_ARCH_OMAP4 is not set
+
+#
+# OMAP Feature Selections
+#
+# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
+# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
+CONFIG_OMAP_RESET_CLOCKS=y
+# CONFIG_OMAP_MUX is not set
+# CONFIG_OMAP_MCBSP is not set
+CONFIG_OMAP_MBOX_FWK=y
+# CONFIG_OMAP_MPU_TIMER is not set
+CONFIG_OMAP_32K_TIMER=y
+CONFIG_OMAP_32K_TIMER_HZ=128
+CONFIG_OMAP_DM_TIMER=y
+# CONFIG_OMAP_LL_DEBUG_UART1 is not set
+# CONFIG_OMAP_LL_DEBUG_UART2 is not set
+CONFIG_OMAP_LL_DEBUG_UART3=y
+# CONFIG_MACH_OMAP_GENERIC is not set
+
+#
+# OMAP Core Type
+#
+CONFIG_ARCH_OMAP24XX=y
+CONFIG_ARCH_OMAP2420=y
+# CONFIG_ARCH_OMAP2430 is not set
+
+#
+# OMAP Board Type
+#
+CONFIG_MACH_OMAP2_TUSB6010=y
+# CONFIG_MACH_OMAP_H4 is not set
+# CONFIG_MACH_OMAP_APOLLON is not set
+# CONFIG_MACH_OMAP_2430SDP is not set
+CONFIG_MACH_NOKIA_N8X0=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=128
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_LEDS=y
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x10C08000
+CONFIG_ZBOOT_ROM_BSS=0x10200000
+# CONFIG_ZBOOT_ROM is not set
+CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS0,115200n8"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+CONFIG_MAC80211_DEFAULT_PS_VALUE=0
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_HAVE_MTD_OTP=y
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+CONFIG_MTD_ONENAND=y
+# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
+# CONFIG_MTD_ONENAND_GENERIC is not set
+CONFIG_MTD_ONENAND_OMAP2=y
+CONFIG_MTD_ONENAND_OTP=y
+# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
+# CONFIG_MTD_ONENAND_SIM is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_OMAP24XX=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_TUSB6010=y
+# CONFIG_USB_MUSB_HOST is not set
+CONFIG_USB_MUSB_PERIPHERAL=y
+# CONFIG_USB_MUSB_OTG is not set
+CONFIG_USB_GADGET_MUSB_HDRC=y
+# CONFIG_MUSB_PIO_ONLY is not set
+# CONFIG_USB_INVENTRA_DMA is not set
+# CONFIG_USB_TI_CPPI_DMA is not set
+CONFIG_USB_TUSB_OMAP_DMA=y
+CONFIG_USB_MUSB_DEBUG=y
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+CONFIG_NOP_USB_XCEIV=y
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
index 9bb45b932f04..600cb270f2bf 100644
--- a/arch/arm/configs/nhk8815_defconfig
+++ b/arch/arm/configs/nhk8815_defconfig
@@ -498,7 +498,7 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_DOC2001PLUS is not set
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_VERIFY_WRITE=y
-# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND_ECC_SMC=y
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
 # CONFIG_MTD_NAND_GPIO is not set
 CONFIG_MTD_NAND_IDS=y
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig
index 4c6fb7e959df..357d4021e2d0 100644
--- a/arch/arm/configs/omap3_beagle_defconfig
+++ b/arch/arm/configs/omap3_beagle_defconfig
@@ -128,6 +128,7 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
 CONFIG_CLASSIC_RCU=y
+CONFIG_FREEZER=y
 
 #
 # System Type
@@ -236,6 +237,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
 # CONFIG_OUTER_CACHE is not set
+CONFIG_COMMON_CLKDEV=y
 
 #
 # Bus support
@@ -317,7 +319,12 @@ CONFIG_BINFMT_MISC=y
 #
 # Power management options
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -713,6 +720,7 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+CONFIG_GPIO_TWL4030=y
 
 #
 # PCI GPIO expanders:
@@ -741,6 +749,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+CONFIG_TWL4030_CORE=y
 # CONFIG_UCB1400_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
@@ -769,7 +778,33 @@ CONFIG_DAB=y
 #
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_FB_OMAP=y
+# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set
+# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
+CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -782,12 +817,31 @@ CONFIG_DAB=y
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
 # CONFIG_SOUND is not set
 # CONFIG_HID_SUPPORT is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
 CONFIG_USB=y
 # CONFIG_USB_DEBUG is not set
 # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
@@ -798,7 +852,8 @@ CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_OTG is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
 CONFIG_USB_MON=y
@@ -806,6 +861,8 @@ CONFIG_USB_MON=y
 #
 # USB Host Controller Drivers
 #
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
 # CONFIG_USB_C67X00_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
@@ -818,10 +875,10 @@ CONFIG_USB_MUSB_SOC=y
 #
 # OMAP 343x high speed USB support
 #
-CONFIG_USB_MUSB_HOST=y
+# CONFIG_USB_MUSB_HOST is not set
 # CONFIG_USB_MUSB_PERIPHERAL is not set
-# CONFIG_USB_MUSB_OTG is not set
-# CONFIG_USB_GADGET_MUSB_HDRC is not set
+CONFIG_USB_MUSB_OTG=y
+CONFIG_USB_GADGET_MUSB_HDRC=y
 CONFIG_USB_MUSB_HDRC_HCD=y
 # CONFIG_MUSB_PIO_ONLY is not set
 CONFIG_USB_INVENTRA_DMA=y
@@ -887,8 +944,8 @@ CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_FSL_USB2 is not set
 # CONFIG_USB_GADGET_NET2280 is not set
 # CONFIG_USB_GADGET_PXA25X is not set
-CONFIG_USB_GADGET_M66592=y
-CONFIG_USB_M66592=y
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_M66592 is not set
 # CONFIG_USB_GADGET_PXA27X is not set
 # CONFIG_USB_GADGET_GOKU is not set
 # CONFIG_USB_GADGET_LH7A40X is not set
@@ -906,6 +963,15 @@ CONFIG_USB_ETH_RNDIS=y
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
 # CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_ISP1301_OMAP is not set
+CONFIG_TWL4030_USB=y
+# CONFIG_NOP_USB_XCEIV is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
@@ -923,6 +989,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 #
 # CONFIG_MMC_SDHCI is not set
 # CONFIG_MMC_OMAP is not set
+CONFIG_MMC_OMAP_HS=y
 # CONFIG_MEMSTICK is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
@@ -981,10 +1048,11 @@ CONFIG_RTC_INTF_DEV=y
 #
 # Voltage and Current regulators
 #
-# CONFIG_REGULATOR is not set
+CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_FIXED_VOLTAGE is not set
 # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
 # CONFIG_REGULATOR_BQ24022 is not set
+CONFIG_REGULATOR_TWL4030=y
 # CONFIG_UIO is not set
 
 #
diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig
index 8fb918d9ba65..8a4a7e2ba87b 100644
--- a/arch/arm/configs/omap_3430sdp_defconfig
+++ b/arch/arm/configs/omap_3430sdp_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc8
-# Fri Mar 13 14:17:01 2009
+# Linux kernel version: 2.6.30-omap1
+# Tue Jun 23 10:36:45 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -197,9 +197,9 @@ CONFIG_OMAP_MCBSP=y
 CONFIG_OMAP_32K_TIMER=y
 CONFIG_OMAP_32K_TIMER_HZ=128
 CONFIG_OMAP_DM_TIMER=y
-# CONFIG_OMAP_LL_DEBUG_UART1 is not set
+CONFIG_OMAP_LL_DEBUG_UART1=y
 # CONFIG_OMAP_LL_DEBUG_UART2 is not set
-CONFIG_OMAP_LL_DEBUG_UART3=y
+# CONFIG_OMAP_LL_DEBUG_UART3 is not set
 CONFIG_OMAP_SERIAL_WAKE=y
 CONFIG_ARCH_OMAP34XX=y
 CONFIG_ARCH_OMAP3430=y
@@ -207,10 +207,10 @@ CONFIG_ARCH_OMAP3430=y
 #
 # OMAP Board Type
 #
-CONFIG_MACH_OMAP3_BEAGLE=y
-CONFIG_MACH_OMAP_LDP=y
-CONFIG_MACH_OVERO=y
-CONFIG_MACH_OMAP3_PANDORA=y
+# CONFIG_MACH_OMAP3_BEAGLE is not set
+# CONFIG_MACH_OMAP_LDP is not set
+# CONFIG_MACH_OVERO is not set
+# CONFIG_MACH_OMAP3_PANDORA is not set
 CONFIG_MACH_OMAP_3430SDP=y
 
 #
@@ -950,7 +950,7 @@ CONFIG_SPI_OMAP24XX=y
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
-CONFIG_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
 CONFIG_GPIO_SYSFS=y
 
 #
@@ -1313,8 +1313,33 @@ CONFIG_DVB_ISL6421=m
 # Graphics support
 #
 # CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_FB_OMAP=y
+# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set
+# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
+CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -1331,6 +1356,16 @@ CONFIG_DISPLAY_SUPPORT=y
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
@@ -1370,7 +1405,7 @@ CONFIG_SND_OMAP_SOC=y
 CONFIG_SND_OMAP_SOC_MCBSP=y
 # CONFIG_SND_OMAP_SOC_OVERO is not set
 CONFIG_SND_OMAP_SOC_SDP3430=y
-CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y
+# CONFIG_SND_OMAP_SOC_OMAP3_PANDORA is not set
 CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_ALL_CODECS is not set
 CONFIG_SND_SOC_TWL4030=y
diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig
index 679a4a3e265e..b9c48919a68c 100644
--- a/arch/arm/configs/omap_ldp_defconfig
+++ b/arch/arm/configs/omap_ldp_defconfig
@@ -690,6 +690,7 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+CONFIG_GPIO_TWL4030=y
 
 #
 # PCI GPIO expanders:
@@ -742,6 +743,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+CONFIG_TWL4030_CORE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
@@ -767,8 +769,46 @@ CONFIG_DAB=y
 #
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
-# CONFIG_FB is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+CONFIG_FB=y
+CONFIG_FIRMWARE_EDID=y
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+CONFIG_FB_OMAP=y
+CONFIG_FB_OMAP_LCD_VGA=y
+# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set
+# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
+CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=4
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+CONFIG_LCD_PLATFORM=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_CORGI is not set
+# CONFIG_BACKLIGHT_GENERIC is not set
 
 #
 # Display device support
@@ -780,6 +820,16 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
 CONFIG_SOUND=y
 CONFIG_SND=y
 # CONFIG_SND_SEQUENCER is not set
diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig
index 213fe9c5eaae..f1739fae7ed4 100644
--- a/arch/arm/configs/omap_zoom2_defconfig
+++ b/arch/arm/configs/omap_zoom2_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc5
-# Fri Oct 10 11:49:41 2008
+# Linux kernel version: 2.6.30-omap1
+# Fri Jun 12 17:25:46 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ARCH_SUPPORTS_AOUT=y
-CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -39,44 +37,61 @@ CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 CONFIG_GROUP_SCHED=y
 CONFIG_FAIR_GROUP_SCHED=y
 # CONFIG_RT_GROUP_SCHED is not set
 CONFIG_USER_SCHED=y
 # CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -84,19 +99,13 @@ CONFIG_SLAB=y
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
-# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
-# CONFIG_HAVE_IOREMAP_PROT is not set
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
-# CONFIG_HAVE_ARCH_TRACEHOOK is not set
-# CONFIG_HAVE_DMA_ATTRS is not set
-# CONFIG_USE_GENERIC_SMP_HELPERS is not set
 CONFIG_HAVE_CLK=y
-CONFIG_PROC_PAGE_MONITOR=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -104,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -124,7 +130,7 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
+CONFIG_FREEZER=y
 
 #
 # System Type
@@ -134,10 +140,10 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
@@ -158,14 +164,17 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_ORION5X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MMP is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_DAVINCI is not set
 CONFIG_ARCH_OMAP=y
-# CONFIG_ARCH_MSM7X00A is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
 
 #
 # TI OMAP Implementations
@@ -174,6 +183,7 @@ CONFIG_ARCH_OMAP_OTG=y
 # CONFIG_ARCH_OMAP1 is not set
 # CONFIG_ARCH_OMAP2 is not set
 CONFIG_ARCH_OMAP3=y
+# CONFIG_ARCH_OMAP4 is not set
 
 #
 # OMAP Feature Selections
@@ -185,6 +195,7 @@ CONFIG_OMAP_MUX=y
 CONFIG_OMAP_MUX_DEBUG=y
 CONFIG_OMAP_MUX_WARNINGS=y
 CONFIG_OMAP_MCBSP=y
+# CONFIG_OMAP_MBOX_FWK is not set
 # CONFIG_OMAP_MPU_TIMER is not set
 CONFIG_OMAP_32K_TIMER=y
 CONFIG_OMAP_32K_TIMER_HZ=128
@@ -192,25 +203,20 @@ CONFIG_OMAP_DM_TIMER=y
 # CONFIG_OMAP_LL_DEBUG_UART1 is not set
 # CONFIG_OMAP_LL_DEBUG_UART2 is not set
 CONFIG_OMAP_LL_DEBUG_UART3=y
-CONFIG_OMAP_SERIAL_WAKE=y
 CONFIG_ARCH_OMAP34XX=y
 CONFIG_ARCH_OMAP3430=y
 
 #
 # OMAP Board Type
 #
-# CONFIG_MACH_OMAP3_BEAGLE is not set
+# CONFIG_MACH_NOKIA_RX51 is not set
 # CONFIG_MACH_OMAP_LDP is not set
-CONFIG_MACH_OMAP_ZOOM2=y
+# CONFIG_MACH_OMAP_3430SDP is not set
+# CONFIG_MACH_OMAP3EVM is not set
+# CONFIG_MACH_OMAP3_BEAGLE is not set
 # CONFIG_MACH_OVERO is not set
-
-#
-# Boot options
-#
-
-#
-# Power management
-#
+# CONFIG_MACH_OMAP3_PANDORA is not set
+CONFIG_MACH_OMAP_ZOOM2=y
 
 #
 # Processor Type
@@ -239,6 +245,10 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
 # CONFIG_OUTER_CACHE is not set
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
 
 #
 # Bus support
@@ -254,26 +264,32 @@ CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=128
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 # CONFIG_LEDS is not set
 CONFIG_ALIGNMENT_TRAP=y
 
@@ -287,9 +303,10 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.16
 # CONFIG_KEXEC is not set
 
 #
-# CPU Frequency scaling
+# CPU Power Management
 #
 # CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -309,13 +326,23 @@ CONFIG_VFPv3=y
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_MISC=y
 
 #
 # Power management options
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_VERBOSE=y
+CONFIG_CAN_PM_TRACE=y
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -378,7 +405,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -389,8 +418,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 # CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -416,14 +445,28 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=16384
 # CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_OMAP_STI is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -461,14 +504,20 @@ CONFIG_SCSI_WAIT_SCAN=m
 #
 # CONFIG_SCSI_SPI_ATTRS is not set
 # CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -501,8 +550,10 @@ CONFIG_MII=y
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
 # CONFIG_SMC911X is not set
 CONFIG_SMSC911X=y
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -519,7 +570,10 @@ CONFIG_NETDEV_10000=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 
 #
 # USB Network Adapters
@@ -561,17 +615,25 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC210X is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
 # CONFIG_INPUT_MISC is not set
 
 #
@@ -607,13 +669,15 @@ CONFIG_SERIAL_8250_RSA=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
-# CONFIG_NVRAM is not set
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
@@ -639,6 +703,7 @@ CONFIG_I2C_OMAP=y
 #
 # CONFIG_I2C_PARPORT_LIGHT is not set
 # CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
 
 #
 # Other I2C/SMBus bus drivers
@@ -650,14 +715,11 @@ CONFIG_I2C_OMAP=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_ISP1301_OMAP is not set
-# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_MADC is not set
+# CONFIG_TWL4030_POWEROFF is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
@@ -672,12 +734,12 @@ CONFIG_SPI_MASTER=y
 # SPI Master Controller Drivers
 #
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 CONFIG_SPI_OMAP24XX=y
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
@@ -686,11 +748,16 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_SYSFS is not set
 
 #
+# Memory mapped GPIO expanders:
+#
+
+#
 # I2C GPIO expanders:
 #
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+CONFIG_GPIO_TWL4030=y
 
 #
 # PCI GPIO expanders:
@@ -702,26 +769,34 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
 CONFIG_W1=y
+CONFIG_W1_CON=y
 
 #
 # 1-wire Bus Masters
 #
+# CONFIG_W1_MASTER_DS2490 is not set
 # CONFIG_W1_MASTER_DS2482 is not set
 # CONFIG_W1_MASTER_DS1WM is not set
 # CONFIG_W1_MASTER_GPIO is not set
+# CONFIG_HDQ_MASTER_OMAP is not set
 
 #
 # 1-wire Slaves
 #
 # CONFIG_W1_SLAVE_THERM is not set
 # CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
 # CONFIG_W1_SLAVE_DS2433 is not set
 # CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
 CONFIG_POWER_SUPPLY=y
 # CONFIG_POWER_SUPPLY_DEBUG is not set
 # CONFIG_PDA_POWER is not set
 # CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
 # CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 
@@ -729,11 +804,17 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 # Watchdog Device Drivers
 #
 # CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_OMAP_WATCHDOG is not set
 
 #
-# Sonics Silicon Backplane
+# USB-based Watchdog Cards
 #
+# CONFIG_USBPCWATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
 # CONFIG_SSB is not set
 
 #
@@ -741,12 +822,19 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+CONFIG_TWL4030_CORE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
 
 #
 # Multimedia devices
@@ -756,12 +844,14 @@ CONFIG_SSB_POSSIBLE=y
 # Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
 # CONFIG_VIDEO_MEDIA is not set
 
 #
 # Multimedia drivers
 #
 CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
 
 #
 # Graphics support
@@ -782,10 +872,12 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
 CONFIG_SND=y
 # CONFIG_SND_SEQUENCER is not set
 # CONFIG_SND_MIXER_OSS is not set
 # CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
@@ -798,19 +890,197 @@ CONFIG_SND_DRIVERS=y
 # CONFIG_SND_MPU401 is not set
 CONFIG_SND_ARM=y
 CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
-# CONFIG_USB_SUPPORT is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_SOC=y
+
+#
+# OMAP 343x high speed USB support
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PERIPHERAL is not set
+CONFIG_USB_MUSB_OTG=y
+CONFIG_USB_GADGET_MUSB_HDRC=y
+CONFIG_USB_MUSB_HDRC_HCD=y
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_INVENTRA_DMA=y
+# CONFIG_USB_TI_CPPI_DMA is not set
+CONFIG_USB_MUSB_DEBUG=y
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=y
+# CONFIG_USB_ZERO_HNPTEST is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_ISP1301_OMAP is not set
+CONFIG_TWL4030_USB=y
+# CONFIG_NOP_USB_XCEIV is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
 
 #
-# MMC/SD Card Drivers
+# MMC/SD/SDIO Card Drivers
 #
 CONFIG_MMC_BLOCK=y
 CONFIG_MMC_BLOCK_BOUNCE=y
@@ -818,11 +1088,13 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # CONFIG_MMC_TEST is not set
 
 #
-# MMC/SD Host Controller Drivers
+# MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
-# CONFIG_MMC_OMAP is not set
+CONFIG_MMC_OMAP_HS=y
 # CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
@@ -852,43 +1124,55 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_PCF8563 is not set
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_TWL4030 is not set
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
 
 #
 # SPI RTC drivers
 #
 # CONFIG_RTC_DRV_M41T94 is not set
 # CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
 # CONFIG_RTC_DRV_MAX6902 is not set
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
 
 #
 # Platform RTC drivers
 #
 # CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
 # CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
 # on-CPU RTC drivers
 #
 # CONFIG_DMADEVICES is not set
-
-#
-# Voltage and Current regulators
-#
-# CONFIG_REGULATOR is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
 # CONFIG_REGULATOR_FIXED_VOLTAGE is not set
 # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
 # CONFIG_REGULATOR_BQ24022 is not set
+CONFIG_REGULATOR_TWL4030=y
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# CBUS support
+#
+# CONFIG_CBUS is not set
 
 #
 # File systems
@@ -897,18 +1181,24 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 # CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
 CONFIG_PRINT_QUOTA_WARNING=y
+CONFIG_QUOTA_TREE=y
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=y
 CONFIG_QUOTACTL=y
@@ -917,6 +1207,11 @@ CONFIG_QUOTACTL=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -937,15 +1232,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -954,6 +1247,7 @@ CONFIG_TMPFS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -962,6 +1256,7 @@ CONFIG_TMPFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -975,7 +1270,6 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -1045,6 +1339,7 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
 # CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
 
 #
 # Kernel hacking
@@ -1062,6 +1357,9 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1084,21 +1382,36 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
-CONFIG_HAVE_FTRACE=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-# CONFIG_FTRACE is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
 # CONFIG_DEBUG_USER is not set
 # CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
@@ -1110,17 +1423,28 @@ CONFIG_DEBUG_LL=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
 # CONFIG_CRYPTO_TEST is not set
@@ -1152,7 +1476,7 @@ CONFIG_CRYPTO_PCBC=m
 #
 # Digest
 #
-# CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_CRC32C=y
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1189,15 +1513,21 @@ CONFIG_CRYPTO_DES=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_GENERIC_FIND_FIRST_BIT is not set
-# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=y
 # CONFIG_CRC16 is not set
 CONFIG_CRC_T10DIF=y
@@ -1205,7 +1535,9 @@ CONFIG_CRC_T10DIF=y
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 CONFIG_LIBCRC32C=y
-CONFIG_PLIST=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/pxa3xx_defconfig b/arch/arm/configs/pxa3xx_defconfig
new file mode 100644
index 000000000000..733b851e5b7e
--- /dev/null
+++ b/arch/arm/configs/pxa3xx_defconfig
@@ -0,0 +1,1332 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31-rc1
+# Mon Jul 13 22:48:49 2009
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+# CONFIG_CLASSIC_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=18
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Performance Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+
+#
+# Supported PXA3xx Processor Variants
+#
+CONFIG_CPU_PXA300=y
+CONFIG_CPU_PXA310=y
+CONFIG_CPU_PXA320=y
+CONFIG_CPU_PXA930=y
+CONFIG_CPU_PXA935=y
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_MACH_INTELMOTE2 is not set
+# CONFIG_MACH_STARGATE2 is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_MP900C is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_EXEDA is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_COLIBRI300 is not set
+# CONFIG_MACH_COLIBRI320 is not set
+CONFIG_MACH_ZYLONITE=y
+CONFIG_MACH_LITTLETON=y
+CONFIG_MACH_TAVOREVB=y
+CONFIG_MACH_SAAR=y
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_MACH_H4700 is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_HIMALAYA is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_MACH_CSB726 is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA3xx=y
+CONFIG_PXA_SSP=y
+CONFIG_PXA_HAVE_BOARD_IRQS=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSC3=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+CONFIG_IO_36=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_XSC3L2=y
+CONFIG_IWMMXT=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=64M debug"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_H1900 is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_PXA3xx=y
+CONFIG_MTD_NAND_PXA3xx_BUILTIN=y
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+CONFIG_MTD_ONENAND=y
+CONFIG_MTD_ONENAND_VERIFY_WRITE=y
+CONFIG_MTD_ONENAND_GENERIC=y
+# CONFIG_MTD_ONENAND_OTP is not set
+# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
+# CONFIG_MTD_ONENAND_SIM is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+CONFIG_KEYBOARD_PXA27x=y
+CONFIG_KEYBOARD_PXA930_ROTARY=y
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+CONFIG_MOUSE_PXA930_TRKBALL=y
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+CONFIG_TOUCHSCREEN_DA9034=y
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_HELPER_AUTO is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_PXA2XX=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+CONFIG_GPIO_MAX732X=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCF857X=y
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+CONFIG_GPIO_MAX7301=y
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_SUPPLY_DEBUG=y
+CONFIG_PDA_POWER=y
+# CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+CONFIG_BATTERY_DA9030=y
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+CONFIG_PMIC_DA903X=y
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_OVERLAY is not set
+# CONFIG_FB_PXA_SMARTPANEL is not set
+# CONFIG_FB_PXA_PARAMETERS is not set
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+CONFIG_LCD_TDO24M=y
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_BACKLIGHT_DA903X=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+CONFIG_FONT_6x11=y
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=m
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=m
+CONFIG_LEDS_GPIO_PLATFORM=y
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_PCA955X is not set
+CONFIG_LEDS_DA903X=m
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_BD2802 is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_BACKLIGHT=m
+CONFIG_LEDS_TRIGGER_GPIO=m
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_DEBUG=y
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+CONFIG_REGULATOR_DA903X=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+# CONFIG_INOTIFY is not set
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+CONFIG_JFFS2_RUBIN=y
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_KMEMCHECK is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig
index f238df66efd4..e7e31332c62a 100644
--- a/arch/arm/configs/rx51_defconfig
+++ b/arch/arm/configs/rx51_defconfig
@@ -1006,6 +1006,7 @@ CONFIG_WATCHDOG=y
 #
 # CONFIG_SOFT_WATCHDOG is not set
 CONFIG_OMAP_WATCHDOG=m
+CONFIG_TWL4030_WATCHDOG=m
 
 #
 # USB-based Watchdog Cards
diff --git a/arch/arm/configs/xcep_defconfig b/arch/arm/configs/xcep_defconfig
new file mode 100644
index 000000000000..33bb7250946b
--- /dev/null
+++ b/arch/arm/configs/xcep_defconfig
@@ -0,0 +1,1129 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31-rc6
+# Thu Aug 20 09:02:37 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=".xcep-itech"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+# CONFIG_UID16 is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+# CONFIG_SHMEM is not set
+CONFIG_AIO=y
+
+#
+# Performance Counters
+#
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+# CONFIG_SLUB is not set
+CONFIG_SLOB=y
+# CONFIG_PROFILING is not set
+CONFIG_TRACEPOINTS=y
+CONFIG_MARKERS=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_BLOCK is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_MACH_INTELMOTE2 is not set
+# CONFIG_MACH_STARGATE2 is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_MP900C is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_EXEDA is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_COLIBRI300 is not set
+# CONFIG_MACH_COLIBRI320 is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_MACH_H4700 is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_HIMALAYA is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_MACH_CSB726 is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_MACH_XCEP=y
+CONFIG_PXA25x=y
+CONFIG_PXA_SSP=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=mtd4 rootfstype=jffs2 ro console=ttyS0,115200"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=m
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_DROP_MONITOR is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+CONFIG_MTD_PXA2XX=y
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=m
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=m
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+CONFIG_SENSORS_ADM1021=m
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+CONFIG_SENSORS_MAX6650=m
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=m
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=m
+# CONFIG_RTC_DRV_PXA is not set
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=m
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="utf8"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_KPROBES_SANITY_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_ARM_UNWIND is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=m
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 9ed2377fe8e5..d0daeab2234e 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -19,31 +19,21 @@
 
 #ifdef __KERNEL__
 
+/*
+ * On ARM, ordinary assignment (str instruction) doesn't clear the local
+ * strex/ldrex monitor on some implementations. The reason we can use it for
+ * atomic_set() is the clrex or dummy strex done on every exception return.
+ */
 #define atomic_read(v)  ((v)->counter)
+#define atomic_set(v,i) (((v)->counter) = (i))
 
 #if __LINUX_ARM_ARCH__ >= 6
 
 /*
  * ARMv6 UP and SMP safe atomic ops.  We use load exclusive and
  * store exclusive to ensure that these are atomic.  We may loop
- * to ensure that the update happens.  Writing to 'v->counter'
- * without using the following operations WILL break the atomic
- * nature of these ops.
+ * to ensure that the update happens.
  */
-static inline void atomic_set(atomic_t *v, int i)
-{
-        unsigned long tmp;
-
-        __asm__ __volatile__("@ atomic_set\n"
-"1:     ldrex   %0, [%1]\n"
-"       strex   %0, %2, [%1]\n"
-"       teq     %0, #0\n"
-"       bne     1b"
-        : "=&r" (tmp)
-        : "r" (&v->counter), "r" (i)
-        : "cc");
-}
-
 static inline void atomic_add(int i, atomic_t *v)
 {
         unsigned long tmp;
@@ -163,8 +153,6 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
 #error SMP not supported on pre-ARMv6 CPUs
 #endif
 
-#define atomic_set(v,i) (((v)->counter) = (i))
-
 static inline int atomic_add_return(int i, atomic_t *v)
 {
         unsigned long flags;
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index feaa75f0013e..66c160b8547f 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -4,7 +4,7 @@
 #ifndef __ASMARM_CACHE_H
 #define __ASMARM_CACHE_H
 
-#define L1_CACHE_SHIFT          5
+#define L1_CACHE_SHIFT          CONFIG_ARM_L1_CACHE_SHIFT
 #define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
 
 /*
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 1a711ea8418b..fd03fb63a332 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -334,14 +334,14 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
 #ifndef CONFIG_CPU_CACHE_VIPT
 static inline void flush_cache_mm(struct mm_struct *mm)
 {
-        if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
+        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm)))
                 __cpuc_flush_user_all();
 }
 
 static inline void
 flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 {
-        if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask))
+        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)))
                 __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
                                         vma->vm_flags);
 }
@@ -349,7 +349,7 @@ flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long
 static inline void
 flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
 {
-        if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
+        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
                 unsigned long addr = user_addr & PAGE_MASK;
                 __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
         }
@@ -360,7 +360,7 @@ flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
                          unsigned long uaddr, void *kaddr,
                          unsigned long len, int write)
 {
-        if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
+        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
                 unsigned long addr = (unsigned long)kaddr;
                 __cpuc_coherent_kern_range(addr, addr + len);
         }
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index b3e656c6fb78..20ae96cc0020 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -63,6 +63,11 @@ static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
         return read_cpuid(CPUID_CACHETYPE);
 }
 
+static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void)
+{
+        return read_cpuid(CPUID_TCM);
+}
+
 /*
  * Intel's XScale3 core supports some v6 features (supersections, L2)
  * but advertises itself as v5 as it does not support the v6 ISA.  For
@@ -73,7 +78,10 @@ static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
 #else
 static inline int cpu_is_xsc3(void)
 {
-        if ((read_cpuid_id() & 0xffffe000) == 0x69056000)
+        unsigned int id;
+        id = read_cpuid_id() & 0xffffe000;
+        /* It covers both Intel ID and Marvell ID */
+        if ((id == 0x69056000) || (id == 0x56056000))
                 return 1;
 
         return 0;
diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h
index 83e6ba338e2c..1a8c7279a28b 100644
--- a/arch/arm/include/asm/hardware/iop3xx-adma.h
+++ b/arch/arm/include/asm/hardware/iop3xx-adma.h
@@ -187,11 +187,74 @@ union iop3xx_desc {
         void *ptr;
 };
 
+/* No support for p+q operations */
+static inline int
+iop_chan_pq_slot_count(size_t len, int src_cnt, int *slots_per_op)
+{
+        BUG();
+        return 0;
+}
+
+static inline void
+iop_desc_init_pq(struct iop_adma_desc_slot *desc, int src_cnt,
+                  unsigned long flags)
+{
+        BUG();
+}
+
+static inline void
+iop_desc_set_pq_addr(struct iop_adma_desc_slot *desc, dma_addr_t *addr)
+{
+        BUG();
+}
+
+static inline void
+iop_desc_set_pq_src_addr(struct iop_adma_desc_slot *desc, int src_idx,
+                         dma_addr_t addr, unsigned char coef)
+{
+        BUG();
+}
+
+static inline int
+iop_chan_pq_zero_sum_slot_count(size_t len, int src_cnt, int *slots_per_op)
+{
+        BUG();
+        return 0;
+}
+
+static inline void
+iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
+                          unsigned long flags)
+{
+        BUG();
+}
+
+static inline void
+iop_desc_set_pq_zero_sum_byte_count(struct iop_adma_desc_slot *desc, u32 len)
+{
+        BUG();
+}
+
+#define iop_desc_set_pq_zero_sum_src_addr iop_desc_set_pq_src_addr
+
+static inline void
+iop_desc_set_pq_zero_sum_addr(struct iop_adma_desc_slot *desc, int pq_idx,
+                              dma_addr_t *src)
+{
+        BUG();
+}
+
 static inline int iop_adma_get_max_xor(void)
 {
         return 32;
 }
 
+static inline int iop_adma_get_max_pq(void)
+{
+        BUG();
+        return 0;
+}
+
 static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan)
 {
         int id = chan->device->id;
@@ -332,6 +395,11 @@ static inline int iop_chan_zero_sum_slot_count(size_t len, int src_cnt,
         return slot_cnt;
 }
 
+static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc)
+{
+        return 0;
+}
+
 static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
                                         struct iop_adma_chan *chan)
 {
@@ -349,6 +417,14 @@ static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
         return 0;
 }
 
+
+static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc,
+                                          struct iop_adma_chan *chan)
+{
+        BUG();
+        return 0;
+}
+
 static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,
                                         struct iop_adma_chan *chan)
 {
@@ -756,13 +832,14 @@ static inline void iop_desc_set_block_fill_val(struct iop_adma_desc_slot *desc,
         hw_desc->src[0] = val;
 }
 
-static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
+static inline enum sum_check_flags
+iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
 {
         struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
         struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;
 
         iop_paranoia(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));
-        return desc_ctrl.zero_result_err;
+        return desc_ctrl.zero_result_err << SUM_CHECK_P;
 }
 
 static inline void iop_chan_append(struct iop_adma_chan *chan)
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index 385c6e8cbbd2..59b8c3892f76 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -86,6 +86,7 @@ struct iop_adma_chan {
  * @idx: pool index
  * @unmap_src_cnt: number of xor sources
  * @unmap_len: transaction bytecount
+ * @tx_list: list of descriptors that are associated with one operation
  * @async_tx: support for the async_tx api
  * @group_list: list of slots that make up a multi-descriptor transaction
  *      for example transfer lengths larger than the supported hw max
@@ -102,10 +103,12 @@ struct iop_adma_desc_slot {
         u16 idx;
         u16 unmap_src_cnt;
         size_t unmap_len;
+        struct list_head tx_list;
         struct dma_async_tx_descriptor async_tx;
         union {
                 u32 *xor_check_result;
                 u32 *crc32_result;
+                u32 *pq_check_result;
         };
 };
 
diff --git a/arch/arm/include/asm/mach/mmc.h b/arch/arm/include/asm/mach/mmc.h
deleted file mode 100644
index b490ecc79def..000000000000
--- a/arch/arm/include/asm/mach/mmc.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- *  arch/arm/include/asm/mach/mmc.h
- */
-#ifndef ASMARM_MACH_MMC_H
-#define ASMARM_MACH_MMC_H
-
-#include <linux/mmc/host.h>
-
-struct mmc_platform_data {
-        unsigned int ocr_mask;                  /* available voltages */
-        u32 (*translate_vdd)(struct device *, unsigned int);
-        unsigned int (*status)(struct device *);
-        int     gpio_wp;
-        int     gpio_cd;
-};
-
-#endif
diff --git a/arch/arm/include/asm/mman.h b/arch/arm/include/asm/mman.h
index fc26976d8e3a..8eebf89f5ab1 100644
--- a/arch/arm/include/asm/mman.h
+++ b/arch/arm/include/asm/mman.h
@@ -1,17 +1 @@
-#ifndef __ARM_MMAN_H__
-#define __ARM_MMAN_H__
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) page tables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* __ARM_MMAN_H__ */
+#include <asm-generic/mman.h>
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index bcdb9291ef0c..de6cefb329dd 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -103,14 +103,15 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
 
 #ifdef CONFIG_SMP
         /* check for possible thread migration */
-        if (!cpus_empty(next->cpu_vm_mask) && !cpu_isset(cpu, next->cpu_vm_mask))
+        if (!cpumask_empty(mm_cpumask(next)) &&
+            !cpumask_test_cpu(cpu, mm_cpumask(next)))
                 __flush_icache_all();
 #endif
-        if (!cpu_test_and_set(cpu, next->cpu_vm_mask) || prev != next) {
+        if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) {
                 check_context(next);
                 cpu_switch_mm(next->pgd, next);
                 if (cache_is_vivt())
-                        cpu_clear(cpu, prev->cpu_vm_mask);
+                        cpumask_clear_cpu(cpu, mm_cpumask(prev));
         }
 #endif
 }
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 0abf386ba3d3..226cddd2fb65 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -6,8 +6,6 @@
 
 #include <mach/hardware.h> /* for PCIBIOS_MIN_* */
 
-#define pcibios_scan_all_fns(a, b)      0
-
 #ifdef CONFIG_PCI_HOST_ITE8152
 /* ITE bridge requires setting latency timer to avoid early bus access
    termination by PIC bus mater devices
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index a06e735b262a..e0d763be1846 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -93,7 +93,6 @@ extern void platform_cpu_enable(unsigned int cpu);
 
 extern void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
-#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 
 /*
  * show local interrupt info
diff --git a/arch/arm/include/asm/tcm.h b/arch/arm/include/asm/tcm.h
new file mode 100644
index 000000000000..5929ef5d927a
--- /dev/null
+++ b/arch/arm/include/asm/tcm.h
@@ -0,0 +1,31 @@
+/*
+ *
+ * Copyright (C) 2008-2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ *
+ * Author: Rickard Andersson <rickard.andersson@stericsson.com>
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ *
+ */
+#ifndef __ASMARM_TCM_H
+#define __ASMARM_TCM_H
+
+#ifndef CONFIG_HAVE_TCM
+#error "You should not be including tcm.h unless you have a TCM!"
+#endif
+
+#include <linux/compiler.h>
+
+/* Tag variables with this */
+#define __tcmdata __section(.tcm.data)
+/* Tag constants with this */
+#define __tcmconst __section(.tcm.rodata)
+/* Tag functions inside TCM called from outside TCM with this */
+#define __tcmfunc __attribute__((long_call)) __section(.tcm.text) noinline
+/* Tag function inside TCM called from inside TCM  with this */
+#define __tcmlocalfunc __section(.tcm.text)
+
+void *tcm_alloc(size_t len);
+void tcm_free(void *addr, size_t len);
+
+#endif
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index c964f3fc3bc5..a45ab5dd8255 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -350,7 +350,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) {
+        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) {
                 if (tlb_flag(TLB_V3_FULL))
                         asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
                 if (tlb_flag(TLB_V4_U_FULL))
@@ -388,7 +388,7 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
+        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
                 if (tlb_flag(TLB_V3_PAGE))
                         asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr) : "cc");
                 if (tlb_flag(TLB_V4_U_PAGE))
diff --git a/arch/arm/include/asm/unified.h b/arch/arm/include/asm/unified.h
index 073e85b9b961..bc631161e9c6 100644
--- a/arch/arm/include/asm/unified.h
+++ b/arch/arm/include/asm/unified.h
@@ -35,7 +35,9 @@
 
 #define ARM(x...)
 #define THUMB(x...)     x
+#ifdef __ASSEMBLY__
 #define W(instr)        instr.w
+#endif
 #define BSYM(sym)       sym + 1
 
 #else   /* !CONFIG_THUMB2_KERNEL */
@@ -45,7 +47,9 @@
 
 #define ARM(x...)       x
 #define THUMB(x...)
+#ifdef __ASSEMBLY__
 #define W(instr)        instr
+#endif
 #define BSYM(sym)       sym
 
 #endif  /* CONFIG_THUMB2_KERNEL */
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 9122c9ee18fb..89f7eade20af 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -390,7 +390,7 @@
 #define __NR_preadv                     (__NR_SYSCALL_BASE+361)
 #define __NR_pwritev                    (__NR_SYSCALL_BASE+362)
 #define __NR_rt_tgsigqueueinfo          (__NR_SYSCALL_BASE+363)
-#define __NR_perf_counter_open          (__NR_SYSCALL_BASE+364)
+#define __NR_perf_event_open            (__NR_SYSCALL_BASE+364)
 
 /*
  * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 3213c9382b17..79087dd6d869 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -2,7 +2,8 @@
 # Makefile for the linux kernel.
 #
 
-AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
+CPPFLAGS_vmlinux.lds := -DTEXT_OFFSET=$(TEXT_OFFSET)
+AFLAGS_head.o        := -DTEXT_OFFSET=$(TEXT_OFFSET)
 
 ifdef CONFIG_DYNAMIC_FTRACE
 CFLAGS_REMOVE_ftrace.o = -pg
@@ -34,6 +35,7 @@ obj-$(CONFIG_OABI_COMPAT)	+= sys_oabi-compat.o
 obj-$(CONFIG_ARM_THUMBEE)       += thumbee.o
 obj-$(CONFIG_KGDB)              += kgdb.o
 obj-$(CONFIG_ARM_UNWIND)        += unwind.o
+obj-$(CONFIG_HAVE_TCM)          += tcm.o
 
 obj-$(CONFIG_CRUNCH)            += crunch.o crunch-bits.o
 AFLAGS_crunch-bits.o            := -Wa,-mcpu=ep9312
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index ecfa98954d1d..fafce1b5c69f 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -373,7 +373,7 @@
                 CALL(sys_preadv)
                 CALL(sys_pwritev)
                 CALL(sys_rt_tgsigqueueinfo)
-                CALL(sys_perf_counter_open)
+                CALL(sys_perf_event_open)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 3d727a8a23bc..0a2ba51cf35d 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -272,7 +272,15 @@ __und_svc:
         @
         @  r0 - instruction
         @
+#ifndef CONFIG_THUMB2_KERNEL
         ldr     r0, [r2, #-4]
+#else
+        ldrh    r0, [r2, #-2]                   @ Thumb instruction at LR - 2
+        and     r9, r0, #0xf800
+        cmp     r9, #0xe800                     @ 32-bit instruction if xx >= 0
+        ldrhhs  r9, [r2]                        @ bottom 16 bits
+        orrhs   r0, r9, r0, lsl #16
+#endif
         adr     r9, BSYM(1f)
         bl      call_fpe
 
@@ -678,7 +686,9 @@ ENTRY(fp_enter)
         .word   no_fp
         .previous
 
-no_fp:  mov     pc, lr
+ENTRY(no_fp)
+        mov     pc, lr
+ENDPROC(no_fp)
 
 __und_usr_unknown:
         enable_irq
@@ -734,13 +744,6 @@ ENTRY(__switch_to)
 #ifdef CONFIG_MMU
         ldr     r6, [r2, #TI_CPU_DOMAIN]
 #endif
-#if __LINUX_ARM_ARCH__ >= 6
-#ifdef CONFIG_CPU_32v6K
-        clrex
-#else
-        strex   r5, r4, [ip]                    @ Clear exclusive monitor
-#endif
-#endif
 #if defined(CONFIG_HAS_TLS_REG)
         mcr     p15, 0, r3, c13, c0, 3          @ set TLS register
 #elif !defined(CONFIG_TLS_REG_EMUL)
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index a4eaf4f920c5..ac34c0d9384b 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -76,13 +76,27 @@
 #ifndef CONFIG_THUMB2_KERNEL
         .macro  svc_exit, rpsr
         msr     spsr_cxsf, \rpsr
+#if defined(CONFIG_CPU_32v6K)
+        clrex                                   @ clear the exclusive monitor
         ldmia   sp, {r0 - pc}^                  @ load r0 - pc, cpsr
+#elif defined (CONFIG_CPU_V6)
+        ldr     r0, [sp]
+        strex   r1, r2, [sp]                    @ clear the exclusive monitor
+        ldmib   sp, {r1 - pc}^                  @ load r1 - pc, cpsr
+#else
+        ldmia   sp, {r0 - pc}^                  @ load r0 - pc, cpsr
+#endif
         .endm
 
         .macro  restore_user_regs, fast = 0, offset = 0
         ldr     r1, [sp, #\offset + S_PSR]      @ get calling cpsr
         ldr     lr, [sp, #\offset + S_PC]!      @ get pc
         msr     spsr_cxsf, r1                   @ save in spsr_svc
+#if defined(CONFIG_CPU_32v6K)
+        clrex                                   @ clear the exclusive monitor
+#elif defined (CONFIG_CPU_V6)
+        strex   r1, r2, [sp]                    @ clear the exclusive monitor
+#endif
         .if     \fast
         ldmdb   sp, {r1 - lr}^                  @ get calling r1 - lr
         .else
@@ -98,6 +112,7 @@
         .endm
 #else   /* CONFIG_THUMB2_KERNEL */
         .macro  svc_exit, rpsr
+        clrex                                   @ clear the exclusive monitor
         ldr     r0, [sp, #S_SP]                 @ top of the stack
         ldr     r1, [sp, #S_PC]                 @ return address
         tst     r0, #4                          @ orig stack 8-byte aligned?
@@ -110,6 +125,7 @@
         .endm
 
         .macro  restore_user_regs, fast = 0, offset = 0
+        clrex                                   @ clear the exclusive monitor
         mov     r2, sp
         load_user_sp_lr r2, r3, \offset + S_SP  @ calling sp, lr
         ldr     r1, [sp, #\offset + S_PSR]      @ get calling cpsr
diff --git a/arch/arm/kernel/init_task.c b/arch/arm/kernel/init_task.c
index 3f470866bb89..e7cbb50dc356 100644
--- a/arch/arm/kernel/init_task.c
+++ b/arch/arm/kernel/init_task.c
@@ -24,9 +24,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  *
  * The things we do for performance..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index f692efddd449..60c62c377fa9 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -22,6 +22,7 @@
 #include <linux/kernel.h>
 #include <linux/kprobes.h>
 #include <linux/module.h>
+#include <linux/stop_machine.h>
 #include <linux/stringify.h>
 #include <asm/traps.h>
 #include <asm/cacheflush.h>
@@ -83,10 +84,24 @@ void __kprobes arch_arm_kprobe(struct kprobe *p)
         flush_insns(p->addr, 1);
 }
 
+/*
+ * The actual disarming is done here on each CPU and synchronized using
+ * stop_machine. This synchronization is necessary on SMP to avoid removing
+ * a probe between the moment the 'Undefined Instruction' exception is raised
+ * and the moment the exception handler reads the faulting instruction from
+ * memory.
+ */
+int __kprobes __arch_disarm_kprobe(void *p)
+{
+        struct kprobe *kp = p;
+        *kp->addr = kp->opcode;
+        flush_insns(kp->addr, 1);
+        return 0;
+}
+
 void __kprobes arch_disarm_kprobe(struct kprobe *p)
 {
-        *p->addr = p->opcode;
-        flush_insns(p->addr, 1);
+        stop_machine(__arch_disarm_kprobe, p, &cpu_online_map);
 }
 
 void __kprobes arch_remove_kprobe(struct kprobe *p)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d4d4f77c91b2..c6c57b640b6b 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -45,6 +45,7 @@
 
 #include "compat.h"
 #include "atags.h"
+#include "tcm.h"
 
 #ifndef MEM_SIZE
 #define MEM_SIZE        (16*1024*1024)
@@ -749,6 +750,7 @@ void __init setup_arch(char **cmdline_p)
 #endif
 
         cpu_init();
+        tcm_init();
 
         /*
          * Set up various architecture-specific pointers
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index de885fd256c5..e0d32770bb3d 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -189,7 +189,7 @@ int __cpuexit __cpu_disable(void)
         read_lock(&tasklist_lock);
         for_each_process(p) {
                 if (p->mm)
-                        cpu_clear(cpu, p->mm->cpu_vm_mask);
+                        cpumask_clear_cpu(cpu, mm_cpumask(p->mm));
         }
         read_unlock(&tasklist_lock);
 
@@ -257,7 +257,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         atomic_inc(&mm->mm_users);
         atomic_inc(&mm->mm_count);
         current->active_mm = mm;
-        cpu_set(cpu, mm->cpu_vm_mask);
+        cpumask_set_cpu(cpu, mm_cpumask(mm));
         cpu_switch_mm(mm->pgd, mm);
         enter_lazy_tlb(mm, current);
         local_flush_tlb_all();
@@ -643,7 +643,7 @@ void flush_tlb_all(void)
 void flush_tlb_mm(struct mm_struct *mm)
 {
         if (tlb_ops_need_broadcast())
-                on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask);
+                on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mm_cpumask(mm));
         else
                 local_flush_tlb_mm(mm);
 }
@@ -654,7 +654,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
                 struct tlb_args ta;
                 ta.ta_vma = vma;
                 ta.ta_start = uaddr;
-                on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask);
+                on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mm_cpumask(vma->vm_mm));
         } else
                 local_flush_tlb_page(vma, uaddr);
 }
@@ -677,7 +677,7 @@ void flush_tlb_range(struct vm_area_struct *vma,
                 ta.ta_vma = vma;
                 ta.ta_start = start;
                 ta.ta_end = end;
-                on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask);
+                on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mm_cpumask(vma->vm_mm));
         } else
                 local_flush_tlb_range(vma, start, end);
 }
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index b3ec641b5cf8..78ecaac65206 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -25,7 +25,6 @@
 #include <linux/mman.h>
 #include <linux/fs.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/ipc.h>
 #include <linux/uaccess.h>
 
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
new file mode 100644
index 000000000000..e50303868f1b
--- /dev/null
+++ b/arch/arm/kernel/tcm.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2008-2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ * TCM memory handling for ARM systems
+ *
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ * Author: Rickard Andersson <rickard.andersson@stericsson.com>
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/stddef.h>
+#include <linux/ioport.h>
+#include <linux/genalloc.h>
+#include <linux/string.h> /* memcpy */
+#include <asm/page.h> /* PAGE_SHIFT */
+#include <asm/cputype.h>
+#include <asm/mach/map.h>
+#include <mach/memory.h>
+#include "tcm.h"
+
+/* Scream and warn about misuse */
+#if !defined(ITCM_OFFSET) || !defined(ITCM_END) || \
+    !defined(DTCM_OFFSET) || !defined(DTCM_END)
+#error "TCM support selected but offsets not defined!"
+#endif
+
+static struct gen_pool *tcm_pool;
+
+/* TCM section definitions from the linker */
+extern char __itcm_start, __sitcm_text, __eitcm_text;
+extern char __dtcm_start, __sdtcm_data, __edtcm_data;
+
+/*
+ * TCM memory resources
+ */
+static struct resource dtcm_res = {
+        .name = "DTCM RAM",
+        .start = DTCM_OFFSET,
+        .end = DTCM_END,
+        .flags = IORESOURCE_MEM
+};
+
+static struct resource itcm_res = {
+        .name = "ITCM RAM",
+        .start = ITCM_OFFSET,
+        .end = ITCM_END,
+        .flags = IORESOURCE_MEM
+};
+
+static struct map_desc dtcm_iomap[] __initdata = {
+        {
+                .virtual        = DTCM_OFFSET,
+                .pfn            = __phys_to_pfn(DTCM_OFFSET),
+                .length         = (DTCM_END - DTCM_OFFSET + 1),
+                .type           = MT_UNCACHED
+        }
+};
+
+static struct map_desc itcm_iomap[] __initdata = {
+        {
+                .virtual        = ITCM_OFFSET,
+                .pfn            = __phys_to_pfn(ITCM_OFFSET),
+                .length         = (ITCM_END - ITCM_OFFSET + 1),
+                .type           = MT_UNCACHED
+        }
+};
+
+/*
+ * Allocate a chunk of TCM memory
+ */
+void *tcm_alloc(size_t len)
+{
+        unsigned long vaddr;
+
+        if (!tcm_pool)
+                return NULL;
+
+        vaddr = gen_pool_alloc(tcm_pool, len);
+        if (!vaddr)
+                return NULL;
+
+        return (void *) vaddr;
+}
+EXPORT_SYMBOL(tcm_alloc);
+
+/*
+ * Free a chunk of TCM memory
+ */
+void tcm_free(void *addr, size_t len)
+{
+        gen_pool_free(tcm_pool, (unsigned long) addr, len);
+}
+EXPORT_SYMBOL(tcm_free);
+
+
+static void __init setup_tcm_bank(u8 type, u32 offset, u32 expected_size)
+{
+        const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128,
+                                    256, 512, 1024, -1, -1, -1, -1 };
+        u32 tcm_region;
+        int tcm_size;
+
+        /* Read the special TCM region register c9, 0 */
+        if (!type)
+                asm("mrc        p15, 0, %0, c9, c1, 0"
+                    : "=r" (tcm_region));
+        else
+                asm("mrc        p15, 0, %0, c9, c1, 1"
+                    : "=r" (tcm_region));
+
+        tcm_size = tcm_sizes[(tcm_region >> 2) & 0x0f];
+        if (tcm_size < 0) {
+                pr_err("CPU: %sTCM of unknown size!\n",
+                        type ? "I" : "D");
+        } else {
+                pr_info("CPU: found %sTCM %dk @ %08x, %senabled\n",
+                        type ? "I" : "D",
+                        tcm_size,
+                        (tcm_region & 0xfffff000U),
+                        (tcm_region & 1) ? "" : "not ");
+        }
+
+        if (tcm_size != expected_size) {
+                pr_crit("CPU: %sTCM was detected %dk but expected %dk!\n",
+                       type ? "I" : "D",
+                       tcm_size,
+                       expected_size);
+                /* Adjust to the expected size? what can we do... */
+        }
+
+        /* Force move the TCM bank to where we want it, enable */
+        tcm_region = offset | (tcm_region & 0x00000ffeU) | 1;
+
+        if (!type)
+                asm("mcr        p15, 0, %0, c9, c1, 0"
+                    : /* No output operands */
+                    : "r" (tcm_region));
+        else
+                asm("mcr        p15, 0, %0, c9, c1, 1"
+                    : /* No output operands */
+                    : "r" (tcm_region));
+
+        pr_debug("CPU: moved %sTCM %dk to %08x, enabled\n",
+                 type ? "I" : "D",
+                 tcm_size,
+                 (tcm_region & 0xfffff000U));
+}
+
+/*
+ * This initializes the TCM memory
+ */
+void __init tcm_init(void)
+{
+        u32 tcm_status = read_cpuid_tcmstatus();
+        char *start;
+        char *end;
+        char *ram;
+
+        /* Setup DTCM if present */
+        if (tcm_status & (1 << 16)) {
+                setup_tcm_bank(0, DTCM_OFFSET,
+                               (DTCM_END - DTCM_OFFSET + 1) >> 10);
+                request_resource(&iomem_resource, &dtcm_res);
+                iotable_init(dtcm_iomap, 1);
+                /* Copy data from RAM to DTCM */
+                start = &__sdtcm_data;
+                end   = &__edtcm_data;
+                ram   = &__dtcm_start;
+                memcpy(start, ram, (end-start));
+                pr_debug("CPU DTCM: copied data from %p - %p\n", start, end);
+        }
+
+        /* Setup ITCM if present */
+        if (tcm_status & 1) {
+                setup_tcm_bank(1, ITCM_OFFSET,
+                               (ITCM_END - ITCM_OFFSET + 1) >> 10);
+                request_resource(&iomem_resource, &itcm_res);
+                iotable_init(itcm_iomap, 1);
+                /* Copy code from RAM to ITCM */
+                start = &__sitcm_text;
+                end   = &__eitcm_text;
+                ram   = &__itcm_start;
+                memcpy(start, ram, (end-start));
+                pr_debug("CPU ITCM: copied code from %p - %p\n", start, end);
+        }
+}
+
+/*
+ * This creates the TCM memory pool and has to be done later,
+ * during the core_initicalls, since the allocator is not yet
+ * up and running when the first initialization runs.
+ */
+static int __init setup_tcm_pool(void)
+{
+        u32 tcm_status = read_cpuid_tcmstatus();
+        u32 dtcm_pool_start = (u32) &__edtcm_data;
+        u32 itcm_pool_start = (u32) &__eitcm_text;
+        int ret;
+
+        /*
+         * Set up malloc pool, 2^2 = 4 bytes granularity since
+         * the TCM is sometimes just 4 KiB. NB: pages and cache
+         * line alignments does not matter in TCM!
+         */
+        tcm_pool = gen_pool_create(2, -1);
+
+        pr_debug("Setting up TCM memory pool\n");
+
+        /* Add the rest of DTCM to the TCM pool */
+        if (tcm_status & (1 << 16)) {
+                if (dtcm_pool_start < DTCM_END) {
+                        ret = gen_pool_add(tcm_pool, dtcm_pool_start,
+                                           DTCM_END - dtcm_pool_start + 1, -1);
+                        if (ret) {
+                                pr_err("CPU DTCM: could not add DTCM " \
+                                       "remainder to pool!\n");
+                                return ret;
+                        }
+                        pr_debug("CPU DTCM: Added %08x bytes @ %08x to " \
+                                 "the TCM memory pool\n",
+                                 DTCM_END - dtcm_pool_start + 1,
+                                 dtcm_pool_start);
+                }
+        }
+
+        /* Add the rest of ITCM to the TCM pool */
+        if (tcm_status & 1) {
+                if (itcm_pool_start < ITCM_END) {
+                        ret = gen_pool_add(tcm_pool, itcm_pool_start,
+                                           ITCM_END - itcm_pool_start + 1, -1);
+                        if (ret) {
+                                pr_err("CPU ITCM: could not add ITCM " \
+                                       "remainder to pool!\n");
+                                return ret;
+                        }
+                        pr_debug("CPU ITCM: Added %08x bytes @ %08x to " \
+                                 "the TCM memory pool\n",
+                                 ITCM_END - itcm_pool_start + 1,
+                                 itcm_pool_start);
+                }
+        }
+        return 0;
+}
+
+core_initcall(setup_tcm_pool);
diff --git a/arch/arm/kernel/tcm.h b/arch/arm/kernel/tcm.h
new file mode 100644
index 000000000000..8015ad434a40
--- /dev/null
+++ b/arch/arm/kernel/tcm.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2008-2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ * TCM memory handling for ARM systems
+ *
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ * Author: Rickard Andersson <rickard.andersson@stericsson.com>
+ */
+
+#ifdef CONFIG_HAVE_TCM
+void __init tcm_init(void);
+#else
+/* No TCM support, just blank inlines to be optimized out */
+inline void tcm_init(void)
+{
+}
+#endif
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 5cc4812c9763..aecf87dfbaec 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -199,6 +199,63 @@ SECTIONS
         }
         _edata_loc = __data_loc + SIZEOF(.data);
 
+#ifdef CONFIG_HAVE_TCM
+        /*
+         * We align everything to a page boundary so we can
+         * free it after init has commenced and TCM contents have
+         * been copied to its destination.
+         */
+        .tcm_start : {
+                . = ALIGN(PAGE_SIZE);
+                __tcm_start = .;
+                __itcm_start = .;
+        }
+
+        /*
+         * Link these to the ITCM RAM
+         * Put VMA to the TCM address and LMA to the common RAM
+         * and we'll upload the contents from RAM to TCM and free
+         * the used RAM after that.
+         */
+        .text_itcm ITCM_OFFSET : AT(__itcm_start)
+        {
+                __sitcm_text = .;
+                *(.tcm.text)
+                *(.tcm.rodata)
+                . = ALIGN(4);
+                __eitcm_text = .;
+        }
+
+        /*
+         * Reset the dot pointer, this is needed to create the
+         * relative __dtcm_start below (to be used as extern in code).
+         */
+        . = ADDR(.tcm_start) + SIZEOF(.tcm_start) + SIZEOF(.text_itcm);
+
+        .dtcm_start : {
+                __dtcm_start = .;
+        }
+
+        /* TODO: add remainder of ITCM as well, that can be used for data! */
+        .data_dtcm DTCM_OFFSET : AT(__dtcm_start)
+        {
+                . = ALIGN(4);
+                __sdtcm_data = .;
+                *(.tcm.data)
+                . = ALIGN(4);
+                __edtcm_data = .;
+        }
+
+        /* Reset the dot pointer or the linker gets confused */
+        . = ADDR(.dtcm_start) + SIZEOF(.data_dtcm);
+
+        /* End marker for freeing TCM copy in linked object */
+        .tcm_end : AT(ADDR(.dtcm_start) + SIZEOF(.data_dtcm)){
+                . = ALIGN(PAGE_SIZE);
+                __tcm_end = .;
+        }
+#endif
+
         .bss : {
                 __bss_start = .;        /* BSS                          */
                 *(.bss)
diff --git a/arch/arm/lib/copy_page.S b/arch/arm/lib/copy_page.S
index 6ae04db1ca4f..6ee2f6706f86 100644
--- a/arch/arm/lib/copy_page.S
+++ b/arch/arm/lib/copy_page.S
@@ -12,8 +12,9 @@
 #include <linux/linkage.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/cache.h>
 
-#define COPY_COUNT (PAGE_SZ/64 PLD( -1 ))
+#define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 ))
 
                 .text
                 .align  5
@@ -26,17 +27,16 @@
 ENTRY(copy_page)
                 stmfd   sp!, {r4, lr}                   @       2
         PLD(    pld     [r1, #0]                )
-        PLD(    pld     [r1, #32]               )
+        PLD(    pld     [r1, #L1_CACHE_BYTES]           )
                 mov     r2, #COPY_COUNT                 @       1
                 ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-1:      PLD(    pld     [r1, #64]               )
-        PLD(    pld     [r1, #96]               )
-2:              stmia   r0!, {r3, r4, ip, lr}           @       4
-                ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-                stmia   r0!, {r3, r4, ip, lr}           @       4
-                ldmia   r1!, {r3, r4, ip, lr}           @       4+1
+1:      PLD(    pld     [r1, #2 * L1_CACHE_BYTES])
+        PLD(    pld     [r1, #3 * L1_CACHE_BYTES])
+2:
+        .rept   (2 * L1_CACHE_BYTES / 16 - 1)
                 stmia   r0!, {r3, r4, ip, lr}           @       4
                 ldmia   r1!, {r3, r4, ip, lr}           @       4
+        .endr
                 subs    r2, r2, #1                      @       1
                 stmia   r0!, {r3, r4, ip, lr}           @       4
                 ldmgtia r1!, {r3, r4, ip, lr}           @       4
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index a24d824c428b..e35d54d43e70 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -289,6 +289,13 @@ config MACH_NEOCORE926
         help
           Select this if you are using the Adeneo Neocore 926 board.
 
+config MACH_AT91SAM9G20EK_2MMC
+        bool "Atmel AT91SAM9G20-EK Evaluation Kit modified for 2 MMC Slots"
+        depends on ARCH_AT91SAM9G20
+        help
+          Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
+          Rev A or B modified for 2 MMC Slots.
+
 endif
 
 # ----------------------------------------------------------
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a6ed015d82ed..ada440aab0c5 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_MACH_AT91SAM9RLEK)	+= board-sam9rlek.o
 
 # AT91SAM9G20 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
+obj-$(CONFIG_MACH_AT91SAM9G20EK_2MMC) += board-sam9g20ek-2slot-mmc.o
 obj-$(CONFIG_MACH_CPU9G20)      += board-cpu9krea.o
 
 # AT91SAM9G45 board-specific support
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 412aa49ad2fb..d1f775e86353 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -771,9 +771,9 @@ void __init at91_add_device_pwm(u32 mask) {}
  *  AC97
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
+#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
 static u64 ac97_dmamask = DMA_BIT_MASK(32);
-static struct atmel_ac97_data ac97_data;
+static struct ac97c_platform_data ac97_data;
 
 static struct resource ac97_resources[] = {
         [0] = {
@@ -789,7 +789,7 @@ static struct resource ac97_resources[] = {
 };
 
 static struct platform_device at91cap9_ac97_device = {
-        .name           = "ac97c",
+        .name           = "atmel_ac97c",
         .id             = 1,
         .dev            = {
                                 .dma_mask               = &ac97_dmamask,
@@ -800,7 +800,7 @@ static struct platform_device at91cap9_ac97_device = {
         .num_resources  = ARRAY_SIZE(ac97_resources),
 };
 
-void __init at91_add_device_ac97(struct atmel_ac97_data *data)
+void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 {
         if (!data)
                 return;
@@ -818,7 +818,7 @@ void __init at91_add_device_ac97(struct atmel_ac97_data *data)
         platform_device_register(&at91cap9_ac97_device);
 }
 #else
-void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
+void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 #endif
 
 
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index ee4ea0e720cf..07eb7b07e442 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -278,6 +278,102 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 #endif
 
+/* --------------------------------------------------------------------
+ *  MMC / SD Slot for Atmel MCI Driver
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
+static struct mci_platform_data mmc_data;
+
+static struct resource mmc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_MCI,
+                .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_MCI,
+                .end    = AT91SAM9260_ID_MCI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_mmc_device = {
+        .name           = "atmel_mci",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &mmc_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &mmc_data,
+        },
+        .resource       = mmc_resources,
+        .num_resources  = ARRAY_SIZE(mmc_resources),
+};
+
+void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
+{
+        unsigned int i;
+        unsigned int slot_count = 0;
+
+        if (!data)
+                return;
+
+        for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
+                if (data->slot[i].bus_width) {
+                        /* input/irq */
+                        if (data->slot[i].detect_pin) {
+                                at91_set_gpio_input(data->slot[i].detect_pin, 1);
+                                at91_set_deglitch(data->slot[i].detect_pin, 1);
+                        }
+                        if (data->slot[i].wp_pin)
+                                at91_set_gpio_input(data->slot[i].wp_pin, 1);
+
+                        switch (i) {
+                        case 0:
+                                /* CMD */
+                                at91_set_A_periph(AT91_PIN_PA7, 1);
+                                /* DAT0, maybe DAT1..DAT3 */
+                                at91_set_A_periph(AT91_PIN_PA6, 1);
+                                if (data->slot[i].bus_width == 4) {
+                                        at91_set_A_periph(AT91_PIN_PA9, 1);
+                                        at91_set_A_periph(AT91_PIN_PA10, 1);
+                                        at91_set_A_periph(AT91_PIN_PA11, 1);
+                                }
+                                slot_count++;
+                                break;
+                        case 1:
+                                /* CMD */
+                                at91_set_B_periph(AT91_PIN_PA1, 1);
+                                /* DAT0, maybe DAT1..DAT3 */
+                                at91_set_B_periph(AT91_PIN_PA0, 1);
+                                if (data->slot[i].bus_width == 4) {
+                                        at91_set_B_periph(AT91_PIN_PA5, 1);
+                                        at91_set_B_periph(AT91_PIN_PA4, 1);
+                                        at91_set_B_periph(AT91_PIN_PA3, 1);
+                                }
+                                slot_count++;
+                                break;
+                        default:
+                                printk(KERN_ERR
+                                        "AT91: SD/MMC slot %d not available\n", i);
+                                break;
+                        }
+                }
+        }
+
+        if (slot_count) {
+                /* CLK */
+                at91_set_A_periph(AT91_PIN_PA8, 0);
+
+                mmc_data = *data;
+                platform_device_register(&at91sam9260_mmc_device);
+        }
+}
+#else
+void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
+#endif
+
 
 /* --------------------------------------------------------------------
  *  NAND / SmartMedia
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 55719a974276..fb5c23af1017 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -757,6 +757,42 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
 #endif
 
+/* --------------------------------------------------------------------
+ *  CAN Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_CAN_AT91) || defined(CONFIG_CAN_AT91_MODULE)
+static struct resource can_resources[] = {
+        [0] = {
+                .start  = AT91SAM9263_BASE_CAN,
+                .end    = AT91SAM9263_BASE_CAN + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9263_ID_CAN,
+                .end    = AT91SAM9263_ID_CAN,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9263_can_device = {
+        .name           = "at91_can",
+        .id             = -1,
+        .resource       = can_resources,
+        .num_resources  = ARRAY_SIZE(can_resources),
+};
+
+void __init at91_add_device_can(struct at91_can_data *data)
+{
+        at91_set_A_periph(AT91_PIN_PA13, 0);    /* CANTX */
+        at91_set_A_periph(AT91_PIN_PA14, 0);    /* CANRX */
+        at91sam9263_can_device.dev.platform_data = data;
+
+        platform_device_register(&at91sam9263_can_device);
+}
+#else
+void __init at91_add_device_can(struct at91_can_data *data) {}
+#endif
 
 /* --------------------------------------------------------------------
  *  LCD Controller
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index d746e8621bc2..d581cff80c4c 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -24,11 +24,59 @@
 #include <mach/at91sam9g45.h>
 #include <mach/at91sam9g45_matrix.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at_hdmac.h>
 
 #include "generic.h"
 
 
 /* --------------------------------------------------------------------
+ *  HDMAC - AHB DMA Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
+static u64 hdmac_dmamask = DMA_BIT_MASK(32);
+
+static struct at_dma_platform_data atdma_pdata = {
+        .nr_channels    = 8,
+};
+
+static struct resource hdmac_resources[] = {
+        [0] = {
+                .start  = AT91_BASE_SYS + AT91_DMA,
+                .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start  = AT91SAM9G45_ID_DMA,
+                .end    = AT91SAM9G45_ID_DMA,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at_hdmac_device = {
+        .name           = "at_hdmac",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &hdmac_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &atdma_pdata,
+        },
+        .resource       = hdmac_resources,
+        .num_resources  = ARRAY_SIZE(hdmac_resources),
+};
+
+void __init at91_add_device_hdmac(void)
+{
+        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
+        dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
+        platform_device_register(&at_hdmac_device);
+}
+#else
+void __init at91_add_device_hdmac(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
  *  USB Host (OHCI)
  * -------------------------------------------------------------------- */
 
@@ -550,6 +598,61 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 
 
 /* --------------------------------------------------------------------
+ *  AC97
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
+static u64 ac97_dmamask = DMA_BIT_MASK(32);
+static struct ac97c_platform_data ac97_data;
+
+static struct resource ac97_resources[] = {
+        [0] = {
+                .start  = AT91SAM9G45_BASE_AC97C,
+                .end    = AT91SAM9G45_BASE_AC97C + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9G45_ID_AC97C,
+                .end    = AT91SAM9G45_ID_AC97C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9g45_ac97_device = {
+        .name           = "atmel_ac97c",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &ac97_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &ac97_data,
+        },
+        .resource       = ac97_resources,
+        .num_resources  = ARRAY_SIZE(ac97_resources),
+};
+
+void __init at91_add_device_ac97(struct ac97c_platform_data *data)
+{
+        if (!data)
+                return;
+
+        at91_set_A_periph(AT91_PIN_PD8, 0);     /* AC97FS */
+        at91_set_A_periph(AT91_PIN_PD9, 0);     /* AC97CK */
+        at91_set_A_periph(AT91_PIN_PD7, 0);     /* AC97TX */
+        at91_set_A_periph(AT91_PIN_PD6, 0);     /* AC97RX */
+
+        /* reset */
+        if (data->reset_pin)
+                at91_set_gpio_output(data->reset_pin, 0);
+
+        ac97_data = *data;
+        platform_device_register(&at91sam9g45_ac97_device);
+}
+#else
+void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
  *  LCD Controller
  * -------------------------------------------------------------------- */
 
@@ -1220,6 +1323,7 @@ void __init at91_add_device_serial(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
+        at91_add_device_hdmac();
         at91_add_device_rtc();
         at91_add_device_rtt();
         at91_add_device_watchdog();
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 728186515cdf..d345f5453dbe 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -21,11 +21,57 @@
 #include <mach/at91sam9rl.h>
 #include <mach/at91sam9rl_matrix.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at_hdmac.h>
 
 #include "generic.h"
 
 
 /* --------------------------------------------------------------------
+ *  HDMAC - AHB DMA Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
+static u64 hdmac_dmamask = DMA_BIT_MASK(32);
+
+static struct at_dma_platform_data atdma_pdata = {
+        .nr_channels    = 2,
+};
+
+static struct resource hdmac_resources[] = {
+        [0] = {
+                .start  = AT91_BASE_SYS + AT91_DMA,
+                .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start  = AT91SAM9RL_ID_DMA,
+                .end    = AT91SAM9RL_ID_DMA,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at_hdmac_device = {
+        .name           = "at_hdmac",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &hdmac_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &atdma_pdata,
+        },
+        .resource       = hdmac_resources,
+        .num_resources  = ARRAY_SIZE(hdmac_resources),
+};
+
+void __init at91_add_device_hdmac(void)
+{
+        dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
+        platform_device_register(&at_hdmac_device);
+}
+#else
+void __init at91_add_device_hdmac(void) {}
+#endif
+
+/* --------------------------------------------------------------------
  *  USB HS Device (Gadget)
  * -------------------------------------------------------------------- */
 
@@ -398,6 +444,61 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 
 
 /* --------------------------------------------------------------------
+ *  AC97
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
+static u64 ac97_dmamask = DMA_BIT_MASK(32);
+static struct ac97c_platform_data ac97_data;
+
+static struct resource ac97_resources[] = {
+        [0] = {
+                .start  = AT91SAM9RL_BASE_AC97C,
+                .end    = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9RL_ID_AC97C,
+                .end    = AT91SAM9RL_ID_AC97C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9rl_ac97_device = {
+        .name           = "atmel_ac97c",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &ac97_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &ac97_data,
+        },
+        .resource       = ac97_resources,
+        .num_resources  = ARRAY_SIZE(ac97_resources),
+};
+
+void __init at91_add_device_ac97(struct ac97c_platform_data *data)
+{
+        if (!data)
+                return;
+
+        at91_set_A_periph(AT91_PIN_PD1, 0);     /* AC97FS */
+        at91_set_A_periph(AT91_PIN_PD2, 0);     /* AC97CK */
+        at91_set_A_periph(AT91_PIN_PD3, 0);     /* AC97TX */
+        at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
+
+        /* reset */
+        if (data->reset_pin)
+                at91_set_gpio_output(data->reset_pin, 0);
+
+        ac97_data = *data;
+        platform_device_register(&at91sam9rl_ac97_device);
+}
+#else
+void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
  *  LCD Controller
  * -------------------------------------------------------------------- */
 
@@ -1103,6 +1204,7 @@ void __init at91_add_device_serial(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
+        at91_add_device_hdmac();
         at91_add_device_rtc();
         at91_add_device_rtt();
         at91_add_device_watchdog();
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 61e52b66bc72..50667bed7cc9 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -53,7 +53,7 @@ static void __init afeb9260_map_io(void)
         /* Initialize processor: 18.432 MHz crystal */
         at91sam9260_initialize(18432000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index d3ba29c5d8c8..02138af631e7 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -50,7 +50,7 @@ static void __init cam60_map_io(void)
         /* Initialize processor: 10 MHz crystal */
         at91sam9260_initialize(10000000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* set serial console to ttyS0 (ie, DBGU) */
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 83a1a0fef47b..d6940870e403 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -364,7 +364,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
 /*
  * AC97
  */
-static struct atmel_ac97_data cap9adk_ac97_data = {
+static struct ac97c_platform_data cap9adk_ac97_data = {
 //      .reset_pin      = ... not connected
 };
 
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 9ba7ba2cc3b1..7c1e382330fb 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -56,7 +56,7 @@ static void __init neocore926_map_io(void)
         /* Initialize processor: 20 MHz crystal */
         at91sam9263_initialize(20000000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
@@ -340,7 +340,7 @@ static void __init neocore926_add_device_buttons(void) {}
 /*
  * AC97
  */
-static struct atmel_ac97_data neocore926_ac97_data = {
+static struct ac97c_platform_data neocore926_ac97_data = {
         .reset_pin      = AT91_PIN_PA13,
 };
 
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 4cff9a7e61d2..664938e8f661 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -53,7 +53,7 @@ static void __init ek_map_io(void)
         /* Initialize processor: 12.000 MHz crystal */
         at91sam9260_initialize(12000000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 93a0f8b100eb..ba9d501b5c50 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -54,7 +54,7 @@ static void __init ek_map_io(void)
         /* Initialize processor: 18.432 MHz crystal */
         at91sam9260_initialize(18432000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index f9b19993a7a9..c4c8865d52d7 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -61,7 +61,7 @@ static void __init ek_map_io(void)
         /* Setup the LEDs */
         at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* set serial console to ttyS0 (ie, DBGU) */
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 1bf7bd4cbe13..2d867fb0630f 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -57,7 +57,7 @@ static void __init ek_map_io(void)
         /* Initialize processor: 16.367 MHz crystal */
         at91sam9263_initialize(16367660);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
@@ -400,6 +400,23 @@ static struct gpio_led ek_pwm_led[] = {
         }
 };
 
+/*
+ * CAN
+ */
+static void sam9263ek_transceiver_switch(int on)
+{
+        if (on) {
+                at91_set_gpio_output(AT91_PIN_PA18, 1); /* CANRXEN */
+                at91_set_gpio_output(AT91_PIN_PA19, 0); /* CANRS */
+        } else {
+                at91_set_gpio_output(AT91_PIN_PA18, 0); /* CANRXEN */
+                at91_set_gpio_output(AT91_PIN_PA19, 1); /* CANRS */
+        }
+}
+
+static struct at91_can_data ek_can_data = {
+        .transceiver_switch = sam9263ek_transceiver_switch,
+};
 
 static void __init ek_board_init(void)
 {
@@ -431,6 +448,8 @@ static void __init ek_board_init(void)
         /* LEDs */
         at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
+        /* CAN */
+        at91_add_device_can(&ek_can_data);
 }
 
 MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
diff --git a/arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c b/arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c
new file mode 100644
index 000000000000..a28e53faf71d
--- /dev/null
+++ b/arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c
@@ -0,0 +1,277 @@
+/*
+ *  Copyright (C) 2005 SAN People
+ *  Copyright (C) 2008 Atmel
+ *  Copyright (C) 2009 Rob Emanuele
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/at73c213.h>
+#include <linux/clk.h>
+
+#include <mach/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+
+static void __init ek_map_io(void)
+{
+        /* Initialize processor: 18.432 MHz crystal */
+        at91sam9260_initialize(18432000);
+
+        /* DGBU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+        at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
+                           | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
+                           | ATMEL_UART_RI);
+
+        /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
+}
+
+static void __init ek_init_irq(void)
+{
+        at91sam9260_init_interrupts(NULL);
+}
+
+
+/*
+ * USB Host port
+ */
+static struct at91_usbh_data __initdata ek_usbh_data = {
+        .ports          = 2,
+};
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata ek_udc_data = {
+        .vbus_pin       = AT91_PIN_PC5,
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
+};
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info ek_spi_devices[] = {
+#if !defined(CONFIG_MMC_ATMELMCI)
+        {       /* DataFlash chip */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 1,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+        {       /* DataFlash card */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#endif
+#endif
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata ek_macb_data = {
+        .phy_irq_pin    = AT91_PIN_PC12,
+        .is_rmii        = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata ek_nand_partition[] = {
+        {
+                .name   = "Bootstrap",
+                .offset = 0,
+                .size   = 4 * SZ_1M,
+        },
+        {
+                .name   = "Partition 1",
+                .offset = MTDPART_OFS_NXTBLK,
+                .size   = 60 * SZ_1M,
+        },
+        {
+                .name   = "Partition 2",
+                .offset = MTDPART_OFS_NXTBLK,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(ek_nand_partition);
+        return ek_nand_partition;
+}
+
+/* det_pin is not connected */
+static struct atmel_nand_data __initdata ek_nand_data = {
+        .ale            = 21,
+        .cle            = 22,
+        .rdy_pin        = AT91_PIN_PC13,
+        .enable_pin     = AT91_PIN_PC14,
+        .partition_info = nand_partitions,
+#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
+        .bus_width_16   = 1,
+#else
+        .bus_width_16   = 0,
+#endif
+};
+
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 2,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 2,
+
+        .ncs_read_pulse         = 4,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 4,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 7,
+        .write_cycle            = 7,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 3,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
+
+/*
+ * MCI (SD/MMC)
+ * det_pin and wp_pin are not connected
+ */
+#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
+static struct mci_platform_data __initdata ek_mmc_data = {
+        .slot[0] = {
+                .bus_width      = 4,
+                .detect_pin     = -ENODEV,
+                .wp_pin         = -ENODEV,
+        },
+        .slot[1] = {
+                .bus_width      = 4,
+                .detect_pin     = -ENODEV,
+                .wp_pin         = -ENODEV,
+        },
+
+};
+#else
+static struct amci_platform_data __initdata ek_mmc_data = {
+};
+#endif
+
+/*
+ * LEDs
+ */
+static struct gpio_led ek_leds[] = {
+        {       /* "bottom" led, green, userled1 to be defined */
+                .name                   = "ds5",
+                .gpio                   = AT91_PIN_PB12,
+                .active_low             = 1,
+                .default_trigger        = "none",
+        },
+        {       /* "power" led, yellow */
+                .name                   = "ds1",
+                .gpio                   = AT91_PIN_PB13,
+                .default_trigger        = "heartbeat",
+        }
+};
+
+static struct i2c_board_info __initdata ek_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("24c512", 0x50),
+        },
+};
+
+
+static void __init ek_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* USB Host */
+        at91_add_device_usbh(&ek_usbh_data);
+        /* USB Device */
+        at91_add_device_udc(&ek_udc_data);
+        /* SPI */
+        at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+        /* NAND */
+        ek_add_device_nand();
+        /* Ethernet */
+        at91_add_device_eth(&ek_macb_data);
+        /* MMC */
+        at91_add_device_mci(0, &ek_mmc_data);
+        /* I2C */
+        at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
+        /* LEDs */
+        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+        /* PCK0 provides MCLK to the WM8731 */
+        at91_set_B_periph(AT91_PIN_PC1, 0);
+        /* SSC (for WM8731) */
+        at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
+}
+
+MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod")
+        /* Maintainer: Rob Emanuele */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91sam926x_timer,
+        .map_io         = ek_map_io,
+        .init_irq       = ek_init_irq,
+        .init_machine   = ek_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index ca470d504ea0..29cf83177484 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -50,7 +50,7 @@ static void __init ek_map_io(void)
         /* Initialize processor: 18.432 MHz crystal */
         at91sam9260_initialize(18432000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index b8558eae5229..64c3843f323d 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -311,6 +311,14 @@ static void __init ek_add_device_buttons(void) {}
 
 
 /*
+ * AC97
+ * reset_pin is not connected: NRST
+ */
+static struct ac97c_platform_data ek_ac97_data = {
+};
+
+
+/*
  * LEDs ... these could all be PWM-driven, for variable brightness
  */
 static struct gpio_led ek_leds[] = {
@@ -372,6 +380,8 @@ static void __init ek_board_init(void)
         at91_add_device_lcdc(&ek_lcdc_data);
         /* Push Buttons */
         ek_add_device_buttons();
+        /* AC97 */
+        at91_add_device_ac97(&ek_ac97_data);
         /* LEDs */
         at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 9d07679efce7..bd28e989e54e 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -43,7 +43,7 @@ static void __init ek_map_io(void)
         /* Initialize processor: 12.000 MHz crystal */
         at91sam9rl_initialize(12000000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
@@ -211,6 +211,14 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
 
 
 /*
+ * AC97
+ * reset_pin is not connected: NRST
+ */
+static struct ac97c_platform_data ek_ac97_data = {
+};
+
+
+/*
  * LEDs
  */
 static struct gpio_led ek_leds[] = {
@@ -299,6 +307,8 @@ static void __init ek_board_init(void)
         at91_add_device_mmc(0, &ek_mmc_data);
         /* LCD Controller */
         at91_add_device_lcdc(&ek_lcdc_data);
+        /* AC97 */
+        at91_add_device_ac97(&ek_ac97_data);
         /* Touch Screen Controller */
         at91_add_device_tsadcc();
         /* LEDs */
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index d13304c0bc45..905d6ef76807 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -53,7 +53,7 @@ static void __init ek_map_io(void)
         /* Initialize processor: 12.000 MHz crystal */
         at91sam9260_initialize(12000000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* set serial console to ttyS0 (ie, DBGU) */
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index d96405b7d578..b6a3480383e5 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -52,7 +52,7 @@ static void __init ek_map_io(void)
         /* Initialize processor: 12.00 MHz crystal */
         at91sam9263_initialize(12000000);
 
-        /* DGBU on ttyS0. (Rx & Tx only) */
+        /* DBGU on ttyS0. (Rx & Tx only) */
         at91_register_uart(0, 0, 0);
 
         /* set serial console to ttyS0 (ie, DBGU) */
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index 13f27a4b882d..2f4fcedc02ba 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -37,6 +37,7 @@
 #include <linux/leds.h>
 #include <linux/spi/spi.h>
 #include <linux/usb/atmel_usba_udc.h>
+#include <linux/atmel-mci.h>
 #include <sound/atmel-ac97c.h>
 
  /* USB Device */
@@ -64,6 +65,7 @@ struct at91_cf_data {
 extern void __init at91_add_device_cf(struct at91_cf_data *data);
 
  /* MMC / SD */
+  /* at91_mci platform config */
 struct at91_mmc_data {
         u8              det_pin;        /* card detect IRQ */
         unsigned        slot_b:1;       /* uses Slot B */
@@ -73,6 +75,9 @@ struct at91_mmc_data {
 };
 extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
 
+  /* atmel-mci platform config */
+extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data);
+
  /* Ethernet (EMAC & MACB) */
 struct at91_eth_data {
         u32             phy_mask;
@@ -183,6 +188,12 @@ extern void __init at91_add_device_isi(void);
  /* Touchscreen Controller */
 extern void __init at91_add_device_tsadcc(void);
 
+/* CAN */
+struct at91_can_data {
+        void (*transceiver_switch)(int on);
+};
+extern void __init at91_add_device_can(struct at91_can_data *data);
+
  /* LEDs */
 extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
 extern void __init at91_gpio_leds(struct gpio_led *leds, int nr);
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index be747f5c6cd8..40866c643f13 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -6,6 +6,9 @@ config AINTC
 config CP_INTC
         bool
 
+config ARCH_DAVINCI_DMx
+        bool
+
 menu "TI DaVinci Implementations"
 
 comment "DaVinci Core Type"
@@ -13,20 +16,41 @@ comment "DaVinci Core Type"
 config ARCH_DAVINCI_DM644x
         bool "DaVinci 644x based system"
         select AINTC
+        select ARCH_DAVINCI_DMx
 
 config ARCH_DAVINCI_DM355
         bool "DaVinci 355 based system"
         select AINTC
+        select ARCH_DAVINCI_DMx
 
 config ARCH_DAVINCI_DM646x
         bool "DaVinci 646x based system"
         select AINTC
+        select ARCH_DAVINCI_DMx
+
+config ARCH_DAVINCI_DA830
+        bool "DA830/OMAP-L137 based system"
+        select CP_INTC
+        select ARCH_DAVINCI_DA8XX
+
+config ARCH_DAVINCI_DA850
+        bool "DA850/OMAP-L138 based system"
+        select CP_INTC
+        select ARCH_DAVINCI_DA8XX
+
+config ARCH_DAVINCI_DA8XX
+        bool
+
+config ARCH_DAVINCI_DM365
+        bool "DaVinci 365 based system"
+        select AINTC
+        select ARCH_DAVINCI_DMx
 
 comment "DaVinci Board Type"
 
 config MACH_DAVINCI_EVM
         bool "TI DM644x EVM"
-        default y
+        default ARCH_DAVINCI_DM644x
         depends on ARCH_DAVINCI_DM644x
         help
           Configure this option to specify the whether the board used
@@ -41,6 +65,7 @@ config MACH_SFFSDR
 
 config MACH_DAVINCI_DM355_EVM
         bool "TI DM355 EVM"
+        default ARCH_DAVINCI_DM355
         depends on ARCH_DAVINCI_DM355
         help
           Configure this option to specify the whether the board used
@@ -55,11 +80,33 @@ config MACH_DM355_LEOPARD
 
 config MACH_DAVINCI_DM6467_EVM
         bool "TI DM6467 EVM"
+        default ARCH_DAVINCI_DM646x
         depends on ARCH_DAVINCI_DM646x
         help
           Configure this option to specify the whether the board used
           for development is a DM6467 EVM
 
+config MACH_DAVINCI_DM365_EVM
+        bool "TI DM365 EVM"
+        default ARCH_DAVINCI_DM365
+        depends on ARCH_DAVINCI_DM365
+        help
+          Configure this option to specify whether the board used
+          for development is a DM365 EVM
+
+config MACH_DAVINCI_DA830_EVM
+        bool "TI DA830/OMAP-L137 Reference Platform"
+        default ARCH_DAVINCI_DA830
+        depends on ARCH_DAVINCI_DA830
+        help
+          Say Y here to select the TI DA830/OMAP-L137 Evaluation Module.
+
+config MACH_DAVINCI_DA850_EVM
+        bool "TI DA850/OMAP-L138 Reference Platform"
+        default ARCH_DAVINCI_DA850
+        depends on ARCH_DAVINCI_DA850
+        help
+          Say Y here to select the TI DA850/OMAP-L138 Evaluation Module.
 
 config DAVINCI_MUX
         bool "DAVINCI multiplexing support"
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 059ab78084ba..2e11e847313b 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,14 +5,17 @@
 
 # Common objects
 obj-y                   := time.o clock.o serial.o io.o psc.o \
-                           gpio.o devices.o dma.o usb.o common.o sram.o
+                           gpio.o dma.o usb.o common.o sram.o
 
 obj-$(CONFIG_DAVINCI_MUX)               += mux.o
 
 # Chip specific
-obj-$(CONFIG_ARCH_DAVINCI_DM644x)       += dm644x.o
-obj-$(CONFIG_ARCH_DAVINCI_DM355)        += dm355.o
-obj-$(CONFIG_ARCH_DAVINCI_DM646x)       += dm646x.o
+obj-$(CONFIG_ARCH_DAVINCI_DM644x)       += dm644x.o devices.o
+obj-$(CONFIG_ARCH_DAVINCI_DM355)        += dm355.o devices.o
+obj-$(CONFIG_ARCH_DAVINCI_DM646x)       += dm646x.o devices.o
+obj-$(CONFIG_ARCH_DAVINCI_DM365)        += dm365.o devices.o
+obj-$(CONFIG_ARCH_DAVINCI_DA830)        += da830.o devices-da8xx.o
+obj-$(CONFIG_ARCH_DAVINCI_DA850)        += da850.o devices-da8xx.o
 
 obj-$(CONFIG_AINTC)                     += irq.o
 obj-$(CONFIG_CP_INTC)                   += cp_intc.o
@@ -23,3 +26,6 @@ obj-$(CONFIG_MACH_SFFSDR)		+= board-sffsdr.o
 obj-$(CONFIG_MACH_DAVINCI_DM355_EVM)    += board-dm355-evm.o
 obj-$(CONFIG_MACH_DM355_LEOPARD)        += board-dm355-leopard.o
 obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM)   += board-dm646x-evm.o
+obj-$(CONFIG_MACH_DAVINCI_DM365_EVM)    += board-dm365-evm.o
+obj-$(CONFIG_MACH_DAVINCI_DA830_EVM)    += board-da830-evm.o
+obj-$(CONFIG_MACH_DAVINCI_DA850_EVM)    += board-da850-evm.o
diff --git a/arch/arm/mach-davinci/Makefile.boot b/arch/arm/mach-davinci/Makefile.boot
index e1dd366f836b..db97ef2c6477 100644
--- a/arch/arm/mach-davinci/Makefile.boot
+++ b/arch/arm/mach-davinci/Makefile.boot
@@ -1,3 +1,13 @@
+ifeq ($(CONFIG_ARCH_DAVINCI_DA8XX),y)
+ifeq ($(CONFIG_ARCH_DAVINCI_DMx),y)
+$(error Cannot enable DaVinci and DA8XX platforms concurrently)
+else
+   zreladdr-y   := 0xc0008000
+params_phys-y   := 0xc0000100
+initrd_phys-y   := 0xc0800000
+endif
+else
    zreladdr-y   := 0x80008000
 params_phys-y   := 0x80000100
 initrd_phys-y   := 0x80800000
+endif
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
new file mode 100644
index 000000000000..bfbb63936f33
--- /dev/null
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -0,0 +1,157 @@
+/*
+ * TI DA830/OMAP L137 EVM board
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
+ *
+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/i2c.h>
+#include <linux/i2c/at24.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/common.h>
+#include <mach/irqs.h>
+#include <mach/cp_intc.h>
+#include <mach/da8xx.h>
+#include <mach/asp.h>
+
+#define DA830_EVM_PHY_MASK              0x0
+#define DA830_EVM_MDIO_FREQUENCY        2200000 /* PHY bus frequency */
+
+static struct at24_platform_data da830_evm_i2c_eeprom_info = {
+        .byte_len       = SZ_256K / 8,
+        .page_size      = 64,
+        .flags          = AT24_FLAG_ADDR16,
+        .setup          = davinci_get_mac_addr,
+        .context        = (void *)0x7f00,
+};
+
+static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("24c256", 0x50),
+                .platform_data  = &da830_evm_i2c_eeprom_info,
+        },
+        {
+                I2C_BOARD_INFO("tlv320aic3x", 0x18),
+        }
+};
+
+static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
+        .bus_freq       = 100,  /* kHz */
+        .bus_delay      = 0,    /* usec */
+};
+
+static struct davinci_uart_config da830_evm_uart_config __initdata = {
+        .enabled_uarts = 0x7,
+};
+
+static u8 da830_iis_serializer_direction[] = {
+        RX_MODE,        INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+        INACTIVE_MODE,  TX_MODE,        INACTIVE_MODE,  INACTIVE_MODE,
+        INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+};
+
+static struct snd_platform_data da830_evm_snd_data = {
+        .tx_dma_offset  = 0x2000,
+        .rx_dma_offset  = 0x2000,
+        .op_mode        = DAVINCI_MCASP_IIS_MODE,
+        .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
+        .tdm_slots      = 2,
+        .serial_dir     = da830_iis_serializer_direction,
+        .eventq_no      = EVENTQ_0,
+        .version        = MCASP_VERSION_2,
+        .txnumevt       = 1,
+        .rxnumevt       = 1,
+};
+
+static __init void da830_evm_init(void)
+{
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
+        int ret;
+
+        ret = da8xx_register_edma();
+        if (ret)
+                pr_warning("da830_evm_init: edma registration failed: %d\n",
+                                ret);
+
+        ret = da8xx_pinmux_setup(da830_i2c0_pins);
+        if (ret)
+                pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
+        if (ret)
+                pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
+                                ret);
+
+        soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
+        soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
+        soc_info->emac_pdata->rmii_en = 1;
+
+        ret = da8xx_pinmux_setup(da830_cpgmac_pins);
+        if (ret)
+                pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_emac();
+        if (ret)
+                pr_warning("da830_evm_init: emac registration failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_watchdog();
+        if (ret)
+                pr_warning("da830_evm_init: watchdog registration failed: %d\n",
+                                ret);
+
+        davinci_serial_init(&da830_evm_uart_config);
+        i2c_register_board_info(1, da830_evm_i2c_devices,
+                        ARRAY_SIZE(da830_evm_i2c_devices));
+
+        ret = da8xx_pinmux_setup(da830_mcasp1_pins);
+        if (ret)
+                pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
+                                ret);
+
+        da8xx_init_mcasp(1, &da830_evm_snd_data);
+}
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static int __init da830_evm_console_init(void)
+{
+        return add_preferred_console("ttyS", 2, "115200");
+}
+console_initcall(da830_evm_console_init);
+#endif
+
+static __init void da830_evm_irq_init(void)
+{
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+        cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
+                        soc_info->intc_irq_prios);
+}
+
+static void __init da830_evm_map_io(void)
+{
+        da830_init();
+}
+
+MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP L137 EVM")
+        .phys_io        = IO_PHYS,
+        .io_pg_offst    = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
+        .boot_params    = (DA8XX_DDR_BASE + 0x100),
+        .map_io         = da830_evm_map_io,
+        .init_irq       = da830_evm_irq_init,
+        .timer          = &davinci_timer,
+        .init_machine   = da830_evm_init,
+MACHINE_END
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
new file mode 100644
index 000000000000..c759d72494e0
--- /dev/null
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -0,0 +1,415 @@
+/*
+ * TI DA850/OMAP-L138 EVM board
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Derived from: arch/arm/mach-davinci/board-da830-evm.c
+ * Original Copyrights follow:
+ *
+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/i2c.h>
+#include <linux/i2c/at24.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/common.h>
+#include <mach/irqs.h>
+#include <mach/cp_intc.h>
+#include <mach/da8xx.h>
+#include <mach/nand.h>
+
+#define DA850_EVM_PHY_MASK              0x1
+#define DA850_EVM_MDIO_FREQUENCY        2200000 /* PHY bus frequency */
+
+#define DA850_LCD_BL_PIN                GPIO_TO_PIN(2, 15)
+#define DA850_LCD_PWR_PIN               GPIO_TO_PIN(8, 10)
+
+#define DA850_MMCSD_CD_PIN              GPIO_TO_PIN(4, 0)
+#define DA850_MMCSD_WP_PIN              GPIO_TO_PIN(4, 1)
+
+static struct mtd_partition da850_evm_norflash_partition[] = {
+        {
+                .name           = "NOR filesystem",
+                .offset         = 0,
+                .size           = MTDPART_SIZ_FULL,
+                .mask_flags     = 0,
+        },
+};
+
+static struct physmap_flash_data da850_evm_norflash_data = {
+        .width          = 2,
+        .parts          = da850_evm_norflash_partition,
+        .nr_parts       = ARRAY_SIZE(da850_evm_norflash_partition),
+};
+
+static struct resource da850_evm_norflash_resource[] = {
+        {
+                .start  = DA8XX_AEMIF_CS2_BASE,
+                .end    = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device da850_evm_norflash_device = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &da850_evm_norflash_data,
+        },
+        .num_resources  = 1,
+        .resource       = da850_evm_norflash_resource,
+};
+
+/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
+ * (128K blocks). It may be used instead of the (default) SPI flash
+ * to boot, using TI's tools to install the secondary boot loader
+ * (UBL) and U-Boot.
+ */
+struct mtd_partition da850_evm_nandflash_partition[] = {
+        {
+                .name           = "u-boot env",
+                .offset         = 0,
+                .size           = SZ_128K,
+                .mask_flags     = MTD_WRITEABLE,
+         },
+        {
+                .name           = "UBL",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_128K,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "u-boot",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 4 * SZ_128K,
+                .mask_flags     = MTD_WRITEABLE,
+        },
+        {
+                .name           = "kernel",
+                .offset         = 0x200000,
+                .size           = SZ_2M,
+                .mask_flags     = 0,
+        },
+        {
+                .name           = "filesystem",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+                .mask_flags     = 0,
+        },
+};
+
+static struct davinci_nand_pdata da850_evm_nandflash_data = {
+        .parts          = da850_evm_nandflash_partition,
+        .nr_parts       = ARRAY_SIZE(da850_evm_nandflash_partition),
+        .ecc_mode       = NAND_ECC_HW,
+        .options        = NAND_USE_FLASH_BBT,
+};
+
+static struct resource da850_evm_nandflash_resource[] = {
+        {
+                .start  = DA8XX_AEMIF_CS3_BASE,
+                .end    = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = DA8XX_AEMIF_CTL_BASE,
+                .end    = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device da850_evm_nandflash_device = {
+        .name           = "davinci_nand",
+        .id             = 1,
+        .dev            = {
+                .platform_data  = &da850_evm_nandflash_data,
+        },
+        .num_resources  = ARRAY_SIZE(da850_evm_nandflash_resource),
+        .resource       = da850_evm_nandflash_resource,
+};
+
+static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
+        {
+                I2C_BOARD_INFO("tlv320aic3x", 0x18),
+        }
+};
+
+static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
+        .bus_freq       = 100,  /* kHz */
+        .bus_delay      = 0,    /* usec */
+};
+
+static struct davinci_uart_config da850_evm_uart_config __initdata = {
+        .enabled_uarts = 0x7,
+};
+
+static struct platform_device *da850_evm_devices[] __initdata = {
+        &da850_evm_nandflash_device,
+        &da850_evm_norflash_device,
+};
+
+/* davinci da850 evm audio machine driver */
+static u8 da850_iis_serializer_direction[] = {
+        INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+        INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+        INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  TX_MODE,
+        RX_MODE,        INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
+};
+
+static struct snd_platform_data da850_evm_snd_data = {
+        .tx_dma_offset  = 0x2000,
+        .rx_dma_offset  = 0x2000,
+        .op_mode        = DAVINCI_MCASP_IIS_MODE,
+        .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
+        .tdm_slots      = 2,
+        .serial_dir     = da850_iis_serializer_direction,
+        .eventq_no      = EVENTQ_1,
+        .version        = MCASP_VERSION_2,
+        .txnumevt       = 1,
+        .rxnumevt       = 1,
+};
+
+static int da850_evm_mmc_get_ro(int index)
+{
+        return gpio_get_value(DA850_MMCSD_WP_PIN);
+}
+
+static int da850_evm_mmc_get_cd(int index)
+{
+        return !gpio_get_value(DA850_MMCSD_CD_PIN);
+}
+
+static struct davinci_mmc_config da850_mmc_config = {
+        .get_ro         = da850_evm_mmc_get_ro,
+        .get_cd         = da850_evm_mmc_get_cd,
+        .wires          = 4,
+        .version        = MMC_CTLR_VERSION_2,
+};
+
+static int da850_lcd_hw_init(void)
+{
+        int status;
+
+        status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
+        if (status < 0)
+                return status;
+
+        status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
+        if (status < 0) {
+                gpio_free(DA850_LCD_BL_PIN);
+                return status;
+        }
+
+        gpio_direction_output(DA850_LCD_BL_PIN, 0);
+        gpio_direction_output(DA850_LCD_PWR_PIN, 0);
+
+        /* disable lcd backlight */
+        gpio_set_value(DA850_LCD_BL_PIN, 0);
+
+        /* disable lcd power */
+        gpio_set_value(DA850_LCD_PWR_PIN, 0);
+
+        /* enable lcd power */
+        gpio_set_value(DA850_LCD_PWR_PIN, 1);
+
+        /* enable lcd backlight */
+        gpio_set_value(DA850_LCD_BL_PIN, 1);
+
+        return 0;
+}
+
+#define DA8XX_AEMIF_CE2CFG_OFFSET       0x10
+#define DA8XX_AEMIF_ASIZE_16BIT         0x1
+
+static void __init da850_evm_init_nor(void)
+{
+        void __iomem *aemif_addr;
+
+        aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
+
+        /* Configure data bus width of CS2 to 16 bit */
+        writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
+                DA8XX_AEMIF_ASIZE_16BIT,
+                aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
+
+        iounmap(aemif_addr);
+}
+
+#if defined(CONFIG_MTD_PHYSMAP) || \
+    defined(CONFIG_MTD_PHYSMAP_MODULE)
+#define HAS_NOR 1
+#else
+#define HAS_NOR 0
+#endif
+
+#if defined(CONFIG_MMC_DAVINCI) || \
+    defined(CONFIG_MMC_DAVINCI_MODULE)
+#define HAS_MMC 1
+#else
+#define HAS_MMC 0
+#endif
+
+static __init void da850_evm_init(void)
+{
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
+        int ret;
+
+        ret = da8xx_pinmux_setup(da850_nand_pins);
+        if (ret)
+                pr_warning("da850_evm_init: nand mux setup failed: %d\n",
+                                ret);
+
+        ret = da8xx_pinmux_setup(da850_nor_pins);
+        if (ret)
+                pr_warning("da850_evm_init: nor mux setup failed: %d\n",
+                                ret);
+
+        da850_evm_init_nor();
+
+        platform_add_devices(da850_evm_devices,
+                                ARRAY_SIZE(da850_evm_devices));
+
+        ret = da8xx_register_edma();
+        if (ret)
+                pr_warning("da850_evm_init: edma registration failed: %d\n",
+                                ret);
+
+        ret = da8xx_pinmux_setup(da850_i2c0_pins);
+        if (ret)
+                pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
+        if (ret)
+                pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
+                                ret);
+
+        soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
+        soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
+        soc_info->emac_pdata->rmii_en = 0;
+
+        ret = da8xx_pinmux_setup(da850_cpgmac_pins);
+        if (ret)
+                pr_warning("da850_evm_init: cpgmac mux setup failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_emac();
+        if (ret)
+                pr_warning("da850_evm_init: emac registration failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_watchdog();
+        if (ret)
+                pr_warning("da830_evm_init: watchdog registration failed: %d\n",
+                                ret);
+
+        if (HAS_MMC) {
+                if (HAS_NOR)
+                        pr_warning("WARNING: both NOR Flash and MMC/SD are "
+                                "enabled, but they share AEMIF pins.\n"
+                                "\tDisable one of them.\n");
+
+                ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
+                if (ret)
+                        pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
+                                        " %d\n", ret);
+
+                ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
+                if (ret)
+                        pr_warning("da850_evm_init: can not open GPIO %d\n",
+                                        DA850_MMCSD_CD_PIN);
+                gpio_direction_input(DA850_MMCSD_CD_PIN);
+
+                ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
+                if (ret)
+                        pr_warning("da850_evm_init: can not open GPIO %d\n",
+                                        DA850_MMCSD_WP_PIN);
+                gpio_direction_input(DA850_MMCSD_WP_PIN);
+
+                ret = da8xx_register_mmcsd0(&da850_mmc_config);
+                if (ret)
+                        pr_warning("da850_evm_init: mmcsd0 registration failed:"
+                                        " %d\n", ret);
+        }
+
+        davinci_serial_init(&da850_evm_uart_config);
+
+        i2c_register_board_info(1, da850_evm_i2c_devices,
+                        ARRAY_SIZE(da850_evm_i2c_devices));
+
+        /*
+         * shut down uart 0 and 1; they are not used on the board and
+         * accessing them causes endless "too much work in irq53" messages
+         * with arago fs
+         */
+        __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
+        __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
+
+        ret = da8xx_pinmux_setup(da850_mcasp_pins);
+        if (ret)
+                pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
+                                ret);
+
+        da8xx_init_mcasp(0, &da850_evm_snd_data);
+
+        ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
+        if (ret)
+                pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
+                                ret);
+
+        ret = da850_lcd_hw_init();
+        if (ret)
+                pr_warning("da850_evm_init: lcd initialization failed: %d\n",
+                                ret);
+
+        ret = da8xx_register_lcdc();
+        if (ret)
+                pr_warning("da850_evm_init: lcdc registration failed: %d\n",
+                                ret);
+}
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static int __init da850_evm_console_init(void)
+{
+        return add_preferred_console("ttyS", 2, "115200");
+}
+console_initcall(da850_evm_console_init);
+#endif
+
+static __init void da850_evm_irq_init(void)
+{
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+        cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
+                        soc_info->intc_irq_prios);
+}
+
+static void __init da850_evm_map_io(void)
+{
+        da850_init();
+}
+
+MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
+        .phys_io        = IO_PHYS,
+        .io_pg_offst    = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
+        .boot_params    = (DA8XX_DDR_BASE + 0x100),
+        .map_io         = da850_evm_map_io,
+        .init_irq       = da850_evm_irq_init,
+        .timer          = &davinci_timer,
+        .init_machine   = da850_evm_init,
+MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index d6ab64ccd496..77e806798822 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -20,6 +20,8 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/clk.h>
+#include <linux/videodev2.h>
+#include <media/tvp514x.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/eeprom.h>
 
@@ -117,6 +119,8 @@ static struct davinci_i2c_platform_data i2c_pdata = {
         .bus_delay      = 0     /* usec */,
 };
 
+static struct snd_platform_data dm355_evm_snd_data;
+
 static int dm355evm_mmc_gpios = -EINVAL;
 
 static void dm355evm_mmcsd_gpios(unsigned gpio)
@@ -134,11 +138,11 @@ static void dm355evm_mmcsd_gpios(unsigned gpio)
 }
 
 static struct i2c_board_info dm355evm_i2c_info[] = {
-        { I2C_BOARD_INFO("dm355evm_msp", 0x25),
+        {       I2C_BOARD_INFO("dm355evm_msp", 0x25),
                 .platform_data = dm355evm_mmcsd_gpios,
-                /* plus irq */ },
-        /* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
-        /* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
+        },
+        /* { plus irq  }, */
+        { I2C_BOARD_INFO("tlv320aic33", 0x1b), },
 };
 
 static void __init evm_init_i2c(void)
@@ -177,6 +181,72 @@ static struct platform_device dm355evm_dm9000 = {
         .num_resources  = ARRAY_SIZE(dm355evm_dm9000_rsrc),
 };
 
+static struct tvp514x_platform_data tvp5146_pdata = {
+        .clk_polarity = 0,
+        .hs_polarity = 1,
+        .vs_polarity = 1
+};
+
+#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
+/* Inputs available at the TVP5146 */
+static struct v4l2_input tvp5146_inputs[] = {
+        {
+                .index = 0,
+                .name = "Composite",
+                .type = V4L2_INPUT_TYPE_CAMERA,
+                .std = TVP514X_STD_ALL,
+        },
+        {
+                .index = 1,
+                .name = "S-Video",
+                .type = V4L2_INPUT_TYPE_CAMERA,
+                .std = TVP514X_STD_ALL,
+        },
+};
+
+/*
+ * this is the route info for connecting each input to decoder
+ * ouput that goes to vpfe. There is a one to one correspondence
+ * with tvp5146_inputs
+ */
+static struct vpfe_route tvp5146_routes[] = {
+        {
+                .input = INPUT_CVBS_VI2B,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+        },
+        {
+                .input = INPUT_SVIDEO_VI2C_VI1C,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+        },
+};
+
+static struct vpfe_subdev_info vpfe_sub_devs[] = {
+        {
+                .name = "tvp5146",
+                .grp_id = 0,
+                .num_inputs = ARRAY_SIZE(tvp5146_inputs),
+                .inputs = tvp5146_inputs,
+                .routes = tvp5146_routes,
+                .can_route = 1,
+                .ccdc_if_params = {
+                        .if_type = VPFE_BT656,
+                        .hdpol = VPFE_PINPOL_POSITIVE,
+                        .vdpol = VPFE_PINPOL_POSITIVE,
+                },
+                .board_info = {
+                        I2C_BOARD_INFO("tvp5146", 0x5d),
+                        .platform_data = &tvp5146_pdata,
+                },
+        }
+};
+
+static struct vpfe_config vpfe_cfg = {
+        .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
+        .sub_devs = vpfe_sub_devs,
+        .card_name = "DM355 EVM",
+        .ccdc = "DM355 CCDC",
+};
+
 static struct platform_device *davinci_evm_devices[] __initdata = {
         &dm355evm_dm9000,
         &davinci_nand_device,
@@ -188,6 +258,8 @@ static struct davinci_uart_config uart_config __initdata = {
 
 static void __init dm355_evm_map_io(void)
 {
+        /* setup input configuration for VPFE input devices */
+        dm355_set_vpfe_config(&vpfe_cfg);
         dm355_init();
 }
 
@@ -279,6 +351,9 @@ static __init void dm355_evm_init(void)
 
         dm355_init_spi0(BIT(0), dm355_evm_spi_info,
                         ARRAY_SIZE(dm355_evm_spi_info));
+
+        /* DM335 EVM uses ASP1; line-out is a stereo mini-jack */
+        dm355_init_asp1(ASP1_TX_EVT_EN | ASP1_RX_EVT_EN, &dm355_evm_snd_data);
 }
 
 static __init void dm355_evm_irq_init(void)
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
new file mode 100644
index 000000000000..a1d5e7dac741
--- /dev/null
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -0,0 +1,492 @@
+/*
+ * TI DaVinci DM365 EVM board support
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/dma-mapping.h>
+#include <linux/i2c.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/i2c/at24.h>
+#include <linux/leds.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/mux.h>
+#include <mach/hardware.h>
+#include <mach/dm365.h>
+#include <mach/psc.h>
+#include <mach/common.h>
+#include <mach/i2c.h>
+#include <mach/serial.h>
+#include <mach/common.h>
+#include <mach/mmc.h>
+#include <mach/nand.h>
+
+
+static inline int have_imager(void)
+{
+        /* REVISIT when it's supported, trigger via Kconfig */
+        return 0;
+}
+
+static inline int have_tvp7002(void)
+{
+        /* REVISIT when it's supported, trigger via Kconfig */
+        return 0;
+}
+
+
+#define DM365_ASYNC_EMIF_CONTROL_BASE   0x01d10000
+#define DM365_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
+#define DM365_ASYNC_EMIF_DATA_CE1_BASE  0x04000000
+
+#define DM365_EVM_PHY_MASK              (0x2)
+#define DM365_EVM_MDIO_FREQUENCY        (2200000) /* PHY bus frequency */
+
+/*
+ * A MAX-II CPLD is used for various board control functions.
+ */
+#define CPLD_OFFSET(a13a8,a2a1)         (((a13a8) << 10) + ((a2a1) << 3))
+
+#define CPLD_VERSION    CPLD_OFFSET(0,0)        /* r/o */
+#define CPLD_TEST       CPLD_OFFSET(0,1)
+#define CPLD_LEDS       CPLD_OFFSET(0,2)
+#define CPLD_MUX        CPLD_OFFSET(0,3)
+#define CPLD_SWITCH     CPLD_OFFSET(1,0)        /* r/o */
+#define CPLD_POWER      CPLD_OFFSET(1,1)
+#define CPLD_VIDEO      CPLD_OFFSET(1,2)
+#define CPLD_CARDSTAT   CPLD_OFFSET(1,3)        /* r/o */
+
+#define CPLD_DILC_OUT   CPLD_OFFSET(2,0)
+#define CPLD_DILC_IN    CPLD_OFFSET(2,1)        /* r/o */
+
+#define CPLD_IMG_DIR0   CPLD_OFFSET(2,2)
+#define CPLD_IMG_MUX0   CPLD_OFFSET(2,3)
+#define CPLD_IMG_MUX1   CPLD_OFFSET(3,0)
+#define CPLD_IMG_DIR1   CPLD_OFFSET(3,1)
+#define CPLD_IMG_MUX2   CPLD_OFFSET(3,2)
+#define CPLD_IMG_MUX3   CPLD_OFFSET(3,3)
+#define CPLD_IMG_DIR2   CPLD_OFFSET(4,0)
+#define CPLD_IMG_MUX4   CPLD_OFFSET(4,1)
+#define CPLD_IMG_MUX5   CPLD_OFFSET(4,2)
+
+#define CPLD_RESETS     CPLD_OFFSET(4,3)
+
+#define CPLD_CCD_DIR1   CPLD_OFFSET(0x3e,0)
+#define CPLD_CCD_IO1    CPLD_OFFSET(0x3e,1)
+#define CPLD_CCD_DIR2   CPLD_OFFSET(0x3e,2)
+#define CPLD_CCD_IO2    CPLD_OFFSET(0x3e,3)
+#define CPLD_CCD_DIR3   CPLD_OFFSET(0x3f,0)
+#define CPLD_CCD_IO3    CPLD_OFFSET(0x3f,1)
+
+static void __iomem *cpld;
+
+
+/* NOTE:  this is geared for the standard config, with a socketed
+ * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
+ * swap chips with a different block size, partitioning will
+ * need to be changed. This NAND chip MT29F16G08FAA is the default
+ * NAND shipped with the Spectrum Digital DM365 EVM
+ */
+#define NAND_BLOCK_SIZE         SZ_128K
+
+static struct mtd_partition davinci_nand_partitions[] = {
+        {
+                /* UBL (a few copies) plus U-Boot */
+                .name           = "bootloader",
+                .offset         = 0,
+                .size           = 28 * NAND_BLOCK_SIZE,
+                .mask_flags     = MTD_WRITEABLE, /* force read-only */
+        }, {
+                /* U-Boot environment */
+                .name           = "params",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 2 * NAND_BLOCK_SIZE,
+                .mask_flags     = 0,
+        }, {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_4M,
+                .mask_flags     = 0,
+        }, {
+                .name           = "filesystem1",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_512M,
+                .mask_flags     = 0,
+        }, {
+                .name           = "filesystem2",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+                .mask_flags     = 0,
+        }
+        /* two blocks with bad block table (and mirror) at the end */
+};
+
+static struct davinci_nand_pdata davinci_nand_data = {
+        .mask_chipsel           = BIT(14),
+        .parts                  = davinci_nand_partitions,
+        .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
+        .ecc_mode               = NAND_ECC_HW,
+        .options                = NAND_USE_FLASH_BBT,
+};
+
+static struct resource davinci_nand_resources[] = {
+        {
+                .start          = DM365_ASYNC_EMIF_DATA_CE0_BASE,
+                .end            = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
+                .flags          = IORESOURCE_MEM,
+        }, {
+                .start          = DM365_ASYNC_EMIF_CONTROL_BASE,
+                .end            = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device davinci_nand_device = {
+        .name                   = "davinci_nand",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(davinci_nand_resources),
+        .resource               = davinci_nand_resources,
+        .dev                    = {
+                .platform_data  = &davinci_nand_data,
+        },
+};
+
+static struct at24_platform_data eeprom_info = {
+        .byte_len       = (256*1024) / 8,
+        .page_size      = 64,
+        .flags          = AT24_FLAG_ADDR16,
+        .setup          = davinci_get_mac_addr,
+        .context        = (void *)0x7f00,
+};
+
+static struct i2c_board_info i2c_info[] = {
+        {
+                I2C_BOARD_INFO("24c256", 0x50),
+                .platform_data  = &eeprom_info,
+        },
+};
+
+static struct davinci_i2c_platform_data i2c_pdata = {
+        .bus_freq       = 400   /* kHz */,
+        .bus_delay      = 0     /* usec */,
+};
+
+static int cpld_mmc_get_cd(int module)
+{
+        if (!cpld)
+                return -ENXIO;
+
+        /* low == card present */
+        return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0));
+}
+
+static int cpld_mmc_get_ro(int module)
+{
+        if (!cpld)
+                return -ENXIO;
+
+        /* high == card's write protect switch active */
+        return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1));
+}
+
+static struct davinci_mmc_config dm365evm_mmc_config = {
+        .get_cd         = cpld_mmc_get_cd,
+        .get_ro         = cpld_mmc_get_ro,
+        .wires          = 4,
+        .max_freq       = 50000000,
+        .caps           = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
+        .version        = MMC_CTLR_VERSION_2,
+};
+
+static void dm365evm_emac_configure(void)
+{
+        /*
+         * EMAC pins are multiplexed with GPIO and UART
+         * Further details are available at the DM365 ARM
+         * Subsystem Users Guide(sprufg5.pdf) pages 125 - 127
+         */
+        davinci_cfg_reg(DM365_EMAC_TX_EN);
+        davinci_cfg_reg(DM365_EMAC_TX_CLK);
+        davinci_cfg_reg(DM365_EMAC_COL);
+        davinci_cfg_reg(DM365_EMAC_TXD3);
+        davinci_cfg_reg(DM365_EMAC_TXD2);
+        davinci_cfg_reg(DM365_EMAC_TXD1);
+        davinci_cfg_reg(DM365_EMAC_TXD0);
+        davinci_cfg_reg(DM365_EMAC_RXD3);
+        davinci_cfg_reg(DM365_EMAC_RXD2);
+        davinci_cfg_reg(DM365_EMAC_RXD1);
+        davinci_cfg_reg(DM365_EMAC_RXD0);
+        davinci_cfg_reg(DM365_EMAC_RX_CLK);
+        davinci_cfg_reg(DM365_EMAC_RX_DV);
+        davinci_cfg_reg(DM365_EMAC_RX_ER);
+        davinci_cfg_reg(DM365_EMAC_CRS);
+        davinci_cfg_reg(DM365_EMAC_MDIO);
+        davinci_cfg_reg(DM365_EMAC_MDCLK);
+
+        /*
+         * EMAC interrupts are multiplexed with GPIO interrupts
+         * Details are available at the DM365 ARM
+         * Subsystem Users Guide(sprufg5.pdf) pages 133 - 134
+         */
+        davinci_cfg_reg(DM365_INT_EMAC_RXTHRESH);
+        davinci_cfg_reg(DM365_INT_EMAC_RXPULSE);
+        davinci_cfg_reg(DM365_INT_EMAC_TXPULSE);
+        davinci_cfg_reg(DM365_INT_EMAC_MISCPULSE);
+}
+
+static void dm365evm_mmc_configure(void)
+{
+        /*
+         * MMC/SD pins are multiplexed with GPIO and EMIF
+         * Further details are available at the DM365 ARM
+         * Subsystem Users Guide(sprufg5.pdf) pages 118, 128 - 131
+         */
+        davinci_cfg_reg(DM365_SD1_CLK);
+        davinci_cfg_reg(DM365_SD1_CMD);
+        davinci_cfg_reg(DM365_SD1_DATA3);
+        davinci_cfg_reg(DM365_SD1_DATA2);
+        davinci_cfg_reg(DM365_SD1_DATA1);
+        davinci_cfg_reg(DM365_SD1_DATA0);
+}
+
+static void __init evm_init_i2c(void)
+{
+        davinci_init_i2c(&i2c_pdata);
+        i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
+}
+
+static struct platform_device *dm365_evm_nand_devices[] __initdata = {
+        &davinci_nand_device,
+};
+
+static inline int have_leds(void)
+{
+#ifdef CONFIG_LEDS_CLASS
+        return 1;
+#else
+        return 0;
+#endif
+}
+
+struct cpld_led {
+        struct led_classdev     cdev;
+        u8                      mask;
+};
+
+static const struct {
+        const char *name;
+        const char *trigger;
+} cpld_leds[] = {
+        { "dm365evm::ds2", },
+        { "dm365evm::ds3", },
+        { "dm365evm::ds4", },
+        { "dm365evm::ds5", },
+        { "dm365evm::ds6", "nand-disk", },
+        { "dm365evm::ds7", "mmc1", },
+        { "dm365evm::ds8", "mmc0", },
+        { "dm365evm::ds9", "heartbeat", },
+};
+
+static void cpld_led_set(struct led_classdev *cdev, enum led_brightness b)
+{
+        struct cpld_led *led = container_of(cdev, struct cpld_led, cdev);
+        u8 reg = __raw_readb(cpld + CPLD_LEDS);
+
+        if (b != LED_OFF)
+                reg &= ~led->mask;
+        else
+                reg |= led->mask;
+        __raw_writeb(reg, cpld + CPLD_LEDS);
+}
+
+static enum led_brightness cpld_led_get(struct led_classdev *cdev)
+{
+        struct cpld_led *led = container_of(cdev, struct cpld_led, cdev);
+        u8 reg = __raw_readb(cpld + CPLD_LEDS);
+
+        return (reg & led->mask) ? LED_OFF : LED_FULL;
+}
+
+static int __init cpld_leds_init(void)
+{
+        int     i;
+
+        if (!have_leds() ||  !cpld)
+                return 0;
+
+        /* setup LEDs */
+        __raw_writeb(0xff, cpld + CPLD_LEDS);
+        for (i = 0; i < ARRAY_SIZE(cpld_leds); i++) {
+                struct cpld_led *led;
+
+                led = kzalloc(sizeof(*led), GFP_KERNEL);
+                if (!led)
+                        break;
+
+                led->cdev.name = cpld_leds[i].name;
+                led->cdev.brightness_set = cpld_led_set;
+                led->cdev.brightness_get = cpld_led_get;
+                led->cdev.default_trigger = cpld_leds[i].trigger;
+                led->mask = BIT(i);
+
+                if (led_classdev_register(NULL, &led->cdev) < 0) {
+                        kfree(led);
+                        break;
+                }
+        }
+
+        return 0;
+}
+/* run after subsys_initcall() for LEDs */
+fs_initcall(cpld_leds_init);
+
+
+static void __init evm_init_cpld(void)
+{
+        u8 mux, resets;
+        const char *label;
+        struct clk *aemif_clk;
+
+        /* Make sure we can configure the CPLD through CS1.  Then
+         * leave it on for later access to MMC and LED registers.
+         */
+        aemif_clk = clk_get(NULL, "aemif");
+        if (IS_ERR(aemif_clk))
+                return;
+        clk_enable(aemif_clk);
+
+        if (request_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE,
+                        "cpld") == NULL)
+                goto fail;
+        cpld = ioremap(DM365_ASYNC_EMIF_DATA_CE1_BASE, SECTION_SIZE);
+        if (!cpld) {
+                release_mem_region(DM365_ASYNC_EMIF_DATA_CE1_BASE,
+                                SECTION_SIZE);
+fail:
+                pr_err("ERROR: can't map CPLD\n");
+                clk_disable(aemif_clk);
+                return;
+        }
+
+        /* External muxing for some signals */
+        mux = 0;
+
+        /* Read SW5 to set up NAND + keypad _or_ OneNAND (sync read).
+         * NOTE:  SW4 bus width setting must match!
+         */
+        if ((__raw_readb(cpld + CPLD_SWITCH) & BIT(5)) == 0) {
+                /* external keypad mux */
+                mux |= BIT(7);
+
+                platform_add_devices(dm365_evm_nand_devices,
+                                ARRAY_SIZE(dm365_evm_nand_devices));
+        } else {
+                /* no OneNAND support yet */
+        }
+
+        /* Leave external chips in reset when unused. */
+        resets = BIT(3) | BIT(2) | BIT(1) | BIT(0);
+
+        /* Static video input config with SN74CBT16214 1-of-3 mux:
+         *  - port b1 == tvp7002 (mux lowbits == 1 or 6)
+         *  - port b2 == imager (mux lowbits == 2 or 7)
+         *  - port b3 == tvp5146 (mux lowbits == 5)
+         *
+         * Runtime switching could work too, with limitations.
+         */
+        if (have_imager()) {
+                label = "HD imager";
+                mux |= 1;
+
+                /* externally mux MMC1/ENET/AIC33 to imager */
+                mux |= BIT(6) | BIT(5) | BIT(3);
+        } else {
+                struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+                /* we can use MMC1 ... */
+                dm365evm_mmc_configure();
+                davinci_setup_mmc(1, &dm365evm_mmc_config);
+
+                /* ... and ENET ... */
+                dm365evm_emac_configure();
+                soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK;
+                soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY;
+                resets &= ~BIT(3);
+
+                /* ... and AIC33 */
+                resets &= ~BIT(1);
+
+                if (have_tvp7002()) {
+                        mux |= 2;
+                        resets &= ~BIT(2);
+                        label = "tvp7002 HD";
+                } else {
+                        /* default to tvp5146 */
+                        mux |= 5;
+                        resets &= ~BIT(0);
+                        label = "tvp5146 SD";
+                }
+        }
+        __raw_writeb(mux, cpld + CPLD_MUX);
+        __raw_writeb(resets, cpld + CPLD_RESETS);
+        pr_info("EVM: %s video input\n", label);
+
+        /* REVISIT export switches: NTSC/PAL (SW5.6), EXTRA1 (SW5.2), etc */
+}
+
+static struct davinci_uart_config uart_config __initdata = {
+        .enabled_uarts = (1 << 0),
+};
+
+static void __init dm365_evm_map_io(void)
+{
+        dm365_init();
+}
+
+static __init void dm365_evm_init(void)
+{
+        evm_init_i2c();
+        davinci_serial_init(&uart_config);
+
+        dm365evm_emac_configure();
+        dm365evm_mmc_configure();
+
+        davinci_setup_mmc(0, &dm365evm_mmc_config);
+
+        /* maybe setup mmc1/etc ... _after_ mmc0 */
+        evm_init_cpld();
+}
+
+static __init void dm365_evm_irq_init(void)
+{
+        davinci_irq_init();
+}
+
+MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
+        .phys_io        = IO_PHYS,
+        .io_pg_offst    = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
+        .boot_params    = (0x80000100),
+        .map_io         = dm365_evm_map_io,
+        .init_irq       = dm365_evm_irq_init,
+        .timer          = &davinci_timer,
+        .init_machine   = dm365_evm_init,
+MACHINE_END
+
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 56c8cd01de9a..1213a0087ad4 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -28,6 +28,9 @@
 #include <linux/io.h>
 #include <linux/phy.h>
 #include <linux/clk.h>
+#include <linux/videodev2.h>
+
+#include <media/tvp514x.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -194,6 +197,72 @@ static struct platform_device davinci_fb_device = {
         .num_resources = 0,
 };
 
+static struct tvp514x_platform_data tvp5146_pdata = {
+        .clk_polarity = 0,
+        .hs_polarity = 1,
+        .vs_polarity = 1
+};
+
+#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
+/* Inputs available at the TVP5146 */
+static struct v4l2_input tvp5146_inputs[] = {
+        {
+                .index = 0,
+                .name = "Composite",
+                .type = V4L2_INPUT_TYPE_CAMERA,
+                .std = TVP514X_STD_ALL,
+        },
+        {
+                .index = 1,
+                .name = "S-Video",
+                .type = V4L2_INPUT_TYPE_CAMERA,
+                .std = TVP514X_STD_ALL,
+        },
+};
+
+/*
+ * this is the route info for connecting each input to decoder
+ * ouput that goes to vpfe. There is a one to one correspondence
+ * with tvp5146_inputs
+ */
+static struct vpfe_route tvp5146_routes[] = {
+        {
+                .input = INPUT_CVBS_VI2B,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+        },
+        {
+                .input = INPUT_SVIDEO_VI2C_VI1C,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+        },
+};
+
+static struct vpfe_subdev_info vpfe_sub_devs[] = {
+        {
+                .name = "tvp5146",
+                .grp_id = 0,
+                .num_inputs = ARRAY_SIZE(tvp5146_inputs),
+                .inputs = tvp5146_inputs,
+                .routes = tvp5146_routes,
+                .can_route = 1,
+                .ccdc_if_params = {
+                        .if_type = VPFE_BT656,
+                        .hdpol = VPFE_PINPOL_POSITIVE,
+                        .vdpol = VPFE_PINPOL_POSITIVE,
+                },
+                .board_info = {
+                        I2C_BOARD_INFO("tvp5146", 0x5d),
+                        .platform_data = &tvp5146_pdata,
+                },
+        },
+};
+
+static struct vpfe_config vpfe_cfg = {
+        .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
+        .sub_devs = vpfe_sub_devs,
+        .card_name = "DM6446 EVM",
+        .ccdc = "DM6446 CCDC",
+};
+
 static struct platform_device rtc_dev = {
         .name           = "rtc_davinci_evm",
         .id             = -1,
@@ -225,6 +294,8 @@ static struct platform_device ide_dev = {
         },
 };
 
+static struct snd_platform_data dm644x_evm_snd_data;
+
 /*----------------------------------------------------------------------*/
 
 /*
@@ -557,10 +628,9 @@ static struct i2c_board_info __initdata i2c_info[] =  {
                 I2C_BOARD_INFO("24c256", 0x50),
                 .platform_data  = &eeprom_info,
         },
-        /* ALSO:
-         * - tvl320aic33 audio codec (0x1b)
-         * - tvp5146 video decoder (0x5d)
-         */
+        {
+                I2C_BOARD_INFO("tlv320aic33", 0x1b),
+        },
 };
 
 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
@@ -590,6 +660,8 @@ static struct davinci_uart_config uart_config __initdata = {
 static void __init
 davinci_evm_map_io(void)
 {
+        /* setup input configuration for VPFE input devices */
+        dm644x_set_vpfe_config(&vpfe_cfg);
         dm644x_init();
 }
 
@@ -666,6 +738,7 @@ static __init void davinci_evm_init(void)
         davinci_setup_mmc(0, &dm6446evm_mmc_config);
 
         davinci_serial_init(&uart_config);
+        dm644x_init_asp(&dm644x_evm_snd_data);
 
         soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
         soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 8657e72debc1..24e0e13b1492 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -34,6 +34,8 @@
 #include <linux/i2c/pcf857x.h>
 #include <linux/etherdevice.h>
 
+#include <media/tvp514x.h>
+
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -48,13 +50,89 @@
 #include <mach/mmc.h>
 #include <mach/emac.h>
 
+#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
+    defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
+#define HAS_ATA 1
+#else
+#define HAS_ATA 0
+#endif
+
+/* CPLD Register 0 bits to control ATA */
+#define DM646X_EVM_ATA_RST              BIT(0)
+#define DM646X_EVM_ATA_PWD              BIT(1)
+
 #define DM646X_EVM_PHY_MASK             (0x2)
 #define DM646X_EVM_MDIO_FREQUENCY       (2200000) /* PHY bus frequency */
 
+#define VIDCLKCTL_OFFSET        (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
+#define VSCLKDIS_OFFSET         (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
+#define VCH2CLK_MASK            (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
+#define VCH2CLK_SYSCLK8         (BIT(9))
+#define VCH2CLK_AUXCLK          (BIT(9) | BIT(8))
+#define VCH3CLK_MASK            (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
+#define VCH3CLK_SYSCLK8         (BIT(13))
+#define VCH3CLK_AUXCLK          (BIT(14) | BIT(13))
+
+#define VIDCH2CLK               (BIT(10))
+#define VIDCH3CLK               (BIT(11))
+#define VIDCH1CLK               (BIT(4))
+#define TVP7002_INPUT           (BIT(4))
+#define TVP5147_INPUT           (~BIT(4))
+#define VPIF_INPUT_ONE_CHANNEL  (BIT(5))
+#define VPIF_INPUT_TWO_CHANNEL  (~BIT(5))
+#define TVP5147_CH0             "tvp514x-0"
+#define TVP5147_CH1             "tvp514x-1"
+
+static void __iomem *vpif_vidclkctl_reg;
+static void __iomem *vpif_vsclkdis_reg;
+/* spin lock for updating above registers */
+static spinlock_t vpif_reg_lock;
+
 static struct davinci_uart_config uart_config __initdata = {
         .enabled_uarts = (1 << 0),
 };
 
+/* CPLD Register 0 Client: used for I/O Control */
+static int cpld_reg0_probe(struct i2c_client *client,
+                           const struct i2c_device_id *id)
+{
+        if (HAS_ATA) {
+                u8 data;
+                struct i2c_msg msg[2] = {
+                        {
+                                .addr = client->addr,
+                                .flags = I2C_M_RD,
+                                .len = 1,
+                                .buf = &data,
+                        },
+                        {
+                                .addr = client->addr,
+                                .flags = 0,
+                                .len = 1,
+                                .buf = &data,
+                        },
+                };
+
+                /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
+                i2c_transfer(client->adapter, msg, 1);
+                data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
+                i2c_transfer(client->adapter, msg + 1, 1);
+        }
+
+        return 0;
+}
+
+static const struct i2c_device_id cpld_reg_ids[] = {
+        { "cpld_reg0", 0, },
+        { },
+};
+
+static struct i2c_driver dm6467evm_cpld_driver = {
+        .driver.name    = "cpld_reg0",
+        .id_table       = cpld_reg_ids,
+        .probe          = cpld_reg0_probe,
+};
+
 /* LEDS */
 
 static struct gpio_led evm_leds[] = {
@@ -206,6 +284,69 @@ static struct at24_platform_data eeprom_info = {
         .context        = (void *)0x7f00,
 };
 
+static u8 dm646x_iis_serializer_direction[] = {
+       TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
+};
+
+static u8 dm646x_dit_serializer_direction[] = {
+       TX_MODE,
+};
+
+static struct snd_platform_data dm646x_evm_snd_data[] = {
+        {
+                .tx_dma_offset  = 0x400,
+                .rx_dma_offset  = 0x400,
+                .op_mode        = DAVINCI_MCASP_IIS_MODE,
+                .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
+                .tdm_slots      = 2,
+                .serial_dir     = dm646x_iis_serializer_direction,
+                .eventq_no      = EVENTQ_0,
+        },
+        {
+                .tx_dma_offset  = 0x400,
+                .rx_dma_offset  = 0,
+                .op_mode        = DAVINCI_MCASP_DIT_MODE,
+                .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
+                .tdm_slots      = 32,
+                .serial_dir     = dm646x_dit_serializer_direction,
+                .eventq_no      = EVENTQ_0,
+        },
+};
+
+static struct i2c_client *cpld_client;
+
+static int cpld_video_probe(struct i2c_client *client,
+                        const struct i2c_device_id *id)
+{
+        cpld_client = client;
+        return 0;
+}
+
+static int __devexit cpld_video_remove(struct i2c_client *client)
+{
+        cpld_client = NULL;
+        return 0;
+}
+
+static const struct i2c_device_id cpld_video_id[] = {
+        { "cpld_video", 0 },
+        { }
+};
+
+static struct i2c_driver cpld_video_driver = {
+        .driver = {
+                .name   = "cpld_video",
+        },
+        .probe          = cpld_video_probe,
+        .remove         = cpld_video_remove,
+        .id_table       = cpld_video_id,
+};
+
+static void evm_init_cpld(void)
+{
+        i2c_add_driver(&cpld_video_driver);
+}
+
 static struct i2c_board_info __initdata i2c_info[] =  {
         {
                 I2C_BOARD_INFO("24c256", 0x50),
@@ -215,6 +356,15 @@ static struct i2c_board_info __initdata i2c_info[] =  {
                 I2C_BOARD_INFO("pcf8574a", 0x38),
                 .platform_data  = &pcf_data,
         },
+        {
+                I2C_BOARD_INFO("cpld_reg0", 0x3a),
+        },
+        {
+                I2C_BOARD_INFO("tlv320aic33", 0x18),
+        },
+        {
+                I2C_BOARD_INFO("cpld_video", 0x3b),
+        },
 };
 
 static struct davinci_i2c_platform_data i2c_pdata = {
@@ -222,10 +372,265 @@ static struct davinci_i2c_platform_data i2c_pdata = {
         .bus_delay      = 0 /* usec */,
 };
 
+static int set_vpif_clock(int mux_mode, int hd)
+{
+        unsigned long flags;
+        unsigned int value;
+        int val = 0;
+        int err = 0;
+
+        if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
+                return -ENXIO;
+
+        /* disable the clock */
+        spin_lock_irqsave(&vpif_reg_lock, flags);
+        value = __raw_readl(vpif_vsclkdis_reg);
+        value |= (VIDCH3CLK | VIDCH2CLK);
+        __raw_writel(value, vpif_vsclkdis_reg);
+        spin_unlock_irqrestore(&vpif_reg_lock, flags);
+
+        val = i2c_smbus_read_byte(cpld_client);
+        if (val < 0)
+                return val;
+
+        if (mux_mode == 1)
+                val &= ~0x40;
+        else
+                val |= 0x40;
+
+        err = i2c_smbus_write_byte(cpld_client, val);
+        if (err)
+                return err;
+
+        value = __raw_readl(vpif_vidclkctl_reg);
+        value &= ~(VCH2CLK_MASK);
+        value &= ~(VCH3CLK_MASK);
+
+        if (hd >= 1)
+                value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
+        else
+                value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
+
+        __raw_writel(value, vpif_vidclkctl_reg);
+
+        spin_lock_irqsave(&vpif_reg_lock, flags);
+        value = __raw_readl(vpif_vsclkdis_reg);
+        /* enable the clock */
+        value &= ~(VIDCH3CLK | VIDCH2CLK);
+        __raw_writel(value, vpif_vsclkdis_reg);
+        spin_unlock_irqrestore(&vpif_reg_lock, flags);
+
+        return 0;
+}
+
+static struct vpif_subdev_info dm646x_vpif_subdev[] = {
+        {
+                .name   = "adv7343",
+                .board_info = {
+                        I2C_BOARD_INFO("adv7343", 0x2a),
+                },
+        },
+        {
+                .name   = "ths7303",
+                .board_info = {
+                        I2C_BOARD_INFO("ths7303", 0x2c),
+                },
+        },
+};
+
+static const char *output[] = {
+        "Composite",
+        "Component",
+        "S-Video",
+};
+
+static struct vpif_display_config dm646x_vpif_display_config = {
+        .set_clock      = set_vpif_clock,
+        .subdevinfo     = dm646x_vpif_subdev,
+        .subdev_count   = ARRAY_SIZE(dm646x_vpif_subdev),
+        .output         = output,
+        .output_count   = ARRAY_SIZE(output),
+        .card_name      = "DM646x EVM",
+};
+
+/**
+ * setup_vpif_input_path()
+ * @channel: channel id (0 - CH0, 1 - CH1)
+ * @sub_dev_name: ptr sub device name
+ *
+ * This will set vpif input to capture data from tvp514x or
+ * tvp7002.
+ */
+static int setup_vpif_input_path(int channel, const char *sub_dev_name)
+{
+        int err = 0;
+        int val;
+
+        /* for channel 1, we don't do anything */
+        if (channel != 0)
+                return 0;
+
+        if (!cpld_client)
+                return -ENXIO;
+
+        val = i2c_smbus_read_byte(cpld_client);
+        if (val < 0)
+                return val;
+
+        if (!strcmp(sub_dev_name, TVP5147_CH0) ||
+            !strcmp(sub_dev_name, TVP5147_CH1))
+                val &= TVP5147_INPUT;
+        else
+                val |= TVP7002_INPUT;
+
+        err = i2c_smbus_write_byte(cpld_client, val);
+        if (err)
+                return err;
+        return 0;
+}
+
+/**
+ * setup_vpif_input_channel_mode()
+ * @mux_mode:  mux mode. 0 - 1 channel or (1) - 2 channel
+ *
+ * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
+ */
+static int setup_vpif_input_channel_mode(int mux_mode)
+{
+        unsigned long flags;
+        int err = 0;
+        int val;
+        u32 value;
+
+        if (!vpif_vsclkdis_reg || !cpld_client)
+                return -ENXIO;
+
+        val = i2c_smbus_read_byte(cpld_client);
+        if (val < 0)
+                return val;
+
+        spin_lock_irqsave(&vpif_reg_lock, flags);
+        value = __raw_readl(vpif_vsclkdis_reg);
+        if (mux_mode) {
+                val &= VPIF_INPUT_TWO_CHANNEL;
+                value |= VIDCH1CLK;
+        } else {
+                val |= VPIF_INPUT_ONE_CHANNEL;
+                value &= ~VIDCH1CLK;
+        }
+        __raw_writel(value, vpif_vsclkdis_reg);
+        spin_unlock_irqrestore(&vpif_reg_lock, flags);
+
+        err = i2c_smbus_write_byte(cpld_client, val);
+        if (err)
+                return err;
+
+        return 0;
+}
+
+static struct tvp514x_platform_data tvp5146_pdata = {
+        .clk_polarity = 0,
+        .hs_polarity = 1,
+        .vs_polarity = 1
+};
+
+#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
+
+static struct vpif_subdev_info vpif_capture_sdev_info[] = {
+        {
+                .name   = TVP5147_CH0,
+                .board_info = {
+                        I2C_BOARD_INFO("tvp5146", 0x5d),
+                        .platform_data = &tvp5146_pdata,
+                },
+                .input = INPUT_CVBS_VI2B,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+                .can_route = 1,
+                .vpif_if = {
+                        .if_type = VPIF_IF_BT656,
+                        .hd_pol = 1,
+                        .vd_pol = 1,
+                        .fid_pol = 0,
+                },
+        },
+        {
+                .name   = TVP5147_CH1,
+                .board_info = {
+                        I2C_BOARD_INFO("tvp5146", 0x5c),
+                        .platform_data = &tvp5146_pdata,
+                },
+                .input = INPUT_SVIDEO_VI2C_VI1C,
+                .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+                .can_route = 1,
+                .vpif_if = {
+                        .if_type = VPIF_IF_BT656,
+                        .hd_pol = 1,
+                        .vd_pol = 1,
+                        .fid_pol = 0,
+                },
+        },
+};
+
+static const struct vpif_input dm6467_ch0_inputs[] = {
+        {
+                .input = {
+                        .index = 0,
+                        .name = "Composite",
+                        .type = V4L2_INPUT_TYPE_CAMERA,
+                        .std = TVP514X_STD_ALL,
+                },
+                .subdev_name = TVP5147_CH0,
+        },
+};
+
+static const struct vpif_input dm6467_ch1_inputs[] = {
+       {
+                .input = {
+                        .index = 0,
+                        .name = "S-Video",
+                        .type = V4L2_INPUT_TYPE_CAMERA,
+                        .std = TVP514X_STD_ALL,
+                },
+                .subdev_name = TVP5147_CH1,
+        },
+};
+
+static struct vpif_capture_config dm646x_vpif_capture_cfg = {
+        .setup_input_path = setup_vpif_input_path,
+        .setup_input_channel_mode = setup_vpif_input_channel_mode,
+        .subdev_info = vpif_capture_sdev_info,
+        .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
+        .chan_config[0] = {
+                .inputs = dm6467_ch0_inputs,
+                .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
+        },
+        .chan_config[1] = {
+                .inputs = dm6467_ch1_inputs,
+                .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
+        },
+};
+
+static void __init evm_init_video(void)
+{
+        vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
+        vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
+        if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
+                pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
+                return;
+        }
+        spin_lock_init(&vpif_reg_lock);
+
+        dm646x_setup_vpif(&dm646x_vpif_display_config,
+                          &dm646x_vpif_capture_cfg);
+}
+
 static void __init evm_init_i2c(void)
 {
         davinci_init_i2c(&i2c_pdata);
+        i2c_add_driver(&dm6467evm_cpld_driver);
         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
+        evm_init_cpld();
+        evm_init_video();
 }
 
 static void __init davinci_map_io(void)
@@ -239,6 +644,11 @@ static __init void evm_init(void)
 
         evm_init_i2c();
         davinci_serial_init(&uart_config);
+        dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
+        dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
+
+        if (HAS_ATA)
+                dm646x_init_ide();
 
         soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
         soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 39bf321d70a2..83d54d50b5ea 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -227,7 +227,10 @@ static void __init clk_pll_init(struct clk *clk)
         if (ctrl & PLLCTL_PLLEN) {
                 bypass = 0;
                 mult = __raw_readl(pll->base + PLLM);
-                mult = (mult & PLLM_PLLM_MASK) + 1;
+                if (cpu_is_davinci_dm365())
+                        mult = 2 * (mult & PLLM_PLLM_MASK);
+                else
+                        mult = (mult & PLLM_PLLM_MASK) + 1;
         } else
                 bypass = 1;
 
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
new file mode 100644
index 000000000000..19b2748357fc
--- /dev/null
+++ b/arch/arm/mach-davinci/da830.c
@@ -0,0 +1,1205 @@
+/*
+ * TI DA830/OMAP L137 chip specific setup
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/clock.h>
+#include <mach/psc.h>
+#include <mach/mux.h>
+#include <mach/irqs.h>
+#include <mach/cputype.h>
+#include <mach/common.h>
+#include <mach/time.h>
+#include <mach/da8xx.h>
+#include <mach/asp.h>
+
+#include "clock.h"
+#include "mux.h"
+
+/* Offsets of the 8 compare registers on the da830 */
+#define DA830_CMP12_0           0x60
+#define DA830_CMP12_1           0x64
+#define DA830_CMP12_2           0x68
+#define DA830_CMP12_3           0x6c
+#define DA830_CMP12_4           0x70
+#define DA830_CMP12_5           0x74
+#define DA830_CMP12_6           0x78
+#define DA830_CMP12_7           0x7c
+
+#define DA830_REF_FREQ          24000000
+
+static struct pll_data pll0_data = {
+        .num            = 1,
+        .phys_base      = DA8XX_PLL0_BASE,
+        .flags          = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
+};
+
+static struct clk ref_clk = {
+        .name           = "ref_clk",
+        .rate           = DA830_REF_FREQ,
+};
+
+static struct clk pll0_clk = {
+        .name           = "pll0",
+        .parent         = &ref_clk,
+        .pll_data       = &pll0_data,
+        .flags          = CLK_PLL,
+};
+
+static struct clk pll0_aux_clk = {
+        .name           = "pll0_aux_clk",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+};
+
+static struct clk pll0_sysclk2 = {
+        .name           = "pll0_sysclk2",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV2,
+};
+
+static struct clk pll0_sysclk3 = {
+        .name           = "pll0_sysclk3",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV3,
+};
+
+static struct clk pll0_sysclk4 = {
+        .name           = "pll0_sysclk4",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV4,
+};
+
+static struct clk pll0_sysclk5 = {
+        .name           = "pll0_sysclk5",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV5,
+};
+
+static struct clk pll0_sysclk6 = {
+        .name           = "pll0_sysclk6",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV6,
+};
+
+static struct clk pll0_sysclk7 = {
+        .name           = "pll0_sysclk7",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV7,
+};
+
+static struct clk i2c0_clk = {
+        .name           = "i2c0",
+        .parent         = &pll0_aux_clk,
+};
+
+static struct clk timerp64_0_clk = {
+        .name           = "timer0",
+        .parent         = &pll0_aux_clk,
+};
+
+static struct clk timerp64_1_clk = {
+        .name           = "timer1",
+        .parent         = &pll0_aux_clk,
+};
+
+static struct clk arm_rom_clk = {
+        .name           = "arm_rom",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_ARM_RAM_ROM,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk scr0_ss_clk = {
+        .name           = "scr0_ss",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_SCR0_SS,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk scr1_ss_clk = {
+        .name           = "scr1_ss",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_SCR1_SS,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk scr2_ss_clk = {
+        .name           = "scr2_ss",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_SCR2_SS,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk dmax_clk = {
+        .name           = "dmax",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_DMAX,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk tpcc_clk = {
+        .name           = "tpcc",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_TPCC,
+        .flags          = ALWAYS_ENABLED | CLK_PSC,
+};
+
+static struct clk tptc0_clk = {
+        .name           = "tptc0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_TPTC0,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk tptc1_clk = {
+        .name           = "tptc1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_TPTC1,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk mmcsd_clk = {
+        .name           = "mmcsd",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_MMC_SD,
+};
+
+static struct clk uart0_clk = {
+        .name           = "uart0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_UART0,
+};
+
+static struct clk uart1_clk = {
+        .name           = "uart1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_UART1,
+        .psc_ctlr       = 1,
+};
+
+static struct clk uart2_clk = {
+        .name           = "uart2",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_UART2,
+        .psc_ctlr       = 1,
+};
+
+static struct clk spi0_clk = {
+        .name           = "spi0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_SPI0,
+};
+
+static struct clk spi1_clk = {
+        .name           = "spi1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_SPI1,
+        .psc_ctlr       = 1,
+};
+
+static struct clk ecap0_clk = {
+        .name           = "ecap0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_ECAP,
+        .psc_ctlr       = 1,
+};
+
+static struct clk ecap1_clk = {
+        .name           = "ecap1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_ECAP,
+        .psc_ctlr       = 1,
+};
+
+static struct clk ecap2_clk = {
+        .name           = "ecap2",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_ECAP,
+        .psc_ctlr       = 1,
+};
+
+static struct clk pwm0_clk = {
+        .name           = "pwm0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_PWM,
+        .psc_ctlr       = 1,
+};
+
+static struct clk pwm1_clk = {
+        .name           = "pwm1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_PWM,
+        .psc_ctlr       = 1,
+};
+
+static struct clk pwm2_clk = {
+        .name           = "pwm2",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_PWM,
+        .psc_ctlr       = 1,
+};
+
+static struct clk eqep0_clk = {
+        .name           = "eqep0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA830_LPSC1_EQEP,
+        .psc_ctlr       = 1,
+};
+
+static struct clk eqep1_clk = {
+        .name           = "eqep1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA830_LPSC1_EQEP,
+        .psc_ctlr       = 1,
+};
+
+static struct clk lcdc_clk = {
+        .name           = "lcdc",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_LCDC,
+        .psc_ctlr       = 1,
+};
+
+static struct clk mcasp0_clk = {
+        .name           = "mcasp0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_McASP0,
+        .psc_ctlr       = 1,
+};
+
+static struct clk mcasp1_clk = {
+        .name           = "mcasp1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA830_LPSC1_McASP1,
+        .psc_ctlr       = 1,
+};
+
+static struct clk mcasp2_clk = {
+        .name           = "mcasp2",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA830_LPSC1_McASP2,
+        .psc_ctlr       = 1,
+};
+
+static struct clk usb20_clk = {
+        .name           = "usb20",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_USB20,
+        .psc_ctlr       = 1,
+};
+
+static struct clk aemif_clk = {
+        .name           = "aemif",
+        .parent         = &pll0_sysclk3,
+        .lpsc           = DA8XX_LPSC0_EMIF25,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk aintc_clk = {
+        .name           = "aintc",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC0_AINTC,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk secu_mgr_clk = {
+        .name           = "secu_mgr",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC0_SECU_MGR,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk emac_clk = {
+        .name           = "emac",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_CPGMAC,
+        .psc_ctlr       = 1,
+};
+
+static struct clk gpio_clk = {
+        .name           = "gpio",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_GPIO,
+        .psc_ctlr       = 1,
+};
+
+static struct clk i2c1_clk = {
+        .name           = "i2c1",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_I2C,
+        .psc_ctlr       = 1,
+};
+
+static struct clk usb11_clk = {
+        .name           = "usb11",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_USB11,
+        .psc_ctlr       = 1,
+};
+
+static struct clk emif3_clk = {
+        .name           = "emif3",
+        .parent         = &pll0_sysclk5,
+        .lpsc           = DA8XX_LPSC1_EMIF3C,
+        .flags          = ALWAYS_ENABLED,
+        .psc_ctlr       = 1,
+};
+
+static struct clk arm_clk = {
+        .name           = "arm",
+        .parent         = &pll0_sysclk6,
+        .lpsc           = DA8XX_LPSC0_ARM,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk rmii_clk = {
+        .name           = "rmii",
+        .parent         = &pll0_sysclk7,
+};
+
+static struct davinci_clk da830_clks[] = {
+        CLK(NULL,               "ref",          &ref_clk),
+        CLK(NULL,               "pll0",         &pll0_clk),
+        CLK(NULL,               "pll0_aux",     &pll0_aux_clk),
+        CLK(NULL,               "pll0_sysclk2", &pll0_sysclk2),
+        CLK(NULL,               "pll0_sysclk3", &pll0_sysclk3),
+        CLK(NULL,               "pll0_sysclk4", &pll0_sysclk4),
+        CLK(NULL,               "pll0_sysclk5", &pll0_sysclk5),
+        CLK(NULL,               "pll0_sysclk6", &pll0_sysclk6),
+        CLK(NULL,               "pll0_sysclk7", &pll0_sysclk7),
+        CLK("i2c_davinci.1",    NULL,           &i2c0_clk),
+        CLK(NULL,               "timer0",       &timerp64_0_clk),
+        CLK("watchdog",         NULL,           &timerp64_1_clk),
+        CLK(NULL,               "arm_rom",      &arm_rom_clk),
+        CLK(NULL,               "scr0_ss",      &scr0_ss_clk),
+        CLK(NULL,               "scr1_ss",      &scr1_ss_clk),
+        CLK(NULL,               "scr2_ss",      &scr2_ss_clk),
+        CLK(NULL,               "dmax",         &dmax_clk),
+        CLK(NULL,               "tpcc",         &tpcc_clk),
+        CLK(NULL,               "tptc0",        &tptc0_clk),
+        CLK(NULL,               "tptc1",        &tptc1_clk),
+        CLK("davinci_mmc.0",    NULL,           &mmcsd_clk),
+        CLK(NULL,               "uart0",        &uart0_clk),
+        CLK(NULL,               "uart1",        &uart1_clk),
+        CLK(NULL,               "uart2",        &uart2_clk),
+        CLK("dm_spi.0",         NULL,           &spi0_clk),
+        CLK("dm_spi.1",         NULL,           &spi1_clk),
+        CLK(NULL,               "ecap0",        &ecap0_clk),
+        CLK(NULL,               "ecap1",        &ecap1_clk),
+        CLK(NULL,               "ecap2",        &ecap2_clk),
+        CLK(NULL,               "pwm0",         &pwm0_clk),
+        CLK(NULL,               "pwm1",         &pwm1_clk),
+        CLK(NULL,               "pwm2",         &pwm2_clk),
+        CLK("eqep.0",           NULL,           &eqep0_clk),
+        CLK("eqep.1",           NULL,           &eqep1_clk),
+        CLK("da830_lcdc",       NULL,           &lcdc_clk),
+        CLK("davinci-mcasp.0",  NULL,           &mcasp0_clk),
+        CLK("davinci-mcasp.1",  NULL,           &mcasp1_clk),
+        CLK("davinci-mcasp.2",  NULL,           &mcasp2_clk),
+        CLK("musb_hdrc",        NULL,           &usb20_clk),
+        CLK(NULL,               "aemif",        &aemif_clk),
+        CLK(NULL,               "aintc",        &aintc_clk),
+        CLK(NULL,               "secu_mgr",     &secu_mgr_clk),
+        CLK("davinci_emac.1",   NULL,           &emac_clk),
+        CLK(NULL,               "gpio",         &gpio_clk),
+        CLK("i2c_davinci.2",    NULL,           &i2c1_clk),
+        CLK(NULL,               "usb11",        &usb11_clk),
+        CLK(NULL,               "emif3",        &emif3_clk),
+        CLK(NULL,               "arm",          &arm_clk),
+        CLK(NULL,               "rmii",         &rmii_clk),
+        CLK(NULL,               NULL,           NULL),
+};
+
+/*
+ * Device specific mux setup
+ *
+ *           soc      description       mux    mode    mode   mux       dbg
+ *                                      reg   offset   mask   mode
+ */
+static const struct mux_config da830_pins[] = {
+#ifdef CONFIG_DAVINCI_MUX
+        MUX_CFG(DA830, GPIO7_14,        0,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, RTCK,            0,      0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_15,        0,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMU_0,           0,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, EMB_SDCKE,       0,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_CLK_GLUE,    0,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_CLK,         0,      12,     0xf,    2,      false)
+        MUX_CFG(DA830, NEMB_CS_0,       0,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMB_CAS,        0,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMB_RAS,        0,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMB_WE,         0,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_BA_1,        1,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_BA_0,        1,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_0,         1,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_1,         1,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_2,         1,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_3,         1,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_4,         1,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_5,         1,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, GPIO7_0,         1,      0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_1,         1,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_2,         1,      8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_3,         1,      12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_4,         1,      16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_5,         1,      20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_6,         1,      24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_7,         1,      28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMB_A_6,         2,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_7,         2,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_8,         2,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_9,         2,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_10,        2,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_11,        2,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_A_12,        2,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_31,        2,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, GPIO7_8,         2,      0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_9,         2,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_10,        2,      8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_11,        2,      12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_12,        2,      16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO7_13,        2,      20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_13,        2,      24,     0xf,    8,      false)
+        MUX_CFG(DA830, EMB_D_30,        3,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_29,        3,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_28,        3,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_27,        3,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_26,        3,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_25,        3,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_24,        3,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_23,        3,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_22,        4,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_21,        4,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_20,        4,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_19,        4,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_18,        4,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_17,        4,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_16,        4,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMB_WE_DQM_3,   4,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMB_WE_DQM_2,   5,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_0,         5,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_1,         5,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_2,         5,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_3,         5,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_4,         5,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_5,         5,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_6,         5,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, GPIO6_0,         5,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_1,         5,      8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_2,         5,      12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_3,         5,      16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_4,         5,      20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_5,         5,      24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_6,         5,      28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMB_D_7,         6,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_8,         6,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_9,         6,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_10,        6,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_11,        6,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_12,        6,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_13,        6,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMB_D_14,        6,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, GPIO6_7,         6,      0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_8,         6,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_9,         6,      8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_10,        6,      12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_11,        6,      16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_12,        6,      20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_13,        6,      24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO6_14,        6,      28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMB_D_15,        7,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, NEMB_WE_DQM_1,   7,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, NEMB_WE_DQM_0,   7,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, SPI0_SOMI_0,     7,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, SPI0_SIMO_0,     7,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, SPI0_CLK,        7,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, NSPI0_ENA,       7,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, NSPI0_SCS_0,     7,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, EQEP0I,          7,      12,     0xf,    2,      false)
+        MUX_CFG(DA830, EQEP0S,          7,      16,     0xf,    2,      false)
+        MUX_CFG(DA830, EQEP1I,          7,      20,     0xf,    2,      false)
+        MUX_CFG(DA830, NUART0_CTS,      7,      24,     0xf,    2,      false)
+        MUX_CFG(DA830, NUART0_RTS,      7,      28,     0xf,    2,      false)
+        MUX_CFG(DA830, EQEP0A,          7,      24,     0xf,    4,      false)
+        MUX_CFG(DA830, EQEP0B,          7,      28,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO6_15,        7,      0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_14,        7,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_15,        7,      8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_0,         7,      12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_1,         7,      16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_2,         7,      20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_3,         7,      24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_4,         7,      28,     0xf,    8,      false)
+        MUX_CFG(DA830, SPI1_SOMI_0,     8,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, SPI1_SIMO_0,     8,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, SPI1_CLK,        8,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, UART0_RXD,       8,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, UART0_TXD,       8,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_10,         8,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_11,         8,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, NSPI1_ENA,       8,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, I2C1_SCL,        8,      0,      0xf,    2,      false)
+        MUX_CFG(DA830, I2C1_SDA,        8,      4,      0xf,    2,      false)
+        MUX_CFG(DA830, EQEP1S,          8,      8,      0xf,    2,      false)
+        MUX_CFG(DA830, I2C0_SDA,        8,      12,     0xf,    2,      false)
+        MUX_CFG(DA830, I2C0_SCL,        8,      16,     0xf,    2,      false)
+        MUX_CFG(DA830, UART2_RXD,       8,      28,     0xf,    2,      false)
+        MUX_CFG(DA830, TM64P0_IN12,     8,      12,     0xf,    4,      false)
+        MUX_CFG(DA830, TM64P0_OUT12,    8,      16,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO5_5,         8,      0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_6,         8,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_7,         8,      8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_8,         8,      12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_9,         8,      16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_10,        8,      20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_11,        8,      24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO5_12,        8,      28,     0xf,    8,      false)
+        MUX_CFG(DA830, NSPI1_SCS_0,     9,      0,      0xf,    1,      false)
+        MUX_CFG(DA830, USB0_DRVVBUS,    9,      4,      0xf,    1,      false)
+        MUX_CFG(DA830, AHCLKX0,         9,      8,      0xf,    1,      false)
+        MUX_CFG(DA830, ACLKX0,          9,      12,     0xf,    1,      false)
+        MUX_CFG(DA830, AFSX0,           9,      16,     0xf,    1,      false)
+        MUX_CFG(DA830, AHCLKR0,         9,      20,     0xf,    1,      false)
+        MUX_CFG(DA830, ACLKR0,          9,      24,     0xf,    1,      false)
+        MUX_CFG(DA830, AFSR0,           9,      28,     0xf,    1,      false)
+        MUX_CFG(DA830, UART2_TXD,       9,      0,      0xf,    2,      false)
+        MUX_CFG(DA830, AHCLKX2,         9,      8,      0xf,    2,      false)
+        MUX_CFG(DA830, ECAP0_APWM0,     9,      12,     0xf,    2,      false)
+        MUX_CFG(DA830, RMII_MHZ_50_CLK, 9,      20,     0xf,    2,      false)
+        MUX_CFG(DA830, ECAP1_APWM1,     9,      24,     0xf,    2,      false)
+        MUX_CFG(DA830, USB_REFCLKIN,    9,      8,      0xf,    4,      false)
+        MUX_CFG(DA830, GPIO5_13,        9,      0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_15,        9,      4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_11,        9,      8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_12,        9,      12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_13,        9,      16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_14,        9,      20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_15,        9,      24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_12,        9,      28,     0xf,    8,      false)
+        MUX_CFG(DA830, AMUTE0,          10,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_0,          10,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_1,          10,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_2,          10,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_3,          10,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_4,          10,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_5,          10,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_6,          10,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, RMII_TXD_0,      10,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, RMII_TXD_1,      10,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, RMII_TXEN,       10,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, RMII_CRS_DV,     10,     16,     0xf,    2,      false)
+        MUX_CFG(DA830, RMII_RXD_0,      10,     20,     0xf,    2,      false)
+        MUX_CFG(DA830, RMII_RXD_1,      10,     24,     0xf,    2,      false)
+        MUX_CFG(DA830, RMII_RXER,       10,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, AFSR2,           10,     4,      0xf,    4,      false)
+        MUX_CFG(DA830, ACLKX2,          10,     8,      0xf,    4,      false)
+        MUX_CFG(DA830, AXR2_3,          10,     12,     0xf,    4,      false)
+        MUX_CFG(DA830, AXR2_2,          10,     16,     0xf,    4,      false)
+        MUX_CFG(DA830, AXR2_1,          10,     20,     0xf,    4,      false)
+        MUX_CFG(DA830, AFSX2,           10,     24,     0xf,    4,      false)
+        MUX_CFG(DA830, ACLKR2,          10,     28,     0xf,    4,      false)
+        MUX_CFG(DA830, NRESETOUT,       10,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_0,         10,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_1,         10,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_2,         10,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_3,         10,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_4,         10,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_5,         10,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_6,         10,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, AXR0_7,          11,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_8,          11,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, UART1_RXD,       11,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, UART1_TXD,       11,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR0_11,         11,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, AHCLKX1,         11,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, ACLKX1,          11,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, AFSX1,           11,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, MDIO_CLK,        11,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, MDIO_D,          11,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, AXR0_9,          11,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, AXR0_10,         11,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, EPWM0B,          11,     20,     0xf,    2,      false)
+        MUX_CFG(DA830, EPWM0A,          11,     24,     0xf,    2,      false)
+        MUX_CFG(DA830, EPWMSYNCI,       11,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, AXR2_0,          11,     16,     0xf,    4,      false)
+        MUX_CFG(DA830, EPWMSYNC0,       11,     28,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO3_7,         11,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_8,         11,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_9,         11,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_10,        11,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_11,        11,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_14,        11,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO3_15,        11,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_10,        11,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, AHCLKR1,         12,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, ACLKR1,          12,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, AFSR1,           12,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, AMUTE1,          12,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_0,          12,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_1,          12,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_2,          12,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_3,          12,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, ECAP2_APWM2,     12,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, EHRPWMGLUETZ,    12,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, EQEP1A,          12,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, GPIO4_11,        12,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_12,        12,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_13,        12,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_14,        12,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_0,         12,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_1,         12,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_2,         12,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_3,         12,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, AXR1_4,          13,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_5,          13,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_6,          13,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_7,          13,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_8,          13,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, AXR1_9,          13,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_0,         13,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_1,         13,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, EQEP1B,          13,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, EPWM2B,          13,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, EPWM2A,          13,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, EPWM1B,          13,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, EPWM1A,          13,     16,     0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_DAT_0,     13,     24,     0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_DAT_1,     13,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_0,       13,     24,     0xf,    4,      false)
+        MUX_CFG(DA830, UHPI_HD_1,       13,     28,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO4_4,         13,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_5,         13,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_6,         13,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_7,         13,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_8,         13,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO4_9,         13,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_0,         13,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_1,         13,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMA_D_2,         14,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_3,         14,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_4,         14,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_5,         14,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_6,         14,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_7,         14,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_8,         14,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_9,         14,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, MMCSD_DAT_2,     14,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_DAT_3,     14,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_DAT_4,     14,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_DAT_5,     14,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_DAT_6,     14,     16,     0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_DAT_7,     14,     20,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_8,       14,     24,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_9,       14,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_2,       14,     0,      0xf,    4,      false)
+        MUX_CFG(DA830, UHPI_HD_3,       14,     4,      0xf,    4,      false)
+        MUX_CFG(DA830, UHPI_HD_4,       14,     8,      0xf,    4,      false)
+        MUX_CFG(DA830, UHPI_HD_5,       14,     12,     0xf,    4,      false)
+        MUX_CFG(DA830, UHPI_HD_6,       14,     16,     0xf,    4,      false)
+        MUX_CFG(DA830, UHPI_HD_7,       14,     20,     0xf,    4,      false)
+        MUX_CFG(DA830, LCD_D_8,         14,     24,     0xf,    4,      false)
+        MUX_CFG(DA830, LCD_D_9,         14,     28,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO0_2,         14,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_3,         14,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_4,         14,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_5,         14,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_6,         14,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_7,         14,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_8,         14,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_9,         14,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMA_D_10,        15,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_11,        15,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_12,        15,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_13,        15,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_14,        15,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_D_15,        15,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_0,         15,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_1,         15,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, UHPI_HD_10,      15,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_11,      15,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_12,      15,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_13,      15,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_14,      15,     16,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HD_15,      15,     20,     0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_7,         15,     24,     0xf,    2,      false)
+        MUX_CFG(DA830, MMCSD_CLK,       15,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_10,        15,     0,      0xf,    4,      false)
+        MUX_CFG(DA830, LCD_D_11,        15,     4,      0xf,    4,      false)
+        MUX_CFG(DA830, LCD_D_12,        15,     8,      0xf,    4,      false)
+        MUX_CFG(DA830, LCD_D_13,        15,     12,     0xf,    4,      false)
+        MUX_CFG(DA830, LCD_D_14,        15,     16,     0xf,    4,      false)
+        MUX_CFG(DA830, LCD_D_15,        15,     20,     0xf,    4,      false)
+        MUX_CFG(DA830, UHPI_HCNTL0,     15,     28,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO0_10,        15,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_11,        15,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_12,        15,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_13,        15,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_14,        15,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO0_15,        15,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_0,         15,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_1,         15,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMA_A_2,         16,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_3,         16,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_4,         16,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_5,         16,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_6,         16,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_7,         16,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_8,         16,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_9,         16,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, MMCSD_CMD,       16,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_6,         16,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_3,         16,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_2,         16,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_1,         16,     16,     0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_0,         16,     20,     0xf,    2,      false)
+        MUX_CFG(DA830, LCD_PCLK,        16,     24,     0xf,    2,      false)
+        MUX_CFG(DA830, LCD_HSYNC,       16,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HCNTL1,     16,     0,      0xf,    4,      false)
+        MUX_CFG(DA830, GPIO1_2,         16,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_3,         16,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_4,         16,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_5,         16,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_6,         16,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_7,         16,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_8,         16,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_9,         16,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMA_A_10,        17,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_11,        17,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_A_12,        17,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, EMA_BA_1,        17,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_BA_0,        17,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_CLK,         17,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, EMA_SDCKE,       17,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_CAS,        17,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, LCD_VSYNC,       17,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, NLCD_AC_ENB_CS,  17,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, LCD_MCLK,        17,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_5,         17,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, LCD_D_4,         17,     16,     0xf,    2,      false)
+        MUX_CFG(DA830, OBSCLK,          17,     20,     0xf,    2,      false)
+        MUX_CFG(DA830, NEMA_CS_4,       17,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HHWIL,      17,     12,     0xf,    4,      false)
+        MUX_CFG(DA830, AHCLKR2,         17,     20,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO1_10,        17,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_11,        17,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_12,        17,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_13,        17,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_14,        17,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO1_15,        17,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_0,         17,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_1,         17,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, NEMA_RAS,        18,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_WE,         18,     4,      0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_CS_0,       18,     8,      0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_CS_2,       18,     12,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_CS_3,       18,     16,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_OE,         18,     20,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_WE_DQM_1,   18,     24,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_WE_DQM_0,   18,     28,     0xf,    1,      false)
+        MUX_CFG(DA830, NEMA_CS_5,       18,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, UHPI_HRNW,       18,     4,      0xf,    2,      false)
+        MUX_CFG(DA830, NUHPI_HAS,       18,     8,      0xf,    2,      false)
+        MUX_CFG(DA830, NUHPI_HCS,       18,     12,     0xf,    2,      false)
+        MUX_CFG(DA830, NUHPI_HDS1,      18,     20,     0xf,    2,      false)
+        MUX_CFG(DA830, NUHPI_HDS2,      18,     24,     0xf,    2,      false)
+        MUX_CFG(DA830, NUHPI_HINT,      18,     28,     0xf,    2,      false)
+        MUX_CFG(DA830, AXR0_12,         18,     4,      0xf,    4,      false)
+        MUX_CFG(DA830, AMUTE2,          18,     16,     0xf,    4,      false)
+        MUX_CFG(DA830, AXR0_13,         18,     20,     0xf,    4,      false)
+        MUX_CFG(DA830, AXR0_14,         18,     24,     0xf,    4,      false)
+        MUX_CFG(DA830, AXR0_15,         18,     28,     0xf,    4,      false)
+        MUX_CFG(DA830, GPIO2_2,         18,     0,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_3,         18,     4,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_4,         18,     8,      0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_5,         18,     12,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_6,         18,     16,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_7,         18,     20,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_8,         18,     24,     0xf,    8,      false)
+        MUX_CFG(DA830, GPIO2_9,         18,     28,     0xf,    8,      false)
+        MUX_CFG(DA830, EMA_WAIT_0,      19,     0,      0xf,    1,      false)
+        MUX_CFG(DA830, NUHPI_HRDY,      19,     0,      0xf,    2,      false)
+        MUX_CFG(DA830, GPIO2_10,        19,     0,      0xf,    8,      false)
+#endif
+};
+
+const short da830_emif25_pins[] __initdata = {
+        DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
+        DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
+        DA830_EMA_D_8, DA830_EMA_D_9, DA830_EMA_D_10, DA830_EMA_D_11,
+        DA830_EMA_D_12, DA830_EMA_D_13, DA830_EMA_D_14, DA830_EMA_D_15,
+        DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
+        DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
+        DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
+        DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_EMA_CLK,
+        DA830_EMA_SDCKE, DA830_NEMA_CS_4, DA830_NEMA_CS_5, DA830_NEMA_WE,
+        DA830_NEMA_CS_0, DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE,
+        DA830_NEMA_WE_DQM_1, DA830_NEMA_WE_DQM_0, DA830_EMA_WAIT_0,
+        -1
+};
+
+const short da830_spi0_pins[] __initdata = {
+        DA830_SPI0_SOMI_0, DA830_SPI0_SIMO_0, DA830_SPI0_CLK, DA830_NSPI0_ENA,
+        DA830_NSPI0_SCS_0,
+        -1
+};
+
+const short da830_spi1_pins[] __initdata = {
+        DA830_SPI1_SOMI_0, DA830_SPI1_SIMO_0, DA830_SPI1_CLK, DA830_NSPI1_ENA,
+        DA830_NSPI1_SCS_0,
+        -1
+};
+
+const short da830_mmc_sd_pins[] __initdata = {
+        DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
+        DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
+        DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
+        DA830_MMCSD_CMD,
+        -1
+};
+
+const short da830_uart0_pins[] __initdata = {
+        DA830_NUART0_CTS, DA830_NUART0_RTS, DA830_UART0_RXD, DA830_UART0_TXD,
+        -1
+};
+
+const short da830_uart1_pins[] __initdata = {
+        DA830_UART1_RXD, DA830_UART1_TXD,
+        -1
+};
+
+const short da830_uart2_pins[] __initdata = {
+        DA830_UART2_RXD, DA830_UART2_TXD,
+        -1
+};
+
+const short da830_usb20_pins[] __initdata = {
+        DA830_USB0_DRVVBUS, DA830_USB_REFCLKIN,
+        -1
+};
+
+const short da830_usb11_pins[] __initdata = {
+        DA830_USB_REFCLKIN,
+        -1
+};
+
+const short da830_uhpi_pins[] __initdata = {
+        DA830_UHPI_HD_0, DA830_UHPI_HD_1, DA830_UHPI_HD_2, DA830_UHPI_HD_3,
+        DA830_UHPI_HD_4, DA830_UHPI_HD_5, DA830_UHPI_HD_6, DA830_UHPI_HD_7,
+        DA830_UHPI_HD_8, DA830_UHPI_HD_9, DA830_UHPI_HD_10, DA830_UHPI_HD_11,
+        DA830_UHPI_HD_12, DA830_UHPI_HD_13, DA830_UHPI_HD_14, DA830_UHPI_HD_15,
+        DA830_UHPI_HCNTL0, DA830_UHPI_HCNTL1, DA830_UHPI_HHWIL, DA830_UHPI_HRNW,
+        DA830_NUHPI_HAS, DA830_NUHPI_HCS, DA830_NUHPI_HDS1, DA830_NUHPI_HDS2,
+        DA830_NUHPI_HINT, DA830_NUHPI_HRDY,
+        -1
+};
+
+const short da830_cpgmac_pins[] __initdata = {
+        DA830_RMII_TXD_0, DA830_RMII_TXD_1, DA830_RMII_TXEN, DA830_RMII_CRS_DV,
+        DA830_RMII_RXD_0, DA830_RMII_RXD_1, DA830_RMII_RXER, DA830_MDIO_CLK,
+        DA830_MDIO_D,
+        -1
+};
+
+const short da830_emif3c_pins[] __initdata = {
+        DA830_EMB_SDCKE, DA830_EMB_CLK_GLUE, DA830_EMB_CLK, DA830_NEMB_CS_0,
+        DA830_NEMB_CAS, DA830_NEMB_RAS, DA830_NEMB_WE, DA830_EMB_BA_1,
+        DA830_EMB_BA_0, DA830_EMB_A_0, DA830_EMB_A_1, DA830_EMB_A_2,
+        DA830_EMB_A_3, DA830_EMB_A_4, DA830_EMB_A_5, DA830_EMB_A_6,
+        DA830_EMB_A_7, DA830_EMB_A_8, DA830_EMB_A_9, DA830_EMB_A_10,
+        DA830_EMB_A_11, DA830_EMB_A_12, DA830_NEMB_WE_DQM_3,
+        DA830_NEMB_WE_DQM_2, DA830_EMB_D_0, DA830_EMB_D_1, DA830_EMB_D_2,
+        DA830_EMB_D_3, DA830_EMB_D_4, DA830_EMB_D_5, DA830_EMB_D_6,
+        DA830_EMB_D_7, DA830_EMB_D_8, DA830_EMB_D_9, DA830_EMB_D_10,
+        DA830_EMB_D_11, DA830_EMB_D_12, DA830_EMB_D_13, DA830_EMB_D_14,
+        DA830_EMB_D_15, DA830_EMB_D_16, DA830_EMB_D_17, DA830_EMB_D_18,
+        DA830_EMB_D_19, DA830_EMB_D_20, DA830_EMB_D_21, DA830_EMB_D_22,
+        DA830_EMB_D_23, DA830_EMB_D_24, DA830_EMB_D_25, DA830_EMB_D_26,
+        DA830_EMB_D_27, DA830_EMB_D_28, DA830_EMB_D_29, DA830_EMB_D_30,
+        DA830_EMB_D_31, DA830_NEMB_WE_DQM_1, DA830_NEMB_WE_DQM_0,
+        -1
+};
+
+const short da830_mcasp0_pins[] __initdata = {
+        DA830_AHCLKX0, DA830_ACLKX0, DA830_AFSX0,
+        DA830_AHCLKR0, DA830_ACLKR0, DA830_AFSR0, DA830_AMUTE0,
+        DA830_AXR0_0, DA830_AXR0_1, DA830_AXR0_2, DA830_AXR0_3,
+        DA830_AXR0_4, DA830_AXR0_5, DA830_AXR0_6, DA830_AXR0_7,
+        DA830_AXR0_8, DA830_AXR0_9, DA830_AXR0_10, DA830_AXR0_11,
+        DA830_AXR0_12, DA830_AXR0_13, DA830_AXR0_14, DA830_AXR0_15,
+        -1
+};
+
+const short da830_mcasp1_pins[] __initdata = {
+        DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1,
+        DA830_AHCLKR1, DA830_ACLKR1, DA830_AFSR1, DA830_AMUTE1,
+        DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_3,
+        DA830_AXR1_4, DA830_AXR1_5, DA830_AXR1_6, DA830_AXR1_7,
+        DA830_AXR1_8, DA830_AXR1_9, DA830_AXR1_10, DA830_AXR1_11,
+        -1
+};
+
+const short da830_mcasp2_pins[] __initdata = {
+        DA830_AHCLKX2, DA830_ACLKX2, DA830_AFSX2,
+        DA830_AHCLKR2, DA830_ACLKR2, DA830_AFSR2, DA830_AMUTE2,
+        DA830_AXR2_0, DA830_AXR2_1, DA830_AXR2_2, DA830_AXR2_3,
+        -1
+};
+
+const short da830_i2c0_pins[] __initdata = {
+        DA830_I2C0_SDA, DA830_I2C0_SCL,
+        -1
+};
+
+const short da830_i2c1_pins[] __initdata = {
+        DA830_I2C1_SCL, DA830_I2C1_SDA,
+        -1
+};
+
+const short da830_lcdcntl_pins[] __initdata = {
+        DA830_LCD_D_0, DA830_LCD_D_1, DA830_LCD_D_2, DA830_LCD_D_3,
+        DA830_LCD_D_4, DA830_LCD_D_5, DA830_LCD_D_6, DA830_LCD_D_7,
+        DA830_LCD_D_8, DA830_LCD_D_9, DA830_LCD_D_10, DA830_LCD_D_11,
+        DA830_LCD_D_12, DA830_LCD_D_13, DA830_LCD_D_14, DA830_LCD_D_15,
+        DA830_LCD_PCLK, DA830_LCD_HSYNC, DA830_LCD_VSYNC, DA830_NLCD_AC_ENB_CS,
+        DA830_LCD_MCLK,
+        -1
+};
+
+const short da830_pwm_pins[] __initdata = {
+        DA830_ECAP0_APWM0, DA830_ECAP1_APWM1, DA830_EPWM0B, DA830_EPWM0A,
+        DA830_EPWMSYNCI, DA830_EPWMSYNC0, DA830_ECAP2_APWM2, DA830_EHRPWMGLUETZ,
+        DA830_EPWM2B, DA830_EPWM2A, DA830_EPWM1B, DA830_EPWM1A,
+        -1
+};
+
+const short da830_ecap0_pins[] __initdata = {
+        DA830_ECAP0_APWM0,
+        -1
+};
+
+const short da830_ecap1_pins[] __initdata = {
+        DA830_ECAP1_APWM1,
+        -1
+};
+
+const short da830_ecap2_pins[] __initdata = {
+        DA830_ECAP2_APWM2,
+        -1
+};
+
+const short da830_eqep0_pins[] __initdata = {
+        DA830_EQEP0I, DA830_EQEP0S, DA830_EQEP0A, DA830_EQEP0B,
+        -1
+};
+
+const short da830_eqep1_pins[] __initdata = {
+        DA830_EQEP1I, DA830_EQEP1S, DA830_EQEP1A, DA830_EQEP1B,
+        -1
+};
+
+/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
+static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
+        [IRQ_DA8XX_COMMTX]              = 7,
+        [IRQ_DA8XX_COMMRX]              = 7,
+        [IRQ_DA8XX_NINT]                = 7,
+        [IRQ_DA8XX_EVTOUT0]             = 7,
+        [IRQ_DA8XX_EVTOUT1]             = 7,
+        [IRQ_DA8XX_EVTOUT2]             = 7,
+        [IRQ_DA8XX_EVTOUT3]             = 7,
+        [IRQ_DA8XX_EVTOUT4]             = 7,
+        [IRQ_DA8XX_EVTOUT5]             = 7,
+        [IRQ_DA8XX_EVTOUT6]             = 7,
+        [IRQ_DA8XX_EVTOUT6]             = 7,
+        [IRQ_DA8XX_EVTOUT7]             = 7,
+        [IRQ_DA8XX_CCINT0]              = 7,
+        [IRQ_DA8XX_CCERRINT]            = 7,
+        [IRQ_DA8XX_TCERRINT0]           = 7,
+        [IRQ_DA8XX_AEMIFINT]            = 7,
+        [IRQ_DA8XX_I2CINT0]             = 7,
+        [IRQ_DA8XX_MMCSDINT0]           = 7,
+        [IRQ_DA8XX_MMCSDINT1]           = 7,
+        [IRQ_DA8XX_ALLINT0]             = 7,
+        [IRQ_DA8XX_RTC]                 = 7,
+        [IRQ_DA8XX_SPINT0]              = 7,
+        [IRQ_DA8XX_TINT12_0]            = 7,
+        [IRQ_DA8XX_TINT34_0]            = 7,
+        [IRQ_DA8XX_TINT12_1]            = 7,
+        [IRQ_DA8XX_TINT34_1]            = 7,
+        [IRQ_DA8XX_UARTINT0]            = 7,
+        [IRQ_DA8XX_KEYMGRINT]           = 7,
+        [IRQ_DA8XX_SECINT]              = 7,
+        [IRQ_DA8XX_SECKEYERR]           = 7,
+        [IRQ_DA830_MPUERR]              = 7,
+        [IRQ_DA830_IOPUERR]             = 7,
+        [IRQ_DA830_BOOTCFGERR]          = 7,
+        [IRQ_DA8XX_CHIPINT0]            = 7,
+        [IRQ_DA8XX_CHIPINT1]            = 7,
+        [IRQ_DA8XX_CHIPINT2]            = 7,
+        [IRQ_DA8XX_CHIPINT3]            = 7,
+        [IRQ_DA8XX_TCERRINT1]           = 7,
+        [IRQ_DA8XX_C0_RX_THRESH_PULSE]  = 7,
+        [IRQ_DA8XX_C0_RX_PULSE]         = 7,
+        [IRQ_DA8XX_C0_TX_PULSE]         = 7,
+        [IRQ_DA8XX_C0_MISC_PULSE]       = 7,
+        [IRQ_DA8XX_C1_RX_THRESH_PULSE]  = 7,
+        [IRQ_DA8XX_C1_RX_PULSE]         = 7,
+        [IRQ_DA8XX_C1_TX_PULSE]         = 7,
+        [IRQ_DA8XX_C1_MISC_PULSE]       = 7,
+        [IRQ_DA8XX_MEMERR]              = 7,
+        [IRQ_DA8XX_GPIO0]               = 7,
+        [IRQ_DA8XX_GPIO1]               = 7,
+        [IRQ_DA8XX_GPIO2]               = 7,
+        [IRQ_DA8XX_GPIO3]               = 7,
+        [IRQ_DA8XX_GPIO4]               = 7,
+        [IRQ_DA8XX_GPIO5]               = 7,
+        [IRQ_DA8XX_GPIO6]               = 7,
+        [IRQ_DA8XX_GPIO7]               = 7,
+        [IRQ_DA8XX_GPIO8]               = 7,
+        [IRQ_DA8XX_I2CINT1]             = 7,
+        [IRQ_DA8XX_LCDINT]              = 7,
+        [IRQ_DA8XX_UARTINT1]            = 7,
+        [IRQ_DA8XX_MCASPINT]            = 7,
+        [IRQ_DA8XX_ALLINT1]             = 7,
+        [IRQ_DA8XX_SPINT1]              = 7,
+        [IRQ_DA8XX_UHPI_INT1]           = 7,
+        [IRQ_DA8XX_USB_INT]             = 7,
+        [IRQ_DA8XX_IRQN]                = 7,
+        [IRQ_DA8XX_RWAKEUP]             = 7,
+        [IRQ_DA8XX_UARTINT2]            = 7,
+        [IRQ_DA8XX_DFTSSINT]            = 7,
+        [IRQ_DA8XX_EHRPWM0]             = 7,
+        [IRQ_DA8XX_EHRPWM0TZ]           = 7,
+        [IRQ_DA8XX_EHRPWM1]             = 7,
+        [IRQ_DA8XX_EHRPWM1TZ]           = 7,
+        [IRQ_DA830_EHRPWM2]             = 7,
+        [IRQ_DA830_EHRPWM2TZ]           = 7,
+        [IRQ_DA8XX_ECAP0]               = 7,
+        [IRQ_DA8XX_ECAP1]               = 7,
+        [IRQ_DA8XX_ECAP2]               = 7,
+        [IRQ_DA830_EQEP0]               = 7,
+        [IRQ_DA830_EQEP1]               = 7,
+        [IRQ_DA830_T12CMPINT0_0]        = 7,
+        [IRQ_DA830_T12CMPINT1_0]        = 7,
+        [IRQ_DA830_T12CMPINT2_0]        = 7,
+        [IRQ_DA830_T12CMPINT3_0]        = 7,
+        [IRQ_DA830_T12CMPINT4_0]        = 7,
+        [IRQ_DA830_T12CMPINT5_0]        = 7,
+        [IRQ_DA830_T12CMPINT6_0]        = 7,
+        [IRQ_DA830_T12CMPINT7_0]        = 7,
+        [IRQ_DA830_T12CMPINT0_1]        = 7,
+        [IRQ_DA830_T12CMPINT1_1]        = 7,
+        [IRQ_DA830_T12CMPINT2_1]        = 7,
+        [IRQ_DA830_T12CMPINT3_1]        = 7,
+        [IRQ_DA830_T12CMPINT4_1]        = 7,
+        [IRQ_DA830_T12CMPINT5_1]        = 7,
+        [IRQ_DA830_T12CMPINT6_1]        = 7,
+        [IRQ_DA830_T12CMPINT7_1]        = 7,
+        [IRQ_DA8XX_ARMCLKSTOPREQ]       = 7,
+};
+
+static struct map_desc da830_io_desc[] = {
+        {
+                .virtual        = IO_VIRT,
+                .pfn            = __phys_to_pfn(IO_PHYS),
+                .length         = IO_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
+                .virtual        = DA8XX_CP_INTC_VIRT,
+                .pfn            = __phys_to_pfn(DA8XX_CP_INTC_BASE),
+                .length         = DA8XX_CP_INTC_SIZE,
+                .type           = MT_DEVICE
+        },
+};
+
+static void __iomem *da830_psc_bases[] = {
+        IO_ADDRESS(DA8XX_PSC0_BASE),
+        IO_ADDRESS(DA8XX_PSC1_BASE),
+};
+
+/* Contents of JTAG ID register used to identify exact cpu type */
+static struct davinci_id da830_ids[] = {
+        {
+                .variant        = 0x0,
+                .part_no        = 0xb7df,
+                .manufacturer   = 0x017,        /* 0x02f >> 1 */
+                .cpu_id         = DAVINCI_CPU_ID_DA830,
+                .name           = "da830/omap l137",
+        },
+};
+
+static struct davinci_timer_instance da830_timer_instance[2] = {
+        {
+                .base           = IO_ADDRESS(DA8XX_TIMER64P0_BASE),
+                .bottom_irq     = IRQ_DA8XX_TINT12_0,
+                .top_irq        = IRQ_DA8XX_TINT34_0,
+                .cmp_off        = DA830_CMP12_0,
+                .cmp_irq        = IRQ_DA830_T12CMPINT0_0,
+        },
+        {
+                .base           = IO_ADDRESS(DA8XX_TIMER64P1_BASE),
+                .bottom_irq     = IRQ_DA8XX_TINT12_1,
+                .top_irq        = IRQ_DA8XX_TINT34_1,
+                .cmp_off        = DA830_CMP12_0,
+                .cmp_irq        = IRQ_DA830_T12CMPINT0_1,
+        },
+};
+
+/*
+ * T0_BOT: Timer 0, bottom              : Used for clock_event & clocksource
+ * T0_TOP: Timer 0, top                 : Used by DSP
+ * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
+ */
+static struct davinci_timer_info da830_timer_info = {
+        .timers         = da830_timer_instance,
+        .clockevent_id  = T0_BOT,
+        .clocksource_id = T0_BOT,
+};
+
+static struct davinci_soc_info davinci_soc_info_da830 = {
+        .io_desc                = da830_io_desc,
+        .io_desc_num            = ARRAY_SIZE(da830_io_desc),
+        .jtag_id_base           = IO_ADDRESS(DA8XX_JTAG_ID_REG),
+        .ids                    = da830_ids,
+        .ids_num                = ARRAY_SIZE(da830_ids),
+        .cpu_clks               = da830_clks,
+        .psc_bases              = da830_psc_bases,
+        .psc_bases_num          = ARRAY_SIZE(da830_psc_bases),
+        .pinmux_base            = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120),
+        .pinmux_pins            = da830_pins,
+        .pinmux_pins_num        = ARRAY_SIZE(da830_pins),
+        .intc_base              = (void __iomem *)DA8XX_CP_INTC_VIRT,
+        .intc_type              = DAVINCI_INTC_TYPE_CP_INTC,
+        .intc_irq_prios         = da830_default_priorities,
+        .intc_irq_num           = DA830_N_CP_INTC_IRQ,
+        .timer_info             = &da830_timer_info,
+        .gpio_base              = IO_ADDRESS(DA8XX_GPIO_BASE),
+        .gpio_num               = 128,
+        .gpio_irq               = IRQ_DA8XX_GPIO0,
+        .serial_dev             = &da8xx_serial_device,
+        .emac_pdata             = &da8xx_emac_pdata,
+};
+
+void __init da830_init(void)
+{
+        davinci_common_init(&davinci_soc_info_da830);
+}
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
new file mode 100644
index 000000000000..192d719a47df
--- /dev/null
+++ b/arch/arm/mach-davinci/da850.c
@@ -0,0 +1,820 @@
+/*
+ * TI DA850/OMAP-L138 chip specific setup
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Derived from: arch/arm/mach-davinci/da830.c
+ * Original Copyrights follow:
+ *
+ * 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/clock.h>
+#include <mach/psc.h>
+#include <mach/mux.h>
+#include <mach/irqs.h>
+#include <mach/cputype.h>
+#include <mach/common.h>
+#include <mach/time.h>
+#include <mach/da8xx.h>
+
+#include "clock.h"
+#include "mux.h"
+
+#define DA850_PLL1_BASE         0x01e1a000
+#define DA850_TIMER64P2_BASE    0x01f0c000
+#define DA850_TIMER64P3_BASE    0x01f0d000
+
+#define DA850_REF_FREQ          24000000
+
+static struct pll_data pll0_data = {
+        .num            = 1,
+        .phys_base      = DA8XX_PLL0_BASE,
+        .flags          = PLL_HAS_PREDIV | PLL_HAS_POSTDIV,
+};
+
+static struct clk ref_clk = {
+        .name           = "ref_clk",
+        .rate           = DA850_REF_FREQ,
+};
+
+static struct clk pll0_clk = {
+        .name           = "pll0",
+        .parent         = &ref_clk,
+        .pll_data       = &pll0_data,
+        .flags          = CLK_PLL,
+};
+
+static struct clk pll0_aux_clk = {
+        .name           = "pll0_aux_clk",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+};
+
+static struct clk pll0_sysclk2 = {
+        .name           = "pll0_sysclk2",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV2,
+};
+
+static struct clk pll0_sysclk3 = {
+        .name           = "pll0_sysclk3",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV3,
+};
+
+static struct clk pll0_sysclk4 = {
+        .name           = "pll0_sysclk4",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV4,
+};
+
+static struct clk pll0_sysclk5 = {
+        .name           = "pll0_sysclk5",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV5,
+};
+
+static struct clk pll0_sysclk6 = {
+        .name           = "pll0_sysclk6",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV6,
+};
+
+static struct clk pll0_sysclk7 = {
+        .name           = "pll0_sysclk7",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV7,
+};
+
+static struct pll_data pll1_data = {
+        .num            = 2,
+        .phys_base      = DA850_PLL1_BASE,
+        .flags          = PLL_HAS_POSTDIV,
+};
+
+static struct clk pll1_clk = {
+        .name           = "pll1",
+        .parent         = &ref_clk,
+        .pll_data       = &pll1_data,
+        .flags          = CLK_PLL,
+};
+
+static struct clk pll1_aux_clk = {
+        .name           = "pll1_aux_clk",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+};
+
+static struct clk pll1_sysclk2 = {
+        .name           = "pll1_sysclk2",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV2,
+};
+
+static struct clk pll1_sysclk3 = {
+        .name           = "pll1_sysclk3",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV3,
+};
+
+static struct clk pll1_sysclk4 = {
+        .name           = "pll1_sysclk4",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV4,
+};
+
+static struct clk pll1_sysclk5 = {
+        .name           = "pll1_sysclk5",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV5,
+};
+
+static struct clk pll1_sysclk6 = {
+        .name           = "pll0_sysclk6",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV6,
+};
+
+static struct clk pll1_sysclk7 = {
+        .name           = "pll1_sysclk7",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV7,
+};
+
+static struct clk i2c0_clk = {
+        .name           = "i2c0",
+        .parent         = &pll0_aux_clk,
+};
+
+static struct clk timerp64_0_clk = {
+        .name           = "timer0",
+        .parent         = &pll0_aux_clk,
+};
+
+static struct clk timerp64_1_clk = {
+        .name           = "timer1",
+        .parent         = &pll0_aux_clk,
+};
+
+static struct clk arm_rom_clk = {
+        .name           = "arm_rom",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_ARM_RAM_ROM,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk tpcc0_clk = {
+        .name           = "tpcc0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_TPCC,
+        .flags          = ALWAYS_ENABLED | CLK_PSC,
+};
+
+static struct clk tptc0_clk = {
+        .name           = "tptc0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_TPTC0,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk tptc1_clk = {
+        .name           = "tptc1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_TPTC1,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk tpcc1_clk = {
+        .name           = "tpcc1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA850_LPSC1_TPCC1,
+        .flags          = CLK_PSC | ALWAYS_ENABLED,
+        .psc_ctlr       = 1,
+};
+
+static struct clk tptc2_clk = {
+        .name           = "tptc2",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA850_LPSC1_TPTC2,
+        .flags          = ALWAYS_ENABLED,
+        .psc_ctlr       = 1,
+};
+
+static struct clk uart0_clk = {
+        .name           = "uart0",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_UART0,
+};
+
+static struct clk uart1_clk = {
+        .name           = "uart1",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_UART1,
+        .psc_ctlr       = 1,
+};
+
+static struct clk uart2_clk = {
+        .name           = "uart2",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_UART2,
+        .psc_ctlr       = 1,
+};
+
+static struct clk aintc_clk = {
+        .name           = "aintc",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC0_AINTC,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk gpio_clk = {
+        .name           = "gpio",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_GPIO,
+        .psc_ctlr       = 1,
+};
+
+static struct clk i2c1_clk = {
+        .name           = "i2c1",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_I2C,
+        .psc_ctlr       = 1,
+};
+
+static struct clk emif3_clk = {
+        .name           = "emif3",
+        .parent         = &pll0_sysclk5,
+        .lpsc           = DA8XX_LPSC1_EMIF3C,
+        .flags          = ALWAYS_ENABLED,
+        .psc_ctlr       = 1,
+};
+
+static struct clk arm_clk = {
+        .name           = "arm",
+        .parent         = &pll0_sysclk6,
+        .lpsc           = DA8XX_LPSC0_ARM,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk rmii_clk = {
+        .name           = "rmii",
+        .parent         = &pll0_sysclk7,
+};
+
+static struct clk emac_clk = {
+        .name           = "emac",
+        .parent         = &pll0_sysclk4,
+        .lpsc           = DA8XX_LPSC1_CPGMAC,
+        .psc_ctlr       = 1,
+};
+
+static struct clk mcasp_clk = {
+        .name           = "mcasp",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_McASP0,
+        .psc_ctlr       = 1,
+};
+
+static struct clk lcdc_clk = {
+        .name           = "lcdc",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC1_LCDC,
+        .psc_ctlr       = 1,
+};
+
+static struct clk mmcsd_clk = {
+        .name           = "mmcsd",
+        .parent         = &pll0_sysclk2,
+        .lpsc           = DA8XX_LPSC0_MMC_SD,
+};
+
+static struct clk aemif_clk = {
+        .name           = "aemif",
+        .parent         = &pll0_sysclk3,
+        .lpsc           = DA8XX_LPSC0_EMIF25,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct davinci_clk da850_clks[] = {
+        CLK(NULL,               "ref",          &ref_clk),
+        CLK(NULL,               "pll0",         &pll0_clk),
+        CLK(NULL,               "pll0_aux",     &pll0_aux_clk),
+        CLK(NULL,               "pll0_sysclk2", &pll0_sysclk2),
+        CLK(NULL,               "pll0_sysclk3", &pll0_sysclk3),
+        CLK(NULL,               "pll0_sysclk4", &pll0_sysclk4),
+        CLK(NULL,               "pll0_sysclk5", &pll0_sysclk5),
+        CLK(NULL,               "pll0_sysclk6", &pll0_sysclk6),
+        CLK(NULL,               "pll0_sysclk7", &pll0_sysclk7),
+        CLK(NULL,               "pll1",         &pll1_clk),
+        CLK(NULL,               "pll1_aux",     &pll1_aux_clk),
+        CLK(NULL,               "pll1_sysclk2", &pll1_sysclk2),
+        CLK(NULL,               "pll1_sysclk3", &pll1_sysclk3),
+        CLK(NULL,               "pll1_sysclk4", &pll1_sysclk4),
+        CLK(NULL,               "pll1_sysclk5", &pll1_sysclk5),
+        CLK(NULL,               "pll1_sysclk6", &pll1_sysclk6),
+        CLK(NULL,               "pll1_sysclk7", &pll1_sysclk7),
+        CLK("i2c_davinci.1",    NULL,           &i2c0_clk),
+        CLK(NULL,               "timer0",       &timerp64_0_clk),
+        CLK("watchdog",         NULL,           &timerp64_1_clk),
+        CLK(NULL,               "arm_rom",      &arm_rom_clk),
+        CLK(NULL,               "tpcc0",        &tpcc0_clk),
+        CLK(NULL,               "tptc0",        &tptc0_clk),
+        CLK(NULL,               "tptc1",        &tptc1_clk),
+        CLK(NULL,               "tpcc1",        &tpcc1_clk),
+        CLK(NULL,               "tptc2",        &tptc2_clk),
+        CLK(NULL,               "uart0",        &uart0_clk),
+        CLK(NULL,               "uart1",        &uart1_clk),
+        CLK(NULL,               "uart2",        &uart2_clk),
+        CLK(NULL,               "aintc",        &aintc_clk),
+        CLK(NULL,               "gpio",         &gpio_clk),
+        CLK("i2c_davinci.2",    NULL,           &i2c1_clk),
+        CLK(NULL,               "emif3",        &emif3_clk),
+        CLK(NULL,               "arm",          &arm_clk),
+        CLK(NULL,               "rmii",         &rmii_clk),
+        CLK("davinci_emac.1",   NULL,           &emac_clk),
+        CLK("davinci-mcasp.0",  NULL,           &mcasp_clk),
+        CLK("da8xx_lcdc.0",     NULL,           &lcdc_clk),
+        CLK("davinci_mmc.0",    NULL,           &mmcsd_clk),
+        CLK(NULL,               "aemif",        &aemif_clk),
+        CLK(NULL,               NULL,           NULL),
+};
+
+/*
+ * Device specific mux setup
+ *
+ *              soc     description     mux     mode    mode    mux     dbg
+ *                                      reg     offset  mask    mode
+ */
+static const struct mux_config da850_pins[] = {
+#ifdef CONFIG_DAVINCI_MUX
+        /* UART0 function */
+        MUX_CFG(DA850, NUART0_CTS,      3,      24,     15,     2,      false)
+        MUX_CFG(DA850, NUART0_RTS,      3,      28,     15,     2,      false)
+        MUX_CFG(DA850, UART0_RXD,       3,      16,     15,     2,      false)
+        MUX_CFG(DA850, UART0_TXD,       3,      20,     15,     2,      false)
+        /* UART1 function */
+        MUX_CFG(DA850, UART1_RXD,       4,      24,     15,     2,      false)
+        MUX_CFG(DA850, UART1_TXD,       4,      28,     15,     2,      false)
+        /* UART2 function */
+        MUX_CFG(DA850, UART2_RXD,       4,      16,     15,     2,      false)
+        MUX_CFG(DA850, UART2_TXD,       4,      20,     15,     2,      false)
+        /* I2C1 function */
+        MUX_CFG(DA850, I2C1_SCL,        4,      16,     15,     4,      false)
+        MUX_CFG(DA850, I2C1_SDA,        4,      20,     15,     4,      false)
+        /* I2C0 function */
+        MUX_CFG(DA850, I2C0_SDA,        4,      12,     15,     2,      false)
+        MUX_CFG(DA850, I2C0_SCL,        4,      8,      15,     2,      false)
+        /* EMAC function */
+        MUX_CFG(DA850, MII_TXEN,        2,      4,      15,     8,      false)
+        MUX_CFG(DA850, MII_TXCLK,       2,      8,      15,     8,      false)
+        MUX_CFG(DA850, MII_COL,         2,      12,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_3,       2,      16,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_2,       2,      20,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_1,       2,      24,     15,     8,      false)
+        MUX_CFG(DA850, MII_TXD_0,       2,      28,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXCLK,       3,      0,      15,     8,      false)
+        MUX_CFG(DA850, MII_RXDV,        3,      4,      15,     8,      false)
+        MUX_CFG(DA850, MII_RXER,        3,      8,      15,     8,      false)
+        MUX_CFG(DA850, MII_CRS,         3,      12,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_3,       3,      16,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_2,       3,      20,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_1,       3,      24,     15,     8,      false)
+        MUX_CFG(DA850, MII_RXD_0,       3,      28,     15,     8,      false)
+        MUX_CFG(DA850, MDIO_CLK,        4,      0,      15,     8,      false)
+        MUX_CFG(DA850, MDIO_D,          4,      4,      15,     8,      false)
+        /* McASP function */
+        MUX_CFG(DA850,  ACLKR,          0,      0,      15,     1,      false)
+        MUX_CFG(DA850,  ACLKX,          0,      4,      15,     1,      false)
+        MUX_CFG(DA850,  AFSR,           0,      8,      15,     1,      false)
+        MUX_CFG(DA850,  AFSX,           0,      12,     15,     1,      false)
+        MUX_CFG(DA850,  AHCLKR,         0,      16,     15,     1,      false)
+        MUX_CFG(DA850,  AHCLKX,         0,      20,     15,     1,      false)
+        MUX_CFG(DA850,  AMUTE,          0,      24,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_15,         1,      0,      15,     1,      false)
+        MUX_CFG(DA850,  AXR_14,         1,      4,      15,     1,      false)
+        MUX_CFG(DA850,  AXR_13,         1,      8,      15,     1,      false)
+        MUX_CFG(DA850,  AXR_12,         1,      12,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_11,         1,      16,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_10,         1,      20,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_9,          1,      24,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_8,          1,      28,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_7,          2,      0,      15,     1,      false)
+        MUX_CFG(DA850,  AXR_6,          2,      4,      15,     1,      false)
+        MUX_CFG(DA850,  AXR_5,          2,      8,      15,     1,      false)
+        MUX_CFG(DA850,  AXR_4,          2,      12,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_3,          2,      16,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_2,          2,      20,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_1,          2,      24,     15,     1,      false)
+        MUX_CFG(DA850,  AXR_0,          2,      28,     15,     1,      false)
+        /* LCD function */
+        MUX_CFG(DA850, LCD_D_7,         16,     8,      15,     2,      false)
+        MUX_CFG(DA850, LCD_D_6,         16,     12,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_5,         16,     16,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_4,         16,     20,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_3,         16,     24,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_2,         16,     28,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_1,         17,     0,      15,     2,      false)
+        MUX_CFG(DA850, LCD_D_0,         17,     4,      15,     2,      false)
+        MUX_CFG(DA850, LCD_D_15,        17,     8,      15,     2,      false)
+        MUX_CFG(DA850, LCD_D_14,        17,     12,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_13,        17,     16,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_12,        17,     20,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_11,        17,     24,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_10,        17,     28,     15,     2,      false)
+        MUX_CFG(DA850, LCD_D_9,         18,     0,      15,     2,      false)
+        MUX_CFG(DA850, LCD_D_8,         18,     4,      15,     2,      false)
+        MUX_CFG(DA850, LCD_PCLK,        18,     24,     15,     2,      false)
+        MUX_CFG(DA850, LCD_HSYNC,       19,     0,      15,     2,      false)
+        MUX_CFG(DA850, LCD_VSYNC,       19,     4,      15,     2,      false)
+        MUX_CFG(DA850, NLCD_AC_ENB_CS,  19,     24,     15,     2,      false)
+        /* MMC/SD0 function */
+        MUX_CFG(DA850, MMCSD0_DAT_0,    10,     8,      15,     2,      false)
+        MUX_CFG(DA850, MMCSD0_DAT_1,    10,     12,     15,     2,      false)
+        MUX_CFG(DA850, MMCSD0_DAT_2,    10,     16,     15,     2,      false)
+        MUX_CFG(DA850, MMCSD0_DAT_3,    10,     20,     15,     2,      false)
+        MUX_CFG(DA850, MMCSD0_CLK,      10,     0,      15,     2,      false)
+        MUX_CFG(DA850, MMCSD0_CMD,      10,     4,      15,     2,      false)
+        /* EMIF2.5/EMIFA function */
+        MUX_CFG(DA850, EMA_D_7,         9,      0,      15,     1,      false)
+        MUX_CFG(DA850, EMA_D_6,         9,      4,      15,     1,      false)
+        MUX_CFG(DA850, EMA_D_5,         9,      8,      15,     1,      false)
+        MUX_CFG(DA850, EMA_D_4,         9,      12,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_3,         9,      16,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_2,         9,      20,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_1,         9,      24,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_0,         9,      28,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_1,         12,     24,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_2,         12,     20,     15,     1,      false)
+        MUX_CFG(DA850, NEMA_CS_3,       7,      4,      15,     1,      false)
+        MUX_CFG(DA850, NEMA_CS_4,       7,      8,      15,     1,      false)
+        MUX_CFG(DA850, NEMA_WE,         7,      16,     15,     1,      false)
+        MUX_CFG(DA850, NEMA_OE,         7,      20,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_0,         12,     28,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_3,         12,     16,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_4,         12,     12,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_5,         12,     8,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_6,         12,     4,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_7,         12,     0,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_8,         11,     28,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_9,         11,     24,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_10,        11,     20,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_11,        11,     16,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_12,        11,     12,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_13,        11,     8,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_14,        11,     4,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_15,        11,     0,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_16,        10,     28,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_17,        10,     24,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_18,        10,     20,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_19,        10,     16,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_20,        10,     12,     15,     1,      false)
+        MUX_CFG(DA850, EMA_A_21,        10,     8,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_22,        10,     4,      15,     1,      false)
+        MUX_CFG(DA850, EMA_A_23,        10,     0,      15,     1,      false)
+        MUX_CFG(DA850, EMA_D_8,         8,      28,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_9,         8,      24,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_10,        8,      20,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_11,        8,      16,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_12,        8,      12,     15,     1,      false)
+        MUX_CFG(DA850, EMA_D_13,        8,      8,      15,     1,      false)
+        MUX_CFG(DA850, EMA_D_14,        8,      4,      15,     1,      false)
+        MUX_CFG(DA850, EMA_D_15,        8,      0,      15,     1,      false)
+        MUX_CFG(DA850, EMA_BA_1,        5,      24,     15,     1,      false)
+        MUX_CFG(DA850, EMA_CLK,         6,      0,      15,     1,      false)
+        MUX_CFG(DA850, EMA_WAIT_1,      6,      24,     15,     1,      false)
+        MUX_CFG(DA850, NEMA_CS_2,       7,      0,      15,     1,      false)
+        /* GPIO function */
+        MUX_CFG(DA850, GPIO2_15,        5,      0,      15,     8,      false)
+        MUX_CFG(DA850, GPIO8_10,        18,     28,     15,     8,      false)
+        MUX_CFG(DA850, GPIO4_0,         10,     28,     15,     8,      false)
+        MUX_CFG(DA850, GPIO4_1,         10,     24,     15,     8,      false)
+#endif
+};
+
+const short da850_uart0_pins[] __initdata = {
+        DA850_NUART0_CTS, DA850_NUART0_RTS, DA850_UART0_RXD, DA850_UART0_TXD,
+        -1
+};
+
+const short da850_uart1_pins[] __initdata = {
+        DA850_UART1_RXD, DA850_UART1_TXD,
+        -1
+};
+
+const short da850_uart2_pins[] __initdata = {
+        DA850_UART2_RXD, DA850_UART2_TXD,
+        -1
+};
+
+const short da850_i2c0_pins[] __initdata = {
+        DA850_I2C0_SDA, DA850_I2C0_SCL,
+        -1
+};
+
+const short da850_i2c1_pins[] __initdata = {
+        DA850_I2C1_SCL, DA850_I2C1_SDA,
+        -1
+};
+
+const short da850_cpgmac_pins[] __initdata = {
+        DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
+        DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
+        DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
+        DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
+        DA850_MDIO_D,
+        -1
+};
+
+const short da850_mcasp_pins[] __initdata = {
+        DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
+        DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
+        DA850_AXR_11, DA850_AXR_12,
+        -1
+};
+
+const short da850_lcdcntl_pins[] __initdata = {
+        DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, DA850_LCD_D_4,
+        DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, DA850_LCD_D_8,
+        DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11, DA850_LCD_D_12,
+        DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15, DA850_LCD_PCLK,
+        DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS, DA850_GPIO2_15,
+        DA850_GPIO8_10,
+        -1
+};
+
+const short da850_mmcsd0_pins[] __initdata = {
+        DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
+        DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
+        DA850_GPIO4_0, DA850_GPIO4_1,
+        -1
+};
+
+const short da850_nand_pins[] __initdata = {
+        DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4,
+        DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0,
+        DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
+        DA850_NEMA_WE, DA850_NEMA_OE,
+        -1
+};
+
+const short da850_nor_pins[] __initdata = {
+        DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
+        DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
+        DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
+        DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
+        DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
+        DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
+        DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
+        DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
+        DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
+        DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
+        DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
+        DA850_EMA_A_22, DA850_EMA_A_23,
+        -1
+};
+
+/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
+static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
+        [IRQ_DA8XX_COMMTX]              = 7,
+        [IRQ_DA8XX_COMMRX]              = 7,
+        [IRQ_DA8XX_NINT]                = 7,
+        [IRQ_DA8XX_EVTOUT0]             = 7,
+        [IRQ_DA8XX_EVTOUT1]             = 7,
+        [IRQ_DA8XX_EVTOUT2]             = 7,
+        [IRQ_DA8XX_EVTOUT3]             = 7,
+        [IRQ_DA8XX_EVTOUT4]             = 7,
+        [IRQ_DA8XX_EVTOUT5]             = 7,
+        [IRQ_DA8XX_EVTOUT6]             = 7,
+        [IRQ_DA8XX_EVTOUT6]             = 7,
+        [IRQ_DA8XX_EVTOUT7]             = 7,
+        [IRQ_DA8XX_CCINT0]              = 7,
+        [IRQ_DA8XX_CCERRINT]            = 7,
+        [IRQ_DA8XX_TCERRINT0]           = 7,
+        [IRQ_DA8XX_AEMIFINT]            = 7,
+        [IRQ_DA8XX_I2CINT0]             = 7,
+        [IRQ_DA8XX_MMCSDINT0]           = 7,
+        [IRQ_DA8XX_MMCSDINT1]           = 7,
+        [IRQ_DA8XX_ALLINT0]             = 7,
+        [IRQ_DA8XX_RTC]                 = 7,
+        [IRQ_DA8XX_SPINT0]              = 7,
+        [IRQ_DA8XX_TINT12_0]            = 7,
+        [IRQ_DA8XX_TINT34_0]            = 7,
+        [IRQ_DA8XX_TINT12_1]            = 7,
+        [IRQ_DA8XX_TINT34_1]            = 7,
+        [IRQ_DA8XX_UARTINT0]            = 7,
+        [IRQ_DA8XX_KEYMGRINT]           = 7,
+        [IRQ_DA8XX_SECINT]              = 7,
+        [IRQ_DA8XX_SECKEYERR]           = 7,
+        [IRQ_DA850_MPUADDRERR0]         = 7,
+        [IRQ_DA850_MPUPROTERR0]         = 7,
+        [IRQ_DA850_IOPUADDRERR0]        = 7,
+        [IRQ_DA850_IOPUPROTERR0]        = 7,
+        [IRQ_DA850_IOPUADDRERR1]        = 7,
+        [IRQ_DA850_IOPUPROTERR1]        = 7,
+        [IRQ_DA850_IOPUADDRERR2]        = 7,
+        [IRQ_DA850_IOPUPROTERR2]        = 7,
+        [IRQ_DA850_BOOTCFG_ADDR_ERR]    = 7,
+        [IRQ_DA850_BOOTCFG_PROT_ERR]    = 7,
+        [IRQ_DA850_MPUADDRERR1]         = 7,
+        [IRQ_DA850_MPUPROTERR1]         = 7,
+        [IRQ_DA850_IOPUADDRERR3]        = 7,
+        [IRQ_DA850_IOPUPROTERR3]        = 7,
+        [IRQ_DA850_IOPUADDRERR4]        = 7,
+        [IRQ_DA850_IOPUPROTERR4]        = 7,
+        [IRQ_DA850_IOPUADDRERR5]        = 7,
+        [IRQ_DA850_IOPUPROTERR5]        = 7,
+        [IRQ_DA850_MIOPU_BOOTCFG_ERR]   = 7,
+        [IRQ_DA8XX_CHIPINT0]            = 7,
+        [IRQ_DA8XX_CHIPINT1]            = 7,
+        [IRQ_DA8XX_CHIPINT2]            = 7,
+        [IRQ_DA8XX_CHIPINT3]            = 7,
+        [IRQ_DA8XX_TCERRINT1]           = 7,
+        [IRQ_DA8XX_C0_RX_THRESH_PULSE]  = 7,
+        [IRQ_DA8XX_C0_RX_PULSE]         = 7,
+        [IRQ_DA8XX_C0_TX_PULSE]         = 7,
+        [IRQ_DA8XX_C0_MISC_PULSE]       = 7,
+        [IRQ_DA8XX_C1_RX_THRESH_PULSE]  = 7,
+        [IRQ_DA8XX_C1_RX_PULSE]         = 7,
+        [IRQ_DA8XX_C1_TX_PULSE]         = 7,
+        [IRQ_DA8XX_C1_MISC_PULSE]       = 7,
+        [IRQ_DA8XX_MEMERR]              = 7,
+        [IRQ_DA8XX_GPIO0]               = 7,
+        [IRQ_DA8XX_GPIO1]               = 7,
+        [IRQ_DA8XX_GPIO2]               = 7,
+        [IRQ_DA8XX_GPIO3]               = 7,
+        [IRQ_DA8XX_GPIO4]               = 7,
+        [IRQ_DA8XX_GPIO5]               = 7,
+        [IRQ_DA8XX_GPIO6]               = 7,
+        [IRQ_DA8XX_GPIO7]               = 7,
+        [IRQ_DA8XX_GPIO8]               = 7,
+        [IRQ_DA8XX_I2CINT1]             = 7,
+        [IRQ_DA8XX_LCDINT]              = 7,
+        [IRQ_DA8XX_UARTINT1]            = 7,
+        [IRQ_DA8XX_MCASPINT]            = 7,
+        [IRQ_DA8XX_ALLINT1]             = 7,
+        [IRQ_DA8XX_SPINT1]              = 7,
+        [IRQ_DA8XX_UHPI_INT1]           = 7,
+        [IRQ_DA8XX_USB_INT]             = 7,
+        [IRQ_DA8XX_IRQN]                = 7,
+        [IRQ_DA8XX_RWAKEUP]             = 7,
+        [IRQ_DA8XX_UARTINT2]            = 7,
+        [IRQ_DA8XX_DFTSSINT]            = 7,
+        [IRQ_DA8XX_EHRPWM0]             = 7,
+        [IRQ_DA8XX_EHRPWM0TZ]           = 7,
+        [IRQ_DA8XX_EHRPWM1]             = 7,
+        [IRQ_DA8XX_EHRPWM1TZ]           = 7,
+        [IRQ_DA850_SATAINT]             = 7,
+        [IRQ_DA850_TINT12_2]            = 7,
+        [IRQ_DA850_TINT34_2]            = 7,
+        [IRQ_DA850_TINTALL_2]           = 7,
+        [IRQ_DA8XX_ECAP0]               = 7,
+        [IRQ_DA8XX_ECAP1]               = 7,
+        [IRQ_DA8XX_ECAP2]               = 7,
+        [IRQ_DA850_MMCSDINT0_1]         = 7,
+        [IRQ_DA850_MMCSDINT1_1]         = 7,
+        [IRQ_DA850_T12CMPINT0_2]        = 7,
+        [IRQ_DA850_T12CMPINT1_2]        = 7,
+        [IRQ_DA850_T12CMPINT2_2]        = 7,
+        [IRQ_DA850_T12CMPINT3_2]        = 7,
+        [IRQ_DA850_T12CMPINT4_2]        = 7,
+        [IRQ_DA850_T12CMPINT5_2]        = 7,
+        [IRQ_DA850_T12CMPINT6_2]        = 7,
+        [IRQ_DA850_T12CMPINT7_2]        = 7,
+        [IRQ_DA850_T12CMPINT0_3]        = 7,
+        [IRQ_DA850_T12CMPINT1_3]        = 7,
+        [IRQ_DA850_T12CMPINT2_3]        = 7,
+        [IRQ_DA850_T12CMPINT3_3]        = 7,
+        [IRQ_DA850_T12CMPINT4_3]        = 7,
+        [IRQ_DA850_T12CMPINT5_3]        = 7,
+        [IRQ_DA850_T12CMPINT6_3]        = 7,
+        [IRQ_DA850_T12CMPINT7_3]        = 7,
+        [IRQ_DA850_RPIINT]              = 7,
+        [IRQ_DA850_VPIFINT]             = 7,
+        [IRQ_DA850_CCINT1]              = 7,
+        [IRQ_DA850_CCERRINT1]           = 7,
+        [IRQ_DA850_TCERRINT2]           = 7,
+        [IRQ_DA850_TINT12_3]            = 7,
+        [IRQ_DA850_TINT34_3]            = 7,
+        [IRQ_DA850_TINTALL_3]           = 7,
+        [IRQ_DA850_MCBSP0RINT]          = 7,
+        [IRQ_DA850_MCBSP0XINT]          = 7,
+        [IRQ_DA850_MCBSP1RINT]          = 7,
+        [IRQ_DA850_MCBSP1XINT]          = 7,
+        [IRQ_DA8XX_ARMCLKSTOPREQ]       = 7,
+};
+
+static struct map_desc da850_io_desc[] = {
+        {
+                .virtual        = IO_VIRT,
+                .pfn            = __phys_to_pfn(IO_PHYS),
+                .length         = IO_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
+                .virtual        = DA8XX_CP_INTC_VIRT,
+                .pfn            = __phys_to_pfn(DA8XX_CP_INTC_BASE),
+                .length         = DA8XX_CP_INTC_SIZE,
+                .type           = MT_DEVICE
+        },
+};
+
+static void __iomem *da850_psc_bases[] = {
+        IO_ADDRESS(DA8XX_PSC0_BASE),
+        IO_ADDRESS(DA8XX_PSC1_BASE),
+};
+
+/* Contents of JTAG ID register used to identify exact cpu type */
+static struct davinci_id da850_ids[] = {
+        {
+                .variant        = 0x0,
+                .part_no        = 0xb7d1,
+                .manufacturer   = 0x017,        /* 0x02f >> 1 */
+                .cpu_id         = DAVINCI_CPU_ID_DA850,
+                .name           = "da850/omap-l138",
+        },
+};
+
+static struct davinci_timer_instance da850_timer_instance[4] = {
+        {
+                .base           = IO_ADDRESS(DA8XX_TIMER64P0_BASE),
+                .bottom_irq     = IRQ_DA8XX_TINT12_0,
+                .top_irq        = IRQ_DA8XX_TINT34_0,
+        },
+        {
+                .base           = IO_ADDRESS(DA8XX_TIMER64P1_BASE),
+                .bottom_irq     = IRQ_DA8XX_TINT12_1,
+                .top_irq        = IRQ_DA8XX_TINT34_1,
+        },
+        {
+                .base           = IO_ADDRESS(DA850_TIMER64P2_BASE),
+                .bottom_irq     = IRQ_DA850_TINT12_2,
+                .top_irq        = IRQ_DA850_TINT34_2,
+        },
+        {
+                .base           = IO_ADDRESS(DA850_TIMER64P3_BASE),
+                .bottom_irq     = IRQ_DA850_TINT12_3,
+                .top_irq        = IRQ_DA850_TINT34_3,
+        },
+};
+
+/*
+ * T0_BOT: Timer 0, bottom              : Used for clock_event
+ * T0_TOP: Timer 0, top                 : Used for clocksource
+ * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
+ */
+static struct davinci_timer_info da850_timer_info = {
+        .timers         = da850_timer_instance,
+        .clockevent_id  = T0_BOT,
+        .clocksource_id = T0_TOP,
+};
+
+static struct davinci_soc_info davinci_soc_info_da850 = {
+        .io_desc                = da850_io_desc,
+        .io_desc_num            = ARRAY_SIZE(da850_io_desc),
+        .jtag_id_base           = IO_ADDRESS(DA8XX_JTAG_ID_REG),
+        .ids                    = da850_ids,
+        .ids_num                = ARRAY_SIZE(da850_ids),
+        .cpu_clks               = da850_clks,
+        .psc_bases              = da850_psc_bases,
+        .psc_bases_num          = ARRAY_SIZE(da850_psc_bases),
+        .pinmux_base            = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120),
+        .pinmux_pins            = da850_pins,
+        .pinmux_pins_num        = ARRAY_SIZE(da850_pins),
+        .intc_base              = (void __iomem *)DA8XX_CP_INTC_VIRT,
+        .intc_type              = DAVINCI_INTC_TYPE_CP_INTC,
+        .intc_irq_prios         = da850_default_priorities,
+        .intc_irq_num           = DA850_N_CP_INTC_IRQ,
+        .timer_info             = &da850_timer_info,
+        .gpio_base              = IO_ADDRESS(DA8XX_GPIO_BASE),
+        .gpio_num               = 144,
+        .gpio_irq               = IRQ_DA8XX_GPIO0,
+        .serial_dev             = &da8xx_serial_device,
+        .emac_pdata             = &da8xx_emac_pdata,
+};
+
+void __init da850_init(void)
+{
+        davinci_common_init(&davinci_soc_info_da850);
+}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
new file mode 100644
index 000000000000..58ad5b66fd60
--- /dev/null
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -0,0 +1,450 @@
+/*
+ * DA8XX/OMAP L1XX platform device data
+ *
+ * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
+ * Derived from code that was:
+ *      Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/serial_8250.h>
+
+#include <mach/cputype.h>
+#include <mach/common.h>
+#include <mach/time.h>
+#include <mach/da8xx.h>
+#include <video/da8xx-fb.h>
+
+#include "clock.h"
+
+#define DA8XX_TPCC_BASE                 0x01c00000
+#define DA8XX_TPTC0_BASE                0x01c08000
+#define DA8XX_TPTC1_BASE                0x01c08400
+#define DA8XX_WDOG_BASE                 0x01c21000 /* DA8XX_TIMER64P1_BASE */
+#define DA8XX_I2C0_BASE                 0x01c22000
+#define DA8XX_EMAC_CPPI_PORT_BASE       0x01e20000
+#define DA8XX_EMAC_CPGMACSS_BASE        0x01e22000
+#define DA8XX_EMAC_CPGMAC_BASE          0x01e23000
+#define DA8XX_EMAC_MDIO_BASE            0x01e24000
+#define DA8XX_GPIO_BASE                 0x01e26000
+#define DA8XX_I2C1_BASE                 0x01e28000
+
+#define DA8XX_EMAC_CTRL_REG_OFFSET      0x3000
+#define DA8XX_EMAC_MOD_REG_OFFSET       0x2000
+#define DA8XX_EMAC_RAM_OFFSET           0x0000
+#define DA8XX_MDIO_REG_OFFSET           0x4000
+#define DA8XX_EMAC_CTRL_RAM_SIZE        SZ_8K
+
+static struct plat_serial8250_port da8xx_serial_pdata[] = {
+        {
+                .mapbase        = DA8XX_UART0_BASE,
+                .irq            = IRQ_DA8XX_UARTINT0,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
+                                        UPF_IOREMAP,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+        },
+        {
+                .mapbase        = DA8XX_UART1_BASE,
+                .irq            = IRQ_DA8XX_UARTINT1,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
+                                        UPF_IOREMAP,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+        },
+        {
+                .mapbase        = DA8XX_UART2_BASE,
+                .irq            = IRQ_DA8XX_UARTINT2,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
+                                        UPF_IOREMAP,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+        },
+        {
+                .flags  = 0,
+        },
+};
+
+struct platform_device da8xx_serial_device = {
+        .name   = "serial8250",
+        .id     = PLAT8250_DEV_PLATFORM,
+        .dev    = {
+                .platform_data  = da8xx_serial_pdata,
+        },
+};
+
+static const s8 da8xx_dma_chan_no_event[] = {
+        20, 21,
+        -1
+};
+
+static const s8 da8xx_queue_tc_mapping[][2] = {
+        /* {event queue no, TC no} */
+        {0, 0},
+        {1, 1},
+        {-1, -1}
+};
+
+static const s8 da8xx_queue_priority_mapping[][2] = {
+        /* {event queue no, Priority} */
+        {0, 3},
+        {1, 7},
+        {-1, -1}
+};
+
+static struct edma_soc_info da8xx_edma_info[] = {
+        {
+                .n_channel              = 32,
+                .n_region               = 4,
+                .n_slot                 = 128,
+                .n_tc                   = 2,
+                .n_cc                   = 1,
+                .noevent                = da8xx_dma_chan_no_event,
+                .queue_tc_mapping       = da8xx_queue_tc_mapping,
+                .queue_priority_mapping = da8xx_queue_priority_mapping,
+        },
+};
+
+static struct resource da8xx_edma_resources[] = {
+        {
+                .name   = "edma_cc0",
+                .start  = DA8XX_TPCC_BASE,
+                .end    = DA8XX_TPCC_BASE + SZ_32K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma_tc0",
+                .start  = DA8XX_TPTC0_BASE,
+                .end    = DA8XX_TPTC0_BASE + SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma_tc1",
+                .start  = DA8XX_TPTC1_BASE,
+                .end    = DA8XX_TPTC1_BASE + SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma0",
+                .start  = IRQ_DA8XX_CCINT0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .name   = "edma0_err",
+                .start  = IRQ_DA8XX_CCERRINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device da8xx_edma_device = {
+        .name           = "edma",
+        .id             = -1,
+        .dev = {
+                .platform_data  = da8xx_edma_info,
+        },
+        .num_resources  = ARRAY_SIZE(da8xx_edma_resources),
+        .resource       = da8xx_edma_resources,
+};
+
+int __init da8xx_register_edma(void)
+{
+        return platform_device_register(&da8xx_edma_device);
+}
+
+static struct resource da8xx_i2c_resources0[] = {
+        {
+                .start  = DA8XX_I2C0_BASE,
+                .end    = DA8XX_I2C0_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_DA8XX_I2CINT0,
+                .end    = IRQ_DA8XX_I2CINT0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device da8xx_i2c_device0 = {
+        .name           = "i2c_davinci",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(da8xx_i2c_resources0),
+        .resource       = da8xx_i2c_resources0,
+};
+
+static struct resource da8xx_i2c_resources1[] = {
+        {
+                .start  = DA8XX_I2C1_BASE,
+                .end    = DA8XX_I2C1_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_DA8XX_I2CINT1,
+                .end    = IRQ_DA8XX_I2CINT1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device da8xx_i2c_device1 = {
+        .name           = "i2c_davinci",
+        .id             = 2,
+        .num_resources  = ARRAY_SIZE(da8xx_i2c_resources1),
+        .resource       = da8xx_i2c_resources1,
+};
+
+int __init da8xx_register_i2c(int instance,
+                struct davinci_i2c_platform_data *pdata)
+{
+        struct platform_device *pdev;
+
+        if (instance == 0)
+                pdev = &da8xx_i2c_device0;
+        else if (instance == 1)
+                pdev = &da8xx_i2c_device1;
+        else
+                return -EINVAL;
+
+        pdev->dev.platform_data = pdata;
+        return platform_device_register(pdev);
+}
+
+static struct resource da8xx_watchdog_resources[] = {
+        {
+                .start  = DA8XX_WDOG_BASE,
+                .end    = DA8XX_WDOG_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device davinci_wdt_device = {
+        .name           = "watchdog",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(da8xx_watchdog_resources),
+        .resource       = da8xx_watchdog_resources,
+};
+
+int __init da8xx_register_watchdog(void)
+{
+        return platform_device_register(&davinci_wdt_device);
+}
+
+static struct resource da8xx_emac_resources[] = {
+        {
+                .start  = DA8XX_EMAC_CPPI_PORT_BASE,
+                .end    = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_DA8XX_C0_RX_THRESH_PULSE,
+                .end    = IRQ_DA8XX_C0_RX_THRESH_PULSE,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_C0_RX_PULSE,
+                .end    = IRQ_DA8XX_C0_RX_PULSE,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_C0_TX_PULSE,
+                .end    = IRQ_DA8XX_C0_TX_PULSE,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DA8XX_C0_MISC_PULSE,
+                .end    = IRQ_DA8XX_C0_MISC_PULSE,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct emac_platform_data da8xx_emac_pdata = {
+        .ctrl_reg_offset        = DA8XX_EMAC_CTRL_REG_OFFSET,
+        .ctrl_mod_reg_offset    = DA8XX_EMAC_MOD_REG_OFFSET,
+        .ctrl_ram_offset        = DA8XX_EMAC_RAM_OFFSET,
+        .mdio_reg_offset        = DA8XX_MDIO_REG_OFFSET,
+        .ctrl_ram_size          = DA8XX_EMAC_CTRL_RAM_SIZE,
+        .version                = EMAC_VERSION_2,
+};
+
+static struct platform_device da8xx_emac_device = {
+        .name           = "davinci_emac",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &da8xx_emac_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(da8xx_emac_resources),
+        .resource       = da8xx_emac_resources,
+};
+
+static struct resource da830_mcasp1_resources[] = {
+        {
+                .name   = "mcasp1",
+                .start  = DAVINCI_DA830_MCASP1_REG_BASE,
+                .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* TX event */
+        {
+                .start  = DAVINCI_DA830_DMA_MCASP1_AXEVT,
+                .end    = DAVINCI_DA830_DMA_MCASP1_AXEVT,
+                .flags  = IORESOURCE_DMA,
+        },
+        /* RX event */
+        {
+                .start  = DAVINCI_DA830_DMA_MCASP1_AREVT,
+                .end    = DAVINCI_DA830_DMA_MCASP1_AREVT,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device da830_mcasp1_device = {
+        .name           = "davinci-mcasp",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(da830_mcasp1_resources),
+        .resource       = da830_mcasp1_resources,
+};
+
+static struct resource da850_mcasp_resources[] = {
+        {
+                .name   = "mcasp",
+                .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
+                .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* TX event */
+        {
+                .start  = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
+                .end    = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
+                .flags  = IORESOURCE_DMA,
+        },
+        /* RX event */
+        {
+                .start  = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
+                .end    = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device da850_mcasp_device = {
+        .name           = "davinci-mcasp",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(da850_mcasp_resources),
+        .resource       = da850_mcasp_resources,
+};
+
+int __init da8xx_register_emac(void)
+{
+        return platform_device_register(&da8xx_emac_device);
+}
+
+void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata)
+{
+        /* DA830/OMAP-L137 has 3 instances of McASP */
+        if (cpu_is_davinci_da830() && id == 1) {
+                da830_mcasp1_device.dev.platform_data = pdata;
+                platform_device_register(&da830_mcasp1_device);
+        } else if (cpu_is_davinci_da850()) {
+                da850_mcasp_device.dev.platform_data = pdata;
+                platform_device_register(&da850_mcasp_device);
+        }
+}
+
+static const struct display_panel disp_panel = {
+        QVGA,
+        16,
+        16,
+        COLOR_ACTIVE,
+};
+
+static struct lcd_ctrl_config lcd_cfg = {
+        &disp_panel,
+        .ac_bias                = 255,
+        .ac_bias_intrpt         = 0,
+        .dma_burst_sz           = 16,
+        .bpp                    = 16,
+        .fdd                    = 255,
+        .tft_alt_mode           = 0,
+        .stn_565_mode           = 0,
+        .mono_8bit_mode         = 0,
+        .invert_line_clock      = 1,
+        .invert_frm_clock       = 1,
+        .sync_edge              = 0,
+        .sync_ctrl              = 1,
+        .raster_order           = 0,
+};
+
+static struct da8xx_lcdc_platform_data da850_evm_lcdc_pdata = {
+        .manu_name = "sharp",
+        .controller_data = &lcd_cfg,
+        .type = "Sharp_LK043T1DG01",
+};
+
+static struct resource da8xx_lcdc_resources[] = {
+        [0] = { /* registers */
+                .start  = DA8XX_LCD_CNTRL_BASE,
+                .end    = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = { /* interrupt */
+                .start  = IRQ_DA8XX_LCDINT,
+                .end    = IRQ_DA8XX_LCDINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device da850_lcdc_device = {
+        .name           = "da8xx_lcdc",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(da8xx_lcdc_resources),
+        .resource       = da8xx_lcdc_resources,
+        .dev = {
+                .platform_data = &da850_evm_lcdc_pdata,
+        }
+};
+
+int __init da8xx_register_lcdc(void)
+{
+        return platform_device_register(&da850_lcdc_device);
+}
+
+static struct resource da8xx_mmcsd0_resources[] = {
+        {               /* registers */
+                .start  = DA8XX_MMCSD0_BASE,
+                .end    = DA8XX_MMCSD0_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {               /* interrupt */
+                .start  = IRQ_DA8XX_MMCSDINT0,
+                .end    = IRQ_DA8XX_MMCSDINT0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {               /* DMA RX */
+                .start  = EDMA_CTLR_CHAN(0, 16),
+                .end    = EDMA_CTLR_CHAN(0, 16),
+                .flags  = IORESOURCE_DMA,
+        },
+        {               /* DMA TX */
+                .start  = EDMA_CTLR_CHAN(0, 17),
+                .end    = EDMA_CTLR_CHAN(0, 17),
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device da8xx_mmcsd0_device = {
+        .name           = "davinci_mmc",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(da8xx_mmcsd0_resources),
+        .resource       = da8xx_mmcsd0_resources,
+};
+
+int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
+{
+        da8xx_mmcsd0_device.dev.platform_data = config;
+        return platform_device_register(&da8xx_mmcsd0_device);
+}
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index de16f347566a..a55b650db71e 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -31,6 +31,8 @@
 #define DAVINCI_MMCSD0_BASE          0x01E10000
 #define DM355_MMCSD0_BASE            0x01E11000
 #define DM355_MMCSD1_BASE            0x01E00000
+#define DM365_MMCSD0_BASE            0x01D11000
+#define DM365_MMCSD1_BASE            0x01D00000
 
 static struct resource i2c_resources[] = {
         {
@@ -82,10 +84,10 @@ static struct resource mmcsd0_resources[] = {
         },
         /* DMA channels: RX, then TX */
         {
-                .start = DAVINCI_DMA_MMCRXEVT,
+                .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
                 .flags = IORESOURCE_DMA,
         }, {
-                .start = DAVINCI_DMA_MMCTXEVT,
+                .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
                 .flags = IORESOURCE_DMA,
         },
 };
@@ -119,10 +121,10 @@ static struct resource mmcsd1_resources[] = {
         },
         /* DMA channels: RX, then TX */
         {
-                .start = 30,    /* rx */
+                .start = EDMA_CTLR_CHAN(0, 30), /* rx */
                 .flags = IORESOURCE_DMA,
         }, {
-                .start = 31,    /* tx */
+                .start = EDMA_CTLR_CHAN(0, 31), /* tx */
                 .flags = IORESOURCE_DMA,
         },
 };
@@ -154,19 +156,31 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
          */
         switch (module) {
         case 1:
-                if (!cpu_is_davinci_dm355())
+                if (cpu_is_davinci_dm355()) {
+                        /* REVISIT we may not need all these pins if e.g. this
+                         * is a hard-wired SDIO device...
+                         */
+                        davinci_cfg_reg(DM355_SD1_CMD);
+                        davinci_cfg_reg(DM355_SD1_CLK);
+                        davinci_cfg_reg(DM355_SD1_DATA0);
+                        davinci_cfg_reg(DM355_SD1_DATA1);
+                        davinci_cfg_reg(DM355_SD1_DATA2);
+                        davinci_cfg_reg(DM355_SD1_DATA3);
+                } else if (cpu_is_davinci_dm365()) {
+                        void __iomem *pupdctl1 =
+                                IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
+
+                        /* Configure pull down control */
+                        __raw_writel((__raw_readl(pupdctl1) & ~0x400),
+                                        pupdctl1);
+
+                        mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
+                        mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
+                                                        SZ_4K - 1;
+                        mmcsd0_resources[2].start = IRQ_DM365_SDIOINT1;
+                } else
                         break;
 
-                /* REVISIT we may not need all these pins if e.g. this
-                 * is a hard-wired SDIO device...
-                 */
-                davinci_cfg_reg(DM355_SD1_CMD);
-                davinci_cfg_reg(DM355_SD1_CLK);
-                davinci_cfg_reg(DM355_SD1_DATA0);
-                davinci_cfg_reg(DM355_SD1_DATA1);
-                davinci_cfg_reg(DM355_SD1_DATA2);
-                davinci_cfg_reg(DM355_SD1_DATA3);
-
                 pdev = &davinci_mmcsd1_device;
                 break;
         case 0:
@@ -180,9 +194,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
 
                         /* enable RX EDMA */
                         davinci_cfg_reg(DM355_EVT26_MMC0_RX);
-                }
-
-                else if (cpu_is_davinci_dm644x()) {
+                } else if (cpu_is_davinci_dm365()) {
+                        mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
+                        mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
+                                                        SZ_4K - 1;
+                        mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
+                } else if (cpu_is_davinci_dm644x()) {
                         /* REVISIT: should this be in board-init code? */
                         void __iomem *base =
                                 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
@@ -216,6 +233,8 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
 
 static struct resource wdt_resources[] = {
         {
+                .start  = DAVINCI_WDOG_BASE,
+                .end    = DAVINCI_WDOG_BASE + SZ_1K - 1,
                 .flags  = IORESOURCE_MEM,
         },
 };
@@ -229,11 +248,6 @@ struct platform_device davinci_wdt_device = {
 
 static void davinci_init_wdt(void)
 {
-        struct davinci_soc_info *soc_info = &davinci_soc_info;
-
-        wdt_resources[0].start = (resource_size_t)soc_info->wdt_base;
-        wdt_resources[0].end = (resource_size_t)soc_info->wdt_base + SZ_1K - 1;
-
         platform_device_register(&davinci_wdt_device);
 }
 
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index baaaf328de2e..059670018aff 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -30,6 +30,7 @@
 #include <mach/time.h>
 #include <mach/serial.h>
 #include <mach/common.h>
+#include <mach/asp.h>
 
 #include "clock.h"
 #include "mux.h"
@@ -360,8 +361,8 @@ static struct davinci_clk dm355_clks[] = {
         CLK(NULL, "uart1", &uart1_clk),
         CLK(NULL, "uart2", &uart2_clk),
         CLK("i2c_davinci.1", NULL, &i2c_clk),
-        CLK("soc-audio.0", NULL, &asp0_clk),
-        CLK("soc-audio.1", NULL, &asp1_clk),
+        CLK("davinci-asp.0", NULL, &asp0_clk),
+        CLK("davinci-asp.1", NULL, &asp1_clk),
         CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
         CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
         CLK(NULL, "spi0", &spi0_clk),
@@ -481,6 +482,20 @@ INT_CFG(DM355,  INT_EDMA_TC1_ERR,     4,    1,    1,     false)
 EVT_CFG(DM355,  EVT8_ASP1_TX,         0,    1,    0,     false)
 EVT_CFG(DM355,  EVT9_ASP1_RX,         1,    1,    0,     false)
 EVT_CFG(DM355,  EVT26_MMC0_RX,        2,    1,    0,     false)
+
+MUX_CFG(DM355,  VOUT_FIELD,     1,   18,    3,    1,     false)
+MUX_CFG(DM355,  VOUT_FIELD_G70, 1,   18,    3,    0,     false)
+MUX_CFG(DM355,  VOUT_HVSYNC,    1,   16,    1,    0,     false)
+MUX_CFG(DM355,  VOUT_COUTL_EN,  1,   0,     0xff, 0x55,  false)
+MUX_CFG(DM355,  VOUT_COUTH_EN,  1,   8,     0xff, 0x55,  false)
+
+MUX_CFG(DM355,  VIN_PCLK,       0,   14,    1,    1,     false)
+MUX_CFG(DM355,  VIN_CAM_WEN,    0,   13,    1,    1,     false)
+MUX_CFG(DM355,  VIN_CAM_VD,     0,   12,    1,    1,     false)
+MUX_CFG(DM355,  VIN_CAM_HD,     0,   11,    1,    1,     false)
+MUX_CFG(DM355,  VIN_YIN_EN,     0,   10,    1,    1,     false)
+MUX_CFG(DM355,  VIN_CINL_EN,    0,   0,   0xff, 0x55,    false)
+MUX_CFG(DM355,  VIN_CINH_EN,    0,   8,     3,    3,     false)
 #endif
 };
 
@@ -558,17 +573,38 @@ static const s8 dma_chan_dm355_no_event[] = {
         -1
 };
 
-static struct edma_soc_info dm355_edma_info = {
-        .n_channel      = 64,
-        .n_region       = 4,
-        .n_slot         = 128,
-        .n_tc           = 2,
-        .noevent        = dma_chan_dm355_no_event,
+static const s8
+queue_tc_mapping[][2] = {
+        /* {event queue no, TC no} */
+        {0, 0},
+        {1, 1},
+        {-1, -1},
+};
+
+static const s8
+queue_priority_mapping[][2] = {
+        /* {event queue no, Priority} */
+        {0, 3},
+        {1, 7},
+        {-1, -1},
+};
+
+static struct edma_soc_info dm355_edma_info[] = {
+        {
+                .n_channel              = 64,
+                .n_region               = 4,
+                .n_slot                 = 128,
+                .n_tc                   = 2,
+                .n_cc                   = 1,
+                .noevent                = dma_chan_dm355_no_event,
+                .queue_tc_mapping       = queue_tc_mapping,
+                .queue_priority_mapping = queue_priority_mapping,
+        },
 };
 
 static struct resource edma_resources[] = {
         {
-                .name   = "edma_cc",
+                .name   = "edma_cc0",
                 .start  = 0x01c00000,
                 .end    = 0x01c00000 + SZ_64K - 1,
                 .flags  = IORESOURCE_MEM,
@@ -586,10 +622,12 @@ static struct resource edma_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
+                .name   = "edma0",
                 .start  = IRQ_CCINT0,
                 .flags  = IORESOURCE_IRQ,
         },
         {
+                .name   = "edma0_err",
                 .start  = IRQ_CCERRINT,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -598,12 +636,98 @@ static struct resource edma_resources[] = {
 
 static struct platform_device dm355_edma_device = {
         .name                   = "edma",
-        .id                     = -1,
-        .dev.platform_data      = &dm355_edma_info,
+        .id                     = 0,
+        .dev.platform_data      = dm355_edma_info,
         .num_resources          = ARRAY_SIZE(edma_resources),
         .resource               = edma_resources,
 };
 
+static struct resource dm355_asp1_resources[] = {
+        {
+                .start  = DAVINCI_ASP1_BASE,
+                .end    = DAVINCI_ASP1_BASE + SZ_8K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = DAVINCI_DMA_ASP1_TX,
+                .end    = DAVINCI_DMA_ASP1_TX,
+                .flags  = IORESOURCE_DMA,
+        },
+        {
+                .start  = DAVINCI_DMA_ASP1_RX,
+                .end    = DAVINCI_DMA_ASP1_RX,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device dm355_asp1_device = {
+        .name           = "davinci-asp",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(dm355_asp1_resources),
+        .resource       = dm355_asp1_resources,
+};
+
+static struct resource dm355_vpss_resources[] = {
+        {
+                /* VPSS BL Base address */
+                .name           = "vpss",
+                .start          = 0x01c70800,
+                .end            = 0x01c70800 + 0xff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                /* VPSS CLK Base address */
+                .name           = "vpss",
+                .start          = 0x01c70000,
+                .end            = 0x01c70000 + 0xf,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device dm355_vpss_device = {
+        .name                   = "vpss",
+        .id                     = -1,
+        .dev.platform_data      = "dm355_vpss",
+        .num_resources          = ARRAY_SIZE(dm355_vpss_resources),
+        .resource               = dm355_vpss_resources,
+};
+
+static struct resource vpfe_resources[] = {
+        {
+                .start          = IRQ_VDINT0,
+                .end            = IRQ_VDINT0,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = IRQ_VDINT1,
+                .end            = IRQ_VDINT1,
+                .flags          = IORESOURCE_IRQ,
+        },
+        /* CCDC Base address */
+        {
+                .flags          = IORESOURCE_MEM,
+                .start          = 0x01c70600,
+                .end            = 0x01c70600 + 0x1ff,
+        },
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device vpfe_capture_dev = {
+        .name           = CAPTURE_DRV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(vpfe_resources),
+        .resource       = vpfe_resources,
+        .dev = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+void dm355_set_vpfe_config(struct vpfe_config *cfg)
+{
+        vpfe_capture_dev.dev.platform_data = cfg;
+}
+
 /*----------------------------------------------------------------------*/
 
 static struct map_desc dm355_io_desc[] = {
@@ -704,7 +828,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
         .intc_irq_prios         = dm355_default_priorities,
         .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
         .timer_info             = &dm355_timer_info,
-        .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
         .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
         .gpio_num               = 104,
         .gpio_irq               = IRQ_DM355_GPIOBNK0,
@@ -713,6 +836,19 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
         .sram_len               = SZ_32K,
 };
 
+void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
+{
+        /* we don't use ASP1 IRQs, or we'd need to mux them ... */
+        if (evt_enable & ASP1_TX_EVT_EN)
+                davinci_cfg_reg(DM355_EVT8_ASP1_TX);
+
+        if (evt_enable & ASP1_RX_EVT_EN)
+                davinci_cfg_reg(DM355_EVT9_ASP1_RX);
+
+        dm355_asp1_device.dev.platform_data = pdata;
+        platform_device_register(&dm355_asp1_device);
+}
+
 void __init dm355_init(void)
 {
         davinci_common_init(&davinci_soc_info_dm355);
@@ -725,6 +861,20 @@ static int __init dm355_init_devices(void)
 
         davinci_cfg_reg(DM355_INT_EDMA_CC);
         platform_device_register(&dm355_edma_device);
+        platform_device_register(&dm355_vpss_device);
+        /*
+         * setup Mux configuration for vpfe input and register
+         * vpfe capture platform device
+         */
+        davinci_cfg_reg(DM355_VIN_PCLK);
+        davinci_cfg_reg(DM355_VIN_CAM_WEN);
+        davinci_cfg_reg(DM355_VIN_CAM_VD);
+        davinci_cfg_reg(DM355_VIN_CAM_HD);
+        davinci_cfg_reg(DM355_VIN_YIN_EN);
+        davinci_cfg_reg(DM355_VIN_CINL_EN);
+        davinci_cfg_reg(DM355_VIN_CINH_EN);
+        platform_device_register(&vpfe_capture_dev);
+
         return 0;
 }
 postcore_initcall(dm355_init_devices);
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
new file mode 100644
index 000000000000..e81517434703
--- /dev/null
+++ b/arch/arm/mach-davinci/dm365.c
@@ -0,0 +1,926 @@
+/*
+ * TI DaVinci DM365 chip specific setup
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/serial_8250.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+
+#include <asm/mach/map.h>
+
+#include <mach/dm365.h>
+#include <mach/clock.h>
+#include <mach/cputype.h>
+#include <mach/edma.h>
+#include <mach/psc.h>
+#include <mach/mux.h>
+#include <mach/irqs.h>
+#include <mach/time.h>
+#include <mach/serial.h>
+#include <mach/common.h>
+
+#include "clock.h"
+#include "mux.h"
+
+#define DM365_REF_FREQ          24000000        /* 24 MHz on the DM365 EVM */
+
+static struct pll_data pll1_data = {
+        .num            = 1,
+        .phys_base      = DAVINCI_PLL1_BASE,
+        .flags          = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
+};
+
+static struct pll_data pll2_data = {
+        .num            = 2,
+        .phys_base      = DAVINCI_PLL2_BASE,
+        .flags          = PLL_HAS_POSTDIV | PLL_HAS_PREDIV,
+};
+
+static struct clk ref_clk = {
+        .name           = "ref_clk",
+        .rate           = DM365_REF_FREQ,
+};
+
+static struct clk pll1_clk = {
+        .name           = "pll1",
+        .parent         = &ref_clk,
+        .flags          = CLK_PLL,
+        .pll_data       = &pll1_data,
+};
+
+static struct clk pll1_aux_clk = {
+        .name           = "pll1_aux_clk",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+};
+
+static struct clk pll1_sysclkbp = {
+        .name           = "pll1_sysclkbp",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+        .div_reg        = BPDIV
+};
+
+static struct clk clkout0_clk = {
+        .name           = "clkout0",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+};
+
+static struct clk pll1_sysclk1 = {
+        .name           = "pll1_sysclk1",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV1,
+};
+
+static struct clk pll1_sysclk2 = {
+        .name           = "pll1_sysclk2",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV2,
+};
+
+static struct clk pll1_sysclk3 = {
+        .name           = "pll1_sysclk3",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV3,
+};
+
+static struct clk pll1_sysclk4 = {
+        .name           = "pll1_sysclk4",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV4,
+};
+
+static struct clk pll1_sysclk5 = {
+        .name           = "pll1_sysclk5",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV5,
+};
+
+static struct clk pll1_sysclk6 = {
+        .name           = "pll1_sysclk6",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV6,
+};
+
+static struct clk pll1_sysclk7 = {
+        .name           = "pll1_sysclk7",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV7,
+};
+
+static struct clk pll1_sysclk8 = {
+        .name           = "pll1_sysclk8",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV8,
+};
+
+static struct clk pll1_sysclk9 = {
+        .name           = "pll1_sysclk9",
+        .parent         = &pll1_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV9,
+};
+
+static struct clk pll2_clk = {
+        .name           = "pll2",
+        .parent         = &ref_clk,
+        .flags          = CLK_PLL,
+        .pll_data       = &pll2_data,
+};
+
+static struct clk pll2_aux_clk = {
+        .name           = "pll2_aux_clk",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+};
+
+static struct clk clkout1_clk = {
+        .name           = "clkout1",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL | PRE_PLL,
+};
+
+static struct clk pll2_sysclk1 = {
+        .name           = "pll2_sysclk1",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV1,
+};
+
+static struct clk pll2_sysclk2 = {
+        .name           = "pll2_sysclk2",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV2,
+};
+
+static struct clk pll2_sysclk3 = {
+        .name           = "pll2_sysclk3",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV3,
+};
+
+static struct clk pll2_sysclk4 = {
+        .name           = "pll2_sysclk4",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV4,
+};
+
+static struct clk pll2_sysclk5 = {
+        .name           = "pll2_sysclk5",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV5,
+};
+
+static struct clk pll2_sysclk6 = {
+        .name           = "pll2_sysclk6",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV6,
+};
+
+static struct clk pll2_sysclk7 = {
+        .name           = "pll2_sysclk7",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV7,
+};
+
+static struct clk pll2_sysclk8 = {
+        .name           = "pll2_sysclk8",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV8,
+};
+
+static struct clk pll2_sysclk9 = {
+        .name           = "pll2_sysclk9",
+        .parent         = &pll2_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV9,
+};
+
+static struct clk vpss_dac_clk = {
+        .name           = "vpss_dac",
+        .parent         = &pll1_sysclk3,
+        .lpsc           = DM365_LPSC_DAC_CLK,
+};
+
+static struct clk vpss_master_clk = {
+        .name           = "vpss_master",
+        .parent         = &pll1_sysclk5,
+        .lpsc           = DM365_LPSC_VPSSMSTR,
+        .flags          = CLK_PSC,
+};
+
+static struct clk arm_clk = {
+        .name           = "arm_clk",
+        .parent         = &pll2_sysclk2,
+        .lpsc           = DAVINCI_LPSC_ARM,
+        .flags          = ALWAYS_ENABLED,
+};
+
+static struct clk uart0_clk = {
+        .name           = "uart0",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_UART0,
+};
+
+static struct clk uart1_clk = {
+        .name           = "uart1",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DAVINCI_LPSC_UART1,
+};
+
+static struct clk i2c_clk = {
+        .name           = "i2c",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_I2C,
+};
+
+static struct clk mmcsd0_clk = {
+        .name           = "mmcsd0",
+        .parent         = &pll1_sysclk8,
+        .lpsc           = DAVINCI_LPSC_MMC_SD,
+};
+
+static struct clk mmcsd1_clk = {
+        .name           = "mmcsd1",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DM365_LPSC_MMC_SD1,
+};
+
+static struct clk spi0_clk = {
+        .name           = "spi0",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DAVINCI_LPSC_SPI,
+};
+
+static struct clk spi1_clk = {
+        .name           = "spi1",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DM365_LPSC_SPI1,
+};
+
+static struct clk spi2_clk = {
+        .name           = "spi2",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DM365_LPSC_SPI2,
+};
+
+static struct clk spi3_clk = {
+        .name           = "spi3",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DM365_LPSC_SPI3,
+};
+
+static struct clk spi4_clk = {
+        .name           = "spi4",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DM365_LPSC_SPI4,
+};
+
+static struct clk gpio_clk = {
+        .name           = "gpio",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DAVINCI_LPSC_GPIO,
+};
+
+static struct clk aemif_clk = {
+        .name           = "aemif",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DAVINCI_LPSC_AEMIF,
+};
+
+static struct clk pwm0_clk = {
+        .name           = "pwm0",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_PWM0,
+};
+
+static struct clk pwm1_clk = {
+        .name           = "pwm1",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_PWM1,
+};
+
+static struct clk pwm2_clk = {
+        .name           = "pwm2",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_PWM2,
+};
+
+static struct clk pwm3_clk = {
+        .name           = "pwm3",
+        .parent         = &ref_clk,
+        .lpsc           = DM365_LPSC_PWM3,
+};
+
+static struct clk timer0_clk = {
+        .name           = "timer0",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_TIMER0,
+};
+
+static struct clk timer1_clk = {
+        .name           = "timer1",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_TIMER1,
+};
+
+static struct clk timer2_clk = {
+        .name           = "timer2",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DAVINCI_LPSC_TIMER2,
+        .usecount       = 1,
+};
+
+static struct clk timer3_clk = {
+        .name           = "timer3",
+        .parent         = &pll1_aux_clk,
+        .lpsc           = DM365_LPSC_TIMER3,
+};
+
+static struct clk usb_clk = {
+        .name           = "usb",
+        .parent         = &pll2_sysclk1,
+        .lpsc           = DAVINCI_LPSC_USB,
+};
+
+static struct clk emac_clk = {
+        .name           = "emac",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DM365_LPSC_EMAC,
+};
+
+static struct clk voicecodec_clk = {
+        .name           = "voice_codec",
+        .parent         = &pll2_sysclk4,
+        .lpsc           = DM365_LPSC_VOICE_CODEC,
+};
+
+static struct clk asp0_clk = {
+        .name           = "asp0",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DM365_LPSC_McBSP1,
+};
+
+static struct clk rto_clk = {
+        .name           = "rto",
+        .parent         = &pll1_sysclk4,
+        .lpsc           = DM365_LPSC_RTO,
+};
+
+static struct clk mjcp_clk = {
+        .name           = "mjcp",
+        .parent         = &pll1_sysclk3,
+        .lpsc           = DM365_LPSC_MJCP,
+};
+
+static struct davinci_clk dm365_clks[] = {
+        CLK(NULL, "ref", &ref_clk),
+        CLK(NULL, "pll1", &pll1_clk),
+        CLK(NULL, "pll1_aux", &pll1_aux_clk),
+        CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
+        CLK(NULL, "clkout0", &clkout0_clk),
+        CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
+        CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
+        CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
+        CLK(NULL, "pll1_sysclk4", &pll1_sysclk4),
+        CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
+        CLK(NULL, "pll1_sysclk6", &pll1_sysclk6),
+        CLK(NULL, "pll1_sysclk7", &pll1_sysclk7),
+        CLK(NULL, "pll1_sysclk8", &pll1_sysclk8),
+        CLK(NULL, "pll1_sysclk9", &pll1_sysclk9),
+        CLK(NULL, "pll2", &pll2_clk),
+        CLK(NULL, "pll2_aux", &pll2_aux_clk),
+        CLK(NULL, "clkout1", &clkout1_clk),
+        CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
+        CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
+        CLK(NULL, "pll2_sysclk3", &pll2_sysclk3),
+        CLK(NULL, "pll2_sysclk4", &pll2_sysclk4),
+        CLK(NULL, "pll2_sysclk5", &pll2_sysclk5),
+        CLK(NULL, "pll2_sysclk6", &pll2_sysclk6),
+        CLK(NULL, "pll2_sysclk7", &pll2_sysclk7),
+        CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
+        CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
+        CLK(NULL, "vpss_dac", &vpss_dac_clk),
+        CLK(NULL, "vpss_master", &vpss_master_clk),
+        CLK(NULL, "arm", &arm_clk),
+        CLK(NULL, "uart0", &uart0_clk),
+        CLK(NULL, "uart1", &uart1_clk),
+        CLK("i2c_davinci.1", NULL, &i2c_clk),
+        CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
+        CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
+        CLK("spi_davinci.0", NULL, &spi0_clk),
+        CLK("spi_davinci.1", NULL, &spi1_clk),
+        CLK("spi_davinci.2", NULL, &spi2_clk),
+        CLK("spi_davinci.3", NULL, &spi3_clk),
+        CLK("spi_davinci.4", NULL, &spi4_clk),
+        CLK(NULL, "gpio", &gpio_clk),
+        CLK(NULL, "aemif", &aemif_clk),
+        CLK(NULL, "pwm0", &pwm0_clk),
+        CLK(NULL, "pwm1", &pwm1_clk),
+        CLK(NULL, "pwm2", &pwm2_clk),
+        CLK(NULL, "pwm3", &pwm3_clk),
+        CLK(NULL, "timer0", &timer0_clk),
+        CLK(NULL, "timer1", &timer1_clk),
+        CLK("watchdog", NULL, &timer2_clk),
+        CLK(NULL, "timer3", &timer3_clk),
+        CLK(NULL, "usb", &usb_clk),
+        CLK("davinci_emac.1", NULL, &emac_clk),
+        CLK("voice_codec", NULL, &voicecodec_clk),
+        CLK("soc-audio.0", NULL, &asp0_clk),
+        CLK(NULL, "rto", &rto_clk),
+        CLK(NULL, "mjcp", &mjcp_clk),
+        CLK(NULL, NULL, NULL),
+};
+
+/*----------------------------------------------------------------------*/
+
+#define PINMUX0         0x00
+#define PINMUX1         0x04
+#define PINMUX2         0x08
+#define PINMUX3         0x0c
+#define PINMUX4         0x10
+#define INTMUX          0x18
+#define EVTMUX          0x1c
+
+
+static const struct mux_config dm365_pins[] = {
+#ifdef CONFIG_DAVINCI_MUX
+MUX_CFG(DM365,  MMCSD0,         0,   24,     1,   0,     false)
+
+MUX_CFG(DM365,  SD1_CLK,        0,   16,    3,    1,     false)
+MUX_CFG(DM365,  SD1_CMD,        4,   30,    3,    1,     false)
+MUX_CFG(DM365,  SD1_DATA3,      4,   28,    3,    1,     false)
+MUX_CFG(DM365,  SD1_DATA2,      4,   26,    3,    1,     false)
+MUX_CFG(DM365,  SD1_DATA1,      4,   24,    3,    1,     false)
+MUX_CFG(DM365,  SD1_DATA0,      4,   22,    3,    1,     false)
+
+MUX_CFG(DM365,  I2C_SDA,        3,   23,    3,    2,     false)
+MUX_CFG(DM365,  I2C_SCL,        3,   21,    3,    2,     false)
+
+MUX_CFG(DM365,  AEMIF_AR,       2,   0,     3,    1,     false)
+MUX_CFG(DM365,  AEMIF_A3,       2,   2,     3,    1,     false)
+MUX_CFG(DM365,  AEMIF_A7,       2,   4,     3,    1,     false)
+MUX_CFG(DM365,  AEMIF_D15_8,    2,   6,     1,    1,     false)
+MUX_CFG(DM365,  AEMIF_CE0,      2,   7,     1,    0,     false)
+
+MUX_CFG(DM365,  MCBSP0_BDX,     0,   23,    1,    1,     false)
+MUX_CFG(DM365,  MCBSP0_X,       0,   22,    1,    1,     false)
+MUX_CFG(DM365,  MCBSP0_BFSX,    0,   21,    1,    1,     false)
+MUX_CFG(DM365,  MCBSP0_BDR,     0,   20,    1,    1,     false)
+MUX_CFG(DM365,  MCBSP0_R,       0,   19,    1,    1,     false)
+MUX_CFG(DM365,  MCBSP0_BFSR,    0,   18,    1,    1,     false)
+
+MUX_CFG(DM365,  SPI0_SCLK,      3,   28,    1,    1,     false)
+MUX_CFG(DM365,  SPI0_SDI,       3,   26,    3,    1,     false)
+MUX_CFG(DM365,  SPI0_SDO,       3,   25,    1,    1,     false)
+MUX_CFG(DM365,  SPI0_SDENA0,    3,   29,    3,    1,     false)
+MUX_CFG(DM365,  SPI0_SDENA1,    3,   26,    3,    2,     false)
+
+MUX_CFG(DM365,  UART0_RXD,      3,   20,    1,    1,     false)
+MUX_CFG(DM365,  UART0_TXD,      3,   19,    1,    1,     false)
+MUX_CFG(DM365,  UART1_RXD,      3,   17,    3,    2,     false)
+MUX_CFG(DM365,  UART1_TXD,      3,   15,    3,    2,     false)
+MUX_CFG(DM365,  UART1_RTS,      3,   23,    3,    1,     false)
+MUX_CFG(DM365,  UART1_CTS,      3,   21,    3,    1,     false)
+
+MUX_CFG(DM365,  EMAC_TX_EN,     3,   17,    3,    1,     false)
+MUX_CFG(DM365,  EMAC_TX_CLK,    3,   15,    3,    1,     false)
+MUX_CFG(DM365,  EMAC_COL,       3,   14,    1,    1,     false)
+MUX_CFG(DM365,  EMAC_TXD3,      3,   13,    1,    1,     false)
+MUX_CFG(DM365,  EMAC_TXD2,      3,   12,    1,    1,     false)
+MUX_CFG(DM365,  EMAC_TXD1,      3,   11,    1,    1,     false)
+MUX_CFG(DM365,  EMAC_TXD0,      3,   10,    1,    1,     false)
+MUX_CFG(DM365,  EMAC_RXD3,      3,   9,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_RXD2,      3,   8,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_RXD1,      3,   7,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_RXD0,      3,   6,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_RX_CLK,    3,   5,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_RX_DV,     3,   4,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_RX_ER,     3,   3,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_CRS,       3,   2,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_MDIO,      3,   1,     1,    1,     false)
+MUX_CFG(DM365,  EMAC_MDCLK,     3,   0,     1,    1,     false)
+
+MUX_CFG(DM365,  KEYPAD,         2,   0,     0x3f, 0x3f,  false)
+
+MUX_CFG(DM365,  PWM0,           1,   0,     3,    2,     false)
+MUX_CFG(DM365,  PWM0_G23,       3,   26,    3,    3,     false)
+MUX_CFG(DM365,  PWM1,           1,   2,     3,    2,     false)
+MUX_CFG(DM365,  PWM1_G25,       3,   29,    3,    2,     false)
+MUX_CFG(DM365,  PWM2_G87,       1,   10,    3,    2,     false)
+MUX_CFG(DM365,  PWM2_G88,       1,   8,     3,    2,     false)
+MUX_CFG(DM365,  PWM2_G89,       1,   6,     3,    2,     false)
+MUX_CFG(DM365,  PWM2_G90,       1,   4,     3,    2,     false)
+MUX_CFG(DM365,  PWM3_G80,       1,   20,    3,    3,     false)
+MUX_CFG(DM365,  PWM3_G81,       1,   18,    3,    3,     false)
+MUX_CFG(DM365,  PWM3_G85,       1,   14,    3,    2,     false)
+MUX_CFG(DM365,  PWM3_G86,       1,   12,    3,    2,     false)
+
+MUX_CFG(DM365,  SPI1_SCLK,      4,   2,     3,    1,     false)
+MUX_CFG(DM365,  SPI1_SDI,       3,   31,    1,    1,     false)
+MUX_CFG(DM365,  SPI1_SDO,       4,   0,     3,    1,     false)
+MUX_CFG(DM365,  SPI1_SDENA0,    4,   4,     3,    1,     false)
+MUX_CFG(DM365,  SPI1_SDENA1,    4,   0,     3,    2,     false)
+
+MUX_CFG(DM365,  SPI2_SCLK,      4,   10,    3,    1,     false)
+MUX_CFG(DM365,  SPI2_SDI,       4,   6,     3,    1,     false)
+MUX_CFG(DM365,  SPI2_SDO,       4,   8,     3,    1,     false)
+MUX_CFG(DM365,  SPI2_SDENA0,    4,   12,    3,    1,     false)
+MUX_CFG(DM365,  SPI2_SDENA1,    4,   8,     3,    2,     false)
+
+MUX_CFG(DM365,  SPI3_SCLK,      0,   0,     3,    2,     false)
+MUX_CFG(DM365,  SPI3_SDI,       0,   2,     3,    2,     false)
+MUX_CFG(DM365,  SPI3_SDO,       0,   6,     3,    2,     false)
+MUX_CFG(DM365,  SPI3_SDENA0,    0,   4,     3,    2,     false)
+MUX_CFG(DM365,  SPI3_SDENA1,    0,   6,     3,    3,     false)
+
+MUX_CFG(DM365,  SPI4_SCLK,      4,   18,    3,    1,     false)
+MUX_CFG(DM365,  SPI4_SDI,       4,   14,    3,    1,     false)
+MUX_CFG(DM365,  SPI4_SDO,       4,   16,    3,    1,     false)
+MUX_CFG(DM365,  SPI4_SDENA0,    4,   20,    3,    1,     false)
+MUX_CFG(DM365,  SPI4_SDENA1,    4,   16,    3,    2,     false)
+
+MUX_CFG(DM365,  GPIO20,         3,   21,    3,    0,     false)
+MUX_CFG(DM365,  GPIO33,         4,   12,    3,    0,     false)
+MUX_CFG(DM365,  GPIO40,         4,   26,    3,    0,     false)
+
+MUX_CFG(DM365,  VOUT_FIELD,     1,   18,    3,    1,     false)
+MUX_CFG(DM365,  VOUT_FIELD_G81, 1,   18,    3,    0,     false)
+MUX_CFG(DM365,  VOUT_HVSYNC,    1,   16,    1,    0,     false)
+MUX_CFG(DM365,  VOUT_COUTL_EN,  1,   0,     0xff, 0x55,  false)
+MUX_CFG(DM365,  VOUT_COUTH_EN,  1,   8,     0xff, 0x55,  false)
+MUX_CFG(DM365,  VIN_CAM_WEN,    0,   14,    3,    0,     false)
+MUX_CFG(DM365,  VIN_CAM_VD,     0,   13,    1,    0,     false)
+MUX_CFG(DM365,  VIN_CAM_HD,     0,   12,    1,    0,     false)
+MUX_CFG(DM365,  VIN_YIN4_7_EN,  0,   0,     0xff, 0,     false)
+MUX_CFG(DM365,  VIN_YIN0_3_EN,  0,   8,     0xf,  0,     false)
+
+INT_CFG(DM365,  INT_EDMA_CC,         2,     1,    1,     false)
+INT_CFG(DM365,  INT_EDMA_TC0_ERR,    3,     1,    1,     false)
+INT_CFG(DM365,  INT_EDMA_TC1_ERR,    4,     1,    1,     false)
+INT_CFG(DM365,  INT_EDMA_TC2_ERR,    22,    1,    1,     false)
+INT_CFG(DM365,  INT_EDMA_TC3_ERR,    23,    1,    1,     false)
+INT_CFG(DM365,  INT_PRTCSS,          10,    1,    1,     false)
+INT_CFG(DM365,  INT_EMAC_RXTHRESH,   14,    1,    1,     false)
+INT_CFG(DM365,  INT_EMAC_RXPULSE,    15,    1,    1,     false)
+INT_CFG(DM365,  INT_EMAC_TXPULSE,    16,    1,    1,     false)
+INT_CFG(DM365,  INT_EMAC_MISCPULSE,  17,    1,    1,     false)
+INT_CFG(DM365,  INT_IMX0_ENABLE,     0,     1,    0,     false)
+INT_CFG(DM365,  INT_IMX0_DISABLE,    0,     1,    1,     false)
+INT_CFG(DM365,  INT_HDVICP_ENABLE,   0,     1,    1,     false)
+INT_CFG(DM365,  INT_HDVICP_DISABLE,  0,     1,    0,     false)
+INT_CFG(DM365,  INT_IMX1_ENABLE,     24,    1,    1,     false)
+INT_CFG(DM365,  INT_IMX1_DISABLE,    24,    1,    0,     false)
+INT_CFG(DM365,  INT_NSF_ENABLE,      25,    1,    1,     false)
+INT_CFG(DM365,  INT_NSF_DISABLE,     25,    1,    0,     false)
+#endif
+};
+
+static struct emac_platform_data dm365_emac_pdata = {
+        .ctrl_reg_offset        = DM365_EMAC_CNTRL_OFFSET,
+        .ctrl_mod_reg_offset    = DM365_EMAC_CNTRL_MOD_OFFSET,
+        .ctrl_ram_offset        = DM365_EMAC_CNTRL_RAM_OFFSET,
+        .mdio_reg_offset        = DM365_EMAC_MDIO_OFFSET,
+        .ctrl_ram_size          = DM365_EMAC_CNTRL_RAM_SIZE,
+        .version                = EMAC_VERSION_2,
+};
+
+static struct resource dm365_emac_resources[] = {
+        {
+                .start  = DM365_EMAC_BASE,
+                .end    = DM365_EMAC_BASE + 0x47ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_DM365_EMAC_RXTHRESH,
+                .end    = IRQ_DM365_EMAC_RXTHRESH,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DM365_EMAC_RXPULSE,
+                .end    = IRQ_DM365_EMAC_RXPULSE,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DM365_EMAC_TXPULSE,
+                .end    = IRQ_DM365_EMAC_TXPULSE,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .start  = IRQ_DM365_EMAC_MISCPULSE,
+                .end    = IRQ_DM365_EMAC_MISCPULSE,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device dm365_emac_device = {
+        .name           = "davinci_emac",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &dm365_emac_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(dm365_emac_resources),
+        .resource       = dm365_emac_resources,
+};
+
+static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
+        [IRQ_VDINT0]                    = 2,
+        [IRQ_VDINT1]                    = 6,
+        [IRQ_VDINT2]                    = 6,
+        [IRQ_HISTINT]                   = 6,
+        [IRQ_H3AINT]                    = 6,
+        [IRQ_PRVUINT]                   = 6,
+        [IRQ_RSZINT]                    = 6,
+        [IRQ_DM365_INSFINT]             = 7,
+        [IRQ_VENCINT]                   = 6,
+        [IRQ_ASQINT]                    = 6,
+        [IRQ_IMXINT]                    = 6,
+        [IRQ_DM365_IMCOPINT]            = 4,
+        [IRQ_USBINT]                    = 4,
+        [IRQ_DM365_RTOINT]              = 7,
+        [IRQ_DM365_TINT5]               = 7,
+        [IRQ_DM365_TINT6]               = 5,
+        [IRQ_CCINT0]                    = 5,
+        [IRQ_CCERRINT]                  = 5,
+        [IRQ_TCERRINT0]                 = 5,
+        [IRQ_TCERRINT]                  = 7,
+        [IRQ_PSCIN]                     = 4,
+        [IRQ_DM365_SPINT2_1]            = 7,
+        [IRQ_DM365_TINT7]               = 7,
+        [IRQ_DM365_SDIOINT0]            = 7,
+        [IRQ_MBXINT]                    = 7,
+        [IRQ_MBRINT]                    = 7,
+        [IRQ_MMCINT]                    = 7,
+        [IRQ_DM365_MMCINT1]             = 7,
+        [IRQ_DM365_PWMINT3]             = 7,
+        [IRQ_DDRINT]                    = 4,
+        [IRQ_AEMIFINT]                  = 2,
+        [IRQ_DM365_SDIOINT1]            = 2,
+        [IRQ_TINT0_TINT12]              = 7,
+        [IRQ_TINT0_TINT34]              = 7,
+        [IRQ_TINT1_TINT12]              = 7,
+        [IRQ_TINT1_TINT34]              = 7,
+        [IRQ_PWMINT0]                   = 7,
+        [IRQ_PWMINT1]                   = 3,
+        [IRQ_PWMINT2]                   = 3,
+        [IRQ_I2C]                       = 3,
+        [IRQ_UARTINT0]                  = 3,
+        [IRQ_UARTINT1]                  = 3,
+        [IRQ_DM365_SPIINT0_0]           = 3,
+        [IRQ_DM365_SPIINT3_0]           = 3,
+        [IRQ_DM365_GPIO0]               = 3,
+        [IRQ_DM365_GPIO1]               = 7,
+        [IRQ_DM365_GPIO2]               = 4,
+        [IRQ_DM365_GPIO3]               = 4,
+        [IRQ_DM365_GPIO4]               = 7,
+        [IRQ_DM365_GPIO5]               = 7,
+        [IRQ_DM365_GPIO6]               = 7,
+        [IRQ_DM365_GPIO7]               = 7,
+        [IRQ_DM365_EMAC_RXTHRESH]       = 7,
+        [IRQ_DM365_EMAC_RXPULSE]        = 7,
+        [IRQ_DM365_EMAC_TXPULSE]        = 7,
+        [IRQ_DM365_EMAC_MISCPULSE]      = 7,
+        [IRQ_DM365_GPIO12]              = 7,
+        [IRQ_DM365_GPIO13]              = 7,
+        [IRQ_DM365_GPIO14]              = 7,
+        [IRQ_DM365_GPIO15]              = 7,
+        [IRQ_DM365_KEYINT]              = 7,
+        [IRQ_DM365_TCERRINT2]           = 7,
+        [IRQ_DM365_TCERRINT3]           = 7,
+        [IRQ_DM365_EMUINT]              = 7,
+};
+
+/* Four Transfer Controllers on DM365 */
+static const s8
+dm365_queue_tc_mapping[][2] = {
+        /* {event queue no, TC no} */
+        {0, 0},
+        {1, 1},
+        {2, 2},
+        {3, 3},
+        {-1, -1},
+};
+
+static const s8
+dm365_queue_priority_mapping[][2] = {
+        /* {event queue no, Priority} */
+        {0, 7},
+        {1, 7},
+        {2, 7},
+        {3, 0},
+        {-1, -1},
+};
+
+static struct edma_soc_info dm365_edma_info[] = {
+        {
+                .n_channel              = 64,
+                .n_region               = 4,
+                .n_slot                 = 256,
+                .n_tc                   = 4,
+                .n_cc                   = 1,
+                .queue_tc_mapping       = dm365_queue_tc_mapping,
+                .queue_priority_mapping = dm365_queue_priority_mapping,
+                .default_queue          = EVENTQ_2,
+        },
+};
+
+static struct resource edma_resources[] = {
+        {
+                .name   = "edma_cc0",
+                .start  = 0x01c00000,
+                .end    = 0x01c00000 + SZ_64K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma_tc0",
+                .start  = 0x01c10000,
+                .end    = 0x01c10000 + SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma_tc1",
+                .start  = 0x01c10400,
+                .end    = 0x01c10400 + SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma_tc2",
+                .start  = 0x01c10800,
+                .end    = 0x01c10800 + SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma_tc3",
+                .start  = 0x01c10c00,
+                .end    = 0x01c10c00 + SZ_1K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = "edma0",
+                .start  = IRQ_CCINT0,
+                .flags  = IORESOURCE_IRQ,
+        },
+        {
+                .name   = "edma0_err",
+                .start  = IRQ_CCERRINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+        /* not using TC*_ERR */
+};
+
+static struct platform_device dm365_edma_device = {
+        .name                   = "edma",
+        .id                     = 0,
+        .dev.platform_data      = dm365_edma_info,
+        .num_resources          = ARRAY_SIZE(edma_resources),
+        .resource               = edma_resources,
+};
+
+static struct map_desc dm365_io_desc[] = {
+        {
+                .virtual        = IO_VIRT,
+                .pfn            = __phys_to_pfn(IO_PHYS),
+                .length         = IO_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
+                .virtual        = SRAM_VIRT,
+                .pfn            = __phys_to_pfn(0x00010000),
+                .length         = SZ_32K,
+                /* MT_MEMORY_NONCACHED requires supersection alignment */
+                .type           = MT_DEVICE,
+        },
+};
+
+/* Contents of JTAG ID register used to identify exact cpu type */
+static struct davinci_id dm365_ids[] = {
+        {
+                .variant        = 0x0,
+                .part_no        = 0xb83e,
+                .manufacturer   = 0x017,
+                .cpu_id         = DAVINCI_CPU_ID_DM365,
+                .name           = "dm365_rev1.1",
+        },
+        {
+                .variant        = 0x8,
+                .part_no        = 0xb83e,
+                .manufacturer   = 0x017,
+                .cpu_id         = DAVINCI_CPU_ID_DM365,
+                .name           = "dm365_rev1.2",
+        },
+};
+
+static void __iomem *dm365_psc_bases[] = {
+        IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
+};
+
+struct davinci_timer_info dm365_timer_info = {
+        .timers         = davinci_timer_instance,
+        .clockevent_id  = T0_BOT,
+        .clocksource_id = T0_TOP,
+};
+
+static struct plat_serial8250_port dm365_serial_platform_data[] = {
+        {
+                .mapbase        = DAVINCI_UART0_BASE,
+                .irq            = IRQ_UARTINT0,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
+                                  UPF_IOREMAP,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+        },
+        {
+                .mapbase        = DAVINCI_UART1_BASE,
+                .irq            = IRQ_UARTINT1,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
+                                  UPF_IOREMAP,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+        },
+        {
+                .flags          = 0
+        },
+};
+
+static struct platform_device dm365_serial_device = {
+        .name                   = "serial8250",
+        .id                     = PLAT8250_DEV_PLATFORM,
+        .dev                    = {
+                .platform_data  = dm365_serial_platform_data,
+        },
+};
+
+static struct davinci_soc_info davinci_soc_info_dm365 = {
+        .io_desc                = dm365_io_desc,
+        .io_desc_num            = ARRAY_SIZE(dm365_io_desc),
+        .jtag_id_base           = IO_ADDRESS(0x01c40028),
+        .ids                    = dm365_ids,
+        .ids_num                = ARRAY_SIZE(dm365_ids),
+        .cpu_clks               = dm365_clks,
+        .psc_bases              = dm365_psc_bases,
+        .psc_bases_num          = ARRAY_SIZE(dm365_psc_bases),
+        .pinmux_base            = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
+        .pinmux_pins            = dm365_pins,
+        .pinmux_pins_num        = ARRAY_SIZE(dm365_pins),
+        .intc_base              = IO_ADDRESS(DAVINCI_ARM_INTC_BASE),
+        .intc_type              = DAVINCI_INTC_TYPE_AINTC,
+        .intc_irq_prios         = dm365_default_priorities,
+        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
+        .timer_info             = &dm365_timer_info,
+        .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
+        .gpio_num               = 104,
+        .gpio_irq               = IRQ_DM365_GPIO0,
+        .gpio_unbanked          = 8,    /* really 16 ... skip muxed GPIOs */
+        .serial_dev             = &dm365_serial_device,
+        .emac_pdata             = &dm365_emac_pdata,
+        .sram_dma               = 0x00010000,
+        .sram_len               = SZ_32K,
+};
+
+void __init dm365_init(void)
+{
+        davinci_common_init(&davinci_soc_info_dm365);
+}
+
+static int __init dm365_init_devices(void)
+{
+        if (!cpu_is_davinci_dm365())
+                return 0;
+
+        davinci_cfg_reg(DM365_INT_EDMA_CC);
+        platform_device_register(&dm365_edma_device);
+        platform_device_register(&dm365_emac_device);
+
+        return 0;
+}
+postcore_initcall(dm365_init_devices);
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index fb5449b3c97b..d6e0fa5a8d8a 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -27,6 +27,7 @@
 #include <mach/time.h>
 #include <mach/serial.h>
 #include <mach/common.h>
+#include <mach/asp.h>
 
 #include "clock.h"
 #include "mux.h"
@@ -303,7 +304,7 @@ struct davinci_clk dm644x_clks[] = {
         CLK("davinci_emac.1", NULL, &emac_clk),
         CLK("i2c_davinci.1", NULL, &i2c_clk),
         CLK("palm_bk3710", NULL, &ide_clk),
-        CLK("soc-audio.0", NULL, &asp_clk),
+        CLK("davinci-asp", NULL, &asp_clk),
         CLK("davinci_mmc.0", NULL, &mmcsd_clk),
         CLK(NULL, "spi", &spi_clk),
         CLK(NULL, "gpio", &gpio_clk),
@@ -484,17 +485,38 @@ static const s8 dma_chan_dm644x_no_event[] = {
         -1
 };
 
-static struct edma_soc_info dm644x_edma_info = {
-        .n_channel      = 64,
-        .n_region       = 4,
-        .n_slot         = 128,
-        .n_tc           = 2,
-        .noevent        = dma_chan_dm644x_no_event,
+static const s8
+queue_tc_mapping[][2] = {
+        /* {event queue no, TC no} */
+        {0, 0},
+        {1, 1},
+        {-1, -1},
+};
+
+static const s8
+queue_priority_mapping[][2] = {
+        /* {event queue no, Priority} */
+        {0, 3},
+        {1, 7},
+        {-1, -1},
+};
+
+static struct edma_soc_info dm644x_edma_info[] = {
+        {
+                .n_channel              = 64,
+                .n_region               = 4,
+                .n_slot                 = 128,
+                .n_tc                   = 2,
+                .n_cc                   = 1,
+                .noevent                = dma_chan_dm644x_no_event,
+                .queue_tc_mapping       = queue_tc_mapping,
+                .queue_priority_mapping = queue_priority_mapping,
+        },
 };
 
 static struct resource edma_resources[] = {
         {
-                .name   = "edma_cc",
+                .name   = "edma_cc0",
                 .start  = 0x01c00000,
                 .end    = 0x01c00000 + SZ_64K - 1,
                 .flags  = IORESOURCE_MEM,
@@ -512,10 +534,12 @@ static struct resource edma_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
+                .name   = "edma0",
                 .start  = IRQ_CCINT0,
                 .flags  = IORESOURCE_IRQ,
         },
         {
+                .name   = "edma0_err",
                 .start  = IRQ_CCERRINT,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -524,12 +548,91 @@ static struct resource edma_resources[] = {
 
 static struct platform_device dm644x_edma_device = {
         .name                   = "edma",
-        .id                     = -1,
-        .dev.platform_data      = &dm644x_edma_info,
+        .id                     = 0,
+        .dev.platform_data      = dm644x_edma_info,
         .num_resources          = ARRAY_SIZE(edma_resources),
         .resource               = edma_resources,
 };
 
+/* DM6446 EVM uses ASP0; line-out is a pair of RCA jacks */
+static struct resource dm644x_asp_resources[] = {
+        {
+                .start  = DAVINCI_ASP0_BASE,
+                .end    = DAVINCI_ASP0_BASE + SZ_8K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = DAVINCI_DMA_ASP0_TX,
+                .end    = DAVINCI_DMA_ASP0_TX,
+                .flags  = IORESOURCE_DMA,
+        },
+        {
+                .start  = DAVINCI_DMA_ASP0_RX,
+                .end    = DAVINCI_DMA_ASP0_RX,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device dm644x_asp_device = {
+        .name           = "davinci-asp",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm644x_asp_resources),
+        .resource       = dm644x_asp_resources,
+};
+
+static struct resource dm644x_vpss_resources[] = {
+        {
+                /* VPSS Base address */
+                .name           = "vpss",
+                .start          = 0x01c73400,
+                .end            = 0x01c73400 + 0xff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device dm644x_vpss_device = {
+        .name                   = "vpss",
+        .id                     = -1,
+        .dev.platform_data      = "dm644x_vpss",
+        .num_resources          = ARRAY_SIZE(dm644x_vpss_resources),
+        .resource               = dm644x_vpss_resources,
+};
+
+static struct resource vpfe_resources[] = {
+        {
+                .start          = IRQ_VDINT0,
+                .end            = IRQ_VDINT0,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = IRQ_VDINT1,
+                .end            = IRQ_VDINT1,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 0x01c70400,
+                .end            = 0x01c70400 + 0xff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device vpfe_capture_dev = {
+        .name           = CAPTURE_DRV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(vpfe_resources),
+        .resource       = vpfe_resources,
+        .dev = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+void dm644x_set_vpfe_config(struct vpfe_config *cfg)
+{
+        vpfe_capture_dev.dev.platform_data = cfg;
+}
+
 /*----------------------------------------------------------------------*/
 
 static struct map_desc dm644x_io_desc[] = {
@@ -557,6 +660,13 @@ static struct davinci_id dm644x_ids[] = {
                 .cpu_id         = DAVINCI_CPU_ID_DM6446,
                 .name           = "dm6446",
         },
+        {
+                .variant        = 0x1,
+                .part_no        = 0xb700,
+                .manufacturer   = 0x017,
+                .cpu_id         = DAVINCI_CPU_ID_DM6446,
+                .name           = "dm6446a",
+        },
 };
 
 static void __iomem *dm644x_psc_bases[] = {
@@ -630,7 +740,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
         .intc_irq_prios         = dm644x_default_priorities,
         .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
         .timer_info             = &dm644x_timer_info,
-        .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
         .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
         .gpio_num               = 71,
         .gpio_irq               = IRQ_GPIOBNK0,
@@ -640,6 +749,13 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
         .sram_len               = SZ_16K,
 };
 
+void __init dm644x_init_asp(struct snd_platform_data *pdata)
+{
+        davinci_cfg_reg(DM644X_MCBSP);
+        dm644x_asp_device.dev.platform_data = pdata;
+        platform_device_register(&dm644x_asp_device);
+}
+
 void __init dm644x_init(void)
 {
         davinci_common_init(&davinci_soc_info_dm644x);
@@ -652,6 +768,9 @@ static int __init dm644x_init_devices(void)
 
         platform_device_register(&dm644x_edma_device);
         platform_device_register(&dm644x_emac_device);
+        platform_device_register(&dm644x_vpss_device);
+        platform_device_register(&vpfe_capture_dev);
+
         return 0;
 }
 postcore_initcall(dm644x_init_devices);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 334f0711e0f5..0976049c7b3b 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -27,10 +27,20 @@
 #include <mach/time.h>
 #include <mach/serial.h>
 #include <mach/common.h>
+#include <mach/asp.h>
 
 #include "clock.h"
 #include "mux.h"
 
+#define DAVINCI_VPIF_BASE       (0x01C12000)
+#define VDD3P3V_PWDN_OFFSET     (0x48)
+#define VSCLKDIS_OFFSET         (0x6C)
+
+#define VDD3P3V_VID_MASK        (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
+                                        BIT_MASK(0))
+#define VSCLKDIS_MASK           (BIT_MASK(11) | BIT_MASK(10) | BIT_MASK(9) |\
+                                        BIT_MASK(8))
+
 /*
  * Device specific clocks
  */
@@ -162,6 +172,41 @@ static struct clk arm_clk = {
         .flags = ALWAYS_ENABLED,
 };
 
+static struct clk edma_cc_clk = {
+        .name = "edma_cc",
+        .parent = &pll1_sysclk2,
+        .lpsc = DM646X_LPSC_TPCC,
+        .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc0_clk = {
+        .name = "edma_tc0",
+        .parent = &pll1_sysclk2,
+        .lpsc = DM646X_LPSC_TPTC0,
+        .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc1_clk = {
+        .name = "edma_tc1",
+        .parent = &pll1_sysclk2,
+        .lpsc = DM646X_LPSC_TPTC1,
+        .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc2_clk = {
+        .name = "edma_tc2",
+        .parent = &pll1_sysclk2,
+        .lpsc = DM646X_LPSC_TPTC2,
+        .flags = ALWAYS_ENABLED,
+};
+
+static struct clk edma_tc3_clk = {
+        .name = "edma_tc3",
+        .parent = &pll1_sysclk2,
+        .lpsc = DM646X_LPSC_TPTC3,
+        .flags = ALWAYS_ENABLED,
+};
+
 static struct clk uart0_clk = {
         .name = "uart0",
         .parent = &aux_clkin,
@@ -192,6 +237,18 @@ static struct clk gpio_clk = {
         .lpsc = DM646X_LPSC_GPIO,
 };
 
+static struct clk mcasp0_clk = {
+        .name = "mcasp0",
+        .parent = &pll1_sysclk3,
+        .lpsc = DM646X_LPSC_McASP0,
+};
+
+static struct clk mcasp1_clk = {
+        .name = "mcasp1",
+        .parent = &pll1_sysclk3,
+        .lpsc = DM646X_LPSC_McASP1,
+};
+
 static struct clk aemif_clk = {
         .name = "aemif",
         .parent = &pll1_sysclk3,
@@ -237,6 +294,13 @@ static struct clk timer2_clk = {
         .flags = ALWAYS_ENABLED, /* no LPSC, always enabled; c.f. spruep9a */
 };
 
+
+static struct clk ide_clk = {
+        .name = "ide",
+        .parent = &pll1_sysclk4,
+        .lpsc = DAVINCI_LPSC_ATA,
+};
+
 static struct clk vpif0_clk = {
         .name = "vpif0",
         .parent = &ref_clk,
@@ -269,11 +333,18 @@ struct davinci_clk dm646x_clks[] = {
         CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
         CLK(NULL, "dsp", &dsp_clk),
         CLK(NULL, "arm", &arm_clk),
+        CLK(NULL, "edma_cc", &edma_cc_clk),
+        CLK(NULL, "edma_tc0", &edma_tc0_clk),
+        CLK(NULL, "edma_tc1", &edma_tc1_clk),
+        CLK(NULL, "edma_tc2", &edma_tc2_clk),
+        CLK(NULL, "edma_tc3", &edma_tc3_clk),
         CLK(NULL, "uart0", &uart0_clk),
         CLK(NULL, "uart1", &uart1_clk),
         CLK(NULL, "uart2", &uart2_clk),
         CLK("i2c_davinci.1", NULL, &i2c_clk),
         CLK(NULL, "gpio", &gpio_clk),
+        CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
+        CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
         CLK(NULL, "aemif", &aemif_clk),
         CLK("davinci_emac.1", NULL, &emac_clk),
         CLK(NULL, "pwm0", &pwm0_clk),
@@ -281,6 +352,7 @@ struct davinci_clk dm646x_clks[] = {
         CLK(NULL, "timer0", &timer0_clk),
         CLK(NULL, "timer1", &timer1_clk),
         CLK("watchdog", NULL, &timer2_clk),
+        CLK("palm_bk3710", NULL, &ide_clk),
         CLK(NULL, "vpif0", &vpif0_clk),
         CLK(NULL, "vpif1", &vpif1_clk),
         CLK(NULL, NULL, NULL),
@@ -344,7 +416,7 @@ static struct platform_device dm646x_emac_device = {
  */
 static const struct mux_config dm646x_pins[] = {
 #ifdef CONFIG_DAVINCI_MUX
-MUX_CFG(DM646X, ATAEN,          0,   0,     1,    1,     true)
+MUX_CFG(DM646X, ATAEN,          0,   0,     5,    1,     true)
 
 MUX_CFG(DM646X, AUDCK1,         0,   29,    1,    0,     false)
 
@@ -451,17 +523,43 @@ static const s8 dma_chan_dm646x_no_event[] = {
         -1
 };
 
-static struct edma_soc_info dm646x_edma_info = {
-        .n_channel      = 64,
-        .n_region       = 6,    /* 0-1, 4-7 */
-        .n_slot         = 512,
-        .n_tc           = 4,
-        .noevent        = dma_chan_dm646x_no_event,
+/* Four Transfer Controllers on DM646x */
+static const s8
+dm646x_queue_tc_mapping[][2] = {
+        /* {event queue no, TC no} */
+        {0, 0},
+        {1, 1},
+        {2, 2},
+        {3, 3},
+        {-1, -1},
+};
+
+static const s8
+dm646x_queue_priority_mapping[][2] = {
+        /* {event queue no, Priority} */
+        {0, 4},
+        {1, 0},
+        {2, 5},
+        {3, 1},
+        {-1, -1},
+};
+
+static struct edma_soc_info dm646x_edma_info[] = {
+        {
+                .n_channel              = 64,
+                .n_region               = 6,    /* 0-1, 4-7 */
+                .n_slot                 = 512,
+                .n_tc                   = 4,
+                .n_cc                   = 1,
+                .noevent                = dma_chan_dm646x_no_event,
+                .queue_tc_mapping       = dm646x_queue_tc_mapping,
+                .queue_priority_mapping = dm646x_queue_priority_mapping,
+        },
 };
 
 static struct resource edma_resources[] = {
         {
-                .name   = "edma_cc",
+                .name   = "edma_cc0",
                 .start  = 0x01c00000,
                 .end    = 0x01c00000 + SZ_64K - 1,
                 .flags  = IORESOURCE_MEM,
@@ -491,10 +589,12 @@ static struct resource edma_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
+                .name   = "edma0",
                 .start  = IRQ_CCINT0,
                 .flags  = IORESOURCE_IRQ,
         },
         {
+                .name   = "edma0_err",
                 .start  = IRQ_CCERRINT,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -503,12 +603,167 @@ static struct resource edma_resources[] = {
 
 static struct platform_device dm646x_edma_device = {
         .name                   = "edma",
-        .id                     = -1,
-        .dev.platform_data      = &dm646x_edma_info,
+        .id                     = 0,
+        .dev.platform_data      = dm646x_edma_info,
         .num_resources          = ARRAY_SIZE(edma_resources),
         .resource               = edma_resources,
 };
 
+static struct resource ide_resources[] = {
+        {
+                .start          = DM646X_ATA_REG_BASE,
+                .end            = DM646X_ATA_REG_BASE + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = IRQ_DM646X_IDE,
+                .end            = IRQ_DM646X_IDE,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static u64 ide_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device ide_dev = {
+        .name           = "palm_bk3710",
+        .id             = -1,
+        .resource       = ide_resources,
+        .num_resources  = ARRAY_SIZE(ide_resources),
+        .dev = {
+                .dma_mask               = &ide_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+static struct resource dm646x_mcasp0_resources[] = {
+        {
+                .name   = "mcasp0",
+                .start  = DAVINCI_DM646X_MCASP0_REG_BASE,
+                .end    = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* first TX, then RX */
+        {
+                .start  = DAVINCI_DM646X_DMA_MCASP0_AXEVT0,
+                .end    = DAVINCI_DM646X_DMA_MCASP0_AXEVT0,
+                .flags  = IORESOURCE_DMA,
+        },
+        {
+                .start  = DAVINCI_DM646X_DMA_MCASP0_AREVT0,
+                .end    = DAVINCI_DM646X_DMA_MCASP0_AREVT0,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct resource dm646x_mcasp1_resources[] = {
+        {
+                .name   = "mcasp1",
+                .start  = DAVINCI_DM646X_MCASP1_REG_BASE,
+                .end    = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* DIT mode, only TX event */
+        {
+                .start  = DAVINCI_DM646X_DMA_MCASP1_AXEVT1,
+                .end    = DAVINCI_DM646X_DMA_MCASP1_AXEVT1,
+                .flags  = IORESOURCE_DMA,
+        },
+        /* DIT mode, dummy entry */
+        {
+                .start  = -1,
+                .end    = -1,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device dm646x_mcasp0_device = {
+        .name           = "davinci-mcasp",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(dm646x_mcasp0_resources),
+        .resource       = dm646x_mcasp0_resources,
+};
+
+static struct platform_device dm646x_mcasp1_device = {
+        .name           = "davinci-mcasp",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(dm646x_mcasp1_resources),
+        .resource       = dm646x_mcasp1_resources,
+};
+
+static struct platform_device dm646x_dit_device = {
+        .name   = "spdif-dit",
+        .id     = -1,
+};
+
+static u64 vpif_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource vpif_resource[] = {
+        {
+                .start  = DAVINCI_VPIF_BASE,
+                .end    = DAVINCI_VPIF_BASE + 0x03ff,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device vpif_dev = {
+        .name           = "vpif",
+        .id             = -1,
+        .dev            = {
+                        .dma_mask               = &vpif_dma_mask,
+                        .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = vpif_resource,
+        .num_resources  = ARRAY_SIZE(vpif_resource),
+};
+
+static struct resource vpif_display_resource[] = {
+        {
+                .start = IRQ_DM646X_VP_VERTINT2,
+                .end   = IRQ_DM646X_VP_VERTINT2,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_DM646X_VP_VERTINT3,
+                .end   = IRQ_DM646X_VP_VERTINT3,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device vpif_display_dev = {
+        .name           = "vpif_display",
+        .id             = -1,
+        .dev            = {
+                        .dma_mask               = &vpif_dma_mask,
+                        .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = vpif_display_resource,
+        .num_resources  = ARRAY_SIZE(vpif_display_resource),
+};
+
+static struct resource vpif_capture_resource[] = {
+        {
+                .start = IRQ_DM646X_VP_VERTINT0,
+                .end   = IRQ_DM646X_VP_VERTINT0,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_DM646X_VP_VERTINT1,
+                .end   = IRQ_DM646X_VP_VERTINT1,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device vpif_capture_dev = {
+        .name           = "vpif_capture",
+        .id             = -1,
+        .dev            = {
+                        .dma_mask               = &vpif_dma_mask,
+                        .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = vpif_capture_resource,
+        .num_resources  = ARRAY_SIZE(vpif_capture_resource),
+};
+
 /*----------------------------------------------------------------------*/
 
 static struct map_desc dm646x_io_desc[] = {
@@ -609,7 +864,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
         .intc_irq_prios         = dm646x_default_priorities,
         .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
         .timer_info             = &dm646x_timer_info,
-        .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
         .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
         .gpio_num               = 43, /* Only 33 usable */
         .gpio_irq               = IRQ_DM646X_GPIOBNK0,
@@ -619,6 +873,51 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
         .sram_len               = SZ_32K,
 };
 
+void __init dm646x_init_ide()
+{
+        davinci_cfg_reg(DM646X_ATAEN);
+        platform_device_register(&ide_dev);
+}
+
+void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
+{
+        dm646x_mcasp0_device.dev.platform_data = pdata;
+        platform_device_register(&dm646x_mcasp0_device);
+}
+
+void __init dm646x_init_mcasp1(struct snd_platform_data *pdata)
+{
+        dm646x_mcasp1_device.dev.platform_data = pdata;
+        platform_device_register(&dm646x_mcasp1_device);
+        platform_device_register(&dm646x_dit_device);
+}
+
+void dm646x_setup_vpif(struct vpif_display_config *display_config,
+                       struct vpif_capture_config *capture_config)
+{
+        unsigned int value;
+        void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
+
+        value = __raw_readl(base + VSCLKDIS_OFFSET);
+        value &= ~VSCLKDIS_MASK;
+        __raw_writel(value, base + VSCLKDIS_OFFSET);
+
+        value = __raw_readl(base + VDD3P3V_PWDN_OFFSET);
+        value &= ~VDD3P3V_VID_MASK;
+        __raw_writel(value, base + VDD3P3V_PWDN_OFFSET);
+
+        davinci_cfg_reg(DM646X_STSOMUX_DISABLE);
+        davinci_cfg_reg(DM646X_STSIMUX_DISABLE);
+        davinci_cfg_reg(DM646X_PTSOMUX_DISABLE);
+        davinci_cfg_reg(DM646X_PTSIMUX_DISABLE);
+
+        vpif_display_dev.dev.platform_data = display_config;
+        vpif_capture_dev.dev.platform_data = capture_config;
+        platform_device_register(&vpif_dev);
+        platform_device_register(&vpif_display_dev);
+        platform_device_register(&vpif_capture_dev);
+}
+
 void __init dm646x_init(void)
 {
         davinci_common_init(&davinci_soc_info_dm646x);
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 15e9eb158bb7..f2e57d272958 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -100,132 +100,158 @@
 #define EDMA_SHADOW0    0x2000  /* 4 regions shadowing global channels */
 #define EDMA_PARM       0x4000  /* 128 param entries */
 
-#define DAVINCI_DMA_3PCC_BASE   0x01C00000
-
 #define PARM_OFFSET(param_no)   (EDMA_PARM + ((param_no) << 5))
 
+#define EDMA_DCHMAP     0x0100  /* 64 registers */
+#define CHMAP_EXIST     BIT(24)
+
 #define EDMA_MAX_DMACH           64
 #define EDMA_MAX_PARAMENTRY     512
-#define EDMA_MAX_EVQUE            2     /* FIXME too small */
+#define EDMA_MAX_CC               2
 
 
 /*****************************************************************************/
 
-static void __iomem *edmacc_regs_base;
+static void __iomem *edmacc_regs_base[EDMA_MAX_CC];
 
-static inline unsigned int edma_read(int offset)
+static inline unsigned int edma_read(unsigned ctlr, int offset)
 {
-        return (unsigned int)__raw_readl(edmacc_regs_base + offset);
+        return (unsigned int)__raw_readl(edmacc_regs_base[ctlr] + offset);
 }
 
-static inline void edma_write(int offset, int val)
+static inline void edma_write(unsigned ctlr, int offset, int val)
 {
-        __raw_writel(val, edmacc_regs_base + offset);
+        __raw_writel(val, edmacc_regs_base[ctlr] + offset);
 }
-static inline void edma_modify(int offset, unsigned and, unsigned or)
+static inline void edma_modify(unsigned ctlr, int offset, unsigned and,
+                unsigned or)
 {
-        unsigned val = edma_read(offset);
+        unsigned val = edma_read(ctlr, offset);
         val &= and;
         val |= or;
-        edma_write(offset, val);
+        edma_write(ctlr, offset, val);
 }
-static inline void edma_and(int offset, unsigned and)
+static inline void edma_and(unsigned ctlr, int offset, unsigned and)
 {
-        unsigned val = edma_read(offset);
+        unsigned val = edma_read(ctlr, offset);
         val &= and;
-        edma_write(offset, val);
+        edma_write(ctlr, offset, val);
 }
-static inline void edma_or(int offset, unsigned or)
+static inline void edma_or(unsigned ctlr, int offset, unsigned or)
 {
-        unsigned val = edma_read(offset);
+        unsigned val = edma_read(ctlr, offset);
         val |= or;
-        edma_write(offset, val);
+        edma_write(ctlr, offset, val);
 }
-static inline unsigned int edma_read_array(int offset, int i)
+static inline unsigned int edma_read_array(unsigned ctlr, int offset, int i)
 {
-        return edma_read(offset + (i << 2));
+        return edma_read(ctlr, offset + (i << 2));
 }
-static inline void edma_write_array(int offset, int i, unsigned val)
+static inline void edma_write_array(unsigned ctlr, int offset, int i,
+                unsigned val)
 {
-        edma_write(offset + (i << 2), val);
+        edma_write(ctlr, offset + (i << 2), val);
 }
-static inline void edma_modify_array(int offset, int i,
+static inline void edma_modify_array(unsigned ctlr, int offset, int i,
                 unsigned and, unsigned or)
 {
-        edma_modify(offset + (i << 2), and, or);
+        edma_modify(ctlr, offset + (i << 2), and, or);
 }
-static inline void edma_or_array(int offset, int i, unsigned or)
+static inline void edma_or_array(unsigned ctlr, int offset, int i, unsigned or)
 {
-        edma_or(offset + (i << 2), or);
+        edma_or(ctlr, offset + (i << 2), or);
 }
-static inline void edma_or_array2(int offset, int i, int j, unsigned or)
+static inline void edma_or_array2(unsigned ctlr, int offset, int i, int j,
+                unsigned or)
 {
-        edma_or(offset + ((i*2 + j) << 2), or);
+        edma_or(ctlr, offset + ((i*2 + j) << 2), or);
 }
-static inline void edma_write_array2(int offset, int i, int j, unsigned val)
+static inline void edma_write_array2(unsigned ctlr, int offset, int i, int j,
+                unsigned val)
 {
-        edma_write(offset + ((i*2 + j) << 2), val);
+        edma_write(ctlr, offset + ((i*2 + j) << 2), val);
 }
-static inline unsigned int edma_shadow0_read(int offset)
+static inline unsigned int edma_shadow0_read(unsigned ctlr, int offset)
 {
-        return edma_read(EDMA_SHADOW0 + offset);
+        return edma_read(ctlr, EDMA_SHADOW0 + offset);
 }
-static inline unsigned int edma_shadow0_read_array(int offset, int i)
+static inline unsigned int edma_shadow0_read_array(unsigned ctlr, int offset,
+                int i)
 {
-        return edma_read(EDMA_SHADOW0 + offset + (i << 2));
+        return edma_read(ctlr, EDMA_SHADOW0 + offset + (i << 2));
 }
-static inline void edma_shadow0_write(int offset, unsigned val)
+static inline void edma_shadow0_write(unsigned ctlr, int offset, unsigned val)
 {
-        edma_write(EDMA_SHADOW0 + offset, val);
+        edma_write(ctlr, EDMA_SHADOW0 + offset, val);
 }
-static inline void edma_shadow0_write_array(int offset, int i, unsigned val)
+static inline void edma_shadow0_write_array(unsigned ctlr, int offset, int i,
+                unsigned val)
 {
-        edma_write(EDMA_SHADOW0 + offset + (i << 2), val);
+        edma_write(ctlr, EDMA_SHADOW0 + offset + (i << 2), val);
 }
-static inline unsigned int edma_parm_read(int offset, int param_no)
+static inline unsigned int edma_parm_read(unsigned ctlr, int offset,
+                int param_no)
 {
-        return edma_read(EDMA_PARM + offset + (param_no << 5));
+        return edma_read(ctlr, EDMA_PARM + offset + (param_no << 5));
 }
-static inline void edma_parm_write(int offset, int param_no, unsigned val)
+static inline void edma_parm_write(unsigned ctlr, int offset, int param_no,
+                unsigned val)
 {
-        edma_write(EDMA_PARM + offset + (param_no << 5), val);
+        edma_write(ctlr, EDMA_PARM + offset + (param_no << 5), val);
 }
-static inline void edma_parm_modify(int offset, int param_no,
+static inline void edma_parm_modify(unsigned ctlr, int offset, int param_no,
                 unsigned and, unsigned or)
 {
-        edma_modify(EDMA_PARM + offset + (param_no << 5), and, or);
+        edma_modify(ctlr, EDMA_PARM + offset + (param_no << 5), and, or);
 }
-static inline void edma_parm_and(int offset, int param_no, unsigned and)
+static inline void edma_parm_and(unsigned ctlr, int offset, int param_no,
+                unsigned and)
 {
-        edma_and(EDMA_PARM + offset + (param_no << 5), and);
+        edma_and(ctlr, EDMA_PARM + offset + (param_no << 5), and);
 }
-static inline void edma_parm_or(int offset, int param_no, unsigned or)
+static inline void edma_parm_or(unsigned ctlr, int offset, int param_no,
+                unsigned or)
 {
-        edma_or(EDMA_PARM + offset + (param_no << 5), or);
+        edma_or(ctlr, EDMA_PARM + offset + (param_no << 5), or);
 }
 
 /*****************************************************************************/
 
 /* actual number of DMA channels and slots on this silicon */
-static unsigned num_channels;
-static unsigned num_slots;
+struct edma {
+        /* how many dma resources of each type */
+        unsigned        num_channels;
+        unsigned        num_region;
+        unsigned        num_slots;
+        unsigned        num_tc;
+        unsigned        num_cc;
+        enum dma_event_q        default_queue;
+
+        /* list of channels with no even trigger; terminated by "-1" */
+        const s8        *noevent;
+
+        /* The edma_inuse bit for each PaRAM slot is clear unless the
+         * channel is in use ... by ARM or DSP, for QDMA, or whatever.
+         */
+        DECLARE_BITMAP(edma_inuse, EDMA_MAX_PARAMENTRY);
 
-static struct dma_interrupt_data {
-        void (*callback)(unsigned channel, unsigned short ch_status,
-                         void *data);
-        void *data;
-} intr_data[EDMA_MAX_DMACH];
+        /* The edma_noevent bit for each channel is clear unless
+         * it doesn't trigger DMA events on this platform.  It uses a
+         * bit of SOC-specific initialization code.
+         */
+        DECLARE_BITMAP(edma_noevent, EDMA_MAX_DMACH);
 
-/* The edma_inuse bit for each PaRAM slot is clear unless the
- * channel is in use ... by ARM or DSP, for QDMA, or whatever.
- */
-static DECLARE_BITMAP(edma_inuse, EDMA_MAX_PARAMENTRY);
+        unsigned        irq_res_start;
+        unsigned        irq_res_end;
 
-/* The edma_noevent bit for each channel is clear unless
- * it doesn't trigger DMA events on this platform.  It uses a
- * bit of SOC-specific initialization code.
- */
-static DECLARE_BITMAP(edma_noevent, EDMA_MAX_DMACH);
+        struct dma_interrupt_data {
+                void (*callback)(unsigned channel, unsigned short ch_status,
+                                void *data);
+                void *data;
+        } intr_data[EDMA_MAX_DMACH];
+};
+
+static struct edma *edma_info[EDMA_MAX_CC];
 
 /* dummy param set used to (re)initialize parameter RAM slots */
 static const struct edmacc_param dummy_paramset = {
@@ -233,47 +259,52 @@ static const struct edmacc_param dummy_paramset = {
         .ccnt = 1,
 };
 
-static const int __initconst
-queue_tc_mapping[EDMA_MAX_EVQUE + 1][2] = {
-/* {event queue no, TC no} */
-        {0, 0},
-        {1, 1},
-        {-1, -1}
-};
-
-static const int __initconst
-queue_priority_mapping[EDMA_MAX_EVQUE + 1][2] = {
-        /* {event queue no, Priority} */
-        {0, 3},
-        {1, 7},
-        {-1, -1}
-};
-
 /*****************************************************************************/
 
-static void map_dmach_queue(unsigned ch_no, enum dma_event_q queue_no)
+static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
+                enum dma_event_q queue_no)
 {
         int bit = (ch_no & 0x7) * 4;
 
         /* default to low priority queue */
         if (queue_no == EVENTQ_DEFAULT)
-                queue_no = EVENTQ_1;
+                queue_no = edma_info[ctlr]->default_queue;
 
         queue_no &= 7;
-        edma_modify_array(EDMA_DMAQNUM, (ch_no >> 3),
+        edma_modify_array(ctlr, EDMA_DMAQNUM, (ch_no >> 3),
                         ~(0x7 << bit), queue_no << bit);
 }
 
-static void __init map_queue_tc(int queue_no, int tc_no)
+static void __init map_queue_tc(unsigned ctlr, int queue_no, int tc_no)
 {
         int bit = queue_no * 4;
-        edma_modify(EDMA_QUETCMAP, ~(0x7 << bit), ((tc_no & 0x7) << bit));
+        edma_modify(ctlr, EDMA_QUETCMAP, ~(0x7 << bit), ((tc_no & 0x7) << bit));
 }
 
-static void __init assign_priority_to_queue(int queue_no, int priority)
+static void __init assign_priority_to_queue(unsigned ctlr, int queue_no,
+                int priority)
 {
         int bit = queue_no * 4;
-        edma_modify(EDMA_QUEPRI, ~(0x7 << bit), ((priority & 0x7) << bit));
+        edma_modify(ctlr, EDMA_QUEPRI, ~(0x7 << bit),
+                        ((priority & 0x7) << bit));
+}
+
+/**
+ * map_dmach_param - Maps channel number to param entry number
+ *
+ * This maps the dma channel number to param entry numberter. In
+ * other words using the DMA channel mapping registers a param entry
+ * can be mapped to any channel
+ *
+ * Callers are responsible for ensuring the channel mapping logic is
+ * included in that particular EDMA variant (Eg : dm646x)
+ *
+ */
+static void __init map_dmach_param(unsigned ctlr)
+{
+        int i;
+        for (i = 0; i < EDMA_MAX_DMACH; i++)
+                edma_write_array(ctlr, EDMA_DCHMAP , i , (i << 5));
 }
 
 static inline void
@@ -281,22 +312,39 @@ setup_dma_interrupt(unsigned lch,
         void (*callback)(unsigned channel, u16 ch_status, void *data),
         void *data)
 {
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(lch);
+        lch = EDMA_CHAN_SLOT(lch);
+
         if (!callback) {
-                edma_shadow0_write_array(SH_IECR, lch >> 5,
+                edma_shadow0_write_array(ctlr, SH_IECR, lch >> 5,
                                 (1 << (lch & 0x1f)));
         }
 
-        intr_data[lch].callback = callback;
-        intr_data[lch].data = data;
+        edma_info[ctlr]->intr_data[lch].callback = callback;
+        edma_info[ctlr]->intr_data[lch].data = data;
 
         if (callback) {
-                edma_shadow0_write_array(SH_ICR, lch >> 5,
+                edma_shadow0_write_array(ctlr, SH_ICR, lch >> 5,
                                 (1 << (lch & 0x1f)));
-                edma_shadow0_write_array(SH_IESR, lch >> 5,
+                edma_shadow0_write_array(ctlr, SH_IESR, lch >> 5,
                                 (1 << (lch & 0x1f)));
         }
 }
 
+static int irq2ctlr(int irq)
+{
+        if (irq >= edma_info[0]->irq_res_start &&
+                irq <= edma_info[0]->irq_res_end)
+                return 0;
+        else if (irq >= edma_info[1]->irq_res_start &&
+                irq <= edma_info[1]->irq_res_end)
+                return 1;
+
+        return -1;
+}
+
 /******************************************************************************
  *
  * DMA interrupt handler
@@ -305,32 +353,39 @@ setup_dma_interrupt(unsigned lch,
 static irqreturn_t dma_irq_handler(int irq, void *data)
 {
         int i;
+        unsigned ctlr;
         unsigned int cnt = 0;
 
+        ctlr = irq2ctlr(irq);
+
         dev_dbg(data, "dma_irq_handler\n");
 
-        if ((edma_shadow0_read_array(SH_IPR, 0) == 0)
-            && (edma_shadow0_read_array(SH_IPR, 1) == 0))
+        if ((edma_shadow0_read_array(ctlr, SH_IPR, 0) == 0)
+            && (edma_shadow0_read_array(ctlr, SH_IPR, 1) == 0))
                 return IRQ_NONE;
 
         while (1) {
                 int j;
-                if (edma_shadow0_read_array(SH_IPR, 0))
+                if (edma_shadow0_read_array(ctlr, SH_IPR, 0))
                         j = 0;
-                else if (edma_shadow0_read_array(SH_IPR, 1))
+                else if (edma_shadow0_read_array(ctlr, SH_IPR, 1))
                         j = 1;
                 else
                         break;
                 dev_dbg(data, "IPR%d %08x\n", j,
-                                edma_shadow0_read_array(SH_IPR, j));
+                                edma_shadow0_read_array(ctlr, SH_IPR, j));
                 for (i = 0; i < 32; i++) {
                         int k = (j << 5) + i;
-                        if (edma_shadow0_read_array(SH_IPR, j) & (1 << i)) {
+                        if (edma_shadow0_read_array(ctlr, SH_IPR, j) &
+                                                        (1 << i)) {
                                 /* Clear the corresponding IPR bits */
-                                edma_shadow0_write_array(SH_ICR, j, (1 << i));
-                                if (intr_data[k].callback) {
-                                        intr_data[k].callback(k, DMA_COMPLETE,
-                                                intr_data[k].data);
+                                edma_shadow0_write_array(ctlr, SH_ICR, j,
+                                                        (1 << i));
+                                if (edma_info[ctlr]->intr_data[k].callback) {
+                                        edma_info[ctlr]->intr_data[k].callback(
+                                                k, DMA_COMPLETE,
+                                                edma_info[ctlr]->intr_data[k].
+                                                data);
                                 }
                         }
                 }
@@ -338,7 +393,7 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
                 if (cnt > 10)
                         break;
         }
-        edma_shadow0_write(SH_IEVAL, 1);
+        edma_shadow0_write(ctlr, SH_IEVAL, 1);
         return IRQ_HANDLED;
 }
 
@@ -350,78 +405,87 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
 static irqreturn_t dma_ccerr_handler(int irq, void *data)
 {
         int i;
+        unsigned ctlr;
         unsigned int cnt = 0;
 
+        ctlr = irq2ctlr(irq);
+
         dev_dbg(data, "dma_ccerr_handler\n");
 
-        if ((edma_read_array(EDMA_EMR, 0) == 0) &&
-            (edma_read_array(EDMA_EMR, 1) == 0) &&
-            (edma_read(EDMA_QEMR) == 0) && (edma_read(EDMA_CCERR) == 0))
+        if ((edma_read_array(ctlr, EDMA_EMR, 0) == 0) &&
+            (edma_read_array(ctlr, EDMA_EMR, 1) == 0) &&
+            (edma_read(ctlr, EDMA_QEMR) == 0) &&
+            (edma_read(ctlr, EDMA_CCERR) == 0))
                 return IRQ_NONE;
 
         while (1) {
                 int j = -1;
-                if (edma_read_array(EDMA_EMR, 0))
+                if (edma_read_array(ctlr, EDMA_EMR, 0))
                         j = 0;
-                else if (edma_read_array(EDMA_EMR, 1))
+                else if (edma_read_array(ctlr, EDMA_EMR, 1))
                         j = 1;
                 if (j >= 0) {
                         dev_dbg(data, "EMR%d %08x\n", j,
-                                        edma_read_array(EDMA_EMR, j));
+                                        edma_read_array(ctlr, EDMA_EMR, j));
                         for (i = 0; i < 32; i++) {
                                 int k = (j << 5) + i;
-                                if (edma_read_array(EDMA_EMR, j) & (1 << i)) {
+                                if (edma_read_array(ctlr, EDMA_EMR, j) &
+                                                        (1 << i)) {
                                         /* Clear the corresponding EMR bits */
-                                        edma_write_array(EDMA_EMCR, j, 1 << i);
+                                        edma_write_array(ctlr, EDMA_EMCR, j,
+                                                        1 << i);
                                         /* Clear any SER */
-                                        edma_shadow0_write_array(SH_SECR, j,
-                                                        (1 << i));
-                                        if (intr_data[k].callback) {
-                                                intr_data[k].callback(k,
-                                                                DMA_CC_ERROR,
-                                                                intr_data
-                                                                [k].data);
+                                        edma_shadow0_write_array(ctlr, SH_SECR,
+                                                                j, (1 << i));
+                                        if (edma_info[ctlr]->intr_data[k].
+                                                                callback) {
+                                                edma_info[ctlr]->intr_data[k].
+                                                callback(k,
+                                                DMA_CC_ERROR,
+                                                edma_info[ctlr]->intr_data
+                                                [k].data);
                                         }
                                 }
                         }
-                } else if (edma_read(EDMA_QEMR)) {
+                } else if (edma_read(ctlr, EDMA_QEMR)) {
                         dev_dbg(data, "QEMR %02x\n",
-                                edma_read(EDMA_QEMR));
+                                edma_read(ctlr, EDMA_QEMR));
                         for (i = 0; i < 8; i++) {
-                                if (edma_read(EDMA_QEMR) & (1 << i)) {
+                                if (edma_read(ctlr, EDMA_QEMR) & (1 << i)) {
                                         /* Clear the corresponding IPR bits */
-                                        edma_write(EDMA_QEMCR, 1 << i);
-                                        edma_shadow0_write(SH_QSECR, (1 << i));
+                                        edma_write(ctlr, EDMA_QEMCR, 1 << i);
+                                        edma_shadow0_write(ctlr, SH_QSECR,
+                                                                (1 << i));
 
                                         /* NOTE:  not reported!! */
                                 }
                         }
-                } else if (edma_read(EDMA_CCERR)) {
+                } else if (edma_read(ctlr, EDMA_CCERR)) {
                         dev_dbg(data, "CCERR %08x\n",
-                                edma_read(EDMA_CCERR));
+                                edma_read(ctlr, EDMA_CCERR));
                         /* FIXME:  CCERR.BIT(16) ignored!  much better
                          * to just write CCERRCLR with CCERR value...
                          */
                         for (i = 0; i < 8; i++) {
-                                if (edma_read(EDMA_CCERR) & (1 << i)) {
+                                if (edma_read(ctlr, EDMA_CCERR) & (1 << i)) {
                                         /* Clear the corresponding IPR bits */
-                                        edma_write(EDMA_CCERRCLR, 1 << i);
+                                        edma_write(ctlr, EDMA_CCERRCLR, 1 << i);
 
                                         /* NOTE:  not reported!! */
                                 }
                         }
                 }
-                if ((edma_read_array(EDMA_EMR, 0) == 0)
-                    && (edma_read_array(EDMA_EMR, 1) == 0)
-                    && (edma_read(EDMA_QEMR) == 0)
-                    && (edma_read(EDMA_CCERR) == 0)) {
+                if ((edma_read_array(ctlr, EDMA_EMR, 0) == 0)
+                    && (edma_read_array(ctlr, EDMA_EMR, 1) == 0)
+                    && (edma_read(ctlr, EDMA_QEMR) == 0)
+                    && (edma_read(ctlr, EDMA_CCERR) == 0)) {
                         break;
                 }
                 cnt++;
                 if (cnt > 10)
                         break;
         }
-        edma_write(EDMA_EEVAL, 1);
+        edma_write(ctlr, EDMA_EEVAL, 1);
         return IRQ_HANDLED;
 }
 
@@ -445,6 +509,45 @@ static irqreturn_t dma_tc1err_handler(int irq, void *data)
         return IRQ_HANDLED;
 }
 
+static int reserve_contiguous_params(int ctlr, unsigned int id,
+                                     unsigned int num_params,
+                                     unsigned int start_param)
+{
+        int i, j;
+        unsigned int count = num_params;
+
+        for (i = start_param; i < edma_info[ctlr]->num_slots; ++i) {
+                j = EDMA_CHAN_SLOT(i);
+                if (!test_and_set_bit(j, edma_info[ctlr]->edma_inuse))
+                        count--;
+                        if (count == 0)
+                                break;
+                else if (id == EDMA_CONT_PARAMS_FIXED_EXACT)
+                        break;
+                else
+                        count = num_params;
+        }
+
+        /*
+         * We have to clear any bits that we set
+         * if we run out parameter RAMs, i.e we do find a set
+         * of contiguous parameter RAMs but do not find the exact number
+         * requested as we may reach the total number of parameter RAMs
+         */
+        if (count) {
+                for (j = i - num_params + count + 1; j <= i ; ++j)
+                        clear_bit(j, edma_info[ctlr]->edma_inuse);
+
+                return -EBUSY;
+        }
+
+        for (j = i - num_params + 1; j <= i; ++j)
+                memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(j),
+                        &dummy_paramset, PARM_SIZE);
+
+        return EDMA_CTLR_CHAN(ctlr, i - num_params + 1);
+}
+
 /*-----------------------------------------------------------------------*/
 
 /* Resource alloc/free:  dma channels, parameter RAM slots */
@@ -484,35 +587,53 @@ int edma_alloc_channel(int channel,
                 void *data,
                 enum dma_event_q eventq_no)
 {
+        unsigned i, done, ctlr = 0;
+
+        if (channel >= 0) {
+                ctlr = EDMA_CTLR(channel);
+                channel = EDMA_CHAN_SLOT(channel);
+        }
+
         if (channel < 0) {
-                channel = 0;
-                for (;;) {
-                        channel = find_next_bit(edma_noevent,
-                                        num_channels, channel);
-                        if (channel == num_channels)
-                                return -ENOMEM;
-                        if (!test_and_set_bit(channel, edma_inuse))
+                for (i = 0; i < EDMA_MAX_CC; i++) {
+                        channel = 0;
+                        for (;;) {
+                                channel = find_next_bit(edma_info[i]->
+                                                edma_noevent,
+                                                edma_info[i]->num_channels,
+                                                channel);
+                                if (channel == edma_info[i]->num_channels)
+                                        return -ENOMEM;
+                                if (!test_and_set_bit(channel,
+                                                edma_info[i]->edma_inuse)) {
+                                        done = 1;
+                                        ctlr = i;
+                                        break;
+                                }
+                                channel++;
+                        }
+                        if (done)
                                 break;
-                        channel++;
                 }
-        } else if (channel >= num_channels) {
+        } else if (channel >= edma_info[ctlr]->num_channels) {
                 return -EINVAL;
-        } else if (test_and_set_bit(channel, edma_inuse)) {
+        } else if (test_and_set_bit(channel, edma_info[ctlr]->edma_inuse)) {
                 return -EBUSY;
         }
 
         /* ensure access through shadow region 0 */
-        edma_or_array2(EDMA_DRAE, 0, channel >> 5, 1 << (channel & 0x1f));
+        edma_or_array2(ctlr, EDMA_DRAE, 0, channel >> 5, 1 << (channel & 0x1f));
 
         /* ensure no events are pending */
-        edma_stop(channel);
-        memcpy_toio(edmacc_regs_base + PARM_OFFSET(channel),
+        edma_stop(EDMA_CTLR_CHAN(ctlr, channel));
+        memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(channel),
                         &dummy_paramset, PARM_SIZE);
 
         if (callback)
-                setup_dma_interrupt(channel, callback, data);
+                setup_dma_interrupt(EDMA_CTLR_CHAN(ctlr, channel),
+                                        callback, data);
 
-        map_dmach_queue(channel, eventq_no);
+        map_dmach_queue(ctlr, channel, eventq_no);
 
         return channel;
 }
@@ -532,15 +653,20 @@ EXPORT_SYMBOL(edma_alloc_channel);
  */
 void edma_free_channel(unsigned channel)
 {
-        if (channel >= num_channels)
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(channel);
+        channel = EDMA_CHAN_SLOT(channel);
+
+        if (channel >= edma_info[ctlr]->num_channels)
                 return;
 
         setup_dma_interrupt(channel, NULL, NULL);
         /* REVISIT should probably take out of shadow region 0 */
 
-        memcpy_toio(edmacc_regs_base + PARM_OFFSET(channel),
+        memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(channel),
                         &dummy_paramset, PARM_SIZE);
-        clear_bit(channel, edma_inuse);
+        clear_bit(channel, edma_info[ctlr]->edma_inuse);
 }
 EXPORT_SYMBOL(edma_free_channel);
 
@@ -558,28 +684,33 @@ EXPORT_SYMBOL(edma_free_channel);
  *
  * Returns the number of the slot, else negative errno.
  */
-int edma_alloc_slot(int slot)
+int edma_alloc_slot(unsigned ctlr, int slot)
 {
+        if (slot >= 0)
+                slot = EDMA_CHAN_SLOT(slot);
+
         if (slot < 0) {
-                slot = num_channels;
+                slot = edma_info[ctlr]->num_channels;
                 for (;;) {
-                        slot = find_next_zero_bit(edma_inuse,
-                                        num_slots, slot);
-                        if (slot == num_slots)
+                        slot = find_next_zero_bit(edma_info[ctlr]->edma_inuse,
+                                        edma_info[ctlr]->num_slots, slot);
+                        if (slot == edma_info[ctlr]->num_slots)
                                 return -ENOMEM;
-                        if (!test_and_set_bit(slot, edma_inuse))
+                        if (!test_and_set_bit(slot,
+                                                edma_info[ctlr]->edma_inuse))
                                 break;
                 }
-        } else if (slot < num_channels || slot >= num_slots) {
+        } else if (slot < edma_info[ctlr]->num_channels ||
+                        slot >= edma_info[ctlr]->num_slots) {
                 return -EINVAL;
-        } else if (test_and_set_bit(slot, edma_inuse)) {
+        } else if (test_and_set_bit(slot, edma_info[ctlr]->edma_inuse)) {
                 return -EBUSY;
         }
 
-        memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot),
+        memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
                         &dummy_paramset, PARM_SIZE);
 
-        return slot;
+        return EDMA_CTLR_CHAN(ctlr, slot);
 }
 EXPORT_SYMBOL(edma_alloc_slot);
 
@@ -593,15 +724,119 @@ EXPORT_SYMBOL(edma_alloc_slot);
  */
 void edma_free_slot(unsigned slot)
 {
-        if (slot < num_channels || slot >= num_slots)
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot < edma_info[ctlr]->num_channels ||
+                slot >= edma_info[ctlr]->num_slots)
                 return;
 
-        memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot),
+        memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
                         &dummy_paramset, PARM_SIZE);
-        clear_bit(slot, edma_inuse);
+        clear_bit(slot, edma_info[ctlr]->edma_inuse);
 }
 EXPORT_SYMBOL(edma_free_slot);
 
+
+/**
+ * edma_alloc_cont_slots- alloc contiguous parameter RAM slots
+ * The API will return the starting point of a set of
+ * contiguous PARAM's that have been requested
+ *
+ * @id: can only be EDMA_CONT_PARAMS_ANY or EDMA_CONT_PARAMS_FIXED_EXACT
+ * or EDMA_CONT_PARAMS_FIXED_NOT_EXACT
+ * @count: number of contiguous Paramter RAM's
+ * @param  - the start value of Parameter RAM that should be passed if id
+ * is EDMA_CONT_PARAMS_FIXED_EXACT or EDMA_CONT_PARAMS_FIXED_NOT_EXACT
+ *
+ * If id is EDMA_CONT_PARAMS_ANY then the API starts looking for a set of
+ * contiguous Parameter RAMs from parameter RAM 64 in the case of DaVinci SOCs
+ * and 32 in the case of Primus
+ *
+ * If id is EDMA_CONT_PARAMS_FIXED_EXACT then the API starts looking for a
+ * set of contiguous parameter RAMs from the "param" that is passed as an
+ * argument to the API.
+ *
+ * If id is EDMA_CONT_PARAMS_FIXED_NOT_EXACT then the API initially tries
+ * starts looking for a set of contiguous parameter RAMs from the "param"
+ * that is passed as an argument to the API. On failure the API will try to
+ * find a set of contiguous Parameter RAMs in the remaining Parameter RAMs
+ */
+int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count)
+{
+        /*
+         * The start slot requested should be greater than
+         * the number of channels and lesser than the total number
+         * of slots
+         */
+        if (slot < edma_info[ctlr]->num_channels ||
+                slot >= edma_info[ctlr]->num_slots)
+                return -EINVAL;
+
+        /*
+         * The number of parameter RAMs requested cannot be less than 1
+         * and cannot be more than the number of slots minus the number of
+         * channels
+         */
+        if (count < 1 || count >
+                (edma_info[ctlr]->num_slots - edma_info[ctlr]->num_channels))
+                return -EINVAL;
+
+        switch (id) {
+        case EDMA_CONT_PARAMS_ANY:
+                return reserve_contiguous_params(ctlr, id, count,
+                                                 edma_info[ctlr]->num_channels);
+        case EDMA_CONT_PARAMS_FIXED_EXACT:
+        case EDMA_CONT_PARAMS_FIXED_NOT_EXACT:
+                return reserve_contiguous_params(ctlr, id, count, slot);
+        default:
+                return -EINVAL;
+        }
+
+}
+EXPORT_SYMBOL(edma_alloc_cont_slots);
+
+/**
+ * edma_free_cont_slots - deallocate DMA parameter RAMs
+ * @slot: first parameter RAM of a set of parameter RAMs to be freed
+ * @count: the number of contiguous parameter RAMs to be freed
+ *
+ * This deallocates the parameter RAM slots allocated by
+ * edma_alloc_cont_slots.
+ * Callers/applications need to keep track of sets of contiguous
+ * parameter RAMs that have been allocated using the edma_alloc_cont_slots
+ * API.
+ * Callers are responsible for ensuring the slots are inactive, and will
+ * not be activated.
+ */
+int edma_free_cont_slots(unsigned slot, int count)
+{
+        unsigned ctlr;
+        int i;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot < edma_info[ctlr]->num_channels ||
+                slot >= edma_info[ctlr]->num_slots ||
+                count < 1)
+                return -EINVAL;
+
+        for (i = slot; i < slot + count; ++i) {
+                ctlr = EDMA_CTLR(i);
+                slot = EDMA_CHAN_SLOT(i);
+
+                memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
+                        &dummy_paramset, PARM_SIZE);
+                clear_bit(slot, edma_info[ctlr]->edma_inuse);
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(edma_free_cont_slots);
+
 /*-----------------------------------------------------------------------*/
 
 /* Parameter RAM operations (i) -- read/write partial slots */
@@ -620,8 +855,13 @@ EXPORT_SYMBOL(edma_free_slot);
 void edma_set_src(unsigned slot, dma_addr_t src_port,
                                 enum address_mode mode, enum fifo_width width)
 {
-        if (slot < num_slots) {
-                unsigned int i = edma_parm_read(PARM_OPT, slot);
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot < edma_info[ctlr]->num_slots) {
+                unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
 
                 if (mode) {
                         /* set SAM and program FWID */
@@ -630,11 +870,11 @@ void edma_set_src(unsigned slot, dma_addr_t src_port,
                         /* clear SAM */
                         i &= ~SAM;
                 }
-                edma_parm_write(PARM_OPT, slot, i);
+                edma_parm_write(ctlr, PARM_OPT, slot, i);
 
                 /* set the source port address
                    in source register of param structure */
-                edma_parm_write(PARM_SRC, slot, src_port);
+                edma_parm_write(ctlr, PARM_SRC, slot, src_port);
         }
 }
 EXPORT_SYMBOL(edma_set_src);
@@ -653,8 +893,13 @@ EXPORT_SYMBOL(edma_set_src);
 void edma_set_dest(unsigned slot, dma_addr_t dest_port,
                                  enum address_mode mode, enum fifo_width width)
 {
-        if (slot < num_slots) {
-                unsigned int i = edma_parm_read(PARM_OPT, slot);
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot < edma_info[ctlr]->num_slots) {
+                unsigned int i = edma_parm_read(ctlr, PARM_OPT, slot);
 
                 if (mode) {
                         /* set DAM and program FWID */
@@ -663,10 +908,10 @@ void edma_set_dest(unsigned slot, dma_addr_t dest_port,
                         /* clear DAM */
                         i &= ~DAM;
                 }
-                edma_parm_write(PARM_OPT, slot, i);
+                edma_parm_write(ctlr, PARM_OPT, slot, i);
                 /* set the destination port address
                    in dest register of param structure */
-                edma_parm_write(PARM_DST, slot, dest_port);
+                edma_parm_write(ctlr, PARM_DST, slot, dest_port);
         }
 }
 EXPORT_SYMBOL(edma_set_dest);
@@ -683,8 +928,12 @@ EXPORT_SYMBOL(edma_set_dest);
 void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst)
 {
         struct edmacc_param temp;
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
 
-        edma_read_slot(slot, &temp);
+        edma_read_slot(EDMA_CTLR_CHAN(ctlr, slot), &temp);
         if (src != NULL)
                 *src = temp.src;
         if (dst != NULL)
@@ -704,10 +953,15 @@ EXPORT_SYMBOL(edma_get_position);
  */
 void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx)
 {
-        if (slot < num_slots) {
-                edma_parm_modify(PARM_SRC_DST_BIDX, slot,
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot < edma_info[ctlr]->num_slots) {
+                edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
                                 0xffff0000, src_bidx);
-                edma_parm_modify(PARM_SRC_DST_CIDX, slot,
+                edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
                                 0xffff0000, src_cidx);
         }
 }
@@ -725,10 +979,15 @@ EXPORT_SYMBOL(edma_set_src_index);
  */
 void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx)
 {
-        if (slot < num_slots) {
-                edma_parm_modify(PARM_SRC_DST_BIDX, slot,
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot < edma_info[ctlr]->num_slots) {
+                edma_parm_modify(ctlr, PARM_SRC_DST_BIDX, slot,
                                 0x0000ffff, dest_bidx << 16);
-                edma_parm_modify(PARM_SRC_DST_CIDX, slot,
+                edma_parm_modify(ctlr, PARM_SRC_DST_CIDX, slot,
                                 0x0000ffff, dest_cidx << 16);
         }
 }
@@ -767,16 +1026,21 @@ void edma_set_transfer_params(unsigned slot,
                 u16 acnt, u16 bcnt, u16 ccnt,
                 u16 bcnt_rld, enum sync_dimension sync_mode)
 {
-        if (slot < num_slots) {
-                edma_parm_modify(PARM_LINK_BCNTRLD, slot,
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot < edma_info[ctlr]->num_slots) {
+                edma_parm_modify(ctlr, PARM_LINK_BCNTRLD, slot,
                                 0x0000ffff, bcnt_rld << 16);
                 if (sync_mode == ASYNC)
-                        edma_parm_and(PARM_OPT, slot, ~SYNCDIM);
+                        edma_parm_and(ctlr, PARM_OPT, slot, ~SYNCDIM);
                 else
-                        edma_parm_or(PARM_OPT, slot, SYNCDIM);
+                        edma_parm_or(ctlr, PARM_OPT, slot, SYNCDIM);
                 /* Set the acount, bcount, ccount registers */
-                edma_parm_write(PARM_A_B_CNT, slot, (bcnt << 16) | acnt);
-                edma_parm_write(PARM_CCNT, slot, ccnt);
+                edma_parm_write(ctlr, PARM_A_B_CNT, slot, (bcnt << 16) | acnt);
+                edma_parm_write(ctlr, PARM_CCNT, slot, ccnt);
         }
 }
 EXPORT_SYMBOL(edma_set_transfer_params);
@@ -790,11 +1054,19 @@ EXPORT_SYMBOL(edma_set_transfer_params);
  */
 void edma_link(unsigned from, unsigned to)
 {
-        if (from >= num_slots)
+        unsigned ctlr_from, ctlr_to;
+
+        ctlr_from = EDMA_CTLR(from);
+        from = EDMA_CHAN_SLOT(from);
+        ctlr_to = EDMA_CTLR(to);
+        to = EDMA_CHAN_SLOT(to);
+
+        if (from >= edma_info[ctlr_from]->num_slots)
                 return;
-        if (to >= num_slots)
+        if (to >= edma_info[ctlr_to]->num_slots)
                 return;
-        edma_parm_modify(PARM_LINK_BCNTRLD, from, 0xffff0000, PARM_OFFSET(to));
+        edma_parm_modify(ctlr_from, PARM_LINK_BCNTRLD, from, 0xffff0000,
+                                PARM_OFFSET(to));
 }
 EXPORT_SYMBOL(edma_link);
 
@@ -807,9 +1079,14 @@ EXPORT_SYMBOL(edma_link);
  */
 void edma_unlink(unsigned from)
 {
-        if (from >= num_slots)
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(from);
+        from = EDMA_CHAN_SLOT(from);
+
+        if (from >= edma_info[ctlr]->num_slots)
                 return;
-        edma_parm_or(PARM_LINK_BCNTRLD, from, 0xffff);
+        edma_parm_or(ctlr, PARM_LINK_BCNTRLD, from, 0xffff);
 }
 EXPORT_SYMBOL(edma_unlink);
 
@@ -829,9 +1106,15 @@ EXPORT_SYMBOL(edma_unlink);
  */
 void edma_write_slot(unsigned slot, const struct edmacc_param *param)
 {
-        if (slot >= num_slots)
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot >= edma_info[ctlr]->num_slots)
                 return;
-        memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), param, PARM_SIZE);
+        memcpy_toio(edmacc_regs_base[ctlr] + PARM_OFFSET(slot), param,
+                        PARM_SIZE);
 }
 EXPORT_SYMBOL(edma_write_slot);
 
@@ -845,9 +1128,15 @@ EXPORT_SYMBOL(edma_write_slot);
  */
 void edma_read_slot(unsigned slot, struct edmacc_param *param)
 {
-        if (slot >= num_slots)
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(slot);
+        slot = EDMA_CHAN_SLOT(slot);
+
+        if (slot >= edma_info[ctlr]->num_slots)
                 return;
-        memcpy_fromio(param, edmacc_regs_base + PARM_OFFSET(slot), PARM_SIZE);
+        memcpy_fromio(param, edmacc_regs_base[ctlr] + PARM_OFFSET(slot),
+                        PARM_SIZE);
 }
 EXPORT_SYMBOL(edma_read_slot);
 
@@ -864,10 +1153,15 @@ EXPORT_SYMBOL(edma_read_slot);
  */
 void edma_pause(unsigned channel)
 {
-        if (channel < num_channels) {
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(channel);
+        channel = EDMA_CHAN_SLOT(channel);
+
+        if (channel < edma_info[ctlr]->num_channels) {
                 unsigned int mask = (1 << (channel & 0x1f));
 
-                edma_shadow0_write_array(SH_EECR, channel >> 5, mask);
+                edma_shadow0_write_array(ctlr, SH_EECR, channel >> 5, mask);
         }
 }
 EXPORT_SYMBOL(edma_pause);
@@ -880,10 +1174,15 @@ EXPORT_SYMBOL(edma_pause);
  */
 void edma_resume(unsigned channel)
 {
-        if (channel < num_channels) {
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(channel);
+        channel = EDMA_CHAN_SLOT(channel);
+
+        if (channel < edma_info[ctlr]->num_channels) {
                 unsigned int mask = (1 << (channel & 0x1f));
 
-                edma_shadow0_write_array(SH_EESR, channel >> 5, mask);
+                edma_shadow0_write_array(ctlr, SH_EESR, channel >> 5, mask);
         }
 }
 EXPORT_SYMBOL(edma_resume);
@@ -901,28 +1200,33 @@ EXPORT_SYMBOL(edma_resume);
  */
 int edma_start(unsigned channel)
 {
-        if (channel < num_channels) {
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(channel);
+        channel = EDMA_CHAN_SLOT(channel);
+
+        if (channel < edma_info[ctlr]->num_channels) {
                 int j = channel >> 5;
                 unsigned int mask = (1 << (channel & 0x1f));
 
                 /* EDMA channels without event association */
-                if (test_bit(channel, edma_noevent)) {
+                if (test_bit(channel, edma_info[ctlr]->edma_noevent)) {
                         pr_debug("EDMA: ESR%d %08x\n", j,
-                                edma_shadow0_read_array(SH_ESR, j));
-                        edma_shadow0_write_array(SH_ESR, j, mask);
+                                edma_shadow0_read_array(ctlr, SH_ESR, j));
+                        edma_shadow0_write_array(ctlr, SH_ESR, j, mask);
                         return 0;
                 }
 
                 /* EDMA channel with event association */
                 pr_debug("EDMA: ER%d %08x\n", j,
-                        edma_shadow0_read_array(SH_ER, j));
+                        edma_shadow0_read_array(ctlr, SH_ER, j));
                 /* Clear any pending error */
-                edma_write_array(EDMA_EMCR, j, mask);
+                edma_write_array(ctlr, EDMA_EMCR, j, mask);
                 /* Clear any SER */
-                edma_shadow0_write_array(SH_SECR, j, mask);
-                edma_shadow0_write_array(SH_EESR, j, mask);
+                edma_shadow0_write_array(ctlr, SH_SECR, j, mask);
+                edma_shadow0_write_array(ctlr, SH_EESR, j, mask);
                 pr_debug("EDMA: EER%d %08x\n", j,
-                        edma_shadow0_read_array(SH_EER, j));
+                        edma_shadow0_read_array(ctlr, SH_EER, j));
                 return 0;
         }
 
@@ -941,17 +1245,22 @@ EXPORT_SYMBOL(edma_start);
  */
 void edma_stop(unsigned channel)
 {
-        if (channel < num_channels) {
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(channel);
+        channel = EDMA_CHAN_SLOT(channel);
+
+        if (channel < edma_info[ctlr]->num_channels) {
                 int j = channel >> 5;
                 unsigned int mask = (1 << (channel & 0x1f));
 
-                edma_shadow0_write_array(SH_EECR, j, mask);
-                edma_shadow0_write_array(SH_ECR, j, mask);
-                edma_shadow0_write_array(SH_SECR, j, mask);
-                edma_write_array(EDMA_EMCR, j, mask);
+                edma_shadow0_write_array(ctlr, SH_EECR, j, mask);
+                edma_shadow0_write_array(ctlr, SH_ECR, j, mask);
+                edma_shadow0_write_array(ctlr, SH_SECR, j, mask);
+                edma_write_array(ctlr, EDMA_EMCR, j, mask);
 
                 pr_debug("EDMA: EER%d %08x\n", j,
-                                edma_shadow0_read_array(SH_EER, j));
+                                edma_shadow0_read_array(ctlr, SH_EER, j));
 
                 /* REVISIT:  consider guarding against inappropriate event
                  * chaining by overwriting with dummy_paramset.
@@ -975,18 +1284,23 @@ EXPORT_SYMBOL(edma_stop);
 
 void edma_clean_channel(unsigned channel)
 {
-        if (channel < num_channels) {
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(channel);
+        channel = EDMA_CHAN_SLOT(channel);
+
+        if (channel < edma_info[ctlr]->num_channels) {
                 int j = (channel >> 5);
                 unsigned int mask = 1 << (channel & 0x1f);
 
                 pr_debug("EDMA: EMR%d %08x\n", j,
-                                edma_read_array(EDMA_EMR, j));
-                edma_shadow0_write_array(SH_ECR, j, mask);
+                                edma_read_array(ctlr, EDMA_EMR, j));
+                edma_shadow0_write_array(ctlr, SH_ECR, j, mask);
                 /* Clear the corresponding EMR bits */
-                edma_write_array(EDMA_EMCR, j, mask);
+                edma_write_array(ctlr, EDMA_EMCR, j, mask);
                 /* Clear any SER */
-                edma_shadow0_write_array(SH_SECR, j, mask);
-                edma_write(EDMA_CCERRCLR, (1 << 16) | 0x3);
+                edma_shadow0_write_array(ctlr, SH_SECR, j, mask);
+                edma_write(ctlr, EDMA_CCERRCLR, (1 << 16) | 0x3);
         }
 }
 EXPORT_SYMBOL(edma_clean_channel);
@@ -998,12 +1312,17 @@ EXPORT_SYMBOL(edma_clean_channel);
  */
 void edma_clear_event(unsigned channel)
 {
-        if (channel >= num_channels)
+        unsigned ctlr;
+
+        ctlr = EDMA_CTLR(channel);
+        channel = EDMA_CHAN_SLOT(channel);
+
+        if (channel >= edma_info[ctlr]->num_channels)
                 return;
         if (channel < 32)
-                edma_write(EDMA_ECR, 1 << channel);
+                edma_write(ctlr, EDMA_ECR, 1 << channel);
         else
-                edma_write(EDMA_ECRH, 1 << (channel - 32));
+                edma_write(ctlr, EDMA_ECRH, 1 << (channel - 32));
 }
 EXPORT_SYMBOL(edma_clear_event);
 
@@ -1012,62 +1331,133 @@ EXPORT_SYMBOL(edma_clear_event);
 static int __init edma_probe(struct platform_device *pdev)
 {
         struct edma_soc_info    *info = pdev->dev.platform_data;
-        int                     i;
-        int                     status;
+        const s8                (*queue_priority_mapping)[2];
+        const s8                (*queue_tc_mapping)[2];
+        int                     i, j, found = 0;
+        int                     status = -1;
         const s8                *noevent;
-        int                     irq = 0, err_irq = 0;
-        struct resource         *r;
-        resource_size_t         len;
+        int                     irq[EDMA_MAX_CC] = {0, 0};
+        int                     err_irq[EDMA_MAX_CC] = {0, 0};
+        struct resource         *r[EDMA_MAX_CC] = {NULL};
+        resource_size_t         len[EDMA_MAX_CC];
+        char                    res_name[10];
+        char                    irq_name[10];
 
         if (!info)
                 return -ENODEV;
 
-        r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "edma_cc");
-        if (!r)
-                return -ENODEV;
+        for (j = 0; j < EDMA_MAX_CC; j++) {
+                sprintf(res_name, "edma_cc%d", j);
+                r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+                                                res_name);
+                if (!r[j]) {
+                        if (found)
+                                break;
+                        else
+                                return -ENODEV;
+                } else
+                        found = 1;
+
+                len[j] = resource_size(r[j]);
+
+                r[j] = request_mem_region(r[j]->start, len[j],
+                        dev_name(&pdev->dev));
+                if (!r[j]) {
+                        status = -EBUSY;
+                        goto fail1;
+                }
 
-        len = r->end - r->start + 1;
+                edmacc_regs_base[j] = ioremap(r[j]->start, len[j]);
+                if (!edmacc_regs_base[j]) {
+                        status = -EBUSY;
+                        goto fail1;
+                }
 
-        r = request_mem_region(r->start, len, r->name);
-        if (!r)
-                return -EBUSY;
+                edma_info[j] = kmalloc(sizeof(struct edma), GFP_KERNEL);
+                if (!edma_info[j]) {
+                        status = -ENOMEM;
+                        goto fail1;
+                }
+                memset(edma_info[j], 0, sizeof(struct edma));
+
+                edma_info[j]->num_channels = min_t(unsigned, info[j].n_channel,
+                                                        EDMA_MAX_DMACH);
+                edma_info[j]->num_slots = min_t(unsigned, info[j].n_slot,
+                                                        EDMA_MAX_PARAMENTRY);
+                edma_info[j]->num_cc = min_t(unsigned, info[j].n_cc,
+                                                        EDMA_MAX_CC);
+
+                edma_info[j]->default_queue = info[j].default_queue;
+                if (!edma_info[j]->default_queue)
+                        edma_info[j]->default_queue = EVENTQ_1;
+
+                dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
+                        edmacc_regs_base[j]);
+
+                for (i = 0; i < edma_info[j]->num_slots; i++)
+                        memcpy_toio(edmacc_regs_base[j] + PARM_OFFSET(i),
+                                        &dummy_paramset, PARM_SIZE);
+
+                noevent = info[j].noevent;
+                if (noevent) {
+                        while (*noevent != -1)
+                                set_bit(*noevent++, edma_info[j]->edma_noevent);
+                }
 
-        edmacc_regs_base = ioremap(r->start, len);
-        if (!edmacc_regs_base) {
-                status = -EBUSY;
-                goto fail1;
-        }
+                sprintf(irq_name, "edma%d", j);
+                irq[j] = platform_get_irq_byname(pdev, irq_name);
+                edma_info[j]->irq_res_start = irq[j];
+                status = request_irq(irq[j], dma_irq_handler, 0, "edma",
+                                        &pdev->dev);
+                if (status < 0) {
+                        dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
+                                irq[j], status);
+                        goto fail;
+                }
 
-        num_channels = min_t(unsigned, info->n_channel, EDMA_MAX_DMACH);
-        num_slots = min_t(unsigned, info->n_slot, EDMA_MAX_PARAMENTRY);
+                sprintf(irq_name, "edma%d_err", j);
+                err_irq[j] = platform_get_irq_byname(pdev, irq_name);
+                edma_info[j]->irq_res_end = err_irq[j];
+                status = request_irq(err_irq[j], dma_ccerr_handler, 0,
+                                        "edma_error", &pdev->dev);
+                if (status < 0) {
+                        dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
+                                err_irq[j], status);
+                        goto fail;
+                }
 
-        dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", edmacc_regs_base);
+                /* Everything lives on transfer controller 1 until otherwise
+                 * specified. This way, long transfers on the low priority queue
+                 * started by the codec engine will not cause audio defects.
+                 */
+                for (i = 0; i < edma_info[j]->num_channels; i++)
+                        map_dmach_queue(j, i, EVENTQ_1);
 
-        for (i = 0; i < num_slots; i++)
-                memcpy_toio(edmacc_regs_base + PARM_OFFSET(i),
-                                &dummy_paramset, PARM_SIZE);
+                queue_tc_mapping = info[j].queue_tc_mapping;
+                queue_priority_mapping = info[j].queue_priority_mapping;
 
-        noevent = info->noevent;
-        if (noevent) {
-                while (*noevent != -1)
-                        set_bit(*noevent++, edma_noevent);
-        }
+                /* Event queue to TC mapping */
+                for (i = 0; queue_tc_mapping[i][0] != -1; i++)
+                        map_queue_tc(j, queue_tc_mapping[i][0],
+                                        queue_tc_mapping[i][1]);
 
-        irq = platform_get_irq(pdev, 0);
-        status = request_irq(irq, dma_irq_handler, 0, "edma", &pdev->dev);
-        if (status < 0) {
-                dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
-                        irq, status);
-                goto fail;
-        }
+                /* Event queue priority mapping */
+                for (i = 0; queue_priority_mapping[i][0] != -1; i++)
+                        assign_priority_to_queue(j,
+                                                queue_priority_mapping[i][0],
+                                                queue_priority_mapping[i][1]);
+
+                /* Map the channel to param entry if channel mapping logic
+                 * exist
+                 */
+                if (edma_read(j, EDMA_CCCFG) & CHMAP_EXIST)
+                        map_dmach_param(j);
 
-        err_irq = platform_get_irq(pdev, 1);
-        status = request_irq(err_irq, dma_ccerr_handler, 0,
-                                "edma_error", &pdev->dev);
-        if (status < 0) {
-                dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n",
-                        err_irq, status);
-                goto fail;
+                for (i = 0; i < info[j].n_region; i++) {
+                        edma_write_array2(j, EDMA_DRAE, i, 0, 0x0);
+                        edma_write_array2(j, EDMA_DRAE, i, 1, 0x0);
+                        edma_write_array(j, EDMA_QRAE, i, 0x0);
+                }
         }
 
         if (tc_errs_handled) {
@@ -1087,38 +1477,23 @@ static int __init edma_probe(struct platform_device *pdev)
                 }
         }
 
-        /* Everything lives on transfer controller 1 until otherwise specified.
-         * This way, long transfers on the low priority queue
-         * started by the codec engine will not cause audio defects.
-         */
-        for (i = 0; i < num_channels; i++)
-                map_dmach_queue(i, EVENTQ_1);
-
-        /* Event queue to TC mapping */
-        for (i = 0; queue_tc_mapping[i][0] != -1; i++)
-                map_queue_tc(queue_tc_mapping[i][0], queue_tc_mapping[i][1]);
-
-        /* Event queue priority mapping */
-        for (i = 0; queue_priority_mapping[i][0] != -1; i++)
-                assign_priority_to_queue(queue_priority_mapping[i][0],
-                                         queue_priority_mapping[i][1]);
-
-        for (i = 0; i < info->n_region; i++) {
-                edma_write_array2(EDMA_DRAE, i, 0, 0x0);
-                edma_write_array2(EDMA_DRAE, i, 1, 0x0);
-                edma_write_array(EDMA_QRAE, i, 0x0);
-        }
-
         return 0;
 
 fail:
-        if (err_irq)
-                free_irq(err_irq, NULL);
-        if (irq)
-                free_irq(irq, NULL);
-        iounmap(edmacc_regs_base);
+        for (i = 0; i < EDMA_MAX_CC; i++) {
+                if (err_irq[i])
+                        free_irq(err_irq[i], &pdev->dev);
+                if (irq[i])
+                        free_irq(irq[i], &pdev->dev);
+        }
 fail1:
-        release_mem_region(r->start, len);
+        for (i = 0; i < EDMA_MAX_CC; i++) {
+                if (r[i])
+                        release_mem_region(r[i]->start, len[i]);
+                if (edmacc_regs_base[i])
+                        iounmap(edmacc_regs_base[i]);
+                kfree(edma_info[i]);
+        }
         return status;
 }
 
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 1b6532159c58..f6ea9db11f41 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -34,6 +34,7 @@ static DEFINE_SPINLOCK(gpio_lock);
 struct davinci_gpio {
         struct gpio_chip        chip;
         struct gpio_controller  *__iomem regs;
+        int                     irq_base;
 };
 
 static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
@@ -161,8 +162,7 @@ pure_initcall(davinci_gpio_setup);
  * used as output pins ... which is convenient for testing.
  *
  * NOTE:  The first few GPIOs also have direct INTC hookups in addition
- * to their GPIOBNK0 irq, with a bit less overhead but less flexibility
- * on triggering (e.g. no edge options).  We don't try to use those.
+ * to their GPIOBNK0 irq, with a bit less overhead.
  *
  * All those INTC hookups (direct, plus several IRQ banks) can also
  * serve as EDMA event triggers.
@@ -171,7 +171,7 @@ pure_initcall(davinci_gpio_setup);
 static void gpio_irq_disable(unsigned irq)
 {
         struct gpio_controller *__iomem g = get_irq_chip_data(irq);
-        u32 mask = __gpio_mask(irq_to_gpio(irq));
+        u32 mask = (u32) get_irq_data(irq);
 
         __raw_writel(mask, &g->clr_falling);
         __raw_writel(mask, &g->clr_rising);
@@ -180,7 +180,7 @@ static void gpio_irq_disable(unsigned irq)
 static void gpio_irq_enable(unsigned irq)
 {
         struct gpio_controller *__iomem g = get_irq_chip_data(irq);
-        u32 mask = __gpio_mask(irq_to_gpio(irq));
+        u32 mask = (u32) get_irq_data(irq);
         unsigned status = irq_desc[irq].status;
 
         status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
@@ -196,7 +196,7 @@ static void gpio_irq_enable(unsigned irq)
 static int gpio_irq_type(unsigned irq, unsigned trigger)
 {
         struct gpio_controller *__iomem g = get_irq_chip_data(irq);
-        u32 mask = __gpio_mask(irq_to_gpio(irq));
+        u32 mask = (u32) get_irq_data(irq);
 
         if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
                 return -EINVAL;
@@ -260,6 +260,45 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
         /* now it may re-trigger */
 }
 
+static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset)
+{
+        struct davinci_gpio *d = container_of(chip, struct davinci_gpio, chip);
+
+        if (d->irq_base >= 0)
+                return d->irq_base + offset;
+        else
+                return -ENODEV;
+}
+
+static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
+{
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+        /* NOTE:  we assume for now that only irqs in the first gpio_chip
+         * can provide direct-mapped IRQs to AINTC (up to 32 GPIOs).
+         */
+        if (offset < soc_info->gpio_unbanked)
+                return soc_info->gpio_irq + offset;
+        else
+                return -ENODEV;
+}
+
+static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger)
+{
+        struct gpio_controller *__iomem g = get_irq_chip_data(irq);
+        u32 mask = (u32) get_irq_data(irq);
+
+        if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
+                return -EINVAL;
+
+        __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
+                     ? &g->set_falling : &g->clr_falling);
+        __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
+                     ? &g->set_rising : &g->clr_rising);
+
+        return 0;
+}
+
 /*
  * NOTE:  for suspend/resume, probably best to make a platform_device with
  * suspend_late/resume_resume calls hooking into results of the set_wake()
@@ -275,6 +314,7 @@ static int __init davinci_gpio_irq_setup(void)
         u32             binten = 0;
         unsigned        ngpio, bank_irq;
         struct davinci_soc_info *soc_info = &davinci_soc_info;
+        struct gpio_controller  *__iomem g;
 
         ngpio = soc_info->gpio_num;
 
@@ -292,12 +332,63 @@ static int __init davinci_gpio_irq_setup(void)
         }
         clk_enable(clk);
 
+        /* Arrange gpio_to_irq() support, handling either direct IRQs or
+         * banked IRQs.  Having GPIOs in the first GPIO bank use direct
+         * IRQs, while the others use banked IRQs, would need some setup
+         * tweaks to recognize hardware which can do that.
+         */
+        for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) {
+                chips[bank].chip.to_irq = gpio_to_irq_banked;
+                chips[bank].irq_base = soc_info->gpio_unbanked
+                        ? -EINVAL
+                        : (soc_info->intc_irq_num + gpio);
+        }
+
+        /*
+         * AINTC can handle direct/unbanked IRQs for GPIOs, with the GPIO
+         * controller only handling trigger modes.  We currently assume no
+         * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
+         */
+        if (soc_info->gpio_unbanked) {
+                static struct irq_chip gpio_irqchip_unbanked;
+
+                /* pass "bank 0" GPIO IRQs to AINTC */
+                chips[0].chip.to_irq = gpio_to_irq_unbanked;
+                binten = BIT(0);
+
+                /* AINTC handles mask/unmask; GPIO handles triggering */
+                irq = bank_irq;
+                gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq));
+                gpio_irqchip_unbanked.name = "GPIO-AINTC";
+                gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked;
+
+                /* default trigger: both edges */
+                g = gpio2controller(0);
+                __raw_writel(~0, &g->set_falling);
+                __raw_writel(~0, &g->set_rising);
+
+                /* set the direct IRQs up to use that irqchip */
+                for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
+                        set_irq_chip(irq, &gpio_irqchip_unbanked);
+                        set_irq_data(irq, (void *) __gpio_mask(gpio));
+                        set_irq_chip_data(irq, g);
+                        irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH;
+                }
+
+                goto done;
+        }
+
+        /*
+         * Or, AINTC can handle IRQs for banks of 16 GPIO IRQs, which we
+         * then chain through our own handler.
+         */
         for (gpio = 0, irq = gpio_to_irq(0), bank = 0;
                         gpio < ngpio;
                         bank++, bank_irq++) {
-                struct gpio_controller  *__iomem g = gpio2controller(gpio);
                 unsigned                i;
 
+                /* disabled by default, enabled only as needed */
+                g = gpio2controller(gpio);
                 __raw_writel(~0, &g->clr_falling);
                 __raw_writel(~0, &g->clr_rising);
 
@@ -309,6 +400,7 @@ static int __init davinci_gpio_irq_setup(void)
                 for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
                         set_irq_chip(irq, &gpio_irqchip);
                         set_irq_chip_data(irq, g);
+                        set_irq_data(irq, (void *) __gpio_mask(gpio));
                         set_irq_handler(irq, handle_simple_irq);
                         set_irq_flags(irq, IRQF_VALID);
                 }
@@ -316,6 +408,7 @@ static int __init davinci_gpio_irq_setup(void)
                 binten |= BIT(bank);
         }
 
+done:
         /* BINTEN -- per-bank interrupt enable. genirq would also let these
          * bits be set/cleared dynamically.
          */
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
index e0abc437d796..18e4ce34ece6 100644
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ b/arch/arm/mach-davinci/include/mach/asp.h
@@ -5,21 +5,73 @@
 #define __ASM_ARCH_DAVINCI_ASP_H
 
 #include <mach/irqs.h>
+#include <mach/edma.h>
 
-/* Bases of register banks */
+/* Bases of dm644x and dm355 register banks */
 #define DAVINCI_ASP0_BASE       0x01E02000
 #define DAVINCI_ASP1_BASE       0x01E04000
 
-/* EDMA channels */
+/* Bases of dm646x register banks */
+#define DAVINCI_DM646X_MCASP0_REG_BASE          0x01D01000
+#define DAVINCI_DM646X_MCASP1_REG_BASE          0x01D01800
+
+/* Bases of da850/da830 McASP0  register banks */
+#define DAVINCI_DA8XX_MCASP0_REG_BASE   0x01D00000
+
+/* Bases of da830 McASP1 register banks */
+#define DAVINCI_DA830_MCASP1_REG_BASE   0x01D04000
+
+/* EDMA channels of dm644x and dm355 */
 #define DAVINCI_DMA_ASP0_TX     2
 #define DAVINCI_DMA_ASP0_RX     3
 #define DAVINCI_DMA_ASP1_TX     8
 #define DAVINCI_DMA_ASP1_RX     9
 
+/* EDMA channels of dm646x */
+#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0        6
+#define DAVINCI_DM646X_DMA_MCASP0_AREVT0        9
+#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1        12
+
+/* EDMA channels of da850/da830 McASP0 */
+#define DAVINCI_DA8XX_DMA_MCASP0_AREVT  0
+#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT  1
+
+/* EDMA channels of da830 McASP1 */
+#define DAVINCI_DA830_DMA_MCASP1_AREVT  2
+#define DAVINCI_DA830_DMA_MCASP1_AXEVT  3
+
 /* Interrupts */
 #define DAVINCI_ASP0_RX_INT     IRQ_MBRINT
 #define DAVINCI_ASP0_TX_INT     IRQ_MBXINT
 #define DAVINCI_ASP1_RX_INT     IRQ_MBRINT
 #define DAVINCI_ASP1_TX_INT     IRQ_MBXINT
 
+struct snd_platform_data {
+        u32 tx_dma_offset;
+        u32 rx_dma_offset;
+        enum dma_event_q eventq_no;     /* event queue number */
+        unsigned int codec_fmt;
+
+        /* McASP specific fields */
+        int tdm_slots;
+        u8 op_mode;
+        u8 num_serializer;
+        u8 *serial_dir;
+        u8 version;
+        u8 txnumevt;
+        u8 rxnumevt;
+};
+
+enum {
+        MCASP_VERSION_1 = 0,    /* DM646x */
+        MCASP_VERSION_2,        /* DA8xx/OMAPL1x */
+};
+
+#define INACTIVE_MODE   0
+#define TX_MODE         1
+#define RX_MODE         2
+
+#define DAVINCI_MCASP_IIS_MODE  0
+#define DAVINCI_MCASP_DIT_MODE  1
+
 #endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index a1f03b606d8f..1fd3917cae4e 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -60,10 +60,10 @@ struct davinci_soc_info {
         u8                              *intc_irq_prios;
         unsigned long                   intc_irq_num;
         struct davinci_timer_info       *timer_info;
-        void __iomem                    *wdt_base;
         void __iomem                    *gpio_base;
         unsigned                        gpio_num;
         unsigned                        gpio_irq;
+        unsigned                        gpio_unbanked;
         struct platform_device          *serial_dev;
         struct emac_platform_data       *emac_pdata;
         dma_addr_t                      sram_dma;
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h
index d12a5ed2959a..189b1ff13642 100644
--- a/arch/arm/mach-davinci/include/mach/cputype.h
+++ b/arch/arm/mach-davinci/include/mach/cputype.h
@@ -30,6 +30,9 @@ struct davinci_id {
 #define DAVINCI_CPU_ID_DM6446           0x64460000
 #define DAVINCI_CPU_ID_DM6467           0x64670000
 #define DAVINCI_CPU_ID_DM355            0x03550000
+#define DAVINCI_CPU_ID_DM365            0x03650000
+#define DAVINCI_CPU_ID_DA830            0x08300000
+#define DAVINCI_CPU_ID_DA850            0x08500000
 
 #define IS_DAVINCI_CPU(type, id)                                        \
 static inline int is_davinci_ ##type(void)                              \
@@ -40,6 +43,9 @@ static inline int is_davinci_ ##type(void)				\
 IS_DAVINCI_CPU(dm644x, DAVINCI_CPU_ID_DM6446)
 IS_DAVINCI_CPU(dm646x, DAVINCI_CPU_ID_DM6467)
 IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355)
+IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365)
+IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830)
+IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850)
 
 #ifdef CONFIG_ARCH_DAVINCI_DM644x
 #define cpu_is_davinci_dm644x() is_davinci_dm644x()
@@ -59,4 +65,22 @@ IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355)
 #define cpu_is_davinci_dm355() 0
 #endif
 
+#ifdef CONFIG_ARCH_DAVINCI_DM365
+#define cpu_is_davinci_dm365() is_davinci_dm365()
+#else
+#define cpu_is_davinci_dm365() 0
+#endif
+
+#ifdef CONFIG_ARCH_DAVINCI_DA830
+#define cpu_is_davinci_da830() is_davinci_da830()
+#else
+#define cpu_is_davinci_da830() 0
+#endif
+
+#ifdef CONFIG_ARCH_DAVINCI_DA850
+#define cpu_is_davinci_da850() is_davinci_da850()
+#else
+#define cpu_is_davinci_da850() 0
+#endif
+
 #endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
new file mode 100644
index 000000000000..d4095d0572c6
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -0,0 +1,121 @@
+/*
+ * Chip specific defines for DA8XX/OMAP L1XX SoC
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
+#define __ASM_ARCH_DAVINCI_DA8XX_H
+
+#include <mach/serial.h>
+#include <mach/edma.h>
+#include <mach/i2c.h>
+#include <mach/emac.h>
+#include <mach/asp.h>
+#include <mach/mmc.h>
+
+/*
+ * The cp_intc interrupt controller for the da8xx isn't in the same
+ * chunk of physical memory space as the other registers (like it is
+ * on the davincis) so it needs to be mapped separately.  It will be
+ * mapped early on when the I/O space is mapped and we'll put it just
+ * before the I/O space in the processor's virtual memory space.
+ */
+#define DA8XX_CP_INTC_BASE      0xfffee000
+#define DA8XX_CP_INTC_SIZE      SZ_8K
+#define DA8XX_CP_INTC_VIRT      (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
+
+#define DA8XX_BOOT_CFG_BASE     (IO_PHYS + 0x14000)
+
+#define DA8XX_PSC0_BASE         0x01c10000
+#define DA8XX_PLL0_BASE         0x01c11000
+#define DA8XX_JTAG_ID_REG       0x01c14018
+#define DA8XX_TIMER64P0_BASE    0x01c20000
+#define DA8XX_TIMER64P1_BASE    0x01c21000
+#define DA8XX_GPIO_BASE         0x01e26000
+#define DA8XX_PSC1_BASE         0x01e27000
+#define DA8XX_LCD_CNTRL_BASE    0x01e13000
+#define DA8XX_MMCSD0_BASE       0x01c40000
+#define DA8XX_AEMIF_CS2_BASE    0x60000000
+#define DA8XX_AEMIF_CS3_BASE    0x62000000
+#define DA8XX_AEMIF_CTL_BASE    0x68000000
+
+#define PINMUX0                 0x00
+#define PINMUX1                 0x04
+#define PINMUX2                 0x08
+#define PINMUX3                 0x0c
+#define PINMUX4                 0x10
+#define PINMUX5                 0x14
+#define PINMUX6                 0x18
+#define PINMUX7                 0x1c
+#define PINMUX8                 0x20
+#define PINMUX9                 0x24
+#define PINMUX10                0x28
+#define PINMUX11                0x2c
+#define PINMUX12                0x30
+#define PINMUX13                0x34
+#define PINMUX14                0x38
+#define PINMUX15                0x3c
+#define PINMUX16                0x40
+#define PINMUX17                0x44
+#define PINMUX18                0x48
+#define PINMUX19                0x4c
+
+void __init da830_init(void);
+void __init da850_init(void);
+
+int da8xx_register_edma(void);
+int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
+int da8xx_register_watchdog(void);
+int da8xx_register_emac(void);
+int da8xx_register_lcdc(void);
+int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
+void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata);
+
+extern struct platform_device da8xx_serial_device;
+extern struct emac_platform_data da8xx_emac_pdata;
+
+extern const short da830_emif25_pins[];
+extern const short da830_spi0_pins[];
+extern const short da830_spi1_pins[];
+extern const short da830_mmc_sd_pins[];
+extern const short da830_uart0_pins[];
+extern const short da830_uart1_pins[];
+extern const short da830_uart2_pins[];
+extern const short da830_usb20_pins[];
+extern const short da830_usb11_pins[];
+extern const short da830_uhpi_pins[];
+extern const short da830_cpgmac_pins[];
+extern const short da830_emif3c_pins[];
+extern const short da830_mcasp0_pins[];
+extern const short da830_mcasp1_pins[];
+extern const short da830_mcasp2_pins[];
+extern const short da830_i2c0_pins[];
+extern const short da830_i2c1_pins[];
+extern const short da830_lcdcntl_pins[];
+extern const short da830_pwm_pins[];
+extern const short da830_ecap0_pins[];
+extern const short da830_ecap1_pins[];
+extern const short da830_ecap2_pins[];
+extern const short da830_eqep0_pins[];
+extern const short da830_eqep1_pins[];
+
+extern const short da850_uart0_pins[];
+extern const short da850_uart1_pins[];
+extern const short da850_uart2_pins[];
+extern const short da850_i2c0_pins[];
+extern const short da850_i2c1_pins[];
+extern const short da850_cpgmac_pins[];
+extern const short da850_mcasp_pins[];
+extern const short da850_lcdcntl_pins[];
+extern const short da850_mmcsd0_pins[];
+extern const short da850_nand_pins[];
+extern const short da850_nor_pins[];
+
+int da8xx_pinmux_setup(const short pins[]);
+
+#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index de3fc2182b47..17ab5236da66 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -24,7 +24,15 @@
                 tst     \rx, #1                 @ MMU enabled?
                 moveq   \rx, #0x01000000        @ physical base address
                 movne   \rx, #0xfe000000        @ virtual base
+#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
+#error Cannot enable DaVinci and DA8XX platforms concurrently
+#elif defined(CONFIG_MACH_DAVINCI_DA830_EVM) || \
+        defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+                orr     \rx, \rx, #0x00d00000   @ physical base address
+                orr     \rx, \rx, #0x0000d000   @ of UART 2
+#else
                 orr     \rx, \rx, #0x00c20000   @ UART 0
+#endif
                 .endm
 
                 .macro  senduart,rd,rx
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h
index 54903b72438e..85536d8e8336 100644
--- a/arch/arm/mach-davinci/include/mach/dm355.h
+++ b/arch/arm/mach-davinci/include/mach/dm355.h
@@ -12,11 +12,18 @@
 #define __ASM_ARCH_DM355_H
 
 #include <mach/hardware.h>
+#include <mach/asp.h>
+#include <media/davinci/vpfe_capture.h>
+
+#define ASP1_TX_EVT_EN  1
+#define ASP1_RX_EVT_EN  2
 
 struct spi_board_info;
 
 void __init dm355_init(void);
 void dm355_init_spi0(unsigned chipselect_mask,
                 struct spi_board_info *info, unsigned len);
+void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
+void dm355_set_vpfe_config(struct vpfe_config *cfg);
 
 #endif /* __ASM_ARCH_DM355_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
new file mode 100644
index 000000000000..09db4343bb4c
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Incorporated
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __ASM_ARCH_DM365_H
+#define __ASM_ARCH_DM665_H
+
+#include <linux/platform_device.h>
+#include <mach/hardware.h>
+#include <mach/emac.h>
+
+#define DM365_EMAC_BASE                 (0x01D07000)
+#define DM365_EMAC_CNTRL_OFFSET         (0x0000)
+#define DM365_EMAC_CNTRL_MOD_OFFSET     (0x3000)
+#define DM365_EMAC_CNTRL_RAM_OFFSET     (0x1000)
+#define DM365_EMAC_MDIO_OFFSET          (0x4000)
+#define DM365_EMAC_CNTRL_RAM_SIZE       (0x2000)
+
+void __init dm365_init(void);
+
+#endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 15d42b92a8c9..0efb73852c2c 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -25,6 +25,8 @@
 #include <linux/platform_device.h>
 #include <mach/hardware.h>
 #include <mach/emac.h>
+#include <mach/asp.h>
+#include <media/davinci/vpfe_capture.h>
 
 #define DM644X_EMAC_BASE                (0x01C80000)
 #define DM644X_EMAC_CNTRL_OFFSET        (0x0000)
@@ -34,5 +36,7 @@
 #define DM644X_EMAC_CNTRL_RAM_SIZE      (0x2000)
 
 void __init dm644x_init(void);
+void __init dm644x_init_asp(struct snd_platform_data *pdata);
+void dm644x_set_vpfe_config(struct vpfe_config *cfg);
 
 #endif /* __ASM_ARCH_DM644X_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 1fc764c8646e..8cec746ae9d2 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -13,6 +13,9 @@
 
 #include <mach/hardware.h>
 #include <mach/emac.h>
+#include <mach/asp.h>
+#include <linux/i2c.h>
+#include <linux/videodev2.h>
 
 #define DM646X_EMAC_BASE                (0x01C80000)
 #define DM646X_EMAC_CNTRL_OFFSET        (0x0000)
@@ -21,6 +24,68 @@
 #define DM646X_EMAC_MDIO_OFFSET         (0x4000)
 #define DM646X_EMAC_CNTRL_RAM_SIZE      (0x2000)
 
+#define DM646X_ATA_REG_BASE             (0x01C66000)
+
 void __init dm646x_init(void);
+void __init dm646x_init_ide(void);
+void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
+void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
+
+void dm646x_video_init(void);
+
+enum vpif_if_type {
+        VPIF_IF_BT656,
+        VPIF_IF_BT1120,
+        VPIF_IF_RAW_BAYER
+};
+
+struct vpif_interface {
+        enum vpif_if_type if_type;
+        unsigned hd_pol:1;
+        unsigned vd_pol:1;
+        unsigned fid_pol:1;
+};
+
+struct vpif_subdev_info {
+        const char *name;
+        struct i2c_board_info board_info;
+        u32 input;
+        u32 output;
+        unsigned can_route:1;
+        struct vpif_interface vpif_if;
+};
+
+struct vpif_display_config {
+        int (*set_clock)(int, int);
+        struct vpif_subdev_info *subdevinfo;
+        int subdev_count;
+        const char **output;
+        int output_count;
+        const char *card_name;
+};
+
+struct vpif_input {
+        struct v4l2_input input;
+        const char *subdev_name;
+};
+
+#define VPIF_CAPTURE_MAX_CHANNELS       2
+
+struct vpif_capture_chan_config {
+        const struct vpif_input *inputs;
+        int input_count;
+};
+
+struct vpif_capture_config {
+        int (*setup_input_channel_mode)(int);
+        int (*setup_input_path)(int, const char *);
+        struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
+        struct vpif_subdev_info *subdev_info;
+        int subdev_count;
+        const char *card_name;
+};
+
+void dm646x_setup_vpif(struct vpif_display_config *,
+                       struct vpif_capture_config *);
 
 #endif /* __ASM_ARCH_DM646X_H */
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 24a379239d7f..eb8bfd7925e7 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -139,6 +139,54 @@ struct edmacc_param {
 #define DAVINCI_DMA_PWM1                 53
 #define DAVINCI_DMA_PWM2                 54
 
+/* DA830 specific EDMA3 information */
+#define EDMA_DA830_NUM_DMACH            32
+#define EDMA_DA830_NUM_TCC              32
+#define EDMA_DA830_NUM_PARAMENTRY       128
+#define EDMA_DA830_NUM_EVQUE            2
+#define EDMA_DA830_NUM_TC               2
+#define EDMA_DA830_CHMAP_EXIST          0
+#define EDMA_DA830_NUM_REGIONS          4
+#define DA830_DMACH2EVENT_MAP0          0x000FC03Fu
+#define DA830_DMACH2EVENT_MAP1          0x00000000u
+#define DA830_EDMA_ARM_OWN              0x30FFCCFFu
+
+/* DA830 specific EDMA3 Events Information */
+enum DA830_edma_ch {
+        DA830_DMACH_MCASP0_RX,
+        DA830_DMACH_MCASP0_TX,
+        DA830_DMACH_MCASP1_RX,
+        DA830_DMACH_MCASP1_TX,
+        DA830_DMACH_MCASP2_RX,
+        DA830_DMACH_MCASP2_TX,
+        DA830_DMACH_GPIO_BNK0INT,
+        DA830_DMACH_GPIO_BNK1INT,
+        DA830_DMACH_UART0_RX,
+        DA830_DMACH_UART0_TX,
+        DA830_DMACH_TMR64P0_EVTOUT12,
+        DA830_DMACH_TMR64P0_EVTOUT34,
+        DA830_DMACH_UART1_RX,
+        DA830_DMACH_UART1_TX,
+        DA830_DMACH_SPI0_RX,
+        DA830_DMACH_SPI0_TX,
+        DA830_DMACH_MMCSD_RX,
+        DA830_DMACH_MMCSD_TX,
+        DA830_DMACH_SPI1_RX,
+        DA830_DMACH_SPI1_TX,
+        DA830_DMACH_DMAX_EVTOUT6,
+        DA830_DMACH_DMAX_EVTOUT7,
+        DA830_DMACH_GPIO_BNK2INT,
+        DA830_DMACH_GPIO_BNK3INT,
+        DA830_DMACH_I2C0_RX,
+        DA830_DMACH_I2C0_TX,
+        DA830_DMACH_I2C1_RX,
+        DA830_DMACH_I2C1_TX,
+        DA830_DMACH_GPIO_BNK4INT,
+        DA830_DMACH_GPIO_BNK5INT,
+        DA830_DMACH_UART2_RX,
+        DA830_DMACH_UART2_TX
+};
+
 /*ch_status paramater of callback function possible values*/
 #define DMA_COMPLETE 1
 #define DMA_CC_ERROR 2
@@ -162,6 +210,8 @@ enum fifo_width {
 enum dma_event_q {
         EVENTQ_0 = 0,
         EVENTQ_1 = 1,
+        EVENTQ_2 = 2,
+        EVENTQ_3 = 3,
         EVENTQ_DEFAULT = -1
 };
 
@@ -170,8 +220,15 @@ enum sync_dimension {
         ABSYNC = 1
 };
 
+#define EDMA_CTLR_CHAN(ctlr, chan)      (((ctlr) << 16) | (chan))
+#define EDMA_CTLR(i)                    ((i) >> 16)
+#define EDMA_CHAN_SLOT(i)               ((i) & 0xffff)
+
 #define EDMA_CHANNEL_ANY                -1      /* for edma_alloc_channel() */
 #define EDMA_SLOT_ANY                   -1      /* for edma_alloc_slot() */
+#define EDMA_CONT_PARAMS_ANY             1001
+#define EDMA_CONT_PARAMS_FIXED_EXACT     1002
+#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
 
 /* alloc/free DMA channels and their dedicated parameter RAM slots */
 int edma_alloc_channel(int channel,
@@ -180,9 +237,13 @@ int edma_alloc_channel(int channel,
 void edma_free_channel(unsigned channel);
 
 /* alloc/free parameter RAM slots */
-int edma_alloc_slot(int slot);
+int edma_alloc_slot(unsigned ctlr, int slot);
 void edma_free_slot(unsigned slot);
 
+/* alloc/free a set of contiguous parameter RAM slots */
+int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
+int edma_free_cont_slots(unsigned slot, int count);
+
 /* calls that operate on part of a parameter RAM slot */
 void edma_set_src(unsigned slot, dma_addr_t src_port,
                                 enum address_mode mode, enum fifo_width);
@@ -216,9 +277,13 @@ struct edma_soc_info {
         unsigned        n_region;
         unsigned        n_slot;
         unsigned        n_tc;
+        unsigned        n_cc;
+        enum dma_event_q        default_queue;
 
         /* list of channels with no even trigger; terminated by "-1" */
         const s8        *noevent;
+        const s8        (*queue_tc_mapping)[2];
+        const s8        (*queue_priority_mapping)[2];
 };
 
 #endif
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index ae0745568316..f3b8ef878158 100644
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -42,6 +42,9 @@
  */
 #define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
 
+/* Convert GPIO signal to GPIO pin number */
+#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
+
 struct gpio_controller {
         u32     dir;
         u32     out_data;
@@ -78,6 +81,8 @@ __gpio_to_controller(unsigned gpio)
                 ptr = base + 0x60;
         else if (gpio < 32 * 4)
                 ptr = base + 0x88;
+        else if (gpio < 32 * 5)
+                ptr = base + 0xb0;
         else
                 ptr = NULL;
         return ptr;
@@ -142,15 +147,13 @@ static inline int gpio_cansleep(unsigned gpio)
 
 static inline int gpio_to_irq(unsigned gpio)
 {
-        if (gpio >= DAVINCI_N_GPIO)
-                return -EINVAL;
-        return davinci_soc_info.intc_irq_num + gpio;
+        return __gpio_to_irq(gpio);
 }
 
 static inline int irq_to_gpio(unsigned irq)
 {
-        /* caller guarantees gpio_to_irq() succeeded */
-        return irq - davinci_soc_info.intc_irq_num;
+        /* don't support the reverse mapping */
+        return -ENOSYS;
 }
 
 #endif                          /* __DAVINCI_GPIO_H */
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 48c77934d519..41c89386e39b 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -24,4 +24,21 @@
 /* System control register offsets */
 #define DM64XX_VDD3P3V_PWDN     0x48
 
+/*
+ * I/O mapping
+ */
+#define IO_PHYS                         0x01c00000
+#define IO_OFFSET                       0xfd000000 /* Virtual IO = 0xfec00000 */
+#define IO_SIZE                         0x00400000
+#define IO_VIRT                         (IO_PHYS + IO_OFFSET)
+#define io_v2p(va)                      ((va) - IO_OFFSET)
+#define __IO_ADDRESS(x)                 ((x) + IO_OFFSET)
+#define IO_ADDRESS(pa)                  IOMEM(__IO_ADDRESS(pa))
+
+#ifdef __ASSEMBLER__
+#define IOMEM(x)                        x
+#else
+#define IOMEM(x)                        ((void __force __iomem *)(x))
+#endif
+
 #endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index 2479785405af..62b0a90309ad 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -14,18 +14,6 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
- * ----------------------------------------------------------------------------
- * I/O mapping
- * ----------------------------------------------------------------------------
- */
-#define IO_PHYS         0x01c00000
-#define IO_OFFSET       0xfd000000 /* Virtual IO = 0xfec00000 */
-#define IO_SIZE         0x00400000
-#define IO_VIRT         (IO_PHYS + IO_OFFSET)
-#define io_v2p(va)      ((va) - IO_OFFSET)
-#define __IO_ADDRESS(x) ((x) + IO_OFFSET)
-
-/*
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
@@ -33,19 +21,12 @@
 #define __mem_pci(a)            (a)
 #define __mem_isa(a)            (a)
 
-#define IO_ADDRESS(pa)          IOMEM(__IO_ADDRESS(pa))
-
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                x
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-
+#ifndef __ASSEMBLER__
 #define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t)
 #define __arch_iounmap(v)       davinci_iounmap(v)
 
 void __iomem *davinci_ioremap(unsigned long phys, size_t size,
                               unsigned int type);
 void davinci_iounmap(volatile void __iomem *addr);
-
-#endif /* __ASSEMBLER__ */
+#endif
 #endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index bc5d6aaa69a3..3c918a772619 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -99,9 +99,6 @@
 #define IRQ_EMUINT       63
 
 #define DAVINCI_N_AINTC_IRQ     64
-#define DAVINCI_N_GPIO          104
-
-#define NR_IRQS                 (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)
 
 #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
 
@@ -206,4 +203,206 @@
 #define IRQ_DM355_GPIOBNK5      59
 #define IRQ_DM355_GPIOBNK6      60
 
+/* DaVinci DM365-specific Interrupts */
+#define IRQ_DM365_INSFINT       7
+#define IRQ_DM365_IMXINT1       8
+#define IRQ_DM365_IMXINT0       10
+#define IRQ_DM365_KLD_ARMINT    10
+#define IRQ_DM365_IMCOPINT      11
+#define IRQ_DM365_RTOINT        13
+#define IRQ_DM365_TINT5         14
+#define IRQ_DM365_TINT6         15
+#define IRQ_DM365_SPINT2_1      21
+#define IRQ_DM365_TINT7         22
+#define IRQ_DM365_SDIOINT0      23
+#define IRQ_DM365_MMCINT1       27
+#define IRQ_DM365_PWMINT3       28
+#define IRQ_DM365_SDIOINT1      31
+#define IRQ_DM365_SPIINT0_0     42
+#define IRQ_DM365_SPIINT3_0     43
+#define IRQ_DM365_GPIO0         44
+#define IRQ_DM365_GPIO1         45
+#define IRQ_DM365_GPIO2         46
+#define IRQ_DM365_GPIO3         47
+#define IRQ_DM365_GPIO4         48
+#define IRQ_DM365_GPIO5         49
+#define IRQ_DM365_GPIO6         50
+#define IRQ_DM365_GPIO7         51
+#define IRQ_DM365_EMAC_RXTHRESH 52
+#define IRQ_DM365_EMAC_RXPULSE  53
+#define IRQ_DM365_EMAC_TXPULSE  54
+#define IRQ_DM365_EMAC_MISCPULSE 55
+#define IRQ_DM365_GPIO12        56
+#define IRQ_DM365_GPIO13        57
+#define IRQ_DM365_GPIO14        58
+#define IRQ_DM365_GPIO15        59
+#define IRQ_DM365_ADCINT        59
+#define IRQ_DM365_KEYINT        60
+#define IRQ_DM365_TCERRINT2     61
+#define IRQ_DM365_TCERRINT3     62
+#define IRQ_DM365_EMUINT        63
+
+/* DA8XX interrupts */
+#define IRQ_DA8XX_COMMTX                0
+#define IRQ_DA8XX_COMMRX                1
+#define IRQ_DA8XX_NINT                  2
+#define IRQ_DA8XX_EVTOUT0               3
+#define IRQ_DA8XX_EVTOUT1               4
+#define IRQ_DA8XX_EVTOUT2               5
+#define IRQ_DA8XX_EVTOUT3               6
+#define IRQ_DA8XX_EVTOUT4               7
+#define IRQ_DA8XX_EVTOUT5               8
+#define IRQ_DA8XX_EVTOUT6               9
+#define IRQ_DA8XX_EVTOUT7               10
+#define IRQ_DA8XX_CCINT0                11
+#define IRQ_DA8XX_CCERRINT              12
+#define IRQ_DA8XX_TCERRINT0             13
+#define IRQ_DA8XX_AEMIFINT              14
+#define IRQ_DA8XX_I2CINT0               15
+#define IRQ_DA8XX_MMCSDINT0             16
+#define IRQ_DA8XX_MMCSDINT1             17
+#define IRQ_DA8XX_ALLINT0               18
+#define IRQ_DA8XX_RTC                   19
+#define IRQ_DA8XX_SPINT0                20
+#define IRQ_DA8XX_TINT12_0              21
+#define IRQ_DA8XX_TINT34_0              22
+#define IRQ_DA8XX_TINT12_1              23
+#define IRQ_DA8XX_TINT34_1              24
+#define IRQ_DA8XX_UARTINT0              25
+#define IRQ_DA8XX_KEYMGRINT             26
+#define IRQ_DA8XX_SECINT                26
+#define IRQ_DA8XX_SECKEYERR             26
+#define IRQ_DA8XX_CHIPINT0              28
+#define IRQ_DA8XX_CHIPINT1              29
+#define IRQ_DA8XX_CHIPINT2              30
+#define IRQ_DA8XX_CHIPINT3              31
+#define IRQ_DA8XX_TCERRINT1             32
+#define IRQ_DA8XX_C0_RX_THRESH_PULSE    33
+#define IRQ_DA8XX_C0_RX_PULSE           34
+#define IRQ_DA8XX_C0_TX_PULSE           35
+#define IRQ_DA8XX_C0_MISC_PULSE         36
+#define IRQ_DA8XX_C1_RX_THRESH_PULSE    37
+#define IRQ_DA8XX_C1_RX_PULSE           38
+#define IRQ_DA8XX_C1_TX_PULSE           39
+#define IRQ_DA8XX_C1_MISC_PULSE         40
+#define IRQ_DA8XX_MEMERR                41
+#define IRQ_DA8XX_GPIO0                 42
+#define IRQ_DA8XX_GPIO1                 43
+#define IRQ_DA8XX_GPIO2                 44
+#define IRQ_DA8XX_GPIO3                 45
+#define IRQ_DA8XX_GPIO4                 46
+#define IRQ_DA8XX_GPIO5                 47
+#define IRQ_DA8XX_GPIO6                 48
+#define IRQ_DA8XX_GPIO7                 49
+#define IRQ_DA8XX_GPIO8                 50
+#define IRQ_DA8XX_I2CINT1               51
+#define IRQ_DA8XX_LCDINT                52
+#define IRQ_DA8XX_UARTINT1              53
+#define IRQ_DA8XX_MCASPINT              54
+#define IRQ_DA8XX_ALLINT1               55
+#define IRQ_DA8XX_SPINT1                56
+#define IRQ_DA8XX_UHPI_INT1             57
+#define IRQ_DA8XX_USB_INT               58
+#define IRQ_DA8XX_IRQN                  59
+#define IRQ_DA8XX_RWAKEUP               60
+#define IRQ_DA8XX_UARTINT2              61
+#define IRQ_DA8XX_DFTSSINT              62
+#define IRQ_DA8XX_EHRPWM0               63
+#define IRQ_DA8XX_EHRPWM0TZ             64
+#define IRQ_DA8XX_EHRPWM1               65
+#define IRQ_DA8XX_EHRPWM1TZ             66
+#define IRQ_DA8XX_ECAP0                 69
+#define IRQ_DA8XX_ECAP1                 70
+#define IRQ_DA8XX_ECAP2                 71
+#define IRQ_DA8XX_ARMCLKSTOPREQ         90
+
+/* DA830 specific interrupts */
+#define IRQ_DA830_MPUERR                27
+#define IRQ_DA830_IOPUERR               27
+#define IRQ_DA830_BOOTCFGERR            27
+#define IRQ_DA830_EHRPWM2               67
+#define IRQ_DA830_EHRPWM2TZ             68
+#define IRQ_DA830_EQEP0                 72
+#define IRQ_DA830_EQEP1                 73
+#define IRQ_DA830_T12CMPINT0_0          74
+#define IRQ_DA830_T12CMPINT1_0          75
+#define IRQ_DA830_T12CMPINT2_0          76
+#define IRQ_DA830_T12CMPINT3_0          77
+#define IRQ_DA830_T12CMPINT4_0          78
+#define IRQ_DA830_T12CMPINT5_0          79
+#define IRQ_DA830_T12CMPINT6_0          80
+#define IRQ_DA830_T12CMPINT7_0          81
+#define IRQ_DA830_T12CMPINT0_1          82
+#define IRQ_DA830_T12CMPINT1_1          83
+#define IRQ_DA830_T12CMPINT2_1          84
+#define IRQ_DA830_T12CMPINT3_1          85
+#define IRQ_DA830_T12CMPINT4_1          86
+#define IRQ_DA830_T12CMPINT5_1          87
+#define IRQ_DA830_T12CMPINT6_1          88
+#define IRQ_DA830_T12CMPINT7_1          89
+
+#define DA830_N_CP_INTC_IRQ             96
+
+/* DA850 speicific interrupts */
+#define IRQ_DA850_MPUADDRERR0           27
+#define IRQ_DA850_MPUPROTERR0           27
+#define IRQ_DA850_IOPUADDRERR0          27
+#define IRQ_DA850_IOPUPROTERR0          27
+#define IRQ_DA850_IOPUADDRERR1          27
+#define IRQ_DA850_IOPUPROTERR1          27
+#define IRQ_DA850_IOPUADDRERR2          27
+#define IRQ_DA850_IOPUPROTERR2          27
+#define IRQ_DA850_BOOTCFG_ADDR_ERR      27
+#define IRQ_DA850_BOOTCFG_PROT_ERR      27
+#define IRQ_DA850_MPUADDRERR1           27
+#define IRQ_DA850_MPUPROTERR1           27
+#define IRQ_DA850_IOPUADDRERR3          27
+#define IRQ_DA850_IOPUPROTERR3          27
+#define IRQ_DA850_IOPUADDRERR4          27
+#define IRQ_DA850_IOPUPROTERR4          27
+#define IRQ_DA850_IOPUADDRERR5          27
+#define IRQ_DA850_IOPUPROTERR5          27
+#define IRQ_DA850_MIOPU_BOOTCFG_ERR     27
+#define IRQ_DA850_SATAINT               67
+#define IRQ_DA850_TINT12_2              68
+#define IRQ_DA850_TINT34_2              68
+#define IRQ_DA850_TINTALL_2             68
+#define IRQ_DA850_MMCSDINT0_1           72
+#define IRQ_DA850_MMCSDINT1_1           73
+#define IRQ_DA850_T12CMPINT0_2          74
+#define IRQ_DA850_T12CMPINT1_2          75
+#define IRQ_DA850_T12CMPINT2_2          76
+#define IRQ_DA850_T12CMPINT3_2          77
+#define IRQ_DA850_T12CMPINT4_2          78
+#define IRQ_DA850_T12CMPINT5_2          79
+#define IRQ_DA850_T12CMPINT6_2          80
+#define IRQ_DA850_T12CMPINT7_2          81
+#define IRQ_DA850_T12CMPINT0_3          82
+#define IRQ_DA850_T12CMPINT1_3          83
+#define IRQ_DA850_T12CMPINT2_3          84
+#define IRQ_DA850_T12CMPINT3_3          85
+#define IRQ_DA850_T12CMPINT4_3          86
+#define IRQ_DA850_T12CMPINT5_3          87
+#define IRQ_DA850_T12CMPINT6_3          88
+#define IRQ_DA850_T12CMPINT7_3          89
+#define IRQ_DA850_RPIINT                91
+#define IRQ_DA850_VPIFINT               92
+#define IRQ_DA850_CCINT1                93
+#define IRQ_DA850_CCERRINT1             94
+#define IRQ_DA850_TCERRINT2             95
+#define IRQ_DA850_TINT12_3              96
+#define IRQ_DA850_TINT34_3              96
+#define IRQ_DA850_TINTALL_3             96
+#define IRQ_DA850_MCBSP0RINT            97
+#define IRQ_DA850_MCBSP0XINT            98
+#define IRQ_DA850_MCBSP1RINT            99
+#define IRQ_DA850_MCBSP1XINT            100
+
+#define DA850_N_CP_INTC_IRQ             101
+
+/* da850 currently has the most gpio pins (144) */
+#define DAVINCI_N_GPIO                  144
+/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
+#define NR_IRQS                         (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
+
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index c712c7cdf38f..80309aed534a 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -20,9 +20,16 @@
 /**************************************************************************
  * Definitions
  **************************************************************************/
-#define DAVINCI_DDR_BASE    0x80000000
+#define DAVINCI_DDR_BASE        0x80000000
+#define DA8XX_DDR_BASE          0xc0000000
 
+#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
+#error Cannot enable DaVinci and DA8XX platforms concurrently
+#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
+#define PHYS_OFFSET DA8XX_DDR_BASE
+#else
 #define PHYS_OFFSET DAVINCI_DDR_BASE
+#endif
 
 /*
  * Increase size of DMA-consistent memory region
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 27378458542f..bb84893a4e83 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -154,6 +154,737 @@ enum davinci_dm355_index {
         DM355_EVT8_ASP1_TX,
         DM355_EVT9_ASP1_RX,
         DM355_EVT26_MMC0_RX,
+
+        /* Video Out */
+        DM355_VOUT_FIELD,
+        DM355_VOUT_FIELD_G70,
+        DM355_VOUT_HVSYNC,
+        DM355_VOUT_COUTL_EN,
+        DM355_VOUT_COUTH_EN,
+
+        /* Video In Pin Mux */
+        DM355_VIN_PCLK,
+        DM355_VIN_CAM_WEN,
+        DM355_VIN_CAM_VD,
+        DM355_VIN_CAM_HD,
+        DM355_VIN_YIN_EN,
+        DM355_VIN_CINL_EN,
+        DM355_VIN_CINH_EN,
+};
+
+enum davinci_dm365_index {
+        /* MMC/SD 0 */
+        DM365_MMCSD0,
+
+        /* MMC/SD 1 */
+        DM365_SD1_CLK,
+        DM365_SD1_CMD,
+        DM365_SD1_DATA3,
+        DM365_SD1_DATA2,
+        DM365_SD1_DATA1,
+        DM365_SD1_DATA0,
+
+        /* I2C */
+        DM365_I2C_SDA,
+        DM365_I2C_SCL,
+
+        /* AEMIF */
+        DM365_AEMIF_AR,
+        DM365_AEMIF_A3,
+        DM365_AEMIF_A7,
+        DM365_AEMIF_D15_8,
+        DM365_AEMIF_CE0,
+
+        /* ASP0 function */
+        DM365_MCBSP0_BDX,
+        DM365_MCBSP0_X,
+        DM365_MCBSP0_BFSX,
+        DM365_MCBSP0_BDR,
+        DM365_MCBSP0_R,
+        DM365_MCBSP0_BFSR,
+
+        /* SPI0 */
+        DM365_SPI0_SCLK,
+        DM365_SPI0_SDI,
+        DM365_SPI0_SDO,
+        DM365_SPI0_SDENA0,
+        DM365_SPI0_SDENA1,
+
+        /* UART */
+        DM365_UART0_RXD,
+        DM365_UART0_TXD,
+        DM365_UART1_RXD,
+        DM365_UART1_TXD,
+        DM365_UART1_RTS,
+        DM365_UART1_CTS,
+
+        /* EMAC */
+        DM365_EMAC_TX_EN,
+        DM365_EMAC_TX_CLK,
+        DM365_EMAC_COL,
+        DM365_EMAC_TXD3,
+        DM365_EMAC_TXD2,
+        DM365_EMAC_TXD1,
+        DM365_EMAC_TXD0,
+        DM365_EMAC_RXD3,
+        DM365_EMAC_RXD2,
+        DM365_EMAC_RXD1,
+        DM365_EMAC_RXD0,
+        DM365_EMAC_RX_CLK,
+        DM365_EMAC_RX_DV,
+        DM365_EMAC_RX_ER,
+        DM365_EMAC_CRS,
+        DM365_EMAC_MDIO,
+        DM365_EMAC_MDCLK,
+
+        /* Keypad */
+        DM365_KEYPAD,
+
+        /* PWM */
+        DM365_PWM0,
+        DM365_PWM0_G23,
+        DM365_PWM1,
+        DM365_PWM1_G25,
+        DM365_PWM2_G87,
+        DM365_PWM2_G88,
+        DM365_PWM2_G89,
+        DM365_PWM2_G90,
+        DM365_PWM3_G80,
+        DM365_PWM3_G81,
+        DM365_PWM3_G85,
+        DM365_PWM3_G86,
+
+        /* SPI1 */
+        DM365_SPI1_SCLK,
+        DM365_SPI1_SDO,
+        DM365_SPI1_SDI,
+        DM365_SPI1_SDENA0,
+        DM365_SPI1_SDENA1,
+
+        /* SPI2 */
+        DM365_SPI2_SCLK,
+        DM365_SPI2_SDO,
+        DM365_SPI2_SDI,
+        DM365_SPI2_SDENA0,
+        DM365_SPI2_SDENA1,
+
+        /* SPI3 */
+        DM365_SPI3_SCLK,
+        DM365_SPI3_SDO,
+        DM365_SPI3_SDI,
+        DM365_SPI3_SDENA0,
+        DM365_SPI3_SDENA1,
+
+        /* SPI4 */
+        DM365_SPI4_SCLK,
+        DM365_SPI4_SDO,
+        DM365_SPI4_SDI,
+        DM365_SPI4_SDENA0,
+        DM365_SPI4_SDENA1,
+
+        /* GPIO */
+        DM365_GPIO20,
+        DM365_GPIO33,
+        DM365_GPIO40,
+
+        /* Video */
+        DM365_VOUT_FIELD,
+        DM365_VOUT_FIELD_G81,
+        DM365_VOUT_HVSYNC,
+        DM365_VOUT_COUTL_EN,
+        DM365_VOUT_COUTH_EN,
+        DM365_VIN_CAM_WEN,
+        DM365_VIN_CAM_VD,
+        DM365_VIN_CAM_HD,
+        DM365_VIN_YIN4_7_EN,
+        DM365_VIN_YIN0_3_EN,
+
+        /* IRQ muxing */
+        DM365_INT_EDMA_CC,
+        DM365_INT_EDMA_TC0_ERR,
+        DM365_INT_EDMA_TC1_ERR,
+        DM365_INT_EDMA_TC2_ERR,
+        DM365_INT_EDMA_TC3_ERR,
+        DM365_INT_PRTCSS,
+        DM365_INT_EMAC_RXTHRESH,
+        DM365_INT_EMAC_RXPULSE,
+        DM365_INT_EMAC_TXPULSE,
+        DM365_INT_EMAC_MISCPULSE,
+        DM365_INT_IMX0_ENABLE,
+        DM365_INT_IMX0_DISABLE,
+        DM365_INT_HDVICP_ENABLE,
+        DM365_INT_HDVICP_DISABLE,
+        DM365_INT_IMX1_ENABLE,
+        DM365_INT_IMX1_DISABLE,
+        DM365_INT_NSF_ENABLE,
+        DM365_INT_NSF_DISABLE,
+
+        /* EDMA event muxing */
+        DM365_EVT2_ASP_TX,
+        DM365_EVT3_ASP_RX,
+        DM365_EVT26_MMC0_RX,
+};
+
+enum da830_index {
+        DA830_GPIO7_14,
+        DA830_RTCK,
+        DA830_GPIO7_15,
+        DA830_EMU_0,
+        DA830_EMB_SDCKE,
+        DA830_EMB_CLK_GLUE,
+        DA830_EMB_CLK,
+        DA830_NEMB_CS_0,
+        DA830_NEMB_CAS,
+        DA830_NEMB_RAS,
+        DA830_NEMB_WE,
+        DA830_EMB_BA_1,
+        DA830_EMB_BA_0,
+        DA830_EMB_A_0,
+        DA830_EMB_A_1,
+        DA830_EMB_A_2,
+        DA830_EMB_A_3,
+        DA830_EMB_A_4,
+        DA830_EMB_A_5,
+        DA830_GPIO7_0,
+        DA830_GPIO7_1,
+        DA830_GPIO7_2,
+        DA830_GPIO7_3,
+        DA830_GPIO7_4,
+        DA830_GPIO7_5,
+        DA830_GPIO7_6,
+        DA830_GPIO7_7,
+        DA830_EMB_A_6,
+        DA830_EMB_A_7,
+        DA830_EMB_A_8,
+        DA830_EMB_A_9,
+        DA830_EMB_A_10,
+        DA830_EMB_A_11,
+        DA830_EMB_A_12,
+        DA830_EMB_D_31,
+        DA830_GPIO7_8,
+        DA830_GPIO7_9,
+        DA830_GPIO7_10,
+        DA830_GPIO7_11,
+        DA830_GPIO7_12,
+        DA830_GPIO7_13,
+        DA830_GPIO3_13,
+        DA830_EMB_D_30,
+        DA830_EMB_D_29,
+        DA830_EMB_D_28,
+        DA830_EMB_D_27,
+        DA830_EMB_D_26,
+        DA830_EMB_D_25,
+        DA830_EMB_D_24,
+        DA830_EMB_D_23,
+        DA830_EMB_D_22,
+        DA830_EMB_D_21,
+        DA830_EMB_D_20,
+        DA830_EMB_D_19,
+        DA830_EMB_D_18,
+        DA830_EMB_D_17,
+        DA830_EMB_D_16,
+        DA830_NEMB_WE_DQM_3,
+        DA830_NEMB_WE_DQM_2,
+        DA830_EMB_D_0,
+        DA830_EMB_D_1,
+        DA830_EMB_D_2,
+        DA830_EMB_D_3,
+        DA830_EMB_D_4,
+        DA830_EMB_D_5,
+        DA830_EMB_D_6,
+        DA830_GPIO6_0,
+        DA830_GPIO6_1,
+        DA830_GPIO6_2,
+        DA830_GPIO6_3,
+        DA830_GPIO6_4,
+        DA830_GPIO6_5,
+        DA830_GPIO6_6,
+        DA830_EMB_D_7,
+        DA830_EMB_D_8,
+        DA830_EMB_D_9,
+        DA830_EMB_D_10,
+        DA830_EMB_D_11,
+        DA830_EMB_D_12,
+        DA830_EMB_D_13,
+        DA830_EMB_D_14,
+        DA830_GPIO6_7,
+        DA830_GPIO6_8,
+        DA830_GPIO6_9,
+        DA830_GPIO6_10,
+        DA830_GPIO6_11,
+        DA830_GPIO6_12,
+        DA830_GPIO6_13,
+        DA830_GPIO6_14,
+        DA830_EMB_D_15,
+        DA830_NEMB_WE_DQM_1,
+        DA830_NEMB_WE_DQM_0,
+        DA830_SPI0_SOMI_0,
+        DA830_SPI0_SIMO_0,
+        DA830_SPI0_CLK,
+        DA830_NSPI0_ENA,
+        DA830_NSPI0_SCS_0,
+        DA830_EQEP0I,
+        DA830_EQEP0S,
+        DA830_EQEP1I,
+        DA830_NUART0_CTS,
+        DA830_NUART0_RTS,
+        DA830_EQEP0A,
+        DA830_EQEP0B,
+        DA830_GPIO6_15,
+        DA830_GPIO5_14,
+        DA830_GPIO5_15,
+        DA830_GPIO5_0,
+        DA830_GPIO5_1,
+        DA830_GPIO5_2,
+        DA830_GPIO5_3,
+        DA830_GPIO5_4,
+        DA830_SPI1_SOMI_0,
+        DA830_SPI1_SIMO_0,
+        DA830_SPI1_CLK,
+        DA830_UART0_RXD,
+        DA830_UART0_TXD,
+        DA830_AXR1_10,
+        DA830_AXR1_11,
+        DA830_NSPI1_ENA,
+        DA830_I2C1_SCL,
+        DA830_I2C1_SDA,
+        DA830_EQEP1S,
+        DA830_I2C0_SDA,
+        DA830_I2C0_SCL,
+        DA830_UART2_RXD,
+        DA830_TM64P0_IN12,
+        DA830_TM64P0_OUT12,
+        DA830_GPIO5_5,
+        DA830_GPIO5_6,
+        DA830_GPIO5_7,
+        DA830_GPIO5_8,
+        DA830_GPIO5_9,
+        DA830_GPIO5_10,
+        DA830_GPIO5_11,
+        DA830_GPIO5_12,
+        DA830_NSPI1_SCS_0,
+        DA830_USB0_DRVVBUS,
+        DA830_AHCLKX0,
+        DA830_ACLKX0,
+        DA830_AFSX0,
+        DA830_AHCLKR0,
+        DA830_ACLKR0,
+        DA830_AFSR0,
+        DA830_UART2_TXD,
+        DA830_AHCLKX2,
+        DA830_ECAP0_APWM0,
+        DA830_RMII_MHZ_50_CLK,
+        DA830_ECAP1_APWM1,
+        DA830_USB_REFCLKIN,
+        DA830_GPIO5_13,
+        DA830_GPIO4_15,
+        DA830_GPIO2_11,
+        DA830_GPIO2_12,
+        DA830_GPIO2_13,
+        DA830_GPIO2_14,
+        DA830_GPIO2_15,
+        DA830_GPIO3_12,
+        DA830_AMUTE0,
+        DA830_AXR0_0,
+        DA830_AXR0_1,
+        DA830_AXR0_2,
+        DA830_AXR0_3,
+        DA830_AXR0_4,
+        DA830_AXR0_5,
+        DA830_AXR0_6,
+        DA830_RMII_TXD_0,
+        DA830_RMII_TXD_1,
+        DA830_RMII_TXEN,
+        DA830_RMII_CRS_DV,
+        DA830_RMII_RXD_0,
+        DA830_RMII_RXD_1,
+        DA830_RMII_RXER,
+        DA830_AFSR2,
+        DA830_ACLKX2,
+        DA830_AXR2_3,
+        DA830_AXR2_2,
+        DA830_AXR2_1,
+        DA830_AFSX2,
+        DA830_ACLKR2,
+        DA830_NRESETOUT,
+        DA830_GPIO3_0,
+        DA830_GPIO3_1,
+        DA830_GPIO3_2,
+        DA830_GPIO3_3,
+        DA830_GPIO3_4,
+        DA830_GPIO3_5,
+        DA830_GPIO3_6,
+        DA830_AXR0_7,
+        DA830_AXR0_8,
+        DA830_UART1_RXD,
+        DA830_UART1_TXD,
+        DA830_AXR0_11,
+        DA830_AHCLKX1,
+        DA830_ACLKX1,
+        DA830_AFSX1,
+        DA830_MDIO_CLK,
+        DA830_MDIO_D,
+        DA830_AXR0_9,
+        DA830_AXR0_10,
+        DA830_EPWM0B,
+        DA830_EPWM0A,
+        DA830_EPWMSYNCI,
+        DA830_AXR2_0,
+        DA830_EPWMSYNC0,
+        DA830_GPIO3_7,
+        DA830_GPIO3_8,
+        DA830_GPIO3_9,
+        DA830_GPIO3_10,
+        DA830_GPIO3_11,
+        DA830_GPIO3_14,
+        DA830_GPIO3_15,
+        DA830_GPIO4_10,
+        DA830_AHCLKR1,
+        DA830_ACLKR1,
+        DA830_AFSR1,
+        DA830_AMUTE1,
+        DA830_AXR1_0,
+        DA830_AXR1_1,
+        DA830_AXR1_2,
+        DA830_AXR1_3,
+        DA830_ECAP2_APWM2,
+        DA830_EHRPWMGLUETZ,
+        DA830_EQEP1A,
+        DA830_GPIO4_11,
+        DA830_GPIO4_12,
+        DA830_GPIO4_13,
+        DA830_GPIO4_14,
+        DA830_GPIO4_0,
+        DA830_GPIO4_1,
+        DA830_GPIO4_2,
+        DA830_GPIO4_3,
+        DA830_AXR1_4,
+        DA830_AXR1_5,
+        DA830_AXR1_6,
+        DA830_AXR1_7,
+        DA830_AXR1_8,
+        DA830_AXR1_9,
+        DA830_EMA_D_0,
+        DA830_EMA_D_1,
+        DA830_EQEP1B,
+        DA830_EPWM2B,
+        DA830_EPWM2A,
+        DA830_EPWM1B,
+        DA830_EPWM1A,
+        DA830_MMCSD_DAT_0,
+        DA830_MMCSD_DAT_1,
+        DA830_UHPI_HD_0,
+        DA830_UHPI_HD_1,
+        DA830_GPIO4_4,
+        DA830_GPIO4_5,
+        DA830_GPIO4_6,
+        DA830_GPIO4_7,
+        DA830_GPIO4_8,
+        DA830_GPIO4_9,
+        DA830_GPIO0_0,
+        DA830_GPIO0_1,
+        DA830_EMA_D_2,
+        DA830_EMA_D_3,
+        DA830_EMA_D_4,
+        DA830_EMA_D_5,
+        DA830_EMA_D_6,
+        DA830_EMA_D_7,
+        DA830_EMA_D_8,
+        DA830_EMA_D_9,
+        DA830_MMCSD_DAT_2,
+        DA830_MMCSD_DAT_3,
+        DA830_MMCSD_DAT_4,
+        DA830_MMCSD_DAT_5,
+        DA830_MMCSD_DAT_6,
+        DA830_MMCSD_DAT_7,
+        DA830_UHPI_HD_8,
+        DA830_UHPI_HD_9,
+        DA830_UHPI_HD_2,
+        DA830_UHPI_HD_3,
+        DA830_UHPI_HD_4,
+        DA830_UHPI_HD_5,
+        DA830_UHPI_HD_6,
+        DA830_UHPI_HD_7,
+        DA830_LCD_D_8,
+        DA830_LCD_D_9,
+        DA830_GPIO0_2,
+        DA830_GPIO0_3,
+        DA830_GPIO0_4,
+        DA830_GPIO0_5,
+        DA830_GPIO0_6,
+        DA830_GPIO0_7,
+        DA830_GPIO0_8,
+        DA830_GPIO0_9,
+        DA830_EMA_D_10,
+        DA830_EMA_D_11,
+        DA830_EMA_D_12,
+        DA830_EMA_D_13,
+        DA830_EMA_D_14,
+        DA830_EMA_D_15,
+        DA830_EMA_A_0,
+        DA830_EMA_A_1,
+        DA830_UHPI_HD_10,
+        DA830_UHPI_HD_11,
+        DA830_UHPI_HD_12,
+        DA830_UHPI_HD_13,
+        DA830_UHPI_HD_14,
+        DA830_UHPI_HD_15,
+        DA830_LCD_D_7,
+        DA830_MMCSD_CLK,
+        DA830_LCD_D_10,
+        DA830_LCD_D_11,
+        DA830_LCD_D_12,
+        DA830_LCD_D_13,
+        DA830_LCD_D_14,
+        DA830_LCD_D_15,
+        DA830_UHPI_HCNTL0,
+        DA830_GPIO0_10,
+        DA830_GPIO0_11,
+        DA830_GPIO0_12,
+        DA830_GPIO0_13,
+        DA830_GPIO0_14,
+        DA830_GPIO0_15,
+        DA830_GPIO1_0,
+        DA830_GPIO1_1,
+        DA830_EMA_A_2,
+        DA830_EMA_A_3,
+        DA830_EMA_A_4,
+        DA830_EMA_A_5,
+        DA830_EMA_A_6,
+        DA830_EMA_A_7,
+        DA830_EMA_A_8,
+        DA830_EMA_A_9,
+        DA830_MMCSD_CMD,
+        DA830_LCD_D_6,
+        DA830_LCD_D_3,
+        DA830_LCD_D_2,
+        DA830_LCD_D_1,
+        DA830_LCD_D_0,
+        DA830_LCD_PCLK,
+        DA830_LCD_HSYNC,
+        DA830_UHPI_HCNTL1,
+        DA830_GPIO1_2,
+        DA830_GPIO1_3,
+        DA830_GPIO1_4,
+        DA830_GPIO1_5,
+        DA830_GPIO1_6,
+        DA830_GPIO1_7,
+        DA830_GPIO1_8,
+        DA830_GPIO1_9,
+        DA830_EMA_A_10,
+        DA830_EMA_A_11,
+        DA830_EMA_A_12,
+        DA830_EMA_BA_1,
+        DA830_EMA_BA_0,
+        DA830_EMA_CLK,
+        DA830_EMA_SDCKE,
+        DA830_NEMA_CAS,
+        DA830_LCD_VSYNC,
+        DA830_NLCD_AC_ENB_CS,
+        DA830_LCD_MCLK,
+        DA830_LCD_D_5,
+        DA830_LCD_D_4,
+        DA830_OBSCLK,
+        DA830_NEMA_CS_4,
+        DA830_UHPI_HHWIL,
+        DA830_AHCLKR2,
+        DA830_GPIO1_10,
+        DA830_GPIO1_11,
+        DA830_GPIO1_12,
+        DA830_GPIO1_13,
+        DA830_GPIO1_14,
+        DA830_GPIO1_15,
+        DA830_GPIO2_0,
+        DA830_GPIO2_1,
+        DA830_NEMA_RAS,
+        DA830_NEMA_WE,
+        DA830_NEMA_CS_0,
+        DA830_NEMA_CS_2,
+        DA830_NEMA_CS_3,
+        DA830_NEMA_OE,
+        DA830_NEMA_WE_DQM_1,
+        DA830_NEMA_WE_DQM_0,
+        DA830_NEMA_CS_5,
+        DA830_UHPI_HRNW,
+        DA830_NUHPI_HAS,
+        DA830_NUHPI_HCS,
+        DA830_NUHPI_HDS1,
+        DA830_NUHPI_HDS2,
+        DA830_NUHPI_HINT,
+        DA830_AXR0_12,
+        DA830_AMUTE2,
+        DA830_AXR0_13,
+        DA830_AXR0_14,
+        DA830_AXR0_15,
+        DA830_GPIO2_2,
+        DA830_GPIO2_3,
+        DA830_GPIO2_4,
+        DA830_GPIO2_5,
+        DA830_GPIO2_6,
+        DA830_GPIO2_7,
+        DA830_GPIO2_8,
+        DA830_GPIO2_9,
+        DA830_EMA_WAIT_0,
+        DA830_NUHPI_HRDY,
+        DA830_GPIO2_10,
+};
+
+enum davinci_da850_index {
+        /* UART0 function */
+        DA850_NUART0_CTS,
+        DA850_NUART0_RTS,
+        DA850_UART0_RXD,
+        DA850_UART0_TXD,
+
+        /* UART1 function */
+        DA850_NUART1_CTS,
+        DA850_NUART1_RTS,
+        DA850_UART1_RXD,
+        DA850_UART1_TXD,
+
+        /* UART2 function */
+        DA850_NUART2_CTS,
+        DA850_NUART2_RTS,
+        DA850_UART2_RXD,
+        DA850_UART2_TXD,
+
+        /* I2C1 function */
+        DA850_I2C1_SCL,
+        DA850_I2C1_SDA,
+
+        /* I2C0 function */
+        DA850_I2C0_SDA,
+        DA850_I2C0_SCL,
+
+        /* EMAC function */
+        DA850_MII_TXEN,
+        DA850_MII_TXCLK,
+        DA850_MII_COL,
+        DA850_MII_TXD_3,
+        DA850_MII_TXD_2,
+        DA850_MII_TXD_1,
+        DA850_MII_TXD_0,
+        DA850_MII_RXER,
+        DA850_MII_CRS,
+        DA850_MII_RXCLK,
+        DA850_MII_RXDV,
+        DA850_MII_RXD_3,
+        DA850_MII_RXD_2,
+        DA850_MII_RXD_1,
+        DA850_MII_RXD_0,
+        DA850_MDIO_CLK,
+        DA850_MDIO_D,
+
+        /* McASP function */
+        DA850_ACLKR,
+        DA850_ACLKX,
+        DA850_AFSR,
+        DA850_AFSX,
+        DA850_AHCLKR,
+        DA850_AHCLKX,
+        DA850_AMUTE,
+        DA850_AXR_15,
+        DA850_AXR_14,
+        DA850_AXR_13,
+        DA850_AXR_12,
+        DA850_AXR_11,
+        DA850_AXR_10,
+        DA850_AXR_9,
+        DA850_AXR_8,
+        DA850_AXR_7,
+        DA850_AXR_6,
+        DA850_AXR_5,
+        DA850_AXR_4,
+        DA850_AXR_3,
+        DA850_AXR_2,
+        DA850_AXR_1,
+        DA850_AXR_0,
+
+        /* LCD function */
+        DA850_LCD_D_7,
+        DA850_LCD_D_6,
+        DA850_LCD_D_5,
+        DA850_LCD_D_4,
+        DA850_LCD_D_3,
+        DA850_LCD_D_2,
+        DA850_LCD_D_1,
+        DA850_LCD_D_0,
+        DA850_LCD_D_15,
+        DA850_LCD_D_14,
+        DA850_LCD_D_13,
+        DA850_LCD_D_12,
+        DA850_LCD_D_11,
+        DA850_LCD_D_10,
+        DA850_LCD_D_9,
+        DA850_LCD_D_8,
+        DA850_LCD_PCLK,
+        DA850_LCD_HSYNC,
+        DA850_LCD_VSYNC,
+        DA850_NLCD_AC_ENB_CS,
+
+        /* MMC/SD0 function */
+        DA850_MMCSD0_DAT_0,
+        DA850_MMCSD0_DAT_1,
+        DA850_MMCSD0_DAT_2,
+        DA850_MMCSD0_DAT_3,
+        DA850_MMCSD0_CLK,
+        DA850_MMCSD0_CMD,
+
+        /* EMIF2.5/EMIFA function */
+        DA850_EMA_D_7,
+        DA850_EMA_D_6,
+        DA850_EMA_D_5,
+        DA850_EMA_D_4,
+        DA850_EMA_D_3,
+        DA850_EMA_D_2,
+        DA850_EMA_D_1,
+        DA850_EMA_D_0,
+        DA850_EMA_A_1,
+        DA850_EMA_A_2,
+        DA850_NEMA_CS_3,
+        DA850_NEMA_CS_4,
+        DA850_NEMA_WE,
+        DA850_NEMA_OE,
+        DA850_EMA_D_15,
+        DA850_EMA_D_14,
+        DA850_EMA_D_13,
+        DA850_EMA_D_12,
+        DA850_EMA_D_11,
+        DA850_EMA_D_10,
+        DA850_EMA_D_9,
+        DA850_EMA_D_8,
+        DA850_EMA_A_0,
+        DA850_EMA_A_3,
+        DA850_EMA_A_4,
+        DA850_EMA_A_5,
+        DA850_EMA_A_6,
+        DA850_EMA_A_7,
+        DA850_EMA_A_8,
+        DA850_EMA_A_9,
+        DA850_EMA_A_10,
+        DA850_EMA_A_11,
+        DA850_EMA_A_12,
+        DA850_EMA_A_13,
+        DA850_EMA_A_14,
+        DA850_EMA_A_15,
+        DA850_EMA_A_16,
+        DA850_EMA_A_17,
+        DA850_EMA_A_18,
+        DA850_EMA_A_19,
+        DA850_EMA_A_20,
+        DA850_EMA_A_21,
+        DA850_EMA_A_22,
+        DA850_EMA_A_23,
+        DA850_EMA_BA_1,
+        DA850_EMA_CLK,
+        DA850_EMA_WAIT_1,
+        DA850_NEMA_CS_2,
+
+        /* GPIO function */
+        DA850_GPIO2_15,
+        DA850_GPIO8_10,
+        DA850_GPIO4_0,
+        DA850_GPIO4_1,
 };
 
 #ifdef CONFIG_DAVINCI_MUX
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index ab8a2586d1cc..171173c1dbad 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -81,6 +81,24 @@
 #define DM355_LPSC_RTO                  12
 #define DM355_LPSC_VPSS_DAC             41
 
+/* DM365 */
+#define DM365_LPSC_TIMER3       5
+#define DM365_LPSC_SPI1         6
+#define DM365_LPSC_MMC_SD1      7
+#define DM365_LPSC_McBSP1       8
+#define DM365_LPSC_PWM3         10
+#define DM365_LPSC_SPI2         11
+#define DM365_LPSC_RTO          12
+#define DM365_LPSC_TIMER4       17
+#define DM365_LPSC_SPI0         22
+#define DM365_LPSC_SPI3         38
+#define DM365_LPSC_SPI4         39
+#define DM365_LPSC_EMAC         40
+#define DM365_LPSC_VOICE_CODEC  44
+#define DM365_LPSC_DAC_CLK      46
+#define DM365_LPSC_VPSSMSTR     47
+#define DM365_LPSC_MJCP         50
+
 /*
  * LPSC Assignments
  */
@@ -118,6 +136,50 @@
 #define DM646X_LPSC_TIMER1         35
 #define DM646X_LPSC_ARM_INTC       45
 
+/* PSC0 defines */
+#define DA8XX_LPSC0_TPCC                0
+#define DA8XX_LPSC0_TPTC0               1
+#define DA8XX_LPSC0_TPTC1               2
+#define DA8XX_LPSC0_EMIF25              3
+#define DA8XX_LPSC0_SPI0                4
+#define DA8XX_LPSC0_MMC_SD              5
+#define DA8XX_LPSC0_AINTC               6
+#define DA8XX_LPSC0_ARM_RAM_ROM         7
+#define DA8XX_LPSC0_SECU_MGR            8
+#define DA8XX_LPSC0_UART0               9
+#define DA8XX_LPSC0_SCR0_SS             10
+#define DA8XX_LPSC0_SCR1_SS             11
+#define DA8XX_LPSC0_SCR2_SS             12
+#define DA8XX_LPSC0_DMAX                13
+#define DA8XX_LPSC0_ARM                 14
+#define DA8XX_LPSC0_GEM                 15
+
+/* PSC1 defines */
+#define DA850_LPSC1_TPCC1               0
+#define DA8XX_LPSC1_USB20               1
+#define DA8XX_LPSC1_USB11               2
+#define DA8XX_LPSC1_GPIO                3
+#define DA8XX_LPSC1_UHPI                4
+#define DA8XX_LPSC1_CPGMAC              5
+#define DA8XX_LPSC1_EMIF3C              6
+#define DA8XX_LPSC1_McASP0              7
+#define DA830_LPSC1_McASP1              8
+#define DA850_LPSC1_SATA                8
+#define DA830_LPSC1_McASP2              9
+#define DA8XX_LPSC1_SPI1                10
+#define DA8XX_LPSC1_I2C                 11
+#define DA8XX_LPSC1_UART1               12
+#define DA8XX_LPSC1_UART2               13
+#define DA8XX_LPSC1_LCDC                16
+#define DA8XX_LPSC1_PWM                 17
+#define DA8XX_LPSC1_ECAP                20
+#define DA830_LPSC1_EQEP                21
+#define DA850_LPSC1_TPTC2               21
+#define DA8XX_LPSC1_SCR_P0_SS           24
+#define DA8XX_LPSC1_SCR_P1_SS           25
+#define DA8XX_LPSC1_CR_P3_SS            26
+#define DA8XX_LPSC1_L3_CBA_RAM          31
+
 extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
 extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 unsigned int id, char enable);
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index 794fa5cf93c1..a584697a9e70 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -11,13 +11,17 @@
 #ifndef __ASM_ARCH_SERIAL_H
 #define __ASM_ARCH_SERIAL_H
 
-#include <mach/io.h>
+#include <mach/hardware.h>
 
 #define DAVINCI_MAX_NR_UARTS    3
 #define DAVINCI_UART0_BASE      (IO_PHYS + 0x20000)
 #define DAVINCI_UART1_BASE      (IO_PHYS + 0x20400)
 #define DAVINCI_UART2_BASE      (IO_PHYS + 0x20800)
 
+#define DA8XX_UART0_BASE        (IO_PHYS + 0x042000)
+#define DA8XX_UART1_BASE        (IO_PHYS + 0x10c000)
+#define DA8XX_UART2_BASE        (IO_PHYS + 0x10d000)
+
 /* DaVinci UART register offsets */
 #define UART_DAVINCI_PWREMU             0x0c
 #define UART_DM646X_SCR                 0x10
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index b7e7036674fa..8e4f10fe1263 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -16,12 +16,12 @@
 
 extern void davinci_watchdog_reset(void);
 
-static void arch_idle(void)
+static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static void arch_reset(char mode, const char *cmd)
+static inline void arch_reset(char mode, const char *cmd)
 {
         davinci_watchdog_reset();
 }
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 1e27475f9a23..33796b4db17f 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -21,8 +21,11 @@ static u32 *uart;
 
 static u32 *get_uart_base(void)
 {
-        /* Add logic here for new platforms, using __macine_arch_type */
-        return (u32 *)DAVINCI_UART0_BASE;
+        if (__machine_arch_type == MACH_TYPE_DAVINCI_DA830_EVM ||
+                __machine_arch_type == MACH_TYPE_DAVINCI_DA850_EVM)
+                return (u32 *)DA8XX_UART2_BASE;
+        else
+                return (u32 *)DAVINCI_UART0_BASE;
 }
 
 /* PORT_16C550A, in polled non-fifo mode */
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
index ad51625b6609..d49646a8e206 100644
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ b/arch/arm/mach-davinci/include/mach/vmalloc.h
@@ -8,7 +8,7 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include <mach/io.h>
+#include <mach/hardware.h>
 
 /* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
 #define VMALLOC_END       (IO_VIRT - (2<<20))
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index d310f579aa85..898905e48946 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -91,3 +91,17 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
         return 0;
 }
 EXPORT_SYMBOL(davinci_cfg_reg);
+
+int da8xx_pinmux_setup(const short pins[])
+{
+        int i, error = -EINVAL;
+
+        if (pins)
+                for (i = 0; pins[i] >= 0; i++) {
+                        error = davinci_cfg_reg(pins[i]);
+                        if (error)
+                                break;
+                }
+
+        return error;
+}
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c
index db54b2a66b4d..4f1fc9b318b3 100644
--- a/arch/arm/mach-davinci/sram.c
+++ b/arch/arm/mach-davinci/sram.c
@@ -60,7 +60,7 @@ static int __init sram_init(void)
         int status = 0;
 
         if (len) {
-                len = min(len, SRAM_SIZE);
+                len = min_t(unsigned, len, SRAM_SIZE);
                 sram_pool = gen_pool_create(ilog2(SRAM_GRANULARITY), -1);
                 if (!sram_pool)
                         status = -ENOMEM;
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 0884ca57bfb0..0d1b6d407b46 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -406,11 +406,11 @@ struct sys_timer davinci_timer = {
 void davinci_watchdog_reset(void)
 {
         u32 tgcr, wdtcr;
-        struct davinci_soc_info *soc_info = &davinci_soc_info;
-        void __iomem *base = soc_info->wdt_base;
+        struct platform_device *pdev = &davinci_wdt_device;
+        void __iomem *base = IO_ADDRESS(pdev->resource[0].start);
         struct clk *wd_clk;
 
-        wd_clk = clk_get(&davinci_wdt_device.dev, NULL);
+        wd_clk = clk_get(&pdev->dev, NULL);
         if (WARN_ON(IS_ERR(wd_clk)))
                 return;
         clk_enable(wd_clk);
@@ -420,11 +420,11 @@ void davinci_watchdog_reset(void)
 
         /* reset timer, set mode to 64-bit watchdog, and unreset */
         tgcr = 0;
-        __raw_writel(tgcr, base + TCR);
+        __raw_writel(tgcr, base + TGCR);
         tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT;
         tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
                 (TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
-        __raw_writel(tgcr, base + TCR);
+        __raw_writel(tgcr, base + TGCR);
 
         /* clear counter and period regs */
         __raw_writel(0, base + TIM12);
@@ -432,12 +432,8 @@ void davinci_watchdog_reset(void)
         __raw_writel(0, base + PRD12);
         __raw_writel(0, base + PRD34);
 
-        /* enable */
-        wdtcr = __raw_readl(base + WDTCR);
-        wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT;
-        __raw_writel(wdtcr, base + WDTCR);
-
         /* put watchdog in pre-active state */
+        wdtcr = __raw_readl(base + WDTCR);
         wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) |
                 (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
         __raw_writel(wdtcr, base + WDTCR);
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index abedb6337182..06f55931620c 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -13,6 +13,7 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 #include <mach/irqs.h>
+#include <mach/cputype.h>
 
 #define DAVINCI_USB_OTG_BASE 0x01C64000
 
@@ -64,6 +65,10 @@ static struct resource usb_resources[] = {
                 .start          = IRQ_USBINT,
                 .flags          = IORESOURCE_IRQ,
         },
+        {
+                /* placeholder for the dedicated CPPI IRQ */
+                .flags          = IORESOURCE_IRQ,
+        },
 };
 
 static u64 usb_dmamask = DMA_BIT_MASK(32);
@@ -84,6 +89,14 @@ void __init setup_usb(unsigned mA, unsigned potpgt_msec)
 {
         usb_data.power = mA / 2;
         usb_data.potpgt = potpgt_msec / 2;
+
+        if (cpu_is_davinci_dm646x()) {
+                /* Override the defaults as DM6467 uses different IRQs. */
+                usb_dev.resource[1].start = IRQ_DM646X_USBINT;
+                usb_dev.resource[2].start = IRQ_DM646X_USBDMAINT;
+        } else  /* other devices don't have dedicated CPPI IRQ */
+                usb_dev.num_resources = 2;
+
         platform_device_register(&usb_dev);
 }
 
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 3dd0e2a23095..dda19cd76194 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -37,7 +37,7 @@ struct clk {
 static unsigned long get_uart_rate(struct clk *clk);
 
 static int set_keytchclk_rate(struct clk *clk, unsigned long rate);
-
+static int set_div_rate(struct clk *clk, unsigned long rate);
 
 static struct clk clk_uart1 = {
         .sw_locked      = 1,
@@ -76,6 +76,13 @@ static struct clk clk_pwm = {
         .rate           = EP93XX_EXT_CLK_RATE,
 };
 
+static struct clk clk_video = {
+        .sw_locked      = 1,
+        .enable_reg     = EP93XX_SYSCON_VIDCLKDIV,
+        .enable_mask    = EP93XX_SYSCON_CLKDIV_ENABLE,
+        .set_rate       = set_div_rate,
+};
+
 /* DMA Clocks */
 static struct clk clk_m2p0 = {
         .enable_reg     = EP93XX_SYSCON_PWRCNT,
@@ -140,6 +147,7 @@ static struct clk_lookup clocks[] = {
         INIT_CK(NULL,                   "pll2",         &clk_pll2),
         INIT_CK("ep93xx-ohci",          NULL,           &clk_usb_host),
         INIT_CK("ep93xx-keypad",        NULL,           &clk_keypad),
+        INIT_CK("ep93xx-fb",            NULL,           &clk_video),
         INIT_CK(NULL,                   "pwm_clk",      &clk_pwm),
         INIT_CK(NULL,                   "m2p0",         &clk_m2p0),
         INIT_CK(NULL,                   "m2p1",         &clk_m2p1),
@@ -236,6 +244,84 @@ static int set_keytchclk_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
+                                  int *pdiv, int *div)
+{
+        unsigned long max_rate, best_rate = 0,
+                actual_rate = 0, mclk_rate = 0, rate_err = -1;
+        int i, found = 0, __div = 0, __pdiv = 0;
+
+        /* Don't exceed the maximum rate */
+        max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4),
+                       (unsigned long)EP93XX_EXT_CLK_RATE / 4);
+        rate = min(rate, max_rate);
+
+        /*
+         * Try the two pll's and the external clock
+         * Because the valid predividers are 2, 2.5 and 3, we multiply
+         * all the clocks by 2 to avoid floating point math.
+         *
+         * This is based on the algorithm in the ep93xx raster guide:
+         * http://be-a-maverick.com/en/pubs/appNote/AN269REV1.pdf
+         *
+         */
+        for (i = 0; i < 3; i++) {
+                if (i == 0)
+                        mclk_rate = EP93XX_EXT_CLK_RATE * 2;
+                else if (i == 1)
+                        mclk_rate = clk_pll1.rate * 2;
+                else if (i == 2)
+                        mclk_rate = clk_pll2.rate * 2;
+
+                /* Try each predivider value */
+                for (__pdiv = 4; __pdiv <= 6; __pdiv++) {
+                        __div = mclk_rate / (rate * __pdiv);
+                        if (__div < 2 || __div > 127)
+                                continue;
+
+                        actual_rate = mclk_rate / (__pdiv * __div);
+
+                        if (!found || abs(actual_rate - rate) < rate_err) {
+                                *pdiv = __pdiv - 3;
+                                *div = __div;
+                                *psel = (i == 2);
+                                *esel = (i != 0);
+                                best_rate = actual_rate;
+                                rate_err = abs(actual_rate - rate);
+                                found = 1;
+                        }
+                }
+        }
+
+        if (!found)
+                return 0;
+
+        return best_rate;
+}
+
+static int set_div_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long actual_rate;
+        int psel = 0, esel = 0, pdiv = 0, div = 0;
+        u32 val;
+
+        actual_rate = calc_clk_div(rate, &psel, &esel, &pdiv, &div);
+        if (actual_rate == 0)
+                return -EINVAL;
+        clk->rate = actual_rate;
+
+        /* Clear the esel, psel, pdiv and div bits */
+        val = __raw_readl(clk->enable_reg);
+        val &= ~0x7fff;
+
+        /* Set the new esel, psel, pdiv and div bits for the new clock rate */
+        val |= (esel ? EP93XX_SYSCON_CLKDIV_ESEL : 0) |
+                (psel ? EP93XX_SYSCON_CLKDIV_PSEL : 0) |
+                (pdiv << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | div;
+        ep93xx_syscon_swlocked_write(val, clk->enable_reg);
+        return 0;
+}
+
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
         if (clk->set_rate)
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 16b92c37ec99..f7ebed942f66 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -30,6 +30,7 @@
 #include <linux/i2c-gpio.h>
 
 #include <mach/hardware.h>
+#include <mach/fb.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
@@ -682,6 +683,37 @@ void ep93xx_pwm_release_gpio(struct platform_device *pdev)
 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
 
 
+/*************************************************************************
+ * EP93xx video peripheral handling
+ *************************************************************************/
+static struct ep93xxfb_mach_info ep93xxfb_data;
+
+static struct resource ep93xx_fb_resource[] = {
+        {
+                .start          = EP93XX_RASTER_PHYS_BASE,
+                .end            = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device ep93xx_fb_device = {
+        .name                   = "ep93xx-fb",
+        .id                     = -1,
+        .dev                    = {
+                .platform_data  = &ep93xxfb_data,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
+        },
+        .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
+        .resource               = ep93xx_fb_resource,
+};
+
+void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
+{
+        ep93xxfb_data = *data;
+        platform_device_register(&ep93xx_fb_device);
+}
+
 extern void ep93xx_gpio_init(void);
 
 void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index ea78e908fc82..0fbf87b16338 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -70,6 +70,7 @@
 #define EP93XX_USB_PHYS_BASE            (EP93XX_AHB_PHYS_BASE + 0x00020000)
 #define EP93XX_USB_BASE                 EP93XX_AHB_IOMEM(0x00020000)
 
+#define EP93XX_RASTER_PHYS_BASE         (EP93XX_AHB_PHYS_BASE + 0x00030000)
 #define EP93XX_RASTER_BASE              EP93XX_AHB_IOMEM(0x00030000)
 
 #define EP93XX_GRAPHICS_ACCEL_BASE      EP93XX_AHB_IOMEM(0x00040000)
@@ -207,6 +208,11 @@
 #define EP93XX_SYSCON_DEVCFG_ADCPD      (1<<2)
 #define EP93XX_SYSCON_DEVCFG_KEYS       (1<<1)
 #define EP93XX_SYSCON_DEVCFG_SHENA      (1<<0)
+#define EP93XX_SYSCON_VIDCLKDIV         EP93XX_SYSCON_REG(0x84)
+#define EP93XX_SYSCON_CLKDIV_ENABLE     (1<<15)
+#define EP93XX_SYSCON_CLKDIV_ESEL       (1<<14)
+#define EP93XX_SYSCON_CLKDIV_PSEL       (1<<13)
+#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
 #define EP93XX_SYSCON_KEYTCHCLKDIV      EP93XX_SYSCON_REG(0x90)
 #define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
 #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
diff --git a/arch/arm/mach-ep93xx/include/mach/fb.h b/arch/arm/mach-ep93xx/include/mach/fb.h
new file mode 100644
index 000000000000..d5ae11d7c453
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/fb.h
@@ -0,0 +1,56 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/fb.h
+ */
+
+#ifndef __ASM_ARCH_EP93XXFB_H
+#define __ASM_ARCH_EP93XXFB_H
+
+struct platform_device;
+struct fb_videomode;
+struct fb_info;
+
+#define EP93XXFB_USE_MODEDB             0
+
+/* VideoAttributes flags */
+#define EP93XXFB_STATE_MACHINE_ENABLE   (1 << 0)
+#define EP93XXFB_PIXEL_CLOCK_ENABLE     (1 << 1)
+#define EP93XXFB_VSYNC_ENABLE           (1 << 2)
+#define EP93XXFB_PIXEL_DATA_ENABLE      (1 << 3)
+#define EP93XXFB_COMPOSITE_SYNC         (1 << 4)
+#define EP93XXFB_SYNC_VERT_HIGH         (1 << 5)
+#define EP93XXFB_SYNC_HORIZ_HIGH        (1 << 6)
+#define EP93XXFB_SYNC_BLANK_HIGH        (1 << 7)
+#define EP93XXFB_PCLK_FALLING           (1 << 8)
+#define EP93XXFB_ENABLE_AC              (1 << 9)
+#define EP93XXFB_ENABLE_LCD             (1 << 10)
+#define EP93XXFB_ENABLE_CCIR            (1 << 12)
+#define EP93XXFB_USE_PARALLEL_INTERFACE (1 << 13)
+#define EP93XXFB_ENABLE_INTERRUPT       (1 << 14)
+#define EP93XXFB_USB_INTERLACE          (1 << 16)
+#define EP93XXFB_USE_EQUALIZATION       (1 << 17)
+#define EP93XXFB_USE_DOUBLE_HORZ        (1 << 18)
+#define EP93XXFB_USE_DOUBLE_VERT        (1 << 19)
+#define EP93XXFB_USE_BLANK_PIXEL        (1 << 20)
+#define EP93XXFB_USE_SDCSN0             (0 << 21)
+#define EP93XXFB_USE_SDCSN1             (1 << 21)
+#define EP93XXFB_USE_SDCSN2             (2 << 21)
+#define EP93XXFB_USE_SDCSN3             (3 << 21)
+
+#define EP93XXFB_ENABLE                 (EP93XXFB_STATE_MACHINE_ENABLE  | \
+                                         EP93XXFB_PIXEL_CLOCK_ENABLE    | \
+                                         EP93XXFB_VSYNC_ENABLE          | \
+                                         EP93XXFB_PIXEL_DATA_ENABLE)
+
+struct ep93xxfb_mach_info {
+        unsigned int                    num_modes;
+        const struct fb_videomode       *modes;
+        const struct fb_videomode       *default_mode;
+        int                             bpp;
+        unsigned int                    flags;
+
+        int     (*setup)(struct platform_device *pdev);
+        void    (*teardown)(struct platform_device *pdev);
+        void    (*blank)(int blank_mode, struct fb_info *info);
+};
+
+#endif /* __ASM_ARCH_EP93XXFB_H */
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 5f5fa6574d34..01a0f0838e5b 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -6,6 +6,7 @@
 
 struct i2c_board_info;
 struct platform_device;
+struct ep93xxfb_mach_info;
 
 struct ep93xx_eth_data
 {
@@ -33,6 +34,7 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
 
 void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
 void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
+void ep93xx_register_fb(struct ep93xxfb_mach_info *data);
 void ep93xx_register_pwm(int pwm0, int pwm1);
 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);
 void ep93xx_pwm_release_gpio(struct platform_device *pdev);
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 2a318eba1b07..3f35293d457a 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -19,6 +19,7 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/kmi.h>
 #include <linux/amba/clcd.h>
+#include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <asm/clkdev.h>
@@ -35,7 +36,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/irq.h>
-#include <asm/mach/mmc.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 
@@ -400,7 +400,7 @@ static unsigned int mmc_status(struct device *dev)
         return status & 8;
 }
 
-static struct mmc_platform_data mmc_data = {
+static struct mmci_platform_data mmc_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .status         = mmc_status,
         .gpio_wp        = -1,
diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h
index 5722e86f2174..6d3782d85a9f 100644
--- a/arch/arm/mach-iop13xx/include/mach/adma.h
+++ b/arch/arm/mach-iop13xx/include/mach/adma.h
@@ -150,6 +150,8 @@ static inline int iop_adma_get_max_xor(void)
         return 16;
 }
 
+#define iop_adma_get_max_pq iop_adma_get_max_xor
+
 static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan)
 {
         return __raw_readl(ADMA_ADAR(chan));
@@ -211,7 +213,10 @@ iop_chan_xor_slot_count(size_t len, int src_cnt, int *slots_per_op)
 #define IOP_ADMA_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT
 #define IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT
 #define IOP_ADMA_XOR_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT
+#define IOP_ADMA_PQ_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT
 #define iop_chan_zero_sum_slot_count(l, s, o) iop_chan_xor_slot_count(l, s, o)
+#define iop_chan_pq_slot_count iop_chan_xor_slot_count
+#define iop_chan_pq_zero_sum_slot_count iop_chan_xor_slot_count
 
 static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
                                         struct iop_adma_chan *chan)
@@ -220,6 +225,13 @@ static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
         return hw_desc->dest_addr;
 }
 
+static inline u32 iop_desc_get_qdest_addr(struct iop_adma_desc_slot *desc,
+                                          struct iop_adma_chan *chan)
+{
+        struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
+        return hw_desc->q_dest_addr;
+}
+
 static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,
                                         struct iop_adma_chan *chan)
 {
@@ -319,6 +331,58 @@ iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
         return 1;
 }
 
+static inline void
+iop_desc_init_pq(struct iop_adma_desc_slot *desc, int src_cnt,
+                  unsigned long flags)
+{
+        struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
+        union {
+                u32 value;
+                struct iop13xx_adma_desc_ctrl field;
+        } u_desc_ctrl;
+
+        u_desc_ctrl.value = 0;
+        u_desc_ctrl.field.src_select = src_cnt - 1;
+        u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */
+        u_desc_ctrl.field.pq_xfer_en = 1;
+        u_desc_ctrl.field.p_xfer_dis = !!(flags & DMA_PREP_PQ_DISABLE_P);
+        u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
+        hw_desc->desc_ctrl = u_desc_ctrl.value;
+}
+
+static inline int iop_desc_is_pq(struct iop_adma_desc_slot *desc)
+{
+        struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
+        union {
+                u32 value;
+                struct iop13xx_adma_desc_ctrl field;
+        } u_desc_ctrl;
+
+        u_desc_ctrl.value = hw_desc->desc_ctrl;
+        return u_desc_ctrl.field.pq_xfer_en;
+}
+
+static inline void
+iop_desc_init_pq_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
+                          unsigned long flags)
+{
+        struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
+        union {
+                u32 value;
+                struct iop13xx_adma_desc_ctrl field;
+        } u_desc_ctrl;
+
+        u_desc_ctrl.value = 0;
+        u_desc_ctrl.field.src_select = src_cnt - 1;
+        u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */
+        u_desc_ctrl.field.zero_result = 1;
+        u_desc_ctrl.field.status_write_back_en = 1;
+        u_desc_ctrl.field.pq_xfer_en = 1;
+        u_desc_ctrl.field.p_xfer_dis = !!(flags & DMA_PREP_PQ_DISABLE_P);
+        u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
+        hw_desc->desc_ctrl = u_desc_ctrl.value;
+}
+
 static inline void iop_desc_set_byte_count(struct iop_adma_desc_slot *desc,
                                         struct iop_adma_chan *chan,
                                         u32 byte_count)
@@ -351,6 +415,7 @@ iop_desc_set_zero_sum_byte_count(struct iop_adma_desc_slot *desc, u32 len)
         }
 }
 
+#define iop_desc_set_pq_zero_sum_byte_count iop_desc_set_zero_sum_byte_count
 
 static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc,
                                         struct iop_adma_chan *chan,
@@ -361,6 +426,16 @@ static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc,
         hw_desc->upper_dest_addr = 0;
 }
 
+static inline void
+iop_desc_set_pq_addr(struct iop_adma_desc_slot *desc, dma_addr_t *addr)
+{
+        struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
+
+        hw_desc->dest_addr = addr[0];
+        hw_desc->q_dest_addr = addr[1];
+        hw_desc->upper_dest_addr = 0;
+}
+
 static inline void iop_desc_set_memcpy_src_addr(struct iop_adma_desc_slot *desc,
                                         dma_addr_t addr)
 {
@@ -389,6 +464,29 @@ static inline void iop_desc_set_xor_src_addr(struct iop_adma_desc_slot *desc,
 }
 
 static inline void
+iop_desc_set_pq_src_addr(struct iop_adma_desc_slot *desc, int src_idx,
+                         dma_addr_t addr, unsigned char coef)
+{
+        int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op;
+        struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc, *iter;
+        struct iop13xx_adma_src *src;
+        int i = 0;
+
+        do {
+                iter = iop_hw_desc_slot_idx(hw_desc, i);
+                src = &iter->src[src_idx];
+                src->src_addr = addr;
+                src->pq_upper_src_addr = 0;
+                src->pq_dmlt = coef;
+                slot_cnt -= slots_per_op;
+                if (slot_cnt) {
+                        i += slots_per_op;
+                        addr += IOP_ADMA_PQ_MAX_BYTE_COUNT;
+                }
+        } while (slot_cnt);
+}
+
+static inline void
 iop_desc_init_interrupt(struct iop_adma_desc_slot *desc,
         struct iop_adma_chan *chan)
 {
@@ -399,6 +497,15 @@ iop_desc_init_interrupt(struct iop_adma_desc_slot *desc,
 }
 
 #define iop_desc_set_zero_sum_src_addr iop_desc_set_xor_src_addr
+#define iop_desc_set_pq_zero_sum_src_addr iop_desc_set_pq_src_addr
+
+static inline void
+iop_desc_set_pq_zero_sum_addr(struct iop_adma_desc_slot *desc, int pq_idx,
+                              dma_addr_t *src)
+{
+        iop_desc_set_xor_src_addr(desc, pq_idx, src[pq_idx]);
+        iop_desc_set_xor_src_addr(desc, pq_idx+1, src[pq_idx+1]);
+}
 
 static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
                                         u32 next_desc_addr)
@@ -428,18 +535,20 @@ static inline void iop_desc_set_block_fill_val(struct iop_adma_desc_slot *desc,
         hw_desc->block_fill_data = val;
 }
 
-static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
+static inline enum sum_check_flags
+iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
 {
         struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
         struct iop13xx_adma_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;
         struct iop13xx_adma_byte_count byte_count = hw_desc->byte_count_field;
+        enum sum_check_flags flags;
 
         BUG_ON(!(byte_count.tx_complete && desc_ctrl.zero_result));
 
-        if (desc_ctrl.pq_xfer_en)
-                return byte_count.zero_result_err_q;
-        else
-                return byte_count.zero_result_err;
+        flags = byte_count.zero_result_err_q << SUM_CHECK_Q;
+        flags |= byte_count.zero_result_err << SUM_CHECK_P;
+
+        return flags;
 }
 
 static inline void iop_chan_append(struct iop_adma_chan *chan)
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index bee42c609df6..5c147fb66a01 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -477,10 +477,8 @@ void __init iop13xx_platform_init(void)
                         plat_data = &iop13xx_adma_0_data;
                         dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
                         dma_cap_set(DMA_XOR, plat_data->cap_mask);
-                        dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);
-                        dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);
+                        dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
                         dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
-                        dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);
                         dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
                         break;
                 case IOP13XX_INIT_ADMA_1:
@@ -489,10 +487,8 @@ void __init iop13xx_platform_init(void)
                         plat_data = &iop13xx_adma_1_data;
                         dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
                         dma_cap_set(DMA_XOR, plat_data->cap_mask);
-                        dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);
-                        dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);
+                        dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
                         dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
-                        dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);
                         dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
                         break;
                 case IOP13XX_INIT_ADMA_2:
@@ -501,14 +497,11 @@ void __init iop13xx_platform_init(void)
                         plat_data = &iop13xx_adma_2_data;
                         dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
                         dma_cap_set(DMA_XOR, plat_data->cap_mask);
-                        dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);
-                        dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);
+                        dma_cap_set(DMA_XOR_VAL, plat_data->cap_mask);
                         dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
-                        dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);
                         dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
-                        dma_cap_set(DMA_PQ_XOR, plat_data->cap_mask);
-                        dma_cap_set(DMA_PQ_UPDATE, plat_data->cap_mask);
-                        dma_cap_set(DMA_PQ_ZERO_SUM, plat_data->cap_mask);
+                        dma_cap_set(DMA_PQ, plat_data->cap_mask);
+                        dma_cap_set(DMA_PQ_VAL, plat_data->cap_mask);
                         break;
                 }
         }
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 5083f03e9b5e..cfd52fb341cb 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -41,8 +41,8 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
-static int __init ixp4xx_clocksource_init(void);
-static int __init ixp4xx_clockevent_init(void);
+static void __init ixp4xx_clocksource_init(void);
+static void __init ixp4xx_clockevent_init(void);
 static struct clock_event_device clockevent_ixp4xx;
 
 /*************************************************************************
@@ -267,7 +267,7 @@ void __init ixp4xx_init_irq(void)
 
 static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id)
 {
-        struct clock_event_device *evt = &clockevent_ixp4xx;
+        struct clock_event_device *evt = dev_id;
 
         /* Clear Pending Interrupt by writing '1' to it */
         *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND;
@@ -281,6 +281,7 @@ static struct irqaction ixp4xx_timer_irq = {
         .name           = "timer1",
         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
         .handler        = ixp4xx_timer_interrupt,
+        .dev_id         = &clockevent_ixp4xx,
 };
 
 void __init ixp4xx_timer_init(void)
@@ -401,7 +402,7 @@ void __init ixp4xx_sys_init(void)
 /*
  * clocksource
  */
-cycle_t ixp4xx_get_cycles(struct clocksource *cs)
+static cycle_t ixp4xx_get_cycles(struct clocksource *cs)
 {
         return *IXP4XX_OSTS;
 }
@@ -417,14 +418,12 @@ static struct clocksource clocksource_ixp4xx = {
 
 unsigned long ixp4xx_timer_freq = FREQ;
 EXPORT_SYMBOL(ixp4xx_timer_freq);
-static int __init ixp4xx_clocksource_init(void)
+static void __init ixp4xx_clocksource_init(void)
 {
         clocksource_ixp4xx.mult =
                 clocksource_hz2mult(ixp4xx_timer_freq,
                                     clocksource_ixp4xx.shift);
         clocksource_register(&clocksource_ixp4xx);
-
-        return 0;
 }
 
 /*
@@ -480,7 +479,7 @@ static struct clock_event_device clockevent_ixp4xx = {
         .set_next_event = ixp4xx_set_next_event,
 };
 
-static int __init ixp4xx_clockevent_init(void)
+static void __init ixp4xx_clockevent_init(void)
 {
         clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC,
                                         clockevent_ixp4xx.shift);
@@ -491,5 +490,4 @@ static int __init ixp4xx_clockevent_init(void)
         clockevent_ixp4xx.cpumask = cpumask_of(0);
 
         clockevents_register_device(&clockevent_ixp4xx);
-        return 0;
 }
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
index d2aa26f5acd7..54c0af7fa2d4 100644
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ b/arch/arm/mach-ixp4xx/include/mach/system.h
@@ -13,9 +13,11 @@
 
 static inline void arch_idle(void)
 {
+        /* ixp4xx does not implement the XScale PWRMODE register,
+         * so it must not call cpu_do_idle() here.
+         */
 #if 0
-        if (!hlt_counter)
-                cpu_do_idle(0);
+        cpu_do_idle();
 #endif
 }
 
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 79bdea943eb4..6bfd537d5afb 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -16,12 +16,164 @@
 #include <linux/amba/bus.h>
 #include <linux/interrupt.h>
 #include <linux/gpio.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/io.h>
+#include <asm/sizes.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
+#include <asm/mach/flash.h>
 #include <mach/setup.h>
+#include <mach/nand.h>
+#include <mach/fsmc.h>
 #include "clock.h"
 
+/* These adresses span 16MB, so use three individual pages */
+static struct resource nhk8815_nand_resources[] = {
+        {
+                .name = "nand_addr",
+                .start = NAND_IO_ADDR,
+                .end = NAND_IO_ADDR + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .name = "nand_cmd",
+                .start = NAND_IO_CMD,
+                .end = NAND_IO_CMD + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .name = "nand_data",
+                .start = NAND_IO_DATA,
+                .end = NAND_IO_DATA + 0xfff,
+                .flags = IORESOURCE_MEM,
+        }
+};
+
+static int nhk8815_nand_init(void)
+{
+        /* FSMC setup for nand chip select (8-bit nand in 8815NHK) */
+        writel(0x0000000E, FSMC_PCR(0));
+        writel(0x000D0A00, FSMC_PMEM(0));
+        writel(0x00100A00, FSMC_PATT(0));
+
+        /* enable access to the chip select area */
+        writel(readl(FSMC_PCR(0)) | 0x04, FSMC_PCR(0));
+
+        return 0;
+}
+
+/*
+ * These partitions are the same as those used in the 2.6.20 release
+ * shipped by the vendor; the first two partitions are mandated
+ * by the boot ROM, and the bootloader area is somehow oversized...
+ */
+static struct mtd_partition nhk8815_partitions[] = {
+        {
+                .name   = "X-Loader(NAND)",
+                .offset = 0,
+                .size   = SZ_256K,
+        }, {
+                .name   = "MemInit(NAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = SZ_256K,
+        }, {
+                .name   = "BootLoader(NAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = SZ_2M,
+        }, {
+                .name   = "Kernel zImage(NAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 3 * SZ_1M,
+        }, {
+                .name   = "Root Filesystem(NAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 22 * SZ_1M,
+        }, {
+                .name   = "User Filesystem(NAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = MTDPART_SIZ_FULL,
+        }
+};
+
+static struct nomadik_nand_platform_data nhk8815_nand_data = {
+        .parts          = nhk8815_partitions,
+        .nparts         = ARRAY_SIZE(nhk8815_partitions),
+        .options        = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \
+                        | NAND_NO_READRDY | NAND_NO_AUTOINCR,
+        .init           = nhk8815_nand_init,
+};
+
+static struct platform_device nhk8815_nand_device = {
+        .name           = "nomadik_nand",
+        .dev            = {
+                .platform_data = &nhk8815_nand_data,
+        },
+        .resource       = nhk8815_nand_resources,
+        .num_resources  = ARRAY_SIZE(nhk8815_nand_resources),
+};
+
+/* These are the partitions for the OneNand device, different from above */
+static struct mtd_partition nhk8815_onenand_partitions[] = {
+        {
+                .name   = "X-Loader(OneNAND)",
+                .offset = 0,
+                .size   = SZ_256K,
+        }, {
+                .name   = "MemInit(OneNAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = SZ_256K,
+        }, {
+                .name   = "BootLoader(OneNAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = SZ_2M-SZ_256K,
+        }, {
+                .name   = "SysImage(OneNAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 4 * SZ_1M,
+        }, {
+                .name   = "Root Filesystem(OneNAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 22 * SZ_1M,
+        }, {
+                .name   = "User Filesystem(OneNAND)",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = MTDPART_SIZ_FULL,
+        }
+};
+
+static struct flash_platform_data nhk8815_onenand_data = {
+        .parts          = nhk8815_onenand_partitions,
+        .nr_parts       = ARRAY_SIZE(nhk8815_onenand_partitions),
+};
+
+static struct resource nhk8815_onenand_resource[] = {
+        {
+                .start          = 0x30000000,
+                .end            = 0x30000000 + SZ_128K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device nhk8815_onenand_device = {
+        .name           = "onenand",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &nhk8815_onenand_data,
+        },
+        .resource       = nhk8815_onenand_resource,
+        .num_resources  = ARRAY_SIZE(nhk8815_onenand_resource),
+};
+
+static void __init nhk8815_onenand_init(void)
+{
+#ifdef CONFIG_ONENAND
+       /* Set up SMCS0 for OneNand */
+       writel(0x000030db, FSMC_BCR0);
+       writel(0x02100551, FSMC_BTR0);
+#endif
+}
+
 #define __MEM_4K_RESOURCE(x) \
         .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
 
@@ -81,6 +233,8 @@ static int __init nhk8815_eth_init(void)
 device_initcall(nhk8815_eth_init);
 
 static struct platform_device *nhk8815_platform_devices[] __initdata = {
+        &nhk8815_nand_device,
+        &nhk8815_onenand_device,
         &nhk8815_eth_device,
         /* will add more devices */
 };
@@ -90,6 +244,7 @@ static void __init nhk8815_platform_init(void)
         int i;
 
         cpu8815_platform_init();
+        nhk8815_onenand_init();
         platform_add_devices(nhk8815_platform_devices,
                              ARRAY_SIZE(nhk8815_platform_devices));
 
diff --git a/arch/arm/mach-nomadik/include/mach/fsmc.h b/arch/arm/mach-nomadik/include/mach/fsmc.h
new file mode 100644
index 000000000000..8c2c05183685
--- /dev/null
+++ b/arch/arm/mach-nomadik/include/mach/fsmc.h
@@ -0,0 +1,29 @@
+
+/* Definitions for the Nomadik FSMC "Flexible Static Memory controller" */
+
+#ifndef __ASM_ARCH_FSMC_H
+#define __ASM_ARCH_FSMC_H
+
+#include <mach/hardware.h>
+/*
+ * Register list
+ */
+
+/* bus control reg. and bus timing reg. for CS0..CS3 */
+#define FSMC_BCR(x)     (NOMADIK_FSMC_VA + (x << 3))
+#define FSMC_BTR(x)     (NOMADIK_FSMC_VA + (x << 3) + 0x04)
+
+/* PC-card and NAND:
+ * PCR = control register
+ * PMEM = memory timing
+ * PATT = attribute timing
+ * PIO = I/O timing
+ * PECCR = ECC result
+ */
+#define FSMC_PCR(x)     (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x00)
+#define FSMC_PMEM(x)    (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x08)
+#define FSMC_PATT(x)    (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x0c)
+#define FSMC_PIO(x)     (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x10)
+#define FSMC_PECCR(x)   (NOMADIK_FSMC_VA + ((2 + x) << 5) + 0x14)
+
+#endif /* __ASM_ARCH_FSMC_H */
diff --git a/arch/arm/mach-nomadik/include/mach/nand.h b/arch/arm/mach-nomadik/include/mach/nand.h
new file mode 100644
index 000000000000..c3c8254c22a5
--- /dev/null
+++ b/arch/arm/mach-nomadik/include/mach/nand.h
@@ -0,0 +1,16 @@
+#ifndef __ASM_ARCH_NAND_H
+#define __ASM_ARCH_NAND_H
+
+struct nomadik_nand_platform_data {
+        struct mtd_partition *parts;
+        int nparts;
+        int options;
+        int (*init) (void);
+        int (*exit) (void);
+};
+
+#define NAND_IO_DATA    0x40000000
+#define NAND_IO_CMD     0x40800000
+#define NAND_IO_ADDR    0x41000000
+
+#endif                          /* __ASM_ARCH_NAND_H */
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 8b40aace9db4..42920f9c1a11 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -15,8 +15,11 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/input.h>
+#include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/serial_8250.h>
 
+#include <asm/serial.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -162,10 +165,6 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-static struct omap_uart_config ams_delta_uart_config __initdata = {
-        .enabled_uarts = 1,
-};
-
 static struct omap_usb_config ams_delta_usb_config __initdata = {
         .register_host  = 1,
         .hmc_mode       = 16,
@@ -174,7 +173,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
 
 static struct omap_board_config_kernel ams_delta_config[] = {
         { OMAP_TAG_LCD,         &ams_delta_lcd_config },
-        { OMAP_TAG_UART,        &ams_delta_uart_config },
 };
 
 static struct resource ams_delta_kp_resources[] = {
@@ -235,6 +233,41 @@ static void __init ams_delta_init(void)
         platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
 }
 
+static struct plat_serial8250_port ams_delta_modem_ports[] = {
+        {
+                .membase        = (void *) AMS_DELTA_MODEM_VIRT,
+                .mapbase        = AMS_DELTA_MODEM_PHYS,
+                .irq            = -EINVAL, /* changed later */
+                .flags          = UPF_BOOT_AUTOCONF,
+                .irqflags       = IRQF_TRIGGER_RISING,
+                .iotype         = UPIO_MEM,
+                .regshift       = 1,
+                .uartclk        = BASE_BAUD * 16,
+        },
+        { },
+};
+
+static struct platform_device ams_delta_modem_device = {
+        .name   = "serial8250",
+        .id     = PLAT8250_DEV_PLATFORM1,
+        .dev            = {
+                .platform_data = ams_delta_modem_ports,
+        },
+};
+
+static int __init ams_delta_modem_init(void)
+{
+        omap_cfg_reg(M14_1510_GPIO2);
+        ams_delta_modem_ports[0].irq = gpio_to_irq(2);
+
+        ams_delta_latch2_write(
+                AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC,
+                AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC);
+
+        return platform_device_register(&ams_delta_modem_device);
+}
+arch_initcall(ams_delta_modem_init);
+
 static void __init ams_delta_map_io(void)
 {
         omap1_map_common_io();
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 19e0e9232336..a7ead1b93226 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -240,16 +240,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data)
         return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 }
 
-static struct omap_uart_config fsample_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1)),
-};
-
 static struct omap_lcd_config fsample_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel fsample_config[] = {
-        { OMAP_TAG_UART,        &fsample_uart_config },
         { OMAP_TAG_LCD,         &fsample_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index e724940e86f2..fb47239da72f 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -57,12 +57,7 @@ static struct omap_usb_config generic1610_usb_config __initdata = {
 };
 #endif
 
-static struct omap_uart_config generic_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel generic_config[] __initdata = {
-        { OMAP_TAG_UART,        &generic_uart_config },
 };
 
 static void __init omap_generic_init(void)
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index f695aa053ac8..aab860307dca 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -360,16 +360,11 @@ static struct omap_usb_config h2_usb_config __initdata = {
         .pins[1]        = 3,
 };
 
-static struct omap_uart_config h2_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config h2_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel h2_config[] __initdata = {
-        { OMAP_TAG_UART,        &h2_uart_config },
         { OMAP_TAG_LCD,         &h2_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index f597968733b4..89586b80b8d5 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -313,16 +313,11 @@ static struct omap_usb_config h3_usb_config __initdata = {
         .pins[1]        = 3,
 };
 
-static struct omap_uart_config h3_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config h3_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel h3_config[] __initdata = {
-        { OMAP_TAG_UART,        &h3_uart_config },
         { OMAP_TAG_LCD,         &h3_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 2fd98260ea49..cc2abbb2d0f4 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -368,13 +368,8 @@ static inline void innovator_mmc_init(void)
 }
 #endif
 
-static struct omap_uart_config innovator_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel innovator_config[] = {
         { OMAP_TAG_LCD,         NULL },
-        { OMAP_TAG_UART,        &innovator_uart_config },
 };
 
 static void __init innovator_init(void)
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index cf3247b15f87..ed891b8a6b15 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -293,10 +293,6 @@ static struct omap_usb_config osk_usb_config __initdata = {
         .pins[0]        = 2,
 };
 
-static struct omap_uart_config osk_uart_config __initdata = {
-        .enabled_uarts = (1 << 0),
-};
-
 #ifdef  CONFIG_OMAP_OSK_MISTRAL
 static struct omap_lcd_config osk_lcd_config __initdata = {
         .ctrl_name      = "internal",
@@ -304,7 +300,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = {
 #endif
 
 static struct omap_board_config_kernel osk_config[] __initdata = {
-        { OMAP_TAG_UART,                &osk_uart_config },
 #ifdef  CONFIG_OMAP_OSK_MISTRAL
         { OMAP_TAG_LCD,                 &osk_lcd_config },
 #endif
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 886b4c0569bd..90dd0431b0dc 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -212,10 +212,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-static struct omap_uart_config palmte_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
-};
-
 #ifdef CONFIG_APM
 /*
  * Values measured in 10 minute intervals averaged over 10 samples.
@@ -302,7 +298,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
 
 static struct omap_board_config_kernel palmte_config[] __initdata = {
         { OMAP_TAG_LCD,         &palmte_lcd_config },
-        { OMAP_TAG_UART,        &palmte_uart_config },
 };
 
 static struct spi_board_info palmte_spi_info[] __initdata = {
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 4f1b44831d37..8256139891ff 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -274,13 +274,8 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-static struct omap_uart_config palmtt_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
-};
-
 static struct omap_board_config_kernel palmtt_config[] __initdata = {
         { OMAP_TAG_LCD,         &palmtt_lcd_config      },
-        { OMAP_TAG_UART,        &palmtt_uart_config     },
 };
 
 static void __init omap_mpu_wdt_mode(int mode) {
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 9a55c3c58218..81b6bde1c5a3 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -244,13 +244,8 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = {
         .ctrl_name = "internal",
 };
 
-static struct omap_uart_config palmz71_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
-};
-
 static struct omap_board_config_kernel palmz71_config[] __initdata = {
         {OMAP_TAG_LCD,  &palmz71_lcd_config},
-        {OMAP_TAG_UART, &palmz71_uart_config},
 };
 
 static irqreturn_t
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 3b9f907aa899..83406699f310 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -208,16 +208,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data)
         return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 }
 
-static struct omap_uart_config perseus2_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1)),
-};
-
 static struct omap_lcd_config perseus2_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel perseus2_config[] __initdata = {
-        { OMAP_TAG_UART,        &perseus2_uart_config },
         { OMAP_TAG_LCD,         &perseus2_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index c096577695fe..02c85ca2e1df 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -369,13 +369,8 @@ static struct platform_device *sx1_devices[] __initdata = {
 };
 /*-----------------------------------------*/
 
-static struct omap_uart_config sx1_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel sx1_config[] __initdata = {
         { OMAP_TAG_LCD, &sx1_lcd_config },
-        { OMAP_TAG_UART,        &sx1_uart_config },
 };
 
 /*-----------------------------------------*/
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 98275e03dad1..c06e7a553472 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -140,12 +140,7 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
         .pins[2]        = 6,
 };
 
-static struct omap_uart_config voiceblue_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel voiceblue_config[] = {
-        { OMAP_TAG_UART, &voiceblue_uart_config },
 };
 
 static void __init voiceblue_init_irq(void)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index bbbaeb0abcd3..06808434ea04 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -71,7 +71,7 @@ static inline void omap_init_rtc(void) {}
 #  define INT_DSP_MAILBOX1      INT_1610_DSP_MAILBOX1
 #endif
 
-#define OMAP1_MBOX_BASE         IO_ADDRESS(OMAP16XX_MAILBOX_BASE)
+#define OMAP1_MBOX_BASE         OMAP1_IO_ADDRESS(OMAP16XX_MAILBOX_BASE)
 
 static struct resource mbox_resources[] = {
         {
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 3afe540149f7..7030f9281ea1 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -29,9 +29,9 @@ extern void omapfb_reserve_sdram(void);
  */
 static struct map_desc omap_io_desc[] __initdata = {
         {
-                .virtual        = IO_VIRT,
-                .pfn            = __phys_to_pfn(IO_PHYS),
-                .length         = IO_SIZE,
+                .virtual        = OMAP1_IO_VIRT,
+                .pfn            = __phys_to_pfn(OMAP1_IO_PHYS),
+                .length         = OMAP1_IO_SIZE,
                 .type           = MT_DEVICE
         }
 };
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h
index 9ed5e2c1de4d..c4f05bdcf8a6 100644
--- a/arch/arm/mach-omap1/pm.h
+++ b/arch/arm/mach-omap1/pm.h
@@ -39,11 +39,11 @@
  * Register and offset definitions to be used in PM assembler code
  * ----------------------------------------------------------------------------
  */
-#define CLKGEN_REG_ASM_BASE             IO_ADDRESS(0xfffece00)
+#define CLKGEN_REG_ASM_BASE             OMAP1_IO_ADDRESS(0xfffece00)
 #define ARM_IDLECT1_ASM_OFFSET          0x04
 #define ARM_IDLECT2_ASM_OFFSET          0x08
 
-#define TCMIF_ASM_BASE                  IO_ADDRESS(0xfffecc00)
+#define TCMIF_ASM_BASE                  OMAP1_IO_ADDRESS(0xfffecc00)
 #define EMIFS_CONFIG_ASM_OFFSET         0x0c
 #define EMIFF_SDRAM_CONFIG_ASM_OFFSET   0x20
 
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index f754cee4f3c3..d496e50fec40 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
 
 static struct plat_serial8250_port serial_platform_data[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART1_BASE),
+                .membase        = OMAP1_IO_ADDRESS(OMAP_UART1_BASE),
                 .mapbase        = OMAP_UART1_BASE,
                 .irq            = INT_UART1,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -73,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
         },
         {
-                .membase        = IO_ADDRESS(OMAP_UART2_BASE),
+                .membase        = OMAP1_IO_ADDRESS(OMAP_UART2_BASE),
                 .mapbase        = OMAP_UART2_BASE,
                 .irq            = INT_UART2,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -82,7 +82,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
         },
         {
-                .membase        = IO_ADDRESS(OMAP_UART3_BASE),
+                .membase        = OMAP1_IO_ADDRESS(OMAP_UART3_BASE),
                 .mapbase        = OMAP_UART3_BASE,
                 .irq            = INT_UART3,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -109,7 +109,6 @@ static struct platform_device serial_device = {
 void __init omap_serial_init(void)
 {
         int i;
-        const struct omap_uart_config *info;
 
         if (cpu_is_omap730()) {
                 serial_platform_data[0].regshift = 0;
@@ -131,19 +130,9 @@ void __init omap_serial_init(void)
                 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
         }
 
-        info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-        if (info == NULL)
-                return;
-
         for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
                 unsigned char reg;
 
-                if (!((1 << i) & info->enabled_uarts)) {
-                        serial_platform_data[i].membase = NULL;
-                        serial_platform_data[i].mapbase = 0;
-                        continue;
-                }
-
                 switch (i) {
                 case 0:
                         uart1_ck = clk_get(NULL, "uart1_ck");
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 261cdc48228b..7724e520d07c 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -21,13 +21,13 @@
 ENTRY(omap1_sram_reprogram_clock)
         stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
 
-        mov     r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000
-        orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000
-        orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00
+        mov     r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000
+        orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
+        orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
 
-        mov     r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000
-        orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
-        orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
+        mov     r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000
+        orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
+        orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
 
         tst     r0, #1 << 4                     @ want lock mode?
         beq     newck                           @ nope
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 4d56408d3cff..1be6a214d88d 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -62,8 +62,8 @@ typedef struct {
         u32 read_tim;                   /* READ_TIM,   R */
 } omap_mpu_timer_regs_t;
 
-#define omap_mpu_timer_base(n)                                          \
-((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE +      \
+#define omap_mpu_timer_base(n)                                                  \
+((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +        \
                                  (n)*OMAP_MPU_TIMER_OFFSET))
 
 static inline unsigned long omap_mpu_timer_read(int nr)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a755eb5e2361..75b1c7efae7e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -31,6 +31,11 @@ config MACH_OMAP_GENERIC
         bool "Generic OMAP board"
         depends on ARCH_OMAP2 && ARCH_OMAP24XX
 
+config MACH_OMAP2_TUSB6010
+        bool
+        depends on ARCH_OMAP2 && ARCH_OMAP2420
+        default y if MACH_NOKIA_N8X0
+
 config MACH_OMAP_H4
         bool "OMAP 2420 H4 board"
         depends on ARCH_OMAP2 && ARCH_OMAP24XX
@@ -68,6 +73,10 @@ config MACH_OMAP_3430SDP
         bool "OMAP 3430 SDP board"
         depends on ARCH_OMAP3 && ARCH_OMAP34XX
 
+config MACH_NOKIA_N8X0
+        bool "Nokia N800/N810"
+        depends on ARCH_OMAP2420
+
 config MACH_NOKIA_RX51
         bool "Nokia RX-51 board"
         depends on ARCH_OMAP3 && ARCH_OMAP34XX
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 735bae5b0dec..8cb16777661a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -5,7 +5,7 @@
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
 
-omap-2-3-common                         = irq.o sdrc.o
+omap-2-3-common                         = irq.o sdrc.o omap_hwmod.o
 prcm-common                             = prcm.o powerdomain.o
 clock-common                            = clock.o clockdomain.o
 
@@ -35,6 +35,11 @@ obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o
 obj-$(CONFIG_PM_DEBUG)                  += pm-debug.o
 endif
 
+# PRCM
+obj-$(CONFIG_ARCH_OMAP2)                += cm.o
+obj-$(CONFIG_ARCH_OMAP3)                += cm.o
+obj-$(CONFIG_ARCH_OMAP4)                += cm4xxx.o
+
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)                += clock24xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += clock34xx.o
@@ -62,7 +67,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA)	+= board-omap3pandora.o \
                                            mmc-twl4030.o
 obj-$(CONFIG_MACH_OMAP_3430SDP)         += board-3430sdp.o \
                                            mmc-twl4030.o
-
+obj-$(CONFIG_MACH_NOKIA_N8X0)           += board-n8x0.o
 obj-$(CONFIG_MACH_NOKIA_RX51)           += board-rx51.o \
                                            board-rx51-peripherals.o \
                                            mmc-twl4030.o
@@ -74,6 +79,7 @@ obj-$(CONFIG_MACH_OMAP_4430SDP)		+= board-4430sdp.o
 
 # Platform specific device init code
 obj-y                                   += usb-musb.o
+obj-$(CONFIG_MACH_OMAP2_TUSB6010)       += usb-tusb6010.o
 
 onenand-$(CONFIG_MTD_ONENAND_OMAP2)     := gpmc-onenand.o
 obj-y                                   += $(onenand-m) $(onenand-y)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 8ec2a132904d..42217b32f835 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -139,23 +139,19 @@ static inline void board_smc91x_init(void)
 
 #endif
 
+static struct omap_board_config_kernel sdp2430_config[] = {
+        {OMAP_TAG_LCD, &sdp2430_lcd_config},
+};
+
 static void __init omap_2430sdp_init_irq(void)
 {
+        omap_board_config = sdp2430_config;
+        omap_board_config_size = ARRAY_SIZE(sdp2430_config);
         omap2_init_common_hw(NULL, NULL);
         omap_init_irq();
         omap_gpio_init();
 }
 
-static struct omap_uart_config sdp2430_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
-static struct omap_board_config_kernel sdp2430_config[] = {
-        {OMAP_TAG_UART, &sdp2430_uart_config},
-        {OMAP_TAG_LCD, &sdp2430_lcd_config},
-};
-
-
 static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
         .gpio_base      = OMAP_MAX_GPIO_LINES,
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
@@ -205,8 +201,6 @@ static void __init omap_2430sdp_init(void)
         omap2430_i2c_init();
 
         platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
-        omap_board_config = sdp2430_config;
-        omap_board_config_size = ARRAY_SIZE(sdp2430_config);
         omap_serial_init();
         twl4030_mmc_init(mmc);
         usb_musb_init();
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index ac262cd74503..bd57ec76dc5e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -167,26 +167,23 @@ static struct platform_device *sdp3430_devices[] __initdata = {
         &sdp3430_lcd_device,
 };
 
-static void __init omap_3430sdp_init_irq(void)
-{
-        omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-}
-
-static struct omap_uart_config sdp3430_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config sdp3430_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
-        { OMAP_TAG_UART,        &sdp3430_uart_config },
         { OMAP_TAG_LCD,         &sdp3430_lcd_config },
 };
 
+static void __init omap_3430sdp_init_irq(void)
+{
+        omap_board_config = sdp3430_config;
+        omap_board_config_size = ARRAY_SIZE(sdp3430_config);
+        omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static int sdp3430_batt_table[] = {
 /* 0 C*/
 30800, 29500, 28300, 27100,
@@ -478,12 +475,15 @@ static inline void board_smc91x_init(void)
 
 #endif
 
+static void enable_board_wakeup_source(void)
+{
+        omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
+}
+
 static void __init omap_3430sdp_init(void)
 {
         omap3430_i2c_init();
         platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
-        omap_board_config = sdp3430_config;
-        omap_board_config_size = ARRAY_SIZE(sdp3430_config);
         if (omap_rev() > OMAP3430_REV_ES1_0)
                 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
         else
@@ -495,6 +495,7 @@ static void __init omap_3430sdp_init(void)
         omap_serial_init();
         usb_musb_init();
         board_smc91x_init();
+        enable_board_wakeup_source();
 }
 
 static void __init omap_3430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 1b223076ceb7..eb37c40ea83a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -47,14 +47,13 @@ static struct omap_lcd_config sdp4430_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel sdp4430_config[] __initdata = {
-        { OMAP_TAG_UART,        &sdp4430_uart_config },
         { OMAP_TAG_LCD,         &sdp4430_lcd_config },
 };
 
 static void __init gic_init_irq(void)
 {
-        gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
-        gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+        gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
+        gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
 }
 
 static void __init omap_4430sdp_init_irq(void)
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index dcfc20d03894..a1132288c701 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -87,7 +87,7 @@ static struct mtd_partition apollon_partitions[] = {
         },
 };
 
-static struct flash_platform_data apollon_flash_data = {
+static struct onenand_platform_data apollon_flash_data = {
         .parts          = apollon_partitions,
         .nr_parts       = ARRAY_SIZE(apollon_partitions),
 };
@@ -99,7 +99,7 @@ static struct resource apollon_flash_resource[] = {
 };
 
 static struct platform_device apollon_onenand_device = {
-        .name           = "onenand",
+        .name           = "onenand-flash",
         .id             = -1,
         .dev            = {
                 .platform_data  = &apollon_flash_data,
@@ -248,18 +248,6 @@ out:
         clk_put(gpmc_fck);
 }
 
-static void __init omap_apollon_init_irq(void)
-{
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-        apollon_init_smc91x();
-}
-
-static struct omap_uart_config apollon_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2),
-};
-
 static struct omap_usb_config apollon_usb_config __initdata = {
         .register_dev   = 1,
         .hmc_mode       = 0x14, /* 0:dev 1:host1 2:disable */
@@ -272,10 +260,19 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel apollon_config[] = {
-        { OMAP_TAG_UART,        &apollon_uart_config },
         { OMAP_TAG_LCD,         &apollon_lcd_config },
 };
 
+static void __init omap_apollon_init_irq(void)
+{
+        omap_board_config = apollon_config;
+        omap_board_config_size = ARRAY_SIZE(apollon_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+        apollon_init_smc91x();
+}
+
 static void __init apollon_led_init(void)
 {
         /* LED0 - AA10 */
@@ -324,8 +321,6 @@ static void __init omap_apollon_init(void)
          * if not needed.
          */
         platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
-        omap_board_config = apollon_config;
-        omap_board_config_size = ARRAY_SIZE(apollon_config);
         omap_serial_init();
 }
 
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index fd00aa03690c..2e09a1c444cb 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -31,24 +31,19 @@
 #include <mach/board.h>
 #include <mach/common.h>
 
+static struct omap_board_config_kernel generic_config[] = {
+};
+
 static void __init omap_generic_init_irq(void)
 {
+        omap_board_config = generic_config;
+        omap_board_config_size = ARRAY_SIZE(generic_config);
         omap2_init_common_hw(NULL, NULL);
         omap_init_irq();
 }
 
-static struct omap_uart_config generic_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
-static struct omap_board_config_kernel generic_config[] = {
-        { OMAP_TAG_UART,        &generic_uart_config },
-};
-
 static void __init omap_generic_init(void)
 {
-        omap_board_config = generic_config;
-        omap_board_config_size = ARRAY_SIZE(generic_config);
         omap_serial_init();
 }
 
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 7b1d61d5bb2c..eaa02d012c5c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -268,18 +268,6 @@ static void __init h4_init_flash(void)
         h4_flash_resource.end   = base + SZ_64M - 1;
 }
 
-static void __init omap_h4_init_irq(void)
-{
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-        h4_init_flash();
-}
-
-static struct omap_uart_config h4_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config h4_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
@@ -318,10 +306,19 @@ static struct omap_usb_config h4_usb_config __initdata = {
 };
 
 static struct omap_board_config_kernel h4_config[] = {
-        { OMAP_TAG_UART,        &h4_uart_config },
         { OMAP_TAG_LCD,         &h4_lcd_config },
 };
 
+static void __init omap_h4_init_irq(void)
+{
+        omap_board_config = h4_config;
+        omap_board_config_size = ARRAY_SIZE(h4_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+        h4_init_flash();
+}
+
 static struct at24_platform_data m24c01 = {
         .byte_len       = SZ_1K / 8,
         .page_size      = 16,
@@ -366,8 +363,6 @@ static void __init omap_h4_init(void)
                         ARRAY_SIZE(h4_i2c_board_info));
 
         platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
-        omap_board_config = h4_config;
-        omap_board_config_size = ARRAY_SIZE(h4_config);
         omap_usb_init(&h4_usb_config);
         omap_serial_init();
 }
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ea383f88cb1b..ec6854cbdd9f 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -268,18 +268,6 @@ static inline void __init ldp_init_smsc911x(void)
         gpio_direction_input(eth_gpio);
 }
 
-static void __init omap_ldp_init_irq(void)
-{
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-        ldp_init_smsc911x();
-}
-
-static struct omap_uart_config ldp_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct platform_device ldp_lcd_device = {
         .name           = "ldp_lcd",
         .id             = -1,
@@ -290,10 +278,19 @@ static struct omap_lcd_config ldp_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel ldp_config[] __initdata = {
-        { OMAP_TAG_UART,        &ldp_uart_config },
         { OMAP_TAG_LCD,         &ldp_lcd_config },
 };
 
+static void __init omap_ldp_init_irq(void)
+{
+        omap_board_config = ldp_config;
+        omap_board_config_size = ARRAY_SIZE(ldp_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+        ldp_init_smsc911x();
+}
+
 static struct twl4030_usb_data ldp_usb_data = {
         .usb_mode       = T2_USB_MODE_ULPI,
 };
@@ -377,8 +374,6 @@ static void __init omap_ldp_init(void)
 {
         omap_i2c_init();
         platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
-        omap_board_config = ldp_config;
-        omap_board_config_size = ARRAY_SIZE(ldp_config);
         ts_gpio = 54;
         ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
         spi_register_board_info(ldp_spi_board_info,
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
new file mode 100644
index 000000000000..8341632d260b
--- /dev/null
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -0,0 +1,150 @@
+/*
+ * linux/arch/arm/mach-omap2/board-n8x0.c
+ *
+ * Copyright (C) 2005-2009 Nokia Corporation
+ * Author: Juha Yrjola <juha.yrjola@nokia.com>
+ *
+ * Modified from mach-omap2/board-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/stddef.h>
+#include <linux/spi/spi.h>
+#include <linux/usb/musb.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/board.h>
+#include <mach/common.h>
+#include <mach/irqs.h>
+#include <mach/mcspi.h>
+#include <mach/onenand.h>
+#include <mach/serial.h>
+
+static struct omap2_mcspi_device_config p54spi_mcspi_config = {
+        .turbo_mode     = 0,
+        .single_channel = 1,
+};
+
+static struct spi_board_info n800_spi_board_info[] __initdata = {
+        {
+                .modalias       = "p54spi",
+                .bus_num        = 2,
+                .chip_select    = 0,
+                .max_speed_hz   = 48000000,
+                .controller_data = &p54spi_mcspi_config,
+        },
+};
+
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+        defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+
+static struct mtd_partition onenand_partitions[] = {
+        {
+                .name           = "bootloader",
+                .offset         = 0,
+                .size           = 0x20000,
+                .mask_flags     = MTD_WRITEABLE,        /* Force read-only */
+        },
+        {
+                .name           = "config",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 0x60000,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 0x200000,
+        },
+        {
+                .name           = "initfs",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 0x400000,
+        },
+        {
+                .name           = "rootfs",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct omap_onenand_platform_data board_onenand_data = {
+        .cs             = 0,
+        .gpio_irq       = 26,
+        .parts          = onenand_partitions,
+        .nr_parts       = ARRAY_SIZE(onenand_partitions),
+        .flags          = ONENAND_SYNC_READ,
+};
+
+static void __init n8x0_onenand_init(void)
+{
+        gpmc_onenand_init(&board_onenand_data);
+}
+
+#else
+
+static void __init n8x0_onenand_init(void) {}
+
+#endif
+
+static void __init n8x0_map_io(void)
+{
+        omap2_set_globals_242x();
+        omap2_map_common_io();
+}
+
+static void __init n8x0_init_irq(void)
+{
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
+static void __init n8x0_init_machine(void)
+{
+        /* FIXME: add n810 spi devices */
+        spi_register_board_info(n800_spi_board_info,
+                                ARRAY_SIZE(n800_spi_board_info));
+
+        omap_serial_init();
+        n8x0_onenand_init();
+}
+
+MACHINE_START(NOKIA_N800, "Nokia N800")
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = n8x0_map_io,
+        .init_irq       = n8x0_init_irq,
+        .init_machine   = n8x0_init_machine,
+        .timer          = &omap_timer,
+MACHINE_END
+
+MACHINE_START(NOKIA_N810, "Nokia N810")
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = n8x0_map_io,
+        .init_irq       = n8x0_init_irq,
+        .init_machine   = n8x0_init_machine,
+        .timer          = &omap_timer,
+MACHINE_END
+
+MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = n8x0_map_io,
+        .init_irq       = n8x0_init_irq,
+        .init_machine   = n8x0_init_machine,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index e00ba128cece..500c9956876d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -108,10 +108,6 @@ static struct platform_device omap3beagle_nand_device = {
 
 #include "sdram-micron-mt46h32m32lf-6.h"
 
-static struct omap_uart_config omap3_beagle_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct twl4030_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -249,11 +245,16 @@ static struct regulator_init_data beagle_vpll2 = {
         .consumer_supplies      = &beagle_vdvi_supply,
 };
 
+static struct twl4030_usb_data beagle_usb_data = {
+        .usb_mode       = T2_USB_MODE_ULPI,
+};
+
 static struct twl4030_platform_data beagle_twldata = {
         .irq_base       = TWL4030_IRQ_BASE,
         .irq_end        = TWL4030_IRQ_END,
 
         /* platform_data for children goes here */
+        .usb            = &beagle_usb_data,
         .gpio           = &beagle_gpio_data,
         .vmmc1          = &beagle_vmmc1,
         .vsim           = &beagle_vsim,
@@ -280,17 +281,6 @@ static int __init omap3_beagle_i2c_init(void)
         return 0;
 }
 
-static void __init omap3_beagle_init_irq(void)
-{
-        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
-                             mt46h32m32lf6_sdrc_params);
-        omap_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
-        omap2_gp_clockevent_set_gptimer(12);
-#endif
-        omap_gpio_init();
-}
-
 static struct gpio_led gpio_leds[] = {
         {
                 .name                   = "beagleboard::usr0",
@@ -345,10 +335,22 @@ static struct platform_device keys_gpio = {
 };
 
 static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
-        { OMAP_TAG_UART,        &omap3_beagle_uart_config },
         { OMAP_TAG_LCD,         &omap3_beagle_lcd_config },
 };
 
+static void __init omap3_beagle_init_irq(void)
+{
+        omap_board_config = omap3_beagle_config;
+        omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
+        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                             mt46h32m32lf6_sdrc_params);
+        omap_init_irq();
+#ifdef CONFIG_OMAP_32K_TIMER
+        omap2_gp_clockevent_set_gptimer(12);
+#endif
+        omap_gpio_init();
+}
+
 static struct platform_device *omap3_beagle_devices[] __initdata = {
         &omap3_beagle_lcd_device,
         &leds_gpio,
@@ -398,8 +400,6 @@ static void __init omap3_beagle_init(void)
         omap3_beagle_i2c_init();
         platform_add_devices(omap3_beagle_devices,
                         ARRAY_SIZE(omap3_beagle_devices));
-        omap_board_config = omap3_beagle_config;
-        omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
         omap_serial_init();
 
         omap_cfg_reg(J25_34XX_GPIO170);
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c4b144647dc5..d50b9be90580 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -92,10 +92,6 @@ static inline void __init omap3evm_init_smc911x(void)
         gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ);
 }
 
-static struct omap_uart_config omap3_evm_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct twl4030_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -278,19 +274,20 @@ struct spi_board_info omap3evm_spi_board_info[] = {
         },
 };
 
+static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
+        { OMAP_TAG_LCD,         &omap3_evm_lcd_config },
+};
+
 static void __init omap3_evm_init_irq(void)
 {
+        omap_board_config = omap3_evm_config;
+        omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
         omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
         omap_init_irq();
         omap_gpio_init();
         omap3evm_init_smc911x();
 }
 
-static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
-        { OMAP_TAG_UART,        &omap3_evm_uart_config },
-        { OMAP_TAG_LCD,         &omap3_evm_lcd_config },
-};
-
 static struct platform_device *omap3_evm_devices[] __initdata = {
         &omap3_evm_lcd_device,
         &omap3evm_smc911x_device,
@@ -301,8 +298,6 @@ static void __init omap3_evm_init(void)
         omap3_evm_i2c_init();
 
         platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
-        omap_board_config = omap3_evm_config;
-        omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
 
         spi_register_board_info(omap3evm_spi_board_info,
                                 ARRAY_SIZE(omap3evm_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 864ee3d021f7..b43f6e36b6d9 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -213,10 +213,6 @@ static struct twl4030_hsmmc_info omap3pandora_mmc[] = {
         {}      /* Terminator */
 };
 
-static struct omap_uart_config omap3pandora_uart_config __initdata = {
-        .enabled_uarts  = (1 << 2), /* UART3 */
-};
-
 static struct regulator_consumer_supply pandora_vmmc1_supply = {
         .supply                 = "vmmc",
 };
@@ -309,14 +305,6 @@ static int __init omap3pandora_i2c_init(void)
         return 0;
 }
 
-static void __init omap3pandora_init_irq(void)
-{
-        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
-                             mt46h32m32lf6_sdrc_params);
-        omap_init_irq();
-        omap_gpio_init();
-}
-
 static void __init omap3pandora_ads7846_init(void)
 {
         int gpio = OMAP3_PANDORA_TS_GPIO;
@@ -376,10 +364,19 @@ static struct omap_lcd_config omap3pandora_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel omap3pandora_config[] __initdata = {
-        { OMAP_TAG_UART,        &omap3pandora_uart_config },
         { OMAP_TAG_LCD,         &omap3pandora_lcd_config },
 };
 
+static void __init omap3pandora_init_irq(void)
+{
+        omap_board_config = omap3pandora_config;
+        omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
+        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                             mt46h32m32lf6_sdrc_params);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static struct platform_device *omap3pandora_devices[] __initdata = {
         &omap3pandora_lcd_device,
         &pandora_leds_gpio,
@@ -391,8 +388,6 @@ static void __init omap3pandora_init(void)
         omap3pandora_i2c_init();
         platform_add_devices(omap3pandora_devices,
                         ARRAY_SIZE(omap3pandora_devices));
-        omap_board_config = omap3pandora_config;
-        omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
         omap_serial_init();
         spi_register_board_info(omap3pandora_spi_board_info,
                         ARRAY_SIZE(omap3pandora_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 6bce23004aa4..9917d2fddc2f 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -271,9 +271,6 @@ static void __init overo_flash_init(void)
                         printk(KERN_ERR "Unable to register NAND device\n");
         }
 }
-static struct omap_uart_config overo_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
 
 static struct twl4030_hsmmc_info mmc[] = {
         {
@@ -360,14 +357,6 @@ static int __init overo_i2c_init(void)
         return 0;
 }
 
-static void __init overo_init_irq(void)
-{
-        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
-                             mt46h32m32lf6_sdrc_params);
-        omap_init_irq();
-        omap_gpio_init();
-}
-
 static struct platform_device overo_lcd_device = {
         .name           = "overo_lcd",
         .id             = -1,
@@ -378,10 +367,19 @@ static struct omap_lcd_config overo_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel overo_config[] __initdata = {
-        { OMAP_TAG_UART,        &overo_uart_config },
         { OMAP_TAG_LCD,         &overo_lcd_config },
 };
 
+static void __init overo_init_irq(void)
+{
+        omap_board_config = overo_config;
+        omap_board_config_size = ARRAY_SIZE(overo_config);
+        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                             mt46h32m32lf6_sdrc_params);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static struct platform_device *overo_devices[] __initdata = {
         &overo_lcd_device,
 };
@@ -390,8 +388,6 @@ static void __init overo_init(void)
 {
         overo_i2c_init();
         platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
-        omap_board_config = overo_config;
-        omap_board_config_size = ARRAY_SIZE(overo_config);
         omap_serial_init();
         overo_flash_init();
         usb_musb_init();
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 56d931a425f7..e6e8290b7828 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -1,5 +1,5 @@
 /*
- * linux/arch/arm/mach-omap2/board-rx51-flash.c
+ * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
  *
  * Copyright (C) 2008-2009 Nokia
  *
@@ -19,6 +19,7 @@
 #include <linux/delay.h>
 #include <linux/regulator/machine.h>
 #include <linux/gpio.h>
+#include <linux/mmc/host.h>
 
 #include <mach/mcspi.h>
 #include <mach/mux.h>
@@ -102,6 +103,7 @@ static struct twl4030_hsmmc_info mmc[] = {
                 .cover_only     = true,
                 .gpio_cd        = 160,
                 .gpio_wp        = -EINVAL,
+                .power_saving   = true,
         },
         {
                 .name           = "internal",
@@ -109,6 +111,8 @@ static struct twl4030_hsmmc_info mmc[] = {
                 .wires          = 8,
                 .gpio_cd        = -EINVAL,
                 .gpio_wp        = -EINVAL,
+                .nonremovable   = true,
+                .power_saving   = true,
         },
         {}      /* Terminator */
 };
@@ -282,7 +286,124 @@ static struct twl4030_usb_data rx51_usb_data = {
         .usb_mode               = T2_USB_MODE_ULPI,
 };
 
-static struct twl4030_platform_data rx51_twldata = {
+static struct twl4030_ins sleep_on_seq[] __initdata = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+        {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+        {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+        {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+        {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_OFF), 3},
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+        .script = sleep_on_seq,
+        .size   = ARRAY_SIZE(sleep_on_seq),
+        .flags  = TWL4030_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+/*
+ * Reenable the OMAP3 PLLs.
+ * Wakeup VDD1 and VDD2.
+ * Reenable sysclk output.
+ */
+        {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
+        {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
+        {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
+        {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+        .script = wakeup_seq,
+        .size   = ARRAY_SIZE(wakeup_seq),
+        .flags  = TWL4030_WAKEUP12_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_p3_seq[] __initdata = {
+/*
+ * Wakeup VDD1 (dummy to be able to insert a delay)
+ * Enable CLKEN
+ */
+        {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_ACTIVE), 3},
+};
+
+static struct twl4030_script wakeup_p3_script __initdata = {
+        .script = wakeup_p3_seq,
+        .size   = ARRAY_SIZE(wakeup_p3_seq),
+        .flags  = TWL4030_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_ins wrst_seq[] __initdata = {
+/*
+ * Reset twl4030.
+ * Reset VDD1 regulator.
+ * Reset VDD2 regulator.
+ * Reset VPLL1 regulator.
+ * Enable sysclk output.
+ * Reenable twl4030.
+ */
+        {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
+        {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
+                0x13},
+        {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 2, RES_STATE_WRST), 0x13},
+        {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
+        {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
+        {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
+        {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
+        {MSG_SINGULAR(DEV_GRP_P1, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
+        {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
+};
+
+static struct twl4030_script wrst_script __initdata = {
+        .script = wrst_seq,
+        .size   = ARRAY_SIZE(wrst_seq),
+        .flags  = TWL4030_WRST_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+        /* wakeup12 script should be loaded before sleep script, otherwise a
+           board might hit retention before loading of wakeup script is
+           completed. This can cause boot failures depending on timing issues.
+        */
+        &wakeup_script,
+        &sleep_on_script,
+        &wakeup_p3_script,
+        &wrst_script,
+};
+
+static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
+        { .resource = RES_VINTANA1, .devgroup = -1, .type = -1, .type2 = 1 },
+        { .resource = RES_VINTANA2, .devgroup = -1, .type = -1, .type2 = 1 },
+        { .resource = RES_VINTDIG, .devgroup = -1, .type = -1, .type2 = 1 },
+        { .resource = RES_VMMC1, .devgroup = -1, .type = -1, .type2 = 3},
+        { .resource = RES_VMMC2, .devgroup = DEV_GRP_NULL, .type = -1,
+          .type2 = 3},
+        { .resource = RES_VAUX1, .devgroup = -1, .type = -1, .type2 = 3},
+        { .resource = RES_VAUX2, .devgroup = -1, .type = -1, .type2 = 3},
+        { .resource = RES_VAUX3, .devgroup = -1, .type = -1, .type2 = 3},
+        { .resource = RES_VAUX4, .devgroup = -1, .type = -1, .type2 = 3},
+        { .resource = RES_VPLL2, .devgroup = -1, .type = -1, .type2 = 3},
+        { .resource = RES_VDAC, .devgroup = -1, .type = -1, .type2 = 3},
+        { .resource = RES_VSIM, .devgroup = DEV_GRP_NULL, .type = -1,
+          .type2 = 3},
+        { .resource = RES_CLKEN, .devgroup = DEV_GRP_P3, .type = -1,
+                .type2 = 1 },
+        { 0, 0},
+};
+
+static struct twl4030_power_data rx51_t2scripts_data __initdata = {
+        .scripts        = twl4030_scripts,
+        .num = ARRAY_SIZE(twl4030_scripts),
+        .resource_config = twl4030_rconfig,
+};
+
+
+
+static struct twl4030_platform_data rx51_twldata __initdata = {
         .irq_base               = TWL4030_IRQ_BASE,
         .irq_end                = TWL4030_IRQ_END,
 
@@ -291,6 +412,7 @@ static struct twl4030_platform_data rx51_twldata = {
         .keypad                 = &rx51_kp_data,
         .madc                   = &rx51_madc_data,
         .usb                    = &rx51_usb_data,
+        .power                  = &rx51_t2scripts_data,
 
         .vaux1                  = &rx51_vaux1,
         .vaux2                  = &rx51_vaux2,
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 1c9e07fe8266..f9196c3b1a7b 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -31,10 +31,6 @@
 #include <mach/gpmc.h>
 #include <mach/usb.h>
 
-static struct omap_uart_config rx51_uart_config = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config rx51_lcd_config = {
         .ctrl_name      = "internal",
 };
@@ -52,7 +48,6 @@ static struct omap_fbmem_config rx51_fbmem2_config = {
 };
 
 static struct omap_board_config_kernel rx51_config[] = {
-        { OMAP_TAG_UART,        &rx51_uart_config },
         { OMAP_TAG_FBMEM,       &rx51_fbmem0_config },
         { OMAP_TAG_FBMEM,       &rx51_fbmem1_config },
         { OMAP_TAG_FBMEM,       &rx51_fbmem2_config },
@@ -61,6 +56,8 @@ static struct omap_board_config_kernel rx51_config[] = {
 
 static void __init rx51_init_irq(void)
 {
+        omap_board_config = rx51_config;
+        omap_board_config_size = ARRAY_SIZE(rx51_config);
         omap2_init_common_hw(NULL, NULL);
         omap_init_irq();
         omap_gpio_init();
@@ -70,8 +67,6 @@ extern void __init rx51_peripherals_init(void);
 
 static void __init rx51_init(void)
 {
-        omap_board_config = rx51_config;
-        omap_board_config_size = ARRAY_SIZE(rx51_config);
         omap_serial_init();
         usb_musb_init();
         rx51_peripherals_init();
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index bac5c4321ff7..1f13e2a1f322 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -12,6 +12,7 @@
 #include <linux/gpio.h>
 #include <linux/serial_8250.h>
 #include <linux/smsc911x.h>
+#include <linux/interrupt.h>
 
 #include <mach/gpmc.h>
 
@@ -84,6 +85,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .mapbase        = 0x10000000,
                 .irq            = OMAP_GPIO_IRQ(102),
                 .flags          = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ,
+                .irqflags       = IRQF_SHARED | IRQF_TRIGGER_RISING,
                 .iotype         = UPIO_MEM,
                 .regshift       = 1,
                 .uartclk        = QUART_CLK,
@@ -94,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 
 static struct platform_device zoom2_debugboard_serial_device = {
         .name                   = "serial8250",
-        .id                     = PLAT8250_DEV_PLATFORM1,
+        .id                     = 3,
         .dev                    = {
                 .platform_data  = serial_platform_data,
         },
@@ -127,6 +129,7 @@ static inline void __init zoom2_init_quaduart(void)
 static inline int omap_zoom2_debugboard_detect(void)
 {
         int debug_board_detect = 0;
+        int ret = 1;
 
         debug_board_detect = ZOOM2_SMSC911X_GPIO;
 
@@ -138,10 +141,10 @@ static inline int omap_zoom2_debugboard_detect(void)
         gpio_direction_input(debug_board_detect);
 
         if (!gpio_get_value(debug_board_detect)) {
-                gpio_free(debug_board_detect);
-                return 0;
+                ret = 0;
         }
-        return 1;
+        gpio_free(debug_board_detect);
+        return ret;
 }
 
 static struct platform_device *zoom2_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 427b7b8b1237..324009edbd53 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -12,36 +12,217 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/input.h>
 #include <linux/gpio.h>
 #include <linux/i2c/twl4030.h>
+#include <linux/regulator/machine.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
 #include <mach/common.h>
 #include <mach/usb.h>
+#include <mach/keypad.h>
 
 #include "mmc-twl4030.h"
 
-static void __init omap_zoom2_init_irq(void)
+/* Zoom2 has Qwerty keyboard*/
+static int zoom2_twl4030_keymap[] = {
+        KEY(0, 0, KEY_E),
+        KEY(1, 0, KEY_R),
+        KEY(2, 0, KEY_T),
+        KEY(3, 0, KEY_HOME),
+        KEY(6, 0, KEY_I),
+        KEY(7, 0, KEY_LEFTSHIFT),
+        KEY(0, 1, KEY_D),
+        KEY(1, 1, KEY_F),
+        KEY(2, 1, KEY_G),
+        KEY(3, 1, KEY_SEND),
+        KEY(6, 1, KEY_K),
+        KEY(7, 1, KEY_ENTER),
+        KEY(0, 2, KEY_X),
+        KEY(1, 2, KEY_C),
+        KEY(2, 2, KEY_V),
+        KEY(3, 2, KEY_END),
+        KEY(6, 2, KEY_DOT),
+        KEY(7, 2, KEY_CAPSLOCK),
+        KEY(0, 3, KEY_Z),
+        KEY(1, 3, KEY_KPPLUS),
+        KEY(2, 3, KEY_B),
+        KEY(3, 3, KEY_F1),
+        KEY(6, 3, KEY_O),
+        KEY(7, 3, KEY_SPACE),
+        KEY(0, 4, KEY_W),
+        KEY(1, 4, KEY_Y),
+        KEY(2, 4, KEY_U),
+        KEY(3, 4, KEY_F2),
+        KEY(4, 4, KEY_VOLUMEUP),
+        KEY(6, 4, KEY_L),
+        KEY(7, 4, KEY_LEFT),
+        KEY(0, 5, KEY_S),
+        KEY(1, 5, KEY_H),
+        KEY(2, 5, KEY_J),
+        KEY(3, 5, KEY_F3),
+        KEY(5, 5, KEY_VOLUMEDOWN),
+        KEY(6, 5, KEY_M),
+        KEY(4, 5, KEY_ENTER),
+        KEY(7, 5, KEY_RIGHT),
+        KEY(0, 6, KEY_Q),
+        KEY(1, 6, KEY_A),
+        KEY(2, 6, KEY_N),
+        KEY(3, 6, KEY_BACKSPACE),
+        KEY(6, 6, KEY_P),
+        KEY(7, 6, KEY_UP),
+        KEY(6, 7, KEY_SELECT),
+        KEY(7, 7, KEY_DOWN),
+        KEY(0, 7, KEY_PROG1),   /*MACRO 1 <User defined> */
+        KEY(1, 7, KEY_PROG2),   /*MACRO 2 <User defined> */
+        KEY(2, 7, KEY_PROG3),   /*MACRO 3 <User defined> */
+        KEY(3, 7, KEY_PROG4),   /*MACRO 4 <User defined> */
+        0
+};
+
+static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
+        .rows           = 8,
+        .cols           = 8,
+        .keymap         = zoom2_twl4030_keymap,
+        .keymapsize     = ARRAY_SIZE(zoom2_twl4030_keymap),
+        .rep            = 1,
+};
+
+static struct omap_board_config_kernel zoom2_config[] __initdata = {
+};
+
+static struct regulator_consumer_supply zoom2_vmmc1_supply = {
+        .supply         = "vmmc",
+};
+
+static struct regulator_consumer_supply zoom2_vsim_supply = {
+        .supply         = "vmmc_aux",
+};
+
+static struct regulator_consumer_supply zoom2_vmmc2_supply = {
+        .supply         = "vmmc",
+};
+
+/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
+static struct regulator_init_data zoom2_vmmc1 = {
+        .constraints = {
+                .min_uV                 = 1850000,
+                .max_uV                 = 3150000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &zoom2_vmmc1_supply,
+};
+
+/* VMMC2 for MMC2 card */
+static struct regulator_init_data zoom2_vmmc2 = {
+        .constraints = {
+                .min_uV                 = 1850000,
+                .max_uV                 = 1850000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &zoom2_vmmc2_supply,
+};
+
+/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
+static struct regulator_init_data zoom2_vsim = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 3000000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &zoom2_vsim_supply,
+};
+
+static struct twl4030_hsmmc_info mmc[] __initdata = {
+        {
+                .mmc            = 1,
+                .wires          = 4,
+                .gpio_wp        = -EINVAL,
+        },
+        {
+                .mmc            = 2,
+                .wires          = 4,
+                .gpio_wp        = -EINVAL,
+        },
+        {}      /* Terminator */
+};
+
+static int zoom2_twl_gpio_setup(struct device *dev,
+                unsigned gpio, unsigned ngpio)
 {
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
+        /* gpio + 0 is "mmc0_cd" (input/IRQ),
+         * gpio + 1 is "mmc1_cd" (input/IRQ)
+         */
+        mmc[0].gpio_cd = gpio + 0;
+        mmc[1].gpio_cd = gpio + 1;
+        twl4030_mmc_init(mmc);
+
+        /* link regulators to MMC adapters ... we "know" the
+         * regulators will be set up only *after* we return.
+        */
+        zoom2_vmmc1_supply.dev = mmc[0].dev;
+        zoom2_vsim_supply.dev = mmc[0].dev;
+        zoom2_vmmc2_supply.dev = mmc[1].dev;
+
+        return 0;
 }
 
-static struct omap_uart_config zoom2_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
+
+static int zoom2_batt_table[] = {
+/* 0 C*/
+30800, 29500, 28300, 27100,
+26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
+17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
+11600, 11200, 10800, 10400, 10000, 9630,  9280,  8950,  8620,  8310,
+8020,  7730,  7460,  7200,  6950,  6710,  6470,  6250,  6040,  5830,
+5640,  5450,  5260,  5090,  4920,  4760,  4600,  4450,  4310,  4170,
+4040,  3910,  3790,  3670,  3550
 };
 
-static struct omap_board_config_kernel zoom2_config[] __initdata = {
-        { OMAP_TAG_UART,        &zoom2_uart_config },
+static struct twl4030_bci_platform_data zoom2_bci_data = {
+        .battery_tmp_tbl        = zoom2_batt_table,
+        .tblsize                = ARRAY_SIZE(zoom2_batt_table),
 };
 
+static struct twl4030_usb_data zoom2_usb_data = {
+        .usb_mode       = T2_USB_MODE_ULPI,
+};
+
+static void __init omap_zoom2_init_irq(void)
+{
+        omap_board_config = zoom2_config;
+        omap_board_config_size = ARRAY_SIZE(zoom2_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static struct twl4030_gpio_platform_data zoom2_gpio_data = {
         .gpio_base      = OMAP_MAX_GPIO_LINES,
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
         .irq_end        = TWL4030_GPIO_IRQ_END,
+        .setup          = zoom2_twl_gpio_setup,
+};
+
+static struct twl4030_madc_platform_data zoom2_madc_data = {
+        .irq_line       = 1,
 };
 
 static struct twl4030_platform_data zoom2_twldata = {
@@ -49,7 +230,15 @@ static struct twl4030_platform_data zoom2_twldata = {
         .irq_end        = TWL4030_IRQ_END,
 
         /* platform_data for children goes here */
+        .bci            = &zoom2_bci_data,
+        .madc           = &zoom2_madc_data,
+        .usb            = &zoom2_usb_data,
         .gpio           = &zoom2_gpio_data,
+        .keypad         = &zoom2_kp_twl4030_data,
+        .vmmc1          = &zoom2_vmmc1,
+        .vmmc2          = &zoom2_vmmc2,
+        .vsim           = &zoom2_vsim,
+
 };
 
 static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = {
@@ -70,26 +259,13 @@ static int __init omap_i2c_init(void)
         return 0;
 }
 
-static struct twl4030_hsmmc_info mmc[] __initdata = {
-        {
-                .mmc            = 1,
-                .wires          = 4,
-                .gpio_cd        = -EINVAL,
-                .gpio_wp        = -EINVAL,
-        },
-        {}      /* Terminator */
-};
-
 extern int __init omap_zoom2_debugboard_init(void);
 
 static void __init omap_zoom2_init(void)
 {
         omap_i2c_init();
-        omap_board_config = zoom2_config;
-        omap_board_config_size = ARRAY_SIZE(zoom2_config);
         omap_serial_init();
         omap_zoom2_debugboard_init();
-        twl4030_mmc_init(mmc);
         usb_musb_init();
 }
 
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 456e2ad5f621..f2a92d614f0f 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk)
                 omap2_clk_disable(clk);
         } else
                 _omap2_clk_disable(clk);
+        if (clk->clkdm != NULL)
+                pwrdm_clkdm_state_switch(clk->clkdm);
 }
 #endif
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index cd7819cc0c9e..fafcd32e6907 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -27,6 +27,7 @@
 #include <linux/limits.h>
 #include <linux/bitops.h>
 
+#include <mach/cpu.h>
 #include <mach/clock.h>
 #include <mach/sram.h>
 #include <asm/div64.h>
@@ -1067,17 +1068,17 @@ static int __init omap2_clk_arch_init(void)
                 return -EINVAL;
 
         /* REVISIT: not yet ready for 343x */
-#if 0
-        if (clk_set_rate(&virt_prcm_set, mpurate))
-                printk(KERN_ERR "Could not find matching MPU rate\n");
-#endif
+        if (clk_set_rate(&dpll1_ck, mpurate))
+                printk(KERN_ERR "*** Unable to set MPU rate\n");
 
         recalculate_root_clocks();
 
-        printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
+        printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
                "%ld.%01ld/%ld/%ld MHz\n",
-               (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-               (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+               (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
+               (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
+
+        calibrate_delay();
 
         return 0;
 }
@@ -1136,7 +1137,7 @@ int __init omap2_clk_init(void)
 
         recalculate_root_clocks();
 
-        printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
+        printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
                "%ld.%01ld/%ld/%ld MHz\n",
                (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
                (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 57cc2725b923..c8119781e00a 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1020,6 +1020,7 @@ static struct clk arm_fck = {
         .clksel_reg     = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
         .clksel_mask    = OMAP3430_ST_MPU_CLK_MASK,
         .clksel         = arm_fck_clksel,
+        .clkdm_name     = "mpu_clkdm",
         .recalc         = &omap2_clksel_recalc,
 };
 
@@ -1155,7 +1156,6 @@ static struct clk gfx_cg1_ck = {
         .name           = "gfx_cg1_ck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &gfx_l3_fck, /* REVISIT: correct? */
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES1_EN_2D_SHIFT,
         .clkdm_name     = "gfx_3430es1_clkdm",
@@ -1166,7 +1166,6 @@ static struct clk gfx_cg2_ck = {
         .name           = "gfx_cg2_ck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &gfx_l3_fck, /* REVISIT: correct? */
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES1_EN_3D_SHIFT,
         .clkdm_name     = "gfx_3430es1_clkdm",
@@ -1210,7 +1209,6 @@ static struct clk sgx_ick = {
         .name           = "sgx_ick",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &l3_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT,
         .clkdm_name     = "sgx_clkdm",
@@ -1223,7 +1221,6 @@ static struct clk d2d_26m_fck = {
         .name           = "d2d_26m_fck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &sys_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430ES1_EN_D2D_SHIFT,
         .clkdm_name     = "d2d_clkdm",
@@ -1234,7 +1231,6 @@ static struct clk modem_fck = {
         .name           = "modem_fck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &sys_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430_EN_MODEM_SHIFT,
         .clkdm_name     = "d2d_clkdm",
@@ -1622,7 +1618,6 @@ static struct clk core_l3_ick = {
         .name           = "core_l3_ick",
         .ops            = &clkops_null,
         .parent         = &l3_ick,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "core_l3_clkdm",
         .recalc         = &followparent_recalc,
 };
@@ -1691,7 +1686,6 @@ static struct clk core_l4_ick = {
         .name           = "core_l4_ick",
         .ops            = &clkops_null,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "core_l4_clkdm",
         .recalc         = &followparent_recalc,
 };
@@ -2089,7 +2083,6 @@ static struct clk dss_tv_fck = {
         .name           = "dss_tv_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &omap_54m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_TV_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2100,7 +2093,6 @@ static struct clk dss_96m_fck = {
         .name           = "dss_96m_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &omap_96m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_TV_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2111,7 +2103,6 @@ static struct clk dss2_alwon_fck = {
         .name           = "dss2_alwon_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &sys_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_DSS2_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2123,7 +2114,6 @@ static struct clk dss_ick_3430es1 = {
         .name           = "dss_ick",
         .ops            = &clkops_omap2_dflt,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2135,7 +2125,6 @@ static struct clk dss_ick_3430es2 = {
         .name           = "dss_ick",
         .ops            = &clkops_omap3430es2_dss_usbhost_wait,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2159,7 +2148,6 @@ static struct clk cam_ick = {
         .name           = "cam_ick",
         .ops            = &clkops_omap2_dflt,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430_EN_CAM_SHIFT,
         .clkdm_name     = "cam_clkdm",
@@ -2170,7 +2158,6 @@ static struct clk csi2_96m_fck = {
         .name           = "csi2_96m_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &core_96m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_CSI2_SHIFT,
         .clkdm_name     = "cam_clkdm",
@@ -2183,7 +2170,6 @@ static struct clk usbhost_120m_fck = {
         .name           = "usbhost_120m_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &dpll5_m2_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES2_EN_USBHOST2_SHIFT,
         .clkdm_name     = "usbhost_clkdm",
@@ -2194,7 +2180,6 @@ static struct clk usbhost_48m_fck = {
         .name           = "usbhost_48m_fck",
         .ops            = &clkops_omap3430es2_dss_usbhost_wait,
         .parent         = &omap_48m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES2_EN_USBHOST1_SHIFT,
         .clkdm_name     = "usbhost_clkdm",
@@ -2206,7 +2191,6 @@ static struct clk usbhost_ick = {
         .name           = "usbhost_ick",
         .ops            = &clkops_omap3430es2_dss_usbhost_wait,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430ES2_EN_USBHOST_SHIFT,
         .clkdm_name     = "usbhost_clkdm",
@@ -2268,7 +2252,6 @@ static struct clk gpt1_fck = {
 static struct clk wkup_32k_fck = {
         .name           = "wkup_32k_fck",
         .ops            = &clkops_null,
-        .init           = &omap2_init_clk_clkdm,
         .parent         = &omap_32k_fck,
         .clkdm_name     = "wkup_clkdm",
         .recalc         = &followparent_recalc,
@@ -2383,7 +2366,6 @@ static struct clk per_96m_fck = {
         .name           = "per_96m_fck",
         .ops            = &clkops_null,
         .parent         = &omap_96m_alwon_fck,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "per_clkdm",
         .recalc         = &followparent_recalc,
 };
@@ -2392,7 +2374,6 @@ static struct clk per_48m_fck = {
         .name           = "per_48m_fck",
         .ops            = &clkops_null,
         .parent         = &omap_48m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "per_clkdm",
         .recalc         = &followparent_recalc,
 };
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 0e7d501865b6..4ef7b4f5474e 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -299,7 +299,8 @@ struct clockdomain *clkdm_lookup(const char *name)
  * anything else to indicate failure; or -EINVAL if the function pointer
  * is null.
  */
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+                        void *user)
 {
         struct clockdomain *clkdm;
         int ret = 0;
@@ -309,7 +310,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
 
         mutex_lock(&clkdm_mutex);
         list_for_each_entry(clkdm, &clkdm_list, node) {
-                ret = (*fn)(clkdm);
+                ret = (*fn)(clkdm, user);
                 if (ret)
                         break;
         }
@@ -484,6 +485,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
                             v << __ffs(clkdm->clktrctrl_mask),
                             clkdm->pwrdm.ptr->prcm_offs,
                             CM_CLKSTCTRL);
+
+        pwrdm_clkdm_state_switch(clkdm);
 }
 
 /**
@@ -572,6 +575,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
                 omap2_clkdm_wakeup(clkdm);
 
         pwrdm_wait_transition(clkdm->pwrdm.ptr);
+        pwrdm_clkdm_state_switch(clkdm);
 
         return 0;
 }
@@ -624,6 +628,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
         else
                 omap2_clkdm_sleep(clkdm);
 
+        pwrdm_clkdm_state_switch(clkdm);
+
         return 0;
 }
 
diff --git a/arch/arm/mach-omap2/cm.c b/arch/arm/mach-omap2/cm.c
new file mode 100644
index 000000000000..8eb2dab8c7db
--- /dev/null
+++ b/arch/arm/mach-omap2/cm.c
@@ -0,0 +1,70 @@
+/*
+ * OMAP2/3 CM module functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <asm/atomic.h>
+
+#include "cm.h"
+#include "cm-regbits-24xx.h"
+#include "cm-regbits-34xx.h"
+
+/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
+#define MAX_MODULE_READY_TIME           20000
+
+static const u8 cm_idlest_offs[] = {
+        CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
+};
+
+/**
+ * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset
+ * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * XXX document
+ */
+int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+{
+        int ena = 0, i = 0;
+        u8 cm_idlest_reg;
+        u32 mask;
+
+        if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
+                return -EINVAL;
+
+        cm_idlest_reg = cm_idlest_offs[idlest_id - 1];
+
+        if (cpu_is_omap24xx())
+                ena = idlest_shift;
+        else if (cpu_is_omap34xx())
+                ena = 0;
+        else
+                BUG();
+
+        mask = 1 << idlest_shift;
+
+        /* XXX should be OMAP2 CM */
+        while (((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) != ena) &&
+               (i++ < MAX_MODULE_READY_TIME))
+                udelay(1);
+
+        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
+
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index f3c91a1ca391..cfd0b726ba44 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -17,11 +17,11 @@
 #include "prcm-common.h"
 
 #define OMAP2420_CM_REGADDR(module, reg)                                \
-                        IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
 #define OMAP2430_CM_REGADDR(module, reg)                                \
-                        IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
 #define OMAP34XX_CM_REGADDR(module, reg)                                \
-                        IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global CM registers
@@ -98,6 +98,10 @@ extern u32 cm_read_mod_reg(s16 module, u16 idx);
 extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);
 extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
 
+extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
+                                      u8 idlest_shift);
+extern int omap4_cm_wait_module_ready(u32 prcm_mod, u8 prcm_dev_offs);
+
 static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
 {
         return cm_rmw_mod_reg_bits(bits, bits, module, idx);
diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c
new file mode 100644
index 000000000000..e4ebd6d53135
--- /dev/null
+++ b/arch/arm/mach-omap2/cm4xxx.c
@@ -0,0 +1,68 @@
+/*
+ * OMAP4 CM module functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <asm/atomic.h>
+
+#include "cm.h"
+#include "cm-regbits-4xxx.h"
+
+/* XXX move this to cm.h */
+/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
+#define MAX_MODULE_READY_TIME                   20000
+
+/*
+ * OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK: isolates the IDLEST field in the
+ * CM_CLKCTRL register.
+ */
+#define OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK       (0x2 << 16)
+
+/*
+ * OMAP4 prcm_mod u32 fields contain packed data: the CM ID in bit 16 and
+ * the PRCM module offset address (from the CM module base) in bits 15-0.
+ */
+#define OMAP4_PRCM_MOD_CM_ID_SHIFT              16
+#define OMAP4_PRCM_MOD_OFFS_MASK                0xffff
+
+/**
+ * omap4_cm_wait_idlest_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset (XXX example)
+ * @prcm_dev_offs: PRCM device offset (e.g. MCASP XXX example)
+ *
+ * XXX document
+ */
+int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs)
+{
+        int i = 0;
+        u8 cm_id;
+        u16 prcm_mod_offs;
+        u32 mask = OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK;
+
+        cm_id = prcm_mod >> OMAP4_PRCM_MOD_CM_ID_SHIFT;
+        prcm_mod_offs = prcm_mod & OMAP4_PRCM_MOD_OFFS_MASK;
+
+        while (((omap4_cm_read_mod_reg(cm_id, prcm_mod_offs, prcm_dev_offs,
+                                       OMAP4_CM_CLKCTRL_DREG) & mask) != 0) &&
+               (i++ < MAX_MODULE_READY_TIME))
+                udelay(1);
+
+        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
+
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 894cc355818a..bcfcfc7fdb9b 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -257,6 +257,11 @@ static inline void omap_init_sti(void) {}
 #define OMAP2_MCSPI3_BASE               0x480b8000
 #define OMAP2_MCSPI4_BASE               0x480ba000
 
+#define OMAP4_MCSPI1_BASE               0x48098100
+#define OMAP4_MCSPI2_BASE               0x4809a100
+#define OMAP4_MCSPI3_BASE               0x480b8100
+#define OMAP4_MCSPI4_BASE               0x480ba100
+
 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
         .num_cs         = 4,
 };
@@ -301,7 +306,8 @@ static struct platform_device omap2_mcspi2 = {
         },
 };
 
-#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
+        defined(CONFIG_ARCH_OMAP4)
 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
         .num_cs         = 2,
 };
@@ -325,7 +331,7 @@ static struct platform_device omap2_mcspi3 = {
 };
 #endif
 
-#ifdef CONFIG_ARCH_OMAP3
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
         .num_cs         = 1,
 };
@@ -351,14 +357,25 @@ static struct platform_device omap2_mcspi4 = {
 
 static void omap_init_mcspi(void)
 {
+        if (cpu_is_omap44xx()) {
+                omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
+                omap2_mcspi1_resources[0].end   = OMAP4_MCSPI1_BASE + 0xff;
+                omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
+                omap2_mcspi2_resources[0].end   = OMAP4_MCSPI2_BASE + 0xff;
+                omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
+                omap2_mcspi3_resources[0].end   = OMAP4_MCSPI3_BASE + 0xff;
+                omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
+                omap2_mcspi4_resources[0].end   = OMAP4_MCSPI4_BASE + 0xff;
+        }
         platform_device_register(&omap2_mcspi1);
         platform_device_register(&omap2_mcspi2);
-#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
-        if (cpu_is_omap2430() || cpu_is_omap343x())
+#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
+        defined(CONFIG_ARCH_OMAP4)
+        if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
                 platform_device_register(&omap2_mcspi3);
 #endif
-#ifdef CONFIG_ARCH_OMAP3
-        if (cpu_is_omap343x())
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
+        if (cpu_is_omap343x() || cpu_is_omap44xx())
                 platform_device_register(&omap2_mcspi4);
 #endif
 }
@@ -397,7 +414,7 @@ static inline void omap_init_sha1_md5(void) { }
 
 /*-------------------------------------------------------------------------*/
 
-#ifdef CONFIG_ARCH_OMAP3
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 
 #define MMCHS_SYSCONFIG                 0x0010
 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
@@ -424,8 +441,8 @@ static struct platform_device dummy_pdev = {
  **/
 static void __init omap_hsmmc_reset(void)
 {
-        u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
-                OMAP24XX_NR_MMC;
+        u32 i, nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
+                (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
 
         for (i = 0; i < nr_controllers; i++) {
                 u32 v, base = 0;
@@ -442,8 +459,21 @@ static void __init omap_hsmmc_reset(void)
                 case 2:
                         base = OMAP3_MMC3_BASE;
                         break;
+                case 3:
+                        if (!cpu_is_omap44xx())
+                                return;
+                        base = OMAP4_MMC4_BASE;
+                        break;
+                case 4:
+                        if (!cpu_is_omap44xx())
+                                return;
+                        base = OMAP4_MMC5_BASE;
+                        break;
                 }
 
+                if (cpu_is_omap44xx())
+                        base += OMAP4_MMC_REG_OFFSET;
+
                 dummy_pdev.id = i;
                 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
                 iclk = clk_get(dev, "ick");
@@ -513,6 +543,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
                 }
         }
+
+        if (cpu_is_omap3430()) {
+                if (controller_nr == 0) {
+                        omap_cfg_reg(N28_3430_MMC1_CLK);
+                        omap_cfg_reg(M27_3430_MMC1_CMD);
+                        omap_cfg_reg(N27_3430_MMC1_DAT0);
+                        if (mmc_controller->slots[0].wires == 4 ||
+                                mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(N26_3430_MMC1_DAT1);
+                                omap_cfg_reg(N25_3430_MMC1_DAT2);
+                                omap_cfg_reg(P28_3430_MMC1_DAT3);
+                        }
+                        if (mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(P27_3430_MMC1_DAT4);
+                                omap_cfg_reg(P26_3430_MMC1_DAT5);
+                                omap_cfg_reg(R27_3430_MMC1_DAT6);
+                                omap_cfg_reg(R25_3430_MMC1_DAT7);
+                        }
+                }
+                if (controller_nr == 1) {
+                        /* MMC2 */
+                        omap_cfg_reg(AE2_3430_MMC2_CLK);
+                        omap_cfg_reg(AG5_3430_MMC2_CMD);
+                        omap_cfg_reg(AH5_3430_MMC2_DAT0);
+
+                        /*
+                         * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
+                         * in the board-*.c files
+                         */
+                        if (mmc_controller->slots[0].wires == 4 ||
+                                mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(AH4_3430_MMC2_DAT1);
+                                omap_cfg_reg(AG4_3430_MMC2_DAT2);
+                                omap_cfg_reg(AF4_3430_MMC2_DAT3);
+                        }
+                }
+
+                /*
+                 * For MMC3 the pins need to be muxed in the board-*.c files
+                 */
+        }
 }
 
 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
@@ -540,11 +611,23 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
                         irq = INT_24XX_MMC2_IRQ;
                         break;
                 case 2:
-                        if (!cpu_is_omap34xx())
+                        if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
                                 return;
                         base = OMAP3_MMC3_BASE;
                         irq = INT_34XX_MMC3_IRQ;
                         break;
+                case 3:
+                        if (!cpu_is_omap44xx())
+                                return;
+                        base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
+                        irq = INT_44XX_MMC4_IRQ;
+                        break;
+                case 4:
+                        if (!cpu_is_omap44xx())
+                                return;
+                        base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
+                        irq = INT_44XX_MMC5_IRQ;
+                        break;
                 default:
                         continue;
                 }
@@ -552,8 +635,15 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
                 if (cpu_is_omap2420()) {
                         size = OMAP2420_MMC_SIZE;
                         name = "mmci-omap";
+                } else if (cpu_is_omap44xx()) {
+                        if (i < 3) {
+                                base += OMAP4_MMC_REG_OFFSET;
+                                irq += IRQ_GIC_START;
+                        }
+                        size = OMAP4_HSMMC_SIZE;
+                        name = "mmci-omap-hs";
                 } else {
-                        size = HSMMC_SIZE;
+                        size = OMAP3_HSMMC_SIZE;
                         name = "mmci-omap-hs";
                 }
                 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f91934b2b092..15876828db23 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -57,6 +57,11 @@
 #define GPMC_CHUNK_SHIFT        24              /* 16 MB */
 #define GPMC_SECTION_SHIFT      28              /* 128 MB */
 
+#define PREFETCH_FIFOTHRESHOLD  (0x40 << 8)
+#define CS_NUM_SHIFT            24
+#define ENABLE_PREFETCH         (0x1 << 7)
+#define DMA_MPU_MODE            2
+
 static struct resource  gpmc_mem_root;
 static struct resource  gpmc_cs_mem[GPMC_CS_NUM];
 static DEFINE_SPINLOCK(gpmc_mem_lock);
@@ -386,6 +391,63 @@ void gpmc_cs_free(int cs)
 }
 EXPORT_SYMBOL(gpmc_cs_free);
 
+/**
+ * gpmc_prefetch_enable - configures and starts prefetch transfer
+ * @cs: nand cs (chip select) number
+ * @dma_mode: dma mode enable (1) or disable (0)
+ * @u32_count: number of bytes to be transferred
+ * @is_write: prefetch read(0) or write post(1) mode
+ */
+int gpmc_prefetch_enable(int cs, int dma_mode,
+                                unsigned int u32_count, int is_write)
+{
+        uint32_t prefetch_config1;
+
+        if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
+                /* Set the amount of bytes to be prefetched */
+                gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
+
+                /* Set dma/mpu mode, the prefetch read / post write and
+                 * enable the engine. Set which cs is has requested for.
+                 */
+                prefetch_config1 = ((cs << CS_NUM_SHIFT) |
+                                        PREFETCH_FIFOTHRESHOLD |
+                                        ENABLE_PREFETCH |
+                                        (dma_mode << DMA_MPU_MODE) |
+                                        (0x1 & is_write));
+                gpmc_write_reg(GPMC_PREFETCH_CONFIG1, prefetch_config1);
+        } else {
+                return -EBUSY;
+        }
+        /*  Start the prefetch engine */
+        gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
+
+        return 0;
+}
+EXPORT_SYMBOL(gpmc_prefetch_enable);
+
+/**
+ * gpmc_prefetch_reset - disables and stops the prefetch engine
+ */
+void gpmc_prefetch_reset(void)
+{
+        /* Stop the PFPW engine */
+        gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0);
+
+        /* Reset/disable the PFPW engine */
+        gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0);
+}
+EXPORT_SYMBOL(gpmc_prefetch_reset);
+
+/**
+ * gpmc_prefetch_status - reads prefetch status of engine
+ */
+int  gpmc_prefetch_status(void)
+{
+        return gpmc_read_reg(GPMC_PREFETCH_STATUS);
+}
+EXPORT_SYMBOL(gpmc_prefetch_status);
+
 static void __init gpmc_mem_init(void)
 {
         int cs;
@@ -452,6 +514,5 @@ void __init gpmc_init(void)
         l &= 0x03 << 3;
         l |= (0x02 << 3) | (1 << 0);
         gpmc_write_reg(GPMC_SYSCONFIG, l);
-
         gpmc_mem_init();
 }
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e9b9bcb19b4e..7574b6f20e8e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -32,17 +32,23 @@
 #include <mach/sram.h>
 #include <mach/sdrc.h>
 #include <mach/gpmc.h>
+#include <mach/serial.h>
 
 #ifndef CONFIG_ARCH_OMAP4       /* FIXME: Remove this once clkdev is ready */
 #include "clock.h"
 
+#include <mach/omap-pm.h>
 #include <mach/powerdomain.h>
-
 #include "powerdomains.h"
 
 #include <mach/clockdomain.h>
 #include "clockdomains.h"
 #endif
+#include <mach/omap_hwmod.h>
+#include "omap_hwmod_2420.h"
+#include "omap_hwmod_2430.h"
+#include "omap_hwmod_34xx.h"
+
 /*
  * The machine specific code may provide the extra mapping besides the
  * default mapping provided here.
@@ -279,11 +285,26 @@ static int __init _omap2_init_reprogram_sdrc(void)
 void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
                                  struct omap_sdrc_params *sdrc_cs1)
 {
+        struct omap_hwmod **hwmods = NULL;
+
+        if (cpu_is_omap2420())
+                hwmods = omap2420_hwmods;
+        else if (cpu_is_omap2430())
+                hwmods = omap2430_hwmods;
+        else if (cpu_is_omap34xx())
+                hwmods = omap34xx_hwmods;
+
+        omap_hwmod_init(hwmods);
         omap2_mux_init();
 #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
+        /* The OPP tables have to be registered before a clk init */
+        omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
         pwrdm_init(powerdomains_omap);
         clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
         omap2_clk_init();
+        omap_serial_early_init();
+        omap_hwmod_late_init();
+        omap_pm_if_init();
         omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
         _omap2_init_reprogram_sdrc();
 #endif
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 015f22a53ead..2d9b5cc981cd 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -217,10 +217,19 @@ static ssize_t omap2_dump_cr(struct iommu *obj, struct cr_regs *cr, char *buf)
 }
 
 #define pr_reg(name)                                                    \
-        p += sprintf(p, "%20s: %08x\n",                                 \
-                     __stringify(name), iommu_read_reg(obj, MMU_##name));
-
-static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf)
+        do {                                                            \
+                ssize_t bytes;                                          \
+                const char *str = "%20s: %08x\n";                       \
+                const int maxcol = 32;                                  \
+                bytes = snprintf(p, maxcol, str, __stringify(name),     \
+                                 iommu_read_reg(obj, MMU_##name));      \
+                p += bytes;                                             \
+                len -= bytes;                                           \
+                if (len < maxcol)                                       \
+                        goto out;                                       \
+        } while (0)
+
+static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len)
 {
         char *p = buf;
 
@@ -242,7 +251,7 @@ static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf)
         pr_reg(READ_CAM);
         pr_reg(READ_RAM);
         pr_reg(EMU_FAULT_AD);
-
+out:
         return p - buf;
 }
 
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c
index 3c04c2f1b23f..c9c59a2db4e2 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -198,6 +198,18 @@ static int twl_mmc_resume(struct device *dev, int slot)
 #define twl_mmc_resume  NULL
 #endif
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
+
+static int twl4030_mmc_get_context_loss(struct device *dev)
+{
+        /* FIXME: PM DPS not implemented yet */
+        return 0;
+}
+
+#else
+#define twl4030_mmc_get_context_loss NULL
+#endif
+
 static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
                                 int vdd)
 {
@@ -328,6 +340,61 @@ static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int v
         return ret;
 }
 
+static int twl_mmc1_set_sleep(struct device *dev, int slot, int sleep, int vdd,
+                              int cardsleep)
+{
+        struct twl_mmc_controller *c = &hsmmc[0];
+        int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
+
+        return regulator_set_mode(c->vcc, mode);
+}
+
+static int twl_mmc23_set_sleep(struct device *dev, int slot, int sleep, int vdd,
+                               int cardsleep)
+{
+        struct twl_mmc_controller *c = NULL;
+        struct omap_mmc_platform_data *mmc = dev->platform_data;
+        int i, err, mode;
+
+        for (i = 1; i < ARRAY_SIZE(hsmmc); i++) {
+                if (mmc == hsmmc[i].mmc) {
+                        c = &hsmmc[i];
+                        break;
+                }
+        }
+
+        if (c == NULL)
+                return -ENODEV;
+
+        /*
+         * If we don't see a Vcc regulator, assume it's a fixed
+         * voltage always-on regulator.
+         */
+        if (!c->vcc)
+                return 0;
+
+        mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
+
+        if (!c->vcc_aux)
+                return regulator_set_mode(c->vcc, mode);
+
+        if (cardsleep) {
+                /* VCC can be turned off if card is asleep */
+                struct regulator *vcc_aux = c->vcc_aux;
+
+                c->vcc_aux = NULL;
+                if (sleep)
+                        err = twl_mmc23_set_power(dev, slot, 0, 0);
+                else
+                        err = twl_mmc23_set_power(dev, slot, 1, vdd);
+                c->vcc_aux = vcc_aux;
+        } else
+                err = regulator_set_mode(c->vcc, mode);
+        if (err)
+                return err;
+        return regulator_set_mode(c->vcc_aux, mode);
+}
+
 static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
 
 void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
@@ -390,6 +457,9 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
                 } else
                         mmc->slots[0].switch_pin = -EINVAL;
 
+                mmc->get_context_loss_count =
+                                twl4030_mmc_get_context_loss;
+
                 /* write protect normally uses an OMAP gpio */
                 if (gpio_is_valid(c->gpio_wp)) {
                         gpio_request(c->gpio_wp, "mmc_wp");
@@ -400,6 +470,12 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
                 } else
                         mmc->slots[0].gpio_wp = -EINVAL;
 
+                if (c->nonremovable)
+                        mmc->slots[0].nonremovable = 1;
+
+                if (c->power_saving)
+                        mmc->slots[0].power_saving = 1;
+
                 /* NOTE:  MMC slots should have a Vcc regulator set up.
                  * This may be from a TWL4030-family chip, another
                  * controllable regulator, or a fixed supply.
@@ -412,6 +488,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
                 case 1:
                         /* on-chip level shifting via PBIAS0/PBIAS1 */
                         mmc->slots[0].set_power = twl_mmc1_set_power;
+                        mmc->slots[0].set_sleep = twl_mmc1_set_sleep;
                         break;
                 case 2:
                         if (c->ext_clock)
@@ -422,6 +499,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
                 case 3:
                         /* off-chip level shifting, or none */
                         mmc->slots[0].set_power = twl_mmc23_set_power;
+                        mmc->slots[0].set_sleep = twl_mmc23_set_sleep;
                         break;
                 default:
                         pr_err("MMC%d configuration not supported!\n", c->mmc);
diff --git a/arch/arm/mach-omap2/mmc-twl4030.h b/arch/arm/mach-omap2/mmc-twl4030.h
index 3807c45c9a6c..a47e68563fb6 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.h
+++ b/arch/arm/mach-omap2/mmc-twl4030.h
@@ -12,6 +12,8 @@ struct twl4030_hsmmc_info {
         bool    transceiver;    /* MMC-2 option */
         bool    ext_clock;      /* use external pin for input clock */
         bool    cover_only;     /* No card detect - just cover switch */
+        bool    nonremovable;   /* Nonremovable e.g. eMMC */
+        bool    power_saving;   /* Try to sleep or power off when possible */
         int     gpio_cd;        /* or -EINVAL */
         int     gpio_wp;        /* or -EINVAL */
         char    *name;          /* or NULL for default */
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 43d6b92b65f2..2daa595aaff4 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -492,6 +492,61 @@ MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
 MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
+
+/* MMC1 */
+MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC2 */
+MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC3 */
+MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0,
+                OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* SYS_NIRQ T2 INT1 */
+MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
+                OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
+                OMAP34XX_MUX_MODE0)
 };
 
 #define OMAP34XX_PINS_SZ        ARRAY_SIZE(omap34xx_pins)
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 8fe8d230f21b..48ee295db275 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          * for us: do so
          */
 
-        gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+        gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
 
         /*
          * Synchronise with the boot thread.
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
new file mode 100644
index 000000000000..d2e0f1c95961
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -0,0 +1,1554 @@
+/*
+ * omap_hwmod implementation for OMAP2/3/4
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ * With fixes and testing from Kevin Hilman
+ *
+ * Created in collaboration with (alphabetical order): Benoit Cousson,
+ * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
+ * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This code manages "OMAP modules" (on-chip devices) and their
+ * integration with Linux device driver and bus code.
+ *
+ * References:
+ * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
+ * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
+ * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
+ * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
+ * - Open Core Protocol Specification 2.2
+ *
+ * To do:
+ * - pin mux handling
+ * - handle IO mapping
+ * - bus throughput & module latency measurement code
+ *
+ * XXX add tests at the beginning of each function to ensure the hwmod is
+ * in the appropriate state
+ * XXX error return values should be checked to ensure that they are
+ * appropriate
+ */
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/bootmem.h>
+
+#include <mach/cpu.h>
+#include <mach/clockdomain.h>
+#include <mach/powerdomain.h>
+#include <mach/clock.h>
+#include <mach/omap_hwmod.h>
+
+#include "cm.h"
+
+/* Maximum microseconds to wait for OMAP module to reset */
+#define MAX_MODULE_RESET_WAIT           10000
+
+/* Name of the OMAP hwmod for the MPU */
+#define MPU_INITIATOR_NAME              "mpu_hwmod"
+
+/* omap_hwmod_list contains all registered struct omap_hwmods */
+static LIST_HEAD(omap_hwmod_list);
+
+static DEFINE_MUTEX(omap_hwmod_mutex);
+
+/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
+static struct omap_hwmod *mpu_oh;
+
+/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
+static u8 inited;
+
+
+/* Private functions */
+
+/**
+ * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
+ * @oh: struct omap_hwmod *
+ *
+ * Load the current value of the hwmod OCP_SYSCONFIG register into the
+ * struct omap_hwmod for later use.  Returns -EINVAL if the hwmod has no
+ * OCP_SYSCONFIG register or 0 upon success.
+ */
+static int _update_sysc_cache(struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig) {
+                WARN(!oh->sysconfig, "omap_hwmod: %s: cannot read "
+                     "OCP_SYSCONFIG: not defined on hwmod\n", oh->name);
+                return -EINVAL;
+        }
+
+        /* XXX ensure module interface clock is up */
+
+        oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
+
+        oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
+
+        return 0;
+}
+
+/**
+ * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
+ * @v: OCP_SYSCONFIG value to write
+ * @oh: struct omap_hwmod *
+ *
+ * Write @v into the module OCP_SYSCONFIG register, if it has one.  No
+ * return value.
+ */
+static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig) {
+                WARN(!oh->sysconfig, "omap_hwmod: %s: cannot write "
+                     "OCP_SYSCONFIG: not defined on hwmod\n", oh->name);
+                return;
+        }
+
+        /* XXX ensure module interface clock is up */
+
+        if (oh->_sysc_cache != v) {
+                oh->_sysc_cache = v;
+                omap_hwmod_writel(v, oh, oh->sysconfig->sysc_offs);
+        }
+}
+
+/**
+ * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
+ * @oh: struct omap_hwmod *
+ * @standbymode: MIDLEMODE field bits
+ * @v: pointer to register contents to modify
+ *
+ * Update the master standby mode bits in @v to be @standbymode for
+ * the @oh hwmod.  Does not write to the hardware.  Returns -EINVAL
+ * upon error or 0 upon success.
+ */
+static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
+                                   u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE))
+                return -EINVAL;
+
+        *v &= ~SYSC_MIDLEMODE_MASK;
+        *v |= __ffs(standbymode) << SYSC_MIDLEMODE_SHIFT;
+
+        return 0;
+}
+
+/**
+ * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
+ * @oh: struct omap_hwmod *
+ * @idlemode: SIDLEMODE field bits
+ * @v: pointer to register contents to modify
+ *
+ * Update the slave idle mode bits in @v to be @idlemode for the @oh
+ * hwmod.  Does not write to the hardware.  Returns -EINVAL upon error
+ * or 0 upon success.
+ */
+static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE))
+                return -EINVAL;
+
+        *v &= ~SYSC_SIDLEMODE_MASK;
+        *v |= __ffs(idlemode) << SYSC_SIDLEMODE_SHIFT;
+
+        return 0;
+}
+
+/**
+ * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
+ * @oh: struct omap_hwmod *
+ * @clockact: CLOCKACTIVITY field bits
+ * @v: pointer to register contents to modify
+ *
+ * Update the clockactivity mode bits in @v to be @clockact for the
+ * @oh hwmod.  Used for additional powersaving on some modules.  Does
+ * not write to the hardware.  Returns -EINVAL upon error or 0 upon
+ * success.
+ */
+static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
+                return -EINVAL;
+
+        *v &= ~SYSC_CLOCKACTIVITY_MASK;
+        *v |= clockact << SYSC_CLOCKACTIVITY_SHIFT;
+
+        return 0;
+}
+
+/**
+ * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
+ * @oh: struct omap_hwmod *
+ * @v: pointer to register contents to modify
+ *
+ * Set the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
+ * error or 0 upon success.
+ */
+static int _set_softreset(struct omap_hwmod *oh, u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET))
+                return -EINVAL;
+
+        *v |= SYSC_SOFTRESET_MASK;
+
+        return 0;
+}
+
+/**
+ * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
+ * @oh: struct omap_hwmod *
+ *
+ * Allow the hardware module @oh to send wakeups.  Returns -EINVAL
+ * upon error or 0 upon success.
+ */
+static int _enable_wakeup(struct omap_hwmod *oh)
+{
+        u32 v;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        v = oh->_sysc_cache;
+        v |= SYSC_ENAWAKEUP_MASK;
+        _write_sysconfig(v, oh);
+
+        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
+
+        oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
+
+        return 0;
+}
+
+/**
+ * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
+ * @oh: struct omap_hwmod *
+ *
+ * Prevent the hardware module @oh to send wakeups.  Returns -EINVAL
+ * upon error or 0 upon success.
+ */
+static int _disable_wakeup(struct omap_hwmod *oh)
+{
+        u32 v;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        v = oh->_sysc_cache;
+        v &= ~SYSC_ENAWAKEUP_MASK;
+        _write_sysconfig(v, oh);
+
+        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
+
+        oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
+
+        return 0;
+}
+
+/**
+ * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
+ * @oh: struct omap_hwmod *
+ *
+ * Prevent the hardware module @oh from entering idle while the
+ * hardare module initiator @init_oh is active.  Useful when a module
+ * will be accessed by a particular initiator (e.g., if a module will
+ * be accessed by the IVA, there should be a sleepdep between the IVA
+ * initiator and the module).  Only applies to modules in smart-idle
+ * mode.  Returns -EINVAL upon error or passes along
+ * pwrdm_add_sleepdep() value upon success.
+ */
+static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
+{
+        if (!oh->_clk)
+                return -EINVAL;
+
+        return pwrdm_add_sleepdep(oh->_clk->clkdm->pwrdm.ptr,
+                                  init_oh->_clk->clkdm->pwrdm.ptr);
+}
+
+/**
+ * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
+ * @oh: struct omap_hwmod *
+ *
+ * Allow the hardware module @oh to enter idle while the hardare
+ * module initiator @init_oh is active.  Useful when a module will not
+ * be accessed by a particular initiator (e.g., if a module will not
+ * be accessed by the IVA, there should be no sleepdep between the IVA
+ * initiator and the module).  Only applies to modules in smart-idle
+ * mode.  Returns -EINVAL upon error or passes along
+ * pwrdm_add_sleepdep() value upon success.
+ */
+static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
+{
+        if (!oh->_clk)
+                return -EINVAL;
+
+        return pwrdm_del_sleepdep(oh->_clk->clkdm->pwrdm.ptr,
+                                  init_oh->_clk->clkdm->pwrdm.ptr);
+}
+
+/**
+ * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
+ * @oh: struct omap_hwmod *
+ *
+ * Called from _init_clocks().  Populates the @oh _clk (main
+ * functional clock pointer) if a main_clk is present.  Returns 0 on
+ * success or -EINVAL on error.
+ */
+static int _init_main_clk(struct omap_hwmod *oh)
+{
+        struct clk *c;
+        int ret = 0;
+
+        if (!oh->clkdev_con_id)
+                return 0;
+
+        c = clk_get_sys(oh->clkdev_dev_id, oh->clkdev_con_id);
+        WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get main_clk %s.%s\n",
+             oh->name, oh->clkdev_dev_id, oh->clkdev_con_id);
+        if (IS_ERR(c))
+                ret = -EINVAL;
+        oh->_clk = c;
+
+        return ret;
+}
+
+/**
+ * _init_interface_clk - get a struct clk * for the the hwmod's interface clks
+ * @oh: struct omap_hwmod *
+ *
+ * Called from _init_clocks().  Populates the @oh OCP slave interface
+ * clock pointers.  Returns 0 on success or -EINVAL on error.
+ */
+static int _init_interface_clks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        struct clk *c;
+        int i;
+        int ret = 0;
+
+        if (oh->slaves_cnt == 0)
+                return 0;
+
+        for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                if (!os->clkdev_con_id)
+                        continue;
+
+                c = clk_get_sys(os->clkdev_dev_id, os->clkdev_con_id);
+                WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get "
+                     "interface_clk %s.%s\n", oh->name,
+                     os->clkdev_dev_id, os->clkdev_con_id);
+                if (IS_ERR(c))
+                        ret = -EINVAL;
+                os->_clk = c;
+        }
+
+        return ret;
+}
+
+/**
+ * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
+ * @oh: struct omap_hwmod *
+ *
+ * Called from _init_clocks().  Populates the @oh omap_hwmod_opt_clk
+ * clock pointers.  Returns 0 on success or -EINVAL on error.
+ */
+static int _init_opt_clks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_opt_clk *oc;
+        struct clk *c;
+        int i;
+        int ret = 0;
+
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
+                c = clk_get_sys(oc->clkdev_dev_id, oc->clkdev_con_id);
+                WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get opt_clk "
+                     "%s.%s\n", oh->name, oc->clkdev_dev_id,
+                     oc->clkdev_con_id);
+                if (IS_ERR(c))
+                        ret = -EINVAL;
+                oc->_clk = c;
+        }
+
+        return ret;
+}
+
+/**
+ * _enable_clocks - enable hwmod main clock and interface clocks
+ * @oh: struct omap_hwmod *
+ *
+ * Enables all clocks necessary for register reads and writes to succeed
+ * on the hwmod @oh.  Returns 0.
+ */
+static int _enable_clocks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+
+        pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
+
+        if (oh->_clk && !IS_ERR(oh->_clk))
+                clk_enable(oh->_clk);
+
+        if (oh->slaves_cnt > 0) {
+                for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                        struct clk *c = os->_clk;
+
+                        if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
+                                clk_enable(c);
+                }
+        }
+
+        /* The opt clocks are controlled by the device driver. */
+
+        return 0;
+}
+
+/**
+ * _disable_clocks - disable hwmod main clock and interface clocks
+ * @oh: struct omap_hwmod *
+ *
+ * Disables the hwmod @oh main functional and interface clocks.  Returns 0.
+ */
+static int _disable_clocks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+
+        pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
+
+        if (oh->_clk && !IS_ERR(oh->_clk))
+                clk_disable(oh->_clk);
+
+        if (oh->slaves_cnt > 0) {
+                for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                        struct clk *c = os->_clk;
+
+                        if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
+                                clk_disable(c);
+                }
+        }
+
+        /* The opt clocks are controlled by the device driver. */
+
+        return 0;
+}
+
+/**
+ * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
+ * @oh: struct omap_hwmod *
+ *
+ * Returns the array index of the OCP slave port that the MPU
+ * addresses the device on, or -EINVAL upon error or not found.
+ */
+static int _find_mpu_port_index(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+        int found = 0;
+
+        if (!oh || oh->slaves_cnt == 0)
+                return -EINVAL;
+
+        for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                if (os->user & OCP_USER_MPU) {
+                        found = 1;
+                        break;
+                }
+        }
+
+        if (found)
+                pr_debug("omap_hwmod: %s: MPU OCP slave port ID  %d\n",
+                         oh->name, i);
+        else
+                pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
+                         oh->name);
+
+        return (found) ? i : -EINVAL;
+}
+
+/**
+ * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
+ * @oh: struct omap_hwmod *
+ *
+ * Return the virtual address of the base of the register target of
+ * device @oh, or NULL on error.
+ */
+static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
+{
+        struct omap_hwmod_ocp_if *os;
+        struct omap_hwmod_addr_space *mem;
+        int i;
+        int found = 0;
+
+        if (!oh || oh->slaves_cnt == 0)
+                return NULL;
+
+        os = *oh->slaves + index;
+
+        for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
+                if (mem->flags & ADDR_TYPE_RT) {
+                        found = 1;
+                        break;
+                }
+        }
+
+        /* XXX use ioremap() instead? */
+
+        if (found)
+                pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
+                         oh->name, OMAP2_IO_ADDRESS(mem->pa_start));
+        else
+                pr_debug("omap_hwmod: %s: no MPU register target found\n",
+                         oh->name);
+
+        return (found) ? OMAP2_IO_ADDRESS(mem->pa_start) : NULL;
+}
+
+/**
+ * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG
+ * @oh: struct omap_hwmod *
+ *
+ * If module is marked as SWSUP_SIDLE, force the module out of slave
+ * idle; otherwise, configure it for smart-idle.  If module is marked
+ * as SWSUP_MSUSPEND, force the module out of master standby;
+ * otherwise, configure it for smart-standby.  No return value.
+ */
+static void _sysc_enable(struct omap_hwmod *oh)
+{
+        u8 idlemode;
+        u32 v;
+
+        if (!oh->sysconfig)
+                return;
+
+        v = oh->_sysc_cache;
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
+                        HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
+                _set_slave_idlemode(oh, idlemode, &v);
+        }
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
+                        HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
+                _set_master_standbymode(oh, idlemode, &v);
+        }
+
+        /* XXX OCP AUTOIDLE bit? */
+
+        if (oh->flags & HWMOD_SET_DEFAULT_CLOCKACT &&
+            oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY)
+                _set_clockactivity(oh, oh->sysconfig->clockact, &v);
+
+        _write_sysconfig(v, oh);
+}
+
+/**
+ * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG
+ * @oh: struct omap_hwmod *
+ *
+ * If module is marked as SWSUP_SIDLE, force the module into slave
+ * idle; otherwise, configure it for smart-idle.  If module is marked
+ * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
+ * configure it for smart-standby.  No return value.
+ */
+static void _sysc_idle(struct omap_hwmod *oh)
+{
+        u8 idlemode;
+        u32 v;
+
+        if (!oh->sysconfig)
+                return;
+
+        v = oh->_sysc_cache;
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
+                        HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
+                _set_slave_idlemode(oh, idlemode, &v);
+        }
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
+                        HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
+                _set_master_standbymode(oh, idlemode, &v);
+        }
+
+        _write_sysconfig(v, oh);
+}
+
+/**
+ * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG
+ * @oh: struct omap_hwmod *
+ *
+ * Force the module into slave idle and master suspend. No return
+ * value.
+ */
+static void _sysc_shutdown(struct omap_hwmod *oh)
+{
+        u32 v;
+
+        if (!oh->sysconfig)
+                return;
+
+        v = oh->_sysc_cache;
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE)
+                _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE)
+                _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
+
+        /* XXX clear OCP AUTOIDLE bit? */
+
+        _write_sysconfig(v, oh);
+}
+
+/**
+ * _lookup - find an omap_hwmod by name
+ * @name: find an omap_hwmod by name
+ *
+ * Return a pointer to an omap_hwmod by name, or NULL if not found.
+ * Caller must hold omap_hwmod_mutex.
+ */
+static struct omap_hwmod *_lookup(const char *name)
+{
+        struct omap_hwmod *oh, *temp_oh;
+
+        oh = NULL;
+
+        list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
+                if (!strcmp(name, temp_oh->name)) {
+                        oh = temp_oh;
+                        break;
+                }
+        }
+
+        return oh;
+}
+
+/**
+ * _init_clocks - clk_get() all clocks associated with this hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Called by omap_hwmod_late_init() (after omap2_clk_init()).
+ * Resolves all clock names embedded in the hwmod.  Must be called
+ * with omap_hwmod_mutex held.  Returns -EINVAL if the omap_hwmod
+ * has not yet been registered or if the clocks have already been
+ * initialized, 0 on success, or a non-zero error on failure.
+ */
+static int _init_clocks(struct omap_hwmod *oh)
+{
+        int ret = 0;
+
+        if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
+                return -EINVAL;
+
+        pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
+
+        ret |= _init_main_clk(oh);
+        ret |= _init_interface_clks(oh);
+        ret |= _init_opt_clks(oh);
+
+        oh->_state = _HWMOD_STATE_CLKS_INITED;
+
+        return ret;
+}
+
+/**
+ * _wait_target_ready - wait for a module to leave slave idle
+ * @oh: struct omap_hwmod *
+ *
+ * Wait for a module @oh to leave slave idle.  Returns 0 if the module
+ * does not have an IDLEST bit or if the module successfully leaves
+ * slave idle; otherwise, pass along the return value of the
+ * appropriate *_cm_wait_module_ready() function.
+ */
+static int _wait_target_ready(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int ret;
+
+        if (!oh)
+                return -EINVAL;
+
+        if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
+                return 0;
+
+        os = *oh->slaves + oh->_mpu_port_index;
+
+        if (!(os->flags & OCPIF_HAS_IDLEST))
+                return 0;
+
+        /* XXX check module SIDLEMODE */
+
+        /* XXX check clock enable states */
+
+        if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
+                ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
+                                                 oh->prcm.omap2.idlest_reg_id,
+                                                 oh->prcm.omap2.idlest_idle_bit);
+#if 0
+        } else if (cpu_is_omap44xx()) {
+                ret = omap4_cm_wait_module_ready(oh->prcm.omap4.module_offs,
+                                                 oh->prcm.omap4.device_offs);
+#endif
+        } else {
+                BUG();
+        };
+
+        return ret;
+}
+
+/**
+ * _reset - reset an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit.  hwmod must be
+ * enabled for this to work.  Must be called with omap_hwmod_mutex
+ * held.  Returns -EINVAL if the hwmod cannot be reset this way or if
+ * the hwmod is in the wrong state, -ETIMEDOUT if the module did not
+ * reset in time, or 0 upon success.
+ */
+static int _reset(struct omap_hwmod *oh)
+{
+        u32 r, v;
+        int c;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET) ||
+            (oh->sysconfig->sysc_flags & SYSS_MISSING))
+                return -EINVAL;
+
+        /* clocks must be on for this operation */
+        if (oh->_state != _HWMOD_STATE_ENABLED) {
+                WARN(1, "omap_hwmod: %s: reset can only be entered from "
+                     "enabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: resetting\n", oh->name);
+
+        v = oh->_sysc_cache;
+        r = _set_softreset(oh, &v);
+        if (r)
+                return r;
+        _write_sysconfig(v, oh);
+
+        c = 0;
+        while (c < MAX_MODULE_RESET_WAIT &&
+               !(omap_hwmod_readl(oh, oh->sysconfig->syss_offs) &
+                 SYSS_RESETDONE_MASK)) {
+                udelay(1);
+                c++;
+        }
+
+        if (c == MAX_MODULE_RESET_WAIT)
+                WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n",
+                     oh->name, MAX_MODULE_RESET_WAIT);
+        else
+                pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, c);
+
+        /*
+         * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
+         * _wait_target_ready() or _reset()
+         */
+
+        return (c == MAX_MODULE_RESET_WAIT) ? -ETIMEDOUT : 0;
+}
+
+/**
+ * _enable - enable an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
+ * register target.  Must be called with omap_hwmod_mutex held.
+ * Returns -EINVAL if the hwmod is in the wrong state or passes along
+ * the return value of _wait_target_ready().
+ */
+static int _enable(struct omap_hwmod *oh)
+{
+        int r;
+
+        if (oh->_state != _HWMOD_STATE_INITIALIZED &&
+            oh->_state != _HWMOD_STATE_IDLE &&
+            oh->_state != _HWMOD_STATE_DISABLED) {
+                WARN(1, "omap_hwmod: %s: enabled state can only be entered "
+                     "from initialized, idle, or disabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: enabling\n", oh->name);
+
+        /* XXX mux balls */
+
+        _add_initiator_dep(oh, mpu_oh);
+        _enable_clocks(oh);
+
+        if (oh->sysconfig) {
+                if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
+                        _update_sysc_cache(oh);
+                _sysc_enable(oh);
+        }
+
+        r = _wait_target_ready(oh);
+        if (!r)
+                oh->_state = _HWMOD_STATE_ENABLED;
+
+        return r;
+}
+
+/**
+ * _idle - idle an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Idles an omap_hwmod @oh.  This should be called once the hwmod has
+ * no further work.  Returns -EINVAL if the hwmod is in the wrong
+ * state or returns 0.
+ */
+static int _idle(struct omap_hwmod *oh)
+{
+        if (oh->_state != _HWMOD_STATE_ENABLED) {
+                WARN(1, "omap_hwmod: %s: idle state can only be entered from "
+                     "enabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: idling\n", oh->name);
+
+        if (oh->sysconfig)
+                _sysc_idle(oh);
+        _del_initiator_dep(oh, mpu_oh);
+        _disable_clocks(oh);
+
+        oh->_state = _HWMOD_STATE_IDLE;
+
+        return 0;
+}
+
+/**
+ * _shutdown - shutdown an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Shut down an omap_hwmod @oh.  This should be called when the driver
+ * used for the hwmod is removed or unloaded or if the driver is not
+ * used by the system.  Returns -EINVAL if the hwmod is in the wrong
+ * state or returns 0.
+ */
+static int _shutdown(struct omap_hwmod *oh)
+{
+        if (oh->_state != _HWMOD_STATE_IDLE &&
+            oh->_state != _HWMOD_STATE_ENABLED) {
+                WARN(1, "omap_hwmod: %s: disabled state can only be entered "
+                     "from idle, or enabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: disabling\n", oh->name);
+
+        if (oh->sysconfig)
+                _sysc_shutdown(oh);
+        _del_initiator_dep(oh, mpu_oh);
+        /* XXX what about the other system initiators here? DMA, tesla, d2d */
+        _disable_clocks(oh);
+        /* XXX Should this code also force-disable the optional clocks? */
+
+        /* XXX mux any associated balls to safe mode */
+
+        oh->_state = _HWMOD_STATE_DISABLED;
+
+        return 0;
+}
+
+/**
+ * _write_clockact_lock - set the module's clockactivity bits
+ * @oh: struct omap_hwmod *
+ * @clockact: CLOCKACTIVITY field bits
+ *
+ * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
+ * OCP_SYSCONFIG register.  Returns -EINVAL if the hwmod is in the
+ * wrong state or returns 0.
+ */
+static int _write_clockact_lock(struct omap_hwmod *oh, u8 clockact)
+{
+        u32 v;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        v = oh->_sysc_cache;
+        _set_clockactivity(oh, clockact, &v);
+        _write_sysconfig(v, oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+
+/**
+ * _setup - do initial configuration of omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
+ * OCP_SYSCONFIG register.  Must be called with omap_hwmod_mutex
+ * held.  Returns -EINVAL if the hwmod is in the wrong state or returns
+ * 0.
+ */
+static int _setup(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+
+        if (!oh)
+                return -EINVAL;
+
+        /* Set iclk autoidle mode */
+        if (oh->slaves_cnt > 0) {
+                for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                        struct clk *c = os->_clk;
+
+                        if (!c || IS_ERR(c))
+                                continue;
+
+                        if (os->flags & OCPIF_SWSUP_IDLE) {
+                                /* XXX omap_iclk_deny_idle(c); */
+                        } else {
+                                /* XXX omap_iclk_allow_idle(c); */
+                                clk_enable(c);
+                        }
+                }
+        }
+
+        oh->_state = _HWMOD_STATE_INITIALIZED;
+
+        _enable(oh);
+
+        if (!(oh->flags & HWMOD_INIT_NO_RESET))
+                _reset(oh);
+
+        /* XXX OCP AUTOIDLE bit? */
+        /* XXX OCP ENAWAKEUP bit? */
+
+        if (!(oh->flags & HWMOD_INIT_NO_IDLE))
+                _idle(oh);
+
+        return 0;
+}
+
+
+
+/* Public functions */
+
+u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
+{
+        return __raw_readl(oh->_rt_va + reg_offs);
+}
+
+void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
+{
+        __raw_writel(v, oh->_rt_va + reg_offs);
+}
+
+/**
+ * omap_hwmod_register - register a struct omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Registers the omap_hwmod @oh.  Returns -EEXIST if an omap_hwmod already
+ * has been registered by the same name; -EINVAL if the omap_hwmod is in the
+ * wrong state, or 0 on success.
+ *
+ * XXX The data should be copied into bootmem, so the original data
+ * should be marked __initdata and freed after init.  This would allow
+ * unneeded omap_hwmods to be freed on multi-OMAP configurations.  Note
+ * that the copy process would be relatively complex due to the large number
+ * of substructures.
+ */
+int omap_hwmod_register(struct omap_hwmod *oh)
+{
+        int ret, ms_id;
+
+        if (!oh || (oh->_state != _HWMOD_STATE_UNKNOWN))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+
+        pr_debug("omap_hwmod: %s: registering\n", oh->name);
+
+        if (_lookup(oh->name)) {
+                ret = -EEXIST;
+                goto ohr_unlock;
+        }
+
+        ms_id = _find_mpu_port_index(oh);
+        if (!IS_ERR_VALUE(ms_id)) {
+                oh->_mpu_port_index = ms_id;
+                oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
+        } else {
+                oh->_int_flags |= _HWMOD_NO_MPU_PORT;
+        }
+
+        list_add_tail(&oh->node, &omap_hwmod_list);
+
+        oh->_state = _HWMOD_STATE_REGISTERED;
+
+        ret = 0;
+
+ohr_unlock:
+        mutex_unlock(&omap_hwmod_mutex);
+        return ret;
+}
+
+/**
+ * omap_hwmod_lookup - look up a registered omap_hwmod by name
+ * @name: name of the omap_hwmod to look up
+ *
+ * Given a @name of an omap_hwmod, return a pointer to the registered
+ * struct omap_hwmod *, or NULL upon error.
+ */
+struct omap_hwmod *omap_hwmod_lookup(const char *name)
+{
+        struct omap_hwmod *oh;
+
+        if (!name)
+                return NULL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        oh = _lookup(name);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return oh;
+}
+
+/**
+ * omap_hwmod_for_each - call function for each registered omap_hwmod
+ * @fn: pointer to a callback function
+ *
+ * Call @fn for each registered omap_hwmod, passing @data to each
+ * function.  @fn must return 0 for success or any other value for
+ * failure.  If @fn returns non-zero, the iteration across omap_hwmods
+ * will stop and the non-zero return value will be passed to the
+ * caller of omap_hwmod_for_each().  @fn is called with
+ * omap_hwmod_for_each() held.
+ */
+int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh))
+{
+        struct omap_hwmod *temp_oh;
+        int ret;
+
+        if (!fn)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
+                ret = (*fn)(temp_oh);
+                if (ret)
+                        break;
+        }
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return ret;
+}
+
+
+/**
+ * omap_hwmod_init - init omap_hwmod code and register hwmods
+ * @ohs: pointer to an array of omap_hwmods to register
+ *
+ * Intended to be called early in boot before the clock framework is
+ * initialized.  If @ohs is not null, will register all omap_hwmods
+ * listed in @ohs that are valid for this chip.  Returns -EINVAL if
+ * omap_hwmod_init() has already been called or 0 otherwise.
+ */
+int omap_hwmod_init(struct omap_hwmod **ohs)
+{
+        struct omap_hwmod *oh;
+        int r;
+
+        if (inited)
+                return -EINVAL;
+
+        inited = 1;
+
+        if (!ohs)
+                return 0;
+
+        oh = *ohs;
+        while (oh) {
+                if (omap_chip_is(oh->omap_chip)) {
+                        r = omap_hwmod_register(oh);
+                        WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
+                             "%d\n", oh->name, r);
+                }
+                oh = *++ohs;
+        }
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_late_init - do some post-clock framework initialization
+ *
+ * Must be called after omap2_clk_init().  Resolves the struct clk names
+ * to struct clk pointers for each registered omap_hwmod.  Also calls
+ * _setup() on each hwmod.  Returns 0.
+ */
+int omap_hwmod_late_init(void)
+{
+        int r;
+
+        /* XXX check return value */
+        r = omap_hwmod_for_each(_init_clocks);
+        WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
+
+        mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
+        WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
+             MPU_INITIATOR_NAME);
+
+        omap_hwmod_for_each(_setup);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_unregister - unregister an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Unregisters a previously-registered omap_hwmod @oh.  There's probably
+ * no use case for this, so it is likely to be removed in a later version.
+ *
+ * XXX Free all of the bootmem-allocated structures here when that is
+ * implemented.  Make it clear that core code is the only code that is
+ * expected to unregister modules.
+ */
+int omap_hwmod_unregister(struct omap_hwmod *oh)
+{
+        if (!oh)
+                return -EINVAL;
+
+        pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
+
+        mutex_lock(&omap_hwmod_mutex);
+        list_del(&oh->node);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_enable - enable an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Enable an omap_hwomd @oh.  Intended to be called by omap_device_enable().
+ * Returns -EINVAL on error or passes along the return value from _enable().
+ */
+int omap_hwmod_enable(struct omap_hwmod *oh)
+{
+        int r;
+
+        if (!oh)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        r = _enable(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return r;
+}
+
+/**
+ * omap_hwmod_idle - idle an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Idle an omap_hwomd @oh.  Intended to be called by omap_device_idle().
+ * Returns -EINVAL on error or passes along the return value from _idle().
+ */
+int omap_hwmod_idle(struct omap_hwmod *oh)
+{
+        if (!oh)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _idle(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_shutdown - shutdown an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Shutdown an omap_hwomd @oh.  Intended to be called by
+ * omap_device_shutdown().  Returns -EINVAL on error or passes along
+ * the return value from _shutdown().
+ */
+int omap_hwmod_shutdown(struct omap_hwmod *oh)
+{
+        if (!oh)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _shutdown(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
+ * @oh: struct omap_hwmod *oh
+ *
+ * Intended to be called by the omap_device code.
+ */
+int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
+{
+        mutex_lock(&omap_hwmod_mutex);
+        _enable_clocks(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
+ * @oh: struct omap_hwmod *oh
+ *
+ * Intended to be called by the omap_device code.
+ */
+int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
+{
+        mutex_lock(&omap_hwmod_mutex);
+        _disable_clocks(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
+ * @oh: struct omap_hwmod *oh
+ *
+ * Intended to be called by drivers and core code when all posted
+ * writes to a device must complete before continuing further
+ * execution (for example, after clearing some device IRQSTATUS
+ * register bits)
+ *
+ * XXX what about targets with multiple OCP threads?
+ */
+void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
+{
+        BUG_ON(!oh);
+
+        if (!oh->sysconfig || !oh->sysconfig->sysc_flags) {
+                WARN(1, "omap_device: %s: OCP barrier impossible due to "
+                      "device configuration\n", oh->name);
+                return;
+        }
+
+        /*
+         * Forces posted writes to complete on the OCP thread handling
+         * register writes
+         */
+        omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
+}
+
+/**
+ * omap_hwmod_reset - reset the hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Under some conditions, a driver may wish to reset the entire device.
+ * Called from omap_device code.  Returns -EINVAL on error or passes along
+ * the return value from _reset()/_enable().
+ */
+int omap_hwmod_reset(struct omap_hwmod *oh)
+{
+        int r;
+
+        if (!oh || !(oh->_state & _HWMOD_STATE_ENABLED))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        r = _reset(oh);
+        if (!r)
+                r = _enable(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return r;
+}
+
+/**
+ * omap_hwmod_count_resources - count number of struct resources needed by hwmod
+ * @oh: struct omap_hwmod *
+ * @res: pointer to the first element of an array of struct resource to fill
+ *
+ * Count the number of struct resource array elements necessary to
+ * contain omap_hwmod @oh resources.  Intended to be called by code
+ * that registers omap_devices.  Intended to be used to determine the
+ * size of a dynamically-allocated struct resource array, before
+ * calling omap_hwmod_fill_resources().  Returns the number of struct
+ * resource array elements needed.
+ *
+ * XXX This code is not optimized.  It could attempt to merge adjacent
+ * resource IDs.
+ *
+ */
+int omap_hwmod_count_resources(struct omap_hwmod *oh)
+{
+        int ret, i;
+
+        ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt;
+
+        for (i = 0; i < oh->slaves_cnt; i++)
+                ret += (*oh->slaves + i)->addr_cnt;
+
+        return ret;
+}
+
+/**
+ * omap_hwmod_fill_resources - fill struct resource array with hwmod data
+ * @oh: struct omap_hwmod *
+ * @res: pointer to the first element of an array of struct resource to fill
+ *
+ * Fill the struct resource array @res with resource data from the
+ * omap_hwmod @oh.  Intended to be called by code that registers
+ * omap_devices.  See also omap_hwmod_count_resources().  Returns the
+ * number of array elements filled.
+ */
+int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
+{
+        int i, j;
+        int r = 0;
+
+        /* For each IRQ, DMA, memory area, fill in array.*/
+
+        for (i = 0; i < oh->mpu_irqs_cnt; i++) {
+                (res + r)->start = *(oh->mpu_irqs + i);
+                (res + r)->end = *(oh->mpu_irqs + i);
+                (res + r)->flags = IORESOURCE_IRQ;
+                r++;
+        }
+
+        for (i = 0; i < oh->sdma_chs_cnt; i++) {
+                (res + r)->name = (oh->sdma_chs + i)->name;
+                (res + r)->start = (oh->sdma_chs + i)->dma_ch;
+                (res + r)->end = (oh->sdma_chs + i)->dma_ch;
+                (res + r)->flags = IORESOURCE_DMA;
+                r++;
+        }
+
+        for (i = 0; i < oh->slaves_cnt; i++) {
+                struct omap_hwmod_ocp_if *os;
+
+                os = *oh->slaves + i;
+
+                for (j = 0; j < os->addr_cnt; j++) {
+                        (res + r)->start = (os->addr + j)->pa_start;
+                        (res + r)->end = (os->addr + j)->pa_end;
+                        (res + r)->flags = IORESOURCE_MEM;
+                        r++;
+                }
+        }
+
+        return r;
+}
+
+/**
+ * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
+ * @oh: struct omap_hwmod *
+ *
+ * Return the powerdomain pointer associated with the OMAP module
+ * @oh's main clock.  If @oh does not have a main clk, return the
+ * powerdomain associated with the interface clock associated with the
+ * module's MPU port. (XXX Perhaps this should use the SDMA port
+ * instead?)  Returns NULL on error, or a struct powerdomain * on
+ * success.
+ */
+struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
+{
+        struct clk *c;
+
+        if (!oh)
+                return NULL;
+
+        if (oh->_clk) {
+                c = oh->_clk;
+        } else {
+                if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
+                        return NULL;
+                c = oh->slaves[oh->_mpu_port_index]->_clk;
+        }
+
+        return c->clkdm->pwrdm.ptr;
+
+}
+
+/**
+ * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
+ * @oh: struct omap_hwmod *
+ * @init_oh: struct omap_hwmod * (initiator)
+ *
+ * Add a sleep dependency between the initiator @init_oh and @oh.
+ * Intended to be called by DSP/Bridge code via platform_data for the
+ * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
+ * code needs to add/del initiator dependencies dynamically
+ * before/after accessing a device.  Returns the return value from
+ * _add_initiator_dep().
+ *
+ * XXX Keep a usecount in the clockdomain code
+ */
+int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh)
+{
+        return _add_initiator_dep(oh, init_oh);
+}
+
+/*
+ * XXX what about functions for drivers to save/restore ocp_sysconfig
+ * for context save/restore operations?
+ */
+
+/**
+ * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
+ * @oh: struct omap_hwmod *
+ * @init_oh: struct omap_hwmod * (initiator)
+ *
+ * Remove a sleep dependency between the initiator @init_oh and @oh.
+ * Intended to be called by DSP/Bridge code via platform_data for the
+ * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
+ * code needs to add/del initiator dependencies dynamically
+ * before/after accessing a device.  Returns the return value from
+ * _del_initiator_dep().
+ *
+ * XXX Keep a usecount in the clockdomain code
+ */
+int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh)
+{
+        return _del_initiator_dep(oh, init_oh);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to BOTH
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_both(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_BOTH);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to MAIN
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_main(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_MAIN);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to ICLK
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_ICLK);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to NONE
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_none(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_NONE);
+}
+
+/**
+ * omap_hwmod_enable_wakeup - allow device to wake up the system
+ * @oh: struct omap_hwmod *
+ *
+ * Sets the module OCP socket ENAWAKEUP bit to allow the module to
+ * send wakeups to the PRCM.  Eventually this should sets PRCM wakeup
+ * registers to cause the PRCM to receive wakeup events from the
+ * module.  Does not set any wakeup routing registers beyond this
+ * point - if the module is to wake up any other module or subsystem,
+ * that must be set separately.  Called by omap_device code.  Returns
+ * -EINVAL on error or 0 upon success.
+ */
+int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _enable_wakeup(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_disable_wakeup - prevent device from waking the system
+ * @oh: struct omap_hwmod *
+ *
+ * Clears the module OCP socket ENAWAKEUP bit to prevent the module
+ * from sending wakeups to the PRCM.  Eventually this should clear
+ * PRCM wakeup registers to cause the PRCM to ignore wakeup events
+ * from the module.  Does not set any wakeup routing registers beyond
+ * this point - if the module is to wake up any other module or
+ * subsystem, that must be set separately.  Called by omap_device
+ * code.  Returns -EINVAL on error or 0 upon success.
+ */
+int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _disable_wakeup(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420.h b/arch/arm/mach-omap2/omap_hwmod_2420.h
new file mode 100644
index 000000000000..767e4965ac4e
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2420.h
@@ -0,0 +1,141 @@
+/*
+ * omap_hwmod_2420.h - hardware modules present on the OMAP2420 chips
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX handle crossbar/shared link difference for L3?
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
+
+#ifdef CONFIG_ARCH_OMAP2420
+
+#include <mach/omap_hwmod.h>
+#include <mach/irqs.h>
+#include <mach/cpu.h>
+#include <mach/dma.h>
+
+#include "prm-regbits-24xx.h"
+
+static struct omap_hwmod omap2420_mpu_hwmod;
+static struct omap_hwmod omap2420_l3_hwmod;
+static struct omap_hwmod omap2420_l4_core_hwmod;
+
+/* L3 -> L4_CORE interface */
+static struct omap_hwmod_ocp_if omap2420_l3__l4_core = {
+        .master = &omap2420_l3_hwmod,
+        .slave  = &omap2420_l4_core_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* MPU -> L3 interface */
+static struct omap_hwmod_ocp_if omap2420_mpu__l3 = {
+        .master = &omap2420_mpu_hwmod,
+        .slave  = &omap2420_l3_hwmod,
+        .user   = OCP_USER_MPU,
+};
+
+/* Slave interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = {
+        &omap2420_mpu__l3,
+};
+
+/* Master interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = {
+        &omap2420_l3__l4_core,
+};
+
+/* L3 */
+static struct omap_hwmod omap2420_l3_hwmod = {
+        .name           = "l3_hwmod",
+        .masters        = omap2420_l3_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_l3_masters),
+        .slaves         = omap2420_l3_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2420_l3_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+static struct omap_hwmod omap2420_l4_wkup_hwmod;
+
+/* L4_CORE -> L4_WKUP interface */
+static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
+        .master = &omap2420_l4_core_hwmod,
+        .slave  = &omap2420_l4_wkup_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* Slave interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
+        &omap2420_l3__l4_core,
+};
+
+/* Master interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
+        &omap2420_l4_core__l4_wkup,
+};
+
+/* L4 CORE */
+static struct omap_hwmod omap2420_l4_core_hwmod = {
+        .name           = "l4_core_hwmod",
+        .masters        = omap2420_l4_core_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_l4_core_masters),
+        .slaves         = omap2420_l4_core_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2420_l4_core_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+/* Slave interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
+        &omap2420_l4_core__l4_wkup,
+};
+
+/* Master interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
+};
+
+/* L4 WKUP */
+static struct omap_hwmod omap2420_l4_wkup_hwmod = {
+        .name           = "l4_wkup_hwmod",
+        .masters        = omap2420_l4_wkup_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_l4_wkup_masters),
+        .slaves         = omap2420_l4_wkup_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2420_l4_wkup_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+/* Master interfaces on the MPU device */
+static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
+        &omap2420_mpu__l3,
+};
+
+/* MPU */
+static struct omap_hwmod omap2420_mpu_hwmod = {
+        .name           = "mpu_hwmod",
+        .clkdev_dev_id  = NULL,
+        .clkdev_con_id  = "mpu_ck",
+        .masters        = omap2420_mpu_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_mpu_masters),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+static __initdata struct omap_hwmod *omap2420_hwmods[] = {
+        &omap2420_l3_hwmod,
+        &omap2420_l4_core_hwmod,
+        &omap2420_l4_wkup_hwmod,
+        &omap2420_mpu_hwmod,
+        NULL,
+};
+
+#else
+# define omap2420_hwmods                0
+#endif
+
+#endif
+
+
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h
new file mode 100644
index 000000000000..a412be6420ec
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2430.h
@@ -0,0 +1,143 @@
+/*
+ * omap_hwmod_2430.h - hardware modules present on the OMAP2430 chips
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX handle crossbar/shared link difference for L3?
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
+
+#ifdef CONFIG_ARCH_OMAP2430
+
+#include <mach/omap_hwmod.h>
+#include <mach/irqs.h>
+#include <mach/cpu.h>
+#include <mach/dma.h>
+
+#include "prm-regbits-24xx.h"
+
+static struct omap_hwmod omap2430_mpu_hwmod;
+static struct omap_hwmod omap2430_l3_hwmod;
+static struct omap_hwmod omap2430_l4_core_hwmod;
+
+/* L3 -> L4_CORE interface */
+static struct omap_hwmod_ocp_if omap2430_l3__l4_core = {
+        .master = &omap2430_l3_hwmod,
+        .slave  = &omap2430_l4_core_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* MPU -> L3 interface */
+static struct omap_hwmod_ocp_if omap2430_mpu__l3 = {
+        .master = &omap2430_mpu_hwmod,
+        .slave  = &omap2430_l3_hwmod,
+        .user   = OCP_USER_MPU,
+};
+
+/* Slave interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l3_slaves[] = {
+        &omap2430_mpu__l3,
+};
+
+/* Master interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l3_masters[] = {
+        &omap2430_l3__l4_core,
+};
+
+/* L3 */
+static struct omap_hwmod omap2430_l3_hwmod = {
+        .name           = "l3_hwmod",
+        .masters        = omap2430_l3_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_l3_masters),
+        .slaves         = omap2430_l3_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2430_l3_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+static struct omap_hwmod omap2430_l4_wkup_hwmod;
+static struct omap_hwmod omap2430_mmc1_hwmod;
+static struct omap_hwmod omap2430_mmc2_hwmod;
+
+/* L4_CORE -> L4_WKUP interface */
+static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
+        .master = &omap2430_l4_core_hwmod,
+        .slave  = &omap2430_l4_wkup_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* Slave interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
+        &omap2430_l3__l4_core,
+};
+
+/* Master interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
+        &omap2430_l4_core__l4_wkup,
+};
+
+/* L4 CORE */
+static struct omap_hwmod omap2430_l4_core_hwmod = {
+        .name           = "l4_core_hwmod",
+        .masters        = omap2430_l4_core_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_l4_core_masters),
+        .slaves         = omap2430_l4_core_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2430_l4_core_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+/* Slave interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
+        &omap2430_l4_core__l4_wkup,
+};
+
+/* Master interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
+};
+
+/* L4 WKUP */
+static struct omap_hwmod omap2430_l4_wkup_hwmod = {
+        .name           = "l4_wkup_hwmod",
+        .masters        = omap2430_l4_wkup_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_l4_wkup_masters),
+        .slaves         = omap2430_l4_wkup_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2430_l4_wkup_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+/* Master interfaces on the MPU device */
+static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
+        &omap2430_mpu__l3,
+};
+
+/* MPU */
+static struct omap_hwmod omap2430_mpu_hwmod = {
+        .name           = "mpu_hwmod",
+        .clkdev_dev_id  = NULL,
+        .clkdev_con_id  = "mpu_ck",
+        .masters        = omap2430_mpu_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_mpu_masters),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+static __initdata struct omap_hwmod *omap2430_hwmods[] = {
+        &omap2430_l3_hwmod,
+        &omap2430_l4_core_hwmod,
+        &omap2430_l4_wkup_hwmod,
+        &omap2430_mpu_hwmod,
+        NULL,
+};
+
+#else
+# define omap2430_hwmods                0
+#endif
+
+#endif
+
+
diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h b/arch/arm/mach-omap2/omap_hwmod_34xx.h
new file mode 100644
index 000000000000..1e069f831575
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h
@@ -0,0 +1,168 @@
+/*
+ * omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
+
+#ifdef CONFIG_ARCH_OMAP34XX
+
+#include <mach/omap_hwmod.h>
+#include <mach/irqs.h>
+#include <mach/cpu.h>
+#include <mach/dma.h>
+
+#include "prm-regbits-34xx.h"
+
+static struct omap_hwmod omap34xx_mpu_hwmod;
+static struct omap_hwmod omap34xx_l3_hwmod;
+static struct omap_hwmod omap34xx_l4_core_hwmod;
+static struct omap_hwmod omap34xx_l4_per_hwmod;
+
+/* L3 -> L4_CORE interface */
+static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = {
+        .master = &omap34xx_l3_hwmod,
+        .slave  = &omap34xx_l4_core_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L3 -> L4_PER interface */
+static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = {
+        .master = &omap34xx_l3_hwmod,
+        .slave  = &omap34xx_l4_per_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* MPU -> L3 interface */
+static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = {
+        .master = &omap34xx_mpu_hwmod,
+        .slave  = &omap34xx_l3_hwmod,
+        .user   = OCP_USER_MPU,
+};
+
+/* Slave interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = {
+        &omap34xx_mpu__l3,
+};
+
+/* Master interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = {
+        &omap34xx_l3__l4_core,
+        &omap34xx_l3__l4_per,
+};
+
+/* L3 */
+static struct omap_hwmod omap34xx_l3_hwmod = {
+        .name           = "l3_hwmod",
+        .masters        = omap34xx_l3_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l3_masters),
+        .slaves         = omap34xx_l3_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l3_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+static struct omap_hwmod omap34xx_l4_wkup_hwmod;
+
+/* L4_CORE -> L4_WKUP interface */
+static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = {
+        .master = &omap34xx_l4_core_hwmod,
+        .slave  = &omap34xx_l4_wkup_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* Slave interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = {
+        &omap34xx_l3__l4_core,
+};
+
+/* Master interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = {
+        &omap34xx_l4_core__l4_wkup,
+};
+
+/* L4 CORE */
+static struct omap_hwmod omap34xx_l4_core_hwmod = {
+        .name           = "l4_core_hwmod",
+        .masters        = omap34xx_l4_core_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l4_core_masters),
+        .slaves         = omap34xx_l4_core_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l4_core_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+/* Slave interfaces on the L4_PER interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = {
+        &omap34xx_l3__l4_per,
+};
+
+/* Master interfaces on the L4_PER interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = {
+};
+
+/* L4 PER */
+static struct omap_hwmod omap34xx_l4_per_hwmod = {
+        .name           = "l4_per_hwmod",
+        .masters        = omap34xx_l4_per_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l4_per_masters),
+        .slaves         = omap34xx_l4_per_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l4_per_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+/* Slave interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = {
+        &omap34xx_l4_core__l4_wkup,
+};
+
+/* Master interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = {
+};
+
+/* L4 WKUP */
+static struct omap_hwmod omap34xx_l4_wkup_hwmod = {
+        .name           = "l4_wkup_hwmod",
+        .masters        = omap34xx_l4_wkup_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l4_wkup_masters),
+        .slaves         = omap34xx_l4_wkup_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l4_wkup_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+/* Master interfaces on the MPU device */
+static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = {
+        &omap34xx_mpu__l3,
+};
+
+/* MPU */
+static struct omap_hwmod omap34xx_mpu_hwmod = {
+        .name           = "mpu_hwmod",
+        .clkdev_dev_id  = NULL,
+        .clkdev_con_id  = "arm_fck",
+        .masters        = omap34xx_mpu_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_mpu_masters),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
+        &omap34xx_l3_hwmod,
+        &omap34xx_l4_core_hwmod,
+        &omap34xx_l4_per_hwmod,
+        &omap34xx_l4_wkup_hwmod,
+        &omap34xx_mpu_hwmod,
+        NULL,
+};
+
+#else
+# define omap34xx_hwmods                0
+#endif
+
+#endif
+
+
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 6cc375a275be..1b4c1600f8d8 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -20,13 +20,16 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/timer.h>
+#include <linux/sched.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/module.h>
 
 #include <mach/clock.h>
 #include <mach/board.h>
+#include <mach/powerdomain.h>
+#include <mach/clockdomain.h>
 
 #include "prm.h"
 #include "cm.h"
@@ -48,7 +51,9 @@ int omap2_pm_debug;
         regs[reg_count++].val = __raw_readl(reg)
 #define DUMP_INTC_REG(reg, off) \
         regs[reg_count].name = #reg; \
-        regs[reg_count++].val = __raw_readl(IO_ADDRESS(0x480fe000 + (off)))
+        regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))
+
+static int __init pm_dbg_init(void);
 
 void omap2_pm_dump(int mode, int resume, unsigned int us)
 {
@@ -150,3 +155,425 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
         for (i = 0; i < reg_count; i++)
                 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
 }
+
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+
+static void pm_dbg_regset_store(u32 *ptr);
+
+struct dentry *pm_dbg_dir;
+
+static int pm_dbg_init_done;
+
+enum {
+        DEBUG_FILE_COUNTERS = 0,
+        DEBUG_FILE_TIMERS,
+};
+
+struct pm_module_def {
+        char name[8]; /* Name of the module */
+        short type; /* CM or PRM */
+        unsigned short offset;
+        int low; /* First register address on this module */
+        int high; /* Last register address on this module */
+};
+
+#define MOD_CM 0
+#define MOD_PRM 1
+
+static const struct pm_module_def *pm_dbg_reg_modules;
+static const struct pm_module_def omap3_pm_reg_modules[] = {
+        { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
+        { "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
+        { "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
+        { "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
+        { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
+        { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
+        { "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
+        { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
+        { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
+        { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
+        { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
+        { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
+        { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
+
+        { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
+        { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
+        { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
+        { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
+        { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
+        { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
+        { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
+        { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
+        { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
+        { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
+        { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
+        { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
+        { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
+        { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
+        { "", 0, 0, 0, 0 },
+};
+
+#define PM_DBG_MAX_REG_SETS 4
+
+static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
+
+static int pm_dbg_get_regset_size(void)
+{
+        static int regset_size;
+
+        if (regset_size == 0) {
+                int i = 0;
+
+                while (pm_dbg_reg_modules[i].name[0] != 0) {
+                        regset_size += pm_dbg_reg_modules[i].high +
+                                4 - pm_dbg_reg_modules[i].low;
+                        i++;
+                }
+        }
+        return regset_size;
+}
+
+static int pm_dbg_show_regs(struct seq_file *s, void *unused)
+{
+        int i, j;
+        unsigned long val;
+        int reg_set = (int)s->private;
+        u32 *ptr;
+        void *store = NULL;
+        int regs;
+        int linefeed;
+
+        if (reg_set == 0) {
+                store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
+                ptr = store;
+                pm_dbg_regset_store(ptr);
+        } else {
+                ptr = pm_dbg_reg_set[reg_set - 1];
+        }
+
+        i = 0;
+
+        while (pm_dbg_reg_modules[i].name[0] != 0) {
+                regs = 0;
+                linefeed = 0;
+                if (pm_dbg_reg_modules[i].type == MOD_CM)
+                        seq_printf(s, "MOD: CM_%s (%08x)\n",
+                                pm_dbg_reg_modules[i].name,
+                                (u32)(OMAP3430_CM_BASE +
+                                pm_dbg_reg_modules[i].offset));
+                else
+                        seq_printf(s, "MOD: PRM_%s (%08x)\n",
+                                pm_dbg_reg_modules[i].name,
+                                (u32)(OMAP3430_PRM_BASE +
+                                pm_dbg_reg_modules[i].offset));
+
+                for (j = pm_dbg_reg_modules[i].low;
+                        j <= pm_dbg_reg_modules[i].high; j += 4) {
+                        val = *(ptr++);
+                        if (val != 0) {
+                                regs++;
+                                if (linefeed) {
+                                        seq_printf(s, "\n");
+                                        linefeed = 0;
+                                }
+                                seq_printf(s, "  %02x => %08lx", j, val);
+                                if (regs % 4 == 0)
+                                        linefeed = 1;
+                        }
+                }
+                seq_printf(s, "\n");
+                i++;
+        }
+
+        if (store != NULL)
+                kfree(store);
+
+        return 0;
+}
+
+static void pm_dbg_regset_store(u32 *ptr)
+{
+        int i, j;
+        u32 val;
+
+        i = 0;
+
+        while (pm_dbg_reg_modules[i].name[0] != 0) {
+                for (j = pm_dbg_reg_modules[i].low;
+                        j <= pm_dbg_reg_modules[i].high; j += 4) {
+                        if (pm_dbg_reg_modules[i].type == MOD_CM)
+                                val = cm_read_mod_reg(
+                                        pm_dbg_reg_modules[i].offset, j);
+                        else
+                                val = prm_read_mod_reg(
+                                        pm_dbg_reg_modules[i].offset, j);
+                        *(ptr++) = val;
+                }
+                i++;
+        }
+}
+
+int pm_dbg_regset_save(int reg_set)
+{
+        if (pm_dbg_reg_set[reg_set-1] == NULL)
+                return -EINVAL;
+
+        pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
+
+        return 0;
+}
+
+static const char pwrdm_state_names[][4] = {
+        "OFF",
+        "RET",
+        "INA",
+        "ON"
+};
+
+void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
+{
+        s64 t;
+
+        if (!pm_dbg_init_done)
+                return ;
+
+        /* Update timer for previous state */
+        t = sched_clock();
+
+        pwrdm->state_timer[prev] += t - pwrdm->timer;
+
+        pwrdm->timer = t;
+}
+
+static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
+{
+        struct seq_file *s = (struct seq_file *)user;
+
+        if (strcmp(clkdm->name, "emu_clkdm") == 0 ||
+                strcmp(clkdm->name, "wkup_clkdm") == 0 ||
+                strncmp(clkdm->name, "dpll", 4) == 0)
+                return 0;
+
+        seq_printf(s, "%s->%s (%d)", clkdm->name,
+                        clkdm->pwrdm.ptr->name,
+                        atomic_read(&clkdm->usecount));
+        seq_printf(s, "\n");
+
+        return 0;
+}
+
+static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
+{
+        struct seq_file *s = (struct seq_file *)user;
+        int i;
+
+        if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
+                strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
+                strncmp(pwrdm->name, "dpll", 4) == 0)
+                return 0;
+
+        if (pwrdm->state != pwrdm_read_pwrst(pwrdm))
+                printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n",
+                        pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm));
+
+        seq_printf(s, "%s (%s)", pwrdm->name,
+                        pwrdm_state_names[pwrdm->state]);
+        for (i = 0; i < 4; i++)
+                seq_printf(s, ",%s:%d", pwrdm_state_names[i],
+                        pwrdm->state_counter[i]);
+
+        seq_printf(s, "\n");
+
+        return 0;
+}
+
+static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
+{
+        struct seq_file *s = (struct seq_file *)user;
+        int i;
+
+        if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
+                strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
+                strncmp(pwrdm->name, "dpll", 4) == 0)
+                return 0;
+
+        pwrdm_state_switch(pwrdm);
+
+        seq_printf(s, "%s (%s)", pwrdm->name,
+                pwrdm_state_names[pwrdm->state]);
+
+        for (i = 0; i < 4; i++)
+                seq_printf(s, ",%s:%lld", pwrdm_state_names[i],
+                        pwrdm->state_timer[i]);
+
+        seq_printf(s, "\n");
+        return 0;
+}
+
+static int pm_dbg_show_counters(struct seq_file *s, void *unused)
+{
+        pwrdm_for_each(pwrdm_dbg_show_counter, s);
+        clkdm_for_each(clkdm_dbg_show_counter, s);
+
+        return 0;
+}
+
+static int pm_dbg_show_timers(struct seq_file *s, void *unused)
+{
+        pwrdm_for_each(pwrdm_dbg_show_timer, s);
+        return 0;
+}
+
+static int pm_dbg_open(struct inode *inode, struct file *file)
+{
+        switch ((int)inode->i_private) {
+        case DEBUG_FILE_COUNTERS:
+                return single_open(file, pm_dbg_show_counters,
+                        &inode->i_private);
+        case DEBUG_FILE_TIMERS:
+        default:
+                return single_open(file, pm_dbg_show_timers,
+                        &inode->i_private);
+        };
+}
+
+static int pm_dbg_reg_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, pm_dbg_show_regs, inode->i_private);
+}
+
+static const struct file_operations debug_fops = {
+        .open           = pm_dbg_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static const struct file_operations debug_reg_fops = {
+        .open           = pm_dbg_reg_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+int pm_dbg_regset_init(int reg_set)
+{
+        char name[2];
+
+        if (!pm_dbg_init_done)
+                pm_dbg_init();
+
+        if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
+                pm_dbg_reg_set[reg_set-1] != NULL)
+                return -EINVAL;
+
+        pm_dbg_reg_set[reg_set-1] =
+                kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
+
+        if (pm_dbg_reg_set[reg_set-1] == NULL)
+                return -ENOMEM;
+
+        if (pm_dbg_dir != NULL) {
+                sprintf(name, "%d", reg_set);
+
+                (void) debugfs_create_file(name, S_IRUGO,
+                        pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
+        }
+
+        return 0;
+}
+
+static int pwrdm_suspend_get(void *data, u64 *val)
+{
+        *val = omap3_pm_get_suspend_state((struct powerdomain *)data);
+
+        if (*val >= 0)
+                return 0;
+        return *val;
+}
+
+static int pwrdm_suspend_set(void *data, u64 val)
+{
+        return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val);
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get,
+                        pwrdm_suspend_set, "%llu\n");
+
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir)
+{
+        int i;
+        s64 t;
+        struct dentry *d;
+
+        t = sched_clock();
+
+        for (i = 0; i < 4; i++)
+                pwrdm->state_timer[i] = 0;
+
+        pwrdm->timer = t;
+
+        if (strncmp(pwrdm->name, "dpll", 4) == 0)
+                return 0;
+
+        d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);
+
+        (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d,
+                        (void *)pwrdm, &pwrdm_suspend_fops);
+
+        return 0;
+}
+
+static int __init pm_dbg_init(void)
+{
+        int i;
+        struct dentry *d;
+        char name[2];
+
+        if (pm_dbg_init_done)
+                return 0;
+
+        if (cpu_is_omap34xx())
+                pm_dbg_reg_modules = omap3_pm_reg_modules;
+        else {
+                printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
+                return -ENODEV;
+        }
+                
+        d = debugfs_create_dir("pm_debug", NULL);
+        if (IS_ERR(d))
+                return PTR_ERR(d);
+
+        (void) debugfs_create_file("count", S_IRUGO,
+                d, (void *)DEBUG_FILE_COUNTERS, &debug_fops);
+        (void) debugfs_create_file("time", S_IRUGO,
+                d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
+
+        pwrdm_for_each(pwrdms_setup, (void *)d);
+
+        pm_dbg_dir = debugfs_create_dir("registers", d);
+        if (IS_ERR(pm_dbg_dir))
+                return PTR_ERR(pm_dbg_dir);
+
+        (void) debugfs_create_file("current", S_IRUGO,
+                pm_dbg_dir, (void *)0, &debug_reg_fops);
+
+        for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
+                if (pm_dbg_reg_set[i] != NULL) {
+                        sprintf(name, "%d", i+1);
+                        (void) debugfs_create_file(name, S_IRUGO,
+                                pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
+
+                }
+
+        pm_dbg_init_done = 1;
+
+        return 0;
+}
+arch_initcall(pm_dbg_init);
+
+#else
+void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {}
+#endif
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 21201cd4117b..8400f5768923 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -11,12 +11,23 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
 #define __ARCH_ARM_MACH_OMAP2_PM_H
 
+#include <mach/powerdomain.h>
+
+extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
+extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
+
 #ifdef CONFIG_PM_DEBUG
 extern void omap2_pm_dump(int mode, int resume, unsigned int us);
 extern int omap2_pm_debug;
+extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
+extern int pm_dbg_regset_save(int reg_set);
+extern int pm_dbg_regset_init(int reg_set);
 #else
 #define omap2_pm_dump(mode, resume, us)         do {} while (0);
 #define omap2_pm_debug                          0
+#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
+#define pm_dbg_regset_save(reg_set) do {} while (0);
+#define pm_dbg_regset_init(reg_set) do {} while (0);
 #endif /* CONFIG_PM_DEBUG */
 
 extern void omap24xx_idle_loop_suspend(void);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 528dbdc26e23..bff5c4e89742 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = {
         .valid          = suspend_valid_only_mem,
 };
 
-static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm)
+static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm, void *unused)
 {
         omap2_clkdm_allow_idle(clkdm);
         return 0;
@@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void)
         omap2_clkdm_sleep(gfx_clkdm);
 
         /* Enable clockdomain hardware-supervised control for all clkdms */
-        clkdm_for_each(_pm_clkdm_enable_hwsup);
+        clkdm_for_each(_pm_clkdm_enable_hwsup, NULL);
 
         /* Enable clock autoidle for all domains */
         cm_write_mod_reg(OMAP24XX_AUTO_CAM |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 488d595d8e4b..0ff5a6c53aa0 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -170,6 +170,8 @@ static void omap_sram_idle(void)
                 printk(KERN_ERR "Invalid mpu state in sram_idle\n");
                 return;
         }
+        pwrdm_pre_transition();
+
         omap2_gpio_prepare_for_retention();
         omap_uart_prepare_idle(0);
         omap_uart_prepare_idle(1);
@@ -182,6 +184,9 @@ static void omap_sram_idle(void)
         omap_uart_resume_idle(1);
         omap_uart_resume_idle(0);
         omap2_gpio_resume_after_retention();
+
+        pwrdm_post_transition();
+
 }
 
 /*
@@ -271,6 +276,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
         if (sleep_switch) {
                 omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
                 pwrdm_wait_transition(pwrdm);
+                pwrdm_state_switch(pwrdm);
         }
 
 err:
@@ -658,14 +664,38 @@ static void __init prcm_setup_regs(void)
         omap3_d2d_idle();
 }
 
-static int __init pwrdms_setup(struct powerdomain *pwrdm)
+int omap3_pm_get_suspend_state(struct powerdomain *pwrdm)
+{
+        struct power_state *pwrst;
+
+        list_for_each_entry(pwrst, &pwrst_list, node) {
+                if (pwrst->pwrdm == pwrdm)
+                        return pwrst->next_state;
+        }
+        return -EINVAL;
+}
+
+int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state)
+{
+        struct power_state *pwrst;
+
+        list_for_each_entry(pwrst, &pwrst_list, node) {
+                if (pwrst->pwrdm == pwrdm) {
+                        pwrst->next_state = state;
+                        return 0;
+                }
+        }
+        return -EINVAL;
+}
+
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
 {
         struct power_state *pwrst;
 
         if (!pwrdm->pwrsts)
                 return 0;
 
-        pwrst = kmalloc(sizeof(struct power_state), GFP_KERNEL);
+        pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
         if (!pwrst)
                 return -ENOMEM;
         pwrst->pwrdm = pwrdm;
@@ -683,7 +713,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
  * supported. Initiate sleep transition for other clockdomains, if
  * they are not used
  */
-static int __init clkdms_setup(struct clockdomain *clkdm)
+static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
 {
         if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
                 omap2_clkdm_allow_idle(clkdm);
@@ -716,13 +746,13 @@ static int __init omap3_pm_init(void)
                 goto err1;
         }
 
-        ret = pwrdm_for_each(pwrdms_setup);
+        ret = pwrdm_for_each(pwrdms_setup, NULL);
         if (ret) {
                 printk(KERN_ERR "Failed to setup powerdomains\n");
                 goto err2;
         }
 
-        (void) clkdm_for_each(clkdms_setup);
+        (void) clkdm_for_each(clkdms_setup, NULL);
 
         mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
         if (mpu_pwrdm == NULL) {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 983f1cb676be..2594cbff3947 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -35,6 +35,13 @@
 #include <mach/powerdomain.h>
 #include <mach/clockdomain.h>
 
+#include "pm.h"
+
+enum {
+        PWRDM_STATE_NOW = 0,
+        PWRDM_STATE_PREV,
+};
+
 /* pwrdm_list contains all registered struct powerdomains */
 static LIST_HEAD(pwrdm_list);
 
@@ -83,7 +90,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
         if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip))
                 return ERR_PTR(-EINVAL);
 
-        for (pd = deps; pd; pd++) {
+        for (pd = deps; pd->pwrdm_name; pd++) {
 
                 if (!omap_chip_is(pd->omap_chip))
                         continue;
@@ -96,12 +103,71 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
 
         }
 
-        if (!pd)
+        if (!pd->pwrdm_name)
                 return ERR_PTR(-ENOENT);
 
         return pd->pwrdm;
 }
 
+static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
+{
+
+        int prev;
+        int state;
+
+        if (pwrdm == NULL)
+                return -EINVAL;
+
+        state = pwrdm_read_pwrst(pwrdm);
+
+        switch (flag) {
+        case PWRDM_STATE_NOW:
+                prev = pwrdm->state;
+                break;
+        case PWRDM_STATE_PREV:
+                prev = pwrdm_read_prev_pwrst(pwrdm);
+                if (pwrdm->state != prev)
+                        pwrdm->state_counter[prev]++;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        if (state != prev)
+                pwrdm->state_counter[state]++;
+
+        pm_dbg_update_time(pwrdm, prev);
+
+        pwrdm->state = state;
+
+        return 0;
+}
+
+static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
+{
+        pwrdm_clear_all_prev_pwrst(pwrdm);
+        _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+        return 0;
+}
+
+static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
+{
+        _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
+        return 0;
+}
+
+static __init void _pwrdm_setup(struct powerdomain *pwrdm)
+{
+        int i;
+
+        for (i = 0; i < 4; i++)
+                pwrdm->state_counter[i] = 0;
+
+        pwrdm_wait_transition(pwrdm);
+        pwrdm->state = pwrdm_read_pwrst(pwrdm);
+        pwrdm->state_counter[pwrdm->state] = 1;
+
+}
 
 /* Public functions */
 
@@ -117,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
 {
         struct powerdomain **p = NULL;
 
-        if (pwrdm_list)
-                for (p = pwrdm_list; *p; p++)
+        if (pwrdm_list) {
+                for (p = pwrdm_list; *p; p++) {
                         pwrdm_register(*p);
+                        _pwrdm_setup(*p);
+                }
+        }
 }
 
 /**
@@ -217,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name)
  * anything else to indicate failure; or -EINVAL if the function
  * pointer is null.
  */
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+                        void *user)
 {
         struct powerdomain *temp_pwrdm;
         unsigned long flags;
@@ -228,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
 
         read_lock_irqsave(&pwrdm_rwlock, flags);
         list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
-                ret = (*fn)(temp_pwrdm);
+                ret = (*fn)(temp_pwrdm, user);
                 if (ret)
                         break;
         }
@@ -1110,4 +1180,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
         return 0;
 }
 
+int pwrdm_state_switch(struct powerdomain *pwrdm)
+{
+        return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+}
+
+int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
+{
+        if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
+                pwrdm_wait_transition(clkdm->pwrdm.ptr);
+                return pwrdm_state_switch(clkdm->pwrdm.ptr);
+        }
+
+        return -EINVAL;
+}
+int pwrdm_clk_state_switch(struct clk *clk)
+{
+        if (clk != NULL && clk->clkdm != NULL)
+                return pwrdm_clkdm_state_switch(clk->clkdm);
+        return -EINVAL;
+}
+
+int pwrdm_pre_transition(void)
+{
+        pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
+        return 0;
+}
+
+int pwrdm_post_transition(void)
+{
+        pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
+        return 0;
+}
 
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 9937e2814696..03c467c35f54 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -17,11 +17,11 @@
 #include "prcm-common.h"
 
 #define OMAP2420_PRM_REGADDR(module, reg)                               \
-                        IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
 #define OMAP2430_PRM_REGADDR(module, reg)                               \
-                        IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
 #define OMAP34XX_PRM_REGADDR(module, reg)                               \
-                        IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global PRM registers
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 1a8bbd094066..0837eda5f2b6 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -48,9 +48,9 @@ static inline u32 sms_read_reg(u16 reg)
         return __raw_readl(OMAP_SMS_REGADDR(reg));
 }
 #else
-#define OMAP242X_SDRC_REGADDR(reg)      IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
-#define OMAP243X_SDRC_REGADDR(reg)      IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
-#define OMAP34XX_SDRC_REGADDR(reg)      IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
+#define OMAP242X_SDRC_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
+#define OMAP243X_SDRC_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
+#define OMAP34XX_SDRC_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
 #endif  /* __ASSEMBLER__ */
 
 #endif
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ce22344b94e7..3a529c77daa8 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -73,7 +73,7 @@ static LIST_HEAD(uart_list);
 
 static struct plat_serial8250_port serial_platform_data0[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART1_BASE),
+                .membase        = OMAP2_IO_ADDRESS(OMAP_UART1_BASE),
                 .mapbase        = OMAP_UART1_BASE,
                 .irq            = 72,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -87,7 +87,7 @@ static struct plat_serial8250_port serial_platform_data0[] = {
 
 static struct plat_serial8250_port serial_platform_data1[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART2_BASE),
+                .membase        = OMAP2_IO_ADDRESS(OMAP_UART2_BASE),
                 .mapbase        = OMAP_UART2_BASE,
                 .irq            = 73,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -101,7 +101,7 @@ static struct plat_serial8250_port serial_platform_data1[] = {
 
 static struct plat_serial8250_port serial_platform_data2[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART3_BASE),
+                .membase        = OMAP2_IO_ADDRESS(OMAP_UART3_BASE),
                 .mapbase        = OMAP_UART3_BASE,
                 .irq            = 74,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -123,6 +123,21 @@ static struct plat_serial8250_port serial_platform_data2[] = {
         }
 };
 
+#ifdef CONFIG_ARCH_OMAP4
+static struct plat_serial8250_port serial_platform_data3[] = {
+        {
+                .membase        = IO_ADDRESS(OMAP_UART4_BASE),
+                .mapbase        = OMAP_UART4_BASE,
+                .irq            = 70,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP24XX_BASE_BAUD * 16,
+        }, {
+                .flags          = 0
+        }
+};
+#endif
 static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
                                            int offset)
 {
@@ -470,7 +485,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
                 uart->padconf = 0;
         }
 
-        p->flags |= UPF_SHARE_IRQ;
+        p->irqflags |= IRQF_SHARED;
         ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED,
                           "serial idle", (void *)uart);
         WARN_ON(ret);
@@ -560,12 +575,22 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = {
                         },
                 },
         },
+#ifdef CONFIG_ARCH_OMAP4
+        {
+                .pdev = {
+                        .name                   = "serial8250",
+                        .id                     = 3
+                        .dev                    = {
+                                .platform_data  = serial_platform_data3,
+                        },
+                },
+        },
+#endif
 };
 
-void __init omap_serial_init(void)
+void __init omap_serial_early_init(void)
 {
         int i;
-        const struct omap_uart_config *info;
         char name[16];
 
         /*
@@ -574,23 +599,12 @@ void __init omap_serial_init(void)
          * if not needed.
          */
 
-        info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-
-        if (info == NULL)
-                return;
-
         for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
                 struct omap_uart_state *uart = &omap_uart[i];
                 struct platform_device *pdev = &uart->pdev;
                 struct device *dev = &pdev->dev;
                 struct plat_serial8250_port *p = dev->platform_data;
 
-                if (!(info->enabled_uarts & (1 << i))) {
-                        p->membase = NULL;
-                        p->mapbase = 0;
-                        continue;
-                }
-
                 sprintf(name, "uart%d_ick", i+1);
                 uart->ick = clk_get(NULL, name);
                 if (IS_ERR(uart->ick)) {
@@ -605,8 +619,11 @@ void __init omap_serial_init(void)
                         uart->fck = NULL;
                 }
 
-                if (!uart->ick || !uart->fck)
-                        continue;
+                /* FIXME: Remove this once the clkdev is ready */
+                if (!cpu_is_omap44xx()) {
+                        if (!uart->ick || !uart->fck)
+                                continue;
+                }
 
                 uart->num = i;
                 p->private_data = uart;
@@ -617,6 +634,18 @@ void __init omap_serial_init(void)
                         p->irq += 32;
 
                 omap_uart_enable_clocks(uart);
+        }
+}
+
+void __init omap_serial_init(void)
+{
+        int i;
+
+        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
+                struct omap_uart_state *uart = &omap_uart[i];
+                struct platform_device *pdev = &uart->pdev;
+                struct device *dev = &pdev->dev;
+
                 omap_uart_reset(uart);
                 omap_uart_idle_init(uart);
 
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index bb299851116d..9b62208658bc 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl:
 prcm_mask_val:
         .word 0xFFFF3FFC
 omap242x_sdi_timer_32ksynct_cr:
-        .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 ENTRY(omap242x_sram_ddr_init_sz)
         .word   . - omap242x_sram_ddr_init
 
@@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
         .word 0xFFFF3FFC
 omap242x_srs_timer_32ksynct:
-        .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap242x_sram_reprogram_sdrc_sz)
         .word   . - omap242x_sram_reprogram_sdrc
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index 9955abcaeb31..df2cd9277c00 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl:
 prcm_mask_val:
         .word 0xFFFF3FFC
 omap243x_sdi_timer_32ksynct_cr:
-        .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 ENTRY(omap243x_sram_ddr_init_sz)
         .word   . - omap243x_sram_ddr_init
 
@@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
         .word 0xFFFF3FFC
 omap243x_srs_timer_32ksynct:
-        .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap243x_sram_reprogram_sdrc_sz)
         .word   . - omap243x_sram_reprogram_sdrc
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 97eeeebcb066..e2338c0aebcf 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -231,7 +231,7 @@ static void __init omap2_gp_clocksource_init(void)
 static void __init omap2_gp_timer_init(void)
 {
 #ifdef CONFIG_LOCAL_TIMERS
-        twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
+        twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
 #endif
         omap_dm_timer_init();
 
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 739e59e8025c..1145a2562b0f 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -31,15 +31,6 @@
 #include <mach/mux.h>
 #include <mach/usb.h>
 
-#define OTG_SYSCONFIG   (OMAP34XX_HSUSB_OTG_BASE + 0x404)
-
-static void __init usb_musb_pm_init(void)
-{
-        /* Ensure force-idle mode for OTG controller */
-        if (cpu_is_omap34xx())
-                omap_writel(0, OTG_SYSCONFIG);
-}
-
 #ifdef CONFIG_USB_MUSB_SOC
 
 static struct resource musb_resources[] = {
@@ -173,13 +164,10 @@ void __init usb_musb_init(void)
                 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
                 return;
         }
-
-        usb_musb_pm_init();
 }
 
 #else
 void __init usb_musb_init(void)
 {
-        usb_musb_pm_init();
 }
 #endif /* CONFIG_USB_MUSB_SOC */
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 89c992b8f75b..a6f8eab14ba5 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -21,6 +21,11 @@ config CPU_PXA930
 
 config CPU_PXA935
         bool "PXA935 (codename Tavor-P65)"
+        select CPU_PXA930
+
+config CPU_PXA950
+        bool "PXA950 (codename Tavor-PV2)"
+        select CPU_PXA930
 
 endmenu
 
@@ -79,6 +84,12 @@ config MACH_MP900C
         bool "Nec Mobilepro 900/c"
         select PXA25x
 
+config MACH_BALLOON3
+        bool "Balloon 3 board"
+        select PXA27x
+        select IWMMXT
+        select PXA_HAVE_BOARD_IRQS
+
 config ARCH_PXA_IDP
         bool "Accelent Xscale IDP"
         select PXA25x
@@ -371,6 +382,15 @@ config MACH_PALMTE2
           Say Y here if you intend to run this kernel on a Palm Tungsten|E2
           handheld computer.
 
+config MACH_PALMTC
+        bool "Palm Tungsten|C"
+        default y
+        depends on ARCH_PXA_PALM
+        select PXA25x
+        help
+          Say Y here if you intend to run this kernel on a Palm Tungsten|C
+          handheld computer.
+
 config MACH_PALMT5
         bool "Palm Tungsten|T5"
         default y
@@ -458,6 +478,7 @@ config PXA_EZX
         select PXA27x
         select IWMMXT
         select HAVE_PWM
+        select PXA_HAVE_BOARD_IRQS
 
 config MACH_EZX_A780
         bool "Motorola EZX A780"
@@ -489,6 +510,21 @@ config MACH_EZX_E2
         default y
         depends on PXA_EZX
 
+config MACH_XCEP
+        bool "Iskratel Electronics XCEP"
+        select PXA25x
+        select MTD
+        select MTD_PARTITIONS
+        select MTD_PHYSMAP
+        select MTD_CFI_INTELEXT
+        select MTD_CFI
+        select MTD_CHAR
+        select SMC91X
+        select PXA_SSP
+        help
+          PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
+          Tuned for usage in Libera instruments for particle accelerators.
+
 endmenu
 
 config PXA25x
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index d4c6122a342f..f10e152bfc27 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_GUMSTIX_AM300EPD)	+= am300epd.o
 obj-$(CONFIG_ARCH_LUBBOCK)      += lubbock.o
 obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
 obj-$(CONFIG_MACH_MAINSTONE)    += mainstone.o
+obj-$(CONFIG_MACH_BALLOON3)     += balloon3.o
 obj-$(CONFIG_MACH_MP900C)       += mp900.o
 obj-$(CONFIG_ARCH_PXA_IDP)      += idp.o
 obj-$(CONFIG_MACH_TRIZEPS4)     += trizeps4.o
@@ -58,6 +59,7 @@ obj-$(CONFIG_MACH_E750)		+= e750.o
 obj-$(CONFIG_MACH_E400)         += e400.o
 obj-$(CONFIG_MACH_E800)         += e800.o
 obj-$(CONFIG_MACH_PALMTE2)      += palmte2.o
+obj-$(CONFIG_MACH_PALMTC)       += palmtc.o
 obj-$(CONFIG_MACH_PALMT5)       += palmt5.o
 obj-$(CONFIG_MACH_PALMTX)       += palmtx.o
 obj-$(CONFIG_MACH_PALMLD)       += palmld.o
@@ -78,6 +80,8 @@ obj-$(CONFIG_MACH_ARMCORE)      += cm-x2xx.o cm-x255.o cm-x270.o
 obj-$(CONFIG_MACH_CM_X300)      += cm-x300.o
 obj-$(CONFIG_PXA_EZX)           += ezx.o
 
+obj-$(CONFIG_MACH_XCEP)         += xcep.o
+
 obj-$(CONFIG_MACH_INTELMOTE2)   += imote2.o
 obj-$(CONFIG_MACH_STARGATE2)    += stargate2.o
 obj-$(CONFIG_MACH_CSB726)       += csb726.o
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
new file mode 100644
index 000000000000..f23138b8fca3
--- /dev/null
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -0,0 +1,361 @@
+/*
+ *  linux/arch/arm/mach-pxa/balloon3.c
+ *
+ *  Support for Balloonboard.org Balloon3 board.
+ *
+ *  Author:     Nick Bane, Wookey, Jonathan McDowell
+ *  Created:    June, 2006
+ *  Copyright:  Toby Churchill Ltd
+ *  Derived from mainstone.c, by Nico Pitre
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include <linux/bitops.h>
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/ioport.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/types.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/flash.h>
+
+#include <mach/pxa27x.h>
+#include <mach/balloon3.h>
+#include <mach/audio.h>
+#include <mach/pxafb.h>
+#include <mach/mmc.h>
+#include <mach/udc.h>
+#include <mach/pxa27x-udc.h>
+#include <mach/irda.h>
+#include <mach/ohci.h>
+
+#include <plat/i2c.h>
+
+#include "generic.h"
+#include "devices.h"
+
+static unsigned long balloon3_irq_enabled;
+
+static unsigned long balloon3_features_present =
+                (1 << BALLOON3_FEATURE_OHCI) | (1 << BALLOON3_FEATURE_CF) |
+                (1 << BALLOON3_FEATURE_AUDIO) |
+                (1 << BALLOON3_FEATURE_TOPPOLY);
+
+int balloon3_has(enum balloon3_features feature)
+{
+        return (balloon3_features_present & (1 << feature)) ? 1 : 0;
+}
+EXPORT_SYMBOL_GPL(balloon3_has);
+
+int __init parse_balloon3_features(char *arg)
+{
+        if (!arg)
+                return 0;
+
+        return strict_strtoul(arg, 0, &balloon3_features_present);
+}
+early_param("balloon3_features", parse_balloon3_features);
+
+static void balloon3_mask_irq(unsigned int irq)
+{
+        int balloon3_irq = (irq - BALLOON3_IRQ(0));
+        balloon3_irq_enabled &= ~(1 << balloon3_irq);
+        __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
+}
+
+static void balloon3_unmask_irq(unsigned int irq)
+{
+        int balloon3_irq = (irq - BALLOON3_IRQ(0));
+        balloon3_irq_enabled |= (1 << balloon3_irq);
+        __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
+}
+
+static struct irq_chip balloon3_irq_chip = {
+        .name           = "FPGA",
+        .ack            = balloon3_mask_irq,
+        .mask           = balloon3_mask_irq,
+        .unmask         = balloon3_unmask_irq,
+};
+
+static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
+{
+        unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
+                                        balloon3_irq_enabled;
+
+        do {
+                /* clear useless edge notification */
+                if (desc->chip->ack)
+                        desc->chip->ack(BALLOON3_AUX_NIRQ);
+                while (pending) {
+                        irq = BALLOON3_IRQ(0) + __ffs(pending);
+                        generic_handle_irq(irq);
+                        pending &= pending - 1;
+                }
+                pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
+                                balloon3_irq_enabled;
+        } while (pending);
+}
+
+static void __init balloon3_init_irq(void)
+{
+        int irq;
+
+        pxa27x_init_irq();
+        /* setup extra Balloon3 irqs */
+        for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
+                set_irq_chip(irq, &balloon3_irq_chip);
+                set_irq_handler(irq, handle_level_irq);
+                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+        }
+
+        set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
+        set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
+
+        pr_debug("%s: chained handler installed - irq %d automatically "
+                "enabled\n", __func__, BALLOON3_AUX_NIRQ);
+}
+
+static void balloon3_backlight_power(int on)
+{
+        pr_debug("%s: power is %s\n", __func__, on ? "on" : "off");
+        gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
+}
+
+static unsigned long balloon3_lcd_pin_config[] = {
+        /* LCD - 16bpp Active TFT */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        GPIO99_GPIO,            /* Backlight */
+};
+
+static struct pxafb_mode_info balloon3_lcd_modes[] = {
+        {
+                .pixclock               = 38000,
+                .xres                   = 480,
+                .yres                   = 640,
+                .bpp                    = 16,
+                .hsync_len              = 8,
+                .left_margin            = 8,
+                .right_margin           = 8,
+                .vsync_len              = 2,
+                .upper_margin           = 4,
+                .lower_margin           = 5,
+                .sync                   = 0,
+        },
+};
+
+static struct pxafb_mach_info balloon3_pxafb_info = {
+        .modes                  = balloon3_lcd_modes,
+        .num_modes              = ARRAY_SIZE(balloon3_lcd_modes),
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+        .pxafb_backlight_power  = balloon3_backlight_power,
+};
+
+static unsigned long balloon3_mmc_pin_config[] = {
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+};
+
+static void balloon3_mci_setpower(struct device *dev, unsigned int vdd)
+{
+        struct pxamci_platform_data *p_d = dev->platform_data;
+
+        if ((1 << vdd) & p_d->ocr_mask) {
+                pr_debug("%s: on\n", __func__);
+                /* FIXME something to prod here? */
+        } else {
+                pr_debug("%s: off\n", __func__);
+                /* FIXME something to prod here? */
+        }
+}
+
+static struct pxamci_platform_data balloon3_mci_platform_data = {
+        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+        .setpower       = balloon3_mci_setpower,
+};
+
+static int balloon3_udc_is_connected(void)
+{
+        pr_debug("%s: udc connected\n", __func__);
+        return 1;
+}
+
+static void balloon3_udc_command(int cmd)
+{
+        switch (cmd) {
+        case PXA2XX_UDC_CMD_CONNECT:
+                UP2OCR |= (UP2OCR_DPPUE + UP2OCR_DPPUBE);
+                pr_debug("%s: connect\n", __func__);
+                break;
+        case PXA2XX_UDC_CMD_DISCONNECT:
+                UP2OCR &= ~UP2OCR_DPPUE;
+                pr_debug("%s: disconnect\n", __func__);
+                break;
+        }
+}
+
+static struct pxa2xx_udc_mach_info balloon3_udc_info = {
+        .udc_is_connected = balloon3_udc_is_connected,
+        .udc_command      = balloon3_udc_command,
+};
+
+static struct pxaficp_platform_data balloon3_ficp_platform_data = {
+        .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
+};
+
+static unsigned long balloon3_ohci_pin_config[] = {
+        GPIO88_USBH1_PWR,
+        GPIO89_USBH1_PEN,
+};
+
+static struct pxaohci_platform_data balloon3_ohci_platform_data = {
+        .port_mode      = PMM_PERPORT_MODE,
+        .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
+};
+
+static unsigned long balloon3_pin_config[] __initdata = {
+        /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* Wakeup GPIO */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
+
+        /* NAND & IDLE LED GPIOs */
+        GPIO9_GPIO,
+        GPIO10_GPIO,
+};
+
+static struct gpio_led balloon3_gpio_leds[] = {
+        {
+                .name                   = "balloon3:green:idle",
+                .default_trigger        = "heartbeat",
+                .gpio                   = BALLOON3_GPIO_LED_IDLE,
+                .active_low             = 1,
+        },
+        {
+                .name                   = "balloon3:green:nand",
+                .default_trigger        = "nand-disk",
+                .gpio                   = BALLOON3_GPIO_LED_NAND,
+                .active_low             = 1,
+        },
+};
+
+static struct gpio_led_platform_data balloon3_gpio_leds_platform_data = {
+        .leds           = balloon3_gpio_leds,
+        .num_leds       = ARRAY_SIZE(balloon3_gpio_leds),
+};
+
+static struct platform_device balloon3led_device = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &balloon3_gpio_leds_platform_data,
+        },
+};
+
+static void __init balloon3_init(void)
+{
+        pr_info("Initialising Balloon3\n");
+
+        /* system bus arbiter setting
+         * - Core_Park
+         * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
+         */
+        ARB_CNTRL = ARB_CORE_PARK | 0x234;
+
+        pxa_set_i2c_info(NULL);
+        if (balloon3_has(BALLOON3_FEATURE_AUDIO))
+                pxa_set_ac97_info(NULL);
+
+        if (balloon3_has(BALLOON3_FEATURE_TOPPOLY)) {
+                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
+                gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT,
+                        "LCD Backlight Power");
+                gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
+                set_pxa_fb_info(&balloon3_pxafb_info);
+        }
+
+        if (balloon3_has(BALLOON3_FEATURE_MMC)) {
+                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config));
+                pxa_set_mci_info(&balloon3_mci_platform_data);
+        }
+        pxa_set_ficp_info(&balloon3_ficp_platform_data);
+        if (balloon3_has(BALLOON3_FEATURE_OHCI)) {
+                pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ohci_pin_config));
+                pxa_set_ohci_info(&balloon3_ohci_platform_data);
+        }
+        pxa_set_udc_info(&balloon3_udc_info);
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
+
+        platform_device_register(&balloon3led_device);
+}
+
+static struct map_desc balloon3_io_desc[] __initdata = {
+        {       /* CPLD/FPGA */
+                .virtual        =  BALLOON3_FPGA_VIRT,
+                .pfn            = __phys_to_pfn(BALLOON3_FPGA_PHYS),
+                .length         = BALLOON3_FPGA_LENGTH,
+                .type           = MT_DEVICE,
+        },
+};
+
+static void __init balloon3_map_io(void)
+{
+        pxa_map_io();
+        iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
+}
+
+MACHINE_START(BALLOON3, "Balloon3")
+        /* Maintainer: Nick Bane. */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = balloon3_map_io,
+        .init_irq       = balloon3_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = balloon3_init,
+        .boot_params    = PHYS_OFFSET + 0x100,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 5599bceff738..978a3667e90d 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -12,7 +12,6 @@ struct clk {
         unsigned int            cken;
         unsigned int            delay;
         unsigned int            enabled;
-        struct clk              *other;
 };
 
 #define INIT_CLKREG(_clk,_devname,_conname)             \
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 1d2cec25391d..eea78b6c2bc5 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -13,13 +13,18 @@
 #include <linux/sysdev.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
+#include <linux/delay.h>
 
 #include <linux/rtc-v3020.h>
 #include <video/mbxfb.h>
 
+#include <linux/spi/spi.h>
+#include <linux/spi/libertas_spi.h>
+
 #include <mach/pxa27x.h>
 #include <mach/ohci.h>
 #include <mach/mmc.h>
+#include <mach/pxa2xx_spi.h>
 
 #include "generic.h"
 
@@ -34,6 +39,10 @@
 /* MMC power enable */
 #define GPIO105_MMC_POWER       (105)
 
+/* WLAN GPIOS */
+#define GPIO19_WLAN_STRAP       (19)
+#define GPIO102_WLAN_RST        (102)
+
 static unsigned long cmx270_pin_config[] = {
         /* AC'97 */
         GPIO28_AC97_BITCLK,
@@ -94,8 +103,8 @@ static unsigned long cmx270_pin_config[] = {
         GPIO26_SSP1_RXD,
 
         /* SSP2 */
-        GPIO19_SSP2_SCLK,
-        GPIO14_SSP2_SFRM,
+        GPIO19_GPIO,    /* SSP2 clock is used as GPIO for Libertas pin-strap */
+        GPIO14_GPIO,
         GPIO87_SSP2_TXD,
         GPIO88_SSP2_RXD,
 
@@ -123,6 +132,7 @@ static unsigned long cmx270_pin_config[] = {
         GPIO0_GPIO      | WAKEUP_ON_EDGE_BOTH,
         GPIO105_GPIO    | MFP_LPM_DRIVE_HIGH,   /* MMC/SD power */
         GPIO53_GPIO,                            /* PC card reset */
+        GPIO102_GPIO,                           /* WLAN reset */
 
         /* NAND controls */
         GPIO11_GPIO     | MFP_LPM_DRIVE_HIGH,   /* NAND CE# */
@@ -131,6 +141,7 @@ static unsigned long cmx270_pin_config[] = {
         /* interrupts */
         GPIO10_GPIO,    /* DM9000 interrupt */
         GPIO83_GPIO,    /* MMC card detect */
+        GPIO95_GPIO,    /* WLAN interrupt */
 };
 
 /* V3020 RTC */
@@ -271,64 +282,114 @@ static inline void cmx270_init_ohci(void) {}
 #endif
 
 #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
-static int cmx270_mci_init(struct device *dev,
-                           irq_handler_t cmx270_detect_int,
-                           void *data)
+static struct pxamci_platform_data cmx270_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO83_MMC_IRQ,
+        .gpio_card_ro           = -1,
+        .gpio_power             = GPIO105_MMC_POWER,
+        .gpio_power_invert      = 1,
+};
+
+static void __init cmx270_init_mmc(void)
 {
-        int err;
+        pxa_set_mci_info(&cmx270_mci_platform_data);
+}
+#else
+static inline void cmx270_init_mmc(void) {}
+#endif
+
+#if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE)
+static struct pxa2xx_spi_master cm_x270_spi_info = {
+        .num_chipselect = 1,
+        .enable_dma     = 1,
+};
+
+static struct pxa2xx_spi_chip cm_x270_libertas_chip = {
+        .rx_threshold   = 1,
+        .tx_threshold   = 1,
+        .timeout        = 1000,
+        .gpio_cs        = 14,
+};
+
+static unsigned long cm_x270_libertas_pin_config[] = {
+        /* SSP2 */
+        GPIO19_SSP2_SCLK,
+        GPIO14_GPIO,
+        GPIO87_SSP2_TXD,
+        GPIO88_SSP2_RXD,
+
+};
 
-        err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
-        if (err) {
-                dev_warn(dev, "power gpio unavailable\n");
+static int cm_x270_libertas_setup(struct spi_device *spi)
+{
+        int err = gpio_request(GPIO19_WLAN_STRAP, "WLAN STRAP");
+        if (err)
                 return err;
-        }
 
-        gpio_direction_output(GPIO105_MMC_POWER, 0);
+        err = gpio_request(GPIO102_WLAN_RST, "WLAN RST");
+        if (err)
+                goto err_free_strap;
 
-        err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_FALLING,
-                          "MMC card detect", data);
-        if (err) {
-                gpio_free(GPIO105_MMC_POWER);
-                dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
-                        " request MMC card detect IRQ\n");
-        }
+        err = gpio_direction_output(GPIO102_WLAN_RST, 0);
+        if (err)
+                goto err_free_strap;
+        msleep(100);
+
+        err = gpio_direction_output(GPIO19_WLAN_STRAP, 1);
+        if (err)
+                goto err_free_strap;
+        msleep(100);
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(cm_x270_libertas_pin_config));
+
+        gpio_set_value(GPIO102_WLAN_RST, 1);
+        msleep(100);
+
+        spi->bits_per_word = 16;
+        spi_setup(spi);
+
+        return 0;
+
+err_free_strap:
+        gpio_free(GPIO19_WLAN_STRAP);
 
         return err;
 }
 
-static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
+static int cm_x270_libertas_teardown(struct spi_device *spi)
 {
-        struct pxamci_platform_data *p_d = dev->platform_data;
-
-        if ((1 << vdd) & p_d->ocr_mask) {
-                dev_dbg(dev, "power on\n");
-                gpio_set_value(GPIO105_MMC_POWER, 0);
-        } else {
-                gpio_set_value(GPIO105_MMC_POWER, 1);
-                dev_dbg(dev, "power off\n");
-        }
-}
+        gpio_set_value(GPIO102_WLAN_RST, 0);
+        gpio_free(GPIO102_WLAN_RST);
+        gpio_free(GPIO19_WLAN_STRAP);
 
-static void cmx270_mci_exit(struct device *dev, void *data)
-{
-        free_irq(CMX270_MMC_IRQ, data);
-        gpio_free(GPIO105_MMC_POWER);
+        return 0;
 }
 
-static struct pxamci_platform_data cmx270_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = cmx270_mci_init,
-        .setpower       = cmx270_mci_setpower,
-        .exit           = cmx270_mci_exit,
+struct libertas_spi_platform_data cm_x270_libertas_pdata = {
+        .use_dummy_writes       = 1,
+        .setup                  = cm_x270_libertas_setup,
+        .teardown               = cm_x270_libertas_teardown,
 };
 
-static void __init cmx270_init_mmc(void)
+static struct spi_board_info cm_x270_spi_devices[] __initdata = {
+        {
+                .modalias               = "libertas_spi",
+                .max_speed_hz           = 13000000,
+                .bus_num                = 2,
+                .irq                    = gpio_to_irq(95),
+                .chip_select            = 0,
+                .controller_data        = &cm_x270_libertas_chip,
+                .platform_data          = &cm_x270_libertas_pdata,
+        },
+};
+
+static void __init cmx270_init_spi(void)
 {
-        pxa_set_mci_info(&cmx270_mci_platform_data);
+        pxa2xx_set_spi_info(2, &cm_x270_spi_info);
+        spi_register_board_info(ARRAY_AND_SIZE(cm_x270_spi_devices));
 }
 #else
-static inline void cmx270_init_mmc(void) {}
+static inline void cmx270_init_spi(void) {}
 #endif
 
 void __init cmx270_init(void)
@@ -343,4 +404,5 @@ void __init cmx270_init(void)
         cmx270_init_mmc();
         cmx270_init_ohci();
         cmx270_init_2700G();
+        cmx270_init_spi();
 }
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 465da26591bd..aac2cda60e09 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -306,68 +306,21 @@ static void cm_x300_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data cm_x300_mci_platform_data = {
-        .detect_delay   = 20,
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = cm_x300_mci_init,
-        .exit           = cm_x300_mci_exit,
+        .detect_delay           = 20,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init                   = cm_x300_mci_init,
+        .exit                   = cm_x300_mci_exit,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
-static int cm_x300_mci2_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO85_MMC2_WP);
-}
-
-static int cm_x300_mci2_init(struct device *dev,
-                             irq_handler_t cm_x300_detect_int,
-                             void *data)
-{
-        int err;
-
-        /*
-         * setup GPIO for CM-X300 MMC controller
-         */
-        err = gpio_request(GPIO82_MMC2_IRQ, "mmc card detect");
-        if (err)
-                goto err_request_cd;
-        gpio_direction_input(GPIO82_MMC2_IRQ);
-
-        err = gpio_request(GPIO85_MMC2_WP, "mmc write protect");
-        if (err)
-                goto err_request_wp;
-        gpio_direction_input(GPIO85_MMC2_WP);
-
-        err = request_irq(CM_X300_MMC2_IRQ, cm_x300_detect_int,
-                          IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
-                          "MMC card detect", data);
-        if (err) {
-                printk(KERN_ERR "%s: MMC/SD/SDIO: "
-                                "can't request card detect IRQ\n", __func__);
-                goto err_request_irq;
-        }
-
-        return 0;
-
-err_request_irq:
-        gpio_free(GPIO85_MMC2_WP);
-err_request_wp:
-        gpio_free(GPIO82_MMC2_IRQ);
-err_request_cd:
-        return err;
-}
-
-static void cm_x300_mci2_exit(struct device *dev, void *data)
-{
-        free_irq(CM_X300_MMC2_IRQ, data);
-        gpio_free(GPIO82_MMC2_IRQ);
-        gpio_free(GPIO85_MMC2_WP);
-}
-
 static struct pxamci_platform_data cm_x300_mci2_platform_data = {
-        .detect_delay   = 20,
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = cm_x300_mci2_init,
-        .exit           = cm_x300_mci2_exit,
-        .get_ro         = cm_x300_mci2_ro,
+        .detect_delay           = 20,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO82_MMC2_IRQ,
+        .gpio_card_ro           = GPIO85_MMC2_WP,
+        .gpio_power             = -1,
 };
 
 static void __init cm_x300_init_mmc(void)
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index 7c9c34c19ae2..37c239c56568 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -172,6 +172,7 @@ void __init colibri_pxa300_init(void)
 {
         colibri_pxa300_init_eth();
         colibri_pxa300_init_ohci();
+        colibri_pxa3xx_init_nand();
         colibri_pxa300_init_lcd();
         colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO));
         colibri_pxa310_init_ac97();
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index a18d37b3c5e6..494572825c7d 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -164,15 +164,48 @@ static inline void __init colibri_pxa320_init_ac97(void)
 static inline void colibri_pxa320_init_ac97(void) {}
 #endif
 
+/*
+ * The following configuration is verified to work with the Toradex Orchid
+ * carrier board
+ */
+static mfp_cfg_t colibri_pxa320_uart_pin_config[] __initdata = {
+        /* UART 1 configuration (may be set by bootloader) */
+        GPIO99_UART1_CTS,
+        GPIO104_UART1_RTS,
+        GPIO97_UART1_RXD,
+        GPIO98_UART1_TXD,
+        GPIO101_UART1_DTR,
+        GPIO103_UART1_DSR,
+        GPIO100_UART1_DCD,
+        GPIO102_UART1_RI,
+
+        /* UART 2 configuration */
+        GPIO109_UART2_CTS,
+        GPIO112_UART2_RTS,
+        GPIO110_UART2_RXD,
+        GPIO111_UART2_TXD,
+
+        /* UART 3 configuration */
+        GPIO30_UART3_RXD,
+        GPIO31_UART3_TXD,
+};
+
+static void __init colibri_pxa320_init_uart(void)
+{
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_uart_pin_config));
+}
+
 void __init colibri_pxa320_init(void)
 {
         colibri_pxa320_init_eth();
         colibri_pxa320_init_ohci();
+        colibri_pxa3xx_init_nand();
         colibri_pxa320_init_lcd();
         colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO));
         colibri_pxa320_init_ac97();
         colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
                                 mfp_to_gpio(MFP_PIN_GPIO28));
+        colibri_pxa320_init_uart();
 }
 
 MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index ea34e34f8cd8..efebaf4d734d 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -25,6 +25,7 @@
 #include <mach/colibri.h>
 #include <mach/mmc.h>
 #include <mach/pxafb.h>
+#include <mach/pxa3xx_nand.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -95,10 +96,13 @@ static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
-        .detect_delay   = 20,
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .init           = colibri_pxa3xx_mci_init,
-        .exit           = colibri_pxa3xx_mci_exit,
+        .detect_delay           = 20,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .init                   = colibri_pxa3xx_mci_init,
+        .exit                   = colibri_pxa3xx_mci_exit,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 void __init colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin)
@@ -154,3 +158,43 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin)
 }
 #endif
 
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+static struct mtd_partition colibri_nand_partitions[] = {
+        {
+                .name        = "bootloader",
+                .offset      = 0,
+                .size        = SZ_512K,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        {
+                .name        = "kernel",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = SZ_4M,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        {
+                .name        = "reserved",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = SZ_1M,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        {
+                .name        = "fs",
+                .offset      = MTDPART_OFS_APPEND,
+                .size        = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct pxa3xx_nand_platform_data colibri_nand_info = {
+        .enable_arbiter = 1,
+        .keep_config    = 1,
+        .parts          = colibri_nand_partitions,
+        .nr_parts       = ARRAY_SIZE(colibri_nand_partitions),
+};
+
+void __init colibri_pxa3xx_init_nand(void)
+{
+        pxa3xx_set_nand_info(&colibri_nand_info);
+}
+#endif
+
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 5363e1aea3fb..b536b5a5a10d 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -29,6 +29,7 @@
 #include <linux/spi/ads7846.h>
 #include <linux/spi/corgi_lcd.h>
 #include <linux/mtd/sharpsl.h>
+#include <linux/input/matrix_keypad.h>
 #include <video/w100fb.h>
 
 #include <asm/setup.h>
@@ -104,6 +105,28 @@ static unsigned long corgi_pin_config[] __initdata = {
         GPIO6_MMC_CLK,
         GPIO8_MMC_CS0,
 
+        /* GPIO Matrix Keypad */
+        GPIO66_GPIO,    /* column 0 */
+        GPIO67_GPIO,    /* column 1 */
+        GPIO68_GPIO,    /* column 2 */
+        GPIO69_GPIO,    /* column 3 */
+        GPIO70_GPIO,    /* column 4 */
+        GPIO71_GPIO,    /* column 5 */
+        GPIO72_GPIO,    /* column 6 */
+        GPIO73_GPIO,    /* column 7 */
+        GPIO74_GPIO,    /* column 8 */
+        GPIO75_GPIO,    /* column 9 */
+        GPIO76_GPIO,    /* column 10 */
+        GPIO77_GPIO,    /* column 11 */
+        GPIO58_GPIO,    /* row 0 */
+        GPIO59_GPIO,    /* row 1 */
+        GPIO60_GPIO,    /* row 2 */
+        GPIO61_GPIO,    /* row 3 */
+        GPIO62_GPIO,    /* row 4 */
+        GPIO63_GPIO,    /* row 5 */
+        GPIO64_GPIO,    /* row 6 */
+        GPIO65_GPIO,    /* row 7 */
+
         /* GPIO */
         GPIO9_GPIO,     /* CORGI_GPIO_nSD_DETECT */
         GPIO7_GPIO,     /* CORGI_GPIO_nSD_WP */
@@ -267,9 +290,115 @@ static struct platform_device corgifb_device = {
 /*
  * Corgi Keyboard Device
  */
+#define CORGI_KEY_CALENDER      KEY_F1
+#define CORGI_KEY_ADDRESS       KEY_F2
+#define CORGI_KEY_FN            KEY_F3
+#define CORGI_KEY_CANCEL        KEY_F4
+#define CORGI_KEY_OFF           KEY_SUSPEND
+#define CORGI_KEY_EXOK          KEY_F5
+#define CORGI_KEY_EXCANCEL      KEY_F6
+#define CORGI_KEY_EXJOGDOWN     KEY_F7
+#define CORGI_KEY_EXJOGUP       KEY_F8
+#define CORGI_KEY_JAP1          KEY_LEFTCTRL
+#define CORGI_KEY_JAP2          KEY_LEFTALT
+#define CORGI_KEY_MAIL          KEY_F10
+#define CORGI_KEY_OK            KEY_F11
+#define CORGI_KEY_MENU          KEY_F12
+
+static const uint32_t corgikbd_keymap[] = {
+        KEY(0, 1, KEY_1),
+        KEY(0, 2, KEY_3),
+        KEY(0, 3, KEY_5),
+        KEY(0, 4, KEY_6),
+        KEY(0, 5, KEY_7),
+        KEY(0, 6, KEY_9),
+        KEY(0, 7, KEY_0),
+        KEY(0, 8, KEY_BACKSPACE),
+        KEY(1, 1, KEY_2),
+        KEY(1, 2, KEY_4),
+        KEY(1, 3, KEY_R),
+        KEY(1, 4, KEY_Y),
+        KEY(1, 5, KEY_8),
+        KEY(1, 6, KEY_I),
+        KEY(1, 7, KEY_O),
+        KEY(1, 8, KEY_P),
+        KEY(2, 0, KEY_TAB),
+        KEY(2, 1, KEY_Q),
+        KEY(2, 2, KEY_E),
+        KEY(2, 3, KEY_T),
+        KEY(2, 4, KEY_G),
+        KEY(2, 5, KEY_U),
+        KEY(2, 6, KEY_J),
+        KEY(2, 7, KEY_K),
+        KEY(3, 0, CORGI_KEY_CALENDER),
+        KEY(3, 1, KEY_W),
+        KEY(3, 2, KEY_S),
+        KEY(3, 3, KEY_F),
+        KEY(3, 4, KEY_V),
+        KEY(3, 5, KEY_H),
+        KEY(3, 6, KEY_M),
+        KEY(3, 7, KEY_L),
+        KEY(3, 9, KEY_RIGHTSHIFT),
+        KEY(4, 0, CORGI_KEY_ADDRESS),
+        KEY(4, 1, KEY_A),
+        KEY(4, 2, KEY_D),
+        KEY(4, 3, KEY_C),
+        KEY(4, 4, KEY_B),
+        KEY(4, 5, KEY_N),
+        KEY(4, 6, KEY_DOT),
+        KEY(4, 8, KEY_ENTER),
+        KEY(4, 10, KEY_LEFTSHIFT),
+        KEY(5, 0, CORGI_KEY_MAIL),
+        KEY(5, 1, KEY_Z),
+        KEY(5, 2, KEY_X),
+        KEY(5, 3, KEY_MINUS),
+        KEY(5, 4, KEY_SPACE),
+        KEY(5, 5, KEY_COMMA),
+        KEY(5, 7, KEY_UP),
+        KEY(5, 11, CORGI_KEY_FN),
+        KEY(6, 0, KEY_SYSRQ),
+        KEY(6, 1, CORGI_KEY_JAP1),
+        KEY(6, 2, CORGI_KEY_JAP2),
+        KEY(6, 3, CORGI_KEY_CANCEL),
+        KEY(6, 4, CORGI_KEY_OK),
+        KEY(6, 5, CORGI_KEY_MENU),
+        KEY(6, 6, KEY_LEFT),
+        KEY(6, 7, KEY_DOWN),
+        KEY(6, 8, KEY_RIGHT),
+        KEY(7, 0, CORGI_KEY_OFF),
+        KEY(7, 1, CORGI_KEY_EXOK),
+        KEY(7, 2, CORGI_KEY_EXCANCEL),
+        KEY(7, 3, CORGI_KEY_EXJOGDOWN),
+        KEY(7, 4, CORGI_KEY_EXJOGUP),
+};
+
+static struct matrix_keymap_data corgikbd_keymap_data = {
+        .keymap         = corgikbd_keymap,
+        .keymap_size    = ARRAY_SIZE(corgikbd_keymap),
+};
+
+static const int corgikbd_row_gpios[] =
+                { 58, 59, 60, 61, 62, 63, 64, 65 };
+static const int corgikbd_col_gpios[] =
+                { 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77 };
+
+static struct matrix_keypad_platform_data corgikbd_pdata = {
+        .keymap_data            = &corgikbd_keymap_data,
+        .row_gpios              = corgikbd_row_gpios,
+        .col_gpios              = corgikbd_col_gpios,
+        .num_row_gpios          = ARRAY_SIZE(corgikbd_row_gpios),
+        .num_col_gpios          = ARRAY_SIZE(corgikbd_col_gpios),
+        .col_scan_delay_us      = 10,
+        .debounce_ms            = 10,
+        .wakeup                 = 1,
+};
+
 static struct platform_device corgikbd_device = {
-        .name           = "corgi-keyboard",
+        .name           = "matrix-keypad",
         .id             = -1,
+        .dev            = {
+                .platform_data = &corgikbd_pdata,
+        },
 };
 
 /*
@@ -307,111 +436,20 @@ static struct platform_device corgiled_device = {
  * The card detect interrupt isn't debounced so we delay it by 250ms
  * to give the card a chance to fully insert/eject.
  */
-static struct pxamci_platform_data corgi_mci_platform_data;
-
-static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, void *data)
-{
-        int err;
-
-        err = gpio_request(CORGI_GPIO_nSD_DETECT, "nSD_DETECT");
-        if (err)
-                goto err_out;
-
-        err = gpio_request(CORGI_GPIO_nSD_WP, "nSD_WP");
-        if (err)
-                goto err_free_1;
-
-        err = gpio_request(CORGI_GPIO_SD_PWR, "SD_PWR");
-        if (err)
-                goto err_free_2;
-
-        gpio_direction_input(CORGI_GPIO_nSD_DETECT);
-        gpio_direction_input(CORGI_GPIO_nSD_WP);
-        gpio_direction_output(CORGI_GPIO_SD_PWR, 0);
-
-        corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
-
-        err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int,
-                                IRQF_DISABLED | IRQF_TRIGGER_RISING |
-                                IRQF_TRIGGER_FALLING,
-                                "MMC card detect", data);
-        if (err) {
-                pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
-                                __func__);
-                goto err_free_3;
-        }
-        return 0;
-
-err_free_3:
-        gpio_free(CORGI_GPIO_SD_PWR);
-err_free_2:
-        gpio_free(CORGI_GPIO_nSD_WP);
-err_free_1:
-        gpio_free(CORGI_GPIO_nSD_DETECT);
-err_out:
-        return err;
-}
-
-static void corgi_mci_setpower(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data* p_d = dev->platform_data;
-
-        gpio_set_value(CORGI_GPIO_SD_PWR, ((1 << vdd) & p_d->ocr_mask));
-}
-
-static int corgi_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(CORGI_GPIO_nSD_WP);
-}
-
-static void corgi_mci_exit(struct device *dev, void *data)
-{
-        free_irq(CORGI_IRQ_GPIO_nSD_DETECT, data);
-        gpio_free(CORGI_GPIO_SD_PWR);
-        gpio_free(CORGI_GPIO_nSD_WP);
-        gpio_free(CORGI_GPIO_nSD_DETECT);
-}
-
 static struct pxamci_platform_data corgi_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = corgi_mci_init,
-        .get_ro         = corgi_mci_get_ro,
-        .setpower       = corgi_mci_setpower,
-        .exit           = corgi_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = CORGI_GPIO_nSD_WP,
+        .gpio_power             = CORGI_GPIO_SD_PWR,
 };
 
 
 /*
  * Irda
  */
-static void corgi_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(CORGI_GPIO_IR_ON, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
-static int corgi_irda_startup(struct device *dev)
-{
-        int err;
-
-        err = gpio_request(CORGI_GPIO_IR_ON, "IR_ON");
-        if (err)
-                return err;
-
-        gpio_direction_output(CORGI_GPIO_IR_ON, 1);
-        return 0;
-}
-
-static void corgi_irda_shutdown(struct device *dev)
-{
-        gpio_free(CORGI_GPIO_IR_ON);
-}
-
 static struct pxaficp_platform_data corgi_ficp_platform_data = {
+        .gpio_pwdown            = CORGI_GPIO_IR_ON,
         .transceiver_cap        = IR_SIRMODE | IR_OFF,
-        .transceiver_mode       = corgi_irda_transceiver_mode,
-        .startup                = corgi_irda_startup,
-        .shutdown               = corgi_irda_shutdown,
 };
 
 
@@ -636,6 +674,7 @@ static void __init corgi_init(void)
         corgi_init_spi();
 
         pxa_set_udc_info(&udc_info);
+        corgi_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&corgi_mci_platform_data);
         pxa_set_ficp_info(&corgi_ficp_platform_data);
         pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 7d3e1b46e550..79141f862728 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -130,61 +130,17 @@ static struct pxamci_platform_data csb726_mci_data;
 static int csb726_mci_init(struct device *dev,
                 irq_handler_t detect, void *data)
 {
-        int err;
-
         csb726_mci_data.detect_delay = msecs_to_jiffies(500);
-
-        err = gpio_request(CSB726_GPIO_MMC_DETECT, "MMC detect");
-        if (err)
-                goto err_det_req;
-
-        err = gpio_direction_input(CSB726_GPIO_MMC_DETECT);
-        if (err)
-                goto err_det_dir;
-
-        err = gpio_request(CSB726_GPIO_MMC_RO, "MMC ro");
-        if (err)
-                goto err_ro_req;
-
-        err = gpio_direction_input(CSB726_GPIO_MMC_RO);
-        if (err)
-                goto err_ro_dir;
-
-        err = request_irq(gpio_to_irq(CSB726_GPIO_MMC_DETECT), detect,
-                        IRQF_DISABLED, "MMC card detect", data);
-        if (err)
-                goto err_irq;
-
         return 0;
-
-err_irq:
-err_ro_dir:
-        gpio_free(CSB726_GPIO_MMC_RO);
-err_ro_req:
-err_det_dir:
-        gpio_free(CSB726_GPIO_MMC_DETECT);
-err_det_req:
-        return err;
-}
-
-static int csb726_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(CSB726_GPIO_MMC_RO);
-}
-
-static void csb726_mci_exit(struct device *dev, void *data)
-{
-        free_irq(gpio_to_irq(CSB726_GPIO_MMC_DETECT), data);
-        gpio_free(CSB726_GPIO_MMC_RO);
-        gpio_free(CSB726_GPIO_MMC_DETECT);
 }
 
 static struct pxamci_platform_data csb726_mci = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = csb726_mci_init,
-        .get_ro         = csb726_mci_get_ro,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init                   = csb726_mci_init,
         /* FIXME setpower */
-        .exit           = csb726_mci_exit,
+        .gpio_card_detect       = CSB726_GPIO_MMC_DETECT,
+        .gpio_card_ro           = CSB726_GPIO_MMC_RO,
+        .gpio_power             = -1,
 };
 
 static struct pxaohci_platform_data csb726_ohci_platform_data = {
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index ecc08f360b68..46fabe1cca11 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -935,6 +935,33 @@ void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
 {
         pxa_register_device(&pxa3xx_device_nand, info);
 }
+
+static struct resource pxa3xx_resources_gcu[] = {
+        {
+                .start  = 0x54000000,
+                .end    = 0x54000fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = IRQ_GCU,
+                .end    = IRQ_GCU,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device pxa3xx_device_gcu = {
+        .name           = "pxa3xx-gcu",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pxa3xx_resources_gcu),
+        .resource       = pxa3xx_resources_gcu,
+        .dev            = {
+                .dma_mask = &pxa3xx_gcu_dmamask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+};
+
 #endif /* CONFIG_PXA3xx */
 
 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index ecc24a4dca6d..93817d99761e 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -35,4 +35,6 @@ extern struct platform_device pxa27x_device_pwm1;
 extern struct platform_device pxa3xx_device_nand;
 extern struct platform_device pxa3xx_device_i2c_power;
 
+extern struct platform_device pxa3xx_device_gcu;
+
 void __init pxa_register_device(struct platform_device *dev, void *data);
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index a36fc17f671d..49acdfa6650d 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -199,7 +199,6 @@ static void __init e740_init(void)
         platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e7xx_udc_mach_info);
         pxa_set_ac97_info(NULL);
-        e7xx_irda_init();
         pxa_set_ficp_info(&e7xx_ficp_platform_data);
 }
 
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index 1d00110590e5..4052ece3ef49 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -200,7 +200,6 @@ static void __init e750_init(void)
         platform_add_devices(devices, ARRAY_SIZE(devices));
         pxa_set_udc_info(&e7xx_udc_mach_info);
         pxa_set_ac97_info(NULL);
-        e7xx_irda_init();
         pxa_set_ficp_info(&e7xx_ficp_platform_data);
 }
 
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 9cd09465a0e8..aec7f4214b14 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -646,13 +646,16 @@ static int em_x270_mci_get_ro(struct device *dev)
 }
 
 static struct pxamci_platform_data em_x270_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23|
-                          MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
-                          MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
-                          MMC_VDD_30_31|MMC_VDD_31_32,
-        .init           = em_x270_mci_init,
-        .setpower       = em_x270_mci_setpower,
-        .exit           = em_x270_mci_exit,
+        .ocr_mask               = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23|
+                                  MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27|
+                                  MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
+                                  MMC_VDD_30_31|MMC_VDD_31_32,
+        .init                   = em_x270_mci_init,
+        .setpower               = em_x270_mci_setpower,
+        .exit                   = em_x270_mci_exit,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 static void __init em_x270_init_mmc(void)
@@ -1022,22 +1025,32 @@ static int em_x270_sensor_power(struct device *dev, int on)
         return 0;
 }
 
-static struct soc_camera_link iclink = {
-        .bus_id = 0,
-        .power = em_x270_sensor_power,
-};
-
 static struct i2c_board_info em_x270_i2c_cam_info[] = {
         {
                 I2C_BOARD_INFO("mt9m111", 0x48),
+        },
+};
+
+static struct soc_camera_link iclink = {
+        .bus_id         = 0,
+        .power          = em_x270_sensor_power,
+        .board_info     = &em_x270_i2c_cam_info[0],
+        .i2c_adapter_id = 0,
+        .module_name    = "mt9m111",
+};
+
+static struct platform_device em_x270_camera = {
+        .name   = "soc-camera-pdrv",
+        .id     = -1,
+        .dev    = {
                 .platform_data = &iclink,
         },
 };
 
 static void  __init em_x270_init_camera(void)
 {
-        i2c_register_board_info(0, ARRAY_AND_SIZE(em_x270_i2c_cam_info));
         pxa_set_camera_info(&em_x270_camera_platform_data);
+        platform_device_register(&em_x270_camera);
 }
 #else
 static inline void em_x270_init_camera(void) {}
@@ -1103,6 +1116,7 @@ REGULATOR_CONSUMER(ldo5, NULL, "vcc cam");
 REGULATOR_CONSUMER(ldo10, &pxa_device_mci.dev, "vcc sdio");
 REGULATOR_CONSUMER(ldo12, NULL, "vcc usb");
 REGULATOR_CONSUMER(ldo19, &em_x270_gprs_userspace_consumer.dev, "vcc gprs");
+REGULATOR_CONSUMER(buck2, NULL, "vcc_core");
 
 #define REGULATOR_INIT(_ldo, _min_uV, _max_uV, _ops_mask)               \
         static struct regulator_init_data _ldo##_data = {               \
@@ -1125,6 +1139,7 @@ REGULATOR_INIT(ldo10, 2000000, 3200000,
                REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE);
 REGULATOR_INIT(ldo12, 3000000, 3000000, REGULATOR_CHANGE_STATUS);
 REGULATOR_INIT(ldo19, 3200000, 3200000, REGULATOR_CHANGE_STATUS);
+REGULATOR_INIT(buck2, 1000000, 1650000, REGULATOR_CHANGE_VOLTAGE);
 
 struct led_info em_x270_led_info = {
         .name = "em-x270:orange",
@@ -1194,6 +1209,8 @@ struct da903x_subdev_info em_x270_da9030_subdevs[] = {
         DA9030_LDO(12),
         DA9030_LDO(19),
 
+        DA9030_SUBDEV(regulator, BUCK2, &buck2_data),
+
         DA9030_SUBDEV(led, LED_PC, &em_x270_led_info),
         DA9030_SUBDEV(backlight, WLED, &em_x270_led_info),
         DA9030_SUBDEV(battery, BAT, &em_x270_batterty_info),
@@ -1245,7 +1262,6 @@ static void __init em_x270_init_i2c(void)
 
 static void __init em_x270_module_init(void)
 {
-        pr_info("%s\n", __func__);
         pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config));
 
         mmc_cd = GPIO13_MMC_CD;
@@ -1257,7 +1273,6 @@ static void __init em_x270_module_init(void)
 
 static void __init em_x270_exeda_init(void)
 {
-        pr_info("%s\n", __func__);
         pxa2xx_mfp_config(ARRAY_AND_SIZE(exeda_pin_config));
 
         mmc_cd = GPIO114_MMC_CD;
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index c60dadf847a6..91417f035069 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -47,44 +47,9 @@ struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
         .gpio_pullup_inverted = 1
 };
 
-static void e7xx_irda_transceiver_mode(struct device *dev, int mode)
-{
-        if (mode & IR_OFF) {
-                gpio_set_value(GPIO_E7XX_IR_OFF, 1);
-                pxa2xx_transceiver_mode(dev, mode);
-        } else {
-                pxa2xx_transceiver_mode(dev, mode);
-                gpio_set_value(GPIO_E7XX_IR_OFF, 0);
-        }
-}
-
-int e7xx_irda_init(void)
-{
-        int ret;
-
-        ret = gpio_request(GPIO_E7XX_IR_OFF, "IrDA power");
-        if (ret)
-                goto out;
-
-        ret = gpio_direction_output(GPIO_E7XX_IR_OFF, 0);
-        if (ret)
-                goto out;
-
-        e7xx_irda_transceiver_mode(NULL, IR_SIRMODE | IR_OFF);
-out:
-        return ret;
-}
-
-static void e7xx_irda_shutdown(struct device *dev)
-{
-        e7xx_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF);
-        gpio_free(GPIO_E7XX_IR_OFF);
-}
-
 struct pxaficp_platform_data e7xx_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_OFF,
-        .transceiver_mode = e7xx_irda_transceiver_mode,
-        .shutdown = e7xx_irda_shutdown,
+        .gpio_pwdown            = GPIO_E7XX_IR_OFF,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 int eseries_tmio_enable(struct platform_device *dev)
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index ca9912ea78d9..1708c0109844 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -88,7 +88,10 @@ static struct platform_device *devices[] __initdata = {
 
 #ifdef CONFIG_MMC_PXA
 static struct pxamci_platform_data gumstix_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 static void __init gumstix_mmc_init(void)
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 81359d574f88..abff9e132749 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -45,6 +45,7 @@
 #include <mach/irda.h>
 #include <mach/pxa2xx_spi.h>
 
+#include <video/platform_lcd.h>
 #include <video/w100fb.h>
 
 #include "devices.h"
@@ -174,14 +175,9 @@ static int hx4700_gpio_request(struct gpio_ress *gpios, int size)
  * IRDA
  */
 
-static void irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO105_HX4700_nIR_ON, mode & IR_OFF);
-}
-
 static struct pxaficp_platform_data ficp_info = {
-        .transceiver_cap  = IR_SIRMODE | IR_OFF,
-        .transceiver_mode = irda_transceiver_mode,
+        .gpio_pwdown            = GPIO105_HX4700_nIR_ON,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 /*
@@ -368,8 +364,6 @@ static struct platform_device egpio = {
  * LCD - Sony display connected to ATI Imageon w3220
  */
 
-static int lcd_power;
-
 static void sony_lcd_init(void)
 {
         gpio_set_value(GPIO84_HX4700_LCD_SQN, 1);
@@ -410,35 +404,6 @@ static void sony_lcd_off(void)
         gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
 }
 
-static int hx4700_lcd_set_power(struct lcd_device *ldev, int level)
-{
-        switch (level) {
-        case FB_BLANK_UNBLANK:
-                sony_lcd_init();
-                break;
-        case FB_BLANK_NORMAL:
-        case FB_BLANK_VSYNC_SUSPEND:
-        case FB_BLANK_HSYNC_SUSPEND:
-        case FB_BLANK_POWERDOWN:
-                sony_lcd_off();
-                break;
-        }
-        lcd_power = level;
-        return 0;
-}
-
-static int hx4700_lcd_get_power(struct lcd_device *lm)
-{
-        return lcd_power;
-}
-
-static struct lcd_ops hx4700_lcd_ops = {
-        .get_power = hx4700_lcd_get_power,
-        .set_power = hx4700_lcd_set_power,
-};
-
-static struct lcd_device *hx4700_lcd_device;
-
 #ifdef CONFIG_PM
 static void w3220_lcd_suspend(struct w100fb_par *wfb)
 {
@@ -573,6 +538,27 @@ static struct platform_device w3220 = {
         .resource      = w3220_resources,
 };
 
+static void hx4700_lcd_set_power(struct plat_lcd_data *pd, unsigned int power)
+{
+        if (power)
+                sony_lcd_init();
+        else
+                sony_lcd_off();
+}
+
+static struct plat_lcd_data hx4700_lcd_data = {
+        .set_power = hx4700_lcd_set_power,
+};
+
+static struct platform_device hx4700_lcd = {
+        .name = "platform-lcd",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &hx4700_lcd_data,
+                .parent        = &w3220.dev,
+        },
+};
+
 /*
  * Backlight
  */
@@ -872,9 +858,6 @@ static void __init hx4700_init(void)
         pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
         spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
 
-        hx4700_lcd_device = lcd_device_register("w100fb", NULL,
-                                        (void *)&w3220_info, &hx4700_lcd_ops);
-
         gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0);
         mdelay(10);
         gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index b6243b59d9be..b6486ef20b17 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -168,7 +168,10 @@ static struct pxafb_mach_info sharp_lm8v31 = {
 };
 
 static struct pxamci_platform_data idp_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 static void __init idp_init(void)
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index 961807dc6467..2a4945db31c5 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -389,6 +389,9 @@ static int imote2_mci_get_ro(struct device *dev)
 static struct pxamci_platform_data imote2_mci_platform_data = {
         .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* default anyway */
         .get_ro = imote2_mci_get_ro,
+        .gpio_card_detect = -1,
+        .gpio_card_ro   = -1,
+        .gpio_power = -1,
 };
 
 static struct mtd_partition imote2flash_partitions[] = {
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
new file mode 100644
index 000000000000..bfec09b1814b
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -0,0 +1,134 @@
+/*
+ *  linux/include/asm-arm/arch-pxa/balloon3.h
+ *
+ *  Authors:    Nick Bane and Wookey
+ *  Created:    Oct, 2005
+ *  Copyright:  Toby Churchill Ltd
+ *  Cribbed from mainstone.c, by Nicholas Pitre
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ASM_ARCH_BALLOON3_H
+#define ASM_ARCH_BALLOON3_H
+
+enum balloon3_features {
+        BALLOON3_FEATURE_OHCI,
+        BALLOON3_FEATURE_MMC,
+        BALLOON3_FEATURE_CF,
+        BALLOON3_FEATURE_AUDIO,
+        BALLOON3_FEATURE_TOPPOLY,
+};
+
+#define BALLOON3_FPGA_PHYS      PXA_CS4_PHYS
+#define BALLOON3_FPGA_VIRT      (0xf1000000)    /* as per balloon2 */
+#define BALLOON3_FPGA_LENGTH    0x01000000
+
+/* FPGA/CPLD registers */
+#define BALLOON3_PCMCIA0_REG            (BALLOON3_FPGA_VIRT + 0x00e00008)
+/* fixme - same for now */
+#define BALLOON3_PCMCIA1_REG            (BALLOON3_FPGA_VIRT + 0x00e00008)
+#define BALLOON3_NANDIO_IO_REG          (BALLOON3_FPGA_VIRT + 0x00e00000)
+/* fpga/cpld interrupt control register */
+#define BALLOON3_INT_CONTROL_REG        (BALLOON3_FPGA_VIRT + 0x00e0000C)
+#define BALLOON3_NANDIO_CTL2_REG        (BALLOON3_FPGA_VIRT + 0x00e00010)
+#define BALLOON3_NANDIO_CTL_REG         (BALLOON3_FPGA_VIRT + 0x00e00014)
+#define BALLOON3_VERSION_REG            (BALLOON3_FPGA_VIRT + 0x00e0001c)
+
+#define BALLOON3_SAMOSA_ADDR_REG        (BALLOON3_FPGA_VIRT + 0x00c00000)
+#define BALLOON3_SAMOSA_DATA_REG        (BALLOON3_FPGA_VIRT + 0x00c00004)
+#define BALLOON3_SAMOSA_STATUS_REG      (BALLOON3_FPGA_VIRT + 0x00c0001c)
+
+/* GPIOs for irqs */
+#define BALLOON3_GPIO_AUX_NIRQ          (94)
+#define BALLOON3_GPIO_CODEC_IRQ         (95)
+
+/* Timer and Idle LED locations */
+#define BALLOON3_GPIO_LED_NAND          (9)
+#define BALLOON3_GPIO_LED_IDLE          (10)
+
+/* backlight control */
+#define BALLOON3_GPIO_RUN_BACKLIGHT     (99)
+
+#define BALLOON3_GPIO_S0_CD             (105)
+
+/* FPGA Interrupt Mask/Acknowledge Register */
+#define BALLOON3_INT_S0_IRQ             (1 << 0)  /* PCMCIA 0 IRQ */
+#define BALLOON3_INT_S0_STSCHG          (1 << 1)  /* PCMCIA 0 status changed */
+
+/* CF Status Register */
+#define BALLOON3_PCMCIA_nIRQ            (1 << 0)  /* IRQ / ready signal */
+#define BALLOON3_PCMCIA_nSTSCHG_BVD1    (1 << 1)
+                                        /* VDD sense / card status changed */
+
+/* CF control register (write) */
+#define BALLOON3_PCMCIA_RESET           (1 << 0)   /* Card reset signal */
+#define BALLOON3_PCMCIA_ENABLE          (1 << 1)
+#define BALLOON3_PCMCIA_ADD_ENABLE      (1 << 2)
+
+/* CPLD (and FPGA) interface definitions */
+#define CPLD_LCD0_DATA_SET             0x00
+#define CPLD_LCD0_DATA_CLR             0x10
+#define CPLD_LCD0_COMMAND_SET          0x01
+#define CPLD_LCD0_COMMAND_CLR          0x11
+#define CPLD_LCD1_DATA_SET             0x02
+#define CPLD_LCD1_DATA_CLR             0x12
+#define CPLD_LCD1_COMMAND_SET          0x03
+#define CPLD_LCD1_COMMAND_CLR          0x13
+
+#define CPLD_MISC_SET                  0x07
+#define CPLD_MISC_CLR                  0x17
+#define CPLD_MISC_LOON_NRESET_BIT      0
+#define CPLD_MISC_LOON_UNSUSP_BIT      1
+#define CPLD_MISC_RUN_5V_BIT           2
+#define CPLD_MISC_CHG_D0_BIT           3
+#define CPLD_MISC_CHG_D1_BIT           4
+#define CPLD_MISC_DAC_NCS_BIT          5
+
+#define CPLD_LCD_SET                   0x08
+#define CPLD_LCD_CLR                   0x18
+#define CPLD_LCD_BACKLIGHT_EN_0_BIT    0
+#define CPLD_LCD_BACKLIGHT_EN_1_BIT    1
+#define CPLD_LCD_LED_RED_BIT           4
+#define CPLD_LCD_LED_GREEN_BIT         5
+#define CPLD_LCD_NRESET_BIT            7
+
+#define CPLD_LCD_RO_SET                0x09
+#define CPLD_LCD_RO_CLR                0x19
+#define CPLD_LCD_RO_LCD0_nWAIT_BIT     0
+#define CPLD_LCD_RO_LCD1_nWAIT_BIT     1
+
+#define CPLD_SERIAL_SET                0x0a
+#define CPLD_SERIAL_CLR                0x1a
+#define CPLD_SERIAL_GSM_RI_BIT         0
+#define CPLD_SERIAL_GSM_CTS_BIT        1
+#define CPLD_SERIAL_GSM_DTR_BIT        2
+#define CPLD_SERIAL_LPR_CTS_BIT        3
+#define CPLD_SERIAL_TC232_CTS_BIT      4
+#define CPLD_SERIAL_TC232_DSR_BIT      5
+
+#define CPLD_SROUTING_SET              0x0b
+#define CPLD_SROUTING_CLR              0x1b
+#define CPLD_SROUTING_MSP430_LPR       0
+#define CPLD_SROUTING_MSP430_TC232     1
+#define CPLD_SROUTING_MSP430_GSM       2
+#define CPLD_SROUTING_LOON_LPR         (0 << 4)
+#define CPLD_SROUTING_LOON_TC232       (1 << 4)
+#define CPLD_SROUTING_LOON_GSM         (2 << 4)
+
+#define CPLD_AROUTING_SET              0x0c
+#define CPLD_AROUTING_CLR              0x1c
+#define CPLD_AROUTING_MIC2PHONE_BIT    0
+#define CPLD_AROUTING_PHONE2INT_BIT    1
+#define CPLD_AROUTING_PHONE2EXT_BIT    2
+#define CPLD_AROUTING_LOONL2INT_BIT    3
+#define CPLD_AROUTING_LOONL2EXT_BIT    4
+#define CPLD_AROUTING_LOONR2PHONE_BIT  5
+#define CPLD_AROUTING_LOONR2INT_BIT    6
+#define CPLD_AROUTING_LOONR2EXT_BIT    7
+
+extern int balloon3_has(enum balloon3_features feature);
+
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index a88d7caff0d1..811743c56147 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -23,6 +23,12 @@ static inline void colibri_pxa3xx_init_lcd(int bl_pin) {}
 extern void colibri_pxa3xx_init_eth(struct ax_plat_data *plat_data);
 #endif
 
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+extern void colibri_pxa3xx_init_nand(void);
+#else
+static inline void colibri_pxa3xx_init_nand(void) {}
+#endif
+
 /* physical memory regions */
 #define COLIBRI_SDRAM_BASE      0xa0000000      /* SDRAM region */
 
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S
index f6b4bf3e73d2..241880608ac6 100644
--- a/arch/arm/mach-pxa/include/mach/entry-macro.S
+++ b/arch/arm/mach-pxa/include/mach/entry-macro.S
@@ -24,34 +24,27 @@
                 mov     \tmp, \tmp, lsr #13
                 and     \tmp, \tmp, #0x7                @ Core G
                 cmp     \tmp, #1
-                bhi     1004f
+                bhi     1002f
 
+                @ Core Generation 1 (PXA25x)
                 mov     \base, #io_p2v(0x40000000)      @ IIR Ctl = 0x40d00000
                 add     \base, \base, #0x00d00000
                 ldr     \irqstat, [\base, #0]           @ ICIP
                 ldr     \irqnr, [\base, #4]             @ ICMR
-                b       1002f
 
-1004:
-                mrc     p6, 0, \irqstat, c6, c0, 0      @ ICIP2
-                mrc     p6, 0, \irqnr, c7, c0, 0        @ ICMR2
                 ands    \irqnr, \irqstat, \irqnr
-                beq     1003f
+                beq     1001f
                 rsb     \irqstat, \irqnr, #0
                 and     \irqstat, \irqstat, \irqnr
                 clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #31
-                add     \irqnr, \irqnr, #(32 + PXA_IRQ(0))
+                rsb     \irqnr, \irqnr, #(31 + PXA_IRQ(0))
                 b       1001f
-1003:
-                mrc     p6, 0, \irqstat, c0, c0, 0      @ ICIP
-                mrc     p6, 0, \irqnr, c1, c0, 0        @ ICMR
 1002:
-                ands    \irqnr, \irqstat, \irqnr
+                @ Core Generation 2 (PXA27x) or Core Generation 3 (PXA3xx)
+                mrc     p6, 0, \irqstat, c5, c0, 0      @ ICHP
+                tst     \irqstat, #0x80000000
                 beq     1001f
-                rsb     \irqstat, \irqnr, #0
-                and     \irqstat, \irqstat, \irqnr
-                clz     \irqnr, \irqstat
-                rsb     \irqnr, \irqnr, #(31 + PXA_IRQ(0))
+                bic     \irqstat, \irqstat, #0x80000000
+                mov     \irqnr, \irqstat, lsr #16
 1001:
                 .endm
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 16ab79547dae..aa3d9f70a08a 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -197,6 +197,16 @@
 #define __cpu_is_pxa935(id)     (0)
 #endif
 
+#ifdef CONFIG_CPU_PXA950
+#define __cpu_is_pxa950(id)                             \
+        ({                                              \
+                unsigned int _id = (id) >> 4 & 0xfff;   \
+                id == 0x697;                            \
+         })
+#else
+#define __cpu_is_pxa950(id)     (0)
+#endif
+
 #define cpu_is_pxa210()                                 \
         ({                                              \
                 __cpu_is_pxa210(read_cpuid_id());       \
@@ -249,6 +259,13 @@
                 __cpu_is_pxa935(id);                    \
          })
 
+#define cpu_is_pxa950()                                 \
+        ({                                              \
+                unsigned int id = read_cpuid(CPUID_ID); \
+                __cpu_is_pxa950(id);                    \
+         })
+
+
 /*
  * CPUID Core Generation Bit
  * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
diff --git a/arch/arm/mach-pxa/include/mach/irda.h b/arch/arm/mach-pxa/include/mach/irda.h
index 0a50c3c763df..3cd41f77dda4 100644
--- a/arch/arm/mach-pxa/include/mach/irda.h
+++ b/arch/arm/mach-pxa/include/mach/irda.h
@@ -12,6 +12,8 @@ struct pxaficp_platform_data {
         void (*transceiver_mode)(struct device *dev, int mode);
         int (*startup)(struct device *dev);
         void (*shutdown)(struct device *dev);
+        int gpio_pwdown;                /* powerdown GPIO for the IrDA chip */
+        bool gpio_pwdown_inverted;      /* gpio_pwdown is inverted */
 };
 
 extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 6a1d95993342..3677a9af9c87 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -68,9 +68,10 @@
 #ifdef CONFIG_PXA3xx
 #define IRQ_SSP4        PXA_IRQ(13)     /* SSP4 service request */
 #define IRQ_CIR         PXA_IRQ(34)     /* Consumer IR */
+#define IRQ_COMM_WDT    PXA_IRQ(35)     /* Comm WDT interrupt */
 #define IRQ_TSI         PXA_IRQ(36)     /* Touch Screen Interface (PXA320) */
 #define IRQ_USIM2       PXA_IRQ(38)     /* USIM2 Controller */
-#define IRQ_GRPHICS     PXA_IRQ(39)     /* Graphics Controller */
+#define IRQ_GCU         PXA_IRQ(39)     /* Graphics Controller */
 #define IRQ_MMC2        PXA_IRQ(41)     /* MMC2 Controller */
 #define IRQ_1WIRE       PXA_IRQ(44)     /* 1-Wire Controller */
 #define IRQ_NAND        PXA_IRQ(45)     /* NAND Controller */
@@ -81,8 +82,31 @@
 #define IRQ_MMC3        PXA_IRQ(55)     /* MMC3 Controller (PXA310) */
 #endif
 
-#define PXA_GPIO_IRQ_BASE       PXA_IRQ(64)
-#define PXA_GPIO_IRQ_NUM        (128)
+#ifdef CONFIG_CPU_PXA935
+#define IRQ_U2O         PXA_IRQ(64)     /* USB OTG 2.0 Controller (PXA935) */
+#define IRQ_U2H         PXA_IRQ(65)     /* USB Host 2.0 Controller (PXA935) */
+
+#define IRQ_MMC3_PXA935 PXA_IRQ(72)     /* MMC3 Controller (PXA935) */
+#define IRQ_MMC4_PXA935 PXA_IRQ(73)     /* MMC4 Controller (PXA935) */
+#define IRQ_MMC5_PXA935 PXA_IRQ(74)     /* MMC5 Controller (PXA935) */
+
+#define IRQ_U2P         PXA_IRQ(93)     /* USB PHY D+/D- Lines (PXA935) */
+#endif
+
+#ifdef CONFIG_CPU_PXA930
+#define IRQ_ENHROT      PXA_IRQ(37)     /* Enhanced Rotary (PXA930) */
+#define IRQ_ACIPC0      PXA_IRQ(5)
+#define IRQ_ACIPC1      PXA_IRQ(40)
+#define IRQ_ACIPC2      PXA_IRQ(19)
+#define IRQ_TRKBALL     PXA_IRQ(43)     /* Track Ball */
+#endif
+
+#ifdef CONFIG_CPU_PXA950
+#define IRQ_GC500       PXA_IRQ(70)     /* Graphics Controller (PXA950) */
+#endif
+
+#define PXA_GPIO_IRQ_BASE       PXA_IRQ(96)
+#define PXA_GPIO_IRQ_NUM        (192)
 
 #define GPIO_2_x_TO_IRQ(x)      (PXA_GPIO_IRQ_BASE + (x))
 #define IRQ_GPIO(x)     (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
@@ -105,6 +129,8 @@
 #define IRQ_BOARD_END           (IRQ_BOARD_START + 70)
 #elif defined(CONFIG_MACH_ZYLONITE)
 #define IRQ_BOARD_END           (IRQ_BOARD_START + 32)
+#elif defined(CONFIG_PXA_EZX)
+#define IRQ_BOARD_END           (IRQ_BOARD_START + 23)
 #else
 #define IRQ_BOARD_END           (IRQ_BOARD_START + 16)
 #endif
@@ -237,6 +263,16 @@
 #define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
 #define MAINSTONE_S1_IRQ        MAINSTONE_IRQ(15)
 
+/* Balloon3 Interrupts */
+#define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
+
+#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
+#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
+
+#define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
+#define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
+#define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
+
 /* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
 #define IRQ_LOCOMO_KEY_BASE     (IRQ_BOARD_START + 0)
 #define IRQ_LOCOMO_GPIO_BASE    (IRQ_BOARD_START + 1)
diff --git a/arch/arm/mach-pxa/include/mach/mfp.h b/arch/arm/mach-pxa/include/mach/mfp.h
index 482185053a92..271e249ae34f 100644
--- a/arch/arm/mach-pxa/include/mach/mfp.h
+++ b/arch/arm/mach-pxa/include/mach/mfp.h
@@ -16,305 +16,6 @@
 #ifndef __ASM_ARCH_MFP_H
 #define __ASM_ARCH_MFP_H
 
-#define mfp_to_gpio(m)  ((m) % 128)
-
-/* list of all the configurable MFP pins */
-enum {
-        MFP_PIN_INVALID = -1,
-
-        MFP_PIN_GPIO0 = 0,
-        MFP_PIN_GPIO1,
-        MFP_PIN_GPIO2,
-        MFP_PIN_GPIO3,
-        MFP_PIN_GPIO4,
-        MFP_PIN_GPIO5,
-        MFP_PIN_GPIO6,
-        MFP_PIN_GPIO7,
-        MFP_PIN_GPIO8,
-        MFP_PIN_GPIO9,
-        MFP_PIN_GPIO10,
-        MFP_PIN_GPIO11,
-        MFP_PIN_GPIO12,
-        MFP_PIN_GPIO13,
-        MFP_PIN_GPIO14,
-        MFP_PIN_GPIO15,
-        MFP_PIN_GPIO16,
-        MFP_PIN_GPIO17,
-        MFP_PIN_GPIO18,
-        MFP_PIN_GPIO19,
-        MFP_PIN_GPIO20,
-        MFP_PIN_GPIO21,
-        MFP_PIN_GPIO22,
-        MFP_PIN_GPIO23,
-        MFP_PIN_GPIO24,
-        MFP_PIN_GPIO25,
-        MFP_PIN_GPIO26,
-        MFP_PIN_GPIO27,
-        MFP_PIN_GPIO28,
-        MFP_PIN_GPIO29,
-        MFP_PIN_GPIO30,
-        MFP_PIN_GPIO31,
-        MFP_PIN_GPIO32,
-        MFP_PIN_GPIO33,
-        MFP_PIN_GPIO34,
-        MFP_PIN_GPIO35,
-        MFP_PIN_GPIO36,
-        MFP_PIN_GPIO37,
-        MFP_PIN_GPIO38,
-        MFP_PIN_GPIO39,
-        MFP_PIN_GPIO40,
-        MFP_PIN_GPIO41,
-        MFP_PIN_GPIO42,
-        MFP_PIN_GPIO43,
-        MFP_PIN_GPIO44,
-        MFP_PIN_GPIO45,
-        MFP_PIN_GPIO46,
-        MFP_PIN_GPIO47,
-        MFP_PIN_GPIO48,
-        MFP_PIN_GPIO49,
-        MFP_PIN_GPIO50,
-        MFP_PIN_GPIO51,
-        MFP_PIN_GPIO52,
-        MFP_PIN_GPIO53,
-        MFP_PIN_GPIO54,
-        MFP_PIN_GPIO55,
-        MFP_PIN_GPIO56,
-        MFP_PIN_GPIO57,
-        MFP_PIN_GPIO58,
-        MFP_PIN_GPIO59,
-        MFP_PIN_GPIO60,
-        MFP_PIN_GPIO61,
-        MFP_PIN_GPIO62,
-        MFP_PIN_GPIO63,
-        MFP_PIN_GPIO64,
-        MFP_PIN_GPIO65,
-        MFP_PIN_GPIO66,
-        MFP_PIN_GPIO67,
-        MFP_PIN_GPIO68,
-        MFP_PIN_GPIO69,
-        MFP_PIN_GPIO70,
-        MFP_PIN_GPIO71,
-        MFP_PIN_GPIO72,
-        MFP_PIN_GPIO73,
-        MFP_PIN_GPIO74,
-        MFP_PIN_GPIO75,
-        MFP_PIN_GPIO76,
-        MFP_PIN_GPIO77,
-        MFP_PIN_GPIO78,
-        MFP_PIN_GPIO79,
-        MFP_PIN_GPIO80,
-        MFP_PIN_GPIO81,
-        MFP_PIN_GPIO82,
-        MFP_PIN_GPIO83,
-        MFP_PIN_GPIO84,
-        MFP_PIN_GPIO85,
-        MFP_PIN_GPIO86,
-        MFP_PIN_GPIO87,
-        MFP_PIN_GPIO88,
-        MFP_PIN_GPIO89,
-        MFP_PIN_GPIO90,
-        MFP_PIN_GPIO91,
-        MFP_PIN_GPIO92,
-        MFP_PIN_GPIO93,
-        MFP_PIN_GPIO94,
-        MFP_PIN_GPIO95,
-        MFP_PIN_GPIO96,
-        MFP_PIN_GPIO97,
-        MFP_PIN_GPIO98,
-        MFP_PIN_GPIO99,
-        MFP_PIN_GPIO100,
-        MFP_PIN_GPIO101,
-        MFP_PIN_GPIO102,
-        MFP_PIN_GPIO103,
-        MFP_PIN_GPIO104,
-        MFP_PIN_GPIO105,
-        MFP_PIN_GPIO106,
-        MFP_PIN_GPIO107,
-        MFP_PIN_GPIO108,
-        MFP_PIN_GPIO109,
-        MFP_PIN_GPIO110,
-        MFP_PIN_GPIO111,
-        MFP_PIN_GPIO112,
-        MFP_PIN_GPIO113,
-        MFP_PIN_GPIO114,
-        MFP_PIN_GPIO115,
-        MFP_PIN_GPIO116,
-        MFP_PIN_GPIO117,
-        MFP_PIN_GPIO118,
-        MFP_PIN_GPIO119,
-        MFP_PIN_GPIO120,
-        MFP_PIN_GPIO121,
-        MFP_PIN_GPIO122,
-        MFP_PIN_GPIO123,
-        MFP_PIN_GPIO124,
-        MFP_PIN_GPIO125,
-        MFP_PIN_GPIO126,
-        MFP_PIN_GPIO127,
-        MFP_PIN_GPIO0_2,
-        MFP_PIN_GPIO1_2,
-        MFP_PIN_GPIO2_2,
-        MFP_PIN_GPIO3_2,
-        MFP_PIN_GPIO4_2,
-        MFP_PIN_GPIO5_2,
-        MFP_PIN_GPIO6_2,
-        MFP_PIN_GPIO7_2,
-        MFP_PIN_GPIO8_2,
-        MFP_PIN_GPIO9_2,
-        MFP_PIN_GPIO10_2,
-        MFP_PIN_GPIO11_2,
-        MFP_PIN_GPIO12_2,
-        MFP_PIN_GPIO13_2,
-        MFP_PIN_GPIO14_2,
-        MFP_PIN_GPIO15_2,
-        MFP_PIN_GPIO16_2,
-        MFP_PIN_GPIO17_2,
-
-        MFP_PIN_ULPI_STP,
-        MFP_PIN_ULPI_NXT,
-        MFP_PIN_ULPI_DIR,
-
-        MFP_PIN_nXCVREN,
-        MFP_PIN_DF_CLE_nOE,
-        MFP_PIN_DF_nADV1_ALE,
-        MFP_PIN_DF_SCLK_E,
-        MFP_PIN_DF_SCLK_S,
-        MFP_PIN_nBE0,
-        MFP_PIN_nBE1,
-        MFP_PIN_DF_nADV2_ALE,
-        MFP_PIN_DF_INT_RnB,
-        MFP_PIN_DF_nCS0,
-        MFP_PIN_DF_nCS1,
-        MFP_PIN_nLUA,
-        MFP_PIN_nLLA,
-        MFP_PIN_DF_nWE,
-        MFP_PIN_DF_ALE_nWE,
-        MFP_PIN_DF_nRE_nOE,
-        MFP_PIN_DF_ADDR0,
-        MFP_PIN_DF_ADDR1,
-        MFP_PIN_DF_ADDR2,
-        MFP_PIN_DF_ADDR3,
-        MFP_PIN_DF_IO0,
-        MFP_PIN_DF_IO1,
-        MFP_PIN_DF_IO2,
-        MFP_PIN_DF_IO3,
-        MFP_PIN_DF_IO4,
-        MFP_PIN_DF_IO5,
-        MFP_PIN_DF_IO6,
-        MFP_PIN_DF_IO7,
-        MFP_PIN_DF_IO8,
-        MFP_PIN_DF_IO9,
-        MFP_PIN_DF_IO10,
-        MFP_PIN_DF_IO11,
-        MFP_PIN_DF_IO12,
-        MFP_PIN_DF_IO13,
-        MFP_PIN_DF_IO14,
-        MFP_PIN_DF_IO15,
-
-        /* additional pins on PXA930 */
-        MFP_PIN_GSIM_UIO,
-        MFP_PIN_GSIM_UCLK,
-        MFP_PIN_GSIM_UDET,
-        MFP_PIN_GSIM_nURST,
-        MFP_PIN_PMIC_INT,
-        MFP_PIN_RDY,
-
-        MFP_PIN_MAX,
-};
-
-/*
- * a possible MFP configuration is represented by a 32-bit integer
- *
- * bit  0.. 9 - MFP Pin Number (1024 Pins Maximum)
- * bit 10..12 - Alternate Function Selection
- * bit 13..15 - Drive Strength
- * bit 16..18 - Low Power Mode State
- * bit 19..20 - Low Power Mode Edge Detection
- * bit 21..22 - Run Mode Pull State
- *
- * to facilitate the definition, the following macros are provided
- *
- * MFP_CFG_DEFAULT - default MFP configuration value, with
- *                alternate function = 0,
- *                drive strength = fast 3mA (MFP_DS03X)
- *                low power mode = default
- *                edge detection = none
- *
- * MFP_CFG      - default MFPR value with alternate function
- * MFP_CFG_DRV  - default MFPR value with alternate function and
- *                pin drive strength
- * MFP_CFG_LPM  - default MFPR value with alternate function and
- *                low power mode
- * MFP_CFG_X    - default MFPR value with alternate function,
- *                pin drive strength and low power mode
- */
-
-typedef unsigned long mfp_cfg_t;
-
-#define MFP_PIN(x)              ((x) & 0x3ff)
-
-#define MFP_AF0                 (0x0 << 10)
-#define MFP_AF1                 (0x1 << 10)
-#define MFP_AF2                 (0x2 << 10)
-#define MFP_AF3                 (0x3 << 10)
-#define MFP_AF4                 (0x4 << 10)
-#define MFP_AF5                 (0x5 << 10)
-#define MFP_AF6                 (0x6 << 10)
-#define MFP_AF7                 (0x7 << 10)
-#define MFP_AF_MASK             (0x7 << 10)
-#define MFP_AF(x)               (((x) >> 10) & 0x7)
-
-#define MFP_DS01X               (0x0 << 13)
-#define MFP_DS02X               (0x1 << 13)
-#define MFP_DS03X               (0x2 << 13)
-#define MFP_DS04X               (0x3 << 13)
-#define MFP_DS06X               (0x4 << 13)
-#define MFP_DS08X               (0x5 << 13)
-#define MFP_DS10X               (0x6 << 13)
-#define MFP_DS13X               (0x7 << 13)
-#define MFP_DS_MASK             (0x7 << 13)
-#define MFP_DS(x)               (((x) >> 13) & 0x7)
-
-#define MFP_LPM_DEFAULT         (0x0 << 16)
-#define MFP_LPM_DRIVE_LOW       (0x1 << 16)
-#define MFP_LPM_DRIVE_HIGH      (0x2 << 16)
-#define MFP_LPM_PULL_LOW        (0x3 << 16)
-#define MFP_LPM_PULL_HIGH       (0x4 << 16)
-#define MFP_LPM_FLOAT           (0x5 << 16)
-#define MFP_LPM_INPUT           (0x6 << 16)
-#define MFP_LPM_STATE_MASK      (0x7 << 16)
-#define MFP_LPM_STATE(x)        (((x) >> 16) & 0x7)
-
-#define MFP_LPM_EDGE_NONE       (0x0 << 19)
-#define MFP_LPM_EDGE_RISE       (0x1 << 19)
-#define MFP_LPM_EDGE_FALL       (0x2 << 19)
-#define MFP_LPM_EDGE_BOTH       (0x3 << 19)
-#define MFP_LPM_EDGE_MASK       (0x3 << 19)
-#define MFP_LPM_EDGE(x)         (((x) >> 19) & 0x3)
-
-#define MFP_PULL_NONE           (0x0 << 21)
-#define MFP_PULL_LOW            (0x1 << 21)
-#define MFP_PULL_HIGH           (0x2 << 21)
-#define MFP_PULL_BOTH           (0x3 << 21)
-#define MFP_PULL_MASK           (0x3 << 21)
-#define MFP_PULL(x)             (((x) >> 21) & 0x3)
-
-#define MFP_CFG_DEFAULT         (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
-                                 MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
-
-#define MFP_CFG(pin, af)                \
-        ((MFP_CFG_DEFAULT & ~MFP_AF_MASK) |\
-         (MFP_PIN(MFP_PIN_##pin) | MFP_##af))
-
-#define MFP_CFG_DRV(pin, af, drv)       \
-        ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK)) |\
-         (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv))
-
-#define MFP_CFG_LPM(pin, af, lpm)       \
-        ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_LPM_STATE_MASK)) |\
-         (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_LPM_##lpm))
-
-#define MFP_CFG_X(pin, af, drv, lpm)    \
-        ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
-         (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
+#include <plat/mfp.h>
 
 #endif /* __ASM_ARCH_MFP_H */
diff --git a/arch/arm/mach-pxa/include/mach/mmc.h b/arch/arm/mach-pxa/include/mach/mmc.h
index 6d1304c9270f..02a69dc2ee63 100644
--- a/arch/arm/mach-pxa/include/mach/mmc.h
+++ b/arch/arm/mach-pxa/include/mach/mmc.h
@@ -14,6 +14,11 @@ struct pxamci_platform_data {
         int (*get_ro)(struct device *);
         void (*setpower)(struct device *, unsigned int);
         void (*exit)(struct device *, void *);
+        int gpio_card_detect;                   /* gpio detecting card insertion */
+        int gpio_card_ro;                       /* gpio detecting read only toggle */
+        bool gpio_card_ro_invert;               /* gpio ro is inverted */
+        int gpio_power;                         /* gpio powering up MMC bus */
+        bool gpio_power_invert;                 /* gpio power is inverted */
 };
 
 extern void pxa_set_mci_info(struct pxamci_platform_data *info);
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
new file mode 100644
index 000000000000..3dc9b074ab46
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -0,0 +1,86 @@
+/*
+ * linux/include/asm-arm/arch-pxa/palmtc-gpio.h
+ *
+ * GPIOs and interrupts for Palm Tungsten|C Handheld Computer
+ *
+ * Authors:     Alex Osborne <bobofdoom@gmail.com>
+ *              Marek Vasut <marek.vasut@gmail.com>
+ *              Holger Bocklet <bitz.email@gmx.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _INCLUDE_PALMTC_H_
+#define _INCLUDE_PALMTC_H_
+
+/** HERE ARE GPIOs **/
+
+/* GPIOs */
+#define GPIO_NR_PALMTC_EARPHONE_DETECT  2
+#define GPIO_NR_PALMTC_CRADLE_DETECT    5
+#define GPIO_NR_PALMTC_HOTSYNC_BUTTON   7
+
+/* SD/MMC */
+#define GPIO_NR_PALMTC_SD_DETECT_N      12
+#define GPIO_NR_PALMTC_SD_POWER         32
+#define GPIO_NR_PALMTC_SD_READONLY      54
+
+/* WLAN */
+#define GPIO_NR_PALMTC_PCMCIA_READY     13
+#define GPIO_NR_PALMTC_PCMCIA_PWRREADY  14
+#define GPIO_NR_PALMTC_PCMCIA_POWER1    15
+#define GPIO_NR_PALMTC_PCMCIA_POWER2    33
+#define GPIO_NR_PALMTC_PCMCIA_POWER3    55
+#define GPIO_NR_PALMTC_PCMCIA_RESET     78
+
+/* UDC */
+#define GPIO_NR_PALMTC_USB_DETECT_N     4
+#define GPIO_NR_PALMTC_USB_POWER        36
+
+/* LCD/BACKLIGHT */
+#define GPIO_NR_PALMTC_BL_POWER         16
+#define GPIO_NR_PALMTC_LCD_POWER        44
+#define GPIO_NR_PALMTC_LCD_BLANK        38
+
+/* UART */
+#define GPIO_NR_PALMTC_RS232_POWER      37
+
+/* IRDA */
+#define GPIO_NR_PALMTC_IR_DISABLE       45
+
+/* IRQs */
+#define IRQ_GPIO_PALMTC_SD_DETECT_N     IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N)
+#define IRQ_GPIO_PALMTC_WLAN_READY      IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY)
+
+/* UCB1400 GPIOs */
+#define GPIO_NR_PALMTC_POWER_DETECT     (0x80 | 0x00)
+#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01)
+#define GPIO_NR_PALMTC_SPEAKER_ENABLE   (0x80 | 0x03)
+#define GPIO_NR_PALMTC_VIBRA_POWER      (0x80 | 0x05)
+#define GPIO_NR_PALMTC_LED_POWER        (0x80 | 0x07)
+
+/** HERE ARE INIT VALUES **/
+#define PALMTC_UCB1400_GPIO_OFFSET      0x80
+
+/* BATTERY */
+#define PALMTC_BAT_MAX_VOLTAGE          4000    /* 4.00V maximum voltage */
+#define PALMTC_BAT_MIN_VOLTAGE          3550    /* 3.55V critical voltage */
+#define PALMTC_BAT_MAX_CURRENT          0       /* unknokn */
+#define PALMTC_BAT_MIN_CURRENT          0       /* unknown */
+#define PALMTC_BAT_MAX_CHARGE           1       /* unknown */
+#define PALMTC_BAT_MIN_CHARGE           1       /* unknown */
+#define PALMTC_MAX_LIFE_MINS            240     /* on-life in minutes */
+
+#define PALMTC_BAT_MEASURE_DELAY        (HZ * 1)
+
+/* BACKLIGHT */
+#define PALMTC_MAX_INTENSITY            0xFE
+#define PALMTC_DEFAULT_INTENSITY        0x7E
+#define PALMTC_LIMIT_MASK               0x7F
+#define PALMTC_PRESCALER                0x3F
+#define PALMTC_PERIOD_NS                3500
+
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index e74082c872e1..1be0db6ed55e 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -82,6 +82,11 @@
 #define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS    /* ChipSelect 0 */
 #define PALMTX_PHYS_NAND_START  PXA_CS1_PHYS    /* ChipSelect 1 */
 
+#define PALMTX_NAND_ALE_PHYS    (PALMTX_PHYS_NAND_START | (1 << 24))
+#define PALMTX_NAND_CLE_PHYS    (PALMTX_PHYS_NAND_START | (1 << 25))
+#define PALMTX_NAND_ALE_VIRT    0xff100000
+#define PALMTX_NAND_CLE_VIRT    0xff200000
+
 /* TOUCHSCREEN */
 #define AC97_LINK_FRAME                 21
 
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index 7d1a059b3d43..e91d63cfe811 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -208,7 +208,7 @@
 #define CKEN_MVED       43      /* < MVED clock enable */
 
 /* Note: GCU clock enable bit differs on PXA300/PXA310 and PXA320 */
-#define PXA300_CKEN_GRAPHICS    42      /* Graphics controller clock enable */
-#define PXA320_CKEN_GRAPHICS    7       /* Graphics controller clock enable */
+#define CKEN_PXA300_GCU         42      /* Graphics controller clock enable */
+#define CKEN_PXA320_GCU         7       /* Graphics controller clock enable */
 
 #endif /* __ASM_ARCH_PXA3XX_REGS_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 6932720ba04e..f73061c90b5e 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -118,7 +118,8 @@ struct pxafb_mach_info {
         u_int           fixed_modes:1,
                         cmap_inverse:1,
                         cmap_static:1,
-                        unused:29;
+                        acceleration_enabled:1,
+                        unused:28;
 
         /* The following should be defined in LCCR0
          *      LCCR0_Act or LCCR0_Pas          Active or Passive
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h
index ad23e74b762f..68464ce1c1ea 100644
--- a/arch/arm/mach-pxa/include/mach/regs-intc.h
+++ b/arch/arm/mach-pxa/include/mach/regs-intc.h
@@ -13,6 +13,7 @@
 #define ICFP            __REG(0x40D0000C)  /* Interrupt Controller FIQ Pending Register */
 #define ICPR            __REG(0x40D00010)  /* Interrupt Controller Pending Register */
 #define ICCR            __REG(0x40D00014)  /* Interrupt Controller Control Register */
+#define ICHP            __REG(0x40D00018)  /* Interrupt Controller Highest Priority Register */
 
 #define ICIP2           __REG(0x40D0009C)  /* Interrupt Controller IRQ Pending Register 2 */
 #define ICMR2           __REG(0x40D000A0)  /* Interrupt Controller Mask Register 2 */
@@ -20,4 +21,14 @@
 #define ICFP2           __REG(0x40D000A8)  /* Interrupt Controller FIQ Pending Register 2 */
 #define ICPR2           __REG(0x40D000AC)  /* Interrupt Controller Pending Register 2 */
 
+#define ICIP3           __REG(0x40D00130)  /* Interrupt Controller IRQ Pending Register 3 */
+#define ICMR3           __REG(0x40D00134)  /* Interrupt Controller Mask Register 3 */
+#define ICLR3           __REG(0x40D00138)  /* Interrupt Controller Level Register 3 */
+#define ICFP3           __REG(0x40D0013C)  /* Interrupt Controller FIQ Pending Register 3 */
+#define ICPR3           __REG(0x40D00140)  /* Interrupt Controller Pending Register 3 */
+
+#define IPR(x)          __REG(0x40D0001C + (x < 32 ? (x << 2)           \
+                                : (x < 64 ? (0x94 + ((x - 32) << 2))    \
+                                : (0x128 + ((x - 64) << 2)))))
+
 #endif /* __ASM_MACH_REGS_INTC_H */
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index b54749413e96..237734b5b1be 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -37,7 +37,7 @@ static inline void arch_decomp_setup(void)
 {
         if (machine_is_littleton() || machine_is_intelmote2()
             || machine_is_csb726() || machine_is_stargate2()
-            || machine_is_cm_x300())
+            || machine_is_cm_x300() || machine_is_balloon3())
                 UART = STUART;
 }
 
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index f6e0300e4f64..d694ce289668 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -120,7 +120,7 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
 
 void __init pxa_init_irq(int irq_nr, set_wake_t fn)
 {
-        int irq;
+        int irq, i;
 
         pxa_internal_irq_nr = irq_nr;
 
@@ -129,6 +129,12 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
                 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */
         }
 
+        /* initialize interrupt priority */
+        if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
+                for (i = 0; i < irq_nr; i++)
+                        IPR(i) = i | (1 << 31);
+        }
+
         /* only unmasked interrupts kick us out of idle */
         ICCR = 1;
 
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 55b3788fd1ae..13848955d133 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -265,45 +265,12 @@ static inline void littleton_init_keypad(void) {}
 #endif
 
 #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
-static int littleton_mci_init(struct device *dev,
-                              irq_handler_t littleton_detect_int, void *data)
-{
-        int err, gpio_cd = GPIO_MMC1_CARD_DETECT;
-
-        err = gpio_request(gpio_cd, "mmc card detect");
-        if (err)
-                goto err_request_cd;
-
-        gpio_direction_input(gpio_cd);
-
-        err = request_irq(gpio_to_irq(gpio_cd), littleton_detect_int,
-                          IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
-                          "mmc card detect", data);
-        if (err) {
-                dev_err(dev, "failed to request card detect IRQ\n");
-                goto err_request_irq;
-        }
-        return 0;
-
-err_request_irq:
-        gpio_free(gpio_cd);
-err_request_cd:
-        return err;
-}
-
-static void littleton_mci_exit(struct device *dev, void *data)
-{
-        int gpio_cd = GPIO_MMC1_CARD_DETECT;
-
-        free_irq(gpio_to_irq(gpio_cd), data);
-        gpio_free(gpio_cd);
-}
-
 static struct pxamci_platform_data littleton_mci_platform_data = {
-        .detect_delay   = 20,
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .init           = littleton_mci_init,
-        .exit           = littleton_mci_exit,
+        .detect_delay           = 20,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO_MMC1_CARD_DETECT,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 static void __init littleton_init_mmc(void)
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index f04c8333dff7..c6a94d3fdd61 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -482,11 +482,14 @@ static void lubbock_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data lubbock_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .detect_delay   = 1,
-        .init           = lubbock_mci_init,
-        .get_ro         = lubbock_mci_get_ro,
-        .exit           = lubbock_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .detect_delay           = 1,
+        .init                   = lubbock_mci_init,
+        .get_ro                 = lubbock_mci_get_ro,
+        .exit                   = lubbock_mci_exit,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
@@ -504,8 +507,9 @@ static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
 }
 
 static struct pxaficp_platform_data lubbock_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_FIRMODE,
-        .transceiver_mode = lubbock_irda_transceiver_mode,
+        .gpio_pwdown            = -1,
+        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE,
+        .transceiver_mode       = lubbock_irda_transceiver_mode,
 };
 
 static void __init lubbock_init(void)
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index ca39669cffc5..5360c07f5138 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -140,15 +140,9 @@ static unsigned long magician_pin_config[] __initdata = {
  * IRDA
  */
 
-static void magician_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO83_MAGICIAN_nIR_EN, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
 static struct pxaficp_platform_data magician_ficp_info = {
-        .transceiver_cap  = IR_SIRMODE | IR_OFF,
-        .transceiver_mode = magician_irda_transceiver_mode,
+        .gpio_pwdown            = GPIO83_MAGICIAN_nIR_EN,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 /*
@@ -651,55 +645,24 @@ static struct platform_device bq24022 = {
 static int magician_mci_init(struct device *dev,
                                 irq_handler_t detect_irq, void *data)
 {
-        int err;
-
-        err = request_irq(IRQ_MAGICIAN_SD, detect_irq,
+        return request_irq(IRQ_MAGICIAN_SD, detect_irq,
                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
-                                "MMC card detect", data);
-        if (err)
-                goto err_request_irq;
-        err = gpio_request(EGPIO_MAGICIAN_SD_POWER, "SD_POWER");
-        if (err)
-                goto err_request_power;
-        err = gpio_request(EGPIO_MAGICIAN_nSD_READONLY, "nSD_READONLY");
-        if (err)
-                goto err_request_readonly;
-
-        return 0;
-
-err_request_readonly:
-        gpio_free(EGPIO_MAGICIAN_SD_POWER);
-err_request_power:
-        free_irq(IRQ_MAGICIAN_SD, data);
-err_request_irq:
-        return err;
-}
-
-static void magician_mci_setpower(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *pdata = dev->platform_data;
-
-        gpio_set_value(EGPIO_MAGICIAN_SD_POWER, (1 << vdd) & pdata->ocr_mask);
-}
-
-static int magician_mci_get_ro(struct device *dev)
-{
-        return (!gpio_get_value(EGPIO_MAGICIAN_nSD_READONLY));
+                                "mmc card detect", data);
 }
 
 static void magician_mci_exit(struct device *dev, void *data)
 {
-        gpio_free(EGPIO_MAGICIAN_nSD_READONLY);
-        gpio_free(EGPIO_MAGICIAN_SD_POWER);
         free_irq(IRQ_MAGICIAN_SD, data);
 }
 
 static struct pxamci_platform_data magician_mci_info = {
-        .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init     = magician_mci_init,
-        .get_ro   = magician_mci_get_ro,
-        .setpower = magician_mci_setpower,
-        .exit     = magician_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init                   = magician_mci_init,
+        .exit                   = magician_mci_exit,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = EGPIO_MAGICIAN_nSD_READONLY,
+        .gpio_card_ro_invert    = 1,
+        .gpio_power             = EGPIO_MAGICIAN_SD_POWER,
 };
 
 
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f4dabf0273ca..a4eeae345e64 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -450,10 +450,13 @@ static void mainstone_mci_exit(struct device *dev, void *data)
 }
 
 static struct pxamci_platform_data mainstone_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = mainstone_mci_init,
-        .setpower       = mainstone_mci_setpower,
-        .exit           = mainstone_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init                   = mainstone_mci_init,
+        .setpower               = mainstone_mci_setpower,
+        .exit                   = mainstone_mci_exit,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
@@ -476,8 +479,9 @@ static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
 }
 
 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
-        .transceiver_mode = mainstone_irda_transceiver_mode,
+        .gpio_pwdown            = -1,
+        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
+        .transceiver_mode       = mainstone_irda_transceiver_mode,
 };
 
 static struct gpio_keys_button gpio_keys_button[] = {
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 2d28132c725b..3cab452e5567 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -434,72 +434,15 @@ struct gpio_vbus_mach_info gpio_vbus_data = {
 /*
  * SDIO/MMC Card controller
  */
-static void mci_setpower(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-
-        if ((1 << vdd) & p_d->ocr_mask)
-                gpio_set_value(GPIO91_SDIO_EN, 1);      /* enable SDIO power */
-        else
-                gpio_set_value(GPIO91_SDIO_EN, 0);      /* disable SDIO power */
-}
-
-static int mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO78_SDIO_RO);
-}
-
-struct gpio_ress mci_gpios[] = {
-        MIO_GPIO_IN(GPIO78_SDIO_RO,     "SDIO readonly detect"),
-        MIO_GPIO_IN(GPIO15_SDIO_INSERT, "SDIO insertion detect"),
-        MIO_GPIO_OUT(GPIO91_SDIO_EN, 0, "SDIO power enable")
-};
-
-static void mci_exit(struct device *dev, void *data)
-{
-        mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
-        free_irq(gpio_to_irq(GPIO15_SDIO_INSERT), data);
-}
-
-static struct pxamci_platform_data mioa701_mci_info;
-
 /**
  * The card detect interrupt isn't debounced so we delay it by 250ms
  * to give the card a chance to fully insert/eject.
  */
-static int mci_init(struct device *dev, irq_handler_t detect_int, void *data)
-{
-        int rc;
-        int irq = gpio_to_irq(GPIO15_SDIO_INSERT);
-
-        rc = mio_gpio_request(ARRAY_AND_SIZE(mci_gpios));
-        if (rc)
-                goto err_gpio;
-        /* enable RE/FE interrupt on card insertion and removal */
-        rc = request_irq(irq, detect_int,
-                         IRQF_DISABLED | IRQF_TRIGGER_RISING |
-                         IRQF_TRIGGER_FALLING,
-                         "MMC card detect", data);
-        if (rc)
-                goto err_irq;
-
-        mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
-        return 0;
-
-err_irq:
-        dev_err(dev, "mioa701_mci_init: MMC/SD:"
-                " can't request MMC card detect IRQ\n");
-        mio_gpio_free(ARRAY_AND_SIZE(mci_gpios));
-err_gpio:
-        return rc;
-}
-
 static struct pxamci_platform_data mioa701_mci_info = {
-        .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .init     = mci_init,
-        .get_ro   = mci_get_ro,
-        .setpower = mci_setpower,
-        .exit     = mci_exit,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO15_SDIO_INSERT,
+        .gpio_card_ro           = GPIO78_SDIO_RO,
+        .gpio_power             = GPIO91_SDIO_EN,
 };
 
 /* FlashRAM */
@@ -765,19 +708,20 @@ static struct i2c_board_info __initdata mioa701_pi2c_devices[] = {
         },
 };
 
-static struct soc_camera_link iclink = {
-        .bus_id = 0, /* Must match id in pxa27x_device_camera in device.c */
-};
-
 /* Board I2C devices. */
 static struct i2c_board_info __initdata mioa701_i2c_devices[] = {
         {
-                /* Must initialize before the camera(s) */
                 I2C_BOARD_INFO("mt9m111", 0x5d),
-                .platform_data = &iclink,
         },
 };
 
+static struct soc_camera_link iclink = {
+        .bus_id         = 0, /* Match id in pxa27x_device_camera in device.c */
+        .board_info     = &mioa701_i2c_devices[0],
+        .i2c_adapter_id = 0,
+        .module_name    = "mt9m111",
+};
+
 struct i2c_pxa_platform_data i2c_pdata = {
         .fast_mode = 1,
 };
@@ -811,6 +755,7 @@ MIO_SIMPLE_DEV(pxa2xx_pcm,	  "pxa2xx-pcm",	    NULL)
 MIO_SIMPLE_DEV(mioa701_sound,     "mioa701-wm9713", NULL)
 MIO_SIMPLE_DEV(mioa701_board,     "mioa701-board",  NULL)
 MIO_SIMPLE_DEV(gpio_vbus,         "gpio-vbus",      &gpio_vbus_data);
+MIO_SIMPLE_DEV(mioa701_camera,    "soc-camera-pdrv",&iclink);
 
 static struct platform_device *devices[] __initdata = {
         &mioa701_gpio_keys,
@@ -821,6 +766,7 @@ static struct platform_device *devices[] __initdata = {
         &power_dev,
         &strataflash,
         &gpio_vbus,
+        &mioa701_camera,
         &mioa701_board,
 };
 
@@ -841,7 +787,7 @@ static void mioa701_restart(char c, const char *cmd)
 static struct gpio_ress global_gpios[] = {
         MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"),
         MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
-        MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
+        MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power"),
 };
 
 static void __init mioa701_machine_init(void)
@@ -855,6 +801,7 @@ static void __init mioa701_machine_init(void)
         mio_gpio_request(ARRAY_AND_SIZE(global_gpios));
         bootstrap_init();
         set_pxa_fb_info(&mioa701_pxafb_info);
+        mioa701_mci_info.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&mioa701_mci_info);
         pxa_set_keypad_info(&mioa701_keypad_info);
         wm97xx_bat_set_pdata(&mioa701_battery_data);
@@ -869,7 +816,6 @@ static void __init mioa701_machine_init(void)
         pxa_set_i2c_info(&i2c_pdata);
         pxa27x_set_i2c_power_info(NULL);
         pxa_set_camera_info(&mioa701_pxacamera_platform_data);
-        i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices));
 }
 
 static void mioa701_machine_exit(void)
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 169fcc18154e..1ad029dd4438 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -25,6 +25,9 @@
 #include <linux/wm97xx_batt.h>
 #include <linux/power_supply.h>
 #include <linux/sysdev.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -141,85 +144,50 @@ static unsigned long palmld_pin_config[] __initdata = {
 };
 
 /******************************************************************************
- * SD/MMC card controller
+ * NOR Flash
  ******************************************************************************/
-static int palmld_mci_init(struct device *dev, irq_handler_t palmld_detect_int,
-                                void *data)
-{
-        int err = 0;
-
-        /* Setup an interrupt for detecting card insert/remove events */
-        err = gpio_request(GPIO_NR_PALMLD_SD_DETECT_N, "SD IRQ");
-        if (err)
-                goto err;
-        err = gpio_direction_input(GPIO_NR_PALMLD_SD_DETECT_N);
-        if (err)
-                goto err2;
-        err = request_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N),
-                        palmld_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
-                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-                        "SD/MMC card detect", data);
-        if (err) {
-                printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
-                                __func__);
-                goto err2;
+static struct mtd_partition palmld_partitions[] = {
+        {
+                .name           = "Flash",
+                .offset         = 0x00000000,
+                .size           = MTDPART_SIZ_FULL,
+                .mask_flags     = 0
         }
+};
 
-        err = gpio_request(GPIO_NR_PALMLD_SD_POWER, "SD_POWER");
-        if (err)
-                goto err3;
-        err = gpio_direction_output(GPIO_NR_PALMLD_SD_POWER, 0);
-        if (err)
-                goto err4;
-
-        err = gpio_request(GPIO_NR_PALMLD_SD_READONLY, "SD_READONLY");
-        if (err)
-                goto err4;
-        err = gpio_direction_input(GPIO_NR_PALMLD_SD_READONLY);
-        if (err)
-                goto err5;
-
-        printk(KERN_DEBUG "%s: irq registered\n", __func__);
-
-        return 0;
-
-err5:
-        gpio_free(GPIO_NR_PALMLD_SD_READONLY);
-err4:
-        gpio_free(GPIO_NR_PALMLD_SD_POWER);
-err3:
-        free_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N), data);
-err2:
-        gpio_free(GPIO_NR_PALMLD_SD_DETECT_N);
-err:
-        return err;
-}
-
-static void palmld_mci_exit(struct device *dev, void *data)
-{
-        gpio_free(GPIO_NR_PALMLD_SD_READONLY);
-        gpio_free(GPIO_NR_PALMLD_SD_POWER);
-        free_irq(gpio_to_irq(GPIO_NR_PALMLD_SD_DETECT_N), data);
-        gpio_free(GPIO_NR_PALMLD_SD_DETECT_N);
-}
+static struct physmap_flash_data palmld_flash_data[] = {
+        {
+                .width          = 2,                    /* bankwidth in bytes */
+                .parts          = palmld_partitions,
+                .nr_parts       = ARRAY_SIZE(palmld_partitions)
+        }
+};
 
-static void palmld_mci_power(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-        gpio_set_value(GPIO_NR_PALMLD_SD_POWER, p_d->ocr_mask & (1 << vdd));
-}
+static struct resource palmld_flash_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_4M - 1,
+        .flags  = IORESOURCE_MEM,
+};
 
-static int palmld_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO_NR_PALMLD_SD_READONLY);
-}
+static struct platform_device palmld_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .resource       = &palmld_flash_resource,
+        .num_resources  = 1,
+        .dev            = {
+                .platform_data = palmld_flash_data,
+        },
+};
 
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
 static struct pxamci_platform_data palmld_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .setpower       = palmld_mci_power,
-        .get_ro         = palmld_mci_get_ro,
-        .init           = palmld_mci_init,
-        .exit           = palmld_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO_NR_PALMLD_SD_DETECT_N,
+        .gpio_card_ro           = GPIO_NR_PALMLD_SD_READONLY,
+        .gpio_power             = GPIO_NR_PALMLD_SD_POWER,
+        .detect_delay           = 20,
 };
 
 /******************************************************************************
@@ -336,35 +304,9 @@ static struct platform_device palmld_backlight = {
 /******************************************************************************
  * IrDA
  ******************************************************************************/
-static int palmld_irda_startup(struct device *dev)
-{
-        int err;
-        err = gpio_request(GPIO_NR_PALMLD_IR_DISABLE, "IR DISABLE");
-        if (err)
-                goto err;
-        err = gpio_direction_output(GPIO_NR_PALMLD_IR_DISABLE, 1);
-        if (err)
-                gpio_free(GPIO_NR_PALMLD_IR_DISABLE);
-err:
-        return err;
-}
-
-static void palmld_irda_shutdown(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMLD_IR_DISABLE);
-}
-
-static void palmld_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO_NR_PALMLD_IR_DISABLE, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
 static struct pxaficp_platform_data palmld_ficp_platform_data = {
-        .startup                = palmld_irda_startup,
-        .shutdown               = palmld_irda_shutdown,
-        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
-        .transceiver_mode       = palmld_irda_transceiver_mode,
+        .gpio_pwdown            = GPIO_NR_PALMLD_IR_DISABLE,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 /******************************************************************************
@@ -560,6 +502,7 @@ static struct platform_device *devices[] __initdata = {
         &power_supply,
         &palmld_asoc,
         &palmld_hdd,
+        &palmld_flash,
 };
 
 static struct map_desc palmld_io_desc[] __initdata = {
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 33f726ff55e5..2dd7ce28556b 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -124,83 +124,12 @@ static unsigned long palmt5_pin_config[] __initdata = {
 /******************************************************************************
  * SD/MMC card controller
  ******************************************************************************/
-static int palmt5_mci_init(struct device *dev, irq_handler_t palmt5_detect_int,
-                                void *data)
-{
-        int err = 0;
-
-        /* Setup an interrupt for detecting card insert/remove events */
-        err = gpio_request(GPIO_NR_PALMT5_SD_DETECT_N, "SD IRQ");
-        if (err)
-                goto err;
-        err = gpio_direction_input(GPIO_NR_PALMT5_SD_DETECT_N);
-        if (err)
-                goto err2;
-        err = request_irq(gpio_to_irq(GPIO_NR_PALMT5_SD_DETECT_N),
-                        palmt5_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
-                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-                        "SD/MMC card detect", data);
-        if (err) {
-                printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
-                                __func__);
-                goto err2;
-        }
-
-        err = gpio_request(GPIO_NR_PALMT5_SD_POWER, "SD_POWER");
-        if (err)
-                goto err3;
-        err = gpio_direction_output(GPIO_NR_PALMT5_SD_POWER, 0);
-        if (err)
-                goto err4;
-
-        err = gpio_request(GPIO_NR_PALMT5_SD_READONLY, "SD_READONLY");
-        if (err)
-                goto err4;
-        err = gpio_direction_input(GPIO_NR_PALMT5_SD_READONLY);
-        if (err)
-                goto err5;
-
-        printk(KERN_DEBUG "%s: irq registered\n", __func__);
-
-        return 0;
-
-err5:
-        gpio_free(GPIO_NR_PALMT5_SD_READONLY);
-err4:
-        gpio_free(GPIO_NR_PALMT5_SD_POWER);
-err3:
-        free_irq(gpio_to_irq(GPIO_NR_PALMT5_SD_DETECT_N), data);
-err2:
-        gpio_free(GPIO_NR_PALMT5_SD_DETECT_N);
-err:
-        return err;
-}
-
-static void palmt5_mci_exit(struct device *dev, void *data)
-{
-        gpio_free(GPIO_NR_PALMT5_SD_READONLY);
-        gpio_free(GPIO_NR_PALMT5_SD_POWER);
-        free_irq(IRQ_GPIO_PALMT5_SD_DETECT_N, data);
-        gpio_free(GPIO_NR_PALMT5_SD_DETECT_N);
-}
-
-static void palmt5_mci_power(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-        gpio_set_value(GPIO_NR_PALMT5_SD_POWER, p_d->ocr_mask & (1 << vdd));
-}
-
-static int palmt5_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO_NR_PALMT5_SD_READONLY);
-}
-
 static struct pxamci_platform_data palmt5_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .setpower       = palmt5_mci_power,
-        .get_ro         = palmt5_mci_get_ro,
-        .init           = palmt5_mci_init,
-        .exit           = palmt5_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO_NR_PALMT5_SD_DETECT_N,
+        .gpio_card_ro           = GPIO_NR_PALMT5_SD_READONLY,
+        .gpio_power             = GPIO_NR_PALMT5_SD_POWER,
+        .detect_delay           = 20,
 };
 
 /******************************************************************************
@@ -314,35 +243,9 @@ static struct platform_device palmt5_backlight = {
 /******************************************************************************
  * IrDA
  ******************************************************************************/
-static int palmt5_irda_startup(struct device *dev)
-{
-        int err;
-        err = gpio_request(GPIO_NR_PALMT5_IR_DISABLE, "IR DISABLE");
-        if (err)
-                goto err;
-        err = gpio_direction_output(GPIO_NR_PALMT5_IR_DISABLE, 1);
-        if (err)
-                gpio_free(GPIO_NR_PALMT5_IR_DISABLE);
-err:
-        return err;
-}
-
-static void palmt5_irda_shutdown(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMT5_IR_DISABLE);
-}
-
-static void palmt5_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO_NR_PALMT5_IR_DISABLE, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
 static struct pxaficp_platform_data palmt5_ficp_platform_data = {
-        .startup                = palmt5_irda_startup,
-        .shutdown               = palmt5_irda_shutdown,
-        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
-        .transceiver_mode       = palmt5_irda_transceiver_mode,
+        .gpio_pwdown            = GPIO_NR_PALMT5_IR_DISABLE,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 /******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
new file mode 100644
index 000000000000..bb2cc0dd44ec
--- /dev/null
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -0,0 +1,436 @@
+/*
+ * linux/arch/arm/mach-pxa/palmtc.c
+ *
+ * Support for the Palm Tungsten|C
+ *
+ * Author:      Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Based on work of:
+ *              Petr Blaha <p3t3@centrum.cz>
+ *              Chetan S. Kumar <shivakumar.chetan@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/input.h>
+#include <linux/pwm_backlight.h>
+#include <linux/gpio.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/ucb1400.h>
+#include <linux/power_supply.h>
+#include <linux/gpio_keys.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/audio.h>
+#include <mach/palmtc.h>
+#include <mach/mmc.h>
+#include <mach/pxafb.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/irda.h>
+#include <mach/udc.h>
+#include <mach/pxa2xx-regs.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static unsigned long palmtc_pin_config[] __initdata = {
+        /* MMC */
+        GPIO6_MMC_CLK,
+        GPIO8_MMC_CS0,
+        GPIO12_GPIO,    /* detect */
+        GPIO32_GPIO,    /* power */
+        GPIO54_GPIO,    /* r/o switch */
+
+        /* PCMCIA */
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO49_nPWE,
+        GPIO48_nPOE,
+        GPIO52_nPCE_1,
+        GPIO53_nPCE_2,
+        GPIO57_nIOIS16,
+        GPIO56_nPWAIT,
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
+        /* IrDA */
+        GPIO45_GPIO,    /* ir disable */
+        GPIO46_FICP_RXD,
+        GPIO47_FICP_TXD,
+
+        /* PWM */
+        GPIO17_PWM1_OUT,
+
+        /* USB */
+        GPIO4_GPIO,     /* detect */
+        GPIO36_GPIO,    /* pullup */
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        /* MATRIX KEYPAD */
+        GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,       /* in 0 */
+        GPIO9_GPIO | WAKEUP_ON_EDGE_BOTH,       /* in 1 */
+        GPIO10_GPIO | WAKEUP_ON_EDGE_BOTH,      /* in 2 */
+        GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH,      /* in 3 */
+        GPIO18_GPIO | MFP_LPM_DRIVE_LOW,        /* out 0 */
+        GPIO19_GPIO | MFP_LPM_DRIVE_LOW,        /* out 1 */
+        GPIO20_GPIO | MFP_LPM_DRIVE_LOW,        /* out 2 */
+        GPIO21_GPIO | MFP_LPM_DRIVE_LOW,        /* out 3 */
+        GPIO22_GPIO | MFP_LPM_DRIVE_LOW,        /* out 4 */
+        GPIO23_GPIO | MFP_LPM_DRIVE_LOW,        /* out 5 */
+        GPIO24_GPIO | MFP_LPM_DRIVE_LOW,        /* out 6 */
+        GPIO25_GPIO | MFP_LPM_DRIVE_LOW,        /* out 7 */
+        GPIO26_GPIO | MFP_LPM_DRIVE_LOW,        /* out 8 */
+        GPIO27_GPIO | MFP_LPM_DRIVE_LOW,        /* out 9 */
+        GPIO79_GPIO | MFP_LPM_DRIVE_LOW,        /* out 10 */
+        GPIO80_GPIO | MFP_LPM_DRIVE_LOW,        /* out 11 */
+
+        /* PXA GPIO KEYS */
+        GPIO7_GPIO | WAKEUP_ON_EDGE_BOTH,       /* hotsync button on cradle */
+
+        /* MISC */
+        GPIO1_RST,      /* reset */
+        GPIO2_GPIO,     /* earphone detect */
+        GPIO16_GPIO,    /* backlight switch */
+};
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+static struct pxamci_platform_data palmtc_mci_platform_data = {
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_power             = GPIO_NR_PALMTC_SD_POWER,
+        .gpio_card_ro           = GPIO_NR_PALMTC_SD_READONLY,
+        .gpio_card_detect       = GPIO_NR_PALMTC_SD_DETECT_N,
+        .detect_delay           = 20,
+};
+
+/******************************************************************************
+ * GPIO keys
+ ******************************************************************************/
+static struct gpio_keys_button palmtc_pxa_buttons[] = {
+        {KEY_F8, GPIO_NR_PALMTC_HOTSYNC_BUTTON, 1, "HotSync Button", EV_KEY, 1},
+};
+
+static struct gpio_keys_platform_data palmtc_pxa_keys_data = {
+        .buttons        = palmtc_pxa_buttons,
+        .nbuttons       = ARRAY_SIZE(palmtc_pxa_buttons),
+};
+
+static struct platform_device palmtc_pxa_keys = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &palmtc_pxa_keys_data,
+        },
+};
+
+/******************************************************************************
+ * Backlight
+ ******************************************************************************/
+static int palmtc_backlight_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_NR_PALMTC_BL_POWER, "BL POWER");
+        if (ret)
+                goto err;
+        ret = gpio_direction_output(GPIO_NR_PALMTC_BL_POWER, 1);
+        if (ret)
+                goto err2;
+
+        return 0;
+
+err2:
+        gpio_free(GPIO_NR_PALMTC_BL_POWER);
+err:
+        return ret;
+}
+
+static int palmtc_backlight_notify(int brightness)
+{
+        /* backlight is on when GPIO16 AF0 is high */
+        gpio_set_value(GPIO_NR_PALMTC_BL_POWER, brightness);
+        return brightness;
+}
+
+static void palmtc_backlight_exit(struct device *dev)
+{
+        gpio_free(GPIO_NR_PALMTC_BL_POWER);
+}
+
+static struct platform_pwm_backlight_data palmtc_backlight_data = {
+        .pwm_id         = 1,
+        .max_brightness = PALMTC_MAX_INTENSITY,
+        .dft_brightness = PALMTC_MAX_INTENSITY,
+        .pwm_period_ns  = PALMTC_PERIOD_NS,
+        .init           = palmtc_backlight_init,
+        .notify         = palmtc_backlight_notify,
+        .exit           = palmtc_backlight_exit,
+};
+
+static struct platform_device palmtc_backlight = {
+        .name   = "pwm-backlight",
+        .dev    = {
+                .parent         = &pxa25x_device_pwm1.dev,
+                .platform_data  = &palmtc_backlight_data,
+        },
+};
+
+/******************************************************************************
+ * IrDA
+ ******************************************************************************/
+static struct pxaficp_platform_data palmtc_ficp_platform_data = {
+        .gpio_pwdown            = GPIO_NR_PALMTC_IR_DISABLE,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
+};
+
+/******************************************************************************
+ * Keyboard
+ ******************************************************************************/
+static const uint32_t palmtc_matrix_keys[] = {
+        KEY(0, 0, KEY_F1),
+        KEY(0, 1, KEY_X),
+        KEY(0, 2, KEY_POWER),
+        KEY(0, 3, KEY_TAB),
+        KEY(0, 4, KEY_A),
+        KEY(0, 5, KEY_Q),
+        KEY(0, 6, KEY_LEFTSHIFT),
+        KEY(0, 7, KEY_Z),
+        KEY(0, 8, KEY_S),
+        KEY(0, 9, KEY_W),
+        KEY(0, 10, KEY_E),
+        KEY(0, 11, KEY_UP),
+
+        KEY(1, 0, KEY_F2),
+        KEY(1, 1, KEY_DOWN),
+        KEY(1, 3, KEY_D),
+        KEY(1, 4, KEY_C),
+        KEY(1, 5, KEY_F),
+        KEY(1, 6, KEY_R),
+        KEY(1, 7, KEY_SPACE),
+        KEY(1, 8, KEY_V),
+        KEY(1, 9, KEY_G),
+        KEY(1, 10, KEY_T),
+        KEY(1, 11, KEY_LEFT),
+
+        KEY(2, 0, KEY_F3),
+        KEY(2, 1, KEY_LEFTCTRL),
+        KEY(2, 3, KEY_H),
+        KEY(2, 4, KEY_Y),
+        KEY(2, 5, KEY_N),
+        KEY(2, 6, KEY_J),
+        KEY(2, 7, KEY_U),
+        KEY(2, 8, KEY_M),
+        KEY(2, 9, KEY_K),
+        KEY(2, 10, KEY_I),
+        KEY(2, 11, KEY_RIGHT),
+
+        KEY(3, 0, KEY_F4),
+        KEY(3, 1, KEY_ENTER),
+        KEY(3, 3, KEY_DOT),
+        KEY(3, 4, KEY_L),
+        KEY(3, 5, KEY_O),
+        KEY(3, 6, KEY_LEFTALT),
+        KEY(3, 7, KEY_ENTER),
+        KEY(3, 8, KEY_BACKSPACE),
+        KEY(3, 9, KEY_P),
+        KEY(3, 10, KEY_B),
+        KEY(3, 11, KEY_FN),
+};
+
+const struct matrix_keymap_data palmtc_keymap_data = {
+        .keymap                 = palmtc_matrix_keys,
+        .keymap_size            = ARRAY_SIZE(palmtc_matrix_keys),
+};
+
+const static unsigned int palmtc_keypad_row_gpios[] = {
+        0, 9, 10, 11
+};
+
+const static unsigned int palmtc_keypad_col_gpios[] = {
+        18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 79, 80
+};
+
+static struct matrix_keypad_platform_data palmtc_keypad_platform_data = {
+        .keymap_data    = &palmtc_keymap_data,
+        .col_gpios      = palmtc_keypad_row_gpios,
+        .num_col_gpios  = 12,
+        .row_gpios      = palmtc_keypad_col_gpios,
+        .num_row_gpios  = 4,
+        .active_low     = 1,
+
+        .debounce_ms            = 20,
+        .col_scan_delay_us      = 5,
+};
+
+static struct platform_device palmtc_keyboard = {
+        .name   = "matrix-keypad",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &palmtc_keypad_platform_data,
+        },
+};
+
+/******************************************************************************
+ * UDC
+ ******************************************************************************/
+static struct pxa2xx_udc_mach_info palmtc_udc_info __initdata = {
+        .gpio_vbus              = GPIO_NR_PALMTC_USB_DETECT_N,
+        .gpio_vbus_inverted     = 1,
+        .gpio_pullup            = GPIO_NR_PALMTC_USB_POWER,
+};
+
+/******************************************************************************
+ * Touchscreen / Battery / GPIO-extender
+ ******************************************************************************/
+static struct platform_device palmtc_ucb1400_core = {
+        .name   = "ucb1400_core",
+        .id     = -1,
+};
+
+/******************************************************************************
+ * NOR Flash
+ ******************************************************************************/
+static struct resource palmtc_flash_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_16M - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct mtd_partition palmtc_flash_parts[] = {
+        {
+                .name   = "U-Boot Bootloader",
+                .offset = 0x0,
+                .size   = 0x40000,
+        },
+        {
+                .name   = "Linux Kernel",
+                .offset = 0x40000,
+                .size   = 0x2c0000,
+        },
+        {
+                .name   = "Filesystem",
+                .offset = 0x300000,
+                .size   = 0xcc0000,
+        },
+        {
+                .name   = "U-Boot Environment",
+                .offset = 0xfc0000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data palmtc_flash_data = {
+        .width          = 4,
+        .parts          = palmtc_flash_parts,
+        .nr_parts       = ARRAY_SIZE(palmtc_flash_parts),
+};
+
+static struct platform_device palmtc_flash = {
+        .name           = "physmap-flash",
+        .id             = -1,
+        .resource       = &palmtc_flash_resource,
+        .num_resources  = 1,
+        .dev = {
+                .platform_data  = &palmtc_flash_data,
+        },
+};
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+static struct pxafb_mode_info palmtc_lcd_modes[] = {
+{
+        .pixclock       = 115384,
+        .xres           = 320,
+        .yres           = 320,
+        .bpp            = 16,
+
+        .left_margin    = 27,
+        .right_margin   = 7,
+        .upper_margin   = 7,
+        .lower_margin   = 8,
+
+        .hsync_len      = 6,
+        .vsync_len      = 1,
+},
+};
+
+static struct pxafb_mach_info palmtc_lcd_screen = {
+        .modes                  = palmtc_lcd_modes,
+        .num_modes              = ARRAY_SIZE(palmtc_lcd_modes),
+        .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
+static struct platform_device *devices[] __initdata = {
+        &palmtc_backlight,
+        &palmtc_ucb1400_core,
+        &palmtc_keyboard,
+        &palmtc_pxa_keys,
+        &palmtc_flash,
+};
+
+static void __init palmtc_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtc_pin_config));
+
+        set_pxa_fb_info(&palmtc_lcd_screen);
+        pxa_set_mci_info(&palmtc_mci_platform_data);
+        pxa_set_udc_info(&palmtc_udc_info);
+        pxa_set_ac97_info(NULL);
+        pxa_set_ficp_info(&palmtc_ficp_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+};
+
+MACHINE_START(PALMTC, "Palm Tungsten|C")
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = palmtc_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index d823b09801df..277c4062e3c6 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -117,83 +117,11 @@ static unsigned long palmte2_pin_config[] __initdata = {
 /******************************************************************************
  * SD/MMC card controller
  ******************************************************************************/
-static int palmte2_mci_init(struct device *dev,
-                                irq_handler_t palmte2_detect_int, void *data)
-{
-        int err = 0;
-
-        /* Setup an interrupt for detecting card insert/remove events */
-        err = gpio_request(GPIO_NR_PALMTE2_SD_DETECT_N, "SD IRQ");
-        if (err)
-                goto err;
-        err = gpio_direction_input(GPIO_NR_PALMTE2_SD_DETECT_N);
-        if (err)
-                goto err2;
-        err = request_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N),
-                        palmte2_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
-                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-                        "SD/MMC card detect", data);
-        if (err) {
-                printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
-                                __func__);
-                goto err2;
-        }
-
-        err = gpio_request(GPIO_NR_PALMTE2_SD_POWER, "SD_POWER");
-        if (err)
-                goto err3;
-        err = gpio_direction_output(GPIO_NR_PALMTE2_SD_POWER, 0);
-        if (err)
-                goto err4;
-
-        err = gpio_request(GPIO_NR_PALMTE2_SD_READONLY, "SD_READONLY");
-        if (err)
-                goto err4;
-        err = gpio_direction_input(GPIO_NR_PALMTE2_SD_READONLY);
-        if (err)
-                goto err5;
-
-        printk(KERN_DEBUG "%s: irq registered\n", __func__);
-
-        return 0;
-
-err5:
-        gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
-err4:
-        gpio_free(GPIO_NR_PALMTE2_SD_POWER);
-err3:
-        free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
-err2:
-        gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
-err:
-        return err;
-}
-
-static void palmte2_mci_exit(struct device *dev, void *data)
-{
-        gpio_free(GPIO_NR_PALMTE2_SD_READONLY);
-        gpio_free(GPIO_NR_PALMTE2_SD_POWER);
-        free_irq(gpio_to_irq(GPIO_NR_PALMTE2_SD_DETECT_N), data);
-        gpio_free(GPIO_NR_PALMTE2_SD_DETECT_N);
-}
-
-static void palmte2_mci_power(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-        gpio_set_value(GPIO_NR_PALMTE2_SD_POWER, p_d->ocr_mask & (1 << vdd));
-}
-
-static int palmte2_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO_NR_PALMTE2_SD_READONLY);
-}
-
 static struct pxamci_platform_data palmte2_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .setpower       = palmte2_mci_power,
-        .get_ro         = palmte2_mci_get_ro,
-        .init           = palmte2_mci_init,
-        .exit           = palmte2_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO_NR_PALMTE2_SD_DETECT_N,
+        .gpio_card_ro           = GPIO_NR_PALMTE2_SD_READONLY,
+        .gpio_power             = GPIO_NR_PALMTE2_SD_POWER,
 };
 
 /******************************************************************************
@@ -287,35 +215,9 @@ static struct platform_device palmte2_backlight = {
 /******************************************************************************
  * IrDA
  ******************************************************************************/
-static int palmte2_irda_startup(struct device *dev)
-{
-        int err;
-        err = gpio_request(GPIO_NR_PALMTE2_IR_DISABLE, "IR DISABLE");
-        if (err)
-                goto err;
-        err = gpio_direction_output(GPIO_NR_PALMTE2_IR_DISABLE, 1);
-        if (err)
-                gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
-err:
-        return err;
-}
-
-static void palmte2_irda_shutdown(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMTE2_IR_DISABLE);
-}
-
-static void palmte2_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO_NR_PALMTE2_IR_DISABLE, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
 static struct pxaficp_platform_data palmte2_ficp_platform_data = {
-        .startup                = palmte2_irda_startup,
-        .shutdown               = palmte2_irda_shutdown,
-        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
-        .transceiver_mode       = palmte2_irda_transceiver_mode,
+        .gpio_pwdown            = GPIO_NR_PALMTE2_IR_DISABLE,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 /******************************************************************************
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 83d020879581..76a2b37eaf30 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -28,6 +28,10 @@
 #include <linux/wm97xx_batt.h>
 #include <linux/power_supply.h>
 #include <linux/usb/gpio_vbus.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/physmap.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -131,6 +135,10 @@ static unsigned long palmtx_pin_config[] __initdata = {
         GPIO34_FFUART_RXD,
         GPIO39_FFUART_TXD,
 
+        /* NAND */
+        GPIO15_nCS_1,
+        GPIO18_RDY,
+
         /* MISC. */
         GPIO10_GPIO,    /* hotsync button */
         GPIO12_GPIO,    /* power detect */
@@ -138,85 +146,50 @@ static unsigned long palmtx_pin_config[] __initdata = {
 };
 
 /******************************************************************************
- * SD/MMC card controller
+ * NOR Flash
  ******************************************************************************/
-static int palmtx_mci_init(struct device *dev, irq_handler_t palmtx_detect_int,
-                                void *data)
-{
-        int err = 0;
-
-        /* Setup an interrupt for detecting card insert/remove events */
-        err = gpio_request(GPIO_NR_PALMTX_SD_DETECT_N, "SD IRQ");
-        if (err)
-                goto err;
-        err = gpio_direction_input(GPIO_NR_PALMTX_SD_DETECT_N);
-        if (err)
-                goto err2;
-        err = request_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N),
-                        palmtx_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
-                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-                        "SD/MMC card detect", data);
-        if (err) {
-                printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
-                                __func__);
-                goto err2;
+static struct mtd_partition palmtx_partitions[] = {
+        {
+                .name           = "Flash",
+                .offset         = 0x00000000,
+                .size           = MTDPART_SIZ_FULL,
+                .mask_flags     = 0
         }
+};
 
-        err = gpio_request(GPIO_NR_PALMTX_SD_POWER, "SD_POWER");
-        if (err)
-                goto err3;
-        err = gpio_direction_output(GPIO_NR_PALMTX_SD_POWER, 0);
-        if (err)
-                goto err4;
-
-        err = gpio_request(GPIO_NR_PALMTX_SD_READONLY, "SD_READONLY");
-        if (err)
-                goto err4;
-        err = gpio_direction_input(GPIO_NR_PALMTX_SD_READONLY);
-        if (err)
-                goto err5;
-
-        printk(KERN_DEBUG "%s: irq registered\n", __func__);
-
-        return 0;
-
-err5:
-        gpio_free(GPIO_NR_PALMTX_SD_READONLY);
-err4:
-        gpio_free(GPIO_NR_PALMTX_SD_POWER);
-err3:
-        free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data);
-err2:
-        gpio_free(GPIO_NR_PALMTX_SD_DETECT_N);
-err:
-        return err;
-}
-
-static void palmtx_mci_exit(struct device *dev, void *data)
-{
-        gpio_free(GPIO_NR_PALMTX_SD_READONLY);
-        gpio_free(GPIO_NR_PALMTX_SD_POWER);
-        free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data);
-        gpio_free(GPIO_NR_PALMTX_SD_DETECT_N);
-}
+static struct physmap_flash_data palmtx_flash_data[] = {
+        {
+                .width          = 2,                    /* bankwidth in bytes */
+                .parts          = palmtx_partitions,
+                .nr_parts       = ARRAY_SIZE(palmtx_partitions)
+        }
+};
 
-static void palmtx_mci_power(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-        gpio_set_value(GPIO_NR_PALMTX_SD_POWER, p_d->ocr_mask & (1 << vdd));
-}
+static struct resource palmtx_flash_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_8M - 1,
+        .flags  = IORESOURCE_MEM,
+};
 
-static int palmtx_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO_NR_PALMTX_SD_READONLY);
-}
+static struct platform_device palmtx_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .resource       = &palmtx_flash_resource,
+        .num_resources  = 1,
+        .dev            = {
+                .platform_data = palmtx_flash_data,
+        },
+};
 
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
 static struct pxamci_platform_data palmtx_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .setpower       = palmtx_mci_power,
-        .get_ro         = palmtx_mci_get_ro,
-        .init           = palmtx_mci_init,
-        .exit           = palmtx_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO_NR_PALMTX_SD_DETECT_N,
+        .gpio_card_ro           = GPIO_NR_PALMTX_SD_READONLY,
+        .gpio_power             = GPIO_NR_PALMTX_SD_POWER,
+        .detect_delay           = 20,
 };
 
 /******************************************************************************
@@ -330,35 +303,9 @@ static struct platform_device palmtx_backlight = {
 /******************************************************************************
  * IrDA
  ******************************************************************************/
-static int palmtx_irda_startup(struct device *dev)
-{
-        int err;
-        err = gpio_request(GPIO_NR_PALMTX_IR_DISABLE, "IR DISABLE");
-        if (err)
-                goto err;
-        err = gpio_direction_output(GPIO_NR_PALMTX_IR_DISABLE, 1);
-        if (err)
-                gpio_free(GPIO_NR_PALMTX_IR_DISABLE);
-err:
-        return err;
-}
-
-static void palmtx_irda_shutdown(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMTX_IR_DISABLE);
-}
-
-static void palmtx_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO_NR_PALMTX_IR_DISABLE, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
 static struct pxaficp_platform_data palmtx_ficp_platform_data = {
-        .startup                = palmtx_irda_startup,
-        .shutdown               = palmtx_irda_shutdown,
-        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
-        .transceiver_mode       = palmtx_irda_transceiver_mode,
+        .gpio_pwdown            = GPIO_NR_PALMTX_IR_DISABLE,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 /******************************************************************************
@@ -493,6 +440,68 @@ static struct pxafb_mach_info palmtx_lcd_screen = {
 };
 
 /******************************************************************************
+ * NAND Flash
+ ******************************************************************************/
+static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
+                                 unsigned int ctrl)
+{
+        struct nand_chip *this = mtd->priv;
+        unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
+
+        if (cmd == NAND_CMD_NONE)
+                return;
+
+        if (ctrl & NAND_CLE)
+                writeb(cmd, PALMTX_NAND_CLE_VIRT);
+        else if (ctrl & NAND_ALE)
+                writeb(cmd, PALMTX_NAND_ALE_VIRT);
+        else
+                writeb(cmd, nandaddr);
+}
+
+static struct mtd_partition palmtx_partition_info[] = {
+        [0] = {
+                .name   = "palmtx-0",
+                .offset = 0,
+                .size   = MTDPART_SIZ_FULL
+        },
+};
+
+static const char *palmtx_part_probes[] = { "cmdlinepart", NULL };
+
+struct platform_nand_data palmtx_nand_platdata = {
+        .chip   = {
+                .nr_chips               = 1,
+                .chip_offset            = 0,
+                .nr_partitions          = ARRAY_SIZE(palmtx_partition_info),
+                .partitions             = palmtx_partition_info,
+                .chip_delay             = 20,
+                .part_probe_types       = palmtx_part_probes,
+        },
+        .ctrl   = {
+                .cmd_ctrl       = palmtx_nand_cmd_ctl,
+        },
+};
+
+static struct resource palmtx_nand_resource[] = {
+        [0]     = {
+                .start  = PXA_CS1_PHYS,
+                .end    = PXA_CS1_PHYS + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device palmtx_nand = {
+        .name           = "gen_nand",
+        .num_resources  = ARRAY_SIZE(palmtx_nand_resource),
+        .resource       = palmtx_nand_resource,
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &palmtx_nand_platdata,
+        }
+};
+
+/******************************************************************************
  * Power management - standby
  ******************************************************************************/
 static void __init palmtx_pm_init(void)
@@ -518,6 +527,8 @@ static struct platform_device *devices[] __initdata = {
         &power_supply,
         &palmtx_asoc,
         &palmtx_gpio_vbus,
+        &palmtx_flash,
+        &palmtx_nand,
 };
 
 static struct map_desc palmtx_io_desc[] __initdata = {
@@ -525,8 +536,18 @@ static struct map_desc palmtx_io_desc[] __initdata = {
         .virtual        = PALMTX_PCMCIA_VIRT,
         .pfn            = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
         .length         = PALMTX_PCMCIA_SIZE,
-        .type           = MT_DEVICE
-},
+        .type           = MT_DEVICE,
+}, {
+        .virtual        = PALMTX_NAND_ALE_VIRT,
+        .pfn            = __phys_to_pfn(PALMTX_NAND_ALE_PHYS),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE,
+}, {
+        .virtual        = PALMTX_NAND_CLE_VIRT,
+        .pfn            = __phys_to_pfn(PALMTX_NAND_CLE_PHYS),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE,
+}
 };
 
 static void __init palmtx_map_io(void)
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index c3645aa3fa3d..c2bf493c5f53 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -129,88 +129,14 @@ static unsigned long palmz72_pin_config[] __initdata = {
 /******************************************************************************
  * SD/MMC card controller
  ******************************************************************************/
-static int palmz72_mci_init(struct device *dev,
-                                irq_handler_t palmz72_detect_int, void *data)
-{
-        int err = 0;
-
-        /* Setup an interrupt for detecting card insert/remove events */
-        err = gpio_request(GPIO_NR_PALMZ72_SD_DETECT_N, "SD IRQ");
-        if (err)
-                goto err;
-        err = gpio_direction_input(GPIO_NR_PALMZ72_SD_DETECT_N);
-        if (err)
-                goto err2;
-        err = request_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N),
-                        palmz72_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
-                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-                        "SD/MMC card detect", data);
-        if (err) {
-                printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
-                                __func__);
-                goto err2;
-        }
-
-        /* SD_POWER is not actually power, but it is more like chip
-         * select, i.e. it is inverted */
-
-        err = gpio_request(GPIO_NR_PALMZ72_SD_POWER_N, "SD_POWER");
-        if (err)
-                goto err3;
-        err = gpio_direction_output(GPIO_NR_PALMZ72_SD_POWER_N, 0);
-        if (err)
-                goto err4;
-        err = gpio_request(GPIO_NR_PALMZ72_SD_RO, "SD_RO");
-        if (err)
-                goto err4;
-        err = gpio_direction_input(GPIO_NR_PALMZ72_SD_RO);
-        if (err)
-                goto err5;
-
-        printk(KERN_DEBUG "%s: irq registered\n", __func__);
-
-        return 0;
-
-err5:
-        gpio_free(GPIO_NR_PALMZ72_SD_RO);
-err4:
-        gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
-err3:
-        free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
-err2:
-        gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
-err:
-        return err;
-}
-
-static void palmz72_mci_exit(struct device *dev, void *data)
-{
-        gpio_free(GPIO_NR_PALMZ72_SD_POWER_N);
-        free_irq(gpio_to_irq(GPIO_NR_PALMZ72_SD_DETECT_N), data);
-        gpio_free(GPIO_NR_PALMZ72_SD_DETECT_N);
-        gpio_free(GPIO_NR_PALMZ72_SD_RO);
-}
-
-static void palmz72_mci_power(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-        if (p_d->ocr_mask & (1 << vdd))
-                gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 0);
-        else
-                gpio_set_value(GPIO_NR_PALMZ72_SD_POWER_N, 1);
-}
-
-static int palmz72_mci_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO_NR_PALMZ72_SD_RO);
-}
-
+/* SD_POWER is not actually power, but it is more like chip
+ * select, i.e. it is inverted */
 static struct pxamci_platform_data palmz72_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .setpower       = palmz72_mci_power,
-        .get_ro         = palmz72_mci_ro,
-        .init           = palmz72_mci_init,
-        .exit           = palmz72_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO_NR_PALMZ72_SD_DETECT_N,
+        .gpio_card_ro           = GPIO_NR_PALMZ72_SD_RO,
+        .gpio_power             = GPIO_NR_PALMZ72_SD_POWER_N,
+        .gpio_power_invert      = 1,
 };
 
 /******************************************************************************
@@ -304,35 +230,9 @@ static struct platform_device palmz72_backlight = {
 /******************************************************************************
  * IrDA
  ******************************************************************************/
-static int palmz72_irda_startup(struct device *dev)
-{
-        int err;
-        err = gpio_request(GPIO_NR_PALMZ72_IR_DISABLE, "IR DISABLE");
-        if (err)
-                goto err;
-        err = gpio_direction_output(GPIO_NR_PALMZ72_IR_DISABLE, 1);
-        if (err)
-                gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
-err:
-        return err;
-}
-
-static void palmz72_irda_shutdown(struct device *dev)
-{
-        gpio_free(GPIO_NR_PALMZ72_IR_DISABLE);
-}
-
-static void palmz72_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO_NR_PALMZ72_IR_DISABLE, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
 static struct pxaficp_platform_data palmz72_ficp_platform_data = {
-        .startup                = palmz72_irda_startup,
-        .shutdown               = palmz72_irda_shutdown,
+        .gpio_pwdown            = GPIO_NR_PALMZ72_IR_DISABLE,
         .transceiver_cap        = IR_SIRMODE | IR_OFF,
-        .transceiver_mode       = palmz72_irda_transceiver_mode,
 };
 
 /******************************************************************************
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 01791d74e08e..bbda57078e0f 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -321,11 +321,14 @@ static void pcm990_mci_exit(struct device *dev, void *data)
 #define MSECS_PER_JIFFY (1000/HZ)
 
 static struct pxamci_platform_data pcm990_mci_platform_data = {
-        .detect_delay   = 250 / MSECS_PER_JIFFY,
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .init           = pcm990_mci_init,
-        .setpower       = pcm990_mci_setpower,
-        .exit           = pcm990_mci_exit,
+        .detect_delay           = 250 / MSECS_PER_JIFFY,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .init                   = pcm990_mci_init,
+        .setpower               = pcm990_mci_setpower,
+        .exit                   = pcm990_mci_exit,
+        .gpio_card_detect       = -1,
+        .gpio_card_ro           = -1,
+        .gpio_power             = -1,
 };
 
 static struct pxaohci_platform_data pcm990_ohci_platform_data = {
@@ -427,25 +430,56 @@ static void pcm990_camera_free_bus(struct soc_camera_link *link)
         gpio_bus_switch = -EINVAL;
 }
 
-static struct soc_camera_link iclink = {
-        .bus_id = 0, /* Must match with the camera ID above */
-        .query_bus_param = pcm990_camera_query_bus_param,
-        .set_bus_param = pcm990_camera_set_bus_param,
-        .free_bus = pcm990_camera_free_bus,
-};
-
 /* Board I2C devices. */
 static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
         {
                 /* Must initialize before the camera(s) */
                 I2C_BOARD_INFO("pca9536", 0x41),
                 .platform_data = &pca9536_data,
-        }, {
+        },
+};
+
+static struct i2c_board_info pcm990_camera_i2c[] = {
+        {
                 I2C_BOARD_INFO("mt9v022", 0x48),
-                .platform_data = &iclink, /* With extender */
         }, {
                 I2C_BOARD_INFO("mt9m001", 0x5d),
-                .platform_data = &iclink, /* With extender */
+        },
+};
+
+static struct soc_camera_link iclink[] = {
+        {
+                .bus_id                 = 0, /* Must match with the camera ID */
+                .board_info             = &pcm990_camera_i2c[0],
+                .i2c_adapter_id         = 0,
+                .query_bus_param        = pcm990_camera_query_bus_param,
+                .set_bus_param          = pcm990_camera_set_bus_param,
+                .free_bus               = pcm990_camera_free_bus,
+                .module_name            = "mt9v022",
+        }, {
+                .bus_id                 = 0, /* Must match with the camera ID */
+                .board_info             = &pcm990_camera_i2c[1],
+                .i2c_adapter_id         = 0,
+                .query_bus_param        = pcm990_camera_query_bus_param,
+                .set_bus_param          = pcm990_camera_set_bus_param,
+                .free_bus               = pcm990_camera_free_bus,
+                .module_name            = "mt9m001",
+        },
+};
+
+static struct platform_device pcm990_camera[] = {
+        {
+                .name   = "soc-camera-pdrv",
+                .id     = 0,
+                .dev    = {
+                        .platform_data = &iclink[0],
+                },
+        }, {
+                .name   = "soc-camera-pdrv",
+                .id     = 1,
+                .dev    = {
+                        .platform_data = &iclink[1],
+                },
         },
 };
 #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
@@ -501,6 +535,9 @@ void __init pcm990_baseboard_init(void)
         pxa_set_camera_info(&pcm990_pxacamera_platform_data);
 
         i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
+
+        platform_device_register(&pcm990_camera[0]);
+        platform_device_register(&pcm990_camera[1]);
 #endif
 
         printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 9352d4a34837..a186994f77fb 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -245,20 +245,10 @@ static inline void poodle_init_spi(void) {}
  * The card detect interrupt isn't debounced so we delay it by 250ms
  * to give the card a chance to fully insert/eject.
  */
-static struct pxamci_platform_data poodle_mci_platform_data;
-
 static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, void *data)
 {
         int err;
 
-        err = gpio_request(POODLE_GPIO_nSD_DETECT, "nSD_DETECT");
-        if (err)
-                goto err_out;
-
-        err = gpio_request(POODLE_GPIO_nSD_WP, "nSD_WP");
-        if (err)
-                goto err_free_1;
-
         err = gpio_request(POODLE_GPIO_SD_PWR, "SD_PWR");
         if (err)
                 goto err_free_2;
@@ -267,34 +257,14 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int,
         if (err)
                 goto err_free_3;
 
-        gpio_direction_input(POODLE_GPIO_nSD_DETECT);
-        gpio_direction_input(POODLE_GPIO_nSD_WP);
-
         gpio_direction_output(POODLE_GPIO_SD_PWR, 0);
         gpio_direction_output(POODLE_GPIO_SD_PWR1, 0);
 
-        poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
-
-        err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
-                          "MMC card detect", data);
-        if (err) {
-                pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
-                                __func__);
-                goto err_free_4;
-        }
-
         return 0;
 
-err_free_4:
-        gpio_free(POODLE_GPIO_SD_PWR1);
 err_free_3:
         gpio_free(POODLE_GPIO_SD_PWR);
 err_free_2:
-        gpio_free(POODLE_GPIO_nSD_WP);
-err_free_1:
-        gpio_free(POODLE_GPIO_nSD_DETECT);
-err_out:
         return err;
 }
 
@@ -312,62 +282,29 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
         }
 }
 
-static int poodle_mci_get_ro(struct device *dev)
-{
-        return !!gpio_get_value(POODLE_GPIO_nSD_WP);
-        return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP);
-}
-
-
 static void poodle_mci_exit(struct device *dev, void *data)
 {
-        free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data);
         gpio_free(POODLE_GPIO_SD_PWR1);
         gpio_free(POODLE_GPIO_SD_PWR);
-        gpio_free(POODLE_GPIO_nSD_WP);
-        gpio_free(POODLE_GPIO_nSD_DETECT);
 }
 
 static struct pxamci_platform_data poodle_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = poodle_mci_init,
-        .get_ro         = poodle_mci_get_ro,
-        .setpower       = poodle_mci_setpower,
-        .exit           = poodle_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init                   = poodle_mci_init,
+        .setpower               = poodle_mci_setpower,
+        .exit                   = poodle_mci_exit,
+        .gpio_card_detect       = POODLE_IRQ_GPIO_nSD_DETECT,
+        .gpio_card_ro           = POODLE_GPIO_nSD_WP,
+        .gpio_power             = -1,
 };
 
 
 /*
  * Irda
  */
-static void poodle_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(POODLE_GPIO_IR_ON, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
-static int poodle_irda_startup(struct device *dev)
-{
-        int err;
-
-        err = gpio_request(POODLE_GPIO_IR_ON, "IR_ON");
-        if (err)
-                return err;
-
-        gpio_direction_output(POODLE_GPIO_IR_ON, 1);
-        return 0;
-}
-
-static void poodle_irda_shutdown(struct device *dev)
-{
-        gpio_free(POODLE_GPIO_IR_ON);
-}
-
 static struct pxaficp_platform_data poodle_ficp_platform_data = {
+        .gpio_pwdown            = POODLE_GPIO_IR_ON,
         .transceiver_cap        = IR_SIRMODE | IR_OFF,
-        .transceiver_mode       = poodle_irda_transceiver_mode,
-        .startup                = poodle_irda_startup,
-        .shutdown               = poodle_irda_shutdown,
 };
 
 
@@ -521,6 +458,7 @@ static void __init poodle_init(void)
         set_pxa_fb_parent(&poodle_locomo_device.dev);
         set_pxa_fb_info(&poodle_fb_info);
         pxa_set_udc_info(&udc_info);
+        poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&poodle_mci_platform_data);
         pxa_set_ficp_info(&poodle_ficp_platform_data);
         pxa_set_i2c_info(NULL);
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
index 2f3394f85917..868270421b8c 100644
--- a/arch/arm/mach-pxa/pxa2xx.c
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -52,3 +52,4 @@ void pxa2xx_transceiver_mode(struct device *dev, int mode)
         } else
                 BUG();
 }
+EXPORT_SYMBOL_GPL(pxa2xx_transceiver_mode);
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 4ba6d21f851c..f4af6e2bef89 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -84,9 +84,11 @@ static struct mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
 };
 
 static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
+static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
 
 static struct clk_lookup common_clkregs[] = {
         INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
+        INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
 };
 
 static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 8b3d97efadab..c7373e74a109 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -78,9 +78,11 @@ static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
 };
 
 static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
+static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
 
 static struct clk_lookup pxa320_clkregs[] = {
         INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
+        INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
 };
 
 static int __init pxa320_init(void)
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c
index 71131742fffd..064292008288 100644
--- a/arch/arm/mach-pxa/pxa930.c
+++ b/arch/arm/mach-pxa/pxa930.c
@@ -176,13 +176,30 @@ static struct mfp_addr_map pxa930_mfp_addr_map[] __initdata = {
         MFP_ADDR_END,
 };
 
+static struct mfp_addr_map pxa935_mfp_addr_map[] __initdata = {
+        MFP_ADDR(GPIO159, 0x0524),
+        MFP_ADDR(GPIO163, 0x0534),
+        MFP_ADDR(GPIO167, 0x0544),
+        MFP_ADDR(GPIO168, 0x0548),
+        MFP_ADDR(GPIO169, 0x054c),
+        MFP_ADDR(GPIO170, 0x0550),
+        MFP_ADDR(GPIO171, 0x0554),
+        MFP_ADDR(GPIO172, 0x0558),
+        MFP_ADDR(GPIO173, 0x055c),
+
+        MFP_ADDR_END,
+};
+
 static int __init pxa930_init(void)
 {
-        if (cpu_is_pxa930()) {
+        if (cpu_is_pxa930() || cpu_is_pxa935()) {
                 mfp_init_base(io_p2v(MFPR_BASE));
                 mfp_init_addr(pxa930_mfp_addr_map);
         }
 
+        if (cpu_is_pxa935())
+                mfp_init_addr(pxa935_mfp_addr_map);
+
         return 0;
 }
 
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index dda310fe71c8..ee8d6038ce82 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -24,6 +24,7 @@
 #include <linux/spi/ads7846.h>
 #include <linux/spi/corgi_lcd.h>
 #include <linux/mtd/sharpsl.h>
+#include <linux/input/matrix_keypad.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -111,6 +112,26 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO105_GPIO,   /* SPITZ_GPIO_CF_IRQ */
         GPIO106_GPIO,   /* SPITZ_GPIO_CF2_IRQ */
 
+        /* GPIO matrix keypad */
+        GPIO88_GPIO,    /* column 0 */
+        GPIO23_GPIO,    /* column 1 */
+        GPIO24_GPIO,    /* column 2 */
+        GPIO25_GPIO,    /* column 3 */
+        GPIO26_GPIO,    /* column 4 */
+        GPIO27_GPIO,    /* column 5 */
+        GPIO52_GPIO,    /* column 6 */
+        GPIO103_GPIO,   /* column 7 */
+        GPIO107_GPIO,   /* column 8 */
+        GPIO108_GPIO,   /* column 9 */
+        GPIO114_GPIO,   /* column 10 */
+        GPIO12_GPIO,    /* row 0 */
+        GPIO17_GPIO,    /* row 1 */
+        GPIO91_GPIO,    /* row 2 */
+        GPIO34_GPIO,    /* row 3 */
+        GPIO36_GPIO,    /* row 4 */
+        GPIO38_GPIO,    /* row 5 */
+        GPIO39_GPIO,    /* row 6 */
+
         /* I2C */
         GPIO117_I2C_SCL,
         GPIO118_I2C_SDA,
@@ -242,9 +263,115 @@ EXPORT_SYMBOL(spitzscoop2_device);
 /*
  * Spitz Keyboard Device
  */
+#define SPITZ_KEY_CALENDAR      KEY_F1
+#define SPITZ_KEY_ADDRESS       KEY_F2
+#define SPITZ_KEY_FN            KEY_F3
+#define SPITZ_KEY_CANCEL        KEY_F4
+#define SPITZ_KEY_EXOK          KEY_F5
+#define SPITZ_KEY_EXCANCEL      KEY_F6
+#define SPITZ_KEY_EXJOGDOWN     KEY_F7
+#define SPITZ_KEY_EXJOGUP       KEY_F8
+#define SPITZ_KEY_JAP1          KEY_LEFTALT
+#define SPITZ_KEY_JAP2          KEY_RIGHTCTRL
+#define SPITZ_KEY_SYNC          KEY_F9
+#define SPITZ_KEY_MAIL          KEY_F10
+#define SPITZ_KEY_OK            KEY_F11
+#define SPITZ_KEY_MENU          KEY_F12
+
+static const uint32_t spitzkbd_keymap[] = {
+        KEY(0, 0, KEY_LEFTCTRL),
+        KEY(0, 1, KEY_1),
+        KEY(0, 2, KEY_3),
+        KEY(0, 3, KEY_5),
+        KEY(0, 4, KEY_6),
+        KEY(0, 5, KEY_7),
+        KEY(0, 6, KEY_9),
+        KEY(0, 7, KEY_0),
+        KEY(0, 8, KEY_BACKSPACE),
+        KEY(0, 9, SPITZ_KEY_EXOK),      /* EXOK */
+        KEY(0, 10, SPITZ_KEY_EXCANCEL), /* EXCANCEL */
+        KEY(1, 1, KEY_2),
+        KEY(1, 2, KEY_4),
+        KEY(1, 3, KEY_R),
+        KEY(1, 4, KEY_Y),
+        KEY(1, 5, KEY_8),
+        KEY(1, 6, KEY_I),
+        KEY(1, 7, KEY_O),
+        KEY(1, 8, KEY_P),
+        KEY(1, 9, SPITZ_KEY_EXJOGDOWN), /* EXJOGDOWN */
+        KEY(1, 10, SPITZ_KEY_EXJOGUP),  /* EXJOGUP */
+        KEY(2, 0, KEY_TAB),
+        KEY(2, 1, KEY_Q),
+        KEY(2, 2, KEY_E),
+        KEY(2, 3, KEY_T),
+        KEY(2, 4, KEY_G),
+        KEY(2, 5, KEY_U),
+        KEY(2, 6, KEY_J),
+        KEY(2, 7, KEY_K),
+        KEY(3, 0, SPITZ_KEY_ADDRESS),   /* ADDRESS */
+        KEY(3, 1, KEY_W),
+        KEY(3, 2, KEY_S),
+        KEY(3, 3, KEY_F),
+        KEY(3, 4, KEY_V),
+        KEY(3, 5, KEY_H),
+        KEY(3, 6, KEY_M),
+        KEY(3, 7, KEY_L),
+        KEY(3, 9, KEY_RIGHTSHIFT),
+        KEY(4, 0, SPITZ_KEY_CALENDAR),  /* CALENDAR */
+        KEY(4, 1, KEY_A),
+        KEY(4, 2, KEY_D),
+        KEY(4, 3, KEY_C),
+        KEY(4, 4, KEY_B),
+        KEY(4, 5, KEY_N),
+        KEY(4, 6, KEY_DOT),
+        KEY(4, 8, KEY_ENTER),
+        KEY(4, 9, KEY_LEFTSHIFT),
+        KEY(5, 0, SPITZ_KEY_MAIL),      /* MAIL */
+        KEY(5, 1, KEY_Z),
+        KEY(5, 2, KEY_X),
+        KEY(5, 3, KEY_MINUS),
+        KEY(5, 4, KEY_SPACE),
+        KEY(5, 5, KEY_COMMA),
+        KEY(5, 7, KEY_UP),
+        KEY(5, 10, SPITZ_KEY_FN),       /* FN */
+        KEY(6, 0, KEY_SYSRQ),
+        KEY(6, 1, SPITZ_KEY_JAP1),      /* JAP1 */
+        KEY(6, 2, SPITZ_KEY_JAP2),      /* JAP2 */
+        KEY(6, 3, SPITZ_KEY_CANCEL),    /* CANCEL */
+        KEY(6, 4, SPITZ_KEY_OK),        /* OK */
+        KEY(6, 5, SPITZ_KEY_MENU),      /* MENU */
+        KEY(6, 6, KEY_LEFT),
+        KEY(6, 7, KEY_DOWN),
+        KEY(6, 8, KEY_RIGHT),
+};
+
+static const struct matrix_keymap_data spitzkbd_keymap_data = {
+        .keymap         = spitzkbd_keymap,
+        .keymap_size    = ARRAY_SIZE(spitzkbd_keymap),
+};
+
+static const uint32_t spitzkbd_row_gpios[] =
+                { 12, 17, 91, 34, 36, 38, 39 };
+static const uint32_t spitzkbd_col_gpios[] =
+                { 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 };
+
+static struct matrix_keypad_platform_data spitzkbd_pdata = {
+        .keymap_data            = &spitzkbd_keymap_data,
+        .row_gpios              = spitzkbd_row_gpios,
+        .col_gpios              = spitzkbd_col_gpios,
+        .num_row_gpios          = ARRAY_SIZE(spitzkbd_row_gpios),
+        .num_col_gpios          = ARRAY_SIZE(spitzkbd_col_gpios),
+        .col_scan_delay_us      = 10,
+        .debounce_ms            = 10,
+        .wakeup                 = 1,
+};
+
 static struct platform_device spitzkbd_device = {
-        .name           = "spitz-keyboard",
+        .name           = "matrix-keypad",
         .id             = -1,
+        .dev            = {
+                .platform_data = &spitzkbd_pdata,
+        },
 };
 
 
@@ -296,6 +423,7 @@ static struct ads7846_platform_data spitz_ads7846_info = {
         .vref_delay_usecs       = 100,
         .x_plate_ohms           = 419,
         .y_plate_ohms           = 486,
+        .pressure_max           = 1024,
         .gpio_pendown           = SPITZ_GPIO_TP_INT,
         .wait_for_sync          = spitz_wait_for_hsync,
 };
@@ -378,45 +506,6 @@ static inline void spitz_init_spi(void) {}
  * The card detect interrupt isn't debounced so we delay it by 250ms
  * to give the card a chance to fully insert/eject.
  */
-
-static struct pxamci_platform_data spitz_mci_platform_data;
-
-static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, void *data)
-{
-        int err;
-
-        err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT");
-        if (err)
-                goto err_out;
-
-        err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP");
-        if (err)
-                goto err_free_1;
-
-        gpio_direction_input(SPITZ_GPIO_nSD_DETECT);
-        gpio_direction_input(SPITZ_GPIO_nSD_WP);
-
-        spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
-
-        err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_RISING |
-                          IRQF_TRIGGER_FALLING,
-                          "MMC card detect", data);
-        if (err) {
-                pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n",
-                                __func__);
-                goto err_free_2;
-        }
-        return 0;
-
-err_free_2:
-        gpio_free(SPITZ_GPIO_nSD_WP);
-err_free_1:
-        gpio_free(SPITZ_GPIO_nSD_DETECT);
-err_out:
-        return err;
-}
-
 static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
@@ -427,24 +516,12 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
                 spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0000);
 }
 
-static int spitz_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(SPITZ_GPIO_nSD_WP);
-}
-
-static void spitz_mci_exit(struct device *dev, void *data)
-{
-        free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data);
-        gpio_free(SPITZ_GPIO_nSD_WP);
-        gpio_free(SPITZ_GPIO_nSD_DETECT);
-}
-
 static struct pxamci_platform_data spitz_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = spitz_mci_init,
-        .get_ro         = spitz_mci_get_ro,
-        .setpower       = spitz_mci_setpower,
-        .exit           = spitz_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .setpower               = spitz_mci_setpower,
+        .gpio_card_detect       = SPITZ_GPIO_nSD_DETECT,
+        .gpio_card_ro           = SPITZ_GPIO_nSD_WP,
+        .gpio_power             = -1,
 };
 
 
@@ -484,50 +561,10 @@ static struct pxaohci_platform_data spitz_ohci_platform_data = {
 /*
  * Irda
  */
-static int spitz_irda_startup(struct device *dev)
-{
-        int rc;
-
-        rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on");
-        if (rc)
-                goto err;
-
-        rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1);
-        if (rc)
-                goto err_dir;
-
-        return 0;
-
-err_dir:
-        gpio_free(SPITZ_GPIO_IR_ON);
-err:
-        return rc;
-}
-
-static void spitz_irda_shutdown(struct device *dev)
-{
-        gpio_free(SPITZ_GPIO_IR_ON);
-}
-
-static void spitz_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
-#ifdef CONFIG_MACH_AKITA
-static void akita_irda_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-#endif
 
 static struct pxaficp_platform_data spitz_ficp_platform_data = {
+/* .gpio_pwdown is set in spitz_init() and akita_init() accordingly */
         .transceiver_cap        = IR_SIRMODE | IR_OFF,
-        .transceiver_mode       = spitz_irda_transceiver_mode,
-        .startup                = spitz_irda_startup,
-        .shutdown               = spitz_irda_shutdown,
 };
 
 
@@ -695,6 +732,7 @@ static void __init common_init(void)
         spitz_init_spi();
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
+        spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&spitz_mci_platform_data);
         pxa_set_ohci_info(&spitz_ohci_platform_data);
         pxa_set_ficp_info(&spitz_ficp_platform_data);
@@ -705,6 +743,8 @@ static void __init common_init(void)
 #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
 static void __init spitz_init(void)
 {
+        spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON;
+
         platform_scoop_config = &spitz_pcmcia_config;
 
         common_init();
@@ -747,7 +787,7 @@ static struct nand_ecclayout akita_oobinfo = {
 
 static void __init akita_init(void)
 {
-        spitz_ficp_platform_data.transceiver_mode = akita_irda_transceiver_mode;
+        spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON;
 
         sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt;
         sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo;
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 117ad5920e53..e81a52673d49 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -247,49 +247,10 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
 /*
  * MMC/SD Device
  */
-static struct pxamci_platform_data tosa_mci_platform_data;
-
 static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void *data)
 {
         int err;
 
-        tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
-
-        err = gpio_request(TOSA_GPIO_nSD_DETECT, "MMC/SD card detect");
-        if (err) {
-                printk(KERN_ERR "tosa_mci_init: can't request nSD_DETECT gpio\n");
-                goto err_gpio_detect;
-        }
-        err = gpio_direction_input(TOSA_GPIO_nSD_DETECT);
-        if (err)
-                goto err_gpio_detect_dir;
-
-        err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
-                                "MMC/SD card detect", data);
-        if (err) {
-                printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
-                goto err_irq;
-        }
-
-        err = gpio_request(TOSA_GPIO_SD_WP, "SD Write Protect");
-        if (err) {
-                printk(KERN_ERR "tosa_mci_init: can't request SD_WP gpio\n");
-                goto err_gpio_wp;
-        }
-        err = gpio_direction_input(TOSA_GPIO_SD_WP);
-        if (err)
-                goto err_gpio_wp_dir;
-
-        err = gpio_request(TOSA_GPIO_PWR_ON, "SD Power");
-        if (err) {
-                printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
-                goto err_gpio_pwr;
-        }
-        err = gpio_direction_output(TOSA_GPIO_PWR_ON, 0);
-        if (err)
-                goto err_gpio_pwr_dir;
-
         err = gpio_request(TOSA_GPIO_nSD_INT, "SD Int");
         if (err) {
                 printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
@@ -304,51 +265,21 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
 err_gpio_int_dir:
         gpio_free(TOSA_GPIO_nSD_INT);
 err_gpio_int:
-err_gpio_pwr_dir:
-        gpio_free(TOSA_GPIO_PWR_ON);
-err_gpio_pwr:
-err_gpio_wp_dir:
-        gpio_free(TOSA_GPIO_SD_WP);
-err_gpio_wp:
-        free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
-err_irq:
-err_gpio_detect_dir:
-        gpio_free(TOSA_GPIO_nSD_DETECT);
-err_gpio_detect:
         return err;
 }
 
-static void tosa_mci_setpower(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data* p_d = dev->platform_data;
-
-        if (( 1 << vdd) & p_d->ocr_mask) {
-                gpio_set_value(TOSA_GPIO_PWR_ON, 1);
-        } else {
-                gpio_set_value(TOSA_GPIO_PWR_ON, 0);
-        }
-}
-
-static int tosa_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(TOSA_GPIO_SD_WP);
-}
-
 static void tosa_mci_exit(struct device *dev, void *data)
 {
         gpio_free(TOSA_GPIO_nSD_INT);
-        gpio_free(TOSA_GPIO_PWR_ON);
-        gpio_free(TOSA_GPIO_SD_WP);
-        free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
-        gpio_free(TOSA_GPIO_nSD_DETECT);
 }
 
 static struct pxamci_platform_data tosa_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
-        .init           = tosa_mci_init,
-        .get_ro         = tosa_mci_get_ro,
-        .setpower       = tosa_mci_setpower,
-        .exit           = tosa_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init                   = tosa_mci_init,
+        .exit                   = tosa_mci_exit,
+        .gpio_card_detect       = TOSA_GPIO_nSD_DETECT,
+        .gpio_card_ro           = TOSA_GPIO_SD_WP,
+        .gpio_power             = TOSA_GPIO_PWR_ON,
 };
 
 /*
@@ -406,10 +337,11 @@ static void tosa_irda_shutdown(struct device *dev)
 }
 
 static struct pxaficp_platform_data tosa_ficp_platform_data = {
-        .transceiver_cap  = IR_SIRMODE | IR_OFF,
-        .transceiver_mode = tosa_irda_transceiver_mode,
-        .startup = tosa_irda_startup,
-        .shutdown = tosa_irda_shutdown,
+        .gpio_pwdown            = -1,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
+        .transceiver_mode       = tosa_irda_transceiver_mode,
+        .startup                = tosa_irda_startup,
+        .shutdown               = tosa_irda_shutdown,
 };
 
 /*
@@ -910,6 +842,7 @@ static void __init tosa_init(void)
         dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
         dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
 
+        tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
         pxa_set_mci_info(&tosa_mci_platform_data);
         pxa_set_udc_info(&udc_info);
         pxa_set_ficp_info(&tosa_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/treo680.c b/arch/arm/mach-pxa/treo680.c
index 753ec4df17b9..fe085076fbf2 100644
--- a/arch/arm/mach-pxa/treo680.c
+++ b/arch/arm/mach-pxa/treo680.c
@@ -153,87 +153,11 @@ static unsigned long treo680_pin_config[] __initdata = {
 /******************************************************************************
  * SD/MMC card controller
  ******************************************************************************/
-static int treo680_mci_init(struct device *dev,
-                irq_handler_t treo680_detect_int, void *data)
-{
-        int err = 0;
-
-        /* Setup an interrupt for detecting card insert/remove events */
-        err = gpio_request(GPIO_NR_TREO680_SD_DETECT_N, "SD IRQ");
-
-        if (err)
-                goto err;
-
-        err = gpio_direction_input(GPIO_NR_TREO680_SD_DETECT_N);
-        if (err)
-                goto err2;
-
-        err = request_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N),
-                        treo680_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
-                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-                        "SD/MMC card detect", data);
-
-        if (err) {
-                dev_err(dev, "%s: cannot request SD/MMC card detect IRQ\n",
-                             __func__);
-                goto err2;
-        }
-
-        err = gpio_request(GPIO_NR_TREO680_SD_POWER, "SD_POWER");
-        if (err)
-                goto err3;
-
-        err = gpio_direction_output(GPIO_NR_TREO680_SD_POWER, 1);
-        if (err)
-                goto err4;
-
-        err = gpio_request(GPIO_NR_TREO680_SD_READONLY, "SD_READONLY");
-        if (err)
-                goto err4;
-
-        err = gpio_direction_input(GPIO_NR_TREO680_SD_READONLY);
-        if (err)
-                goto err5;
-
-        return 0;
-
-err5:
-        gpio_free(GPIO_NR_TREO680_SD_READONLY);
-err4:
-        gpio_free(GPIO_NR_TREO680_SD_POWER);
-err3:
-        free_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N), data);
-err2:
-        gpio_free(GPIO_NR_TREO680_SD_DETECT_N);
-err:
-        return err;
-}
-
-static void treo680_mci_exit(struct device *dev, void *data)
-{
-        gpio_free(GPIO_NR_TREO680_SD_READONLY);
-        gpio_free(GPIO_NR_TREO680_SD_POWER);
-        free_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N), data);
-        gpio_free(GPIO_NR_TREO680_SD_DETECT_N);
-}
-
-static void treo680_mci_power(struct device *dev, unsigned int vdd)
-{
-        struct pxamci_platform_data *p_d = dev->platform_data;
-        gpio_set_value(GPIO_NR_TREO680_SD_POWER, p_d->ocr_mask & (1 << vdd));
-}
-
-static int treo680_mci_get_ro(struct device *dev)
-{
-        return gpio_get_value(GPIO_NR_TREO680_SD_READONLY);
-}
-
 static struct pxamci_platform_data treo680_mci_platform_data = {
-        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
-        .setpower       = treo680_mci_power,
-        .get_ro         = treo680_mci_get_ro,
-        .init           = treo680_mci_init,
-        .exit           = treo680_mci_exit,
+        .ocr_mask               = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .gpio_card_detect       = GPIO_NR_TREO680_SD_DETECT_N,
+        .gpio_card_ro           = GPIO_NR_TREO680_SD_READONLY,
+        .gpio_power             = GPIO_NR_TREO680_SD_POWER,
 };
 
 /******************************************************************************
@@ -330,16 +254,9 @@ static int treo680_backlight_init(struct device *dev)
         ret = gpio_direction_output(GPIO_NR_TREO680_BL_POWER, 0);
         if (ret)
                 goto err2;
-        ret = gpio_request(GPIO_NR_TREO680_LCD_POWER, "LCD POWER");
-        if (ret)
-                goto err2;
-        ret = gpio_direction_output(GPIO_NR_TREO680_LCD_POWER, 0);
-        if (ret)
-                goto err3;
 
         return 0;
-err3:
-        gpio_free(GPIO_NR_TREO680_LCD_POWER);
+
 err2:
         gpio_free(GPIO_NR_TREO680_BL_POWER);
 err:
@@ -355,7 +272,6 @@ static int treo680_backlight_notify(int brightness)
 static void treo680_backlight_exit(struct device *dev)
 {
         gpio_free(GPIO_NR_TREO680_BL_POWER);
-        gpio_free(GPIO_NR_TREO680_LCD_POWER);
 }
 
 static struct platform_pwm_backlight_data treo680_backlight_data = {
@@ -379,44 +295,9 @@ static struct platform_device treo680_backlight = {
 /******************************************************************************
  * IrDA
  ******************************************************************************/
-static void treo680_transceiver_mode(struct device *dev, int mode)
-{
-        gpio_set_value(GPIO_NR_TREO680_IR_EN, mode & IR_OFF);
-        pxa2xx_transceiver_mode(dev, mode);
-}
-
-static int treo680_irda_startup(struct device *dev)
-{
-        int err;
-
-        err = gpio_request(GPIO_NR_TREO680_IR_EN, "Ir port disable");
-        if (err)
-                goto err1;
-
-        err = gpio_direction_output(GPIO_NR_TREO680_IR_EN, 1);
-        if (err)
-                goto err2;
-
-        return 0;
-
-err2:
-        dev_err(dev, "treo680_irda: cannot change IR gpio direction\n");
-        gpio_free(GPIO_NR_TREO680_IR_EN);
-err1:
-        dev_err(dev, "treo680_irda: cannot allocate IR gpio\n");
-        return err;
-}
-
-static void treo680_irda_shutdown(struct device *dev)
-{
-        gpio_free(GPIO_NR_TREO680_IR_EN);
-}
-
 static struct pxaficp_platform_data treo680_ficp_info = {
-        .transceiver_cap  = IR_FIRMODE | IR_SIRMODE | IR_OFF,
-        .startup          = treo680_irda_startup,
-        .shutdown         = treo680_irda_shutdown,
-        .transceiver_mode = treo680_transceiver_mode,
+        .gpio_pwdown            = GPIO_NR_TREO680_IR_EN,
+        .transceiver_cap        = IR_SIRMODE | IR_OFF,
 };
 
 /******************************************************************************
@@ -546,6 +427,11 @@ static struct pxafb_mode_info treo680_lcd_modes[] = {
 },
 };
 
+static void treo680_lcd_power(int on, struct fb_var_screeninfo *info)
+{
+        gpio_set_value(GPIO_NR_TREO680_BL_POWER, on);
+}
+
 static struct pxafb_mach_info treo680_lcd_screen = {
         .modes          = treo680_lcd_modes,
         .num_modes      = ARRAY_SIZE(treo680_lcd_modes),
@@ -585,11 +471,32 @@ static void __init treo680_udc_init(void)
         }
 }
 
+static void __init treo680_lcd_power_init(void)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_NR_TREO680_LCD_POWER, "LCD POWER");
+        if (ret) {
+                pr_err("Treo680: LCD power GPIO request failed!\n");
+                return;
+        }
+
+        ret = gpio_direction_output(GPIO_NR_TREO680_LCD_POWER, 0);
+        if (ret) {
+                pr_err("Treo680: setting LCD power GPIO direction failed!\n");
+                gpio_free(GPIO_NR_TREO680_LCD_POWER);
+                return;
+        }
+
+        treo680_lcd_screen.pxafb_lcd_power = treo680_lcd_power;
+}
+
 static void __init treo680_init(void)
 {
         treo680_pm_init();
         pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
         pxa_set_keypad_info(&treo680_keypad_platform_data);
+        treo680_lcd_power_init();
         set_pxa_fb_info(&treo680_lcd_screen);
         pxa_set_mci_info(&treo680_mci_platform_data);
         treo680_udc_init();
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 825f540176d2..3981e0356d12 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -367,6 +367,9 @@ static struct pxamci_platform_data trizeps4_mci_platform_data = {
         .exit           = trizeps4_mci_exit,
         .get_ro         = NULL, /* write-protection not supported */
         .setpower       = NULL, /* power-switching not supported */
+        .gpio_card_detect = -1,
+        .gpio_card_ro   = -1,
+        .gpio_power     = -1,
 };
 
 /****************************************************************************
@@ -412,6 +415,7 @@ static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
 }
 
 static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
+        .gpio_pwdown            = -1,
         .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
         .transceiver_mode       = trizeps4_irda_transceiver_mode,
         .startup                = trizeps4_irda_startup,
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
new file mode 100644
index 000000000000..3fd79cbb36c8
--- /dev/null
+++ b/arch/arm/mach-pxa/xcep.c
@@ -0,0 +1,187 @@
+/*  linux/arch/arm/mach-pxa/xcep.c
+ *
+ *  Support for the Iskratel Electronics XCEP platform as used in
+ *  the Libera instruments from Instrumentation Technologies.
+ *
+ *  Author:     Ales Bardorfer <ales@i-tech.si>
+ *  Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk>
+ *  Contributions by: Matej Kenda <matej.kenda@i-tech.si>
+ *  Created:    June 2006
+ *  Copyright:  (C) 2006-2009 Instrumentation Technologies
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/smc91x.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/map.h>
+
+#include <plat/i2c.h>
+
+#include <mach/hardware.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa25x.h>
+
+#include "generic.h"
+
+#define XCEP_ETH_PHYS           (PXA_CS3_PHYS + 0x00000300)
+#define XCEP_ETH_PHYS_END       (PXA_CS3_PHYS + 0x000fffff)
+#define XCEP_ETH_ATTR           (PXA_CS3_PHYS + 0x02000000)
+#define XCEP_ETH_ATTR_END       (PXA_CS3_PHYS + 0x020fffff)
+#define XCEP_ETH_IRQ            IRQ_GPIO0
+
+/*  XCEP CPLD base */
+#define XCEP_CPLD_BASE          0xf0000000
+
+
+/* Flash partitions. */
+
+static struct mtd_partition xcep_partitions[] = {
+        {
+                .name =         "Bootloader",
+                .size =         0x00040000,
+                .offset =       0,
+                .mask_flags =   MTD_WRITEABLE
+        }, {
+                .name =         "Bootloader ENV",
+                .size =         0x00040000,
+                .offset =       0x00040000,
+                .mask_flags =   MTD_WRITEABLE
+        }, {
+                .name =         "Kernel",
+                .size =         0x00100000,
+                .offset =       0x00080000,
+        }, {
+                .name =         "Rescue fs",
+                .size =         0x00280000,
+                .offset =       0x00180000,
+        }, {
+                .name =         "Filesystem",
+                .size =         MTDPART_SIZ_FULL,
+                .offset =       0x00400000
+        }
+};
+
+static struct physmap_flash_data xcep_flash_data[] = {
+        {
+                .width          = 4,            /* bankwidth in bytes */
+                .parts          = xcep_partitions,
+                .nr_parts       = ARRAY_SIZE(xcep_partitions)
+        }
+};
+
+static struct resource flash_resource = {
+        .start  = PXA_CS0_PHYS,
+        .end    = PXA_CS0_PHYS + SZ_32M - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct platform_device flash_device = {
+        .name   = "physmap-flash",
+        .id     = 0,
+        .dev    = {
+                .platform_data = xcep_flash_data,
+        },
+        .resource = &flash_resource,
+        .num_resources = 1,
+};
+
+
+
+/* SMC LAN91C111 network controller. */
+
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .name   = "smc91x-regs",
+                .start  = XCEP_ETH_PHYS,
+                .end    = XCEP_ETH_PHYS_END,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = XCEP_ETH_IRQ,
+                .end    = XCEP_ETH_IRQ,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .name   = "smc91x-attrib",
+                .start  = XCEP_ETH_ATTR,
+                .end    = XCEP_ETH_ATTR_END,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct smc91x_platdata xcep_smc91x_info = {
+        .flags  = SMC91X_USE_32BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &xcep_smc91x_info,
+        },
+};
+
+
+static struct platform_device *devices[] __initdata = {
+        &flash_device,
+        &smc91x_device,
+};
+
+
+/* We have to state that there are HWMON devices on the I2C bus on XCEP.
+ * Drivers for HWMON verify capabilities of the adapter when loading and
+ * refuse to attach if the adapter doesn't support HWMON class of devices.
+ * See also Documentation/i2c/porting-clients. */
+static struct i2c_pxa_platform_data xcep_i2c_platform_data  = {
+        .class = I2C_CLASS_HWMON
+};
+
+
+static mfp_cfg_t xcep_pin_config[] __initdata = {
+        GPIO79_nCS_3,   /* SMC 91C111 chip select. */
+        GPIO80_nCS_4,   /* CPLD chip select. */
+        /* SSP communication to MSP430 */
+        GPIO23_SSP1_SCLK,
+        GPIO24_SSP1_SFRM,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+        GPIO27_SSP1_EXTCLK
+};
+
+static void __init xcep_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
+
+        /* See Intel XScale Developer's Guide for details */
+        /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
+        MSC1 = (MSC1 & 0xffff) | 0xD5540000;
+        /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
+        MSC2 = (MSC2 & 0xffff) | 0x72A00000;
+
+        platform_add_devices(ARRAY_AND_SIZE(devices));
+        pxa_set_i2c_info(&xcep_i2c_platform_data);
+}
+
+MACHINE_START(XCEP, "Iskratel XCEP")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .init_machine   = xcep_init,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .timer          = &pxa_timer,
+MACHINE_END
+
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 218d2001f1df..09784d3954e4 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -290,6 +290,9 @@ static struct pxamci_platform_data zylonite_mci_platform_data = {
         .init           = zylonite_mci_init,
         .exit           = zylonite_mci_exit,
         .get_ro         = zylonite_mci_ro,
+        .gpio_card_detect = -1,
+        .gpio_card_ro   = -1,
+        .gpio_power     = -1,
 };
 
 static struct pxamci_platform_data zylonite_mci2_platform_data = {
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index dc3519c50ab2..a2083b60e3fb 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -30,6 +30,7 @@
 #include <linux/io.h>
 #include <linux/smsc911x.h>
 #include <linux/ata_platform.h>
+#include <linux/amba/mmci.h>
 
 #include <asm/clkdev.h>
 #include <asm/system.h>
@@ -44,7 +45,6 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
-#include <asm/mach/mmc.h>
 
 #include <asm/hardware/gic.h>
 
@@ -237,14 +237,14 @@ static unsigned int realview_mmc_status(struct device *dev)
         return readl(REALVIEW_SYSMCI) & mask;
 }
 
-struct mmc_platform_data realview_mmc0_plat_data = {
+struct mmci_platform_data realview_mmc0_plat_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .status         = realview_mmc_status,
         .gpio_wp        = 17,
         .gpio_cd        = 16,
 };
 
-struct mmc_platform_data realview_mmc1_plat_data = {
+struct mmci_platform_data realview_mmc1_plat_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .status         = realview_mmc_status,
         .gpio_wp        = 19,
@@ -296,31 +296,31 @@ static struct clk ref24_clk = {
 
 static struct clk_lookup lookups[] = {
         {       /* UART0 */
-                .dev_id         = "dev:f1",
+                .dev_id         = "dev:uart0",
                 .clk            = &ref24_clk,
         }, {    /* UART1 */
-                .dev_id         = "dev:f2",
+                .dev_id         = "dev:uart1",
                 .clk            = &ref24_clk,
         }, {    /* UART2 */
-                .dev_id         = "dev:f3",
+                .dev_id         = "dev:uart2",
                 .clk            = &ref24_clk,
         }, {    /* UART3 */
-                .dev_id         = "fpga:09",
+                .dev_id         = "fpga:uart3",
                 .clk            = &ref24_clk,
         }, {    /* KMI0 */
-                .dev_id         = "fpga:06",
+                .dev_id         = "fpga:kmi0",
                 .clk            = &ref24_clk,
         }, {    /* KMI1 */
-                .dev_id         = "fpga:07",
+                .dev_id         = "fpga:kmi1",
                 .clk            = &ref24_clk,
         }, {    /* MMC0 */
-                .dev_id         = "fpga:05",
+                .dev_id         = "fpga:mmc0",
                 .clk            = &ref24_clk,
         }, {    /* EB:CLCD */
-                .dev_id         = "dev:20",
+                .dev_id         = "dev:clcd",
                 .clk            = &oscvco_clk,
         }, {    /* PB:CLCD */
-                .dev_id         = "issp:20",
+                .dev_id         = "issp:clcd",
                 .clk            = &oscvco_clk,
         }
 };
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 59a337ba4be7..46cd6acb4d40 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -47,8 +47,8 @@ static struct amba_device name##_device = {			\
 extern struct platform_device realview_flash_device;
 extern struct platform_device realview_cf_device;
 extern struct platform_device realview_i2c_device;
-extern struct mmc_platform_data realview_mmc0_plat_data;
-extern struct mmc_platform_data realview_mmc1_plat_data;
+extern struct mmci_platform_data realview_mmc0_plat_data;
+extern struct mmci_platform_data realview_mmc1_plat_data;
 extern struct clcd_board clcd_plat_data;
 extern void __iomem *gic_cpu_base_addr;
 extern void __iomem *timer0_va_base;
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index abd13b448671..1d65e64ae571 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -24,6 +24,7 @@
 #include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
+#include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -37,7 +38,6 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/mmc.h>
 #include <asm/mach/time.h>
 
 #include <mach/board-eb.h>
@@ -193,27 +193,27 @@ static struct pl061_platform_data gpio2_plat_data = {
 #define EB_SSP_DMA      { 9, 8 }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
-AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
-AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
-AMBA_DEVICE(uart3, "fpga:09", EB_UART3, NULL);
+AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
+AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
+AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
+AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,   "dev:00",  EB_SMC,   NULL);
-AMBA_DEVICE(clcd,  "dev:20",  EB_CLCD,  &clcd_plat_data);
-AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
-AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
-AMBA_DEVICE(wdog,  "dev:e1",  EB_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0, "dev:e4",  EB_GPIO0, &gpio0_plat_data);
-AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    &gpio1_plat_data);
-AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    &gpio2_plat_data);
-AMBA_DEVICE(rtc,   "dev:e8",  EB_RTC,   NULL);
-AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
-AMBA_DEVICE(uart0, "dev:f1",  EB_UART0, NULL);
-AMBA_DEVICE(uart1, "dev:f2",  EB_UART1, NULL);
-AMBA_DEVICE(uart2, "dev:f3",  EB_UART2, NULL);
-AMBA_DEVICE(ssp0,  "dev:f4",  EB_SSP,   NULL);
+AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
+AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
+AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
+AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
+AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
+AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
+AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
+AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
+AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
+AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
+AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
+AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
+AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
+AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 17fbb0e889b6..2817fe099319 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -24,6 +24,7 @@
 #include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
+#include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -37,7 +38,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
-#include <asm/mach/mmc.h>
 #include <asm/mach/time.h>
 
 #include <mach/board-pb1176.h>
@@ -170,29 +170,29 @@ static struct pl061_platform_data gpio2_plat_data = {
 #define PB1176_SSP_DMA          { 9, 8 }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:04",      AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:05",      MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:06",      KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:07",      KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:09",      PB1176_UART3,   NULL);
+AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+AMBA_DEVICE(uart3,      "fpga:uart3",   PB1176_UART3,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:00",       PB1176_SMC,     NULL);
-AMBA_DEVICE(sctl,       "dev:e0",       SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:e1",       PB1176_WATCHDOG,        NULL);
-AMBA_DEVICE(gpio0,      "dev:e4",       PB1176_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:e5",       GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:e6",       GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:e8",       PB1176_RTC,     NULL);
-AMBA_DEVICE(sci0,       "dev:f0",       SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:f1",       PB1176_UART0,   NULL);
-AMBA_DEVICE(uart1,      "dev:f2",       PB1176_UART1,   NULL);
-AMBA_DEVICE(uart2,      "dev:f3",       PB1176_UART2,   NULL);
-AMBA_DEVICE(ssp0,       "dev:f4",       PB1176_SSP,     NULL);
+AMBA_DEVICE(smc,        "dev:smc",      PB1176_SMC,     NULL);
+AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+AMBA_DEVICE(wdog,       "dev:wdog",     PB1176_WATCHDOG,        NULL);
+AMBA_DEVICE(gpio0,      "dev:gpio0",    PB1176_GPIO0,   &gpio0_plat_data);
+AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+AMBA_DEVICE(rtc,        "dev:rtc",      PB1176_RTC,     NULL);
+AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+AMBA_DEVICE(uart0,      "dev:uart0",    PB1176_UART0,   NULL);
+AMBA_DEVICE(uart1,      "dev:uart1",    PB1176_UART1,   NULL);
+AMBA_DEVICE(uart2,      "dev:uart2",    PB1176_UART2,   NULL);
+AMBA_DEVICE(ssp0,       "dev:ssp0",     PB1176_SSP,     NULL);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:20",      PB1176_CLCD,    &clcd_plat_data);
-//AMBA_DEVICE(dmac,     "issp:30",      PB1176_DMAC,    NULL);
+AMBA_DEVICE(clcd,       "issp:clcd",    PB1176_CLCD,    &clcd_plat_data);
+//AMBA_DEVICE(dmac,     "issp:dmac",    PB1176_DMAC,    NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
 //      &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index fdd042b85f40..94680fcf726d 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -24,6 +24,7 @@
 #include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
+#include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -38,7 +39,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
-#include <asm/mach/mmc.h>
 #include <asm/mach/time.h>
 
 #include <mach/board-pb11mp.h>
@@ -172,29 +172,29 @@ static struct pl061_platform_data gpio2_plat_data = {
 #define PB11MP_SSP_DMA          { 9, 8 }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:04",      AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:05",      MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:06",      KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:07",      KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:09",      PB11MP_UART3,   NULL);
+AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+AMBA_DEVICE(uart3,      "fpga:uart3",   PB11MP_UART3,   NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:00",       PB11MP_SMC,     NULL);
-AMBA_DEVICE(sctl,       "dev:e0",       SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:e1",       PB11MP_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,      "dev:e4",       PB11MP_GPIO0,   &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:e5",       GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:e6",       GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:e8",       PB11MP_RTC,     NULL);
-AMBA_DEVICE(sci0,       "dev:f0",       SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:f1",       PB11MP_UART0,   NULL);
-AMBA_DEVICE(uart1,      "dev:f2",       PB11MP_UART1,   NULL);
-AMBA_DEVICE(uart2,      "dev:f3",       PB11MP_UART2,   NULL);
-AMBA_DEVICE(ssp0,       "dev:f4",       PB11MP_SSP,     NULL);
+AMBA_DEVICE(smc,        "dev:smc",      PB11MP_SMC,     NULL);
+AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+AMBA_DEVICE(wdog,       "dev:wdog",     PB11MP_WATCHDOG, NULL);
+AMBA_DEVICE(gpio0,      "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
+AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+AMBA_DEVICE(rtc,        "dev:rtc",      PB11MP_RTC,     NULL);
+AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+AMBA_DEVICE(uart0,      "dev:uart0",    PB11MP_UART0,   NULL);
+AMBA_DEVICE(uart1,      "dev:uart1",    PB11MP_UART1,   NULL);
+AMBA_DEVICE(uart2,      "dev:uart2",    PB11MP_UART2,   NULL);
+AMBA_DEVICE(ssp0,       "dev:ssp0",     PB11MP_SSP,     NULL);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:20",      PB11MP_CLCD,    &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:30",      DMAC,           NULL);
+AMBA_DEVICE(clcd,       "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
+AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 70bba9900d97..941beb2b9709 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -24,6 +24,7 @@
 #include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
+#include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <asm/irq.h>
@@ -34,7 +35,6 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/mmc.h>
 #include <asm/mach/time.h>
 
 #include <mach/hardware.h>
@@ -162,29 +162,29 @@ static struct pl061_platform_data gpio2_plat_data = {
 #define PBA8_SSP_DMA            { 9, 8 }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:04",      AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:05",      MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:06",      KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:07",      KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:09",      PBA8_UART3,     NULL);
+AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+AMBA_DEVICE(uart3,      "fpga:uart3",   PBA8_UART3,     NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:00",       PBA8_SMC,       NULL);
-AMBA_DEVICE(sctl,       "dev:e0",       SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:e1",       PBA8_WATCHDOG, NULL);
-AMBA_DEVICE(gpio0,      "dev:e4",       PBA8_GPIO0,     &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:e5",       GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:e6",       GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:e8",       PBA8_RTC,       NULL);
-AMBA_DEVICE(sci0,       "dev:f0",       SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:f1",       PBA8_UART0,     NULL);
-AMBA_DEVICE(uart1,      "dev:f2",       PBA8_UART1,     NULL);
-AMBA_DEVICE(uart2,      "dev:f3",       PBA8_UART2,     NULL);
-AMBA_DEVICE(ssp0,       "dev:f4",       PBA8_SSP,       NULL);
+AMBA_DEVICE(smc,        "dev:smc",      PBA8_SMC,       NULL);
+AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+AMBA_DEVICE(wdog,       "dev:wdog",     PBA8_WATCHDOG, NULL);
+AMBA_DEVICE(gpio0,      "dev:gpio0",    PBA8_GPIO0,     &gpio0_plat_data);
+AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+AMBA_DEVICE(rtc,        "dev:rtc",      PBA8_RTC,       NULL);
+AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+AMBA_DEVICE(uart0,      "dev:uart0",    PBA8_UART0,     NULL);
+AMBA_DEVICE(uart1,      "dev:uart1",    PBA8_UART1,     NULL);
+AMBA_DEVICE(uart2,      "dev:uart2",    PBA8_UART2,     NULL);
+AMBA_DEVICE(ssp0,       "dev:ssp0",     PBA8_SSP,       NULL);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:20",      PBA8_CLCD,      &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:30",      DMAC,           NULL);
+AMBA_DEVICE(clcd,       "issp:clcd",    PBA8_CLCD,      &clcd_plat_data);
+AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index ce6c5d25fbef..7e4bc6cdca52 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -23,6 +23,7 @@
 #include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
+#include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <asm/irq.h>
@@ -34,7 +35,6 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/mmc.h>
 #include <asm/mach/time.h>
 
 #include <mach/hardware.h>
@@ -182,29 +182,29 @@ static struct pl061_platform_data gpio2_plat_data = {
 #define PBX_SSP_DMA             { 9, 8 }
 
 /* FPGA Primecells */
-AMBA_DEVICE(aaci,       "fpga:04",      AACI,           NULL);
-AMBA_DEVICE(mmc0,       "fpga:05",      MMCI0,          &realview_mmc0_plat_data);
-AMBA_DEVICE(kmi0,       "fpga:06",      KMI0,           NULL);
-AMBA_DEVICE(kmi1,       "fpga:07",      KMI1,           NULL);
-AMBA_DEVICE(uart3,      "fpga:09",      PBX_UART3,      NULL);
+AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
+AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
+AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
+AMBA_DEVICE(uart3,      "fpga:uart3",   PBX_UART3,      NULL);
 
 /* DevChip Primecells */
-AMBA_DEVICE(smc,        "dev:00",       PBX_SMC,        NULL);
-AMBA_DEVICE(sctl,       "dev:e0",       SCTL,           NULL);
-AMBA_DEVICE(wdog,       "dev:e1",       PBX_WATCHDOG,   NULL);
-AMBA_DEVICE(gpio0,      "dev:e4",       PBX_GPIO0,      &gpio0_plat_data);
-AMBA_DEVICE(gpio1,      "dev:e5",       GPIO1,          &gpio1_plat_data);
-AMBA_DEVICE(gpio2,      "dev:e6",       GPIO2,          &gpio2_plat_data);
-AMBA_DEVICE(rtc,        "dev:e8",       PBX_RTC,        NULL);
-AMBA_DEVICE(sci0,       "dev:f0",       SCI,            NULL);
-AMBA_DEVICE(uart0,      "dev:f1",       PBX_UART0,      NULL);
-AMBA_DEVICE(uart1,      "dev:f2",       PBX_UART1,      NULL);
-AMBA_DEVICE(uart2,      "dev:f3",       PBX_UART2,      NULL);
-AMBA_DEVICE(ssp0,       "dev:f4",       PBX_SSP,        NULL);
+AMBA_DEVICE(smc,        "dev:smc",      PBX_SMC,        NULL);
+AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
+AMBA_DEVICE(wdog,       "dev:wdog",     PBX_WATCHDOG,   NULL);
+AMBA_DEVICE(gpio0,      "dev:gpio0",    PBX_GPIO0,      &gpio0_plat_data);
+AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
+AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
+AMBA_DEVICE(rtc,        "dev:rtc",      PBX_RTC,        NULL);
+AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
+AMBA_DEVICE(uart0,      "dev:uart0",    PBX_UART0,      NULL);
+AMBA_DEVICE(uart1,      "dev:uart1",    PBX_UART1,      NULL);
+AMBA_DEVICE(uart2,      "dev:uart2",    PBX_UART2,      NULL);
+AMBA_DEVICE(ssp0,       "dev:ssp0",     PBX_SSP,        NULL);
 
 /* Primecells on the NEC ISSP chip */
-AMBA_DEVICE(clcd,       "issp:20",      PBX_CLCD,       &clcd_plat_data);
-AMBA_DEVICE(dmac,       "issp:30",      DMAC,           NULL);
+AMBA_DEVICE(clcd,       "issp:clcd",    PBX_CLCD,       &clcd_plat_data);
+AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
 
 static struct amba_device *amba_devs[] __initdata = {
         &dmac_device,
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index d8c023d4df30..3d4e9da3fa52 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -77,6 +77,7 @@ config ARCH_H1940
         select CPU_S3C2410
         select PM_H1940 if PM
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the HP IPAQ H1940
 
@@ -89,6 +90,7 @@ config MACH_N30
         bool "Acer N30 family"
         select CPU_S3C2410
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you want suppt for the Acer N30, Acer N35,
           Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs.
@@ -103,6 +105,7 @@ config ARCH_BAST
         select S3C24XX_DCLK
         select ISA
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the Simtec Electronics EB2410ITX
           development board (also known as BAST)
@@ -111,6 +114,7 @@ config MACH_OTOM
         bool "NexVision OTOM Board"
         select CPU_S3C2410
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the Nex Vision OTOM board
 
@@ -154,6 +158,7 @@ config MACH_QT2410
         bool "QT2410"
         select CPU_S3C2410
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
            Say Y here if you are using the Armzone QT2410
 
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index 35c1bde89cf2..c2bdc4635d12 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -48,6 +48,7 @@ config MACH_JIVE
         bool "Logitech Jive"
         select CPU_S3C2412
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the Logitech Jive.
 
@@ -61,6 +62,7 @@ config MACH_SMDK2413
         select MACH_S3C2413
         select MACH_SMDK
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using an SMDK2413
 
@@ -84,6 +86,7 @@ config MACH_VSTMS
         bool "VMSTMS"
         select CPU_S3C2412
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using an VSTMS board
 
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 8ae1b288f7fa..d7bba919a77e 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -48,6 +48,7 @@ config MACH_OSIRIS
         select S3C2440_XTAL_12000000
         select S3C2410_IOTIMING if S3C2440_CPUFREQ
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the Simtec IM2440D20 module, also
           known as the Osiris.
@@ -57,6 +58,7 @@ config MACH_RX3715
         select CPU_S3C2440
         select S3C2440_XTAL_16934400
         select PM_H1940 if PM
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the HP iPAQ rx3715.
 
@@ -66,6 +68,7 @@ config ARCH_S3C2440
         select S3C2440_XTAL_16934400
         select MACH_SMDK
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the SMDK2440.
 
@@ -74,6 +77,7 @@ config MACH_NEXCODER_2440
         select CPU_S3C2440
         select S3C2440_XTAL_12000000
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board
 
@@ -88,6 +92,7 @@ config MACH_AT2440EVB
         bool "Avantech AT2440EVB development board"
         select CPU_S3C2440
         select S3C_DEV_USB_HOST
+        select S3C_DEV_NAND
         help
           Say Y here if you are using the AT2440EVB development board
 
@@ -97,6 +102,7 @@ config MACH_MINI2440
         select EEPROM_AT24
         select LEDS_TRIGGER_BACKLIGHT
         select SND_S3C24XX_SOC_S3C24XX_UDA134X
+        select S3C_DEV_NAND
         help
           Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
           available via various sources. It can come with a 3.5" or 7" touch LCD.
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
index f5af212066c3..770b72067e3d 100644
--- a/arch/arm/mach-s3c6400/Kconfig
+++ b/arch/arm/mach-s3c6400/Kconfig
@@ -26,6 +26,7 @@ config MACH_SMDK6400
        bool "SMDK6400"
         select CPU_S3C6400
         select S3C_DEV_HSMMC
+        select S3C_DEV_NAND
         select S3C6400_SETUP_SDHCI
         help
           Machine support for the Samsung SMDK6400
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c6410/Kconfig
index f9d0f09f9761..53fc3ff657f7 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c6410/Kconfig
@@ -102,6 +102,7 @@ config MACH_HMT
         bool "Airgoo HMT"
         select CPU_S3C6410
         select S3C_DEV_FB
+        select S3C_DEV_NAND
         select S3C_DEV_USB_HOST
         select S3C64XX_SETUP_FB_24BPP
         select HAVE_PWM
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index 95f9c5a6d6d5..cb4521a6f42d 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -39,7 +39,7 @@ typedef struct {
 
 static sa1100_dma_t dma_chan[SA1100_DMA_CHANNELS];
 
-static spinlock_t dma_list_lock;
+static DEFINE_SPINLOCK(dma_list_lock);
 
 
 static irqreturn_t dma_irq_handler(int irq, void *dev_id)
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index 337b9aabce49..801b21e7f677 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -81,6 +81,18 @@ config MACH_U300_SEMI_IS_SHARED
                 Memory Interface) from both from access and application
                 side.
 
+config MACH_U300_SPIDUMMY
+        bool "SSP/SPI dummy chip"
+        select SPI
+        select SPI_MASTER
+        select SPI_PL022
+        help
+                This creates a small kernel module that creates a dummy
+                SPI device to be used for loopback tests. Regularly used
+                to test reference designs. If you're not testing SPI,
+                you don't need it. Selecting this will activate the
+                SPI framework and ARM PL022 support.
+
 comment "All the settings below must match the bootloader's settings"
 
 config MACH_U300_ACCESS_MEM_SIZE
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile
index 24950e0df4b4..885b5c027c1e 100644
--- a/arch/arm/mach-u300/Makefile
+++ b/arch/arm/mach-u300/Makefile
@@ -9,3 +9,6 @@ obj-		:=
 
 obj-$(CONFIG_ARCH_U300)           += u300.o
 obj-$(CONFIG_MMC)                 += mmc.o
+obj-$(CONFIG_SPI_PL022)           += spi.o
+obj-$(CONFIG_MACH_U300_SPIDUMMY)  += dummyspichip.o
+obj-$(CONFIG_I2C_STU300)          += i2c.o
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 2e9b8ccd8ec2..be60d6deee8b 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -32,6 +32,8 @@
 
 #include "clock.h"
 #include "mmc.h"
+#include "spi.h"
+#include "i2c.h"
 
 /*
  * Static I/O mappings that are needed for booting the U300 platforms. The
@@ -378,14 +380,14 @@ static struct platform_device wdog_device = {
 };
 
 static struct platform_device i2c0_device = {
-        .name = "stddci2c",
+        .name = "stu300",
         .id = 0,
         .num_resources = ARRAY_SIZE(i2c0_resources),
         .resource = i2c0_resources,
 };
 
 static struct platform_device i2c1_device = {
-        .name = "stddci2c",
+        .name = "stu300",
         .id = 1,
         .num_resources = ARRAY_SIZE(i2c1_resources),
         .resource = i2c1_resources,
@@ -611,6 +613,8 @@ void __init u300_init_devices(void)
         /* Wait for the PLL208 to lock if not locked in yet */
         while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
                  U300_SYSCON_CSR_PLL208_LOCK_IND));
+        /* Initialize SPI device with some board specifics */
+        u300_spi_init(&pl022_device);
 
         /* Register the AMBA devices in the AMBA bus abstraction layer */
         u300_clock_primecells();
@@ -622,6 +626,12 @@ void __init u300_init_devices(void)
 
         u300_assign_physmem();
 
+        /* Register subdevices on the I2C buses */
+        u300_i2c_register_board_devices();
+
+        /* Register subdevices on the SPI bus */
+        u300_spi_register_board_devices();
+
         /* Register the platform devices */
         platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
 
diff --git a/arch/arm/mach-u300/dummyspichip.c b/arch/arm/mach-u300/dummyspichip.c
new file mode 100644
index 000000000000..962f9de454de
--- /dev/null
+++ b/arch/arm/mach-u300/dummyspichip.c
@@ -0,0 +1,290 @@
+/*
+ * arch/arm/mach-u300/dummyspichip.c
+ *
+ * Copyright (C) 2007-2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ * This is a dummy loopback SPI "chip" used for testing SPI.
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/sysfs.h>
+#include <linux/mutex.h>
+#include <linux/spi/spi.h>
+#include <linux/dma-mapping.h>
+/*
+ * WARNING! Do not include this pl022-specific controller header
+ * for any generic driver. It is only done in this dummy chip
+ * because we alter the chip configuration in order to test some
+ * different settings on the loopback device. Normal chip configs
+ * shall be STATIC and not altered by the driver!
+ */
+#include <linux/amba/pl022.h>
+
+struct dummy {
+        struct device *dev;
+        struct mutex lock;
+};
+
+#define DMA_TEST_SIZE 2048
+
+/* When we cat /sys/bus/spi/devices/spi0.0/looptest this will be triggered */
+static ssize_t dummy_looptest(struct device *dev,
+                struct device_attribute *attr, char *buf)
+{
+        struct spi_device *spi = to_spi_device(dev);
+        struct dummy *p_dummy = dev_get_drvdata(&spi->dev);
+
+        /*
+         * WARNING! Do not dereference the chip-specific data in any normal
+         * driver for a chip. It is usually STATIC and shall not be read
+         * or written to. Your chip driver should NOT depend on fields in this
+         * struct, this is just used here to alter the behaviour of the chip
+         * in order to perform tests.
+         */
+        struct pl022_config_chip *chip_info = spi->controller_data;
+        int status;
+        u8 txbuf[14] = {0xDE, 0xAD, 0xBE, 0xEF, 0x2B, 0xAD,
+                        0xCA, 0xFE, 0xBA, 0xBE, 0xB1, 0x05,
+                        0xF0, 0x0D};
+        u8 rxbuf[14];
+        u8 *bigtxbuf_virtual;
+        u8 *bigrxbuf_virtual;
+
+        if (mutex_lock_interruptible(&p_dummy->lock))
+                return -ERESTARTSYS;
+
+        bigtxbuf_virtual = kmalloc(DMA_TEST_SIZE, GFP_KERNEL);
+        if (bigtxbuf_virtual == NULL) {
+                status = -ENOMEM;
+                goto out;
+        }
+        bigrxbuf_virtual = kmalloc(DMA_TEST_SIZE, GFP_KERNEL);
+
+        /* Fill TXBUF with some happy pattern */
+        memset(bigtxbuf_virtual, 0xAA, DMA_TEST_SIZE);
+
+        /*
+         * Force chip to 8 bit mode
+         * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC!
+         */
+        chip_info->data_size = SSP_DATA_BITS_8;
+        /* You should NOT DO THIS EITHER */
+        spi->master->setup(spi);
+
+        /* Now run the tests for 8bit mode */
+        pr_info("Simple test 1: write 0xAA byte, read back garbage byte "
+                "in 8bit mode\n");
+        status = spi_w8r8(spi, 0xAA);
+        if (status < 0)
+                pr_warning("Siple test 1: FAILURE: spi_write_then_read "
+                           "failed with status %d\n", status);
+        else
+                pr_info("Simple test 1: SUCCESS!\n");
+
+        pr_info("Simple test 2: write 8 bytes, read back 8 bytes garbage "
+                "in 8bit mode (full FIFO)\n");
+        status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8);
+        if (status < 0)
+                pr_warning("Simple test 2: FAILURE: spi_write_then_read() "
+                           "failed with status %d\n", status);
+        else
+                pr_info("Simple test 2: SUCCESS!\n");
+
+        pr_info("Simple test 3: write 14 bytes, read back 14 bytes garbage "
+                "in 8bit mode (see if we overflow FIFO)\n");
+        status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14);
+        if (status < 0)
+                pr_warning("Simple test 3: FAILURE: failed with status %d "
+                           "(probably FIFO overrun)\n", status);
+        else
+                pr_info("Simple test 3: SUCCESS!\n");
+
+        pr_info("Simple test 4: write 8 bytes with spi_write(), read 8 "
+                "bytes garbage with spi_read() in 8bit mode\n");
+        status = spi_write(spi, &txbuf[0], 8);
+        if (status < 0)
+                pr_warning("Simple test 4 step 1: FAILURE: spi_write() "
+                           "failed with status %d\n", status);
+        else
+                pr_info("Simple test 4 step 1: SUCCESS!\n");
+        status = spi_read(spi, &rxbuf[0], 8);
+        if (status < 0)
+                pr_warning("Simple test 4 step 2: FAILURE: spi_read() "
+                           "failed with status %d\n", status);
+        else
+                pr_info("Simple test 4 step 2: SUCCESS!\n");
+
+        pr_info("Simple test 5: write 14 bytes with spi_write(), read "
+                "14 bytes garbage with spi_read() in 8bit mode\n");
+        status = spi_write(spi, &txbuf[0], 14);
+        if (status < 0)
+                pr_warning("Simple test 5 step 1: FAILURE: spi_write() "
+                           "failed with status %d (probably FIFO overrun)\n",
+                           status);
+        else
+                pr_info("Simple test 5 step 1: SUCCESS!\n");
+        status = spi_read(spi, &rxbuf[0], 14);
+        if (status < 0)
+                pr_warning("Simple test 5 step 2: FAILURE: spi_read() "
+                           "failed with status %d (probably FIFO overrun)\n",
+                           status);
+        else
+                pr_info("Simple test 5: SUCCESS!\n");
+
+        pr_info("Simple test 6: write %d bytes with spi_write(), "
+                "read %d bytes garbage with spi_read() in 8bit mode\n",
+                DMA_TEST_SIZE, DMA_TEST_SIZE);
+        status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE);
+        if (status < 0)
+                pr_warning("Simple test 6 step 1: FAILURE: spi_write() "
+                           "failed with status %d (probably FIFO overrun)\n",
+                           status);
+        else
+                pr_info("Simple test 6 step 1: SUCCESS!\n");
+        status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE);
+        if (status < 0)
+                pr_warning("Simple test 6 step 2: FAILURE: spi_read() "
+                           "failed with status %d (probably FIFO overrun)\n",
+                           status);
+        else
+                pr_info("Simple test 6: SUCCESS!\n");
+
+
+        /*
+         * Force chip to 16 bit mode
+         * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC!
+         */
+        chip_info->data_size = SSP_DATA_BITS_16;
+        /* You should NOT DO THIS EITHER */
+        spi->master->setup(spi);
+
+        pr_info("Simple test 7: write 0xAA byte, read back garbage byte "
+                "in 16bit bus mode\n");
+        status = spi_w8r8(spi, 0xAA);
+        if (status == -EIO)
+                pr_info("Simple test 7: SUCCESS! (expected failure with "
+                        "status EIO)\n");
+        else if (status < 0)
+                pr_warning("Siple test 7: FAILURE: spi_write_then_read "
+                           "failed with status %d\n", status);
+        else
+                pr_warning("Siple test 7: FAILURE: spi_write_then_read "
+                           "succeeded but it was expected to fail!\n");
+
+        pr_info("Simple test 8: write 8 bytes, read back 8 bytes garbage "
+                "in 16bit mode (full FIFO)\n");
+        status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8);
+        if (status < 0)
+                pr_warning("Simple test 8: FAILURE: spi_write_then_read() "
+                           "failed with status %d\n", status);
+        else
+                pr_info("Simple test 8: SUCCESS!\n");
+
+        pr_info("Simple test 9: write 14 bytes, read back 14 bytes garbage "
+                "in 16bit mode (see if we overflow FIFO)\n");
+        status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14);
+        if (status < 0)
+                pr_warning("Simple test 9: FAILURE: failed with status %d "
+                           "(probably FIFO overrun)\n", status);
+        else
+                pr_info("Simple test 9: SUCCESS!\n");
+
+        pr_info("Simple test 10: write %d bytes with spi_write(), "
+               "read %d bytes garbage with spi_read() in 16bit mode\n",
+               DMA_TEST_SIZE, DMA_TEST_SIZE);
+        status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE);
+        if (status < 0)
+                pr_warning("Simple test 10 step 1: FAILURE: spi_write() "
+                           "failed with status %d (probably FIFO overrun)\n",
+                           status);
+        else
+                pr_info("Simple test 10 step 1: SUCCESS!\n");
+
+        status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE);
+        if (status < 0)
+                pr_warning("Simple test 10 step 2: FAILURE: spi_read() "
+                           "failed with status %d (probably FIFO overrun)\n",
+                           status);
+        else
+                pr_info("Simple test 10: SUCCESS!\n");
+
+        status = sprintf(buf, "loop test complete\n");
+        kfree(bigrxbuf_virtual);
+        kfree(bigtxbuf_virtual);
+ out:
+        mutex_unlock(&p_dummy->lock);
+        return status;
+}
+
+static DEVICE_ATTR(looptest, S_IRUGO, dummy_looptest, NULL);
+
+static int __devinit pl022_dummy_probe(struct spi_device *spi)
+{
+        struct dummy *p_dummy;
+        int status;
+
+        dev_info(&spi->dev, "probing dummy SPI device\n");
+
+        p_dummy = kzalloc(sizeof *p_dummy, GFP_KERNEL);
+        if (!p_dummy)
+                return -ENOMEM;
+
+        dev_set_drvdata(&spi->dev, p_dummy);
+        mutex_init(&p_dummy->lock);
+
+        /* sysfs hook */
+        status = device_create_file(&spi->dev, &dev_attr_looptest);
+        if (status) {
+                dev_dbg(&spi->dev, "device_create_file looptest failure.\n");
+                goto out_dev_create_looptest_failed;
+        }
+
+        return 0;
+
+out_dev_create_looptest_failed:
+        dev_set_drvdata(&spi->dev, NULL);
+        kfree(p_dummy);
+        return status;
+}
+
+static int __devexit pl022_dummy_remove(struct spi_device *spi)
+{
+        struct dummy *p_dummy = dev_get_drvdata(&spi->dev);
+
+        dev_info(&spi->dev, "removing dummy SPI device\n");
+        device_remove_file(&spi->dev, &dev_attr_looptest);
+        dev_set_drvdata(&spi->dev, NULL);
+        kfree(p_dummy);
+
+        return 0;
+}
+
+static struct spi_driver pl022_dummy_driver = {
+        .driver = {
+                .name   = "spi-dummy",
+                .owner  = THIS_MODULE,
+        },
+        .probe  = pl022_dummy_probe,
+        .remove = __devexit_p(pl022_dummy_remove),
+};
+
+static int __init pl022_init_dummy(void)
+{
+        return spi_register_driver(&pl022_dummy_driver);
+}
+
+static void __exit pl022_exit_dummy(void)
+{
+        spi_unregister_driver(&pl022_dummy_driver);
+}
+
+module_init(pl022_init_dummy);
+module_exit(pl022_exit_dummy);
+
+MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
+MODULE_DESCRIPTION("PL022 SSP/SPI DUMMY Linux driver");
+MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-u300/gpio.c b/arch/arm/mach-u300/gpio.c
index 308cdb197a92..63c8f27fb15a 100644
--- a/arch/arm/mach-u300/gpio.c
+++ b/arch/arm/mach-u300/gpio.c
@@ -25,11 +25,6 @@
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
 
-/* Need access to SYSCON registers for PADmuxing */
-#include <mach/syscon.h>
-
-#include "padmux.h"
-
 /* Reference to GPIO block clock */
 static struct clk *clk;
 
@@ -606,14 +601,6 @@ static int __init gpio_probe(struct platform_device *pdev)
         writel(U300_GPIO_CR_BLOCK_CLKRQ_ENABLE, virtbase + U300_GPIO_CR);
 #endif
 
-        /* Set up some padmuxing here */
-#ifdef CONFIG_MMC
-        pmx_set_mission_mode_mmc();
-#endif
-#ifdef CONFIG_SPI_PL022
-        pmx_set_mission_mode_spi();
-#endif
-
         gpio_set_initial_values();
 
         for (num_irqs = 0 ; num_irqs < U300_GPIO_NUM_PORTS; num_irqs++) {
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c
new file mode 100644
index 000000000000..10be1f888b27
--- /dev/null
+++ b/arch/arm/mach-u300/i2c.c
@@ -0,0 +1,43 @@
+/*
+ * arch/arm/mach-u300/i2c.c
+ *
+ * Copyright (C) 2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ *
+ * Register board i2c devices
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ */
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include <mach/irqs.h>
+
+static struct i2c_board_info __initdata bus0_i2c_board_info[] = {
+        {
+                .type = "ab3100",
+                .addr = 0x48,
+                .irq = IRQ_U300_IRQ0_EXT,
+        },
+};
+
+static struct i2c_board_info __initdata bus1_i2c_board_info[] = {
+#ifdef CONFIG_MACH_U300_BS335
+        {
+                .type = "fwcam",
+                .addr = 0x10,
+        },
+        {
+                .type = "fwcam",
+                .addr = 0x5d,
+        },
+#else
+        { },
+#endif
+};
+
+void __init u300_i2c_register_board_devices(void)
+{
+        i2c_register_board_info(0, bus0_i2c_board_info,
+                                ARRAY_SIZE(bus0_i2c_board_info));
+        i2c_register_board_info(1, bus1_i2c_board_info,
+                                ARRAY_SIZE(bus1_i2c_board_info));
+}
diff --git a/arch/arm/mach-u300/i2c.h b/arch/arm/mach-u300/i2c.h
new file mode 100644
index 000000000000..485c02e5c06d
--- /dev/null
+++ b/arch/arm/mach-u300/i2c.h
@@ -0,0 +1,23 @@
+/*
+ * arch/arm/mach-u300/i2c.h
+ *
+ * Copyright (C) 2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ *
+ * Register board i2c devices
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ */
+
+#ifndef MACH_U300_I2C_H
+#define MACH_U300_I2C_H
+
+#ifdef CONFIG_I2C_STU300
+void __init u300_i2c_register_board_devices(void);
+#else
+/* Compile out this stuff if no I2C adapter is available */
+static inline void __init u300_i2c_register_board_devices(void)
+{
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-u300/include/mach/memory.h b/arch/arm/mach-u300/include/mach/memory.h
index bf134bcc129d..ab000df7fc03 100644
--- a/arch/arm/mach-u300/include/mach/memory.h
+++ b/arch/arm/mach-u300/include/mach/memory.h
@@ -35,6 +35,14 @@
 #endif
 
 /*
+ * TCM memory whereabouts
+ */
+#define ITCM_OFFSET     0xffff2000
+#define ITCM_END        0xffff3fff
+#define DTCM_OFFSET     0xffff4000
+#define DTCM_END        0xffff5fff
+
+/*
  * We enable a real big DMA buffer if need be.
  */
 #define CONSISTENT_DMA_SIZE SZ_4M
diff --git a/arch/arm/mach-u300/include/mach/syscon.h b/arch/arm/mach-u300/include/mach/syscon.h
index 1c90d1b1ccb6..7444f5c7da97 100644
--- a/arch/arm/mach-u300/include/mach/syscon.h
+++ b/arch/arm/mach-u300/include/mach/syscon.h
@@ -240,8 +240,13 @@
 #define U300_SYSCON_PMC1LR_CDI_MASK                             (0xC000)
 #define U300_SYSCON_PMC1LR_CDI_CDI                              (0x0000)
 #define U300_SYSCON_PMC1LR_CDI_EMIF                             (0x4000)
+#ifdef CONFIG_MACH_U300_BS335
+#define U300_SYSCON_PMC1LR_CDI_CDI2                             (0x8000)
+#define U300_SYSCON_PMC1LR_CDI_WCDMA_APP_GPIO                   (0xC000)
+#elif CONFIG_MACH_U300_BS365
 #define U300_SYSCON_PMC1LR_CDI_GPIO                             (0x8000)
 #define U300_SYSCON_PMC1LR_CDI_WCDMA                            (0xC000)
+#endif
 #define U300_SYSCON_PMC1LR_PDI_MASK                             (0x3000)
 #define U300_SYSCON_PMC1LR_PDI_PDI                              (0x0000)
 #define U300_SYSCON_PMC1LR_PDI_EGG                              (0x1000)
@@ -345,19 +350,69 @@
 #define U300_SYSCON_MMCR_MASK                                   (0x0003)
 #define U300_SYSCON_MMCR_MMC_FB_CLK_SEL_ENABLE                  (0x0002)
 #define U300_SYSCON_MMCR_MSPRO_FREQSEL_ENABLE                   (0x0001)
-
+/* Pull up/down control (R/W) */
+#define U300_SYSCON_PUCR                                        (0x104)
+#define U300_SYSCON_PUCR_EMIF_1_WAIT_N_PU_ENABLE                (0x0200)
+#define U300_SYSCON_PUCR_EMIF_1_NFIF_READY_PU_ENABLE            (0x0100)
+#define U300_SYSCON_PUCR_EMIF_1_16BIT_PU_ENABLE                 (0x0080)
+#define U300_SYSCON_PUCR_EMIF_1_8BIT_PU_ENABLE                  (0x0040)
+#define U300_SYSCON_PUCR_KEY_IN_PU_EN_MASK                      (0x003F)
+/* Padmux 2 control */
+#define U300_SYSCON_PMC2R                                       (0x100)
+#define U300_SYSCON_PMC2R_APP_MISC_0_MASK                       (0x00C0)
+#define U300_SYSCON_PMC2R_APP_MISC_0_APP_GPIO                   (0x0000)
+#define U300_SYSCON_PMC2R_APP_MISC_0_EMIF_SDRAM                 (0x0040)
+#define U300_SYSCON_PMC2R_APP_MISC_0_MMC                        (0x0080)
+#define U300_SYSCON_PMC2R_APP_MISC_0_CDI2                       (0x00C0)
+#define U300_SYSCON_PMC2R_APP_MISC_1_MASK                       (0x0300)
+#define U300_SYSCON_PMC2R_APP_MISC_1_APP_GPIO                   (0x0000)
+#define U300_SYSCON_PMC2R_APP_MISC_1_EMIF_SDRAM                 (0x0100)
+#define U300_SYSCON_PMC2R_APP_MISC_1_MMC                        (0x0200)
+#define U300_SYSCON_PMC2R_APP_MISC_1_CDI2                       (0x0300)
+#define U300_SYSCON_PMC2R_APP_MISC_2_MASK                       (0x0C00)
+#define U300_SYSCON_PMC2R_APP_MISC_2_APP_GPIO                   (0x0000)
+#define U300_SYSCON_PMC2R_APP_MISC_2_EMIF_SDRAM                 (0x0400)
+#define U300_SYSCON_PMC2R_APP_MISC_2_MMC                        (0x0800)
+#define U300_SYSCON_PMC2R_APP_MISC_2_CDI2                       (0x0C00)
+#define U300_SYSCON_PMC2R_APP_MISC_3_MASK                       (0x3000)
+#define U300_SYSCON_PMC2R_APP_MISC_3_APP_GPIO                   (0x0000)
+#define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM                 (0x1000)
+#define U300_SYSCON_PMC2R_APP_MISC_3_MMC                        (0x2000)
+#define U300_SYSCON_PMC2R_APP_MISC_3_CDI2                       (0x3000)
+#define U300_SYSCON_PMC2R_APP_MISC_4_MASK                       (0xC000)
+#define U300_SYSCON_PMC2R_APP_MISC_4_APP_GPIO                   (0x0000)
+#define U300_SYSCON_PMC2R_APP_MISC_4_EMIF_SDRAM                 (0x4000)
+#define U300_SYSCON_PMC2R_APP_MISC_4_MMC                        (0x8000)
+#define U300_SYSCON_PMC2R_APP_MISC_4_ACC_GPIO                   (0xC000)
 /* TODO: More SYSCON registers missing */
 #define U300_SYSCON_PMC3R                                       (0x10c)
 #define U300_SYSCON_PMC3R_APP_MISC_11_MASK                      (0xc000)
 #define U300_SYSCON_PMC3R_APP_MISC_11_SPI                       (0x4000)
 #define U300_SYSCON_PMC3R_APP_MISC_10_MASK                      (0x3000)
 #define U300_SYSCON_PMC3R_APP_MISC_10_SPI                       (0x1000)
-/* TODO: Missing other configs, I just added the SPI stuff */
-
+/* TODO: Missing other configs */
+#define U300_SYSCON_PMC4R                                       (0x168)
+#define U300_SYSCON_PMC4R_APP_MISC_12_MASK                      (0x0003)
+#define U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO                  (0x0000)
+#define U300_SYSCON_PMC4R_APP_MISC_13_MASK                      (0x000C)
+#define U300_SYSCON_PMC4R_APP_MISC_13_CDI                       (0x0000)
+#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA                      (0x0004)
+#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA2                     (0x0008)
+#define U300_SYSCON_PMC4R_APP_MISC_13_APP_GPIO                  (0x000C)
+#define U300_SYSCON_PMC4R_APP_MISC_14_MASK                      (0x0030)
+#define U300_SYSCON_PMC4R_APP_MISC_14_CDI                       (0x0000)
+#define U300_SYSCON_PMC4R_APP_MISC_14_SMIA                      (0x0010)
+#define U300_SYSCON_PMC4R_APP_MISC_14_CDI2                      (0x0020)
+#define U300_SYSCON_PMC4R_APP_MISC_14_APP_GPIO                  (0x0030)
+#define U300_SYSCON_PMC4R_APP_MISC_16_MASK                      (0x0300)
+#define U300_SYSCON_PMC4R_APP_MISC_16_APP_GPIO_13               (0x0000)
+#define U300_SYSCON_PMC4R_APP_MISC_16_APP_UART1_CTS             (0x0100)
+#define U300_SYSCON_PMC4R_APP_MISC_16_EMIF_1_STATIC_CS5_N       (0x0200)
 /* SYS_0_CLK_CONTROL first clock control 16bit (R/W) */
 #define U300_SYSCON_S0CCR                                       (0x120)
 #define U300_SYSCON_S0CCR_FIELD_MASK                            (0x43FF)
 #define U300_SYSCON_S0CCR_CLOCK_REQ                             (0x4000)
+#define U300_SYSCON_S0CCR_CLOCK_REQ_MONITOR                     (0x2000)
 #define U300_SYSCON_S0CCR_CLOCK_INV                             (0x0200)
 #define U300_SYSCON_S0CCR_CLOCK_FREQ_MASK                       (0x01E0)
 #define U300_SYSCON_S0CCR_CLOCK_SELECT_MASK                     (0x001E)
@@ -375,6 +430,7 @@
 #define U300_SYSCON_S1CCR                                       (0x124)
 #define U300_SYSCON_S1CCR_FIELD_MASK                            (0x43FF)
 #define U300_SYSCON_S1CCR_CLOCK_REQ                             (0x4000)
+#define U300_SYSCON_S1CCR_CLOCK_REQ_MONITOR                     (0x2000)
 #define U300_SYSCON_S1CCR_CLOCK_INV                             (0x0200)
 #define U300_SYSCON_S1CCR_CLOCK_FREQ_MASK                       (0x01E0)
 #define U300_SYSCON_S1CCR_CLOCK_SELECT_MASK                     (0x001E)
@@ -393,6 +449,7 @@
 #define U300_SYSCON_S2CCR_FIELD_MASK                            (0xC3FF)
 #define U300_SYSCON_S2CCR_CLK_STEAL                             (0x8000)
 #define U300_SYSCON_S2CCR_CLOCK_REQ                             (0x4000)
+#define U300_SYSCON_S2CCR_CLOCK_REQ_MONITOR                     (0x2000)
 #define U300_SYSCON_S2CCR_CLOCK_INV                             (0x0200)
 #define U300_SYSCON_S2CCR_CLOCK_FREQ_MASK                       (0x01E0)
 #define U300_SYSCON_S2CCR_CLOCK_SELECT_MASK                     (0x001E)
@@ -425,6 +482,44 @@
 #define U300_SYSCON_MCR_PMGEN_CR_0_EMIF_0_SDRAM                 (0x000C)
 #define U300_SYSCON_MCR_PM1G_MODE_ENABLE                        (0x0002)
 #define U300_SYSCON_MCR_PMTG5_MODE_ENABLE                       (0x0001)
+/* SC_PLL_IRQ_CONTROL 16bit (R/W) */
+#define U300_SYSCON_PICR                                        (0x0130)
+#define U300_SYSCON_PICR_MASK                                   (0x00FF)
+#define U300_SYSCON_PICR_FORCE_PLL208_LOCK_LOW_ENABLE           (0x0080)
+#define U300_SYSCON_PICR_FORCE_PLL208_LOCK_HIGH_ENABLE          (0x0040)
+#define U300_SYSCON_PICR_FORCE_PLL13_LOCK_LOW_ENABLE            (0x0020)
+#define U300_SYSCON_PICR_FORCE_PLL13_LOCK_HIGH_ENABLE           (0x0010)
+#define U300_SYSCON_PICR_IRQMASK_PLL13_UNLOCK_ENABLE            (0x0008)
+#define U300_SYSCON_PICR_IRQMASK_PLL13_LOCK_ENABLE              (0x0004)
+#define U300_SYSCON_PICR_IRQMASK_PLL208_UNLOCK_ENABLE           (0x0002)
+#define U300_SYSCON_PICR_IRQMASK_PLL208_LOCK_ENABLE             (0x0001)
+/* SC_PLL_IRQ_STATUS 16 bit (R/-) */
+#define U300_SYSCON_PISR                                        (0x0134)
+#define U300_SYSCON_PISR_MASK                                   (0x000F)
+#define U300_SYSCON_PISR_PLL13_UNLOCK_IND                       (0x0008)
+#define U300_SYSCON_PISR_PLL13_LOCK_IND                         (0x0004)
+#define U300_SYSCON_PISR_PLL208_UNLOCK_IND                      (0x0002)
+#define U300_SYSCON_PISR_PLL208_LOCK_IND                        (0x0001)
+/* SC_PLL_IRQ_CLEAR 16 bit (-/W) */
+#define U300_SYSCON_PICLR                                       (0x0138)
+#define U300_SYSCON_PICLR_MASK                                  (0x000F)
+#define U300_SYSCON_PICLR_RWMASK                                (0x0000)
+#define U300_SYSCON_PICLR_PLL13_UNLOCK_SC                       (0x0008)
+#define U300_SYSCON_PICLR_PLL13_LOCK_SC                         (0x0004)
+#define U300_SYSCON_PICLR_PLL208_UNLOCK_SC                      (0x0002)
+#define U300_SYSCON_PICLR_PLL208_LOCK_SC                        (0x0001)
+/* CAMIF_CONTROL 16 bit (-/W) */
+#define U300_SYSCON_CICR                                        (0x013C)
+#define U300_SYSCON_CICR_MASK                                   (0x0FFF)
+#define U300_SYSCON_CICR_APP_SUBLVDS_TESTMODE_MASK              (0x0F00)
+#define U300_SYSCON_CICR_APP_SUBLVDS_TESTMODE_PORT1             (0x0C00)
+#define U300_SYSCON_CICR_APP_SUBLVDS_TESTMODE_PORT0             (0x0300)
+#define U300_SYSCON_CICR_APP_SUBLVDS_RESCON_MASK                (0x00F0)
+#define U300_SYSCON_CICR_APP_SUBLVDS_RESCON_PORT1               (0x00C0)
+#define U300_SYSCON_CICR_APP_SUBLVDS_RESCON_PORT0               (0x0030)
+#define U300_SYSCON_CICR_APP_SUBLVDS_PWR_DWN_N_MASK             (0x000F)
+#define U300_SYSCON_CICR_APP_SUBLVDS_PWR_DWN_N_PORT1            (0x000C)
+#define U300_SYSCON_CICR_APP_SUBLVDS_PWR_DWN_N_PORT0            (0x0003)
 /* Clock activity observability register 0 */
 #define U300_SYSCON_C0OAR                                       (0x140)
 #define U300_SYSCON_C0OAR_MASK                                  (0xFFFF)
@@ -513,7 +608,7 @@
 /**
  * CPU medium frequency in MHz
  */
-#define SYSCON_CPU_CLOCK_MEDIUM  104
+#define SYSCON_CPU_CLOCK_MEDIUM   52
 /**
  * CPU low frequency in MHz
  */
@@ -527,7 +622,7 @@
 /**
  * EMIF medium frequency in MHz
  */
-#define SYSCON_EMIF_CLOCK_MEDIUM 104
+#define SYSCON_EMIF_CLOCK_MEDIUM  52
 /**
  * EMIF low frequency in MHz
  */
@@ -541,7 +636,7 @@
 /**
  * AHB medium frequency in MHz
  */
-#define SYSCON_AHB_CLOCK_MEDIUM   52
+#define SYSCON_AHB_CLOCK_MEDIUM   26
 /**
  * AHB low frequency in MHz
  */
@@ -553,6 +648,15 @@ enum syscon_busmaster {
   SYSCON_BM_VIDEO_ENC
 };
 
+/* Selectr a resistor or a set of resistors */
+enum syscon_pull_up_down {
+  SYSCON_PU_KEY_IN_EN,
+  SYSCON_PU_EMIF_1_8_BIT_EN,
+  SYSCON_PU_EMIF_1_16_BIT_EN,
+  SYSCON_PU_EMIF_1_NFIF_READY_EN,
+  SYSCON_PU_EMIF_1_NFIF_WAIT_N_EN,
+};
+
 /*
  * Note that this array must match the order of the array "clk_reg"
  * in syscon.c
@@ -575,6 +679,7 @@ enum syscon_clk {
   SYSCON_CLKCONTROL_SPI,
   SYSCON_CLKCONTROL_I2S0_CORE,
   SYSCON_CLKCONTROL_I2S1_CORE,
+  SYSCON_CLKCONTROL_UART1,
   SYSCON_CLKCONTROL_AAIF,
   SYSCON_CLKCONTROL_AHB,
   SYSCON_CLKCONTROL_APEX,
@@ -604,7 +709,8 @@ enum syscon_sysclk_mode {
 
 enum syscon_sysclk_req {
   SYSCON_SYSCLKREQ_DISABLED,
-  SYSCON_SYSCLKREQ_ACTIVE_LOW
+  SYSCON_SYSCLKREQ_ACTIVE_LOW,
+  SYSCON_SYSCLKREQ_MONITOR
 };
 
 enum syscon_clk_mode {
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 585cc013639d..7b6b016786bb 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -19,15 +19,16 @@
 #include <linux/regulator/consumer.h>
 #include <linux/regulator/machine.h>
 #include <linux/gpio.h>
+#include <linux/amba/mmci.h>
 
-#include <asm/mach/mmc.h>
 #include "mmc.h"
+#include "padmux.h"
 
 struct mmci_card_event {
         struct input_dev *mmc_input;
         int mmc_inserted;
         struct work_struct workq;
-        struct mmc_platform_data mmc0_plat_data;
+        struct mmci_platform_data mmc0_plat_data;
 };
 
 static unsigned int mmc_status(struct device *dev)
@@ -146,6 +147,7 @@ int __devinit mmc_init(struct amba_device *adev)
 {
         struct mmci_card_event *mmci_card;
         struct device *mmcsd_device = &adev->dev;
+        struct pmx *pmx;
         int ret = 0;
 
         mmci_card = kzalloc(sizeof(struct mmci_card_event), GFP_KERNEL);
@@ -158,6 +160,8 @@ int __devinit mmc_init(struct amba_device *adev)
         mmci_card->mmc0_plat_data.status = mmc_status;
         mmci_card->mmc0_plat_data.gpio_wp = -1;
         mmci_card->mmc0_plat_data.gpio_cd = -1;
+        mmci_card->mmc0_plat_data.capabilities = MMC_CAP_MMC_HIGHSPEED |
+                MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA;
 
         mmcsd_device->platform_data = (void *) &mmci_card->mmc0_plat_data;
 
@@ -207,6 +211,20 @@ int __devinit mmc_init(struct amba_device *adev)
 
         input_set_drvdata(mmci_card->mmc_input, mmci_card);
 
+        /*
+         * Setup padmuxing for MMC. Since this must always be
+         * compiled into the kernel, pmx is never released.
+         */
+        pmx = pmx_get(mmcsd_device, U300_APP_PMX_MMC_SETTING);
+
+        if (IS_ERR(pmx))
+                pr_warning("Could not get padmux handle\n");
+        else {
+                ret = pmx_activate(mmcsd_device, pmx);
+                if (IS_ERR_VALUE(ret))
+                        pr_warning("Could not activate padmuxing\n");
+        }
+
         ret = gpio_register_callback(U300_GPIO_PIN_MMC_CD, mmci_callback,
                                      mmci_card);
 
diff --git a/arch/arm/mach-u300/padmux.c b/arch/arm/mach-u300/padmux.c
index f3664564f086..4c93c6cefd37 100644
--- a/arch/arm/mach-u300/padmux.c
+++ b/arch/arm/mach-u300/padmux.c
@@ -6,53 +6,362 @@
  * Copyright (C) 2009 ST-Ericsson AB
  * License terms: GNU General Public License (GPL) version 2
  * U300 PADMUX functions
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- *
+ * Author: Martin Persson <martin.persson@stericsson.com>
  */
-#include <linux/io.h>
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/mutex.h>
+#include <linux/string.h>
+#include <linux/bug.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
 #include <mach/u300-regs.h>
 #include <mach/syscon.h>
-
 #include "padmux.h"
 
-/* Set the PAD MUX to route the MMC reader correctly to GPIO0. */
-void pmx_set_mission_mode_mmc(void)
-{
-        u16 val;
-
-        val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1LR);
-        val &= ~U300_SYSCON_PMC1LR_MMCSD_MASK;
-        writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1LR);
-        val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
-        val &= ~U300_SYSCON_PMC1HR_APP_GPIO_1_MASK;
-        val |= U300_SYSCON_PMC1HR_APP_GPIO_1_MMC;
-        writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
-}
-
-void pmx_set_mission_mode_spi(void)
-{
-        u16 val;
-
-        /* Set up padmuxing so the SPI port and its chipselects are active */
-        val = readw(U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
-        /*
-         * Activate the SPI port (disable the use of these pins for generic
-         * GPIO, DSP, AAIF
-         */
-        val &= ~U300_SYSCON_PMC1HR_APP_SPI_2_MASK;
-        val |= U300_SYSCON_PMC1HR_APP_SPI_2_SPI;
-        /*
-         * Use GPIO pin SPI CS1 for CS1 actually (it can be used for other
-         * things also)
-         */
-        val &= ~U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK;
-        val |= U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI;
-        /*
-         * Use GPIO pin SPI CS2 for CS2 actually (it can be used for other
-         * things also)
-         */
-        val &= ~U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK;
-        val |= U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI;
-        writew(val, U300_SYSCON_VBASE + U300_SYSCON_PMC1HR);
+static DEFINE_MUTEX(pmx_mutex);
+
+const u32 pmx_registers[] = {
+        (U300_SYSCON_VBASE + U300_SYSCON_PMC1LR),
+        (U300_SYSCON_VBASE + U300_SYSCON_PMC1HR),
+        (U300_SYSCON_VBASE + U300_SYSCON_PMC2R),
+        (U300_SYSCON_VBASE + U300_SYSCON_PMC3R),
+        (U300_SYSCON_VBASE + U300_SYSCON_PMC4R)
+};
+
+/* High level functionality */
+
+/* Lazy dog:
+ * onmask = {
+ *   {"PMC1LR" mask, "PMC1LR" value},
+ *   {"PMC1HR" mask, "PMC1HR" value},
+ *   {"PMC2R"  mask, "PMC2R"  value},
+ *   {"PMC3R"  mask, "PMC3R"  value},
+ *   {"PMC4R"  mask, "PMC4R"  value}
+ * }
+ */
+static struct pmx mmc_setting = {
+        .setting = U300_APP_PMX_MMC_SETTING,
+        .default_on = false,
+        .activated = false,
+        .name = "MMC",
+        .onmask = {
+                   {U300_SYSCON_PMC1LR_MMCSD_MASK,
+                    U300_SYSCON_PMC1LR_MMCSD_MMCSD},
+                   {0, 0},
+                   {0, 0},
+                   {0, 0},
+                   {U300_SYSCON_PMC4R_APP_MISC_12_MASK,
+                    U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO}
+                   },
+};
+
+static struct pmx spi_setting = {
+        .setting = U300_APP_PMX_SPI_SETTING,
+        .default_on = false,
+        .activated = false,
+        .name = "SPI",
+        .onmask = {{0, 0},
+                   {U300_SYSCON_PMC1HR_APP_SPI_2_MASK |
+                    U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK |
+                    U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK,
+                    U300_SYSCON_PMC1HR_APP_SPI_2_SPI |
+                    U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI |
+                    U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI},
+                   {0, 0},
+                   {0, 0},
+                   {0, 0}
+                   },
+};
+
+/* Available padmux settings */
+static struct pmx *pmx_settings[] = {
+        &mmc_setting,
+        &spi_setting,
+};
+
+static void update_registers(struct pmx *pmx, bool activate)
+{
+        u16 regval, val, mask;
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(pmx_registers); i++) {
+                if (activate)
+                        val = pmx->onmask[i].val;
+                else
+                        val = 0;
+
+                mask = pmx->onmask[i].mask;
+                if (mask != 0) {
+                        regval = readw(pmx_registers[i]);
+                        regval &= ~mask;
+                        regval |= val;
+                        writew(regval, pmx_registers[i]);
+                }
+        }
+}
+
+struct pmx *pmx_get(struct device *dev, enum pmx_settings setting)
+{
+        int i;
+        struct pmx *pmx = ERR_PTR(-ENOENT);
+
+        if (dev == NULL)
+                return ERR_PTR(-EINVAL);
+
+        mutex_lock(&pmx_mutex);
+        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
+
+                if (setting == pmx_settings[i]->setting) {
+
+                        if (pmx_settings[i]->dev != NULL) {
+                                WARN(1, "padmux: required setting "
+                                     "in use by another consumer\n");
+                        } else {
+                                pmx = pmx_settings[i];
+                                pmx->dev = dev;
+                                dev_dbg(dev, "padmux: setting nr %d is now "
+                                        "bound to %s and ready to use\n",
+                                        setting, dev_name(dev));
+                                break;
+                        }
+                }
+        }
+        mutex_unlock(&pmx_mutex);
+
+        return pmx;
+}
+EXPORT_SYMBOL(pmx_get);
+
+int pmx_put(struct device *dev, struct pmx *pmx)
+{
+        int i;
+        int ret = -ENOENT;
+
+        if (pmx == NULL || dev == NULL)
+                return -EINVAL;
+
+        mutex_lock(&pmx_mutex);
+        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
+
+                if (pmx->setting == pmx_settings[i]->setting) {
+
+                        if (dev != pmx->dev) {
+                                WARN(1, "padmux: cannot release handle as "
+                                        "it is bound to another consumer\n");
+                                ret = -EINVAL;
+                                break;
+                        } else {
+                                pmx_settings[i]->dev = NULL;
+                                ret = 0;
+                                break;
+                        }
+                }
+        }
+        mutex_unlock(&pmx_mutex);
+
+        return ret;
+}
+EXPORT_SYMBOL(pmx_put);
+
+int pmx_activate(struct device *dev, struct pmx *pmx)
+{
+        int i, j, ret;
+        ret = 0;
+
+        if (pmx == NULL || dev == NULL)
+                return -EINVAL;
+
+        mutex_lock(&pmx_mutex);
+
+        /* Make sure the required bits are not used */
+        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
+
+                if (pmx_settings[i]->dev == NULL || pmx_settings[i] == pmx)
+                        continue;
+
+                for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
+
+                        if (pmx_settings[i]->onmask[j].mask & pmx->
+                                onmask[j].mask) {
+                                /* More than one entry on the same bits */
+                                WARN(1, "padmux: cannot activate "
+                                        "setting. Bit conflict with "
+                                        "an active setting\n");
+
+                                ret = -EUSERS;
+                                goto exit;
+                        }
+                }
+        }
+        update_registers(pmx, true);
+        pmx->activated = true;
+        dev_dbg(dev, "padmux: setting nr %d is activated\n",
+                pmx->setting);
+
+exit:
+        mutex_unlock(&pmx_mutex);
+        return ret;
+}
+EXPORT_SYMBOL(pmx_activate);
+
+int pmx_deactivate(struct device *dev, struct pmx *pmx)
+{
+        int i;
+        int ret = -ENOENT;
+
+        if (pmx == NULL || dev == NULL)
+                return -EINVAL;
+
+        mutex_lock(&pmx_mutex);
+        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
+
+                if (pmx_settings[i]->dev == NULL)
+                        continue;
+
+                if (pmx->setting == pmx_settings[i]->setting) {
+
+                        if (dev != pmx->dev) {
+                                WARN(1, "padmux: cannot deactivate "
+                                     "pmx setting as it was activated "
+                                     "by another consumer\n");
+
+                                ret = -EBUSY;
+                                continue;
+                        } else {
+                                update_registers(pmx, false);
+                                pmx_settings[i]->dev = NULL;
+                                pmx->activated = false;
+                                ret = 0;
+                                dev_dbg(dev, "padmux: setting nr %d is deactivated",
+                                        pmx->setting);
+                                break;
+                        }
+                }
+        }
+        mutex_unlock(&pmx_mutex);
+
+        return ret;
+}
+EXPORT_SYMBOL(pmx_deactivate);
+
+/*
+ * For internal use only. If it is to be exported,
+ * it should be reentrant. Notice that pmx_activate
+ * (i.e. runtime settings) always override default settings.
+ */
+static int pmx_set_default(void)
+{
+        /* Used to identify several entries on the same bits */
+        u16 modbits[ARRAY_SIZE(pmx_registers)];
+
+        int i, j;
+
+        memset(modbits, 0, ARRAY_SIZE(pmx_registers) * sizeof(u16));
+
+        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
+
+                if (!pmx_settings[i]->default_on)
+                        continue;
+
+                for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
+
+                        /* Make sure there is only one entry on the same bits */
+                        if (modbits[j] & pmx_settings[i]->onmask[j].mask) {
+                                BUG();
+                                return -EUSERS;
+                        }
+                        modbits[j] |= pmx_settings[i]->onmask[j].mask;
+                }
+                update_registers(pmx_settings[i], true);
+        }
+        return 0;
 }
+
+#if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG))
+static int pmx_show(struct seq_file *s, void *data)
+{
+        int i;
+        seq_printf(s, "-------------------------------------------------\n");
+        seq_printf(s, "SETTING     BOUND TO DEVICE               STATE\n");
+        seq_printf(s, "-------------------------------------------------\n");
+        mutex_lock(&pmx_mutex);
+        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
+                /* Format pmx and device name nicely */
+                char cdp[33];
+                int chars;
+
+                chars = snprintf(&cdp[0], 17, "%s", pmx_settings[i]->name);
+                while (chars < 16) {
+                        cdp[chars] = ' ';
+                        chars++;
+                }
+                chars = snprintf(&cdp[16], 17, "%s", pmx_settings[i]->dev ?
+                                dev_name(pmx_settings[i]->dev) : "N/A");
+                while (chars < 16) {
+                        cdp[chars+16] = ' ';
+                        chars++;
+                }
+                cdp[32] = '\0';
+
+                seq_printf(s,
+                        "%s\t%s\n",
+                        &cdp[0],
+                        pmx_settings[i]->activated ?
+                        "ACTIVATED" : "DEACTIVATED"
+                        );
+
+        }
+        mutex_unlock(&pmx_mutex);
+        return 0;
+}
+
+static int pmx_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, pmx_show, NULL);
+}
+
+static const struct file_operations pmx_operations = {
+        .owner          = THIS_MODULE,
+        .open           = pmx_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init init_pmx_read_debugfs(void)
+{
+        /* Expose a simple debugfs interface to view pmx settings */
+        (void) debugfs_create_file("padmux", S_IFREG | S_IRUGO,
+                                   NULL, NULL,
+                                   &pmx_operations);
+        return 0;
+}
+
+/*
+ * This needs to come in after the core_initcall(),
+ * because debugfs is not available until
+ * the subsystems come up.
+ */
+module_init(init_pmx_read_debugfs);
+#endif
+
+static int __init pmx_init(void)
+{
+        int ret;
+
+        ret = pmx_set_default();
+
+        if (IS_ERR_VALUE(ret))
+                pr_crit("padmux: default settings could not be set\n");
+
+        return 0;
+}
+
+/* Should be initialized before consumers */
+core_initcall(pmx_init);
diff --git a/arch/arm/mach-u300/padmux.h b/arch/arm/mach-u300/padmux.h
index 8c2099ac5046..6e8b86064097 100644
--- a/arch/arm/mach-u300/padmux.h
+++ b/arch/arm/mach-u300/padmux.h
@@ -6,14 +6,34 @@
  * Copyright (C) 2009 ST-Ericsson AB
  * License terms: GNU General Public License (GPL) version 2
  * U300 PADMUX API
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- *
+ * Author: Martin Persson <martin.persson@stericsson.com>
  */
 
 #ifndef __MACH_U300_PADMUX_H
 #define __MACH_U300_PADMUX_H
 
-void pmx_set_mission_mode_mmc(void);
-void pmx_set_mission_mode_spi(void);
+enum pmx_settings {
+        U300_APP_PMX_MMC_SETTING,
+        U300_APP_PMX_SPI_SETTING
+};
+
+struct pmx_onmask {
+        u16 mask;               /* Mask bits */
+        u16 val;                /* Value when active */
+};
+
+struct pmx {
+        struct device *dev;
+        enum pmx_settings setting;
+        char *name;
+        bool activated;
+        bool default_on;
+        struct pmx_onmask onmask[];
+};
+
+struct pmx *pmx_get(struct device *dev, enum pmx_settings setting);
+int pmx_put(struct device *dev, struct pmx *pmx);
+int pmx_activate(struct device *dev, struct pmx *pmx);
+int pmx_deactivate(struct device *dev, struct pmx *pmx);
 
 #endif
diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c
new file mode 100644
index 000000000000..f0e887bea30e
--- /dev/null
+++ b/arch/arm/mach-u300/spi.c
@@ -0,0 +1,124 @@
+/*
+ * arch/arm/mach-u300/spi.c
+ *
+ * Copyright (C) 2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ *
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ */
+#include <linux/device.h>
+#include <linux/amba/bus.h>
+#include <linux/spi/spi.h>
+#include <linux/amba/pl022.h>
+#include <linux/err.h>
+#include "padmux.h"
+
+/*
+ * The following is for the actual devices on the SSP/SPI bus
+ */
+#ifdef CONFIG_MACH_U300_SPIDUMMY
+static void select_dummy_chip(u32 chipselect)
+{
+        pr_debug("CORE: %s called with CS=0x%x (%s)\n",
+                 __func__,
+                 chipselect,
+                 chipselect ? "unselect chip" : "select chip");
+        /*
+         * Here you would write the chip select value to the GPIO pins if
+         * this was a real chip (but this is a loopback dummy).
+         */
+}
+
+struct pl022_config_chip dummy_chip_info = {
+        /* Nominally this is LOOPBACK_DISABLED, but this is our dummy chip! */
+        .lbm = LOOPBACK_ENABLED,
+        /*
+         * available POLLING_TRANSFER and INTERRUPT_TRANSFER,
+         * DMA_TRANSFER does not work
+         */
+        .com_mode = INTERRUPT_TRANSFER,
+        .iface = SSP_INTERFACE_MOTOROLA_SPI,
+        /* We can only act as master but SSP_SLAVE is possible in theory */
+        .hierarchy = SSP_MASTER,
+        /* 0 = drive TX even as slave, 1 = do not drive TX as slave */
+        .slave_tx_disable = 0,
+        /* LSB first */
+        .endian_tx = SSP_TX_LSB,
+        .endian_rx = SSP_RX_LSB,
+        .data_size = SSP_DATA_BITS_8, /* used to be 12 in some default */
+        .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,
+        .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC,
+        .clk_phase = SSP_CLK_SECOND_EDGE,
+        .clk_pol = SSP_CLK_POL_IDLE_LOW,
+        .ctrl_len = SSP_BITS_12,
+        .wait_state = SSP_MWIRE_WAIT_ZERO,
+        .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX,
+        /*
+         * This is where you insert a call to a function to enable CS
+         * (usually GPIO) for a certain chip.
+         */
+        .cs_control = select_dummy_chip,
+};
+#endif
+
+static struct spi_board_info u300_spi_devices[] = {
+#ifdef CONFIG_MACH_U300_SPIDUMMY
+        {
+                /* A dummy chip used for loopback tests */
+                .modalias       = "spi-dummy",
+                /* Really dummy, pass in additional chip config here */
+                .platform_data  = NULL,
+                /* This defines how the controller shall handle the device */
+                .controller_data = &dummy_chip_info,
+                /* .irq - no external IRQ routed from this device */
+                .max_speed_hz   = 1000000,
+                .bus_num        = 0, /* Only one bus on this chip */
+                .chip_select    = 0,
+                /* Means SPI_CS_HIGH, change if e.g low CS */
+                .mode           = 0,
+        },
+#endif
+};
+
+static struct pl022_ssp_controller ssp_platform_data = {
+        /* If you have several SPI buses this varies, we have only bus 0 */
+        .bus_id = 0,
+        /* Set this to 1 when we think we got DMA working */
+        .enable_dma = 0,
+        /*
+         * On the APP CPU GPIO 4, 5 and 6 are connected as generic
+         * chip selects for SPI. (Same on U330, U335 and U365.)
+         * TODO: make sure the GPIO driver can select these properly
+         * and do padmuxing accordingly too.
+         */
+        .num_chipselect = 3,
+};
+
+
+void __init u300_spi_init(struct amba_device *adev)
+{
+        struct pmx *pmx;
+
+        adev->dev.platform_data = &ssp_platform_data;
+        /*
+         * Setup padmuxing for SPI. Since this must always be
+         * compiled into the kernel, pmx is never released.
+         */
+        pmx = pmx_get(&adev->dev, U300_APP_PMX_SPI_SETTING);
+
+        if (IS_ERR(pmx))
+                dev_warn(&adev->dev, "Could not get padmux handle\n");
+        else {
+                int ret;
+
+                ret = pmx_activate(&adev->dev, pmx);
+                if (IS_ERR_VALUE(ret))
+                        dev_warn(&adev->dev, "Could not activate padmuxing\n");
+        }
+
+}
+void __init u300_spi_register_board_devices(void)
+{
+        /* Register any SPI devices */
+        spi_register_board_info(u300_spi_devices, ARRAY_SIZE(u300_spi_devices));
+}
diff --git a/arch/arm/mach-u300/spi.h b/arch/arm/mach-u300/spi.h
new file mode 100644
index 000000000000..bd3d867e240f
--- /dev/null
+++ b/arch/arm/mach-u300/spi.h
@@ -0,0 +1,26 @@
+/*
+ * arch/arm/mach-u300/spi.h
+ *
+ * Copyright (C) 2009 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ *
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ */
+#ifndef SPI_H
+#define SPI_H
+#include <linux/amba/bus.h>
+
+#ifdef CONFIG_SPI_PL022
+void __init u300_spi_init(struct amba_device *adev);
+void __init u300_spi_register_board_devices(void);
+#else
+/* Compile out SPI support if PL022 is not selected */
+static inline void __init u300_spi_init(struct amba_device *adev)
+{
+}
+static inline void __init u300_spi_register_board_devices(void)
+{
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index cce53204880e..26d26f5100fe 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -346,6 +346,21 @@ static struct clocksource clocksource_u300_1mhz = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+/*
+ * Override the global weak sched_clock symbol with this
+ * local implementation which uses the clocksource to get some
+ * better resolution when scheduling the kernel. We accept that
+ * this wraps around for now, since it is just a relative time
+ * stamp. (Inspired by OMAP implementation.)
+ */
+unsigned long long notrace sched_clock(void)
+{
+        return clocksource_cyc2ns(clocksource_u300_1mhz.read(
+                                  &clocksource_u300_1mhz),
+                                  clocksource_u300_1mhz.mult,
+                                  clocksource_u300_1mhz.shift);
+}
+
 
 /*
  * This sets up the system timers, clock source and clock event.
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 975eae41ee66..e13be7c444ca 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -27,6 +27,7 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
 #include <linux/amba/pl061.h>
+#include <linux/amba/mmci.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/cnt32_to_63.h>
@@ -47,7 +48,6 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <asm/mach/mmc.h>
 
 #include "core.h"
 #include "clock.h"
@@ -369,7 +369,7 @@ unsigned int mmc_status(struct device *dev)
         return readl(VERSATILE_SYSMCI) & mask;
 }
 
-static struct mmc_platform_data mmc0_plat_data = {
+static struct mmci_platform_data mmc0_plat_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .status         = mmc_status,
         .gpio_wp        = -1,
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 9af8d8154df5..239cd30fc4f5 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -24,6 +24,7 @@
 #include <linux/sysdev.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl061.h>
+#include <linux/amba/mmci.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -31,7 +32,6 @@
 #include <asm/mach-types.h>
 
 #include <asm/mach/arch.h>
-#include <asm/mach/mmc.h>
 
 #include "core.h"
 
@@ -41,7 +41,7 @@
 #define IRQ_MMCI1A      IRQ_SIC_MMCI1A
 #endif
 
-static struct mmc_platform_data mmc1_plat_data = {
+static struct mmci_platform_data mmc1_plat_data = {
         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
         .status         = mmc_status,
         .gpio_wp        = -1,
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 5fe595aeba69..8d43e58f9244 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -771,3 +771,8 @@ config CACHE_XSC3L2
         select OUTER_CACHE
         help
           This option enables the L2 cache on XScale3.
+
+config ARM_L1_CACHE_SHIFT
+        int
+        default 6 if ARCH_OMAP3
+        default 5
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index fc84fcc74380..6bda76a43199 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -59,6 +59,6 @@ void __new_context(struct mm_struct *mm)
         }
         spin_unlock(&cpu_asid_lock);
 
-        mm->cpu_vm_mask = cpumask_of_cpu(smp_processor_id());
+        cpumask_copy(mm_cpumask(mm), cpumask_of(smp_processor_id()));
         mm->context.id = asid;
 }
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index cc8829d7e116..379f78556055 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -25,6 +25,19 @@
 
 #include "fault.h"
 
+/*
+ * Fault status register encodings.  We steal bit 31 for our own purposes.
+ */
+#define FSR_LNX_PF              (1 << 31)
+#define FSR_WRITE               (1 << 11)
+#define FSR_FS4                 (1 << 10)
+#define FSR_FS3_0               (15)
+
+static inline int fsr_fs(unsigned int fsr)
+{
+        return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
+}
+
 #ifdef CONFIG_MMU
 
 #ifdef CONFIG_KPROBES
@@ -182,18 +195,35 @@ void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 #define VM_FAULT_BADMAP         0x010000
 #define VM_FAULT_BADACCESS      0x020000
 
-static int
+/*
+ * Check that the permissions on the VMA allow for the fault which occurred.
+ * If we encountered a write fault, we must have write permission, otherwise
+ * we allow any permission.
+ */
+static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
+{
+        unsigned int mask = VM_READ | VM_WRITE | VM_EXEC;
+
+        if (fsr & FSR_WRITE)
+                mask = VM_WRITE;
+        if (fsr & FSR_LNX_PF)
+                mask = VM_EXEC;
+
+        return vma->vm_flags & mask ? false : true;
+}
+
+static int __kprobes
 __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
                 struct task_struct *tsk)
 {
         struct vm_area_struct *vma;
-        int fault, mask;
+        int fault;
 
         vma = find_vma(mm, addr);
         fault = VM_FAULT_BADMAP;
-        if (!vma)
+        if (unlikely(!vma))
                 goto out;
-        if (vma->vm_start > addr)
+        if (unlikely(vma->vm_start > addr))
                 goto check_stack;
 
         /*
@@ -201,47 +231,24 @@ __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
          * memory access, so we can handle it.
          */
 good_area:
-        if (fsr & (1 << 11)) /* write? */
-                mask = VM_WRITE;
-        else
-                mask = VM_READ|VM_EXEC|VM_WRITE;
-
-        fault = VM_FAULT_BADACCESS;
-        if (!(vma->vm_flags & mask))
+        if (access_error(fsr, vma)) {
+                fault = VM_FAULT_BADACCESS;
                 goto out;
+        }
 
         /*
-         * If for any reason at all we couldn't handle
-         * the fault, make sure we exit gracefully rather
-         * than endlessly redo the fault.
+         * If for any reason at all we couldn't handle the fault, make
+         * sure we exit gracefully rather than endlessly redo the fault.
          */
-survive:
-        fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & (1 << 11)) ? FAULT_FLAG_WRITE : 0);
-        if (unlikely(fault & VM_FAULT_ERROR)) {
-                if (fault & VM_FAULT_OOM)
-                        goto out_of_memory;
-                else if (fault & VM_FAULT_SIGBUS)
-                        return fault;
-                BUG();
-        }
+        fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0);
+        if (unlikely(fault & VM_FAULT_ERROR))
+                return fault;
         if (fault & VM_FAULT_MAJOR)
                 tsk->maj_flt++;
         else
                 tsk->min_flt++;
         return fault;
 
-out_of_memory:
-        if (!is_global_init(tsk))
-                goto out;
-
-        /*
-         * If we are out of memory for pid1, sleep for a while and retry
-         */
-        up_read(&mm->mmap_sem);
-        yield();
-        down_read(&mm->mmap_sem);
-        goto survive;
-
 check_stack:
         if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
                 goto good_area;
@@ -278,6 +285,13 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
                 if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc))
                         goto no_context;
                 down_read(&mm->mmap_sem);
+        } else {
+                /*
+                 * The above down_read_trylock() might have succeeded in
+                 * which case, we'll have missed the might_sleep() from
+                 * down_read()
+                 */
+                might_sleep();
         }
 
         fault = __do_page_fault(mm, addr, fsr, tsk);
@@ -289,6 +303,16 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP | VM_FAULT_BADACCESS))))
                 return 0;
 
+        if (fault & VM_FAULT_OOM) {
+                /*
+                 * We ran out of memory, call the OOM killer, and return to
+                 * userspace (which will retry the fault, or kill us if we
+                 * got oom-killed)
+                 */
+                pagefault_out_of_memory();
+                return 0;
+        }
+
         /*
          * If we are in kernel mode at this point, we
          * have no context to handle this fault with.
@@ -296,16 +320,6 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         if (!user_mode(regs))
                 goto no_context;
 
-        if (fault & VM_FAULT_OOM) {
-                /*
-                 * We ran out of memory, or some other thing
-                 * happened to us that made us unable to handle
-                 * the page fault gracefully.
-                 */
-                printk("VM: killing process %s\n", tsk->comm);
-                do_group_exit(SIGKILL);
-                return 0;
-        }
         if (fault & VM_FAULT_SIGBUS) {
                 /*
                  * We had some memory, but were unable to
@@ -489,10 +503,10 @@ hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *)
 asmlinkage void __exception
 do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 {
-        const struct fsr_info *inf = fsr_info + (fsr & 15) + ((fsr & (1 << 10)) >> 6);
+        const struct fsr_info *inf = fsr_info + fsr_fs(fsr);
         struct siginfo info;
 
-        if (!inf->fn(addr, fsr, regs))
+        if (!inf->fn(addr, fsr & ~FSR_LNX_PF, regs))
                 return;
 
         printk(KERN_ALERT "Unhandled fault: %s (0x%03x) at 0x%08lx\n",
@@ -508,6 +522,6 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 asmlinkage void __exception
 do_PrefetchAbort(unsigned long addr, struct pt_regs *regs)
 {
-        do_translation_fault(addr, 0, regs);
+        do_translation_fault(addr, FSR_LNX_PF, regs);
 }
 
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 575f3ad722e7..b27942909b23 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -50,7 +50,7 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 void flush_cache_mm(struct mm_struct *mm)
 {
         if (cache_is_vivt()) {
-                if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
+                if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm)))
                         __cpuc_flush_user_all();
                 return;
         }
@@ -73,7 +73,7 @@ void flush_cache_mm(struct mm_struct *mm)
 void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 {
         if (cache_is_vivt()) {
-                if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask))
+                if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)))
                         __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
                                                 vma->vm_flags);
                 return;
@@ -97,7 +97,7 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
 void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
 {
         if (cache_is_vivt()) {
-                if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
+                if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
                         unsigned long addr = user_addr & PAGE_MASK;
                         __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
                 }
@@ -113,7 +113,7 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
                          unsigned long len, int write)
 {
         if (cache_is_vivt()) {
-                if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
+                if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
                         unsigned long addr = (unsigned long)kaddr;
                         __cpuc_coherent_kern_range(addr, addr + len);
                 }
@@ -126,7 +126,7 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
         }
 
         /* VIPT non-aliasing cache */
-        if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask) &&
+        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)) &&
             vma->vm_flags & VM_EXEC) {
                 unsigned long addr = (unsigned long)kaddr;
                 /* only flushing the kernel mapping on non-aliasing VIPT */
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index ea36186f32c3..877c492f8e10 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -596,8 +596,8 @@ void __init mem_init(void)
 
         printk(KERN_NOTICE "Memory: %luKB available (%dK code, "
                 "%dK data, %dK init, %luK highmem)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
-                codesize >> 10, datasize >> 10, initsize >> 10,
+                nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10,
+                datasize >> 10, initsize >> 10,
                 (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
 
         if (PAGE_SIZE >= 16384 && num_physpages <= 128) {
@@ -613,6 +613,14 @@ void __init mem_init(void)
 
 void free_initmem(void)
 {
+#ifdef CONFIG_HAVE_TCM
+        extern char *__tcm_start, *__tcm_end;
+
+        totalram_pages += free_area(__phys_to_pfn(__pa(__tcm_start)),
+                                    __phys_to_pfn(__pa(__tcm_end)),
+                                    "TCM link");
+#endif
+
         if (!machine_is_integrator() && !machine_is_cintegrator())
                 totalram_pages += free_area(__phys_to_pfn(__pa(__init_begin)),
                                             __phys_to_pfn(__pa(__init_end)),
diff --git a/arch/arm/plat-iop/adma.c b/arch/arm/plat-iop/adma.c
index 3c127aabe214..1ff6a37e893c 100644
--- a/arch/arm/plat-iop/adma.c
+++ b/arch/arm/plat-iop/adma.c
@@ -179,7 +179,6 @@ static int __init iop3xx_adma_cap_init(void)
         dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask);
         #else
         dma_cap_set(DMA_MEMCPY, iop3xx_dma_0_data.cap_mask);
-        dma_cap_set(DMA_MEMCPY_CRC32C, iop3xx_dma_0_data.cap_mask);
         dma_cap_set(DMA_INTERRUPT, iop3xx_dma_0_data.cap_mask);
         #endif
 
@@ -188,7 +187,6 @@ static int __init iop3xx_adma_cap_init(void)
         dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask);
         #else
         dma_cap_set(DMA_MEMCPY, iop3xx_dma_1_data.cap_mask);
-        dma_cap_set(DMA_MEMCPY_CRC32C, iop3xx_dma_1_data.cap_mask);
         dma_cap_set(DMA_INTERRUPT, iop3xx_dma_1_data.cap_mask);
         #endif
 
@@ -198,7 +196,7 @@ static int __init iop3xx_adma_cap_init(void)
         dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);
         #else
         dma_cap_set(DMA_XOR, iop3xx_aau_data.cap_mask);
-        dma_cap_set(DMA_ZERO_SUM, iop3xx_aau_data.cap_mask);
+        dma_cap_set(DMA_XOR_VAL, iop3xx_aau_data.cap_mask);
         dma_cap_set(DMA_MEMSET, iop3xx_aau_data.cap_mask);
         dma_cap_set(DMA_INTERRUPT, iop3xx_aau_data.cap_mask);
         #endif
diff --git a/arch/arm/plat-mxc/include/mach/spi.h b/arch/arm/plat-mxc/include/mach/spi.h
new file mode 100644
index 000000000000..08be445e8eb8
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/spi.h
@@ -0,0 +1,27 @@
+
+#ifndef __MACH_SPI_H_
+#define __MACH_SPI_H_
+
+/*
+ * struct spi_imx_master - device.platform_data for SPI controller devices.
+ * @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio
+ *              pins, numbers < 0 mean internal CSPI chipselects according
+ *              to MXC_SPI_CS(). Normally you want to use gpio based chip
+ *              selects as the CSPI module tries to be intelligent about
+ *              when to assert the chipselect: The CSPI module deasserts the
+ *              chipselect once it runs out of input data. The other problem
+ *              is that it is not possible to mix between high active and low
+ *              active chipselects on one single bus using the internal
+ *              chipselects. Unfortunately Freescale decided to put some
+ *              chipselects on dedicated pins which are not usable as gpios,
+ *              so we have to support the internal chipselects.
+ * @num_chipselect: ARRAY_SIZE(chipselect)
+ */
+struct spi_imx_master {
+        int     *chipselect;
+        int     num_chipselect;
+};
+
+#define MXC_SPI_CS(no)  ((no) - 32)
+
+#endif /* __MACH_SPI_H_*/
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index efe85d095190..64b3f52bd9b2 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -120,6 +120,10 @@ config OMAP_MBOX_FWK
 config OMAP_IOMMU
         tristate
 
+config OMAP_IOMMU_DEBUG
+        depends on OMAP_IOMMU
+        tristate
+
 choice
         prompt "System timer"
         default OMAP_MPU_TIMER
@@ -183,6 +187,19 @@ config OMAP_SERIAL_WAKE
           to data on the serial RX line. This allows you to wake the
           system from serial console.
 
+choice
+        prompt "OMAP PM layer selection"
+        depends on ARCH_OMAP
+        default OMAP_PM_NOOP
+
+config OMAP_PM_NONE
+        bool "No PM layer"
+
+config OMAP_PM_NOOP
+        bool "No-op/debug PM layer"
+
+endchoice
+
 endmenu
 
 endif
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index a83279523958..98f01910c2cf 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -12,8 +12,13 @@ obj-  :=
 # OCPI interconnect support for 1710, 1610 and 5912
 obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
 
+# omap_device support (OMAP2+ only at the moment)
+obj-$(CONFIG_ARCH_OMAP2) += omap_device.o
+obj-$(CONFIG_ARCH_OMAP3) += omap_device.o
+
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o
+obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o
 
 obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
 obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
@@ -25,3 +30,4 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
 # OMAP mailbox framework
 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
 
+obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
\ No newline at end of file
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index e8c327a45a55..bf880e966d3b 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -488,7 +488,7 @@ static int __init clk_debugfs_init(void)
         }
         return 0;
 err_out:
-        debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */
+        debugfs_remove_recursive(clk_debugfs_root);
         return err;
 }
 late_initcall(clk_debugfs_init);
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index ebcf006406f9..3a4768d55895 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -54,50 +54,6 @@ static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
         struct omap_board_config_kernel *kinfo = NULL;
         int i;
 
-#ifdef CONFIG_OMAP_BOOT_TAG
-        struct omap_board_config_entry *info = NULL;
-
-        if (omap_bootloader_tag_len > 4)
-                info = (struct omap_board_config_entry *) omap_bootloader_tag;
-        while (info != NULL) {
-                u8 *next;
-
-                if (info->tag == tag) {
-                        if (skip == 0)
-                                break;
-                        skip--;
-                }
-
-                if ((info->len & 0x03) != 0) {
-                        /* We bail out to avoid an alignment fault */
-                        printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
-                               info->len, info->tag);
-                        return NULL;
-                }
-                next = (u8 *) info + sizeof(*info) + info->len;
-                if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
-                        info = NULL;
-                else
-                        info = (struct omap_board_config_entry *) next;
-        }
-        if (info != NULL) {
-                /* Check the length as a lame attempt to check for
-                 * binary inconsistency. */
-                if (len != NO_LENGTH_CHECK) {
-                        /* Word-align len */
-                        if (len & 0x03)
-                                len = (len + 3) & ~0x03;
-                        if (info->len != len) {
-                                printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
-                                       tag, len, info->len);
-                                return NULL;
-                        }
-                }
-                if (len_out != NULL)
-                        *len_out = info->len;
-                return info->data;
-        }
-#endif
         /* Try to find the config from the board-specific structures
          * in the kernel. */
         for (i = 0; i < omap_board_config_size; i++) {
@@ -127,50 +83,6 @@ const void *omap_get_var_config(u16 tag, size_t *len)
 }
 EXPORT_SYMBOL(omap_get_var_config);
 
-static int __init omap_add_serial_console(void)
-{
-        const struct omap_serial_console_config *con_info;
-        const struct omap_uart_config *uart_info;
-        static char speed[11], *opt = NULL;
-        int line, i, uart_idx;
-
-        uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-        con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
-                                        struct omap_serial_console_config);
-        if (uart_info == NULL || con_info == NULL)
-                return 0;
-
-        if (con_info->console_uart == 0)
-                return 0;
-
-        if (con_info->console_speed) {
-                snprintf(speed, sizeof(speed), "%u", con_info->console_speed);
-                opt = speed;
-        }
-
-        uart_idx = con_info->console_uart - 1;
-        if (uart_idx >= OMAP_MAX_NR_PORTS) {
-                printk(KERN_INFO "Console: external UART#%d. "
-                        "Not adding it as console this time.\n",
-                        uart_idx + 1);
-                return 0;
-        }
-        if (!(uart_info->enabled_uarts & (1 << uart_idx))) {
-                printk(KERN_ERR "Console: Selected UART#%d is "
-                        "not enabled for this platform\n",
-                        uart_idx + 1);
-                return -1;
-        }
-        line = 0;
-        for (i = 0; i < uart_idx; i++) {
-                if (uart_info->enabled_uarts & (1 << i))
-                        line++;
-        }
-        return add_preferred_console("ttyS", line, opt);
-}
-console_initcall(omap_add_serial_console);
-
-
 /*
  * 32KHz clocksource ... always available, on pretty most chips except
  * OMAP 730 and 1510.  Other timers could be used as clocksources, with
@@ -253,11 +165,8 @@ static struct clocksource clocksource_32k = {
  */
 unsigned long long sched_clock(void)
 {
-        unsigned long long ret;
-
-        ret = (unsigned long long)clocksource_32k.read(&clocksource_32k);
-        ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift;
-        return ret;
+        return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
+                                  clocksource_32k.mult, clocksource_32k.shift);
 }
 
 static int __init omap_init_clocksource_32k(void)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 9b00f4cbc903..fd3154ae69b1 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2347,16 +2347,16 @@ static int __init omap_init_dma(void)
         int ch, r;
 
         if (cpu_class_is_omap1()) {
-                omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE);
+                omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE);
                 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
         } else if (cpu_is_omap24xx()) {
-                omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE);
+                omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE);
                 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
         } else if (cpu_is_omap34xx()) {
-                omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
+                omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE);
                 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
         } else if (cpu_is_omap44xx()) {
-                omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
+                omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE);
                 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
         } else {
                 pr_err("DMA init failed for unsupported omap\n");
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 7f50b6103dee..d325b54daeb5 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -774,7 +774,10 @@ int __init omap_dm_timer_init(void)
 
         for (i = 0; i < dm_timer_count; i++) {
                 timer = &dm_timers[i];
-                timer->io_base = IO_ADDRESS(timer->phys_base);
+                if (cpu_class_is_omap1())
+                        timer->io_base = OMAP1_IO_ADDRESS(timer->phys_base);
+                else
+                        timer->io_base = OMAP2_IO_ADDRESS(timer->phys_base);
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
                                         defined(CONFIG_ARCH_OMAP4)
                 if (cpu_class_is_omap2()) {
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 176c86e5531d..693839c89ad0 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -31,7 +31,7 @@
 /*
  * OMAP1510 GPIO registers
  */
-#define OMAP1510_GPIO_BASE              IO_ADDRESS(0xfffce000)
+#define OMAP1510_GPIO_BASE              OMAP1_IO_ADDRESS(0xfffce000)
 #define OMAP1510_GPIO_DATA_INPUT        0x00
 #define OMAP1510_GPIO_DATA_OUTPUT       0x04
 #define OMAP1510_GPIO_DIR_CONTROL       0x08
@@ -45,10 +45,10 @@
 /*
  * OMAP1610 specific GPIO registers
  */
-#define OMAP1610_GPIO1_BASE             IO_ADDRESS(0xfffbe400)
-#define OMAP1610_GPIO2_BASE             IO_ADDRESS(0xfffbec00)
-#define OMAP1610_GPIO3_BASE             IO_ADDRESS(0xfffbb400)
-#define OMAP1610_GPIO4_BASE             IO_ADDRESS(0xfffbbc00)
+#define OMAP1610_GPIO1_BASE             OMAP1_IO_ADDRESS(0xfffbe400)
+#define OMAP1610_GPIO2_BASE             OMAP1_IO_ADDRESS(0xfffbec00)
+#define OMAP1610_GPIO3_BASE             OMAP1_IO_ADDRESS(0xfffbb400)
+#define OMAP1610_GPIO4_BASE             OMAP1_IO_ADDRESS(0xfffbbc00)
 #define OMAP1610_GPIO_REVISION          0x0000
 #define OMAP1610_GPIO_SYSCONFIG         0x0010
 #define OMAP1610_GPIO_SYSSTATUS         0x0014
@@ -70,12 +70,12 @@
 /*
  * OMAP730 specific GPIO registers
  */
-#define OMAP730_GPIO1_BASE              IO_ADDRESS(0xfffbc000)
-#define OMAP730_GPIO2_BASE              IO_ADDRESS(0xfffbc800)
-#define OMAP730_GPIO3_BASE              IO_ADDRESS(0xfffbd000)
-#define OMAP730_GPIO4_BASE              IO_ADDRESS(0xfffbd800)
-#define OMAP730_GPIO5_BASE              IO_ADDRESS(0xfffbe000)
-#define OMAP730_GPIO6_BASE              IO_ADDRESS(0xfffbe800)
+#define OMAP730_GPIO1_BASE              OMAP1_IO_ADDRESS(0xfffbc000)
+#define OMAP730_GPIO2_BASE              OMAP1_IO_ADDRESS(0xfffbc800)
+#define OMAP730_GPIO3_BASE              OMAP1_IO_ADDRESS(0xfffbd000)
+#define OMAP730_GPIO4_BASE              OMAP1_IO_ADDRESS(0xfffbd800)
+#define OMAP730_GPIO5_BASE              OMAP1_IO_ADDRESS(0xfffbe000)
+#define OMAP730_GPIO6_BASE              OMAP1_IO_ADDRESS(0xfffbe800)
 #define OMAP730_GPIO_DATA_INPUT         0x00
 #define OMAP730_GPIO_DATA_OUTPUT        0x04
 #define OMAP730_GPIO_DIR_CONTROL        0x08
@@ -86,12 +86,12 @@
 /*
  * OMAP850 specific GPIO registers
  */
-#define OMAP850_GPIO1_BASE              IO_ADDRESS(0xfffbc000)
-#define OMAP850_GPIO2_BASE              IO_ADDRESS(0xfffbc800)
-#define OMAP850_GPIO3_BASE              IO_ADDRESS(0xfffbd000)
-#define OMAP850_GPIO4_BASE              IO_ADDRESS(0xfffbd800)
-#define OMAP850_GPIO5_BASE              IO_ADDRESS(0xfffbe000)
-#define OMAP850_GPIO6_BASE              IO_ADDRESS(0xfffbe800)
+#define OMAP850_GPIO1_BASE              OMAP1_IO_ADDRESS(0xfffbc000)
+#define OMAP850_GPIO2_BASE              OMAP1_IO_ADDRESS(0xfffbc800)
+#define OMAP850_GPIO3_BASE              OMAP1_IO_ADDRESS(0xfffbd000)
+#define OMAP850_GPIO4_BASE              OMAP1_IO_ADDRESS(0xfffbd800)
+#define OMAP850_GPIO5_BASE              OMAP1_IO_ADDRESS(0xfffbe000)
+#define OMAP850_GPIO6_BASE              OMAP1_IO_ADDRESS(0xfffbe800)
 #define OMAP850_GPIO_DATA_INPUT         0x00
 #define OMAP850_GPIO_DATA_OUTPUT        0x04
 #define OMAP850_GPIO_DIR_CONTROL        0x08
@@ -99,19 +99,21 @@
 #define OMAP850_GPIO_INT_MASK           0x10
 #define OMAP850_GPIO_INT_STATUS         0x14
 
+#define OMAP1_MPUIO_VBASE               OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
+
 /*
  * omap24xx specific GPIO registers
  */
-#define OMAP242X_GPIO1_BASE             IO_ADDRESS(0x48018000)
-#define OMAP242X_GPIO2_BASE             IO_ADDRESS(0x4801a000)
-#define OMAP242X_GPIO3_BASE             IO_ADDRESS(0x4801c000)
-#define OMAP242X_GPIO4_BASE             IO_ADDRESS(0x4801e000)
+#define OMAP242X_GPIO1_BASE             OMAP2_IO_ADDRESS(0x48018000)
+#define OMAP242X_GPIO2_BASE             OMAP2_IO_ADDRESS(0x4801a000)
+#define OMAP242X_GPIO3_BASE             OMAP2_IO_ADDRESS(0x4801c000)
+#define OMAP242X_GPIO4_BASE             OMAP2_IO_ADDRESS(0x4801e000)
 
-#define OMAP243X_GPIO1_BASE             IO_ADDRESS(0x4900C000)
-#define OMAP243X_GPIO2_BASE             IO_ADDRESS(0x4900E000)
-#define OMAP243X_GPIO3_BASE             IO_ADDRESS(0x49010000)
-#define OMAP243X_GPIO4_BASE             IO_ADDRESS(0x49012000)
-#define OMAP243X_GPIO5_BASE             IO_ADDRESS(0x480B6000)
+#define OMAP243X_GPIO1_BASE             OMAP2_IO_ADDRESS(0x4900C000)
+#define OMAP243X_GPIO2_BASE             OMAP2_IO_ADDRESS(0x4900E000)
+#define OMAP243X_GPIO3_BASE             OMAP2_IO_ADDRESS(0x49010000)
+#define OMAP243X_GPIO4_BASE             OMAP2_IO_ADDRESS(0x49012000)
+#define OMAP243X_GPIO5_BASE             OMAP2_IO_ADDRESS(0x480B6000)
 
 #define OMAP24XX_GPIO_REVISION          0x0000
 #define OMAP24XX_GPIO_SYSCONFIG         0x0010
@@ -168,24 +170,22 @@
  * omap34xx specific GPIO registers
  */
 
-#define OMAP34XX_GPIO1_BASE             IO_ADDRESS(0x48310000)
-#define OMAP34XX_GPIO2_BASE             IO_ADDRESS(0x49050000)
-#define OMAP34XX_GPIO3_BASE             IO_ADDRESS(0x49052000)
-#define OMAP34XX_GPIO4_BASE             IO_ADDRESS(0x49054000)
-#define OMAP34XX_GPIO5_BASE             IO_ADDRESS(0x49056000)
-#define OMAP34XX_GPIO6_BASE             IO_ADDRESS(0x49058000)
+#define OMAP34XX_GPIO1_BASE             OMAP2_IO_ADDRESS(0x48310000)
+#define OMAP34XX_GPIO2_BASE             OMAP2_IO_ADDRESS(0x49050000)
+#define OMAP34XX_GPIO3_BASE             OMAP2_IO_ADDRESS(0x49052000)
+#define OMAP34XX_GPIO4_BASE             OMAP2_IO_ADDRESS(0x49054000)
+#define OMAP34XX_GPIO5_BASE             OMAP2_IO_ADDRESS(0x49056000)
+#define OMAP34XX_GPIO6_BASE             OMAP2_IO_ADDRESS(0x49058000)
 
 /*
  * OMAP44XX  specific GPIO registers
  */
-#define OMAP44XX_GPIO1_BASE             IO_ADDRESS(0x4a310000)
-#define OMAP44XX_GPIO2_BASE             IO_ADDRESS(0x48055000)
-#define OMAP44XX_GPIO3_BASE             IO_ADDRESS(0x48057000)
-#define OMAP44XX_GPIO4_BASE             IO_ADDRESS(0x48059000)
-#define OMAP44XX_GPIO5_BASE             IO_ADDRESS(0x4805B000)
-#define OMAP44XX_GPIO6_BASE             IO_ADDRESS(0x4805D000)
-
-#define OMAP_MPUIO_VBASE                IO_ADDRESS(OMAP_MPUIO_BASE)
+#define OMAP44XX_GPIO1_BASE             OMAP2_IO_ADDRESS(0x4a310000)
+#define OMAP44XX_GPIO2_BASE             OMAP2_IO_ADDRESS(0x48055000)
+#define OMAP44XX_GPIO3_BASE             OMAP2_IO_ADDRESS(0x48057000)
+#define OMAP44XX_GPIO4_BASE             OMAP2_IO_ADDRESS(0x48059000)
+#define OMAP44XX_GPIO5_BASE             OMAP2_IO_ADDRESS(0x4805B000)
+#define OMAP44XX_GPIO6_BASE             OMAP2_IO_ADDRESS(0x4805D000)
 
 struct gpio_bank {
         void __iomem *base;
@@ -221,7 +221,7 @@ struct gpio_bank {
 
 #ifdef CONFIG_ARCH_OMAP16XX
 static struct gpio_bank gpio_bank_1610[5] = {
-        { OMAP_MPUIO_VBASE,    INT_MPUIO,           IH_MPUIO_BASE,     METHOD_MPUIO},
+        { OMAP1_MPUIO_VBASE,    INT_MPUIO,          IH_MPUIO_BASE,     METHOD_MPUIO},
         { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1,      IH_GPIO_BASE,      METHOD_GPIO_1610 },
         { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
         { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
@@ -231,14 +231,14 @@ static struct gpio_bank gpio_bank_1610[5] = {
 
 #ifdef CONFIG_ARCH_OMAP15XX
 static struct gpio_bank gpio_bank_1510[2] = {
-        { OMAP_MPUIO_VBASE,   INT_MPUIO,      IH_MPUIO_BASE, METHOD_MPUIO },
+        { OMAP1_MPUIO_VBASE,   INT_MPUIO,      IH_MPUIO_BASE, METHOD_MPUIO },
         { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE,  METHOD_GPIO_1510 }
 };
 #endif
 
 #ifdef CONFIG_ARCH_OMAP730
 static struct gpio_bank gpio_bank_730[7] = {
-        { OMAP_MPUIO_VBASE,    INT_730_MPUIO,       IH_MPUIO_BASE,      METHOD_MPUIO },
+        { OMAP1_MPUIO_VBASE,    INT_730_MPUIO,      IH_MPUIO_BASE,      METHOD_MPUIO },
         { OMAP730_GPIO1_BASE,  INT_730_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_730 },
         { OMAP730_GPIO2_BASE,  INT_730_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_730 },
         { OMAP730_GPIO3_BASE,  INT_730_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_730 },
@@ -250,7 +250,7 @@ static struct gpio_bank gpio_bank_730[7] = {
 
 #ifdef CONFIG_ARCH_OMAP850
 static struct gpio_bank gpio_bank_850[7] = {
-        { OMAP_MPUIO_BASE,     INT_850_MPUIO,       IH_MPUIO_BASE,      METHOD_MPUIO },
+        { OMAP1_MPUIO_BASE,     INT_850_MPUIO,      IH_MPUIO_BASE,      METHOD_MPUIO },
         { OMAP850_GPIO1_BASE,  INT_850_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_850 },
         { OMAP850_GPIO2_BASE,  INT_850_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_850 },
         { OMAP850_GPIO3_BASE,  INT_850_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_850 },
@@ -2032,7 +2032,7 @@ void omap2_gpio_resume_after_retention(void)
                 return;
         for (i = 0; i < gpio_bank_count; i++) {
                 struct gpio_bank *bank = &gpio_bank[i];
-                u32 l;
+                u32 l, gen, gen0, gen1;
 
                 if (!(bank->enabled_non_wakeup_gpios))
                         continue;
@@ -2056,13 +2056,32 @@ void omap2_gpio_resume_after_retention(void)
                  * this silicon bug. */
                 l ^= bank->saved_datain;
                 l &= bank->non_wakeup_gpios;
-                if (l) {
+
+                /*
+                 * No need to generate IRQs for the rising edge for gpio IRQs
+                 * configured with falling edge only; and vice versa.
+                 */
+                gen0 = l & bank->saved_fallingdetect;
+                gen0 &= bank->saved_datain;
+
+                gen1 = l & bank->saved_risingdetect;
+                gen1 &= ~(bank->saved_datain);
+
+                /* FIXME: Consider GPIO IRQs with level detections properly! */
+                gen = l & (~(bank->saved_fallingdetect) &
+                                ~(bank->saved_risingdetect));
+                /* Consider all GPIO IRQs needed to be updated */
+                gen |= gen0 | gen1;
+
+                if (gen) {
                         u32 old0, old1;
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                         old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                         old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
-                        __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
-                        __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+                        __raw_writel(old0 | gen, bank->base +
+                                        OMAP24XX_GPIO_LEVELDETECT0);
+                        __raw_writel(old1 | gen, bank->base +
+                                        OMAP24XX_GPIO_LEVELDETECT1);
                         __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                         __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
 #endif
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index 50ea79a0efa2..8e913c322810 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -16,10 +16,8 @@
 
 /* Different peripheral ids */
 #define OMAP_TAG_CLOCK          0x4f01
-#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
 #define OMAP_TAG_LCD            0x4f05
 #define OMAP_TAG_GPIO_SWITCH    0x4f06
-#define OMAP_TAG_UART           0x4f07
 #define OMAP_TAG_FBMEM          0x4f08
 #define OMAP_TAG_STI_CONSOLE    0x4f09
 #define OMAP_TAG_CAMERA_SENSOR  0x4f0a
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h
index b9d0dd2da89b..99ebd886f134 100644
--- a/arch/arm/plat-omap/include/mach/clockdomain.h
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm);
 int clkdm_unregister(struct clockdomain *clkdm);
 struct clockdomain *clkdm_lookup(const char *name);
 
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+                        void *user);
 struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
 
 void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index 8140dbccb7bc..826d317cdbec 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -20,15 +20,15 @@
 
 #ifndef __ASSEMBLY__
 #define OMAP242X_CTRL_REGADDR(reg)                                      \
-        IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+        OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
 #define OMAP243X_CTRL_REGADDR(reg)                                      \
-        IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+        OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
 #define OMAP343X_CTRL_REGADDR(reg)                                      \
-        IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+        OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #else
-#define OMAP242X_CTRL_REGADDR(reg)      IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
-#define OMAP243X_CTRL_REGADDR(reg)      IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
-#define OMAP343X_CTRL_REGADDR(reg)      IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+#define OMAP242X_CTRL_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+#define OMAP243X_CTRL_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+#define OMAP343X_CTRL_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #endif /* __ASSEMBLY__ */
 
 /*
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 56426ed45ef4..a5592991634d 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -41,7 +41,7 @@
                 .endm
 
                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =IO_ADDRESS(OMAP_IH1_BASE)
+                ldr     \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
                 ldr     \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
                 ldr     \tmp, [\base, #IRQ_MIR_REG_OFFSET]
                 mov     \irqstat, #0xffffffff
@@ -53,7 +53,7 @@
                 cmp     \irqnr, #0
                 ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
                 cmpeq   \irqnr, #INT_IH2_IRQ
-                ldreq   \base, =IO_ADDRESS(OMAP_IH2_BASE)
+                ldreq   \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
                 ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
                 addeqs  \irqnr, \irqnr, #32
 1510:
@@ -68,9 +68,9 @@
 
 /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
 #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
-#define OMAP2_VA_IC_BASE                IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP2_VA_IC_BASE                OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE)
 #elif defined(CONFIG_ARCH_OMAP34XX)
-#define OMAP2_VA_IC_BASE                IO_ADDRESS(OMAP34XX_IC_BASE)
+#define OMAP2_VA_IC_BASE                OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE)
 #endif
 #if defined(CONFIG_ARCH_OMAP4)
 #include <mach/omap44xx.h>
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 2b22a8799bc6..633ff688b928 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -29,7 +29,7 @@
 #include <linux/io.h>
 #include <mach/irqs.h>
 
-#define OMAP_MPUIO_BASE                 0xfffb5000
+#define OMAP1_MPUIO_BASE                        0xfffb5000
 
 #if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
 
diff --git a/arch/arm/plat-omap/include/mach/gpmc.h b/arch/arm/plat-omap/include/mach/gpmc.h
index 921b16532ff5..9c99cda77ba6 100644
--- a/arch/arm/plat-omap/include/mach/gpmc.h
+++ b/arch/arm/plat-omap/include/mach/gpmc.h
@@ -103,6 +103,10 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
 extern void gpmc_cs_free(int cs);
 extern int gpmc_cs_set_reserved(int cs, int reserved);
 extern int gpmc_cs_reserved(int cs);
+extern int gpmc_prefetch_enable(int cs, int dma_mode,
+                                        unsigned int u32_count, int is_write);
+extern void gpmc_prefetch_reset(void);
+extern int gpmc_prefetch_status(void);
 extern void __init gpmc_init(void);
 
 #endif
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 21fb0efdda86..8d32df32b0b1 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -54,17 +54,33 @@
  * ----------------------------------------------------------------------------
  */
 
-#if defined(CONFIG_ARCH_OMAP1)
+#ifdef __ASSEMBLER__
+#define IOMEM(x)                (x)
+#else
+#define IOMEM(x)                ((void __force __iomem *)(x))
+#endif
+
+#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
+#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
+
+#define OMAP2_IO_OFFSET         0x90000000
+#define OMAP2_IO_ADDRESS(pa)    IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */
+
+/*
+ * ----------------------------------------------------------------------------
+ * Omap1 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
-#define IO_PHYS                 0xFFFB0000
-#define IO_OFFSET               0x01000000      /* Virtual IO = 0xfefb0000 */
-#define IO_SIZE                 0x40000
-#define IO_VIRT                 (IO_PHYS - IO_OFFSET)
-#define __IO_ADDRESS(pa)        ((pa) - IO_OFFSET)
-#define __OMAP1_IO_ADDRESS(pa)  ((pa) - IO_OFFSET)
-#define io_v2p(va)              ((va) + IO_OFFSET)
+#define OMAP1_IO_PHYS           0xFFFB0000
+#define OMAP1_IO_SIZE           0x40000
+#define OMAP1_IO_VIRT           (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
 
-#elif defined(CONFIG_ARCH_OMAP2)
+/*
+ * ----------------------------------------------------------------------------
+ * Omap2 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
 /* We map both L3 and L4 on OMAP2 */
 #define L3_24XX_PHYS    L3_24XX_BASE    /* 0x68000000 */
@@ -87,11 +103,6 @@
 #define OMAP243X_SMS_VIRT       0xFC000000
 #define OMAP243X_SMS_SIZE       SZ_1M
 
-#define IO_OFFSET               0x90000000
-#define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
-#define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
-#define io_v2p(va)              ((va) - IO_OFFSET)      /* Works for L3 and L4 */
-
 /* DSP */
 #define DSP_MEM_24XX_PHYS       OMAP2420_DSP_MEM_BASE   /* 0x58000000 */
 #define DSP_MEM_24XX_VIRT       0xe0000000
@@ -103,7 +114,11 @@
 #define DSP_MMU_24XX_VIRT       0xe2000000
 #define DSP_MMU_24XX_SIZE       SZ_4K
 
-#elif defined(CONFIG_ARCH_OMAP3)
+/*
+ * ----------------------------------------------------------------------------
+ * Omap3 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
 /* We map both L3 and L4 on OMAP3 */
 #define L3_34XX_PHYS            L3_34XX_BASE    /* 0x68000000 */
@@ -143,12 +158,6 @@
 #define OMAP343X_SDRC_VIRT      0xFD000000
 #define OMAP343X_SDRC_SIZE      SZ_1M
 
-
-#define IO_OFFSET               0x90000000
-#define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define io_v2p(va)              ((va) - IO_OFFSET)/* Works for L3 and L4 */
-
 /* DSP */
 #define DSP_MEM_34XX_PHYS       OMAP34XX_DSP_MEM_BASE   /* 0x58000000 */
 #define DSP_MEM_34XX_VIRT       0xe0000000
@@ -160,8 +169,12 @@
 #define DSP_MMU_34XX_VIRT       0xe2000000
 #define DSP_MMU_34XX_SIZE       SZ_4K
 
+/*
+ * ----------------------------------------------------------------------------
+ * Omap4 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
-#elif defined(CONFIG_ARCH_OMAP4)
 /* We map both L3 and L4 on OMAP4 */
 #define L3_44XX_PHYS            L3_44XX_BASE
 #define L3_44XX_VIRT            0xd4000000
@@ -189,38 +202,24 @@
 #define OMAP44XX_GPMC_SIZE      SZ_1M
 
 
-#define IO_OFFSET               0x90000000
-#define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define io_v2p(va)              ((va) - IO_OFFSET)/* Works for L3 and L4 */
-
-#endif
-
-#define IO_ADDRESS(pa)          IOMEM(__IO_ADDRESS(pa))
-#define OMAP1_IO_ADDRESS(pa)    IOMEM(__OMAP1_IO_ADDRESS(pa))
-#define OMAP2_IO_ADDRESS(pa)    IOMEM(__OMAP2_IO_ADDRESS(pa))
+/*
+ * ----------------------------------------------------------------------------
+ * Omap specific register access
+ * ----------------------------------------------------------------------------
+ */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
+#ifndef __ASSEMBLER__
 
 /*
- * Functions to access the OMAP IO region
- *
- * NOTE: - Use omap_read/write[bwl] for physical register addresses
- *       - Use __raw_read/write[bwl]() for virtual register addresses
- *       - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
- *       - DO NOT use hardcoded virtual addresses to allow changing the
- *         IO address space again if needed
+ * NOTE: Please use ioremap + __raw_read/write where possible instead of these
  */
-#define omap_readb(a)           __raw_readb(IO_ADDRESS(a))
-#define omap_readw(a)           __raw_readw(IO_ADDRESS(a))
-#define omap_readl(a)           __raw_readl(IO_ADDRESS(a))
 
-#define omap_writeb(v,a)        __raw_writeb(v, IO_ADDRESS(a))
-#define omap_writew(v,a)        __raw_writew(v, IO_ADDRESS(a))
-#define omap_writel(v,a)        __raw_writel(v, IO_ADDRESS(a))
+extern u8 omap_readb(u32 pa);
+extern u16 omap_readw(u32 pa);
+extern u32 omap_readl(u32 pa);
+extern void omap_writeb(u8 v, u32 pa);
+extern void omap_writew(u16 v, u32 pa);
+extern void omap_writel(u32 v, u32 pa);
 
 struct omap_sdrc_params;
 
diff --git a/arch/arm/plat-omap/include/mach/iommu.h b/arch/arm/plat-omap/include/mach/iommu.h
index 769b00b4c34a..46d41ac83dbf 100644
--- a/arch/arm/plat-omap/include/mach/iommu.h
+++ b/arch/arm/plat-omap/include/mach/iommu.h
@@ -95,7 +95,7 @@ struct iommu_functions {
 
         void (*save_ctx)(struct iommu *obj);
         void (*restore_ctx)(struct iommu *obj);
-        ssize_t (*dump_ctx)(struct iommu *obj, char *buf);
+        ssize_t (*dump_ctx)(struct iommu *obj, char *buf, ssize_t len);
 };
 
 struct iommu_platform_data {
@@ -162,7 +162,7 @@ extern void uninstall_iommu_arch(const struct iommu_functions *ops);
 extern int foreach_iommu_device(void *data,
                                 int (*fn)(struct device *, void *));
 
-extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf);
-extern size_t dump_tlb_entries(struct iommu *obj, char *buf);
+extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len);
+extern size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t len);
 
 #endif /* __MACH_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index fb7cb7723990..28a165058b61 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -503,6 +503,7 @@
 #define INT_44XX_FPKA_READY_IRQ (50 + IRQ_GIC_START)
 #define INT_44XX_SHA1MD51_IRQ   (51 + IRQ_GIC_START)
 #define INT_44XX_RNG_IRQ        (52 + IRQ_GIC_START)
+#define INT_44XX_MMC5_IRQ       (59 + IRQ_GIC_START)
 #define INT_44XX_I2C3_IRQ       (61 + IRQ_GIC_START)
 #define INT_44XX_FPKA_ERROR_IRQ (64 + IRQ_GIC_START)
 #define INT_44XX_PBIAS_IRQ      (75 + IRQ_GIC_START)
@@ -511,6 +512,7 @@
 #define INT_44XX_TLL_IRQ        (78 + IRQ_GIC_START)
 #define INT_44XX_PARTHASH_IRQ   (79 + IRQ_GIC_START)
 #define INT_44XX_MMC3_IRQ       (94 + IRQ_GIC_START)
+#define INT_44XX_MMC4_IRQ       (96 + IRQ_GIC_START)
 
 
 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
diff --git a/arch/arm/plat-omap/include/mach/lcd_mipid.h b/arch/arm/plat-omap/include/mach/lcd_mipid.h
index f8fbc4801e52..8e52c6572281 100644
--- a/arch/arm/plat-omap/include/mach/lcd_mipid.h
+++ b/arch/arm/plat-omap/include/mach/lcd_mipid.h
@@ -16,7 +16,12 @@ enum mipid_test_result {
 struct mipid_platform_data {
         int     nreset_gpio;
         int     data_lines;
+
         void    (*shutdown)(struct mipid_platform_data *pdata);
+        void    (*set_bklight_level)(struct mipid_platform_data *pdata,
+                                     int level);
+        int     (*get_bklight_level)(struct mipid_platform_data *pdata);
+        int     (*get_bklight_max)(struct mipid_platform_data *pdata);
 };
 
 #endif
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 81d5b36534b3..7229b9593301 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -25,11 +25,18 @@
 
 #define OMAP24XX_NR_MMC         2
 #define OMAP34XX_NR_MMC         3
+#define OMAP44XX_NR_MMC         5
 #define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
-#define HSMMC_SIZE              0x200
+#define OMAP3_HSMMC_SIZE        0x200
+#define OMAP4_HSMMC_SIZE        0x1000
 #define OMAP2_MMC1_BASE         0x4809c000
 #define OMAP2_MMC2_BASE         0x480b4000
 #define OMAP3_MMC3_BASE         0x480ad000
+#define OMAP4_MMC4_BASE         0x480d1000
+#define OMAP4_MMC5_BASE         0x480d5000
+#define OMAP4_MMC_REG_OFFSET    0x100
+#define HSMMC5                  (1 << 4)
+#define HSMMC4                  (1 << 3)
 #define HSMMC3                  (1 << 2)
 #define HSMMC2                  (1 << 1)
 #define HSMMC1                  (1 << 0)
@@ -59,6 +66,9 @@ struct omap_mmc_platform_data {
         int (*suspend)(struct device *dev, int slot);
         int (*resume)(struct device *dev, int slot);
 
+        /* Return context loss count due to PM states changing */
+        int (*get_context_loss_count)(struct device *dev);
+
         u64 dma_mask;
 
         struct omap_mmc_slot_data {
@@ -80,12 +90,20 @@ struct omap_mmc_platform_data {
                 /* use the internal clock */
                 unsigned internal_clock:1;
 
+                /* nonremovable e.g. eMMC */
+                unsigned nonremovable:1;
+
+                /* Try to sleep or power off when possible */
+                unsigned power_saving:1;
+
                 int switch_pin;                 /* gpio (card detect) */
                 int gpio_wp;                    /* gpio (write protect) */
 
                 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
                 int (* set_power)(struct device *dev, int slot, int power_on, int vdd);
                 int (* get_ro)(struct device *dev, int slot);
+                int (*set_sleep)(struct device *dev, int slot, int sleep,
+                                 int vdd, int cardsleep);
 
                 /* return MMC cover switch state, can be NULL if not supported.
                  *
diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/plat-omap/include/mach/mtd-xip.h
index 39b591ff54bb..f82a8dcaad94 100644
--- a/arch/arm/plat-omap/include/mach/mtd-xip.h
+++ b/arch/arm/plat-omap/include/mach/mtd-xip.h
@@ -25,7 +25,7 @@ typedef struct {
 } xip_omap_mpu_timer_regs_t;
 
 #define xip_omap_mpu_timer_base(n)                                      \
-((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE +  \
+((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +    \
         (n)*OMAP_MPU_TIMER_OFFSET))
 
 static inline unsigned long xip_omap_mpu_timer_read(int nr)
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 80281c458baf..98dfab651dfc 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -857,6 +857,37 @@ enum omap34xx_index {
         /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
         H16_34XX_SDRC_CKE0,
         H17_34XX_SDRC_CKE1,
+
+        /* MMC1 */
+        N28_3430_MMC1_CLK,
+        M27_3430_MMC1_CMD,
+        N27_3430_MMC1_DAT0,
+        N26_3430_MMC1_DAT1,
+        N25_3430_MMC1_DAT2,
+        P28_3430_MMC1_DAT3,
+        P27_3430_MMC1_DAT4,
+        P26_3430_MMC1_DAT5,
+        R27_3430_MMC1_DAT6,
+        R25_3430_MMC1_DAT7,
+
+        /* MMC2 */
+        AE2_3430_MMC2_CLK,
+        AG5_3430_MMC2_CMD,
+        AH5_3430_MMC2_DAT0,
+        AH4_3430_MMC2_DAT1,
+        AG4_3430_MMC2_DAT2,
+        AF4_3430_MMC2_DAT3,
+
+        /* MMC3 */
+        AF10_3430_MMC3_CLK,
+        AC3_3430_MMC3_CMD,
+        AE11_3430_MMC3_DAT0,
+        AH9_3430_MMC3_DAT1,
+        AF13_3430_MMC3_DAT2,
+        AF13_3430_MMC3_DAT3,
+
+        /* SYS_NIRQ T2 INT1 */
+        AF26_34XX_SYS_NIRQ,
 };
 
 struct omap_mux_cfg {
diff --git a/arch/arm/plat-omap/include/mach/omap-pm.h b/arch/arm/plat-omap/include/mach/omap-pm.h
new file mode 100644
index 000000000000..3ee41d711492
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap-pm.h
@@ -0,0 +1,301 @@
+/*
+ * omap-pm.h - OMAP power management interface
+ *
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Interface developed by (in alphabetical order): Karthik Dasu, Jouni
+ * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
+ * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
+ * Richard Woodruff
+ */
+
+#ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
+#define ASM_ARM_ARCH_OMAP_OMAP_PM_H
+
+#include <linux/device.h>
+#include <linux/cpufreq.h>
+
+#include "powerdomain.h"
+
+/**
+ * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
+ * @rate: target clock rate
+ * @opp_id: OPP ID
+ * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
+ *
+ * Operating performance point data.  Can vary by OMAP chip and board.
+ */
+struct omap_opp {
+        unsigned long rate;
+        u8 opp_id;
+        u16 min_vdd;
+};
+
+extern struct omap_opp *mpu_opps;
+extern struct omap_opp *dsp_opps;
+extern struct omap_opp *l3_opps;
+
+/*
+ * agent_id values for use with omap_pm_set_min_bus_tput():
+ *
+ * OCP_INITIATOR_AGENT is only valid for devices that can act as
+ * initiators -- it represents the device's L3 interconnect
+ * connection.  OCP_TARGET_AGENT represents the device's L4
+ * interconnect connection.
+ */
+#define OCP_TARGET_AGENT                1
+#define OCP_INITIATOR_AGENT             2
+
+/**
+ * omap_pm_if_early_init - OMAP PM init code called before clock fw init
+ * @mpu_opp_table: array ptr to struct omap_opp for MPU
+ * @dsp_opp_table: array ptr to struct omap_opp for DSP
+ * @l3_opp_table : array ptr to struct omap_opp for CORE
+ *
+ * Initialize anything that must be configured before the clock
+ * framework starts.  The "_if_" is to avoid name collisions with the
+ * PM idle-loop code.
+ */
+int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
+                                 struct omap_opp *dsp_opp_table,
+                                 struct omap_opp *l3_opp_table);
+
+/**
+ * omap_pm_if_init - OMAP PM init code called after clock fw init
+ *
+ * The main initialization code.  OPP tables are passed in here.  The
+ * "_if_" is to avoid name collisions with the PM idle-loop code.
+ */
+int __init omap_pm_if_init(void);
+
+/**
+ * omap_pm_if_exit - OMAP PM exit code
+ *
+ * Exit code; currently unused.  The "_if_" is to avoid name
+ * collisions with the PM idle-loop code.
+ */
+void omap_pm_if_exit(void);
+
+/*
+ * Device-driver-originated constraints (via board-*.c files, platform_data)
+ */
+
+
+/**
+ * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
+ * @dev: struct device * requesting the constraint
+ * @t: maximum MPU wakeup latency in microseconds
+ *
+ * Request that the maximum interrupt latency for the MPU to be no
+ * greater than 't' microseconds. "Interrupt latency" in this case is
+ * defined as the elapsed time from the occurrence of a hardware or
+ * timer interrupt to the time when the device driver's interrupt
+ * service routine has been entered by the MPU.
+ *
+ * It is intended that underlying PM code will use this information to
+ * determine what power state to put the MPU powerdomain into, and
+ * possibly the CORE powerdomain as well, since interrupt handling
+ * code currently runs from SDRAM.  Advanced PM or board*.c code may
+ * also configure interrupt controller priorities, OCP bus priorities,
+ * CPU speed(s), etc.
+ *
+ * This function will not affect device wakeup latency, e.g., time
+ * elapsed from when a device driver enables a hardware device with
+ * clk_enable(), to when the device is ready for register access or
+ * other use.  To control this device wakeup latency, use
+ * set_max_dev_wakeup_lat()
+ *
+ * Multiple calls to set_max_mpu_wakeup_lat() will replace the
+ * previous t value.  To remove the latency target for the MPU, call
+ * with t = -1.
+ *
+ * No return value.
+ */
+void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
+
+
+/**
+ * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
+ * @dev: struct device * requesting the constraint
+ * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
+ * @r: minimum throughput (in KiB/s)
+ *
+ * Request that the minimum data throughput on the OCP interconnect
+ * attached to device 'dev' interconnect agent 'tbus_id' be no less
+ * than 'r' KiB/s.
+ *
+ * It is expected that the OMAP PM or bus code will use this
+ * information to set the interconnect clock to run at the lowest
+ * possible speed that satisfies all current system users.  The PM or
+ * bus code will adjust the estimate based on its model of the bus, so
+ * device driver authors should attempt to specify an accurate
+ * quantity for their device use case, and let the PM or bus code
+ * overestimate the numbers as necessary to handle request/response
+ * latency, other competing users on the system, etc.  On OMAP2/3, if
+ * a driver requests a minimum L4 interconnect speed constraint, the
+ * code will also need to add an minimum L3 interconnect speed
+ * constraint,
+ *
+ * Multiple calls to set_min_bus_tput() will replace the previous rate
+ * value for this device.  To remove the interconnect throughput
+ * restriction for this device, call with r = 0.
+ *
+ * No return value.
+ */
+void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
+
+
+/**
+ * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
+ * @dev: struct device *
+ * @t: maximum device wakeup latency in microseconds
+ *
+ * Request that the maximum amount of time necessary for a device to
+ * become accessible after its clocks are enabled should be no greater
+ * than 't' microseconds.  Specifically, this represents the time from
+ * when a device driver enables device clocks with clk_enable(), to
+ * when the register reads and writes on the device will succeed.
+ * This function should be called before clk_disable() is called,
+ * since the power state transition decision may be made during
+ * clk_disable().
+ *
+ * It is intended that underlying PM code will use this information to
+ * determine what power state to put the powerdomain enclosing this
+ * device into.
+ *
+ * Multiple calls to set_max_dev_wakeup_lat() will replace the
+ * previous wakeup latency values for this device.  To remove the wakeup
+ * latency restriction for this device, call with t = -1.
+ *
+ * No return value.
+ */
+void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t);
+
+
+/**
+ * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
+ * @dev: struct device *
+ * @t: maximum DMA transfer start latency in microseconds
+ *
+ * Request that the maximum system DMA transfer start latency for this
+ * device 'dev' should be no greater than 't' microseconds.  "DMA
+ * transfer start latency" here is defined as the elapsed time from
+ * when a device (e.g., McBSP) requests that a system DMA transfer
+ * start or continue, to the time at which data starts to flow into
+ * that device from the system DMA controller.
+ *
+ * It is intended that underlying PM code will use this information to
+ * determine what power state to put the CORE powerdomain into.
+ *
+ * Since system DMA transfers may not involve the MPU, this function
+ * will not affect MPU wakeup latency.  Use set_max_cpu_lat() to do
+ * so.  Similarly, this function will not affect device wakeup latency
+ * -- use set_max_dev_wakeup_lat() to affect that.
+ *
+ * Multiple calls to set_max_sdma_lat() will replace the previous t
+ * value for this device.  To remove the maximum DMA latency for this
+ * device, call with t = -1.
+ *
+ * No return value.
+ */
+void omap_pm_set_max_sdma_lat(struct device *dev, long t);
+
+
+/*
+ * DSP Bridge-specific constraints
+ */
+
+/**
+ * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
+ *
+ * Intended for use by DSPBridge.  Returns an array of OPP->DSP clock
+ * frequency entries.  The final item in the array should have .rate =
+ * .opp_id = 0.
+ */
+const struct omap_opp *omap_pm_dsp_get_opp_table(void);
+
+/**
+ * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
+ * @opp_id: target DSP OPP ID
+ *
+ * Set a minimum OPP ID for the DSP.  This is intended to be called
+ * only from the DSP Bridge MPU-side driver.  Unfortunately, the only
+ * information that code receives from the DSP/BIOS load estimator is the
+ * target OPP ID; hence, this interface.  No return value.
+ */
+void omap_pm_dsp_set_min_opp(u8 opp_id);
+
+/**
+ * omap_pm_dsp_get_opp - report the current DSP OPP ID
+ *
+ * Report the current OPP for the DSP.  Since on OMAP3, the DSP and
+ * MPU share a single voltage domain, the OPP ID returned back may
+ * represent a higher DSP speed than the OPP requested via
+ * omap_pm_dsp_set_min_opp().
+ *
+ * Returns the current VDD1 OPP ID, or 0 upon error.
+ */
+u8 omap_pm_dsp_get_opp(void);
+
+
+/*
+ * CPUFreq-originated constraint
+ *
+ * In the future, this should be handled by custom OPP clocktype
+ * functions.
+ */
+
+/**
+ * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
+ *
+ * Provide a frequency table usable by CPUFreq for the current chip/board.
+ * Returns a pointer to a struct cpufreq_frequency_table array or NULL
+ * upon error.
+ */
+struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
+
+/**
+ * omap_pm_cpu_set_freq - set the current minimum MPU frequency
+ * @f: MPU frequency in Hz
+ *
+ * Set the current minimum CPU frequency.  The actual CPU frequency
+ * used could end up higher if the DSP requested a higher OPP.
+ * Intended to be called by plat-omap/cpu_omap.c:omap_target().  No
+ * return value.
+ */
+void omap_pm_cpu_set_freq(unsigned long f);
+
+/**
+ * omap_pm_cpu_get_freq - report the current CPU frequency
+ *
+ * Returns the current MPU frequency, or 0 upon error.
+ */
+unsigned long omap_pm_cpu_get_freq(void);
+
+
+/*
+ * Device context loss tracking
+ */
+
+/**
+ * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
+ * @dev: struct device *
+ *
+ * This function returns the number of times that the device @dev has
+ * lost its internal context.  This generally occurs on a powerdomain
+ * transition to OFF.  Drivers use this as an optimization to avoid restoring
+ * context if the device hasn't lost it.  To use, drivers should initially
+ * call this in their context save functions and store the result.  Early in
+ * the driver's context restore function, the driver should call this function
+ * again, and compare the result to the stored counter.  If they differ, the
+ * driver must restore device context.   If the number of context losses
+ * exceeds the maximum positive integer, the function will wrap to 0 and
+ * continue counting.  Returns the number of context losses for this device,
+ * or -EINVAL upon error.
+ */
+int omap_pm_get_dev_context_loss_count(struct device *dev);
+
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h
index 15dec7f1c7c0..b3ba5ac7b4a4 100644
--- a/arch/arm/plat-omap/include/mach/omap44xx.h
+++ b/arch/arm/plat-omap/include/mach/omap44xx.h
@@ -33,14 +33,14 @@
 #define IRQ_SIR_IRQ                     0x0040
 #define OMAP44XX_GIC_DIST_BASE          0x48241000
 #define OMAP44XX_GIC_CPU_BASE           0x48240100
-#define OMAP44XX_VA_GIC_CPU_BASE        IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+#define OMAP44XX_VA_GIC_CPU_BASE        OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
 #define OMAP44XX_SCU_BASE               0x48240000
-#define OMAP44XX_VA_SCU_BASE            IO_ADDRESS(OMAP44XX_SCU_BASE)
+#define OMAP44XX_VA_SCU_BASE            OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
 #define OMAP44XX_LOCAL_TWD_BASE         0x48240600
-#define OMAP44XX_VA_LOCAL_TWD_BASE      IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
+#define OMAP44XX_VA_LOCAL_TWD_BASE      OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
 #define OMAP44XX_LOCAL_TWD_SIZE         0x00000100
 #define OMAP44XX_WKUPGEN_BASE           0x48281000
-#define OMAP44XX_VA_WKUPGEN_BASE        IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
+#define OMAP44XX_VA_WKUPGEN_BASE        OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
 
 #endif /* __ASM_ARCH_OMAP44XX_H */
 
diff --git a/arch/arm/plat-omap/include/mach/omap_device.h b/arch/arm/plat-omap/include/mach/omap_device.h
new file mode 100644
index 000000000000..bd0e136db337
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap_device.h
@@ -0,0 +1,141 @@
+/*
+ * omap_device headers
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Developed in collaboration with (alphabetical order): Benoit
+ * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
+ * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
+ * Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Eventually this type of functionality should either be
+ * a) implemented via arch-specific pointers in platform_device
+ * or
+ * b) implemented as a proper omap_bus/omap_device in Linux, no more
+ *    platform_device
+ *
+ * omap_device differs from omap_hwmod in that it includes external
+ * (e.g., board- and system-level) integration details.  omap_hwmod
+ * stores hardware data that is invariant for a given OMAP chip.
+ *
+ * To do:
+ * - GPIO integration
+ * - regulator integration
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include <mach/omap_hwmod.h>
+
+/* omap_device._state values */
+#define OMAP_DEVICE_STATE_UNKNOWN       0
+#define OMAP_DEVICE_STATE_ENABLED       1
+#define OMAP_DEVICE_STATE_IDLE          2
+#define OMAP_DEVICE_STATE_SHUTDOWN      3
+
+/**
+ * struct omap_device - omap_device wrapper for platform_devices
+ * @pdev: platform_device
+ * @hwmods: (one .. many per omap_device)
+ * @hwmods_cnt: ARRAY_SIZE() of @hwmods
+ * @pm_lats: ptr to an omap_device_pm_latency table
+ * @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats
+ * @pm_lat_level: array index of the last odpl entry executed - -1 if never
+ * @dev_wakeup_lat: dev wakeup latency in microseconds
+ * @_dev_wakeup_lat_limit: dev wakeup latency limit in usec - set by OMAP PM
+ * @_state: one of OMAP_DEVICE_STATE_* (see above)
+ * @flags: device flags
+ *
+ * Integrates omap_hwmod data into Linux platform_device.
+ *
+ * Field names beginning with underscores are for the internal use of
+ * the omap_device code.
+ *
+ */
+struct omap_device {
+        struct platform_device          pdev;
+        struct omap_hwmod               **hwmods;
+        struct omap_device_pm_latency   *pm_lats;
+        u32                             dev_wakeup_lat;
+        u32                             _dev_wakeup_lat_limit;
+        u8                              pm_lats_cnt;
+        s8                              pm_lat_level;
+        u8                              hwmods_cnt;
+        u8                              _state;
+};
+
+/* Device driver interface (call via platform_data fn ptrs) */
+
+int omap_device_enable(struct platform_device *pdev);
+int omap_device_idle(struct platform_device *pdev);
+int omap_device_shutdown(struct platform_device *pdev);
+
+/* Core code interface */
+
+int omap_device_count_resources(struct omap_device *od);
+int omap_device_fill_resources(struct omap_device *od, struct resource *res);
+
+struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
+                                      struct omap_hwmod *oh, void *pdata,
+                                      int pdata_len,
+                                      struct omap_device_pm_latency *pm_lats,
+                                      int pm_lats_cnt);
+
+struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
+                                         struct omap_hwmod **oh, int oh_cnt,
+                                         void *pdata, int pdata_len,
+                                         struct omap_device_pm_latency *pm_lats,
+                                         int pm_lats_cnt);
+
+int omap_device_register(struct omap_device *od);
+
+/* OMAP PM interface */
+int omap_device_align_pm_lat(struct platform_device *pdev,
+                             u32 new_wakeup_lat_limit);
+struct powerdomain *omap_device_get_pwrdm(struct omap_device *od);
+
+/* Other */
+
+int omap_device_idle_hwmods(struct omap_device *od);
+int omap_device_enable_hwmods(struct omap_device *od);
+
+int omap_device_disable_clocks(struct omap_device *od);
+int omap_device_enable_clocks(struct omap_device *od);
+
+
+/*
+ * Entries should be kept in latency order ascending
+ *
+ * deact_lat is the maximum number of microseconds required to complete
+ * deactivate_func() at the device's slowest OPP.
+ *
+ * act_lat is the maximum number of microseconds required to complete
+ * activate_func() at the device's slowest OPP.
+ *
+ * This will result in some suboptimal power management decisions at fast
+ * OPPs, but avoids having to recompute all device power management decisions
+ * if the system shifts from a fast OPP to a slow OPP (in order to meet
+ * latency requirements).
+ *
+ * XXX should deactivate_func/activate_func() take platform_device pointers
+ * rather than omap_device pointers?
+ */
+struct omap_device_pm_latency {
+        u32 deactivate_lat;
+        int (*deactivate_func)(struct omap_device *od);
+        u32 activate_lat;
+        int (*activate_func)(struct omap_device *od);
+};
+
+
+#endif
+
diff --git a/arch/arm/plat-omap/include/mach/omap_hwmod.h b/arch/arm/plat-omap/include/mach/omap_hwmod.h
new file mode 100644
index 000000000000..1f79c20e2929
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap_hwmod.h
@@ -0,0 +1,447 @@
+/*
+ * omap_hwmod macros, structures
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Created in collaboration with (alphabetical order): Benoit Cousson,
+ * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
+ * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * These headers and macros are used to define OMAP on-chip module
+ * data and their integration with other OMAP modules and Linux.
+ *
+ * References:
+ * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
+ * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
+ * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
+ * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
+ * - Open Core Protocol Specification 2.2
+ *
+ * To do:
+ * - add interconnect error log structures
+ * - add pinmuxing
+ * - init_conn_id_bit (CONNID_BIT_VECTOR)
+ * - implement default hwmod SMS/SDRC flags?
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
+
+#include <linux/kernel.h>
+#include <linux/ioport.h>
+
+#include <mach/cpu.h>
+
+struct omap_device;
+
+/* OCP SYSCONFIG bit shifts/masks */
+#define SYSC_MIDLEMODE_SHIFT            12
+#define SYSC_MIDLEMODE_MASK             (0x3 << SYSC_MIDLEMODE_SHIFT)
+#define SYSC_CLOCKACTIVITY_SHIFT        8
+#define SYSC_CLOCKACTIVITY_MASK         (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
+#define SYSC_SIDLEMODE_SHIFT            3
+#define SYSC_SIDLEMODE_MASK             (0x3 << SYSC_SIDLEMODE_SHIFT)
+#define SYSC_ENAWAKEUP_SHIFT            2
+#define SYSC_ENAWAKEUP_MASK             (1 << SYSC_ENAWAKEUP_SHIFT)
+#define SYSC_SOFTRESET_SHIFT            1
+#define SYSC_SOFTRESET_MASK             (1 << SYSC_SOFTRESET_SHIFT)
+
+/* OCP SYSSTATUS bit shifts/masks */
+#define SYSS_RESETDONE_SHIFT            0
+#define SYSS_RESETDONE_MASK             (1 << SYSS_RESETDONE_SHIFT)
+
+/* Master standby/slave idle mode flags */
+#define HWMOD_IDLEMODE_FORCE            (1 << 0)
+#define HWMOD_IDLEMODE_NO               (1 << 1)
+#define HWMOD_IDLEMODE_SMART            (1 << 2)
+
+
+/**
+ * struct omap_hwmod_dma_info - MPU address space handled by the hwmod
+ * @name: name of the DMA channel (module local name)
+ * @dma_ch: DMA channel ID
+ *
+ * @name should be something short, e.g., "tx" or "rx".  It is for use
+ * by platform_get_resource_byname().  It is defined locally to the
+ * hwmod.
+ */
+struct omap_hwmod_dma_info {
+        const char      *name;
+        u16             dma_ch;
+};
+
+/**
+ * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
+ * @role: "sys", "32k", "tv", etc -- for use in clk_get()
+ * @clkdev_dev_id: opt clock: clkdev dev_id string
+ * @clkdev_con_id: opt clock: clkdev con_id string
+ * @_clk: pointer to the struct clk (filled in at runtime)
+ *
+ * The module's interface clock and main functional clock should not
+ * be added as optional clocks.
+ */
+struct omap_hwmod_opt_clk {
+        const char      *role;
+        const char      *clkdev_dev_id;
+        const char      *clkdev_con_id;
+        struct clk      *_clk;
+};
+
+
+/* omap_hwmod_omap2_firewall.flags bits */
+#define OMAP_FIREWALL_L3                (1 << 0)
+#define OMAP_FIREWALL_L4                (1 << 1)
+
+/**
+ * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
+ * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
+ * @l4_fw_region: L4 firewall region ID
+ * @l4_prot_group: L4 protection group ID
+ * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
+ */
+struct omap_hwmod_omap2_firewall {
+        u8 l3_perm_bit;
+        u8 l4_fw_region;
+        u8 l4_prot_group;
+        u8 flags;
+};
+
+
+/*
+ * omap_hwmod_addr_space.flags bits
+ *
+ * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
+ * ADDR_TYPE_RT: Address space contains module register target data.
+ */
+#define ADDR_MAP_ON_INIT        (1 << 0)
+#define ADDR_TYPE_RT            (1 << 1)
+
+/**
+ * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
+ * @pa_start: starting physical address
+ * @pa_end: ending physical address
+ * @flags: (see omap_hwmod_addr_space.flags macros above)
+ *
+ * Address space doesn't necessarily follow physical interconnect
+ * structure.  GPMC is one example.
+ */
+struct omap_hwmod_addr_space {
+        u32 pa_start;
+        u32 pa_end;
+        u8 flags;
+};
+
+
+/*
+ * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
+ * interface to interact with the hwmod.  Used to add sleep dependencies
+ * when the module is enabled or disabled.
+ */
+#define OCP_USER_MPU                    (1 << 0)
+#define OCP_USER_SDMA                   (1 << 1)
+
+/* omap_hwmod_ocp_if.flags bits */
+#define OCPIF_HAS_IDLEST                (1 << 0)
+#define OCPIF_SWSUP_IDLE                (1 << 1)
+#define OCPIF_CAN_BURST                 (1 << 2)
+
+/**
+ * struct omap_hwmod_ocp_if - OCP interface data
+ * @master: struct omap_hwmod that initiates OCP transactions on this link
+ * @slave: struct omap_hwmod that responds to OCP transactions on this link
+ * @addr: address space associated with this link
+ * @clkdev_dev_id: interface clock: clkdev dev_id string
+ * @clkdev_con_id: interface clock: clkdev con_id string
+ * @_clk: pointer to the interface struct clk (filled in at runtime)
+ * @fw: interface firewall data
+ * @addr_cnt: ARRAY_SIZE(@addr)
+ * @width: OCP data width
+ * @thread_cnt: number of threads
+ * @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
+ * @user: initiators using this interface (see OCP_USER_* macros above)
+ * @flags: OCP interface flags (see OCPIF_* macros above)
+ *
+ * It may also be useful to add a tag_cnt field for OCP2.x devices.
+ *
+ * Parameter names beginning with an underscore are managed internally by
+ * the omap_hwmod code and should not be set during initialization.
+ */
+struct omap_hwmod_ocp_if {
+        struct omap_hwmod               *master;
+        struct omap_hwmod               *slave;
+        struct omap_hwmod_addr_space    *addr;
+        const char                      *clkdev_dev_id;
+        const char                      *clkdev_con_id;
+        struct clk                      *_clk;
+        union {
+                struct omap_hwmod_omap2_firewall omap2;
+        }                               fw;
+        u8                              addr_cnt;
+        u8                              width;
+        u8                              thread_cnt;
+        u8                              max_burst_len;
+        u8                              user;
+        u8                              flags;
+};
+
+
+/* Macros for use in struct omap_hwmod_sysconfig */
+
+/* Flags for use in omap_hwmod_sysconfig.idlemodes */
+#define MASTER_STANDBY_SHIFT    2
+#define SLAVE_IDLE_SHIFT        0
+#define SIDLE_FORCE             (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
+#define SIDLE_NO                (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
+#define SIDLE_SMART             (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
+#define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
+#define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
+#define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
+
+/* omap_hwmod_sysconfig.sysc_flags capability flags */
+#define SYSC_HAS_AUTOIDLE       (1 << 0)
+#define SYSC_HAS_SOFTRESET      (1 << 1)
+#define SYSC_HAS_ENAWAKEUP      (1 << 2)
+#define SYSC_HAS_EMUFREE        (1 << 3)
+#define SYSC_HAS_CLOCKACTIVITY  (1 << 4)
+#define SYSC_HAS_SIDLEMODE      (1 << 5)
+#define SYSC_HAS_MIDLEMODE      (1 << 6)
+#define SYSS_MISSING            (1 << 7)
+
+/* omap_hwmod_sysconfig.clockact flags */
+#define CLOCKACT_TEST_BOTH      0x0
+#define CLOCKACT_TEST_MAIN      0x1
+#define CLOCKACT_TEST_ICLK      0x2
+#define CLOCKACT_TEST_NONE      0x3
+
+/**
+ * struct omap_hwmod_sysconfig - hwmod OCP_SYSCONFIG/OCP_SYSSTATUS data
+ * @rev_offs: IP block revision register offset (from module base addr)
+ * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
+ * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
+ * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
+ * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
+ * @clockact: the default value of the module CLOCKACTIVITY bits
+ *
+ * @clockact describes to the module which clocks are likely to be
+ * disabled when the PRCM issues its idle request to the module.  Some
+ * modules have separate clockdomains for the interface clock and main
+ * functional clock, and can check whether they should acknowledge the
+ * idle request based on the internal module functionality that has
+ * been associated with the clocks marked in @clockact.  This field is
+ * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
+ *
+ */
+struct omap_hwmod_sysconfig {
+        u16 rev_offs;
+        u16 sysc_offs;
+        u16 syss_offs;
+        u8 idlemodes;
+        u8 sysc_flags;
+        u8 clockact;
+};
+
+/**
+ * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
+ * @module_offs: PRCM submodule offset from the start of the PRM/CM
+ * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
+ * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
+ * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
+ * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
+ * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
+ *
+ * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
+ * WKEN, GRPSEL registers.  In an ideal world, no extra information
+ * would be needed for IDLEST information, but alas, there are some
+ * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
+ * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
+ */
+struct omap_hwmod_omap2_prcm {
+        s16 module_offs;
+        u8 prcm_reg_id;
+        u8 module_bit;
+        u8 idlest_reg_id;
+        u8 idlest_idle_bit;
+        u8 idlest_stdby_bit;
+};
+
+
+/**
+ * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
+ * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2
+ * @device_offs: device register offset from @module_offs
+ * @submodule_wkdep_bit: bit shift of the WKDEP range
+ */
+struct omap_hwmod_omap4_prcm {
+        u32 module_offs;
+        u16 device_offs;
+        u8 submodule_wkdep_bit;
+};
+
+
+/*
+ * omap_hwmod.flags definitions
+ *
+ * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
+ *     of idle, rather than relying on module smart-idle
+ * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
+ *     of standby, rather than relying on module smart-standby
+ * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
+ *     SDRAM controller, etc.
+ * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
+ *     controller, etc.
+ * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
+ */
+#define HWMOD_SWSUP_SIDLE                       (1 << 0)
+#define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
+#define HWMOD_INIT_NO_RESET                     (1 << 2)
+#define HWMOD_INIT_NO_IDLE                      (1 << 3)
+#define HWMOD_SET_DEFAULT_CLOCKACT              (1 << 4)
+
+/*
+ * omap_hwmod._int_flags definitions
+ * These are for internal use only and are managed by the omap_hwmod code.
+ *
+ * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
+ * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
+ * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
+ */
+#define _HWMOD_NO_MPU_PORT                      (1 << 0)
+#define _HWMOD_WAKEUP_ENABLED                   (1 << 1)
+#define _HWMOD_SYSCONFIG_LOADED                 (1 << 2)
+
+/*
+ * omap_hwmod._state definitions
+ *
+ * INITIALIZED: reset (optionally), initialized, enabled, disabled
+ *              (optionally)
+ *
+ *
+ */
+#define _HWMOD_STATE_UNKNOWN                    0
+#define _HWMOD_STATE_REGISTERED                 1
+#define _HWMOD_STATE_CLKS_INITED                2
+#define _HWMOD_STATE_INITIALIZED                3
+#define _HWMOD_STATE_ENABLED                    4
+#define _HWMOD_STATE_IDLE                       5
+#define _HWMOD_STATE_DISABLED                   6
+
+/**
+ * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
+ * @name: name of the hwmod
+ * @od: struct omap_device currently associated with this hwmod (internal use)
+ * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
+ * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
+ * @prcm: PRCM data pertaining to this hwmod
+ * @clkdev_dev_id: main clock: clkdev dev_id string
+ * @clkdev_con_id: main clock: clkdev con_id string
+ * @_clk: pointer to the main struct clk (filled in at runtime)
+ * @opt_clks: other device clocks that drivers can request (0..*)
+ * @masters: ptr to array of OCP ifs that this hwmod can initiate on
+ * @slaves: ptr to array of OCP ifs that this hwmod can respond on
+ * @sysconfig: device SYSCONFIG/SYSSTATUS register data
+ * @dev_attr: arbitrary device attributes that can be passed to the driver
+ * @_sysc_cache: internal-use hwmod flags
+ * @_rt_va: cached register target start address (internal use)
+ * @_mpu_port_index: cached MPU register target slave ID (internal use)
+ * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
+ * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
+ * @mpu_irqs_cnt: number of @mpu_irqs
+ * @sdma_chs_cnt: number of @sdma_chs
+ * @opt_clks_cnt: number of @opt_clks
+ * @master_cnt: number of @master entries
+ * @slaves_cnt: number of @slave entries
+ * @response_lat: device OCP response latency (in interface clock cycles)
+ * @_int_flags: internal-use hwmod flags
+ * @_state: internal-use hwmod state
+ * @flags: hwmod flags (documented below)
+ * @omap_chip: OMAP chips this hwmod is present on
+ * @node: list node for hwmod list (internal use)
+ *
+ * @clkdev_dev_id, @clkdev_con_id, and @clk all refer to this module's "main
+ * clock," which for our purposes is defined as "the functional clock needed
+ * for register accesses to complete."  Modules may not have a main clock if
+ * the interface clock also serves as a main clock.
+ *
+ * Parameter names beginning with an underscore are managed internally by
+ * the omap_hwmod code and should not be set during initialization.
+ */
+struct omap_hwmod {
+        const char                      *name;
+        struct omap_device              *od;
+        u8                              *mpu_irqs;
+        struct omap_hwmod_dma_info      *sdma_chs;
+        union {
+                struct omap_hwmod_omap2_prcm omap2;
+                struct omap_hwmod_omap4_prcm omap4;
+        }                               prcm;
+        const char                      *clkdev_dev_id;
+        const char                      *clkdev_con_id;
+        struct clk                      *_clk;
+        struct omap_hwmod_opt_clk       *opt_clks;
+        struct omap_hwmod_ocp_if        **masters; /* connect to *_IA */
+        struct omap_hwmod_ocp_if        **slaves;  /* connect to *_TA */
+        struct omap_hwmod_sysconfig     *sysconfig;
+        void                            *dev_attr;
+        u32                             _sysc_cache;
+        void __iomem                    *_rt_va;
+        struct list_head                node;
+        u16                             flags;
+        u8                              _mpu_port_index;
+        u8                              msuspendmux_reg_id;
+        u8                              msuspendmux_shift;
+        u8                              response_lat;
+        u8                              mpu_irqs_cnt;
+        u8                              sdma_chs_cnt;
+        u8                              opt_clks_cnt;
+        u8                              masters_cnt;
+        u8                              slaves_cnt;
+        u8                              hwmods_cnt;
+        u8                              _int_flags;
+        u8                              _state;
+        const struct omap_chip_id       omap_chip;
+};
+
+int omap_hwmod_init(struct omap_hwmod **ohs);
+int omap_hwmod_register(struct omap_hwmod *oh);
+int omap_hwmod_unregister(struct omap_hwmod *oh);
+struct omap_hwmod *omap_hwmod_lookup(const char *name);
+int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh));
+int omap_hwmod_late_init(void);
+
+int omap_hwmod_enable(struct omap_hwmod *oh);
+int omap_hwmod_idle(struct omap_hwmod *oh);
+int omap_hwmod_shutdown(struct omap_hwmod *oh);
+
+int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
+int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
+
+int omap_hwmod_reset(struct omap_hwmod *oh);
+void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
+
+void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
+u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
+
+int omap_hwmod_count_resources(struct omap_hwmod *oh);
+int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
+
+struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
+
+int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh);
+int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh);
+
+int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
+int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
+int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
+int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
+
+int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
+int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h
index 7b74d1255e0b..b226bdf45739 100644
--- a/arch/arm/plat-omap/include/mach/omapfb.h
+++ b/arch/arm/plat-omap/include/mach/omapfb.h
@@ -276,8 +276,8 @@ typedef int (*omapfb_notifier_callback_t)(struct notifier_block *,
                                           void *fbi);
 
 struct omapfb_mem_region {
-        dma_addr_t      paddr;
-        void            *vaddr;
+        u32             paddr;
+        void __iomem    *vaddr;
         unsigned long   size;
         u8              type;           /* OMAPFB_PLANE_MEM_* */
         unsigned        alloc:1;        /* allocated by the driver */
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
index 69c9e675d8ee..6271d8556a40 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -117,6 +117,13 @@ struct powerdomain {
 
         struct list_head node;
 
+        int state;
+        unsigned state_counter[4];
+
+#ifdef CONFIG_PM_DEBUG
+        s64 timer;
+        s64 state_timer[4];
+#endif
 };
 
 
@@ -126,7 +133,8 @@ int pwrdm_register(struct powerdomain *pwrdm);
 int pwrdm_unregister(struct powerdomain *pwrdm);
 struct powerdomain *pwrdm_lookup(const char *name);
 
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+                        void *user);
 
 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
@@ -164,4 +172,9 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
 
 int pwrdm_wait_transition(struct powerdomain *pwrdm);
 
+int pwrdm_state_switch(struct powerdomain *pwrdm);
+int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
+int pwrdm_pre_transition(void);
+int pwrdm_post_transition(void);
+
 #endif
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 0be18e4ff182..1c09c78a48f2 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -21,19 +21,28 @@
 /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
 
 #define SDRC_SYSCONFIG          0x010
+#define SDRC_CS_CFG             0x040
+#define SDRC_SHARING            0x044
+#define SDRC_ERR_TYPE           0x04C
 #define SDRC_DLLA_CTRL          0x060
 #define SDRC_DLLA_STATUS        0x064
 #define SDRC_DLLB_CTRL          0x068
 #define SDRC_DLLB_STATUS        0x06C
 #define SDRC_POWER              0x070
+#define SDRC_MCFG_0             0x080
 #define SDRC_MR_0               0x084
+#define SDRC_EMR2_0             0x08c
 #define SDRC_ACTIM_CTRL_A_0     0x09c
 #define SDRC_ACTIM_CTRL_B_0     0x0a0
 #define SDRC_RFR_CTRL_0         0x0a4
+#define SDRC_MANUAL_0           0x0a8
+#define SDRC_MCFG_1             0x0B0
 #define SDRC_MR_1               0x0B4
+#define SDRC_EMR2_1             0x0BC
 #define SDRC_ACTIM_CTRL_A_1     0x0C4
 #define SDRC_ACTIM_CTRL_B_1     0x0C8
 #define SDRC_RFR_CTRL_1         0x0D4
+#define SDRC_MANUAL_1           0x0D8
 
 /*
  * These values represent the number of memory clock cycles between
@@ -71,11 +80,11 @@
  */
 
 #define OMAP242X_SMS_REGADDR(reg)                                       \
-                        (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+                        (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
 #define OMAP243X_SMS_REGADDR(reg)                                       \
-                        (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+                        (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
 #define OMAP343X_SMS_REGADDR(reg)                                       \
-                        (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+                        (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
 
 /* SMS register offsets - read/write with sms_{read,write}_reg() */
 
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
index def0529c75eb..e249186d26e2 100644
--- a/arch/arm/plat-omap/include/mach/serial.h
+++ b/arch/arm/plat-omap/include/mach/serial.h
@@ -13,6 +13,8 @@
 #ifndef __ASM_ARCH_SERIAL_H
 #define __ASM_ARCH_SERIAL_H
 
+#include <linux/init.h>
+
 #if defined(CONFIG_ARCH_OMAP1)
 /* OMAP1 serial ports */
 #define OMAP_UART1_BASE         0xfffb0000
@@ -53,6 +55,7 @@
                         })
 
 #ifndef __ASSEMBLER__
+extern void __init omap_serial_early_init(void);
 extern void omap_serial_init(void);
 extern int omap_uart_can_sleep(void);
 extern void omap_uart_check_wakeup(void);
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 9b42d72d96cf..b6defa23e77e 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -30,8 +30,8 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
 {
 #ifdef CONFIG_ARCH_OMAP1
         if (cpu_class_is_omap1()) {
-                if (BETWEEN(p, IO_PHYS, IO_SIZE))
-                        return XLATE(p, IO_PHYS, IO_VIRT);
+                if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
+                        return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
         }
         if (cpu_is_omap730()) {
                 if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE))
@@ -132,3 +132,61 @@ void omap_iounmap(volatile void __iomem *addr)
                 __iounmap(addr);
 }
 EXPORT_SYMBOL(omap_iounmap);
+
+/*
+ * NOTE: Please use ioremap + __raw_read/write where possible instead of these
+ */
+
+u8 omap_readb(u32 pa)
+{
+        if (cpu_class_is_omap1())
+                return __raw_readb(OMAP1_IO_ADDRESS(pa));
+        else
+                return __raw_readb(OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_readb);
+
+u16 omap_readw(u32 pa)
+{
+        if (cpu_class_is_omap1())
+                return __raw_readw(OMAP1_IO_ADDRESS(pa));
+        else
+                return __raw_readw(OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_readw);
+
+u32 omap_readl(u32 pa)
+{
+        if (cpu_class_is_omap1())
+                return __raw_readl(OMAP1_IO_ADDRESS(pa));
+        else
+                return __raw_readl(OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_readl);
+
+void omap_writeb(u8 v, u32 pa)
+{
+        if (cpu_class_is_omap1())
+                __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
+        else
+                __raw_writeb(v, OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_writeb);
+
+void omap_writew(u16 v, u32 pa)
+{
+        if (cpu_class_is_omap1())
+                __raw_writew(v, OMAP1_IO_ADDRESS(pa));
+        else
+                __raw_writew(v, OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_writew);
+
+void omap_writel(u32 v, u32 pa)
+{
+        if (cpu_class_is_omap1())
+                __raw_writel(v, OMAP1_IO_ADDRESS(pa));
+        else
+                __raw_writel(v, OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_writel);
diff --git a/arch/arm/plat-omap/iommu-debug.c b/arch/arm/plat-omap/iommu-debug.c
new file mode 100644
index 000000000000..c799b3b0d709
--- /dev/null
+++ b/arch/arm/plat-omap/iommu-debug.c
@@ -0,0 +1,415 @@
+/*
+ * omap iommu: debugfs interface
+ *
+ * Copyright (C) 2008-2009 Nokia Corporation
+ *
+ * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/debugfs.h>
+
+#include <mach/iommu.h>
+#include <mach/iovmm.h>
+
+#include "iopgtable.h"
+
+#define MAXCOLUMN 100 /* for short messages */
+
+static DEFINE_MUTEX(iommu_debug_lock);
+
+static struct dentry *iommu_debug_root;
+
+static ssize_t debug_read_ver(struct file *file, char __user *userbuf,
+                              size_t count, loff_t *ppos)
+{
+        u32 ver = iommu_arch_version();
+        char buf[MAXCOLUMN], *p = buf;
+
+        p += sprintf(p, "H/W version: %d.%d\n", (ver >> 4) & 0xf , ver & 0xf);
+
+        return simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+}
+
+static ssize_t debug_read_regs(struct file *file, char __user *userbuf,
+                               size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        ssize_t bytes;
+
+        buf = kmalloc(count, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        bytes = iommu_dump_ctx(obj, p, count);
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, bytes);
+
+        mutex_unlock(&iommu_debug_lock);
+        kfree(buf);
+
+        return bytes;
+}
+
+static ssize_t debug_read_tlb(struct file *file, char __user *userbuf,
+                              size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        ssize_t bytes, rest;
+
+        buf = kmalloc(count, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        p += sprintf(p, "%8s %8s\n", "cam:", "ram:");
+        p += sprintf(p, "-----------------------------------------\n");
+        rest = count - (p - buf);
+        p += dump_tlb_entries(obj, p, rest);
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+
+        mutex_unlock(&iommu_debug_lock);
+        kfree(buf);
+
+        return bytes;
+}
+
+static ssize_t debug_write_pagetable(struct file *file,
+                     const char __user *userbuf, size_t count, loff_t *ppos)
+{
+        struct iotlb_entry e;
+        struct cr_regs cr;
+        int err;
+        struct iommu *obj = file->private_data;
+        char buf[MAXCOLUMN], *p = buf;
+
+        count = min(count, sizeof(buf));
+
+        mutex_lock(&iommu_debug_lock);
+        if (copy_from_user(p, userbuf, count)) {
+                mutex_unlock(&iommu_debug_lock);
+                return -EFAULT;
+        }
+
+        sscanf(p, "%x %x", &cr.cam, &cr.ram);
+        if (!cr.cam || !cr.ram) {
+                mutex_unlock(&iommu_debug_lock);
+                return -EINVAL;
+        }
+
+        iotlb_cr_to_e(&cr, &e);
+        err = iopgtable_store_entry(obj, &e);
+        if (err)
+                dev_err(obj->dev, "%s: fail to store cr\n", __func__);
+
+        mutex_unlock(&iommu_debug_lock);
+        return count;
+}
+
+#define dump_ioptable_entry_one(lv, da, val)                    \
+        ({                                                      \
+                int __err = 0;                                  \
+                ssize_t bytes;                                  \
+                const int maxcol = 22;                          \
+                const char *str = "%d: %08x %08x\n";            \
+                bytes = snprintf(p, maxcol, str, lv, da, val);  \
+                p += bytes;                                     \
+                len -= bytes;                                   \
+                if (len < maxcol)                               \
+                        __err = -ENOMEM;                        \
+                __err;                                          \
+        })
+
+static ssize_t dump_ioptable(struct iommu *obj, char *buf, ssize_t len)
+{
+        int i;
+        u32 *iopgd;
+        char *p = buf;
+
+        spin_lock(&obj->page_table_lock);
+
+        iopgd = iopgd_offset(obj, 0);
+        for (i = 0; i < PTRS_PER_IOPGD; i++, iopgd++) {
+                int j, err;
+                u32 *iopte;
+                u32 da;
+
+                if (!*iopgd)
+                        continue;
+
+                if (!(*iopgd & IOPGD_TABLE)) {
+                        da = i << IOPGD_SHIFT;
+
+                        err = dump_ioptable_entry_one(1, da, *iopgd);
+                        if (err)
+                                goto out;
+                        continue;
+                }
+
+                iopte = iopte_offset(iopgd, 0);
+
+                for (j = 0; j < PTRS_PER_IOPTE; j++, iopte++) {
+                        if (!*iopte)
+                                continue;
+
+                        da = (i << IOPGD_SHIFT) + (j << IOPTE_SHIFT);
+                        err = dump_ioptable_entry_one(2, da, *iopgd);
+                        if (err)
+                                goto out;
+                }
+        }
+out:
+        spin_unlock(&obj->page_table_lock);
+
+        return p - buf;
+}
+
+static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
+                                    size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        size_t bytes;
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        p += sprintf(p, "L: %8s %8s\n", "da:", "pa:");
+        p += sprintf(p, "-----------------------------------------\n");
+
+        mutex_lock(&iommu_debug_lock);
+
+        bytes = PAGE_SIZE - (p - buf);
+        p += dump_ioptable(obj, p, bytes);
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return bytes;
+}
+
+static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
+                               size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        struct iovm_struct *tmp;
+        int uninitialized_var(i);
+        ssize_t bytes;
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        p += sprintf(p, "%-3s %-8s %-8s %6s %8s\n",
+                     "No", "start", "end", "size", "flags");
+        p += sprintf(p, "-------------------------------------------------\n");
+
+        mutex_lock(&iommu_debug_lock);
+
+        list_for_each_entry(tmp, &obj->mmap, list) {
+                size_t len;
+                const char *str = "%3d %08x-%08x %6x %8x\n";
+                const int maxcol = 39;
+
+                len = tmp->da_end - tmp->da_start;
+                p += snprintf(p, maxcol, str,
+                              i, tmp->da_start, tmp->da_end, len, tmp->flags);
+
+                if (PAGE_SIZE - (p - buf) < maxcol)
+                        break;
+                i++;
+        }
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return bytes;
+}
+
+static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
+                              size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        struct iovm_struct *area;
+        ssize_t bytes;
+
+        count = min_t(ssize_t, count, PAGE_SIZE);
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        area = find_iovm_area(obj, (u32)ppos);
+        if (IS_ERR(area)) {
+                bytes = -EINVAL;
+                goto err_out;
+        }
+        memcpy(p, area->va, count);
+        p += count;
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+err_out:
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return bytes;
+}
+
+static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
+                               size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        struct iovm_struct *area;
+        char *p, *buf;
+
+        count = min_t(size_t, count, PAGE_SIZE);
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        if (copy_from_user(p, userbuf, count)) {
+                count =  -EFAULT;
+                goto err_out;
+        }
+
+        area = find_iovm_area(obj, (u32)ppos);
+        if (IS_ERR(area)) {
+                count = -EINVAL;
+                goto err_out;
+        }
+        memcpy(area->va, p, count);
+err_out:
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return count;
+}
+
+static int debug_open_generic(struct inode *inode, struct file *file)
+{
+        file->private_data = inode->i_private;
+        return 0;
+}
+
+#define DEBUG_FOPS(name)                                                \
+        static const struct file_operations debug_##name##_fops = {     \
+                .open = debug_open_generic,                             \
+                .read = debug_read_##name,                              \
+                .write = debug_write_##name,                            \
+        };
+
+#define DEBUG_FOPS_RO(name)                                             \
+        static const struct file_operations debug_##name##_fops = {     \
+                .open = debug_open_generic,                             \
+                .read = debug_read_##name,                              \
+        };
+
+DEBUG_FOPS_RO(ver);
+DEBUG_FOPS_RO(regs);
+DEBUG_FOPS_RO(tlb);
+DEBUG_FOPS(pagetable);
+DEBUG_FOPS_RO(mmap);
+DEBUG_FOPS(mem);
+
+#define __DEBUG_ADD_FILE(attr, mode)                                    \
+        {                                                               \
+                struct dentry *dent;                                    \
+                dent = debugfs_create_file(#attr, mode, parent,         \
+                                           obj, &debug_##attr##_fops);  \
+                if (!dent)                                              \
+                        return -ENOMEM;                                 \
+        }
+
+#define DEBUG_ADD_FILE(name) __DEBUG_ADD_FILE(name, 600)
+#define DEBUG_ADD_FILE_RO(name) __DEBUG_ADD_FILE(name, 400)
+
+static int iommu_debug_register(struct device *dev, void *data)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct iommu *obj = platform_get_drvdata(pdev);
+        struct dentry *d, *parent;
+
+        if (!obj || !obj->dev)
+                return -EINVAL;
+
+        d = debugfs_create_dir(obj->name, iommu_debug_root);
+        if (!d)
+                return -ENOMEM;
+        parent = d;
+
+        d = debugfs_create_u8("nr_tlb_entries", 400, parent,
+                              (u8 *)&obj->nr_tlb_entries);
+        if (!d)
+                return -ENOMEM;
+
+        DEBUG_ADD_FILE_RO(ver);
+        DEBUG_ADD_FILE_RO(regs);
+        DEBUG_ADD_FILE_RO(tlb);
+        DEBUG_ADD_FILE(pagetable);
+        DEBUG_ADD_FILE_RO(mmap);
+        DEBUG_ADD_FILE(mem);
+
+        return 0;
+}
+
+static int __init iommu_debug_init(void)
+{
+        struct dentry *d;
+        int err;
+
+        d = debugfs_create_dir("iommu", NULL);
+        if (!d)
+                return -ENOMEM;
+        iommu_debug_root = d;
+
+        err = foreach_iommu_device(d, iommu_debug_register);
+        if (err)
+                goto err_out;
+        return 0;
+
+err_out:
+        debugfs_remove_recursive(iommu_debug_root);
+        return err;
+}
+module_init(iommu_debug_init)
+
+static void __exit iommu_debugfs_exit(void)
+{
+        debugfs_remove_recursive(iommu_debug_root);
+}
+module_exit(iommu_debugfs_exit)
+
+MODULE_DESCRIPTION("omap iommu: debugfs interface");
+MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4a0301399013..4b6012707307 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -351,16 +351,14 @@ EXPORT_SYMBOL_GPL(flush_iotlb_all);
 
 #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
 
-ssize_t iommu_dump_ctx(struct iommu *obj, char *buf)
+ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes)
 {
-        ssize_t bytes;
-
         if (!obj || !buf)
                 return -EINVAL;
 
         clk_enable(obj->clk);
 
-        bytes = arch_iommu->dump_ctx(obj, buf);
+        bytes = arch_iommu->dump_ctx(obj, buf, bytes);
 
         clk_disable(obj->clk);
 
@@ -368,7 +366,7 @@ ssize_t iommu_dump_ctx(struct iommu *obj, char *buf)
 }
 EXPORT_SYMBOL_GPL(iommu_dump_ctx);
 
-static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
+static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num)
 {
         int i;
         struct iotlb_lock saved, l;
@@ -379,7 +377,7 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
         iotlb_lock_get(obj, &saved);
         memcpy(&l, &saved, sizeof(saved));
 
-        for (i = 0; i < obj->nr_tlb_entries; i++) {
+        for (i = 0; i < num; i++) {
                 struct cr_regs tmp;
 
                 iotlb_lock_get(obj, &l);
@@ -402,18 +400,21 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
  * @obj:        target iommu
  * @buf:        output buffer
  **/
-size_t dump_tlb_entries(struct iommu *obj, char *buf)
+size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes)
 {
-        int i, n;
+        int i, num;
         struct cr_regs *cr;
         char *p = buf;
 
-        cr = kcalloc(obj->nr_tlb_entries, sizeof(*cr), GFP_KERNEL);
+        num = bytes / sizeof(*cr);
+        num = min(obj->nr_tlb_entries, num);
+
+        cr = kcalloc(num, sizeof(*cr), GFP_KERNEL);
         if (!cr)
                 return 0;
 
-        n = __dump_tlb_entries(obj, cr);
-        for (i = 0; i < n; i++)
+        num = __dump_tlb_entries(obj, cr, num);
+        for (i = 0; i < num; i++)
                 p += iotlb_dump_cr(obj, cr + i, p);
         kfree(cr);
 
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index 2fce2c151a95..6fc52fcbdc03 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -199,7 +199,7 @@ static void *vmap_sg(const struct sg_table *sgt)
                 va += bytes;
         }
 
-        flush_cache_vmap(new->addr, total);
+        flush_cache_vmap(new->addr, new->addr + total);
         return new->addr;
 
 err_out:
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
new file mode 100644
index 000000000000..e98f0a2a6c26
--- /dev/null
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -0,0 +1,296 @@
+/*
+ * omap-pm-noop.c - OMAP power management interface - dummy version
+ *
+ * This code implements the OMAP power management interface to
+ * drivers, CPUIdle, CPUFreq, and DSP Bridge.  It is strictly for
+ * debug/demonstration use, as it does nothing but printk() whenever a
+ * function is called (when DEBUG is defined, below)
+ *
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Interface developed by (in alphabetical order):
+ * Karthik Dasu, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan
+ * Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, Richard Woodruff
+ */
+
+#undef DEBUG
+
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <linux/device.h>
+
+/* Interface documentation is in mach/omap-pm.h */
+#include <mach/omap-pm.h>
+
+#include <mach/powerdomain.h>
+
+struct omap_opp *dsp_opps;
+struct omap_opp *mpu_opps;
+struct omap_opp *l3_opps;
+
+/*
+ * Device-driver-originated constraints (via board-*.c files)
+ */
+
+void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t)
+{
+        if (!dev || t < -1) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (t == -1)
+                pr_debug("OMAP PM: remove max MPU wakeup latency constraint: "
+                         "dev %s\n", dev_name(dev));
+        else
+                pr_debug("OMAP PM: add max MPU wakeup latency constraint: "
+                         "dev %s, t = %ld usec\n", dev_name(dev), t);
+
+        /*
+         * For current Linux, this needs to map the MPU to a
+         * powerdomain, then go through the list of current max lat
+         * constraints on the MPU and find the smallest.  If
+         * the latency constraint has changed, the code should
+         * recompute the state to enter for the next powerdomain
+         * state.
+         *
+         * TI CDP code can call constraint_set here.
+         */
+}
+
+void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
+{
+        if (!dev || (agent_id != OCP_INITIATOR_AGENT &&
+            agent_id != OCP_TARGET_AGENT)) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (r == 0)
+                pr_debug("OMAP PM: remove min bus tput constraint: "
+                         "dev %s for agent_id %d\n", dev_name(dev), agent_id);
+        else
+                pr_debug("OMAP PM: add min bus tput constraint: "
+                         "dev %s for agent_id %d: rate %ld KiB\n",
+                         dev_name(dev), agent_id, r);
+
+        /*
+         * This code should model the interconnect and compute the
+         * required clock frequency, convert that to a VDD2 OPP ID, then
+         * set the VDD2 OPP appropriately.
+         *
+         * TI CDP code can call constraint_set here on the VDD2 OPP.
+         */
+}
+
+void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t)
+{
+        if (!dev || t < -1) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (t == -1)
+                pr_debug("OMAP PM: remove max device latency constraint: "
+                         "dev %s\n", dev_name(dev));
+        else
+                pr_debug("OMAP PM: add max device latency constraint: "
+                         "dev %s, t = %ld usec\n", dev_name(dev), t);
+
+        /*
+         * For current Linux, this needs to map the device to a
+         * powerdomain, then go through the list of current max lat
+         * constraints on that powerdomain and find the smallest.  If
+         * the latency constraint has changed, the code should
+         * recompute the state to enter for the next powerdomain
+         * state.  Conceivably, this code should also determine
+         * whether to actually disable the device clocks or not,
+         * depending on how long it takes to re-enable the clocks.
+         *
+         * TI CDP code can call constraint_set here.
+         */
+}
+
+void omap_pm_set_max_sdma_lat(struct device *dev, long t)
+{
+        if (!dev || t < -1) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (t == -1)
+                pr_debug("OMAP PM: remove max DMA latency constraint: "
+                         "dev %s\n", dev_name(dev));
+        else
+                pr_debug("OMAP PM: add max DMA latency constraint: "
+                         "dev %s, t = %ld usec\n", dev_name(dev), t);
+
+        /*
+         * For current Linux PM QOS params, this code should scan the
+         * list of maximum CPU and DMA latencies and select the
+         * smallest, then set cpu_dma_latency pm_qos_param
+         * accordingly.
+         *
+         * For future Linux PM QOS params, with separate CPU and DMA
+         * latency params, this code should just set the dma_latency param.
+         *
+         * TI CDP code can call constraint_set here.
+         */
+
+}
+
+
+/*
+ * DSP Bridge-specific constraints
+ */
+
+const struct omap_opp *omap_pm_dsp_get_opp_table(void)
+{
+        pr_debug("OMAP PM: DSP request for OPP table\n");
+
+        /*
+         * Return DSP frequency table here:  The final item in the
+         * array should have .rate = .opp_id = 0.
+         */
+
+        return NULL;
+}
+
+void omap_pm_dsp_set_min_opp(u8 opp_id)
+{
+        if (opp_id == 0) {
+                WARN_ON(1);
+                return;
+        }
+
+        pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id);
+
+        /*
+         *
+         * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we
+         * can just test to see which is higher, the CPU's desired OPP
+         * ID or the DSP's desired OPP ID, and use whichever is
+         * highest.
+         *
+         * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP
+         * rate is keyed on MPU speed, not the OPP ID.  So we need to
+         * map the OPP ID to the MPU speed for use with clk_set_rate()
+         * if it is higher than the current OPP clock rate.
+         *
+         */
+}
+
+
+u8 omap_pm_dsp_get_opp(void)
+{
+        pr_debug("OMAP PM: DSP requests current DSP OPP ID\n");
+
+        /*
+         * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock
+         *
+         * CDP12.14+:
+         * Call clk_get_rate() on the OPP custom clock, map that to an
+         * OPP ID using the tables defined in board-*.c/chip-*.c files.
+         */
+
+        return 0;
+}
+
+/*
+ * CPUFreq-originated constraint
+ *
+ * In the future, this should be handled by custom OPP clocktype
+ * functions.
+ */
+
+struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void)
+{
+        pr_debug("OMAP PM: CPUFreq request for frequency table\n");
+
+        /*
+         * Return CPUFreq frequency table here: loop over
+         * all VDD1 clkrates, pull out the mpu_ck frequencies, build
+         * table
+         */
+
+        return NULL;
+}
+
+void omap_pm_cpu_set_freq(unsigned long f)
+{
+        if (f == 0) {
+                WARN_ON(1);
+                return;
+        }
+
+        pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n",
+                 f);
+
+        /*
+         * For l-o dev tree, determine whether MPU freq or DSP OPP id
+         * freq is higher.  Find the OPP ID corresponding to the
+         * higher frequency.  Call clk_round_rate() and clk_set_rate()
+         * on the OPP custom clock.
+         *
+         * CDP should just be able to set the VDD1 OPP clock rate here.
+         */
+}
+
+unsigned long omap_pm_cpu_get_freq(void)
+{
+        pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n");
+
+        /*
+         * Call clk_get_rate() on the mpu_ck.
+         */
+
+        return 0;
+}
+
+/*
+ * Device context loss tracking
+ */
+
+int omap_pm_get_dev_context_loss_count(struct device *dev)
+{
+        if (!dev) {
+                WARN_ON(1);
+                return -EINVAL;
+        };
+
+        pr_debug("OMAP PM: returning context loss count for dev %s\n",
+                 dev_name(dev));
+
+        /*
+         * Map the device to the powerdomain.  Return the powerdomain
+         * off counter.
+         */
+
+        return 0;
+}
+
+
+/* Should be called before clk framework init */
+int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
+                                 struct omap_opp *dsp_opp_table,
+                                 struct omap_opp *l3_opp_table)
+{
+        mpu_opps = mpu_opp_table;
+        dsp_opps = dsp_opp_table;
+        l3_opps = l3_opp_table;
+        return 0;
+}
+
+/* Must be called after clock framework is initialized */
+int __init omap_pm_if_init(void)
+{
+        return 0;
+}
+
+void omap_pm_if_exit(void)
+{
+        /* Deallocate CPUFreq frequency table here */
+}
+
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
new file mode 100644
index 000000000000..2c409fc6dd21
--- /dev/null
+++ b/arch/arm/plat-omap/omap_device.c
@@ -0,0 +1,687 @@
+/*
+ * omap_device implementation
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Developed in collaboration with (alphabetical order): Benoit
+ * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
+ * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
+ * Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This code provides a consistent interface for OMAP device drivers
+ * to control power management and interconnect properties of their
+ * devices.
+ *
+ * In the medium- to long-term, this code should either be
+ * a) implemented via arch-specific pointers in platform_data
+ * or
+ * b) implemented as a proper omap_bus/omap_device in Linux, no more
+ *    platform_data func pointers
+ *
+ *
+ * Guidelines for usage by driver authors:
+ *
+ * 1. These functions are intended to be used by device drivers via
+ * function pointers in struct platform_data.  As an example,
+ * omap_device_enable() should be passed to the driver as
+ *
+ * struct foo_driver_platform_data {
+ * ...
+ *      int (*device_enable)(struct platform_device *pdev);
+ * ...
+ * }
+ *
+ * Note that the generic "device_enable" name is used, rather than
+ * "omap_device_enable".  This is so other architectures can pass in their
+ * own enable/disable functions here.
+ *
+ * This should be populated during device setup:
+ *
+ * ...
+ * pdata->device_enable = omap_device_enable;
+ * ...
+ *
+ * 2. Drivers should first check to ensure the function pointer is not null
+ * before calling it, as in:
+ *
+ * if (pdata->device_enable)
+ *     pdata->device_enable(pdev);
+ *
+ * This allows other architectures that don't use similar device_enable()/
+ * device_shutdown() functions to execute normally.
+ *
+ * ...
+ *
+ * Suggested usage by device drivers:
+ *
+ * During device initialization:
+ * device_enable()
+ *
+ * During device idle:
+ * (save remaining device context if necessary)
+ * device_idle();
+ *
+ * During device resume:
+ * device_enable();
+ * (restore context if necessary)
+ *
+ * During device shutdown:
+ * device_shutdown()
+ * (device must be reinitialized at this point to use it again)
+ *
+ */
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <mach/omap_device.h>
+#include <mach/omap_hwmod.h>
+
+/* These parameters are passed to _omap_device_{de,}activate() */
+#define USE_WAKEUP_LAT                  0
+#define IGNORE_WAKEUP_LAT               1
+
+/* XXX this should be moved into a separate file */
+#if defined(CONFIG_ARCH_OMAP2420)
+# define OMAP_32KSYNCT_BASE             0x48004000
+#elif defined(CONFIG_ARCH_OMAP2430)
+# define OMAP_32KSYNCT_BASE             0x49020000
+#elif defined(CONFIG_ARCH_OMAP3430)
+# define OMAP_32KSYNCT_BASE             0x48320000
+#else
+# error Unknown OMAP device
+#endif
+
+/* Private functions */
+
+/**
+ * _read_32ksynct - read the OMAP 32K sync timer
+ *
+ * Returns the current value of the 32KiHz synchronization counter.
+ * XXX this should be generalized to simply read the system clocksource.
+ * XXX this should be moved to a separate synctimer32k.c file
+ */
+static u32 _read_32ksynct(void)
+{
+        if (!cpu_class_is_omap2())
+                BUG();
+
+        return __raw_readl(OMAP2_IO_ADDRESS(OMAP_32KSYNCT_BASE + 0x010));
+}
+
+/**
+ * _omap_device_activate - increase device readiness
+ * @od: struct omap_device *
+ * @ignore_lat: increase to latency target (0) or full readiness (1)?
+ *
+ * Increase readiness of omap_device @od (thus decreasing device
+ * wakeup latency, but consuming more power).  If @ignore_lat is
+ * IGNORE_WAKEUP_LAT, make the omap_device fully active.  Otherwise,
+ * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
+ * latency is greater than the requested maximum wakeup latency, step
+ * backwards in the omap_device_pm_latency table to ensure the
+ * device's maximum wakeup latency is less than or equal to the
+ * requested maximum wakeup latency.  Returns 0.
+ */
+static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
+{
+        u32 a, b;
+
+        pr_debug("omap_device: %s: activating\n", od->pdev.name);
+
+        while (od->pm_lat_level > 0) {
+                struct omap_device_pm_latency *odpl;
+                int act_lat = 0;
+
+                od->pm_lat_level--;
+
+                odpl = od->pm_lats + od->pm_lat_level;
+
+                if (!ignore_lat &&
+                    (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit))
+                        break;
+
+                a = _read_32ksynct();
+
+                /* XXX check return code */
+                odpl->activate_func(od);
+
+                b = _read_32ksynct();
+
+                act_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
+
+                pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time "
+                         "%d usec\n", od->pdev.name, od->pm_lat_level, act_lat);
+
+                WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: "
+                     "activate step %d took longer than expected (%d > %d)\n",
+                     od->pdev.name, od->pdev.id, od->pm_lat_level,
+                     act_lat, odpl->activate_lat);
+
+                od->dev_wakeup_lat -= odpl->activate_lat;
+        }
+
+        return 0;
+}
+
+/**
+ * _omap_device_deactivate - decrease device readiness
+ * @od: struct omap_device *
+ * @ignore_lat: decrease to latency target (0) or full inactivity (1)?
+ *
+ * Decrease readiness of omap_device @od (thus increasing device
+ * wakeup latency, but conserving power).  If @ignore_lat is
+ * IGNORE_WAKEUP_LAT, make the omap_device fully inactive.  Otherwise,
+ * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
+ * latency is less than the requested maximum wakeup latency, step
+ * forwards in the omap_device_pm_latency table to ensure the device's
+ * maximum wakeup latency is less than or equal to the requested
+ * maximum wakeup latency.  Returns 0.
+ */
+static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
+{
+        u32 a, b;
+
+        pr_debug("omap_device: %s: deactivating\n", od->pdev.name);
+
+        while (od->pm_lat_level < od->pm_lats_cnt) {
+                struct omap_device_pm_latency *odpl;
+                int deact_lat = 0;
+
+                odpl = od->pm_lats + od->pm_lat_level;
+
+                if (!ignore_lat &&
+                    ((od->dev_wakeup_lat + odpl->activate_lat) >
+                     od->_dev_wakeup_lat_limit))
+                        break;
+
+                a = _read_32ksynct();
+
+                /* XXX check return code */
+                odpl->deactivate_func(od);
+
+                b = _read_32ksynct();
+
+                deact_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
+
+                pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time "
+                         "%d usec\n", od->pdev.name, od->pm_lat_level,
+                         deact_lat);
+
+                WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: "
+                     "deactivate step %d took longer than expected (%d > %d)\n",
+                     od->pdev.name, od->pdev.id, od->pm_lat_level,
+                     deact_lat, odpl->deactivate_lat);
+
+                od->dev_wakeup_lat += odpl->activate_lat;
+
+                od->pm_lat_level++;
+        }
+
+        return 0;
+}
+
+static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
+{
+        return container_of(pdev, struct omap_device, pdev);
+}
+
+
+/* Public functions for use by core code */
+
+/**
+ * omap_device_count_resources - count number of struct resource entries needed
+ * @od: struct omap_device *
+ *
+ * Count the number of struct resource entries needed for this
+ * omap_device @od.  Used by omap_device_build_ss() to determine how
+ * much memory to allocate before calling
+ * omap_device_fill_resources().  Returns the count.
+ */
+int omap_device_count_resources(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int c = 0;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                c += omap_hwmod_count_resources(oh);
+
+        pr_debug("omap_device: %s: counted %d total resources across %d "
+                 "hwmods\n", od->pdev.name, c, od->hwmods_cnt);
+
+        return c;
+}
+
+/**
+ * omap_device_fill_resources - fill in array of struct resource
+ * @od: struct omap_device *
+ * @res: pointer to an array of struct resource to be filled in
+ *
+ * Populate one or more empty struct resource pointed to by @res with
+ * the resource data for this omap_device @od.  Used by
+ * omap_device_build_ss() after calling omap_device_count_resources().
+ * Ideally this function would not be needed at all.  If omap_device
+ * replaces platform_device, then we can specify our own
+ * get_resource()/ get_irq()/etc functions that use the underlying
+ * omap_hwmod information.  Or if platform_device is extended to use
+ * subarchitecture-specific function pointers, the various
+ * platform_device functions can simply call omap_device internal
+ * functions to get device resources.  Hacking around the existing
+ * platform_device code wastes memory.  Returns 0.
+ */
+int omap_device_fill_resources(struct omap_device *od, struct resource *res)
+{
+        struct omap_hwmod *oh;
+        int c = 0;
+        int i, r;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) {
+                r = omap_hwmod_fill_resources(oh, res);
+                res += r;
+                c += r;
+        }
+
+        return 0;
+}
+
+/**
+ * omap_device_build - build and register an omap_device with one omap_hwmod
+ * @pdev_name: name of the platform_device driver to use
+ * @pdev_id: this platform_device's connection ID
+ * @oh: ptr to the single omap_hwmod that backs this omap_device
+ * @pdata: platform_data ptr to associate with the platform_device
+ * @pdata_len: amount of memory pointed to by @pdata
+ * @pm_lats: pointer to a omap_device_pm_latency array for this device
+ * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
+ *
+ * Convenience function for building and registering a single
+ * omap_device record, which in turn builds and registers a
+ * platform_device record.  See omap_device_build_ss() for more
+ * information.  Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
+ * passes along the return value of omap_device_build_ss().
+ */
+struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
+                                      struct omap_hwmod *oh, void *pdata,
+                                      int pdata_len,
+                                      struct omap_device_pm_latency *pm_lats,
+                                      int pm_lats_cnt)
+{
+        struct omap_hwmod *ohs[] = { oh };
+
+        if (!oh)
+                return ERR_PTR(-EINVAL);
+
+        return omap_device_build_ss(pdev_name, pdev_id, ohs, 1, pdata,
+                                    pdata_len, pm_lats, pm_lats_cnt);
+}
+
+/**
+ * omap_device_build_ss - build and register an omap_device with multiple hwmods
+ * @pdev_name: name of the platform_device driver to use
+ * @pdev_id: this platform_device's connection ID
+ * @oh: ptr to the single omap_hwmod that backs this omap_device
+ * @pdata: platform_data ptr to associate with the platform_device
+ * @pdata_len: amount of memory pointed to by @pdata
+ * @pm_lats: pointer to a omap_device_pm_latency array for this device
+ * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
+ *
+ * Convenience function for building and registering an omap_device
+ * subsystem record.  Subsystem records consist of multiple
+ * omap_hwmods.  This function in turn builds and registers a
+ * platform_device record.  Returns an ERR_PTR() on error, or passes
+ * along the return value of omap_device_register().
+ */
+struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
+                                         struct omap_hwmod **ohs, int oh_cnt,
+                                         void *pdata, int pdata_len,
+                                         struct omap_device_pm_latency *pm_lats,
+                                         int pm_lats_cnt)
+{
+        int ret = -ENOMEM;
+        struct omap_device *od;
+        char *pdev_name2;
+        struct resource *res = NULL;
+        int res_count;
+        struct omap_hwmod **hwmods;
+
+        if (!ohs || oh_cnt == 0 || !pdev_name)
+                return ERR_PTR(-EINVAL);
+
+        if (!pdata && pdata_len > 0)
+                return ERR_PTR(-EINVAL);
+
+        pr_debug("omap_device: %s: building with %d hwmods\n", pdev_name,
+                 oh_cnt);
+
+        od = kzalloc(sizeof(struct omap_device), GFP_KERNEL);
+        if (!od)
+                return ERR_PTR(-ENOMEM);
+
+        od->hwmods_cnt = oh_cnt;
+
+        hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt,
+                         GFP_KERNEL);
+        if (!hwmods)
+                goto odbs_exit1;
+
+        memcpy(hwmods, ohs, sizeof(struct omap_hwmod *) * oh_cnt);
+        od->hwmods = hwmods;
+
+        pdev_name2 = kzalloc(strlen(pdev_name) + 1, GFP_KERNEL);
+        if (!pdev_name2)
+                goto odbs_exit2;
+        strcpy(pdev_name2, pdev_name);
+
+        od->pdev.name = pdev_name2;
+        od->pdev.id = pdev_id;
+
+        res_count = omap_device_count_resources(od);
+        if (res_count > 0) {
+                res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
+                if (!res)
+                        goto odbs_exit3;
+        }
+        omap_device_fill_resources(od, res);
+
+        od->pdev.num_resources = res_count;
+        od->pdev.resource = res;
+
+        platform_device_add_data(&od->pdev, pdata, pdata_len);
+
+        od->pm_lats = pm_lats;
+        od->pm_lats_cnt = pm_lats_cnt;
+
+        ret = omap_device_register(od);
+        if (ret)
+                goto odbs_exit4;
+
+        return od;
+
+odbs_exit4:
+        kfree(res);
+odbs_exit3:
+        kfree(pdev_name2);
+odbs_exit2:
+        kfree(hwmods);
+odbs_exit1:
+        kfree(od);
+
+        pr_err("omap_device: %s: build failed (%d)\n", pdev_name, ret);
+
+        return ERR_PTR(ret);
+}
+
+/**
+ * omap_device_register - register an omap_device with one omap_hwmod
+ * @od: struct omap_device * to register
+ *
+ * Register the omap_device structure.  This currently just calls
+ * platform_device_register() on the underlying platform_device.
+ * Returns the return value of platform_device_register().
+ */
+int omap_device_register(struct omap_device *od)
+{
+        pr_debug("omap_device: %s: registering\n", od->pdev.name);
+
+        return platform_device_register(&od->pdev);
+}
+
+
+/* Public functions for use by device drivers through struct platform_data */
+
+/**
+ * omap_device_enable - fully activate an omap_device
+ * @od: struct omap_device * to activate
+ *
+ * Do whatever is necessary for the hwmods underlying omap_device @od
+ * to be accessible and ready to operate.  This generally involves
+ * enabling clocks, setting SYSCONFIG registers; and in the future may
+ * involve remuxing pins.  Device drivers should call this function
+ * (through platform_data function pointers) where they would normally
+ * enable clocks, etc.  Returns -EINVAL if called when the omap_device
+ * is already enabled, or passes along the return value of
+ * _omap_device_activate().
+ */
+int omap_device_enable(struct platform_device *pdev)
+{
+        int ret;
+        struct omap_device *od;
+
+        od = _find_by_pdev(pdev);
+
+        if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
+                WARN(1, "omap_device: %s.%d: omap_device_enable() called from "
+                     "invalid state\n", od->pdev.name, od->pdev.id);
+                return -EINVAL;
+        }
+
+        /* Enable everything if we're enabling this device from scratch */
+        if (od->_state == OMAP_DEVICE_STATE_UNKNOWN)
+                od->pm_lat_level = od->pm_lats_cnt;
+
+        ret = _omap_device_activate(od, IGNORE_WAKEUP_LAT);
+
+        od->dev_wakeup_lat = 0;
+        od->_dev_wakeup_lat_limit = INT_MAX;
+        od->_state = OMAP_DEVICE_STATE_ENABLED;
+
+        return ret;
+}
+
+/**
+ * omap_device_idle - idle an omap_device
+ * @od: struct omap_device * to idle
+ *
+ * Idle omap_device @od by calling as many .deactivate_func() entries
+ * in the omap_device's pm_lats table as is possible without exceeding
+ * the device's maximum wakeup latency limit, pm_lat_limit.  Device
+ * drivers should call this function (through platform_data function
+ * pointers) where they would normally disable clocks after operations
+ * complete, etc..  Returns -EINVAL if the omap_device is not
+ * currently enabled, or passes along the return value of
+ * _omap_device_deactivate().
+ */
+int omap_device_idle(struct platform_device *pdev)
+{
+        int ret;
+        struct omap_device *od;
+
+        od = _find_by_pdev(pdev);
+
+        if (od->_state != OMAP_DEVICE_STATE_ENABLED) {
+                WARN(1, "omap_device: %s.%d: omap_device_idle() called from "
+                     "invalid state\n", od->pdev.name, od->pdev.id);
+                return -EINVAL;
+        }
+
+        ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
+
+        od->_state = OMAP_DEVICE_STATE_IDLE;
+
+        return ret;
+}
+
+/**
+ * omap_device_shutdown - shut down an omap_device
+ * @od: struct omap_device * to shut down
+ *
+ * Shut down omap_device @od by calling all .deactivate_func() entries
+ * in the omap_device's pm_lats table and then shutting down all of
+ * the underlying omap_hwmods.  Used when a device is being "removed"
+ * or a device driver is being unloaded.  Returns -EINVAL if the
+ * omap_device is not currently enabled or idle, or passes along the
+ * return value of _omap_device_deactivate().
+ */
+int omap_device_shutdown(struct platform_device *pdev)
+{
+        int ret, i;
+        struct omap_device *od;
+        struct omap_hwmod *oh;
+
+        od = _find_by_pdev(pdev);
+
+        if (od->_state != OMAP_DEVICE_STATE_ENABLED &&
+            od->_state != OMAP_DEVICE_STATE_IDLE) {
+                WARN(1, "omap_device: %s.%d: omap_device_shutdown() called "
+                     "from invalid state\n", od->pdev.name, od->pdev.id);
+                return -EINVAL;
+        }
+
+        ret = _omap_device_deactivate(od, IGNORE_WAKEUP_LAT);
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_shutdown(oh);
+
+        od->_state = OMAP_DEVICE_STATE_SHUTDOWN;
+
+        return ret;
+}
+
+/**
+ * omap_device_align_pm_lat - activate/deactivate device to match wakeup lat lim
+ * @od: struct omap_device *
+ *
+ * When a device's maximum wakeup latency limit changes, call some of
+ * the .activate_func or .deactivate_func function pointers in the
+ * omap_device's pm_lats array to ensure that the device's maximum
+ * wakeup latency is less than or equal to the new latency limit.
+ * Intended to be called by OMAP PM code whenever a device's maximum
+ * wakeup latency limit changes (e.g., via
+ * omap_pm_set_dev_wakeup_lat()).  Returns 0 if nothing needs to be
+ * done (e.g., if the omap_device is not currently idle, or if the
+ * wakeup latency is already current with the new limit) or passes
+ * along the return value of _omap_device_deactivate() or
+ * _omap_device_activate().
+ */
+int omap_device_align_pm_lat(struct platform_device *pdev,
+                             u32 new_wakeup_lat_limit)
+{
+        int ret = -EINVAL;
+        struct omap_device *od;
+
+        od = _find_by_pdev(pdev);
+
+        if (new_wakeup_lat_limit == od->dev_wakeup_lat)
+                return 0;
+
+        od->_dev_wakeup_lat_limit = new_wakeup_lat_limit;
+
+        if (od->_state != OMAP_DEVICE_STATE_IDLE)
+                return 0;
+        else if (new_wakeup_lat_limit > od->dev_wakeup_lat)
+                ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
+        else if (new_wakeup_lat_limit < od->dev_wakeup_lat)
+                ret = _omap_device_activate(od, USE_WAKEUP_LAT);
+
+        return ret;
+}
+
+/**
+ * omap_device_get_pwrdm - return the powerdomain * associated with @od
+ * @od: struct omap_device *
+ *
+ * Return the powerdomain associated with the first underlying
+ * omap_hwmod for this omap_device.  Intended for use by core OMAP PM
+ * code.  Returns NULL on error or a struct powerdomain * upon
+ * success.
+ */
+struct powerdomain *omap_device_get_pwrdm(struct omap_device *od)
+{
+        /*
+         * XXX Assumes that all omap_hwmod powerdomains are identical.
+         * This may not necessarily be true.  There should be a sanity
+         * check in here to WARN() if any difference appears.
+         */
+        if (!od->hwmods_cnt)
+                return NULL;
+
+        return omap_hwmod_get_pwrdm(od->hwmods[0]);
+}
+
+/*
+ * Public functions intended for use in omap_device_pm_latency
+ * .activate_func and .deactivate_func function pointers
+ */
+
+/**
+ * omap_device_enable_hwmods - call omap_hwmod_enable() on all hwmods
+ * @od: struct omap_device *od
+ *
+ * Enable all underlying hwmods.  Returns 0.
+ */
+int omap_device_enable_hwmods(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_enable(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
+
+/**
+ * omap_device_idle_hwmods - call omap_hwmod_idle() on all hwmods
+ * @od: struct omap_device *od
+ *
+ * Idle all underlying hwmods.  Returns 0.
+ */
+int omap_device_idle_hwmods(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_idle(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
+
+/**
+ * omap_device_disable_clocks - disable all main and interface clocks
+ * @od: struct omap_device *od
+ *
+ * Disable the main functional clock and interface clock for all of the
+ * omap_hwmods associated with the omap_device.  Returns 0.
+ */
+int omap_device_disable_clocks(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_disable_clocks(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
+
+/**
+ * omap_device_enable_clocks - enable all main and interface clocks
+ * @od: struct omap_device *od
+ *
+ * Enable the main functional clock and interface clock for all of the
+ * omap_hwmods associated with the omap_device.  Returns 0.
+ */
+int omap_device_enable_clocks(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_enable_clocks(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 5eae7876979c..925f64711c37 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -56,16 +56,16 @@
 #define SRAM_BOOTLOADER_SZ      0x80
 #endif
 
-#define OMAP24XX_VA_REQINFOPERM0        IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0           IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0          IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0        IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0           IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0          IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2         IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0         IO_ADDRESS(0x6C000048)
-#define OMAP34XX_VA_CONTROL_STAT        IO_ADDRESS(0x480022F0)
+#define OMAP24XX_VA_REQINFOPERM0        OMAP2_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0           OMAP2_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0          OMAP2_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0        OMAP2_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0           OMAP2_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0          OMAP2_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_IO_ADDRESS(0x6C000048)
+#define OMAP34XX_VA_CONTROL_STAT        OMAP2_IO_ADDRESS(0x480022F0)
 
 #define GP_DEVICE               0x300
 
diff --git a/arch/arm/plat-pxa/dma.c b/arch/arm/plat-pxa/dma.c
index 70aeee407f7d..2975798d411f 100644
--- a/arch/arm/plat-pxa/dma.c
+++ b/arch/arm/plat-pxa/dma.c
@@ -17,22 +17,266 @@
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
 #include <linux/errno.h>
+#include <linux/dma-mapping.h>
 
 #include <asm/system.h>
 #include <asm/irq.h>
+#include <asm/memory.h>
 #include <mach/hardware.h>
 #include <mach/dma.h>
 
+#define DMA_DEBUG_NAME          "pxa_dma"
+#define DMA_MAX_REQUESTERS      64
+
 struct dma_channel {
         char *name;
         pxa_dma_prio prio;
         void (*irq_handler)(int, void *);
         void *data;
+        spinlock_t lock;
 };
 
 static struct dma_channel *dma_channels;
 static int num_dma_channels;
 
+/*
+ * Debug fs
+ */
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#include <linux/uaccess.h>
+#include <linux/seq_file.h>
+
+static struct dentry *dbgfs_root, *dbgfs_state, **dbgfs_chan;
+
+static int dbg_show_requester_chan(struct seq_file *s, void *p)
+{
+        int pos = 0;
+        int chan = (int)s->private;
+        int i;
+        u32 drcmr;
+
+        pos += seq_printf(s, "DMA channel %d requesters list :\n", chan);
+        for (i = 0; i < DMA_MAX_REQUESTERS; i++) {
+                drcmr = DRCMR(i);
+                if ((drcmr & DRCMR_CHLNUM) == chan)
+                        pos += seq_printf(s, "\tRequester %d (MAPVLD=%d)\n", i,
+                                          !!(drcmr & DRCMR_MAPVLD));
+        }
+        return pos;
+}
+
+static inline int dbg_burst_from_dcmd(u32 dcmd)
+{
+        int burst = (dcmd >> 16) & 0x3;
+
+        return burst ? 4 << burst : 0;
+}
+
+static int is_phys_valid(unsigned long addr)
+{
+        return pfn_valid(__phys_to_pfn(addr));
+}
+
+#define DCSR_STR(flag) (dcsr & DCSR_##flag ? #flag" " : "")
+#define DCMD_STR(flag) (dcmd & DCMD_##flag ? #flag" " : "")
+
+static int dbg_show_descriptors(struct seq_file *s, void *p)
+{
+        int pos = 0;
+        int chan = (int)s->private;
+        int i, max_show = 20, burst, width;
+        u32 dcmd;
+        unsigned long phys_desc;
+        struct pxa_dma_desc *desc;
+        unsigned long flags;
+
+        spin_lock_irqsave(&dma_channels[chan].lock, flags);
+        phys_desc = DDADR(chan);
+
+        pos += seq_printf(s, "DMA channel %d descriptors :\n", chan);
+        pos += seq_printf(s, "[%03d] First descriptor unknown\n", 0);
+        for (i = 1; i < max_show && is_phys_valid(phys_desc); i++) {
+                desc = phys_to_virt(phys_desc);
+                dcmd = desc->dcmd;
+                burst = dbg_burst_from_dcmd(dcmd);
+                width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
+
+                pos += seq_printf(s, "[%03d] Desc at %08lx(virt %p)\n",
+                                  i, phys_desc, desc);
+                pos += seq_printf(s, "\tDDADR = %08x\n", desc->ddadr);
+                pos += seq_printf(s, "\tDSADR = %08x\n", desc->dsadr);
+                pos += seq_printf(s, "\tDTADR = %08x\n", desc->dtadr);
+                pos += seq_printf(s, "\tDCMD  = %08x (%s%s%s%s%s%s%sburst=%d"
+                                  " width=%d len=%d)\n",
+                                  dcmd,
+                                  DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR),
+                                  DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG),
+                                  DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN),
+                                  DCMD_STR(ENDIAN), burst, width,
+                                  dcmd & DCMD_LENGTH);
+                phys_desc = desc->ddadr;
+        }
+        if (i == max_show)
+                pos += seq_printf(s, "[%03d] Desc at %08lx ... max display reached\n",
+                                  i, phys_desc);
+        else
+                pos += seq_printf(s, "[%03d] Desc at %08lx is %s\n",
+                                  i, phys_desc, phys_desc == DDADR_STOP ?
+                                  "DDADR_STOP" : "invalid");
+
+        spin_unlock_irqrestore(&dma_channels[chan].lock, flags);
+        return pos;
+}
+
+static int dbg_show_chan_state(struct seq_file *s, void *p)
+{
+        int pos = 0;
+        int chan = (int)s->private;
+        u32 dcsr, dcmd;
+        int burst, width;
+        static char *str_prio[] = { "high", "normal", "low" };
+
+        dcsr = DCSR(chan);
+        dcmd = DCMD(chan);
+        burst = dbg_burst_from_dcmd(dcmd);
+        width = (1 << ((dcmd >> 14) & 0x3)) >> 1;
+
+        pos += seq_printf(s, "DMA channel %d\n", chan);
+        pos += seq_printf(s, "\tPriority : %s\n",
+                          str_prio[dma_channels[chan].prio]);
+        pos += seq_printf(s, "\tUnaligned transfer bit: %s\n",
+                          DALGN & (1 << chan) ? "yes" : "no");
+        pos += seq_printf(s, "\tDCSR  = %08x (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
+                          dcsr, DCSR_STR(RUN), DCSR_STR(NODESC),
+                          DCSR_STR(STOPIRQEN), DCSR_STR(EORIRQEN),
+                          DCSR_STR(EORJMPEN), DCSR_STR(EORSTOPEN),
+                          DCSR_STR(SETCMPST), DCSR_STR(CLRCMPST),
+                          DCSR_STR(CMPST), DCSR_STR(EORINTR), DCSR_STR(REQPEND),
+                          DCSR_STR(STOPSTATE), DCSR_STR(ENDINTR),
+                          DCSR_STR(STARTINTR), DCSR_STR(BUSERR));
+
+        pos += seq_printf(s, "\tDCMD  = %08x (%s%s%s%s%s%s%sburst=%d width=%d"
+                          " len=%d)\n",
+                          dcmd,
+                          DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR),
+                          DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG),
+                          DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN),
+                          DCMD_STR(ENDIAN), burst, width, dcmd & DCMD_LENGTH);
+        pos += seq_printf(s, "\tDSADR = %08x\n", DSADR(chan));
+        pos += seq_printf(s, "\tDTADR = %08x\n", DTADR(chan));
+        pos += seq_printf(s, "\tDDADR = %08x\n", DDADR(chan));
+        return pos;
+}
+
+static int dbg_show_state(struct seq_file *s, void *p)
+{
+        int pos = 0;
+
+        /* basic device status */
+        pos += seq_printf(s, "DMA engine status\n");
+        pos += seq_printf(s, "\tChannel number: %d\n", num_dma_channels);
+
+        return pos;
+}
+
+#define DBGFS_FUNC_DECL(name) \
+static int dbg_open_##name(struct inode *inode, struct file *file) \
+{ \
+        return single_open(file, dbg_show_##name, inode->i_private); \
+} \
+static const struct file_operations dbg_fops_##name = { \
+        .owner          = THIS_MODULE, \
+        .open           = dbg_open_##name, \
+        .llseek         = seq_lseek, \
+        .read           = seq_read, \
+        .release        = single_release, \
+}
+
+DBGFS_FUNC_DECL(state);
+DBGFS_FUNC_DECL(chan_state);
+DBGFS_FUNC_DECL(descriptors);
+DBGFS_FUNC_DECL(requester_chan);
+
+static struct dentry *pxa_dma_dbg_alloc_chan(int ch, struct dentry *chandir)
+{
+        char chan_name[11];
+        struct dentry *chan, *chan_state = NULL, *chan_descr = NULL;
+        struct dentry *chan_reqs = NULL;
+        void *dt;
+
+        scnprintf(chan_name, sizeof(chan_name), "%d", ch);
+        chan = debugfs_create_dir(chan_name, chandir);
+        dt = (void *)ch;
+
+        if (chan)
+                chan_state = debugfs_create_file("state", 0400, chan, dt,
+                                                 &dbg_fops_chan_state);
+        if (chan_state)
+                chan_descr = debugfs_create_file("descriptors", 0400, chan, dt,
+                                                 &dbg_fops_descriptors);
+        if (chan_descr)
+                chan_reqs = debugfs_create_file("requesters", 0400, chan, dt,
+                                                &dbg_fops_requester_chan);
+        if (!chan_reqs)
+                goto err_state;
+
+        return chan;
+
+err_state:
+        debugfs_remove_recursive(chan);
+        return NULL;
+}
+
+static void pxa_dma_init_debugfs(void)
+{
+        int i;
+        struct dentry *chandir;
+
+        dbgfs_root = debugfs_create_dir(DMA_DEBUG_NAME, NULL);
+        if (IS_ERR(dbgfs_root) || !dbgfs_root)
+                goto err_root;
+
+        dbgfs_state = debugfs_create_file("state", 0400, dbgfs_root, NULL,
+                                          &dbg_fops_state);
+        if (!dbgfs_state)
+                goto err_state;
+
+        dbgfs_chan = kmalloc(sizeof(*dbgfs_state) * num_dma_channels,
+                             GFP_KERNEL);
+        if (!dbgfs_state)
+                goto err_alloc;
+
+        chandir = debugfs_create_dir("channels", dbgfs_root);
+        if (!chandir)
+                goto err_chandir;
+
+        for (i = 0; i < num_dma_channels; i++) {
+                dbgfs_chan[i] = pxa_dma_dbg_alloc_chan(i, chandir);
+                if (!dbgfs_chan[i])
+                        goto err_chans;
+        }
+
+        return;
+err_chans:
+err_chandir:
+        kfree(dbgfs_chan);
+err_alloc:
+err_state:
+        debugfs_remove_recursive(dbgfs_root);
+err_root:
+        pr_err("pxa_dma: debugfs is not available\n");
+}
+
+static void __exit pxa_dma_cleanup_debugfs(void)
+{
+        debugfs_remove_recursive(dbgfs_root);
+}
+#else
+static inline void pxa_dma_init_debugfs(void) {}
+static inline void pxa_dma_cleanup_debugfs(void) {}
+#endif
+
 int pxa_request_dma (char *name, pxa_dma_prio prio,
                         void (*irq_handler)(int, void *),
                         void *data)
@@ -71,6 +315,7 @@ int pxa_request_dma (char *name, pxa_dma_prio prio,
         local_irq_restore(flags);
         return i;
 }
+EXPORT_SYMBOL(pxa_request_dma);
 
 void pxa_free_dma (int dma_ch)
 {
@@ -88,24 +333,26 @@ void pxa_free_dma (int dma_ch)
         dma_channels[dma_ch].name = NULL;
         local_irq_restore(flags);
 }
+EXPORT_SYMBOL(pxa_free_dma);
 
 static irqreturn_t dma_irq_handler(int irq, void *dev_id)
 {
         int i, dint = DINT;
+        struct dma_channel *channel;
 
-        for (i = 0; i < num_dma_channels; i++) {
-                if (dint & (1 << i)) {
-                        struct dma_channel *channel = &dma_channels[i];
-                        if (channel->name && channel->irq_handler) {
-                                channel->irq_handler(i, channel->data);
-                        } else {
-                                /*
-                                 * IRQ for an unregistered DMA channel:
-                                 * let's clear the interrupts and disable it.
-                                 */
-                                printk (KERN_WARNING "spurious IRQ for DMA channel %d\n", i);
-                                DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
-                        }
+        while (dint) {
+                i = __ffs(dint);
+                dint &= (dint - 1);
+                channel = &dma_channels[i];
+                if (channel->name && channel->irq_handler) {
+                        channel->irq_handler(i, channel->data);
+                } else {
+                        /*
+                         * IRQ for an unregistered DMA channel:
+                         * let's clear the interrupts and disable it.
+                         */
+                        printk (KERN_WARNING "spurious IRQ for DMA channel %d\n", i);
+                        DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
                 }
         }
         return IRQ_HANDLED;
@@ -127,6 +374,7 @@ int __init pxa_init_dma(int irq, int num_ch)
         for (i = 0; i < num_ch; i++) {
                 DCSR(i) = 0;
                 dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW);
+                spin_lock_init(&dma_channels[i].lock);
         }
 
         ret = request_irq(irq, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
@@ -135,10 +383,9 @@ int __init pxa_init_dma(int irq, int num_ch)
                 kfree(dma_channels);
                 return ret;
         }
-
         num_dma_channels = num_ch;
+
+        pxa_dma_init_debugfs();
+
         return 0;
 }
-
-EXPORT_SYMBOL(pxa_request_dma);
-EXPORT_SYMBOL(pxa_free_dma);
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 64019464c8db..22086e696e8e 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -150,6 +150,74 @@ enum {
         MFP_PIN_GPIO125,
         MFP_PIN_GPIO126,
         MFP_PIN_GPIO127,
+
+        MFP_PIN_GPIO128,
+        MFP_PIN_GPIO129,
+        MFP_PIN_GPIO130,
+        MFP_PIN_GPIO131,
+        MFP_PIN_GPIO132,
+        MFP_PIN_GPIO133,
+        MFP_PIN_GPIO134,
+        MFP_PIN_GPIO135,
+        MFP_PIN_GPIO136,
+        MFP_PIN_GPIO137,
+        MFP_PIN_GPIO138,
+        MFP_PIN_GPIO139,
+        MFP_PIN_GPIO140,
+        MFP_PIN_GPIO141,
+        MFP_PIN_GPIO142,
+        MFP_PIN_GPIO143,
+        MFP_PIN_GPIO144,
+        MFP_PIN_GPIO145,
+        MFP_PIN_GPIO146,
+        MFP_PIN_GPIO147,
+        MFP_PIN_GPIO148,
+        MFP_PIN_GPIO149,
+        MFP_PIN_GPIO150,
+        MFP_PIN_GPIO151,
+        MFP_PIN_GPIO152,
+        MFP_PIN_GPIO153,
+        MFP_PIN_GPIO154,
+        MFP_PIN_GPIO155,
+        MFP_PIN_GPIO156,
+        MFP_PIN_GPIO157,
+        MFP_PIN_GPIO158,
+        MFP_PIN_GPIO159,
+        MFP_PIN_GPIO160,
+        MFP_PIN_GPIO161,
+        MFP_PIN_GPIO162,
+        MFP_PIN_GPIO163,
+        MFP_PIN_GPIO164,
+        MFP_PIN_GPIO165,
+        MFP_PIN_GPIO166,
+        MFP_PIN_GPIO167,
+        MFP_PIN_GPIO168,
+        MFP_PIN_GPIO169,
+        MFP_PIN_GPIO170,
+        MFP_PIN_GPIO171,
+        MFP_PIN_GPIO172,
+        MFP_PIN_GPIO173,
+        MFP_PIN_GPIO174,
+        MFP_PIN_GPIO175,
+        MFP_PIN_GPIO176,
+        MFP_PIN_GPIO177,
+        MFP_PIN_GPIO178,
+        MFP_PIN_GPIO179,
+        MFP_PIN_GPIO180,
+        MFP_PIN_GPIO181,
+        MFP_PIN_GPIO182,
+        MFP_PIN_GPIO183,
+        MFP_PIN_GPIO184,
+        MFP_PIN_GPIO185,
+        MFP_PIN_GPIO186,
+        MFP_PIN_GPIO187,
+        MFP_PIN_GPIO188,
+        MFP_PIN_GPIO189,
+        MFP_PIN_GPIO190,
+        MFP_PIN_GPIO191,
+
+        MFP_PIN_GPIO255 = 255,
+
         MFP_PIN_GPIO0_2,
         MFP_PIN_GPIO1_2,
         MFP_PIN_GPIO2_2,
@@ -325,8 +393,9 @@ typedef unsigned long mfp_cfg_t;
 #define MFP_PULL_LOW            (0x1 << 21)
 #define MFP_PULL_HIGH           (0x2 << 21)
 #define MFP_PULL_BOTH           (0x3 << 21)
-#define MFP_PULL_MASK           (0x3 << 21)
-#define MFP_PULL(x)             (((x) >> 21) & 0x3)
+#define MFP_PULL_FLOAT          (0x4 << 21)
+#define MFP_PULL_MASK           (0x7 << 21)
+#define MFP_PULL(x)             (((x) >> 21) & 0x7)
 
 #define MFP_CFG_DEFAULT         (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
                                  MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index e716c622a17c..9405d0379c85 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -77,11 +77,13 @@
  * MFPR_PULL_LOW        1         0        1
  * MFPR_PULL_HIGH       1         1        0
  * MFPR_PULL_BOTH       1         1        1
+ * MFPR_PULL_FLOAT      1         0        0
  */
 #define MFPR_PULL_NONE          (0)
 #define MFPR_PULL_LOW           (MFPR_PULL_SEL | MFPR_PULLDOWN_EN)
 #define MFPR_PULL_BOTH          (MFPR_PULL_LOW | MFPR_PULLUP_EN)
 #define MFPR_PULL_HIGH          (MFPR_PULL_SEL | MFPR_PULLUP_EN)
+#define MFPR_PULL_FLOAT         (MFPR_PULL_SEL)
 
 /* mfp_spin_lock is used to ensure that MFP register configuration
  * (most likely a read-modify-write operation) is atomic, and that
@@ -116,6 +118,7 @@ static const unsigned long mfpr_pull[] = {
         MFPR_PULL_LOW,
         MFPR_PULL_HIGH,
         MFPR_PULL_BOTH,
+        MFPR_PULL_FLOAT,
 };
 
 /* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-s3c/gpio.c
index 260fdc6ad685..5ff24e0f9f89 100644
--- a/arch/arm/plat-s3c/gpio.c
+++ b/arch/arm/plat-s3c/gpio.c
@@ -28,7 +28,7 @@ static __init void s3c_gpiolib_track(struct s3c_gpio_chip *chip)
 
         gpn = chip->chip.base;
         for (i = 0; i < chip->chip.ngpio; i++, gpn++) {
-                BUG_ON(gpn > ARRAY_SIZE(s3c_gpios));
+                BUG_ON(gpn >= ARRAY_SIZE(s3c_gpios));
                 s3c_gpios[gpn] = chip;
         }
 }
diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/plat-s3c64xx/dma.c
index 67aa93dbb69e..266a10745a85 100644
--- a/arch/arm/plat-s3c64xx/dma.c
+++ b/arch/arm/plat-s3c64xx/dma.c
@@ -345,13 +345,13 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id,
         if (!chan)
                 return -EINVAL;
 
-        buff = kzalloc(sizeof(struct s3c64xx_dma_buff), GFP_KERNEL);
+        buff = kzalloc(sizeof(struct s3c64xx_dma_buff), GFP_ATOMIC);
         if (!buff) {
                 printk(KERN_ERR "%s: no memory for buffer\n", __func__);
                 return -ENOMEM;
         }
 
-        lli = dma_pool_alloc(dma_pool, GFP_KERNEL, &buff->lli_dma);
+        lli = dma_pool_alloc(dma_pool, GFP_ATOMIC, &buff->lli_dma);
         if (!lli) {
                 printk(KERN_ERR "%s: no memory for lli\n", __func__);
                 ret = -ENOMEM;
@@ -697,7 +697,7 @@ static int __init s3c64xx_dma_init(void)
 
         printk(KERN_INFO "%s: Registering DMA channels\n", __func__);
 
-        dma_pool = dma_pool_create("DMA-LLI", NULL, 32, 16, 0);
+        dma_pool = dma_pool_create("DMA-LLI", NULL, sizeof(struct pl080s_lli), 16, 0);
         if (!dma_pool) {
                 printk(KERN_ERR "%s: failed to create pool\n", __func__);
                 return -ENOMEM;
diff --git a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h b/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
index 0c30dd986725..8f76a1e474d6 100644
--- a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
+++ b/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
@@ -26,7 +26,7 @@ struct s3c64xx_dma_buff {
         struct s3c64xx_dma_buff *next;
 
         void                    *pw;
-        struct pl080_lli        *lli;
+        struct pl080s_lli       *lli;
         dma_addr_t               lli_dma;
 };
 
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index 743a70094d04..7956fd3bb194 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -194,9 +194,17 @@
 
 #define IRQ_EINT_GROUP(group, no)       (IRQ_EINT_GROUP##group##_BASE + (no))
 
+/* Define a group of interrupts for board-specific use (eg, for MFD
+ * interrupt controllers). */
+#define IRQ_BOARD_START (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
+
+#define IRQ_BOARD_NR 16
+
+#define IRQ_BOARD_END (IRQ_BOARD_START + IRQ_BOARD_NR)
+
 /* Set the default NR_IRQS */
 
-#define NR_IRQS (IRQ_EINT_GROUP9_BASE + IRQ_EINT_GROUP9_NR + 1)
+#define NR_IRQS (IRQ_BOARD_END + 1)
 
 #endif /* __ASM_PLAT_S3C64XX_IRQS_H */
 
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index febac1950d8e..9745852261e0 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -302,8 +302,8 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
                 return -EINVAL;
 
         val = __raw_readl(reg);
-        val &= ~(0xf << sclk->shift);
-        val |= (div - 1) << sclk->shift;
+        val &= ~(0xf << sclk->divider_shift);
+        val |= (div - 1) << sclk->divider_shift;
         __raw_writel(val, reg);
 
         return 0;
@@ -328,6 +328,8 @@ static int s3c64xx_setparent_clksrc(struct clk *clk, struct clk *parent)
                 clksrc |= src_nr << sclk->shift;
 
                 __raw_writel(clksrc, S3C_CLK_SRC);
+
+                clk->parent = parent;
                 return 0;
         }
 
@@ -343,7 +345,7 @@ static unsigned long s3c64xx_roundrate_clksrc(struct clk *clk,
         if (rate > parent_rate)
                 rate = parent_rate;
         else {
-                div = rate / parent_rate;
+                div = parent_rate / rate;
 
                 if (div == 0)
                         div = 1;
diff --git a/arch/arm/plat-stmp3xxx/dma.c b/arch/arm/plat-stmp3xxx/dma.c
index d2f497764dce..ef88f25fb870 100644
--- a/arch/arm/plat-stmp3xxx/dma.c
+++ b/arch/arm/plat-stmp3xxx/dma.c
@@ -264,7 +264,7 @@ int stmp3xxx_dma_make_chain(int ch, struct stmp37xx_circ_dma_chain *chain,
                                         stmp3xxx_dma_free_command(ch,
                                                                   &descriptors
                                                                   [i]);
-                                } while (i-- >= 0);
+                                } while (i-- > 0);
                         }
                         return err;
                 }
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index c8c55b469342..94be7bb6cb9a 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Sat Sep 12 12:00:16 2009
+# Last update: Fri Sep 18 21:42:00 2009
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -1638,7 +1638,7 @@ mx35evb			MACH_MX35EVB		MX35EVB			1643
 aml_m8050               MACH_AML_M8050          AML_M8050               1644
 mx35_3ds                MACH_MX35_3DS           MX35_3DS                1645
 mars                    MACH_MARS               MARS                    1646
-ntosd_644xa             MACH_NTOSD_644XA        NTOSD_644XA             1647
+neuros_osd2             MACH_NEUROS_OSD2        NEUROS_OSD2             1647
 badger                  MACH_BADGER             BADGER                  1648
 trizeps4wl              MACH_TRIZEPS4WL         TRIZEPS4WL              1649
 trizeps5                MACH_TRIZEPS5           TRIZEPS5                1650
@@ -1654,7 +1654,7 @@ vf10xx			MACH_VF10XX		VF10XX			1659
 zoran43xx               MACH_ZORAN43XX          ZORAN43XX               1660
 sonix926                MACH_SONIX926           SONIX926                1661
 celestialsemi           MACH_CELESTIALSEMI      CELESTIALSEMI           1662
-cc9m2443                MACH_CC9M2443           CC9M2443                1663
+cc9m2443js              MACH_CC9M2443JS         CC9M2443JS              1663
 tw5334                  MACH_TW5334             TW5334                  1664
 omap_htcartemis         MACH_HTCARTEMIS         HTCARTEMIS              1665
 nal_hlite               MACH_NAL_HLITE          NAL_HLITE               1666
@@ -1802,7 +1802,7 @@ ccw9p9215js		MACH_CCW9P9215JS	CCW9P9215JS		1811
 rd88f5181l_ge           MACH_RD88F5181L_GE      RD88F5181L_GE           1812
 sifmain                 MACH_SIFMAIN            SIFMAIN                 1813
 sam9_l9261              MACH_SAM9_L9261         SAM9_L9261              1814
-cc9m2443js              MACH_CC9M2443JS         CC9M2443JS              1815
+cc9m2443                MACH_CC9M2443           CC9M2443                1815
 xaria300                MACH_XARIA300           XARIA300                1816
 it9200                  MACH_IT9200             IT9200                  1817
 rd88f5181l_fxo          MACH_RD88F5181L_FXO     RD88F5181L_FXO          1818
@@ -2409,3 +2409,15 @@ platypus		MACH_PLATYPUS		PLATYPUS		2422
 pss2                    MACH_PSS2               PSS2                    2423
 davinci_apm150          MACH_DAVINCI_APM150     DAVINCI_APM150          2424
 str9100                 MACH_STR9100            STR9100                 2425
+net5big                 MACH_NET5BIG            NET5BIG                 2426
+seabed9263              MACH_SEABED9263         SEABED9263              2427
+mx51_m2id               MACH_MX51_M2ID          MX51_M2ID               2428
+octvocplus_eb           MACH_OCTVOCPLUS_EB      OCTVOCPLUS_EB           2429
+klk_firefox             MACH_KLK_FIREFOX        KLK_FIREFOX             2430
+klk_wirma_module        MACH_KLK_WIRMA_MODULE   KLK_WIRMA_MODULE        2431
+klk_wirma_mmi           MACH_KLK_WIRMA_MMI      KLK_WIRMA_MMI           2432
+supersonic              MACH_SUPERSONIC         SUPERSONIC              2433
+liberty                 MACH_LIBERTY            LIBERTY                 2434
+mh355                   MACH_MH355              MH355                   2435
+pc7802                  MACH_PC7802             PC7802                  2436
+gnet_sgc                MACH_GNET_SGC           GNET_SGC                2437
diff --git a/arch/avr32/include/asm/mman.h b/arch/avr32/include/asm/mman.h
index 9a92b15f6a66..8eebf89f5ab1 100644
--- a/arch/avr32/include/asm/mman.h
+++ b/arch/avr32/include/asm/mman.h
@@ -1,17 +1 @@
-#ifndef __ASM_AVR32_MMAN_H__
-#define __ASM_AVR32_MMAN_H__
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) page tables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* __ASM_AVR32_MMAN_H__ */
+#include <asm-generic/mman.h>
diff --git a/arch/avr32/kernel/init_task.c b/arch/avr32/kernel/init_task.c
index 57ec9f2dcd95..6b2343e6fe33 100644
--- a/arch/avr32/kernel/init_task.c
+++ b/arch/avr32/kernel/init_task.c
@@ -18,9 +18,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 /*
  * Initial thread structure. Must be aligned on an 8192-byte boundary.
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
index e819fa69a90e..94925641e53e 100644
--- a/arch/avr32/mm/init.c
+++ b/arch/avr32/mm/init.c
@@ -24,11 +24,9 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 
-#define __page_aligned  __attribute__((section(".data.page_aligned")))
-
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
-pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned;
+pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_data;
 
 struct page *empty_zero_page;
 EXPORT_SYMBOL(empty_zero_page);
@@ -141,7 +139,7 @@ void __init mem_init(void)
 
         printk ("Memory: %luk/%luk available (%dk kernel code, "
                 "%dk reserved, %dk data, %dk init)\n",
-                (unsigned long)nr_free_pages() << (PAGE_SHIFT - 10),
+                nr_free_pages() << (PAGE_SHIFT - 10),
                 totalram_pages << (PAGE_SHIFT - 10),
                 codesize >> 10,
                 reservedpages << (PAGE_SHIFT - 10),
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 7faa2f554ab1..9a01d445eca8 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -342,8 +342,9 @@ config MEM_MT48LC64M4A2FB_7E
 config MEM_MT48LC16M16A2TG_75
         bool
         depends on (BFIN533_EZKIT || BFIN561_EZKIT \
-                || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \
-                || H8606_HVSISTEMAS || BFIN527_BLUETECHNIX_CM)
+                || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM_E \
+                || BFIN537_BLUETECHNIX_CM_U || H8606_HVSISTEMAS \
+                || BFIN527_BLUETECHNIX_CM)
         default y
 
 config MEM_MT48LC32M8A2_75
@@ -459,7 +460,7 @@ config VCO_MULT
         default "45" if BFIN533_STAMP
         default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT || BFIN548_BLUETECHNIX_CM || BFIN538_EZKIT)
         default "22" if BFIN533_BLUETECHNIX_CM
-        default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
+        default "20" if (BFIN537_BLUETECHNIX_CM_E || BFIN537_BLUETECHNIX_CM_U || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
         default "20" if BFIN561_EZKIT
         default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN518F_EZBRD)
         help
@@ -574,8 +575,8 @@ config MAX_VCO_HZ
         default 400000000 if BF514
         default 400000000 if BF516
         default 400000000 if BF518
-        default 600000000 if BF522
-        default 400000000 if BF523
+        default 400000000 if BF522
+        default 600000000 if BF523
         default 400000000 if BF524
         default 600000000 if BF525
         default 400000000 if BF526
@@ -647,7 +648,7 @@ config CYCLES_CLOCKSOURCE
           writing the registers will most likely crash the kernel.
 
 config GPTMR0_CLOCKSOURCE
-        bool "Use GPTimer0 as a clocksource (higher rating)"
+        bool "Use GPTimer0 as a clocksource"
         select BFIN_GPTIMERS
         depends on GENERIC_CLOCKEVENTS
         depends on !TICKSOURCE_GPTMR0
@@ -917,10 +918,6 @@ comment "Cache Support"
 config BFIN_ICACHE
         bool "Enable ICACHE"
         default y
-config BFIN_ICACHE_LOCK
-        bool "Enable Instruction Cache Locking"
-        depends on BFIN_ICACHE
-        default n
 config BFIN_EXTMEM_ICACHEABLE
         bool "Enable ICACHE for external memory"
         depends on BFIN_ICACHE
@@ -987,7 +984,7 @@ endchoice
 config BFIN_L2_DCACHEABLE
         bool "Enable DCACHE for L2 SRAM"
         depends on BFIN_DCACHE
-        depends on BF54x || BF561
+        depends on (BF54x || BF561) && !SMP
         default n
 choice
         prompt "L2 SRAM DCACHE policy"
@@ -995,11 +992,9 @@ choice
         default BFIN_L2_WRITEBACK
 config BFIN_L2_WRITEBACK
         bool "Write back"
-        depends on !SMP
 
 config BFIN_L2_WRITETHROUGH
         bool "Write through"
-        depends on !SMP
 endchoice
 
 
@@ -1154,11 +1149,12 @@ source "fs/Kconfig.binfmt"
 endmenu
 
 menu "Power management options"
+        depends on !SMP
+
 source "kernel/power/Kconfig"
 
 config ARCH_SUSPEND_POSSIBLE
         def_bool y
-        depends on !SMP
 
 choice
         prompt "Standby Power Saving Mode"
@@ -1246,6 +1242,7 @@ config PM_BFIN_WAKE_GP
 endmenu
 
 menu "CPU Frequency scaling"
+        depends on !SMP
 
 source "drivers/cpufreq/Kconfig"
 
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index 1fc4981d486f..87f195ee2e06 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -252,4 +252,10 @@ config ACCESS_CHECK
 
           Say N here to disable that check to improve the performance.
 
+config BFIN_ISRAM_SELF_TEST
+        bool "isram boot self tests"
+        default n
+        help
+          Run some self tests of the isram driver code at boot.
+
 endmenu
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index 6f9533c3d752..f063b772934b 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -155,7 +155,7 @@ define archhelp
   echo  '* vmImage.gz      - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.gz)'
   echo  '  vmImage.lzma    - Kernel-only image for U-Boot (arch/$(ARCH)/boot/vmImage.lzma)'
   echo  '  install         - Install kernel using'
-  echo  '                     (your) ~/bin/$(CROSS_COMPILE)installkernel or'
-  echo  '                     (distribution) PATH: $(CROSS_COMPILE)installkernel or'
+  echo  '                     (your) ~/bin/$(INSTALLKERNEL) or'
+  echo  '                     (distribution) PATH: $(INSTALLKERNEL) or'
   echo  '                     install to $$(INSTALL_PATH)'
 endef
diff --git a/arch/blackfin/boot/install.sh b/arch/blackfin/boot/install.sh
index 9560a6b29100..e2c6e40902b7 100644
--- a/arch/blackfin/boot/install.sh
+++ b/arch/blackfin/boot/install.sh
@@ -36,9 +36,9 @@ verify "$3"
 
 # User may have a custom install script
 
-if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
-if which ${CROSS_COMPILE}installkernel >/dev/null 2>&1; then
-        exec ${CROSS_COMPILE}installkernel "$@"
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if which ${INSTALLKERNEL} >/dev/null 2>&1; then
+        exec ${INSTALLKERNEL} "$@"
 fi
 
 # Default install - same as make zlilo
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index dcfb4889559a..9905b26009e5 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -358,9 +358,9 @@ CONFIG_C_AMBEN_ALL=y
 # EBIU_AMBCTL Control
 #
 CONFIG_BANK_0=0x7BB0
-CONFIG_BANK_1=0x5554
+CONFIG_BANK_1=0x7BB0
 CONFIG_BANK_2=0x7BB0
-CONFIG_BANK_3=0xFFC0
+CONFIG_BANK_3=0x99B2
 
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 48a3a7a9099c..9dc682088023 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -359,9 +359,9 @@ CONFIG_C_AMBEN_ALL=y
 # EBIU_AMBCTL Control
 #
 CONFIG_BANK_0=0x7BB0
-CONFIG_BANK_1=0x5554
+CONFIG_BANK_1=0x7BB0
 CONFIG_BANK_2=0x7BB0
-CONFIG_BANK_3=0xFFC0
+CONFIG_BANK_3=0x99B2
 
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index dd8352791daf..77e35d4baf53 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -363,9 +363,9 @@ CONFIG_C_AMBEN_ALL=y
 # EBIU_AMBCTL Control
 #
 CONFIG_BANK_0=0x7BB0
-CONFIG_BANK_1=0x5554
+CONFIG_BANK_1=0x7BB0
 CONFIG_BANK_2=0x7BB0
-CONFIG_BANK_3=0xFFC0
+CONFIG_BANK_3=0x99B2
 
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index b3d3cab81cfe..f773ad1155d4 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -400,7 +400,7 @@ CONFIG_C_AMBEN_ALL=y
 # EBIU_AMBCTL Control
 #
 CONFIG_BANK_0=0x7BB0
-CONFIG_BANK_1=0x5554
+CONFIG_BANK_1=0x7BB0
 CONFIG_BANK_2=0x7BB0
 CONFIG_BANK_3=0x99B2
 CONFIG_EBIU_MBSCTLVAL=0x0
diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h
index e39277ea43e8..aef0594e7865 100644
--- a/arch/blackfin/include/asm/bfin-global.h
+++ b/arch/blackfin/include/asm/bfin-global.h
@@ -66,7 +66,6 @@ extern void program_IAR(void);
 
 extern asmlinkage void lower_to_irq14(void);
 extern asmlinkage void bfin_return_from_exception(void);
-extern asmlinkage void evt14_softirq(void);
 extern asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
 extern int bfin_internal_set_wake(unsigned int irq, unsigned int state);
 
@@ -100,11 +99,6 @@ extern unsigned long bfin_sic_iwr[];
 extern unsigned vr_wakeup;
 extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */
 
-#ifdef CONFIG_BFIN_ICACHE_LOCK
-extern void cache_grab_lock(int way);
-extern void bfin_cache_lock(int way);
-#endif
-
 #endif
 
 #endif                          /* _BLACKFIN_H_ */
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index aaeb4df10d57..c281c6328276 100644
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -127,6 +127,7 @@ struct bfin5xx_spi_chip {
         u32 cs_gpio;
         /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
         u16 idle_tx_val;
+        u8 pio_interrupt; /* Enable spi data irq */
 };
 
 #endif /* _SPI_CHANNEL_H_ */
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index c5dacf8f8cf9..d18d16837a6d 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -125,4 +125,48 @@
 #define FAULT_USERSUPV  (1 << 17)
 #define FAULT_CPLBBITS  0x0000ffff
 
-#endif                          /* _CPLB_H */
+#ifndef __ASSEMBLY__
+
+static inline void _disable_cplb(u32 mmr, u32 mask)
+{
+        u32 ctrl = bfin_read32(mmr) & ~mask;
+        /* CSYNC to ensure load store ordering */
+        __builtin_bfin_csync();
+        bfin_write32(mmr, ctrl);
+        __builtin_bfin_ssync();
+}
+static inline void disable_cplb(u32 mmr, u32 mask)
+{
+        u32 ctrl = bfin_read32(mmr) & ~mask;
+        CSYNC();
+        bfin_write32(mmr, ctrl);
+        SSYNC();
+}
+#define _disable_dcplb() _disable_cplb(DMEM_CONTROL, ENDCPLB)
+#define  disable_dcplb()  disable_cplb(DMEM_CONTROL, ENDCPLB)
+#define _disable_icplb() _disable_cplb(IMEM_CONTROL, ENICPLB)
+#define  disable_icplb()  disable_cplb(IMEM_CONTROL, ENICPLB)
+
+static inline void _enable_cplb(u32 mmr, u32 mask)
+{
+        u32 ctrl = bfin_read32(mmr) | mask;
+        /* CSYNC to ensure load store ordering */
+        __builtin_bfin_csync();
+        bfin_write32(mmr, ctrl);
+        __builtin_bfin_ssync();
+}
+static inline void enable_cplb(u32 mmr, u32 mask)
+{
+        u32 ctrl = bfin_read32(mmr) | mask;
+        CSYNC();
+        bfin_write32(mmr, ctrl);
+        SSYNC();
+}
+#define _enable_dcplb()  _enable_cplb(DMEM_CONTROL, ENDCPLB)
+#define  enable_dcplb()   enable_cplb(DMEM_CONTROL, ENDCPLB)
+#define _enable_icplb()  _enable_cplb(IMEM_CONTROL, ENICPLB)
+#define  enable_icplb()   enable_cplb(IMEM_CONTROL, ENICPLB)
+
+#endif          /* __ASSEMBLY__ */
+
+#endif          /* _CPLB_H */
diff --git a/arch/blackfin/include/asm/early_printk.h b/arch/blackfin/include/asm/early_printk.h
index 110f1c1f845c..53a762b6fcd2 100644
--- a/arch/blackfin/include/asm/early_printk.h
+++ b/arch/blackfin/include/asm/early_printk.h
@@ -21,8 +21,32 @@
  * GNU General Public License for more details.
  */
 
+
+#ifndef __ASM_EARLY_PRINTK_H__
+#define __ASM_EARLY_PRINTK_H__
+
 #ifdef CONFIG_EARLY_PRINTK
+/* For those that don't include it already */
+#include <linux/console.h>
+
 extern int setup_early_printk(char *);
+extern void enable_shadow_console(void);
+extern int shadow_console_enabled(void);
+extern void mark_shadow_error(void);
+extern void early_shadow_reg(unsigned long reg, unsigned int n);
+extern void early_shadow_write(struct console *con, const char *s,
+        unsigned int n) __attribute__((nonnull(2)));
+#define early_shadow_puts(str) early_shadow_write(NULL, str, strlen(str))
+#define early_shadow_stamp() \
+        do { \
+                early_shadow_puts(__FILE__ " : " __stringify(__LINE__) " ["); \
+                early_shadow_puts(__func__); \
+                early_shadow_puts("]\n"); \
+        } while (0)
 #else
 #define setup_early_printk(fmt) do { } while (0)
+#define enable_shadow_console(fmt)  do { } while (0)
+#define early_shadow_stamp() do { } while (0)
 #endif /* CONFIG_EARLY_PRINTK */
+
+#endif /* __ASM_EARLY_PRINTK_H__ */
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index 5a87baf0659d..c823e8ebbfa1 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -23,7 +23,7 @@ typedef unsigned long elf_greg_t;
 #define ELF_NGREG 40 /* (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) */
 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
 
-typedef struct user_bfinfp_struct elf_fpregset_t;
+typedef struct { } elf_fpregset_t;
 /*
  * This is used to ensure we don't load something for the wrong architecture.
  */
diff --git a/arch/blackfin/include/asm/entry.h b/arch/blackfin/include/asm/entry.h
index ec58efc130e6..55b808fced71 100644
--- a/arch/blackfin/include/asm/entry.h
+++ b/arch/blackfin/include/asm/entry.h
@@ -36,6 +36,21 @@
 # define LOAD_IPIPE_IPEND
 #endif
 
+/*
+ * Workaround for anomalies 05000283 and 05000315
+ */
+#if ANOMALY_05000283 || ANOMALY_05000315
+# define ANOMALY_283_315_WORKAROUND(preg, dreg)         \
+        cc = dreg == dreg;                              \
+        preg.h = HI(CHIPID);                            \
+        preg.l = LO(CHIPID);                            \
+        if cc jump 1f;                                  \
+        dreg.l = W[preg];                               \
+1:
+#else
+# define ANOMALY_283_315_WORKAROUND(preg, dreg)
+#endif /* ANOMALY_05000283 || ANOMALY_05000315 */
+
 #ifndef CONFIG_EXACT_HWERR
 /* As a debugging aid - we save IPEND when DEBUG_KERNEL is on,
  * otherwise it is a waste of cycles.
@@ -88,17 +103,22 @@
  * As you can see by the code - we actually need to do two SSYNCS - one to
  * make sure the read/writes complete, and another to make sure the hardware
  * error is recognized by the core.
+ *
+ * The extra nop before the SSYNC is to make sure we work around 05000244,
+ * since the 283/315 workaround includes a branch to the end
  */
 #define INTERRUPT_ENTRY(N)                                              \
-    SSYNC;                                                              \
-    SSYNC;                                                              \
     [--sp] = SYSCFG;                                                    \
     [--sp] = P0;        /*orig_p0*/                                     \
     [--sp] = R0;        /*orig_r0*/                                     \
     [--sp] = (R7:0,P5:0);                                               \
     R1 = ASTAT;                                                         \
+    ANOMALY_283_315_WORKAROUND(p0, r0)                                  \
     P0.L = LO(ILAT);                                                    \
     P0.H = HI(ILAT);                                                    \
+    NOP;                                                                \
+    SSYNC;                                                              \
+    SSYNC;                                                              \
     R0 = [P0];                                                          \
     CC = BITTST(R0, EVT_IVHW_P);                                        \
     IF CC JUMP 1f;                                                      \
@@ -118,15 +138,17 @@
     RTI;
 
 #define TIMER_INTERRUPT_ENTRY(N)                                        \
-    SSYNC;                                                              \
-    SSYNC;                                                              \
     [--sp] = SYSCFG;                                                    \
     [--sp] = P0;        /*orig_p0*/                                     \
     [--sp] = R0;        /*orig_r0*/                                     \
     [--sp] = (R7:0,P5:0);                                               \
     R1 = ASTAT;                                                         \
+    ANOMALY_283_315_WORKAROUND(p0, r0)                                  \
     P0.L = LO(ILAT);                                                    \
     P0.H = HI(ILAT);                                                    \
+    NOP;                                                                \
+    SSYNC;                                                              \
+    SSYNC;                                                              \
     R0 = [P0];                                                          \
     CC = BITTST(R0, EVT_IVHW_P);                                        \
     IF CC JUMP 1f;                                                      \
diff --git a/arch/blackfin/include/asm/ftrace.h b/arch/blackfin/include/asm/ftrace.h
index 8643680f0f78..90c9b400ba6d 100644
--- a/arch/blackfin/include/asm/ftrace.h
+++ b/arch/blackfin/include/asm/ftrace.h
@@ -8,6 +8,6 @@
 #ifndef __ASM_BFIN_FTRACE_H__
 #define __ASM_BFIN_FTRACE_H__
 
-#define MCOUNT_INSN_SIZE        8 /* sizeof mcount call: LINK + CALL */
+#define MCOUNT_INSN_SIZE        6 /* sizeof "[++sp] = rets; call __mcount;" */
 
 #endif
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 87ba9ad399cb..4617ba66278f 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -145,10 +145,6 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
 
 int __ipipe_get_irq_priority(unsigned irq);
 
-void __ipipe_stall_root_raw(void);
-
-void __ipipe_unstall_root_raw(void);
-
 void __ipipe_serial_debug(const char *fmt, ...);
 
 asmlinkage void __ipipe_call_irqtail(unsigned long addr);
@@ -234,9 +230,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
 #define task_hijacked(p)                0
 #define ipipe_trap_notify(t, r)         0
 
-#define __ipipe_stall_root_raw()        do { } while (0)
-#define __ipipe_unstall_root_raw()      do { } while (0)
-
 #define ipipe_init_irq_threads()                do { } while (0)
 #define ipipe_start_irq_thread(irq, desc)       0
 
diff --git a/arch/blackfin/include/asm/irq_handler.h b/arch/blackfin/include/asm/irq_handler.h
index 139b5208f9d8..7d9e2d3bbede 100644
--- a/arch/blackfin/include/asm/irq_handler.h
+++ b/arch/blackfin/include/asm/irq_handler.h
@@ -17,6 +17,7 @@ asmlinkage void evt_evt10(void);
 asmlinkage void evt_evt11(void);
 asmlinkage void evt_evt12(void);
 asmlinkage void evt_evt13(void);
+asmlinkage void evt_evt14(void);
 asmlinkage void evt_soft_int1(void);
 asmlinkage void evt_system_call(void);
 asmlinkage void init_exception_buff(void);
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h
index 944e29faae48..040410bb07e1 100644
--- a/arch/blackfin/include/asm/mmu_context.h
+++ b/arch/blackfin/include/asm/mmu_context.h
@@ -127,17 +127,17 @@ static inline void protect_page(struct mm_struct *mm, unsigned long addr,
         unsigned long idx = page >> 5;
         unsigned long bit = 1 << (page & 31);
 
-        if (flags & VM_MAYREAD)
+        if (flags & VM_READ)
                 mask[idx] |= bit;
         else
                 mask[idx] &= ~bit;
         mask += page_mask_nelts;
-        if (flags & VM_MAYWRITE)
+        if (flags & VM_WRITE)
                 mask[idx] |= bit;
         else
                 mask[idx] &= ~bit;
         mask += page_mask_nelts;
-        if (flags & VM_MAYEXEC)
+        if (flags & VM_EXEC)
                 mask[idx] |= bit;
         else
                 mask[idx] &= ~bit;
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h
index b42555c1431c..a6f95695731d 100644
--- a/arch/blackfin/include/asm/pda.h
+++ b/arch/blackfin/include/asm/pda.h
@@ -50,6 +50,7 @@ struct blackfin_pda {			/* Per-processor Data Area */
         unsigned long ex_optr;
         unsigned long ex_buf[4];
         unsigned long ex_imask;         /* Saved imask from exception */
+        unsigned long ex_ipend;         /* Saved IPEND from exception */
         unsigned long *ex_stack;        /* Exception stack space */
 
 #ifdef ANOMALY_05000261
@@ -60,6 +61,12 @@ struct blackfin_pda {			/* Per-processor Data Area */
         unsigned long retx;
         unsigned long seqstat;
         unsigned int __nmi_count;       /* number of times NMI asserted on this CPU */
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+        unsigned long dcplb_doublefault_addr;
+        unsigned long icplb_doublefault_addr;
+        unsigned long retx_doublefault;
+        unsigned long seqstat_doublefault;
+#endif
 };
 
 extern struct blackfin_pda cpu_pda[];
diff --git a/arch/blackfin/include/asm/sections.h b/arch/blackfin/include/asm/sections.h
index e7fd0ecd73f7..ae4dae1e370b 100644
--- a/arch/blackfin/include/asm/sections.h
+++ b/arch/blackfin/include/asm/sections.h
@@ -1,9 +1,6 @@
 #ifndef _BLACKFIN_SECTIONS_H
 #define _BLACKFIN_SECTIONS_H
 
-/* nothing to see, move along */
-#include <asm-generic/sections.h>
-
 /* only used when MTD_UCLINUX */
 extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
 
@@ -15,4 +12,39 @@ extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
         _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
         _ebss_l2[], _l2_lma_start[];
 
+#include <asm/mem_map.h>
+
+/* Blackfin systems have discontinuous memory map and no virtualized memory */
+static inline int arch_is_kernel_text(unsigned long addr)
+{
+        return
+                (L1_CODE_LENGTH &&
+                 addr >= (unsigned long)_stext_l1 &&
+                 addr <  (unsigned long)_etext_l1)
+                ||
+                (L2_LENGTH &&
+                 addr >= (unsigned long)_stext_l2 &&
+                 addr <  (unsigned long)_etext_l2);
+}
+#define arch_is_kernel_text(addr) arch_is_kernel_text(addr)
+
+static inline int arch_is_kernel_data(unsigned long addr)
+{
+        return
+                (L1_DATA_A_LENGTH &&
+                 addr >= (unsigned long)_sdata_l1 &&
+                 addr <  (unsigned long)_ebss_l1)
+                ||
+                (L1_DATA_B_LENGTH &&
+                 addr >= (unsigned long)_sdata_b_l1 &&
+                 addr <  (unsigned long)_ebss_b_l1)
+                ||
+                (L2_LENGTH &&
+                 addr >= (unsigned long)_sdata_l2 &&
+                 addr <  (unsigned long)_ebss_l2);
+}
+#define arch_is_kernel_data(addr) arch_is_kernel_data(addr)
+
+#include <asm-generic/sections.h>
+
 #endif
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index c8e7ee4768cd..02b1529dad57 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -381,7 +381,7 @@
 #define __NR_preadv             366
 #define __NR_pwritev            367
 #define __NR_rt_tgsigqueueinfo  368
-#define __NR_perf_counter_open  369
+#define __NR_perf_event_open    369
 
 #define __NR_syscall            370
 #define NR_syscalls             __NR_syscall
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 141d9281e4b0..a8ddbc8ed5af 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_MODULES)                += module.o
 obj-$(CONFIG_KGDB)                   += kgdb.o
 obj-$(CONFIG_KGDB_TESTS)             += kgdb_test.o
 obj-$(CONFIG_EARLY_PRINTK)           += early_printk.o
+obj-$(CONFIG_EARLY_PRINTK)           += shadow_console.o
 obj-$(CONFIG_STACKTRACE)             += stacktrace.o
 
 # the kgdb test puts code into L2 and without linker
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index b5df9459d6d5..f05d1b99b0ef 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -145,6 +145,7 @@ int main(void)
         DEFINE(PDA_EXBUF, offsetof(struct blackfin_pda, ex_buf));
         DEFINE(PDA_EXIMASK, offsetof(struct blackfin_pda, ex_imask));
         DEFINE(PDA_EXSTACK, offsetof(struct blackfin_pda, ex_stack));
+        DEFINE(PDA_EXIPEND, offsetof(struct blackfin_pda, ex_ipend));
 #ifdef ANOMALY_05000261
         DEFINE(PDA_LFRETX, offsetof(struct blackfin_pda, last_cplb_fault_retx));
 #endif
@@ -152,6 +153,12 @@ int main(void)
         DEFINE(PDA_ICPLB, offsetof(struct blackfin_pda, icplb_fault_addr));
         DEFINE(PDA_RETX, offsetof(struct blackfin_pda, retx));
         DEFINE(PDA_SEQSTAT, offsetof(struct blackfin_pda, seqstat));
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+        DEFINE(PDA_DF_DCPLB, offsetof(struct blackfin_pda, dcplb_doublefault_addr));
+        DEFINE(PDA_DF_ICPLB, offsetof(struct blackfin_pda, icplb_doublefault_addr));
+        DEFINE(PDA_DF_SEQSTAT, offsetof(struct blackfin_pda, seqstat_doublefault));
+        DEFINE(PDA_DF_RETX, offsetof(struct blackfin_pda, retx_doublefault));
+#endif
 #ifdef CONFIG_SMP
         /* Inter-core lock (in L2 SRAM) */
         DEFINE(SIZEOF_CORELOCK, sizeof(struct corelock_slot));
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 9f9b82816652..384868dedac3 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -19,6 +19,7 @@
 #include <asm/cacheflush.h>
 #include <asm/dma.h>
 #include <asm/uaccess.h>
+#include <asm/early_printk.h>
 
 /*
  * To make sure we work around 05000119 - we always check DMA_DONE bit,
@@ -146,8 +147,8 @@ EXPORT_SYMBOL(request_dma);
 
 int set_dma_callback(unsigned int channel, irq_handler_t callback, void *data)
 {
-        BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
-               && channel < MAX_DMA_CHANNELS));
+        BUG_ON(channel >= MAX_DMA_CHANNELS ||
+                        dma_ch[channel].chan_status == DMA_CHANNEL_FREE);
 
         if (callback != NULL) {
                 int ret;
@@ -181,8 +182,8 @@ static void clear_dma_buffer(unsigned int channel)
 void free_dma(unsigned int channel)
 {
         pr_debug("freedma() : BEGIN \n");
-        BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
-               && channel < MAX_DMA_CHANNELS));
+        BUG_ON(channel >= MAX_DMA_CHANNELS ||
+                        dma_ch[channel].chan_status == DMA_CHANNEL_FREE);
 
         /* Halt the DMA */
         disable_dma(channel);
@@ -236,6 +237,7 @@ void blackfin_dma_resume(void)
  */
 void __init blackfin_dma_early_init(void)
 {
+        early_shadow_stamp();
         bfin_write_MDMA_S0_CONFIG(0);
         bfin_write_MDMA_S1_CONFIG(0);
 }
@@ -246,6 +248,8 @@ void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size)
         unsigned long src = (unsigned long)psrc;
         struct dma_register *dst_ch, *src_ch;
 
+        early_shadow_stamp();
+
         /* We assume that everything is 4 byte aligned, so include
          * a basic sanity check
          */
@@ -300,6 +304,8 @@ void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size)
 
 void __init early_dma_memcpy_done(void)
 {
+        early_shadow_stamp();
+
         while ((bfin_read_MDMA_S0_CONFIG() && !(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) ||
                (bfin_read_MDMA_S1_CONFIG() && !(bfin_read_MDMA_D1_IRQ_STATUS() & DMA_DONE)))
                 continue;
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 6b9446271371..fc4681c0170e 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -722,7 +722,6 @@ void bfin_gpio_pm_hibernate_suspend(void)
                 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
                 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
                 gpio_bank_saved[bank].data = gpio_array[bank]->data;
-                gpio_bank_saved[bank].data = gpio_array[bank]->data;
                 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
                 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
         }
diff --git a/arch/blackfin/kernel/cplb-mpu/Makefile b/arch/blackfin/kernel/cplb-mpu/Makefile
index 7d70d3bf3212..394d0b1b28fe 100644
--- a/arch/blackfin/kernel/cplb-mpu/Makefile
+++ b/arch/blackfin/kernel/cplb-mpu/Makefile
@@ -2,7 +2,7 @@
 # arch/blackfin/kernel/cplb-nompu/Makefile
 #
 
-obj-y := cplbinit.o cacheinit.o cplbmgr.o
+obj-y := cplbinit.o cplbmgr.o
 
 CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \
                     -ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
deleted file mode 100644
index d5a86c3017f7..000000000000
--- a/arch/blackfin/kernel/cplb-mpu/cacheinit.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- *               Copyright 2004-2007 Analog Devices Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/cpu.h>
-
-#include <asm/cacheflush.h>
-#include <asm/blackfin.h>
-#include <asm/cplb.h>
-#include <asm/cplbinit.h>
-
-#if defined(CONFIG_BFIN_ICACHE)
-void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
-{
-        unsigned long ctrl;
-        int i;
-
-        SSYNC();
-        for (i = 0; i < MAX_CPLBS; i++) {
-                bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr);
-                bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data);
-        }
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl |= IMC | ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-}
-#endif
-
-#if defined(CONFIG_BFIN_DCACHE)
-void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
-{
-        unsigned long ctrl;
-        int i;
-
-        SSYNC();
-        for (i = 0; i < MAX_CPLBS; i++) {
-                bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr);
-                bfin_write32(DCPLB_DATA0 + i * 4, dcplb_tbl[i].data);
-        }
-
-        ctrl = bfin_read_DMEM_CONTROL();
-
-        /*
-         *  Anomaly notes:
-         *  05000287 - We implement workaround #2 - Change the DMEM_CONTROL
-         *  register, so that the port preferences for DAG0 and DAG1 are set
-         *  to port B
-         */
-        ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0);
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-}
-#endif
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index bcdfe9b0b71f..8e1e9e9e9632 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -22,6 +22,7 @@
 
 #include <asm/blackfin.h>
 #include <asm/cacheflush.h>
+#include <asm/cplb.h>
 #include <asm/cplbinit.h>
 #include <asm/mmu_context.h>
 
@@ -41,46 +42,6 @@ int nr_dcplb_miss[NR_CPUS], nr_icplb_miss[NR_CPUS];
 int nr_icplb_supv_miss[NR_CPUS], nr_dcplb_prot[NR_CPUS];
 int nr_cplb_flush[NR_CPUS];
 
-static inline void disable_dcplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_DMEM_CONTROL();
-        ctrl &= ~ENDCPLB;
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
-static inline void enable_dcplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_DMEM_CONTROL();
-        ctrl |= ENDCPLB;
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
-static inline void disable_icplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl &= ~ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
-static inline void enable_icplb(void)
-{
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl |= ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-}
-
 /*
  * Given the contents of the status register, return the index of the
  * CPLB that caused the fault.
@@ -198,10 +159,10 @@ static noinline int dcplb_miss(unsigned int cpu)
         dcplb_tbl[cpu][idx].addr = addr;
         dcplb_tbl[cpu][idx].data = d_data;
 
-        disable_dcplb();
+        _disable_dcplb();
         bfin_write32(DCPLB_DATA0 + idx * 4, d_data);
         bfin_write32(DCPLB_ADDR0 + idx * 4, addr);
-        enable_dcplb();
+        _enable_dcplb();
 
         return 0;
 }
@@ -288,10 +249,10 @@ static noinline int icplb_miss(unsigned int cpu)
         icplb_tbl[cpu][idx].addr = addr;
         icplb_tbl[cpu][idx].data = i_data;
 
-        disable_icplb();
+        _disable_icplb();
         bfin_write32(ICPLB_DATA0 + idx * 4, i_data);
         bfin_write32(ICPLB_ADDR0 + idx * 4, addr);
-        enable_icplb();
+        _enable_icplb();
 
         return 0;
 }
@@ -319,7 +280,7 @@ static noinline int dcplb_protection_fault(unsigned int cpu)
 int cplb_hdr(int seqstat, struct pt_regs *regs)
 {
         int cause = seqstat & 0x3f;
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu = raw_smp_processor_id();
         switch (cause) {
         case 0x23:
                 return dcplb_protection_fault(cpu);
@@ -340,19 +301,19 @@ void flush_switched_cplbs(unsigned int cpu)
         nr_cplb_flush[cpu]++;
 
         local_irq_save_hw(flags);
-        disable_icplb();
+        _disable_icplb();
         for (i = first_switched_icplb; i < MAX_CPLBS; i++) {
                 icplb_tbl[cpu][i].data = 0;
                 bfin_write32(ICPLB_DATA0 + i * 4, 0);
         }
-        enable_icplb();
+        _enable_icplb();
 
-        disable_dcplb();
+        _disable_dcplb();
         for (i = first_switched_dcplb; i < MAX_CPLBS; i++) {
                 dcplb_tbl[cpu][i].data = 0;
                 bfin_write32(DCPLB_DATA0 + i * 4, 0);
         }
-        enable_dcplb();
+        _enable_dcplb();
         local_irq_restore_hw(flags);
 
 }
@@ -385,7 +346,7 @@ void set_mask_dcplbs(unsigned long *masks, unsigned int cpu)
 #endif
         }
 
-        disable_dcplb();
+        _disable_dcplb();
         for (i = first_mask_dcplb; i < first_switched_dcplb; i++) {
                 dcplb_tbl[cpu][i].addr = addr;
                 dcplb_tbl[cpu][i].data = d_data;
@@ -393,6 +354,6 @@ void set_mask_dcplbs(unsigned long *masks, unsigned int cpu)
                 bfin_write32(DCPLB_ADDR0 + i * 4, addr);
                 addr += PAGE_SIZE;
         }
-        enable_dcplb();
+        _enable_dcplb();
         local_irq_restore_hw(flags);
 }
diff --git a/arch/blackfin/kernel/cplb-nompu/Makefile b/arch/blackfin/kernel/cplb-nompu/Makefile
index 7d70d3bf3212..394d0b1b28fe 100644
--- a/arch/blackfin/kernel/cplb-nompu/Makefile
+++ b/arch/blackfin/kernel/cplb-nompu/Makefile
@@ -2,7 +2,7 @@
 # arch/blackfin/kernel/cplb-nompu/Makefile
 #
 
-obj-y := cplbinit.o cacheinit.o cplbmgr.o
+obj-y := cplbinit.o cplbmgr.o
 
 CFLAGS_cplbmgr.o := -ffixed-I0 -ffixed-I1 -ffixed-I2 -ffixed-I3 \
                     -ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
diff --git a/arch/blackfin/kernel/cplb-nompu/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
deleted file mode 100644
index d5a86c3017f7..000000000000
--- a/arch/blackfin/kernel/cplb-nompu/cacheinit.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- *               Copyright 2004-2007 Analog Devices Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/cpu.h>
-
-#include <asm/cacheflush.h>
-#include <asm/blackfin.h>
-#include <asm/cplb.h>
-#include <asm/cplbinit.h>
-
-#if defined(CONFIG_BFIN_ICACHE)
-void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
-{
-        unsigned long ctrl;
-        int i;
-
-        SSYNC();
-        for (i = 0; i < MAX_CPLBS; i++) {
-                bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr);
-                bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data);
-        }
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl |= IMC | ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-}
-#endif
-
-#if defined(CONFIG_BFIN_DCACHE)
-void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
-{
-        unsigned long ctrl;
-        int i;
-
-        SSYNC();
-        for (i = 0; i < MAX_CPLBS; i++) {
-                bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr);
-                bfin_write32(DCPLB_DATA0 + i * 4, dcplb_tbl[i].data);
-        }
-
-        ctrl = bfin_read_DMEM_CONTROL();
-
-        /*
-         *  Anomaly notes:
-         *  05000287 - We implement workaround #2 - Change the DMEM_CONTROL
-         *  register, so that the port preferences for DAG0 and DAG1 are set
-         *  to port B
-         */
-        ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0);
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-}
-#endif
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 685f160a5a36..5d8ad503f82a 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -36,7 +36,7 @@ int first_switched_icplb PDT_ATTR;
 int first_switched_dcplb PDT_ATTR;
 
 struct cplb_boundary dcplb_bounds[9] PDT_ATTR;
-struct cplb_boundary icplb_bounds[7] PDT_ATTR;
+struct cplb_boundary icplb_bounds[9] PDT_ATTR;
 
 int icplb_nr_bounds PDT_ATTR;
 int dcplb_nr_bounds PDT_ATTR;
@@ -167,14 +167,21 @@ void __init generate_cplb_tables_all(void)
                 icplb_bounds[i_i++].data = (reserved_mem_icache_on ?
                                             SDRAM_IGENERIC : SDRAM_INON_CHBL);
         }
+        /* Addressing hole up to the async bank.  */
+        icplb_bounds[i_i].eaddr = ASYNC_BANK0_BASE;
+        icplb_bounds[i_i++].data = 0;
+        /* ASYNC banks.  */
+        icplb_bounds[i_i].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE;
+        icplb_bounds[i_i++].data = SDRAM_EBIU;
         /* Addressing hole up to BootROM.  */
         icplb_bounds[i_i].eaddr = BOOT_ROM_START;
         icplb_bounds[i_i++].data = 0;
         /* BootROM -- largest one should be less than 1 meg.  */
         icplb_bounds[i_i].eaddr = BOOT_ROM_START + (1 * 1024 * 1024);
         icplb_bounds[i_i++].data = SDRAM_IGENERIC;
+
         if (L2_LENGTH) {
-                /* Addressing hole up to L2 SRAM, including the async bank.  */
+                /* Addressing hole up to L2 SRAM.  */
                 icplb_bounds[i_i].eaddr = L2_START;
                 icplb_bounds[i_i++].data = 0;
                 /* L2 SRAM.  */
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c
index 12b030842fdb..d9ea46c6e41a 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbmgr.c
@@ -48,36 +48,13 @@ int nr_cplb_flush[NR_CPUS], nr_dcplb_prot[NR_CPUS];
 #define MGR_ATTR
 #endif
 
-/*
- * We're in an exception handler.  The normal cli nop nop workaround
- * isn't going to do very much, as the only thing that can interrupt
- * us is an NMI, and the cli isn't going to stop that.
- */
-#define NOWA_SSYNC __asm__ __volatile__ ("ssync;")
-
-/* Anomaly handlers provide SSYNCs, so avoid extra if anomaly is present */
-#if ANOMALY_05000125
-
-#define bfin_write_DMEM_CONTROL_SSYNC(v)    bfin_write_DMEM_CONTROL(v)
-#define bfin_write_IMEM_CONTROL_SSYNC(v)    bfin_write_IMEM_CONTROL(v)
-
-#else
-
-#define bfin_write_DMEM_CONTROL_SSYNC(v) \
-    do { NOWA_SSYNC; bfin_write_DMEM_CONTROL(v); NOWA_SSYNC; } while (0)
-#define bfin_write_IMEM_CONTROL_SSYNC(v) \
-    do { NOWA_SSYNC; bfin_write_IMEM_CONTROL(v); NOWA_SSYNC; } while (0)
-
-#endif
-
 static inline void write_dcplb_data(int cpu, int idx, unsigned long data,
                                     unsigned long addr)
 {
-        unsigned long ctrl = bfin_read_DMEM_CONTROL();
-        bfin_write_DMEM_CONTROL_SSYNC(ctrl & ~ENDCPLB);
+        _disable_dcplb();
         bfin_write32(DCPLB_DATA0 + idx * 4, data);
         bfin_write32(DCPLB_ADDR0 + idx * 4, addr);
-        bfin_write_DMEM_CONTROL_SSYNC(ctrl);
+        _enable_dcplb();
 
 #ifdef CONFIG_CPLB_INFO
         dcplb_tbl[cpu][idx].addr = addr;
@@ -88,12 +65,10 @@ static inline void write_dcplb_data(int cpu, int idx, unsigned long data,
 static inline void write_icplb_data(int cpu, int idx, unsigned long data,
                                     unsigned long addr)
 {
-        unsigned long ctrl = bfin_read_IMEM_CONTROL();
-
-        bfin_write_IMEM_CONTROL_SSYNC(ctrl & ~ENICPLB);
+        _disable_icplb();
         bfin_write32(ICPLB_DATA0 + idx * 4, data);
         bfin_write32(ICPLB_ADDR0 + idx * 4, addr);
-        bfin_write_IMEM_CONTROL_SSYNC(ctrl);
+        _enable_icplb();
 
 #ifdef CONFIG_CPLB_INFO
         icplb_tbl[cpu][idx].addr = addr;
@@ -227,7 +202,7 @@ MGR_ATTR static int dcplb_miss(int cpu)
 MGR_ATTR int cplb_hdr(int seqstat, struct pt_regs *regs)
 {
         int cause = seqstat & 0x3f;
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu = raw_smp_processor_id();
         switch (cause) {
         case VEC_CPLB_I_M:
                 return icplb_miss(cpu);
diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c
index 2ab56811841c..931c78b5ea1f 100644
--- a/arch/blackfin/kernel/early_printk.c
+++ b/arch/blackfin/kernel/early_printk.c
@@ -27,6 +27,7 @@
 #include <linux/serial_core.h>
 #include <linux/console.h>
 #include <linux/string.h>
+#include <linux/reboot.h>
 #include <asm/blackfin.h>
 #include <asm/irq_handler.h>
 #include <asm/early_printk.h>
@@ -181,6 +182,22 @@ asmlinkage void __init init_early_exception_vectors(void)
         u32 evt;
         SSYNC();
 
+        /*
+         * This starts up the shadow buffer, incase anything crashes before
+         * setup arch
+         */
+        mark_shadow_error();
+        early_shadow_puts(linux_banner);
+        early_shadow_stamp();
+
+        if (CPUID != bfin_cpuid()) {
+                early_shadow_puts("Running on wrong machine type, expected");
+                early_shadow_reg(CPUID, 16);
+                early_shadow_puts(", but running on");
+                early_shadow_reg(bfin_cpuid(), 16);
+                early_shadow_puts("\n");
+        }
+
         /* cannot program in software:
          * evt0 - emulation (jtag)
          * evt1 - reset
@@ -199,6 +216,7 @@ asmlinkage void __init init_early_exception_vectors(void)
 
 }
 
+__attribute__((__noreturn__))
 asmlinkage void __init early_trap_c(struct pt_regs *fp, void *retaddr)
 {
         /* This can happen before the uart is initialized, so initialize
@@ -210,10 +228,58 @@ asmlinkage void __init early_trap_c(struct pt_regs *fp, void *retaddr)
         if (likely(early_console == NULL) && CPUID == bfin_cpuid())
                 setup_early_printk(DEFAULT_EARLY_PORT);
 
-        printk(KERN_EMERG "Early panic\n");
-        dump_bfin_mem(fp);
-        show_regs(fp);
-        dump_bfin_trace_buffer();
+        if (!shadow_console_enabled()) {
+                /* crap - we crashed before setup_arch() */
+                early_shadow_puts("panic before setup_arch\n");
+                early_shadow_puts("IPEND:");
+                early_shadow_reg(fp->ipend, 16);
+                if (fp->seqstat & SEQSTAT_EXCAUSE) {
+                        early_shadow_puts("\nEXCAUSE:");
+                        early_shadow_reg(fp->seqstat & SEQSTAT_EXCAUSE, 8);
+                }
+                if (fp->seqstat & SEQSTAT_HWERRCAUSE) {
+                        early_shadow_puts("\nHWERRCAUSE:");
+                        early_shadow_reg(
+                                (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14, 8);
+                }
+                early_shadow_puts("\nErr @");
+                if (fp->ipend & EVT_EVX)
+                        early_shadow_reg(fp->retx, 32);
+                else
+                        early_shadow_reg(fp->pc, 32);
+#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
+                early_shadow_puts("\nTrace:");
+                if (likely(bfin_read_TBUFSTAT() & TBUFCNT)) {
+                        while (bfin_read_TBUFSTAT() & TBUFCNT) {
+                                early_shadow_puts("\nT  :");
+                                early_shadow_reg(bfin_read_TBUF(), 32);
+                                early_shadow_puts("\n S :");
+                                early_shadow_reg(bfin_read_TBUF(), 32);
+                        }
+                }
+#endif
+                early_shadow_puts("\nUse bfin-elf-addr2line to determine "
+                        "function names\n");
+                /*
+                 * We should panic(), but we can't - since panic calls printk,
+                 * and printk uses memcpy.
+                 * we want to reboot, but if the machine type is different,
+                 * can't due to machine specific reboot sequences
+                 */
+                if (CPUID == bfin_cpuid()) {
+                        early_shadow_puts("Trying to restart\n");
+                        machine_restart("");
+                }
+
+                early_shadow_puts("Halting, since it is not safe to restart\n");
+                while (1)
+                        asm volatile ("EMUEXCPT; IDLE;\n");
+
+        } else {
+                printk(KERN_EMERG "Early panic\n");
+                show_regs(fp);
+                dump_bfin_trace_buffer();
+        }
 
         panic("Died early");
 }
diff --git a/arch/blackfin/kernel/entry.S b/arch/blackfin/kernel/entry.S
index a9cfba9946b5..3f8769b7db54 100644
--- a/arch/blackfin/kernel/entry.S
+++ b/arch/blackfin/kernel/entry.S
@@ -43,8 +43,28 @@
 
 ENTRY(_ret_from_fork)
 #ifdef CONFIG_IPIPE
-        [--sp] = reti;          /* IRQs on. */
-        SP += 4;
+        /*
+         * Hw IRQs are off on entry, and we don't want the scheduling tail
+         * code to starve high priority domains from interrupts while it
+         * runs. Therefore we first stall the root stage to have the
+         * virtual interrupt state reflect IMASK.
+         */
+        p0.l = ___ipipe_root_status;
+        p0.h = ___ipipe_root_status;
+        r4 = [p0];
+        bitset(r4, 0);
+        [p0] = r4;
+        /*
+         * Then we may enable hw IRQs, allowing preemption from high
+         * priority domains. schedule_tail() will do local_irq_enable()
+         * since Blackfin does not define __ARCH_WANT_UNLOCKED_CTXSW, so
+         * there is no need to unstall the root domain by ourselves
+         * afterwards.
+         */
+        p0.l = _bfin_irq_flags;
+        p0.h = _bfin_irq_flags;
+        r4 = [p0];
+        sti r4;
 #endif /* CONFIG_IPIPE */
         SP += -12;
         call _schedule_tail;
diff --git a/arch/blackfin/kernel/ftrace-entry.S b/arch/blackfin/kernel/ftrace-entry.S
index 6980b7a0615d..76dd4fbcd17a 100644
--- a/arch/blackfin/kernel/ftrace-entry.S
+++ b/arch/blackfin/kernel/ftrace-entry.S
@@ -17,8 +17,8 @@
  * only one we can blow away.  With pointer registers, we have P0-P2.
  *
  * Upon entry, the RETS will point to the top of the current profiled
- * function.  And since GCC setup the frame for us, the previous function
- * will be waiting there.  mmmm pie.
+ * function.  And since GCC pushed the previous RETS for us, the previous
+ * function will be waiting there.  mmmm pie.
  */
 ENTRY(__mcount)
         /* save third function arg early so we can do testing below */
@@ -70,14 +70,14 @@ ENTRY(__mcount)
         /* setup the tracer function */
         p0 = r3;
 
-        /* tracer(ulong frompc, ulong selfpc):
-         *  frompc: the pc that did the call to ...
-         *  selfpc: ... this location
-         * the selfpc itself will need adjusting for the mcount call
+        /* function_trace_call(unsigned long ip, unsigned long parent_ip):
+         *  ip: this point was called by ...
+         *  parent_ip: ... this function
+         * the ip itself will need adjusting for the mcount call
          */
-        r1 = rets;
-        r0 = [fp + 4];
-        r1 += -MCOUNT_INSN_SIZE;
+        r0 = rets;
+        r1 = [sp + 16]; /* skip the 4 local regs on stack */
+        r0 += -MCOUNT_INSN_SIZE;
 
         /* call the tracer */
         call (p0);
@@ -106,9 +106,10 @@ ENTRY(_ftrace_graph_caller)
         [--sp] = r1;
         [--sp] = rets;
 
-        r0 = fp;
+        /* prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) */
+        r0 = sp;
         r1 = rets;
-        r0 += 4;
+        r0 += 16;       /* skip the 4 local regs on stack */
         r1 += -MCOUNT_INSN_SIZE;
         call _prepare_ftrace_return;
 
diff --git a/arch/blackfin/kernel/ftrace.c b/arch/blackfin/kernel/ftrace.c
index 905bfc40a00b..f2c85ac6f2da 100644
--- a/arch/blackfin/kernel/ftrace.c
+++ b/arch/blackfin/kernel/ftrace.c
@@ -24,7 +24,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
         if (unlikely(atomic_read(&current->tracing_graph_pause)))
                 return;
 
-        if (ftrace_push_return_trace(*parent, self_addr, &trace.depth) == -EBUSY)
+        if (ftrace_push_return_trace(*parent, self_addr, &trace.depth, 0) == -EBUSY)
                 return;
 
         trace.func = self_addr;
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index b8d22034b9a6..5d7382396dc0 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -30,10 +30,10 @@
 #include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/kthread.h>
-#include <asm/unistd.h>
+#include <linux/unistd.h>
+#include <linux/io.h>
 #include <asm/system.h>
 #include <asm/atomic.h>
-#include <asm/io.h>
 
 DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
 
@@ -90,6 +90,7 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
         struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
         struct ipipe_domain *this_domain, *next_domain;
         struct list_head *head, *pos;
+        struct ipipe_irqdesc *idesc;
         int m_ack, s = -1;
 
         /*
@@ -100,17 +101,20 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
          */
         m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
         this_domain = __ipipe_current_domain;
+        idesc = &this_domain->irqs[irq];
 
-        if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control)))
+        if (unlikely(test_bit(IPIPE_STICKY_FLAG, &idesc->control)))
                 head = &this_domain->p_link;
         else {
                 head = __ipipe_pipeline.next;
                 next_domain = list_entry(head, struct ipipe_domain, p_link);
-                if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) {
-                        if (!m_ack && next_domain->irqs[irq].acknowledge != NULL)
-                                next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
+                idesc = &next_domain->irqs[irq];
+                if (likely(test_bit(IPIPE_WIRED_FLAG, &idesc->control))) {
+                        if (!m_ack && idesc->acknowledge != NULL)
+                                idesc->acknowledge(irq, irq_to_desc(irq));
                         if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
-                                s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
+                                s = __test_and_set_bit(IPIPE_STALL_FLAG,
+                                                       &p->status);
                         __ipipe_dispatch_wired(next_domain, irq);
                         goto out;
                 }
@@ -121,14 +125,15 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
         pos = head;
         while (pos != &__ipipe_pipeline) {
                 next_domain = list_entry(pos, struct ipipe_domain, p_link);
-                if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) {
+                idesc = &next_domain->irqs[irq];
+                if (test_bit(IPIPE_HANDLE_FLAG, &idesc->control)) {
                         __ipipe_set_irq_pending(next_domain, irq);
-                        if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) {
-                                next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
+                        if (!m_ack && idesc->acknowledge != NULL) {
+                                idesc->acknowledge(irq, irq_to_desc(irq));
                                 m_ack = 1;
                         }
                 }
-                if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control))
+                if (!test_bit(IPIPE_PASS_FLAG, &idesc->control))
                         break;
                 pos = next_domain->p_link.next;
         }
@@ -159,11 +164,6 @@ out:
                 __clear_bit(IPIPE_STALL_FLAG, &p->status);
 }
 
-int __ipipe_check_root(void)
-{
-        return ipipe_root_domain_p;
-}
-
 void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
 {
         struct irq_desc *desc = irq_to_desc(irq);
@@ -186,30 +186,6 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
 }
 EXPORT_SYMBOL(__ipipe_disable_irqdesc);
 
-void __ipipe_stall_root_raw(void)
-{
-        /*
-         * This code is called by the ins{bwl} routines (see
-         * arch/blackfin/lib/ins.S), which are heavily used by the
-         * network stack. It masks all interrupts but those handled by
-         * non-root domains, so that we keep decent network transfer
-         * rates for Linux without inducing pathological jitter for
-         * the real-time domain.
-         */
-        __asm__ __volatile__ ("sti %0;" : : "d"(__ipipe_irq_lvmask));
-
-        __set_bit(IPIPE_STALL_FLAG,
-                  &ipipe_root_cpudom_var(status));
-}
-
-void __ipipe_unstall_root_raw(void)
-{
-        __clear_bit(IPIPE_STALL_FLAG,
-                    &ipipe_root_cpudom_var(status));
-
-        __asm__ __volatile__ ("sti %0;" : : "d"(bfin_irq_flags));
-}
-
 int __ipipe_syscall_root(struct pt_regs *regs)
 {
         struct ipipe_percpu_domain_data *p;
@@ -333,12 +309,29 @@ asmlinkage void __ipipe_sync_root(void)
 
 void ___ipipe_sync_pipeline(unsigned long syncmask)
 {
-        if (__ipipe_root_domain_p) {
-                if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
-                        return;
-        }
+        if (__ipipe_root_domain_p &&
+            test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
+                return;
 
         __ipipe_sync_stage(syncmask);
 }
 
-EXPORT_SYMBOL(show_stack);
+void __ipipe_disable_root_irqs_hw(void)
+{
+        /*
+         * This code is called by the ins{bwl} routines (see
+         * arch/blackfin/lib/ins.S), which are heavily used by the
+         * network stack. It masks all interrupts but those handled by
+         * non-root domains, so that we keep decent network transfer
+         * rates for Linux without inducing pathological jitter for
+         * the real-time domain.
+         */
+        bfin_sti(__ipipe_irq_lvmask);
+        __set_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status));
+}
+
+void __ipipe_enable_root_irqs_hw(void)
+{
+        __clear_bit(IPIPE_STALL_FLAG, &ipipe_root_cpudom_var(status));
+        bfin_sti(bfin_irq_flags);
+}
diff --git a/arch/blackfin/kernel/kgdb_test.c b/arch/blackfin/kernel/kgdb_test.c
index dbcf3e45cb0b..59fc42dc5d6a 100644
--- a/arch/blackfin/kernel/kgdb_test.c
+++ b/arch/blackfin/kernel/kgdb_test.c
@@ -54,7 +54,7 @@ void kgdb_l2_test(void)
 
 int kgdb_test(char *name, int len, int count, int z)
 {
-        printk(KERN_DEBUG "kgdb name(%d): %s, %d, %d\n", len, name, count, z);
+        printk(KERN_ALERT "kgdb name(%d): %s, %d, %d\n", len, name, count, z);
         count = z;
         return count;
 }
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index d5aee3626688..67fc7a56c865 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -27,6 +27,7 @@
  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
+#define pr_fmt(fmt) "module %s: " fmt
 
 #include <linux/moduleloader.h>
 #include <linux/elf.h>
@@ -36,6 +37,7 @@
 #include <linux/kernel.h>
 #include <asm/dma.h>
 #include <asm/cacheflush.h>
+#include <asm/uaccess.h>
 
 void *module_alloc(unsigned long size)
 {
@@ -52,7 +54,7 @@ void module_free(struct module *mod, void *module_region)
 
 /* Transfer the section to the L1 memory */
 int
-module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
+module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
                           char *secstrings, struct module *mod)
 {
         /*
@@ -63,126 +65,119 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
          * NOTE: this breaks the semantic of mod->arch structure.
          */
         Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
-        void *dest = NULL;
+        void *dest;
 
         for (s = sechdrs; s < sechdrs_end; ++s) {
-                if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
-                    ((strcmp(".text", secstrings + s->sh_name) == 0) &&
-                     (hdr->e_flags & EF_BFIN_CODE_IN_L1) && (s->sh_size > 0))) {
+                const char *shname = secstrings + s->sh_name;
+
+                if (s->sh_size == 0)
+                        continue;
+
+                if (!strcmp(".l1.text", shname) ||
+                    (!strcmp(".text", shname) &&
+                     (hdr->e_flags & EF_BFIN_CODE_IN_L1))) {
+
                         dest = l1_inst_sram_alloc(s->sh_size);
                         mod->arch.text_l1 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                       "module %s: L1 instruction memory allocation failed\n",
-                                       mod->name);
+                                pr_err("L1 inst memory allocation failed\n",
+                                        mod->name);
                                 return -1;
                         }
                         dma_memcpy(dest, (void *)s->sh_addr, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
-                if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
-                    ((strcmp(".data", secstrings + s->sh_name) == 0) &&
-                     (hdr->e_flags & EF_BFIN_DATA_IN_L1) && (s->sh_size > 0))) {
+
+                } else if (!strcmp(".l1.data", shname) ||
+                           (!strcmp(".data", shname) &&
+                            (hdr->e_flags & EF_BFIN_DATA_IN_L1))) {
+
                         dest = l1_data_sram_alloc(s->sh_size);
                         mod->arch.data_a_l1 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                        "module %s: L1 data memory allocation failed\n",
+                                pr_err("L1 data memory allocation failed\n",
                                         mod->name);
                                 return -1;
                         }
                         memcpy(dest, (void *)s->sh_addr, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
-                if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
-                    ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
-                     (hdr->e_flags & EF_BFIN_DATA_IN_L1) && (s->sh_size > 0))) {
-                        dest = l1_data_sram_alloc(s->sh_size);
+
+                } else if (!strcmp(".l1.bss", shname) ||
+                           (!strcmp(".bss", shname) &&
+                            (hdr->e_flags & EF_BFIN_DATA_IN_L1))) {
+
+                        dest = l1_data_sram_zalloc(s->sh_size);
                         mod->arch.bss_a_l1 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                        "module %s: L1 data memory allocation failed\n",
+                                pr_err("L1 data memory allocation failed\n",
                                         mod->name);
                                 return -1;
                         }
-                        memset(dest, 0, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
-                if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
+
+                } else if (!strcmp(".l1.data.B", shname)) {
+
                         dest = l1_data_B_sram_alloc(s->sh_size);
                         mod->arch.data_b_l1 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                        "module %s: L1 data memory allocation failed\n",
+                                pr_err("L1 data memory allocation failed\n",
                                         mod->name);
                                 return -1;
                         }
                         memcpy(dest, (void *)s->sh_addr, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
-                if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
+
+                } else if (!strcmp(".l1.bss.B", shname)) {
+
                         dest = l1_data_B_sram_alloc(s->sh_size);
                         mod->arch.bss_b_l1 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                        "module %s: L1 data memory allocation failed\n",
+                                pr_err("L1 data memory allocation failed\n",
                                         mod->name);
                                 return -1;
                         }
                         memset(dest, 0, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
-                if ((strcmp(".l2.text", secstrings + s->sh_name) == 0) ||
-                    ((strcmp(".text", secstrings + s->sh_name) == 0) &&
-                     (hdr->e_flags & EF_BFIN_CODE_IN_L2) && (s->sh_size > 0))) {
+
+                } else if (!strcmp(".l2.text", shname) ||
+                           (!strcmp(".text", shname) &&
+                            (hdr->e_flags & EF_BFIN_CODE_IN_L2))) {
+
                         dest = l2_sram_alloc(s->sh_size);
                         mod->arch.text_l2 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                       "module %s: L2 SRAM allocation failed\n",
-                                       mod->name);
+                                pr_err("L2 SRAM allocation failed\n",
+                                        mod->name);
                                 return -1;
                         }
                         memcpy(dest, (void *)s->sh_addr, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
-                if ((strcmp(".l2.data", secstrings + s->sh_name) == 0) ||
-                    ((strcmp(".data", secstrings + s->sh_name) == 0) &&
-                     (hdr->e_flags & EF_BFIN_DATA_IN_L2) && (s->sh_size > 0))) {
+
+                } else if (!strcmp(".l2.data", shname) ||
+                           (!strcmp(".data", shname) &&
+                            (hdr->e_flags & EF_BFIN_DATA_IN_L2))) {
+
                         dest = l2_sram_alloc(s->sh_size);
                         mod->arch.data_l2 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                        "module %s: L2 SRAM allocation failed\n",
+                                pr_err("L2 SRAM allocation failed\n",
                                         mod->name);
                                 return -1;
                         }
                         memcpy(dest, (void *)s->sh_addr, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
-                if (strcmp(".l2.bss", secstrings + s->sh_name) == 0 ||
-                    ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
-                     (hdr->e_flags & EF_BFIN_DATA_IN_L2) && (s->sh_size > 0))) {
-                        dest = l2_sram_alloc(s->sh_size);
+
+                } else if (!strcmp(".l2.bss", shname) ||
+                           (!strcmp(".bss", shname) &&
+                            (hdr->e_flags & EF_BFIN_DATA_IN_L2))) {
+
+                        dest = l2_sram_zalloc(s->sh_size);
                         mod->arch.bss_l2 = dest;
                         if (dest == NULL) {
-                                printk(KERN_ERR
-                                        "module %s: L2 SRAM allocation failed\n",
+                                pr_err("L2 SRAM allocation failed\n",
                                         mod->name);
                                 return -1;
                         }
-                        memset(dest, 0, s->sh_size);
-                        s->sh_flags &= ~SHF_ALLOC;
-                        s->sh_addr = (unsigned long)dest;
-                }
+
+                } else
+                        continue;
+
+                s->sh_flags &= ~SHF_ALLOC;
+                s->sh_addr = (unsigned long)dest;
         }
+
         return 0;
 }
 
@@ -190,7 +185,7 @@ int
 apply_relocate(Elf_Shdr * sechdrs, const char *strtab,
                unsigned int symindex, unsigned int relsec, struct module *me)
 {
-        printk(KERN_ERR "module %s: .rel unsupported\n", me->name);
+        pr_err(".rel unsupported\n", me->name);
         return -ENOEXEC;
 }
 
@@ -205,109 +200,86 @@ apply_relocate(Elf_Shdr * sechdrs, const char *strtab,
 /*            gas does not generate it.                                  */
 /*************************************************************************/
 int
-apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
+apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
                    unsigned int symindex, unsigned int relsec,
                    struct module *mod)
 {
         unsigned int i;
-        unsigned short tmp;
         Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
         Elf32_Sym *sym;
-        uint32_t *location32;
-        uint16_t *location16;
-        uint32_t value;
+        unsigned long location, value, size;
+
+        pr_debug("applying relocate section %u to %u\n", mod->name,
+                relsec, sechdrs[relsec].sh_info);
 
-        pr_debug("Applying relocate section %u to %u\n", relsec,
-               sechdrs[relsec].sh_info);
         for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
                 /* This is where to make the change */
-                location16 =
-                    (uint16_t *) (sechdrs[sechdrs[relsec].sh_info].sh_addr +
-                                  rel[i].r_offset);
-                location32 = (uint32_t *) location16;
+                location = sechdrs[sechdrs[relsec].sh_info].sh_addr +
+                           rel[i].r_offset;
+
                 /* This is the symbol it is referring to. Note that all
                    undefined symbols have been resolved. */
                 sym = (Elf32_Sym *) sechdrs[symindex].sh_addr
                     + ELF32_R_SYM(rel[i].r_info);
                 value = sym->st_value;
                 value += rel[i].r_addend;
-                pr_debug("location is %x, value is %x type is %d \n",
-                         (unsigned int) location32, value,
-                         ELF32_R_TYPE(rel[i].r_info));
+
 #ifdef CONFIG_SMP
-                if ((unsigned long)location16 >= COREB_L1_DATA_A_START) {
-                        printk(KERN_ERR "module %s: cannot relocate in L1: %u (SMP kernel)",
-                                       mod->name, ELF32_R_TYPE(rel[i].r_info));
+                if (location >= COREB_L1_DATA_A_START) {
+                        pr_err("cannot relocate in L1: %u (SMP kernel)",
+                                mod->name, ELF32_R_TYPE(rel[i].r_info));
                         return -ENOEXEC;
                 }
 #endif
+
+                pr_debug("location is %lx, value is %lx type is %d\n",
+                        mod->name, location, value, ELF32_R_TYPE(rel[i].r_info));
+
                 switch (ELF32_R_TYPE(rel[i].r_info)) {
 
+                case R_BFIN_HUIMM16:
+                        value >>= 16;
+                case R_BFIN_LUIMM16:
+                case R_BFIN_RIMM16:
+                        size = 2;
+                        break;
+                case R_BFIN_BYTE4_DATA:
+                        size = 4;
+                        break;
+
                 case R_BFIN_PCREL24:
                 case R_BFIN_PCREL24_JUMP_L:
-                        /* Add the value, subtract its postition */
-                        location16 =
-                            (uint16_t *) (sechdrs[sechdrs[relsec].sh_info].
-                                          sh_addr + rel[i].r_offset - 2);
-                        location32 = (uint32_t *) location16;
-                        value -= (uint32_t) location32;
-                        value >>= 1;
-                        if ((value & 0xFF000000) != 0 &&
-                            (value & 0xFF000000) != 0xFF000000) {
-                                printk(KERN_ERR "module %s: relocation overflow\n",
-                                       mod->name);
-                                return -ENOEXEC;
-                        }
-                        pr_debug("value is %x, before %x-%x after %x-%x\n", value,
-                               *location16, *(location16 + 1),
-                               (*location16 & 0xff00) | (value >> 16 & 0x00ff),
-                               value & 0xffff);
-                        *location16 =
-                            (*location16 & 0xff00) | (value >> 16 & 0x00ff);
-                        *(location16 + 1) = value & 0xffff;
-                        break;
                 case R_BFIN_PCREL12_JUMP:
                 case R_BFIN_PCREL12_JUMP_S:
-                        value -= (uint32_t) location32;
-                        value >>= 1;
-                        *location16 = (value & 0xfff);
-                        break;
                 case R_BFIN_PCREL10:
-                        value -= (uint32_t) location32;
-                        value >>= 1;
-                        *location16 = (value & 0x3ff);
-                        break;
-                case R_BFIN_LUIMM16:
-                        pr_debug("before %x after %x\n", *location16,
-                                       (value & 0xffff));
-                        tmp = (value & 0xffff);
-                        if ((unsigned long)location16 >= L1_CODE_START) {
-                                dma_memcpy(location16, &tmp, 2);
-                        } else
-                                *location16 = tmp;
-                        break;
-                case R_BFIN_HUIMM16:
-                        pr_debug("before %x after %x\n", *location16,
-                                       ((value >> 16) & 0xffff));
-                        tmp = ((value >> 16) & 0xffff);
-                        if ((unsigned long)location16 >= L1_CODE_START) {
-                                dma_memcpy(location16, &tmp, 2);
-                        } else
-                                *location16 = tmp;
+                        pr_err("unsupported relocation: %u (no -mlong-calls?)\n",
+                                mod->name, ELF32_R_TYPE(rel[i].r_info));
+                        return -ENOEXEC;
+
+                default:
+                        pr_err("unknown relocation: %u\n", mod->name,
+                                ELF32_R_TYPE(rel[i].r_info));
+                        return -ENOEXEC;
+                }
+
+                switch (bfin_mem_access_type(location, size)) {
+                case BFIN_MEM_ACCESS_CORE:
+                case BFIN_MEM_ACCESS_CORE_ONLY:
+                        memcpy((void *)location, &value, size);
                         break;
-                case R_BFIN_RIMM16:
-                        *location16 = (value & 0xffff);
+                case BFIN_MEM_ACCESS_DMA:
+                        dma_memcpy((void *)location, &value, size);
                         break;
-                case R_BFIN_BYTE4_DATA:
-                        pr_debug("before %x after %x\n", *location32, value);
-                        *location32 = value;
+                case BFIN_MEM_ACCESS_ITEST:
+                        isram_memcpy((void *)location, &value, size);
                         break;
                 default:
-                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
-                               mod->name, ELF32_R_TYPE(rel[i].r_info));
+                        pr_err("invalid relocation for %#lx\n",
+                                mod->name, location);
                         return -ENOEXEC;
                 }
         }
+
         return 0;
 }
 
@@ -332,22 +304,28 @@ module_finalize(const Elf_Ehdr * hdr,
         for (i = 1; i < hdr->e_shnum; i++) {
                 const char *strtab = (char *)sechdrs[strindex].sh_addr;
                 unsigned int info = sechdrs[i].sh_info;
+                const char *shname = secstrings + sechdrs[i].sh_name;
 
                 /* Not a valid relocation section? */
                 if (info >= hdr->e_shnum)
                         continue;
 
-                if ((sechdrs[i].sh_type == SHT_RELA) &&
-                    ((strcmp(".rela.l2.text", secstrings + sechdrs[i].sh_name) == 0) ||
-                    (strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0) ||
-                    ((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) &&
-                        (hdr->e_flags & (EF_BFIN_CODE_IN_L1|EF_BFIN_CODE_IN_L2))))) {
+                /* Only support RELA relocation types */
+                if (sechdrs[i].sh_type != SHT_RELA)
+                        continue;
+
+                if (!strcmp(".rela.l2.text", shname) ||
+                    !strcmp(".rela.l1.text", shname) ||
+                    (!strcmp(".rela.text", shname) &&
+                         (hdr->e_flags & (EF_BFIN_CODE_IN_L1 | EF_BFIN_CODE_IN_L2)))) {
+
                         err = apply_relocate_add((Elf_Shdr *) sechdrs, strtab,
                                            symindex, i, mod);
                         if (err < 0)
                                 return -ENOEXEC;
                 }
         }
+
         return 0;
 }
 
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 9da36bab7ccb..f5b286189647 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -282,25 +282,19 @@ void finish_atomic_sections (struct pt_regs *regs)
 {
         int __user *up0 = (int __user *)regs->p0;
 
-        if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
-                return;
-
         switch (regs->pc) {
         case ATOMIC_XCHG32 + 2:
                 put_user(regs->r1, up0);
-                regs->pc += 2;
+                regs->pc = ATOMIC_XCHG32 + 4;
                 break;
 
         case ATOMIC_CAS32 + 2:
         case ATOMIC_CAS32 + 4:
                 if (regs->r0 == regs->r1)
+        case ATOMIC_CAS32 + 6:
                         put_user(regs->r2, up0);
                 regs->pc = ATOMIC_CAS32 + 8;
                 break;
-        case ATOMIC_CAS32 + 6:
-                put_user(regs->r2, up0);
-                regs->pc += 2;
-                break;
 
         case ATOMIC_ADD32 + 2:
                 regs->r0 = regs->r1 + regs->r0;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index 6a387eec6b65..30f4828277ad 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -206,6 +206,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 {
         int ret;
         unsigned long __user *datap = (unsigned long __user *)data;
+        void *paddr = (void *)addr;
 
         switch (request) {
                 /* when I and D space are separate, these will need to be fixed. */
@@ -215,42 +216,49 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         case PTRACE_PEEKTEXT:   /* read word at location addr. */
                 {
                         unsigned long tmp = 0;
-                        int copied;
+                        int copied = 0, to_copy = sizeof(tmp);
 
                         ret = -EIO;
-                        pr_debug("ptrace: PEEKTEXT at addr 0x%08lx + %ld\n", addr, sizeof(data));
-                        if (is_user_addr_valid(child, addr, sizeof(tmp)) < 0)
+                        pr_debug("ptrace: PEEKTEXT at addr 0x%08lx + %i\n", addr, to_copy);
+                        if (is_user_addr_valid(child, addr, to_copy) < 0)
                                 break;
                         pr_debug("ptrace: user address is valid\n");
 
-                        if (L1_CODE_LENGTH != 0 && addr >= get_l1_code_start()
-                            && addr + sizeof(tmp) <= get_l1_code_start() + L1_CODE_LENGTH) {
-                                safe_dma_memcpy (&tmp, (const void *)(addr), sizeof(tmp));
-                                copied = sizeof(tmp);
-
-                        } else if (L1_DATA_A_LENGTH != 0 && addr >= L1_DATA_A_START
-                            && addr + sizeof(tmp) <= L1_DATA_A_START + L1_DATA_A_LENGTH) {
-                                memcpy(&tmp, (const void *)(addr), sizeof(tmp));
-                                copied = sizeof(tmp);
-
-                        } else if (L1_DATA_B_LENGTH != 0 && addr >= L1_DATA_B_START
-                            && addr + sizeof(tmp) <= L1_DATA_B_START + L1_DATA_B_LENGTH) {
-                                memcpy(&tmp, (const void *)(addr), sizeof(tmp));
-                                copied = sizeof(tmp);
-
-                        } else if (addr >= FIXED_CODE_START
-                            && addr + sizeof(tmp) <= FIXED_CODE_END) {
-                                copy_from_user_page(0, 0, 0, &tmp, (const void *)(addr), sizeof(tmp));
-                                copied = sizeof(tmp);
-
-                        } else
+                        switch (bfin_mem_access_type(addr, to_copy)) {
+                        case BFIN_MEM_ACCESS_CORE:
+                        case BFIN_MEM_ACCESS_CORE_ONLY:
                                 copied = access_process_vm(child, addr, &tmp,
-                                                           sizeof(tmp), 0);
+                                                           to_copy, 0);
+                                if (copied)
+                                        break;
+
+                                /* hrm, why didn't that work ... maybe no mapping */
+                                if (addr >= FIXED_CODE_START &&
+                                    addr + to_copy <= FIXED_CODE_END) {
+                                        copy_from_user_page(0, 0, 0, &tmp, paddr, to_copy);
+                                        copied = to_copy;
+                                } else if (addr >= BOOT_ROM_START) {
+                                        memcpy(&tmp, paddr, to_copy);
+                                        copied = to_copy;
+                                }
 
-                        pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp);
-                        if (copied != sizeof(tmp))
                                 break;
-                        ret = put_user(tmp, datap);
+                        case BFIN_MEM_ACCESS_DMA:
+                                if (safe_dma_memcpy(&tmp, paddr, to_copy))
+                                        copied = to_copy;
+                                break;
+                        case BFIN_MEM_ACCESS_ITEST:
+                                if (isram_memcpy(&tmp, paddr, to_copy))
+                                        copied = to_copy;
+                                break;
+                        default:
+                                copied = 0;
+                                break;
+                        }
+
+                        pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp);
+                        if (copied == to_copy)
+                                ret = put_user(tmp, datap);
                         break;
                 }
 
@@ -277,9 +285,9 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                 tmp = child->mm->start_data;
 #ifdef CONFIG_BINFMT_ELF_FDPIC
                         } else if (addr == (sizeof(struct pt_regs) + 12)) {
-                                tmp = child->mm->context.exec_fdpic_loadmap;
+                                goto case_PTRACE_GETFDPIC_EXEC;
                         } else if (addr == (sizeof(struct pt_regs) + 16)) {
-                                tmp = child->mm->context.interp_fdpic_loadmap;
+                                goto case_PTRACE_GETFDPIC_INTERP;
 #endif
                         } else {
                                 tmp = get_reg(child, addr);
@@ -288,49 +296,78 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         break;
                 }
 
+#ifdef CONFIG_BINFMT_ELF_FDPIC
+        case PTRACE_GETFDPIC: {
+                unsigned long tmp = 0;
+
+                switch (addr) {
+                case_PTRACE_GETFDPIC_EXEC:
+                case PTRACE_GETFDPIC_EXEC:
+                        tmp = child->mm->context.exec_fdpic_loadmap;
+                        break;
+                case_PTRACE_GETFDPIC_INTERP:
+                case PTRACE_GETFDPIC_INTERP:
+                        tmp = child->mm->context.interp_fdpic_loadmap;
+                        break;
+                default:
+                        break;
+                }
+
+                ret = put_user(tmp, datap);
+                break;
+        }
+#endif
+
                 /* when I and D space are separate, this will have to be fixed. */
         case PTRACE_POKEDATA:
                 pr_debug("ptrace: PTRACE_PEEKDATA\n");
                 /* fall through */
         case PTRACE_POKETEXT:   /* write the word at location addr. */
                 {
-                        int copied;
+                        int copied = 0, to_copy = sizeof(data);
 
                         ret = -EIO;
-                        pr_debug("ptrace: POKETEXT at addr 0x%08lx + %ld bytes %lx\n",
-                                 addr, sizeof(data), data);
-                        if (is_user_addr_valid(child, addr, sizeof(data)) < 0)
+                        pr_debug("ptrace: POKETEXT at addr 0x%08lx + %i bytes %lx\n",
+                                 addr, to_copy, data);
+                        if (is_user_addr_valid(child, addr, to_copy) < 0)
                                 break;
                         pr_debug("ptrace: user address is valid\n");
 
-                        if (L1_CODE_LENGTH != 0 && addr >= get_l1_code_start()
-                            && addr + sizeof(data) <= get_l1_code_start() + L1_CODE_LENGTH) {
-                                safe_dma_memcpy ((void *)(addr), &data, sizeof(data));
-                                copied = sizeof(data);
-
-                        } else if (L1_DATA_A_LENGTH != 0 && addr >= L1_DATA_A_START
-                            && addr + sizeof(data) <= L1_DATA_A_START + L1_DATA_A_LENGTH) {
-                                memcpy((void *)(addr), &data, sizeof(data));
-                                copied = sizeof(data);
-
-                        } else if (L1_DATA_B_LENGTH != 0 && addr >= L1_DATA_B_START
-                            && addr + sizeof(data) <= L1_DATA_B_START + L1_DATA_B_LENGTH) {
-                                memcpy((void *)(addr), &data, sizeof(data));
-                                copied = sizeof(data);
-
-                        } else if (addr >= FIXED_CODE_START
-                            && addr + sizeof(data) <= FIXED_CODE_END) {
-                                copy_to_user_page(0, 0, 0, (void *)(addr), &data, sizeof(data));
-                                copied = sizeof(data);
-
-                        } else
+                        switch (bfin_mem_access_type(addr, to_copy)) {
+                        case BFIN_MEM_ACCESS_CORE:
+                        case BFIN_MEM_ACCESS_CORE_ONLY:
                                 copied = access_process_vm(child, addr, &data,
-                                                           sizeof(data), 1);
+                                                           to_copy, 0);
+                                if (copied)
+                                        break;
+
+                                /* hrm, why didn't that work ... maybe no mapping */
+                                if (addr >= FIXED_CODE_START &&
+                                    addr + to_copy <= FIXED_CODE_END) {
+                                        copy_to_user_page(0, 0, 0, paddr, &data, to_copy);
+                                        copied = to_copy;
+                                } else if (addr >= BOOT_ROM_START) {
+                                        memcpy(paddr, &data, to_copy);
+                                        copied = to_copy;
+                                }
 
-                        pr_debug("ptrace: copied size %d\n", copied);
-                        if (copied != sizeof(data))
                                 break;
-                        ret = 0;
+                        case BFIN_MEM_ACCESS_DMA:
+                                if (safe_dma_memcpy(paddr, &data, to_copy))
+                                        copied = to_copy;
+                                break;
+                        case BFIN_MEM_ACCESS_ITEST:
+                                if (isram_memcpy(paddr, &data, to_copy))
+                                        copied = to_copy;
+                                break;
+                        default:
+                                copied = 0;
+                                break;
+                        }
+
+                        pr_debug("ptrace: copied size %d\n", copied);
+                        if (copied == to_copy)
+                                ret = 0;
                         break;
                 }
 
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 6225edae488e..369535b61ed1 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -112,7 +112,7 @@ void __cpuinit bfin_setup_caches(unsigned int cpu)
         /*
          * In cache coherence emulation mode, we need to have the
          * D-cache enabled before running any atomic operation which
-         * might invove cache invalidation (i.e. spinlock, rwlock).
+         * might involve cache invalidation (i.e. spinlock, rwlock).
          * So printk's are deferred until then.
          */
 #ifdef CONFIG_BFIN_ICACHE
@@ -187,6 +187,8 @@ void __init bfin_relocate_l1_mem(void)
         unsigned long l1_data_b_length;
         unsigned long l2_length;
 
+        early_shadow_stamp();
+
         /*
          * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
          * we know that everything about l1 text/data is nice and aligned,
@@ -511,6 +513,7 @@ static __init void memory_setup(void)
 #ifdef CONFIG_MTD_UCLINUX
         unsigned long mtd_phys = 0;
 #endif
+        unsigned long max_mem;
 
         _rambase = (unsigned long)_stext;
         _ramstart = (unsigned long)_end;
@@ -520,7 +523,22 @@ static __init void memory_setup(void)
                 panic("DMA region exceeds memory limit: %lu.",
                         _ramend - _ramstart);
         }
-        memory_end = _ramend - DMA_UNCACHED_REGION;
+        max_mem = memory_end = _ramend - DMA_UNCACHED_REGION;
+
+#if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
+        /* Due to a Hardware Anomaly we need to limit the size of usable
+         * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
+         * 05000263 - Hardware loop corrupted when taking an ICPLB exception
+         */
+# if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
+        if (max_mem >= 56 * 1024 * 1024)
+                max_mem = 56 * 1024 * 1024;
+# else
+        if (max_mem >= 60 * 1024 * 1024)
+                max_mem = 60 * 1024 * 1024;
+# endif                         /* CONFIG_DEBUG_HUNT_FOR_ZERO */
+#endif                          /* ANOMALY_05000263 */
+
 
 #ifdef CONFIG_MPU
         /* Round up to multiple of 4MB */
@@ -549,22 +567,16 @@ static __init void memory_setup(void)
 
 # if defined(CONFIG_ROMFS_FS)
         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
-            && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
+            && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) {
                 mtd_size =
                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
-#  if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
-        /* Due to a Hardware Anomaly we need to limit the size of usable
-         * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
-         * 05000263 - Hardware loop corrupted when taking an ICPLB exception
-         */
-#   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
-        if (memory_end >= 56 * 1024 * 1024)
-                memory_end = 56 * 1024 * 1024;
-#   else
-        if (memory_end >= 60 * 1024 * 1024)
-                memory_end = 60 * 1024 * 1024;
-#   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
-#  endif                                /* ANOMALY_05000263 */
+
+                /* ROM_FS is XIP, so if we found it, we need to limit memory */
+                if (memory_end > max_mem) {
+                        pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem >> 20);
+                        memory_end = max_mem;
+                }
+        }
 # endif                         /* CONFIG_ROMFS_FS */
 
         /* Since the default MTD_UCLINUX has no magic number, we just blindly
@@ -586,20 +598,14 @@ static __init void memory_setup(void)
         }
 #endif                          /* CONFIG_MTD_UCLINUX */
 
-#if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
-        /* Due to a Hardware Anomaly we need to limit the size of usable
-         * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
-         * 05000263 - Hardware loop corrupted when taking an ICPLB exception
+        /* We need lo limit memory, since everything could have a text section
+         * of userspace in it, and expose anomaly 05000263. If the anomaly
+         * doesn't exist, or we don't need to - then dont.
          */
-#if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
-        if (memory_end >= 56 * 1024 * 1024)
-                memory_end = 56 * 1024 * 1024;
-#else
-        if (memory_end >= 60 * 1024 * 1024)
-                memory_end = 60 * 1024 * 1024;
-#endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
-        printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
-#endif                          /* ANOMALY_05000263 */
+        if (memory_end > max_mem) {
+                pr_info("Limiting kernel memory to %liMB due to anomaly 05000263\n", max_mem >> 20);
+                memory_end = max_mem;
+        }
 
 #ifdef CONFIG_MPU
         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
@@ -693,7 +699,7 @@ static __init void setup_bootmem_allocator(void)
         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
         print_memory_map("boot memmap");
 
-        /* intialize globals in linux/bootmem.h */
+        /* initialize globals in linux/bootmem.h */
         find_min_max_pfn();
         /* pfn of the last usable page frame */
         if (max_pfn > memory_end >> PAGE_SHIFT)
@@ -806,6 +812,8 @@ void __init setup_arch(char **cmdline_p)
 {
         unsigned long sclk, cclk;
 
+        enable_shadow_console();
+
         /* Check to make sure we are running on the right processor */
         if (unlikely(CPUID != bfin_cpuid()))
                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
@@ -1230,57 +1238,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 #ifdef __ARCH_SYNC_CORE_ICACHE
         seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
 #endif
-#ifdef CONFIG_BFIN_ICACHE_LOCK
-        switch ((cpudata->imemctl >> 3) & WAYALL_L) {
-        case WAY0_L:
-                seq_printf(m, "Way0 Locked-Down\n");
-                break;
-        case WAY1_L:
-                seq_printf(m, "Way1 Locked-Down\n");
-                break;
-        case WAY01_L:
-                seq_printf(m, "Way0,Way1 Locked-Down\n");
-                break;
-        case WAY2_L:
-                seq_printf(m, "Way2 Locked-Down\n");
-                break;
-        case WAY02_L:
-                seq_printf(m, "Way0,Way2 Locked-Down\n");
-                break;
-        case WAY12_L:
-                seq_printf(m, "Way1,Way2 Locked-Down\n");
-                break;
-        case WAY012_L:
-                seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
-                break;
-        case WAY3_L:
-                seq_printf(m, "Way3 Locked-Down\n");
-                break;
-        case WAY03_L:
-                seq_printf(m, "Way0,Way3 Locked-Down\n");
-                break;
-        case WAY13_L:
-                seq_printf(m, "Way1,Way3 Locked-Down\n");
-                break;
-        case WAY013_L:
-                seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
-                break;
-        case WAY32_L:
-                seq_printf(m, "Way3,Way2 Locked-Down\n");
-                break;
-        case WAY320_L:
-                seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
-                break;
-        case WAY321_L:
-                seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
-                break;
-        case WAYALL_L:
-                seq_printf(m, "All Ways are locked\n");
-                break;
-        default:
-                seq_printf(m, "No Ways are locked\n");
-        }
-#endif
 
         if (cpu_num != num_possible_cpus() - 1)
                 return 0;
@@ -1346,6 +1303,7 @@ const struct seq_operations cpuinfo_op = {
 
 void __init cmdline_init(const char *r0)
 {
+        early_shadow_stamp();
         if (r0)
                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
 }
diff --git a/arch/blackfin/kernel/shadow_console.c b/arch/blackfin/kernel/shadow_console.c
new file mode 100644
index 000000000000..8b8c7107a162
--- /dev/null
+++ b/arch/blackfin/kernel/shadow_console.c
@@ -0,0 +1,113 @@
+/*
+ * manage a small early shadow of the log buffer which we can pass between the
+ * bootloader so early crash messages are communicated properly and easily
+ *
+ * Copyright 2009 Analog Devices Inc.
+ *
+ * Enter bugs at http://blackfin.uclinux.org/
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/string.h>
+#include <asm/blackfin.h>
+#include <asm/irq_handler.h>
+#include <asm/early_printk.h>
+
+#define SHADOW_CONSOLE_START            (0x500)
+#define SHADOW_CONSOLE_END              (0x1000)
+#define SHADOW_CONSOLE_MAGIC_LOC        (0x4F0)
+#define SHADOW_CONSOLE_MAGIC            (0xDEADBEEF)
+
+static __initdata char *shadow_console_buffer = (char *)SHADOW_CONSOLE_START;
+
+__init void early_shadow_write(struct console *con, const char *s,
+                                unsigned int n)
+{
+        unsigned int i;
+        /*
+         * save 2 bytes for the double null at the end
+         * once we fail on a long line, make sure we don't write a short line afterwards
+         */
+        if ((shadow_console_buffer + n) <= (char *)(SHADOW_CONSOLE_END - 2)) {
+                /* can't use memcpy - it may not be relocated yet */
+                for (i = 0; i <= n; i++)
+                        shadow_console_buffer[i] = s[i];
+                shadow_console_buffer += n;
+                shadow_console_buffer[0] = 0;
+                shadow_console_buffer[1] = 0;
+        } else
+                shadow_console_buffer = (char *)SHADOW_CONSOLE_END;
+}
+
+static __initdata struct console early_shadow_console = {
+        .name = "early_shadow",
+        .write = early_shadow_write,
+        .flags = CON_BOOT | CON_PRINTBUFFER,
+        .index = -1,
+        .device = 0,
+};
+
+__init int shadow_console_enabled(void)
+{
+        return early_shadow_console.flags & CON_ENABLED;
+}
+
+__init void mark_shadow_error(void)
+{
+        int *loc = (int *)SHADOW_CONSOLE_MAGIC_LOC;
+        loc[0] = SHADOW_CONSOLE_MAGIC;
+        loc[1] = SHADOW_CONSOLE_START;
+}
+
+__init void enable_shadow_console(void)
+{
+        if (!shadow_console_enabled()) {
+                register_console(&early_shadow_console);
+                /* for now, assume things are going to fail */
+                mark_shadow_error();
+        }
+}
+
+static __init int disable_shadow_console(void)
+{
+        /*
+         * by the time pure_initcall runs, the standard console is enabled,
+         * and the early_console is off, so unset the magic numbers
+         * unregistering the console is taken care of in common code (See
+         * ./kernel/printk:disable_boot_consoles() )
+         */
+        int *loc = (int *)SHADOW_CONSOLE_MAGIC_LOC;
+
+        loc[0] = 0;
+
+        return 0;
+}
+pure_initcall(disable_shadow_console);
+
+/*
+ * since we can't use printk, dump numbers (as hex), n = # bits
+ */
+__init void early_shadow_reg(unsigned long reg, unsigned int n)
+{
+        /*
+         * can't use any "normal" kernel features, since thay
+         * may not be relocated to their execute address yet
+         */
+        int i;
+        char ascii[11] = " 0x";
+
+        n = n / 4;
+        reg = reg << ((8 - n) * 4);
+        n += 3;
+
+        for (i = 3; i <= n ; i++) {
+                ascii[i] = hex_asc_lo(reg >> 28);
+                reg <<= 4;
+        }
+        early_shadow_write(NULL, ascii, n);
+
+}
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 0791eba40d9f..f9715764383e 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -66,7 +66,7 @@ static cycle_t bfin_read_cycles(struct clocksource *cs)
 
 static struct clocksource bfin_cs_cycles = {
         .name           = "bfin_cs_cycles",
-        .rating         = 350,
+        .rating         = 400,
         .read           = bfin_read_cycles,
         .mask           = CLOCKSOURCE_MASK(64),
         .shift          = 22,
@@ -115,7 +115,7 @@ static cycle_t bfin_read_gptimer0(void)
 
 static struct clocksource bfin_cs_gptimer0 = {
         .name           = "bfin_cs_gptimer0",
-        .rating         = 400,
+        .rating         = 350,
         .read           = bfin_read_gptimer0,
         .mask           = CLOCKSOURCE_MASK(32),
         .shift          = 22,
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index bf2b2d1f8ae5..56464cb8edf3 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -100,7 +100,11 @@ static void decode_address(char *buf, unsigned long address)
         char *modname;
         char *delim = ":";
         char namebuf[128];
+#endif
+
+        buf += sprintf(buf, "<0x%08lx> ", address);
 
+#ifdef CONFIG_KALLSYMS
         /* look up the address and see if we are in kernel space */
         symname = kallsyms_lookup(address, &symsize, &offset, &modname, namebuf);
 
@@ -108,23 +112,33 @@ static void decode_address(char *buf, unsigned long address)
                 /* yeah! kernel space! */
                 if (!modname)
                         modname = delim = "";
-                sprintf(buf, "<0x%p> { %s%s%s%s + 0x%lx }",
-                              (void *)address, delim, modname, delim, symname,
-                              (unsigned long)offset);
+                sprintf(buf, "{ %s%s%s%s + 0x%lx }",
+                        delim, modname, delim, symname,
+                        (unsigned long)offset);
                 return;
-
         }
 #endif
 
-        /* Problem in fixed code section? */
         if (address >= FIXED_CODE_START && address < FIXED_CODE_END) {
-                sprintf(buf, "<0x%p> /* Maybe fixed code section */", (void *)address);
+                /* Problem in fixed code section? */
+                strcat(buf, "/* Maybe fixed code section */");
+                return;
+
+        } else if (address < CONFIG_BOOT_LOAD) {
+                /* Problem somewhere before the kernel start address */
+                strcat(buf, "/* Maybe null pointer? */");
+                return;
+
+        } else if (address >= COREMMR_BASE) {
+                strcat(buf, "/* core mmrs */");
                 return;
-        }
 
-        /* Problem somewhere before the kernel start address */
-        if (address < CONFIG_BOOT_LOAD) {
-                sprintf(buf, "<0x%p> /* Maybe null pointer? */", (void *)address);
+        } else if (address >= SYSMMR_BASE) {
+                strcat(buf, "/* system mmrs */");
+                return;
+
+        } else if (address >= L1_ROM_START && address < L1_ROM_START + L1_ROM_LENGTH) {
+                strcat(buf, "/* on-chip L1 ROM */");
                 return;
         }
 
@@ -172,18 +186,16 @@ static void decode_address(char *buf, unsigned long address)
                                                 offset = (address - vma->vm_start) +
                                                          (vma->vm_pgoff << PAGE_SHIFT);
 
-                                        sprintf(buf, "<0x%p> [ %s + 0x%lx ]",
-                                                (void *)address, name, offset);
+                                        sprintf(buf, "[ %s + 0x%lx ]", name, offset);
                                 } else
-                                        sprintf(buf, "<0x%p> [ %s vma:0x%lx-0x%lx]",
-                                                (void *)address, name,
-                                                vma->vm_start, vma->vm_end);
+                                        sprintf(buf, "[ %s vma:0x%lx-0x%lx]",
+                                                name, vma->vm_start, vma->vm_end);
 
                                 if (!in_atomic)
                                         mmput(mm);
 
-                                if (!strlen(buf))
-                                        sprintf(buf, "<0x%p> [ %s ] dynamic memory", (void *)address, name);
+                                if (buf[0] == '\0')
+                                        sprintf(buf, "[ %s ] dynamic memory", name);
 
                                 goto done;
                         }
@@ -193,7 +205,7 @@ static void decode_address(char *buf, unsigned long address)
         }
 
         /* we were unable to find this address anywhere */
-        sprintf(buf, "<0x%p> /* kernel dynamic memory */", (void *)address);
+        sprintf(buf, "/* kernel dynamic memory */");
 
 done:
         write_unlock_irqrestore(&tasklist_lock, flags);
@@ -215,14 +227,14 @@ asmlinkage void double_fault_c(struct pt_regs *fp)
         printk(KERN_EMERG "Double Fault\n");
 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
         if (((long)fp->seqstat &  SEQSTAT_EXCAUSE) == VEC_UNCOV) {
-                unsigned int cpu = smp_processor_id();
+                unsigned int cpu = raw_smp_processor_id();
                 char buf[150];
-                decode_address(buf, cpu_pda[cpu].retx);
+                decode_address(buf, cpu_pda[cpu].retx_doublefault);
                 printk(KERN_EMERG "While handling exception (EXCAUSE = 0x%x) at %s:\n",
-                        (unsigned int)cpu_pda[cpu].seqstat & SEQSTAT_EXCAUSE, buf);
-                decode_address(buf, cpu_pda[cpu].dcplb_fault_addr);
+                        (unsigned int)cpu_pda[cpu].seqstat_doublefault & SEQSTAT_EXCAUSE, buf);
+                decode_address(buf, cpu_pda[cpu].dcplb_doublefault_addr);
                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %s\n", buf);
-                decode_address(buf, cpu_pda[cpu].icplb_fault_addr);
+                decode_address(buf, cpu_pda[cpu].icplb_doublefault_addr);
                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %s\n", buf);
 
                 decode_address(buf, fp->retx);
@@ -245,13 +257,13 @@ static int kernel_mode_regs(struct pt_regs *regs)
         return regs->ipend & 0xffc0;
 }
 
-asmlinkage void trap_c(struct pt_regs *fp)
+asmlinkage notrace void trap_c(struct pt_regs *fp)
 {
 #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
         int j;
 #endif
 #ifdef CONFIG_DEBUG_HUNT_FOR_ZERO
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu = raw_smp_processor_id();
 #endif
         const char *strerror = NULL;
         int sig = 0;
@@ -267,11 +279,6 @@ asmlinkage void trap_c(struct pt_regs *fp)
          * double faults if the stack has become corrupt
          */
 
-#ifndef CONFIG_KGDB
-        /* IPEND is skipped if KGDB isn't enabled (see entry code) */
-        fp->ipend = bfin_read_IPEND();
-#endif
-
         /* trap_c() will be called for exceptions. During exceptions
          * processing, the pc value should be set with retx value.
          * With this change we can cleanup some code in signal.c- TODO
@@ -404,7 +411,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
         /* 0x23 - Data CPLB protection violation, handled here */
         case VEC_CPLB_VL:
                 info.si_code = ILL_CPLB_VI;
-                sig = SIGBUS;
+                sig = SIGSEGV;
                 strerror = KERN_NOTICE EXC_0x23(KERN_NOTICE);
                 CHK_DEBUGGER_TRAP_MAYBE();
                 break;
@@ -904,7 +911,7 @@ void show_stack(struct task_struct *task, unsigned long *stack)
                 frame_no = 0;
 
                 for (addr = (unsigned int *)((unsigned int)stack & ~0xF), i = 0;
-                     addr <= endstack; addr++, i++) {
+                     addr < endstack; addr++, i++) {
 
                         ret_addr = 0;
                         if (!j && i % 8 == 0)
@@ -949,6 +956,7 @@ void show_stack(struct task_struct *task, unsigned long *stack)
         }
 #endif
 }
+EXPORT_SYMBOL(show_stack);
 
 void dump_stack(void)
 {
@@ -1090,7 +1098,7 @@ void show_regs(struct pt_regs *fp)
         struct irqaction *action;
         unsigned int i;
         unsigned long flags = 0;
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu = raw_smp_processor_id();
         unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
 
         verbose_printk(KERN_NOTICE "\n");
@@ -1116,10 +1124,16 @@ void show_regs(struct pt_regs *fp)
 
         verbose_printk(KERN_NOTICE "%s", linux_banner);
 
-        verbose_printk(KERN_NOTICE "\nSEQUENCER STATUS:\t\t%s\n",
-                       print_tainted());
-        verbose_printk(KERN_NOTICE " SEQSTAT: %08lx  IPEND: %04lx  SYSCFG: %04lx\n",
-                       (long)fp->seqstat, fp->ipend, fp->syscfg);
+        verbose_printk(KERN_NOTICE "\nSEQUENCER STATUS:\t\t%s\n", print_tainted());
+        verbose_printk(KERN_NOTICE " SEQSTAT: %08lx  IPEND: %04lx  IMASK: %04lx  SYSCFG: %04lx\n",
+                (long)fp->seqstat, fp->ipend, cpu_pda[raw_smp_processor_id()].ex_imask, fp->syscfg);
+        if (fp->ipend & EVT_IRPTEN)
+                verbose_printk(KERN_NOTICE "  Global Interrupts Disabled (IPEND[4])\n");
+        if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG13 | EVT_IVG12 | EVT_IVG11 |
+                        EVT_IVG10 | EVT_IVG9 | EVT_IVG8 | EVT_IVG7 | EVT_IVTMR)))
+                verbose_printk(KERN_NOTICE "  Peripheral interrupts masked off\n");
+        if (!(cpu_pda[raw_smp_processor_id()].ex_imask & (EVT_IVG15 | EVT_IVG14)))
+                verbose_printk(KERN_NOTICE "  Kernel interrupts masked off\n");
         if ((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR) {
                 verbose_printk(KERN_NOTICE "  HWERRCAUSE: 0x%lx\n",
                         (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14);
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index d7ffe299b979..ffd90fbbc8f9 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -96,8 +96,7 @@ SECTIONS
         {
                 __sdata = .;
                 /* This gets done first, so the glob doesn't suck it in */
-                . = ALIGN(32);
-                *(.data.cacheline_aligned)
+                CACHELINE_ALIGNED_DATA(32)
 
 #if !L1_DATA_A_LENGTH
                 . = ALIGN(32);
@@ -116,12 +115,7 @@ SECTIONS
                 DATA_DATA
                 CONSTRUCTORS
 
-                /* make sure the init_task is aligned to the
-                 * kernel thread size so we can locate the kernel
-                 * stack properly and quickly.
-                 */
-                . = ALIGN(THREAD_SIZE);
-                *(.init_task.data)
+                INIT_TASK_DATA(THREAD_SIZE)
 
                 __edata = .;
         }
@@ -134,39 +128,10 @@ SECTIONS
         . = ALIGN(PAGE_SIZE);
         ___init_begin = .;
 
-        .init.text :
-        {
-                . = ALIGN(PAGE_SIZE);
-                __sinittext = .;
-                INIT_TEXT
-                __einittext = .;
-        }
-        .init.data :
-        {
-                . = ALIGN(16);
-                INIT_DATA
-        }
-        .init.setup :
-        {
-                . = ALIGN(16);
-                ___setup_start = .;
-                *(.init.setup)
-                ___setup_end = .;
-        }
-        .initcall.init :
-        {
-                ___initcall_start = .;
-                INITCALLS
-                ___initcall_end = .;
-        }
-        .con_initcall.init :
-        {
-                ___con_initcall_start = .;
-                *(.con_initcall.init)
-                ___con_initcall_end = .;
-        }
+        INIT_TEXT_SECTION(PAGE_SIZE)
+        . = ALIGN(16);
+        INIT_DATA_SECTION(16)
         PERCPU(4)
-        SECURITY_INIT
 
         /* we have to discard exit text and such at runtime, not link time, to
          * handle embedded cross-section references (alt instructions, bug
@@ -181,18 +146,9 @@ SECTIONS
                 EXIT_DATA
         }
 
-        .init.ramfs :
-        {
-                . = ALIGN(4);
-                ___initramfs_start = .;
-                *(.init.ramfs)
-                . = ALIGN(4);
-                ___initramfs_end = .;
-        }
-
         __l1_lma_start = .;
 
-        .text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
+        .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
         {
                 . = ALIGN(4);
                 __stext_l1 = .;
@@ -221,7 +177,7 @@ SECTIONS
                 . = ALIGN(4);
                 __ebss_l1 = .;
         }
-        ASSERT (SIZEOF(.data_a_l1) <= L1_DATA_A_LENGTH, "L1 data A overflow!")
+        ASSERT (SIZEOF(.data_l1) <= L1_DATA_A_LENGTH, "L1 data A overflow!")
 
         .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
         {
@@ -262,7 +218,7 @@ SECTIONS
                 . = ALIGN(4);
                 __ebss_l2 = .;
         }
-        ASSERT (SIZEOF(.text_data_l1) <= L2_LENGTH, "L2 overflow!")
+        ASSERT (SIZEOF(.text_data_l2) <= L2_LENGTH, "L2 overflow!")
 
         /* Force trailing alignment of our init section so that when we
          * free our init memory, we don't leave behind a partial page.
diff --git a/arch/blackfin/lib/ins.S b/arch/blackfin/lib/ins.S
index 1863a6ba507c..3edbd8db6598 100644
--- a/arch/blackfin/lib/ins.S
+++ b/arch/blackfin/lib/ins.S
@@ -16,7 +16,7 @@
         [--sp] = rets; \
         [--sp] = (P5:0); \
         sp += -12; \
-        call ___ipipe_stall_root_raw; \
+        call ___ipipe_disable_root_irqs_hw; \
         sp += 12; \
         (P5:0) = [sp++];
 # define CLI_INNER_NOP
@@ -28,7 +28,7 @@
 #ifdef CONFIG_IPIPE
 # define DO_STI \
         sp += -12; \
-        call ___ipipe_unstall_root_raw; \
+        call ___ipipe_enable_root_irqs_hw; \
         sp += 12; \
 2:      rets = [sp++];
 #else
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 809be268e42d..03e4a9941f01 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -199,15 +199,6 @@ static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-        .ctl_reg        = 0x4, /* send zero */
-        .enable_dma     = 0,
-        .bits_per_word  = 8,
-        .cs_change_per_word = 1,
-};
-#endif
-
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
         .enable_dma = 0,
@@ -296,24 +287,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_MODE_3,
         },
 #endif
-#if defined(CONFIG_PBX)
-        {
-                .modalias = "fxs-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J11_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-        {
-                .modalias = "fxo-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J19_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-#endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
         {
                 .modalias               = "ad7877",
@@ -539,7 +512,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
 #endif
-#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
                 .irq = IRQ_PF8,
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h
index 753ed810e1c6..e9c65390edd1 100644
--- a/arch/blackfin/mach-bf518/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h
@@ -124,6 +124,7 @@
 #define ANOMALY_05000386 (0)
 #define ANOMALY_05000389 (0)
 #define ANOMALY_05000400 (0)
+#define ANOMALY_05000402 (0)
 #define ANOMALY_05000412 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000447 (0)
diff --git a/arch/blackfin/mach-bf518/include/mach/blackfin.h b/arch/blackfin/mach-bf518/include/mach/blackfin.h
index e8e14c2769ed..83421d393148 100644
--- a/arch/blackfin/mach-bf518/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf518/include/mach/blackfin.h
@@ -68,11 +68,6 @@
 #endif
 #endif
 
-/* UART_IIR Register */
-#define STATUS(x)       ((x << 1) & 0x06)
-#define STATUS_P1       0x02
-#define STATUS_P0       0x01
-
 #define BFIN_UART_NR_PORTS      2
 
 #define OFFSET_THR              0x00    /* Transmit Holding register            */
@@ -88,11 +83,6 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
 
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
 /* PLL_DIV Masks                                                                                                        */
 #define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
 #define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index b09484f538f4..08a3f01c9886 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -151,46 +151,6 @@ static struct platform_device musb_device = {
 };
 #endif
 
-#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
-static struct mtd_partition ezkit_partitions[] = {
-        {
-                .name       = "bootloader(nor)",
-                .size       = 0x40000,
-                .offset     = 0,
-        }, {
-                .name       = "linux kernel(nor)",
-                .size       = 0x1C0000,
-                .offset     = MTDPART_OFS_APPEND,
-        }, {
-                .name       = "file system(nor)",
-                .size       = MTDPART_SIZ_FULL,
-                .offset     = MTDPART_OFS_APPEND,
-        }
-};
-
-static struct physmap_flash_data ezkit_flash_data = {
-        .width      = 2,
-        .parts      = ezkit_partitions,
-        .nr_parts   = ARRAY_SIZE(ezkit_partitions),
-};
-
-static struct resource ezkit_flash_resource = {
-        .start = 0x20000000,
-        .end   = 0x201fffff,
-        .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device ezkit_flash_device = {
-        .name          = "physmap-flash",
-        .id            = 0,
-        .dev = {
-                .platform_data = &ezkit_flash_data,
-        },
-        .num_resources = 1,
-        .resource      = &ezkit_flash_resource,
-};
-#endif
-
 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 static struct mtd_partition partition_info[] = {
         {
@@ -275,6 +235,14 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -293,6 +261,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -300,10 +271,15 @@ static struct platform_device smc91x_device = {
 static struct resource dm9000_resources[] = {
         [0] = {
                 .start  = 0x203FB800,
-                .end    = 0x203FB800 + 8,
+                .end    = 0x203FB800 + 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
+                .start  = 0x203FB804,
+                .end    = 0x203FB804 + 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
                 .start  = IRQ_PF9,
                 .end    = IRQ_PF9,
                 .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
@@ -479,13 +455,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-        .enable_dma = 0,
-        .bits_per_word = 16,
-};
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
         .enable_dma = 0,
@@ -493,15 +462,6 @@ static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-        .ctl_reg        = 0x4, /* send zero */
-        .enable_dma     = 0,
-        .bits_per_word  = 8,
-        .cs_change_per_word = 1,
-};
-#endif
-
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
         .enable_dma = 0,
@@ -568,22 +528,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
                 .controller_data = &ad1836_spi_chip_info,
         },
 #endif
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-        {
-                .modalias = "ad9960-spi",
-                .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 1,
-                .controller_data = &ad9960_spi_chip_info,
-        },
-#endif
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
@@ -594,24 +545,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_MODE_3,
         },
 #endif
-#if defined(CONFIG_PBX)
-        {
-                .modalias = "fxs-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J11_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-        {
-                .modalias = "fxo-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J19_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-#endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
         {
                 .modalias               = "ad7877",
@@ -689,6 +622,55 @@ static struct platform_device bfin_fb_adv7393_device = {
 };
 #endif
 
+#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
+static struct mtd_partition cm_partitions[] = {
+        {
+                .name   = "bootloader(nor)",
+                .size   = 0x40000,
+                .offset = 0,
+        }, {
+                .name   = "linux kernel(nor)",
+                .size   = 0x100000,
+                .offset = MTDPART_OFS_APPEND,
+        }, {
+                .name   = "file system(nor)",
+                .size   = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data cm_flash_data = {
+        .width    = 2,
+        .parts    = cm_partitions,
+        .nr_parts = ARRAY_SIZE(cm_partitions),
+};
+
+static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
+
+static struct resource cm_flash_resource[] = {
+        {
+                .name  = "cfi_probe",
+                .start = 0x20000000,
+                .end   = 0x201fffff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = (unsigned long)cm_flash_gpios,
+                .end   = ARRAY_SIZE(cm_flash_gpios),
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static struct platform_device cm_flash_device = {
+        .name          = "gpio-addr-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &cm_flash_data,
+        },
+        .num_resources = ARRAY_SIZE(cm_flash_resource),
+        .resource      = cm_flash_resource,
+};
+#endif
+
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
 #ifdef CONFIG_SERIAL_BFIN_UART0
@@ -796,13 +778,11 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
-                .type = "pcf8574_lcd",
         },
 #endif
-#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
-                .type = "pcf8574_keypad",
                 .irq = IRQ_PF8,
         },
 #endif
@@ -876,7 +856,7 @@ static struct platform_device bfin_dpmc = {
         },
 };
 
-static struct platform_device *stamp_devices[] __initdata = {
+static struct platform_device *cmbf527_devices[] __initdata = {
 
         &bfin_dpmc,
 
@@ -959,8 +939,8 @@ static struct platform_device *stamp_devices[] __initdata = {
         &bfin_device_gpiokeys,
 #endif
 
-#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
-        &ezkit_flash_device,
+#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
+        &cm_flash_device,
 #endif
 
         &bfin_gpios_device,
@@ -971,7 +951,7 @@ static int __init cm_init(void)
         printk(KERN_INFO "%s(): registering device resources\n", __func__);
         i2c_register_board_info(0, bfin_i2c_board_info,
                                 ARRAY_SIZE(bfin_i2c_board_info));
-        platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
+        platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
         return 0;
 }
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index 2ad68cd10ae6..68b4c804364c 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -263,15 +263,6 @@ static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-        .ctl_reg        = 0x4, /* send zero */
-        .enable_dma     = 0,
-        .bits_per_word  = 8,
-        .cs_change_per_word = 1,
-};
-#endif
-
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
         .enable_dma = 0,
@@ -376,24 +367,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_MODE_3,
         },
 #endif
-#if defined(CONFIG_PBX)
-        {
-                .modalias = "fxs-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J11_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-        {
-                .modalias = "fxo-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J19_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-#endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
         {
                 .modalias               = "ad7877",
@@ -596,7 +569,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
 #endif
-#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
                 .irq = IRQ_PF8,
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 75e563d3f9d4..2849b09abe99 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -292,6 +292,14 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -310,6 +318,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -501,13 +512,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-        .enable_dma = 0,
-        .bits_per_word = 16,
-};
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
         .enable_dma = 0,
@@ -515,15 +519,6 @@ static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-        .ctl_reg        = 0x4, /* send zero */
-        .enable_dma     = 0,
-        .bits_per_word  = 8,
-        .cs_change_per_word = 1,
-};
-#endif
-
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
         .enable_dma = 0,
@@ -614,22 +609,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
                 .controller_data = &ad1836_spi_chip_info,
         },
 #endif
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-        {
-                .modalias = "ad9960-spi",
-                .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 1,
-                .controller_data = &ad9960_spi_chip_info,
-        },
-#endif
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
@@ -641,24 +627,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_PBX)
-        {
-                .modalias = "fxs-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J11_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-        {
-                .modalias = "fxo-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J19_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-#endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
         {
                 .modalias               = "ad7877",
@@ -863,7 +831,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
 #endif
-#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
                 .irq = IRQ_PF8,
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index c438ca89d8c9..3f9052687fa8 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -7,7 +7,7 @@
  */
 
 /* This file should be up to date with:
- *  - Revision C, 03/13/2009; ADSP-BF526 Blackfin Processor Anomaly List
+ *  - Revision D, 08/14/2009; ADSP-BF526 Blackfin Processor Anomaly List
  *  - Revision F, 03/03/2009; ADSP-BF527 Blackfin Processor Anomaly List
  */
 
@@ -176,7 +176,7 @@
 #define ANOMALY_05000443 (1)
 /* The WURESET Bit in the SYSCR Register is not Functional */
 #define ANOMALY_05000445 (1)
-/* USB DMA Short Packet Data Corruption */
+/* USB DMA Mode 1 Short Packet Data Corruption */
 #define ANOMALY_05000450 (1)
 /* BCODE_QUICKBOOT, BCODE_ALLBOOT, and BCODE_FULLBOOT Settings in SYSCR Register Not Functional */
 #define ANOMALY_05000451 (1)
@@ -186,12 +186,20 @@
 #define ANOMALY_05000456 (1)
 /* Host DMA Port Responds to Certain Bus Activity Without HOST_CE Assertion */
 #define ANOMALY_05000457 (1)
+/* USB DMA Mode 1 Failure When Multiple USB DMA Channels Are Concurrently Enabled */
+#define ANOMALY_05000460 (1)
 /* False Hardware Error when RETI Points to Invalid Memory */
 #define ANOMALY_05000461 (1)
+/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
+#define ANOMALY_05000462 (1)
 /* USB Rx DMA hang */
 #define ANOMALY_05000465 (1)
+/* TxPktRdy Bit Not Set for Transmit Endpoint When Core and DMA Access USB Endpoint FIFOs Simultaneously */
+#define ANOMALY_05000466 (1)
 /* Possible RX data corruption when control & data EP FIFOs are accessed via the core */
 #define ANOMALY_05000467 (1)
+/* PLL Latches Incorrect Settings During Reset */
+#define ANOMALY_05000469 (1)
 
 /* Anomalies that don't exist on this proc */
 #define ANOMALY_05000099 (0)
@@ -238,6 +246,7 @@
 #define ANOMALY_05000362 (1)
 #define ANOMALY_05000363 (0)
 #define ANOMALY_05000400 (0)
+#define ANOMALY_05000402 (0)
 #define ANOMALY_05000412 (0)
 #define ANOMALY_05000447 (0)
 #define ANOMALY_05000448 (0)
diff --git a/arch/blackfin/mach-bf527/include/mach/blackfin.h b/arch/blackfin/mach-bf527/include/mach/blackfin.h
index 03665a8e16be..ea9cb0fef8bc 100644
--- a/arch/blackfin/mach-bf527/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf527/include/mach/blackfin.h
@@ -56,11 +56,6 @@
 #endif
 #endif
 
-/* UART_IIR Register */
-#define STATUS(x)       ((x << 1) & 0x06)
-#define STATUS_P1       0x02
-#define STATUS_P0       0x01
-
 #define BFIN_UART_NR_PORTS      2
 
 #define OFFSET_THR              0x00    /* Transmit Holding register            */
@@ -76,11 +71,6 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
 
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
 /* PLL_DIV Masks                                                                                                        */
 #define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
 #define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 38cf8ffd6d74..6c2b47fe4fe4 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -88,6 +88,14 @@ static struct platform_device dm9000_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -110,6 +118,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -190,15 +201,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-        .ctl_reg        = 0x1c04,
-        .enable_dma     = 0,
-        .bits_per_word  = 8,
-        .cs_change_per_word = 1,
-};
-#endif
-
 /* Notice: for blackfin, the speed_hz is the value of register
  * SPI_BAUD, not the real baudrate */
 static struct spi_board_info bfin_spi_board_info[] __initdata = {
@@ -229,7 +231,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 16,
                 .bus_num = 1,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
@@ -237,23 +239,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_PBX)
-        {
-                .modalias        = "fxs-spi",
-                .max_speed_hz    = 4,
-                .bus_num         = 1,
-                .chip_select     = 3,
-                .controller_data = &spi_si3xxx_chip_info,
-        },
-
-        {
-                .modalias        = "fxo-spi",
-                .max_speed_hz    = 4,
-                .bus_num         = 1,
-                .chip_select     = 2,
-                .controller_data = &spi_si3xxx_chip_info,
-        },
-#endif
 };
 
 /* SPI (0) */
diff --git a/arch/blackfin/mach-bf533/boards/blackstamp.c b/arch/blackfin/mach-bf533/boards/blackstamp.c
index 9ecdc361fa6d..8208d67e2c97 100644
--- a/arch/blackfin/mach-bf533/boards/blackstamp.c
+++ b/arch/blackfin/mach-bf533/boards/blackstamp.c
@@ -48,6 +48,14 @@ static struct platform_device rtc_device = {
  *  Driver needs to know address, irq and flag pin.
  */
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -66,6 +74,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index 1443e92d8b62..7443b26c80c5 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -31,8 +31,10 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
+#include <linux/spi/mmc_spi.h>
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
 #endif
@@ -130,7 +132,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
@@ -141,9 +143,9 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
-                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
-                .chip_select = 5,
+                .chip_select = 1,
                 .controller_data = &mmc_spi_chip_info,
                 .mode = SPI_MODE_3,
         },
@@ -195,6 +197,14 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .start = 0x20200300,
@@ -211,6 +221,43 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
+};
+#endif
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+#include <linux/smsc911x.h>
+
+static struct resource smsc911x_resources[] = {
+        {
+                .name = "smsc911x-memory",
+                .start = 0x20308000,
+                .end = 0x20308000 + 0xFF,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF8,
+                .end = IRQ_PF8,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        },
+};
+
+static struct smsc911x_platform_config smsc911x_config = {
+        .flags = SMSC911X_USE_16BIT,
+        .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device smsc911x_device = {
+        .name = "smsc911x",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(smsc911x_resources),
+        .resource = smsc911x_resources,
+        .dev = {
+                .platform_data = &smsc911x_config,
+        },
 };
 #endif
 
@@ -324,6 +371,68 @@ static struct platform_device isp1362_hcd_device = {
 };
 #endif
 
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+static struct resource net2272_bfin_resources[] = {
+        {
+                .start = 0x20300000,
+                .end = 0x20300000 + 0x100,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF6,
+                .end = IRQ_PF6,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct platform_device net2272_bfin_device = {
+        .name = "net2272",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
+        .resource = net2272_bfin_resources,
+};
+#endif
+
+
+
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition para_partitions[] = {
+        {
+                .name       = "bootloader(nor)",
+                .size       = 0x40000,
+                .offset     = 0,
+        }, {
+                .name       = "linux+rootfs(nor)",
+                .size       = MTDPART_SIZ_FULL,
+                .offset     = MTDPART_OFS_APPEND,
+        },
+};
+
+static struct physmap_flash_data para_flash_data = {
+        .width      = 2,
+        .parts      = para_partitions,
+        .nr_parts   = ARRAY_SIZE(para_partitions),
+};
+
+static struct resource para_flash_resource = {
+        .start = 0x20000000,
+        .end   = 0x201fffff,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device para_flash_device = {
+        .name          = "physmap-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &para_flash_data,
+        },
+        .num_resources = 1,
+        .resource      = &para_flash_resource,
+};
+#endif
+
+
+
 static const unsigned int cclk_vlev_datasheet[] =
 {
         VRPAIR(VLEV_085, 250000000),
@@ -382,10 +491,22 @@ static struct platform_device *cm_bf533_devices[] __initdata = {
         &smc91x_device,
 #endif
 
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+        &smsc911x_device,
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+        &net2272_bfin_device,
+#endif
+
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
         &bfin_spi0_device,
 #endif
 
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+        &para_flash_device,
+#endif
+
         &bfin_gpios_device,
 };
 
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 4e3e511bf146..fd518e383b79 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -67,6 +67,14 @@ static struct platform_device bfin_fb_adv7393_device = {
  *  Driver needs to know address, irq and flag pin.
  */
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -84,6 +92,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -263,7 +274,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 3d743ccaff6a..729fd7c26336 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -35,6 +35,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
+#include <linux/spi/mmc_spi.h>
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
 #endif
@@ -62,6 +63,14 @@ static struct platform_device rtc_device = {
  *  Driver needs to know address, irq and flag pin.
  */
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -80,6 +89,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -207,19 +219,38 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-        .ctl_reg        = 0x4, /* send zero */
-        .enable_dma     = 0,
-        .bits_per_word  = 8,
-        .cs_change_per_word = 1,
+#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
+static struct bfin5xx_spi_chip spidev_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
 };
 #endif
 
-#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
-static struct bfin5xx_spi_chip spidev_chip_info = {
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
+static int bfin_mmc_spi_init(struct device *dev,
+        irqreturn_t (*detect_int)(int, void *), void *data)
+{
+        return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
+                IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+                "mmc-spi-detect", data);
+}
+
+static void bfin_mmc_spi_exit(struct device *dev, void *data)
+{
+        free_irq(MMC_SPI_CARD_DETECT_INT, data);
+}
+
+static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
+        .init = bfin_mmc_spi_init,
+        .exit = bfin_mmc_spi_exit,
+        .detect_delay = 100, /* msecs */
+};
+
+static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 8,
+        .pio_interrupt = 0,
 };
 #endif
 
@@ -250,33 +281,14 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
-                .max_speed_hz = 31250000,     /* max spi clock (SCK) speed in HZ */
+                .modalias = "ad1836",
+                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
                 .controller_data = &ad1836_spi_chip_info,
         },
 #endif
 
-#if defined(CONFIG_PBX)
-        {
-                .modalias = "fxs-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J11_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-        {
-                .modalias = "fxo-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J19_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-#endif
-
 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
         {
                 .modalias = "spidev",
@@ -286,6 +298,17 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .controller_data = &spidev_chip_info,
         },
 #endif
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+        {
+                .modalias = "mmc_spi",
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 4,
+                .platform_data = &bfin_mmc_spi_pdata,
+                .controller_data = &mmc_spi_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
 };
 
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -458,7 +481,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
 #endif
-#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
                 .irq = 39,
diff --git a/arch/blackfin/mach-bf533/dma.c b/arch/blackfin/mach-bf533/dma.c
index 0a6eb8f24d98..7a443c37fb9f 100644
--- a/arch/blackfin/mach-bf533/dma.c
+++ b/arch/blackfin/mach-bf533/dma.c
@@ -76,12 +76,12 @@ int channel2irq(unsigned int channel)
                 ret_irq = IRQ_SPI;
                 break;
 
-        case CH_UART_RX:
-                ret_irq = IRQ_UART_RX;
+        case CH_UART0_RX:
+                ret_irq = IRQ_UART0_RX;
                 break;
 
-        case CH_UART_TX:
-                ret_irq = IRQ_UART_TX;
+        case CH_UART0_TX:
+                ret_irq = IRQ_UART0_TX;
                 break;
 
         case CH_MEM_STREAM0_SRC:
diff --git a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
index 4062e24e759b..6965b4088c44 100644
--- a/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
+++ b/arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
@@ -131,11 +131,11 @@ struct bfin_serial_res {
 struct bfin_serial_res bfin_serial_resource[] = {
         {
         0xFFC00400,
-        IRQ_UART_RX,
-        IRQ_UART_ERROR,
+        IRQ_UART0_RX,
+        IRQ_UART0_ERROR,
 #ifdef CONFIG_SERIAL_BFIN_DMA
-        CH_UART_TX,
-        CH_UART_RX,
+        CH_UART0_TX,
+        CH_UART0_RX,
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
         CONFIG_UART0_CTS_PIN,
diff --git a/arch/blackfin/mach-bf533/include/mach/blackfin.h b/arch/blackfin/mach-bf533/include/mach/blackfin.h
index 39aa175f19f5..499e897a4f4f 100644
--- a/arch/blackfin/mach-bf533/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf533/include/mach/blackfin.h
@@ -43,13 +43,6 @@
 
 #define BFIN_UART_NR_PORTS      1
 
-#define CH_UART_RX CH_UART0_RX
-#define CH_UART_TX CH_UART0_TX
-
-#define IRQ_UART_ERROR IRQ_UART0_ERROR
-#define IRQ_UART_RX    IRQ_UART0_RX
-#define IRQ_UART_TX    IRQ_UART0_TX
-
 #define OFFSET_THR              0x00    /* Transmit Holding register            */
 #define OFFSET_RBR              0x00    /* Receive Buffer register              */
 #define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig
index 77c59da87e85..44132fda63be 100644
--- a/arch/blackfin/mach-bf537/boards/Kconfig
+++ b/arch/blackfin/mach-bf537/boards/Kconfig
@@ -9,11 +9,17 @@ config BFIN537_STAMP
         help
           BF537-STAMP board support.
 
-config BFIN537_BLUETECHNIX_CM
-        bool "Bluetechnix CM-BF537"
+config BFIN537_BLUETECHNIX_CM_E
+        bool "Bluetechnix CM-BF537E"
         depends on (BF537)
         help
-          CM-BF537 support for EVAL- and DEV-Board.
+          CM-BF537E support for EVAL- and DEV-Board.
+
+config BFIN537_BLUETECHNIX_CM_U
+        bool "Bluetechnix CM-BF537U"
+        depends on (BF537)
+        help
+          CM-BF537U support for EVAL- and DEV-Board.
 
 config BFIN537_BLUETECHNIX_TCM
         bool "Bluetechnix TCM-BF537"
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index 68b98a7af6a6..7e6aa4e5b205 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -3,7 +3,8 @@
 #
 
 obj-$(CONFIG_BFIN537_STAMP)            += stamp.o
-obj-$(CONFIG_BFIN537_BLUETECHNIX_CM)   += cm_bf537.o
+obj-$(CONFIG_BFIN537_BLUETECHNIX_CM_E) += cm_bf537e.o
+obj-$(CONFIG_BFIN537_BLUETECHNIX_CM_U) += cm_bf537u.o
 obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM)  += tcm_bf537.o
 obj-$(CONFIG_PNAV10)                   += pnav10.o
 obj-$(CONFIG_CAMSIG_MINOTAUR)          += minotaur.o
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
new file mode 100644
index 000000000000..87acb7dd2df3
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
@@ -0,0 +1,727 @@
+/*
+ * File:         arch/blackfin/mach-bf537/boards/cm_bf537.c
+ * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
+ * Author:       Aidan Williams <aidan@nicta.com.au>
+ *
+ * Created:      2005
+ * Description:  Board description file
+ *
+ * Modified:
+ *               Copyright 2005 National ICT Australia (NICTA)
+ *               Copyright 2004-2006 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/device.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
+#include <linux/usb/isp1362.h>
+#endif
+#include <linux/ata_platform.h>
+#include <linux/irq.h>
+#include <asm/dma.h>
+#include <asm/bfin5xx_spi.h>
+#include <asm/portmux.h>
+#include <asm/dpmc.h>
+
+/*
+ * Name the Board for the /proc/cpuinfo
+ */
+const char bfin_board_name[] = "Bluetechnix CM BF537E";
+
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+/* all SPI peripherals info goes here */
+
+#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
+static struct mtd_partition bfin_spi_flash_partitions[] = {
+        {
+                .name = "bootloader(spi)",
+                .size = 0x00020000,
+                .offset = 0,
+                .mask_flags = MTD_CAP_ROM
+        }, {
+                .name = "linux kernel(spi)",
+                .size = 0xe0000,
+                .offset = 0x20000
+        }, {
+                .name = "file system(spi)",
+                .size = 0x700000,
+                .offset = 0x00100000,
+        }
+};
+
+static struct flash_platform_data bfin_spi_flash_data = {
+        .name = "m25p80",
+        .parts = bfin_spi_flash_partitions,
+        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
+        .type = "m25p64",
+};
+
+/* SPI flash chip (m25p64) */
+static struct bfin5xx_spi_chip spi_flash_chip_info = {
+        .enable_dma = 0,         /* use dma transfer with this chip*/
+        .bits_per_word = 8,
+};
+#endif
+
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
+/* SPI ADC chip */
+static struct bfin5xx_spi_chip spi_adc_chip_info = {
+        .enable_dma = 1,         /* use dma transfer with this chip*/
+        .bits_per_word = 16,
+};
+#endif
+
+#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 16,
+};
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
+};
+#endif
+
+static struct spi_board_info bfin_spi_board_info[] __initdata = {
+#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
+        {
+                /* the modalias must be the same as spi device driver name */
+                .modalias = "m25p80", /* Name of spi_driver for this device */
+                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0, /* Framework bus number */
+                .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
+                .platform_data = &bfin_spi_flash_data,
+                .controller_data = &spi_flash_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
+        {
+                .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
+                .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0, /* Framework bus number */
+                .chip_select = 1, /* Framework chip select. */
+                .platform_data = NULL, /* No spi_driver specific config */
+                .controller_data = &spi_adc_chip_info,
+        },
+#endif
+
+#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+        {
+                .modalias = "ad1836",
+                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
+                .controller_data = &ad1836_spi_chip_info,
+        },
+#endif
+
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+        {
+                .modalias = "mmc_spi",
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 1,
+                .controller_data = &mmc_spi_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+};
+
+/* SPI (0) */
+static struct resource bfin_spi0_resource[] = {
+        [0] = {
+                .start = SPI0_REGBASE,
+                .end   = SPI0_REGBASE + 0xFF,
+                .flags = IORESOURCE_MEM,
+                },
+        [1] = {
+                .start = CH_SPI,
+                .end   = CH_SPI,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = IRQ_SPI,
+                .end   = IRQ_SPI,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+/* SPI controller data */
+static struct bfin5xx_spi_master bfin_spi0_info = {
+        .num_chipselect = 8,
+        .enable_dma = 1,  /* master has the ability to do dma transfer */
+        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
+};
+
+static struct platform_device bfin_spi0_device = {
+        .name = "bfin-spi",
+        .id = 0, /* Bus number */
+        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
+        .resource = bfin_spi0_resource,
+        .dev = {
+                .platform_data = &bfin_spi0_info, /* Passed to driver */
+        },
+};
+#endif  /* spi master and devices */
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+static struct platform_device rtc_device = {
+        .name = "rtc-bfin",
+        .id   = -1,
+};
+#endif
+
+#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
+static struct platform_device hitachi_fb_device = {
+        .name = "hitachi-tx09",
+};
+#endif
+
+#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
+static struct resource smc91x_resources[] = {
+        {
+                .start = 0x20200300,
+                .end = 0x20200300 + 16,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF14,
+                .end = IRQ_PF14,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+                },
+};
+
+static struct platform_device smc91x_device = {
+        .name = "smc91x",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(smc91x_resources),
+        .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
+};
+#endif
+
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
+static struct resource isp1362_hcd_resources[] = {
+        {
+                .start = 0x20308000,
+                .end = 0x20308000,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = 0x20308004,
+                .end = 0x20308004,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PG15,
+                .end = IRQ_PG15,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct isp1362_platform_data isp1362_priv = {
+        .sel15Kres = 1,
+        .clknotstop = 0,
+        .oc_enable = 0,
+        .int_act_high = 0,
+        .int_edge_triggered = 0,
+        .remote_wakeup_connected = 0,
+        .no_power_switching = 1,
+        .power_switching_mode = 0,
+};
+
+static struct platform_device isp1362_hcd_device = {
+        .name = "isp1362-hcd",
+        .id = 0,
+        .dev = {
+                .platform_data = &isp1362_priv,
+        },
+        .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
+        .resource = isp1362_hcd_resources,
+};
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+static struct resource net2272_bfin_resources[] = {
+        {
+                .start = 0x20300000,
+                .end = 0x20300000 + 0x100,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PG13,
+                .end = IRQ_PG13,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct platform_device net2272_bfin_device = {
+        .name = "net2272",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
+        .resource = net2272_bfin_resources,
+};
+#endif
+
+static struct resource bfin_gpios_resources = {
+        .start = 0,
+        .end   = MAX_BLACKFIN_GPIOS - 1,
+        .flags = IORESOURCE_IRQ,
+};
+
+static struct platform_device bfin_gpios_device = {
+        .name = "simple-gpio",
+        .id = -1,
+        .num_resources = 1,
+        .resource = &bfin_gpios_resources,
+};
+
+#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
+static struct mtd_partition cm_partitions[] = {
+        {
+                .name   = "bootloader(nor)",
+                .size   = 0x40000,
+                .offset = 0,
+        }, {
+                .name   = "linux kernel(nor)",
+                .size   = 0x100000,
+                .offset = MTDPART_OFS_APPEND,
+        }, {
+                .name   = "file system(nor)",
+                .size   = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data cm_flash_data = {
+        .width    = 2,
+        .parts    = cm_partitions,
+        .nr_parts = ARRAY_SIZE(cm_partitions),
+};
+
+static unsigned cm_flash_gpios[] = { GPIO_PF4 };
+
+static struct resource cm_flash_resource[] = {
+        {
+                .name  = "cfi_probe",
+                .start = 0x20000000,
+                .end   = 0x201fffff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = (unsigned long)cm_flash_gpios,
+                .end   = ARRAY_SIZE(cm_flash_gpios),
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static struct platform_device cm_flash_device = {
+        .name          = "gpio-addr-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &cm_flash_data,
+        },
+        .num_resources = ARRAY_SIZE(cm_flash_resource),
+        .resource      = cm_flash_resource,
+};
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+static struct resource bfin_uart0_resources[] = {
+        {
+                .start = 0xFFC00400,
+                .end = 0xFFC004FF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART0_ERROR,
+                .end = IRQ_UART0_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_TX,
+                .end = CH_UART0_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART0_CTSRTS
+        {
+                /*
+                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
+                 */
+                .start = -1,
+                .end = -1,
+                .flags = IORESOURCE_IO,
+        },
+        {
+                /*
+                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
+                 */
+                .start = -1,
+                .end = -1,
+                .flags = IORESOURCE_IO,
+        },
+#endif
+};
+
+static struct platform_device bfin_uart0_device = {
+        .name = "bfin-uart",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
+        .resource = bfin_uart0_resources,
+};
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+static struct resource bfin_uart1_resources[] = {
+        {
+                .start = 0xFFC02000,
+                .end = 0xFFC020FF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = IRQ_UART1_ERROR,
+                .end = IRQ_UART1_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_TX,
+                .end = CH_UART1_TX,
+                .flags = IORESOURCE_DMA,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX,
+                .flags = IORESOURCE_DMA,
+        },
+#ifdef CONFIG_BFIN_UART1_CTSRTS
+        {
+                /*
+                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
+                 */
+                .start = -1,
+                .end = -1,
+                .flags = IORESOURCE_IO,
+        },
+        {
+                /*
+                 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
+                 */
+                .start = -1,
+                .end = -1,
+                .flags = IORESOURCE_IO,
+        },
+#endif
+};
+
+static struct platform_device bfin_uart1_device = {
+        .name = "bfin-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
+        .resource = bfin_uart1_resources,
+};
+#endif
+#endif
+
+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
+#ifdef CONFIG_BFIN_SIR0
+static struct resource bfin_sir0_resources[] = {
+        {
+                .start = 0xFFC00400,
+                .end = 0xFFC004FF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART0_RX,
+                .end = IRQ_UART0_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART0_RX,
+                .end = CH_UART0_RX+1,
+                .flags = IORESOURCE_DMA,
+        },
+};
+static struct platform_device bfin_sir0_device = {
+        .name = "bfin_sir",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_sir0_resources),
+        .resource = bfin_sir0_resources,
+};
+#endif
+#ifdef CONFIG_BFIN_SIR1
+static struct resource bfin_sir1_resources[] = {
+        {
+                .start = 0xFFC02000,
+                .end = 0xFFC020FF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_UART1_RX,
+                .end = IRQ_UART1_RX+1,
+                .flags = IORESOURCE_IRQ,
+        },
+        {
+                .start = CH_UART1_RX,
+                .end = CH_UART1_RX+1,
+                .flags = IORESOURCE_DMA,
+        },
+};
+static struct platform_device bfin_sir1_device = {
+        .name = "bfin_sir",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_sir1_resources),
+        .resource = bfin_sir1_resources,
+};
+#endif
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+static struct resource bfin_twi0_resource[] = {
+        [0] = {
+                .start = TWI0_REGBASE,
+                .end   = TWI0_REGBASE,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TWI,
+                .end   = IRQ_TWI,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device i2c_bfin_twi_device = {
+        .name = "i2c-bfin-twi",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
+        .resource = bfin_twi0_resource,
+};
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+static struct platform_device bfin_sport0_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 0,
+};
+
+static struct platform_device bfin_sport1_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 1,
+};
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mii_bus = {
+        .name = "bfin_mii_bus",
+};
+
+static struct platform_device bfin_mac_device = {
+        .name = "bfin_mac",
+        .dev.platform_data = &bfin_mii_bus,
+};
+#endif
+
+#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
+#define PATA_INT        IRQ_PF14
+
+static struct pata_platform_info bfin_pata_platform_data = {
+        .ioport_shift = 2,
+        .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
+};
+
+static struct resource bfin_pata_resources[] = {
+        {
+                .start = 0x2030C000,
+                .end = 0x2030C01F,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = 0x2030D018,
+                .end = 0x2030D01B,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = PATA_INT,
+                .end = PATA_INT,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_pata_device = {
+        .name = "pata_platform",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(bfin_pata_resources),
+        .resource = bfin_pata_resources,
+        .dev = {
+                .platform_data = &bfin_pata_platform_data,
+        }
+};
+#endif
+
+static const unsigned int cclk_vlev_datasheet[] =
+{
+        VRPAIR(VLEV_085, 250000000),
+        VRPAIR(VLEV_090, 376000000),
+        VRPAIR(VLEV_095, 426000000),
+        VRPAIR(VLEV_100, 426000000),
+        VRPAIR(VLEV_105, 476000000),
+        VRPAIR(VLEV_110, 476000000),
+        VRPAIR(VLEV_115, 476000000),
+        VRPAIR(VLEV_120, 500000000),
+        VRPAIR(VLEV_125, 533000000),
+        VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+        .tuple_tab = cclk_vlev_datasheet,
+        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+        .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+        .name = "bfin dpmc",
+        .dev = {
+                .platform_data = &bfin_dmpc_vreg_data,
+        },
+};
+
+static struct platform_device *cm_bf537e_devices[] __initdata = {
+
+        &bfin_dpmc,
+
+#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
+        &hitachi_fb_device,
+#endif
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+        &rtc_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+#ifdef CONFIG_SERIAL_BFIN_UART0
+        &bfin_uart0_device,
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+        &bfin_uart1_device,
+#endif
+#endif
+
+#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
+#ifdef CONFIG_BFIN_SIR0
+        &bfin_sir0_device,
+#endif
+#ifdef CONFIG_BFIN_SIR1
+        &bfin_sir1_device,
+#endif
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+        &i2c_bfin_twi_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+        &bfin_sport0_uart_device,
+        &bfin_sport1_uart_device,
+#endif
+
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
+        &isp1362_hcd_device,
+#endif
+
+#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+        &smc91x_device,
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+        &bfin_mii_bus,
+        &bfin_mac_device,
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+        &net2272_bfin_device,
+#endif
+
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        &bfin_spi0_device,
+#endif
+
+#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
+        &bfin_pata_device,
+#endif
+
+#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
+        &cm_flash_device,
+#endif
+
+        &bfin_gpios_device,
+};
+
+static int __init cm_bf537e_init(void)
+{
+        printk(KERN_INFO "%s(): registering device resources\n", __func__);
+        platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
+#endif
+
+#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
+        irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
+#endif
+        return 0;
+}
+
+arch_initcall(cm_bf537e_init);
+
+void bfin_get_ether_addr(char *addr)
+{
+        random_ether_addr(addr);
+        printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
+}
+EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
index 2a87d1cfcd06..8219dc3d65bd 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c
@@ -1,5 +1,5 @@
 /*
- * File:         arch/blackfin/mach-bf537/boards/cm_bf537.c
+ * File:         arch/blackfin/mach-bf537/boards/cm_bf537u.c
  * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
  * Author:       Aidan Williams <aidan@nicta.com.au>
  *
@@ -45,11 +45,12 @@
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
 #include <asm/dpmc.h>
+#include <linux/spi/mmc_spi.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
  */
-const char bfin_board_name[] = "Bluetechnix CM BF537";
+const char bfin_board_name[] = "Bluetechnix CM BF537U";
 
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 /* all SPI peripherals info goes here */
@@ -101,13 +102,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-        .enable_dma = 0,
-        .bits_per_word = 16,
-};
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
         .enable_dma = 0,
@@ -142,7 +136,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
@@ -150,16 +144,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-        {
-                .modalias = "ad9960-spi",
-                .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 1,
-                .controller_data = &ad9960_spi_chip_info,
-        },
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
@@ -223,6 +207,14 @@ static struct platform_device hitachi_fb_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .start = 0x20200300,
@@ -240,6 +232,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -324,7 +319,7 @@ static struct mtd_partition cm_partitions[] = {
                 .offset = 0,
         }, {
                 .name   = "linux kernel(nor)",
-                .size   = 0xE0000,
+                .size   = 0x100000,
                 .offset = MTDPART_OFS_APPEND,
         }, {
                 .name   = "file system(nor)",
@@ -339,7 +334,7 @@ static struct physmap_flash_data cm_flash_data = {
         .nr_parts = ARRAY_SIZE(cm_partitions),
 };
 
-static unsigned cm_flash_gpios[] = { GPIO_PF4 };
+static unsigned cm_flash_gpios[] = { GPIO_PH0 };
 
 static struct resource cm_flash_resource[] = {
         {
@@ -548,7 +543,7 @@ static struct platform_device bfin_dpmc = {
         },
 };
 
-static struct platform_device *cm_bf537_devices[] __initdata = {
+static struct platform_device *cm_bf537u_devices[] __initdata = {
 
         &bfin_dpmc,
 
@@ -614,10 +609,10 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
         &bfin_gpios_device,
 };
 
-static int __init cm_bf537_init(void)
+static int __init cm_bf537u_init(void)
 {
         printk(KERN_INFO "%s(): registering device resources\n", __func__);
-        platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
+        platform_add_devices(cm_bf537u_devices, ARRAY_SIZE(cm_bf537u_devices));
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 #endif
@@ -628,7 +623,7 @@ static int __init cm_bf537_init(void)
         return 0;
 }
 
-arch_initcall(cm_bf537_init);
+arch_initcall(cm_bf537u_init);
 
 void bfin_get_ether_addr(char *addr)
 {
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 838240f151f5..10b35b838bac 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -92,6 +92,14 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -110,6 +118,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -282,13 +293,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-        .enable_dma = 0,
-        .bits_per_word = 16,
-};
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
         .enable_dma = 0,
@@ -348,22 +352,13 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
                 .controller_data = &ad1836_spi_chip_info,
         },
 #endif
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-        {
-                .modalias = "ad9960-spi",
-                .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 1,
-                .controller_data = &ad9960_spi_chip_info,
-        },
-#endif
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index bd656907b8c0..9db6b40743e0 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -171,6 +171,14 @@ static struct platform_device rtc_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -189,6 +197,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -196,10 +207,15 @@ static struct platform_device smc91x_device = {
 static struct resource dm9000_resources[] = {
         [0] = {
                 .start  = 0x203FB800,
-                .end    = 0x203FB800 + 8,
+                .end    = 0x203FB800 + 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
+                .start  = 0x203FB804,
+                .end    = 0x203FB804 + 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [2] = {
                 .start  = IRQ_PF9,
                 .end    = IRQ_PF9,
                 .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
@@ -516,19 +532,135 @@ static struct bfin5xx_spi_chip spi_adc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
+        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
 };
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
+#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
+        || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
+static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
+        .cs_gpio = GPIO_PF5,
+};
+#endif
+
+#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
+#include <linux/input.h>
+#include <linux/input/ad714x.h>
+static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 16,
 };
+
+static struct ad714x_slider_plat slider_plat[] = {
+        {
+                .start_stage = 0,
+                .end_stage = 7,
+                .max_coord = 128,
+        },
+};
+
+static struct ad714x_button_plat button_plat[] = {
+        {
+                .keycode = BTN_FORWARD,
+                .l_mask = 0,
+                .h_mask = 0x600,
+        },
+        {
+                .keycode = BTN_LEFT,
+                .l_mask = 0,
+                .h_mask = 0x500,
+        },
+        {
+                .keycode = BTN_MIDDLE,
+                .l_mask = 0,
+                .h_mask = 0x800,
+        },
+        {
+                .keycode = BTN_RIGHT,
+                .l_mask = 0x100,
+                .h_mask = 0x400,
+        },
+        {
+                .keycode = BTN_BACK,
+                .l_mask = 0x200,
+                .h_mask = 0x400,
+        },
+};
+static struct ad714x_platform_data ad7147_platfrom_data = {
+        .slider_num = 1,
+        .button_num = 5,
+        .slider = slider_plat,
+        .button = button_plat,
+        .stage_cfg_reg =  {
+                {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
+                {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
+                {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
+                {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
+                {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
+                {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
+                {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
+                {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
+                {0xFF7B, 0x3FFF, 0x506,  0x2626, 1100, 1100, 1150, 1150},
+                {0xFDFE, 0x3FFF, 0x606,  0x2626, 1100, 1100, 1150, 1150},
+                {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
+                {0xFFEF, 0x1FFF, 0x0,    0x2626, 1100, 1100, 1150, 1150},
+        },
+        .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
+};
+#endif
+
+#if defined(CONFIG_INPUT_EVAL_AD7142EB)
+#include <linux/input.h>
+#include <linux/input/ad714x.h>
+static struct ad714x_button_plat button_plat[] = {
+        {
+                .keycode = BTN_1,
+                .l_mask = 0,
+                .h_mask = 0x1,
+        },
+        {
+                .keycode = BTN_2,
+                .l_mask = 0,
+                .h_mask = 0x2,
+        },
+        {
+                .keycode = BTN_3,
+                .l_mask = 0,
+                .h_mask = 0x4,
+        },
+        {
+                .keycode = BTN_4,
+                .l_mask = 0x0,
+                .h_mask = 0x8,
+        },
+};
+static struct ad714x_platform_data ad7142_platfrom_data = {
+        .button_num = 4,
+        .button = button_plat,
+        .stage_cfg_reg =  {
+                /* fixme: figure out right setting for all comoponent according
+                 * to hardware feature of EVAL-AD7142EB board */
+                {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
+                {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
+                {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
+                {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+                {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
+        },
+        .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
+};
 #endif
 
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
@@ -555,15 +687,7 @@ static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
         .enable_dma = 0,
         .bits_per_word = 8,
-};
-#endif
-
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-        .ctl_reg        = 0x4, /* send zero */
-        .enable_dma     = 0,
-        .bits_per_word  = 8,
-        .cs_change_per_word = 1,
+        .pio_interrupt = 0,
 };
 #endif
 
@@ -743,25 +867,42 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SND_BLACKFIN_AD1836) \
-        || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
+        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
-                .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
+                .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
                 .controller_data = &ad1836_spi_chip_info,
+                .mode = SPI_MODE_3,
         },
 #endif
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
+
+#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
         {
-                .modalias = "ad9960-spi",
-                .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
+                .modalias = "ad1938",
+                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
-                .chip_select = 1,
-                .controller_data = &ad9960_spi_chip_info,
+                .chip_select = 0,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
+                .controller_data = &ad1938_spi_chip_info,
+                .mode = SPI_MODE_3,
         },
 #endif
+
+#if defined(CONFIG_INPUT_EVAL_AD7147EBZ)
+        {
+                .modalias = "ad714x_captouch",
+                .max_speed_hz = 1000000,     /* max spi clock (SCK) speed in HZ */
+                .irq = IRQ_PF4,
+                .bus_num = 0,
+                .chip_select = 5,
+                .mode = SPI_MODE_3,
+                .platform_data = &ad7147_platfrom_data,
+                .controller_data = &ad7147_spi_chip_info,
+        },
+#endif
+
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
@@ -773,24 +914,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_MODE_3,
         },
 #endif
-#if defined(CONFIG_PBX)
-        {
-                .modalias = "fxs-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J11_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-        {
-                .modalias = "fxo-spi",
-                .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 8 - CONFIG_J19_JUMPER,
-                .controller_data = &spi_si3xxx_chip_info,
-                .mode = SPI_MODE_3,
-        },
-#endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
         {
                 .modalias               = "ad7877",
@@ -864,6 +987,11 @@ static struct resource bfin_spi0_resource[] = {
         [1] = {
                 .start = CH_SPI,
                 .end   = CH_SPI,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = IRQ_SPI,
+                .end   = IRQ_SPI,
                 .flags = IORESOURCE_IRQ,
         },
 };
@@ -1089,7 +1217,7 @@ static struct platform_device i2c_bfin_twi_device = {
 
 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
 #include <linux/input.h>
-#include <linux/i2c/adp5588_keys.h>
+#include <linux/i2c/adp5588.h>
 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
         [0]      = KEY_GRAVE,
         [1]      = KEY_1,
@@ -1309,11 +1437,20 @@ static struct adp5520_platform_data adp5520_pdev_data = {
 
 #endif
 
+#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
+#include <linux/i2c/adp5588.h>
+static struct adp5588_gpio_platfrom_data adp5588_gpio_data = {
+        .gpio_start = 50,
+        .pullup_dis_mask = 0,
+};
+#endif
+
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
-#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
+#if defined(CONFIG_INPUT_EVAL_AD7142EB)
         {
-                I2C_BOARD_INFO("ad7142_joystick", 0x2C),
+                I2C_BOARD_INFO("ad7142_captouch", 0x2C),
                 .irq = IRQ_PG5,
+                .platform_data = (void *)&ad7142_platfrom_data,
         },
 #endif
 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
@@ -1321,7 +1458,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
 #endif
-#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
                 .irq = IRQ_PG6,
@@ -1355,6 +1492,12 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 .platform_data = (void *)&adxl34x_info,
         },
 #endif
+#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
+        {
+                I2C_BOARD_INFO("adp5588-gpio", 0x34),
+                .platform_data = (void *)&adp5588_gpio_data,
+        },
+#endif
 };
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
@@ -1456,6 +1599,13 @@ static struct platform_device bfin_dpmc = {
         },
 };
 
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+static struct platform_device bfin_tdm = {
+        .name = "bfin-tdm",
+        /* TODO: add platform data here */
+};
+#endif
+
 static struct platform_device *stamp_devices[] __initdata = {
 
         &bfin_dpmc,
@@ -1561,6 +1711,10 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
         &stamp_flash_device,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
+        &bfin_tdm,
+#endif
 };
 
 static int __init stamp_init(void)
@@ -1572,11 +1726,6 @@ static int __init stamp_init(void)
         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 
-#if (defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)) \
-         && defined(PATA_INT)
-        irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
-#endif
-
         return 0;
 }
 
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index e523e6e610d0..61353f7bcb9e 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -45,6 +45,7 @@
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
 #include <asm/dpmc.h>
+#include <linux/spi/mmc_spi.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -101,13 +102,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-        .enable_dma = 0,
-        .bits_per_word = 16,
-};
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
         .enable_dma = 0,
@@ -142,7 +136,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
@@ -150,22 +144,12 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-        {
-                .modalias = "ad9960-spi",
-                .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 1,
-                .controller_data = &ad9960_spi_chip_info,
-        },
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
-                .chip_select = 5,
+                .chip_select = 1,
                 .controller_data = &mmc_spi_chip_info,
                 .mode = SPI_MODE_3,
         },
@@ -223,6 +207,14 @@ static struct platform_device hitachi_fb_device = {
 #endif
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .start = 0x20200300,
@@ -240,6 +232,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -285,12 +280,12 @@ static struct platform_device isp1362_hcd_device = {
 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 static struct resource net2272_bfin_resources[] = {
         {
-                .start = 0x20200000,
-                .end = 0x20200000 + 0x100,
+                .start = 0x20300000,
+                .end = 0x20300000 + 0x100,
                 .flags = IORESOURCE_MEM,
         }, {
-                .start = IRQ_PH14,
-                .end = IRQ_PH14,
+                .start = IRQ_PG13,
+                .end = IRQ_PG13,
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
         },
 };
@@ -324,7 +319,7 @@ static struct mtd_partition cm_partitions[] = {
                 .offset = 0,
         }, {
                 .name   = "linux kernel(nor)",
-                .size   = 0xE0000,
+                .size   = 0x100000,
                 .offset = MTDPART_OFS_APPEND,
         }, {
                 .name   = "file system(nor)",
diff --git a/arch/blackfin/mach-bf537/dma.c b/arch/blackfin/mach-bf537/dma.c
index 81185051de91..d23fc0edf2b9 100644
--- a/arch/blackfin/mach-bf537/dma.c
+++ b/arch/blackfin/mach-bf537/dma.c
@@ -96,12 +96,12 @@ int channel2irq(unsigned int channel)
                 ret_irq = IRQ_SPI;
                 break;
 
-        case CH_UART_RX:
-                ret_irq = IRQ_UART_RX;
+        case CH_UART0_RX:
+                ret_irq = IRQ_UART0_RX;
                 break;
 
-        case CH_UART_TX:
-                ret_irq = IRQ_UART_TX;
+        case CH_UART0_TX:
+                ret_irq = IRQ_UART0_TX;
                 break;
 
         case CH_MEM_STREAM0_SRC:
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index e66aa131f517..f091ad2d8ea8 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -143,7 +143,7 @@
 /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
 #define ANOMALY_05000371 (1)
 /* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
-#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
+#define ANOMALY_05000402 (__SILICON_REVISION__ == 2)
 /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
 #define ANOMALY_05000403 (1)
 /* Speculative Fetches Can Cause Undesired External FIFO Operations */
diff --git a/arch/blackfin/mach-bf537/include/mach/blackfin.h b/arch/blackfin/mach-bf537/include/mach/blackfin.h
index f5e5015ad831..9ee8834c8f1a 100644
--- a/arch/blackfin/mach-bf537/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf537/include/mach/blackfin.h
@@ -45,96 +45,11 @@
 #if !defined(__ASSEMBLY__)
 #include "cdefBF534.h"
 
-/* UART 0*/
-#define bfin_read_UART_THR() bfin_read_UART0_THR()
-#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
-#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
-#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
-#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
-#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
-#define bfin_read_UART_IER() bfin_read_UART0_IER()
-#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
-#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
-#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
-#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
-#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
-#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
-#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
-#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
-#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
-#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
-#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
-#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
-#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
-#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
-#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
-
 #if defined(CONFIG_BF537) || defined(CONFIG_BF536)
 #include "cdefBF537.h"
 #endif
 #endif
 
-/* MAP used DEFINES from BF533 to BF537 - so we don't need to change them in the driver, kernel, etc. */
-
-/* UART_IIR Register */
-#define STATUS(x)       ((x << 1) & 0x06)
-#define STATUS_P1       0x02
-#define STATUS_P0       0x01
-
-/* DMA Channel */
-#define bfin_read_CH_UART_RX() bfin_read_CH_UART0_RX()
-#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART0_RX(val)
-#define CH_UART_RX CH_UART0_RX
-#define bfin_read_CH_UART_TX() bfin_read_CH_UART0_TX()
-#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART0_TX(val)
-#define CH_UART_TX CH_UART0_TX
-
-/* System Interrupt Controller */
-#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART0_RX()
-#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART0_RX(val)
-#define IRQ_UART_RX IRQ_UART0_RX
-#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART0_TX()
-#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART0_TX(val)
-#define IRQ_UART_TX IRQ_UART0_TX
-#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART0_ERROR()
-#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART0_ERROR(val)
-#define IRQ_UART_ERROR IRQ_UART0_ERROR
-
-/* MMR Registers*/
-#define bfin_read_UART_THR() bfin_read_UART0_THR()
-#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
-#define BFIN_UART_THR UART0_THR
-#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
-#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
-#define BFIN_UART_RBR UART0_RBR
-#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
-#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
-#define BFIN_UART_DLL UART0_DLL
-#define bfin_read_UART_IER() bfin_read_UART0_IER()
-#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
-#define BFIN_UART_IER UART0_IER
-#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
-#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
-#define BFIN_UART_DLH UART0_DLH
-#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
-#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
-#define BFIN_UART_IIR UART0_IIR
-#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
-#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
-#define BFIN_UART_LCR UART0_LCR
-#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
-#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
-#define BFIN_UART_MCR UART0_MCR
-#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
-#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
-#define BFIN_UART_LSR UART0_LSR
-#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
-#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
-#define BFIN_UART_SCR  UART0_SCR
-#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
-#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
-#define BFIN_UART_GCTL UART0_GCTL
-
 #define BFIN_UART_NR_PORTS      2
 
 #define OFFSET_THR              0x00    /* Transmit Holding register            */
@@ -150,11 +65,6 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
 
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
 /* PLL_DIV Masks                                                                                                        */
 #define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
 #define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
index 57695b4c3c09..f2ac3b0ebf24 100644
--- a/arch/blackfin/mach-bf538/boards/ezkit.c
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -31,6 +31,7 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
+#include <linux/mtd/physmap.h>
 #include <linux/mtd/partitions.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
@@ -177,6 +178,14 @@ static struct platform_device bfin_sir2_device = {
  *  Driver needs to know address, irq and flag pin.
  */
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -194,6 +203,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -390,6 +402,11 @@ static struct resource bfin_spi2_resource[] = {
         [1] = {
                 .start = CH_SPI2,
                 .end   = CH_SPI2,
+                .flags = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start = IRQ_SPI2,
+                .end   = IRQ_SPI2,
                 .flags = IORESOURCE_IRQ,
         }
 };
@@ -550,6 +567,50 @@ static struct platform_device bfin_dpmc = {
         },
 };
 
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition ezkit_partitions[] = {
+        {
+                .name       = "bootloader(nor)",
+                .size       = 0x40000,
+                .offset     = 0,
+        }, {
+                .name       = "linux kernel(nor)",
+                .size       = 0x180000,
+                .offset     = MTDPART_OFS_APPEND,
+        }, {
+                .name       = "file system(nor)",
+                .size       = MTDPART_SIZ_FULL,
+                .offset     = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data ezkit_flash_data = {
+        .width      = 2,
+        .parts      = ezkit_partitions,
+        .nr_parts   = ARRAY_SIZE(ezkit_partitions),
+};
+
+static struct resource ezkit_flash_resource = {
+        .start = 0x20000000,
+#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+        .end   = 0x202fffff,
+#else
+        .end   = 0x203fffff,
+#endif
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ezkit_flash_device = {
+        .name          = "physmap-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &ezkit_flash_data,
+        },
+        .num_resources = 1,
+        .resource      = &ezkit_flash_resource,
+};
+#endif
+
 static struct platform_device *cm_bf538_devices[] __initdata = {
 
         &bfin_dpmc,
@@ -598,6 +659,10 @@ static struct platform_device *cm_bf538_devices[] __initdata = {
 #endif
 
         &bfin_gpios_device,
+
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+        &ezkit_flash_device,
+#endif
 };
 
 static int __init ezkit_init(void)
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h
index 451cf8a82a42..26b76083e14c 100644
--- a/arch/blackfin/mach-bf538/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h
@@ -113,7 +113,7 @@
 /* GPIO Pins PC1 and PC4 Can Function as Normal Outputs */
 #define ANOMALY_05000375 (__SILICON_REVISION__ < 4)
 /* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
-#define ANOMALY_05000402 (__SILICON_REVISION__ < 4)
+#define ANOMALY_05000402 (__SILICON_REVISION__ == 3)
 /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
 #define ANOMALY_05000403 (1)
 /* Speculative Fetches Can Cause Undesired External FIFO Operations */
diff --git a/arch/blackfin/mach-bf538/include/mach/blackfin.h b/arch/blackfin/mach-bf538/include/mach/blackfin.h
index 9496196ac164..5ecee1690957 100644
--- a/arch/blackfin/mach-bf538/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf538/include/mach/blackfin.h
@@ -47,11 +47,6 @@
 #endif
 #endif
 
-/* UART_IIR Register */
-#define STATUS(x)       ((x << 1) & 0x06)
-#define STATUS_P1       0x02
-#define STATUS_P0       0x01
-
 #define BFIN_UART_NR_PORTS      3
 
 #define OFFSET_THR              0x00    /* Transmit Holding register            */
@@ -67,11 +62,6 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
 
-/* DPMC*/
-#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
-#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
-#define STOPCK_OFF STOPCK
-
 /* PLL_DIV Masks                                                                                                        */
 #define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
 #define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
diff --git a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h
index 99ca3f4305e2..1de67515dc9d 100644
--- a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h
+++ b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h
@@ -1310,6 +1310,7 @@
 #define bfin_write_PPI_CONTROL(val)    bfin_write16(PPI_CONTROL, val)
 #define bfin_read_PPI_STATUS()         bfin_read16(PPI_STATUS)
 #define bfin_write_PPI_STATUS(val)     bfin_write16(PPI_STATUS, val)
+#define bfin_clear_PPI_STATUS()        bfin_read_PPI_STATUS()
 #define bfin_read_PPI_DELAY()          bfin_read16(PPI_DELAY)
 #define bfin_write_PPI_DELAY(val)      bfin_write16(PPI_DELAY, val)
 #define bfin_read_PPI_COUNT()          bfin_read16(PPI_COUNT)
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index bdc330cd0e1c..1c58914a8740 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -2325,7 +2325,7 @@
 #define AMBEN_B0_B1     0x0004  /* Enable Asynchronous Memory Banks 0 & 1 only */
 #define AMBEN_B0_B1_B2  0x0006  /* Enable Asynchronous Memory Banks 0, 1, and 2 */
 #define AMBEN_ALL       0x0008  /* Enable Asynchronous Memory Banks (all) 0, 1, 2, and 3 */
-#define CDPRIO          0x0100  /* DMA has priority over core for for external accesses */
+#define CDPRIO          0x0100  /* DMA has priority over core for external accesses */
 
 /* EBIU_AMGCTL Bit Positions */
 #define AMCKEN_P                0x0000  /* Enable CLKOUT */
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index f5a3c30a41bd..e565aae11d72 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -291,6 +291,8 @@ static struct platform_device bfin_sir3_device = {
 #endif
 
 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+#include <linux/smsc911x.h>
+
 static struct resource smsc911x_resources[] = {
         {
                 .name = "smsc911x-memory",
@@ -304,11 +306,22 @@ static struct resource smsc911x_resources[] = {
                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
         },
 };
+
+static struct smsc911x_platform_config smsc911x_config = {
+        .flags = SMSC911X_USE_16BIT,
+        .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
 static struct platform_device smsc911x_device = {
         .name = "smsc911x",
         .id = 0,
         .num_resources = ARRAY_SIZE(smsc911x_resources),
         .resource = smsc911x_resources,
+        .dev = {
+                .platform_data = &smsc911x_config,
+        },
 };
 #endif
 
@@ -473,7 +486,7 @@ static struct mtd_partition para_partitions[] = {
                 .offset     = 0,
         }, {
                 .name       = "linux kernel(nor)",
-                .size       = 0x400000,
+                .size       = 0x100000,
                 .offset     = MTDPART_OFS_APPEND,
         }, {
                 .name       = "file system(nor)",
@@ -642,7 +655,7 @@ static struct resource bfin_spi1_resource[] = {
 
 /* SPI controller data */
 static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
-        .num_chipselect = 8,
+        .num_chipselect = 3,
         .enable_dma = 1,  /* master has the ability to do dma transfer */
         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 };
@@ -658,7 +671,7 @@ static struct platform_device bf54x_spi_master0 = {
 };
 
 static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
-        .num_chipselect = 8,
+        .num_chipselect = 3,
         .enable_dma = 1,  /* master has the ability to do dma transfer */
         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 };
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index dc0dd9b2bcef..c66f3801274f 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -99,8 +99,8 @@ static struct platform_device bfin_isp1760_device = {
 #include <mach/bf54x-lq043.h>
 
 static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
-        .width =        480,
-        .height =       272,
+        .width =        95,
+        .height =       54,
         .xres =         {480, 480, 480},
         .yres =         {272, 272, 272},
         .bpp =          {24, 24, 24},
@@ -702,7 +702,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 1,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
@@ -783,7 +783,7 @@ static struct resource bfin_spi1_resource[] = {
 
 /* SPI controller data */
 static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
-        .num_chipselect = 8,
+        .num_chipselect = 3,
         .enable_dma = 1,  /* master has the ability to do dma transfer */
         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 };
@@ -799,7 +799,7 @@ static struct platform_device bf54x_spi_master0 = {
 };
 
 static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
-        .num_chipselect = 8,
+        .num_chipselect = 3,
         .enable_dma = 1,  /* master has the ability to do dma transfer */
         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 };
@@ -869,7 +869,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
 #endif
-#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
                 .irq = 212,
diff --git a/arch/blackfin/mach-bf548/dma.c b/arch/blackfin/mach-bf548/dma.c
index 535980652bf6..d9239bc05dd4 100644
--- a/arch/blackfin/mach-bf548/dma.c
+++ b/arch/blackfin/mach-bf548/dma.c
@@ -91,16 +91,16 @@ int channel2irq(unsigned int channel)
                 ret_irq = IRQ_SPI1;
                 break;
         case CH_UART0_RX:
-                ret_irq = IRQ_UART_RX;
+                ret_irq = IRQ_UART0_RX;
                 break;
         case CH_UART0_TX:
-                ret_irq = IRQ_UART_TX;
+                ret_irq = IRQ_UART0_TX;
                 break;
         case CH_UART1_RX:
-                ret_irq = IRQ_UART_RX;
+                ret_irq = IRQ_UART1_RX;
                 break;
         case CH_UART1_TX:
-                ret_irq = IRQ_UART_TX;
+                ret_irq = IRQ_UART1_TX;
                 break;
         case CH_EPPI0:
                 ret_irq = IRQ_EPPI0;
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index cd040fe0bc5c..52b116ae522a 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -7,7 +7,7 @@
  */
 
 /* This file should be up to date with:
- *  - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
+ *  - Revision I, 07/23/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
  */
 
 #ifndef _MACH_ANOMALY_H_
@@ -162,6 +162,8 @@
 #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2)
 /* Incorrect Use of Stack in Lockbox Firmware During Authentication */
 #define ANOMALY_05000431 (__SILICON_REVISION__ < 3)
+/* SW Breakpoints Ignored Upon Return From Lockbox Authentication */
+#define ANOMALY_05000434 (1)
 /* OTP Write Accesses Not Supported */
 #define ANOMALY_05000442 (__SILICON_REVISION__ < 1)
 /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
@@ -176,12 +178,26 @@
 #define ANOMALY_05000449 (__SILICON_REVISION__ == 1)
 /* USB DMA Mode 1 Short Packet Data Corruption */
 #define ANOMALY_05000450 (1)
+/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */
+#define ANOMALY_05000452 (__SILICON_REVISION__ < 1)
 /* USB Receive Interrupt Is Not Generated in DMA Mode 1 */
-#define ANOMALY_05000456 (__SILICON_REVISION__ < 3)
+#define ANOMALY_05000456 (1)
+/* Host DMA Port Responds to Certain Bus Activity Without HOST_CE Assertion */
+#define ANOMALY_05000457 (1)
+/* USB DMA Mode 1 Failure When Multiple USB DMA Channels Are Concurrently Enabled */
+#define ANOMALY_05000460 (1)
 /* False Hardware Error when RETI Points to Invalid Memory */
 #define ANOMALY_05000461 (1)
+/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
+#define ANOMALY_05000462 (1)
+/* USB DMA RX Data Corruption */
+#define ANOMALY_05000463 (1)
+/* USB TX DMA Hang */
+#define ANOMALY_05000464 (1)
 /* USB Rx DMA hang */
 #define ANOMALY_05000465 (1)
+/* TxPktRdy Bit Not Set for Transmit Endpoint When Core and DMA Access USB Endpoint FIFOs Simultaneously */
+#define ANOMALY_05000466 (1)
 /* Possible RX data corruption when control & data EP FIFOs are accessed via the core */
 #define ANOMALY_05000467 (1)
 
@@ -230,6 +246,7 @@
 #define ANOMALY_05000364 (0)
 #define ANOMALY_05000380 (0)
 #define ANOMALY_05000400 (0)
+#define ANOMALY_05000402 (0)
 #define ANOMALY_05000412 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000435 (0)
diff --git a/arch/blackfin/mach-bf548/include/mach/blackfin.h b/arch/blackfin/mach-bf548/include/mach/blackfin.h
index 6b97396d817f..318667b2f036 100644
--- a/arch/blackfin/mach-bf548/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf548/include/mach/blackfin.h
@@ -72,97 +72,8 @@
 #include "cdefBF549.h"
 #endif
 
-/* UART 1*/
-#define bfin_read_UART_THR()            bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val)        bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR()            bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val)        bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL()            bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val)        bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER()            bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val)        bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH()            bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val)        bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR()            bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val)        bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR()            bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val)        bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR()            bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val)        bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR()            bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val)        bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR()            bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val)        bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL()           bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val)       bfin_write_UART1_GCTL(val)
-
 #endif
 
-/* MAP used DEFINES from BF533 to BF54x - so we don't need to change 
- * them in the driver, kernel, etc. */
-
-/* UART_IIR Register */
-#define STATUS(x)       ((x << 1) & 0x06)
-#define STATUS_P1       0x02
-#define STATUS_P0       0x01
-
-/* UART 0*/
-
-/* DMA Channel */
-#define bfin_read_CH_UART_RX()          bfin_read_CH_UART1_RX()
-#define bfin_write_CH_UART_RX(val)      bfin_write_CH_UART1_RX(val)
-#define bfin_read_CH_UART_TX()          bfin_read_CH_UART1_TX()
-#define bfin_write_CH_UART_TX(val)      bfin_write_CH_UART1_TX(val)
-#define CH_UART_RX                      CH_UART1_RX
-#define CH_UART_TX                      CH_UART1_TX
-
-/* System Interrupt Controller */
-#define bfin_read_IRQ_UART_RX()         bfin_read_IRQ_UART1_RX()
-#define bfin_write_IRQ_UART_RX(val)     bfin_write_IRQ_UART1_RX(val)
-#define bfin_read_IRQ_UART_TX()         bfin_read_IRQ_UART1_TX()
-#define bfin_write_IRQ_UART_TX(val)     bfin_write_IRQ_UART1_TX(val)
-#define bfin_read_IRQ_UART_ERROR()      bfin_read_IRQ_UART1_ERROR()
-#define bfin_write_IRQ_UART_ERROR(val)  bfin_write_IRQ_UART1_ERROR(val)
-#define IRQ_UART_RX                     IRQ_UART1_RX
-#define IRQ_UART_TX                     IRQ_UART1_TX
-#define IRQ_UART_ERROR                  IRQ_UART1_ERROR
-
-/* MMR Registers*/
-#define bfin_read_UART_THR()            bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val)        bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR()            bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val)        bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL()            bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val)        bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER()            bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val)        bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH()            bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val)        bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR()            bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val)        bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR()            bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val)        bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR()            bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val)        bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR()            bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val)        bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR()            bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val)        bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL()           bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val)       bfin_write_UART1_GCTL(val)
-
-#define BFIN_UART_THR                   UART1_THR
-#define BFIN_UART_RBR                   UART1_RBR
-#define BFIN_UART_DLL                   UART1_DLL
-#define BFIN_UART_IER                   UART1_IER
-#define BFIN_UART_DLH                   UART1_DLH
-#define BFIN_UART_IIR                   UART1_IIR
-#define BFIN_UART_LCR                   UART1_LCR
-#define BFIN_UART_MCR                   UART1_MCR
-#define BFIN_UART_LSR                   UART1_LSR
-#define BFIN_UART_SCR                   UART1_SCR
-#define BFIN_UART_GCTL                  UART1_GCTL
-
 #define BFIN_UART_NR_PORTS      4
 
 #define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 0c9d72c5f5ba..6577ecfcf11e 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -42,6 +42,7 @@
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
 #include <asm/dpmc.h>
+#include <linux/mtd/physmap.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -98,13 +99,6 @@ static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
-        .enable_dma = 0,
-        .bits_per_word = 16,
-};
-#endif
-
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
         .enable_dma = 0,
@@ -139,28 +133,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
                 .controller_data = &ad1836_spi_chip_info,
         },
 #endif
-#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
-        {
-                .modalias = "ad9960-spi",
-                .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
-                .bus_num = 0,
-                .chip_select = 1,
-                .controller_data = &ad9960_spi_chip_info,
-        },
-#endif
 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
         {
                 .modalias = "mmc_spi",
-                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
-                .chip_select = 5,
+                .chip_select = 1,
                 .controller_data = &mmc_spi_chip_info,
                 .mode = SPI_MODE_3,
         },
@@ -213,6 +198,13 @@ static struct platform_device hitachi_fb_device = {
 
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
 
 static struct resource smc91x_resources[] = {
         {
@@ -231,6 +223,65 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
+};
+#endif
+
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+#include <linux/smsc911x.h>
+
+static struct resource smsc911x_resources[] = {
+        {
+                .name = "smsc911x-memory",
+                .start = 0x24008000,
+                .end = 0x24008000 + 0xFF,
+                .flags = IORESOURCE_MEM,
+        },
+        {
+                .start = IRQ_PF43,
+                .end = IRQ_PF43,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        },
+};
+
+static struct smsc911x_platform_config smsc911x_config = {
+        .flags = SMSC911X_USE_16BIT,
+        .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device smsc911x_device = {
+        .name = "smsc911x",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(smsc911x_resources),
+        .resource = smsc911x_resources,
+        .dev = {
+                .platform_data = &smsc911x_config,
+        },
+};
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+static struct resource net2272_bfin_resources[] = {
+        {
+                .start = 0x24000000,
+                .end = 0x24000000 + 0x100,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF45,
+                .end = IRQ_PF45,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct platform_device net2272_bfin_device = {
+        .name = "net2272",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
+        .resource = net2272_bfin_resources,
 };
 #endif
 
@@ -369,6 +420,46 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition para_partitions[] = {
+        {
+                .name       = "bootloader(nor)",
+                .size       = 0x40000,
+                .offset     = 0,
+        }, {
+                .name       = "linux kernel(nor)",
+                .size       = 0x100000,
+                .offset     = MTDPART_OFS_APPEND,
+        }, {
+                .name       = "file system(nor)",
+                .size       = MTDPART_SIZ_FULL,
+                .offset     = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data para_flash_data = {
+        .width      = 2,
+        .parts      = para_partitions,
+        .nr_parts   = ARRAY_SIZE(para_partitions),
+};
+
+static struct resource para_flash_resource = {
+        .start = 0x20000000,
+        .end   = 0x207fffff,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device para_flash_device = {
+        .name          = "physmap-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &para_flash_data,
+        },
+        .num_resources = 1,
+        .resource      = &para_flash_resource,
+};
+#endif
+
 static const unsigned int cclk_vlev_datasheet[] =
 {
         VRPAIR(VLEV_085, 250000000),
@@ -422,6 +513,14 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
         &smc91x_device,
 #endif
 
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+        &smsc911x_device,
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+        &net2272_bfin_device,
+#endif
+
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
         &bfin_spi0_device,
 #endif
@@ -430,6 +529,10 @@ static struct platform_device *cm_bf561_devices[] __initdata = {
         &bfin_pata_device,
 #endif
 
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+        &para_flash_device,
+#endif
+
         &bfin_gpios_device,
 };
 
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 4df904f9e90a..caed96bb957e 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -147,6 +147,14 @@ static struct platform_device net2272_bfin_device = {
  *  Driver needs to know address, irq and flag pin.
  */
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
+#include <linux/smc91x.h>
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
+        .leda = RPC_LED_100_10,
+        .ledb = RPC_LED_TX_RX,
+};
+
 static struct resource smc91x_resources[] = {
         {
                 .name = "smc91x-regs",
@@ -166,6 +174,9 @@ static struct platform_device smc91x_device = {
         .id = 0,
         .num_resources = ARRAY_SIZE(smc91x_resources),
         .resource = smc91x_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
 };
 #endif
 
@@ -334,7 +345,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
         {
-                .modalias = "ad1836-spi",
+                .modalias = "ad1836",
                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
                 .bus_num = 0,
                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index a5312b2d267e..70da495c9665 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -262,6 +262,8 @@
 #define ANOMALY_05000366 (1)
 /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
 #define ANOMALY_05000371 (1)
+/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
+#define ANOMALY_05000402 (__SILICON_REVISION__ == 4)
 /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
 #define ANOMALY_05000403 (1)
 /* TESTSET Instruction Causes Data Corruption with Writeback Data Cache Enabled */
diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S
index 35280f06b7b6..f72a6af20c4f 100644
--- a/arch/blackfin/mach-bf561/secondary.S
+++ b/arch/blackfin/mach-bf561/secondary.S
@@ -85,16 +85,10 @@ ENTRY(_coreb_trampoline_start)
         R0 = ~ENICPLB;
         R0 = R0 & R1;
 
-        /* Anomaly 05000125 */
-#ifdef ANOMALY_05000125
-        CLI R2;
-        SSYNC;
-#endif
+        /* Disabling of CPLBs should be proceeded by a CSYNC */
+        CSYNC;
         [p0] = R0;
         SSYNC;
-#ifdef ANOMALY_05000125
-        STI R2;
-#endif
 
         /* Turn off the dcache */
         p0.l = LO(DMEM_CONTROL);
@@ -103,16 +97,10 @@ ENTRY(_coreb_trampoline_start)
         R0 = ~ENDCPLB;
         R0 = R0 & R1;
 
-        /* Anomaly 05000125 */
-#ifdef ANOMALY_05000125
-        CLI R2;
-        SSYNC;
-#endif
+        /* Disabling of CPLBs should be proceeded by a CSYNC */
+        CSYNC;
         [p0] = R0;
         SSYNC;
-#ifdef ANOMALY_05000125
-        STI R2;
-#endif
 
         /* in case of double faults, save a few things */
         p0.l = _init_retx_coreb;
@@ -126,22 +114,22 @@ ENTRY(_coreb_trampoline_start)
          * below
          */
         GET_PDA(p0, r0);
-        r7 = [p0 + PDA_RETX];
+        r7 = [p0 + PDA_DF_RETX];
         p1.l = _init_saved_retx_coreb;
         p1.h = _init_saved_retx_coreb;
         [p1] = r7;
 
-        r7 = [p0 + PDA_DCPLB];
+        r7 = [p0 + PDA_DF_DCPLB];
         p1.l = _init_saved_dcplb_fault_addr_coreb;
         p1.h = _init_saved_dcplb_fault_addr_coreb;
         [p1] = r7;
 
-        r7 = [p0 + PDA_ICPLB];
+        r7 = [p0 + PDA_DF_ICPLB];
         p1.l = _init_saved_icplb_fault_addr_coreb;
         p1.h = _init_saved_icplb_fault_addr_coreb;
         [p1] = r7;
 
-        r7 = [p0 + PDA_SEQSTAT];
+        r7 = [p0 + PDA_DF_SEQSTAT];
         p1.l = _init_saved_seqstat_coreb;
         p1.h = _init_saved_seqstat_coreb;
         [p1] = r7;
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index dd8b2dc97f56..814cb483853b 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -6,7 +6,6 @@ obj-y := \
         cache.o cache-c.o entry.o head.o \
         interrupt.o arch_checks.o ints-priority.o
 
-obj-$(CONFIG_BFIN_ICACHE_LOCK) += lock.o
 obj-$(CONFIG_PM)          += pm.o dpmc_modes.o
 obj-$(CONFIG_CPU_FREQ)    += cpufreq.o
 obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/cache-c.c b/arch/blackfin/mach-common/cache-c.c
index b59ce3cb3807..4ebbd78db3a4 100644
--- a/arch/blackfin/mach-common/cache-c.c
+++ b/arch/blackfin/mach-common/cache-c.c
@@ -1,14 +1,16 @@
 /*
  * Blackfin cache control code (simpler control-style functions)
  *
- * Copyright 2004-2008 Analog Devices Inc.
+ * Copyright 2004-2009 Analog Devices Inc.
  *
  * Enter bugs at http://blackfin.uclinux.org/
  *
  * Licensed under the GPL-2 or later.
  */
 
+#include <linux/init.h>
 #include <asm/blackfin.h>
+#include <asm/cplbinit.h>
 
 /* Invalidate the Entire Data cache by
  * clearing DMC[1:0] bits
@@ -34,3 +36,43 @@ void blackfin_invalidate_entire_icache(void)
         SSYNC();
 }
 
+#if defined(CONFIG_BFIN_ICACHE) || defined(CONFIG_BFIN_DCACHE)
+
+static void
+bfin_cache_init(struct cplb_entry *cplb_tbl, unsigned long cplb_addr,
+                unsigned long cplb_data, unsigned long mem_control,
+                unsigned long mem_mask)
+{
+        int i;
+
+        for (i = 0; i < MAX_CPLBS; i++) {
+                bfin_write32(cplb_addr + i * 4, cplb_tbl[i].addr);
+                bfin_write32(cplb_data + i * 4, cplb_tbl[i].data);
+        }
+
+        _enable_cplb(mem_control, mem_mask);
+}
+
+#ifdef CONFIG_BFIN_ICACHE
+void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
+{
+        bfin_cache_init(icplb_tbl, ICPLB_ADDR0, ICPLB_DATA0, IMEM_CONTROL,
+                (IMC | ENICPLB));
+}
+#endif
+
+#ifdef CONFIG_BFIN_DCACHE
+void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
+{
+        /*
+         *  Anomaly notes:
+         *  05000287 - We implement workaround #2 - Change the DMEM_CONTROL
+         *  register, so that the port preferences for DAG0 and DAG1 are set
+         *  to port B
+         */
+        bfin_cache_init(dcplb_tbl, DCPLB_ADDR0, DCPLB_DATA0, DMEM_CONTROL,
+                (DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0)));
+}
+#endif
+
+#endif
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index fb1795d5be2a..1e7cac23e25f 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -301,27 +301,31 @@ ENTRY(_ex_replaceable)
         nop;
 
 ENTRY(_ex_trap_c)
+        /* The only thing that has been saved in this context is
+         * (R7:6,P5:4), ASTAT & SP - don't use anything else
+         */
+
+        GET_PDA(p5, r6);
+
         /* Make sure we are not in a double fault */
         p4.l = lo(IPEND);
         p4.h = hi(IPEND);
         r7 = [p4];
         CC = BITTST (r7, 5);
         if CC jump _double_fault;
+        [p5 + PDA_EXIPEND] = r7;
 
         /* Call C code (trap_c) to handle the exception, which most
          * likely involves sending a signal to the current process.
          * To avoid double faults, lower our priority to IRQ5 first.
          */
-        P5.h = _exception_to_level5;
-        P5.l = _exception_to_level5;
+        r7.h = _exception_to_level5;
+        r7.l = _exception_to_level5;
         p4.l = lo(EVT5);
         p4.h = hi(EVT5);
-        [p4] = p5;
+        [p4] = r7;
         csync;
 
-        GET_PDA(p5, r6);
-#ifndef CONFIG_DEBUG_DOUBLEFAULT
-
         /*
          * Save these registers, as they are only valid in exception context
          *  (where we are now - as soon as we defer to IRQ5, they can change)
@@ -341,7 +345,10 @@ ENTRY(_ex_trap_c)
 
         r6 = retx;
         [p5 + PDA_RETX] = r6;
-#endif
+
+        r6 = SEQSTAT;
+        [p5 + PDA_SEQSTAT] = r6;
+
         /* Save the state of single stepping */
         r6 = SYSCFG;
         [p5 + PDA_SYSCFG] = r6;
@@ -349,8 +356,7 @@ ENTRY(_ex_trap_c)
         BITCLR(r6, SYSCFG_SSSTEP_P);
         SYSCFG = r6;
 
-        /* Disable all interrupts, but make sure level 5 is enabled so
-         * we can switch to that level.  Save the old mask.  */
+        /* Save the current IMASK, since we change in order to jump to level 5 */
         cli r6;
         [p5 + PDA_EXIMASK] = r6;
 
@@ -358,9 +364,21 @@ ENTRY(_ex_trap_c)
         p4.h = hi(SAFE_USER_INSTRUCTION);
         retx = p4;
 
+        /* Disable all interrupts, but make sure level 5 is enabled so
+         * we can switch to that level.
+         */
         r6 = 0x3f;
         sti r6;
 
+        /* In case interrupts are disabled IPEND[4] (global interrupt disable bit)
+         * clear it (re-enabling interrupts again) by the special sequence of pushing
+         * RETI onto the stack.  This way we can lower ourselves to IVG5 even if the
+         * exception was taken after the interrupt handler was called but before it
+         * got a chance to enable global interrupts itself.
+         */
+        [--sp] = reti;
+        sp += 4;
+
         raise 5;
         jump.s _bfin_return_from_exception;
 ENDPROC(_ex_trap_c)
@@ -379,8 +397,7 @@ ENTRY(_double_fault)
 
         R5 = [P4];              /* Control Register*/
         BITCLR(R5,ENICPLB_P);
-        SSYNC;          /* SSYNC required before writing to IMEM_CONTROL. */
-        .align 8;
+        CSYNC;          /* Disabling of CPLBs should be proceeded by a CSYNC */
         [P4] = R5;
         SSYNC;
 
@@ -388,8 +405,7 @@ ENTRY(_double_fault)
         P4.H = HI(DMEM_CONTROL);
         R5 = [P4];
         BITCLR(R5,ENDCPLB_P);
-        SSYNC;          /* SSYNC required before writing to DMEM_CONTROL. */
-        .align 8;
+        CSYNC;          /* Disabling of CPLBs should be proceeded by a CSYNC */
         [P4] = R5;
         SSYNC;
 
@@ -420,47 +436,55 @@ ENDPROC(_double_fault)
 ENTRY(_exception_to_level5)
         SAVE_ALL_SYS
 
-        GET_PDA(p4, r7);        /* Fetch current PDA */
-        r6 = [p4 + PDA_RETX];
+        GET_PDA(p5, r7);        /* Fetch current PDA */
+        r6 = [p5 + PDA_RETX];
         [sp + PT_PC] = r6;
 
-        r6 = [p4 + PDA_SYSCFG];
+        r6 = [p5 + PDA_SYSCFG];
         [sp + PT_SYSCFG] = r6;
 
-        /* Restore interrupt mask.  We haven't pushed RETI, so this
-         * doesn't enable interrupts until we return from this handler.  */
-        r6 = [p4 + PDA_EXIMASK];
-        sti r6;
+        r6 = [p5 + PDA_SEQSTAT]; /* Read back seqstat */
+        [sp + PT_SEQSTAT] = r6;
 
         /* Restore the hardware error vector.  */
-        P5.h = _evt_ivhw;
-        P5.l = _evt_ivhw;
+        r7.h = _evt_ivhw;
+        r7.l = _evt_ivhw;
         p4.l = lo(EVT5);
         p4.h = hi(EVT5);
-        [p4] = p5;
+        [p4] = r7;
         csync;
 
-        p2.l = lo(IPEND);
-        p2.h = hi(IPEND);
-        csync;
-        r0 = [p2];              /* Read current IPEND */
-        [sp + PT_IPEND] = r0;   /* Store IPEND */
+#ifdef CONFIG_DEBUG_DOUBLEFAULT
+        /* Now that we have the hardware error vector programmed properly
+         * we can re-enable interrupts (IPEND[4]), so if the _trap_c causes
+         * another hardware error, we can catch it (self-nesting).
+         */
+        [--sp] = reti;
+        sp += 4;
+#endif
+
+        r7 = [p5 + PDA_EXIPEND] /* Read the IPEND from the Exception state */
+        [sp + PT_IPEND] = r7;   /* Store IPEND onto the stack */
 
         r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         SP += -12;
         call _trap_c;
         SP += 12;
 
-#ifdef CONFIG_DEBUG_DOUBLEFAULT
-        /* Grab ILAT */
-        p2.l = lo(ILAT);
-        p2.h = hi(ILAT);
-        r0 = [p2];
-        r1 = 0x20;  /* Did I just cause anther HW error? */
-        r0 = r0 & r1;
-        CC = R0 == R1;
-        if CC JUMP _double_fault;
-#endif
+        /* If interrupts were off during the exception (IPEND[4] = 1), turn them off
+         * before we return.
+         */
+        CC = BITTST(r7, EVT_IRPTEN_P)
+        if !CC jump 1f;
+        /* this will load a random value into the reti register - but that is OK,
+         * since we do restore it to the correct value in the 'RESTORE_ALL_SYS' macro
+         */
+        sp += -4;
+        reti = [sp++];
+1:
+        /* restore the interrupt mask (IMASK) */
+        r6 = [p5 + PDA_EXIMASK];
+        sti r6;
 
         call _ret_from_exception;
         RESTORE_ALL_SYS
@@ -474,7 +498,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
          */
         EX_SCRATCH_REG = sp;
         GET_PDA_SAFE(sp);
-        sp = [sp + PDA_EXSTACK]
+        sp = [sp + PDA_EXSTACK];
         /* Try to deal with syscalls quickly.  */
         [--sp] = ASTAT;
         [--sp] = (R7:6,P5:4);
@@ -489,14 +513,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
         ssync;
 #endif
 
-#if ANOMALY_05000283 || ANOMALY_05000315
-        cc = r7 == r7;
-        p5.h = HI(CHIPID);
-        p5.l = LO(CHIPID);
-        if cc jump 1f;
-        r7.l = W[p5];
-1:
-#endif
+        ANOMALY_283_315_WORKAROUND(p5, r7)
 
 #ifdef CONFIG_DEBUG_DOUBLEFAULT
         /*
@@ -510,18 +527,18 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
         p4.l = lo(DCPLB_FAULT_ADDR);
         p4.h = hi(DCPLB_FAULT_ADDR);
         r7 = [p4];
-        [p5 + PDA_DCPLB] = r7;
+        [p5 + PDA_DF_DCPLB] = r7;
 
         p4.l = lo(ICPLB_FAULT_ADDR);
         p4.h = hi(ICPLB_FAULT_ADDR);
         r7 = [p4];
-        [p5 + PDA_ICPLB] = r7;
+        [p5 + PDA_DF_ICPLB] = r7;
 
-        r6 = retx;
-        [p5 + PDA_RETX] = r6;
+        r7 = retx;
+        [p5 + PDA_DF_RETX] = r7;
 
         r7 = SEQSTAT;           /* reason code is in bit 5:0 */
-        [p5 + PDA_SEQSTAT] = r7;
+        [p5 + PDA_DF_SEQSTAT] = r7;
 #else
         r7 = SEQSTAT;           /* reason code is in bit 5:0 */
 #endif
@@ -686,8 +703,14 @@ ENTRY(_system_call)
 #ifdef CONFIG_IPIPE
         cc = BITTST(r7, TIF_IRQ_SYNC);
         if !cc jump .Lsyscall_no_irqsync;
+        /*
+         * Clear IPEND[4] manually to undo what resume_userspace_1 just did;
+         * we need this so that high priority domain interrupts may still
+         * preempt the current domain while the pipeline log is being played
+         * back.
+         */
         [--sp] = reti;
-        r0 = [sp++];
+        SP += 4; /* don't merge with next insn to keep the pattern obvious */
         SP += -12;
         call ___ipipe_sync_root;
         SP += 12;
@@ -699,7 +722,7 @@ ENTRY(_system_call)
 
         /* Reenable interrupts.  */
         [--sp] = reti;
-        r0 = [sp++];
+        sp += 4;
 
         SP += -12;
         call _schedule;
@@ -715,7 +738,7 @@ ENTRY(_system_call)
 .Lsyscall_do_signals:
         /* Reenable interrupts.  */
         [--sp] = reti;
-        r0 = [sp++];
+        sp += 4;
 
         r0 = sp;
         SP += -12;
@@ -725,10 +748,6 @@ ENTRY(_system_call)
 .Lsyscall_really_exit:
         r5 = [sp + PT_RESERVED];
         rets = r5;
-#ifdef CONFIG_IPIPE
-        [--sp] = reti;
-        r5 = [sp++];
-#endif /* CONFIG_IPIPE */
         rts;
 ENDPROC(_system_call)
 
@@ -816,13 +835,13 @@ ENDPROC(_resume)
 
 ENTRY(_ret_from_exception)
 #ifdef CONFIG_IPIPE
-        [--sp] = rets;
-        SP += -12;
-        call ___ipipe_check_root
-        SP += 12
-        rets = [sp++];
-        cc = r0 == 0;
-        if cc jump 4f;                /* not on behalf of Linux, get out */
+        p2.l = _per_cpu__ipipe_percpu_domain;
+        p2.h = _per_cpu__ipipe_percpu_domain;
+        r0.l = _ipipe_root;
+        r0.h = _ipipe_root;
+        r2 = [p2];
+        cc = r0 == r2;
+        if !cc jump 4f;  /* not on behalf of the root domain, get out */
 #endif /* CONFIG_IPIPE */
         p2.l = lo(IPEND);
         p2.h = hi(IPEND);
@@ -882,14 +901,9 @@ ENDPROC(_ret_from_exception)
 
 #ifdef CONFIG_IPIPE
 
-_sync_root_irqs:
-        [--sp] = reti;          /* Reenable interrupts */
-        r0 = [sp++];
-        jump.l ___ipipe_sync_root
-
 _resume_kernel_from_int:
-        r0.l = _sync_root_irqs
-        r0.h = _sync_root_irqs
+        r0.l = ___ipipe_sync_root;
+        r0.h = ___ipipe_sync_root;
         [--sp] = rets;
         [--sp] = ( r7:4, p5:3 );
         SP += -12;
@@ -953,10 +967,10 @@ ENTRY(_lower_to_irq14)
 #endif
 
 #ifdef CONFIG_DEBUG_HWERR
-        /* enable irq14 & hwerr interrupt, until we transition to _evt14_softirq */
+        /* enable irq14 & hwerr interrupt, until we transition to _evt_evt14 */
         r0 = (EVT_IVG14 | EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
 #else
-        /* Only enable irq14 interrupt, until we transition to _evt14_softirq */
+        /* Only enable irq14 interrupt, until we transition to _evt_evt14 */
         r0 = (EVT_IVG14 | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
 #endif
         sti r0;
@@ -964,7 +978,7 @@ ENTRY(_lower_to_irq14)
         rti;
 ENDPROC(_lower_to_irq14)
 
-ENTRY(_evt14_softirq)
+ENTRY(_evt_evt14)
 #ifdef CONFIG_DEBUG_HWERR
         r0 = (EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
         sti r0;
@@ -974,7 +988,7 @@ ENTRY(_evt14_softirq)
         [--sp] = RETI;
         SP += 4;
         rts;
-ENDPROC(_evt14_softirq)
+ENDPROC(_evt_evt14)
 
 ENTRY(_schedule_and_signal_from_int)
         /* To end up here, vector 15 was changed - so we have to change it
@@ -1004,6 +1018,12 @@ ENTRY(_schedule_and_signal_from_int)
 #endif
         sti r0;
 
+        /* finish the userspace "atomic" functions for it */
+        r1 = FIXED_CODE_END;
+        r2 = [sp + PT_PC];
+        cc = r1 <= r2;
+        if cc jump .Lresume_userspace (bp);
+
         r0 = sp;
         sp += -12;
         call _finish_atomic_sections;
@@ -1107,14 +1127,7 @@ ENTRY(_early_trap)
         SAVE_ALL_SYS
         trace_buffer_stop(p0,r0);
 
-#if ANOMALY_05000283 || ANOMALY_05000315
-        cc = r5 == r5;
-        p4.h = HI(CHIPID);
-        p4.l = LO(CHIPID);
-        if cc jump 1f;
-        r5.l = W[p4];
-1:
-#endif
+        ANOMALY_283_315_WORKAROUND(p4, r5)
 
         /* Turn caches off, to ensure we don't get double exceptions */
 
@@ -1123,9 +1136,7 @@ ENTRY(_early_trap)
 
         R5 = [P4];              /* Control Register*/
         BITCLR(R5,ENICPLB_P);
-        CLI R1;
-        SSYNC;          /* SSYNC required before writing to IMEM_CONTROL. */
-        .align 8;
+        CSYNC;          /* Disabling of CPLBs should be proceeded by a CSYNC */
         [P4] = R5;
         SSYNC;
 
@@ -1133,11 +1144,9 @@ ENTRY(_early_trap)
         P4.H = HI(DMEM_CONTROL);
         R5 = [P4];
         BITCLR(R5,ENDCPLB_P);
-        SSYNC;          /* SSYNC required before writing to DMEM_CONTROL. */
-        .align 8;
+        CSYNC;          /* Disabling of CPLBs should be proceeded by a CSYNC */
         [P4] = R5;
         SSYNC;
-        STI R1;
 
         r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         r1 = RETX;
@@ -1611,7 +1620,7 @@ ENTRY(_sys_call_table)
         .long _sys_preadv
         .long _sys_pwritev
         .long _sys_rt_tgsigqueueinfo
-        .long _sys_perf_counter_open
+        .long _sys_perf_event_open
 
         .rept NR_syscalls-(.-_sys_call_table)/4
         .long _sys_ni_syscall
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index f826f6b9f917..9c79dfea2a53 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -124,22 +124,22 @@ ENTRY(__start)
          * below
          */
         GET_PDA(p0, r0);
-        r6 = [p0 + PDA_RETX];
+        r6 = [p0 + PDA_DF_RETX];
         p1.l = _init_saved_retx;
         p1.h = _init_saved_retx;
         [p1] = r6;
 
-        r6 = [p0 + PDA_DCPLB];
+        r6 = [p0 + PDA_DF_DCPLB];
         p1.l = _init_saved_dcplb_fault_addr;
         p1.h = _init_saved_dcplb_fault_addr;
         [p1] = r6;
 
-        r6 = [p0 + PDA_ICPLB];
+        r6 = [p0 + PDA_DF_ICPLB];
         p1.l = _init_saved_icplb_fault_addr;
         p1.h = _init_saved_icplb_fault_addr;
         [p1] = r6;
 
-        r6 = [p0 + PDA_SEQSTAT];
+        r6 = [p0 + PDA_DF_SEQSTAT];
         p1.l = _init_saved_seqstat;
         p1.h = _init_saved_seqstat;
         [p1] = r6;
@@ -153,6 +153,8 @@ ENTRY(__start)
 
 #ifdef CONFIG_EARLY_PRINTK
         call _init_early_exception_vectors;
+        r0 = (EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
+        sti r0;
 #endif
 
         r0 = 0 (x);
@@ -212,12 +214,21 @@ ENTRY(__start)
         [p0] = p1;
         csync;
 
+#ifdef CONFIG_EARLY_PRINTK
+        r0 = (EVT_IVG15 | EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU) (z);
+#else
         r0 = EVT_IVG15 (z);
+#endif
         sti r0;
 
         raise 15;
+#ifdef CONFIG_EARLY_PRINTK
+        p0.l = _early_trap;
+        p0.h = _early_trap;
+#else
         p0.l = .LWAIT_HERE;
         p0.h = .LWAIT_HERE;
+#endif
         reti = p0;
 #if ANOMALY_05000281
         nop; nop; nop;
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 9c46680186e4..82d417ef4b5b 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -119,14 +119,8 @@ __common_int_entry:
         fp = 0;
 #endif
 
-#if ANOMALY_05000283 || ANOMALY_05000315
-        cc = r7 == r7;
-        p5.h = HI(CHIPID);
-        p5.l = LO(CHIPID);
-        if cc jump 1f;
-        r7.l = W[p5];
-1:
-#endif
+        ANOMALY_283_315_WORKAROUND(p5, r7)
+
         r1 =  sp;
         SP += -12;
 #ifdef CONFIG_IPIPE
@@ -158,14 +152,7 @@ ENTRY(_evt_ivhw)
         fp = 0;
 #endif
 
-#if ANOMALY_05000283 || ANOMALY_05000315
-        cc = r7 == r7;
-        p5.h = HI(CHIPID);
-        p5.l = LO(CHIPID);
-        if cc jump 1f;
-        r7.l = W[p5];
-1:
-#endif
+        ANOMALY_283_315_WORKAROUND(p5, r7)
 
         /* Handle all stacked hardware errors
          * To make sure we don't hang forever, only do it 10 times
@@ -261,6 +248,31 @@ ENTRY(_evt_system_call)
 ENDPROC(_evt_system_call)
 
 #ifdef CONFIG_IPIPE
+/*
+ * __ipipe_call_irqtail: lowers the current priority level to EVT15
+ * before running a user-defined routine, then raises the priority
+ * level to EVT14 to prepare the caller for a normal interrupt
+ * return through RTI.
+ *
+ * We currently use this facility in two occasions:
+ *
+ * - to branch to __ipipe_irq_tail_hook as requested by a high
+ *   priority domain after the pipeline delivered an interrupt,
+ *   e.g. such as Xenomai, in order to start its rescheduling
+ *   procedure, since we may not switch tasks when IRQ levels are
+ *   nested on the Blackfin, so we have to fake an interrupt return
+ *   so that we may reschedule immediately.
+ *
+ * - to branch to sync_root_irqs, in order to play any interrupt
+ *   pending for the root domain (i.e. the Linux kernel). This lowers
+ *   the core priority level enough so that Linux IRQ handlers may
+ *   never delay interrupts handled by high priority domains; we defer
+ *   those handlers until this point instead. This is a substitute
+ *   to using a threaded interrupt model for the Linux kernel.
+ *
+ * r0: address of user-defined routine
+ * context: caller must have preempted EVT15, hw interrupts must be off.
+ */
 ENTRY(___ipipe_call_irqtail)
         p0 = r0;
         r0.l = 1f;
@@ -276,33 +288,19 @@ ENTRY(___ipipe_call_irqtail)
         ( r7:4, p5:3 ) = [sp++];
         rets = [sp++];
 
-        [--sp] = reti;
-        reti = [sp++];          /* IRQs are off. */
-        r0.h = 3f;
-        r0.l = 3f;
-        p0.l = lo(EVT14);
-        p0.h = hi(EVT14);
-        [p0] = r0;
-        csync;
-        r0 = 0x401f (z);
+#ifdef CONFIG_DEBUG_HWERR
+        /* enable irq14 & hwerr interrupt, until we transition to _evt_evt14 */
+        r0 = (EVT_IVG14 | EVT_IVHW | \
+                EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
+#else
+        /* Only enable irq14 interrupt, until we transition to _evt_evt14 */
+        r0 = (EVT_IVG14 | \
+                EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
+#endif
         sti r0;
-        raise 14;
-        [--sp] = reti;          /* IRQs on. */
+        raise 14;               /* Branches to _evt_evt14 */
 2:
         jump 2b;                /* Likely paranoid. */
-3:
-        sp += 4;                /* Discard saved RETI */
-        r0.h = _evt14_softirq;
-        r0.l = _evt14_softirq;
-        p0.l = lo(EVT14);
-        p0.h = hi(EVT14);
-        [p0] = r0;
-        csync;
-        p0.l = _bfin_irq_flags;
-        p0.h = _bfin_irq_flags;
-        r0 = [p0];
-        sti r0;
-        rts;
 ENDPROC(___ipipe_call_irqtail)
 
 #endif /* CONFIG_IPIPE */
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index b42150190d0e..6ffda78aaf9d 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -967,7 +967,7 @@ void __cpuinit init_exception_vectors(void)
         bfin_write_EVT11(evt_evt11);
         bfin_write_EVT12(evt_evt12);
         bfin_write_EVT13(evt_evt13);
-        bfin_write_EVT14(evt14_softirq);
+        bfin_write_EVT14(evt_evt14);
         bfin_write_EVT15(evt_system_call);
         CSYNC();
 }
@@ -1052,18 +1052,26 @@ int __init init_arch_irq(void)
                         set_irq_chained_handler(irq, bfin_demux_error_irq);
                         break;
 #endif
+
 #ifdef CONFIG_SMP
+#ifdef CONFIG_TICKSOURCE_GPTMR0
+                case IRQ_TIMER0:
+#endif
+#ifdef CONFIG_TICKSOURCE_CORETMR
+                case IRQ_CORETMR:
+#endif
                 case IRQ_SUPPLE_0:
                 case IRQ_SUPPLE_1:
                         set_irq_handler(irq, handle_percpu_irq);
                         break;
 #endif
+
 #ifdef CONFIG_IPIPE
 #ifndef CONFIG_TICKSOURCE_CORETMR
                 case IRQ_TIMER0:
                         set_irq_handler(irq, handle_simple_irq);
                         break;
-#endif /* !CONFIG_TICKSOURCE_CORETMR */
+#endif
                 case IRQ_CORETMR:
                         set_irq_handler(irq, handle_simple_irq);
                         break;
@@ -1071,15 +1079,10 @@ int __init init_arch_irq(void)
                         set_irq_handler(irq, handle_level_irq);
                         break;
 #else /* !CONFIG_IPIPE */
-#ifdef CONFIG_TICKSOURCE_GPTMR0
-                case IRQ_TIMER0:
-                        set_irq_handler(irq, handle_percpu_irq);
-                        break;
-#endif /* CONFIG_TICKSOURCE_GPTMR0 */
                 default:
                         set_irq_handler(irq, handle_simple_irq);
                         break;
-#endif  /* !CONFIG_IPIPE */
+#endif /* !CONFIG_IPIPE */
                 }
         }
 
diff --git a/arch/blackfin/mach-common/lock.S b/arch/blackfin/mach-common/lock.S
deleted file mode 100644
index 6c5f5f0ea7fe..000000000000
--- a/arch/blackfin/mach-common/lock.S
+++ /dev/null
@@ -1,223 +0,0 @@
-/*
- * File:         arch/blackfin/mach-common/lock.S
- * Based on:
- * Author:       LG Soft India
- *
- * Created:      ?
- * Description:  kernel locks
- *
- * Modified:
- *               Copyright 2004-2006 Analog Devices Inc.
- *
- * Bugs:         Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/linkage.h>
-#include <asm/blackfin.h>
-
-.text
-
-/* When you come here, it is assumed that
- * R0 - Which way to be locked
- */
-
-ENTRY(_cache_grab_lock)
-
-        [--SP]=( R7:0,P5:0 );
-
-        P1.H = HI(IMEM_CONTROL);
-        P1.L = LO(IMEM_CONTROL);
-        P5.H = HI(ICPLB_ADDR0);
-        P5.L = LO(ICPLB_ADDR0);
-        P4.H = HI(ICPLB_DATA0);
-        P4.L = LO(ICPLB_DATA0);
-        R7 = R0;
-
-        /* If the code of interest already resides in the cache
-         * invalidate the entire cache itself.
-         * invalidate_entire_icache;
-         */
-
-        SP += -12;
-        [--SP] = RETS;
-        CALL _invalidate_entire_icache;
-        RETS = [SP++];
-        SP += 12;
-
-        /* Disable the Interrupts*/
-
-        CLI R3;
-
-.LLOCK_WAY:
-
-        /* Way0 - 0xFFA133E0
-         * Way1 - 0xFFA137E0
-         * Way2 - 0xFFA13BE0    Total Way Size = 4K
-         * Way3 - 0xFFA13FE0
-         */
-
-        /* Procedure Ex. -Set the locks for other ways by setting ILOC[3:1]
-         * Only Way0 of the instruction cache can now be
-         * replaced by a new code
-         */
-
-        R5 = R7;
-        CC = BITTST(R7,0);
-        IF CC JUMP .LCLEAR1;
-        R7 = 0;
-        BITSET(R7,0);
-        JUMP .LDONE1;
-
-.LCLEAR1:
-        R7 = 0;
-        BITCLR(R7,0);
-.LDONE1:        R4 = R7 << 3;
-        R7 = [P1];
-        R7 = R7 | R4;
-        SSYNC;          /* SSYNC required writing to IMEM_CONTROL. */
-        .align 8;
-        [P1] = R7;
-        SSYNC;
-
-        R7 = R5;
-        CC = BITTST(R7,1);
-        IF CC JUMP .LCLEAR2;
-        R7 = 0;
-        BITSET(R7,1);
-        JUMP .LDONE2;
-
-.LCLEAR2:
-        R7 = 0;
-        BITCLR(R7,1);
-.LDONE2:        R4 = R7 << 3;
-        R7 = [P1];
-        R7 = R7 | R4;
-        SSYNC;          /* SSYNC required writing to IMEM_CONTROL. */
-        .align 8;
-        [P1] = R7;
-        SSYNC;
-
-        R7 = R5;
-        CC = BITTST(R7,2);
-        IF CC JUMP .LCLEAR3;
-        R7 = 0;
-        BITSET(R7,2);
-        JUMP .LDONE3;
-.LCLEAR3:
-        R7 = 0;
-        BITCLR(R7,2);
-.LDONE3:        R4 = R7 << 3;
-        R7 = [P1];
-        R7 = R7 | R4;
-        SSYNC;          /* SSYNC required writing to IMEM_CONTROL. */
-        .align 8;
-        [P1] = R7;
-        SSYNC;
-
-
-        R7 = R5;
-        CC = BITTST(R7,3);
-        IF CC JUMP .LCLEAR4;
-        R7 = 0;
-        BITSET(R7,3);
-        JUMP .LDONE4;
-.LCLEAR4:
-        R7 = 0;
-        BITCLR(R7,3);
-.LDONE4:        R4 = R7 << 3;
-        R7 = [P1];
-        R7 = R7 | R4;
-        SSYNC;          /* SSYNC required writing to IMEM_CONTROL. */
-        .align 8;
-        [P1] = R7;
-        SSYNC;
-
-        STI R3;
-
-        ( R7:0,P5:0 ) = [SP++];
-
-        RTS;
-ENDPROC(_cache_grab_lock)
-
-/* After the execution of critical code, the code is now locked into
- * the cache way. Now we need to set ILOC.
- *
- * R0 - Which way to be locked
- */
-
-ENTRY(_bfin_cache_lock)
-
-        [--SP]=( R7:0,P5:0 );
-
-        P1.H = HI(IMEM_CONTROL);
-        P1.L = LO(IMEM_CONTROL);
-
-        /* Disable the Interrupts*/
-        CLI R3;
-
-        R7 = [P1];
-        R2 = ~(0x78) (X);       /* mask out ILOC */
-        R7 = R7 & R2;
-        R0 = R0 << 3;
-        R7 = R0 | R7;
-        SSYNC;          /* SSYNC required writing to IMEM_CONTROL. */
-        .align 8;
-        [P1] = R7;
-        SSYNC;
-        /* Renable the Interrupts */
-        STI R3;
-
-        ( R7:0,P5:0 ) = [SP++];
-        RTS;
-ENDPROC(_bfin_cache_lock)
-
-/* Invalidate the Entire Instruction cache by
- * disabling IMC bit
- */
-ENTRY(_invalidate_entire_icache)
-        [--SP] = ( R7:5);
-
-        P0.L = LO(IMEM_CONTROL);
-        P0.H = HI(IMEM_CONTROL);
-        R7 = [P0];
-
-        /* Clear the IMC bit , All valid bits in the instruction
-         * cache are set to the invalid state
-         */
-        BITCLR(R7,IMC_P);
-        CLI R6;
-        SSYNC;          /* SSYNC required before invalidating cache. */
-        .align 8;
-        [P0] = R7;
-        SSYNC;
-        STI R6;
-
-        /* Configures the instruction cache agian */
-        R6 = (IMC | ENICPLB);
-        R7 = R7 | R6;
-
-        CLI R6;
-        SSYNC;          /* SSYNC required before writing to IMEM_CONTROL. */
-        .align 8;
-        [P0] = R7;
-        SSYNC;
-        STI R6;
-
-        ( R7:5) = [SP++];
-        RTS;
-ENDPROC(_invalidate_entire_icache)
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 9e7e27b7fc8d..0e3d4ff9d8b6 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -38,6 +38,7 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 
+#include <asm/cplb.h>
 #include <asm/gpio.h>
 #include <asm/dma.h>
 #include <asm/dpmc.h>
@@ -170,58 +171,6 @@ static void flushinv_all_dcache(void)
 }
 #endif
 
-static inline void dcache_disable(void)
-{
-#ifdef CONFIG_BFIN_DCACHE
-        unsigned long ctrl;
-
-#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
-        flushinv_all_dcache();
-#endif
-        SSYNC();
-        ctrl = bfin_read_DMEM_CONTROL();
-        ctrl &= ~ENDCPLB;
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-#endif
-}
-
-static inline void dcache_enable(void)
-{
-#ifdef CONFIG_BFIN_DCACHE
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_DMEM_CONTROL();
-        ctrl |= ENDCPLB;
-        bfin_write_DMEM_CONTROL(ctrl);
-        SSYNC();
-#endif
-}
-
-static inline void icache_disable(void)
-{
-#ifdef CONFIG_BFIN_ICACHE
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl &= ~ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-#endif
-}
-
-static inline void icache_enable(void)
-{
-#ifdef CONFIG_BFIN_ICACHE
-        unsigned long ctrl;
-        SSYNC();
-        ctrl = bfin_read_IMEM_CONTROL();
-        ctrl |= ENICPLB;
-        bfin_write_IMEM_CONTROL(ctrl);
-        SSYNC();
-#endif
-}
-
 int bfin_pm_suspend_mem_enter(void)
 {
         unsigned long flags;
@@ -258,16 +207,19 @@ int bfin_pm_suspend_mem_enter(void)
 
         bfin_gpio_pm_hibernate_suspend();
 
-        dcache_disable();
-        icache_disable();
+#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
+        flushinv_all_dcache();
+#endif
+        _disable_dcplb();
+        _disable_icplb();
         bf53x_suspend_l1_mem(memptr);
 
         do_hibernate(wakeup | vr_wakeup);       /* Goodbye */
 
         bf53x_resume_l1_mem(memptr);
 
-        icache_enable();
-        dcache_enable();
+        _enable_icplb();
+        _enable_dcplb();
 
         bfin_gpio_pm_hibernate_restore();
         blackfin_dma_resume();
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index 68bd0bd680cd..b88ce7fda548 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -33,6 +33,7 @@
 #include <asm/bfin-global.h>
 #include <asm/pda.h>
 #include <asm/cplbinit.h>
+#include <asm/early_printk.h>
 #include "blackfin_sram.h"
 
 /*
@@ -113,6 +114,8 @@ asmlinkage void __init init_pda(void)
 {
         unsigned int cpu = raw_smp_processor_id();
 
+        early_shadow_stamp();
+
         /* Initialize the PDA fields holding references to other parts
            of the memory. The content of such memory is still
            undefined at the time of the call, we are only setting up
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c
index c080e70f98b0..beb1a608824c 100644
--- a/arch/blackfin/mm/isram-driver.c
+++ b/arch/blackfin/mm/isram-driver.c
@@ -16,6 +16,8 @@
  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
+#define pr_fmt(fmt) "isram: " fmt
+
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -23,6 +25,7 @@
 #include <linux/sched.h>
 
 #include <asm/blackfin.h>
+#include <asm/dma.h>
 
 /*
  * IMPORTANT WARNING ABOUT THESE FUNCTIONS
@@ -50,10 +53,12 @@ static DEFINE_SPINLOCK(dtest_lock);
 #define IADDR2DTEST(x) \
         ({ unsigned long __addr = (unsigned long)(x); \
                 (__addr & 0x47F8)        | /* address bits 14 & 10:3 */ \
+                (__addr & 0x8000) << 23  | /* Bank A/B               */ \
                 (__addr & 0x0800) << 15  | /* address bit  11        */ \
-                (__addr  & 0x3000) << 4  | /* address bits 13:12     */ \
-                (__addr  & 0x8000) << 8  | /* address bit  15        */ \
-                (0x1000004);               /* isram access           */ \
+                (__addr & 0x3000) <<  4  | /* address bits 13:12     */ \
+                (__addr & 0x8000) <<  8  | /* address bit  15        */ \
+                (0x1000000)              | /* instruction access = 1 */ \
+                (0x4);                     /* data array = 1         */ \
         })
 
 /* Takes a pointer, and returns the offset (in bits) which things should be shifted */
@@ -70,7 +75,7 @@ static void isram_write(const void *addr, uint64_t data)
         if (addr >= (void *)(L1_CODE_START + L1_CODE_LENGTH))
                 return;
 
-        cmd = IADDR2DTEST(addr) | 1;             /* write */
+        cmd = IADDR2DTEST(addr) | 2;             /* write */
 
         /*
          * Writes to DTEST_DATA[0:1] need to be atomic with write to DTEST_COMMAND
@@ -127,8 +132,7 @@ static bool isram_check_addr(const void *addr, size_t n)
             (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
                 if ((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH)) {
                         show_stack(NULL, NULL);
-                        printk(KERN_ERR "isram_memcpy: copy involving %p length "
-                                        "(%zu) too long\n", addr, n);
+                        pr_err("copy involving %p length (%zu) too long\n", addr, n);
                 }
                 return true;
         }
@@ -199,3 +203,209 @@ void *isram_memcpy(void *dest, const void *src, size_t n)
 }
 EXPORT_SYMBOL(isram_memcpy);
 
+#ifdef CONFIG_BFIN_ISRAM_SELF_TEST
+
+#define TEST_LEN 0x100
+
+static __init void hex_dump(unsigned char *buf, int len)
+{
+        while (len--)
+                pr_cont("%02x", *buf++);
+}
+
+static __init int isram_read_test(char *sdram, void *l1inst)
+{
+        int i, ret = 0;
+        uint64_t data1, data2;
+
+        pr_info("INFO: running isram_read tests\n");
+
+        /* setup some different data to play with */
+        for (i = 0; i < TEST_LEN; ++i)
+                sdram[i] = i;
+        dma_memcpy(l1inst, sdram, TEST_LEN);
+
+        /* make sure we can read the L1 inst */
+        for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) {
+                data1 = isram_read(l1inst + i);
+                memcpy(&data2, sdram + i, sizeof(data2));
+                if (memcmp(&data1, &data2, sizeof(uint64_t))) {
+                        pr_err("FAIL: isram_read(%p) returned %#llx but wanted %#llx\n",
+                                l1inst + i, data1, data2);
+                        ++ret;
+                }
+        }
+
+        return ret;
+}
+
+static __init int isram_write_test(char *sdram, void *l1inst)
+{
+        int i, ret = 0;
+        uint64_t data1, data2;
+
+        pr_info("INFO: running isram_write tests\n");
+
+        /* setup some different data to play with */
+        memset(sdram, 0, TEST_LEN * 2);
+        dma_memcpy(l1inst, sdram, TEST_LEN);
+        for (i = 0; i < TEST_LEN; ++i)
+                sdram[i] = i;
+
+        /* make sure we can write the L1 inst */
+        for (i = 0; i < TEST_LEN; i += sizeof(uint64_t)) {
+                memcpy(&data1, sdram + i, sizeof(data1));
+                isram_write(l1inst + i, data1);
+                data2 = isram_read(l1inst + i);
+                if (memcmp(&data1, &data2, sizeof(uint64_t))) {
+                        pr_err("FAIL: isram_write(%p, %#llx) != %#llx\n",
+                                l1inst + i, data1, data2);
+                        ++ret;
+                }
+        }
+
+        dma_memcpy(sdram + TEST_LEN, l1inst, TEST_LEN);
+        if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) {
+                pr_err("FAIL: isram_write() did not work properly\n");
+                ++ret;
+        }
+
+        return ret;
+}
+
+static __init int
+_isram_memcpy_test(char pattern, void *sdram, void *l1inst, const char *smemcpy,
+                   void *(*fmemcpy)(void *, const void *, size_t))
+{
+        memset(sdram, pattern, TEST_LEN);
+        fmemcpy(l1inst, sdram, TEST_LEN);
+        fmemcpy(sdram + TEST_LEN, l1inst, TEST_LEN);
+        if (memcmp(sdram, sdram + TEST_LEN, TEST_LEN)) {
+                pr_err("FAIL: %s(%p <=> %p, %#x) failed (data is %#x)\n",
+                        smemcpy, l1inst, sdram, TEST_LEN, pattern);
+                return 1;
+        }
+        return 0;
+}
+#define _isram_memcpy_test(a, b, c, d) _isram_memcpy_test(a, b, c, #d, d)
+
+static __init int isram_memcpy_test(char *sdram, void *l1inst)
+{
+        int i, j, thisret, ret = 0;
+
+        /* check broad isram_memcpy() */
+        pr_info("INFO: running broad isram_memcpy tests\n");
+        for (i = 0xf; i >= 0; --i)
+                ret += _isram_memcpy_test(i, sdram, l1inst, isram_memcpy);
+
+        /* check read of small, unaligned, and hardware 64bit limits */
+        pr_info("INFO: running isram_memcpy (read) tests\n");
+
+        for (i = 0; i < TEST_LEN; ++i)
+                sdram[i] = i;
+        dma_memcpy(l1inst, sdram, TEST_LEN);
+
+        thisret = 0;
+        for (i = 0; i < TEST_LEN - 32; ++i) {
+                unsigned char cmp[32];
+                for (j = 1; j <= 32; ++j) {
+                        memset(cmp, 0, sizeof(cmp));
+                        isram_memcpy(cmp, l1inst + i, j);
+                        if (memcmp(cmp, sdram + i, j)) {
+                                pr_err("FAIL: %p:", l1inst + 1);
+                                hex_dump(cmp, j);
+                                pr_cont(" SDRAM:");
+                                hex_dump(sdram + i, j);
+                                pr_cont("\n");
+                                if (++thisret > 20) {
+                                        pr_err("FAIL: skipping remaining series\n");
+                                        i = TEST_LEN;
+                                        break;
+                                }
+                        }
+                }
+        }
+        ret += thisret;
+
+        /* check write of small, unaligned, and hardware 64bit limits */
+        pr_info("INFO: running isram_memcpy (write) tests\n");
+
+        memset(sdram + TEST_LEN, 0, TEST_LEN);
+        dma_memcpy(l1inst, sdram + TEST_LEN, TEST_LEN);
+
+        thisret = 0;
+        for (i = 0; i < TEST_LEN - 32; ++i) {
+                unsigned char cmp[32];
+                for (j = 1; j <= 32; ++j) {
+                        isram_memcpy(l1inst + i, sdram + i, j);
+                        dma_memcpy(cmp, l1inst + i, j);
+                        if (memcmp(cmp, sdram + i, j)) {
+                                pr_err("FAIL: %p:", l1inst + i);
+                                hex_dump(cmp, j);
+                                pr_cont(" SDRAM:");
+                                hex_dump(sdram + i, j);
+                                pr_cont("\n");
+                                if (++thisret > 20) {
+                                        pr_err("FAIL: skipping remaining series\n");
+                                        i = TEST_LEN;
+                                        break;
+                                }
+                        }
+                }
+        }
+        ret += thisret;
+
+        return ret;
+}
+
+static __init int isram_test_init(void)
+{
+        int ret;
+        char *sdram;
+        void *l1inst;
+
+        sdram = kmalloc(TEST_LEN * 2, GFP_KERNEL);
+        if (!sdram) {
+                pr_warning("SKIP: could not allocate sdram\n");
+                return 0;
+        }
+
+        l1inst = l1_inst_sram_alloc(TEST_LEN);
+        if (!l1inst) {
+                kfree(sdram);
+                pr_warning("SKIP: could not allocate L1 inst\n");
+                return 0;
+        }
+
+        /* sanity check initial L1 inst state */
+        ret = 1;
+        pr_info("INFO: running initial dma_memcpy checks\n");
+        if (_isram_memcpy_test(0xa, sdram, l1inst, dma_memcpy))
+                goto abort;
+        if (_isram_memcpy_test(0x5, sdram, l1inst, dma_memcpy))
+                goto abort;
+
+        ret = 0;
+        ret += isram_read_test(sdram, l1inst);
+        ret += isram_write_test(sdram, l1inst);
+        ret += isram_memcpy_test(sdram, l1inst);
+
+ abort:
+        sram_free(l1inst);
+        kfree(sdram);
+
+        if (ret)
+                return -EIO;
+
+        pr_info("PASS: all tests worked !\n");
+        return 0;
+}
+late_initcall(isram_test_init);
+
+static __exit void isram_test_exit(void)
+{
+        /* stub to allow unloading */
+}
+module_exit(isram_test_exit);
+
+#endif
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c
index 99e4dbb1dfd1..eb63ab353e5a 100644
--- a/arch/blackfin/mm/sram-alloc.c
+++ b/arch/blackfin/mm/sram-alloc.c
@@ -42,11 +42,6 @@
 #include <asm/mem_map.h>
 #include "blackfin_sram.h"
 
-static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1sram_lock);
-static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_data_sram_lock);
-static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_inst_sram_lock);
-static spinlock_t l2_sram_lock ____cacheline_aligned_in_smp;
-
 /* the data structure for L1 scratchpad and DATA SRAM */
 struct sram_piece {
         void *paddr;
@@ -55,6 +50,7 @@ struct sram_piece {
         struct sram_piece *next;
 };
 
+static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1sram_lock);
 static DEFINE_PER_CPU(struct sram_piece, free_l1_ssram_head);
 static DEFINE_PER_CPU(struct sram_piece, used_l1_ssram_head);
 
@@ -68,12 +64,18 @@ static DEFINE_PER_CPU(struct sram_piece, free_l1_data_B_sram_head);
 static DEFINE_PER_CPU(struct sram_piece, used_l1_data_B_sram_head);
 #endif
 
+#if L1_DATA_A_LENGTH || L1_DATA_B_LENGTH
+static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_data_sram_lock);
+#endif
+
 #if L1_CODE_LENGTH != 0
+static DEFINE_PER_CPU_SHARED_ALIGNED(spinlock_t, l1_inst_sram_lock);
 static DEFINE_PER_CPU(struct sram_piece, free_l1_inst_sram_head);
 static DEFINE_PER_CPU(struct sram_piece, used_l1_inst_sram_head);
 #endif
 
 #if L2_LENGTH != 0
+static spinlock_t l2_sram_lock ____cacheline_aligned_in_smp;
 static struct sram_piece free_l2_sram_head, used_l2_sram_head;
 #endif
 
@@ -225,10 +227,10 @@ static void __init l2_sram_init(void)
         printk(KERN_INFO "Blackfin L2 SRAM: %d KB (%d KB free)\n",
                 L2_LENGTH >> 10,
                 free_l2_sram_head.next->size >> 10);
-#endif
 
         /* mutex initialize */
         spin_lock_init(&l2_sram_lock);
+#endif
 }
 
 static int __init bfin_sram_init(void)
@@ -416,18 +418,17 @@ EXPORT_SYMBOL(sram_free);
 
 void *l1_data_A_sram_alloc(size_t size)
 {
+#if L1_DATA_A_LENGTH != 0
         unsigned long flags;
-        void *addr = NULL;
+        void *addr;
         unsigned int cpu;
 
         cpu = get_cpu();
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
 
-#if L1_DATA_A_LENGTH != 0
         addr = _sram_alloc(size, &per_cpu(free_l1_data_A_sram_head, cpu),
                         &per_cpu(used_l1_data_A_sram_head, cpu));
-#endif
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
@@ -437,11 +438,15 @@ void *l1_data_A_sram_alloc(size_t size)
                  (long unsigned int)addr, size);
 
         return addr;
+#else
+        return NULL;
+#endif
 }
 EXPORT_SYMBOL(l1_data_A_sram_alloc);
 
 int l1_data_A_sram_free(const void *addr)
 {
+#if L1_DATA_A_LENGTH != 0
         unsigned long flags;
         int ret;
         unsigned int cpu;
@@ -450,18 +455,17 @@ int l1_data_A_sram_free(const void *addr)
         /* add mutex operation */
         spin_lock_irqsave(&per_cpu(l1_data_sram_lock, cpu), flags);
 
-#if L1_DATA_A_LENGTH != 0
         ret = _sram_free(addr, &per_cpu(free_l1_data_A_sram_head, cpu),
                         &per_cpu(used_l1_data_A_sram_head, cpu));
-#else
-        ret = -1;
-#endif
 
         /* add mutex operation */
         spin_unlock_irqrestore(&per_cpu(l1_data_sram_lock, cpu), flags);
         put_cpu();
 
         return ret;
+#else
+        return -1;
+#endif
 }
 EXPORT_SYMBOL(l1_data_A_sram_free);
 
diff --git a/arch/cris/Makefile b/arch/cris/Makefile
index 71e17d3eeddb..29c2ceb38a76 100644
--- a/arch/cris/Makefile
+++ b/arch/cris/Makefile
@@ -42,8 +42,6 @@ LD = $(CROSS_COMPILE)ld -mcrislinux
 
 OBJCOPYFLAGS := -O binary -R .note -R .comment -S
 
-CPPFLAGS_vmlinux.lds = -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE)
-
 KBUILD_AFLAGS += -mlinux -march=$(arch-y) $(inc)
 KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe $(inc)
 KBUILD_CPPFLAGS += $(inc)
diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c
index 2b73c7a5b649..31ca1418d5a7 100644
--- a/arch/cris/arch-v10/kernel/time.c
+++ b/arch/cris/arch-v10/kernel/time.c
@@ -28,7 +28,6 @@
 
 extern void update_xtime_from_cmos(void);
 extern int set_rtc_mmss(unsigned long nowtime);
-extern int setup_irq(int, struct irqaction *);
 extern int have_rtc;
 
 unsigned long get_ns_in_jiffie(void)
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index d2a3ff8c4d37..058adddf4e4b 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -52,8 +52,6 @@ static struct mm_struct* flush_mm;
 static struct vm_area_struct* flush_vma;
 static unsigned long flush_addr;
 
-extern int setup_irq(int, struct irqaction *);
-
 /* Mode registers */
 static unsigned long irq_regs[NR_CPUS] = {
   regi_irq,
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index 65633d0dab86..b1920d8de403 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -46,7 +46,6 @@ unsigned long timer_regs[NR_CPUS] =
 
 extern void update_xtime_from_cmos(void);
 extern int set_rtc_mmss(unsigned long nowtime);
-extern int setup_irq(int, struct irqaction *);
 extern int have_rtc;
 
 #ifdef CONFIG_CPU_FREQ
diff --git a/arch/cris/arch-v32/mach-a3/io.c b/arch/cris/arch-v32/mach-a3/io.c
index c22f67ecd9f3..090ceb99ef0b 100644
--- a/arch/cris/arch-v32/mach-a3/io.c
+++ b/arch/cris/arch-v32/mach-a3/io.c
@@ -36,7 +36,7 @@ struct crisv32_ioport crisv32_ioports[] = {
         },
 };
 
-#define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
+#define NBR_OF_PORTS ARRAY_SIZE(crisv32_ioports)
 
 struct crisv32_iopin crisv32_led_net0_green;
 struct crisv32_iopin crisv32_led_net0_red;
diff --git a/arch/cris/arch-v32/mach-fs/io.c b/arch/cris/arch-v32/mach-fs/io.c
index cb6327b1f8f8..a6958661fa8e 100644
--- a/arch/cris/arch-v32/mach-fs/io.c
+++ b/arch/cris/arch-v32/mach-fs/io.c
@@ -52,7 +52,7 @@ struct crisv32_ioport crisv32_ioports[] = {
         }
 };
 
-#define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
+#define NBR_OF_PORTS ARRAY_SIZE(crisv32_ioports)
 
 struct crisv32_iopin crisv32_led_net0_green;
 struct crisv32_iopin crisv32_led_net0_red;
diff --git a/arch/cris/include/arch-v10/arch/mmu.h b/arch/cris/include/arch-v10/arch/mmu.h
index df84f1716e6b..e829e5a37bbe 100644
--- a/arch/cris/include/arch-v10/arch/mmu.h
+++ b/arch/cris/include/arch-v10/arch/mmu.h
@@ -33,10 +33,10 @@ typedef struct
 
 /* CRIS PTE bits (see R_TLB_LO in the register description)
  *
- *   Bit:  31-13 12-------4    3        2       1       0  
- *         ________________________________________________
- *        | pfn | reserved | global | valid | kernel | we  |
- *        |_____|__________|________|_______|________|_____|
+ *   Bit:  31     30-13 12-------4    3        2       1       0
+ *         _______________________________________________________
+ *        | cache |pfn | reserved | global | valid | kernel | we  |
+ *        |_______|____|__________|________|_______|________|_____|
  *
  * (pfn = physical frame number)
  */
@@ -53,6 +53,7 @@ typedef struct
 #define _PAGE_VALID        (1<<2) /* page is valid */
 #define _PAGE_SILENT_READ  (1<<2) /* synonym */
 #define _PAGE_GLOBAL       (1<<3) /* global page - context is ignored */
+#define _PAGE_NO_CACHE     (1<<31) /* part of the uncached memory map */
 
 /* Bits the HW doesn't care about but the kernel uses them in SW */
 
diff --git a/arch/cris/include/arch-v32/arch/mmu.h b/arch/cris/include/arch-v32/arch/mmu.h
index 6bcdc3fdf7dc..c1a13e05e963 100644
--- a/arch/cris/include/arch-v32/arch/mmu.h
+++ b/arch/cris/include/arch-v32/arch/mmu.h
@@ -28,10 +28,10 @@ typedef struct
 /*
  * CRISv32 PTE bits:
  *
- *  Bit:  31-13  12-5     4        3       2        1        0
- *       +-----+------+--------+-------+--------+-------+---------+
- *       | pfn | zero | global | valid | kernel | write | execute |
- *       +-----+------+--------+-------+--------+-------+---------+
+ *  Bit:   31     30-13  12-5     4        3       2        1        0
+ *       +-------+-----+------+--------+-------+--------+-------+---------+
+ *       | cache | pfn | zero | global | valid | kernel | write | execute |
+ *       +-------+-----+------+--------+-------+--------+-------+---------+
  */
 
 /*
@@ -45,6 +45,8 @@ typedef struct
 #define _PAGE_VALID         (1 << 3)    /* Page is valid. */
 #define _PAGE_SILENT_READ   (1 << 3)    /* Same as above. */
 #define _PAGE_GLOBAL        (1 << 4)    /* Global page. */
+#define _PAGE_NO_CACHE      (1 << 31)   /* part of the uncached memory map */
+
 
 /*
  * The hardware doesn't care about these bits, but the kernel uses them in
diff --git a/arch/cris/include/asm/hardirq.h b/arch/cris/include/asm/hardirq.h
index 74178adeb1cd..17bb12d760b2 100644
--- a/arch/cris/include/asm/hardirq.h
+++ b/arch/cris/include/asm/hardirq.h
@@ -2,16 +2,6 @@
 #define __ASM_HARDIRQ_H
 
 #include <asm/irq.h>
-#include <linux/threads.h>
-#include <linux/cache.h>
-
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
-
-void ack_bad_irq(unsigned int irq);
 
 #define HARDIRQ_BITS    8
 
@@ -24,4 +14,6 @@ void ack_bad_irq(unsigned int irq);
 # error HARDIRQ_BITS is too low!
 #endif
 
+#include <asm-generic/hardirq.h>
+
 #endif /* __ASM_HARDIRQ_H */
diff --git a/arch/cris/include/asm/mman.h b/arch/cris/include/asm/mman.h
index b7f0afba3ce0..8eebf89f5ab1 100644
--- a/arch/cris/include/asm/mman.h
+++ b/arch/cris/include/asm/mman.h
@@ -1,19 +1 @@
-#ifndef __CRIS_MMAN_H__
-#define __CRIS_MMAN_H__
-
-/* verbatim copy of asm-i386/ version */
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* __CRIS_MMAN_H__ */
+#include <asm-generic/mman.h>
diff --git a/arch/cris/include/asm/pgtable.h b/arch/cris/include/asm/pgtable.h
index 50aa974aa834..1fcce00f01f4 100644
--- a/arch/cris/include/asm/pgtable.h
+++ b/arch/cris/include/asm/pgtable.h
@@ -197,6 +197,8 @@ static inline pte_t __mk_pte(void * page, pgprot_t pgprot)
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
 
+#define pgprot_noncached(prot) __pgprot((pgprot_val(prot) | _PAGE_NO_CACHE))
+
 
 /* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
  * __pte_page(pte_val) refers to the "virtual" DRAM interval
diff --git a/arch/cris/kernel/Makefile b/arch/cris/kernel/Makefile
index ee7bcd4d20b2..b45640b3e600 100644
--- a/arch/cris/kernel/Makefile
+++ b/arch/cris/kernel/Makefile
@@ -3,6 +3,7 @@
 # Makefile for the linux kernel.
 #
 
+CPPFLAGS_vmlinux.lds := -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE)
 extra-y := vmlinux.lds
 
 obj-y   := process.o traps.o irq.o ptrace.o setup.o time.o sys_cris.o
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index 7f642fcffbfc..0ca7d9892cc6 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -38,11 +38,6 @@
 
 #include <asm/io.h>
 
-void ack_bad_irq(unsigned int irq)
-{
-        printk("unexpected IRQ trap at vector %02x\n", irq);
-}
-
 int show_interrupts(struct seq_file *p, void *v)
 {
         int i = *(loff_t *) v, j;
diff --git a/arch/cris/kernel/process.c b/arch/cris/kernel/process.c
index 51dcd04d2777..c99aeab7cef7 100644
--- a/arch/cris/kernel/process.c
+++ b/arch/cris/kernel/process.c
@@ -45,9 +45,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union 
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/cris/kernel/vmlinux.lds.S b/arch/cris/kernel/vmlinux.lds.S
index 6c81836b9229..bbfda67d2907 100644
--- a/arch/cris/kernel/vmlinux.lds.S
+++ b/arch/cris/kernel/vmlinux.lds.S
@@ -51,10 +51,7 @@ SECTIONS
         _etext = . ;                    /* End of text section. */
         __etext = .;
 
-        . = ALIGN(4);                   /* Exception table. */
-        __start___ex_table = .;
-        __ex_table : { *(__ex_table) }
-        __stop___ex_table = .;
+        EXCEPTION_TABLE(4)
 
         RODATA
 
@@ -67,36 +64,24 @@ SECTIONS
         __edata = . ;                   /* End of data section. */
         _edata = . ;
 
-        . = ALIGN(PAGE_SIZE);   /* init_task and stack, must be aligned. */
-        .data.init_task : { *(.data.init_task) }
+        INIT_TASK_DATA_SECTION(PAGE_SIZE)
 
         . = ALIGN(PAGE_SIZE);           /* Init code and data. */
         __init_begin = .;
-        .init.text : {
-                   _sinittext = .;
-                   INIT_TEXT
-                   _einittext = .;
-        }
+        INIT_TEXT_SECTION(PAGE_SIZE)
         .init.data : { INIT_DATA }
-        . = ALIGN(16);
-        __setup_start = .;
-        .init.setup : { *(.init.setup) }
-        __setup_end = .;
+        .init.setup : { INIT_SETUP(16) }
 #ifdef CONFIG_ETRAX_ARCH_V32
         __start___param = .;
         __param : { *(__param) }
         __stop___param = .;
 #endif
         .initcall.init : {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
+                INIT_CALLS
         }
 
         .con_initcall.init : {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
+                CON_INITCALL
         }
         SECURITY_INIT
 
@@ -114,9 +99,7 @@ SECTIONS
         PERCPU(PAGE_SIZE)
 
         .init.ramfs : {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
+                INIT_RAM_FS
         }
 #endif
 
@@ -130,11 +113,7 @@ SECTIONS
         __init_end = .;
 
         __data_end = . ;                /* Move to _edata ? */
-        __bss_start = .;                /* BSS. */
-        .bss : {
-                *(COMMON)
-                *(.bss)
-        }
+        BSS_SECTION(0, 0, 0)
 
         . =  ALIGN (0x20);
         _end = .;
diff --git a/arch/cris/mm/init.c b/arch/cris/mm/init.c
index 514f46a4b230..ff68b9f516a1 100644
--- a/arch/cris/mm/init.c
+++ b/arch/cris/mm/init.c
@@ -54,7 +54,7 @@ mem_init(void)
         printk(KERN_INFO
                "Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, "
                "%dk init)\n" ,
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                max_mapnr << (PAGE_SHIFT-10),
                codesize >> 10,
                reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index b86e19c9b5b0..4b5830bcbe2e 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -7,7 +7,7 @@ config FRV
         default y
         select HAVE_IDE
         select HAVE_ARCH_TRACEHOOK
-        select HAVE_PERF_COUNTERS
+        select HAVE_PERF_EVENTS
 
 config ZONE_DMA
         bool
diff --git a/arch/frv/include/asm/gdb-stub.h b/arch/frv/include/asm/gdb-stub.h
index 24f9738670bd..2da716407ff2 100644
--- a/arch/frv/include/asm/gdb-stub.h
+++ b/arch/frv/include/asm/gdb-stub.h
@@ -90,7 +90,6 @@ extern void gdbstub_do_rx(void);
 extern asmlinkage void __debug_stub_init_break(void);
 extern asmlinkage void __break_hijack_kernel_event(void);
 extern asmlinkage void __break_hijack_kernel_event_breaks_here(void);
-extern asmlinkage void start_kernel(void);
 
 extern asmlinkage void gdbstub_rx_handler(void);
 extern asmlinkage void gdbstub_rx_irq(void);
diff --git a/arch/frv/include/asm/hardirq.h b/arch/frv/include/asm/hardirq.h
index fc47515822a2..5fc8b6f5bc55 100644
--- a/arch/frv/include/asm/hardirq.h
+++ b/arch/frv/include/asm/hardirq.h
@@ -12,24 +12,15 @@
 #ifndef __ASM_HARDIRQ_H
 #define __ASM_HARDIRQ_H
 
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-typedef struct {
-        unsigned int __softirq_pending;
-        unsigned long idle_timestamp;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
-#ifdef CONFIG_SMP
-#error SMP not available on FR-V
-#endif /* CONFIG_SMP */
+#include <asm/atomic.h>
 
 extern atomic_t irq_err_count;
 static inline void ack_bad_irq(int irq)
 {
         atomic_inc(&irq_err_count);
 }
+#define ack_bad_irq ack_bad_irq
+
+#include <asm-generic/hardirq.h>
 
 #endif
diff --git a/arch/frv/include/asm/mman.h b/arch/frv/include/asm/mman.h
index 58c1d11e2ac7..8eebf89f5ab1 100644
--- a/arch/frv/include/asm/mman.h
+++ b/arch/frv/include/asm/mman.h
@@ -1,18 +1 @@
-#ifndef __ASM_MMAN_H__
-#define __ASM_MMAN_H__
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* __ASM_MMAN_H__ */
-
+#include <asm-generic/mman.h>
diff --git a/arch/frv/include/asm/perf_counter.h b/arch/frv/include/asm/perf_event.h
index ccf726e61b2e..a69e0155d146 100644
--- a/arch/frv/include/asm/perf_counter.h
+++ b/arch/frv/include/asm/perf_event.h
@@ -1,4 +1,4 @@
-/* FRV performance counter support
+/* FRV performance event support
  *
  * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
@@ -9,9 +9,9 @@
  * 2 of the Licence, or (at your option) any later version.
  */
 
-#ifndef _ASM_PERF_COUNTER_H
-#define _ASM_PERF_COUNTER_H
+#ifndef _ASM_PERF_EVENT_H
+#define _ASM_PERF_EVENT_H
 
-#define PERF_COUNTER_INDEX_OFFSET       0
+#define PERF_EVENT_INDEX_OFFSET 0
 
-#endif /* _ASM_PERF_COUNTER_H */
+#endif /* _ASM_PERF_EVENT_H */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
index 4a8fb427ce0a..be6ef0f5cd42 100644
--- a/arch/frv/include/asm/unistd.h
+++ b/arch/frv/include/asm/unistd.h
@@ -342,7 +342,7 @@
 #define __NR_preadv             333
 #define __NR_pwritev            334
 #define __NR_rt_tgsigqueueinfo  335
-#define __NR_perf_counter_open  336
+#define __NR_perf_event_open    336
 
 #ifdef __KERNEL__
 
diff --git a/arch/frv/kernel/debug-stub.c b/arch/frv/kernel/debug-stub.c
index 2f6c60c921e0..2845139c8077 100644
--- a/arch/frv/kernel/debug-stub.c
+++ b/arch/frv/kernel/debug-stub.c
@@ -15,6 +15,7 @@
 #include <linux/sched.h>
 #include <linux/init.h>
 #include <linux/serial_reg.h>
+#include <linux/start_kernel.h>
 
 #include <asm/system.h>
 #include <asm/serial-regs.h>
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S
index fde1e446b440..189397ec012a 100644
--- a/arch/frv/kernel/entry.S
+++ b/arch/frv/kernel/entry.S
@@ -1525,6 +1525,6 @@ sys_call_table:
         .long sys_preadv
         .long sys_pwritev
         .long sys_rt_tgsigqueueinfo     /* 335 */
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
 
 syscall_table_size = (. - sys_call_table)
diff --git a/arch/frv/kernel/init_task.c b/arch/frv/kernel/init_task.c
index 1d3df1d9495c..3c3e0b336a9d 100644
--- a/arch/frv/kernel/init_task.c
+++ b/arch/frv/kernel/init_task.c
@@ -19,9 +19,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/frv/kernel/pm.c b/arch/frv/kernel/pm.c
index be722fc1acff..0d4d3e3a4cfc 100644
--- a/arch/frv/kernel/pm.c
+++ b/arch/frv/kernel/pm.c
@@ -150,7 +150,7 @@ static int user_atoi(char __user *ubuf, size_t len)
 /*
  * Send us to sleep.
  */
-static int sysctl_pm_do_suspend(ctl_table *ctl, int write, struct file *filp,
+static int sysctl_pm_do_suspend(ctl_table *ctl, int write,
                                 void __user *buffer, size_t *lenp, loff_t *fpos)
 {
         int retval, mode;
@@ -198,13 +198,13 @@ static int try_set_cmode(int new_cmode)
 }
 
 
-static int cmode_procctl(ctl_table *ctl, int write, struct file *filp,
+static int cmode_procctl(ctl_table *ctl, int write,
                          void __user *buffer, size_t *lenp, loff_t *fpos)
 {
         int new_cmode;
 
         if (!write)
-                return proc_dointvec(ctl, write, filp, buffer, lenp, fpos);
+                return proc_dointvec(ctl, write, buffer, lenp, fpos);
 
         new_cmode = user_atoi(buffer, *lenp);
 
@@ -301,13 +301,13 @@ static int try_set_cm(int new_cm)
         return 0;
 }
 
-static int p0_procctl(ctl_table *ctl, int write, struct file *filp,
+static int p0_procctl(ctl_table *ctl, int write,
                       void __user *buffer, size_t *lenp, loff_t *fpos)
 {
         int new_p0;
 
         if (!write)
-                return proc_dointvec(ctl, write, filp, buffer, lenp, fpos);
+                return proc_dointvec(ctl, write, buffer, lenp, fpos);
 
         new_p0 = user_atoi(buffer, *lenp);
 
@@ -345,13 +345,13 @@ static int p0_sysctl(ctl_table *table,
         return 1;
 }
 
-static int cm_procctl(ctl_table *ctl, int write, struct file *filp,
+static int cm_procctl(ctl_table *ctl, int write,
                       void __user *buffer, size_t *lenp, loff_t *fpos)
 {
         int new_cm;
 
         if (!write)
-                return proc_dointvec(ctl, write, filp, buffer, lenp, fpos);
+                return proc_dointvec(ctl, write, buffer, lenp, fpos);
 
         new_cm = user_atoi(buffer, *lenp);
 
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c
index 0de50df74970..904255938216 100644
--- a/arch/frv/kernel/process.c
+++ b/arch/frv/kernel/process.c
@@ -83,13 +83,9 @@ void (*idle)(void) = core_sleep_idle;
  */
 void cpu_idle(void)
 {
-        int cpu = smp_processor_id();
-
         /* endless idle loop with no priority at all */
         while (1) {
                 while (!need_resched()) {
-                        irq_stat[cpu].idle_timestamp = jiffies;
-
                         check_pgt_cache();
 
                         if (!frv_dma_inprogress && idle)
diff --git a/arch/frv/kernel/sys_frv.c b/arch/frv/kernel/sys_frv.c
index baadc97f8627..2b6b5289cdcc 100644
--- a/arch/frv/kernel/sys_frv.c
+++ b/arch/frv/kernel/sys_frv.c
@@ -21,7 +21,6 @@
 #include <linux/stat.h>
 #include <linux/mman.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/syscalls.h>
 #include <linux/ipc.h>
 
diff --git a/arch/frv/kernel/vmlinux.lds.S b/arch/frv/kernel/vmlinux.lds.S
index 7dbf41f68b52..cbe811fccfcc 100644
--- a/arch/frv/kernel/vmlinux.lds.S
+++ b/arch/frv/kernel/vmlinux.lds.S
@@ -35,50 +35,13 @@ SECTIONS
 #endif
   }
   _einittext = .;
-  .init.data : { INIT_DATA }
-
-  . = ALIGN(8);
-  __setup_start = .;
-  .setup.init : { KEEP(*(.init.setup)) }
-  __setup_end = .;
-
-  __initcall_start = .;
-  .initcall.init : {
-        INITCALLS
-  }
-  __initcall_end = .;
-  __con_initcall_start = .;
-  .con_initcall.init : { *(.con_initcall.init) }
-  __con_initcall_end = .;
-  SECURITY_INIT
-  . = ALIGN(4);
-  __alt_instructions = .;
-  .altinstructions : { *(.altinstructions) }
-  __alt_instructions_end = .;
- .altinstr_replacement : { *(.altinstr_replacement) }
 
+  INIT_DATA_SECTION(8)
   PERCPU(4096)
 
-#ifdef CONFIG_BLK_DEV_INITRD
-  . = ALIGN(4096);
-  __initramfs_start = .;
-  .init.ramfs : { *(.init.ramfs) }
-  __initramfs_end = .;
-#endif
-
-  . = ALIGN(THREAD_SIZE);
+  . = ALIGN(PAGE_SIZE);
   __init_end = .;
 
-  /* put sections together that have massive alignment issues */
-  . = ALIGN(THREAD_SIZE);
-  .data.init_task : {
-          /* init task record & stack */
-          *(.data.init_task)
-  }
-
-  . = ALIGN(L1_CACHE_BYTES);
-  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
-
   .trap : {
         /* trap table management - read entry-table.S before modifying */
         . = ALIGN(8192);
@@ -124,13 +87,12 @@ SECTIONS
 
         }
 
-  . = ALIGN(8);         /* Exception table */
-  __start___ex_table = .;
-  __ex_table : { KEEP(*(__ex_table)) }
-  __stop___ex_table = .;
+  EXCEPTION_TABLE(8)
 
   _sdata = .;
   .data : {                     /* Data */
+        INIT_TASK_DATA(THREAD_SIZE)
+        CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
         DATA_DATA
         *(.data.*)
         EXIT_DATA
@@ -159,22 +121,8 @@ SECTIONS
   . = ALIGN(PAGE_SIZE);
   __kernel_image_end = .;
 
-  /* Stabs debugging sections.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  .stab.excl 0 : { *(.stab.excl) }
-  .stab.exclstr 0 : { *(.stab.exclstr) }
-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-
-  .debug_line           0 : { *(.debug_line) }
-  .debug_info           0 : { *(.debug_info) }
-  .debug_abbrev         0 : { *(.debug_abbrev) }
-  .debug_aranges        0 : { *(.debug_aranges) }
-  .debug_frame          0 : { *(.debug_frame) }
-  .debug_pubnames       0 : { *(.debug_pubnames) }
-  .debug_str            0 : { *(.debug_str) }
-  .debug_ranges         0 : { *(.debug_ranges) }
+  STABS_DEBUG
+  DWARF_DEBUG
 
   .comment 0 : { *(.comment) }
 
diff --git a/arch/frv/lib/Makefile b/arch/frv/lib/Makefile
index 0a377210c89b..f4709756d0d9 100644
--- a/arch/frv/lib/Makefile
+++ b/arch/frv/lib/Makefile
@@ -5,4 +5,4 @@
 lib-y := \
         __ashldi3.o __lshrdi3.o __muldi3.o __ashrdi3.o __negdi2.o __ucmpdi2.o \
         checksum.o memcpy.o memset.o atomic-ops.o atomic64-ops.o \
-        outsl_ns.o outsl_sw.o insl_ns.o insl_sw.o cache.o perf_counter.o
+        outsl_ns.o outsl_sw.o insl_ns.o insl_sw.o cache.o perf_event.o
diff --git a/arch/frv/lib/cache.S b/arch/frv/lib/cache.S
index 0e10ad8dc462..0c4fb204911b 100644
--- a/arch/frv/lib/cache.S
+++ b/arch/frv/lib/cache.S
@@ -1,4 +1,4 @@
-/* cache.S: cache managment routines
+/* cache.S: cache management routines
  *
  * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
diff --git a/arch/frv/lib/perf_counter.c b/arch/frv/lib/perf_event.c
index 2000feecd571..9ac5acfd2e91 100644
--- a/arch/frv/lib/perf_counter.c
+++ b/arch/frv/lib/perf_event.c
@@ -1,4 +1,4 @@
-/* Performance counter handling
+/* Performance event handling
  *
  * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
@@ -9,11 +9,11 @@
  * 2 of the Licence, or (at your option) any later version.
  */
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 
 /*
- * mark the performance counter as pending
+ * mark the performance event as pending
  */
-void set_perf_counter_pending(void)
+void set_perf_event_pending(void)
 {
 }
diff --git a/arch/frv/mb93090-mb00/Makefile b/arch/frv/mb93090-mb00/Makefile
index 76595e870733..b73b542f8f48 100644
--- a/arch/frv/mb93090-mb00/Makefile
+++ b/arch/frv/mb93090-mb00/Makefile
@@ -11,3 +11,5 @@ else
 obj-y += pci-dma-nommu.o
 endif
 endif
+
+obj-$(CONFIG_MTD) += flash.o
diff --git a/arch/frv/mb93090-mb00/flash.c b/arch/frv/mb93090-mb00/flash.c
new file mode 100644
index 000000000000..c0e3707c2299
--- /dev/null
+++ b/arch/frv/mb93090-mb00/flash.c
@@ -0,0 +1,90 @@
+/* Flash mappings for the MB93090-MB00 motherboard
+ *
+ * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+
+#define MB93090_BOOTROM_ADDR    0xFF000000      /* Boot ROM */
+#define MB93090_BOOTROM_SIZE    (2 * 1024 * 1024)
+#define MB93090_USERROM_ADDR    0xFF200000      /* User ROM */
+#define MB93090_USERROM_SIZE    (2 * 1024 * 1024)
+
+/*
+ * default MTD partition table for both main flash devices, expected to be
+ * overridden by RedBoot
+ */
+static struct mtd_partition mb93090_partitions[] = {
+        {
+                .name           = "Filesystem",
+                .size           = MTDPART_SIZ_FULL,
+                .offset         = 0,
+        }
+};
+
+/*
+ * Definition of the MB93090 Boot ROM (on the CPU card)
+ */
+static struct physmap_flash_data mb93090_bootrom_data = {
+        .width          = 2,
+        .nr_parts       = 2,
+        .parts          = mb93090_partitions,
+};
+
+static struct resource mb93090_bootrom_resource = {
+        .start          = MB93090_BOOTROM_ADDR,
+        .end            = MB93090_BOOTROM_ADDR + MB93090_BOOTROM_SIZE - 1,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device mb93090_bootrom = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev.platform_data = &mb93090_bootrom_data,
+        .num_resources  = 1,
+        .resource       = &mb93090_bootrom_resource,
+};
+
+/*
+ * Definition of the MB93090 User ROM definition (on the motherboard)
+ */
+static struct physmap_flash_data mb93090_userrom_data = {
+        .width          = 2,
+        .nr_parts       = 2,
+        .parts          = mb93090_partitions,
+};
+
+static struct resource mb93090_userrom_resource = {
+        .start          = MB93090_USERROM_ADDR,
+        .end            = MB93090_USERROM_ADDR + MB93090_USERROM_SIZE - 1,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device mb93090_userrom = {
+        .name           = "physmap-flash",
+        .id             = 1,
+        .dev.platform_data = &mb93090_userrom_data,
+        .num_resources  = 1,
+        .resource       = &mb93090_userrom_resource,
+};
+
+/*
+ * register the MB93090 flashes
+ */
+static int __init mb93090_mtd_init(void)
+{
+        platform_device_register(&mb93090_bootrom);
+        platform_device_register(&mb93090_userrom);
+        return 0;
+}
+
+module_init(mb93090_mtd_init);
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
index 43d67534c712..566bdeb499d1 100644
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ b/arch/frv/mb93090-mb00/pci-frv.c
@@ -86,7 +86,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
         struct pci_bus *bus;
         struct pci_dev *dev;
         int idx;
-        struct resource *r, *pr;
+        struct resource *r;
 
         /* Depth-First Search on bus tree */
         for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
@@ -96,8 +96,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
                                 r = &dev->resource[idx];
                                 if (!r->start)
                                         continue;
-                                pr = pci_find_parent_resource(dev, r);
-                                if (!pr || request_resource(pr, r) < 0)
+                                if (pci_claim_resource(dev, idx) < 0)
                                         printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev));
                         }
                 }
@@ -110,7 +109,7 @@ static void __init pcibios_allocate_resources(int pass)
         struct pci_dev *dev = NULL;
         int idx, disabled;
         u16 command;
-        struct resource *r, *pr;
+        struct resource *r;
 
         for_each_pci_dev(dev) {
                 pci_read_config_word(dev, PCI_COMMAND, &command);
@@ -127,8 +126,7 @@ static void __init pcibios_allocate_resources(int pass)
                         if (pass == disabled) {
                                 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
                                     r->start, r->end, r->flags, disabled, pass);
-                                pr = pci_find_parent_resource(dev, r);
-                                if (!pr || request_resource(pr, r) < 0) {
+                                if (pci_claim_resource(dev, idx) < 0) {
                                         printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev));
                                         /* We'll assign a new address later */
                                         r->end -= r->start;
diff --git a/arch/h8300/include/asm/hardirq.h b/arch/h8300/include/asm/hardirq.h
index 9d7f7a7462b2..c2e1aa0f0d14 100644
--- a/arch/h8300/include/asm/hardirq.h
+++ b/arch/h8300/include/asm/hardirq.h
@@ -1,18 +1,7 @@
 #ifndef __H8300_HARDIRQ_H
 #define __H8300_HARDIRQ_H
 
-#include <linux/kernel.h>
-#include <linux/threads.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
-extern void ack_bad_irq(unsigned int irq);
+#include <asm/irq.h>
 
 #define HARDIRQ_BITS    8
 
@@ -25,4 +14,6 @@ extern void ack_bad_irq(unsigned int irq);
 # error HARDIRQ_BITS is too low!
 #endif
 
+#include <asm-generic/hardirq.h>
+
 #endif
diff --git a/arch/h8300/include/asm/mman.h b/arch/h8300/include/asm/mman.h
index cf35f0a6f12e..8eebf89f5ab1 100644
--- a/arch/h8300/include/asm/mman.h
+++ b/arch/h8300/include/asm/mman.h
@@ -1,17 +1 @@
-#ifndef __H8300_MMAN_H__
-#define __H8300_MMAN_H__
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* __H8300_MMAN_H__ */
+#include <asm-generic/mman.h>
diff --git a/arch/h8300/include/asm/pci.h b/arch/h8300/include/asm/pci.h
index 97389b35aa35..cc9762091c0a 100644
--- a/arch/h8300/include/asm/pci.h
+++ b/arch/h8300/include/asm/pci.h
@@ -8,7 +8,6 @@
  */
 
 #define pcibios_assign_all_busses()     0
-#define pcibios_scan_all_fns(a, b)      0
 
 static inline void pcibios_set_master(struct pci_dev *dev)
 {
diff --git a/arch/h8300/kernel/init_task.c b/arch/h8300/kernel/init_task.c
index 089c65ed6eb3..54c1062ee80e 100644
--- a/arch/h8300/kernel/init_task.c
+++ b/arch/h8300/kernel/init_task.c
@@ -31,7 +31,6 @@ EXPORT_SYMBOL(init_task);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
index 74f8dd7b34d2..5c913d472119 100644
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -81,11 +81,6 @@ struct irq_chip h8300irq_chip = {
         .end            = h8300_end_irq,
 };
 
-void ack_bad_irq(unsigned int irq)
-{
-        printk("unexpected IRQ trap at vector %02x\n", irq);
-}
-
 #if defined(CONFIG_RAMKERNEL)
 static unsigned long __init *get_vector_address(void)
 {
diff --git a/arch/h8300/kernel/sys_h8300.c b/arch/h8300/kernel/sys_h8300.c
index 2745656dcc52..8cb5d73a0e35 100644
--- a/arch/h8300/kernel/sys_h8300.c
+++ b/arch/h8300/kernel/sys_h8300.c
@@ -17,7 +17,6 @@
 #include <linux/syscalls.h>
 #include <linux/mman.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/fs.h>
 #include <linux/ipc.h>
 
diff --git a/arch/h8300/kernel/timer/tpu.c b/arch/h8300/kernel/timer/tpu.c
index e7c6e614a758..2193a2e2859a 100644
--- a/arch/h8300/kernel/timer/tpu.c
+++ b/arch/h8300/kernel/timer/tpu.c
@@ -7,7 +7,6 @@
  *
  */
 
-#include <linux/config.h>
 #include <linux/errno.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
diff --git a/arch/h8300/kernel/vmlinux.lds.S b/arch/h8300/kernel/vmlinux.lds.S
index 662b02ecb86e..b9e24907e6ea 100644
--- a/arch/h8300/kernel/vmlinux.lds.S
+++ b/arch/h8300/kernel/vmlinux.lds.S
@@ -1,5 +1,6 @@
 #define VMLINUX_SYMBOL(_sym_) _##_sym_
 #include <asm-generic/vmlinux.lds.h>
+#include <asm/page.h>
 
 /* target memory map */
 #ifdef CONFIG_H8300H_GENERIC
@@ -79,11 +80,8 @@ SECTIONS
         SCHED_TEXT
         LOCK_TEXT
         __etext = . ;
-        . = ALIGN(16);          /* Exception table              */
-        ___start___ex_table = .;
-                *(__ex_table)
-        ___stop___ex_table = .;
         }
+        EXCEPTION_TABLE(16)
 
         RODATA
 #if defined(CONFIG_ROMKERNEL)
@@ -100,8 +98,7 @@ SECTIONS
         __sdata = . ;
         ___data_start = . ;
 
-        . = ALIGN(0x2000) ;
-                *(.data.init_task)
+        INIT_TASK_DATA(0x2000)
         . = ALIGN(0x4) ;
                 DATA_DATA
         . = ALIGN(0x4) ;
@@ -114,24 +111,16 @@ SECTIONS
         __einittext = .; 
                 INIT_DATA
         . = ALIGN(0x4) ;
+        INIT_SETUP(0x4)
         ___setup_start = .;
                 *(.init.setup)
         . = ALIGN(0x4) ;
         ___setup_end = .;
-        ___initcall_start = .;
-                INITCALLS
-        ___initcall_end = .;
-        ___con_initcall_start = .;
-                *(.con_initcall.init)
-        ___con_initcall_end = .;
+        INIT_CALLS
+        CON_INITCALL
                 EXIT_TEXT
                 EXIT_DATA
-#if defined(CONFIG_BLK_DEV_INITRD)
-                . = ALIGN(4);
-        ___initramfs_start = .;
-                *(.init.ramfs)
-        ___initramfs_end = .;
-#endif
+        INIT_RAM_FS
         . = ALIGN(0x4) ;
         ___init_end = .;
         __edata = . ;
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 011a1cdf0eb5..6851e52ed5a2 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -500,6 +500,10 @@ config HAVE_ARCH_NODEDATA_EXTENSION
         def_bool y
         depends on NUMA
 
+config ARCH_PROC_KCORE_TEXT
+        def_bool y
+        depends on PROC_KCORE
+
 config IA32_SUPPORT
         bool "Support for Linux/x86 binaries"
         help
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 8cfb001092ab..674a8374c6d9 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -2026,24 +2026,21 @@ acpi_sba_ioc_add(struct acpi_device *device)
         struct ioc *ioc;
         acpi_status status;
         u64 hpa, length;
-        struct acpi_buffer buffer;
         struct acpi_device_info *dev_info;
 
         status = hp_acpi_csr_space(device->handle, &hpa, &length);
         if (ACPI_FAILURE(status))
                 return 1;
 
-        buffer.length = ACPI_ALLOCATE_LOCAL_BUFFER;
-        status = acpi_get_object_info(device->handle, &buffer);
+        status = acpi_get_object_info(device->handle, &dev_info);
         if (ACPI_FAILURE(status))
                 return 1;
-        dev_info = buffer.pointer;
 
         /*
          * For HWP0001, only SBA appears in ACPI namespace.  It encloses the PCI
          * root bridges, and its CSR space includes the IOC function.
          */
-        if (strncmp("HWP0001", dev_info->hardware_id.value, 7) == 0) {
+        if (strncmp("HWP0001", dev_info->hardware_id.string, 7) == 0) {
                 hpa += ZX1_IOC_OFFSET;
                 /* zx1 based systems default to kernel page size iommu pages */
                 if (!iovp_shift)
diff --git a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c
index 16ef61a91d95..625ed8f76fce 100644
--- a/arch/ia64/ia32/sys_ia32.c
+++ b/arch/ia64/ia32/sys_ia32.c
@@ -1270,7 +1270,7 @@ putreg (struct task_struct *child, int regno, unsigned int value)
               case PT_CS:
                 if (value != __USER_CS)
                         printk(KERN_ERR
-                               "ia32.putreg: attempt to to set invalid segment register %d = %x\n",
+                               "ia32.putreg: attempt to set invalid segment register %d = %x\n",
                                regno, value);
                 break;
               default:
diff --git a/arch/ia64/include/asm/cputime.h b/arch/ia64/include/asm/cputime.h
index d20b998cb91d..7fa8a8594660 100644
--- a/arch/ia64/include/asm/cputime.h
+++ b/arch/ia64/include/asm/cputime.h
@@ -30,6 +30,7 @@ typedef u64 cputime_t;
 typedef u64 cputime64_t;
 
 #define cputime_zero                    ((cputime_t)0)
+#define cputime_one_jiffy               jiffies_to_cputime(1)
 #define cputime_max                     ((~((cputime_t)0) >> 1) - 1)
 #define cputime_add(__a, __b)           ((__a) +  (__b))
 #define cputime_sub(__a, __b)           ((__a) -  (__b))
diff --git a/arch/ia64/include/asm/mca.h b/arch/ia64/include/asm/mca.h
index 44a0b53df900..c171cdf0a789 100644
--- a/arch/ia64/include/asm/mca.h
+++ b/arch/ia64/include/asm/mca.h
@@ -145,12 +145,14 @@ extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
 extern void ia64_init_handler(struct pt_regs *,
                               struct switch_stack *,
                               struct ia64_sal_os_state *);
+extern void ia64_os_init_on_kdump(void);
 extern void ia64_monarch_init_handler(void);
 extern void ia64_slave_init_handler(void);
 extern void ia64_mca_cmc_vector_setup(void);
 extern int  ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
 extern void ia64_unreg_MCA_extension(void);
 extern unsigned long ia64_get_rnat(unsigned long *);
+extern void ia64_set_psr_mc(void);
 extern void ia64_mca_printk(const char * fmt, ...)
          __attribute__ ((format (printf, 1, 2)));
 
diff --git a/arch/ia64/include/asm/mman.h b/arch/ia64/include/asm/mman.h
index 48cf8b98a0b4..4459028e5aa8 100644
--- a/arch/ia64/include/asm/mman.h
+++ b/arch/ia64/include/asm/mman.h
@@ -8,19 +8,9 @@
  *      David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
 
-#include <asm-generic/mman-common.h>
+#include <asm-generic/mman.h>
 
-#define MAP_GROWSDOWN   0x00100         /* stack-like segment */
-#define MAP_GROWSUP     0x00200         /* register stack-like segment */
-#define MAP_DENYWRITE   0x00800         /* ETXTBSY */
-#define MAP_EXECUTABLE  0x01000         /* mark it as an executable */
-#define MAP_LOCKED      0x02000         /* pages are locked */
-#define MAP_NORESERVE   0x04000         /* don't check for reservations */
-#define MAP_POPULATE    0x08000         /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
+#define MAP_GROWSUP     0x0200          /* register stack-like segment */
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index fcfca56bb850..55281aabe5f2 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -17,7 +17,6 @@
  * loader.
  */
 #define pcibios_assign_all_busses()     0
-#define pcibios_scan_all_fns(a, b)      0
 
 #define PCIBIOS_MIN_IO          0x1000
 #define PCIBIOS_MIN_MEM         0x10000000
@@ -135,7 +134,18 @@ extern void pcibios_resource_to_bus(struct pci_dev *dev,
 extern void pcibios_bus_to_resource(struct pci_dev *dev,
                 struct resource *res, struct pci_bus_region *region);
 
-#define pcibios_scan_all_fns(a, b)      0
+static inline struct resource *
+pcibios_select_root(struct pci_dev *pdev, struct resource *res)
+{
+        struct resource *root = NULL;
+
+        if (res->flags & IORESOURCE_IO)
+                root = &ioport_resource;
+        if (res->flags & IORESOURCE_MEM)
+                root = &iomem_resource;
+
+        return root;
+}
 
 #define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
diff --git a/arch/ia64/include/asm/smp.h b/arch/ia64/include/asm/smp.h
index d217d1d4e051..0b3b3997decd 100644
--- a/arch/ia64/include/asm/smp.h
+++ b/arch/ia64/include/asm/smp.h
@@ -127,7 +127,6 @@ extern int is_multithreading_enabled(void);
 
 extern void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
-#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 
 #else /* CONFIG_SMP */
 
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h
index 7b4c8c70b2d1..3ddb4e709dba 100644
--- a/arch/ia64/include/asm/topology.h
+++ b/arch/ia64/include/asm/topology.h
@@ -33,7 +33,6 @@
 /*
  * Returns a bitmask of CPUs on Node 'node'.
  */
-#define node_to_cpumask(node) (node_to_cpu_mask[node])
 #define cpumask_of_node(node) (&node_to_cpu_mask[node])
 
 /*
@@ -61,12 +60,13 @@ void build_cpu_to_node_map(void);
         .cache_nice_tries       = 2,                    \
         .busy_idx               = 2,                    \
         .idle_idx               = 1,                    \
-        .newidle_idx            = 2,                    \
-        .wake_idx               = 1,                    \
-        .forkexec_idx           = 1,                    \
+        .newidle_idx            = 0,                    \
+        .wake_idx               = 0,                    \
+        .forkexec_idx           = 0,                    \
         .flags                  = SD_LOAD_BALANCE       \
                                 | SD_BALANCE_NEWIDLE    \
                                 | SD_BALANCE_EXEC       \
+                                | SD_BALANCE_FORK       \
                                 | SD_WAKE_AFFINE,       \
         .last_balance           = jiffies,              \
         .balance_interval       = 1,                    \
@@ -85,14 +85,14 @@ void build_cpu_to_node_map(void);
         .cache_nice_tries       = 2,                    \
         .busy_idx               = 3,                    \
         .idle_idx               = 2,                    \
-        .newidle_idx            = 2,                    \
-        .wake_idx               = 1,                    \
-        .forkexec_idx           = 1,                    \
+        .newidle_idx            = 0,                    \
+        .wake_idx               = 0,                    \
+        .forkexec_idx           = 0,                    \
         .flags                  = SD_LOAD_BALANCE       \
+                                | SD_BALANCE_NEWIDLE    \
                                 | SD_BALANCE_EXEC       \
                                 | SD_BALANCE_FORK       \
-                                | SD_SERIALIZE          \
-                                | SD_WAKE_BALANCE,      \
+                                | SD_SERIALIZE,         \
         .last_balance           = jiffies,              \
         .balance_interval       = 64,                   \
         .nr_balance_failed      = 0,                    \
@@ -103,8 +103,6 @@ void build_cpu_to_node_map(void);
 #ifdef CONFIG_SMP
 #define topology_physical_package_id(cpu)       (cpu_data(cpu)->socket_id)
 #define topology_core_id(cpu)                   (cpu_data(cpu)->core_id)
-#define topology_core_siblings(cpu)             (cpu_core_map[cpu])
-#define topology_thread_siblings(cpu)           (per_cpu(cpu_sibling_map, cpu))
 #define topology_core_cpumask(cpu)              (&cpu_core_map[cpu])
 #define topology_thread_cpumask(cpu)            (&per_cpu(cpu_sibling_map, cpu))
 #define smt_capable()                           (smp_num_siblings > 1)
diff --git a/arch/ia64/install.sh b/arch/ia64/install.sh
index 929e780026d1..0e932f5dcd1a 100644
--- a/arch/ia64/install.sh
+++ b/arch/ia64/install.sh
@@ -21,8 +21,8 @@
 
 # User may have a custom install script
 
-if [ -x ~/bin/installkernel ]; then exec ~/bin/installkernel "$@"; fi
-if [ -x /sbin/installkernel ]; then exec /sbin/installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install - same as make zlilo
 
diff --git a/arch/ia64/kernel/Makefile.gate b/arch/ia64/kernel/Makefile.gate
index 1d87f84069b3..ab9b03a9adcc 100644
--- a/arch/ia64/kernel/Makefile.gate
+++ b/arch/ia64/kernel/Makefile.gate
@@ -10,7 +10,7 @@ quiet_cmd_gate = GATE $@
       cmd_gate = $(CC) -nostdlib $(GATECFLAGS_$(@F)) -Wl,-T,$(filter-out FORCE,$^) -o $@
 
 GATECFLAGS_gate.so = -shared -s -Wl,-soname=linux-gate.so.1 \
-                     $(call ld-option, -Wl$(comma)--hash-style=sysv)
+                     $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 $(obj)/gate.so: $(obj)/gate.lds $(obj)/gate.o FORCE
         $(call if_changed,gate)
 
diff --git a/arch/ia64/kernel/crash.c b/arch/ia64/kernel/crash.c
index f065093f8e9b..6631a9dfafdc 100644
--- a/arch/ia64/kernel/crash.c
+++ b/arch/ia64/kernel/crash.c
@@ -23,6 +23,7 @@
 int kdump_status[NR_CPUS];
 static atomic_t kdump_cpu_frozen;
 atomic_t kdump_in_progress;
+static int kdump_freeze_monarch;
 static int kdump_on_init = 1;
 static int kdump_on_fatal_mca = 1;
 
@@ -108,10 +109,38 @@ machine_crash_shutdown(struct pt_regs *pt)
          */
         kexec_disable_iosapic();
 #ifdef CONFIG_SMP
+        /*
+         * If kdump_on_init is set and an INIT is asserted here, kdump will
+         * be started again via INIT monarch.
+         */
+        local_irq_disable();
+        ia64_set_psr_mc();      /* mask MCA/INIT */
+        if (atomic_inc_return(&kdump_in_progress) != 1)
+                unw_init_running(kdump_cpu_freeze, NULL);
+
+        /*
+         * Now this cpu is ready for kdump.
+         * Stop all others by IPI or INIT.  They could receive INIT from
+         * outside and might be INIT monarch, but only thing they have to
+         * do is falling into kdump_cpu_freeze().
+         *
+         * If an INIT is asserted here:
+         * - All receivers might be slaves, since some of cpus could already
+         *   be frozen and INIT might be masked on monarch.  In this case,
+         *   all slaves will be frozen soon since kdump_in_progress will let
+         *   them into DIE_INIT_SLAVE_LEAVE.
+         * - One might be a monarch, but INIT rendezvous will fail since
+         *   at least this cpu already have INIT masked so it never join
+         *   to the rendezvous.  In this case, all slaves and monarch will
+         *   be frozen soon with no wait since the INIT rendezvous is skipped
+         *   by kdump_in_progress.
+         */
         kdump_smp_send_stop();
         /* not all cpu response to IPI, send INIT to freeze them */
-        if (kdump_wait_cpu_freeze() && kdump_on_init)   {
+        if (kdump_wait_cpu_freeze()) {
                 kdump_smp_send_init();
+                /* wait again, don't go ahead if possible */
+                kdump_wait_cpu_freeze();
         }
 #endif
 }
@@ -129,17 +158,17 @@ void
 kdump_cpu_freeze(struct unw_frame_info *info, void *arg)
 {
         int cpuid;
+
         local_irq_disable();
         cpuid = smp_processor_id();
         crash_save_this_cpu();
         current->thread.ksp = (__u64)info->sw - 16;
+
+        ia64_set_psr_mc();      /* mask MCA/INIT and stop reentrance */
+
         atomic_inc(&kdump_cpu_frozen);
         kdump_status[cpuid] = 1;
         mb();
-#ifdef CONFIG_HOTPLUG_CPU
-        if (cpuid != 0)
-                ia64_jump_to_sal(&sal_boot_rendez_state[cpuid]);
-#endif
         for (;;)
                 cpu_relax();
 }
@@ -150,6 +179,20 @@ kdump_init_notifier(struct notifier_block *self, unsigned long val, void *data)
         struct ia64_mca_notify_die *nd;
         struct die_args *args = data;
 
+        if (atomic_read(&kdump_in_progress)) {
+                switch (val) {
+                case DIE_INIT_MONARCH_LEAVE:
+                        if (!kdump_freeze_monarch)
+                                break;
+                        /* fall through */
+                case DIE_INIT_SLAVE_LEAVE:
+                case DIE_INIT_MONARCH_ENTER:
+                case DIE_MCA_RENDZVOUS_LEAVE:
+                        unw_init_running(kdump_cpu_freeze, NULL);
+                        break;
+                }
+        }
+
         if (!kdump_on_init && !kdump_on_fatal_mca)
                 return NOTIFY_DONE;
 
@@ -162,43 +205,31 @@ kdump_init_notifier(struct notifier_block *self, unsigned long val, void *data)
         }
 
         if (val != DIE_INIT_MONARCH_LEAVE &&
-            val != DIE_INIT_SLAVE_LEAVE &&
             val != DIE_INIT_MONARCH_PROCESS &&
-            val != DIE_MCA_RENDZVOUS_LEAVE &&
             val != DIE_MCA_MONARCH_LEAVE)
                 return NOTIFY_DONE;
 
         nd = (struct ia64_mca_notify_die *)args->err;
-        /* Reason code 1 means machine check rendezvous*/
-        if ((val == DIE_INIT_MONARCH_LEAVE || val == DIE_INIT_SLAVE_LEAVE
-            || val == DIE_INIT_MONARCH_PROCESS) && nd->sos->rv_rc == 1)
-                return NOTIFY_DONE;
 
         switch (val) {
         case DIE_INIT_MONARCH_PROCESS:
-                if (kdump_on_init) {
-                        atomic_set(&kdump_in_progress, 1);
-                        *(nd->monarch_cpu) = -1;
+                /* Reason code 1 means machine check rendezvous*/
+                if (kdump_on_init && (nd->sos->rv_rc != 1)) {
+                        if (atomic_inc_return(&kdump_in_progress) != 1)
+                                kdump_freeze_monarch = 1;
                 }
                 break;
         case DIE_INIT_MONARCH_LEAVE:
-                if (kdump_on_init)
+                /* Reason code 1 means machine check rendezvous*/
+                if (kdump_on_init && (nd->sos->rv_rc != 1))
                         machine_kdump_on_init();
                 break;
-        case DIE_INIT_SLAVE_LEAVE:
-                if (atomic_read(&kdump_in_progress))
-                        unw_init_running(kdump_cpu_freeze, NULL);
-                break;
-        case DIE_MCA_RENDZVOUS_LEAVE:
-                if (atomic_read(&kdump_in_progress))
-                        unw_init_running(kdump_cpu_freeze, NULL);
-                break;
         case DIE_MCA_MONARCH_LEAVE:
                 /* *(nd->data) indicate if MCA is recoverable */
                 if (kdump_on_fatal_mca && !(*(nd->data))) {
-                        atomic_set(&kdump_in_progress, 1);
-                        *(nd->monarch_cpu) = -1;
-                        machine_kdump_on_init();
+                        if (atomic_inc_return(&kdump_in_progress) == 1)
+                                machine_kdump_on_init();
+                        /* We got fatal MCA while kdump!? No way!! */
                 }
                 break;
         }
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S
index e6c5c3d5e1f8..1a6e44515eb4 100644
--- a/arch/ia64/kernel/head.S
+++ b/arch/ia64/kernel/head.S
@@ -34,7 +34,6 @@
 #include <asm/mca_asm.h>
 #include <linux/init.h>
 #include <linux/linkage.h>
-#include "head.h"
 
 #ifdef CONFIG_HOTPLUG_CPU
 #define SAL_PSR_BITS_TO_SET                             \
@@ -168,7 +167,7 @@ RestRR:											\
         mov _tmp2=((ia64_rid(IA64_REGION_ID_KERNEL, (num<<61)) << 8) | (pgsize << 2) | vhpt);; \
         mov rr[_tmp1]=_tmp2
 
-        .section __special_page_section,"ax"
+        __PAGE_ALIGNED_DATA
 
         .global empty_zero_page
 empty_zero_page:
@@ -182,7 +181,7 @@ swapper_pg_dir:
 halt_msg:
         stringz "Halting kernel\n"
 
-        .section .text.head,"ax"
+        __REF
 
         .global start_ap
 
@@ -1243,7 +1242,7 @@ GLOBAL_ENTRY(ia64_jump_to_sal)
         movl r16=SAL_PSR_BITS_TO_SET;;
         mov cr.ipsr=r16
         mov cr.ifs=r0;;
-        rfi;;
+        rfi;;                   // note: this unmask MCA/INIT (psr.mc)
 1:
         /*
          * Invalidate all TLB data/inst
diff --git a/arch/ia64/kernel/head.h b/arch/ia64/kernel/head.h
deleted file mode 100644
index 2e2ac6824e65..000000000000
--- a/arch/ia64/kernel/head.h
+++ /dev/null
@@ -1 +0,0 @@
-extern void console_print(const char *s);
diff --git a/arch/ia64/kernel/init_task.c b/arch/ia64/kernel/init_task.c
index c475fc281be7..e253ab8fcbc8 100644
--- a/arch/ia64/kernel/init_task.c
+++ b/arch/ia64/kernel/init_task.c
@@ -33,7 +33,8 @@ union {
                 struct thread_info thread_info;
         } s;
         unsigned long stack[KERNEL_STACK_SIZE/sizeof (unsigned long)];
-} init_task_mem asm ("init_task") __attribute__((section(".data.init_task"))) = {{
+} init_task_mem asm ("init_task") __init_task_data =
+        {{
         .task =         INIT_TASK(init_task_mem.s.task),
         .thread_info =  INIT_THREAD_INFO(init_task_mem.s.task)
 }};
diff --git a/arch/ia64/kernel/machine_kexec.c b/arch/ia64/kernel/machine_kexec.c
index 0823de1f6ebe..3d3aeef46947 100644
--- a/arch/ia64/kernel/machine_kexec.c
+++ b/arch/ia64/kernel/machine_kexec.c
@@ -24,6 +24,8 @@
 #include <asm/delay.h>
 #include <asm/meminit.h>
 #include <asm/processor.h>
+#include <asm/sal.h>
+#include <asm/mca.h>
 
 typedef NORET_TYPE void (*relocate_new_kernel_t)(
                                         unsigned long indirection_page,
@@ -85,13 +87,26 @@ static void ia64_machine_kexec(struct unw_frame_info *info, void *arg)
         void *pal_addr = efi_get_pal_addr();
         unsigned long code_addr = (unsigned long)page_address(image->control_code_page);
         int ii;
+        u64 fp, gp;
+        ia64_fptr_t *init_handler = (ia64_fptr_t *)ia64_os_init_on_kdump;
 
         BUG_ON(!image);
         if (image->type == KEXEC_TYPE_CRASH) {
                 crash_save_this_cpu();
                 current->thread.ksp = (__u64)info->sw - 16;
+
+                /* Register noop init handler */
+                fp = ia64_tpa(init_handler->fp);
+                gp = ia64_tpa(ia64_getreg(_IA64_REG_GP));
+                ia64_sal_set_vectors(SAL_VECTOR_OS_INIT, fp, gp, 0, fp, gp, 0);
+        } else {
+                /* Unregister init handlers of current kernel */
+                ia64_sal_set_vectors(SAL_VECTOR_OS_INIT, 0, 0, 0, 0, 0, 0);
         }
 
+        /* Unregister mca handler - No more recovery on current kernel */
+        ia64_sal_set_vectors(SAL_VECTOR_OS_MCA, 0, 0, 0, 0, 0, 0);
+
         /* Interrupts aren't acceptable while we reboot */
         local_irq_disable();
 
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 7b30d21c5190..d2877a7bfe2e 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -1682,14 +1682,25 @@ ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
 
         if (!sos->monarch) {
                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
+
+#ifdef CONFIG_KEXEC
+                while (monarch_cpu == -1 && !atomic_read(&kdump_in_progress))
+                        udelay(1000);
+#else
                 while (monarch_cpu == -1)
-                       cpu_relax();     /* spin until monarch enters */
+                        cpu_relax();    /* spin until monarch enters */
+#endif
 
                 NOTIFY_INIT(DIE_INIT_SLAVE_ENTER, regs, (long)&nd, 1);
                 NOTIFY_INIT(DIE_INIT_SLAVE_PROCESS, regs, (long)&nd, 1);
 
+#ifdef CONFIG_KEXEC
+                while (monarch_cpu != -1 && !atomic_read(&kdump_in_progress))
+                        udelay(1000);
+#else
                 while (monarch_cpu != -1)
-                       cpu_relax();     /* spin until monarch leaves */
+                        cpu_relax();    /* spin until monarch leaves */
+#endif
 
                 NOTIFY_INIT(DIE_INIT_SLAVE_LEAVE, regs, (long)&nd, 1);
 
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S
index a06d46548ff9..7461d2573d41 100644
--- a/arch/ia64/kernel/mca_asm.S
+++ b/arch/ia64/kernel/mca_asm.S
@@ -40,6 +40,7 @@
 
         .global ia64_do_tlb_purge
         .global ia64_os_mca_dispatch
+        .global ia64_os_init_on_kdump
         .global ia64_os_init_dispatch_monarch
         .global ia64_os_init_dispatch_slave
 
@@ -299,6 +300,25 @@ END(ia64_os_mca_virtual_begin)
 //StartMain////////////////////////////////////////////////////////////////////
 
 //
+// NOP init handler for kdump.  In panic situation, we may receive INIT
+// while kernel transition.  Since we initialize registers on leave from
+// current kernel, no longer monarch/slave handlers of current kernel in
+// virtual mode are called safely.
+// We can unregister these init handlers from SAL, however then the INIT
+// will result in warmboot by SAL and we cannot retrieve the crashdump.
+// Therefore register this NOP function to SAL, to prevent entering virtual
+// mode and resulting warmboot by SAL.
+//
+ia64_os_init_on_kdump:
+        mov             r8=r0           // IA64_INIT_RESUME
+        mov             r9=r10          // SAL_GP
+        mov             r22=r17         // *minstate
+        ;;
+        mov             r10=r0          // return to same context
+        mov             b0=r12          // SAL_CHECK return address
+        br              b0
+
+//
 // SAL to OS entry point for INIT on all processors.  This has been defined for
 // registration purposes with SAL as a part of ia64_mca_init.  Monarch and
 // slave INIT have identical processing, except for the value of the
@@ -1073,3 +1093,30 @@ GLOBAL_ENTRY(ia64_get_rnat)
         mov ar.rsc=3
         br.ret.sptk.many rp
 END(ia64_get_rnat)
+
+
+// void ia64_set_psr_mc(void)
+//
+// Set psr.mc bit to mask MCA/INIT.
+GLOBAL_ENTRY(ia64_set_psr_mc)
+        rsm psr.i | psr.ic              // disable interrupts
+        ;;
+        srlz.d
+        ;;
+        mov r14 = psr                   // get psr{36:35,31:0}
+        movl r15 = 1f
+        ;;
+        dep r14 = -1, r14, PSR_MC, 1    // set psr.mc
+        ;;
+        dep r14 = -1, r14, PSR_IC, 1    // set psr.ic
+        ;;
+        dep r14 = -1, r14, PSR_BN, 1    // keep bank1 in use
+        ;;
+        mov cr.ipsr = r14
+        mov cr.ifs = r0
+        mov cr.iip = r15
+        ;;
+        rfi
+1:
+        br.ret.sptk.many rp
+END(ia64_set_psr_mc)
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c
index 223abb134105..285aae8431c6 100644
--- a/arch/ia64/kernel/pci-swiotlb.c
+++ b/arch/ia64/kernel/pci-swiotlb.c
@@ -46,7 +46,7 @@ void __init swiotlb_dma_init(void)
 
 void __init pci_swiotlb_init(void)
 {
-        if (!iommu_detected || iommu_pass_through) {
+        if (!iommu_detected) {
 #ifdef CONFIG_IA64_GENERIC
                 swiotlb = 1;
                 printk(KERN_INFO "PCI-DMA: Re-initialize machine vector.\n");
diff --git a/arch/ia64/kernel/relocate_kernel.S b/arch/ia64/kernel/relocate_kernel.S
index 903babd22d62..32f6fc131fbe 100644
--- a/arch/ia64/kernel/relocate_kernel.S
+++ b/arch/ia64/kernel/relocate_kernel.S
@@ -52,7 +52,7 @@ GLOBAL_ENTRY(relocate_new_kernel)
         srlz.i
         ;;
         mov ar.rnat=r18
-        rfi
+        rfi                             // note: this unmask MCA/INIT (psr.mc)
         ;;
 1:
         //physical mode code begin
diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c
index 93ebfea43c6c..dabeefe21134 100644
--- a/arch/ia64/kernel/smp.c
+++ b/arch/ia64/kernel/smp.c
@@ -302,7 +302,7 @@ smp_flush_tlb_mm (struct mm_struct *mm)
                 return;
         }
 
-        smp_call_function_mask(mm->cpu_vm_mask,
+        smp_call_function_many(mm_cpumask(mm),
                 (void (*)(void *))local_finish_flush_tlb_mm, mm, 1);
         local_irq_disable();
         local_finish_flush_tlb_mm(mm);
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index eb4214d1c5af..0a0c77b2c988 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -51,8 +51,6 @@ SECTIONS
         KPROBES_TEXT
         *(.gnu.linkonce.t*)
     }
-  .text.head : AT(ADDR(.text.head) - LOAD_OFFSET)
-        { *(.text.head) }
   .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
         { *(.text2) }
 #ifdef CONFIG_SMP
@@ -66,14 +64,7 @@ SECTIONS
   NOTES :code :note             /* put .notes in text and mark in PT_NOTE  */
   code_continues : {} :code     /* switch back to regular program...  */
 
-  /* Exception table */
-  . = ALIGN(16);
-  __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
-        {
-          __start___ex_table = .;
-          *(__ex_table)
-          __stop___ex_table = .;
-        }
+  EXCEPTION_TABLE(16)
 
   /* MCA table */
   . = ALIGN(16);
@@ -115,38 +106,9 @@ SECTIONS
 
   . = ALIGN(PAGE_SIZE);
   __init_begin = .;
-  .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
-        {
-          _sinittext = .;
-          INIT_TEXT
-          _einittext = .;
-        }
-
-  .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
-        { INIT_DATA }
 
-#ifdef CONFIG_BLK_DEV_INITRD
-  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
-        {
-          __initramfs_start = .;
-          *(.init.ramfs)
-          __initramfs_end = .;
-        }
-#endif
-
-   . = ALIGN(16);
-  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
-        {
-          __setup_start = .;
-          *(.init.setup)
-          __setup_end = .;
-        }
-  .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
-        {
-          __initcall_start = .;
-        INITCALLS
-          __initcall_end = .;
-        }
+  INIT_TEXT_SECTION(PAGE_SIZE)
+  INIT_DATA_SECTION(16)
 
   .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
         {
@@ -204,24 +166,13 @@ SECTIONS
         }
 #endif
 
-  . = ALIGN(8);
-   __con_initcall_start = .;
-  .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
-        { *(.con_initcall.init) }
-  __con_initcall_end = .;
-  __security_initcall_start = .;
-  .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
-        { *(.security_initcall.init) }
-  __security_initcall_end = .;
   . = ALIGN(PAGE_SIZE);
   __init_end = .;
 
-  /* The initial task and kernel stack */
-  .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
-        { *(.data.init_task) }
-
   .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
-        { *(__special_page_section)
+        {
+        PAGE_ALIGNED_DATA(PAGE_SIZE)
+          . = ALIGN(PAGE_SIZE);
           __start_gate_section = .;
           *(.data.gate)
           __stop_gate_section = .;
@@ -236,12 +187,6 @@ SECTIONS
                                  * kernel data
                                  */
 
-  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
-        { *(.data.read_mostly) }
-
-  .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
-        { *(.data.cacheline_aligned) }
-
   /* Per-cpu data: */
   . = ALIGN(PERCPU_PAGE_SIZE);
   PERCPU_VADDR(PERCPU_ADDR, :percpu)
@@ -258,6 +203,9 @@ SECTIONS
                 __cpu0_per_cpu = .;
   . = . + PERCPU_PAGE_SIZE;     /* cpu0 per-cpu space */
 #endif
+                INIT_TASK_DATA(PAGE_SIZE)
+                CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES)
+                READ_MOSTLY_DATA(SMP_CACHE_BYTES)
                 DATA_DATA
                 *(.data1)
                 *(.gnu.linkonce.d*)
@@ -274,48 +222,15 @@ SECTIONS
   .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
         { *(.sdata) *(.sdata1) *(.srdata) }
   _edata  =  .;
-  __bss_start = .;
-  .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
-        { *(.sbss) *(.scommon) }
-  .bss : AT(ADDR(.bss) - LOAD_OFFSET)
-        { *(.bss) *(COMMON) }
-  __bss_stop = .;
+
+  BSS_SECTION(0, 0, 0)
 
   _end = .;
 
   code : { } :code
-  /* Stabs debugging sections.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  .stab.excl 0 : { *(.stab.excl) }
-  .stab.exclstr 0 : { *(.stab.exclstr) }
-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  /* DWARF debug sections.
-     Symbols in the DWARF debugging sections are relative to the beginning
-     of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
+
+  STABS_DEBUG
+  DWARF_DEBUG
 
   /* Default discards */
   DISCARDS
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index b115b3bbf04a..1857766a63c1 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -617,7 +617,6 @@ mem_init (void)
         long reserved_pages, codesize, datasize, initsize;
         pg_data_t *pgdat;
         int i;
-        static struct kcore_list kcore_mem, kcore_vmem, kcore_kernel;
 
         BUG_ON(PTRS_PER_PGD * sizeof(pgd_t) != PAGE_SIZE);
         BUG_ON(PTRS_PER_PMD * sizeof(pmd_t) != PAGE_SIZE);
@@ -639,10 +638,6 @@ mem_init (void)
 
         high_memory = __va(max_low_pfn * PAGE_SIZE);
 
-        kclist_add(&kcore_mem, __va(0), max_low_pfn * PAGE_SIZE);
-        kclist_add(&kcore_vmem, (void *)VMALLOC_START, VMALLOC_END-VMALLOC_START);
-        kclist_add(&kcore_kernel, _stext, _end - _stext);
-
         for_each_online_pgdat(pgdat)
                 if (pgdat->bdata->node_bootmem_map)
                         totalram_pages += free_all_bootmem_node(pgdat);
@@ -655,7 +650,7 @@ mem_init (void)
         initsize =  (unsigned long) __init_end - (unsigned long) __init_begin;
 
         printk(KERN_INFO "Memory: %luk/%luk available (%luk code, %luk reserved, "
-               "%luk data, %luk init)\n", (unsigned long) nr_free_pages() << (PAGE_SHIFT - 10),
+               "%luk data, %luk init)\n", nr_free_pages() << (PAGE_SHIFT - 10),
                num_physpages << (PAGE_SHIFT - 10), codesize >> 10,
                reserved_pages << (PAGE_SHIFT - 10), datasize >> 10, initsize >> 10);
 
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_ate.c b/arch/ia64/sn/pci/pcibr/pcibr_ate.c
index 239b3cedcf2b..5bc34eac9e01 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_ate.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_ate.c
@@ -54,6 +54,8 @@ static int find_free_ate(struct ate_resource *ate_resource, int start,
                                         break;
                                 }
                         }
+                        if (i >= ate_resource->num_ate)
+                                return -1;
                 } else
                         index++;        /* Try next ate */
         }
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index cabba332cc48..c41234f1b825 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -41,6 +41,12 @@ config HZ
         int
         default 100
 
+config GENERIC_TIME
+        def_bool y
+
+config ARCH_USES_GETTIMEOFFSET
+        def_bool y
+
 source "init/Kconfig"
 
 source "kernel/Kconfig.freezer"
diff --git a/arch/m32r/boot/compressed/install.sh b/arch/m32r/boot/compressed/install.sh
index 6d72e9e72697..16e5a0a13437 100644
--- a/arch/m32r/boot/compressed/install.sh
+++ b/arch/m32r/boot/compressed/install.sh
@@ -24,8 +24,8 @@
 
 # User may have a custom install script
 
-if [ -x /sbin/installkernel ]; then
-  exec /sbin/installkernel "$@"
+if [ -x /sbin/${INSTALLKERNEL} ]; then
+  exec /sbin/${INSTALLKERNEL} "$@"
 fi
 
 if [ "$2" = "zImage" ]; then
diff --git a/arch/m32r/include/asm/hardirq.h b/arch/m32r/include/asm/hardirq.h
index cb8aa762f235..4c31c0ae215e 100644
--- a/arch/m32r/include/asm/hardirq.h
+++ b/arch/m32r/include/asm/hardirq.h
@@ -2,14 +2,7 @@
 #ifndef __ASM_HARDIRQ_H
 #define __ASM_HARDIRQ_H
 
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
+#include <asm/irq.h>
 
 #if NR_IRQS > 256
 #define HARDIRQ_BITS    9
@@ -26,11 +19,7 @@ typedef struct {
 # error HARDIRQ_BITS is too low!
 #endif
 
-static inline void ack_bad_irq(int irq)
-{
-        printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq);
-        BUG();
-}
+#include <asm-generic/hardirq.h>
 
 #endif /* __ASM_HARDIRQ_H */
 #endif /* __KERNEL__ */
diff --git a/arch/m32r/include/asm/mman.h b/arch/m32r/include/asm/mman.h
index 04a5f40aa401..8eebf89f5ab1 100644
--- a/arch/m32r/include/asm/mman.h
+++ b/arch/m32r/include/asm/mman.h
@@ -1,17 +1 @@
-#ifndef __M32R_MMAN_H__
-#define __M32R_MMAN_H__
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* __M32R_MMAN_H__ */
+#include <asm-generic/mman.h>
diff --git a/arch/m32r/include/asm/mmu_context.h b/arch/m32r/include/asm/mmu_context.h
index 91909e5dd9d0..a70a3df33635 100644
--- a/arch/m32r/include/asm/mmu_context.h
+++ b/arch/m32r/include/asm/mmu_context.h
@@ -127,7 +127,7 @@ static inline void switch_mm(struct mm_struct *prev,
 
         if (prev != next) {
 #ifdef CONFIG_SMP
-                cpu_set(cpu, next->cpu_vm_mask);
+                cpumask_set_cpu(cpu, mm_cpumask(next));
 #endif /* CONFIG_SMP */
                 /* Set MPTB = next->pgd */
                 *(volatile unsigned long *)MPTB = (unsigned long)next->pgd;
@@ -135,7 +135,7 @@ static inline void switch_mm(struct mm_struct *prev,
         }
 #ifdef CONFIG_SMP
         else
-                if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
+                if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)))
                         activate_context(next);
 #endif /* CONFIG_SMP */
 }
diff --git a/arch/m32r/include/asm/page.h b/arch/m32r/include/asm/page.h
index 11777f7a5628..725ede8f2889 100644
--- a/arch/m32r/include/asm/page.h
+++ b/arch/m32r/include/asm/page.h
@@ -1,9 +1,11 @@
 #ifndef _ASM_M32R_PAGE_H
 #define _ASM_M32R_PAGE_H
 
+#include <linux/const.h>
+
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT      12
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE-1))
 
 #ifndef __ASSEMBLY__
diff --git a/arch/m32r/include/asm/processor.h b/arch/m32r/include/asm/processor.h
index 1a997fc148a2..8397c249989b 100644
--- a/arch/m32r/include/asm/processor.h
+++ b/arch/m32r/include/asm/processor.h
@@ -140,8 +140,6 @@ unsigned long get_wchan(struct task_struct *p);
 #define KSTK_EIP(tsk)  ((tsk)->thread.lr)
 #define KSTK_ESP(tsk)  ((tsk)->thread.sp)
 
-#define THREAD_SIZE (2*PAGE_SIZE)
-
 #define cpu_relax()     barrier()
 
 #endif /* _ASM_M32R_PROCESSOR_H */
diff --git a/arch/m32r/include/asm/smp.h b/arch/m32r/include/asm/smp.h
index b96a6d2ffbc3..e67ded1aab91 100644
--- a/arch/m32r/include/asm/smp.h
+++ b/arch/m32r/include/asm/smp.h
@@ -88,7 +88,7 @@ extern void smp_send_timer(void);
 extern unsigned long send_IPI_mask_phys(cpumask_t, int, int);
 
 extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi(cpumask_t mask);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 
 #endif  /* not __ASSEMBLY__ */
 
diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h
index 71578151a403..ed240b6e8e77 100644
--- a/arch/m32r/include/asm/thread_info.h
+++ b/arch/m32r/include/asm/thread_info.h
@@ -55,6 +55,8 @@ struct thread_info {
 
 #define PREEMPT_ACTIVE          0x10000000
 
+#define THREAD_SIZE (PAGE_SIZE << 1)
+
 /*
  * macros/functions for gaining access to the thread information structure
  */
@@ -76,8 +78,6 @@ struct thread_info {
 #define init_thread_info        (init_thread_union.thread_info)
 #define init_stack              (init_thread_union.stack)
 
-#define THREAD_SIZE (2*PAGE_SIZE)
-
 /* how to get the thread information struct from C */
 static inline struct thread_info *current_thread_info(void)
 {
@@ -125,17 +125,6 @@ static inline unsigned int get_thread_fault_code(void)
         return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT;
 }
 
-#else /* !__ASSEMBLY__ */
-
-#define THREAD_SIZE     8192
-
-/* how to get the thread information struct from ASM */
-#define GET_THREAD_INFO(reg)    GET_THREAD_INFO reg
-        .macro GET_THREAD_INFO reg
-        ldi     \reg, #-THREAD_SIZE
-        and     \reg, sp
-        .endm
-
 #endif
 
 /*
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index 612d35b082a6..403869833b98 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -118,6 +118,13 @@
 #define resume_kernel           restore_all
 #endif
 
+/* how to get the thread information struct from ASM */
+#define GET_THREAD_INFO(reg)    GET_THREAD_INFO reg
+        .macro GET_THREAD_INFO reg
+        ldi     \reg, #-THREAD_SIZE
+        and     \reg, sp
+        .endm
+
 ENTRY(ret_from_fork)
         pop     r0
         bl      schedule_tail
diff --git a/arch/m32r/kernel/head.S b/arch/m32r/kernel/head.S
index 0a7194439eb1..a46652dd83e6 100644
--- a/arch/m32r/kernel/head.S
+++ b/arch/m32r/kernel/head.S
@@ -268,13 +268,13 @@ ENTRY(empty_zero_page)
 /*------------------------------------------------------------------------
  * Stack area
  */
-        .section .spi
+        .section .init.data, "aw"
         ALIGN
         .global spi_stack_top
         .zero   1024
 spi_stack_top:
 
-        .section .spu
+        .section .init.data, "aw"
         ALIGN
         .global spu_stack_top
         .zero   1024
diff --git a/arch/m32r/kernel/init_task.c b/arch/m32r/kernel/init_task.c
index fce57e5d3f91..6c42d5f8df50 100644
--- a/arch/m32r/kernel/init_task.c
+++ b/arch/m32r/kernel/init_task.c
@@ -20,9 +20,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index 98b8feb12ed8..98682bba0ed9 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -77,7 +77,7 @@ static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
         struct user * dummy = NULL;
 #endif
 
-        if ((off & 3) || (off < 0) || (off > sizeof(struct user) - 3))
+        if ((off & 3) || off > sizeof(struct user) - 3)
                 return -EIO;
 
         off >>= 2;
@@ -139,8 +139,7 @@ static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
         struct user * dummy = NULL;
 #endif
 
-        if ((off & 3) || off < 0 ||
-            off > sizeof(struct user) - 3)
+        if ((off & 3) || off > sizeof(struct user) - 3)
                 return -EIO;
 
         off >>= 2;
diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c
index 929e5c9d3ad9..1b7598e6f6e8 100644
--- a/arch/m32r/kernel/smp.c
+++ b/arch/m32r/kernel/smp.c
@@ -85,7 +85,7 @@ void smp_ipi_timer_interrupt(struct pt_regs *);
 void smp_local_timer_interrupt(void);
 
 static void send_IPI_allbutself(int, int);
-static void send_IPI_mask(cpumask_t, int, int);
+static void send_IPI_mask(const struct cpumask *, int, int);
 unsigned long send_IPI_mask_phys(cpumask_t, int, int);
 
 /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
@@ -113,7 +113,7 @@ unsigned long send_IPI_mask_phys(cpumask_t, int, int);
 void smp_send_reschedule(int cpu_id)
 {
         WARN_ON(cpu_is_offline(cpu_id));
-        send_IPI_mask(cpumask_of_cpu(cpu_id), RESCHEDULE_IPI, 1);
+        send_IPI_mask(cpumask_of(cpu_id), RESCHEDULE_IPI, 1);
 }
 
 /*==========================================================================*
@@ -168,7 +168,7 @@ void smp_flush_cache_all(void)
         spin_lock(&flushcache_lock);
         mask=cpus_addr(cpumask);
         atomic_set_mask(*mask, (atomic_t *)&flushcache_cpumask);
-        send_IPI_mask(cpumask, INVALIDATE_CACHE_IPI, 0);
+        send_IPI_mask(&cpumask, INVALIDATE_CACHE_IPI, 0);
         _flush_cache_copyback_all();
         while (flushcache_cpumask)
                 mb();
@@ -264,7 +264,7 @@ void smp_flush_tlb_mm(struct mm_struct *mm)
         preempt_disable();
         cpu_id = smp_processor_id();
         mmc = &mm->context[cpu_id];
-        cpu_mask = mm->cpu_vm_mask;
+        cpu_mask = *mm_cpumask(mm);
         cpu_clear(cpu_id, cpu_mask);
 
         if (*mmc != NO_CONTEXT) {
@@ -273,7 +273,7 @@ void smp_flush_tlb_mm(struct mm_struct *mm)
                 if (mm == current->mm)
                         activate_context(mm);
                 else
-                        cpu_clear(cpu_id, mm->cpu_vm_mask);
+                        cpumask_clear_cpu(cpu_id, mm_cpumask(mm));
                 local_irq_restore(flags);
         }
         if (!cpus_empty(cpu_mask))
@@ -334,7 +334,7 @@ void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
         preempt_disable();
         cpu_id = smp_processor_id();
         mmc = &mm->context[cpu_id];
-        cpu_mask = mm->cpu_vm_mask;
+        cpu_mask = *mm_cpumask(mm);
         cpu_clear(cpu_id, cpu_mask);
 
 #ifdef DEBUG_SMP
@@ -424,7 +424,7 @@ static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
          * We have to send the IPI only to
          * CPUs affected.
          */
-        send_IPI_mask(cpumask, INVALIDATE_TLB_IPI, 0);
+        send_IPI_mask(&cpumask, INVALIDATE_TLB_IPI, 0);
 
         while (!cpus_empty(flush_cpumask)) {
                 /* nothing. lockup detection does not belong here */
@@ -469,7 +469,7 @@ void smp_invalidate_interrupt(void)
                 if (flush_mm == current->active_mm)
                         activate_context(flush_mm);
                 else
-                        cpu_clear(cpu_id, flush_mm->cpu_vm_mask);
+                        cpumask_clear_cpu(cpu_id, mm_cpumask(flush_mm));
         } else {
                 unsigned long va = flush_va;
 
@@ -546,14 +546,14 @@ static void stop_this_cpu(void *dummy)
         for ( ; ; );
 }
 
-void arch_send_call_function_ipi(cpumask_t mask)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         send_IPI_mask(mask, CALL_FUNCTION_IPI, 0);
 }
 
 void arch_send_call_function_single_ipi(int cpu)
 {
-        send_IPI_mask(cpumask_of_cpu(cpu), CALL_FUNC_SINGLE_IPI, 0);
+        send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI, 0);
 }
 
 /*==========================================================================*
@@ -729,7 +729,7 @@ static void send_IPI_allbutself(int ipi_num, int try)
         cpumask = cpu_online_map;
         cpu_clear(smp_processor_id(), cpumask);
 
-        send_IPI_mask(cpumask, ipi_num, try);
+        send_IPI_mask(&cpumask, ipi_num, try);
 }
 
 /*==========================================================================*
@@ -752,7 +752,7 @@ static void send_IPI_allbutself(int ipi_num, int try)
  * ---------- --- --------------------------------------------------------
  *
  *==========================================================================*/
-static void send_IPI_mask(cpumask_t cpumask, int ipi_num, int try)
+static void send_IPI_mask(const struct cpumask *cpumask, int ipi_num, int try)
 {
         cpumask_t physid_mask, tmp;
         int cpu_id, phys_id;
@@ -761,11 +761,11 @@ static void send_IPI_mask(cpumask_t cpumask, int ipi_num, int try)
         if (num_cpus <= 1)      /* NO MP */
                 return;
 
-        cpus_and(tmp, cpumask, cpu_online_map);
-        BUG_ON(!cpus_equal(cpumask, tmp));
+        cpumask_and(&tmp, cpumask, cpu_online_mask);
+        BUG_ON(!cpumask_equal(cpumask, &tmp));
 
         physid_mask = CPU_MASK_NONE;
-        for_each_cpu_mask(cpu_id, cpumask){
+        for_each_cpu(cpu_id, cpumask) {
                 if ((phys_id = cpu_to_physid(cpu_id)) != -1)
                         cpu_set(phys_id, physid_mask);
         }
diff --git a/arch/m32r/kernel/smpboot.c b/arch/m32r/kernel/smpboot.c
index 2547d6c4a827..e034844cfc0d 100644
--- a/arch/m32r/kernel/smpboot.c
+++ b/arch/m32r/kernel/smpboot.c
@@ -178,7 +178,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         for (phys_id = 0 ; phys_id < nr_cpu ; phys_id++)
                 physid_set(phys_id, phys_cpu_present_map);
 #ifndef CONFIG_HOTPLUG_CPU
-        cpu_present_map = cpu_possible_map;
+        init_cpu_present(&cpu_possible_map);
 #endif
 
         show_mp_info(nr_cpu);
@@ -213,7 +213,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
                 if (!physid_isset(phys_id, phys_cpu_present_map))
                         continue;
 
-                if ((max_cpus >= 0) && (max_cpus <= cpucount + 1))
+                if (max_cpus <= cpucount + 1)
                         continue;
 
                 do_boot_cpu(phys_id);
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c
index cada3ba4b990..ba61c4c73202 100644
--- a/arch/m32r/kernel/time.c
+++ b/arch/m32r/kernel/time.c
@@ -48,7 +48,7 @@ extern void smp_local_timer_interrupt(void);
 
 static unsigned long latch;
 
-static unsigned long do_gettimeoffset(void)
+u32 arch_gettimeoffset(void)
 {
         unsigned long  elapsed_time = 0;  /* [us] */
 
@@ -93,79 +93,10 @@ static unsigned long do_gettimeoffset(void)
 #error no chip configuration
 #endif
 
-        return elapsed_time;
+        return elapsed_time * 1000;
 }
 
 /*
- * This version of gettimeofday has near microsecond resolution.
- */
-void do_gettimeofday(struct timeval *tv)
-{
-        unsigned long seq;
-        unsigned long usec, sec;
-        unsigned long max_ntp_tick = tick_usec - tickadj;
-
-        do {
-                seq = read_seqbegin(&xtime_lock);
-
-                usec = do_gettimeoffset();
-
-                /*
-                 * If time_adjust is negative then NTP is slowing the clock
-                 * so make sure not to go into next possible interval.
-                 * Better to lose some accuracy than have time go backwards..
-                 */
-                if (unlikely(time_adjust < 0))
-                        usec = min(usec, max_ntp_tick);
-
-                sec = xtime.tv_sec;
-                usec += (xtime.tv_nsec / 1000);
-        } while (read_seqretry(&xtime_lock, seq));
-
-        while (usec >= 1000000) {
-                usec -= 1000000;
-                sec++;
-        }
-
-        tv->tv_sec = sec;
-        tv->tv_usec = usec;
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-int do_settimeofday(struct timespec *tv)
-{
-        time_t wtm_sec, sec = tv->tv_sec;
-        long wtm_nsec, nsec = tv->tv_nsec;
-
-        if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
-                return -EINVAL;
-
-        write_seqlock_irq(&xtime_lock);
-        /*
-         * This is revolting. We need to set "xtime" correctly. However, the
-         * value in this location is the value at the most recent update of
-         * wall time.  Discover what correction gettimeofday() would have
-         * made, and then undo it!
-         */
-        nsec -= do_gettimeoffset() * NSEC_PER_USEC;
-
-        wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
-        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
-        set_normalized_timespec(&xtime, sec, nsec);
-        set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
-        ntp_clear();
-        write_sequnlock_irq(&xtime_lock);
-        clock_was_set();
-
-        return 0;
-}
-
-EXPORT_SYMBOL(do_settimeofday);
-
-/*
  * In order to set the CMOS clock precisely, set_rtc_mmss has to be
  * called 500 ms after the second nowtime has started, because when
  * nowtime is written into the registers of the CMOS clock, it will
@@ -192,6 +123,7 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
 #ifndef CONFIG_SMP
         profile_tick(CPU_PROFILING);
 #endif
+        /* XXX FIXME. Uh, the xtime_lock should be held here, no? */
         do_timer(1);
 
 #ifndef CONFIG_SMP
diff --git a/arch/m32r/kernel/vmlinux.lds.S b/arch/m32r/kernel/vmlinux.lds.S
index de5e21cca6a5..8ceb6181d805 100644
--- a/arch/m32r/kernel/vmlinux.lds.S
+++ b/arch/m32r/kernel/vmlinux.lds.S
@@ -4,6 +4,7 @@
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/addrspace.h>
 #include <asm/page.h>
+#include <asm/thread_info.h>
 
 OUTPUT_ARCH(m32r)
 #if defined(__LITTLE_ENDIAN__)
@@ -40,83 +41,22 @@ SECTIONS
 #endif
   _etext = .;                   /* End of text section */
 
-  . = ALIGN(16);                /* Exception table */
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
+  EXCEPTION_TABLE(16)
   RODATA
-
-  /* writeable */
-  .data : {                     /* Data */
-        *(.spu)
-        *(.spi)
-        DATA_DATA
-        CONSTRUCTORS
-        }
-
-  . = ALIGN(4096);
-  __nosave_begin = .;
-  .data_nosave : { *(.data.nosave) }
-  . = ALIGN(4096);
-  __nosave_end = .;
-
-  . = ALIGN(32);
-  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
-
+  RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
   _edata = .;                   /* End of data section */
 
-  . = ALIGN(8192);              /* init_task */
-  .data.init_task : { *(.data.init_task) }
-
   /* will be freed after init */
-  . = ALIGN(4096);              /* Init code and data */
+  . = ALIGN(PAGE_SIZE);         /* Init code and data */
   __init_begin = .;
-  .init.text : {
-        _sinittext = .;
-        INIT_TEXT
-        _einittext = .;
-  }
-  .init.data : { INIT_DATA }
-  . = ALIGN(16);
-  __setup_start = .;
-  .init.setup : { *(.init.setup) }
-  __setup_end = .;
-  __initcall_start = .;
-  .initcall.init : {
-        INITCALLS
-  }
-  __initcall_end = .;
-  __con_initcall_start = .;
-  .con_initcall.init : { *(.con_initcall.init) }
-  __con_initcall_end = .;
-  SECURITY_INIT
-  . = ALIGN(4);
-  __alt_instructions = .;
-  .altinstructions : { *(.altinstructions) }
-  __alt_instructions_end = .;
-  .altinstr_replacement : { *(.altinstr_replacement) }
-  /* .exit.text is discard at runtime, not link time, to deal with references
-     from .altinstructions and .eh_frame */
-  .exit.text : { EXIT_TEXT }
-  .exit.data : { EXIT_DATA }
-
-#ifdef CONFIG_BLK_DEV_INITRD
-  . = ALIGN(4096);
-  __initramfs_start = .;
-  .init.ramfs : { *(.init.ramfs) }
-  __initramfs_end = .;
-#endif
-
-  PERCPU(4096)
-  . = ALIGN(4096);
+  INIT_TEXT_SECTION(PAGE_SIZE)
+  INIT_DATA_SECTION(16)
+  PERCPU(PAGE_SIZE)
+  . = ALIGN(PAGE_SIZE);
   __init_end = .;
   /* freed after init ends here */
 
-  __bss_start = .;              /* BSS */
-  .bss : { *(.bss) }
-  . = ALIGN(4);
-  __bss_stop = .;
+  BSS_SECTION(0, 0, 4)
 
   _end = . ;
 
diff --git a/arch/m32r/mm/init.c b/arch/m32r/mm/init.c
index 24d429f9358a..9f581df3952b 100644
--- a/arch/m32r/mm/init.c
+++ b/arch/m32r/mm/init.c
@@ -171,7 +171,7 @@ void __init mem_init(void)
 
         printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, "
                 "%dk reserved, %dk data, %dk init)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 num_physpages << (PAGE_SHIFT-10),
                 codesize >> 10,
                 reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index fb87c08c6b57..29dd8489ffec 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -58,6 +58,12 @@ config HZ
         int
         default 100
 
+config GENERIC_TIME
+        def_bool y
+
+config ARCH_USES_GETTIMEOFFSET
+        def_bool y
+
 mainmenu "Linux/68k Kernel Configuration"
 
 source "init/Kconfig"
diff --git a/arch/m68k/include/asm/checksum.h b/arch/m68k/include/asm/checksum.h
index 1cf544767453..ec514485c8b6 100644
--- a/arch/m68k/include/asm/checksum.h
+++ b/arch/m68k/include/asm/checksum.h
@@ -1,5 +1,170 @@
-#ifdef __uClinux__
-#include "checksum_no.h"
+#ifndef _M68K_CHECKSUM_H
+#define _M68K_CHECKSUM_H
+
+#include <linux/in6.h>
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+__wsum csum_partial(const void *buff, int len, __wsum sum);
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+
+extern __wsum csum_partial_copy_from_user(const void __user *src,
+                                                void *dst,
+                                                int len, __wsum sum,
+                                                int *csum_err);
+
+extern __wsum csum_partial_copy_nocheck(const void *src,
+                                              void *dst, int len,
+                                              __wsum sum);
+
+
+#ifdef CONFIG_COLDFIRE
+
+/*
+ *      The ColdFire cores don't support all the 68k instructions used
+ *      in the optimized checksum code below. So it reverts back to using
+ *      more standard C coded checksums. The fast checksum code is
+ *      significantly larger than the optimized version, so it is not
+ *      inlined here.
+ */
+__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
+
+static inline __sum16 csum_fold(__wsum sum)
+{
+        unsigned int tmp = (__force u32)sum;
+
+        tmp = (tmp & 0xffff) + (tmp >> 16);
+        tmp = (tmp & 0xffff) + (tmp >> 16);
+
+        return (__force __sum16)~tmp;
+}
+
 #else
-#include "checksum_mm.h"
-#endif
+
+/*
+ *      This is a version of ip_fast_csum() optimized for IP headers,
+ *      which always checksum on 4 octet boundaries.
+ */
+static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+        unsigned int sum = 0;
+        unsigned long tmp;
+
+        __asm__ ("subqw #1,%2\n"
+                 "1:\t"
+                 "movel %1@+,%3\n\t"
+                 "addxl %3,%0\n\t"
+                 "dbra  %2,1b\n\t"
+                 "movel %0,%3\n\t"
+                 "swap  %3\n\t"
+                 "addxw %3,%0\n\t"
+                 "clrw  %3\n\t"
+                 "addxw %3,%0\n\t"
+                 : "=d" (sum), "=&a" (iph), "=&d" (ihl), "=&d" (tmp)
+                 : "0" (sum), "1" (iph), "2" (ihl)
+                 : "memory");
+        return (__force __sum16)~sum;
+}
+
+static inline __sum16 csum_fold(__wsum sum)
+{
+        unsigned int tmp = (__force u32)sum;
+
+        __asm__("swap %1\n\t"
+                "addw %1, %0\n\t"
+                "clrw %1\n\t"
+                "addxw %1, %0"
+                : "=&d" (sum), "=&d" (tmp)
+                : "0" (sum), "1" (tmp));
+
+        return (__force __sum16)~sum;
+}
+
+#endif /* CONFIG_COLDFIRE */
+
+static inline __wsum
+csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
+                  unsigned short proto, __wsum sum)
+{
+        __asm__ ("addl  %2,%0\n\t"
+                 "addxl %3,%0\n\t"
+                 "addxl %4,%0\n\t"
+                 "clrl %1\n\t"
+                 "addxl %1,%0"
+                 : "=&d" (sum), "=d" (saddr)
+                 : "g" (daddr), "1" (saddr), "d" (len + proto),
+                   "0" (sum));
+        return sum;
+}
+
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16
+csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
+                  unsigned short proto, __wsum sum)
+{
+        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
+}
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+
+static inline __sum16 ip_compute_csum(const void *buff, int len)
+{
+        return csum_fold (csum_partial(buff, len, 0));
+}
+
+#define _HAVE_ARCH_IPV6_CSUM
+static __inline__ __sum16
+csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
+                __u32 len, unsigned short proto, __wsum sum)
+{
+        register unsigned long tmp;
+        __asm__("addl %2@,%0\n\t"
+                "movel %2@(4),%1\n\t"
+                "addxl %1,%0\n\t"
+                "movel %2@(8),%1\n\t"
+                "addxl %1,%0\n\t"
+                "movel %2@(12),%1\n\t"
+                "addxl %1,%0\n\t"
+                "movel %3@,%1\n\t"
+                "addxl %1,%0\n\t"
+                "movel %3@(4),%1\n\t"
+                "addxl %1,%0\n\t"
+                "movel %3@(8),%1\n\t"
+                "addxl %1,%0\n\t"
+                "movel %3@(12),%1\n\t"
+                "addxl %1,%0\n\t"
+                "addxl %4,%0\n\t"
+                "clrl %1\n\t"
+                "addxl %1,%0"
+                : "=&d" (sum), "=&d" (tmp)
+                : "a" (saddr), "a" (daddr), "d" (len + proto),
+                  "0" (sum));
+
+        return csum_fold(sum);
+}
+
+#endif /* _M68K_CHECKSUM_H */
diff --git a/arch/m68k/include/asm/checksum_mm.h b/arch/m68k/include/asm/checksum_mm.h
deleted file mode 100644
index 494f9aec37ea..000000000000
--- a/arch/m68k/include/asm/checksum_mm.h
+++ /dev/null
@@ -1,148 +0,0 @@
-#ifndef _M68K_CHECKSUM_H
-#define _M68K_CHECKSUM_H
-
-#include <linux/in6.h>
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum sum);
-
-/*
- * the same as csum_partial, but copies from src while it
- * checksums
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-
-extern __wsum csum_partial_copy_from_user(const void __user *src,
-                                                void *dst,
-                                                int len, __wsum sum,
-                                                int *csum_err);
-
-extern __wsum csum_partial_copy_nocheck(const void *src,
-                                              void *dst, int len,
-                                              __wsum sum);
-
-/*
- *      This is a version of ip_compute_csum() optimized for IP headers,
- *      which always checksum on 4 octet boundaries.
- *
- */
-static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
-        unsigned int sum = 0;
-        unsigned long tmp;
-
-        __asm__ ("subqw #1,%2\n"
-                 "1:\t"
-                 "movel %1@+,%3\n\t"
-                 "addxl %3,%0\n\t"
-                 "dbra  %2,1b\n\t"
-                 "movel %0,%3\n\t"
-                 "swap  %3\n\t"
-                 "addxw %3,%0\n\t"
-                 "clrw  %3\n\t"
-                 "addxw %3,%0\n\t"
-                 : "=d" (sum), "=&a" (iph), "=&d" (ihl), "=&d" (tmp)
-                 : "0" (sum), "1" (iph), "2" (ihl)
-                 : "memory");
-        return (__force __sum16)~sum;
-}
-
-/*
- *      Fold a partial checksum
- */
-
-static inline __sum16 csum_fold(__wsum sum)
-{
-        unsigned int tmp = (__force u32)sum;
-        __asm__("swap %1\n\t"
-                "addw %1, %0\n\t"
-                "clrw %1\n\t"
-                "addxw %1, %0"
-                : "=&d" (sum), "=&d" (tmp)
-                : "0" (sum), "1" (tmp));
-        return (__force __sum16)~sum;
-}
-
-
-static inline __wsum
-csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
-                  unsigned short proto, __wsum sum)
-{
-        __asm__ ("addl  %2,%0\n\t"
-                 "addxl %3,%0\n\t"
-                 "addxl %4,%0\n\t"
-                 "clrl %1\n\t"
-                 "addxl %1,%0"
-                 : "=&d" (sum), "=d" (saddr)
-                 : "g" (daddr), "1" (saddr), "d" (len + proto),
-                   "0" (sum));
-        return sum;
-}
-
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-static inline __sum16
-csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
-                  unsigned short proto, __wsum sum)
-{
-        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-
-static inline __sum16 ip_compute_csum(const void *buff, int len)
-{
-        return csum_fold (csum_partial(buff, len, 0));
-}
-
-#define _HAVE_ARCH_IPV6_CSUM
-static __inline__ __sum16
-csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
-                __u32 len, unsigned short proto, __wsum sum)
-{
-        register unsigned long tmp;
-        __asm__("addl %2@,%0\n\t"
-                "movel %2@(4),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %2@(8),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %2@(12),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@,%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@(4),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@(8),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@(12),%1\n\t"
-                "addxl %1,%0\n\t"
-                "addxl %4,%0\n\t"
-                "clrl %1\n\t"
-                "addxl %1,%0"
-                : "=&d" (sum), "=&d" (tmp)
-                : "a" (saddr), "a" (daddr), "d" (len + proto),
-                  "0" (sum));
-
-        return csum_fold(sum);
-}
-
-#endif /* _M68K_CHECKSUM_H */
diff --git a/arch/m68k/include/asm/checksum_no.h b/arch/m68k/include/asm/checksum_no.h
deleted file mode 100644
index 81883482ffb1..000000000000
--- a/arch/m68k/include/asm/checksum_no.h
+++ /dev/null
@@ -1,132 +0,0 @@
-#ifndef _M68K_CHECKSUM_H
-#define _M68K_CHECKSUM_H
-
-#include <linux/in6.h>
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum sum);
-
-/*
- * the same as csum_partial, but copies from src while it
- * checksums
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-
-__wsum csum_partial_copy_nocheck(const void *src, void *dst,
-        int len, __wsum sum);
-
-
-/*
- * the same as csum_partial_copy, but copies from user space.
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-
-extern __wsum csum_partial_copy_from_user(const void __user *src,
-        void *dst, int len, __wsum sum, int *csum_err);
-
-__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
-
-/*
- *      Fold a partial checksum
- */
-
-static inline __sum16 csum_fold(__wsum sum)
-{
-        unsigned int tmp = (__force u32)sum;
-#ifdef CONFIG_COLDFIRE
-        tmp = (tmp & 0xffff) + (tmp >> 16);
-        tmp = (tmp & 0xffff) + (tmp >> 16);
-        return (__force __sum16)~tmp;
-#else
-        __asm__("swap %1\n\t"
-                "addw %1, %0\n\t"
-                "clrw %1\n\t"
-                "addxw %1, %0"
-                : "=&d" (sum), "=&d" (tmp)
-                : "0" (sum), "1" (sum));
-        return (__force __sum16)~sum;
-#endif
-}
-
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-
-static inline __wsum
-csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
-                  unsigned short proto, __wsum sum)
-{
-        __asm__ ("addl  %1,%0\n\t"
-                 "addxl %4,%0\n\t"
-                 "addxl %5,%0\n\t"
-                 "clrl %1\n\t"
-                 "addxl %1,%0"
-                 : "=&d" (sum), "=&d" (saddr)
-                 : "0" (daddr), "1" (saddr), "d" (len + proto),
-                   "d"(sum));
-        return sum;
-}
-
-static inline __sum16
-csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
-                  unsigned short proto, __wsum sum)
-{
-        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-
-extern __sum16 ip_compute_csum(const void *buff, int len);
-
-#define _HAVE_ARCH_IPV6_CSUM
-static __inline__ __sum16
-csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr,
-                __u32 len, unsigned short proto, __wsum sum)
-{
-        register unsigned long tmp;
-        __asm__("addl %2@,%0\n\t"
-                "movel %2@(4),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %2@(8),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %2@(12),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@,%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@(4),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@(8),%1\n\t"
-                "addxl %1,%0\n\t"
-                "movel %3@(12),%1\n\t"
-                "addxl %1,%0\n\t"
-                "addxl %4,%0\n\t"
-                "clrl %1\n\t"
-                "addxl %1,%0"
-                : "=&d" (sum), "=&d" (tmp)
-                : "a" (saddr), "a" (daddr), "d" (len + proto),
-                  "0" (sum));
-
-        return csum_fold(sum);
-}
-
-#endif /* _M68K_CHECKSUM_H */
diff --git a/arch/m68k/include/asm/dma.h b/arch/m68k/include/asm/dma.h
index b82e660cf1c2..6fbdfe895104 100644
--- a/arch/m68k/include/asm/dma.h
+++ b/arch/m68k/include/asm/dma.h
@@ -1,5 +1,491 @@
-#ifdef __uClinux__
-#include "dma_no.h"
+#ifndef _M68K_DMA_H
+#define _M68K_DMA_H 1
+
+#ifdef CONFIG_COLDFIRE
+/*
+ * ColdFire DMA Model:
+ *   ColdFire DMA supports two forms of DMA: Single and Dual address. Single
+ * address mode emits a source address, and expects that the device will either
+ * pick up the data (DMA READ) or source data (DMA WRITE). This implies that
+ * the device will place data on the correct byte(s) of the data bus, as the
+ * memory transactions are always 32 bits. This implies that only 32 bit
+ * devices will find single mode transfers useful. Dual address DMA mode
+ * performs two cycles: source read and destination write. ColdFire will
+ * align the data so that the device will always get the correct bytes, thus
+ * is useful for 8 and 16 bit devices. This is the mode that is supported
+ * below.
+ *
+ * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000
+ *               Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
+ *
+ * AUG/25/2000 : addad support for 8, 16 and 32-bit Single-Address-Mode (K)2000
+ *               Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
+ *
+ * APR/18/2002 : added proper support for MCF5272 DMA controller.
+ *               Arthur Shipkowski (art@videon-central.com)
+ */
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfdma.h>
+
+/*
+ * Set number of channels of DMA on ColdFire for different implementations.
+ */
+#if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \
+        defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
+#define MAX_M68K_DMA_CHANNELS 4
+#elif defined(CONFIG_M5272)
+#define MAX_M68K_DMA_CHANNELS 1
+#elif defined(CONFIG_M532x)
+#define MAX_M68K_DMA_CHANNELS 0
 #else
-#include "dma_mm.h"
+#define MAX_M68K_DMA_CHANNELS 2
 #endif
+
+extern unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS];
+extern unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
+
+#if !defined(CONFIG_M5272)
+#define DMA_MODE_WRITE_BIT  0x01  /* Memory/IO to IO/Memory select */
+#define DMA_MODE_WORD_BIT   0x02  /* 8 or 16 bit transfers */
+#define DMA_MODE_LONG_BIT   0x04  /* or 32 bit transfers */
+#define DMA_MODE_SINGLE_BIT 0x08  /* single-address-mode */
+
+/* I/O to memory, 8 bits, mode */
+#define DMA_MODE_READ               0
+/* memory to I/O, 8 bits, mode */
+#define DMA_MODE_WRITE              1
+/* I/O to memory, 16 bits, mode */
+#define DMA_MODE_READ_WORD          2
+/* memory to I/O, 16 bits, mode */
+#define DMA_MODE_WRITE_WORD         3
+/* I/O to memory, 32 bits, mode */
+#define DMA_MODE_READ_LONG          4
+/* memory to I/O, 32 bits, mode */
+#define DMA_MODE_WRITE_LONG         5
+/* I/O to memory, 8 bits, single-address-mode */
+#define DMA_MODE_READ_SINGLE        8
+/* memory to I/O, 8 bits, single-address-mode */
+#define DMA_MODE_WRITE_SINGLE       9
+/* I/O to memory, 16 bits, single-address-mode */
+#define DMA_MODE_READ_WORD_SINGLE  10
+/* memory to I/O, 16 bits, single-address-mode */
+#define DMA_MODE_WRITE_WORD_SINGLE 11
+/* I/O to memory, 32 bits, single-address-mode */
+#define DMA_MODE_READ_LONG_SINGLE  12
+/* memory to I/O, 32 bits, single-address-mode */
+#define DMA_MODE_WRITE_LONG_SINGLE 13
+
+#else /* CONFIG_M5272 is defined */
+
+/* Source static-address mode */
+#define DMA_MODE_SRC_SA_BIT 0x01
+/* Two bits to select between all four modes */
+#define DMA_MODE_SSIZE_MASK 0x06
+/* Offset to shift bits in */
+#define DMA_MODE_SSIZE_OFF  0x01
+/* Destination static-address mode */
+#define DMA_MODE_DES_SA_BIT 0x10
+/* Two bits to select between all four modes */
+#define DMA_MODE_DSIZE_MASK 0x60
+/* Offset to shift bits in */
+#define DMA_MODE_DSIZE_OFF  0x05
+/* Size modifiers */
+#define DMA_MODE_SIZE_LONG  0x00
+#define DMA_MODE_SIZE_BYTE  0x01
+#define DMA_MODE_SIZE_WORD  0x02
+#define DMA_MODE_SIZE_LINE  0x03
+
+/*
+ * Aliases to help speed quick ports; these may be suboptimal, however. They
+ * do not include the SINGLE mode modifiers since the MCF5272 does not have a
+ * mode where the device is in control of its addressing.
+ */
+
+/* I/O to memory, 8 bits, mode */
+#define DMA_MODE_READ                 ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
+/* memory to I/O, 8 bits, mode */
+#define DMA_MODE_WRITE              ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
+/* I/O to memory, 16 bits, mode */
+#define DMA_MODE_READ_WORD              ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
+/* memory to I/O, 16 bits, mode */
+#define DMA_MODE_WRITE_WORD         ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
+/* I/O to memory, 32 bits, mode */
+#define DMA_MODE_READ_LONG              ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
+/* memory to I/O, 32 bits, mode */
+#define DMA_MODE_WRITE_LONG         ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
+
+#endif /* !defined(CONFIG_M5272) */
+
+#if !defined(CONFIG_M5272)
+/* enable/disable a specific DMA channel */
+static __inline__ void enable_dma(unsigned int dmanr)
+{
+  volatile unsigned short *dmawp;
+
+#ifdef DMA_DEBUG
+  printk("enable_dma(dmanr=%d)\n", dmanr);
+#endif
+
+  dmawp = (unsigned short *) dma_base_addr[dmanr];
+  dmawp[MCFDMA_DCR] |= MCFDMA_DCR_EEXT;
+}
+
+static __inline__ void disable_dma(unsigned int dmanr)
+{
+  volatile unsigned short *dmawp;
+  volatile unsigned char  *dmapb;
+
+#ifdef DMA_DEBUG
+  printk("disable_dma(dmanr=%d)\n", dmanr);
+#endif
+
+  dmawp = (unsigned short *) dma_base_addr[dmanr];
+  dmapb = (unsigned char *) dma_base_addr[dmanr];
+
+  /* Turn off external requests, and stop any DMA in progress */
+  dmawp[MCFDMA_DCR] &= ~MCFDMA_DCR_EEXT;
+  dmapb[MCFDMA_DSR] = MCFDMA_DSR_DONE;
+}
+
+/*
+ * Clear the 'DMA Pointer Flip Flop'.
+ * Write 0 for LSB/MSB, 1 for MSB/LSB access.
+ * Use this once to initialize the FF to a known state.
+ * After that, keep track of it. :-)
+ * --- In order to do that, the DMA routines below should ---
+ * --- only be used while interrupts are disabled! ---
+ *
+ * This is a NOP for ColdFire. Provide a stub for compatibility.
+ */
+static __inline__ void clear_dma_ff(unsigned int dmanr)
+{
+}
+
+/* set mode (above) for a specific DMA channel */
+static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
+{
+
+  volatile unsigned char  *dmabp;
+  volatile unsigned short *dmawp;
+
+#ifdef DMA_DEBUG
+  printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
+#endif
+
+  dmabp = (unsigned char *) dma_base_addr[dmanr];
+  dmawp = (unsigned short *) dma_base_addr[dmanr];
+
+  /* Clear config errors */
+  dmabp[MCFDMA_DSR] = MCFDMA_DSR_DONE;
+
+  /* Set command register */
+  dmawp[MCFDMA_DCR] =
+    MCFDMA_DCR_INT |         /* Enable completion irq */
+    MCFDMA_DCR_CS |          /* Force one xfer per request */
+    MCFDMA_DCR_AA |          /* Enable auto alignment */
+    /* single-address-mode */
+    ((mode & DMA_MODE_SINGLE_BIT) ? MCFDMA_DCR_SAA : 0) |
+    /* sets s_rw (-> r/w) high if Memory to I/0 */
+    ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_S_RW : 0) |
+    /* Memory to I/O or I/O to Memory */
+    ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_SINC : MCFDMA_DCR_DINC) |
+    /* 32 bit, 16 bit or 8 bit transfers */
+    ((mode & DMA_MODE_WORD_BIT)  ? MCFDMA_DCR_SSIZE_WORD :
+     ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_SSIZE_LONG :
+                                   MCFDMA_DCR_SSIZE_BYTE)) |
+    ((mode & DMA_MODE_WORD_BIT)  ? MCFDMA_DCR_DSIZE_WORD :
+     ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_DSIZE_LONG :
+                                   MCFDMA_DCR_DSIZE_BYTE));
+
+#ifdef DEBUG_DMA
+  printk("%s(%d): dmanr=%d DSR[%x]=%x DCR[%x]=%x\n", __FILE__, __LINE__,
+         dmanr, (int) &dmabp[MCFDMA_DSR], dmabp[MCFDMA_DSR],
+         (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR]);
+#endif
+}
+
+/* Set transfer address for specific DMA channel */
+static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
+{
+  volatile unsigned short *dmawp;
+  volatile unsigned int   *dmalp;
+
+#ifdef DMA_DEBUG
+  printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
+#endif
+
+  dmawp = (unsigned short *) dma_base_addr[dmanr];
+  dmalp = (unsigned int *) dma_base_addr[dmanr];
+
+  /* Determine which address registers are used for memory/device accesses */
+  if (dmawp[MCFDMA_DCR] & MCFDMA_DCR_SINC) {
+    /* Source incrementing, must be memory */
+    dmalp[MCFDMA_SAR] = a;
+    /* Set dest address, must be device */
+    dmalp[MCFDMA_DAR] = dma_device_address[dmanr];
+  } else {
+    /* Destination incrementing, must be memory */
+    dmalp[MCFDMA_DAR] = a;
+    /* Set source address, must be device */
+    dmalp[MCFDMA_SAR] = dma_device_address[dmanr];
+  }
+
+#ifdef DEBUG_DMA
+  printk("%s(%d): dmanr=%d DCR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
+        __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR],
+        (int) &dmalp[MCFDMA_SAR], dmalp[MCFDMA_SAR],
+        (int) &dmalp[MCFDMA_DAR], dmalp[MCFDMA_DAR]);
+#endif
+}
+
+/*
+ * Specific for Coldfire - sets device address.
+ * Should be called after the mode set call, and before set DMA address.
+ */
+static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
+{
+#ifdef DMA_DEBUG
+  printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
+#endif
+
+  dma_device_address[dmanr] = a;
+}
+
+/*
+ * NOTE 2: "count" represents _bytes_.
+ */
+static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
+{
+  volatile unsigned short *dmawp;
+
+#ifdef DMA_DEBUG
+  printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
+#endif
+
+  dmawp = (unsigned short *) dma_base_addr[dmanr];
+  dmawp[MCFDMA_BCR] = (unsigned short)count;
+}
+
+/*
+ * Get DMA residue count. After a DMA transfer, this
+ * should return zero. Reading this while a DMA transfer is
+ * still in progress will return unpredictable results.
+ * Otherwise, it returns the number of _bytes_ left to transfer.
+ */
+static __inline__ int get_dma_residue(unsigned int dmanr)
+{
+  volatile unsigned short *dmawp;
+  unsigned short count;
+
+#ifdef DMA_DEBUG
+  printk("get_dma_residue(dmanr=%d)\n", dmanr);
+#endif
+
+  dmawp = (unsigned short *) dma_base_addr[dmanr];
+  count = dmawp[MCFDMA_BCR];
+  return((int) count);
+}
+#else /* CONFIG_M5272 is defined */
+
+/*
+ * The MCF5272 DMA controller is very different than the controller defined above
+ * in terms of register mapping.  For instance, with the exception of the 16-bit
+ * interrupt register (IRQ#85, for reference), all of the registers are 32-bit.
+ *
+ * The big difference, however, is the lack of device-requested DMA.  All modes
+ * are dual address transfer, and there is no 'device' setup or direction bit.
+ * You can DMA between a device and memory, between memory and memory, or even between
+ * two devices directly, with any combination of incrementing and non-incrementing
+ * addresses you choose.  This puts a crimp in distinguishing between the 'device
+ * address' set up by set_dma_device_addr.
+ *
+ * Therefore, there are two options.  One is to use set_dma_addr and set_dma_device_addr,
+ * which will act exactly as above in -- it will look to see if the source is set to
+ * autoincrement, and if so it will make the source use the set_dma_addr value and the
+ * destination the set_dma_device_addr value.  Otherwise the source will be set to the
+ * set_dma_device_addr value and the destination will get the set_dma_addr value.
+ *
+ * The other is to use the provided set_dma_src_addr and set_dma_dest_addr functions
+ * and make it explicit.  Depending on what you're doing, one of these two should work
+ * for you, but don't mix them in the same transfer setup.
+ */
+
+/* enable/disable a specific DMA channel */
+static __inline__ void enable_dma(unsigned int dmanr)
+{
+  volatile unsigned int  *dmalp;
+
+#ifdef DMA_DEBUG
+  printk("enable_dma(dmanr=%d)\n", dmanr);
+#endif
+
+  dmalp = (unsigned int *) dma_base_addr[dmanr];
+  dmalp[MCFDMA_DMR] |= MCFDMA_DMR_EN;
+}
+
+static __inline__ void disable_dma(unsigned int dmanr)
+{
+  volatile unsigned int   *dmalp;
+
+#ifdef DMA_DEBUG
+  printk("disable_dma(dmanr=%d)\n", dmanr);
+#endif
+
+  dmalp = (unsigned int *) dma_base_addr[dmanr];
+
+  /* Turn off external requests, and stop any DMA in progress */
+  dmalp[MCFDMA_DMR] &= ~MCFDMA_DMR_EN;
+  dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET;
+}
+
+/*
+ * Clear the 'DMA Pointer Flip Flop'.
+ * Write 0 for LSB/MSB, 1 for MSB/LSB access.
+ * Use this once to initialize the FF to a known state.
+ * After that, keep track of it. :-)
+ * --- In order to do that, the DMA routines below should ---
+ * --- only be used while interrupts are disabled! ---
+ *
+ * This is a NOP for ColdFire. Provide a stub for compatibility.
+ */
+static __inline__ void clear_dma_ff(unsigned int dmanr)
+{
+}
+
+/* set mode (above) for a specific DMA channel */
+static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
+{
+
+  volatile unsigned int   *dmalp;
+  volatile unsigned short *dmawp;
+
+#ifdef DMA_DEBUG
+  printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
+#endif
+  dmalp = (unsigned int *) dma_base_addr[dmanr];
+  dmawp = (unsigned short *) dma_base_addr[dmanr];
+
+  /* Clear config errors */
+  dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET;
+
+  /* Set command register */
+  dmalp[MCFDMA_DMR] =
+    MCFDMA_DMR_RQM_DUAL |         /* Mandatory Request Mode setting */
+    MCFDMA_DMR_DSTT_SD  |         /* Set up addressing types; set to supervisor-data. */
+    MCFDMA_DMR_SRCT_SD  |         /* Set up addressing types; set to supervisor-data. */
+    /* source static-address-mode */
+    ((mode & DMA_MODE_SRC_SA_BIT) ? MCFDMA_DMR_SRCM_SA : MCFDMA_DMR_SRCM_IA) |
+    /* dest static-address-mode */
+    ((mode & DMA_MODE_DES_SA_BIT) ? MCFDMA_DMR_DSTM_SA : MCFDMA_DMR_DSTM_IA) |
+    /* burst, 32 bit, 16 bit or 8 bit transfers are separately configurable on the MCF5272 */
+    (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_DSTS_OFF) |
+    (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_SRCS_OFF);
+
+  dmawp[MCFDMA_DIR] |= MCFDMA_DIR_ASCEN;   /* Enable completion interrupts */
+
+#ifdef DEBUG_DMA
+  printk("%s(%d): dmanr=%d DMR[%x]=%x DIR[%x]=%x\n", __FILE__, __LINE__,
+         dmanr, (int) &dmalp[MCFDMA_DMR], dmabp[MCFDMA_DMR],
+         (int) &dmawp[MCFDMA_DIR], dmawp[MCFDMA_DIR]);
+#endif
+}
+
+/* Set transfer address for specific DMA channel */
+static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
+{
+  volatile unsigned int   *dmalp;
+
+#ifdef DMA_DEBUG
+  printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
+#endif
+
+  dmalp = (unsigned int *) dma_base_addr[dmanr];
+
+  /* Determine which address registers are used for memory/device accesses */
+  if (dmalp[MCFDMA_DMR] & MCFDMA_DMR_SRCM) {
+    /* Source incrementing, must be memory */
+    dmalp[MCFDMA_DSAR] = a;
+    /* Set dest address, must be device */
+    dmalp[MCFDMA_DDAR] = dma_device_address[dmanr];
+  } else {
+    /* Destination incrementing, must be memory */
+    dmalp[MCFDMA_DDAR] = a;
+    /* Set source address, must be device */
+    dmalp[MCFDMA_DSAR] = dma_device_address[dmanr];
+  }
+
+#ifdef DEBUG_DMA
+  printk("%s(%d): dmanr=%d DMR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
+        __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DMR], dmawp[MCFDMA_DMR],
+        (int) &dmalp[MCFDMA_DSAR], dmalp[MCFDMA_DSAR],
+        (int) &dmalp[MCFDMA_DDAR], dmalp[MCFDMA_DDAR]);
+#endif
+}
+
+/*
+ * Specific for Coldfire - sets device address.
+ * Should be called after the mode set call, and before set DMA address.
+ */
+static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
+{
+#ifdef DMA_DEBUG
+  printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
+#endif
+
+  dma_device_address[dmanr] = a;
+}
+
+/*
+ * NOTE 2: "count" represents _bytes_.
+ *
+ * NOTE 3: While a 32-bit register, "count" is only a maximum 24-bit value.
+ */
+static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
+{
+  volatile unsigned int *dmalp;
+
+#ifdef DMA_DEBUG
+  printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
+#endif
+
+  dmalp = (unsigned int *) dma_base_addr[dmanr];
+  dmalp[MCFDMA_DBCR] = count;
+}
+
+/*
+ * Get DMA residue count. After a DMA transfer, this
+ * should return zero. Reading this while a DMA transfer is
+ * still in progress will return unpredictable results.
+ * Otherwise, it returns the number of _bytes_ left to transfer.
+ */
+static __inline__ int get_dma_residue(unsigned int dmanr)
+{
+  volatile unsigned int *dmalp;
+  unsigned int count;
+
+#ifdef DMA_DEBUG
+  printk("get_dma_residue(dmanr=%d)\n", dmanr);
+#endif
+
+  dmalp = (unsigned int *) dma_base_addr[dmanr];
+  count = dmalp[MCFDMA_DBCR];
+  return(count);
+}
+
+#endif /* !defined(CONFIG_M5272) */
+#endif /* CONFIG_COLDFIRE */
+
+/* it's useless on the m68k, but unfortunately needed by the new
+   bootmem allocator (but this should do it for this) */
+#define MAX_DMA_ADDRESS PAGE_OFFSET
+
+#define MAX_DMA_CHANNELS 8
+
+extern int request_dma(unsigned int dmanr, const char * device_id);     /* reserve a DMA channel */
+extern void free_dma(unsigned int dmanr);       /* release it again */
+
+#define isa_dma_bridge_buggy    (0)
+
+#endif /* _M68K_DMA_H */
diff --git a/arch/m68k/include/asm/dma_mm.h b/arch/m68k/include/asm/dma_mm.h
deleted file mode 100644
index 4240fbc946f8..000000000000
--- a/arch/m68k/include/asm/dma_mm.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef _M68K_DMA_H
-#define _M68K_DMA_H 1
-
-
-/* it's useless on the m68k, but unfortunately needed by the new
-   bootmem allocator (but this should do it for this) */
-#define MAX_DMA_ADDRESS PAGE_OFFSET
-
-#define MAX_DMA_CHANNELS 8
-
-extern int request_dma(unsigned int dmanr, const char * device_id);     /* reserve a DMA channel */
-extern void free_dma(unsigned int dmanr);       /* release it again */
-
-#define isa_dma_bridge_buggy    (0)
-
-#endif /* _M68K_DMA_H */
diff --git a/arch/m68k/include/asm/dma_no.h b/arch/m68k/include/asm/dma_no.h
deleted file mode 100644
index 939a02056217..000000000000
--- a/arch/m68k/include/asm/dma_no.h
+++ /dev/null
@@ -1,494 +0,0 @@
-#ifndef _M68K_DMA_H
-#define _M68K_DMA_H 1
- 
-//#define       DMA_DEBUG       1
-
-
-#ifdef CONFIG_COLDFIRE
-/*
- * ColdFire DMA Model:
- *   ColdFire DMA supports two forms of DMA: Single and Dual address. Single
- * address mode emits a source address, and expects that the device will either
- * pick up the data (DMA READ) or source data (DMA WRITE). This implies that
- * the device will place data on the correct byte(s) of the data bus, as the
- * memory transactions are always 32 bits. This implies that only 32 bit
- * devices will find single mode transfers useful. Dual address DMA mode
- * performs two cycles: source read and destination write. ColdFire will
- * align the data so that the device will always get the correct bytes, thus
- * is useful for 8 and 16 bit devices. This is the mode that is supported
- * below.
- *
- * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000 
- *               Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
- *
- * AUG/25/2000 : addad support for 8, 16 and 32-bit Single-Address-Mode (K)2000
- *               Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
- *
- * APR/18/2002 : added proper support for MCF5272 DMA controller.
- *               Arthur Shipkowski (art@videon-central.com)
- */
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfdma.h>
-
-/*
- * Set number of channels of DMA on ColdFire for different implementations.
- */
-#if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \
-        defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
-#define MAX_M68K_DMA_CHANNELS 4
-#elif defined(CONFIG_M5272)
-#define MAX_M68K_DMA_CHANNELS 1
-#elif defined(CONFIG_M532x)
-#define MAX_M68K_DMA_CHANNELS 0
-#else
-#define MAX_M68K_DMA_CHANNELS 2
-#endif
-
-extern unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS];
-extern unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
-
-#if !defined(CONFIG_M5272)
-#define DMA_MODE_WRITE_BIT  0x01  /* Memory/IO to IO/Memory select */
-#define DMA_MODE_WORD_BIT   0x02  /* 8 or 16 bit transfers */
-#define DMA_MODE_LONG_BIT   0x04  /* or 32 bit transfers */
-#define DMA_MODE_SINGLE_BIT 0x08  /* single-address-mode */
-
-/* I/O to memory, 8 bits, mode */
-#define DMA_MODE_READ               0
-/* memory to I/O, 8 bits, mode */
-#define DMA_MODE_WRITE              1
-/* I/O to memory, 16 bits, mode */
-#define DMA_MODE_READ_WORD          2
-/* memory to I/O, 16 bits, mode */
-#define DMA_MODE_WRITE_WORD         3
-/* I/O to memory, 32 bits, mode */
-#define DMA_MODE_READ_LONG          4
-/* memory to I/O, 32 bits, mode */
-#define DMA_MODE_WRITE_LONG         5
-/* I/O to memory, 8 bits, single-address-mode */     
-#define DMA_MODE_READ_SINGLE        8
-/* memory to I/O, 8 bits, single-address-mode */
-#define DMA_MODE_WRITE_SINGLE       9
-/* I/O to memory, 16 bits, single-address-mode */
-#define DMA_MODE_READ_WORD_SINGLE  10
-/* memory to I/O, 16 bits, single-address-mode */
-#define DMA_MODE_WRITE_WORD_SINGLE 11
-/* I/O to memory, 32 bits, single-address-mode */
-#define DMA_MODE_READ_LONG_SINGLE  12
-/* memory to I/O, 32 bits, single-address-mode */
-#define DMA_MODE_WRITE_LONG_SINGLE 13
-
-#else /* CONFIG_M5272 is defined */
-
-/* Source static-address mode */
-#define DMA_MODE_SRC_SA_BIT 0x01  
-/* Two bits to select between all four modes */
-#define DMA_MODE_SSIZE_MASK 0x06 
-/* Offset to shift bits in */
-#define DMA_MODE_SSIZE_OFF  0x01  
-/* Destination static-address mode */
-#define DMA_MODE_DES_SA_BIT 0x10  
-/* Two bits to select between all four modes */
-#define DMA_MODE_DSIZE_MASK 0x60  
-/* Offset to shift bits in */
-#define DMA_MODE_DSIZE_OFF  0x05
-/* Size modifiers */
-#define DMA_MODE_SIZE_LONG  0x00
-#define DMA_MODE_SIZE_BYTE  0x01
-#define DMA_MODE_SIZE_WORD  0x02
-#define DMA_MODE_SIZE_LINE  0x03
-
-/* 
- * Aliases to help speed quick ports; these may be suboptimal, however. They
- * do not include the SINGLE mode modifiers since the MCF5272 does not have a
- * mode where the device is in control of its addressing.
- */
-
-/* I/O to memory, 8 bits, mode */
-#define DMA_MODE_READ                 ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
-/* memory to I/O, 8 bits, mode */
-#define DMA_MODE_WRITE              ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
-/* I/O to memory, 16 bits, mode */
-#define DMA_MODE_READ_WORD              ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
-/* memory to I/O, 16 bits, mode */
-#define DMA_MODE_WRITE_WORD         ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
-/* I/O to memory, 32 bits, mode */
-#define DMA_MODE_READ_LONG              ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
-/* memory to I/O, 32 bits, mode */
-#define DMA_MODE_WRITE_LONG         ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
-
-#endif /* !defined(CONFIG_M5272) */
-
-#if !defined(CONFIG_M5272)
-/* enable/disable a specific DMA channel */
-static __inline__ void enable_dma(unsigned int dmanr)
-{
-  volatile unsigned short *dmawp;
-
-#ifdef DMA_DEBUG
-  printk("enable_dma(dmanr=%d)\n", dmanr);
-#endif
-
-  dmawp = (unsigned short *) dma_base_addr[dmanr];
-  dmawp[MCFDMA_DCR] |= MCFDMA_DCR_EEXT;
-}
-
-static __inline__ void disable_dma(unsigned int dmanr)
-{
-  volatile unsigned short *dmawp;
-  volatile unsigned char  *dmapb;
-
-#ifdef DMA_DEBUG
-  printk("disable_dma(dmanr=%d)\n", dmanr);
-#endif
-
-  dmawp = (unsigned short *) dma_base_addr[dmanr];
-  dmapb = (unsigned char *) dma_base_addr[dmanr];
-
-  /* Turn off external requests, and stop any DMA in progress */
-  dmawp[MCFDMA_DCR] &= ~MCFDMA_DCR_EEXT;
-  dmapb[MCFDMA_DSR] = MCFDMA_DSR_DONE;
-}
-
-/*
- * Clear the 'DMA Pointer Flip Flop'.
- * Write 0 for LSB/MSB, 1 for MSB/LSB access.
- * Use this once to initialize the FF to a known state.
- * After that, keep track of it. :-)
- * --- In order to do that, the DMA routines below should ---
- * --- only be used while interrupts are disabled! ---
- *
- * This is a NOP for ColdFire. Provide a stub for compatibility.
- */
-static __inline__ void clear_dma_ff(unsigned int dmanr)
-{
-}
-
-/* set mode (above) for a specific DMA channel */
-static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
-{
-
-  volatile unsigned char  *dmabp;
-  volatile unsigned short *dmawp;
-
-#ifdef DMA_DEBUG
-  printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
-#endif
-
-  dmabp = (unsigned char *) dma_base_addr[dmanr];
-  dmawp = (unsigned short *) dma_base_addr[dmanr];
-
-  // Clear config errors
-  dmabp[MCFDMA_DSR] = MCFDMA_DSR_DONE; 
-
-  // Set command register
-  dmawp[MCFDMA_DCR] =
-    MCFDMA_DCR_INT |         // Enable completion irq
-    MCFDMA_DCR_CS |          // Force one xfer per request
-    MCFDMA_DCR_AA |          // Enable auto alignment
-    // single-address-mode
-    ((mode & DMA_MODE_SINGLE_BIT) ? MCFDMA_DCR_SAA : 0) |
-    // sets s_rw (-> r/w) high if Memory to I/0
-    ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_S_RW : 0) |
-    // Memory to I/O or I/O to Memory
-    ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_SINC : MCFDMA_DCR_DINC) |
-    // 32 bit, 16 bit or 8 bit transfers
-    ((mode & DMA_MODE_WORD_BIT)  ? MCFDMA_DCR_SSIZE_WORD : 
-     ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_SSIZE_LONG :
-                                   MCFDMA_DCR_SSIZE_BYTE)) |
-    ((mode & DMA_MODE_WORD_BIT)  ? MCFDMA_DCR_DSIZE_WORD :
-     ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_DSIZE_LONG :
-                                   MCFDMA_DCR_DSIZE_BYTE));
-
-#ifdef DEBUG_DMA
-  printk("%s(%d): dmanr=%d DSR[%x]=%x DCR[%x]=%x\n", __FILE__, __LINE__,
-         dmanr, (int) &dmabp[MCFDMA_DSR], dmabp[MCFDMA_DSR],
-         (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR]);
-#endif
-}
-
-/* Set transfer address for specific DMA channel */
-static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
-{
-  volatile unsigned short *dmawp;
-  volatile unsigned int   *dmalp;
-
-#ifdef DMA_DEBUG
-  printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
-#endif
-
-  dmawp = (unsigned short *) dma_base_addr[dmanr];
-  dmalp = (unsigned int *) dma_base_addr[dmanr];
-
-  // Determine which address registers are used for memory/device accesses
-  if (dmawp[MCFDMA_DCR] & MCFDMA_DCR_SINC) {
-    // Source incrementing, must be memory
-    dmalp[MCFDMA_SAR] = a;
-    // Set dest address, must be device
-    dmalp[MCFDMA_DAR] = dma_device_address[dmanr];
-  } else {
-    // Destination incrementing, must be memory
-    dmalp[MCFDMA_DAR] = a;
-    // Set source address, must be device
-    dmalp[MCFDMA_SAR] = dma_device_address[dmanr];
-  }
-
-#ifdef DEBUG_DMA
-  printk("%s(%d): dmanr=%d DCR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
-        __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR],
-        (int) &dmalp[MCFDMA_SAR], dmalp[MCFDMA_SAR],
-        (int) &dmalp[MCFDMA_DAR], dmalp[MCFDMA_DAR]);
-#endif
-}
-
-/*
- * Specific for Coldfire - sets device address.
- * Should be called after the mode set call, and before set DMA address.
- */
-static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
-{
-#ifdef DMA_DEBUG
-  printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
-#endif
-
-  dma_device_address[dmanr] = a;
-}
-
-/*
- * NOTE 2: "count" represents _bytes_.
- */
-static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
-{
-  volatile unsigned short *dmawp;
-
-#ifdef DMA_DEBUG
-  printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
-#endif
-
-  dmawp = (unsigned short *) dma_base_addr[dmanr];
-  dmawp[MCFDMA_BCR] = (unsigned short)count;
-}
-
-/*
- * Get DMA residue count. After a DMA transfer, this
- * should return zero. Reading this while a DMA transfer is
- * still in progress will return unpredictable results.
- * Otherwise, it returns the number of _bytes_ left to transfer.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
-  volatile unsigned short *dmawp;
-  unsigned short count;
-
-#ifdef DMA_DEBUG
-  printk("get_dma_residue(dmanr=%d)\n", dmanr);
-#endif
-
-  dmawp = (unsigned short *) dma_base_addr[dmanr];
-  count = dmawp[MCFDMA_BCR];
-  return((int) count);
-}
-#else /* CONFIG_M5272 is defined */
-
-/*
- * The MCF5272 DMA controller is very different than the controller defined above
- * in terms of register mapping.  For instance, with the exception of the 16-bit 
- * interrupt register (IRQ#85, for reference), all of the registers are 32-bit.
- *
- * The big difference, however, is the lack of device-requested DMA.  All modes
- * are dual address transfer, and there is no 'device' setup or direction bit.
- * You can DMA between a device and memory, between memory and memory, or even between
- * two devices directly, with any combination of incrementing and non-incrementing
- * addresses you choose.  This puts a crimp in distinguishing between the 'device 
- * address' set up by set_dma_device_addr.
- *
- * Therefore, there are two options.  One is to use set_dma_addr and set_dma_device_addr,
- * which will act exactly as above in -- it will look to see if the source is set to
- * autoincrement, and if so it will make the source use the set_dma_addr value and the
- * destination the set_dma_device_addr value.  Otherwise the source will be set to the
- * set_dma_device_addr value and the destination will get the set_dma_addr value.
- *
- * The other is to use the provided set_dma_src_addr and set_dma_dest_addr functions
- * and make it explicit.  Depending on what you're doing, one of these two should work
- * for you, but don't mix them in the same transfer setup.
- */
-
-/* enable/disable a specific DMA channel */
-static __inline__ void enable_dma(unsigned int dmanr)
-{
-  volatile unsigned int  *dmalp;
-
-#ifdef DMA_DEBUG
-  printk("enable_dma(dmanr=%d)\n", dmanr);
-#endif
-
-  dmalp = (unsigned int *) dma_base_addr[dmanr];
-  dmalp[MCFDMA_DMR] |= MCFDMA_DMR_EN;
-}
-
-static __inline__ void disable_dma(unsigned int dmanr)
-{
-  volatile unsigned int   *dmalp;
-
-#ifdef DMA_DEBUG
-  printk("disable_dma(dmanr=%d)\n", dmanr);
-#endif
-
-  dmalp = (unsigned int *) dma_base_addr[dmanr];
-
-  /* Turn off external requests, and stop any DMA in progress */
-  dmalp[MCFDMA_DMR] &= ~MCFDMA_DMR_EN;
-  dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET;
-}
-
-/*
- * Clear the 'DMA Pointer Flip Flop'.
- * Write 0 for LSB/MSB, 1 for MSB/LSB access.
- * Use this once to initialize the FF to a known state.
- * After that, keep track of it. :-)
- * --- In order to do that, the DMA routines below should ---
- * --- only be used while interrupts are disabled! ---
- *
- * This is a NOP for ColdFire. Provide a stub for compatibility.
- */
-static __inline__ void clear_dma_ff(unsigned int dmanr)
-{
-}
-
-/* set mode (above) for a specific DMA channel */
-static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
-{
-
-  volatile unsigned int   *dmalp;
-  volatile unsigned short *dmawp;
-
-#ifdef DMA_DEBUG
-  printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
-#endif
-  dmalp = (unsigned int *) dma_base_addr[dmanr];
-  dmawp = (unsigned short *) dma_base_addr[dmanr];
-
-  // Clear config errors
-  dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET; 
-
-  // Set command register
-  dmalp[MCFDMA_DMR] =
-    MCFDMA_DMR_RQM_DUAL |         // Mandatory Request Mode setting
-    MCFDMA_DMR_DSTT_SD  |         // Set up addressing types; set to supervisor-data.
-    MCFDMA_DMR_SRCT_SD  |         // Set up addressing types; set to supervisor-data. 
-    // source static-address-mode
-    ((mode & DMA_MODE_SRC_SA_BIT) ? MCFDMA_DMR_SRCM_SA : MCFDMA_DMR_SRCM_IA) |
-    // dest static-address-mode
-    ((mode & DMA_MODE_DES_SA_BIT) ? MCFDMA_DMR_DSTM_SA : MCFDMA_DMR_DSTM_IA) |
-    // burst, 32 bit, 16 bit or 8 bit transfers are separately configurable on the MCF5272
-    (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_DSTS_OFF) |
-    (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_SRCS_OFF);
-    
-  dmawp[MCFDMA_DIR] |= MCFDMA_DIR_ASCEN;   /* Enable completion interrupts */
-  
-#ifdef DEBUG_DMA
-  printk("%s(%d): dmanr=%d DMR[%x]=%x DIR[%x]=%x\n", __FILE__, __LINE__,
-         dmanr, (int) &dmalp[MCFDMA_DMR], dmabp[MCFDMA_DMR],
-         (int) &dmawp[MCFDMA_DIR], dmawp[MCFDMA_DIR]);
-#endif
-}
-
-/* Set transfer address for specific DMA channel */
-static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
-{
-  volatile unsigned int   *dmalp;
-
-#ifdef DMA_DEBUG
-  printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
-#endif
-
-  dmalp = (unsigned int *) dma_base_addr[dmanr];
-
-  // Determine which address registers are used for memory/device accesses
-  if (dmalp[MCFDMA_DMR] & MCFDMA_DMR_SRCM) {
-    // Source incrementing, must be memory
-    dmalp[MCFDMA_DSAR] = a;
-    // Set dest address, must be device
-    dmalp[MCFDMA_DDAR] = dma_device_address[dmanr];
-  } else {
-    // Destination incrementing, must be memory
-    dmalp[MCFDMA_DDAR] = a;
-    // Set source address, must be device
-    dmalp[MCFDMA_DSAR] = dma_device_address[dmanr];
-  }
-
-#ifdef DEBUG_DMA
-  printk("%s(%d): dmanr=%d DMR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
-        __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DMR], dmawp[MCFDMA_DMR],
-        (int) &dmalp[MCFDMA_DSAR], dmalp[MCFDMA_DSAR],
-        (int) &dmalp[MCFDMA_DDAR], dmalp[MCFDMA_DDAR]);
-#endif
-}
-
-/*
- * Specific for Coldfire - sets device address.
- * Should be called after the mode set call, and before set DMA address.
- */
-static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
-{
-#ifdef DMA_DEBUG
-  printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
-#endif
-
-  dma_device_address[dmanr] = a;
-}
-
-/*
- * NOTE 2: "count" represents _bytes_.
- *
- * NOTE 3: While a 32-bit register, "count" is only a maximum 24-bit value.
- */
-static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
-{
-  volatile unsigned int *dmalp;
-  
-#ifdef DMA_DEBUG
-  printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
-#endif
-
-  dmalp = (unsigned int *) dma_base_addr[dmanr];
-  dmalp[MCFDMA_DBCR] = count;
-}
-
-/*
- * Get DMA residue count. After a DMA transfer, this
- * should return zero. Reading this while a DMA transfer is
- * still in progress will return unpredictable results.
- * Otherwise, it returns the number of _bytes_ left to transfer.
- */
-static __inline__ int get_dma_residue(unsigned int dmanr)
-{
-  volatile unsigned int *dmalp;
-  unsigned int count;
-
-#ifdef DMA_DEBUG
-  printk("get_dma_residue(dmanr=%d)\n", dmanr);
-#endif
-
-  dmalp = (unsigned int *) dma_base_addr[dmanr];
-  count = dmalp[MCFDMA_DBCR];
-  return(count);
-}
-
-#endif /* !defined(CONFIG_M5272) */
-#endif /* CONFIG_COLDFIRE */
- 
-#define MAX_DMA_CHANNELS 8
-
-/* Don't define MAX_DMA_ADDRESS; it's useless on the m68k/coldfire and any
-   occurrence should be flagged as an error.  */
-/* under 2.4 it is actually needed by the new bootmem allocator */
-#define MAX_DMA_ADDRESS PAGE_OFFSET
-
-/* These are in kernel/dma.c: */
-extern int request_dma(unsigned int dmanr, const char *device_id);      /* reserve a DMA channel */
-extern void free_dma(unsigned int dmanr);       /* release it again */
- 
-#endif /* _M68K_DMA_H */
diff --git a/arch/m68k/include/asm/elia.h b/arch/m68k/include/asm/elia.h
deleted file mode 100644
index e037d4e2de33..000000000000
--- a/arch/m68k/include/asm/elia.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/****************************************************************************/
-
-/*
- *      elia.h -- Lineo (formerly Moreton Bay) eLIA platform support.
- *
- *      (C) Copyright 1999-2000, Moreton Bay (www.moreton.com.au)
- *      (C) Copyright 1999-2000, Lineo (www.lineo.com)
- */
-
-/****************************************************************************/
-#ifndef elia_h
-#define elia_h
-/****************************************************************************/
-
-#include <asm/coldfire.h>
-
-#ifdef CONFIG_eLIA
-
-/*
- *      The serial port DTR and DCD lines are also on the Parallel I/O
- *      as well, so define those too.
- */
-
-#define eLIA_DCD1               0x0001
-#define eLIA_DCD0               0x0002
-#define eLIA_DTR1               0x0004
-#define eLIA_DTR0               0x0008
-
-#define eLIA_PCIRESET           0x0020
-
-/*
- *      Kernel macros to set and unset the LEDs.
- */
-#ifndef __ASSEMBLY__
-extern unsigned short   ppdata;
-#endif /* __ASSEMBLY__ */
-
-#endif  /* CONFIG_eLIA */
-
-/****************************************************************************/
-#endif  /* elia_h */
diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h
new file mode 100644
index 000000000000..283214dc65a7
--- /dev/null
+++ b/arch/m68k/include/asm/gpio.h
@@ -0,0 +1,238 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#ifndef coldfire_gpio_h
+#define coldfire_gpio_h
+
+#include <linux/io.h>
+#include <asm-generic/gpio.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/*
+ * The Freescale Coldfire family is quite varied in how they implement GPIO.
+ * Some parts have 8 bit ports, some have 16bit and some have 32bit; some have
+ * only one port, others have multiple ports; some have a single data latch
+ * for both input and output, others have a separate pin data register to read
+ * input; some require a read-modify-write access to change an output, others
+ * have set and clear registers for some of the outputs; Some have all the
+ * GPIOs in a single control area, others have some GPIOs implemented in
+ * different modules.
+ *
+ * This implementation attempts accomodate the differences while presenting
+ * a generic interface that will optimize to as few instructions as possible.
+ */
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
+    defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
+    defined(CONFIG_M527x) || defined(CONFIG_M528x) || defined(CONFIG_M532x)
+
+/* These parts have GPIO organized by 8 bit ports */
+
+#define MCFGPIO_PORTTYPE                u8
+#define MCFGPIO_PORTSIZE                8
+#define mcfgpio_read(port)              __raw_readb(port)
+#define mcfgpio_write(data, port)       __raw_writeb(data, port)
+
+#elif defined(CONFIG_M5307) || defined(CONFIG_M5407) || defined(CONFIG_M5272)
+
+/* These parts have GPIO organized by 16 bit ports */
+
+#define MCFGPIO_PORTTYPE                u16
+#define MCFGPIO_PORTSIZE                16
+#define mcfgpio_read(port)              __raw_readw(port)
+#define mcfgpio_write(data, port)       __raw_writew(data, port)
+
+#elif defined(CONFIG_M5249)
+
+/* These parts have GPIO organized by 32 bit ports */
+
+#define MCFGPIO_PORTTYPE                u32
+#define MCFGPIO_PORTSIZE                32
+#define mcfgpio_read(port)              __raw_readl(port)
+#define mcfgpio_write(data, port)       __raw_writel(data, port)
+
+#endif
+
+#define mcfgpio_bit(gpio)               (1 << ((gpio) %  MCFGPIO_PORTSIZE))
+#define mcfgpio_port(gpio)              ((gpio) / MCFGPIO_PORTSIZE)
+
+#if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
+    defined(CONFIG_M527x) || defined(CONFIG_M528x) || defined(CONFIG_M532x)
+/*
+ * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses
+ * read-modify-write to change an output and a GPIO module which has separate
+ * set/clr registers to directly change outputs with a single write access.
+ */
+#if defined(CONFIG_M528x)
+/*
+ * The 528x also has GPIOs in other modules (GPT, QADC) which use
+ * read-modify-write as well as those controlled by the EPORT and GPIO modules.
+ */
+#define MCFGPIO_SCR_START               40
+#else
+#define MCFGPIO_SCR_START               8
+#endif
+
+#define MCFGPIO_SETR_PORT(gpio)         (MCFGPIO_SETR + \
+                                        mcfgpio_port(gpio - MCFGPIO_SCR_START))
+
+#define MCFGPIO_CLRR_PORT(gpio)         (MCFGPIO_CLRR + \
+                                        mcfgpio_port(gpio - MCFGPIO_SCR_START))
+#else
+
+#define MCFGPIO_SCR_START               MCFGPIO_PIN_MAX
+/* with MCFGPIO_SCR == MCFGPIO_PIN_MAX, these will be optimized away */
+#define MCFGPIO_SETR_PORT(gpio)         0
+#define MCFGPIO_CLRR_PORT(gpio)         0
+
+#endif
+/*
+ * Coldfire specific helper functions
+ */
+
+/* return the port pin data register for a gpio */
+static inline u32 __mcf_gpio_ppdr(unsigned gpio)
+{
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
+    defined(CONFIG_M5307) || defined(CONFIG_M5407)
+        return MCFSIM_PADAT;
+#elif defined(CONFIG_M5272)
+        if (gpio < 16)
+                return MCFSIM_PADAT;
+        else if (gpio < 32)
+                return MCFSIM_PBDAT;
+        else
+                return MCFSIM_PCDAT;
+#elif defined(CONFIG_M5249)
+        if (gpio < 32)
+                return MCFSIM2_GPIOREAD;
+        else
+                return MCFSIM2_GPIO1READ;
+#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
+      defined(CONFIG_M527x) || defined(CONFIG_M528x) || defined(CONFIG_M532x)
+        if (gpio < 8)
+                return MCFEPORT_EPPDR;
+#if defined(CONFIG_M528x)
+        else if (gpio < 16)
+                return MCFGPTA_GPTPORT;
+        else if (gpio < 24)
+                return MCFGPTB_GPTPORT;
+        else if (gpio < 32)
+                return MCFQADC_PORTQA;
+        else if (gpio < 40)
+                return MCFQADC_PORTQB;
+#endif
+        else
+                return MCFGPIO_PPDR + mcfgpio_port(gpio - MCFGPIO_SCR_START);
+#endif
+}
+
+/* return the port output data register for a gpio */
+static inline u32 __mcf_gpio_podr(unsigned gpio)
+{
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
+    defined(CONFIG_M5307) || defined(CONFIG_M5407)
+        return MCFSIM_PADAT;
+#elif defined(CONFIG_M5272)
+        if (gpio < 16)
+                return MCFSIM_PADAT;
+        else if (gpio < 32)
+                return MCFSIM_PBDAT;
+        else
+                return MCFSIM_PCDAT;
+#elif defined(CONFIG_M5249)
+        if (gpio < 32)
+                return MCFSIM2_GPIOWRITE;
+        else
+                return MCFSIM2_GPIO1WRITE;
+#elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \
+      defined(CONFIG_M527x) || defined(CONFIG_M528x) || defined(CONFIG_M532x)
+        if (gpio < 8)
+                return MCFEPORT_EPDR;
+#if defined(CONFIG_M528x)
+        else if (gpio < 16)
+                return MCFGPTA_GPTPORT;
+        else if (gpio < 24)
+                return MCFGPTB_GPTPORT;
+        else if (gpio < 32)
+                return MCFQADC_PORTQA;
+        else if (gpio < 40)
+                return MCFQADC_PORTQB;
+#endif
+        else
+                return MCFGPIO_PODR + mcfgpio_port(gpio - MCFGPIO_SCR_START);
+#endif
+}
+
+/*
+ * The Generic GPIO functions
+ *
+ * If the gpio is a compile time constant and is one of the Coldfire gpios,
+ * use the inline version, otherwise dispatch thru gpiolib.
+ */
+
+static inline int gpio_get_value(unsigned gpio)
+{
+        if (__builtin_constant_p(gpio) && gpio < MCFGPIO_PIN_MAX)
+                return mcfgpio_read(__mcf_gpio_ppdr(gpio)) & mcfgpio_bit(gpio);
+        else
+                return __gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        if (__builtin_constant_p(gpio) && gpio < MCFGPIO_PIN_MAX) {
+                if (gpio < MCFGPIO_SCR_START) {
+                        unsigned long flags;
+                        MCFGPIO_PORTTYPE data;
+
+                        local_irq_save(flags);
+                        data = mcfgpio_read(__mcf_gpio_podr(gpio));
+                        if (value)
+                                data |= mcfgpio_bit(gpio);
+                        else
+                                data &= ~mcfgpio_bit(gpio);
+                        mcfgpio_write(data, __mcf_gpio_podr(gpio));
+                        local_irq_restore(flags);
+                } else {
+                        if (value)
+                                mcfgpio_write(mcfgpio_bit(gpio),
+                                                MCFGPIO_SETR_PORT(gpio));
+                        else
+                                mcfgpio_write(~mcfgpio_bit(gpio),
+                                                MCFGPIO_CLRR_PORT(gpio));
+                }
+        } else
+                __gpio_set_value(gpio, value);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+        return (gpio < MCFGPIO_IRQ_MAX) ? gpio + MCFGPIO_IRQ_VECBASE : -EINVAL;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+        return (irq >= MCFGPIO_IRQ_VECBASE &&
+                irq < (MCFGPIO_IRQ_VECBASE + MCFGPIO_IRQ_MAX)) ?
+                irq - MCFGPIO_IRQ_VECBASE : -ENXIO;
+}
+
+static inline int gpio_cansleep(unsigned gpio)
+{
+        return gpio < MCFGPIO_PIN_MAX ? 0 : __gpio_cansleep(gpio);
+}
+
+#endif
diff --git a/arch/m68k/include/asm/hardirq_mm.h b/arch/m68k/include/asm/hardirq_mm.h
index 394ee946015c..554f65b6cd3b 100644
--- a/arch/m68k/include/asm/hardirq_mm.h
+++ b/arch/m68k/include/asm/hardirq_mm.h
@@ -1,16 +1,8 @@
 #ifndef __M68K_HARDIRQ_H
 #define __M68K_HARDIRQ_H
 
-#include <linux/threads.h>
-#include <linux/cache.h>
-
-/* entry.S is sensitive to the offsets of these fields */
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
 #define HARDIRQ_BITS    8
 
+#include <asm-generic/hardirq.h>
+
 #endif
diff --git a/arch/m68k/include/asm/hardirq_no.h b/arch/m68k/include/asm/hardirq_no.h
index bfad28149a49..b44b14be87d9 100644
--- a/arch/m68k/include/asm/hardirq_no.h
+++ b/arch/m68k/include/asm/hardirq_no.h
@@ -1,16 +1,8 @@
 #ifndef __M68K_HARDIRQ_H
 #define __M68K_HARDIRQ_H
 
-#include <linux/cache.h>
-#include <linux/threads.h>
 #include <asm/irq.h>
 
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
 #define HARDIRQ_BITS    8
 
 /*
@@ -22,6 +14,6 @@ typedef struct {
 # error HARDIRQ_BITS is too low!
 #endif
 
-void ack_bad_irq(unsigned int irq);
+#include <asm-generic/hardirq.h>
 
 #endif /* __M68K_HARDIRQ_H */
diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h
index 6adef1ee2082..7f57436ec18f 100644
--- a/arch/m68k/include/asm/io_no.h
+++ b/arch/m68k/include/asm/io_no.h
@@ -134,7 +134,7 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
 #define insw(a,b,l) io_insw(a,b,l)
 #define insl(a,b,l) io_insl(a,b,l)
 
-#define IO_SPACE_LIMIT 0xffff
+#define IO_SPACE_LIMIT 0xffffffff
 
 
 /* Values for nocacheflag and cmode */
diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h
index d031416595b2..907eff1edd2f 100644
--- a/arch/m68k/include/asm/irq.h
+++ b/arch/m68k/include/asm/irq.h
@@ -1,5 +1,134 @@
-#ifdef __uClinux__
-#include "irq_no.h"
+#ifndef _M68K_IRQ_H_
+#define _M68K_IRQ_H_
+
+/*
+ * This should be the same as the max(NUM_X_SOURCES) for all the
+ * different m68k hosts compiled into the kernel.
+ * Currently the Atari has 72 and the Amiga 24, but if both are
+ * supported in the kernel it is better to make room for 72.
+ */
+#if defined(CONFIG_COLDFIRE)
+#define NR_IRQS 256
+#elif defined(CONFIG_VME) || defined(CONFIG_SUN3) || defined(CONFIG_SUN3X)
+#define NR_IRQS 200
+#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC)
+#define NR_IRQS 72
+#elif defined(CONFIG_Q40)
+#define NR_IRQS 43
+#elif defined(CONFIG_AMIGA) || !defined(CONFIG_MMU)
+#define NR_IRQS 32
+#elif defined(CONFIG_APOLLO)
+#define NR_IRQS 24
+#elif defined(CONFIG_HP300)
+#define NR_IRQS 8
 #else
-#include "irq_mm.h"
+#define NR_IRQS 0
 #endif
+
+#ifdef CONFIG_MMU
+
+#include <linux/linkage.h>
+#include <linux/hardirq.h>
+#include <linux/irqreturn.h>
+#include <linux/spinlock_types.h>
+
+/*
+ * The hardirq mask has to be large enough to have
+ * space for potentially all IRQ sources in the system
+ * nesting on a single CPU:
+ */
+#if (1 << HARDIRQ_BITS) < NR_IRQS
+# error HARDIRQ_BITS is too low!
+#endif
+
+/*
+ * Interrupt source definitions
+ * General interrupt sources are the level 1-7.
+ * Adding an interrupt service routine for one of these sources
+ * results in the addition of that routine to a chain of routines.
+ * Each one is called in succession.  Each individual interrupt
+ * service routine should determine if the device associated with
+ * that routine requires service.
+ */
+
+#define IRQ_SPURIOUS    0
+
+#define IRQ_AUTO_1      1       /* level 1 interrupt */
+#define IRQ_AUTO_2      2       /* level 2 interrupt */
+#define IRQ_AUTO_3      3       /* level 3 interrupt */
+#define IRQ_AUTO_4      4       /* level 4 interrupt */
+#define IRQ_AUTO_5      5       /* level 5 interrupt */
+#define IRQ_AUTO_6      6       /* level 6 interrupt */
+#define IRQ_AUTO_7      7       /* level 7 interrupt (non-maskable) */
+
+#define IRQ_USER        8
+
+extern unsigned int irq_canonicalize(unsigned int irq);
+
+struct pt_regs;
+
+/*
+ * various flags for request_irq() - the Amiga now uses the standard
+ * mechanism like all other architectures - IRQF_DISABLED and
+ * IRQF_SHARED are your friends.
+ */
+#ifndef MACH_AMIGA_ONLY
+#define IRQ_FLG_LOCK    (0x0001)        /* handler is not replaceable   */
+#define IRQ_FLG_REPLACE (0x0002)        /* replace existing handler     */
+#define IRQ_FLG_FAST    (0x0004)
+#define IRQ_FLG_SLOW    (0x0008)
+#define IRQ_FLG_STD     (0x8000)        /* internally used              */
+#endif
+
+/*
+ * This structure is used to chain together the ISRs for a particular
+ * interrupt source (if it supports chaining).
+ */
+typedef struct irq_node {
+        irqreturn_t     (*handler)(int, void *);
+        void            *dev_id;
+        struct irq_node *next;
+        unsigned long   flags;
+        const char      *devname;
+} irq_node_t;
+
+/*
+ * This structure has only 4 elements for speed reasons
+ */
+struct irq_handler {
+        int             (*handler)(int, void *);
+        unsigned long   flags;
+        void            *dev_id;
+        const char      *devname;
+};
+
+struct irq_controller {
+        const char *name;
+        spinlock_t lock;
+        int (*startup)(unsigned int irq);
+        void (*shutdown)(unsigned int irq);
+        void (*enable)(unsigned int irq);
+        void (*disable)(unsigned int irq);
+};
+
+extern int m68k_irq_startup(unsigned int);
+extern void m68k_irq_shutdown(unsigned int);
+
+/*
+ * This function returns a new irq_node_t
+ */
+extern irq_node_t *new_irq_node(void);
+
+extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *));
+extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt,
+                                      void (*handler)(unsigned int, struct pt_regs *));
+extern void m68k_setup_irq_controller(struct irq_controller *, unsigned int, unsigned int);
+
+asmlinkage void m68k_handle_int(unsigned int);
+asmlinkage void __m68k_handle_int(unsigned int, struct pt_regs *);
+
+#else
+#define irq_canonicalize(irq)  (irq)
+#endif /* CONFIG_MMU */
+
+#endif /* _M68K_IRQ_H_ */
diff --git a/arch/m68k/include/asm/irq_mm.h b/arch/m68k/include/asm/irq_mm.h
deleted file mode 100644
index 0cab42cad79e..000000000000
--- a/arch/m68k/include/asm/irq_mm.h
+++ /dev/null
@@ -1,126 +0,0 @@
-#ifndef _M68K_IRQ_H_
-#define _M68K_IRQ_H_
-
-#include <linux/linkage.h>
-#include <linux/hardirq.h>
-#include <linux/irqreturn.h>
-#include <linux/spinlock_types.h>
-
-/*
- * This should be the same as the max(NUM_X_SOURCES) for all the
- * different m68k hosts compiled into the kernel.
- * Currently the Atari has 72 and the Amiga 24, but if both are
- * supported in the kernel it is better to make room for 72.
- */
-#if defined(CONFIG_VME) || defined(CONFIG_SUN3) || defined(CONFIG_SUN3X)
-#define NR_IRQS 200
-#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC)
-#define NR_IRQS 72
-#elif defined(CONFIG_Q40)
-#define NR_IRQS 43
-#elif defined(CONFIG_AMIGA)
-#define NR_IRQS 32
-#elif defined(CONFIG_APOLLO)
-#define NR_IRQS 24
-#elif defined(CONFIG_HP300)
-#define NR_IRQS 8
-#else
-#define NR_IRQS 0
-#endif
-
-/*
- * The hardirq mask has to be large enough to have
- * space for potentially all IRQ sources in the system
- * nesting on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
-
-/*
- * Interrupt source definitions
- * General interrupt sources are the level 1-7.
- * Adding an interrupt service routine for one of these sources
- * results in the addition of that routine to a chain of routines.
- * Each one is called in succession.  Each individual interrupt
- * service routine should determine if the device associated with
- * that routine requires service.
- */
-
-#define IRQ_SPURIOUS    0
-
-#define IRQ_AUTO_1      1       /* level 1 interrupt */
-#define IRQ_AUTO_2      2       /* level 2 interrupt */
-#define IRQ_AUTO_3      3       /* level 3 interrupt */
-#define IRQ_AUTO_4      4       /* level 4 interrupt */
-#define IRQ_AUTO_5      5       /* level 5 interrupt */
-#define IRQ_AUTO_6      6       /* level 6 interrupt */
-#define IRQ_AUTO_7      7       /* level 7 interrupt (non-maskable) */
-
-#define IRQ_USER        8
-
-extern unsigned int irq_canonicalize(unsigned int irq);
-
-struct pt_regs;
-
-/*
- * various flags for request_irq() - the Amiga now uses the standard
- * mechanism like all other architectures - IRQF_DISABLED and
- * IRQF_SHARED are your friends.
- */
-#ifndef MACH_AMIGA_ONLY
-#define IRQ_FLG_LOCK    (0x0001)        /* handler is not replaceable   */
-#define IRQ_FLG_REPLACE (0x0002)        /* replace existing handler     */
-#define IRQ_FLG_FAST    (0x0004)
-#define IRQ_FLG_SLOW    (0x0008)
-#define IRQ_FLG_STD     (0x8000)        /* internally used              */
-#endif
-
-/*
- * This structure is used to chain together the ISRs for a particular
- * interrupt source (if it supports chaining).
- */
-typedef struct irq_node {
-        irqreturn_t     (*handler)(int, void *);
-        void            *dev_id;
-        struct irq_node *next;
-        unsigned long   flags;
-        const char      *devname;
-} irq_node_t;
-
-/*
- * This structure has only 4 elements for speed reasons
- */
-struct irq_handler {
-        int             (*handler)(int, void *);
-        unsigned long   flags;
-        void            *dev_id;
-        const char      *devname;
-};
-
-struct irq_controller {
-        const char *name;
-        spinlock_t lock;
-        int (*startup)(unsigned int irq);
-        void (*shutdown)(unsigned int irq);
-        void (*enable)(unsigned int irq);
-        void (*disable)(unsigned int irq);
-};
-
-extern int m68k_irq_startup(unsigned int);
-extern void m68k_irq_shutdown(unsigned int);
-
-/*
- * This function returns a new irq_node_t
- */
-extern irq_node_t *new_irq_node(void);
-
-extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *));
-extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt,
-                                      void (*handler)(unsigned int, struct pt_regs *));
-extern void m68k_setup_irq_controller(struct irq_controller *, unsigned int, unsigned int);
-
-asmlinkage void m68k_handle_int(unsigned int);
-asmlinkage void __m68k_handle_int(unsigned int, struct pt_regs *);
-
-#endif /* _M68K_IRQ_H_ */
diff --git a/arch/m68k/include/asm/irq_no.h b/arch/m68k/include/asm/irq_no.h
deleted file mode 100644
index 9373c31ac87d..000000000000
--- a/arch/m68k/include/asm/irq_no.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#ifndef _M68KNOMMU_IRQ_H_
-#define _M68KNOMMU_IRQ_H_
-
-#ifdef CONFIG_COLDFIRE
-/*
- * On the ColdFire we keep track of all vectors. That way drivers
- * can register whatever vector number they wish, and we can deal
- * with it.
- */
-#define SYS_IRQS        256
-#define NR_IRQS         SYS_IRQS
-
-#else
-
-/*
- * # of m68k interrupts
- */
-#define SYS_IRQS        8
-#define NR_IRQS         (24 + SYS_IRQS)
-
-#endif /* CONFIG_COLDFIRE */
-
-
-#define irq_canonicalize(irq)   (irq)
-
-#endif /* _M68KNOMMU_IRQ_H_ */
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 7e3594dea88b..9c384e294af9 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -85,8 +85,21 @@
 #define MCFSIM_PAR              0xcb            /* Pin Assignment reg (r/w) */
 #endif
 
-#define MCFSIM_PADDR            0x1c5           /* Parallel Direction (r/w) */
-#define MCFSIM_PADAT            0x1c9           /* Parallel Port Value (r/w) */
+#define MCFSIM_PADDR            (MCF_MBAR + 0x1c5)      /* Parallel Direction (r/w) */
+#define MCFSIM_PADAT            (MCF_MBAR + 0x1c9)      /* Parallel Port Value (r/w) */
+
+/*
+ *      Define system peripheral IRQ usage.
+ */
+#define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
+#define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
+
+/*
+ * Generic GPIO
+ */
+#define MCFGPIO_PIN_MAX         8
+#define MCFGPIO_IRQ_VECBASE     -1
+#define MCFGPIO_IRQ_MAX         -1
 
 /*
  *      Some symbol defines for the Parallel Port Pin Assignment Register
@@ -111,21 +124,5 @@
 #define MCFSIM_DMA2ICR          MCFSIM_ICR15    /* DMA 2 ICR */
 #endif
 
-#if defined(CONFIG_M5206e)
-#define MCFSIM_IMR_MASKALL      0xfffe          /* All SIM intr sources */
-#endif
-
-/*
- *      Macro to get and set IMR register. It is 16 bits on the 5206.
- */
-#define mcf_getimr()            \
-        *((volatile unsigned short *) (MCF_MBAR + MCFSIM_IMR))
-
-#define mcf_setimr(imr)         \
-        *((volatile unsigned short *) (MCF_MBAR + MCFSIM_IMR)) = (imr)
-
-#define mcf_getipr()            \
-        *((volatile unsigned short *) (MCF_MBAR + MCFSIM_IPR))
-
 /****************************************************************************/
 #endif  /* m5206sim_h */
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 83bbcfd6e8f2..ed2b69b96805 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -11,9 +11,8 @@
 #define m520xsim_h
 /****************************************************************************/
 
-
 /*
- *  Define the 5282 SIM register set addresses.
+ *  Define the 520x SIM register set addresses.
  */
 #define MCFICM_INTC0        0x48000     /* Base for Interrupt Ctrl 0 */
 #define MCFINTC_IPRH        0x00        /* Interrupt pending 32-63 */
@@ -22,8 +21,22 @@
 #define MCFINTC_IMRL        0x0c        /* Interrupt mask 1-31 */
 #define MCFINTC_INTFRCH     0x10        /* Interrupt force 32-63 */
 #define MCFINTC_INTFRCL     0x14        /* Interrupt force 1-31 */
+#define MCFINTC_SIMR        0x1c        /* Set interrupt mask 0-63 */
+#define MCFINTC_CIMR        0x1d        /* Clear interrupt mask 0-63 */
 #define MCFINTC_ICR0        0x40        /* Base ICR register */
 
+/*
+ *  The common interrupt controller code just wants to know the absolute
+ *  address to the SIMR and CIMR registers (not offsets into IPSBAR).
+ *  The 520x family only has a single INTC unit.
+ */
+#define MCFINTC0_SIMR       (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_SIMR)
+#define MCFINTC0_CIMR       (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_CIMR)
+#define MCFINTC0_ICR0       (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0)
+#define MCFINTC1_SIMR       (0)
+#define MCFINTC1_CIMR       (0)
+#define MCFINTC1_ICR0       (0)
+
 #define MCFINT_VECBASE      64
 #define MCFINT_UART0        26          /* Interrupt number for UART0 */
 #define MCFINT_UART1        27          /* Interrupt number for UART1 */
@@ -41,6 +54,62 @@
 #define MCFSIM_SDCS0        0x000a8110  /* SDRAM Chip Select 0 Configuration */
 #define MCFSIM_SDCS1        0x000a8114  /* SDRAM Chip Select 1 Configuration */
 
+#define MCFEPORT_EPDDR                  0xFC088002
+#define MCFEPORT_EPDR                   0xFC088004
+#define MCFEPORT_EPPDR                  0xFC088005
+
+#define MCFGPIO_PODR_BUSCTL             0xFC0A4000
+#define MCFGPIO_PODR_BE                 0xFC0A4001
+#define MCFGPIO_PODR_CS                 0xFC0A4002
+#define MCFGPIO_PODR_FECI2C             0xFC0A4003
+#define MCFGPIO_PODR_QSPI               0xFC0A4004
+#define MCFGPIO_PODR_TIMER              0xFC0A4005
+#define MCFGPIO_PODR_UART               0xFC0A4006
+#define MCFGPIO_PODR_FECH               0xFC0A4007
+#define MCFGPIO_PODR_FECL               0xFC0A4008
+
+#define MCFGPIO_PDDR_BUSCTL             0xFC0A400C
+#define MCFGPIO_PDDR_BE                 0xFC0A400D
+#define MCFGPIO_PDDR_CS                 0xFC0A400E
+#define MCFGPIO_PDDR_FECI2C             0xFC0A400F
+#define MCFGPIO_PDDR_QSPI               0xFC0A4010
+#define MCFGPIO_PDDR_TIMER              0xFC0A4011
+#define MCFGPIO_PDDR_UART               0xFC0A4012
+#define MCFGPIO_PDDR_FECH               0xFC0A4013
+#define MCFGPIO_PDDR_FECL               0xFC0A4014
+
+#define MCFGPIO_PPDSDR_BUSCTL           0xFC0A401A
+#define MCFGPIO_PPDSDR_BE               0xFC0A401B
+#define MCFGPIO_PPDSDR_CS               0xFC0A401C
+#define MCFGPIO_PPDSDR_FECI2C           0xFC0A401D
+#define MCFGPIO_PPDSDR_QSPI             0xFC0A401E
+#define MCFGPIO_PPDSDR_TIMER            0xFC0A401F
+#define MCFGPIO_PPDSDR_UART             0xFC0A4021
+#define MCFGPIO_PPDSDR_FECH             0xFC0A4021
+#define MCFGPIO_PPDSDR_FECL             0xFC0A4022
+
+#define MCFGPIO_PCLRR_BUSCTL            0xFC0A4024
+#define MCFGPIO_PCLRR_BE                0xFC0A4025
+#define MCFGPIO_PCLRR_CS                0xFC0A4026
+#define MCFGPIO_PCLRR_FECI2C            0xFC0A4027
+#define MCFGPIO_PCLRR_QSPI              0xFC0A4028
+#define MCFGPIO_PCLRR_TIMER             0xFC0A4029
+#define MCFGPIO_PCLRR_UART              0xFC0A402A
+#define MCFGPIO_PCLRR_FECH              0xFC0A402B
+#define MCFGPIO_PCLRR_FECL              0xFC0A402C
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PODR                    MCFGPIO_PODR_BUSCTL
+#define MCFGPIO_PDDR                    MCFGPIO_PDDR_BUSCTL
+#define MCFGPIO_PPDR                    MCFGPIO_PPDSDR_BUSCTL
+#define MCFGPIO_SETR                    MCFGPIO_PPDSDR_BUSCTL
+#define MCFGPIO_CLRR                    MCFGPIO_PCLRR_BUSCTL
+
+#define MCFGPIO_PIN_MAX                 80
+#define MCFGPIO_IRQ_MAX                 8
+#define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
+/****************************************************************************/
 
 #define MCF_GPIO_PAR_UART                   (0xA4036)
 #define MCF_GPIO_PAR_FECI2C                 (0xA4033)
@@ -55,10 +124,6 @@
 #define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2   (0x02)
 #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)
 
-#define ICR_INTRCONF            0x05
-#define MCFPIT_IMR              MCFINTC_IMRL
-#define MCFPIT_IMR_IBIT         (1 << MCFINT_PIT1)
-
 /*
  *  Reset Controll Unit.
  */
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 55183b5df1b8..a34894cf8e6f 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -50,5 +50,82 @@
 #define MCF_RCR_SWRESET         0x80            /* Software reset bit */
 #define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
 
+#define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
+#define MCFGPIO_PODR_DATAH      (MCF_IPSBAR + 0x100001)
+#define MCFGPIO_PODR_DATAL      (MCF_IPSBAR + 0x100002)
+#define MCFGPIO_PODR_BUSCTL     (MCF_IPSBAR + 0x100003)
+#define MCFGPIO_PODR_BS         (MCF_IPSBAR + 0x100004)
+#define MCFGPIO_PODR_CS         (MCF_IPSBAR + 0x100005)
+#define MCFGPIO_PODR_SDRAM      (MCF_IPSBAR + 0x100006)
+#define MCFGPIO_PODR_FECI2C     (MCF_IPSBAR + 0x100007)
+#define MCFGPIO_PODR_UARTH      (MCF_IPSBAR + 0x100008)
+#define MCFGPIO_PODR_UARTL      (MCF_IPSBAR + 0x100009)
+#define MCFGPIO_PODR_QSPI       (MCF_IPSBAR + 0x10000A)
+#define MCFGPIO_PODR_TIMER      (MCF_IPSBAR + 0x10000B)
+#define MCFGPIO_PODR_ETPU       (MCF_IPSBAR + 0x10000C)
+
+#define MCFGPIO_PDDR_ADDR       (MCF_IPSBAR + 0x100010)
+#define MCFGPIO_PDDR_DATAH      (MCF_IPSBAR + 0x100011)
+#define MCFGPIO_PDDR_DATAL      (MCF_IPSBAR + 0x100012)
+#define MCFGPIO_PDDR_BUSCTL     (MCF_IPSBAR + 0x100013)
+#define MCFGPIO_PDDR_BS         (MCF_IPSBAR + 0x100014)
+#define MCFGPIO_PDDR_CS         (MCF_IPSBAR + 0x100015)
+#define MCFGPIO_PDDR_SDRAM      (MCF_IPSBAR + 0x100016)
+#define MCFGPIO_PDDR_FECI2C     (MCF_IPSBAR + 0x100017)
+#define MCFGPIO_PDDR_UARTH      (MCF_IPSBAR + 0x100018)
+#define MCFGPIO_PDDR_UARTL      (MCF_IPSBAR + 0x100019)
+#define MCFGPIO_PDDR_QSPI       (MCF_IPSBAR + 0x10001A)
+#define MCFGPIO_PDDR_TIMER      (MCF_IPSBAR + 0x10001B)
+#define MCFGPIO_PDDR_ETPU       (MCF_IPSBAR + 0x10001C)
+
+#define MCFGPIO_PPDSDR_ADDR     (MCF_IPSBAR + 0x100020)
+#define MCFGPIO_PPDSDR_DATAH    (MCF_IPSBAR + 0x100021)
+#define MCFGPIO_PPDSDR_DATAL    (MCF_IPSBAR + 0x100022)
+#define MCFGPIO_PPDSDR_BUSCTL   (MCF_IPSBAR + 0x100023)
+#define MCFGPIO_PPDSDR_BS       (MCF_IPSBAR + 0x100024)
+#define MCFGPIO_PPDSDR_CS       (MCF_IPSBAR + 0x100025)
+#define MCFGPIO_PPDSDR_SDRAM    (MCF_IPSBAR + 0x100026)
+#define MCFGPIO_PPDSDR_FECI2C   (MCF_IPSBAR + 0x100027)
+#define MCFGPIO_PPDSDR_UARTH    (MCF_IPSBAR + 0x100028)
+#define MCFGPIO_PPDSDR_UARTL    (MCF_IPSBAR + 0x100029)
+#define MCFGPIO_PPDSDR_QSPI     (MCF_IPSBAR + 0x10002A)
+#define MCFGPIO_PPDSDR_TIMER    (MCF_IPSBAR + 0x10002B)
+#define MCFGPIO_PPDSDR_ETPU     (MCF_IPSBAR + 0x10002C)
+
+#define MCFGPIO_PCLRR_ADDR      (MCF_IPSBAR + 0x100030)
+#define MCFGPIO_PCLRR_DATAH     (MCF_IPSBAR + 0x100031)
+#define MCFGPIO_PCLRR_DATAL     (MCF_IPSBAR + 0x100032)
+#define MCFGPIO_PCLRR_BUSCTL    (MCF_IPSBAR + 0x100033)
+#define MCFGPIO_PCLRR_BS        (MCF_IPSBAR + 0x100034)
+#define MCFGPIO_PCLRR_CS        (MCF_IPSBAR + 0x100035)
+#define MCFGPIO_PCLRR_SDRAM     (MCF_IPSBAR + 0x100036)
+#define MCFGPIO_PCLRR_FECI2C    (MCF_IPSBAR + 0x100037)
+#define MCFGPIO_PCLRR_UARTH     (MCF_IPSBAR + 0x100038)
+#define MCFGPIO_PCLRR_UARTL     (MCF_IPSBAR + 0x100039)
+#define MCFGPIO_PCLRR_QSPI      (MCF_IPSBAR + 0x10003A)
+#define MCFGPIO_PCLRR_TIMER     (MCF_IPSBAR + 0x10003B)
+#define MCFGPIO_PCLRR_ETPU      (MCF_IPSBAR + 0x10003C)
+
+/*
+ * EPort
+ */
+
+#define MCFEPORT_EPDDR          (MCF_IPSBAR + 0x130002)
+#define MCFEPORT_EPDR           (MCF_IPSBAR + 0x130004)
+#define MCFEPORT_EPPDR          (MCF_IPSBAR + 0x130005)
+
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PODR                    MCFGPIO_PODR_ADDR
+#define MCFGPIO_PDDR                    MCFGPIO_PDDR_ADDR
+#define MCFGPIO_PPDR                    MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_SETR                    MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_CLRR                    MCFGPIO_PCLRR_ADDR
+
+#define MCFGPIO_PIN_MAX                 107
+#define MCFGPIO_IRQ_MAX                 8
+#define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
+
 /****************************************************************************/
 #endif  /* m523xsim_h */
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 366eb8602d2f..14bce877ed88 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -71,16 +71,22 @@
 #define MCFSIM_DMA3ICR          MCFSIM_ICR9     /* DMA 3 ICR */
 
 /*
+ *      Define system peripheral IRQ usage.
+ */
+#define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
+#define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
+
+/*
  *      General purpose IO registers (in MBAR2).
  */
-#define MCFSIM2_GPIOREAD        0x0             /* GPIO read values */
-#define MCFSIM2_GPIOWRITE       0x4             /* GPIO write values */
-#define MCFSIM2_GPIOENABLE      0x8             /* GPIO enabled */
-#define MCFSIM2_GPIOFUNC        0xc             /* GPIO function */
-#define MCFSIM2_GPIO1READ       0xb0            /* GPIO1 read values */
-#define MCFSIM2_GPIO1WRITE      0xb4            /* GPIO1 write values */
-#define MCFSIM2_GPIO1ENABLE     0xb8            /* GPIO1 enabled */
-#define MCFSIM2_GPIO1FUNC       0xbc            /* GPIO1 function */
+#define MCFSIM2_GPIOREAD        (MCF_MBAR2 + 0x000)     /* GPIO read values */
+#define MCFSIM2_GPIOWRITE       (MCF_MBAR2 + 0x004)     /* GPIO write values */
+#define MCFSIM2_GPIOENABLE      (MCF_MBAR2 + 0x008)     /* GPIO enabled */
+#define MCFSIM2_GPIOFUNC        (MCF_MBAR2 + 0x00C)     /* GPIO function */
+#define MCFSIM2_GPIO1READ       (MCF_MBAR2 + 0x0B0)     /* GPIO1 read values */
+#define MCFSIM2_GPIO1WRITE      (MCF_MBAR2 + 0x0B4)     /* GPIO1 write values */
+#define MCFSIM2_GPIO1ENABLE     (MCF_MBAR2 + 0x0B8)     /* GPIO1 enabled */
+#define MCFSIM2_GPIO1FUNC       (MCF_MBAR2 + 0x0BC)     /* GPIO1 function */
 
 #define MCFSIM2_GPIOINTSTAT     0xc0            /* GPIO interrupt status */
 #define MCFSIM2_GPIOINTCLEAR    0xc0            /* GPIO interrupt clear */
@@ -100,20 +106,28 @@
 #define MCFSIM2_IDECONFIG1      0x18c           /* IDEconfig1 */
 #define MCFSIM2_IDECONFIG2      0x190           /* IDEconfig2 */
 
-
 /*
- *      Macro to set IMR register. It is 32 bits on the 5249.
+ * Define the base interrupt for the second interrupt controller.
+ * We set it to 128, out of the way of the base interrupts, and plenty
+ * of room for its 64 interrupts.
  */
-#define MCFSIM_IMR_MASKALL      0x7fffe         /* All SIM intr sources */
+#define MCFINTC2_VECBASE        128
 
-#define mcf_getimr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
+#define MCFINTC2_GPIOIRQ0       (MCFINTC2_VECBASE + 32)
+#define MCFINTC2_GPIOIRQ1       (MCFINTC2_VECBASE + 33)
+#define MCFINTC2_GPIOIRQ2       (MCFINTC2_VECBASE + 34)
+#define MCFINTC2_GPIOIRQ3       (MCFINTC2_VECBASE + 35)
+#define MCFINTC2_GPIOIRQ4       (MCFINTC2_VECBASE + 36)
+#define MCFINTC2_GPIOIRQ5       (MCFINTC2_VECBASE + 37)
+#define MCFINTC2_GPIOIRQ6       (MCFINTC2_VECBASE + 38)
+#define MCFINTC2_GPIOIRQ7       (MCFINTC2_VECBASE + 39)
 
-#define mcf_setimr(imr)         \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
-
-#define mcf_getipr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PIN_MAX         64
+#define MCFGPIO_IRQ_MAX         -1
+#define MCFGPIO_IRQ_VECBASE     -1
 
 /****************************************************************************/
 
@@ -137,9 +151,9 @@
         subql   #1,%a1                          /* get MBAR2 address in a1 */
 
         /*
-         *      Move secondary interrupts to base at 128.
+         *      Move secondary interrupts to their base (128).
          */
-        moveb   #0x80,%d0
+        moveb   #MCFINTC2_VECBASE,%d0
         moveb   %d0,0x16b(%a1)                  /* interrupt base register */
 
         /*
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 6217edc21139..df3332c2317d 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -12,7 +12,6 @@
 #define m5272sim_h
 /****************************************************************************/
 
-
 /*
  *      Define the 5272 SIM register set addresses.
  */
@@ -63,16 +62,59 @@
 #define MCFSIM_DCMR1            0x5c            /* DRAM 1 Mask reg (r/w) */
 #define MCFSIM_DCCR1            0x63            /* DRAM 1 Control reg (r/w) */
 
-#define MCFSIM_PACNT            0x80            /* Port A Control (r/w) */
-#define MCFSIM_PADDR            0x84            /* Port A Direction (r/w) */
-#define MCFSIM_PADAT            0x86            /* Port A Data (r/w) */
-#define MCFSIM_PBCNT            0x88            /* Port B Control (r/w) */
-#define MCFSIM_PBDDR            0x8c            /* Port B Direction (r/w) */
-#define MCFSIM_PBDAT            0x8e            /* Port B Data (r/w) */
-#define MCFSIM_PCDDR            0x94            /* Port C Direction (r/w) */
-#define MCFSIM_PCDAT            0x96            /* Port C Data (r/w) */
-#define MCFSIM_PDCNT            0x98            /* Port D Control (r/w) */
+#define MCFSIM_PACNT            (MCF_MBAR + 0x80) /* Port A Control (r/w) */
+#define MCFSIM_PADDR            (MCF_MBAR + 0x84) /* Port A Direction (r/w) */
+#define MCFSIM_PADAT            (MCF_MBAR + 0x86) /* Port A Data (r/w) */
+#define MCFSIM_PBCNT            (MCF_MBAR + 0x88) /* Port B Control (r/w) */
+#define MCFSIM_PBDDR            (MCF_MBAR + 0x8c) /* Port B Direction (r/w) */
+#define MCFSIM_PBDAT            (MCF_MBAR + 0x8e) /* Port B Data (r/w) */
+#define MCFSIM_PCDDR            (MCF_MBAR + 0x94) /* Port C Direction (r/w) */
+#define MCFSIM_PCDAT            (MCF_MBAR + 0x96) /* Port C Data (r/w) */
+#define MCFSIM_PDCNT            (MCF_MBAR + 0x98) /* Port D Control (r/w) */
+
+/*
+ *      Define system peripheral IRQ usage.
+ */
+#define MCFINT_VECBASE          64              /* Base of interrupts */
+#define MCF_IRQ_SPURIOUS        64              /* User Spurious */
+#define MCF_IRQ_EINT1           65              /* External Interrupt 1 */
+#define MCF_IRQ_EINT2           66              /* External Interrupt 2 */
+#define MCF_IRQ_EINT3           67              /* External Interrupt 3 */
+#define MCF_IRQ_EINT4           68              /* External Interrupt 4 */
+#define MCF_IRQ_TIMER1          69              /* Timer 1 */
+#define MCF_IRQ_TIMER2          70              /* Timer 2 */
+#define MCF_IRQ_TIMER3          71              /* Timer 3 */
+#define MCF_IRQ_TIMER4          72              /* Timer 4 */
+#define MCF_IRQ_UART1           73              /* UART 1 */
+#define MCF_IRQ_UART2           74              /* UART 2 */
+#define MCF_IRQ_PLIP            75              /* PLIC 2Khz Periodic */
+#define MCF_IRQ_PLIA            76              /* PLIC Asynchronous */
+#define MCF_IRQ_USB0            77              /* USB Endpoint 0 */
+#define MCF_IRQ_USB1            78              /* USB Endpoint 1 */
+#define MCF_IRQ_USB2            79              /* USB Endpoint 2 */
+#define MCF_IRQ_USB3            80              /* USB Endpoint 3 */
+#define MCF_IRQ_USB4            81              /* USB Endpoint 4 */
+#define MCF_IRQ_USB5            82              /* USB Endpoint 5 */
+#define MCF_IRQ_USB6            83              /* USB Endpoint 6 */
+#define MCF_IRQ_USB7            84              /* USB Endpoint 7 */
+#define MCF_IRQ_DMA             85              /* DMA Controller */
+#define MCF_IRQ_ERX             86              /* Ethernet Receiver */
+#define MCF_IRQ_ETX             87              /* Ethernet Transmitter */
+#define MCF_IRQ_ENTC            88              /* Ethernet Non-Time Critical */
+#define MCF_IRQ_QSPI            89              /* Queued Serial Interface */
+#define MCF_IRQ_EINT5           90              /* External Interrupt 5 */
+#define MCF_IRQ_EINT6           91              /* External Interrupt 6 */
+#define MCF_IRQ_SWTO            92              /* Software Watchdog */
+#define MCFINT_VECMAX           95              /* Maxmum interrupt */
 
+#define MCF_IRQ_TIMER           MCF_IRQ_TIMER1
+#define MCF_IRQ_PROFILER        MCF_IRQ_TIMER2
 
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PIN_MAX                 48
+#define MCFGPIO_IRQ_MAX                 -1
+#define MCFGPIO_IRQ_VECBASE             -1
 /****************************************************************************/
 #endif  /* m5272sim_h */
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 95f4f8ee8f7c..453356d72d80 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -54,6 +54,175 @@
 #define MCFSIM_DMR1             0x5c            /* SDRAM address mask 1 */
 #endif
 
+
+#ifdef CONFIG_M5271
+#define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100000)
+#define MCFGPIO_PODR_DATAH      (MCF_IPSBAR + 0x100001)
+#define MCFGPIO_PODR_DATAL      (MCF_IPSBAR + 0x100002)
+#define MCFGPIO_PODR_BUSCTL     (MCF_IPSBAR + 0x100003)
+#define MCFGPIO_PODR_BS         (MCF_IPSBAR + 0x100004)
+#define MCFGPIO_PODR_CS         (MCF_IPSBAR + 0x100005)
+#define MCFGPIO_PODR_SDRAM      (MCF_IPSBAR + 0x100006)
+#define MCFGPIO_PODR_FECI2C     (MCF_IPSBAR + 0x100007)
+#define MCFGPIO_PODR_UARTH      (MCF_IPSBAR + 0x100008)
+#define MCFGPIO_PODR_UARTL      (MCF_IPSBAR + 0x100009)
+#define MCFGPIO_PODR_QSPI       (MCF_IPSBAR + 0x10000A)
+#define MCFGPIO_PODR_TIMER      (MCF_IPSBAR + 0x10000B)
+
+#define MCFGPIO_PDDR_ADDR       (MCF_IPSBAR + 0x100010)
+#define MCFGPIO_PDDR_DATAH      (MCF_IPSBAR + 0x100011)
+#define MCFGPIO_PDDR_DATAL      (MCF_IPSBAR + 0x100012)
+#define MCFGPIO_PDDR_BUSCTL     (MCF_IPSBAR + 0x100013)
+#define MCFGPIO_PDDR_BS         (MCF_IPSBAR + 0x100014)
+#define MCFGPIO_PDDR_CS         (MCF_IPSBAR + 0x100015)
+#define MCFGPIO_PDDR_SDRAM      (MCF_IPSBAR + 0x100016)
+#define MCFGPIO_PDDR_FECI2C     (MCF_IPSBAR + 0x100017)
+#define MCFGPIO_PDDR_UARTH      (MCF_IPSBAR + 0x100018)
+#define MCFGPIO_PDDR_UARTL      (MCF_IPSBAR + 0x100019)
+#define MCFGPIO_PDDR_QSPI       (MCF_IPSBAR + 0x10001A)
+#define MCFGPIO_PDDR_TIMER      (MCF_IPSBAR + 0x10001B)
+
+#define MCFGPIO_PPDSDR_ADDR     (MCF_IPSBAR + 0x100020)
+#define MCFGPIO_PPDSDR_DATAH    (MCF_IPSBAR + 0x100021)
+#define MCFGPIO_PPDSDR_DATAL    (MCF_IPSBAR + 0x100022)
+#define MCFGPIO_PPDSDR_BUSCTL   (MCF_IPSBAR + 0x100023)
+#define MCFGPIO_PPDSDR_BS       (MCF_IPSBAR + 0x100024)
+#define MCFGPIO_PPDSDR_CS       (MCF_IPSBAR + 0x100025)
+#define MCFGPIO_PPDSDR_SDRAM    (MCF_IPSBAR + 0x100026)
+#define MCFGPIO_PPDSDR_FECI2C   (MCF_IPSBAR + 0x100027)
+#define MCFGPIO_PPDSDR_UARTH    (MCF_IPSBAR + 0x100028)
+#define MCFGPIO_PPDSDR_UARTL    (MCF_IPSBAR + 0x100029)
+#define MCFGPIO_PPDSDR_QSPI     (MCF_IPSBAR + 0x10002A)
+#define MCFGPIO_PPDSDR_TIMER    (MCF_IPSBAR + 0x10002B)
+
+#define MCFGPIO_PCLRR_ADDR      (MCF_IPSBAR + 0x100030)
+#define MCFGPIO_PCLRR_DATAH     (MCF_IPSBAR + 0x100031)
+#define MCFGPIO_PCLRR_DATAL     (MCF_IPSBAR + 0x100032)
+#define MCFGPIO_PCLRR_BUSCTL    (MCF_IPSBAR + 0x100033)
+#define MCFGPIO_PCLRR_BS        (MCF_IPSBAR + 0x100034)
+#define MCFGPIO_PCLRR_CS        (MCF_IPSBAR + 0x100035)
+#define MCFGPIO_PCLRR_SDRAM     (MCF_IPSBAR + 0x100036)
+#define MCFGPIO_PCLRR_FECI2C    (MCF_IPSBAR + 0x100037)
+#define MCFGPIO_PCLRR_UARTH     (MCF_IPSBAR + 0x100038)
+#define MCFGPIO_PCLRR_UARTL     (MCF_IPSBAR + 0x100039)
+#define MCFGPIO_PCLRR_QSPI      (MCF_IPSBAR + 0x10003A)
+#define MCFGPIO_PCLRR_TIMER     (MCF_IPSBAR + 0x10003B)
+
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PODR                    MCFGPIO_PODR_ADDR
+#define MCFGPIO_PDDR                    MCFGPIO_PDDR_ADDR
+#define MCFGPIO_PPDR                    MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_SETR                    MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_CLRR                    MCFGPIO_PCLRR_ADDR
+
+#define MCFGPIO_PIN_MAX                 100
+#define MCFGPIO_IRQ_MAX                 8
+#define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
+#endif
+
+#ifdef CONFIG_M5275
+#define MCFGPIO_PODR_BUSCTL     (MCF_IPSBAR + 0x100004)
+#define MCFGPIO_PODR_ADDR       (MCF_IPSBAR + 0x100005)
+#define MCFGPIO_PODR_CS         (MCF_IPSBAR + 0x100008)
+#define MCFGPIO_PODR_FEC0H      (MCF_IPSBAR + 0x10000A)
+#define MCFGPIO_PODR_FEC0L      (MCF_IPSBAR + 0x10000B)
+#define MCFGPIO_PODR_FECI2C     (MCF_IPSBAR + 0x10000C)
+#define MCFGPIO_PODR_QSPI       (MCF_IPSBAR + 0x10000D)
+#define MCFGPIO_PODR_SDRAM      (MCF_IPSBAR + 0x10000E)
+#define MCFGPIO_PODR_TIMERH     (MCF_IPSBAR + 0x10000F)
+#define MCFGPIO_PODR_TIMERL     (MCF_IPSBAR + 0x100010)
+#define MCFGPIO_PODR_UARTL      (MCF_IPSBAR + 0x100011)
+#define MCFGPIO_PODR_FEC1H      (MCF_IPSBAR + 0x100012)
+#define MCFGPIO_PODR_FEC1L      (MCF_IPSBAR + 0x100013)
+#define MCFGPIO_PODR_BS         (MCF_IPSBAR + 0x100014)
+#define MCFGPIO_PODR_IRQ        (MCF_IPSBAR + 0x100015)
+#define MCFGPIO_PODR_USBH       (MCF_IPSBAR + 0x100016)
+#define MCFGPIO_PODR_USBL       (MCF_IPSBAR + 0x100017)
+#define MCFGPIO_PODR_UARTH      (MCF_IPSBAR + 0x100018)
+
+#define MCFGPIO_PDDR_BUSCTL     (MCF_IPSBAR + 0x100020)
+#define MCFGPIO_PDDR_ADDR       (MCF_IPSBAR + 0x100021)
+#define MCFGPIO_PDDR_CS         (MCF_IPSBAR + 0x100024)
+#define MCFGPIO_PDDR_FEC0H      (MCF_IPSBAR + 0x100026)
+#define MCFGPIO_PDDR_FEC0L      (MCF_IPSBAR + 0x100027)
+#define MCFGPIO_PDDR_FECI2C     (MCF_IPSBAR + 0x100028)
+#define MCFGPIO_PDDR_QSPI       (MCF_IPSBAR + 0x100029)
+#define MCFGPIO_PDDR_SDRAM      (MCF_IPSBAR + 0x10002A)
+#define MCFGPIO_PDDR_TIMERH     (MCF_IPSBAR + 0x10002B)
+#define MCFGPIO_PDDR_TIMERL     (MCF_IPSBAR + 0x10002C)
+#define MCFGPIO_PDDR_UARTL      (MCF_IPSBAR + 0x10002D)
+#define MCFGPIO_PDDR_FEC1H      (MCF_IPSBAR + 0x10002E)
+#define MCFGPIO_PDDR_FEC1L      (MCF_IPSBAR + 0x10002F)
+#define MCFGPIO_PDDR_BS         (MCF_IPSBAR + 0x100030)
+#define MCFGPIO_PDDR_IRQ        (MCF_IPSBAR + 0x100031)
+#define MCFGPIO_PDDR_USBH       (MCF_IPSBAR + 0x100032)
+#define MCFGPIO_PDDR_USBL       (MCF_IPSBAR + 0x100033)
+#define MCFGPIO_PDDR_UARTH      (MCF_IPSBAR + 0x100034)
+
+#define MCFGPIO_PPDSDR_BUSCTL   (MCF_IPSBAR + 0x10003C)
+#define MCFGPIO_PPDSDR_ADDR     (MCF_IPSBAR + 0x10003D)
+#define MCFGPIO_PPDSDR_CS       (MCF_IPSBAR + 0x100040)
+#define MCFGPIO_PPDSDR_FEC0H    (MCF_IPSBAR + 0x100042)
+#define MCFGPIO_PPDSDR_FEC0L    (MCF_IPSBAR + 0x100043)
+#define MCFGPIO_PPDSDR_FECI2C   (MCF_IPSBAR + 0x100044)
+#define MCFGPIO_PPDSDR_QSPI     (MCF_IPSBAR + 0x100045)
+#define MCFGPIO_PPDSDR_SDRAM    (MCF_IPSBAR + 0x100046)
+#define MCFGPIO_PPDSDR_TIMERH   (MCF_IPSBAR + 0x100047)
+#define MCFGPIO_PPDSDR_TIMERL   (MCF_IPSBAR + 0x100048)
+#define MCFGPIO_PPDSDR_UARTL    (MCF_IPSBAR + 0x100049)
+#define MCFGPIO_PPDSDR_FEC1H    (MCF_IPSBAR + 0x10004A)
+#define MCFGPIO_PPDSDR_FEC1L    (MCF_IPSBAR + 0x10004B)
+#define MCFGPIO_PPDSDR_BS       (MCF_IPSBAR + 0x10004C)
+#define MCFGPIO_PPDSDR_IRQ      (MCF_IPSBAR + 0x10004D)
+#define MCFGPIO_PPDSDR_USBH     (MCF_IPSBAR + 0x10004E)
+#define MCFGPIO_PPDSDR_USBL     (MCF_IPSBAR + 0x10004F)
+#define MCFGPIO_PPDSDR_UARTH    (MCF_IPSBAR + 0x100050)
+
+#define MCFGPIO_PCLRR_BUSCTL    (MCF_IPSBAR + 0x100058)
+#define MCFGPIO_PCLRR_ADDR      (MCF_IPSBAR + 0x100059)
+#define MCFGPIO_PCLRR_CS        (MCF_IPSBAR + 0x10005C)
+#define MCFGPIO_PCLRR_FEC0H     (MCF_IPSBAR + 0x10005E)
+#define MCFGPIO_PCLRR_FEC0L     (MCF_IPSBAR + 0x10005F)
+#define MCFGPIO_PCLRR_FECI2C    (MCF_IPSBAR + 0x100060)
+#define MCFGPIO_PCLRR_QSPI      (MCF_IPSBAR + 0x100061)
+#define MCFGPIO_PCLRR_SDRAM     (MCF_IPSBAR + 0x100062)
+#define MCFGPIO_PCLRR_TIMERH    (MCF_IPSBAR + 0x100063)
+#define MCFGPIO_PCLRR_TIMERL    (MCF_IPSBAR + 0x100064)
+#define MCFGPIO_PCLRR_UARTL     (MCF_IPSBAR + 0x100065)
+#define MCFGPIO_PCLRR_FEC1H     (MCF_IPSBAR + 0x100066)
+#define MCFGPIO_PCLRR_FEC1L     (MCF_IPSBAR + 0x100067)
+#define MCFGPIO_PCLRR_BS        (MCF_IPSBAR + 0x100068)
+#define MCFGPIO_PCLRR_IRQ       (MCF_IPSBAR + 0x100069)
+#define MCFGPIO_PCLRR_USBH      (MCF_IPSBAR + 0x10006A)
+#define MCFGPIO_PCLRR_USBL      (MCF_IPSBAR + 0x10006B)
+#define MCFGPIO_PCLRR_UARTH     (MCF_IPSBAR + 0x10006C)
+
+
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PODR                    MCFGPIO_PODR_BUSCTL
+#define MCFGPIO_PDDR                    MCFGPIO_PDDR_BUSCTL
+#define MCFGPIO_PPDR                    MCFGPIO_PPDSDR_BUSCTL
+#define MCFGPIO_SETR                    MCFGPIO_PPDSDR_BUSCTL
+#define MCFGPIO_CLRR                    MCFGPIO_PCLRR_BUSCTL
+
+#define MCFGPIO_PIN_MAX                 148
+#define MCFGPIO_IRQ_MAX                 8
+#define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
+#endif
+
+/*
+ * EPort
+ */
+
+#define MCFEPORT_EPDDR          (MCF_IPSBAR + 0x130002)
+#define MCFEPORT_EPDR           (MCF_IPSBAR + 0x130004)
+#define MCFEPORT_EPPDR          (MCF_IPSBAR + 0x130005)
+
+
 /*
  *      GPIO pins setups to enable the UARTs.
  */
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index d79c49f8134a..e2ad1f42b657 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -41,6 +41,157 @@
 #define MCFSIM_DMR1             0x54            /* SDRAM address mask 1 */
 
 /*
+ *      GPIO registers
+ */
+#define MCFGPIO_PORTA           (MCF_IPSBAR + 0x00100000)
+#define MCFGPIO_PORTB           (MCF_IPSBAR + 0x00100001)
+#define MCFGPIO_PORTC           (MCF_IPSBAR + 0x00100002)
+#define MCFGPIO_PORTD           (MCF_IPSBAR + 0x00100003)
+#define MCFGPIO_PORTE           (MCF_IPSBAR + 0x00100004)
+#define MCFGPIO_PORTF           (MCF_IPSBAR + 0x00100005)
+#define MCFGPIO_PORTG           (MCF_IPSBAR + 0x00100006)
+#define MCFGPIO_PORTH           (MCF_IPSBAR + 0x00100007)
+#define MCFGPIO_PORTJ           (MCF_IPSBAR + 0x00100008)
+#define MCFGPIO_PORTDD          (MCF_IPSBAR + 0x00100009)
+#define MCFGPIO_PORTEH          (MCF_IPSBAR + 0x0010000A)
+#define MCFGPIO_PORTEL          (MCF_IPSBAR + 0x0010000B)
+#define MCFGPIO_PORTAS          (MCF_IPSBAR + 0x0010000C)
+#define MCFGPIO_PORTQS          (MCF_IPSBAR + 0x0010000D)
+#define MCFGPIO_PORTSD          (MCF_IPSBAR + 0x0010000E)
+#define MCFGPIO_PORTTC          (MCF_IPSBAR + 0x0010000F)
+#define MCFGPIO_PORTTD          (MCF_IPSBAR + 0x00100010)
+#define MCFGPIO_PORTUA          (MCF_IPSBAR + 0x00100011)
+
+#define MCFGPIO_DDRA            (MCF_IPSBAR + 0x00100014)
+#define MCFGPIO_DDRB            (MCF_IPSBAR + 0x00100015)
+#define MCFGPIO_DDRC            (MCF_IPSBAR + 0x00100016)
+#define MCFGPIO_DDRD            (MCF_IPSBAR + 0x00100017)
+#define MCFGPIO_DDRE            (MCF_IPSBAR + 0x00100018)
+#define MCFGPIO_DDRF            (MCF_IPSBAR + 0x00100019)
+#define MCFGPIO_DDRG            (MCF_IPSBAR + 0x0010001A)
+#define MCFGPIO_DDRH            (MCF_IPSBAR + 0x0010001B)
+#define MCFGPIO_DDRJ            (MCF_IPSBAR + 0x0010001C)
+#define MCFGPIO_DDRDD           (MCF_IPSBAR + 0x0010001D)
+#define MCFGPIO_DDREH           (MCF_IPSBAR + 0x0010001E)
+#define MCFGPIO_DDREL           (MCF_IPSBAR + 0x0010001F)
+#define MCFGPIO_DDRAS           (MCF_IPSBAR + 0x00100020)
+#define MCFGPIO_DDRQS           (MCF_IPSBAR + 0x00100021)
+#define MCFGPIO_DDRSD           (MCF_IPSBAR + 0x00100022)
+#define MCFGPIO_DDRTC           (MCF_IPSBAR + 0x00100023)
+#define MCFGPIO_DDRTD           (MCF_IPSBAR + 0x00100024)
+#define MCFGPIO_DDRUA           (MCF_IPSBAR + 0x00100025)
+
+#define MCFGPIO_PORTAP          (MCF_IPSBAR + 0x00100028)
+#define MCFGPIO_PORTBP          (MCF_IPSBAR + 0x00100029)
+#define MCFGPIO_PORTCP          (MCF_IPSBAR + 0x0010002A)
+#define MCFGPIO_PORTDP          (MCF_IPSBAR + 0x0010002B)
+#define MCFGPIO_PORTEP          (MCF_IPSBAR + 0x0010002C)
+#define MCFGPIO_PORTFP          (MCF_IPSBAR + 0x0010002D)
+#define MCFGPIO_PORTGP          (MCF_IPSBAR + 0x0010002E)
+#define MCFGPIO_PORTHP          (MCF_IPSBAR + 0x0010002F)
+#define MCFGPIO_PORTJP          (MCF_IPSBAR + 0x00100030)
+#define MCFGPIO_PORTDDP         (MCF_IPSBAR + 0x00100031)
+#define MCFGPIO_PORTEHP         (MCF_IPSBAR + 0x00100032)
+#define MCFGPIO_PORTELP         (MCF_IPSBAR + 0x00100033)
+#define MCFGPIO_PORTASP         (MCF_IPSBAR + 0x00100034)
+#define MCFGPIO_PORTQSP         (MCF_IPSBAR + 0x00100035)
+#define MCFGPIO_PORTSDP         (MCF_IPSBAR + 0x00100036)
+#define MCFGPIO_PORTTCP         (MCF_IPSBAR + 0x00100037)
+#define MCFGPIO_PORTTDP         (MCF_IPSBAR + 0x00100038)
+#define MCFGPIO_PORTUAP         (MCF_IPSBAR + 0x00100039)
+
+#define MCFGPIO_SETA            (MCF_IPSBAR + 0x00100028)
+#define MCFGPIO_SETB            (MCF_IPSBAR + 0x00100029)
+#define MCFGPIO_SETC            (MCF_IPSBAR + 0x0010002A)
+#define MCFGPIO_SETD            (MCF_IPSBAR + 0x0010002B)
+#define MCFGPIO_SETE            (MCF_IPSBAR + 0x0010002C)
+#define MCFGPIO_SETF            (MCF_IPSBAR + 0x0010002D)
+#define MCFGPIO_SETG            (MCF_IPSBAR + 0x0010002E)
+#define MCFGPIO_SETH            (MCF_IPSBAR + 0x0010002F)
+#define MCFGPIO_SETJ            (MCF_IPSBAR + 0x00100030)
+#define MCFGPIO_SETDD           (MCF_IPSBAR + 0x00100031)
+#define MCFGPIO_SETEH           (MCF_IPSBAR + 0x00100032)
+#define MCFGPIO_SETEL           (MCF_IPSBAR + 0x00100033)
+#define MCFGPIO_SETAS           (MCF_IPSBAR + 0x00100034)
+#define MCFGPIO_SETQS           (MCF_IPSBAR + 0x00100035)
+#define MCFGPIO_SETSD           (MCF_IPSBAR + 0x00100036)
+#define MCFGPIO_SETTC           (MCF_IPSBAR + 0x00100037)
+#define MCFGPIO_SETTD           (MCF_IPSBAR + 0x00100038)
+#define MCFGPIO_SETUA           (MCF_IPSBAR + 0x00100039)
+
+#define MCFGPIO_CLRA            (MCF_IPSBAR + 0x0010003C)
+#define MCFGPIO_CLRB            (MCF_IPSBAR + 0x0010003D)
+#define MCFGPIO_CLRC            (MCF_IPSBAR + 0x0010003E)
+#define MCFGPIO_CLRD            (MCF_IPSBAR + 0x0010003F)
+#define MCFGPIO_CLRE            (MCF_IPSBAR + 0x00100040)
+#define MCFGPIO_CLRF            (MCF_IPSBAR + 0x00100041)
+#define MCFGPIO_CLRG            (MCF_IPSBAR + 0x00100042)
+#define MCFGPIO_CLRH            (MCF_IPSBAR + 0x00100043)
+#define MCFGPIO_CLRJ            (MCF_IPSBAR + 0x00100044)
+#define MCFGPIO_CLRDD           (MCF_IPSBAR + 0x00100045)
+#define MCFGPIO_CLREH           (MCF_IPSBAR + 0x00100046)
+#define MCFGPIO_CLREL           (MCF_IPSBAR + 0x00100047)
+#define MCFGPIO_CLRAS           (MCF_IPSBAR + 0x00100048)
+#define MCFGPIO_CLRQS           (MCF_IPSBAR + 0x00100049)
+#define MCFGPIO_CLRSD           (MCF_IPSBAR + 0x0010004A)
+#define MCFGPIO_CLRTC           (MCF_IPSBAR + 0x0010004B)
+#define MCFGPIO_CLRTD           (MCF_IPSBAR + 0x0010004C)
+#define MCFGPIO_CLRUA           (MCF_IPSBAR + 0x0010004D)
+
+#define MCFGPIO_PBCDPAR         (MCF_IPSBAR + 0x00100050)
+#define MCFGPIO_PFPAR           (MCF_IPSBAR + 0x00100051)
+#define MCFGPIO_PEPAR           (MCF_IPSBAR + 0x00100052)
+#define MCFGPIO_PJPAR           (MCF_IPSBAR + 0x00100054)
+#define MCFGPIO_PSDPAR          (MCF_IPSBAR + 0x00100055)
+#define MCFGPIO_PASPAR          (MCF_IPSBAR + 0x00100056)
+#define MCFGPIO_PEHLPAR         (MCF_IPSBAR + 0x00100058)
+#define MCFGPIO_PQSPAR          (MCF_IPSBAR + 0x00100059)
+#define MCFGPIO_PTCPAR          (MCF_IPSBAR + 0x0010005A)
+#define MCFGPIO_PTDPAR          (MCF_IPSBAR + 0x0010005B)
+#define MCFGPIO_PUAPAR          (MCF_IPSBAR + 0x0010005C)
+
+/*
+ *      Edge Port registers
+ */
+#define MCFEPORT_EPPAR          (MCF_IPSBAR + 0x00130000)
+#define MCFEPORT_EPDDR          (MCF_IPSBAR + 0x00130002)
+#define MCFEPORT_EPIER          (MCF_IPSBAR + 0x00130003)
+#define MCFEPORT_EPDR           (MCF_IPSBAR + 0x00130004)
+#define MCFEPORT_EPPDR          (MCF_IPSBAR + 0x00130005)
+#define MCFEPORT_EPFR           (MCF_IPSBAR + 0x00130006)
+
+/*
+ *      Queued ADC registers
+ */
+#define MCFQADC_PORTQA          (MCF_IPSBAR + 0x00190006)
+#define MCFQADC_PORTQB          (MCF_IPSBAR + 0x00190007)
+#define MCFQADC_DDRQA           (MCF_IPSBAR + 0x00190008)
+#define MCFQADC_DDRQB           (MCF_IPSBAR + 0x00190009)
+
+/*
+ *      General Purpose Timers registers
+ */
+#define MCFGPTA_GPTPORT         (MCF_IPSBAR + 0x001A001D)
+#define MCFGPTA_GPTDDR          (MCF_IPSBAR + 0x001A001E)
+#define MCFGPTB_GPTPORT         (MCF_IPSBAR + 0x001B001D)
+#define MCFGPTB_GPTDDR          (MCF_IPSBAR + 0x001B001E)
+/*
+ *
+ * definitions for generic gpio support
+ *
+ */
+#define MCFGPIO_PODR            MCFGPIO_PORTA   /* port output data */
+#define MCFGPIO_PDDR            MCFGPIO_DDRA    /* port data direction */
+#define MCFGPIO_PPDR            MCFGPIO_PORTAP  /* port pin data */
+#define MCFGPIO_SETR            MCFGPIO_SETA    /* set output */
+#define MCFGPIO_CLRR            MCFGPIO_CLRA    /* clr output */
+
+#define MCFGPIO_IRQ_MAX         8
+#define MCFGPIO_IRQ_VECBASE     MCFINT_VECBASE
+#define MCFGPIO_PIN_MAX         180
+
+
+/*
  *      Derek Cheung - 6 Feb 2005
  *              add I2C and QSPI register definition using Freescale's MCF5282
  */
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 5886728409c0..c6830e5b54ce 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -90,8 +90,15 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
-#define MCFSIM_PADDR            0x244           /* Parallel Direction (r/w) */
-#define MCFSIM_PADAT            0x248           /* Parallel Data (r/w) */
+#define MCFSIM_PADDR            (MCF_MBAR + 0x244)
+#define MCFSIM_PADAT            (MCF_MBAR + 0x248)
+
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PIN_MAX                 16
+#define MCFGPIO_IRQ_MAX                 -1
+#define MCFGPIO_IRQ_VECBASE             -1
 
 
 /* Definition offset address for CS2-7  -- old mask 5307 */
@@ -117,22 +124,6 @@
 #define MCFSIM_DMA2ICR          MCFSIM_ICR8     /* DMA 2 ICR */
 #define MCFSIM_DMA3ICR          MCFSIM_ICR9     /* DMA 3 ICR */
 
-#if defined(CONFIG_M5307)
-#define MCFSIM_IMR_MASKALL      0x3fffe         /* All SIM intr sources */
-#endif
-
-/*
- *      Macro to set IMR register. It is 32 bits on the 5307.
- */
-#define mcf_getimr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
-
-#define mcf_setimr(imr)         \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
-
-#define mcf_getipr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
-
 
 /*
  *      Some symbol defines for the Parallel Port Pin Assignment Register
@@ -149,6 +140,11 @@
 #define IRQ3_LEVEL6     0x40
 #define IRQ1_LEVEL2     0x20
 
+/*
+ *      Define system peripheral IRQ usage.
+ */
+#define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
+#define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
 /*
  *      Define the Cache register flags.
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index eb7fd4448947..36bf15aec9ae 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -56,47 +56,21 @@
 #define MCFSIM_DMA3ICR          MCFSIM_ICR9     /* DMA 3 ICR */
 
 
-#define MCFSIM_IMR_MASKALL      0xFFFFFFFF      /* All SIM intr sources */
-
-#define MCFSIM_IMR_SIMR0        0xFC04801C
-#define MCFSIM_IMR_SIMR1        0xFC04C01C
-#define MCFSIM_IMR_CIMR0        0xFC04801D
-#define MCFSIM_IMR_CIMR1        0xFC04C01D
+#define MCFINTC0_SIMR           0xFC04801C
+#define MCFINTC0_CIMR           0xFC04801D
+#define MCFINTC0_ICR0           0xFC048040
+#define MCFINTC1_SIMR           0xFC04C01C
+#define MCFINTC1_CIMR           0xFC04C01D
+#define MCFINTC1_ICR0           0xFC04C040
 
 #define MCFSIM_ICR_TIMER1       (0xFC048040+32)
 #define MCFSIM_ICR_TIMER2       (0xFC048040+33)
 
-
 /*
- *      Macro to set IMR register. It is 32 bits on the 5307.
+ *      Define system peripheral IRQ usage.
  */
-#define mcf_getimr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
-
-#define mcf_setimr(imr)         \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
-
-#define mcf_getipr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
-
-#define mcf_getiprl()           \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRL))
-
-#define mcf_getiprh()           \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRH))
-
-
-#define mcf_enable_irq0(irq)            \
-        *((volatile unsigned char*) (MCFSIM_IMR_CIMR0)) = (irq);
-
-#define mcf_enable_irq1(irq)            \
-        *((volatile unsigned char*) (MCFSIM_IMR_CIMR1)) = (irq);
-
-#define mcf_disable_irq0(irq)           \
-        *((volatile unsigned char*) (MCFSIM_IMR_SIMR0)) = (irq);
-
-#define mcf_disable_irq1(irq)           \
-        *((volatile unsigned char*) (MCFSIM_IMR_SIMR1)) = (irq);
+#define MCF_IRQ_TIMER           (64 + 32)       /* Timer0 */
+#define MCF_IRQ_PROFILER        (64 + 33)       /* Timer1 */
 
 /*
  *      Define the Cache register flags.
@@ -422,70 +396,70 @@
  *********************************************************************/
 
 /* Register read/write macros */
-#define MCF_GPIO_PODR_FECH              MCF_REG08(0xFC0A4000)
-#define MCF_GPIO_PODR_FECL              MCF_REG08(0xFC0A4001)
-#define MCF_GPIO_PODR_SSI               MCF_REG08(0xFC0A4002)
-#define MCF_GPIO_PODR_BUSCTL            MCF_REG08(0xFC0A4003)
-#define MCF_GPIO_PODR_BE                MCF_REG08(0xFC0A4004)
-#define MCF_GPIO_PODR_CS                MCF_REG08(0xFC0A4005)
-#define MCF_GPIO_PODR_PWM               MCF_REG08(0xFC0A4006)
-#define MCF_GPIO_PODR_FECI2C            MCF_REG08(0xFC0A4007)
-#define MCF_GPIO_PODR_UART              MCF_REG08(0xFC0A4009)
-#define MCF_GPIO_PODR_QSPI              MCF_REG08(0xFC0A400A)
-#define MCF_GPIO_PODR_TIMER             MCF_REG08(0xFC0A400B)
-#define MCF_GPIO_PODR_LCDDATAH          MCF_REG08(0xFC0A400D)
-#define MCF_GPIO_PODR_LCDDATAM          MCF_REG08(0xFC0A400E)
-#define MCF_GPIO_PODR_LCDDATAL          MCF_REG08(0xFC0A400F)
-#define MCF_GPIO_PODR_LCDCTLH           MCF_REG08(0xFC0A4010)
-#define MCF_GPIO_PODR_LCDCTLL           MCF_REG08(0xFC0A4011)
-#define MCF_GPIO_PDDR_FECH              MCF_REG08(0xFC0A4014)
-#define MCF_GPIO_PDDR_FECL              MCF_REG08(0xFC0A4015)
-#define MCF_GPIO_PDDR_SSI               MCF_REG08(0xFC0A4016)
-#define MCF_GPIO_PDDR_BUSCTL            MCF_REG08(0xFC0A4017)
-#define MCF_GPIO_PDDR_BE                MCF_REG08(0xFC0A4018)
-#define MCF_GPIO_PDDR_CS                MCF_REG08(0xFC0A4019)
-#define MCF_GPIO_PDDR_PWM               MCF_REG08(0xFC0A401A)
-#define MCF_GPIO_PDDR_FECI2C            MCF_REG08(0xFC0A401B)
-#define MCF_GPIO_PDDR_UART              MCF_REG08(0xFC0A401C)
-#define MCF_GPIO_PDDR_QSPI              MCF_REG08(0xFC0A401E)
-#define MCF_GPIO_PDDR_TIMER             MCF_REG08(0xFC0A401F)
-#define MCF_GPIO_PDDR_LCDDATAH          MCF_REG08(0xFC0A4021)
-#define MCF_GPIO_PDDR_LCDDATAM          MCF_REG08(0xFC0A4022)
-#define MCF_GPIO_PDDR_LCDDATAL          MCF_REG08(0xFC0A4023)
-#define MCF_GPIO_PDDR_LCDCTLH           MCF_REG08(0xFC0A4024)
-#define MCF_GPIO_PDDR_LCDCTLL           MCF_REG08(0xFC0A4025)
-#define MCF_GPIO_PPDSDR_FECH            MCF_REG08(0xFC0A4028)
-#define MCF_GPIO_PPDSDR_FECL            MCF_REG08(0xFC0A4029)
-#define MCF_GPIO_PPDSDR_SSI             MCF_REG08(0xFC0A402A)
-#define MCF_GPIO_PPDSDR_BUSCTL          MCF_REG08(0xFC0A402B)
-#define MCF_GPIO_PPDSDR_BE              MCF_REG08(0xFC0A402C)
-#define MCF_GPIO_PPDSDR_CS              MCF_REG08(0xFC0A402D)
-#define MCF_GPIO_PPDSDR_PWM             MCF_REG08(0xFC0A402E)
-#define MCF_GPIO_PPDSDR_FECI2C          MCF_REG08(0xFC0A402F)
-#define MCF_GPIO_PPDSDR_UART            MCF_REG08(0xFC0A4031)
-#define MCF_GPIO_PPDSDR_QSPI            MCF_REG08(0xFC0A4032)
-#define MCF_GPIO_PPDSDR_TIMER           MCF_REG08(0xFC0A4033)
-#define MCF_GPIO_PPDSDR_LCDDATAH        MCF_REG08(0xFC0A4035)
-#define MCF_GPIO_PPDSDR_LCDDATAM        MCF_REG08(0xFC0A4036)
-#define MCF_GPIO_PPDSDR_LCDDATAL        MCF_REG08(0xFC0A4037)
-#define MCF_GPIO_PPDSDR_LCDCTLH         MCF_REG08(0xFC0A4038)
-#define MCF_GPIO_PPDSDR_LCDCTLL         MCF_REG08(0xFC0A4039)
-#define MCF_GPIO_PCLRR_FECH             MCF_REG08(0xFC0A403C)
-#define MCF_GPIO_PCLRR_FECL             MCF_REG08(0xFC0A403D)
-#define MCF_GPIO_PCLRR_SSI              MCF_REG08(0xFC0A403E)
-#define MCF_GPIO_PCLRR_BUSCTL           MCF_REG08(0xFC0A403F)
-#define MCF_GPIO_PCLRR_BE               MCF_REG08(0xFC0A4040)
-#define MCF_GPIO_PCLRR_CS               MCF_REG08(0xFC0A4041)
-#define MCF_GPIO_PCLRR_PWM              MCF_REG08(0xFC0A4042)
-#define MCF_GPIO_PCLRR_FECI2C           MCF_REG08(0xFC0A4043)
-#define MCF_GPIO_PCLRR_UART             MCF_REG08(0xFC0A4045)
-#define MCF_GPIO_PCLRR_QSPI             MCF_REG08(0xFC0A4046)
-#define MCF_GPIO_PCLRR_TIMER            MCF_REG08(0xFC0A4047)
-#define MCF_GPIO_PCLRR_LCDDATAH         MCF_REG08(0xFC0A4049)
-#define MCF_GPIO_PCLRR_LCDDATAM         MCF_REG08(0xFC0A404A)
-#define MCF_GPIO_PCLRR_LCDDATAL         MCF_REG08(0xFC0A404B)
-#define MCF_GPIO_PCLRR_LCDCTLH          MCF_REG08(0xFC0A404C)
-#define MCF_GPIO_PCLRR_LCDCTLL          MCF_REG08(0xFC0A404D)
+#define MCFGPIO_PODR_FECH               (0xFC0A4000)
+#define MCFGPIO_PODR_FECL               (0xFC0A4001)
+#define MCFGPIO_PODR_SSI                (0xFC0A4002)
+#define MCFGPIO_PODR_BUSCTL             (0xFC0A4003)
+#define MCFGPIO_PODR_BE                 (0xFC0A4004)
+#define MCFGPIO_PODR_CS                 (0xFC0A4005)
+#define MCFGPIO_PODR_PWM                (0xFC0A4006)
+#define MCFGPIO_PODR_FECI2C             (0xFC0A4007)
+#define MCFGPIO_PODR_UART               (0xFC0A4009)
+#define MCFGPIO_PODR_QSPI               (0xFC0A400A)
+#define MCFGPIO_PODR_TIMER              (0xFC0A400B)
+#define MCFGPIO_PODR_LCDDATAH           (0xFC0A400D)
+#define MCFGPIO_PODR_LCDDATAM           (0xFC0A400E)
+#define MCFGPIO_PODR_LCDDATAL           (0xFC0A400F)
+#define MCFGPIO_PODR_LCDCTLH            (0xFC0A4010)
+#define MCFGPIO_PODR_LCDCTLL            (0xFC0A4011)
+#define MCFGPIO_PDDR_FECH               (0xFC0A4014)
+#define MCFGPIO_PDDR_FECL               (0xFC0A4015)
+#define MCFGPIO_PDDR_SSI                (0xFC0A4016)
+#define MCFGPIO_PDDR_BUSCTL             (0xFC0A4017)
+#define MCFGPIO_PDDR_BE                 (0xFC0A4018)
+#define MCFGPIO_PDDR_CS                 (0xFC0A4019)
+#define MCFGPIO_PDDR_PWM                (0xFC0A401A)
+#define MCFGPIO_PDDR_FECI2C             (0xFC0A401B)
+#define MCFGPIO_PDDR_UART               (0xFC0A401C)
+#define MCFGPIO_PDDR_QSPI               (0xFC0A401E)
+#define MCFGPIO_PDDR_TIMER              (0xFC0A401F)
+#define MCFGPIO_PDDR_LCDDATAH           (0xFC0A4021)
+#define MCFGPIO_PDDR_LCDDATAM           (0xFC0A4022)
+#define MCFGPIO_PDDR_LCDDATAL           (0xFC0A4023)
+#define MCFGPIO_PDDR_LCDCTLH            (0xFC0A4024)
+#define MCFGPIO_PDDR_LCDCTLL            (0xFC0A4025)
+#define MCFGPIO_PPDSDR_FECH             (0xFC0A4028)
+#define MCFGPIO_PPDSDR_FECL             (0xFC0A4029)
+#define MCFGPIO_PPDSDR_SSI              (0xFC0A402A)
+#define MCFGPIO_PPDSDR_BUSCTL           (0xFC0A402B)
+#define MCFGPIO_PPDSDR_BE               (0xFC0A402C)
+#define MCFGPIO_PPDSDR_CS               (0xFC0A402D)
+#define MCFGPIO_PPDSDR_PWM              (0xFC0A402E)
+#define MCFGPIO_PPDSDR_FECI2C           (0xFC0A402F)
+#define MCFGPIO_PPDSDR_UART             (0xFC0A4031)
+#define MCFGPIO_PPDSDR_QSPI             (0xFC0A4032)
+#define MCFGPIO_PPDSDR_TIMER            (0xFC0A4033)
+#define MCFGPIO_PPDSDR_LCDDATAH         (0xFC0A4035)
+#define MCFGPIO_PPDSDR_LCDDATAM         (0xFC0A4036)
+#define MCFGPIO_PPDSDR_LCDDATAL         (0xFC0A4037)
+#define MCFGPIO_PPDSDR_LCDCTLH          (0xFC0A4038)
+#define MCFGPIO_PPDSDR_LCDCTLL          (0xFC0A4039)
+#define MCFGPIO_PCLRR_FECH              (0xFC0A403C)
+#define MCFGPIO_PCLRR_FECL              (0xFC0A403D)
+#define MCFGPIO_PCLRR_SSI               (0xFC0A403E)
+#define MCFGPIO_PCLRR_BUSCTL            (0xFC0A403F)
+#define MCFGPIO_PCLRR_BE                (0xFC0A4040)
+#define MCFGPIO_PCLRR_CS                (0xFC0A4041)
+#define MCFGPIO_PCLRR_PWM               (0xFC0A4042)
+#define MCFGPIO_PCLRR_FECI2C            (0xFC0A4043)
+#define MCFGPIO_PCLRR_UART              (0xFC0A4045)
+#define MCFGPIO_PCLRR_QSPI              (0xFC0A4046)
+#define MCFGPIO_PCLRR_TIMER             (0xFC0A4047)
+#define MCFGPIO_PCLRR_LCDDATAH          (0xFC0A4049)
+#define MCFGPIO_PCLRR_LCDDATAM          (0xFC0A404A)
+#define MCFGPIO_PCLRR_LCDDATAL          (0xFC0A404B)
+#define MCFGPIO_PCLRR_LCDCTLH           (0xFC0A404C)
+#define MCFGPIO_PCLRR_LCDCTLL           (0xFC0A404D)
 #define MCF_GPIO_PAR_FEC                MCF_REG08(0xFC0A4050)
 #define MCF_GPIO_PAR_PWM                MCF_REG08(0xFC0A4051)
 #define MCF_GPIO_PAR_BUSCTL             MCF_REG08(0xFC0A4052)
@@ -1187,6 +1161,20 @@
 /* Bit definitions and macros for MCF_GPIO_DSCR_IRQ */
 #define MCF_GPIO_DSCR_IRQ_IRQ_DSE(x)               (((x)&0x03)<<0)
 
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PODR                    MCFGPIO_PODR_FECH
+#define MCFGPIO_PDDR                    MCFGPIO_PDDR_FECH
+#define MCFGPIO_PPDR                    MCFGPIO_PPDSDR_FECH
+#define MCFGPIO_SETR                    MCFGPIO_PPDSDR_FECH
+#define MCFGPIO_CLRR                    MCFGPIO_PCLRR_FECH
+
+#define MCFGPIO_PIN_MAX                 136
+#define MCFGPIO_IRQ_MAX                 8
+#define MCFGPIO_IRQ_VECBASE             MCFINT_VECBASE
+
+
 /*********************************************************************
  *
  * Interrupt Controller (INTC)
@@ -2154,12 +2142,12 @@
  *********************************************************************/
 
 /* Register read/write macros */
-#define MCF_EPORT_EPPAR                MCF_REG16(0xFC094000)
-#define MCF_EPORT_EPDDR                MCF_REG08(0xFC094002)
-#define MCF_EPORT_EPIER                MCF_REG08(0xFC094003)
-#define MCF_EPORT_EPDR                 MCF_REG08(0xFC094004)
-#define MCF_EPORT_EPPDR                MCF_REG08(0xFC094005)
-#define MCF_EPORT_EPFR                 MCF_REG08(0xFC094006)
+#define MCFEPORT_EPPAR                (0xFC094000)
+#define MCFEPORT_EPDDR                (0xFC094002)
+#define MCFEPORT_EPIER                (0xFC094003)
+#define MCFEPORT_EPDR                 (0xFC094004)
+#define MCFEPORT_EPPDR                (0xFC094005)
+#define MCFEPORT_EPFR                 (0xFC094006)
 
 /* Bit definitions and macros for MCF_EPORT_EPPAR */
 #define MCF_EPORT_EPPAR_EPPA1(x)       (((x)&0x0003)<<2)
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index cc22c4a53005..c399abbf953c 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -73,9 +73,15 @@
 #define MCFSIM_DACR1            0x110           /* DRAM 1 Addr and Ctrl (r/w) */
 #define MCFSIM_DMR1             0x114           /* DRAM 1 Mask reg (r/w) */
 
-#define MCFSIM_PADDR            0x244           /* Parallel Direction (r/w) */
-#define MCFSIM_PADAT            0x248           /* Parallel Data (r/w) */
+#define MCFSIM_PADDR            (MCF_MBAR + 0x244)
+#define MCFSIM_PADAT            (MCF_MBAR + 0x248)
 
+/*
+ * Generic GPIO support
+ */
+#define MCFGPIO_PIN_MAX                 16
+#define MCFGPIO_IRQ_MAX                 -1
+#define MCFGPIO_IRQ_VECBASE             -1
 
 /*
  *      Some symbol defines for the above...
@@ -91,19 +97,6 @@
 #define MCFSIM_DMA3ICR          MCFSIM_ICR9     /* DMA 3 ICR */
 
 /*
- *      Macro to set IMR register. It is 32 bits on the 5407.
- */
-#define mcf_getimr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
-
-#define mcf_setimr(imr)         \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
-
-#define mcf_getipr()            \
-        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
-
-
-/*
  *      Some symbol defines for the Parallel Port Pin Assignment Register
  */
 #define MCFSIM_PAR_DREQ0        0x40            /* Set to select DREQ0 input */
@@ -118,6 +111,11 @@
 #define IRQ3_LEVEL6     0x40
 #define IRQ1_LEVEL2     0x20
 
+/*
+ *      Define system peripheral IRQ usage.
+ */
+#define MCF_IRQ_TIMER           30              /* Timer0, Level 6 */
+#define MCF_IRQ_PROFILER        31              /* Timer1, Level 7 */
 
 /*
  *      Define the Cache register flags.
diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h
new file mode 100644
index 000000000000..ee5e4ccce89e
--- /dev/null
+++ b/arch/m68k/include/asm/mcfgpio.h
@@ -0,0 +1,40 @@
+/*
+ * Coldfire generic GPIO support.
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef mcfgpio_h
+#define mcfgpio_h
+
+#include <linux/io.h>
+#include <asm-generic/gpio.h>
+
+struct mcf_gpio_chip {
+        struct gpio_chip gpio_chip;
+        void __iomem *pddr;
+        void __iomem *podr;
+        void __iomem *ppdr;
+        void __iomem *setr;
+        void __iomem *clrr;
+        const u8 *gpio_to_pinmux;
+};
+
+int mcf_gpio_direction_input(struct gpio_chip *, unsigned);
+int mcf_gpio_get_value(struct gpio_chip *, unsigned);
+int mcf_gpio_direction_output(struct gpio_chip *, unsigned, int);
+void mcf_gpio_set_value(struct gpio_chip *, unsigned, int);
+void mcf_gpio_set_value_fast(struct gpio_chip *, unsigned, int);
+int mcf_gpio_request(struct gpio_chip *, unsigned);
+void mcf_gpio_free(struct gpio_chip *, unsigned);
+
+#endif
diff --git a/arch/m68k/include/asm/mcfintc.h b/arch/m68k/include/asm/mcfintc.h
new file mode 100644
index 000000000000..4183320a3813
--- /dev/null
+++ b/arch/m68k/include/asm/mcfintc.h
@@ -0,0 +1,89 @@
+/****************************************************************************/
+
+/*
+ *      mcfintc.h -- support definitions for the simple ColdFire
+ *                   Interrupt Controller
+ *
+ *      (C) Copyright 2009,  Greg Ungerer <gerg@uclinux.org>
+ */
+
+/****************************************************************************/
+#ifndef mcfintc_h
+#define mcfintc_h
+/****************************************************************************/
+
+/*
+ * Most of the older ColdFire parts use the same simple interrupt
+ * controller. This is currently used on the 5206, 5206e, 5249, 5307
+ * and 5407 parts.
+ *
+ * The builtin peripherals are masked through dedicated bits in the
+ * Interrupt Mask register (IMR) - and this is not indexed (or in any way
+ * related to) the actual interrupt number they use. So knowing the IRQ
+ * number doesn't explicitly map to a certain internal device for
+ * interrupt control purposes.
+ */
+
+/*
+ * Bit definitions for the ICR family of registers.
+ */
+#define MCFSIM_ICR_AUTOVEC      0x80            /* Auto-vectored intr */
+#define MCFSIM_ICR_LEVEL0       0x00            /* Level 0 intr */
+#define MCFSIM_ICR_LEVEL1       0x04            /* Level 1 intr */
+#define MCFSIM_ICR_LEVEL2       0x08            /* Level 2 intr */
+#define MCFSIM_ICR_LEVEL3       0x0c            /* Level 3 intr */
+#define MCFSIM_ICR_LEVEL4       0x10            /* Level 4 intr */
+#define MCFSIM_ICR_LEVEL5       0x14            /* Level 5 intr */
+#define MCFSIM_ICR_LEVEL6       0x18            /* Level 6 intr */
+#define MCFSIM_ICR_LEVEL7       0x1c            /* Level 7 intr */
+
+#define MCFSIM_ICR_PRI0         0x00            /* Priority 0 intr */
+#define MCFSIM_ICR_PRI1         0x01            /* Priority 1 intr */
+#define MCFSIM_ICR_PRI2         0x02            /* Priority 2 intr */
+#define MCFSIM_ICR_PRI3         0x03            /* Priority 3 intr */
+
+/*
+ * IMR bit position definitions. Not all ColdFire parts with this interrupt
+ * controller actually support all of these interrupt sources. But the bit
+ * numbers are the same in all cores.
+ */
+#define MCFINTC_EINT1           1               /* External int #1 */
+#define MCFINTC_EINT2           2               /* External int #2 */
+#define MCFINTC_EINT3           3               /* External int #3 */
+#define MCFINTC_EINT4           4               /* External int #4 */
+#define MCFINTC_EINT5           5               /* External int #5 */
+#define MCFINTC_EINT6           6               /* External int #6 */
+#define MCFINTC_EINT7           7               /* External int #7 */
+#define MCFINTC_SWT             8               /* Software Watchdog */
+#define MCFINTC_TIMER1          9
+#define MCFINTC_TIMER2          10
+#define MCFINTC_I2C             11              /* I2C / MBUS */
+#define MCFINTC_UART0           12
+#define MCFINTC_UART1           13
+#define MCFINTC_DMA0            14
+#define MCFINTC_DMA1            15
+#define MCFINTC_DMA2            16
+#define MCFINTC_DMA3            17
+#define MCFINTC_QSPI            18
+
+#ifndef __ASSEMBLER__
+
+/*
+ * There is no one-is-one correspondance between the interrupt number (irq)
+ * and the bit fields on the mask register. So we create a per-cpu type
+ * mapping of irq to mask bit. The CPU platform code needs to register
+ * its supported irq's at init time, using this function.
+ */
+extern unsigned char mcf_irq2imr[];
+static inline void mcf_mapirq2imr(int irq, int imr)
+{
+        mcf_irq2imr[irq] = imr;
+}
+
+void mcf_autovector(int irq);
+void mcf_setimr(int index);
+void mcf_clrimr(int index);
+#endif
+
+/****************************************************************************/
+#endif  /* mcfintc_h */
diff --git a/arch/m68k/include/asm/mcfne.h b/arch/m68k/include/asm/mcfne.h
index 431f63aadd0e..bf638be0958c 100644
--- a/arch/m68k/include/asm/mcfne.h
+++ b/arch/m68k/include/asm/mcfne.h
@@ -239,87 +239,4 @@ void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
 #endif /* NE2000_OFFOFFSET */
 
 /****************************************************************************/
-
-#ifdef COLDFIRE_NE2000_FUNCS
-
-/*
- *      Lastly the interrupt set up code...
- *      Minor differences between the different board types.
- */
-
-#if defined(CONFIG_ARN5206)
-void ne2000_irqsetup(int irq)
-{
-        volatile unsigned char  *icrp;
-
-        icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
-        *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2;
-        mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
-}
-#endif
-
-#if defined(CONFIG_M5206eC3)
-void ne2000_irqsetup(int irq)
-{
-        volatile unsigned char  *icrp;
-
-        icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
-        *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
-        mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
-}
-#endif
-
-#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
-void ne2000_irqsetup(int irq)
-{
-        mcf_autovector(irq);
-}
-#endif
-
-#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
-void ne2000_irqsetup(int irq)
-{
-        volatile unsigned long  *icrp;
-        volatile unsigned long  *pitr;
-
-        /* The NE2000 device uses external IRQ3 */
-        icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
-        *icrp = (*icrp & 0x77077777) | 0x00d00000;
-
-        pitr = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PITR);
-        *pitr = *pitr | 0x20000000;
-}
-
-void ne2000_irqack(int irq)
-{
-        volatile unsigned long  *icrp;
-
-        /* The NE2000 device uses external IRQ3 */
-        icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
-        *icrp = (*icrp & 0x77777777) | 0x00800000;
-}
-#endif
-
-#if defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
-
-void ne2000_irqsetup(int irq)
-{
-        mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
-        mcf_autovector(irq);
-}
-
-#else
-
-void ne2000_irqsetup(int irq)
-{
-        mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
-}
-
-#endif /* ! CONFIG_NETtel || CONFIG_SECUREEDGEMP3 */
-#endif /* CONFIG_M5307 || CONFIG_M5407 */
-
-#endif /* COLDFIRE_NE2000_FUNCS */
-
-/****************************************************************************/
 #endif  /* mcfne_h */
diff --git a/arch/m68k/include/asm/mcfsim.h b/arch/m68k/include/asm/mcfsim.h
index da3f2ceff3a4..9c70a67bf85f 100644
--- a/arch/m68k/include/asm/mcfsim.h
+++ b/arch/m68k/include/asm/mcfsim.h
@@ -4,7 +4,7 @@
  *      mcfsim.h -- ColdFire System Integration Module support.
  *
  *      (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
- *      (C) Copyright 2000, Lineo Inc. (www.lineo.com) 
+ *      (C) Copyright 2000, Lineo Inc. (www.lineo.com)
  */
 
 /****************************************************************************/
@@ -12,19 +12,21 @@
 #define mcfsim_h
 /****************************************************************************/
 
-
 /*
- *      Include 5204, 5206/e, 5235, 5249, 5270/5271, 5272, 5280/5282,
- *      5307 or 5407 specific addresses.
+ * Include the appropriate ColdFire CPU specific System Integration Module
+ * (SIM) definitions.
  */
 #if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
 #include <asm/m5206sim.h>
+#include <asm/mcfintc.h>
 #elif defined(CONFIG_M520x)
 #include <asm/m520xsim.h>
 #elif defined(CONFIG_M523x)
 #include <asm/m523xsim.h>
+#include <asm/mcfintc.h>
 #elif defined(CONFIG_M5249)
 #include <asm/m5249sim.h>
+#include <asm/mcfintc.h>
 #elif defined(CONFIG_M527x)
 #include <asm/m527xsim.h>
 #elif defined(CONFIG_M5272)
@@ -33,94 +35,13 @@
 #include <asm/m528xsim.h>
 #elif defined(CONFIG_M5307)
 #include <asm/m5307sim.h>
+#include <asm/mcfintc.h>
 #elif defined(CONFIG_M532x)
 #include <asm/m532xsim.h>
 #elif defined(CONFIG_M5407)
 #include <asm/m5407sim.h>
+#include <asm/mcfintc.h>
 #endif
 
-
-/*
- *      Define the base address of the SIM within the MBAR address space.
- */
-#define MCFSIM_BASE             0x0             /* Base address of SIM */
-
-
-/*
- *      Bit definitions for the ICR family of registers.
- */
-#define MCFSIM_ICR_AUTOVEC      0x80            /* Auto-vectored intr */
-#define MCFSIM_ICR_LEVEL0       0x00            /* Level 0 intr */
-#define MCFSIM_ICR_LEVEL1       0x04            /* Level 1 intr */
-#define MCFSIM_ICR_LEVEL2       0x08            /* Level 2 intr */
-#define MCFSIM_ICR_LEVEL3       0x0c            /* Level 3 intr */
-#define MCFSIM_ICR_LEVEL4       0x10            /* Level 4 intr */
-#define MCFSIM_ICR_LEVEL5       0x14            /* Level 5 intr */
-#define MCFSIM_ICR_LEVEL6       0x18            /* Level 6 intr */
-#define MCFSIM_ICR_LEVEL7       0x1c            /* Level 7 intr */
-
-#define MCFSIM_ICR_PRI0         0x00            /* Priority 0 intr */
-#define MCFSIM_ICR_PRI1         0x01            /* Priority 1 intr */
-#define MCFSIM_ICR_PRI2         0x02            /* Priority 2 intr */
-#define MCFSIM_ICR_PRI3         0x03            /* Priority 3 intr */
-
-/*
- *      Bit definitions for the Interrupt Mask register (IMR).
- */
-#define MCFSIM_IMR_EINT1        0x0002          /* External intr # 1 */
-#define MCFSIM_IMR_EINT2        0x0004          /* External intr # 2 */
-#define MCFSIM_IMR_EINT3        0x0008          /* External intr # 3 */
-#define MCFSIM_IMR_EINT4        0x0010          /* External intr # 4 */
-#define MCFSIM_IMR_EINT5        0x0020          /* External intr # 5 */
-#define MCFSIM_IMR_EINT6        0x0040          /* External intr # 6 */
-#define MCFSIM_IMR_EINT7        0x0080          /* External intr # 7 */
-
-#define MCFSIM_IMR_SWD          0x0100          /* Software Watchdog intr */
-#define MCFSIM_IMR_TIMER1       0x0200          /* TIMER 1 intr */
-#define MCFSIM_IMR_TIMER2       0x0400          /* TIMER 2 intr */
-#define MCFSIM_IMR_MBUS         0x0800          /* MBUS intr    */
-#define MCFSIM_IMR_UART1        0x1000          /* UART 1 intr */
-#define MCFSIM_IMR_UART2        0x2000          /* UART 2 intr */
-
-#if defined(CONFIG_M5206e)
-#define MCFSIM_IMR_DMA1         0x4000          /* DMA 1 intr */
-#define MCFSIM_IMR_DMA2         0x8000          /* DMA 2 intr */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307)
-#define MCFSIM_IMR_DMA0         0x4000          /* DMA 0 intr */
-#define MCFSIM_IMR_DMA1         0x8000          /* DMA 1 intr */
-#define MCFSIM_IMR_DMA2         0x10000         /* DMA 2 intr */
-#define MCFSIM_IMR_DMA3         0x20000         /* DMA 3 intr */
-#endif
-
-/*
- *      Mask for all of the SIM devices. Some parts have more or less
- *      SIM devices. This is a catchall for the sandard set.
- */
-#ifndef MCFSIM_IMR_MASKALL
-#define MCFSIM_IMR_MASKALL      0x3ffe          /* All intr sources */
-#endif
-
-
-/*
- *      PIT interrupt settings, if not found in mXXXXsim.h file.
- */
-#ifndef ICR_INTRCONF
-#define ICR_INTRCONF            0x2b            /* PIT1 level 5, priority 3 */
-#endif
-#ifndef MCFPIT_IMR
-#define MCFPIT_IMR              MCFINTC_IMRH
-#endif
-#ifndef MCFPIT_IMR_IBIT
-#define MCFPIT_IMR_IBIT         (1 << (MCFINT_PIT1 - 32))
-#endif
-
-
-#ifndef __ASSEMBLY__
-/*
- *      Definition for the interrupt auto-vectoring support.
- */
-extern void     mcf_autovector(unsigned int vec);
-#endif /* __ASSEMBLY__ */
-
 /****************************************************************************/
 #endif  /* mcfsim_h */
diff --git a/arch/m68k/include/asm/mcfsmc.h b/arch/m68k/include/asm/mcfsmc.h
index 2d7a4dbd9683..527bea5d6788 100644
--- a/arch/m68k/include/asm/mcfsmc.h
+++ b/arch/m68k/include/asm/mcfsmc.h
@@ -167,15 +167,15 @@ void smc_remap(unsigned int ioaddr)
         static int              once = 0;
         extern unsigned short   ppdata;
         if (once++ == 0) {
-                *((volatile unsigned short *)(MCF_MBAR+MCFSIM_PADDR)) = 0x00ec;
+                *((volatile unsigned short *)MCFSIM_PADDR) = 0x00ec;
                 ppdata |= 0x0080;
-                *((volatile unsigned short *)(MCF_MBAR+MCFSIM_PADAT)) = ppdata;
+                *((volatile unsigned short *)MCFSIM_PADAT) = ppdata;
                 outw(0x0001, ioaddr + BANK_SELECT);
                 outw(0x0001, ioaddr + BANK_SELECT);
                 outw(0x0067, ioaddr + BASE);
 
                 ppdata &= ~0x0080;
-                *((volatile unsigned short *)(MCF_MBAR+MCFSIM_PADAT)) = ppdata;
+                *((volatile unsigned short *)MCFSIM_PADAT) = ppdata;
         }
         
         *((volatile unsigned short *)(MCF_MBAR+MCFSIM_CSCR3)) = 0x1180;
diff --git a/arch/m68k/include/asm/mman.h b/arch/m68k/include/asm/mman.h
index 9f5c4c4b3c7b..8eebf89f5ab1 100644
--- a/arch/m68k/include/asm/mman.h
+++ b/arch/m68k/include/asm/mman.h
@@ -1,17 +1 @@
-#ifndef __M68K_MMAN_H__
-#define __M68K_MMAN_H__
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* __M68K_MMAN_H__ */
+#include <asm-generic/mman.h>
diff --git a/arch/m68k/include/asm/nettel.h b/arch/m68k/include/asm/nettel.h
index 0299f6a2deeb..4dec2d9fb994 100644
--- a/arch/m68k/include/asm/nettel.h
+++ b/arch/m68k/include/asm/nettel.h
@@ -48,14 +48,14 @@ extern volatile unsigned short ppdata;
 static __inline__ unsigned int mcf_getppdata(void)
 {
         volatile unsigned short *pp;
-        pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
+        pp = (volatile unsigned short *) MCFSIM_PADAT;
         return((unsigned int) *pp);
 }
 
 static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
 {
         volatile unsigned short *pp;
-        pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT);
+        pp = (volatile unsigned short *) MCFSIM_PADAT;
         ppdata = (ppdata & ~mask) | bits;
         *pp = ppdata;
 }
diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h
index 9aa3f90f4855..1f31b060cc8d 100644
--- a/arch/m68k/include/asm/page_no.h
+++ b/arch/m68k/include/asm/page_no.h
@@ -1,10 +1,12 @@
 #ifndef _M68KNOMMU_PAGE_H
 #define _M68KNOMMU_PAGE_H
 
+#include <linux/const.h>
+
 /* PAGE_SHIFT determines the page size */
 
 #define PAGE_SHIFT      (12)
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_SIZE       (_AC(1,UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE-1))
 
 #include <asm/setup.h>
diff --git a/arch/m68k/include/asm/pinmux.h b/arch/m68k/include/asm/pinmux.h
new file mode 100644
index 000000000000..119ee686dbd1
--- /dev/null
+++ b/arch/m68k/include/asm/pinmux.h
@@ -0,0 +1,30 @@
+/*
+ * Coldfire generic GPIO pinmux support.
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef pinmux_h
+#define pinmux_h
+
+#define MCFPINMUX_NONE          -1
+
+extern int mcf_pinmux_request(unsigned, unsigned);
+extern void mcf_pinmux_release(unsigned, unsigned);
+
+static inline int mcf_pinmux_is_valid(unsigned pinmux)
+{
+        return pinmux != MCFPINMUX_NONE;
+}
+
+#endif
+
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index fc3f2c22f2b8..74fd674b15ad 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -1,5 +1,170 @@
-#ifdef __uClinux__
-#include "processor_no.h"
+/*
+ * include/asm-m68k/processor.h
+ *
+ * Copyright (C) 1995 Hamish Macdonald
+ */
+
+#ifndef __ASM_M68K_PROCESSOR_H
+#define __ASM_M68K_PROCESSOR_H
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l;})
+
+#include <linux/thread_info.h>
+#include <asm/segment.h>
+#include <asm/fpu.h>
+#include <asm/ptrace.h>
+
+static inline unsigned long rdusp(void)
+{
+#ifdef CONFIG_COLDFIRE
+        extern unsigned int sw_usp;
+        return sw_usp;
 #else
-#include "processor_mm.h"
+        unsigned long usp;
+        __asm__ __volatile__("move %/usp,%0" : "=a" (usp));
+        return usp;
+#endif
+}
+
+static inline void wrusp(unsigned long usp)
+{
+#ifdef CONFIG_COLDFIRE
+        extern unsigned int sw_usp;
+        sw_usp = usp;
+#else
+        __asm__ __volatile__("move %0,%/usp" : : "a" (usp));
+#endif
+}
+
+/*
+ * User space process size: 3.75GB. This is hardcoded into a few places,
+ * so don't change it unless you know what you are doing.
+ */
+#ifndef CONFIG_SUN3
+#define TASK_SIZE       (0xF0000000UL)
+#else
+#define TASK_SIZE       (0x0E000000UL)
+#endif
+
+#ifdef __KERNEL__
+#define STACK_TOP       TASK_SIZE
+#define STACK_TOP_MAX   STACK_TOP
+#endif
+
+/* This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#ifdef CONFIG_MMU
+#ifndef CONFIG_SUN3
+#define TASK_UNMAPPED_BASE      0xC0000000UL
+#else
+#define TASK_UNMAPPED_BASE      0x0A000000UL
+#endif
+#define TASK_UNMAPPED_ALIGN(addr, off)  PAGE_ALIGN(addr)
+#else
+#define TASK_UNMAPPED_BASE      0
+#endif
+
+struct thread_struct {
+        unsigned long  ksp;             /* kernel stack pointer */
+        unsigned long  usp;             /* user stack pointer */
+        unsigned short sr;              /* saved status register */
+        unsigned short fs;              /* saved fs (sfc, dfc) */
+        unsigned long  crp[2];          /* cpu root pointer */
+        unsigned long  esp0;            /* points to SR of stack frame */
+        unsigned long  faddr;           /* info about last fault */
+        int            signo, code;
+        unsigned long  fp[8*3];
+        unsigned long  fpcntl[3];       /* fp control regs */
+        unsigned char  fpstate[FPSTATESIZE];  /* floating point state */
+        struct thread_info info;
+};
+
+#define INIT_THREAD  {                                                  \
+        .ksp    = sizeof(init_stack) + (unsigned long) init_stack,      \
+        .sr     = PS_S,                                                 \
+        .fs     = __KERNEL_DS,                                          \
+        .info   = INIT_THREAD_INFO(init_task),                          \
+}
+
+#ifdef CONFIG_MMU
+/*
+ * Do necessary setup to start up a newly executed thread.
+ */
+static inline void start_thread(struct pt_regs * regs, unsigned long pc,
+                                unsigned long usp)
+{
+        /* reads from user space */
+        set_fs(USER_DS);
+
+        regs->pc = pc;
+        regs->sr &= ~0x2000;
+        wrusp(usp);
+}
+
+#else
+
+/*
+ * Coldfire stacks need to be re-aligned on trap exit, conventional
+ * 68k can handle this case cleanly.
+ */
+#ifdef CONFIG_COLDFIRE
+#define reformat(_regs)         do { (_regs)->format = 0x4; } while(0)
+#else
+#define reformat(_regs)         do { } while (0)
+#endif
+
+#define start_thread(_regs, _pc, _usp)                  \
+do {                                                    \
+        set_fs(USER_DS); /* reads from user space */    \
+        (_regs)->pc = (_pc);                            \
+        ((struct switch_stack *)(_regs))[-1].a6 = 0;    \
+        reformat(_regs);                                \
+        if (current->mm)                                \
+                (_regs)->d5 = current->mm->start_data;  \
+        (_regs)->sr &= ~0x2000;                         \
+        wrusp(_usp);                                    \
+} while(0)
+
+#endif
+
+/* Forward declaration, a strange C thing */
+struct task_struct;
+
+/* Free all resources held by a thread. */
+static inline void release_thread(struct task_struct *dead_task)
+{
+}
+
+/* Prepare to copy thread state - unlazy all lazy status */
+#define prepare_to_copy(tsk)    do { } while (0)
+
+extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
+
+/*
+ * Free current thread data structures etc..
+ */
+static inline void exit_thread(void)
+{
+}
+
+extern unsigned long thread_saved_pc(struct task_struct *tsk);
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define KSTK_EIP(tsk)   \
+    ({                  \
+        unsigned long eip = 0;   \
+        if ((tsk)->thread.esp0 > PAGE_SIZE && \
+            (virt_addr_valid((tsk)->thread.esp0))) \
+              eip = ((struct pt_regs *) (tsk)->thread.esp0)->pc; \
+        eip; })
+#define KSTK_ESP(tsk)   ((tsk) == current ? rdusp() : (tsk)->thread.usp)
+
+#define cpu_relax()     barrier()
+
 #endif
diff --git a/arch/m68k/include/asm/processor_mm.h b/arch/m68k/include/asm/processor_mm.h
deleted file mode 100644
index 1f61ef53f0e0..000000000000
--- a/arch/m68k/include/asm/processor_mm.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * include/asm-m68k/processor.h
- *
- * Copyright (C) 1995 Hamish Macdonald
- */
-
-#ifndef __ASM_M68K_PROCESSOR_H
-#define __ASM_M68K_PROCESSOR_H
-
-/*
- * Default implementation of macro that returns current
- * instruction pointer ("program counter").
- */
-#define current_text_addr() ({ __label__ _l; _l: &&_l;})
-
-#include <linux/thread_info.h>
-#include <asm/segment.h>
-#include <asm/fpu.h>
-#include <asm/ptrace.h>
-
-static inline unsigned long rdusp(void)
-{
-        unsigned long usp;
-
-        __asm__ __volatile__("move %/usp,%0" : "=a" (usp));
-        return usp;
-}
-
-static inline void wrusp(unsigned long usp)
-{
-        __asm__ __volatile__("move %0,%/usp" : : "a" (usp));
-}
-
-/*
- * User space process size: 3.75GB. This is hardcoded into a few places,
- * so don't change it unless you know what you are doing.
- */
-#ifndef CONFIG_SUN3
-#define TASK_SIZE       (0xF0000000UL)
-#else
-#define TASK_SIZE       (0x0E000000UL)
-#endif
-
-#ifdef __KERNEL__
-#define STACK_TOP       TASK_SIZE
-#define STACK_TOP_MAX   STACK_TOP
-#endif
-
-/* This decides where the kernel will search for a free chunk of vm
- * space during mmap's.
- */
-#ifndef CONFIG_SUN3
-#define TASK_UNMAPPED_BASE      0xC0000000UL
-#else
-#define TASK_UNMAPPED_BASE      0x0A000000UL
-#endif
-#define TASK_UNMAPPED_ALIGN(addr, off)  PAGE_ALIGN(addr)
-
-struct thread_struct {
-        unsigned long  ksp;             /* kernel stack pointer */
-        unsigned long  usp;             /* user stack pointer */
-        unsigned short sr;              /* saved status register */
-        unsigned short fs;              /* saved fs (sfc, dfc) */
-        unsigned long  crp[2];          /* cpu root pointer */
-        unsigned long  esp0;            /* points to SR of stack frame */
-        unsigned long  faddr;           /* info about last fault */
-        int            signo, code;
-        unsigned long  fp[8*3];
-        unsigned long  fpcntl[3];       /* fp control regs */
-        unsigned char  fpstate[FPSTATESIZE];  /* floating point state */
-        struct thread_info info;
-};
-
-#define INIT_THREAD  {                                                  \
-        .ksp    = sizeof(init_stack) + (unsigned long) init_stack,      \
-        .sr     = PS_S,                                                 \
-        .fs     = __KERNEL_DS,                                          \
-        .info   = INIT_THREAD_INFO(init_task),                          \
-}
-
-/*
- * Do necessary setup to start up a newly executed thread.
- */
-static inline void start_thread(struct pt_regs * regs, unsigned long pc,
-                                unsigned long usp)
-{
-        /* reads from user space */
-        set_fs(USER_DS);
-
-        regs->pc = pc;
-        regs->sr &= ~0x2000;
-        wrusp(usp);
-}
-
-/* Forward declaration, a strange C thing */
-struct task_struct;
-
-/* Free all resources held by a thread. */
-static inline void release_thread(struct task_struct *dead_task)
-{
-}
-
-/* Prepare to copy thread state - unlazy all lazy status */
-#define prepare_to_copy(tsk)    do { } while (0)
-
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
-/*
- * Free current thread data structures etc..
- */
-static inline void exit_thread(void)
-{
-}
-
-extern unsigned long thread_saved_pc(struct task_struct *tsk);
-
-unsigned long get_wchan(struct task_struct *p);
-
-#define KSTK_EIP(tsk)   \
-    ({                  \
-        unsigned long eip = 0;   \
-        if ((tsk)->thread.esp0 > PAGE_SIZE && \
-            (virt_addr_valid((tsk)->thread.esp0))) \
-              eip = ((struct pt_regs *) (tsk)->thread.esp0)->pc; \
-        eip; })
-#define KSTK_ESP(tsk)   ((tsk) == current ? rdusp() : (tsk)->thread.usp)
-
-#define cpu_relax()     barrier()
-
-#endif
diff --git a/arch/m68k/include/asm/processor_no.h b/arch/m68k/include/asm/processor_no.h
deleted file mode 100644
index 7a1e0ba35f5a..000000000000
--- a/arch/m68k/include/asm/processor_no.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * include/asm-m68knommu/processor.h
- *
- * Copyright (C) 1995 Hamish Macdonald
- */
-
-#ifndef __ASM_M68K_PROCESSOR_H
-#define __ASM_M68K_PROCESSOR_H
-
-/*
- * Default implementation of macro that returns current
- * instruction pointer ("program counter").
- */
-#define current_text_addr() ({ __label__ _l; _l: &&_l;})
-
-#include <linux/compiler.h>
-#include <linux/threads.h>
-#include <asm/types.h>
-#include <asm/segment.h>
-#include <asm/fpu.h>
-#include <asm/ptrace.h>
-#include <asm/current.h>
-
-static inline unsigned long rdusp(void)
-{
-#ifdef CONFIG_COLDFIRE
-        extern unsigned int sw_usp;
-        return(sw_usp);
-#else
-        unsigned long usp;
-        __asm__ __volatile__("move %/usp,%0" : "=a" (usp));
-        return usp;
-#endif
-}
-
-static inline void wrusp(unsigned long usp)
-{
-#ifdef CONFIG_COLDFIRE
-        extern unsigned int sw_usp;
-        sw_usp = usp;
-#else
-        __asm__ __volatile__("move %0,%/usp" : : "a" (usp));
-#endif
-}
-
-/*
- * User space process size: 3.75GB. This is hardcoded into a few places,
- * so don't change it unless you know what you are doing.
- */
-#define TASK_SIZE       (0xF0000000UL)
-
-/*
- * This decides where the kernel will search for a free chunk of vm
- * space during mmap's. We won't be using it
- */
-#define TASK_UNMAPPED_BASE      0
-
-/* 
- * if you change this structure, you must change the code and offsets
- * in m68k/machasm.S
- */
-   
-struct thread_struct {
-        unsigned long  ksp;             /* kernel stack pointer */
-        unsigned long  usp;             /* user stack pointer */
-        unsigned short sr;              /* saved status register */
-        unsigned short fs;              /* saved fs (sfc, dfc) */
-        unsigned long  crp[2];          /* cpu root pointer */
-        unsigned long  esp0;            /* points to SR of stack frame */
-        unsigned long  fp[8*3];
-        unsigned long  fpcntl[3];       /* fp control regs */
-        unsigned char  fpstate[FPSTATESIZE];  /* floating point state */
-};
-
-#define INIT_THREAD  {                                                  \
-        .ksp    = sizeof(init_stack) + (unsigned long) init_stack,      \
-        .sr     = PS_S,                                                 \
-        .fs     = __KERNEL_DS,                                          \
-}
-
-/*
- * Coldfire stacks need to be re-aligned on trap exit, conventional
- * 68k can handle this case cleanly.
- */
-#if defined(CONFIG_COLDFIRE)
-#define reformat(_regs)         do { (_regs)->format = 0x4; } while(0)
-#else
-#define reformat(_regs)         do { } while (0)
-#endif
-
-/*
- * Do necessary setup to start up a newly executed thread.
- *
- * pass the data segment into user programs if it exists,
- * it can't hurt anything as far as I can tell
- */
-#define start_thread(_regs, _pc, _usp)                  \
-do {                                                    \
-        set_fs(USER_DS); /* reads from user space */    \
-        (_regs)->pc = (_pc);                            \
-        ((struct switch_stack *)(_regs))[-1].a6 = 0;    \
-        reformat(_regs);                                \
-        if (current->mm)                                \
-                (_regs)->d5 = current->mm->start_data;  \
-        (_regs)->sr &= ~0x2000;                         \
-        wrusp(_usp);                                    \
-} while(0)
-
-/* Forward declaration, a strange C thing */
-struct task_struct;
-
-/* Free all resources held by a thread. */
-static inline void release_thread(struct task_struct *dead_task)
-{
-}
-
-/* Prepare to copy thread state - unlazy all lazy status */
-#define prepare_to_copy(tsk)    do { } while (0)
-
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
-/*
- * Free current thread data structures etc..
- */
-static inline void exit_thread(void)
-{
-}
-
-unsigned long thread_saved_pc(struct task_struct *tsk);
-unsigned long get_wchan(struct task_struct *p);
-
-#define KSTK_EIP(tsk)   \
-    ({                  \
-        unsigned long eip = 0;   \
-        if ((tsk)->thread.esp0 > PAGE_SIZE && \
-            (virt_addr_valid((tsk)->thread.esp0))) \
-              eip = ((struct pt_regs *) (tsk)->thread.esp0)->pc; \
-        eip; })
-#define KSTK_ESP(tsk)   ((tsk) == current ? rdusp() : (tsk)->thread.usp)
-
-#define cpu_relax()    barrier()
-
-#endif
diff --git a/arch/m68k/include/asm/timex.h b/arch/m68k/include/asm/timex.h
index b87f2f278f67..6759dad954f6 100644
--- a/arch/m68k/include/asm/timex.h
+++ b/arch/m68k/include/asm/timex.h
@@ -3,10 +3,23 @@
  *
  * m68k architecture timex specifications
  */
-#ifndef _ASMm68k_TIMEX_H
-#define _ASMm68k_TIMEX_H
+#ifndef _ASMm68K_TIMEX_H
+#define _ASMm68K_TIMEX_H
 
+#ifdef CONFIG_COLDFIRE
+/*
+ * CLOCK_TICK_RATE should give the underlying frequency of the tick timer
+ * to make ntp work best.  For Coldfires, that's the main clock.
+ */
+#include <asm/coldfire.h>
+#define CLOCK_TICK_RATE MCF_CLK
+#else
+/*
+ * This default CLOCK_TICK_RATE is probably wrong for many 68k boards
+ * Users of those boards will need to check and modify accordingly
+ */
 #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
+#endif
 
 typedef unsigned long cycles_t;
 
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 946d8691f2b0..48b87f5ced50 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -335,7 +335,7 @@
 #define __NR_preadv             329
 #define __NR_pwritev            330
 #define __NR_rt_tgsigqueueinfo  331
-#define __NR_perf_counter_open  332
+#define __NR_perf_event_open    332
 
 #ifdef __KERNEL__
 
diff --git a/arch/m68k/install.sh b/arch/m68k/install.sh
index 9c6bae6112e3..57d640d4382c 100644
--- a/arch/m68k/install.sh
+++ b/arch/m68k/install.sh
@@ -33,8 +33,8 @@ verify "$3"
 
 # User may have a custom install script
 
-if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
-if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install - same as make zlilo
 
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index 922f52e7ed1a..c5b33634c980 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -756,5 +756,5 @@ sys_call_table:
         .long sys_preadv
         .long sys_pwritev               /* 330 */
         .long sys_rt_tgsigqueueinfo
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
 
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index 72bad65dba3a..41230c595a8e 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -42,9 +42,9 @@
  */
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
-union thread_union init_thread_union
-__attribute__((section(".data.init_task"), aligned(THREAD_SIZE)))
-       = { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data
+        __attribute__((aligned(THREAD_SIZE))) =
+                { INIT_THREAD_INFO(init_task) };
 
 /* initial task structure */
 struct task_struct init_task = INIT_TASK(init_task);
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 7f54efaf60bb..7deb402bfc75 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -20,7 +20,6 @@
 #include <linux/syscalls.h>
 #include <linux/mman.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/ipc.h>
 
 #include <asm/setup.h>
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 54d980795fc4..17dc2a31a7ca 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -91,77 +91,11 @@ void __init time_init(void)
         mach_sched_init(timer_interrupt);
 }
 
-/*
- * This version of gettimeofday has near microsecond resolution.
- */
-void do_gettimeofday(struct timeval *tv)
+u32 arch_gettimeoffset(void)
 {
-        unsigned long flags;
-        unsigned long seq;
-        unsigned long usec, sec;
-        unsigned long max_ntp_tick = tick_usec - tickadj;
-
-        do {
-                seq = read_seqbegin_irqsave(&xtime_lock, flags);
-
-                usec = mach_gettimeoffset();
-
-                /*
-                 * If time_adjust is negative then NTP is slowing the clock
-                 * so make sure not to go into next possible interval.
-                 * Better to lose some accuracy than have time go backwards..
-                 */
-                if (unlikely(time_adjust < 0))
-                        usec = min(usec, max_ntp_tick);
-
-                sec = xtime.tv_sec;
-                usec += xtime.tv_nsec/1000;
-        } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-
-
-        while (usec >= 1000000) {
-                usec -= 1000000;
-                sec++;
-        }
-
-        tv->tv_sec = sec;
-        tv->tv_usec = usec;
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-int do_settimeofday(struct timespec *tv)
-{
-        time_t wtm_sec, sec = tv->tv_sec;
-        long wtm_nsec, nsec = tv->tv_nsec;
-
-        if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
-                return -EINVAL;
-
-        write_seqlock_irq(&xtime_lock);
-        /* This is revolting. We need to set the xtime.tv_nsec
-         * correctly. However, the value in this location is
-         * is value at the last tick.
-         * Discover what correction gettimeofday
-         * would have done, and then undo it!
-         */
-        nsec -= 1000 * mach_gettimeoffset();
-
-        wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
-        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
-        set_normalized_timespec(&xtime, sec, nsec);
-        set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
-        ntp_clear();
-        write_sequnlock_irq(&xtime_lock);
-        clock_was_set();
-        return 0;
+        return mach_gettimeoffset() * 1000;
 }
 
-EXPORT_SYMBOL(do_settimeofday);
-
-
 static int __init rtc_init(void)
 {
         struct platform_device *pdev;
diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c
index 0007b2adf3a3..774549accd2d 100644
--- a/arch/m68k/mm/init.c
+++ b/arch/m68k/mm/init.c
@@ -126,7 +126,7 @@ void __init mem_init(void)
 #endif
 
         printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
-               (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                totalram_pages << (PAGE_SHIFT-10),
                codepages << (PAGE_SHIFT-10),
                datapages << (PAGE_SHIFT-10),
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 534376299a99..e2201b90aa22 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -47,6 +47,10 @@ config GENERIC_FIND_NEXT_BIT
         bool
         default y
 
+config GENERIC_GPIO
+        bool
+        default n
+
 config GENERIC_HWEIGHT
         bool
         default y
@@ -182,6 +186,8 @@ config M527x
 config COLDFIRE
         bool
         depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407)
+        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         default y
 
 config CLOCK_SET
diff --git a/arch/m68knommu/kernel/init_task.c b/arch/m68knommu/kernel/init_task.c
index 45e97a207fed..cbf9dc3cc51d 100644
--- a/arch/m68knommu/kernel/init_task.c
+++ b/arch/m68knommu/kernel/init_task.c
@@ -31,7 +31,6 @@ EXPORT_SYMBOL(init_task);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
diff --git a/arch/m68knommu/kernel/irq.c b/arch/m68knommu/kernel/irq.c
index 56e0f4c55a67..c9cac36d4422 100644
--- a/arch/m68knommu/kernel/irq.c
+++ b/arch/m68knommu/kernel/irq.c
@@ -29,32 +29,6 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
         set_irq_regs(oldregs);
 }
 
-void ack_bad_irq(unsigned int irq)
-{
-        printk(KERN_ERR "IRQ: unexpected irq=%d\n", irq);
-}
-
-static struct irq_chip m_irq_chip = {
-        .name           = "M68K-INTC",
-        .enable         = enable_vector,
-        .disable        = disable_vector,
-        .ack            = ack_vector,
-};
-
-void __init init_IRQ(void)
-{
-        int irq;
-
-        init_vectors();
-
-        for (irq = 0; (irq < NR_IRQS); irq++) {
-                irq_desc[irq].status = IRQ_DISABLED;
-                irq_desc[irq].action = NULL;
-                irq_desc[irq].depth = 1;
-                irq_desc[irq].chip = &m_irq_chip;
-        }
-}
-
 int show_interrupts(struct seq_file *p, void *v)
 {
         struct irqaction *ap;
diff --git a/arch/m68knommu/kernel/sys_m68k.c b/arch/m68knommu/kernel/sys_m68k.c
index 700281638629..efdd090778a3 100644
--- a/arch/m68knommu/kernel/sys_m68k.c
+++ b/arch/m68knommu/kernel/sys_m68k.c
@@ -17,7 +17,6 @@
 #include <linux/syscalls.h>
 #include <linux/mman.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/ipc.h>
 #include <linux/fs.h>
 
diff --git a/arch/m68knommu/kernel/syscalltable.S b/arch/m68knommu/kernel/syscalltable.S
index 0ae123e08985..23535cc415ae 100644
--- a/arch/m68knommu/kernel/syscalltable.S
+++ b/arch/m68knommu/kernel/syscalltable.S
@@ -350,7 +350,7 @@ ENTRY(sys_call_table)
         .long sys_preadv
         .long sys_pwritev               /* 330 */
         .long sys_rt_tgsigqueueinfo
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
 
         .rept NR_syscalls-(.-sys_call_table)/4
                 .long sys_ni_syscall
diff --git a/arch/m68knommu/kernel/time.c b/arch/m68knommu/kernel/time.c
index d182b2f72211..a90acf5b0cde 100644
--- a/arch/m68knommu/kernel/time.c
+++ b/arch/m68knommu/kernel/time.c
@@ -69,12 +69,13 @@ static unsigned long read_rtc_mmss(void)
         if ((year += 1900) < 1970)
                 year += 100;
 
-        return  mktime(year, mon, day, hour, min, sec);;
+        return  mktime(year, mon, day, hour, min, sec);
 }
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
-        return read_rtc_mmss();
+        ts->tv_sec = read_rtc_mmss();
+        ts->tv_nsec = 0;
 }
 
 int update_persistent_clock(struct timespec now)
diff --git a/arch/m68knommu/lib/checksum.c b/arch/m68knommu/lib/checksum.c
index 269d83bfbbe1..eccf25d3d73e 100644
--- a/arch/m68knommu/lib/checksum.c
+++ b/arch/m68knommu/lib/checksum.c
@@ -92,6 +92,7 @@ out:
         return result;
 }
 
+#ifdef CONFIG_COLDFIRE
 /*
  *      This is a version of ip_compute_csum() optimized for IP headers,
  *      which always checksum on 4 octet boundaries.
@@ -100,6 +101,7 @@ __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
 {
         return (__force __sum16)~do_csum(iph,ihl*4);
 }
+#endif
 
 /*
  * computes the checksum of a memory block at buff, length len,
@@ -127,15 +129,6 @@ __wsum csum_partial(const void *buff, int len, __wsum sum)
 EXPORT_SYMBOL(csum_partial);
 
 /*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-__sum16 ip_compute_csum(const void *buff, int len)
-{
-        return (__force __sum16)~do_csum(buff,len);
-}
-
-/*
  * copy from fs while checksumming, otherwise like csum_partial
  */
 
diff --git a/arch/m68knommu/platform/5206/Makefile b/arch/m68knommu/platform/5206/Makefile
index a439d9ab3f27..113c33390064 100644
--- a/arch/m68knommu/platform/5206/Makefile
+++ b/arch/m68knommu/platform/5206/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o
 
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c
index f6f79874e9af..9c335465e66d 100644
--- a/arch/m68knommu/platform/5206/config.c
+++ b/arch/m68knommu/platform/5206/config.c
@@ -49,11 +49,11 @@ static void __init m5206_uart_init_line(int line, int irq)
         if (line == 0) {
                 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
                 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
         } else if (line == 1) {
                 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
                 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
         }
 }
 
@@ -68,38 +68,19 @@ static void __init m5206_uarts_init(void)
 
 /***************************************************************************/
 
-void mcf_autovector(unsigned int vec)
+static void __init m5206_timers_init(void)
 {
-        volatile unsigned char  *mbar;
-        unsigned char           icr;
-
-        if ((vec >= 25) && (vec <= 31)) {
-                vec -= 25;
-                mbar = (volatile unsigned char *) MCF_MBAR;
-                icr = MCFSIM_ICR_AUTOVEC | (vec << 3);
-                *(mbar + MCFSIM_ICR1 + vec) = icr;
-                vec = 0x1 << (vec + 1);
-                mcf_setimr(mcf_getimr() & ~vec);
-        }
-}
-
-/***************************************************************************/
-
-void mcf_settimericr(unsigned int timer, unsigned int level)
-{
-        volatile unsigned char *icrp;
-        unsigned int icr, imr;
-
-        if (timer <= 2) {
-                switch (timer) {
-                case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
-                default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
-                }
-
-                icrp = (volatile unsigned char *) (MCF_MBAR + icr);
-                *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
-                mcf_setimr(mcf_getimr() & ~imr);
-        }
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
 }
 
 /***************************************************************************/
@@ -117,15 +98,20 @@ void m5206_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_setimr(MCFSIM_IMR_MASKALL);
         mach_reset = m5206_cpu_reset;
+        m5206_timers_init();
+        m5206_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(28, MCFINTC_EINT4);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
-        m5206_uarts_init();
         platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/5206/gpio.c b/arch/m68knommu/platform/5206/gpio.c
new file mode 100644
index 000000000000..60f779ce1651
--- /dev/null
+++ b/arch/m68knommu/platform/5206/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFSIM_PADDR,
+                .podr                           = MCFSIM_PADAT,
+                .ppdr                           = MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5206e/Makefile b/arch/m68knommu/platform/5206e/Makefile
index a439d9ab3f27..113c33390064 100644
--- a/arch/m68knommu/platform/5206e/Makefile
+++ b/arch/m68knommu/platform/5206e/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o
 
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
index 65887799db81..0f41ba82a3b5 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -15,6 +15,7 @@
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
 #include <asm/mcfsim.h>
+#include <asm/mcfuart.h>
 #include <asm/mcfdma.h>
 #include <asm/mcfuart.h>
 
@@ -49,11 +50,11 @@ static void __init m5206e_uart_init_line(int line, int irq)
         if (line == 0) {
                 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
                 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
         } else if (line == 1) {
                 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
                 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
         }
 }
 
@@ -68,38 +69,19 @@ static void __init m5206e_uarts_init(void)
 
 /***************************************************************************/
 
-void mcf_autovector(unsigned int vec)
-{
-        volatile unsigned char  *mbar;
-        unsigned char           icr;
-
-        if ((vec >= 25) && (vec <= 31)) {
-                vec -= 25;
-                mbar = (volatile unsigned char *) MCF_MBAR;
-                icr = MCFSIM_ICR_AUTOVEC | (vec << 3);
-                *(mbar + MCFSIM_ICR1 + vec) = icr;
-                vec = 0x1 << (vec + 1);
-                mcf_setimr(mcf_getimr() & ~vec);
-        }
-}
-
-/***************************************************************************/
-
-void mcf_settimericr(unsigned int timer, unsigned int level)
+static void __init m5206e_timers_init(void)
 {
-        volatile unsigned char *icrp;
-        unsigned int icr, imr;
-
-        if (timer <= 2) {
-                switch (timer) {
-                case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
-                default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
-                }
-
-                icrp = (volatile unsigned char *) (MCF_MBAR + icr);
-                *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
-                mcf_setimr(mcf_getimr() & ~imr);
-        }
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
 }
 
 /***************************************************************************/
@@ -117,8 +99,6 @@ void m5206e_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_setimr(MCFSIM_IMR_MASKALL);
-
 #if defined(CONFIG_NETtel)
         /* Copy command line from FLASH to local buffer... */
         memcpy(commandp, (char *) 0xf0004000, size);
@@ -126,13 +106,19 @@ void __init config_BSP(char *commandp, int size)
 #endif /* CONFIG_NETtel */
 
         mach_reset = m5206e_cpu_reset;
+        m5206e_timers_init();
+        m5206e_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(28, MCFINTC_EINT4);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
-        m5206e_uarts_init();
         platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/5206e/gpio.c b/arch/m68knommu/platform/5206e/gpio.c
new file mode 100644
index 000000000000..60f779ce1651
--- /dev/null
+++ b/arch/m68knommu/platform/5206e/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFSIM_PADDR,
+                .podr                           = MCFSIM_PADAT,
+                .ppdr                           = MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/520x/Makefile b/arch/m68knommu/platform/520x/Makefile
index a50e76acc8fd..435ab3483dc1 100644
--- a/arch/m68knommu/platform/520x/Makefile
+++ b/arch/m68knommu/platform/520x/Makefile
@@ -14,4 +14,4 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 1c43a8aec69b..92614de42cd3 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -81,20 +81,11 @@ static struct platform_device *m520x_devices[] __initdata = {
 
 /***************************************************************************/
 
-#define INTC0   (MCF_MBAR + MCFICM_INTC0)
-
 static void __init m520x_uart_init_line(int line, int irq)
 {
-        u32 imr;
         u16 par;
         u8 par2;
 
-        writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
-
-        imr = readl(INTC0 + MCFINTC_IMRL);
-        imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
-        writel(imr, INTC0 + MCFINTC_IMRL);
-
         switch (line) {
         case 0:
                 par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
@@ -131,18 +122,8 @@ static void __init m520x_uarts_init(void)
 
 static void __init m520x_fec_init(void)
 {
-        u32 imr;
         u8 v;
 
-        /* Unmask FEC interrupts at ColdFire interrupt controller */
-        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 36);
-        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
-        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);
-
-        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
-        imr &= ~0x0001FFF0;
-        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
-
         /* Set multi-function pins to ethernet mode */
         v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
         writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);
@@ -153,17 +134,6 @@ static void __init m520x_fec_init(void)
 
 /***************************************************************************/
 
-/*
- *  Program the vector to be an auto-vectored.
- */
-
-void mcf_autovector(unsigned int vec)
-{
-    /* Everything is auto-vectored on the 520x devices */
-}
-
-/***************************************************************************/
-
 static void m520x_cpu_reset(void)
 {
         local_irq_disable();
diff --git a/arch/m68knommu/platform/520x/gpio.c b/arch/m68knommu/platform/520x/gpio.c
new file mode 100644
index 000000000000..15b5bb62a698
--- /dev/null
+++ b/arch/m68knommu/platform/520x/gpio.c
@@ -0,0 +1,211 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFEPORT_EPDDR,
+                .podr                           = MCFEPORT_EPDR,
+                .ppdr                           = MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_BUSCTL,
+                .podr                           = MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BE",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_BE,
+                .podr                           = MCFGPIO_PODR_BE,
+                .ppdr                           = MCFGPIO_PPDSDR_BE,
+                .setr                           = MCFGPIO_PPDSDR_BE,
+                .clrr                           = MCFGPIO_PCLRR_BE,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 25,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = MCFGPIO_PDDR_CS,
+                .podr                           = MCFGPIO_PODR_CS,
+                .ppdr                           = MCFGPIO_PPDSDR_CS,
+                .setr                           = MCFGPIO_PPDSDR_CS,
+                .clrr                           = MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECI2C,
+                .podr                           = MCFGPIO_PODR_FECI2C,
+                .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_QSPI,
+                .podr                           = MCFGPIO_PODR_QSPI,
+                .ppdr                           = MCFGPIO_PPDSDR_QSPI,
+                .setr                           = MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 48,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_TIMER,
+                .podr                           = MCFGPIO_PODR_TIMER,
+                .ppdr                           = MCFGPIO_PPDSDR_TIMER,
+                .setr                           = MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = MCFGPIO_PCLRR_TIMER,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UART",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_UART,
+                .podr                           = MCFGPIO_PODR_UART,
+                .ppdr                           = MCFGPIO_PPDSDR_UART,
+                .setr                           = MCFGPIO_PPDSDR_UART,
+                .clrr                           = MCFGPIO_PCLRR_UART,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECH,
+                .podr                           = MCFGPIO_PODR_FECH,
+                .ppdr                           = MCFGPIO_PPDSDR_FECH,
+                .setr                           = MCFGPIO_PPDSDR_FECH,
+                .clrr                           = MCFGPIO_PCLRR_FECH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECL,
+                .podr                           = MCFGPIO_PODR_FECL,
+                .ppdr                           = MCFGPIO_PPDSDR_FECL,
+                .setr                           = MCFGPIO_PPDSDR_FECL,
+                .clrr                           = MCFGPIO_PCLRR_FECL,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/523x/Makefile b/arch/m68knommu/platform/523x/Makefile
index 5694d593f029..b8f9b45440c2 100644
--- a/arch/m68knommu/platform/523x/Makefile
+++ b/arch/m68knommu/platform/523x/Makefile
@@ -14,4 +14,4 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
index 961fefebca14..6ba84f2aa397 100644
--- a/arch/m68knommu/platform/523x/config.c
+++ b/arch/m68knommu/platform/523x/config.c
@@ -82,66 +82,20 @@ static struct platform_device *m523x_devices[] __initdata = {
 
 /***************************************************************************/
 
-#define INTC0   (MCF_MBAR + MCFICM_INTC0)
-
-static void __init m523x_uart_init_line(int line, int irq)
-{
-        u32 imr;
-
-        if ((line < 0) || (line > 2))
-                return;
-
-        writeb(0x30+line, (INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line));
-
-        imr = readl(INTC0 + MCFINTC_IMRL);
-        imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
-        writel(imr, INTC0 + MCFINTC_IMRL);
-}
-
-static void __init m523x_uarts_init(void)
-{
-        const int nrlines = ARRAY_SIZE(m523x_uart_platform);
-        int line;
-
-        for (line = 0; (line < nrlines); line++)
-                m523x_uart_init_line(line, m523x_uart_platform[line].irq);
-}
-
-/***************************************************************************/
-
 static void __init m523x_fec_init(void)
 {
-        u32 imr;
-
-        /* Unmask FEC interrupts at ColdFire interrupt controller */
-        writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
-        writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
-        writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
-
-        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
-        imr &= ~0xf;
-        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
-        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
-        imr &= ~0xff800001;
-        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
-}
-
-/***************************************************************************/
-
-void mcf_disableall(void)
-{
-        *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
-        *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
+        u16 par;
+        u8 v;
+
+        /* Set multi-function pins to ethernet use */
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xf00, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100078);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
 }
 
 /***************************************************************************/
 
-void mcf_autovector(unsigned int vec)
-{
-        /* Everything is auto-vectored on the 523x */
-}
-/***************************************************************************/
-
 static void m523x_cpu_reset(void)
 {
         local_irq_disable();
@@ -152,16 +106,14 @@ static void m523x_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_disableall();
         mach_reset = m523x_cpu_reset;
-        m523x_uarts_init();
-        m523x_fec_init();
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
+        m523x_fec_init();
         platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/523x/gpio.c b/arch/m68knommu/platform/523x/gpio.c
new file mode 100644
index 000000000000..f02840d54d3c
--- /dev/null
+++ b/arch/m68knommu/platform/523x/gpio.c
@@ -0,0 +1,283 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFEPORT_EPDDR,
+                .podr                           = MCFEPORT_EPDR,
+                .ppdr                           = MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ADDR",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 13,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = MCFGPIO_PDDR_ADDR,
+                .podr                           = MCFGPIO_PODR_ADDR,
+                .ppdr                           = MCFGPIO_PPDSDR_ADDR,
+                .setr                           = MCFGPIO_PPDSDR_ADDR,
+                .clrr                           = MCFGPIO_PCLRR_ADDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_DATAH,
+                .podr                           = MCFGPIO_PODR_DATAH,
+                .ppdr                           = MCFGPIO_PPDSDR_DATAH,
+                .setr                           = MCFGPIO_PPDSDR_DATAH,
+                .clrr                           = MCFGPIO_PCLRR_DATAH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_DATAL,
+                .podr                           = MCFGPIO_PODR_DATAL,
+                .ppdr                           = MCFGPIO_PPDSDR_DATAL,
+                .setr                           = MCFGPIO_PPDSDR_DATAL,
+                .clrr                           = MCFGPIO_PCLRR_DATAL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_BUSCTL,
+                .podr                           = MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_BS,
+                .podr                           = MCFGPIO_PODR_BS,
+                .ppdr                           = MCFGPIO_PPDSDR_BS,
+                .setr                           = MCFGPIO_PPDSDR_BS,
+                .clrr                           = MCFGPIO_PCLRR_BS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 49,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = MCFGPIO_PDDR_CS,
+                .podr                           = MCFGPIO_PODR_CS,
+                .ppdr                           = MCFGPIO_PPDSDR_CS,
+                .setr                           = MCFGPIO_PPDSDR_CS,
+                .clrr                           = MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SDRAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = MCFGPIO_PDDR_SDRAM,
+                .podr                           = MCFGPIO_PODR_SDRAM,
+                .ppdr                           = MCFGPIO_PPDSDR_SDRAM,
+                .setr                           = MCFGPIO_PPDSDR_SDRAM,
+                .clrr                           = MCFGPIO_PCLRR_SDRAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECI2C,
+                .podr                           = MCFGPIO_PODR_FECI2C,
+                .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = MCFGPIO_PDDR_UARTH,
+                .podr                           = MCFGPIO_PODR_UARTH,
+                .ppdr                           = MCFGPIO_PPDSDR_UARTH,
+                .setr                           = MCFGPIO_PPDSDR_UARTH,
+                .clrr                           = MCFGPIO_PCLRR_UARTH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_UARTL,
+                .podr                           = MCFGPIO_PODR_UARTL,
+                .ppdr                           = MCFGPIO_PPDSDR_UARTL,
+                .setr                           = MCFGPIO_PPDSDR_UARTL,
+                .clrr                           = MCFGPIO_PCLRR_UARTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = MCFGPIO_PDDR_QSPI,
+                .podr                           = MCFGPIO_PODR_QSPI,
+                .ppdr                           = MCFGPIO_PPDSDR_QSPI,
+                .setr                           = MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_TIMER,
+                .podr                           = MCFGPIO_PODR_TIMER,
+                .ppdr                           = MCFGPIO_PPDSDR_TIMER,
+                .setr                           = MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = MCFGPIO_PCLRR_TIMER,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ETPU",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = MCFGPIO_PDDR_ETPU,
+                .podr                           = MCFGPIO_PODR_ETPU,
+                .ppdr                           = MCFGPIO_PPDSDR_ETPU,
+                .setr                           = MCFGPIO_PPDSDR_ETPU,
+                .clrr                           = MCFGPIO_PCLRR_ETPU,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5249/Makefile b/arch/m68knommu/platform/5249/Makefile
index a439d9ab3f27..f56225d1582f 100644
--- a/arch/m68knommu/platform/5249/Makefile
+++ b/arch/m68knommu/platform/5249/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o intc2.o
 
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
index 93d998825925..646f5ba462fc 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -48,11 +48,11 @@ static void __init m5249_uart_init_line(int line, int irq)
         if (line == 0) {
                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
                 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
         } else if (line == 1) {
                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
                 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
         }
 }
 
@@ -65,38 +65,21 @@ static void __init m5249_uarts_init(void)
                 m5249_uart_init_line(line, m5249_uart_platform[line].irq);
 }
 
-
 /***************************************************************************/
 
-void mcf_autovector(unsigned int vec)
+static void __init m5249_timers_init(void)
 {
-        volatile unsigned char  *mbar;
-
-        if ((vec >= 25) && (vec <= 31)) {
-                mbar = (volatile unsigned char *) MCF_MBAR;
-                vec = 0x1 << (vec - 24);
-                *(mbar + MCFSIM_AVR) |= vec;
-                mcf_setimr(mcf_getimr() & ~vec);
-        }
-}
-
-/***************************************************************************/
-
-void mcf_settimericr(unsigned int timer, unsigned int level)
-{
-        volatile unsigned char *icrp;
-        unsigned int icr, imr;
-
-        if (timer <= 2) {
-                switch (timer) {
-                case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
-                default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
-                }
-
-                icrp = (volatile unsigned char *) (MCF_MBAR + icr);
-                *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
-                mcf_setimr(mcf_getimr() & ~imr);
-        }
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
 }
 
 /***************************************************************************/
@@ -114,15 +97,15 @@ void m5249_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_setimr(MCFSIM_IMR_MASKALL);
         mach_reset = m5249_cpu_reset;
+        m5249_timers_init();
+        m5249_uarts_init();
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
-        m5249_uarts_init();
         platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/5249/gpio.c b/arch/m68knommu/platform/5249/gpio.c
new file mode 100644
index 000000000000..c611eab8b3b6
--- /dev/null
+++ b/arch/m68knommu/platform/5249/gpio.c
@@ -0,0 +1,65 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "GPIO0",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 32,
+                },
+                .pddr                           = MCFSIM2_GPIOENABLE,
+                .podr                           = MCFSIM2_GPIOWRITE,
+                .ppdr                           = MCFSIM2_GPIOREAD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "GPIO1",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 32,
+                        .ngpio                  = 32,
+                },
+                .pddr                           = MCFSIM2_GPIO1ENABLE,
+                .podr                           = MCFSIM2_GPIO1WRITE,
+                .ppdr                           = MCFSIM2_GPIO1READ,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5249/intc2.c b/arch/m68knommu/platform/5249/intc2.c
new file mode 100644
index 000000000000..d09d9da04537
--- /dev/null
+++ b/arch/m68knommu/platform/5249/intc2.c
@@ -0,0 +1,59 @@
+/*
+ * intc2.c  -- support for the 2nd INTC controller of the 5249
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+static void intc2_irq_gpio_mask(unsigned int irq)
+{
+        u32 imr;
+        imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+        imr &= ~(0x1 << (irq - MCFINTC2_GPIOIRQ0));
+        writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+}
+
+static void intc2_irq_gpio_unmask(unsigned int irq)
+{
+        u32 imr;
+        imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+        imr |= (0x1 << (irq - MCFINTC2_GPIOIRQ0));
+        writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
+}
+
+static void intc2_irq_gpio_ack(unsigned int irq)
+{
+        writel(0x1 << (irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR);
+}
+
+static struct irq_chip intc2_irq_gpio_chip = {
+        .name           = "CF-INTC2",
+        .mask           = intc2_irq_gpio_mask,
+        .unmask         = intc2_irq_gpio_unmask,
+        .ack            = intc2_irq_gpio_ack,
+};
+
+static int __init mcf_intc2_init(void)
+{
+        int irq;
+
+        /* GPIO interrupt sources */
+        for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++)
+                irq_desc[irq].chip = &intc2_irq_gpio_chip;
+
+        return 0;
+}
+
+arch_initcall(mcf_intc2_init);
diff --git a/arch/m68knommu/platform/5272/Makefile b/arch/m68knommu/platform/5272/Makefile
index 26135d92b34d..93673ef8e2c1 100644
--- a/arch/m68knommu/platform/5272/Makefile
+++ b/arch/m68knommu/platform/5272/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o intc.o
 
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c
index 5f95fcde05fd..59278c0887d0 100644
--- a/arch/m68knommu/platform/5272/config.c
+++ b/arch/m68knommu/platform/5272/config.c
@@ -20,12 +20,6 @@
 
 /***************************************************************************/
 
-extern unsigned int mcf_timervector;
-extern unsigned int mcf_profilevector;
-extern unsigned int mcf_timerlevel;
-
-/***************************************************************************/
-
 /*
  *      Some platforms need software versions of the GPIO data registers.
  */
@@ -37,11 +31,11 @@ unsigned char ledbank = 0xff;
 static struct mcf_platform_uart m5272_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
-                .irq            = 73,
+                .irq            = MCF_IRQ_UART1,
         },
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
-                .irq            = 74,
+                .irq            = MCF_IRQ_UART2,
         },
         { },
 };
@@ -59,18 +53,18 @@ static struct resource m5272_fec_resources[] = {
                 .flags          = IORESOURCE_MEM,
         },
         {
-                .start          = 86,
-                .end            = 86,
+                .start          = MCF_IRQ_ERX,
+                .end            = MCF_IRQ_ERX,
                 .flags          = IORESOURCE_IRQ,
         },
         {
-                .start          = 87,
-                .end            = 87,
+                .start          = MCF_IRQ_ETX,
+                .end            = MCF_IRQ_ETX,
                 .flags          = IORESOURCE_IRQ,
         },
         {
-                .start          = 88,
-                .end            = 88,
+                .start          = MCF_IRQ_ENTC,
+                .end            = MCF_IRQ_ENTC,
                 .flags          = IORESOURCE_IRQ,
         },
 };
@@ -94,9 +88,6 @@ static void __init m5272_uart_init_line(int line, int irq)
         u32 v;
 
         if ((line >= 0) && (line < 2)) {
-                v = (line) ? 0x0e000000 : 0xe0000000;
-                writel(v, MCF_MBAR + MCFSIM_ICR2);
-
                 /* Enable the output lines for the serial ports */
                 v = readl(MCF_MBAR + MCFSIM_PBCNT);
                 v = (v & ~0x000000ff) | 0x00000055;
@@ -119,54 +110,6 @@ static void __init m5272_uarts_init(void)
 
 /***************************************************************************/
 
-static void __init m5272_fec_init(void)
-{
-        u32 imr;
-
-        /* Unmask FEC interrupts at ColdFire interrupt controller */
-        imr = readl(MCF_MBAR + MCFSIM_ICR3);
-        imr = (imr & ~0x00000fff) | 0x00000ddd;
-        writel(imr, MCF_MBAR + MCFSIM_ICR3);
-
-        imr = readl(MCF_MBAR + MCFSIM_ICR1);
-        imr = (imr & ~0x0f000000) | 0x0d000000;
-        writel(imr, MCF_MBAR + MCFSIM_ICR1);
-}
-
-/***************************************************************************/
-
-void mcf_disableall(void)
-{
-        volatile unsigned long  *icrp;
-
-        icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
-        icrp[0] = 0x88888888;
-        icrp[1] = 0x88888888;
-        icrp[2] = 0x88888888;
-        icrp[3] = 0x88888888;
-}
-
-/***************************************************************************/
-
-void mcf_autovector(unsigned int vec)
-{
-        /* Everything is auto-vectored on the 5272 */
-}
-
-/***************************************************************************/
-
-void mcf_settimericr(int timer, int level)
-{
-        volatile unsigned long *icrp;
-
-        if ((timer >= 1 ) && (timer <= 4)) {
-                icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
-                *icrp = (0x8 | level) << ((4 - timer) * 4);
-        }
-}
-
-/***************************************************************************/
-
 static void m5272_cpu_reset(void)
 {
         local_irq_disable();
@@ -190,8 +133,6 @@ void __init config_BSP(char *commandp, int size)
         *pivrp = 0x40;
 #endif
 
-        mcf_disableall();
-
 #if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
         /* Copy command line from FLASH to local buffer... */
         memcpy(commandp, (char *) 0xf0004000, size);
@@ -202,8 +143,6 @@ void __init config_BSP(char *commandp, int size)
         commandp[size-1] = 0;
 #endif
 
-        mcf_timervector = 69;
-        mcf_profilevector = 70;
         mach_reset = m5272_cpu_reset;
 }
 
@@ -212,7 +151,6 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
         m5272_uarts_init();
-        m5272_fec_init();
         platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/5272/gpio.c b/arch/m68knommu/platform/5272/gpio.c
new file mode 100644
index 000000000000..459db89a89cc
--- /dev/null
+++ b/arch/m68knommu/platform/5272/gpio.c
@@ -0,0 +1,81 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = MCFSIM_PADDR,
+                .podr                           = MCFSIM_PADAT,
+                .ppdr                           = MCFSIM_PADAT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "PB",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 16,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = MCFSIM_PBDDR,
+                .podr                           = MCFSIM_PBDAT,
+                .ppdr                           = MCFSIM_PBDAT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "PC",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 32,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = MCFSIM_PCDDR,
+                .podr                           = MCFSIM_PCDAT,
+                .ppdr                           = MCFSIM_PCDAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5272/intc.c b/arch/m68knommu/platform/5272/intc.c
new file mode 100644
index 000000000000..7081e0a9720e
--- /dev/null
+++ b/arch/m68knommu/platform/5272/intc.c
@@ -0,0 +1,138 @@
+/*
+ * intc.c  --  interrupt controller or ColdFire 5272 SoC
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/traps.h>
+
+/*
+ * The 5272 ColdFire interrupt controller is nothing like any other
+ * ColdFire interrupt controller - it truly is completely different.
+ * Given its age it is unlikely to be used on any other ColdFire CPU.
+ */
+
+/*
+ * The masking and priproty setting of interrupts on the 5272 is done
+ * via a set of 4 "Interrupt Controller Registers" (ICR). There is a
+ * loose mapping of vector number to register and internal bits, but
+ * a table is the easiest and quickest way to map them.
+ */
+struct irqmap {
+        unsigned char   icr;
+        unsigned char   index;
+        unsigned char   ack;
+};
+
+static struct irqmap intc_irqmap[MCFINT_VECMAX - MCFINT_VECBASE] = {
+        /*MCF_IRQ_SPURIOUS*/    { .icr = 0,           .index = 0,  .ack = 0, },
+        /*MCF_IRQ_EINT1*/       { .icr = MCFSIM_ICR1, .index = 28, .ack = 1, },
+        /*MCF_IRQ_EINT2*/       { .icr = MCFSIM_ICR1, .index = 24, .ack = 1, },
+        /*MCF_IRQ_EINT3*/       { .icr = MCFSIM_ICR1, .index = 20, .ack = 1, },
+        /*MCF_IRQ_EINT4*/       { .icr = MCFSIM_ICR1, .index = 16, .ack = 1, },
+        /*MCF_IRQ_TIMER1*/      { .icr = MCFSIM_ICR1, .index = 12, .ack = 0, },
+        /*MCF_IRQ_TIMER2*/      { .icr = MCFSIM_ICR1, .index = 8,  .ack = 0, },
+        /*MCF_IRQ_TIMER3*/      { .icr = MCFSIM_ICR1, .index = 4,  .ack = 0, },
+        /*MCF_IRQ_TIMER4*/      { .icr = MCFSIM_ICR1, .index = 0,  .ack = 0, },
+        /*MCF_IRQ_UART1*/       { .icr = MCFSIM_ICR2, .index = 28, .ack = 0, },
+        /*MCF_IRQ_UART2*/       { .icr = MCFSIM_ICR2, .index = 24, .ack = 0, },
+        /*MCF_IRQ_PLIP*/        { .icr = MCFSIM_ICR2, .index = 20, .ack = 0, },
+        /*MCF_IRQ_PLIA*/        { .icr = MCFSIM_ICR2, .index = 16, .ack = 0, },
+        /*MCF_IRQ_USB0*/        { .icr = MCFSIM_ICR2, .index = 12, .ack = 0, },
+        /*MCF_IRQ_USB1*/        { .icr = MCFSIM_ICR2, .index = 8,  .ack = 0, },
+        /*MCF_IRQ_USB2*/        { .icr = MCFSIM_ICR2, .index = 4,  .ack = 0, },
+        /*MCF_IRQ_USB3*/        { .icr = MCFSIM_ICR2, .index = 0,  .ack = 0, },
+        /*MCF_IRQ_USB4*/        { .icr = MCFSIM_ICR3, .index = 28, .ack = 0, },
+        /*MCF_IRQ_USB5*/        { .icr = MCFSIM_ICR3, .index = 24, .ack = 0, },
+        /*MCF_IRQ_USB6*/        { .icr = MCFSIM_ICR3, .index = 20, .ack = 0, },
+        /*MCF_IRQ_USB7*/        { .icr = MCFSIM_ICR3, .index = 16, .ack = 0, },
+        /*MCF_IRQ_DMA*/         { .icr = MCFSIM_ICR3, .index = 12, .ack = 0, },
+        /*MCF_IRQ_ERX*/         { .icr = MCFSIM_ICR3, .index = 8,  .ack = 0, },
+        /*MCF_IRQ_ETX*/         { .icr = MCFSIM_ICR3, .index = 4,  .ack = 0, },
+        /*MCF_IRQ_ENTC*/        { .icr = MCFSIM_ICR3, .index = 0,  .ack = 0, },
+        /*MCF_IRQ_QSPI*/        { .icr = MCFSIM_ICR4, .index = 28, .ack = 0, },
+        /*MCF_IRQ_EINT5*/       { .icr = MCFSIM_ICR4, .index = 24, .ack = 1, },
+        /*MCF_IRQ_EINT6*/       { .icr = MCFSIM_ICR4, .index = 20, .ack = 1, },
+        /*MCF_IRQ_SWTO*/        { .icr = MCFSIM_ICR4, .index = 16, .ack = 0, },
+};
+
+static void intc_irq_mask(unsigned int irq)
+{
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
+                u32 v;
+                irq -= MCFINT_VECBASE;
+                v = 0x8 << intc_irqmap[irq].index;
+                writel(v, MCF_MBAR + intc_irqmap[irq].icr);
+        }
+}
+
+static void intc_irq_unmask(unsigned int irq)
+{
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
+                u32 v;
+                irq -= MCFINT_VECBASE;
+                v = 0xd << intc_irqmap[irq].index;
+                writel(v, MCF_MBAR + intc_irqmap[irq].icr);
+        }
+}
+
+static void intc_irq_ack(unsigned int irq)
+{
+        /* Only external interrupts are acked */
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) {
+                irq -= MCFINT_VECBASE;
+                if (intc_irqmap[irq].ack) {
+                        u32 v;
+                        v = 0xd << intc_irqmap[irq].index;
+                        writel(v, MCF_MBAR + intc_irqmap[irq].icr);
+                }
+        }
+}
+
+static int intc_irq_set_type(unsigned int irq, unsigned int type)
+{
+        /* We can set the edge type here for external interrupts */
+        return 0;
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .mask           = intc_irq_mask,
+        .unmask         = intc_irq_unmask,
+        .ack            = intc_irq_ack,
+        .set_type       = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+        int irq;
+
+        init_vectors();
+
+        /* Mask all interrupt sources */
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR1);
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR2);
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR3);
+        writel(0x88888888, MCF_MBAR + MCFSIM_ICR4);
+
+        for (irq = 0; (irq < NR_IRQS); irq++) {
+                irq_desc[irq].status = IRQ_DISABLED;
+                irq_desc[irq].action = NULL;
+                irq_desc[irq].depth = 1;
+                irq_desc[irq].chip = &intc_irq_chip;
+                intc_irq_set_type(irq, 0);
+        }
+}
+
diff --git a/arch/m68knommu/platform/527x/Makefile b/arch/m68knommu/platform/527x/Makefile
index 26135d92b34d..3d90e6d92459 100644
--- a/arch/m68knommu/platform/527x/Makefile
+++ b/arch/m68knommu/platform/527x/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o
 
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
index f746439cfd3e..fa51be172830 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68knommu/platform/527x/config.c
@@ -116,23 +116,13 @@ static struct platform_device *m527x_devices[] __initdata = {
 
 /***************************************************************************/
 
-#define INTC0   (MCF_MBAR + MCFICM_INTC0)
-
 static void __init m527x_uart_init_line(int line, int irq)
 {
         u16 sepmask;
-        u32 imr;
 
         if ((line < 0) || (line > 2))
                 return;
 
-        /* level 6, line based priority */
-        writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
-
-        imr = readl(INTC0 + MCFINTC_IMRL);
-        imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
-        writel(imr, INTC0 + MCFINTC_IMRL);
-
         /*
          * External Pin Mask Setting & Enable External Pin for Interface
          */
@@ -157,32 +147,11 @@ static void __init m527x_uarts_init(void)
 
 /***************************************************************************/
 
-static void __init m527x_fec_irq_init(int nr)
-{
-        unsigned long base;
-        u32 imr;
-
-        base = MCF_IPSBAR + (nr ? MCFICM_INTC1 : MCFICM_INTC0);
-
-        writeb(0x28, base + MCFINTC_ICR0 + 23);
-        writeb(0x27, base + MCFINTC_ICR0 + 27);
-        writeb(0x26, base + MCFINTC_ICR0 + 29);
-
-        imr = readl(base + MCFINTC_IMRH);
-        imr &= ~0xf;
-        writel(imr, base + MCFINTC_IMRH);
-        imr = readl(base + MCFINTC_IMRL);
-        imr &= ~0xff800001;
-        writel(imr, base + MCFINTC_IMRL);
-}
-
 static void __init m527x_fec_init(void)
 {
         u16 par;
         u8 v;
 
-        m527x_fec_irq_init(0);
-
         /* Set multi-function pins to ethernet mode for fec0 */
 #if defined(CONFIG_M5271)
         v = readb(MCF_IPSBAR + 0x100047);
@@ -195,8 +164,6 @@ static void __init m527x_fec_init(void)
 #endif
 
 #ifdef CONFIG_FEC2
-        m527x_fec_irq_init(1);
-
         /* Set multi-function pins to ethernet mode for fec1 */
         par = readw(MCF_IPSBAR + 0x100082);
         writew(par | 0xa0, MCF_IPSBAR + 0x100082);
@@ -207,21 +174,6 @@ static void __init m527x_fec_init(void)
 
 /***************************************************************************/
 
-void mcf_disableall(void)
-{
-        *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
-        *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
-}
-
-/***************************************************************************/
-
-void mcf_autovector(unsigned int vec)
-{
-        /* Everything is auto-vectored on the 5272 */
-}
-
-/***************************************************************************/
-
 static void m527x_cpu_reset(void)
 {
         local_irq_disable();
@@ -232,7 +184,6 @@ static void m527x_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_disableall();
         mach_reset = m527x_cpu_reset;
         m527x_uarts_init();
         m527x_fec_init();
diff --git a/arch/m68knommu/platform/527x/gpio.c b/arch/m68knommu/platform/527x/gpio.c
new file mode 100644
index 000000000000..1028142851ac
--- /dev/null
+++ b/arch/m68knommu/platform/527x/gpio.c
@@ -0,0 +1,607 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+#if defined(CONFIG_M5271)
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFEPORT_EPDDR,
+                .podr                           = MCFEPORT_EPDR,
+                .ppdr                           = MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ADDR",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 13,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = MCFGPIO_PDDR_ADDR,
+                .podr                           = MCFGPIO_PODR_ADDR,
+                .ppdr                           = MCFGPIO_PPDSDR_ADDR,
+                .setr                           = MCFGPIO_PPDSDR_ADDR,
+                .clrr                           = MCFGPIO_PCLRR_ADDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_DATAH,
+                .podr                           = MCFGPIO_PODR_DATAH,
+                .ppdr                           = MCFGPIO_PPDSDR_DATAH,
+                .setr                           = MCFGPIO_PPDSDR_DATAH,
+                .clrr                           = MCFGPIO_PCLRR_DATAH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DATAL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_DATAL,
+                .podr                           = MCFGPIO_PODR_DATAL,
+                .ppdr                           = MCFGPIO_PPDSDR_DATAL,
+                .setr                           = MCFGPIO_PPDSDR_DATAL,
+                .clrr                           = MCFGPIO_PCLRR_DATAL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_BUSCTL,
+                .podr                           = MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_BS,
+                .podr                           = MCFGPIO_PODR_BS,
+                .ppdr                           = MCFGPIO_PPDSDR_BS,
+                .setr                           = MCFGPIO_PPDSDR_BS,
+                .clrr                           = MCFGPIO_PCLRR_BS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 49,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = MCFGPIO_PDDR_CS,
+                .podr                           = MCFGPIO_PODR_CS,
+                .ppdr                           = MCFGPIO_PPDSDR_CS,
+                .setr                           = MCFGPIO_PPDSDR_CS,
+                .clrr                           = MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SDRAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = MCFGPIO_PDDR_SDRAM,
+                .podr                           = MCFGPIO_PODR_SDRAM,
+                .ppdr                           = MCFGPIO_PPDSDR_SDRAM,
+                .setr                           = MCFGPIO_PPDSDR_SDRAM,
+                .clrr                           = MCFGPIO_PCLRR_SDRAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECI2C,
+                .podr                           = MCFGPIO_PODR_FECI2C,
+                .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = MCFGPIO_PDDR_UARTH,
+                .podr                           = MCFGPIO_PODR_UARTH,
+                .ppdr                           = MCFGPIO_PPDSDR_UARTH,
+                .setr                           = MCFGPIO_PPDSDR_UARTH,
+                .clrr                           = MCFGPIO_PCLRR_UARTH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_UARTL,
+                .podr                           = MCFGPIO_PODR_UARTL,
+                .ppdr                           = MCFGPIO_PPDSDR_UARTL,
+                .setr                           = MCFGPIO_PPDSDR_UARTL,
+                .clrr                           = MCFGPIO_PCLRR_UARTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = MCFGPIO_PDDR_QSPI,
+                .podr                           = MCFGPIO_PODR_QSPI,
+                .ppdr                           = MCFGPIO_PPDSDR_QSPI,
+                .setr                           = MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_TIMER,
+                .podr                           = MCFGPIO_PODR_TIMER,
+                .ppdr                           = MCFGPIO_PPDSDR_TIMER,
+                .setr                           = MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = MCFGPIO_PCLRR_TIMER,
+        },
+#elif defined(CONFIG_M5275)
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFEPORT_EPDDR,
+                .podr                           = MCFEPORT_EPDR,
+                .ppdr                           = MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_BUSCTL,
+                .podr                           = MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "ADDR",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 21,
+                        .ngpio                  = 3,
+                },
+                .pddr                           = MCFGPIO_PDDR_ADDR,
+                .podr                           = MCFGPIO_PODR_ADDR,
+                .ppdr                           = MCFGPIO_PPDSDR_ADDR,
+                .setr                           = MCFGPIO_PPDSDR_ADDR,
+                .clrr                           = MCFGPIO_PCLRR_ADDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 25,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = MCFGPIO_PDDR_CS,
+                .podr                           = MCFGPIO_PODR_CS,
+                .ppdr                           = MCFGPIO_PPDSDR_CS,
+                .setr                           = MCFGPIO_PPDSDR_CS,
+                .clrr                           = MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC0H",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FEC0H,
+                .podr                           = MCFGPIO_PODR_FEC0H,
+                .ppdr                           = MCFGPIO_PPDSDR_FEC0H,
+                .setr                           = MCFGPIO_PPDSDR_FEC0H,
+                .clrr                           = MCFGPIO_PCLRR_FEC0H,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC0L",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FEC0L,
+                .podr                           = MCFGPIO_PODR_FEC0L,
+                .ppdr                           = MCFGPIO_PPDSDR_FEC0L,
+                .setr                           = MCFGPIO_PPDSDR_FEC0L,
+                .clrr                           = MCFGPIO_PCLRR_FEC0L,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 48,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECI2C,
+                .podr                           = MCFGPIO_PODR_FECI2C,
+                .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = MCFGPIO_PDDR_QSPI,
+                .podr                           = MCFGPIO_PODR_QSPI,
+                .ppdr                           = MCFGPIO_PPDSDR_QSPI,
+                .setr                           = MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SDRAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_SDRAM,
+                .podr                           = MCFGPIO_PODR_SDRAM,
+                .ppdr                           = MCFGPIO_PPDSDR_SDRAM,
+                .setr                           = MCFGPIO_PPDSDR_SDRAM,
+                .clrr                           = MCFGPIO_PCLRR_SDRAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMERH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_TIMERH,
+                .podr                           = MCFGPIO_PODR_TIMERH,
+                .ppdr                           = MCFGPIO_PPDSDR_TIMERH,
+                .setr                           = MCFGPIO_PPDSDR_TIMERH,
+                .clrr                           = MCFGPIO_PCLRR_TIMERH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMERL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_TIMERL,
+                .podr                           = MCFGPIO_PODR_TIMERL,
+                .ppdr                           = MCFGPIO_PPDSDR_TIMERL,
+                .setr                           = MCFGPIO_PPDSDR_TIMERL,
+                .clrr                           = MCFGPIO_PCLRR_TIMERL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_UARTL,
+                .podr                           = MCFGPIO_PODR_UARTL,
+                .ppdr                           = MCFGPIO_PPDSDR_UARTL,
+                .setr                           = MCFGPIO_PPDSDR_UARTL,
+                .clrr                           = MCFGPIO_PCLRR_UARTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC1H",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FEC1H,
+                .podr                           = MCFGPIO_PODR_FEC1H,
+                .ppdr                           = MCFGPIO_PPDSDR_FEC1H,
+                .setr                           = MCFGPIO_PPDSDR_FEC1H,
+                .clrr                           = MCFGPIO_PCLRR_FEC1H,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FEC1L",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FEC1L,
+                .podr                           = MCFGPIO_PODR_FEC1L,
+                .ppdr                           = MCFGPIO_PPDSDR_FEC1L,
+                .setr                           = MCFGPIO_PPDSDR_FEC1L,
+                .clrr                           = MCFGPIO_PCLRR_FEC1L,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 114,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = MCFGPIO_PDDR_BS,
+                .podr                           = MCFGPIO_PODR_BS,
+                .ppdr                           = MCFGPIO_PPDSDR_BS,
+                .setr                           = MCFGPIO_PPDSDR_BS,
+                .clrr                           = MCFGPIO_PCLRR_BS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "IRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 121,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = MCFGPIO_PDDR_IRQ,
+                .podr                           = MCFGPIO_PODR_IRQ,
+                .ppdr                           = MCFGPIO_PPDSDR_IRQ,
+                .setr                           = MCFGPIO_PPDSDR_IRQ,
+                .clrr                           = MCFGPIO_PCLRR_IRQ,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "USBH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 128,
+                        .ngpio                  = 1,
+                },
+                .pddr                           = MCFGPIO_PDDR_USBH,
+                .podr                           = MCFGPIO_PODR_USBH,
+                .ppdr                           = MCFGPIO_PPDSDR_USBH,
+                .setr                           = MCFGPIO_PPDSDR_USBH,
+                .clrr                           = MCFGPIO_PCLRR_USBH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "USBL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 136,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_USBL,
+                .podr                           = MCFGPIO_PODR_USBL,
+                .ppdr                           = MCFGPIO_PPDSDR_USBL,
+                .setr                           = MCFGPIO_PPDSDR_USBL,
+                .clrr                           = MCFGPIO_PCLRR_USBL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UARTH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 144,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_UARTH,
+                .podr                           = MCFGPIO_PODR_UARTH,
+                .ppdr                           = MCFGPIO_PPDSDR_UARTH,
+                .setr                           = MCFGPIO_PPDSDR_UARTH,
+                .clrr                           = MCFGPIO_PCLRR_UARTH,
+        },
+#endif
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/528x/Makefile b/arch/m68knommu/platform/528x/Makefile
index 26135d92b34d..3d90e6d92459 100644
--- a/arch/m68knommu/platform/528x/Makefile
+++ b/arch/m68knommu/platform/528x/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o
 
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index a1d1a61c4fe6..6e608d1836f1 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -3,8 +3,8 @@
 /*
  *      linux/arch/m68knommu/platform/528x/config.c
  *
- *      Sub-architcture dependant initialization code for the Motorola
- *      5280 and 5282 CPUs.
+ *      Sub-architcture dependant initialization code for the Freescale
+ *      5280, 5281 and 5282 CPUs.
  *
  *      Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
  *      Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
@@ -15,20 +15,13 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/flash.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
 #include <asm/mcfsim.h>
 #include <asm/mcfuart.h>
 
-#ifdef CONFIG_MTD_PARTITIONS
-#include <linux/mtd/partitions.h>
-#endif
-
 /***************************************************************************/
 
 static struct mcf_platform_uart m528x_uart_platform[] = {
@@ -91,23 +84,13 @@ static struct platform_device *m528x_devices[] __initdata = {
 
 /***************************************************************************/
 
-#define INTC0   (MCF_MBAR + MCFICM_INTC0)
-
 static void __init m528x_uart_init_line(int line, int irq)
 {
         u8 port;
-        u32 imr;
 
         if ((line < 0) || (line > 2))
                 return;
 
-        /* level 6, line based priority */
-        writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
-
-        imr = readl(INTC0 + MCFINTC_IMRL);
-        imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
-        writel(imr, INTC0 + MCFINTC_IMRL);
-
         /* make sure PUAPAR is set for UART0 and UART1 */
         if (line < 2) {
                 port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
@@ -129,21 +112,8 @@ static void __init m528x_uarts_init(void)
 
 static void __init m528x_fec_init(void)
 {
-        u32 imr;
         u16 v16;
 
-        /* Unmask FEC interrupts at ColdFire interrupt controller */
-        writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
-        writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
-        writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
-
-        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
-        imr &= ~0xf;
-        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
-        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
-        imr &= ~0xff800001;
-        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
-
         /* Set multi-function pins to ethernet mode for fec0 */
         v16 = readw(MCF_IPSBAR + 0x100056);
         writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
@@ -152,21 +122,6 @@ static void __init m528x_fec_init(void)
 
 /***************************************************************************/
 
-void mcf_disableall(void)
-{
-        *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
-        *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
-}
-
-/***************************************************************************/
-
-void mcf_autovector(unsigned int vec)
-{
-        /* Everything is auto-vectored on the 5272 */
-}
-
-/***************************************************************************/
-
 static void m528x_cpu_reset(void)
 {
         local_irq_disable();
@@ -204,8 +159,6 @@ void wildfiremod_halt(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_disableall();
-
 #ifdef CONFIG_WILDFIRE
         mach_halt = wildfire_halt;
 #endif
diff --git a/arch/m68knommu/platform/528x/gpio.c b/arch/m68knommu/platform/528x/gpio.c
new file mode 100644
index 000000000000..ec593950696a
--- /dev/null
+++ b/arch/m68knommu/platform/528x/gpio.c
@@ -0,0 +1,438 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "NQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .base                   = 1,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFEPORT_EPDDR,
+                .podr                           = MCFEPORT_EPDR,
+                .ppdr                           = MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPTA_GPTDDR,
+                .podr                           = MCFGPTA_GPTPORT,
+                .ppdr                           = MCFGPTB_GPTPORT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TB",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPTB_GPTDDR,
+                .podr                           = MCFGPTB_GPTPORT,
+                .ppdr                           = MCFGPTB_GPTPORT,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFQADC_DDRQA,
+                .podr                           = MCFQADC_PORTQA,
+                .ppdr                           = MCFQADC_PORTQA,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QB",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFQADC_DDRQB,
+                .podr                           = MCFQADC_PORTQB,
+                .ppdr                           = MCFQADC_PORTQB,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "A",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRA,
+                .podr                           = MCFGPIO_PORTA,
+                .ppdr                           = MCFGPIO_PORTAP,
+                .setr                           = MCFGPIO_SETA,
+                .clrr                           = MCFGPIO_CLRA,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "B",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 48,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRB,
+                .podr                           = MCFGPIO_PORTB,
+                .ppdr                           = MCFGPIO_PORTBP,
+                .setr                           = MCFGPIO_SETB,
+                .clrr                           = MCFGPIO_CLRB,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 56,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRC,
+                .podr                           = MCFGPIO_PORTC,
+                .ppdr                           = MCFGPIO_PORTCP,
+                .setr                           = MCFGPIO_SETC,
+                .clrr                           = MCFGPIO_CLRC,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "D",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRD,
+                .podr                           = MCFGPIO_PORTD,
+                .ppdr                           = MCFGPIO_PORTDP,
+                .setr                           = MCFGPIO_SETD,
+                .clrr                           = MCFGPIO_CLRD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "E",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRE,
+                .podr                           = MCFGPIO_PORTE,
+                .ppdr                           = MCFGPIO_PORTEP,
+                .setr                           = MCFGPIO_SETE,
+                .clrr                           = MCFGPIO_CLRE,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "F",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRF,
+                .podr                           = MCFGPIO_PORTF,
+                .ppdr                           = MCFGPIO_PORTFP,
+                .setr                           = MCFGPIO_SETF,
+                .clrr                           = MCFGPIO_CLRF,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "G",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRG,
+                .podr                           = MCFGPIO_PORTG,
+                .ppdr                           = MCFGPIO_PORTGP,
+                .setr                           = MCFGPIO_SETG,
+                .clrr                           = MCFGPIO_CLRG,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "H",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRH,
+                .podr                           = MCFGPIO_PORTH,
+                .ppdr                           = MCFGPIO_PORTHP,
+                .setr                           = MCFGPIO_SETH,
+                .clrr                           = MCFGPIO_CLRH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "J",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRJ,
+                .podr                           = MCFGPIO_PORTJ,
+                .ppdr                           = MCFGPIO_PORTJP,
+                .setr                           = MCFGPIO_SETJ,
+                .clrr                           = MCFGPIO_CLRJ,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "DD",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 112,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDRDD,
+                .podr                           = MCFGPIO_PORTDD,
+                .ppdr                           = MCFGPIO_PORTDDP,
+                .setr                           = MCFGPIO_SETDD,
+                .clrr                           = MCFGPIO_CLRDD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "EH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 120,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDREH,
+                .podr                           = MCFGPIO_PORTEH,
+                .ppdr                           = MCFGPIO_PORTEHP,
+                .setr                           = MCFGPIO_SETEH,
+                .clrr                           = MCFGPIO_CLREH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "EL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 128,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_DDREL,
+                .podr                           = MCFGPIO_PORTEL,
+                .ppdr                           = MCFGPIO_PORTELP,
+                .setr                           = MCFGPIO_SETEL,
+                .clrr                           = MCFGPIO_CLREL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "AS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 136,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = MCFGPIO_DDRAS,
+                .podr                           = MCFGPIO_PORTAS,
+                .ppdr                           = MCFGPIO_PORTASP,
+                .setr                           = MCFGPIO_SETAS,
+                .clrr                           = MCFGPIO_CLRAS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 144,
+                        .ngpio                  = 7,
+                },
+                .pddr                           = MCFGPIO_DDRQS,
+                .podr                           = MCFGPIO_PORTQS,
+                .ppdr                           = MCFGPIO_PORTQSP,
+                .setr                           = MCFGPIO_SETQS,
+                .clrr                           = MCFGPIO_CLRQS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SD",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 152,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = MCFGPIO_DDRSD,
+                .podr                           = MCFGPIO_PORTSD,
+                .ppdr                           = MCFGPIO_PORTSDP,
+                .setr                           = MCFGPIO_SETSD,
+                .clrr                           = MCFGPIO_CLRSD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TC",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 160,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_DDRTC,
+                .podr                           = MCFGPIO_PORTTC,
+                .ppdr                           = MCFGPIO_PORTTCP,
+                .setr                           = MCFGPIO_SETTC,
+                .clrr                           = MCFGPIO_CLRTC,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TD",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 168,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_DDRTD,
+                .podr                           = MCFGPIO_PORTTD,
+                .ppdr                           = MCFGPIO_PORTTDP,
+                .setr                           = MCFGPIO_SETTD,
+                .clrr                           = MCFGPIO_CLRTD,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UA",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 176,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_DDRUA,
+                .podr                           = MCFGPIO_PORTUA,
+                .ppdr                           = MCFGPIO_PORTUAP,
+                .setr                           = MCFGPIO_SETUA,
+                .clrr                           = MCFGPIO_CLRUA,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile
index cfd586860fd8..667db6598451 100644
--- a/arch/m68knommu/platform/5307/Makefile
+++ b/arch/m68knommu/platform/5307/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y   += config.o
+obj-y   += config.o gpio.o
 
diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c
index 39da9e9ff674..00900ac06a9c 100644
--- a/arch/m68knommu/platform/5307/config.c
+++ b/arch/m68knommu/platform/5307/config.c
@@ -21,12 +21,6 @@
 
 /***************************************************************************/
 
-extern unsigned int mcf_timervector;
-extern unsigned int mcf_profilevector;
-extern unsigned int mcf_timerlevel;
-
-/***************************************************************************/
-
 /*
  *      Some platforms need software versions of the GPIO data registers.
  */
@@ -64,11 +58,11 @@ static void __init m5307_uart_init_line(int line, int irq)
         if (line == 0) {
                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
                 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
         } else if (line == 1) {
                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
                 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
         }
 }
 
@@ -83,35 +77,19 @@ static void __init m5307_uarts_init(void)
 
 /***************************************************************************/
 
-void mcf_autovector(unsigned int vec)
-{
-        volatile unsigned char  *mbar;
-
-        if ((vec >= 25) && (vec <= 31)) {
-                mbar = (volatile unsigned char *) MCF_MBAR;
-                vec = 0x1 << (vec - 24);
-                *(mbar + MCFSIM_AVR) |= vec;
-                mcf_setimr(mcf_getimr() & ~vec);
-        }
-}
-
-/***************************************************************************/
-
-void mcf_settimericr(unsigned int timer, unsigned int level)
+static void __init m5307_timers_init(void)
 {
-        volatile unsigned char *icrp;
-        unsigned int icr, imr;
-
-        if (timer <= 2) {
-                switch (timer) {
-                case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
-                default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
-                }
-
-                icrp = (volatile unsigned char *) (MCF_MBAR + icr);
-                *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
-                mcf_setimr(mcf_getimr() & ~imr);
-        }
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
 }
 
 /***************************************************************************/
@@ -129,20 +107,22 @@ void m5307_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_setimr(MCFSIM_IMR_MASKALL);
-
 #if defined(CONFIG_NETtel) || \
     defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
         /* Copy command line from FLASH to local buffer... */
         memcpy(commandp, (char *) 0xf0004000, size);
         commandp[size-1] = 0;
-        /* Different timer setup - to prevent device clash */
-        mcf_timervector = 30;
-        mcf_profilevector = 31;
-        mcf_timerlevel = 6;
 #endif
 
         mach_reset = m5307_cpu_reset;
+        m5307_timers_init();
+        m5307_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(27, MCFINTC_EINT3);
+        mcf_mapirq2imr(29, MCFINTC_EINT5);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
 
 #ifdef CONFIG_BDM_DISABLE
         /*
@@ -158,7 +138,6 @@ void __init config_BSP(char *commandp, int size)
 
 static int __init init_BSP(void)
 {
-        m5307_uarts_init();
         platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/5307/gpio.c b/arch/m68knommu/platform/5307/gpio.c
new file mode 100644
index 000000000000..8da5880e4066
--- /dev/null
+++ b/arch/m68knommu/platform/5307/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = MCFSIM_PADDR,
+                .podr                           = MCFSIM_PADAT,
+                .ppdr                           = MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/532x/Makefile b/arch/m68knommu/platform/532x/Makefile
index e431912f5628..4cc23245bcd1 100644
--- a/arch/m68knommu/platform/532x/Makefile
+++ b/arch/m68knommu/platform/532x/Makefile
@@ -15,4 +15,4 @@
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
 #obj-y := config.o usb-mcf532x.o spi-mcf532x.o
-obj-y := config.o
+obj-y := config.o gpio.o
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c
index cdb761971f7a..d632948e64e5 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68knommu/platform/532x/config.c
@@ -20,7 +20,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -31,12 +30,6 @@
 
 /***************************************************************************/
 
-extern unsigned int mcf_timervector;
-extern unsigned int mcf_profilevector;
-extern unsigned int mcf_timerlevel;
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m532x_uart_platform[] = {
         {
                 .mapbase        = MCFUART_BASE1,
@@ -88,6 +81,7 @@ static struct platform_device m532x_fec = {
         .num_resources          = ARRAY_SIZE(m532x_fec_resources),
         .resource               = m532x_fec_resources,
 };
+
 static struct platform_device *m532x_devices[] __initdata = {
         &m532x_uart,
         &m532x_fec,
@@ -98,18 +92,11 @@ static struct platform_device *m532x_devices[] __initdata = {
 static void __init m532x_uart_init_line(int line, int irq)
 {
         if (line == 0) {
-                MCF_INTC0_ICR26 = 0x3;
-                MCF_INTC0_CIMR = 26;
                 /* GPIO initialization */
                 MCF_GPIO_PAR_UART |= 0x000F;
         } else if (line == 1) {
-                MCF_INTC0_ICR27 = 0x3;
-                MCF_INTC0_CIMR = 27;
                 /* GPIO initialization */
                 MCF_GPIO_PAR_UART |= 0x0FF0;
-        } else if (line == 2) {
-                MCF_INTC0_ICR28 = 0x3;
-                MCF_INTC0_CIMR = 28;
         }
 }
 
@@ -125,14 +112,6 @@ static void __init m532x_uarts_init(void)
 
 static void __init m532x_fec_init(void)
 {
-        /* Unmask FEC interrupts at ColdFire interrupt controller */
-        MCF_INTC0_ICR36 = 0x2;
-        MCF_INTC0_ICR40 = 0x2;
-        MCF_INTC0_ICR42 = 0x2;
-
-        MCF_INTC0_IMRH &= ~(MCF_INTC_IMRH_INT_MASK36 |
-                MCF_INTC_IMRH_INT_MASK40 | MCF_INTC_IMRH_INT_MASK42);
-
         /* Set multi-function pins to ethernet mode for fec0 */
         MCF_GPIO_PAR_FECI2C |= (MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC |
                 MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO);
@@ -142,26 +121,6 @@ static void __init m532x_fec_init(void)
 
 /***************************************************************************/
 
-void mcf_settimericr(unsigned int timer, unsigned int level)
-{
-        volatile unsigned char *icrp;
-        unsigned int icr;
-        unsigned char irq;
-
-        if (timer <= 2) {
-                switch (timer) {
-                case 2:  irq = 33; icr = MCFSIM_ICR_TIMER2; break;
-                default: irq = 32; icr = MCFSIM_ICR_TIMER1; break;
-                }
-                
-                icrp = (volatile unsigned char *) (icr);
-                *icrp = level;
-                mcf_enable_irq0(irq);
-        }
-}
-
-/***************************************************************************/
-
 static void m532x_cpu_reset(void)
 {
         local_irq_disable();
@@ -172,8 +131,6 @@ static void m532x_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_setimr(MCFSIM_IMR_MASKALL);
-
 #if !defined(CONFIG_BOOTPARAM)
         /* Copy command line from FLASH to local buffer... */
         memcpy(commandp, (char *) 0x4000, 4);
@@ -185,10 +142,6 @@ void __init config_BSP(char *commandp, int size)
         }
 #endif
 
-        mcf_timervector = 64+32;
-        mcf_profilevector = 64+33;
-        mach_reset = m532x_cpu_reset;
-
 #ifdef CONFIG_BDM_DISABLE
         /*
          * Disable the BDM clocking.  This also turns off most of the rest of
@@ -438,8 +391,8 @@ void gpio_init(void)
         /* Initialize TIN3 as a GPIO output to enable the write
            half of the latch */
         MCF_GPIO_PAR_TIMER = 0x00;
-        MCF_GPIO_PDDR_TIMER = 0x08;
-        MCF_GPIO_PCLRR_TIMER = 0x0;
+        __raw_writeb(0x08, MCFGPIO_PDDR_TIMER);
+        __raw_writeb(0x00, MCFGPIO_PCLRR_TIMER);
 
 }
 
diff --git a/arch/m68knommu/platform/532x/gpio.c b/arch/m68knommu/platform/532x/gpio.c
new file mode 100644
index 000000000000..184b77382c3d
--- /dev/null
+++ b/arch/m68knommu/platform/532x/gpio.c
@@ -0,0 +1,337 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PIRQ",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFEPORT_EPDDR,
+                .podr                           = MCFEPORT_EPDR,
+                .ppdr                           = MCFEPORT_EPPDR,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 8,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECH,
+                .podr                           = MCFGPIO_PODR_FECH,
+                .ppdr                           = MCFGPIO_PPDSDR_FECH,
+                .setr                           = MCFGPIO_PPDSDR_FECH,
+                .clrr                           = MCFGPIO_PCLRR_FECH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 16,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECL,
+                .podr                           = MCFGPIO_PODR_FECL,
+                .ppdr                           = MCFGPIO_PPDSDR_FECL,
+                .setr                           = MCFGPIO_PPDSDR_FECL,
+                .clrr                           = MCFGPIO_PCLRR_FECL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "SSI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 24,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = MCFGPIO_PDDR_SSI,
+                .podr                           = MCFGPIO_PODR_SSI,
+                .ppdr                           = MCFGPIO_PPDSDR_SSI,
+                .setr                           = MCFGPIO_PPDSDR_SSI,
+                .clrr                           = MCFGPIO_PCLRR_SSI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BUSCTL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 32,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_BUSCTL,
+                .podr                           = MCFGPIO_PODR_BUSCTL,
+                .ppdr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .setr                           = MCFGPIO_PPDSDR_BUSCTL,
+                .clrr                           = MCFGPIO_PCLRR_BUSCTL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "BE",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 40,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_BE,
+                .podr                           = MCFGPIO_PODR_BE,
+                .ppdr                           = MCFGPIO_PPDSDR_BE,
+                .setr                           = MCFGPIO_PPDSDR_BE,
+                .clrr                           = MCFGPIO_PCLRR_BE,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "CS",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 49,
+                        .ngpio                  = 5,
+                },
+                .pddr                           = MCFGPIO_PDDR_CS,
+                .podr                           = MCFGPIO_PODR_CS,
+                .ppdr                           = MCFGPIO_PPDSDR_CS,
+                .setr                           = MCFGPIO_PPDSDR_CS,
+                .clrr                           = MCFGPIO_PCLRR_CS,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "PWM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 58,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_PWM,
+                .podr                           = MCFGPIO_PODR_PWM,
+                .ppdr                           = MCFGPIO_PPDSDR_PWM,
+                .setr                           = MCFGPIO_PPDSDR_PWM,
+                .clrr                           = MCFGPIO_PCLRR_PWM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "FECI2C",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 64,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_FECI2C,
+                .podr                           = MCFGPIO_PODR_FECI2C,
+                .ppdr                           = MCFGPIO_PPDSDR_FECI2C,
+                .setr                           = MCFGPIO_PPDSDR_FECI2C,
+                .clrr                           = MCFGPIO_PCLRR_FECI2C,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "UART",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 72,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_UART,
+                .podr                           = MCFGPIO_PODR_UART,
+                .ppdr                           = MCFGPIO_PPDSDR_UART,
+                .setr                           = MCFGPIO_PPDSDR_UART,
+                .clrr                           = MCFGPIO_PCLRR_UART,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "QSPI",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 80,
+                        .ngpio                  = 6,
+                },
+                .pddr                           = MCFGPIO_PDDR_QSPI,
+                .podr                           = MCFGPIO_PODR_QSPI,
+                .ppdr                           = MCFGPIO_PPDSDR_QSPI,
+                .setr                           = MCFGPIO_PPDSDR_QSPI,
+                .clrr                           = MCFGPIO_PCLRR_QSPI,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "TIMER",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 88,
+                        .ngpio                  = 4,
+                },
+                .pddr                           = MCFGPIO_PDDR_TIMER,
+                .podr                           = MCFGPIO_PODR_TIMER,
+                .ppdr                           = MCFGPIO_PPDSDR_TIMER,
+                .setr                           = MCFGPIO_PPDSDR_TIMER,
+                .clrr                           = MCFGPIO_PCLRR_TIMER,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDDATAH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 96,
+                        .ngpio                  = 2,
+                },
+                .pddr                           = MCFGPIO_PDDR_LCDDATAH,
+                .podr                           = MCFGPIO_PODR_LCDDATAH,
+                .ppdr                           = MCFGPIO_PPDSDR_LCDDATAH,
+                .setr                           = MCFGPIO_PPDSDR_LCDDATAH,
+                .clrr                           = MCFGPIO_PCLRR_LCDDATAH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDDATAM",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 104,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_LCDDATAM,
+                .podr                           = MCFGPIO_PODR_LCDDATAM,
+                .ppdr                           = MCFGPIO_PPDSDR_LCDDATAM,
+                .setr                           = MCFGPIO_PPDSDR_LCDDATAM,
+                .clrr                           = MCFGPIO_PCLRR_LCDDATAM,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDDATAL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 112,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_LCDDATAL,
+                .podr                           = MCFGPIO_PODR_LCDDATAL,
+                .ppdr                           = MCFGPIO_PPDSDR_LCDDATAL,
+                .setr                           = MCFGPIO_PPDSDR_LCDDATAL,
+                .clrr                           = MCFGPIO_PCLRR_LCDDATAL,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDCTLH",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 120,
+                        .ngpio                  = 1,
+                },
+                .pddr                           = MCFGPIO_PDDR_LCDCTLH,
+                .podr                           = MCFGPIO_PODR_LCDCTLH,
+                .ppdr                           = MCFGPIO_PPDSDR_LCDCTLH,
+                .setr                           = MCFGPIO_PPDSDR_LCDCTLH,
+                .clrr                           = MCFGPIO_PCLRR_LCDCTLH,
+        },
+        {
+                .gpio_chip                      = {
+                        .label                  = "LCDCTLL",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value_fast,
+                        .base                   = 128,
+                        .ngpio                  = 8,
+                },
+                .pddr                           = MCFGPIO_PDDR_LCDCTLL,
+                .podr                           = MCFGPIO_PODR_LCDCTLL,
+                .ppdr                           = MCFGPIO_PPDSDR_LCDCTLL,
+                .setr                           = MCFGPIO_PPDSDR_LCDCTLL,
+                .clrr                           = MCFGPIO_PCLRR_LCDCTLL,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/5407/Makefile b/arch/m68knommu/platform/5407/Makefile
index e6035e7a2d3f..dee62c5dbaa6 100644
--- a/arch/m68knommu/platform/5407/Makefile
+++ b/arch/m68knommu/platform/5407/Makefile
@@ -14,5 +14,5 @@
 
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
-obj-y := config.o
+obj-y := config.o gpio.o
 
diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c
index b41d942bf8d0..70ea789a400c 100644
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68knommu/platform/5407/config.c
@@ -20,12 +20,6 @@
 
 /***************************************************************************/
 
-extern unsigned int mcf_timervector;
-extern unsigned int mcf_profilevector;
-extern unsigned int mcf_timerlevel;
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m5407_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -55,11 +49,11 @@ static void __init m5407_uart_init_line(int line, int irq)
         if (line == 0) {
                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
                 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+                mcf_mapirq2imr(irq, MCFINTC_UART0);
         } else if (line == 1) {
                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
                 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
-                mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+                mcf_mapirq2imr(irq, MCFINTC_UART1);
         }
 }
 
@@ -74,35 +68,19 @@ static void __init m5407_uarts_init(void)
 
 /***************************************************************************/
 
-void mcf_autovector(unsigned int vec)
-{
-        volatile unsigned char  *mbar;
-
-        if ((vec >= 25) && (vec <= 31)) {
-                mbar = (volatile unsigned char *) MCF_MBAR;
-                vec = 0x1 << (vec - 24);
-                *(mbar + MCFSIM_AVR) |= vec;
-                mcf_setimr(mcf_getimr() & ~vec);
-        }
-}
-
-/***************************************************************************/
-
-void mcf_settimericr(unsigned int timer, unsigned int level)
+static void __init m5407_timers_init(void)
 {
-        volatile unsigned char *icrp;
-        unsigned int icr, imr;
-
-        if (timer <= 2) {
-                switch (timer) {
-                case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
-                default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
-                }
-
-                icrp = (volatile unsigned char *) (MCF_MBAR + icr);
-                *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
-                mcf_setimr(mcf_getimr() & ~imr);
-        }
+        /* Timer1 is always used as system timer */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER1ICR);
+        mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
+
+#ifdef CONFIG_HIGHPROFILE
+        /* Timer2 is to be used as a high speed profile timer  */
+        writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
+                MCF_MBAR + MCFSIM_TIMER2ICR);
+        mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
+#endif
 }
 
 /***************************************************************************/
@@ -120,23 +98,21 @@ void m5407_cpu_reset(void)
 
 void __init config_BSP(char *commandp, int size)
 {
-        mcf_setimr(MCFSIM_IMR_MASKALL);
-
-#if defined(CONFIG_CLEOPATRA)
-        /* Different timer setup - to prevent device clash */
-        mcf_timervector = 30;
-        mcf_profilevector = 31;
-        mcf_timerlevel = 6;
-#endif
-
         mach_reset = m5407_cpu_reset;
+        m5407_timers_init();
+        m5407_uarts_init();
+
+        /* Only support the external interrupts on their primary level */
+        mcf_mapirq2imr(25, MCFINTC_EINT1);
+        mcf_mapirq2imr(27, MCFINTC_EINT3);
+        mcf_mapirq2imr(29, MCFINTC_EINT5);
+        mcf_mapirq2imr(31, MCFINTC_EINT7);
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
-        m5407_uarts_init();
         platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/5407/gpio.c b/arch/m68knommu/platform/5407/gpio.c
new file mode 100644
index 000000000000..8da5880e4066
--- /dev/null
+++ b/arch/m68knommu/platform/5407/gpio.c
@@ -0,0 +1,49 @@
+/*
+ * Coldfire generic GPIO support
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+static struct mcf_gpio_chip mcf_gpio_chips[] = {
+        {
+                .gpio_chip                      = {
+                        .label                  = "PP",
+                        .request                = mcf_gpio_request,
+                        .free                   = mcf_gpio_free,
+                        .direction_input        = mcf_gpio_direction_input,
+                        .direction_output       = mcf_gpio_direction_output,
+                        .get                    = mcf_gpio_get_value,
+                        .set                    = mcf_gpio_set_value,
+                        .ngpio                  = 16,
+                },
+                .pddr                           = MCFSIM_PADDR,
+                .podr                           = MCFSIM_PADAT,
+                .ppdr                           = MCFSIM_PADAT,
+        },
+};
+
+static int __init mcf_gpio_init(void)
+{
+        unsigned i = 0;
+        while (i < ARRAY_SIZE(mcf_gpio_chips))
+                (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
+        return 0;
+}
+
+core_initcall(mcf_gpio_init);
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
index 72e56d554f4f..b91ee85d4b5d 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -73,34 +73,6 @@ extern e_vector *_ramvec;
 /* The number of spurious interrupts */
 volatile unsigned int num_spurious;
 
-/*
- * This function should be called during kernel startup to initialize
- * the machine vector table.
- */
-void __init init_vectors(void)
-{
-        int i;
-
-        /* set up the vectors */
-        for (i = 72; i < 256; ++i)
-                _ramvec[i] = (e_vector) bad_interrupt;
-
-        _ramvec[32] = system_call;
-
-        _ramvec[65] = (e_vector) inthandler1;
-        _ramvec[66] = (e_vector) inthandler2;
-        _ramvec[67] = (e_vector) inthandler3;
-        _ramvec[68] = (e_vector) inthandler4;
-        _ramvec[69] = (e_vector) inthandler5;
-        _ramvec[70] = (e_vector) inthandler6;
-        _ramvec[71] = (e_vector) inthandler7;
- 
-        IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */
-
-        /* turn off all interrupts */
-        IMR = ~0;
-}
-
 /* The 68k family did not have a good way to determine the source
  * of interrupts until later in the family.  The EC000 core does
  * not provide the vector number on the stack, we vector everything
@@ -163,18 +135,54 @@ void process_int(int vec, struct pt_regs *fp)
         }
 }
 
-void enable_vector(unsigned int irq)
+static void intc_irq_unmask(unsigned int irq)
 {
         IMR &= ~(1<<irq);
 }
 
-void disable_vector(unsigned int irq)
+static void intc_irq_mask(unsigned int irq)
 {
         IMR |= (1<<irq);
 }
 
-void ack_vector(unsigned int irq)
+static struct irq_chip intc_irq_chip = {
+        .name           = "M68K-INTC",
+        .mask           = intc_irq_mask,
+        .unmask         = intc_irq_unmask,
+};
+
+/*
+ * This function should be called during kernel startup to initialize
+ * the machine vector table.
+ */
+void __init init_IRQ(void)
 {
-        /* Nothing needed */
+        int i;
+
+        /* set up the vectors */
+        for (i = 72; i < 256; ++i)
+                _ramvec[i] = (e_vector) bad_interrupt;
+
+        _ramvec[32] = system_call;
+
+        _ramvec[65] = (e_vector) inthandler1;
+        _ramvec[66] = (e_vector) inthandler2;
+        _ramvec[67] = (e_vector) inthandler3;
+        _ramvec[68] = (e_vector) inthandler4;
+        _ramvec[69] = (e_vector) inthandler5;
+        _ramvec[70] = (e_vector) inthandler6;
+        _ramvec[71] = (e_vector) inthandler7;
+
+        IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */
+
+        /* turn off all interrupts */
+        IMR = ~0;
+
+        for (i = 0; (i < NR_IRQS); i++) {
+                irq_desc[i].status = IRQ_DISABLED;
+                irq_desc[i].action = NULL;
+                irq_desc[i].depth = 1;
+                irq_desc[i].chip = &intc_irq_chip;
+        }
 }
 
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
index c36781157e09..1143f77caca4 100644
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68knommu/platform/68360/ints.c
@@ -37,11 +37,33 @@ extern void *_ramvec[];
 /* The number of spurious interrupts */
 volatile unsigned int num_spurious;
 
+static void intc_irq_unmask(unsigned int irq)
+{
+        pquicc->intr_cimr |= (1 << irq);
+}
+
+static void intc_irq_mask(unsigned int irq)
+{
+        pquicc->intr_cimr &= ~(1 << irq);
+}
+
+static void intc_irq_ack(unsigned int irq)
+{
+        pquicc->intr_cisr = (1 << irq);
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "M68K-INTC",
+        .mask           = intc_irq_mask,
+        .unmask         = intc_irq_unmask,
+        .ack            = intc_irq_ack,
+};
+
 /*
  * This function should be called during kernel startup to initialize
  * the vector table.
  */
-void init_vectors(void)
+void init_IRQ(void)
 {
         int i;
         int vba = (CPM_VECTOR_BASE<<4);
@@ -109,20 +131,12 @@ void init_vectors(void)
 
         /* turn off all CPM interrupts */
         pquicc->intr_cimr = 0x00000000;
-}
-
-void enable_vector(unsigned int irq)
-{
-        pquicc->intr_cimr |= (1 << irq);
-}
 
-void disable_vector(unsigned int irq)
-{
-        pquicc->intr_cimr &= ~(1 << irq);
-}
-
-void ack_vector(unsigned int irq)
-{
-        pquicc->intr_cisr = (1 << irq);
+        for (i = 0; (i < NR_IRQS); i++) {
+                irq_desc[i].status = IRQ_DISABLED;
+                irq_desc[i].action = NULL;
+                irq_desc[i].depth = 1;
+                irq_desc[i].chip = &intc_irq_chip;
+        }
 }
 
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile
index 1bcb9372353f..f72a0e5d9996 100644
--- a/arch/m68knommu/platform/coldfire/Makefile
+++ b/arch/m68knommu/platform/coldfire/Makefile
@@ -15,16 +15,17 @@
 asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
 
 obj-$(CONFIG_COLDFIRE)  += clk.o dma.o entry.o vectors.o
-obj-$(CONFIG_M5206)     += timers.o
-obj-$(CONFIG_M5206e)    += timers.o
-obj-$(CONFIG_M520x)     += pit.o
-obj-$(CONFIG_M523x)     += pit.o dma_timer.o
-obj-$(CONFIG_M5249)     += timers.o
-obj-$(CONFIG_M527x)     += pit.o
+obj-$(CONFIG_M5206)     += timers.o intc.o
+obj-$(CONFIG_M5206e)    += timers.o intc.o
+obj-$(CONFIG_M520x)     += pit.o intc-simr.o
+obj-$(CONFIG_M523x)     += pit.o dma_timer.o intc-2.o
+obj-$(CONFIG_M5249)     += timers.o intc.o
+obj-$(CONFIG_M527x)     += pit.o intc-2.o
 obj-$(CONFIG_M5272)     += timers.o
-obj-$(CONFIG_M528x)     += pit.o
-obj-$(CONFIG_M5307)     += timers.o
-obj-$(CONFIG_M532x)     += timers.o
-obj-$(CONFIG_M5407)     += timers.o
+obj-$(CONFIG_M528x)     += pit.o intc-2.o
+obj-$(CONFIG_M5307)     += timers.o intc.o
+obj-$(CONFIG_M532x)     += timers.o intc-simr.o
+obj-$(CONFIG_M5407)     += timers.o intc.o
 
+obj-y                   += pinmux.o gpio.o
 extra-y := head.o
diff --git a/arch/m68knommu/platform/coldfire/gpio.c b/arch/m68knommu/platform/coldfire/gpio.c
new file mode 100644
index 000000000000..ff0045793450
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/gpio.c
@@ -0,0 +1,127 @@
+/*
+ * Coldfire generic GPIO support.
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sysdev.h>
+
+#include <asm/gpio.h>
+#include <asm/pinmux.h>
+#include <asm/mcfgpio.h>
+
+#define MCF_CHIP(chip) container_of(chip, struct mcf_gpio_chip, gpio_chip)
+
+int mcf_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+        unsigned long flags;
+        MCFGPIO_PORTTYPE dir;
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        local_irq_save(flags);
+        dir = mcfgpio_read(mcf_chip->pddr);
+        dir &= ~mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(dir, mcf_chip->pddr);
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+int mcf_gpio_get_value(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        return mcfgpio_read(mcf_chip->ppdr) & mcfgpio_bit(chip->base + offset);
+}
+
+int mcf_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+                int value)
+{
+        unsigned long flags;
+        MCFGPIO_PORTTYPE data;
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        local_irq_save(flags);
+        /* write the value to the output latch */
+        data = mcfgpio_read(mcf_chip->podr);
+        if (value)
+                data |= mcfgpio_bit(chip->base + offset);
+        else
+                data &= ~mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(data, mcf_chip->podr);
+
+        /* now set the direction to output */
+        data = mcfgpio_read(mcf_chip->pddr);
+        data |= mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(data, mcf_chip->pddr);
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+void mcf_gpio_set_value(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        unsigned long flags;
+        MCFGPIO_PORTTYPE data;
+
+        local_irq_save(flags);
+        data = mcfgpio_read(mcf_chip->podr);
+        if (value)
+                data |= mcfgpio_bit(chip->base + offset);
+        else
+                data &= ~mcfgpio_bit(chip->base + offset);
+        mcfgpio_write(data, mcf_chip->podr);
+        local_irq_restore(flags);
+}
+
+void mcf_gpio_set_value_fast(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        if (value)
+                mcfgpio_write(mcfgpio_bit(chip->base + offset), mcf_chip->setr);
+        else
+                mcfgpio_write(~mcfgpio_bit(chip->base + offset), mcf_chip->clrr);
+}
+
+int mcf_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        return mcf_chip->gpio_to_pinmux ?
+                mcf_pinmux_request(mcf_chip->gpio_to_pinmux[offset], 0) : 0;
+}
+
+void mcf_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+        struct mcf_gpio_chip *mcf_chip = MCF_CHIP(chip);
+
+        mcf_gpio_direction_input(chip, offset);
+
+        if (mcf_chip->gpio_to_pinmux)
+                mcf_pinmux_release(mcf_chip->gpio_to_pinmux[offset], 0);
+}
+
+struct sysdev_class mcf_gpio_sysclass = {
+        .name   = "gpio",
+};
+
+static int __init mcf_gpio_sysinit(void)
+{
+        return sysdev_class_register(&mcf_gpio_sysclass);
+}
+
+core_initcall(mcf_gpio_sysinit);
diff --git a/arch/m68knommu/platform/coldfire/intc-2.c b/arch/m68knommu/platform/coldfire/intc-2.c
new file mode 100644
index 000000000000..5598c8b8661f
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/intc-2.c
@@ -0,0 +1,93 @@
+/*
+ * intc-1.c
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/traps.h>
+
+/*
+ *      Each vector needs a unique priority and level asscoiated with it.
+ *      We don't really care so much what they are, we don't rely on the
+ *      tranditional priority interrupt scheme of the m68k/ColdFire.
+ */
+static u8 intc_intpri = 0x36;
+
+static void intc_irq_mask(unsigned int irq)
+{
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 128)) {
+                unsigned long imraddr;
+                u32 val, imrbit;
+
+                irq -= MCFINT_VECBASE;
+                imraddr = MCF_IPSBAR;
+                imraddr += (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
+                imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL;
+                imrbit = 0x1 << (irq & 0x1f);
+
+                val = __raw_readl(imraddr);
+                __raw_writel(val | imrbit, imraddr);
+        }
+}
+
+static void intc_irq_unmask(unsigned int irq)
+{
+        if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 128)) {
+                unsigned long intaddr, imraddr, icraddr;
+                u32 val, imrbit;
+
+                irq -= MCFINT_VECBASE;
+                intaddr = MCF_IPSBAR;
+                intaddr += (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0;
+                imraddr = intaddr + ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL);
+                icraddr = intaddr + MCFINTC_ICR0 + (irq & 0x3f);
+                imrbit = 0x1 << (irq & 0x1f);
+
+                /* Don't set the "maskall" bit! */
+                if ((irq & 0x20) == 0)
+                        imrbit |= 0x1;
+
+                if (__raw_readb(icraddr) == 0)
+                        __raw_writeb(intc_intpri--, icraddr);
+
+                val = __raw_readl(imraddr);
+                __raw_writel(val & ~imrbit, imraddr);
+        }
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .mask           = intc_irq_mask,
+        .unmask         = intc_irq_unmask,
+};
+
+void __init init_IRQ(void)
+{
+        int irq;
+
+        init_vectors();
+
+        /* Mask all interrupt sources */
+        __raw_writel(0x1, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+        __raw_writel(0x1, MCF_IPSBAR + MCFICM_INTC1 + MCFINTC_IMRL);
+
+        for (irq = 0; (irq < NR_IRQS); irq++) {
+                irq_desc[irq].status = IRQ_DISABLED;
+                irq_desc[irq].action = NULL;
+                irq_desc[irq].depth = 1;
+                irq_desc[irq].chip = &intc_irq_chip;
+        }
+}
+
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c
new file mode 100644
index 000000000000..1b01e79c2f63
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/intc-simr.c
@@ -0,0 +1,78 @@
+/*
+ * intc-simr.c
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/traps.h>
+
+static void intc_irq_mask(unsigned int irq)
+{
+        if (irq >= MCFINT_VECBASE) {
+                if (irq < MCFINT_VECBASE + 64)
+                        __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
+                else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR)
+                        __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR);
+        }
+}
+
+static void intc_irq_unmask(unsigned int irq)
+{
+        if (irq >= MCFINT_VECBASE) {
+                if (irq < MCFINT_VECBASE + 64)
+                        __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
+                else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR)
+                        __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR);
+        }
+}
+
+static int intc_irq_set_type(unsigned int irq, unsigned int type)
+{
+        if (irq >= MCFINT_VECBASE) {
+                if (irq < MCFINT_VECBASE + 64)
+                        __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE);
+                else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0)
+                        __raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64);
+        }
+        return 0;
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .mask           = intc_irq_mask,
+        .unmask         = intc_irq_unmask,
+        .set_type       = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+        int irq;
+
+        init_vectors();
+
+        /* Mask all interrupt sources */
+        __raw_writeb(0xff, MCFINTC0_SIMR);
+        if (MCFINTC1_SIMR)
+                __raw_writeb(0xff, MCFINTC1_SIMR);
+
+        for (irq = 0; (irq < NR_IRQS); irq++) {
+                irq_desc[irq].status = IRQ_DISABLED;
+                irq_desc[irq].action = NULL;
+                irq_desc[irq].depth = 1;
+                irq_desc[irq].chip = &intc_irq_chip;
+                intc_irq_set_type(irq, 0);
+        }
+}
+
diff --git a/arch/m68knommu/platform/coldfire/intc.c b/arch/m68knommu/platform/coldfire/intc.c
new file mode 100644
index 000000000000..a4560c86db71
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/intc.c
@@ -0,0 +1,153 @@
+/*
+ * intc.c  -- support for the old ColdFire interrupt controller
+ *
+ * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/traps.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+
+/*
+ * The mapping of irq number to a mask register bit is not one-to-one.
+ * The irq numbers are either based on "level" of interrupt or fixed
+ * for an autovector-able interrupt. So we keep a local data structure
+ * that maps from irq to mask register. Not all interrupts will have
+ * an IMR bit.
+ */
+unsigned char mcf_irq2imr[NR_IRQS];
+
+/*
+ * Define the miniumun and maximum external interrupt numbers.
+ * This is also used as the "level" interrupt numbers.
+ */
+#define EIRQ1   25
+#define EIRQ7   31
+
+/*
+ * In the early version 2 core ColdFire parts the IMR register was 16 bits
+ * in size. Version 3 (and later version 2) core parts have a 32 bit
+ * sized IMR register. Provide some size independant methods to access the
+ * IMR register.
+ */
+#ifdef MCFSIM_IMR_IS_16BITS
+
+void mcf_setimr(int index)
+{
+        u16 imr;
+        imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
+        __raw_writew(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_clrimr(int index)
+{
+        u16 imr;
+        imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
+        __raw_writew(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_maskimr(unsigned int mask)
+{
+        u16 imr;
+        imr = __raw_readw(MCF_MBAR + MCFSIM_IMR);
+        imr |= mask;
+        __raw_writew(imr, MCF_MBAR + MCFSIM_IMR);
+}
+
+#else
+
+void mcf_setimr(int index)
+{
+        u32 imr;
+        imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
+        __raw_writel(imr | (0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_clrimr(int index)
+{
+        u32 imr;
+        imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
+        __raw_writel(imr & ~(0x1 << index), MCF_MBAR + MCFSIM_IMR);
+}
+
+void mcf_maskimr(unsigned int mask)
+{
+        u32 imr;
+        imr = __raw_readl(MCF_MBAR + MCFSIM_IMR);
+        imr |= mask;
+        __raw_writel(imr, MCF_MBAR + MCFSIM_IMR);
+}
+
+#endif
+
+/*
+ * Interrupts can be "vectored" on the ColdFire cores that support this old
+ * interrupt controller. That is, the device raising the interrupt can also
+ * supply the vector number to interrupt through. The AVR register of the
+ * interrupt controller enables or disables this for each external interrupt,
+ * so provide generic support for this. Setting this up is out-of-band for
+ * the interrupt system API's, and needs to be done by the driver that
+ * supports this device. Very few devices actually use this.
+ */
+void mcf_autovector(int irq)
+{
+#ifdef MCFSIM_AVR
+        if ((irq >= EIRQ1) && (irq <= EIRQ7)) {
+                u8 avec;
+                avec = __raw_readb(MCF_MBAR + MCFSIM_AVR);
+                avec |= (0x1 << (irq - EIRQ1 + 1));
+                __raw_writeb(avec, MCF_MBAR + MCFSIM_AVR);
+        }
+#endif
+}
+
+static void intc_irq_mask(unsigned int irq)
+{
+        if (mcf_irq2imr[irq])
+                mcf_setimr(mcf_irq2imr[irq]);
+}
+
+static void intc_irq_unmask(unsigned int irq)
+{
+        if (mcf_irq2imr[irq])
+                mcf_clrimr(mcf_irq2imr[irq]);
+}
+
+static int intc_irq_set_type(unsigned int irq, unsigned int type)
+{
+        return 0;
+}
+
+static struct irq_chip intc_irq_chip = {
+        .name           = "CF-INTC",
+        .mask           = intc_irq_mask,
+        .unmask         = intc_irq_unmask,
+        .set_type       = intc_irq_set_type,
+};
+
+void __init init_IRQ(void)
+{
+        int irq;
+
+        init_vectors();
+        mcf_maskimr(0xffffffff);
+
+        for (irq = 0; (irq < NR_IRQS); irq++) {
+                irq_desc[irq].status = IRQ_DISABLED;
+                irq_desc[irq].action = NULL;
+                irq_desc[irq].depth = 1;
+                irq_desc[irq].chip = &intc_irq_chip;
+                intc_irq_set_type(irq, 0);
+        }
+}
+
diff --git a/arch/m68knommu/platform/coldfire/pinmux.c b/arch/m68knommu/platform/coldfire/pinmux.c
new file mode 100644
index 000000000000..8c62b825939f
--- /dev/null
+++ b/arch/m68knommu/platform/coldfire/pinmux.c
@@ -0,0 +1,28 @@
+/*
+ * Coldfire generic GPIO pinmux support.
+ *
+ * (C) Copyright 2009, Steven King <sfking@fdwdc.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; version 2 of the License.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+
+#include <asm/pinmux.h>
+
+int mcf_pinmux_request(unsigned pinmux, unsigned func)
+{
+        return 0;
+}
+
+void mcf_pinmux_release(unsigned pinmux, unsigned func)
+{
+}
diff --git a/arch/m68knommu/platform/coldfire/pit.c b/arch/m68knommu/platform/coldfire/pit.c
index 61b96211f8ff..d8720ee34510 100644
--- a/arch/m68knommu/platform/coldfire/pit.c
+++ b/arch/m68knommu/platform/coldfire/pit.c
@@ -32,7 +32,6 @@
  */
 #define FREQ    ((MCF_CLK / 2) / 64)
 #define TA(a)   (MCF_IPSBAR + MCFPIT_BASE1 + (a))
-#define INTC0   (MCF_IPSBAR + MCFICM_INTC0)
 #define PIT_CYCLES_PER_JIFFY (FREQ / HZ)
 
 static u32 pit_cnt;
@@ -154,8 +153,6 @@ static struct clocksource pit_clk = {
 
 void hw_timer_init(void)
 {
-        u32 imr;
-
         cf_pit_clockevent.cpumask = cpumask_of(smp_processor_id());
         cf_pit_clockevent.mult = div_sc(FREQ, NSEC_PER_SEC, 32);
         cf_pit_clockevent.max_delta_ns =
@@ -166,11 +163,6 @@ void hw_timer_init(void)
 
         setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
 
-        __raw_writeb(ICR_INTRCONF, INTC0 + MCFINTC_ICR0 + MCFINT_PIT1);
-        imr = __raw_readl(INTC0 + MCFPIT_IMR);
-        imr &= ~MCFPIT_IMR_IBIT;
-        __raw_writel(imr, INTC0 + MCFPIT_IMR);
-
         pit_clk.mult = clocksource_hz2mult(FREQ, pit_clk.shift);
         clocksource_register(&pit_clk);
 }
diff --git a/arch/m68knommu/platform/coldfire/timers.c b/arch/m68knommu/platform/coldfire/timers.c
index 1ba8a3731653..2304d736c701 100644
--- a/arch/m68knommu/platform/coldfire/timers.c
+++ b/arch/m68knommu/platform/coldfire/timers.c
@@ -31,19 +31,9 @@
 #define TA(a)   (MCF_MBAR + MCFTIMER_BASE1 + (a))
 
 /*
- *      Default the timer and vector to use for ColdFire. Some ColdFire
- *      CPU's and some boards may want different. Their sub-architecture
- *      startup code (in config.c) can change these if they want.
- */
-unsigned int    mcf_timervector = 29;
-unsigned int    mcf_profilevector = 31;
-unsigned int    mcf_timerlevel = 5;
-
-/*
  *      These provide the underlying interrupt vector support.
  *      Unfortunately it is a little different on each ColdFire.
  */
-extern void mcf_settimericr(int timer, int level);
 void coldfire_profile_init(void);
 
 #if defined(CONFIG_M532x)
@@ -107,8 +97,6 @@ static struct clocksource mcftmr_clk = {
 
 void hw_timer_init(void)
 {
-        setup_irq(mcf_timervector, &mcftmr_timer_irq);
-
         __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
         mcftmr_cycles_per_jiffy = FREQ / HZ;
         /*
@@ -124,7 +112,7 @@ void hw_timer_init(void)
         mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
         clocksource_register(&mcftmr_clk);
 
-        mcf_settimericr(1, mcf_timerlevel);
+        setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
 
 #ifdef CONFIG_HIGHPROFILE
         coldfire_profile_init();
@@ -171,8 +159,6 @@ void coldfire_profile_init(void)
         printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
                PROFILEHZ);
 
-        setup_irq(mcf_profilevector, &coldfire_profile_irq);
-
         /* Set up TIMER 2 as high speed profile clock */
         __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
 
@@ -180,7 +166,7 @@ void coldfire_profile_init(void)
         __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
                 MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
 
-        mcf_settimericr(2, 7);
+        setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/vectors.c b/arch/m68knommu/platform/coldfire/vectors.c
index bdca0297fa9a..a21d3f870b7a 100644
--- a/arch/m68knommu/platform/coldfire/vectors.c
+++ b/arch/m68knommu/platform/coldfire/vectors.c
@@ -1,7 +1,7 @@
 /***************************************************************************/
 
 /*
- *      linux/arch/m68knommu/platform/5307/vectors.c
+ *      linux/arch/m68knommu/platform/coldfire/vectors.c
  *
  *      Copyright (C) 1999-2007, Greg Ungerer <gerg@snapgear.com>
  */
@@ -15,7 +15,6 @@
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
 #include <asm/mcfsim.h>
-#include <asm/mcfdma.h>
 #include <asm/mcfwdebug.h>
 
 /***************************************************************************/
@@ -79,20 +78,3 @@ void __init init_vectors(void)
 }
 
 /***************************************************************************/
-
-void enable_vector(unsigned int irq)
-{
-        /* Currently no action on ColdFire */
-}
-
-void disable_vector(unsigned int irq)
-{
-        /* Currently no action on ColdFire */
-}
-
-void ack_vector(unsigned int irq)
-{
-        /* Currently no action on ColdFire */
-}
-
-/***************************************************************************/
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 2db722d80d4d..bbd8327f1890 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -6,6 +6,7 @@ mainmenu "Linux/Microblaze Kernel Configuration"
 config MICROBLAZE
         def_bool y
         select HAVE_LMB
+        select USB_ARCH_HAS_EHCI
         select ARCH_WANT_OPTIONAL_GPIOLIB
 
 config SWAP
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index 8439598d4655..34187354304a 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -37,12 +37,12 @@ CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare
 CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))
 
 # r31 holds current when in kernel mode
-KBUILD_KERNEL += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2)
+KBUILD_CFLAGS += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2)
 
 LDFLAGS         :=
 LDFLAGS_vmlinux :=
 
-LIBGCC := $(shell $(CC) $(KBUILD_KERNEL) -print-libgcc-file-name)
+LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
 
 head-y := arch/microblaze/kernel/head.o
 libs-y += arch/microblaze/lib/
@@ -53,22 +53,41 @@ core-y += arch/microblaze/platform/
 
 boot := arch/microblaze/boot
 
+# Are we making a simpleImage.<boardname> target? If so, crack out the boardname
+DTB:=$(subst simpleImage.,,$(filter simpleImage.%, $(MAKECMDGOALS)))
+
+ifneq ($(DTB),)
+        core-y  += $(boot)/
+endif
+
 # defines filename extension depending memory management type
 ifeq ($(CONFIG_MMU),)
 MMU := -nommu
 endif
 
-export MMU
+export MMU DTB
 
 all: linux.bin
 
+BOOT_TARGETS = linux.bin linux.bin.gz simpleImage.%
+
 archclean:
         $(Q)$(MAKE) $(clean)=$(boot)
 
-linux.bin linux.bin.gz: vmlinux
+$(BOOT_TARGETS): vmlinux
         $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
 
 define archhelp
-  echo  '* linux.bin    - Create raw binary'
-  echo  '  linux.bin.gz - Create compressed raw binary'
+  echo '* linux.bin    - Create raw binary'
+  echo '  linux.bin.gz - Create compressed raw binary'
+  echo '  simpleImage.<dt> - ELF image with $(arch)/boot/dts/<dt>.dts linked in'
+  echo '                   - stripped elf with fdt blob
+  echo '  simpleImage.<dt>.unstrip - full ELF image with fdt blob'
+  echo '  *_defconfig      - Select default config from arch/microblaze/configs'
+  echo ''
+  echo '  Targets with <dt> embed a device tree blob inside the image'
+  echo '  These targets support board with firmware that does not'
+  echo '  support passing a device tree directly. Replace <dt> with the'
+  echo '  name of a dts file from the arch/microblaze/boot/dts/ directory'
+  echo '  (minus the .dts extension).'
 endef
diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
index c2bb043a029d..21f13322a4ca 100644
--- a/arch/microblaze/boot/Makefile
+++ b/arch/microblaze/boot/Makefile
@@ -2,10 +2,24 @@
 # arch/microblaze/boot/Makefile
 #
 
-targets := linux.bin linux.bin.gz
+obj-y += linked_dtb.o
+
+targets := linux.bin linux.bin.gz simpleImage.%
 
 OBJCOPYFLAGS_linux.bin  := -O binary
 
+# Where the DTS files live
+dtstree         := $(srctree)/$(src)/dts
+
+# Ensure system.dtb exists
+$(obj)/linked_dtb.o: $(obj)/system.dtb
+
+# Generate system.dtb from $(DTB).dtb
+ifneq ($(DTB),system)
+$(obj)/system.dtb: $(obj)/$(DTB).dtb
+        $(call if_changed,cp)
+endif
+
 $(obj)/linux.bin: vmlinux FORCE
         [ -n $(CONFIG_INITRAMFS_SOURCE) ] && [ ! -e $(CONFIG_INITRAMFS_SOURCE) ] && \
         touch $(CONFIG_INITRAMFS_SOURCE) || echo "No CPIO image"
@@ -16,4 +30,27 @@ $(obj)/linux.bin.gz: $(obj)/linux.bin FORCE
         $(call if_changed,gzip)
         @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
 
-clean-kernel += linux.bin linux.bin.gz
+quiet_cmd_cp = CP      $< $@$2
+        cmd_cp = cat $< >$@$2 || (rm -f $@ && echo false)
+
+quiet_cmd_strip = STRIP   $@
+      cmd_strip = $(STRIP) -K _start -K _end -K __log_buf -K _fdt_start vmlinux -o $@
+
+$(obj)/simpleImage.%: vmlinux FORCE
+        $(call if_changed,cp,.unstrip)
+        $(call if_changed,strip)
+        @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
+
+# Rule to build device tree blobs
+DTC = $(objtree)/scripts/dtc/dtc
+
+# Rule to build device tree blobs
+quiet_cmd_dtc = DTC     $@
+        cmd_dtc = $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 -p 1024 $(dtstree)/$*.dts
+
+$(obj)/%.dtb: $(dtstree)/%.dts FORCE
+        $(call if_changed,dtc)
+
+clean-kernel += linux.bin linux.bin.gz simpleImage.*
+
+clean-files += *.dtb
diff --git a/arch/microblaze/boot/dts/system.dts b/arch/microblaze/boot/dts/system.dts
new file mode 120000
index 000000000000..7cb657892f21
--- /dev/null
+++ b/arch/microblaze/boot/dts/system.dts
@@ -0,0 +1 @@
+../../platform/generic/system.dts
\ No newline at end of file
diff --git a/arch/microblaze/boot/linked_dtb.S b/arch/microblaze/boot/linked_dtb.S
new file mode 100644
index 000000000000..cb2b537aebee
--- /dev/null
+++ b/arch/microblaze/boot/linked_dtb.S
@@ -0,0 +1,3 @@
+.section __fdt_blob,"a"
+.incbin "arch/microblaze/boot/system.dtb"
+
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig
index 09c32962b66f..bb7c374713ad 100644
--- a/arch/microblaze/configs/mmu_defconfig
+++ b/arch/microblaze/configs/mmu_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.31-rc6
-# Tue Aug 18 11:00:02 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 10:28:50 2009
 #
 CONFIG_MICROBLAZE=y
 # CONFIG_SWAP is not set
@@ -42,11 +42,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=17
@@ -260,6 +261,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -357,12 +359,10 @@ CONFIG_NET_ETHERNET=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_KS8842 is not set
+CONFIG_XILINX_EMACLITE=y
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -460,6 +460,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 # CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_SOUND is not set
 # CONFIG_USB_SUPPORT is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -488,6 +489,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -546,7 +548,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -671,18 +672,20 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 # CONFIG_PAGE_POISONING is not set
 # CONFIG_SAMPLES is not set
 # CONFIG_KMEMCHECK is not set
 CONFIG_EARLY_PRINTK=y
-CONFIG_HEART_BEAT=y
+# CONFIG_HEART_BEAT is not set
 CONFIG_DEBUG_BOOTMEM=y
 
 #
@@ -697,7 +700,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -729,11 +731,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/microblaze/configs/nommu_defconfig b/arch/microblaze/configs/nommu_defconfig
index 8b638615a972..adb839bab704 100644
--- a/arch/microblaze/configs/nommu_defconfig
+++ b/arch/microblaze/configs/nommu_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.31-rc6
-# Tue Aug 18 10:35:30 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 10:29:43 2009
 #
 CONFIG_MICROBLAZE=y
 # CONFIG_SWAP is not set
@@ -44,11 +44,12 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=17
@@ -243,6 +244,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -272,6 +274,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 CONFIG_WIRELESS_OLD_REGULATORY=y
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -279,7 +282,6 @@ CONFIG_WIRELESS_OLD_REGULATORY=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -304,6 +306,7 @@ CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_OF_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
 
 #
@@ -349,6 +352,7 @@ CONFIG_MTD_RAM=y
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 # CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PHYSMAP_OF is not set
 CONFIG_MTD_UCLINUX=y
 # CONFIG_MTD_PLATRAM is not set
 
@@ -429,12 +433,10 @@ CONFIG_NET_ETHERNET=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_KS8842 is not set
+# CONFIG_XILINX_EMACLITE is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -535,7 +537,7 @@ CONFIG_VIDEO_OUTPUT_CONTROL=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
 # CONFIG_USB is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -579,6 +581,7 @@ CONFIG_FS_POSIX_ACL=y
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -639,7 +642,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -710,18 +712,20 @@ CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_LIST=y
 CONFIG_DEBUG_SG=y
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 # CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_EARLY_PRINTK=y
-CONFIG_HEART_BEAT=y
+# CONFIG_HEART_BEAT is not set
 # CONFIG_DEBUG_BOOTMEM is not set
 
 #
@@ -736,7 +740,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -768,11 +771,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/microblaze/include/asm/asm-compat.h b/arch/microblaze/include/asm/asm-compat.h
new file mode 100644
index 000000000000..e7bc9dc11b57
--- /dev/null
+++ b/arch/microblaze/include/asm/asm-compat.h
@@ -0,0 +1,17 @@
+#ifndef _ASM_MICROBLAZE_ASM_COMPAT_H
+#define _ASM_MICROBLAZE_ASM_COMPAT_H
+
+#include <asm/types.h>
+
+#ifdef __ASSEMBLY__
+#  define stringify_in_c(...)   __VA_ARGS__
+#  define ASM_CONST(x)          x
+#else
+/* This version of stringify will deal with commas... */
+#  define __stringify_in_c(...) #__VA_ARGS__
+#  define stringify_in_c(...)   __stringify_in_c(__VA_ARGS__) " "
+#  define __ASM_CONST(x)        x##UL
+#  define ASM_CONST(x)          __ASM_CONST(x)
+#endif
+
+#endif /* _ASM_MICROBLAZE_ASM_COMPAT_H */
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 7c3ec13b44d8..fc9997b73c09 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -210,6 +210,9 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
 #define in_be32(a) __raw_readl((const void __iomem __force *)(a))
 #define in_be16(a) __raw_readw(a)
 
+#define writel_be(v, a) out_be32((__force unsigned *)a, v)
+#define readl_be(a)     in_be32((__force unsigned *)a)
+
 /*
  * Little endian
  */
diff --git a/arch/microblaze/include/asm/ipc.h b/arch/microblaze/include/asm/ipc.h
deleted file mode 100644
index a46e3d9c2a3f..000000000000
--- a/arch/microblaze/include/asm/ipc.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ipc.h>
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index 72aceae88680..880c988c2237 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -17,6 +17,7 @@
 
 #include <linux/pfn.h>
 #include <asm/setup.h>
+#include <asm/asm-compat.h>
 #include <linux/const.h>
 
 #ifdef __KERNEL__
@@ -26,6 +27,8 @@
 #define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE-1))
 
+#define LOAD_OFFSET     ASM_CONST((CONFIG_KERNEL_START-CONFIG_KERNEL_BASE_ADDR))
+
 #ifndef __ASSEMBLY__
 
 #define PAGE_UP(addr)   (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h
index 27f8dafd8c34..ed67c9ed15b8 100644
--- a/arch/microblaze/include/asm/setup.h
+++ b/arch/microblaze/include/asm/setup.h
@@ -38,7 +38,7 @@ extern void early_console_reg_tlb_alloc(unsigned int addr);
 void time_init(void);
 void init_IRQ(void);
 void machine_early_init(const char *cmdline, unsigned int ram,
-                                                unsigned int fdt);
+                        unsigned int fdt, unsigned int msr);
 
 void machine_restart(char *cmd);
 void machine_shutdown(void);
diff --git a/arch/microblaze/include/asm/syscall.h b/arch/microblaze/include/asm/syscall.h
new file mode 100644
index 000000000000..048dfcd8d89d
--- /dev/null
+++ b/arch/microblaze/include/asm/syscall.h
@@ -0,0 +1,99 @@
+#ifndef __ASM_MICROBLAZE_SYSCALL_H
+#define __ASM_MICROBLAZE_SYSCALL_H
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <asm/ptrace.h>
+
+/* The system call number is given by the user in R12 */
+static inline long syscall_get_nr(struct task_struct *task,
+                                  struct pt_regs *regs)
+{
+        return regs->r12;
+}
+
+static inline void syscall_rollback(struct task_struct *task,
+                                    struct pt_regs *regs)
+{
+        /* TODO.  */
+}
+
+static inline long syscall_get_error(struct task_struct *task,
+                                     struct pt_regs *regs)
+{
+        return IS_ERR_VALUE(regs->r3) ? regs->r3 : 0;
+}
+
+static inline long syscall_get_return_value(struct task_struct *task,
+                                            struct pt_regs *regs)
+{
+        return regs->r3;
+}
+
+static inline void syscall_set_return_value(struct task_struct *task,
+                                            struct pt_regs *regs,
+                                            int error, long val)
+{
+        if (error)
+                regs->r3 = -error;
+        else
+                regs->r3 = val;
+}
+
+static inline microblaze_reg_t microblaze_get_syscall_arg(struct pt_regs *regs,
+                                                          unsigned int n)
+{
+        switch (n) {
+        case 5: return regs->r10;
+        case 4: return regs->r9;
+        case 3: return regs->r8;
+        case 2: return regs->r7;
+        case 1: return regs->r6;
+        case 0: return regs->r5;
+        default:
+                BUG();
+        }
+        return ~0;
+}
+
+static inline void microblaze_set_syscall_arg(struct pt_regs *regs,
+                                              unsigned int n,
+                                              unsigned long val)
+{
+        switch (n) {
+        case 5:
+                regs->r10 = val;
+        case 4:
+                regs->r9 = val;
+        case 3:
+                regs->r8 = val;
+        case 2:
+                regs->r7 = val;
+        case 1:
+                regs->r6 = val;
+        case 0:
+                regs->r5 = val;
+        default:
+                BUG();
+        }
+}
+
+static inline void syscall_get_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         unsigned long *args)
+{
+        while (n--)
+                *args++ = microblaze_get_syscall_arg(regs, i++);
+}
+
+static inline void syscall_set_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         const unsigned long *args)
+{
+        while (n--)
+                microblaze_set_syscall_arg(regs, i++, *args++);
+}
+
+#endif /* __ASM_MICROBLAZE_SYSCALL_H */
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h
index 0b852327c0e7..cb05a07e55e9 100644
--- a/arch/microblaze/include/asm/unistd.h
+++ b/arch/microblaze/include/asm/unistd.h
@@ -381,7 +381,7 @@
 #define __NR_preadv             363 /* new */
 #define __NR_pwritev            364 /* new */
 #define __NR_rt_tgsigqueueinfo  365 /* new */
-#define __NR_perf_counter_open  366 /* new */
+#define __NR_perf_event_open    366 /* new */
 
 #define __NR_syscalls           367
 
diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
index c411c6757deb..3539babc1c18 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -28,6 +28,7 @@ const struct cpu_ver_key cpu_ver_lookup[] = {
         {"7.10.d", 0x0b},
         {"7.20.a", 0x0c},
         {"7.20.b", 0x0d},
+        {"7.20.c", 0x0e},
         /* FIXME There is no keycode defined in MBV for these versions */
         {"2.10.a", 0x10},
         {"3.00.a", 0x20},
@@ -49,6 +50,8 @@ const struct family_string_key family_string_lookup[] = {
         {"spartan3a", 0xa},
         {"spartan3an", 0xb},
         {"spartan3adsp", 0xc},
+        {"spartan6", 0xd},
+        {"virtex6", 0xe},
         /* FIXME There is no key code defined for spartan2 */
         {"spartan2", 0xf0},
         {NULL, 0},
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index c7353e79f4a2..acc1f05d1e2c 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -308,38 +308,69 @@ C_ENTRY(_user_exception):
         swi     r12, r1, PTO+PT_R0;
         tovirt(r1,r1)
 
-        la      r15, r0, ret_from_trap-8
 /* where the trap should return need -8 to adjust for rtsd r15, 8*/
 /* Jump to the appropriate function for the system call number in r12
  * (r12 is not preserved), or return an error if r12 is not valid. The LP
  * register should point to the location where
  * the called function should return.  [note that MAKE_SYS_CALL uses label 1] */
-        /* See if the system call number is valid.  */
+
+        # Step into virtual mode.
+        set_vms;
+        addik   r11, r0, 3f
+        rtid    r11, 0
+        nop
+3:
+        add     r11, r0, CURRENT_TASK    /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO /* get thread info */
+        lwi     r11, r11, TI_FLAGS       /* get flags in thread info */
+        andi    r11, r11, _TIF_WORK_SYSCALL_MASK
+        beqi    r11, 4f
+
+        addik   r3, r0, -ENOSYS
+        swi     r3, r1, PTO + PT_R3
+        brlid   r15, do_syscall_trace_enter
+        addik   r5, r1, PTO + PT_R0
+
+        # do_syscall_trace_enter returns the new syscall nr.
+        addk    r12, r0, r3
+        lwi     r5, r1, PTO+PT_R5;
+        lwi     r6, r1, PTO+PT_R6;
+        lwi     r7, r1, PTO+PT_R7;
+        lwi     r8, r1, PTO+PT_R8;
+        lwi     r9, r1, PTO+PT_R9;
+        lwi     r10, r1, PTO+PT_R10;
+4:
+/* Jump to the appropriate function for the system call number in r12
+ * (r12 is not preserved), or return an error if r12 is not valid.
+ * The LP register should point to the location where the called function
+ * should return.  [note that MAKE_SYS_CALL uses label 1] */
+        /* See if the system call number is valid */
         addi    r11, r12, -__NR_syscalls;
-        bgei    r11,1f;
+        bgei    r11,5f;
         /* Figure out which function to use for this system call.  */
         /* Note Microblaze barrel shift is optional, so don't rely on it */
         add     r12, r12, r12;                  /* convert num -> ptr */
         add     r12, r12, r12;
 
         /* Trac syscalls and stored them to r0_ram */
-        lwi     r3, r12, 0x400 + TOPHYS(r0_ram)
+        lwi     r3, r12, 0x400 + r0_ram
         addi    r3, r3, 1
-        swi     r3, r12, 0x400 + TOPHYS(r0_ram)
+        swi     r3, r12, 0x400 + r0_ram
+
+        # Find and jump into the syscall handler.
+        lwi     r12, r12, sys_call_table
+        /* where the trap should return need -8 to adjust for rtsd r15, 8 */
+        la      r15, r0, ret_from_trap-8
+        bra     r12
 
-        lwi     r12, r12, TOPHYS(sys_call_table); /* Function ptr */
-        /* Make the system call.  to r12*/
-        set_vms;
-        rtid    r12, 0;
-        nop;
         /* The syscall number is invalid, return an error.  */
-1:      VM_ON;  /* RETURN() expects virtual mode*/
+5:
         addi    r3, r0, -ENOSYS;
         rtsd    r15,8;          /* looks like a normal subroutine return */
         or      r0, r0, r0
 
 
-/* Entry point used to return from a syscall/trap.  */
+/* Entry point used to return from a syscall/trap */
 /* We re-enable BIP bit before state restore */
 C_ENTRY(ret_from_trap):
         set_bip;                        /*  Ints masked for state restore*/
@@ -349,6 +380,23 @@ C_ENTRY(ret_from_trap):
 
         /* We're returning to user mode, so check for various conditions that
          * trigger rescheduling. */
+        # FIXME: Restructure all these flag checks.
+        add     r11, r0, CURRENT_TASK;  /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, r11, TI_FLAGS;             /* get flags in thread info */
+        andi    r11, r11, _TIF_WORK_SYSCALL_MASK
+        beqi    r11, 1f
+
+        swi     r3, r1, PTO + PT_R3
+        swi     r4, r1, PTO + PT_R4
+        brlid   r15, do_syscall_trace_leave
+        addik   r5, r1, PTO + PT_R0
+        lwi     r3, r1, PTO + PT_R3
+        lwi     r4, r1, PTO + PT_R4
+1:
+
+        /* We're returning to user mode, so check for various conditions that
+         * trigger rescheduling. */
         /* Get current task ptr into r11 */
         add     r11, r0, CURRENT_TASK;  /* Get current task ptr into r11 */
         lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c
index 0cb64a31e89a..d9f70f83097f 100644
--- a/arch/microblaze/kernel/exceptions.c
+++ b/arch/microblaze/kernel/exceptions.c
@@ -72,7 +72,8 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
 #endif
 
 #if 0
-        printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n",
+        printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x " \
+                                                        "ESR=%08x\n",
                         type, user_mode(regs) ? "user" : "kernel", fsr,
                         (unsigned int) regs->pc, (unsigned int) regs->esr);
 #endif
@@ -80,42 +81,50 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
         switch (type & 0x1F) {
         case MICROBLAZE_ILL_OPCODE_EXCEPTION:
                 if (user_mode(regs)) {
-                        printk(KERN_WARNING "Illegal opcode exception in user mode.\n");
+                        pr_debug(KERN_WARNING "Illegal opcode exception " \
+                                                        "in user mode.\n");
                         _exception(SIGILL, regs, ILL_ILLOPC, addr);
                         return;
                 }
-                printk(KERN_WARNING "Illegal opcode exception in kernel mode.\n");
+                printk(KERN_WARNING "Illegal opcode exception " \
+                                                        "in kernel mode.\n");
                 die("opcode exception", regs, SIGBUS);
                 break;
         case MICROBLAZE_IBUS_EXCEPTION:
                 if (user_mode(regs)) {
-                        printk(KERN_WARNING "Instruction bus error exception in user mode.\n");
+                        pr_debug(KERN_WARNING "Instruction bus error " \
+                                                "exception in user mode.\n");
                         _exception(SIGBUS, regs, BUS_ADRERR, addr);
                         return;
                 }
-                printk(KERN_WARNING "Instruction bus error exception in kernel mode.\n");
+                printk(KERN_WARNING "Instruction bus error exception " \
+                                                        "in kernel mode.\n");
                 die("bus exception", regs, SIGBUS);
                 break;
         case MICROBLAZE_DBUS_EXCEPTION:
                 if (user_mode(regs)) {
-                        printk(KERN_WARNING "Data bus error exception in user mode.\n");
+                        pr_debug(KERN_WARNING "Data bus error exception " \
+                                                        "in user mode.\n");
                         _exception(SIGBUS, regs, BUS_ADRERR, addr);
                         return;
                 }
-                printk(KERN_WARNING "Data bus error exception in kernel mode.\n");
+                printk(KERN_WARNING "Data bus error exception " \
+                                                        "in kernel mode.\n");
                 die("bus exception", regs, SIGBUS);
                 break;
         case MICROBLAZE_DIV_ZERO_EXCEPTION:
                 if (user_mode(regs)) {
-                        printk(KERN_WARNING "Divide by zero exception in user mode\n");
-                        _exception(SIGILL, regs, ILL_ILLOPC, addr);
+                        pr_debug(KERN_WARNING "Divide by zero exception " \
+                                                        "in user mode\n");
+                        _exception(SIGILL, regs, FPE_INTDIV, addr);
                         return;
                 }
-                printk(KERN_WARNING "Divide by zero exception in kernel mode.\n");
+                printk(KERN_WARNING "Divide by zero exception " \
+                                                        "in kernel mode.\n");
                 die("Divide by exception", regs, SIGBUS);
                 break;
         case MICROBLAZE_FPU_EXCEPTION:
-                printk(KERN_WARNING "FPU exception\n");
+                pr_debug(KERN_WARNING "FPU exception\n");
                 /* IEEE FP exception */
                 /* I removed fsr variable and use code var for storing fsr */
                 if (fsr & FSR_IO)
@@ -133,7 +142,7 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
 
 #ifdef CONFIG_MMU
         case MICROBLAZE_PRIVILEGED_EXCEPTION:
-                printk(KERN_WARNING "Privileged exception\n");
+                pr_debug(KERN_WARNING "Privileged exception\n");
                 /* "brk r0,r0" - used as debug breakpoint */
                 if (get_user(code, (unsigned long *)regs->pc) == 0
                         && code == 0x980c0000) {
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index e41c6ce2a7be..697ce3007f30 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -54,6 +54,16 @@ ENTRY(_start)
         mfs     r1, rmsr
         andi    r1, r1, ~2
         mts     rmsr, r1
+/*
+ * Here is checking mechanism which check if Microblaze has msr instructions
+ * We load msr and compare it with previous r1 value - if is the same,
+ * msr instructions works if not - cpu don't have them.
+ */
+        /* r8=0 - I have msr instr, 1 - I don't have them */
+        rsubi   r0, r0, 1       /* set the carry bit */
+        msrclr  r0, 0x4         /* try to clear it */
+        /* read the carry bit, r8 will be '0' if msrclr exists */
+        addik   r8, r0, 0
 
 /* r7 may point to an FDT, or there may be one linked in.
    if it's in r7, we've got to save it away ASAP.
@@ -209,8 +219,8 @@ start_here:
          * Please see $(ARCH)/mach-$(SUBARCH)/setup.c for
          * the function.
          */
-        la      r8, r0, machine_early_init
-        brald   r15, r8
+        la      r9, r0, machine_early_init
+        brald   r15, r9
         nop
 
 #ifndef CONFIG_MMU
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 3288c9737671..6b0288ebccd6 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -84,9 +84,10 @@
 #define NUM_TO_REG(num)         r ## num
 
 #ifdef CONFIG_MMU
-/* FIXME you can't change first load of MSR because there is
- * hardcoded jump bri 4 */
         #define RESTORE_STATE                   \
+                lwi     r5, r1, 0;              \
+                mts     rmsr, r5;               \
+                nop;                            \
                 lwi     r3, r1, PT_R3;          \
                 lwi     r4, r1, PT_R4;          \
                 lwi     r5, r1, PT_R5;          \
@@ -309,6 +310,9 @@ _hw_exception_handler:
         lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)) /* get saved current */
 #endif
 
+        mfs     r5, rmsr;
+        nop
+        swi     r5, r1, 0;
         mfs     r3, resr
         nop
         mfs     r4, rear;
@@ -380,6 +384,8 @@ handle_other_ex: /* Handle Other exceptions here */
         addk    r8, r17, r0; /* Load exception address */
         bralid  r15, full_exception; /* Branch to the handler */
         nop;
+        mts     r0, rfsr;       /* Clear sticky fsr */
+        nop
 
         /*
          * Trigger execution of the signal handler by enabling
diff --git a/arch/microblaze/kernel/init_task.c b/arch/microblaze/kernel/init_task.c
index 67da22579b62..b5d711f94ff8 100644
--- a/arch/microblaze/kernel/init_task.c
+++ b/arch/microblaze/kernel/init_task.c
@@ -19,9 +19,8 @@
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
 
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-{ INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 struct task_struct init_task = INIT_TASK(init_task);
 EXPORT_SYMBOL(init_task);
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 00b12c6d5326..4201c743cc9f 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -235,6 +235,7 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
         regs->pc = pc;
         regs->r1 = usp;
         regs->pt_mode = 0;
+        regs->msr |= MSR_UMS;
 }
 
 #ifdef CONFIG_MMU
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
index 53ff39af6a5c..4b3ac32754de 100644
--- a/arch/microblaze/kernel/ptrace.c
+++ b/arch/microblaze/kernel/ptrace.c
@@ -29,6 +29,10 @@
 #include <linux/sched.h>
 #include <linux/ptrace.h>
 #include <linux/signal.h>
+#include <linux/elf.h>
+#include <linux/audit.h>
+#include <linux/seccomp.h>
+#include <linux/tracehook.h>
 
 #include <linux/errno.h>
 #include <asm/processor.h>
@@ -174,6 +178,64 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         return rval;
 }
 
+asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
+{
+        long ret = 0;
+
+        secure_computing(regs->r12);
+
+        if (test_thread_flag(TIF_SYSCALL_TRACE) &&
+            tracehook_report_syscall_entry(regs))
+                /*
+                 * Tracing decided this syscall should not happen.
+                 * We'll return a bogus call number to get an ENOSYS
+                 * error, but leave the original number in regs->regs[0].
+                 */
+                ret = -1L;
+
+        if (unlikely(current->audit_context))
+                audit_syscall_entry(EM_XILINX_MICROBLAZE, regs->r12,
+                                    regs->r5, regs->r6,
+                                    regs->r7, regs->r8);
+
+        return ret ?: regs->r12;
+}
+
+asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
+{
+        int step;
+
+        if (unlikely(current->audit_context))
+                audit_syscall_exit(AUDITSC_RESULT(regs->r3), regs->r3);
+
+        step = test_thread_flag(TIF_SINGLESTEP);
+        if (step || test_thread_flag(TIF_SYSCALL_TRACE))
+                tracehook_report_syscall_exit(regs, step);
+}
+
+#if 0
+static asmlinkage void syscall_trace(void)
+{
+        if (!test_thread_flag(TIF_SYSCALL_TRACE))
+                return;
+        if (!(current->ptrace & PT_PTRACED))
+                return;
+        /* The 0x80 provides a way for the tracing parent to distinguish
+         between a syscall stop and SIGTRAP delivery */
+        ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
+                                ? 0x80 : 0));
+        /*
+         * this isn't the same as continuing with a signal, but it will do
+         * for normal use. strace only continues with a signal if the
+         * stopping signal is not SIGTRAP. -brl
+         */
+        if (current->exit_code) {
+                send_sig(current->exit_code, current, 1);
+                current->exit_code = 0;
+        }
+}
+#endif
+
 void ptrace_disable(struct task_struct *child)
 {
         /* nothing to do */
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 2a97bf513b64..8c1e0f4dcf18 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -94,7 +94,7 @@ inline unsigned get_romfs_len(unsigned *addr)
 #endif  /* CONFIG_MTD_UCLINUX_EBSS */
 
 void __init machine_early_init(const char *cmdline, unsigned int ram,
-                unsigned int fdt)
+                unsigned int fdt, unsigned int msr)
 {
         unsigned long *src, *dst = (unsigned long *)0x0;
 
@@ -157,6 +157,16 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
         early_printk("New klimit: 0x%08x\n", (unsigned)klimit);
 #endif
 
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+        if (msr)
+                early_printk("!!!Your kernel has setup MSR instruction but "
+                                "CPU don't have it %d\n", msr);
+#else
+        if (!msr)
+                early_printk("!!!Your kernel not setup MSR instruction but "
+                                "CPU have it %d\n", msr);
+#endif
+
         for (src = __ivt_start; src < __ivt_end; src++, dst++)
                 *dst = *src;
 
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index b96f1682bb24..07cabed4b947 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -23,7 +23,6 @@
 #include <linux/mman.h>
 #include <linux/sys.h>
 #include <linux/ipc.h>
-#include <linux/utsname.h>
 #include <linux/file.h>
 #include <linux/module.h>
 #include <linux/err.h>
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index 457216097dfd..ecec19155135 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -370,4 +370,4 @@ ENTRY(sys_call_table)
         .long sys_ni_syscall
         .long sys_ni_syscall
         .long sys_rt_tgsigqueueinfo     /* 365 */
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index ec5fa91a48d8..e704188d7855 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -12,13 +12,16 @@ OUTPUT_FORMAT("elf32-microblaze", "elf32-microblaze", "elf32-microblaze")
 OUTPUT_ARCH(microblaze)
 ENTRY(_start)
 
+#include <asm/page.h>
 #include <asm-generic/vmlinux.lds.h>
+#include <asm/thread_info.h>
 
 jiffies = jiffies_64 + 4;
 
 SECTIONS {
         . = CONFIG_KERNEL_START;
-        .text : {
+        _start = CONFIG_KERNEL_BASE_ADDR;
+        .text : AT(ADDR(.text) - LOAD_OFFSET) {
                 _text = . ;
                 _stext = . ;
                 *(.text .text.*)
@@ -33,24 +36,22 @@ SECTIONS {
         }
 
         . = ALIGN (4) ;
-        _fdt_start = . ; /* place for fdt blob */
-        . = . + 0x4000;
-        _fdt_end = . ;
+        __fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) {
+                _fdt_start = . ;                /* place for fdt blob */
+                *(__fdt_blob) ;                 /* Any link-placed DTB */
+                . = _fdt_start + 0x4000;        /* Pad up to 16kbyte */
+                _fdt_end = . ;
+        }
 
         . = ALIGN(16);
         RODATA
-        . = ALIGN(16);
-        __ex_table : {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
+        EXCEPTION_TABLE(16)
 
         /*
          * sdata2 section can go anywhere, but must be word aligned
          * and SDA2_BASE must point to the middle of it
          */
-        .sdata2 : {
+        .sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) {
                 _ssrw = .;
                 . = ALIGN(4096); /* page aligned when MMU used - origin 0x8 */
                 *(.sdata2)
@@ -61,12 +62,7 @@ SECTIONS {
         }
 
         _sdata = . ;
-        .data ALIGN (4096) : { /* page aligned when MMU used - origin 0x4 */
-                DATA_DATA
-                CONSTRUCTORS
-        }
-        . = ALIGN(32);
-        .data.cacheline_aligned : { *(.data.cacheline_aligned) }
+        RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
         _edata = . ;
 
         /* Reserve some low RAM for r0 based memory references */
@@ -74,18 +70,14 @@ SECTIONS {
         r0_ram = . ;
         . = . +  4096;  /* a page should be enough */
 
-        /* The initial task */
-        . = ALIGN(8192);
-        .data.init_task : { *(.data.init_task) }
-
         /* Under the microblaze ABI, .sdata and .sbss must be contiguous */
         . = ALIGN(8);
-        .sdata : {
+        .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
                 _ssro = .;
                 *(.sdata)
         }
 
-        .sbss : {
+        .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) {
                 _ssbss = .;
                 *(.sbss)
                 _esbss = .;
@@ -96,47 +88,36 @@ SECTIONS {
 
         __init_begin = .;
 
-        . = ALIGN(4096);
-        .init.text : {
-                _sinittext = . ;
-                INIT_TEXT
-                _einittext = .;
-        }
+        INIT_TEXT_SECTION(PAGE_SIZE)
 
-        .init.data : {
+        .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
                 INIT_DATA
         }
 
         . = ALIGN(4);
-        .init.ivt : {
+        .init.ivt : AT(ADDR(.init.ivt) - LOAD_OFFSET) {
                 __ivt_start = .;
                 *(.init.ivt)
                 __ivt_end = .;
         }
 
-        .init.setup : {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
+        .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
+                INIT_SETUP(0)
         }
 
-        .initcall.init : {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
+        .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET ) {
+                INIT_CALLS
         }
 
-        .con_initcall.init : {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
+        .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
+                CON_INITCALL
         }
 
         SECURITY_INIT
 
         __init_end_before_initramfs = .;
 
-        .init.ramfs ALIGN(4096) : {
+        .init.ramfs ALIGN(4096) : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
                 __initramfs_start = .;
                 *(.init.ramfs)
                 __initramfs_end = .;
@@ -152,7 +133,8 @@ SECTIONS {
         }
         __init_end = .;
 
-        .bss ALIGN (4096) : { /* page aligned when MMU used */
+        .bss ALIGN (4096) : AT(ADDR(.bss) - LOAD_OFFSET) {
+                /* page aligned when MMU used */
                 __bss_start = . ;
                         *(.bss*)
                         *(COMMON)
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
index f207f1a94dbc..a44892e7cd5b 100644
--- a/arch/microblaze/mm/init.c
+++ b/arch/microblaze/mm/init.c
@@ -180,7 +180,8 @@ void free_initrd_mem(unsigned long start, unsigned long end)
                 totalram_pages++;
                 pages++;
         }
-        printk(KERN_NOTICE "Freeing initrd memory: %dk freed\n", pages);
+        printk(KERN_NOTICE "Freeing initrd memory: %dk freed\n",
+                                        (int)(pages * (PAGE_SIZE / 1024)));
 }
 #endif
 
@@ -204,7 +205,7 @@ void __init mem_init(void)
         totalram_pages += free_all_bootmem();
 
         printk(KERN_INFO "Memory: %luk/%luk available\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                num_physpages << (PAGE_SHIFT-10));
 #ifdef CONFIG_MMU
         mem_init_done = 1;
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3ca0fe1a9123..705a7a9170f3 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -6,7 +6,7 @@ config MIPS
         select HAVE_ARCH_KGDB
         # Horrible source of confusion.  Die, die, die ...
         select EMBEDDED
-        select RTC_LIB
+        select RTC_LIB if !LEMOTE_FULOONG2E
 
 mainmenu "Linux/MIPS Kernel Configuration"
 
@@ -80,6 +80,21 @@ config BCM47XX
         help
          Support for BCM47XX based boards
 
+config BCM63XX
+        bool "Broadcom BCM63XX based boards"
+        select CEVT_R4K
+        select CSRC_R4K
+        select DMA_NONCOHERENT
+        select IRQ_CPU
+        select SYS_HAS_CPU_MIPS32_R1
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_BIG_ENDIAN
+        select SYS_HAS_EARLY_PRINTK
+        select SWAP_IO_SPACE
+        select ARCH_REQUIRE_GPIOLIB
+        help
+         Support for BCM63XX based boards
+
 config MIPS_COBALT
         bool "Cobalt Server"
         select CEVT_R4K
@@ -174,30 +189,15 @@ config LASAT
         select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
         select SYS_SUPPORTS_LITTLE_ENDIAN
 
-config LEMOTE_FULONG
-        bool "Lemote Fulong mini-PC"
-        select ARCH_SPARSEMEM_ENABLE
-        select CEVT_R4K
-        select CSRC_R4K
-        select SYS_HAS_CPU_LOONGSON2
-        select DMA_NONCOHERENT
-        select BOOT_ELF32
-        select BOARD_SCACHE
-        select HAVE_STD_PC_SERIAL_PORT
-        select HW_HAS_PCI
-        select I8259
-        select ISA
-        select IRQ_CPU
-        select SYS_SUPPORTS_32BIT_KERNEL
-        select SYS_SUPPORTS_64BIT_KERNEL
-        select SYS_SUPPORTS_LITTLE_ENDIAN
-        select SYS_SUPPORTS_HIGHMEM
-        select SYS_HAS_EARLY_PRINTK
-        select GENERIC_ISA_DMA_SUPPORT_BROKEN
-        select CPU_HAS_WB
+config MACH_LOONGSON
+        bool "Loongson family of machines"
         help
-          Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
-          an FPGA northbridge
+          This enables the support of Loongson family of machines.
+
+          Loongson is a family of general-purpose MIPS-compatible CPUs.
+          developed at Institute of Computing Technology (ICT),
+          Chinese Academy of Sciences (CAS) in the People's Republic
+          of China. The chief architect is Professor Weiwu Hu.
 
 config MIPS_MALTA
         bool "MIPS Malta board"
@@ -660,6 +660,7 @@ endchoice
 
 source "arch/mips/alchemy/Kconfig"
 source "arch/mips/basler/excite/Kconfig"
+source "arch/mips/bcm63xx/Kconfig"
 source "arch/mips/jazz/Kconfig"
 source "arch/mips/lasat/Kconfig"
 source "arch/mips/pmc-sierra/Kconfig"
@@ -668,6 +669,7 @@ source "arch/mips/sibyte/Kconfig"
 source "arch/mips/txx9/Kconfig"
 source "arch/mips/vr41xx/Kconfig"
 source "arch/mips/cavium-octeon/Kconfig"
+source "arch/mips/loongson/Kconfig"
 
 endmenu
 
@@ -1044,12 +1046,10 @@ choice
         prompt "CPU type"
         default CPU_R4X00
 
-config CPU_LOONGSON2
-        bool "Loongson 2"
-        depends on SYS_HAS_CPU_LOONGSON2
-        select CPU_SUPPORTS_32BIT_KERNEL
-        select CPU_SUPPORTS_64BIT_KERNEL
-        select CPU_SUPPORTS_HIGHMEM
+config CPU_LOONGSON2E
+        bool "Loongson 2E"
+        depends on SYS_HAS_CPU_LOONGSON2E
+        select CPU_LOONGSON2
         help
           The Loongson 2E processor implements the MIPS III instruction set
           with many extensions.
@@ -1057,7 +1057,6 @@ config CPU_LOONGSON2
 config CPU_MIPS32_R1
         bool "MIPS32 Release 1"
         depends on SYS_HAS_CPU_MIPS32_R1
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_HIGHMEM
@@ -1075,7 +1074,6 @@ config CPU_MIPS32_R1
 config CPU_MIPS32_R2
         bool "MIPS32 Release 2"
         depends on SYS_HAS_CPU_MIPS32_R2
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_HIGHMEM
@@ -1089,7 +1087,6 @@ config CPU_MIPS32_R2
 config CPU_MIPS64_R1
         bool "MIPS64 Release 1"
         depends on SYS_HAS_CPU_MIPS64_R1
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
@@ -1109,7 +1106,6 @@ config CPU_MIPS64_R1
 config CPU_MIPS64_R2
         bool "MIPS64 Release 2"
         depends on SYS_HAS_CPU_MIPS64_R2
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
@@ -1155,7 +1151,6 @@ config CPU_VR41XX
 config CPU_R4300
         bool "R4300"
         depends on SYS_HAS_CPU_R4300
-        select CPU_HAS_LLSC
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
         help
@@ -1164,7 +1159,6 @@ config CPU_R4300
 config CPU_R4X00
         bool "R4x00"
         depends on SYS_HAS_CPU_R4X00
-        select CPU_HAS_LLSC
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
         help
@@ -1174,7 +1168,6 @@ config CPU_R4X00
 config CPU_TX49XX
         bool "R49XX"
         depends on SYS_HAS_CPU_TX49XX
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
@@ -1182,7 +1175,6 @@ config CPU_TX49XX
 config CPU_R5000
         bool "R5000"
         depends on SYS_HAS_CPU_R5000
-        select CPU_HAS_LLSC
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
         help
@@ -1191,14 +1183,12 @@ config CPU_R5000
 config CPU_R5432
         bool "R5432"
         depends on SYS_HAS_CPU_R5432
-        select CPU_HAS_LLSC
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
 
 config CPU_R5500
         bool "R5500"
         depends on SYS_HAS_CPU_R5500
-        select CPU_HAS_LLSC
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
         select CPU_SUPPORTS_HUGEPAGES
@@ -1209,7 +1199,6 @@ config CPU_R5500
 config CPU_R6000
         bool "R6000"
         depends on EXPERIMENTAL
-        select CPU_HAS_LLSC
         depends on SYS_HAS_CPU_R6000
         select CPU_SUPPORTS_32BIT_KERNEL
         help
@@ -1219,7 +1208,6 @@ config CPU_R6000
 config CPU_NEVADA
         bool "RM52xx"
         depends on SYS_HAS_CPU_NEVADA
-        select CPU_HAS_LLSC
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
         help
@@ -1229,7 +1217,6 @@ config CPU_R8000
         bool "R8000"
         depends on EXPERIMENTAL
         depends on SYS_HAS_CPU_R8000
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_64BIT_KERNEL
         help
@@ -1239,7 +1226,6 @@ config CPU_R8000
 config CPU_R10000
         bool "R10000"
         depends on SYS_HAS_CPU_R10000
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
@@ -1250,7 +1236,6 @@ config CPU_R10000
 config CPU_RM7000
         bool "RM7000"
         depends on SYS_HAS_CPU_RM7000
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
@@ -1259,7 +1244,6 @@ config CPU_RM7000
 config CPU_RM9000
         bool "RM9000"
         depends on SYS_HAS_CPU_RM9000
-        select CPU_HAS_LLSC
         select CPU_HAS_PREFETCH
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
@@ -1269,7 +1253,6 @@ config CPU_RM9000
 config CPU_SB1
         bool "SB1"
         depends on SYS_HAS_CPU_SB1
-        select CPU_HAS_LLSC
         select CPU_SUPPORTS_32BIT_KERNEL
         select CPU_SUPPORTS_64BIT_KERNEL
         select CPU_SUPPORTS_HIGHMEM
@@ -1296,7 +1279,13 @@ config CPU_CAVIUM_OCTEON
 
 endchoice
 
-config SYS_HAS_CPU_LOONGSON2
+config CPU_LOONGSON2
+        bool
+        select CPU_SUPPORTS_32BIT_KERNEL
+        select CPU_SUPPORTS_64BIT_KERNEL
+        select CPU_SUPPORTS_HIGHMEM
+
+config SYS_HAS_CPU_LOONGSON2E
         bool
 
 config SYS_HAS_CPU_MIPS32_R1
@@ -1683,9 +1672,6 @@ config SB1_PASS_2_1_WORKAROUNDS
 config 64BIT_PHYS_ADDR
         bool
 
-config CPU_HAS_LLSC
-        bool
-
 config CPU_HAS_SMARTMIPS
         depends on SYS_SUPPORTS_SMARTMIPS
         bool "Support for the SmartMIPS ASE"
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 861da514a468..77f5021218d3 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -120,7 +120,11 @@ cflags-$(CONFIG_CPU_R4300)	+= -march=r4300 -Wa,--trap
 cflags-$(CONFIG_CPU_VR41XX)     += -march=r4100 -Wa,--trap
 cflags-$(CONFIG_CPU_R4X00)      += -march=r4600 -Wa,--trap
 cflags-$(CONFIG_CPU_TX49XX)     += -march=r4600 -Wa,--trap
-cflags-$(CONFIG_CPU_LOONGSON2)  += -march=r4600 -Wa,--trap
+# only gcc >= 4.4 have the loongson-specific support
+cflags-$(CONFIG_CPU_LOONGSON2)  += -Wa,--trap
+cflags-$(CONFIG_CPU_LOONGSON2E) += \
+        $(call cc-option,-march=loongson2e,-march=r4600)
+
 cflags-$(CONFIG_CPU_MIPS32_R1)  += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
                         -Wa,-mips32 -Wa,--trap
 cflags-$(CONFIG_CPU_MIPS32_R2)  += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
@@ -314,11 +318,12 @@ cflags-$(CONFIG_WR_PPMC)		+= -I$(srctree)/arch/mips/include/asm/mach-wrppmc
 load-$(CONFIG_WR_PPMC)          += 0xffffffff80100000
 
 #
-# lemote fulong mini-PC board
+# Loongson family
 #
-core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
-load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
-cflags-$(CONFIG_LEMOTE_FULONG) += -I$(srctree)/arch/mips/include/asm/mach-lemote
+core-$(CONFIG_MACH_LOONGSON) +=arch/mips/loongson/
+cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \
+                    -mno-branch-likely
+load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000
 
 #
 # MIPS Malta board
@@ -560,6 +565,13 @@ cflags-$(CONFIG_BCM47XX)	+= -I$(srctree)/arch/mips/include/asm/mach-bcm47xx
 load-$(CONFIG_BCM47XX)          := 0xffffffff80001000
 
 #
+# Broadcom BCM63XX boards
+#
+core-$(CONFIG_BCM63XX)          += arch/mips/bcm63xx/
+cflags-$(CONFIG_BCM63XX)        += -I$(srctree)/arch/mips/include/asm/mach-bcm63xx/
+load-$(CONFIG_BCM63XX)          := 0xffffffff80010000
+
+#
 # SNI RM
 #
 core-$(CONFIG_SNI_RM)           += arch/mips/sni/
@@ -615,16 +627,6 @@ endif
 cflags-y                        += -I$(srctree)/arch/mips/include/asm/mach-generic
 drivers-$(CONFIG_PCI)           += arch/mips/pci/
 
-ifdef CONFIG_32BIT
-ifdef CONFIG_CPU_LITTLE_ENDIAN
-JIFFIES                 = jiffies_64
-else
-JIFFIES                 = jiffies_64 + 4
-endif
-else
-JIFFIES                 = jiffies_64
-endif
-
 #
 # Automatically detect the build format. By default we choose
 # the elf format according to the load address.
@@ -648,8 +650,9 @@ ifdef CONFIG_64BIT
 endif
 
 KBUILD_AFLAGS   += $(cflags-y)
-KBUILD_CFLAGS   += $(cflags-y) \
-                        -D"VMLINUX_LOAD_ADDRESS=$(load-y)"
+KBUILD_CFLAGS   += $(cflags-y)
+KBUILD_CPPFLAGS += -D"VMLINUX_LOAD_ADDRESS=$(load-y)"
+KBUILD_CPPFLAGS += -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
 
 LDFLAGS                 += -m $(ld-emul)
 
@@ -664,18 +667,6 @@ endif
 
 OBJCOPYFLAGS            += --remove-section=.reginfo
 
-#
-# Choosing incompatible machines durings configuration will result in
-# error messages during linking.  Select a default linkscript if
-# none has been choosen above.
-#
-
-CPPFLAGS_vmlinux.lds := \
-        $(KBUILD_CFLAGS) \
-        -D"LOADADDR=$(load-y)" \
-        -D"JIFFIES=$(JIFFIES)" \
-        -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
-
 head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
 
 libs-y                  += arch/mips/lib/
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 3f036b3d400e..6184baa56786 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -27,6 +27,7 @@
 
 #include <linux/init.h>
 #include <linux/ioport.h>
+#include <linux/jiffies.h>
 #include <linux/module.h>
 #include <linux/pm.h>
 
@@ -53,6 +54,9 @@ void __init plat_mem_setup(void)
         printk(KERN_INFO "(PRId %08x) @ %lu.%02lu MHz\n", read_c0_prid(),
                est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);
 
+        /* this is faster than wasting cycles trying to approximate it */
+        preset_lpj = (est_freq >> 1) / HZ;
+
         _machine_restart = au1000_restart;
         _machine_halt = au1000_halt;
         pm_power_off = au1000_power_off;
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 33fbae79af5e..379a664809b0 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -36,14 +36,13 @@
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
 
+#include <asm/processor.h>
 #include <asm/time.h>
 #include <asm/mach-au1x00/au1000.h>
 
 /* 32kHz clock enabled and detected */
 #define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
 
-extern int allow_au1k_wait; /* default off for CP0 Counter */
-
 static cycle_t au1x_counter1_read(struct clocksource *cs)
 {
         return au_readl(SYS_RTCREAD);
@@ -89,7 +88,7 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = {
         .irq            = AU1000_RTC_MATCH2_INT,
         .set_next_event = au1x_rtcmatch2_set_next_event,
         .set_mode       = au1x_rtcmatch2_set_mode,
-        .cpumask        = CPU_MASK_ALL_PTR,
+        .cpumask        = cpu_all_mask,
 };
 
 static struct irqaction au1x_rtcmatch2_irqaction = {
@@ -153,13 +152,17 @@ void __init plat_time_init(void)
 
         printk(KERN_INFO "Alchemy clocksource installed\n");
 
-        /* can now use 'wait' */
-        allow_au1k_wait = 1;
         return;
 
 cntr_err:
-        /* counters unusable, use C0 counter */
+        /*
+         * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
+         * function is called.  Because the Alchemy counters are unusable
+         * the C0 timekeeping code is installed and use of the 'wait'
+         * instruction must be prohibited, which is done most easily by
+         * assigning NULL to cpu_wait.
+         */
+        cpu_wait = NULL;
         r4k_clockevent_init();
         init_r4k_clocksource();
-        allow_au1k_wait = 0;
 }
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index cf50fa29b198..e2278c04459d 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -417,6 +417,20 @@ static struct platform_device ar7_udc = {
         .num_resources = ARRAY_SIZE(usb_res),
 };
 
+static struct resource ar7_wdt_res = {
+        .name = "regs",
+        .start = -1, /* Filled at runtime */
+        .end = -1, /* Filled at runtime */
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ar7_wdt = {
+        .id = -1,
+        .name  = "ar7_wdt",
+        .resource = &ar7_wdt_res,
+        .num_resources = 1,
+};
+
 static inline unsigned char char2hex(char h)
 {
         switch (h) {
@@ -487,6 +501,7 @@ static void __init detect_leds(void)
 
 static int __init ar7_register_devices(void)
 {
+        u16 chip_id;
         int res;
 #ifdef CONFIG_SERIAL_8250
         static struct uart_port uart_port[2];
@@ -565,6 +580,23 @@ static int __init ar7_register_devices(void)
 
         res = platform_device_register(&ar7_udc);
 
+        chip_id = ar7_chip_id();
+        switch (chip_id) {
+        case AR7_CHIP_7100:
+        case AR7_CHIP_7200:
+                ar7_wdt_res.start = AR7_REGS_WDT;
+                break;
+        case AR7_CHIP_7300:
+                ar7_wdt_res.start = UR8_REGS_WDT;
+                break;
+        default:
+                break;
+        }
+
+        ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
+
+        res = platform_device_register(&ar7_wdt);
+
         return res;
 }
 arch_initcall(ar7_register_devices);
diff --git a/arch/mips/bcm63xx/Kconfig b/arch/mips/bcm63xx/Kconfig
new file mode 100644
index 000000000000..fb177d6df066
--- /dev/null
+++ b/arch/mips/bcm63xx/Kconfig
@@ -0,0 +1,25 @@
+menu "CPU support"
+        depends on BCM63XX
+
+config BCM63XX_CPU_6338
+        bool "support 6338 CPU"
+        select HW_HAS_PCI
+        select USB_ARCH_HAS_OHCI
+        select USB_OHCI_BIG_ENDIAN_DESC
+        select USB_OHCI_BIG_ENDIAN_MMIO
+
+config BCM63XX_CPU_6345
+        bool "support 6345 CPU"
+        select USB_OHCI_BIG_ENDIAN_DESC
+        select USB_OHCI_BIG_ENDIAN_MMIO
+
+config BCM63XX_CPU_6348
+        bool "support 6348 CPU"
+        select HW_HAS_PCI
+
+config BCM63XX_CPU_6358
+        bool "support 6358 CPU"
+        select HW_HAS_PCI
+endmenu
+
+source "arch/mips/bcm63xx/boards/Kconfig"
diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
new file mode 100644
index 000000000000..aaa585cf26e3
--- /dev/null
+++ b/arch/mips/bcm63xx/Makefile
@@ -0,0 +1,7 @@
+obj-y           += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
+                   dev-dsp.o dev-enet.o
+obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
+
+obj-y           += boards/
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/bcm63xx/boards/Kconfig b/arch/mips/bcm63xx/boards/Kconfig
new file mode 100644
index 000000000000..c6aed33d893e
--- /dev/null
+++ b/arch/mips/bcm63xx/boards/Kconfig
@@ -0,0 +1,11 @@
+choice
+        prompt "Board support"
+        depends on BCM63XX
+        default BOARD_BCM963XX
+
+config BOARD_BCM963XX
+       bool "Generic Broadcom 963xx boards"
+        select SSB
+       help
+
+endchoice
diff --git a/arch/mips/bcm63xx/boards/Makefile b/arch/mips/bcm63xx/boards/Makefile
new file mode 100644
index 000000000000..e5cc86dc1da8
--- /dev/null
+++ b/arch/mips/bcm63xx/boards/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_BOARD_BCM963XX)            += board_bcm963xx.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
new file mode 100644
index 000000000000..fd77f548207a
--- /dev/null
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -0,0 +1,837 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/ssb/ssb.h>
+#include <asm/addrspace.h>
+#include <bcm63xx_board.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_board.h>
+#include <bcm63xx_dev_pci.h>
+#include <bcm63xx_dev_enet.h>
+#include <bcm63xx_dev_dsp.h>
+#include <board_bcm963xx.h>
+
+#define PFX     "board_bcm963xx: "
+
+static struct bcm963xx_nvram nvram;
+static unsigned int mac_addr_used;
+static struct board_info board;
+
+/*
+ * known 6338 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6338
+static struct board_info __initdata board_96338gw = {
+        .name                           = "96338GW",
+        .expected_cpu_id                = 0x6338,
+
+        .has_enet0                      = 1,
+        .enet0 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+        .has_ohci0                      = 1,
+
+        .leds = {
+                {
+                        .name           = "adsl",
+                        .gpio           = 3,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ses",
+                        .gpio           = 5,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 0,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 1,
+                        .active_low     = 1,
+                }
+        },
+};
+
+static struct board_info __initdata board_96338w = {
+        .name                           = "96338W",
+        .expected_cpu_id                = 0x6338,
+
+        .has_enet0                      = 1,
+        .enet0 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+        .leds = {
+                {
+                        .name           = "adsl",
+                        .gpio           = 3,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ses",
+                        .gpio           = 5,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 0,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 1,
+                        .active_low     = 1,
+                },
+        },
+};
+#endif
+
+/*
+ * known 6345 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6345
+static struct board_info __initdata board_96345gw2 = {
+        .name                           = "96345GW2",
+        .expected_cpu_id                = 0x6345,
+};
+#endif
+
+/*
+ * known 6348 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6348
+static struct board_info __initdata board_96348r = {
+        .name                           = "96348R",
+        .expected_cpu_id                = 0x6348,
+
+        .has_enet0                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .leds = {
+                {
+                        .name           = "adsl-fail",
+                        .gpio           = 2,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp",
+                        .gpio           = 3,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 0,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 1,
+                        .active_low     = 1,
+                },
+        },
+};
+
+static struct board_info __initdata board_96348gw_10 = {
+        .name                           = "96348GW-10",
+        .expected_cpu_id                = 0x6348,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+        .has_ohci0                      = 1,
+        .has_pccard                     = 1,
+        .has_ehci0                      = 1,
+
+        .has_dsp                        = 1,
+        .dsp = {
+                .gpio_rst               = 6,
+                .gpio_int               = 34,
+                .cs                     = 2,
+                .ext_irq                = 2,
+        },
+
+        .leds = {
+                {
+                        .name           = "adsl-fail",
+                        .gpio           = 2,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp",
+                        .gpio           = 3,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 0,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 1,
+                        .active_low     = 1,
+                },
+        },
+};
+
+static struct board_info __initdata board_96348gw_11 = {
+        .name                           = "96348GW-11",
+        .expected_cpu_id                = 0x6348,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+
+        .has_ohci0 = 1,
+        .has_pccard = 1,
+        .has_ehci0 = 1,
+
+        .leds = {
+                {
+                        .name           = "adsl-fail",
+                        .gpio           = 2,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp",
+                        .gpio           = 3,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 0,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 1,
+                        .active_low     = 1,
+                },
+        },
+};
+
+static struct board_info __initdata board_96348gw = {
+        .name                           = "96348GW",
+        .expected_cpu_id                = 0x6348,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+        .has_ohci0 = 1,
+
+        .has_dsp                        = 1,
+        .dsp = {
+                .gpio_rst               = 6,
+                .gpio_int               = 34,
+                .ext_irq                = 2,
+                .cs                     = 2,
+        },
+
+        .leds = {
+                {
+                        .name           = "adsl-fail",
+                        .gpio           = 2,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp",
+                        .gpio           = 3,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 0,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 1,
+                        .active_low     = 1,
+                },
+        },
+};
+
+static struct board_info __initdata board_FAST2404 = {
+        .name                           = "F@ST2404",
+        .expected_cpu_id                = 0x6348,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+
+        .has_ohci0 = 1,
+        .has_pccard = 1,
+        .has_ehci0 = 1,
+};
+
+static struct board_info __initdata board_DV201AMR = {
+        .name                           = "DV201AMR",
+        .expected_cpu_id                = 0x6348,
+
+        .has_pci                        = 1,
+        .has_ohci0                      = 1,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+};
+
+static struct board_info __initdata board_96348gw_a = {
+        .name                           = "96348GW-A",
+        .expected_cpu_id                = 0x6348,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+        .has_ohci0 = 1,
+};
+#endif
+
+/*
+ * known 6358 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6358
+static struct board_info __initdata board_96358vw = {
+        .name                           = "96358VW",
+        .expected_cpu_id                = 0x6358,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+
+        .has_ohci0 = 1,
+        .has_pccard = 1,
+        .has_ehci0 = 1,
+
+        .leds = {
+                {
+                        .name           = "adsl-fail",
+                        .gpio           = 15,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp",
+                        .gpio           = 22,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 23,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 4,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 5,
+                },
+        },
+};
+
+static struct board_info __initdata board_96358vw2 = {
+        .name                           = "96358VW2",
+        .expected_cpu_id                = 0x6358,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+
+        .has_ohci0 = 1,
+        .has_pccard = 1,
+        .has_ehci0 = 1,
+
+        .leds = {
+                {
+                        .name           = "adsl",
+                        .gpio           = 22,
+                        .active_low     = 1,
+                },
+                {
+                        .name           = "ppp-fail",
+                        .gpio           = 23,
+                },
+                {
+                        .name           = "power",
+                        .gpio           = 5,
+                        .active_low     = 1,
+                        .default_trigger = "default-on",
+                },
+                {
+                        .name           = "stop",
+                        .gpio           = 4,
+                        .active_low     = 1,
+                },
+        },
+};
+
+static struct board_info __initdata board_AGPFS0 = {
+        .name                           = "AGPF-S0",
+        .expected_cpu_id                = 0x6358,
+
+        .has_enet0                      = 1,
+        .has_enet1                      = 1,
+        .has_pci                        = 1,
+
+        .enet0 = {
+                .has_phy                = 1,
+                .use_internal_phy       = 1,
+        },
+
+        .enet1 = {
+                .force_speed_100        = 1,
+                .force_duplex_full      = 1,
+        },
+
+        .has_ohci0 = 1,
+        .has_ehci0 = 1,
+};
+#endif
+
+/*
+ * all boards
+ */
+static const struct board_info __initdata *bcm963xx_boards[] = {
+#ifdef CONFIG_BCM63XX_CPU_6338
+        &board_96338gw,
+        &board_96338w,
+#endif
+#ifdef CONFIG_BCM63XX_CPU_6345
+        &board_96345gw2,
+#endif
+#ifdef CONFIG_BCM63XX_CPU_6348
+        &board_96348r,
+        &board_96348gw,
+        &board_96348gw_10,
+        &board_96348gw_11,
+        &board_FAST2404,
+        &board_DV201AMR,
+        &board_96348gw_a,
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6358
+        &board_96358vw,
+        &board_96358vw2,
+        &board_AGPFS0,
+#endif
+};
+
+/*
+ * early init callback, read nvram data from flash and checksum it
+ */
+void __init board_prom_init(void)
+{
+        unsigned int check_len, i;
+        u8 *boot_addr, *cfe, *p;
+        char cfe_version[32];
+        u32 val;
+
+        /* read base address of boot chip select (0)
+         * 6345 does not have MPI but boots from standard
+         * MIPS Flash address */
+        if (BCMCPU_IS_6345())
+                val = 0x1fc00000;
+        else {
+                val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+                val &= MPI_CSBASE_BASE_MASK;
+        }
+        boot_addr = (u8 *)KSEG1ADDR(val);
+
+        /* dump cfe version */
+        cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+        if (!memcmp(cfe, "cfe-v", 5))
+                snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
+                         cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
+        else
+                strcpy(cfe_version, "unknown");
+        printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
+
+        /* extract nvram data */
+        memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram));
+
+        /* check checksum before using data */
+        if (nvram.version <= 4)
+                check_len = offsetof(struct bcm963xx_nvram, checksum_old);
+        else
+                check_len = sizeof(nvram);
+        val = 0;
+        p = (u8 *)&nvram;
+        while (check_len--)
+                val += *p;
+        if (val) {
+                printk(KERN_ERR PFX "invalid nvram checksum\n");
+                return;
+        }
+
+        /* find board by name */
+        for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
+                if (strncmp(nvram.name, bcm963xx_boards[i]->name,
+                            sizeof(nvram.name)))
+                        continue;
+                /* copy, board desc array is marked initdata */
+                memcpy(&board, bcm963xx_boards[i], sizeof(board));
+                break;
+        }
+
+        /* bail out if board is not found, will complain later */
+        if (!board.name[0]) {
+                char name[17];
+                memcpy(name, nvram.name, 16);
+                name[16] = 0;
+                printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
+                       name);
+                return;
+        }
+
+        /* setup pin multiplexing depending on board enabled device,
+         * this has to be done this early since PCI init is done
+         * inside arch_initcall */
+        val = 0;
+
+#ifdef CONFIG_PCI
+        if (board.has_pci) {
+                bcm63xx_pci_enabled = 1;
+                if (BCMCPU_IS_6348())
+                        val |= GPIO_MODE_6348_G2_PCI;
+        }
+#endif
+
+        if (board.has_pccard) {
+                if (BCMCPU_IS_6348())
+                        val |= GPIO_MODE_6348_G1_MII_PCCARD;
+        }
+
+        if (board.has_enet0 && !board.enet0.use_internal_phy) {
+                if (BCMCPU_IS_6348())
+                        val |= GPIO_MODE_6348_G3_EXT_MII |
+                                GPIO_MODE_6348_G0_EXT_MII;
+        }
+
+        if (board.has_enet1 && !board.enet1.use_internal_phy) {
+                if (BCMCPU_IS_6348())
+                        val |= GPIO_MODE_6348_G3_EXT_MII |
+                                GPIO_MODE_6348_G0_EXT_MII;
+        }
+
+        bcm_gpio_writel(val, GPIO_MODE_REG);
+}
+
+/*
+ * second stage init callback, good time to panic if we couldn't
+ * identify on which board we're running since early printk is working
+ */
+void __init board_setup(void)
+{
+        if (!board.name[0])
+                panic("unable to detect bcm963xx board");
+        printk(KERN_INFO PFX "board name: %s\n", board.name);
+
+        /* make sure we're running on expected cpu */
+        if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+                panic("unexpected CPU for bcm963xx board");
+}
+
+/*
+ * return board name for /proc/cpuinfo
+ */
+const char *board_get_name(void)
+{
+        return board.name;
+}
+
+/*
+ * register & return a new board mac address
+ */
+static int board_get_mac_address(u8 *mac)
+{
+        u8 *p;
+        int count;
+
+        if (mac_addr_used >= nvram.mac_addr_count) {
+                printk(KERN_ERR PFX "not enough mac address\n");
+                return -ENODEV;
+        }
+
+        memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
+        p = mac + ETH_ALEN - 1;
+        count = mac_addr_used;
+
+        while (count--) {
+                do {
+                        (*p)++;
+                        if (*p != 0)
+                                break;
+                        p--;
+                } while (p != mac);
+        }
+
+        if (p == mac) {
+                printk(KERN_ERR PFX "unable to fetch mac address\n");
+                return -ENODEV;
+        }
+
+        mac_addr_used++;
+        return 0;
+}
+
+static struct mtd_partition mtd_partitions[] = {
+        {
+                .name           = "cfe",
+                .offset         = 0x0,
+                .size           = 0x40000,
+        }
+};
+
+static struct physmap_flash_data flash_data = {
+        .width                  = 2,
+        .nr_parts               = ARRAY_SIZE(mtd_partitions),
+        .parts                  = mtd_partitions,
+};
+
+static struct resource mtd_resources[] = {
+        {
+                .start          = 0,    /* filled at runtime */
+                .end            = 0,    /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device mtd_dev = {
+        .name                   = "physmap-flash",
+        .resource               = mtd_resources,
+        .num_resources          = ARRAY_SIZE(mtd_resources),
+        .dev                    = {
+                .platform_data  = &flash_data,
+        },
+};
+
+/*
+ * Register a sane SPROMv2 to make the on-board
+ * bcm4318 WLAN work
+ */
+#ifdef CONFIG_SSB_PCIHOST
+static struct ssb_sprom bcm63xx_sprom = {
+        .revision               = 0x02,
+        .board_rev              = 0x17,
+        .country_code           = 0x0,
+        .ant_available_bg       = 0x3,
+        .pa0b0                  = 0x15ae,
+        .pa0b1                  = 0xfa85,
+        .pa0b2                  = 0xfe8d,
+        .pa1b0                  = 0xffff,
+        .pa1b1                  = 0xffff,
+        .pa1b2                  = 0xffff,
+        .gpio0                  = 0xff,
+        .gpio1                  = 0xff,
+        .gpio2                  = 0xff,
+        .gpio3                  = 0xff,
+        .maxpwr_bg              = 0x004c,
+        .itssi_bg               = 0x00,
+        .boardflags_lo          = 0x2848,
+        .boardflags_hi          = 0x0000,
+};
+#endif
+
+static struct gpio_led_platform_data bcm63xx_led_data;
+
+static struct platform_device bcm63xx_gpio_leds = {
+        .name                   = "leds-gpio",
+        .id                     = 0,
+        .dev.platform_data      = &bcm63xx_led_data,
+};
+
+/*
+ * third stage init callback, register all board devices.
+ */
+int __init board_register_devices(void)
+{
+        u32 val;
+
+        if (board.has_enet0 &&
+            !board_get_mac_address(board.enet0.mac_addr))
+                bcm63xx_enet_register(0, &board.enet0);
+
+        if (board.has_enet1 &&
+            !board_get_mac_address(board.enet1.mac_addr))
+                bcm63xx_enet_register(1, &board.enet1);
+
+        if (board.has_dsp)
+                bcm63xx_dsp_register(&board.dsp);
+
+        /* Generate MAC address for WLAN and
+         * register our SPROM */
+#ifdef CONFIG_SSB_PCIHOST
+        if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+                memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+                memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+                if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
+                        printk(KERN_ERR "failed to register fallback SPROM\n");
+        }
+#endif
+
+        /* read base address of boot chip select (0) */
+        if (BCMCPU_IS_6345())
+                val = 0x1fc00000;
+        else {
+                val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+                val &= MPI_CSBASE_BASE_MASK;
+        }
+        mtd_resources[0].start = val;
+        mtd_resources[0].end = 0x1FFFFFFF;
+
+        platform_device_register(&mtd_dev);
+
+        bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+        bcm63xx_led_data.leds = board.leds;
+
+        platform_device_register(&bcm63xx_gpio_leds);
+
+        return 0;
+}
+
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
new file mode 100644
index 000000000000..2c68ee9ccee2
--- /dev/null
+++ b/arch/mips/bcm63xx/clk.c
@@ -0,0 +1,226 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_clk.h>
+
+static DEFINE_MUTEX(clocks_mutex);
+
+
+static void clk_enable_unlocked(struct clk *clk)
+{
+        if (clk->set && (clk->usage++) == 0)
+                clk->set(clk, 1);
+}
+
+static void clk_disable_unlocked(struct clk *clk)
+{
+        if (clk->set && (--clk->usage) == 0)
+                clk->set(clk, 0);
+}
+
+static void bcm_hwclock_set(u32 mask, int enable)
+{
+        u32 reg;
+
+        reg = bcm_perf_readl(PERF_CKCTL_REG);
+        if (enable)
+                reg |= mask;
+        else
+                reg &= ~mask;
+        bcm_perf_writel(reg, PERF_CKCTL_REG);
+}
+
+/*
+ * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+ */
+static void enet_misc_set(struct clk *clk, int enable)
+{
+        u32 mask;
+
+        if (BCMCPU_IS_6338())
+                mask = CKCTL_6338_ENET_EN;
+        else if (BCMCPU_IS_6345())
+                mask = CKCTL_6345_ENET_EN;
+        else if (BCMCPU_IS_6348())
+                mask = CKCTL_6348_ENET_EN;
+        else
+                /* BCMCPU_IS_6358 */
+                mask = CKCTL_6358_EMUSB_EN;
+        bcm_hwclock_set(mask, enable);
+}
+
+static struct clk clk_enet_misc = {
+        .set    = enet_misc_set,
+};
+
+/*
+ * Ethernet MAC clocks: only revelant on 6358, silently enable misc
+ * clocks
+ */
+static void enetx_set(struct clk *clk, int enable)
+{
+        if (enable)
+                clk_enable_unlocked(&clk_enet_misc);
+        else
+                clk_disable_unlocked(&clk_enet_misc);
+
+        if (BCMCPU_IS_6358()) {
+                u32 mask;
+
+                if (clk->id == 0)
+                        mask = CKCTL_6358_ENET0_EN;
+                else
+                        mask = CKCTL_6358_ENET1_EN;
+                bcm_hwclock_set(mask, enable);
+        }
+}
+
+static struct clk clk_enet0 = {
+        .id     = 0,
+        .set    = enetx_set,
+};
+
+static struct clk clk_enet1 = {
+        .id     = 1,
+        .set    = enetx_set,
+};
+
+/*
+ * Ethernet PHY clock
+ */
+static void ephy_set(struct clk *clk, int enable)
+{
+        if (!BCMCPU_IS_6358())
+                return;
+        bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable);
+}
+
+
+static struct clk clk_ephy = {
+        .set    = ephy_set,
+};
+
+/*
+ * PCM clock
+ */
+static void pcm_set(struct clk *clk, int enable)
+{
+        if (!BCMCPU_IS_6358())
+                return;
+        bcm_hwclock_set(CKCTL_6358_PCM_EN, enable);
+}
+
+static struct clk clk_pcm = {
+        .set    = pcm_set,
+};
+
+/*
+ * USB host clock
+ */
+static void usbh_set(struct clk *clk, int enable)
+{
+        if (!BCMCPU_IS_6348())
+                return;
+        bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
+}
+
+static struct clk clk_usbh = {
+        .set    = usbh_set,
+};
+
+/*
+ * SPI clock
+ */
+static void spi_set(struct clk *clk, int enable)
+{
+        u32 mask;
+
+        if (BCMCPU_IS_6338())
+                mask = CKCTL_6338_SPI_EN;
+        else if (BCMCPU_IS_6348())
+                mask = CKCTL_6348_SPI_EN;
+        else
+                /* BCMCPU_IS_6358 */
+                mask = CKCTL_6358_SPI_EN;
+        bcm_hwclock_set(mask, enable);
+}
+
+static struct clk clk_spi = {
+        .set    = spi_set,
+};
+
+/*
+ * Internal peripheral clock
+ */
+static struct clk clk_periph = {
+        .rate   = (50 * 1000 * 1000),
+};
+
+
+/*
+ * Linux clock API implementation
+ */
+int clk_enable(struct clk *clk)
+{
+        mutex_lock(&clocks_mutex);
+        clk_enable_unlocked(clk);
+        mutex_unlock(&clocks_mutex);
+        return 0;
+}
+
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+        mutex_lock(&clocks_mutex);
+        clk_disable_unlocked(clk);
+        mutex_unlock(&clocks_mutex);
+}
+
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        return clk->rate;
+}
+
+EXPORT_SYMBOL(clk_get_rate);
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        if (!strcmp(id, "enet0"))
+                return &clk_enet0;
+        if (!strcmp(id, "enet1"))
+                return &clk_enet1;
+        if (!strcmp(id, "ephy"))
+                return &clk_ephy;
+        if (!strcmp(id, "usbh"))
+                return &clk_usbh;
+        if (!strcmp(id, "spi"))
+                return &clk_spi;
+        if (!strcmp(id, "periph"))
+                return &clk_periph;
+        if (BCMCPU_IS_6358() && !strcmp(id, "pcm"))
+                return &clk_pcm;
+        return ERR_PTR(-ENOENT);
+}
+
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+}
+
+EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c
new file mode 100644
index 000000000000..6dc43f0483e8
--- /dev/null
+++ b/arch/mips/bcm63xx/cpu.c
@@ -0,0 +1,345 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/cpu.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_irq.h>
+
+const unsigned long *bcm63xx_regs_base;
+EXPORT_SYMBOL(bcm63xx_regs_base);
+
+const int *bcm63xx_irqs;
+EXPORT_SYMBOL(bcm63xx_irqs);
+
+static u16 bcm63xx_cpu_id;
+static u16 bcm63xx_cpu_rev;
+static unsigned int bcm63xx_cpu_freq;
+static unsigned int bcm63xx_memory_size;
+
+/*
+ * 6338 register sets and irqs
+ */
+static const unsigned long bcm96338_regs_base[] = {
+        [RSET_DSL_LMEM]         = BCM_6338_DSL_LMEM_BASE,
+        [RSET_PERF]             = BCM_6338_PERF_BASE,
+        [RSET_TIMER]            = BCM_6338_TIMER_BASE,
+        [RSET_WDT]              = BCM_6338_WDT_BASE,
+        [RSET_UART0]            = BCM_6338_UART0_BASE,
+        [RSET_GPIO]             = BCM_6338_GPIO_BASE,
+        [RSET_SPI]              = BCM_6338_SPI_BASE,
+        [RSET_OHCI0]            = BCM_6338_OHCI0_BASE,
+        [RSET_OHCI_PRIV]        = BCM_6338_OHCI_PRIV_BASE,
+        [RSET_USBH_PRIV]        = BCM_6338_USBH_PRIV_BASE,
+        [RSET_UDC0]             = BCM_6338_UDC0_BASE,
+        [RSET_MPI]              = BCM_6338_MPI_BASE,
+        [RSET_PCMCIA]           = BCM_6338_PCMCIA_BASE,
+        [RSET_SDRAM]            = BCM_6338_SDRAM_BASE,
+        [RSET_DSL]              = BCM_6338_DSL_BASE,
+        [RSET_ENET0]            = BCM_6338_ENET0_BASE,
+        [RSET_ENET1]            = BCM_6338_ENET1_BASE,
+        [RSET_ENETDMA]          = BCM_6338_ENETDMA_BASE,
+        [RSET_MEMC]             = BCM_6338_MEMC_BASE,
+        [RSET_DDR]              = BCM_6338_DDR_BASE,
+};
+
+static const int bcm96338_irqs[] = {
+        [IRQ_TIMER]             = BCM_6338_TIMER_IRQ,
+        [IRQ_UART0]             = BCM_6338_UART0_IRQ,
+        [IRQ_DSL]               = BCM_6338_DSL_IRQ,
+        [IRQ_ENET0]             = BCM_6338_ENET0_IRQ,
+        [IRQ_ENET_PHY]          = BCM_6338_ENET_PHY_IRQ,
+        [IRQ_ENET0_RXDMA]       = BCM_6338_ENET0_RXDMA_IRQ,
+        [IRQ_ENET0_TXDMA]       = BCM_6338_ENET0_TXDMA_IRQ,
+};
+
+/*
+ * 6345 register sets and irqs
+ */
+static const unsigned long bcm96345_regs_base[] = {
+        [RSET_DSL_LMEM]         = BCM_6345_DSL_LMEM_BASE,
+        [RSET_PERF]             = BCM_6345_PERF_BASE,
+        [RSET_TIMER]            = BCM_6345_TIMER_BASE,
+        [RSET_WDT]              = BCM_6345_WDT_BASE,
+        [RSET_UART0]            = BCM_6345_UART0_BASE,
+        [RSET_GPIO]             = BCM_6345_GPIO_BASE,
+        [RSET_SPI]              = BCM_6345_SPI_BASE,
+        [RSET_UDC0]             = BCM_6345_UDC0_BASE,
+        [RSET_OHCI0]            = BCM_6345_OHCI0_BASE,
+        [RSET_OHCI_PRIV]        = BCM_6345_OHCI_PRIV_BASE,
+        [RSET_USBH_PRIV]        = BCM_6345_USBH_PRIV_BASE,
+        [RSET_MPI]              = BCM_6345_MPI_BASE,
+        [RSET_PCMCIA]           = BCM_6345_PCMCIA_BASE,
+        [RSET_DSL]              = BCM_6345_DSL_BASE,
+        [RSET_ENET0]            = BCM_6345_ENET0_BASE,
+        [RSET_ENET1]            = BCM_6345_ENET1_BASE,
+        [RSET_ENETDMA]          = BCM_6345_ENETDMA_BASE,
+        [RSET_EHCI0]            = BCM_6345_EHCI0_BASE,
+        [RSET_SDRAM]            = BCM_6345_SDRAM_BASE,
+        [RSET_MEMC]             = BCM_6345_MEMC_BASE,
+        [RSET_DDR]              = BCM_6345_DDR_BASE,
+};
+
+static const int bcm96345_irqs[] = {
+        [IRQ_TIMER]             = BCM_6345_TIMER_IRQ,
+        [IRQ_UART0]             = BCM_6345_UART0_IRQ,
+        [IRQ_DSL]               = BCM_6345_DSL_IRQ,
+        [IRQ_ENET0]             = BCM_6345_ENET0_IRQ,
+        [IRQ_ENET_PHY]          = BCM_6345_ENET_PHY_IRQ,
+        [IRQ_ENET0_RXDMA]       = BCM_6345_ENET0_RXDMA_IRQ,
+        [IRQ_ENET0_TXDMA]       = BCM_6345_ENET0_TXDMA_IRQ,
+};
+
+/*
+ * 6348 register sets and irqs
+ */
+static const unsigned long bcm96348_regs_base[] = {
+        [RSET_DSL_LMEM]         = BCM_6348_DSL_LMEM_BASE,
+        [RSET_PERF]             = BCM_6348_PERF_BASE,
+        [RSET_TIMER]            = BCM_6348_TIMER_BASE,
+        [RSET_WDT]              = BCM_6348_WDT_BASE,
+        [RSET_UART0]            = BCM_6348_UART0_BASE,
+        [RSET_GPIO]             = BCM_6348_GPIO_BASE,
+        [RSET_SPI]              = BCM_6348_SPI_BASE,
+        [RSET_OHCI0]            = BCM_6348_OHCI0_BASE,
+        [RSET_OHCI_PRIV]        = BCM_6348_OHCI_PRIV_BASE,
+        [RSET_USBH_PRIV]        = BCM_6348_USBH_PRIV_BASE,
+        [RSET_MPI]              = BCM_6348_MPI_BASE,
+        [RSET_PCMCIA]           = BCM_6348_PCMCIA_BASE,
+        [RSET_SDRAM]            = BCM_6348_SDRAM_BASE,
+        [RSET_DSL]              = BCM_6348_DSL_BASE,
+        [RSET_ENET0]            = BCM_6348_ENET0_BASE,
+        [RSET_ENET1]            = BCM_6348_ENET1_BASE,
+        [RSET_ENETDMA]          = BCM_6348_ENETDMA_BASE,
+        [RSET_MEMC]             = BCM_6348_MEMC_BASE,
+        [RSET_DDR]              = BCM_6348_DDR_BASE,
+};
+
+static const int bcm96348_irqs[] = {
+        [IRQ_TIMER]             = BCM_6348_TIMER_IRQ,
+        [IRQ_UART0]             = BCM_6348_UART0_IRQ,
+        [IRQ_DSL]               = BCM_6348_DSL_IRQ,
+        [IRQ_ENET0]             = BCM_6348_ENET0_IRQ,
+        [IRQ_ENET1]             = BCM_6348_ENET1_IRQ,
+        [IRQ_ENET_PHY]          = BCM_6348_ENET_PHY_IRQ,
+        [IRQ_OHCI0]             = BCM_6348_OHCI0_IRQ,
+        [IRQ_PCMCIA]            = BCM_6348_PCMCIA_IRQ,
+        [IRQ_ENET0_RXDMA]       = BCM_6348_ENET0_RXDMA_IRQ,
+        [IRQ_ENET0_TXDMA]       = BCM_6348_ENET0_TXDMA_IRQ,
+        [IRQ_ENET1_RXDMA]       = BCM_6348_ENET1_RXDMA_IRQ,
+        [IRQ_ENET1_TXDMA]       = BCM_6348_ENET1_TXDMA_IRQ,
+        [IRQ_PCI]               = BCM_6348_PCI_IRQ,
+};
+
+/*
+ * 6358 register sets and irqs
+ */
+static const unsigned long bcm96358_regs_base[] = {
+        [RSET_DSL_LMEM]         = BCM_6358_DSL_LMEM_BASE,
+        [RSET_PERF]             = BCM_6358_PERF_BASE,
+        [RSET_TIMER]            = BCM_6358_TIMER_BASE,
+        [RSET_WDT]              = BCM_6358_WDT_BASE,
+        [RSET_UART0]            = BCM_6358_UART0_BASE,
+        [RSET_GPIO]             = BCM_6358_GPIO_BASE,
+        [RSET_SPI]              = BCM_6358_SPI_BASE,
+        [RSET_OHCI0]            = BCM_6358_OHCI0_BASE,
+        [RSET_EHCI0]            = BCM_6358_EHCI0_BASE,
+        [RSET_OHCI_PRIV]        = BCM_6358_OHCI_PRIV_BASE,
+        [RSET_USBH_PRIV]        = BCM_6358_USBH_PRIV_BASE,
+        [RSET_MPI]              = BCM_6358_MPI_BASE,
+        [RSET_PCMCIA]           = BCM_6358_PCMCIA_BASE,
+        [RSET_SDRAM]            = BCM_6358_SDRAM_BASE,
+        [RSET_DSL]              = BCM_6358_DSL_BASE,
+        [RSET_ENET0]            = BCM_6358_ENET0_BASE,
+        [RSET_ENET1]            = BCM_6358_ENET1_BASE,
+        [RSET_ENETDMA]          = BCM_6358_ENETDMA_BASE,
+        [RSET_MEMC]             = BCM_6358_MEMC_BASE,
+        [RSET_DDR]              = BCM_6358_DDR_BASE,
+};
+
+static const int bcm96358_irqs[] = {
+        [IRQ_TIMER]             = BCM_6358_TIMER_IRQ,
+        [IRQ_UART0]             = BCM_6358_UART0_IRQ,
+        [IRQ_DSL]               = BCM_6358_DSL_IRQ,
+        [IRQ_ENET0]             = BCM_6358_ENET0_IRQ,
+        [IRQ_ENET1]             = BCM_6358_ENET1_IRQ,
+        [IRQ_ENET_PHY]          = BCM_6358_ENET_PHY_IRQ,
+        [IRQ_OHCI0]             = BCM_6358_OHCI0_IRQ,
+        [IRQ_EHCI0]             = BCM_6358_EHCI0_IRQ,
+        [IRQ_PCMCIA]            = BCM_6358_PCMCIA_IRQ,
+        [IRQ_ENET0_RXDMA]       = BCM_6358_ENET0_RXDMA_IRQ,
+        [IRQ_ENET0_TXDMA]       = BCM_6358_ENET0_TXDMA_IRQ,
+        [IRQ_ENET1_RXDMA]       = BCM_6358_ENET1_RXDMA_IRQ,
+        [IRQ_ENET1_TXDMA]       = BCM_6358_ENET1_TXDMA_IRQ,
+        [IRQ_PCI]               = BCM_6358_PCI_IRQ,
+};
+
+u16 __bcm63xx_get_cpu_id(void)
+{
+        return bcm63xx_cpu_id;
+}
+
+EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
+
+u16 bcm63xx_get_cpu_rev(void)
+{
+        return bcm63xx_cpu_rev;
+}
+
+EXPORT_SYMBOL(bcm63xx_get_cpu_rev);
+
+unsigned int bcm63xx_get_cpu_freq(void)
+{
+        return bcm63xx_cpu_freq;
+}
+
+unsigned int bcm63xx_get_memory_size(void)
+{
+        return bcm63xx_memory_size;
+}
+
+static unsigned int detect_cpu_clock(void)
+{
+        unsigned int tmp, n1 = 0, n2 = 0, m1 = 0;
+
+        /* BCM6338 has a fixed 240 Mhz frequency */
+        if (BCMCPU_IS_6338())
+                return 240000000;
+
+        /* BCM6345 has a fixed 140Mhz frequency */
+        if (BCMCPU_IS_6345())
+                return 140000000;
+
+        /*
+         * frequency depends on PLL configuration:
+         */
+        if (BCMCPU_IS_6348()) {
+                /* 16MHz * (N1 + 1) * (N2 + 2) / (M1_CPU + 1) */
+                tmp = bcm_perf_readl(PERF_MIPSPLLCTL_REG);
+                n1 = (tmp & MIPSPLLCTL_N1_MASK) >> MIPSPLLCTL_N1_SHIFT;
+                n2 = (tmp & MIPSPLLCTL_N2_MASK) >> MIPSPLLCTL_N2_SHIFT;
+                m1 = (tmp & MIPSPLLCTL_M1CPU_MASK) >> MIPSPLLCTL_M1CPU_SHIFT;
+                n1 += 1;
+                n2 += 2;
+                m1 += 1;
+        }
+
+        if (BCMCPU_IS_6358()) {
+                /* 16MHz * N1 * N2 / M1_CPU */
+                tmp = bcm_ddr_readl(DDR_DMIPSPLLCFG_REG);
+                n1 = (tmp & DMIPSPLLCFG_N1_MASK) >> DMIPSPLLCFG_N1_SHIFT;
+                n2 = (tmp & DMIPSPLLCFG_N2_MASK) >> DMIPSPLLCFG_N2_SHIFT;
+                m1 = (tmp & DMIPSPLLCFG_M1_MASK) >> DMIPSPLLCFG_M1_SHIFT;
+        }
+
+        return (16 * 1000000 * n1 * n2) / m1;
+}
+
+/*
+ * attempt to detect the amount of memory installed
+ */
+static unsigned int detect_memory_size(void)
+{
+        unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+        u32 val;
+
+        if (BCMCPU_IS_6345())
+                return (8 * 1024 * 1024);
+
+        if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
+                val = bcm_sdram_readl(SDRAM_CFG_REG);
+                rows = (val & SDRAM_CFG_ROW_MASK) >> SDRAM_CFG_ROW_SHIFT;
+                cols = (val & SDRAM_CFG_COL_MASK) >> SDRAM_CFG_COL_SHIFT;
+                is_32bits = (val & SDRAM_CFG_32B_MASK) ? 1 : 0;
+                banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1;
+        }
+
+        if (BCMCPU_IS_6358()) {
+                val = bcm_memc_readl(MEMC_CFG_REG);
+                rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT;
+                cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT;
+                is_32bits = (val & MEMC_CFG_32B_MASK) ? 0 : 1;
+                banks = 2;
+        }
+
+        /* 0 => 11 address bits ... 2 => 13 address bits */
+        rows += 11;
+
+        /* 0 => 8 address bits ... 2 => 10 address bits */
+        cols += 8;
+
+        return 1 << (cols + rows + (is_32bits + 1) + banks);
+}
+
+void __init bcm63xx_cpu_init(void)
+{
+        unsigned int tmp, expected_cpu_id;
+        struct cpuinfo_mips *c = &current_cpu_data;
+
+        /* soc registers location depends on cpu type */
+        expected_cpu_id = 0;
+
+        switch (c->cputype) {
+        /*
+         * BCM6338 as the same PrId as BCM3302 see arch/mips/kernel/cpu-probe.c
+         */
+        case CPU_BCM3302:
+                expected_cpu_id = BCM6338_CPU_ID;
+                bcm63xx_regs_base = bcm96338_regs_base;
+                bcm63xx_irqs = bcm96338_irqs;
+                break;
+        case CPU_BCM6345:
+                expected_cpu_id = BCM6345_CPU_ID;
+                bcm63xx_regs_base = bcm96345_regs_base;
+                bcm63xx_irqs = bcm96345_irqs;
+                break;
+        case CPU_BCM6348:
+                expected_cpu_id = BCM6348_CPU_ID;
+                bcm63xx_regs_base = bcm96348_regs_base;
+                bcm63xx_irqs = bcm96348_irqs;
+                break;
+        case CPU_BCM6358:
+                expected_cpu_id = BCM6358_CPU_ID;
+                bcm63xx_regs_base = bcm96358_regs_base;
+                bcm63xx_irqs = bcm96358_irqs;
+                break;
+        }
+
+        /*
+         * really early to panic, but delaying panic would not help since we
+         * will never get any working console
+         */
+        if (!expected_cpu_id)
+                panic("unsupported Broadcom CPU");
+
+        /*
+         * bcm63xx_regs_base is set, we can access soc registers
+         */
+
+        /* double check CPU type */
+        tmp = bcm_perf_readl(PERF_REV_REG);
+        bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+        bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+
+        if (bcm63xx_cpu_id != expected_cpu_id)
+                panic("bcm63xx CPU id mismatch");
+
+        bcm63xx_cpu_freq = detect_cpu_clock();
+        bcm63xx_memory_size = detect_memory_size();
+
+        printk(KERN_INFO "Detected Broadcom 0x%04x CPU revision %02x\n",
+               bcm63xx_cpu_id, bcm63xx_cpu_rev);
+        printk(KERN_INFO "CPU frequency is %u MHz\n",
+               bcm63xx_cpu_freq / 1000000);
+        printk(KERN_INFO "%uMB of RAM installed\n",
+               bcm63xx_memory_size >> 20);
+}
diff --git a/arch/mips/bcm63xx/cs.c b/arch/mips/bcm63xx/cs.c
new file mode 100644
index 000000000000..50d8190bbf7b
--- /dev/null
+++ b/arch/mips/bcm63xx/cs.c
@@ -0,0 +1,144 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/log2.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_cs.h>
+
+static DEFINE_SPINLOCK(bcm63xx_cs_lock);
+
+/*
+ * check if given chip select exists
+ */
+static int is_valid_cs(unsigned int cs)
+{
+        if (cs > 6)
+                return 0;
+        return 1;
+}
+
+/*
+ * Configure chipselect base address and size (bytes).
+ * Size must be a power of two between 8k and 256M.
+ */
+int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size)
+{
+        unsigned long flags;
+        u32 val;
+
+        if (!is_valid_cs(cs))
+                return -EINVAL;
+
+        /* sanity check on size */
+        if (size != roundup_pow_of_two(size))
+                return -EINVAL;
+
+        if (size < 8 * 1024 || size > 256 * 1024 * 1024)
+                return -EINVAL;
+
+        val = (base & MPI_CSBASE_BASE_MASK);
+        /* 8k => 0 - 256M => 15 */
+        val |= (ilog2(size) - ilog2(8 * 1024)) << MPI_CSBASE_SIZE_SHIFT;
+
+        spin_lock_irqsave(&bcm63xx_cs_lock, flags);
+        bcm_mpi_writel(val, MPI_CSBASE_REG(cs));
+        spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
+
+        return 0;
+}
+
+EXPORT_SYMBOL(bcm63xx_set_cs_base);
+
+/*
+ * configure chipselect timing (ns)
+ */
+int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait,
+                           unsigned int setup, unsigned int hold)
+{
+        unsigned long flags;
+        u32 val;
+
+        if (!is_valid_cs(cs))
+                return -EINVAL;
+
+        spin_lock_irqsave(&bcm63xx_cs_lock, flags);
+        val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
+        val &= ~(MPI_CSCTL_WAIT_MASK);
+        val &= ~(MPI_CSCTL_SETUP_MASK);
+        val &= ~(MPI_CSCTL_HOLD_MASK);
+        val |= wait << MPI_CSCTL_WAIT_SHIFT;
+        val |= setup << MPI_CSCTL_SETUP_SHIFT;
+        val |= hold << MPI_CSCTL_HOLD_SHIFT;
+        bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
+        spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
+
+        return 0;
+}
+
+EXPORT_SYMBOL(bcm63xx_set_cs_timing);
+
+/*
+ * configure other chipselect parameter (data bus size, ...)
+ */
+int bcm63xx_set_cs_param(unsigned int cs, u32 params)
+{
+        unsigned long flags;
+        u32 val;
+
+        if (!is_valid_cs(cs))
+                return -EINVAL;
+
+        /* none of this fields apply to pcmcia */
+        if (cs == MPI_CS_PCMCIA_COMMON ||
+            cs == MPI_CS_PCMCIA_ATTR ||
+            cs == MPI_CS_PCMCIA_IO)
+                return -EINVAL;
+
+        spin_lock_irqsave(&bcm63xx_cs_lock, flags);
+        val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
+        val &= ~(MPI_CSCTL_DATA16_MASK);
+        val &= ~(MPI_CSCTL_SYNCMODE_MASK);
+        val &= ~(MPI_CSCTL_TSIZE_MASK);
+        val &= ~(MPI_CSCTL_ENDIANSWAP_MASK);
+        val |= params;
+        bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
+        spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
+
+        return 0;
+}
+
+EXPORT_SYMBOL(bcm63xx_set_cs_param);
+
+/*
+ * set cs status (enable/disable)
+ */
+int bcm63xx_set_cs_status(unsigned int cs, int enable)
+{
+        unsigned long flags;
+        u32 val;
+
+        if (!is_valid_cs(cs))
+                return -EINVAL;
+
+        spin_lock_irqsave(&bcm63xx_cs_lock, flags);
+        val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
+        if (enable)
+                val |= MPI_CSCTL_ENABLE_MASK;
+        else
+                val &= ~MPI_CSCTL_ENABLE_MASK;
+        bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
+        spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
+        return 0;
+}
+
+EXPORT_SYMBOL(bcm63xx_set_cs_status);
diff --git a/arch/mips/bcm63xx/dev-dsp.c b/arch/mips/bcm63xx/dev-dsp.c
new file mode 100644
index 000000000000..da46d1d3c77c
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-dsp.c
@@ -0,0 +1,56 @@
+/*
+ * Broadcom BCM63xx VoIP DSP registration
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_dev_dsp.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_io.h>
+
+static struct resource voip_dsp_resources[] = {
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bcm63xx_voip_dsp_device = {
+        .name           = "bcm63xx-voip-dsp",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(voip_dsp_resources),
+        .resource       = voip_dsp_resources,
+};
+
+int __init bcm63xx_dsp_register(const struct bcm63xx_dsp_platform_data *pd)
+{
+        struct bcm63xx_dsp_platform_data *dpd;
+        u32 val;
+
+        /* Get the memory window */
+        val = bcm_mpi_readl(MPI_CSBASE_REG(pd->cs - 1));
+        val &= MPI_CSBASE_BASE_MASK;
+        voip_dsp_resources[0].start = val;
+        voip_dsp_resources[0].end = val + 0xFFFFFFF;
+        voip_dsp_resources[1].start = pd->ext_irq;
+
+        /* copy given platform data */
+        dpd = bcm63xx_voip_dsp_device.dev.platform_data;
+        memcpy(dpd, pd, sizeof (*pd));
+
+        return platform_device_register(&bcm63xx_voip_dsp_device);
+}
diff --git a/arch/mips/bcm63xx/dev-enet.c b/arch/mips/bcm63xx/dev-enet.c
new file mode 100644
index 000000000000..9f544badd0b4
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-enet.c
@@ -0,0 +1,159 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <bcm63xx_dev_enet.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+
+static struct resource shared_res[] = {
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device bcm63xx_enet_shared_device = {
+        .name           = "bcm63xx_enet_shared",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(shared_res),
+        .resource       = shared_res,
+};
+
+static int shared_device_registered;
+
+static struct resource enet0_res[] = {
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct bcm63xx_enet_platform_data enet0_pd;
+
+static struct platform_device bcm63xx_enet0_device = {
+        .name           = "bcm63xx_enet",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(enet0_res),
+        .resource       = enet0_res,
+        .dev            = {
+                .platform_data = &enet0_pd,
+        },
+};
+
+static struct resource enet1_res[] = {
+        {
+                .start          = -1, /* filled at runtime */
+                .end            = -1, /* filled at runtime */
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = -1, /* filled at runtime */
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct bcm63xx_enet_platform_data enet1_pd;
+
+static struct platform_device bcm63xx_enet1_device = {
+        .name           = "bcm63xx_enet",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(enet1_res),
+        .resource       = enet1_res,
+        .dev            = {
+                .platform_data = &enet1_pd,
+        },
+};
+
+int __init bcm63xx_enet_register(int unit,
+                                 const struct bcm63xx_enet_platform_data *pd)
+{
+        struct platform_device *pdev;
+        struct bcm63xx_enet_platform_data *dpd;
+        int ret;
+
+        if (unit > 1)
+                return -ENODEV;
+
+        if (!shared_device_registered) {
+                shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
+                shared_res[0].end = shared_res[0].start;
+                if (BCMCPU_IS_6338())
+                        shared_res[0].end += (RSET_ENETDMA_SIZE / 2)  - 1;
+                else
+                        shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
+
+                ret = platform_device_register(&bcm63xx_enet_shared_device);
+                if (ret)
+                        return ret;
+                shared_device_registered = 1;
+        }
+
+        if (unit == 0) {
+                enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
+                enet0_res[0].end = enet0_res[0].start;
+                enet0_res[0].end += RSET_ENET_SIZE - 1;
+                enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0);
+                enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA);
+                enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA);
+                pdev = &bcm63xx_enet0_device;
+        } else {
+                enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1);
+                enet1_res[0].end = enet1_res[0].start;
+                enet1_res[0].end += RSET_ENET_SIZE - 1;
+                enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1);
+                enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA);
+                enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA);
+                pdev = &bcm63xx_enet1_device;
+        }
+
+        /* copy given platform data */
+        dpd = pdev->dev.platform_data;
+        memcpy(dpd, pd, sizeof(*pd));
+
+        /* adjust them in case internal phy is used */
+        if (dpd->use_internal_phy) {
+
+                /* internal phy only exists for enet0 */
+                if (unit == 1)
+                        return -ENODEV;
+
+                dpd->phy_id = 1;
+                dpd->has_phy_interrupt = 1;
+                dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
+        }
+
+        ret = platform_device_register(pdev);
+        if (ret)
+                return ret;
+        return 0;
+}
diff --git a/arch/mips/bcm63xx/early_printk.c b/arch/mips/bcm63xx/early_printk.c
new file mode 100644
index 000000000000..bf353c937df2
--- /dev/null
+++ b/arch/mips/bcm63xx/early_printk.c
@@ -0,0 +1,30 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/init.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+
+static void __init wait_xfered(void)
+{
+        unsigned int val;
+
+        /* wait for any previous char to be transmitted */
+        do {
+                val = bcm_uart0_readl(UART_IR_REG);
+                if (val & UART_IR_STAT(UART_IR_TXEMPTY))
+                        break;
+        } while (1);
+}
+
+void __init prom_putchar(char c)
+{
+        wait_xfered();
+        bcm_uart0_writel(c, UART_FIFO_REG);
+        wait_xfered();
+}
diff --git a/arch/mips/bcm63xx/gpio.c b/arch/mips/bcm63xx/gpio.c
new file mode 100644
index 000000000000..87ca39046334
--- /dev/null
+++ b/arch/mips/bcm63xx/gpio.c
@@ -0,0 +1,134 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_gpio.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+
+static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
+static u32 gpio_out_low, gpio_out_high;
+
+static void bcm63xx_gpio_set(struct gpio_chip *chip,
+                             unsigned gpio, int val)
+{
+        u32 reg;
+        u32 mask;
+        u32 *v;
+        unsigned long flags;
+
+        if (gpio >= chip->ngpio)
+                BUG();
+
+        if (gpio < 32) {
+                reg = GPIO_DATA_LO_REG;
+                mask = 1 << gpio;
+                v = &gpio_out_low;
+        } else {
+                reg = GPIO_DATA_HI_REG;
+                mask = 1 << (gpio - 32);
+                v = &gpio_out_high;
+        }
+
+        spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+        if (val)
+                *v |= mask;
+        else
+                *v &= ~mask;
+        bcm_gpio_writel(*v, reg);
+        spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
+}
+
+static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
+{
+        u32 reg;
+        u32 mask;
+
+        if (gpio >= chip->ngpio)
+                BUG();
+
+        if (gpio < 32) {
+                reg = GPIO_DATA_LO_REG;
+                mask = 1 << gpio;
+        } else {
+                reg = GPIO_DATA_HI_REG;
+                mask = 1 << (gpio - 32);
+        }
+
+        return !!(bcm_gpio_readl(reg) & mask);
+}
+
+static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
+                                      unsigned gpio, int dir)
+{
+        u32 reg;
+        u32 mask;
+        u32 tmp;
+        unsigned long flags;
+
+        if (gpio >= chip->ngpio)
+                BUG();
+
+        if (gpio < 32) {
+                reg = GPIO_CTL_LO_REG;
+                mask = 1 << gpio;
+        } else {
+                reg = GPIO_CTL_HI_REG;
+                mask = 1 << (gpio - 32);
+        }
+
+        spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+        tmp = bcm_gpio_readl(reg);
+        if (dir == GPIO_DIR_IN)
+                tmp &= ~mask;
+        else
+                tmp |= mask;
+        bcm_gpio_writel(tmp, reg);
+        spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
+
+        return 0;
+}
+
+static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
+{
+        return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_IN);
+}
+
+static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
+                                         unsigned gpio, int value)
+{
+        bcm63xx_gpio_set(chip, gpio, value);
+        return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_OUT);
+}
+
+
+static struct gpio_chip bcm63xx_gpio_chip = {
+        .label                  = "bcm63xx-gpio",
+        .direction_input        = bcm63xx_gpio_direction_input,
+        .direction_output       = bcm63xx_gpio_direction_output,
+        .get                    = bcm63xx_gpio_get,
+        .set                    = bcm63xx_gpio_set,
+        .base                   = 0,
+};
+
+int __init bcm63xx_gpio_init(void)
+{
+        bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
+        pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
+
+        return gpiochip_add(&bcm63xx_gpio_chip);
+}
+
+arch_initcall(bcm63xx_gpio_init);
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
new file mode 100644
index 000000000000..a0c5cd18c192
--- /dev/null
+++ b/arch/mips/bcm63xx/irq.c
@@ -0,0 +1,253 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_irq.h>
+
+/*
+ * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
+ * prioritize any interrupt relatively to another. the static counter
+ * will resume the loop where it ended the last time we left this
+ * function.
+ */
+static void bcm63xx_irq_dispatch_internal(void)
+{
+        u32 pending;
+        static int i;
+
+        pending = bcm_perf_readl(PERF_IRQMASK_REG) &
+                bcm_perf_readl(PERF_IRQSTAT_REG);
+
+        if (!pending)
+                return ;
+
+        while (1) {
+                int to_call = i;
+
+                i = (i + 1) & 0x1f;
+                if (pending & (1 << to_call)) {
+                        do_IRQ(to_call + IRQ_INTERNAL_BASE);
+                        break;
+                }
+        }
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+        u32 cause;
+
+        do {
+                cause = read_c0_cause() & read_c0_status() & ST0_IM;
+
+                if (!cause)
+                        break;
+
+                if (cause & CAUSEF_IP7)
+                        do_IRQ(7);
+                if (cause & CAUSEF_IP2)
+                        bcm63xx_irq_dispatch_internal();
+                if (cause & CAUSEF_IP3)
+                        do_IRQ(IRQ_EXT_0);
+                if (cause & CAUSEF_IP4)
+                        do_IRQ(IRQ_EXT_1);
+                if (cause & CAUSEF_IP5)
+                        do_IRQ(IRQ_EXT_2);
+                if (cause & CAUSEF_IP6)
+                        do_IRQ(IRQ_EXT_3);
+        } while (1);
+}
+
+/*
+ * internal IRQs operations: only mask/unmask on PERF irq mask
+ * register.
+ */
+static inline void bcm63xx_internal_irq_mask(unsigned int irq)
+{
+        u32 mask;
+
+        irq -= IRQ_INTERNAL_BASE;
+        mask = bcm_perf_readl(PERF_IRQMASK_REG);
+        mask &= ~(1 << irq);
+        bcm_perf_writel(mask, PERF_IRQMASK_REG);
+}
+
+static void bcm63xx_internal_irq_unmask(unsigned int irq)
+{
+        u32 mask;
+
+        irq -= IRQ_INTERNAL_BASE;
+        mask = bcm_perf_readl(PERF_IRQMASK_REG);
+        mask |= (1 << irq);
+        bcm_perf_writel(mask, PERF_IRQMASK_REG);
+}
+
+static unsigned int bcm63xx_internal_irq_startup(unsigned int irq)
+{
+        bcm63xx_internal_irq_unmask(irq);
+        return 0;
+}
+
+/*
+ * external IRQs operations: mask/unmask and clear on PERF external
+ * irq control register.
+ */
+static void bcm63xx_external_irq_mask(unsigned int irq)
+{
+        u32 reg;
+
+        irq -= IRQ_EXT_BASE;
+        reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
+        reg &= ~EXTIRQ_CFG_MASK(irq);
+        bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
+}
+
+static void bcm63xx_external_irq_unmask(unsigned int irq)
+{
+        u32 reg;
+
+        irq -= IRQ_EXT_BASE;
+        reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
+        reg |= EXTIRQ_CFG_MASK(irq);
+        bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
+}
+
+static void bcm63xx_external_irq_clear(unsigned int irq)
+{
+        u32 reg;
+
+        irq -= IRQ_EXT_BASE;
+        reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
+        reg |= EXTIRQ_CFG_CLEAR(irq);
+        bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
+}
+
+static unsigned int bcm63xx_external_irq_startup(unsigned int irq)
+{
+        set_c0_status(0x100 << (irq - IRQ_MIPS_BASE));
+        irq_enable_hazard();
+        bcm63xx_external_irq_unmask(irq);
+        return 0;
+}
+
+static void bcm63xx_external_irq_shutdown(unsigned int irq)
+{
+        bcm63xx_external_irq_mask(irq);
+        clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE));
+        irq_disable_hazard();
+}
+
+static int bcm63xx_external_irq_set_type(unsigned int irq,
+                                         unsigned int flow_type)
+{
+        u32 reg;
+        struct irq_desc *desc = irq_desc + irq;
+
+        irq -= IRQ_EXT_BASE;
+
+        flow_type &= IRQ_TYPE_SENSE_MASK;
+
+        if (flow_type == IRQ_TYPE_NONE)
+                flow_type = IRQ_TYPE_LEVEL_LOW;
+
+        reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
+        switch (flow_type) {
+        case IRQ_TYPE_EDGE_BOTH:
+                reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
+                reg |= EXTIRQ_CFG_BOTHEDGE(irq);
+                break;
+
+        case IRQ_TYPE_EDGE_RISING:
+                reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
+                reg |= EXTIRQ_CFG_SENSE(irq);
+                reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+                break;
+
+        case IRQ_TYPE_EDGE_FALLING:
+                reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
+                reg &= ~EXTIRQ_CFG_SENSE(irq);
+                reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+                break;
+
+        case IRQ_TYPE_LEVEL_HIGH:
+                reg |= EXTIRQ_CFG_LEVELSENSE(irq);
+                reg |= EXTIRQ_CFG_SENSE(irq);
+                break;
+
+        case IRQ_TYPE_LEVEL_LOW:
+                reg |= EXTIRQ_CFG_LEVELSENSE(irq);
+                reg &= ~EXTIRQ_CFG_SENSE(irq);
+                break;
+
+        default:
+                printk(KERN_ERR "bogus flow type combination given !\n");
+                return -EINVAL;
+        }
+        bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
+
+        if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))  {
+                desc->status |= IRQ_LEVEL;
+                desc->handle_irq = handle_level_irq;
+        } else {
+                desc->handle_irq = handle_edge_irq;
+        }
+
+        return 0;
+}
+
+static struct irq_chip bcm63xx_internal_irq_chip = {
+        .name           = "bcm63xx_ipic",
+        .startup        = bcm63xx_internal_irq_startup,
+        .shutdown       = bcm63xx_internal_irq_mask,
+
+        .mask           = bcm63xx_internal_irq_mask,
+        .mask_ack       = bcm63xx_internal_irq_mask,
+        .unmask         = bcm63xx_internal_irq_unmask,
+};
+
+static struct irq_chip bcm63xx_external_irq_chip = {
+        .name           = "bcm63xx_epic",
+        .startup        = bcm63xx_external_irq_startup,
+        .shutdown       = bcm63xx_external_irq_shutdown,
+
+        .ack            = bcm63xx_external_irq_clear,
+
+        .mask           = bcm63xx_external_irq_mask,
+        .unmask         = bcm63xx_external_irq_unmask,
+
+        .set_type       = bcm63xx_external_irq_set_type,
+};
+
+static struct irqaction cpu_ip2_cascade_action = {
+        .handler        = no_action,
+        .name           = "cascade_ip2",
+};
+
+void __init arch_init_irq(void)
+{
+        int i;
+
+        mips_cpu_irq_init();
+        for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
+                set_irq_chip_and_handler(i, &bcm63xx_internal_irq_chip,
+                                         handle_level_irq);
+
+        for (i = IRQ_EXT_BASE; i < IRQ_EXT_BASE + 4; ++i)
+                set_irq_chip_and_handler(i, &bcm63xx_external_irq_chip,
+                                         handle_edge_irq);
+
+        setup_irq(IRQ_MIPS_BASE + 2, &cpu_ip2_cascade_action);
+}
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
new file mode 100644
index 000000000000..fb284fbc5853
--- /dev/null
+++ b/arch/mips/bcm63xx/prom.c
@@ -0,0 +1,55 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <asm/bootinfo.h>
+#include <bcm63xx_board.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_gpio.h>
+
+void __init prom_init(void)
+{
+        u32 reg, mask;
+
+        bcm63xx_cpu_init();
+
+        /* stop any running watchdog */
+        bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG);
+        bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
+
+        /* disable all hardware blocks clock for now */
+        if (BCMCPU_IS_6338())
+                mask = CKCTL_6338_ALL_SAFE_EN;
+        else if (BCMCPU_IS_6345())
+                mask = CKCTL_6345_ALL_SAFE_EN;
+        else if (BCMCPU_IS_6348())
+                mask = CKCTL_6348_ALL_SAFE_EN;
+        else
+                /* BCMCPU_IS_6358() */
+                mask = CKCTL_6358_ALL_SAFE_EN;
+
+        reg = bcm_perf_readl(PERF_CKCTL_REG);
+        reg &= ~mask;
+        bcm_perf_writel(reg, PERF_CKCTL_REG);
+
+        /* assign command line from kernel config */
+        strcpy(arcs_cmdline, CONFIG_CMDLINE);
+
+        /* register gpiochip */
+        bcm63xx_gpio_init();
+
+        /* do low level board init */
+        board_prom_init();
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
new file mode 100644
index 000000000000..b18a0ca926fa
--- /dev/null
+++ b/arch/mips/bcm63xx/setup.c
@@ -0,0 +1,125 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/bootmem.h>
+#include <linux/ioport.h>
+#include <linux/pm.h>
+#include <asm/bootinfo.h>
+#include <asm/time.h>
+#include <asm/reboot.h>
+#include <asm/cacheflush.h>
+#include <bcm63xx_board.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_io.h>
+
+void bcm63xx_machine_halt(void)
+{
+        printk(KERN_INFO "System halted\n");
+        while (1)
+                ;
+}
+
+static void bcm6348_a1_reboot(void)
+{
+        u32 reg;
+
+        /* soft reset all blocks */
+        printk(KERN_INFO "soft-reseting all blocks ...\n");
+        reg = bcm_perf_readl(PERF_SOFTRESET_REG);
+        reg &= ~SOFTRESET_6348_ALL;
+        bcm_perf_writel(reg, PERF_SOFTRESET_REG);
+        mdelay(10);
+
+        reg = bcm_perf_readl(PERF_SOFTRESET_REG);
+        reg |= SOFTRESET_6348_ALL;
+        bcm_perf_writel(reg, PERF_SOFTRESET_REG);
+        mdelay(10);
+
+        /* Jump to the power on address. */
+        printk(KERN_INFO "jumping to reset vector.\n");
+        /* set high vectors (base at 0xbfc00000 */
+        set_c0_status(ST0_BEV | ST0_ERL);
+        /* run uncached in kseg0 */
+        change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+        __flush_cache_all();
+        /* remove all wired TLB entries */
+        write_c0_wired(0);
+        __asm__ __volatile__(
+                "jr\t%0"
+                :
+                : "r" (0xbfc00000));
+        while (1)
+                ;
+}
+
+void bcm63xx_machine_reboot(void)
+{
+        u32 reg;
+
+        /* mask and clear all external irq */
+        reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG);
+        reg &= ~EXTIRQ_CFG_MASK_ALL;
+        reg |= EXTIRQ_CFG_CLEAR_ALL;
+        bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG);
+
+        if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
+                bcm6348_a1_reboot();
+
+        printk(KERN_INFO "triggering watchdog soft-reset...\n");
+        bcm_perf_writel(SYS_PLL_SOFT_RESET, PERF_SYS_PLL_CTL_REG);
+        while (1)
+                ;
+}
+
+static void __bcm63xx_machine_reboot(char *p)
+{
+        bcm63xx_machine_reboot();
+}
+
+/*
+ * return system type in /proc/cpuinfo
+ */
+const char *get_system_type(void)
+{
+        static char buf[128];
+        snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
+                 board_get_name(),
+                 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
+        return buf;
+}
+
+void __init plat_time_init(void)
+{
+        mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
+}
+
+void __init plat_mem_setup(void)
+{
+        add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
+
+        _machine_halt = bcm63xx_machine_halt;
+        _machine_restart = __bcm63xx_machine_reboot;
+        pm_power_off = bcm63xx_machine_halt;
+
+        set_io_port_base(0);
+        ioport_resource.start = 0;
+        ioport_resource.end = ~0;
+
+        board_setup();
+}
+
+int __init bcm63xx_register_devices(void)
+{
+        return board_register_devices();
+}
+
+arch_initcall(bcm63xx_register_devices);
diff --git a/arch/mips/bcm63xx/timer.c b/arch/mips/bcm63xx/timer.c
new file mode 100644
index 000000000000..ba522bdcde4b
--- /dev/null
+++ b/arch/mips/bcm63xx/timer.c
@@ -0,0 +1,205 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/clk.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_timer.h>
+#include <bcm63xx_regs.h>
+
+static DEFINE_SPINLOCK(timer_reg_lock);
+static DEFINE_SPINLOCK(timer_data_lock);
+static struct clk *periph_clk;
+
+static struct timer_data {
+        void    (*cb)(void *);
+        void    *data;
+} timer_data[BCM63XX_TIMER_COUNT];
+
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
+{
+        u32 stat;
+        int i;
+
+        spin_lock(&timer_reg_lock);
+        stat = bcm_timer_readl(TIMER_IRQSTAT_REG);
+        bcm_timer_writel(stat, TIMER_IRQSTAT_REG);
+        spin_unlock(&timer_reg_lock);
+
+        for (i = 0; i < BCM63XX_TIMER_COUNT; i++) {
+                if (!(stat & TIMER_IRQSTAT_TIMER_CAUSE(i)))
+                        continue;
+
+                spin_lock(&timer_data_lock);
+                if (!timer_data[i].cb) {
+                        spin_unlock(&timer_data_lock);
+                        continue;
+                }
+
+                timer_data[i].cb(timer_data[i].data);
+                spin_unlock(&timer_data_lock);
+        }
+
+        return IRQ_HANDLED;
+}
+
+int bcm63xx_timer_enable(int id)
+{
+        u32 reg;
+        unsigned long flags;
+
+        if (id >= BCM63XX_TIMER_COUNT)
+                return -EINVAL;
+
+        spin_lock_irqsave(&timer_reg_lock, flags);
+
+        reg = bcm_timer_readl(TIMER_CTLx_REG(id));
+        reg |= TIMER_CTL_ENABLE_MASK;
+        bcm_timer_writel(reg, TIMER_CTLx_REG(id));
+
+        reg = bcm_timer_readl(TIMER_IRQSTAT_REG);
+        reg |= TIMER_IRQSTAT_TIMER_IR_EN(id);
+        bcm_timer_writel(reg, TIMER_IRQSTAT_REG);
+
+        spin_unlock_irqrestore(&timer_reg_lock, flags);
+        return 0;
+}
+
+EXPORT_SYMBOL(bcm63xx_timer_enable);
+
+int bcm63xx_timer_disable(int id)
+{
+        u32 reg;
+        unsigned long flags;
+
+        if (id >= BCM63XX_TIMER_COUNT)
+                return -EINVAL;
+
+        spin_lock_irqsave(&timer_reg_lock, flags);
+
+        reg = bcm_timer_readl(TIMER_CTLx_REG(id));
+        reg &= ~TIMER_CTL_ENABLE_MASK;
+        bcm_timer_writel(reg, TIMER_CTLx_REG(id));
+
+        reg = bcm_timer_readl(TIMER_IRQSTAT_REG);
+        reg &= ~TIMER_IRQSTAT_TIMER_IR_EN(id);
+        bcm_timer_writel(reg, TIMER_IRQSTAT_REG);
+
+        spin_unlock_irqrestore(&timer_reg_lock, flags);
+        return 0;
+}
+
+EXPORT_SYMBOL(bcm63xx_timer_disable);
+
+int bcm63xx_timer_register(int id, void (*callback)(void *data), void *data)
+{
+        unsigned long flags;
+        int ret;
+
+        if (id >= BCM63XX_TIMER_COUNT || !callback)
+                return -EINVAL;
+
+        ret = 0;
+        spin_lock_irqsave(&timer_data_lock, flags);
+        if (timer_data[id].cb) {
+                ret = -EBUSY;
+                goto out;
+        }
+
+        timer_data[id].cb = callback;
+        timer_data[id].data = data;
+
+out:
+        spin_unlock_irqrestore(&timer_data_lock, flags);
+        return ret;
+}
+
+EXPORT_SYMBOL(bcm63xx_timer_register);
+
+void bcm63xx_timer_unregister(int id)
+{
+        unsigned long flags;
+
+        if (id >= BCM63XX_TIMER_COUNT)
+                return;
+
+        spin_lock_irqsave(&timer_data_lock, flags);
+        timer_data[id].cb = NULL;
+        spin_unlock_irqrestore(&timer_data_lock, flags);
+}
+
+EXPORT_SYMBOL(bcm63xx_timer_unregister);
+
+unsigned int bcm63xx_timer_countdown(unsigned int countdown_us)
+{
+        return (clk_get_rate(periph_clk) / (1000 * 1000)) * countdown_us;
+}
+
+EXPORT_SYMBOL(bcm63xx_timer_countdown);
+
+int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us)
+{
+        u32 reg, countdown;
+        unsigned long flags;
+
+        if (id >= BCM63XX_TIMER_COUNT)
+                return -EINVAL;
+
+        countdown = bcm63xx_timer_countdown(countdown_us);
+        if (countdown & ~TIMER_CTL_COUNTDOWN_MASK)
+                return -EINVAL;
+
+        spin_lock_irqsave(&timer_reg_lock, flags);
+        reg = bcm_timer_readl(TIMER_CTLx_REG(id));
+
+        if (monotonic)
+                reg &= ~TIMER_CTL_MONOTONIC_MASK;
+        else
+                reg |= TIMER_CTL_MONOTONIC_MASK;
+
+        reg &= ~TIMER_CTL_COUNTDOWN_MASK;
+        reg |= countdown;
+        bcm_timer_writel(reg, TIMER_CTLx_REG(id));
+
+        spin_unlock_irqrestore(&timer_reg_lock, flags);
+        return 0;
+}
+
+EXPORT_SYMBOL(bcm63xx_timer_set);
+
+int bcm63xx_timer_init(void)
+{
+        int ret, irq;
+        u32 reg;
+
+        reg = bcm_timer_readl(TIMER_IRQSTAT_REG);
+        reg &= ~TIMER_IRQSTAT_TIMER0_IR_EN;
+        reg &= ~TIMER_IRQSTAT_TIMER1_IR_EN;
+        reg &= ~TIMER_IRQSTAT_TIMER2_IR_EN;
+        bcm_timer_writel(reg, TIMER_IRQSTAT_REG);
+
+        periph_clk = clk_get(NULL, "periph");
+        if (IS_ERR(periph_clk))
+                return -ENODEV;
+
+        irq = bcm63xx_get_irq_number(IRQ_TIMER);
+        ret = request_irq(irq, timer_interrupt, 0, "bcm63xx_timer", NULL);
+        if (ret) {
+                printk(KERN_ERR "bcm63xx_timer: failed to register irq\n");
+                return ret;
+        }
+
+        return 0;
+}
+
+arch_initcall(bcm63xx_timer_init);
diff --git a/arch/mips/boot/elf2ecoff.c b/arch/mips/boot/elf2ecoff.c
index c5a7f308c405..e19d906236af 100644
--- a/arch/mips/boot/elf2ecoff.c
+++ b/arch/mips/boot/elf2ecoff.c
@@ -59,8 +59,8 @@ struct sect {
 };
 
 int *symTypeTable;
-int must_convert_endian = 0;
-int format_bigendian = 0;
+int must_convert_endian;
+int format_bigendian;
 
 static void copy(int out, int in, off_t offset, off_t size)
 {
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index d6903c3f3d51..139436280520 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -6,10 +6,10 @@
 # License.  See the file "COPYING" in the main directory of this archive
 # for more details.
 #
-# Copyright (C) 2005-2008 Cavium Networks
+# Copyright (C) 2005-2009 Cavium Networks
 #
 
-obj-y := setup.o serial.o octeon-irq.o csrc-octeon.o
+obj-y := setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o
 obj-y += dma-octeon.o flash_setup.o
 obj-y += octeon-memcpy.o
 
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c
new file mode 100644
index 000000000000..be711dd2d918
--- /dev/null
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -0,0 +1,164 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004-2009 Cavium Networks
+ * Copyright (C) 2008 Wind River Systems
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#include <asm/octeon/octeon.h>
+#include <asm/octeon/cvmx-rnm-defs.h>
+
+static struct octeon_cf_data octeon_cf_data;
+
+static int __init octeon_cf_device_init(void)
+{
+        union cvmx_mio_boot_reg_cfgx mio_boot_reg_cfg;
+        unsigned long base_ptr, region_base, region_size;
+        struct platform_device *pd;
+        struct resource cf_resources[3];
+        unsigned int num_resources;
+        int i;
+        int ret = 0;
+
+        /* Setup octeon-cf platform device if present. */
+        base_ptr = 0;
+        if (octeon_bootinfo->major_version == 1
+                && octeon_bootinfo->minor_version >= 1) {
+                if (octeon_bootinfo->compact_flash_common_base_addr)
+                        base_ptr =
+                                octeon_bootinfo->compact_flash_common_base_addr;
+        } else {
+                base_ptr = 0x1d000800;
+        }
+
+        if (!base_ptr)
+                return ret;
+
+        /* Find CS0 region. */
+        for (i = 0; i < 8; i++) {
+                mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i));
+                region_base = mio_boot_reg_cfg.s.base << 16;
+                region_size = (mio_boot_reg_cfg.s.size + 1) << 16;
+                if (mio_boot_reg_cfg.s.en && base_ptr >= region_base
+                    && base_ptr < region_base + region_size)
+                        break;
+        }
+        if (i >= 7) {
+                /* i and i + 1 are CS0 and CS1, both must be less than 8. */
+                goto out;
+        }
+        octeon_cf_data.base_region = i;
+        octeon_cf_data.is16bit = mio_boot_reg_cfg.s.width;
+        octeon_cf_data.base_region_bias = base_ptr - region_base;
+        memset(cf_resources, 0, sizeof(cf_resources));
+        num_resources = 0;
+        cf_resources[num_resources].flags       = IORESOURCE_MEM;
+        cf_resources[num_resources].start       = region_base;
+        cf_resources[num_resources].end = region_base + region_size - 1;
+        num_resources++;
+
+
+        if (!(base_ptr & 0xfffful)) {
+                /*
+                 * Boot loader signals availability of DMA (true_ide
+                 * mode) by setting low order bits of base_ptr to
+                 * zero.
+                 */
+
+                /* Asume that CS1 immediately follows. */
+                mio_boot_reg_cfg.u64 =
+                        cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i + 1));
+                region_base = mio_boot_reg_cfg.s.base << 16;
+                region_size = (mio_boot_reg_cfg.s.size + 1) << 16;
+                if (!mio_boot_reg_cfg.s.en)
+                        goto out;
+
+                cf_resources[num_resources].flags       = IORESOURCE_MEM;
+                cf_resources[num_resources].start       = region_base;
+                cf_resources[num_resources].end = region_base + region_size - 1;
+                num_resources++;
+
+                octeon_cf_data.dma_engine = 0;
+                cf_resources[num_resources].flags       = IORESOURCE_IRQ;
+                cf_resources[num_resources].start       = OCTEON_IRQ_BOOTDMA;
+                cf_resources[num_resources].end = OCTEON_IRQ_BOOTDMA;
+                num_resources++;
+        } else {
+                octeon_cf_data.dma_engine = -1;
+        }
+
+        pd = platform_device_alloc("pata_octeon_cf", -1);
+        if (!pd) {
+                ret = -ENOMEM;
+                goto out;
+        }
+        pd->dev.platform_data = &octeon_cf_data;
+
+        ret = platform_device_add_resources(pd, cf_resources, num_resources);
+        if (ret)
+                goto fail;
+
+        ret = platform_device_add(pd);
+        if (ret)
+                goto fail;
+
+        return ret;
+fail:
+        platform_device_put(pd);
+out:
+        return ret;
+}
+device_initcall(octeon_cf_device_init);
+
+/* Octeon Random Number Generator.  */
+static int __init octeon_rng_device_init(void)
+{
+        struct platform_device *pd;
+        int ret = 0;
+
+        struct resource rng_resources[] = {
+                {
+                        .flags  = IORESOURCE_MEM,
+                        .start  = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS),
+                        .end    = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS) + 0xf
+                }, {
+                        .flags  = IORESOURCE_MEM,
+                        .start  = cvmx_build_io_address(8, 0),
+                        .end    = cvmx_build_io_address(8, 0) + 0x7
+                }
+        };
+
+        pd = platform_device_alloc("octeon_rng", -1);
+        if (!pd) {
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        ret = platform_device_add_resources(pd, rng_resources,
+                                            ARRAY_SIZE(rng_resources));
+        if (ret)
+                goto fail;
+
+        ret = platform_device_add(pd);
+        if (ret)
+                goto fail;
+
+        return ret;
+fail:
+        platform_device_put(pd);
+
+out:
+        return ret;
+}
+device_initcall(octeon_rng_device_init);
+
+MODULE_AUTHOR("David Daney <ddaney@caviumnetworks.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Platform driver for Octeon SOC");
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index da559249cc2f..b321d3b16877 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -11,7 +11,6 @@
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
-#include <linux/irq.h>
 #include <linux/serial.h>
 #include <linux/smp.h>
 #include <linux/types.h>
@@ -824,105 +823,3 @@ void prom_free_prom_memory(void)
            CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */
         octeon_hal_setup_reserved32();
 }
-
-static struct octeon_cf_data octeon_cf_data;
-
-static int __init octeon_cf_device_init(void)
-{
-        union cvmx_mio_boot_reg_cfgx mio_boot_reg_cfg;
-        unsigned long base_ptr, region_base, region_size;
-        struct platform_device *pd;
-        struct resource cf_resources[3];
-        unsigned int num_resources;
-        int i;
-        int ret = 0;
-
-        /* Setup octeon-cf platform device if present. */
-        base_ptr = 0;
-        if (octeon_bootinfo->major_version == 1
-                && octeon_bootinfo->minor_version >= 1) {
-                if (octeon_bootinfo->compact_flash_common_base_addr)
-                        base_ptr =
-                                octeon_bootinfo->compact_flash_common_base_addr;
-        } else {
-                base_ptr = 0x1d000800;
-        }
-
-        if (!base_ptr)
-                return ret;
-
-        /* Find CS0 region. */
-        for (i = 0; i < 8; i++) {
-                mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i));
-                region_base = mio_boot_reg_cfg.s.base << 16;
-                region_size = (mio_boot_reg_cfg.s.size + 1) << 16;
-                if (mio_boot_reg_cfg.s.en && base_ptr >= region_base
-                    && base_ptr < region_base + region_size)
-                        break;
-        }
-        if (i >= 7) {
-                /* i and i + 1 are CS0 and CS1, both must be less than 8. */
-                goto out;
-        }
-        octeon_cf_data.base_region = i;
-        octeon_cf_data.is16bit = mio_boot_reg_cfg.s.width;
-        octeon_cf_data.base_region_bias = base_ptr - region_base;
-        memset(cf_resources, 0, sizeof(cf_resources));
-        num_resources = 0;
-        cf_resources[num_resources].flags       = IORESOURCE_MEM;
-        cf_resources[num_resources].start       = region_base;
-        cf_resources[num_resources].end = region_base + region_size - 1;
-        num_resources++;
-
-
-        if (!(base_ptr & 0xfffful)) {
-                /*
-                 * Boot loader signals availability of DMA (true_ide
-                 * mode) by setting low order bits of base_ptr to
-                 * zero.
-                 */
-
-                /* Asume that CS1 immediately follows. */
-                mio_boot_reg_cfg.u64 =
-                        cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i + 1));
-                region_base = mio_boot_reg_cfg.s.base << 16;
-                region_size = (mio_boot_reg_cfg.s.size + 1) << 16;
-                if (!mio_boot_reg_cfg.s.en)
-                        goto out;
-
-                cf_resources[num_resources].flags       = IORESOURCE_MEM;
-                cf_resources[num_resources].start       = region_base;
-                cf_resources[num_resources].end = region_base + region_size - 1;
-                num_resources++;
-
-                octeon_cf_data.dma_engine = 0;
-                cf_resources[num_resources].flags       = IORESOURCE_IRQ;
-                cf_resources[num_resources].start       = OCTEON_IRQ_BOOTDMA;
-                cf_resources[num_resources].end = OCTEON_IRQ_BOOTDMA;
-                num_resources++;
-        } else {
-                octeon_cf_data.dma_engine = -1;
-        }
-
-        pd = platform_device_alloc("pata_octeon_cf", -1);
-        if (!pd) {
-                ret = -ENOMEM;
-                goto out;
-        }
-        pd->dev.platform_data = &octeon_cf_data;
-
-        ret = platform_device_add_resources(pd, cf_resources, num_resources);
-        if (ret)
-                goto fail;
-
-        ret = platform_device_add(pd);
-        if (ret)
-                goto fail;
-
-        return ret;
-fail:
-        platform_device_put(pd);
-out:
-        return ret;
-}
-device_initcall(octeon_cf_device_init);
diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig
index dad5b6769d74..35648302f7cc 100644
--- a/arch/mips/configs/ar7_defconfig
+++ b/arch/mips/configs/ar7_defconfig
@@ -125,7 +125,6 @@ CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig
index d8694332b344..94b7d57f906d 100644
--- a/arch/mips/configs/bcm47xx_defconfig
+++ b/arch/mips/configs/bcm47xx_defconfig
@@ -111,7 +111,6 @@ CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/bcm63xx_defconfig b/arch/mips/configs/bcm63xx_defconfig
new file mode 100644
index 000000000000..ea00c18d1f7b
--- /dev/null
+++ b/arch/mips/configs/bcm63xx_defconfig
@@ -0,0 +1,972 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc6
+# Sun May 31 20:17:18 2009
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_BASLER_EXCITE is not set
+# CONFIG_BCM47XX is not set
+CONFIG_BCM63XX=y
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
+# CONFIG_LEMOTE_FULONG is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_NEC_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_NXP_STB220 is not set
+# CONFIG_NXP_STB225 is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+# CONFIG_MACH_TX49XX is not set
+# CONFIG_MIKROTIK_RB532 is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+
+#
+# CPU support
+#
+CONFIG_BCM63XX_CPU_6348=y
+CONFIG_BCM63XX_CPU_6358=y
+CONFIG_BOARD_BCM963XX=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_R4K_LIB=y
+CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+# CONFIG_HOTPLUG_CPU is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+# CONFIG_CPU_LOONGSON2 is not set
+CONFIG_CPU_MIPS32_R1=y
+# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R5500 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+# CONFIG_CPU_CAVIUM_OCTEON is not set
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPSR1=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_32KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_KEXEC is not set
+# CONFIG_SECCOMP is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_BASE_FULL=y
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_SHMEM is not set
+# CONFIG_AIO is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+CONFIG_PCI_QUIRKS=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_FREEZER is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCI_LEGACY is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+CONFIG_MMU=y
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
+# CONFIG_YENTA is not set
+# CONFIG_PD6729 is not set
+# CONFIG_I82092 is not set
+CONFIG_PCMCIA_BCM63XX=y
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_PM is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+# CONFIG_BLK_DEV is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+CONFIG_BCM63XX_PHY=y
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_ATL2 is not set
+CONFIG_BCM63XX_ENET=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_NET_PCMCIA is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_BCM63XX=y
+CONFIG_SERIAL_BCM63XX_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=y
+CONFIG_SSB_SPROM=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+# CONFIG_SSB_B43_PCI_BRIDGE is not set
+CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
+# CONFIG_SSB_PCMCIAHOST is not set
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+# CONFIG_SSB_DRIVER_PCICORE is not set
+# CONFIG_SSB_DRIVER_MIPS is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+CONFIG_DISPLAY_SUPPORT=y
+
+#
+# Display hardware drivers
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_SSB is not set
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_CMDLINE="console=ttyS0,115200"
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index d6d35b2e5fe8..13d9eb4736c0 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -129,7 +129,6 @@ CONFIG_PAGE_SIZE_4KB=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index eb44b72254af..6c8cca8589ba 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -112,7 +112,6 @@ CONFIG_PAGE_SIZE_4KB=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index a279165e3a7d..dbdf3bb1a34a 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -114,7 +114,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 8944d15caf13..fa6814475898 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -114,7 +114,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index ab17973107fd..d73f1de43b5d 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -114,7 +114,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index b65803f19352..ec3e028a5b2e 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -116,7 +116,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index a190ac07740b..7631dae51be9 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -115,7 +115,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig
index 4e465e945991..1995d43a2ed1 100644
--- a/arch/mips/configs/excite_defconfig
+++ b/arch/mips/configs/excite_defconfig
@@ -118,7 +118,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/fulong_defconfig b/arch/mips/configs/fuloong2e_defconfig
index 786a9bc9a696..0197f0de6b3f 100644
--- a/arch/mips/configs/fulong_defconfig
+++ b/arch/mips/configs/fuloong2e_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc6
-# Fri Nov 28 17:53:48 2008
+# Linux kernel version: 2.6.31-rc1
+# Thu Jul  2 22:37:00 2009
 #
 CONFIG_MIPS=y
 
@@ -9,16 +9,17 @@ CONFIG_MIPS=y
 # Machine selection
 #
 # CONFIG_MACH_ALCHEMY is not set
+# CONFIG_AR7 is not set
 # CONFIG_BASLER_EXCITE is not set
 # CONFIG_BCM47XX is not set
 # CONFIG_MIPS_COBALT is not set
 # CONFIG_MACH_DECSTATION is not set
 # CONFIG_MACH_JAZZ is not set
 # CONFIG_LASAT is not set
-CONFIG_LEMOTE_FULONG=y
+CONFIG_MACH_LOONGSON=y
 # CONFIG_MIPS_MALTA is not set
 # CONFIG_MIPS_SIM is not set
-# CONFIG_MACH_EMMA is not set
+# CONFIG_NEC_MARKEINS is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_NXP_STB220 is not set
 # CONFIG_NXP_STB225 is not set
@@ -43,6 +44,11 @@ CONFIG_LEMOTE_FULONG=y
 # CONFIG_MACH_TX49XX is not set
 # CONFIG_MIKROTIK_RB532 is not set
 # CONFIG_WR_PPMC is not set
+# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
+# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
+# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_LEMOTE_FULOONG2E=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
@@ -53,15 +59,16 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_R4K_LIB=y
 CONFIG_CEVT_R4K=y
+CONFIG_CSRC_R4K_LIB=y
 CONFIG_CSRC_R4K=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_SYS_HAS_EARLY_PRINTK=y
-# CONFIG_HOTPLUG_CPU is not set
 CONFIG_I8259=y
 # CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_ISA_DMA=y
@@ -72,12 +79,11 @@ CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
 CONFIG_IRQ_CPU=y
 CONFIG_BOOT_ELF32=y
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_HAVE_STD_PC_SERIAL_PORT=y
 
 #
 # CPU selection
 #
-CONFIG_CPU_LOONGSON2=y
+CONFIG_CPU_LOONGSON2E=y
 # CONFIG_CPU_MIPS32_R1 is not set
 # CONFIG_CPU_MIPS32_R2 is not set
 # CONFIG_CPU_MIPS64_R1 is not set
@@ -98,7 +104,9 @@ CONFIG_CPU_LOONGSON2=y
 # CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_RM9000 is not set
 # CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_LOONGSON2=y
+# CONFIG_CPU_CAVIUM_OCTEON is not set
+CONFIG_CPU_LOONGSON2=y
+CONFIG_SYS_HAS_CPU_LOONGSON2E=y
 CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
 CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
@@ -112,6 +120,7 @@ CONFIG_64BIT=y
 # CONFIG_PAGE_SIZE_4KB is not set
 # CONFIG_PAGE_SIZE_8KB is not set
 CONFIG_PAGE_SIZE_16KB=y
+# CONFIG_PAGE_SIZE_32KB is not set
 # CONFIG_PAGE_SIZE_64KB is not set
 CONFIG_BOARD_SCACHE=y
 CONFIG_MIPS_MT_DISABLED=y
@@ -125,7 +134,6 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_SYS_SUPPORTS_HIGHMEM=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -135,11 +143,12 @@ CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_SPARSEMEM_STATIC=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_RESOURCES_64BIT=y
 CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -161,6 +170,7 @@ CONFIG_SECCOMP=y
 CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -168,21 +178,31 @@ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION="lm32"
+CONFIG_LOCALVERSION="-fuloong2e"
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
@@ -191,9 +211,11 @@ CONFIG_NAMESPACES=y
 # CONFIG_IPC_NS is not set
 CONFIG_USER_NS=y
 CONFIG_PID_NS=y
+# CONFIG_NET_NS is not set
 # CONFIG_BLK_DEV_INITRD is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
@@ -203,29 +225,40 @@ CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 # CONFIG_PCSPKR_PLATFORM is not set
-# CONFIG_COMPAT_BRK is not set
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+
+#
+# Performance Counters
+#
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
+CONFIG_TRACEPOINTS=y
+CONFIG_MARKERS=y
 CONFIG_OPROFILE=m
 CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_SYSCALL_WRAPPERS=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -233,9 +266,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
 CONFIG_BLK_DEV_BSG=y
 # CONFIG_BLK_DEV_INTEGRITY is not set
 CONFIG_BLOCK_COMPAT=y
@@ -252,8 +283,7 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_CLASSIC_RCU=y
-CONFIG_FREEZER=y
+# CONFIG_FREEZER is not set
 
 #
 # Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -263,6 +293,8 @@ CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
 CONFIG_ISA=y
 CONFIG_MMU=y
 # CONFIG_PCCARD is not set
@@ -285,12 +317,12 @@ CONFIG_BINFMT_ELF32=y
 #
 # Power management options
 #
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_PM=y
 # CONFIG_PM_DEBUG is not set
-CONFIG_PM_SLEEP=y
-CONFIG_SUSPEND=y
-CONFIG_SUSPEND_FREEZER=y
+# CONFIG_SUSPEND is not set
+# CONFIG_HIBERNATION is not set
 CONFIG_NET=y
 
 #
@@ -346,9 +378,11 @@ CONFIG_NETFILTER_NETLINK=m
 CONFIG_NETFILTER_NETLINK_QUEUE=m
 CONFIG_NETFILTER_NETLINK_LOG=m
 # CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_TPROXY is not set
 CONFIG_NETFILTER_XTABLES=m
 CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
 # CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_HL=m
 CONFIG_NETFILTER_XT_TARGET_MARK=m
 # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
@@ -361,6 +395,7 @@ CONFIG_NETFILTER_XT_MATCH_DCCP=m
 # CONFIG_NETFILTER_XT_MATCH_DSCP is not set
 CONFIG_NETFILTER_XT_MATCH_ESP=m
 # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+CONFIG_NETFILTER_XT_MATCH_HL=m
 CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
 CONFIG_NETFILTER_XT_MATCH_LENGTH=m
 CONFIG_NETFILTER_XT_MATCH_LIMIT=m
@@ -381,6 +416,7 @@ CONFIG_NETFILTER_XT_MATCH_STRING=m
 CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
 CONFIG_NETFILTER_XT_MATCH_TIME=m
 CONFIG_NETFILTER_XT_MATCH_U32=m
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
 # CONFIG_IP_VS is not set
 
 #
@@ -419,30 +455,34 @@ CONFIG_IP_NF_ARP_MANGLE=m
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+CONFIG_PHONET=m
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 CONFIG_NET_CLS_ROUTE=y
+# CONFIG_DCB is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_DROP_MONITOR is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-CONFIG_PHONET=m
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
 CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
-# CONFIG_MAC80211 is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-# CONFIG_IEEE80211_CRYPT_CCMP is not set
-# CONFIG_IEEE80211_CRYPT_TKIP is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+CONFIG_MAC80211_DEFAULT_PS_VALUE=0
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 CONFIG_NET_9P=m
 # CONFIG_NET_9P_DEBUG is not set
@@ -466,6 +506,7 @@ CONFIG_MTD=m
 # CONFIG_MTD_DEBUG is not set
 # CONFIG_MTD_CONCAT is not set
 # CONFIG_MTD_PARTITIONS is not set
+# CONFIG_MTD_TESTS is not set
 
 #
 # User Modules And Translation Layers
@@ -516,9 +557,7 @@ CONFIG_MTD_CFI_UTIL=m
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_PHYSMAP=m
-CONFIG_MTD_PHYSMAP_START=0x1fc00000
-CONFIG_MTD_PHYSMAP_LEN=0x80000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=1
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_INTEL_VR_NOR is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -541,6 +580,11 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
 # CONFIG_MTD_ONENAND is not set
 
 #
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
@@ -573,6 +617,7 @@ CONFIG_IDE=y
 #
 # Please see Documentation/ide/ide.txt for help/info on IDE drives
 #
+CONFIG_IDE_XFER_MODE=y
 CONFIG_IDE_TIMINGS=y
 CONFIG_IDE_ATAPI=y
 # CONFIG_BLK_DEV_IDE_SATA is not set
@@ -582,7 +627,6 @@ CONFIG_IDE_GD_ATA=y
 CONFIG_BLK_DEV_IDECD=y
 CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
 # CONFIG_BLK_DEV_IDETAPE is not set
-CONFIG_BLK_DEV_IDESCSI=y
 CONFIG_IDE_TASK_IOCTL=y
 CONFIG_IDE_PROC_FS=y
 
@@ -613,6 +657,7 @@ CONFIG_BLK_DEV_IDEDMA_PCI=y
 # CONFIG_BLK_DEV_JMICRON is not set
 # CONFIG_BLK_DEV_SC1200 is not set
 # CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8172 is not set
 # CONFIG_BLK_DEV_IT8213 is not set
 # CONFIG_BLK_DEV_IT821X is not set
 # CONFIG_BLK_DEV_NS87415 is not set
@@ -660,10 +705,6 @@ CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_SR_VENDOR=y
 CONFIG_CHR_DEV_SG=y
 # CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
 # CONFIG_SCSI_MULTI_LUN is not set
 CONFIG_SCSI_CONSTANTS=y
 # CONFIG_SCSI_LOGGING is not set
@@ -681,6 +722,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 # CONFIG_FUSION is not set
@@ -690,7 +732,11 @@ CONFIG_SCSI_WAIT_SCAN=m
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -718,6 +764,9 @@ CONFIG_CICADA_PHY=m
 # CONFIG_BROADCOM_PHY is not set
 # CONFIG_ICPLUS_PHY is not set
 # CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
 # CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
@@ -729,7 +778,9 @@ CONFIG_MII=y
 # CONFIG_NET_VENDOR_SMC is not set
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
 # CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_DNET is not set
 # CONFIG_NET_TULIP is not set
 # CONFIG_AT1700 is not set
 # CONFIG_DEPCA is not set
@@ -752,7 +803,6 @@ CONFIG_NET_PCI=y
 # CONFIG_FORCEDETH is not set
 # CONFIG_CS89x0 is not set
 # CONFIG_TC35815 is not set
-# CONFIG_EEPRO100 is not set
 # CONFIG_E100 is not set
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
@@ -766,8 +816,10 @@ CONFIG_8139TOO=y
 # CONFIG_R6040 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
+# CONFIG_KS8842 is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
 # CONFIG_ATL2 is not set
@@ -778,6 +830,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -788,17 +841,21 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
 # CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -808,6 +865,7 @@ CONFIG_NETDEV_10000=y
 # CONFIG_BNX2X is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
 # CONFIG_TR is not set
 
 #
@@ -815,7 +873,10 @@ CONFIG_NETDEV_10000=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 
 #
 # USB Network Adapters
@@ -872,7 +933,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=m
+CONFIG_KEYBOARD_ATKBD=y
 # CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
 # CONFIG_KEYBOARD_XTKBD is not set
@@ -883,7 +944,6 @@ CONFIG_MOUSE_PS2=y
 CONFIG_MOUSE_PS2_ALPS=y
 CONFIG_MOUSE_PS2_LOGIPS2PP=y
 CONFIG_MOUSE_PS2_SYNAPTICS=y
-CONFIG_MOUSE_PS2_LIFEBOOK=y
 CONFIG_MOUSE_PS2_TRACKPOINT=y
 # CONFIG_MOUSE_PS2_ELANTECH is not set
 # CONFIG_MOUSE_PS2_TOUCHKIT is not set
@@ -894,6 +954,7 @@ CONFIG_MOUSE_SERIAL=y
 # CONFIG_MOUSE_LOGIBM is not set
 # CONFIG_MOUSE_PC110PAD is not set
 # CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
@@ -939,10 +1000,13 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+CONFIG_RTC=y
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
@@ -1006,19 +1070,20 @@ CONFIG_I2C_VIAPRO=m
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -1041,140 +1106,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
-
-#
-# Multimedia devices
-#
-
-#
-# Multimedia core support
-#
-CONFIG_VIDEO_DEV=m
-CONFIG_VIDEO_V4L2_COMMON=m
-CONFIG_VIDEO_ALLOW_V4L1=y
-CONFIG_VIDEO_V4L1_COMPAT=y
-# CONFIG_DVB_CORE is not set
-CONFIG_VIDEO_MEDIA=m
-
-#
-# Multimedia drivers
-#
-CONFIG_MEDIA_ATTACH=y
-CONFIG_MEDIA_TUNER=m
-CONFIG_MEDIA_TUNER_CUSTOMIZE=y
-CONFIG_MEDIA_TUNER_SIMPLE=m
-CONFIG_MEDIA_TUNER_TDA8290=m
-CONFIG_MEDIA_TUNER_TDA827X=m
-CONFIG_MEDIA_TUNER_TDA18271=m
-CONFIG_MEDIA_TUNER_TDA9887=m
-CONFIG_MEDIA_TUNER_TEA5761=m
-CONFIG_MEDIA_TUNER_TEA5767=m
-CONFIG_MEDIA_TUNER_MT20XX=m
-CONFIG_MEDIA_TUNER_MT2060=m
-CONFIG_MEDIA_TUNER_MT2266=m
-CONFIG_MEDIA_TUNER_MT2131=m
-CONFIG_MEDIA_TUNER_QT1010=m
-CONFIG_MEDIA_TUNER_XC2028=m
-CONFIG_MEDIA_TUNER_XC5000=m
-CONFIG_MEDIA_TUNER_MXL5005S=m
-CONFIG_MEDIA_TUNER_MXL5007T=m
-CONFIG_VIDEO_V4L2=m
-CONFIG_VIDEO_V4L1=m
-CONFIG_VIDEOBUF_GEN=m
-CONFIG_VIDEOBUF_VMALLOC=m
-CONFIG_VIDEOBUF_DMA_CONTIG=m
-CONFIG_VIDEO_CAPTURE_DRIVERS=y
-# CONFIG_VIDEO_ADV_DEBUG is not set
-# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
-CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
-# CONFIG_VIDEO_VIVI is not set
-# CONFIG_VIDEO_BT848 is not set
-# CONFIG_VIDEO_PMS is not set
-# CONFIG_VIDEO_CPIA is not set
-# CONFIG_VIDEO_CPIA2 is not set
-# CONFIG_VIDEO_SAA5246A is not set
-# CONFIG_VIDEO_SAA5249 is not set
-# CONFIG_VIDEO_STRADIS is not set
-# CONFIG_VIDEO_SAA7134 is not set
-# CONFIG_VIDEO_MXB is not set
-# CONFIG_VIDEO_HEXIUM_ORION is not set
-# CONFIG_VIDEO_HEXIUM_GEMINI is not set
-# CONFIG_VIDEO_CX88 is not set
-# CONFIG_VIDEO_IVTV is not set
-# CONFIG_VIDEO_CAFE_CCIC is not set
-CONFIG_SOC_CAMERA=m
-CONFIG_SOC_CAMERA_MT9M001=m
-CONFIG_SOC_CAMERA_MT9M111=m
-CONFIG_SOC_CAMERA_MT9V022=m
-CONFIG_SOC_CAMERA_PLATFORM=m
-CONFIG_VIDEO_SH_MOBILE_CEU=m
-CONFIG_V4L_USB_DRIVERS=y
-CONFIG_USB_VIDEO_CLASS=m
-CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
-CONFIG_USB_GSPCA=m
-CONFIG_USB_M5602=m
-CONFIG_USB_GSPCA_CONEX=m
-CONFIG_USB_GSPCA_ETOMS=m
-CONFIG_USB_GSPCA_FINEPIX=m
-CONFIG_USB_GSPCA_MARS=m
-CONFIG_USB_GSPCA_OV519=m
-CONFIG_USB_GSPCA_PAC207=m
-CONFIG_USB_GSPCA_PAC7311=m
-CONFIG_USB_GSPCA_SONIXB=m
-CONFIG_USB_GSPCA_SONIXJ=m
-CONFIG_USB_GSPCA_SPCA500=m
-CONFIG_USB_GSPCA_SPCA501=m
-CONFIG_USB_GSPCA_SPCA505=m
-CONFIG_USB_GSPCA_SPCA506=m
-CONFIG_USB_GSPCA_SPCA508=m
-CONFIG_USB_GSPCA_SPCA561=m
-CONFIG_USB_GSPCA_STK014=m
-CONFIG_USB_GSPCA_SUNPLUS=m
-CONFIG_USB_GSPCA_T613=m
-CONFIG_USB_GSPCA_TV8532=m
-CONFIG_USB_GSPCA_VC032X=m
-CONFIG_USB_GSPCA_ZC3XX=m
-# CONFIG_VIDEO_PVRUSB2 is not set
-# CONFIG_VIDEO_EM28XX is not set
-# CONFIG_VIDEO_USBVISION is not set
-CONFIG_VIDEO_USBVIDEO=m
-CONFIG_USB_VICAM=m
-CONFIG_USB_IBMCAM=m
-CONFIG_USB_KONICAWC=m
-CONFIG_USB_QUICKCAM_MESSENGER=m
-CONFIG_USB_ET61X251=m
-# CONFIG_VIDEO_OVCAMCHIP is not set
-CONFIG_USB_OV511=m
-CONFIG_USB_SE401=m
-CONFIG_USB_SN9C102=m
-CONFIG_USB_STV680=m
-CONFIG_USB_ZC0301=m
-CONFIG_USB_PWC=m
-# CONFIG_USB_PWC_DEBUG is not set
-# CONFIG_USB_ZR364XX is not set
-CONFIG_USB_STKWEBCAM=m
-CONFIG_USB_S2255=m
-CONFIG_RADIO_ADAPTERS=y
-# CONFIG_RADIO_CADET is not set
-# CONFIG_RADIO_RTRACK is not set
-# CONFIG_RADIO_RTRACK2 is not set
-# CONFIG_RADIO_AZTECH is not set
-# CONFIG_RADIO_GEMTEK is not set
-# CONFIG_RADIO_GEMTEK_PCI is not set
-# CONFIG_RADIO_MAXIRADIO is not set
-# CONFIG_RADIO_MAESTRO is not set
-# CONFIG_RADIO_SF16FMI is not set
-# CONFIG_RADIO_SF16FMR2 is not set
-# CONFIG_RADIO_TERRATEC is not set
-# CONFIG_RADIO_TRUST is not set
-# CONFIG_RADIO_TYPHOON is not set
-# CONFIG_RADIO_ZOLTRIX is not set
-# CONFIG_USB_DSBR is not set
-CONFIG_USB_SI470X=m
-CONFIG_USB_MR800=m
-CONFIG_DAB=y
-# CONFIG_USB_DABUSB is not set
+# CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
@@ -1235,12 +1170,13 @@ CONFIG_FB_RADEON_BACKLIGHT=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=m
 # CONFIG_LCD_ILI9320 is not set
 # CONFIG_LCD_PLATFORM is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_GENERIC=y
 
 #
 # Display device support
@@ -1273,12 +1209,19 @@ CONFIG_SND_MIXER_OSS=m
 CONFIG_SND_PCM_OSS=m
 CONFIG_SND_PCM_OSS_PLUGINS=y
 CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_RTCTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
 CONFIG_SND_VMASTER=y
+CONFIG_SND_RAWMIDI_SEQ=m
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
 CONFIG_SND_MPU401_UART=m
 CONFIG_SND_AC97_CODEC=m
 CONFIG_SND_DRIVERS=y
@@ -1305,6 +1248,7 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_OXYGEN is not set
 # CONFIG_SND_CS4281 is not set
 # CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CTXFI is not set
 # CONFIG_SND_DARLA20 is not set
 # CONFIG_SND_GINA20 is not set
 # CONFIG_SND_LAYLA20 is not set
@@ -1317,6 +1261,8 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_INDIGO is not set
 # CONFIG_SND_INDIGOIO is not set
 # CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
 # CONFIG_SND_EMU10K1 is not set
 # CONFIG_SND_EMU10K1X is not set
 # CONFIG_SND_ENS1370 is not set
@@ -1333,6 +1279,7 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_INTEL8X0 is not set
 # CONFIG_SND_INTEL8X0M is not set
 # CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LX6464ES is not set
 # CONFIG_SND_MAESTRO3 is not set
 # CONFIG_SND_MIXART is not set
 # CONFIG_SND_NM256 is not set
@@ -1363,43 +1310,18 @@ CONFIG_HIDRAW=y
 #
 # USB Input Devices
 #
-CONFIG_USB_HID=m
+# CONFIG_USB_HID is not set
 CONFIG_HID_PID=y
-CONFIG_USB_HIDDEV=y
 
 #
 # USB HID Boot Protocol drivers
 #
-# CONFIG_USB_KBD is not set
-# CONFIG_USB_MOUSE is not set
+CONFIG_USB_KBD=y
+CONFIG_USB_MOUSE=y
 
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
-CONFIG_HID_A4TECH=m
-CONFIG_HID_APPLE=m
-CONFIG_HID_BELKIN=m
-CONFIG_HID_BRIGHT=m
-CONFIG_HID_CHERRY=m
-CONFIG_HID_CHICONY=m
-CONFIG_HID_CYPRESS=m
-CONFIG_HID_DELL=m
-CONFIG_HID_EZKEY=m
-CONFIG_HID_GYRATION=m
-CONFIG_HID_LOGITECH=m
-CONFIG_LOGITECH_FF=y
-CONFIG_LOGIRUMBLEPAD2_FF=y
-CONFIG_HID_MICROSOFT=m
-CONFIG_HID_MONTEREY=m
-CONFIG_HID_PANTHERLORD=m
-# CONFIG_PANTHERLORD_FF is not set
-CONFIG_HID_PETALYNX=m
-CONFIG_HID_SAMSUNG=m
-CONFIG_HID_SONY=m
-CONFIG_HID_SUNPLUS=m
-# CONFIG_THRUSTMASTER_FF is not set
-CONFIG_ZEROPLUS_FF=m
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1427,9 +1349,11 @@ CONFIG_USB_WUSB_CBAF=m
 # USB Host Controller Drivers
 #
 CONFIG_USB_C67X00_HCD=m
+# CONFIG_USB_XHCI_HCD is not set
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 CONFIG_USB_EHCI_TT_NEWSCHED=y
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 CONFIG_USB_ISP1760_HCD=m
 CONFIG_USB_OHCI_HCD=y
@@ -1451,18 +1375,17 @@ CONFIG_USB_WDM=m
 CONFIG_USB_TMC=m
 
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 
 #
-# see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1498,7 +1421,6 @@ CONFIG_USB_SEVSEG=m
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1510,72 +1432,32 @@ CONFIG_USB_SEVSEG=m
 CONFIG_USB_ISIGHTFW=m
 CONFIG_USB_VST=m
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=m
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# I2C RTC drivers
-#
-# CONFIG_RTC_DRV_DS1307 is not set
-# CONFIG_RTC_DRV_DS1374 is not set
-# CONFIG_RTC_DRV_DS1672 is not set
-# CONFIG_RTC_DRV_MAX6900 is not set
-# CONFIG_RTC_DRV_RS5C372 is not set
-# CONFIG_RTC_DRV_ISL1208 is not set
-# CONFIG_RTC_DRV_X1205 is not set
-# CONFIG_RTC_DRV_PCF8563 is not set
-# CONFIG_RTC_DRV_PCF8583 is not set
-# CONFIG_RTC_DRV_M41T80 is not set
-# CONFIG_RTC_DRV_S35390A is not set
-# CONFIG_RTC_DRV_FM3130 is not set
-# CONFIG_RTC_DRV_RX8581 is not set
-
-#
-# SPI RTC drivers
-#
-
-#
-# Platform RTC drivers
-#
-CONFIG_RTC_DRV_CMOS=m
-# CONFIG_RTC_DRV_DS1286 is not set
-# CONFIG_RTC_DRV_DS1511 is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_M48T35 is not set
-# CONFIG_RTC_DRV_M48T59 is not set
-# CONFIG_RTC_DRV_BQ4802 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-
-#
-# on-CPU RTC drivers
-#
+# CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 CONFIG_UIO=m
 CONFIG_UIO_CIF=m
 # CONFIG_UIO_PDRV is not set
 # CONFIG_UIO_PDRV_GENIRQ is not set
 # CONFIG_UIO_SMX is not set
+# CONFIG_UIO_AEC is not set
 # CONFIG_UIO_SERCOS3 is not set
+
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
-CONFIG_STAGING_EXCLUDE_BUILD=y
 
 #
 # File systems
@@ -1584,6 +1466,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 CONFIG_EXT2_FS_XIP=y
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 # CONFIG_EXT3_FS_XATTR is not set
 CONFIG_EXT4_FS=m
 CONFIG_EXT4DEV_COMPAT=y
@@ -1592,7 +1475,9 @@ CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_FS_XIP=y
 CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
 CONFIG_JBD2=m
+# CONFIG_JBD2_DEBUG is not set
 CONFIG_FS_MBCACHE=m
 CONFIG_REISERFS_FS=m
 # CONFIG_REISERFS_CHECK is not set
@@ -1600,10 +1485,12 @@ CONFIG_REISERFS_FS=m
 # CONFIG_REISERFS_FS_XATTR is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
-CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1611,6 +1498,12 @@ CONFIG_INOTIFY_USER=y
 CONFIG_AUTOFS_FS=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
 
 #
 # CD-ROM/DVD Filesystems
@@ -1645,10 +1538,7 @@ CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -1658,6 +1548,7 @@ CONFIG_TMPFS=y
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_OMFS_FS=m
@@ -1666,11 +1557,13 @@ CONFIG_OMFS_FS=m
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_NFSD=m
 CONFIG_NFSD_V2_ACL=y
 CONFIG_NFSD_V3=y
@@ -1683,7 +1576,6 @@ CONFIG_NFS_ACL_SUPPORT=m
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=m
 CONFIG_SUNRPC_GSS=m
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=m
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1775,17 +1667,21 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_FRAME_WARN=2048
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_KERNEL is not set
+CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-
-#
-# Tracers
-#
-CONFIG_DYNAMIC_PRINTK_DEBUG=y
+CONFIG_NOP_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_CMDLINE=""
@@ -1804,13 +1700,21 @@ CONFIG_CRYPTO=y
 #
 CONFIG_CRYPTO_FIPS=y
 CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_AEAD=y
-CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 CONFIG_CRYPTO_GF128MUL=m
 # CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=m
 # CONFIG_CRYPTO_TEST is not set
@@ -1879,6 +1783,7 @@ CONFIG_CRYPTO_SEED=m
 # Compression
 #
 CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_ZLIB is not set
 CONFIG_CRYPTO_LZO=m
 
 #
@@ -1886,11 +1791,13 @@ CONFIG_CRYPTO_LZO=m
 #
 CONFIG_CRYPTO_ANSI_CPRNG=m
 # CONFIG_CRYPTO_HW is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=y
 CONFIG_CRC16=m
 # CONFIG_CRC_T10DIF is not set
@@ -1906,7 +1813,7 @@ CONFIG_TEXTSEARCH=y
 CONFIG_TEXTSEARCH_KMP=m
 CONFIG_TEXTSEARCH_BM=m
 CONFIG_TEXTSEARCH_FSM=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 115822876417..f14d38ba6034 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -130,7 +130,6 @@ CONFIG_IP22_CPU_SCACHE=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index 0208723adf28..1fc73aa7b509 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -105,7 +105,6 @@ CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig
index 70a744e9a8c5..539dccb0345d 100644
--- a/arch/mips/configs/ip28_defconfig
+++ b/arch/mips/configs/ip28_defconfig
@@ -123,7 +123,6 @@ CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index de4c7a0a96dd..d934bdefb393 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -118,7 +118,6 @@ CONFIG_RM7000_CPU_SCACHE=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig
index bbacc35d804f..d22df61833a8 100644
--- a/arch/mips/configs/jazz_defconfig
+++ b/arch/mips/configs/jazz_defconfig
@@ -119,7 +119,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig
index bc9159fda728..044074db7e55 100644
--- a/arch/mips/configs/lasat_defconfig
+++ b/arch/mips/configs/lasat_defconfig
@@ -108,7 +108,6 @@ CONFIG_R5000_CPU_SCACHE=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 1ecdd3b65dc7..3f01870b4d65 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -139,7 +139,6 @@ CONFIG_SYS_SUPPORTS_SCHED_SMT=y
 CONFIG_SYS_SUPPORTS_MULTITHREADING=y
 CONFIG_MIPS_MT_FPAFF=y
 # CONFIG_MIPS_VPE_LOADER is not set
-CONFIG_CPU_HAS_LLSC=y
 # CONFIG_CPU_HAS_SMARTMIPS is not set
 CONFIG_CPU_MIPSR2_IRQ_VI=y
 CONFIG_CPU_MIPSR2_IRQ_EI=y
diff --git a/arch/mips/configs/markeins_defconfig b/arch/mips/configs/markeins_defconfig
index bad8901f8f3c..d001f7e87418 100644
--- a/arch/mips/configs/markeins_defconfig
+++ b/arch/mips/configs/markeins_defconfig
@@ -112,7 +112,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 2c0a6314e901..7358454deaa6 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -115,7 +115,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 CONFIG_SYS_SUPPORTS_MULTITHREADING=y
 # CONFIG_MIPS_VPE_LOADER is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig
index 84d6491b3d41..ecbc030b7b6c 100644
--- a/arch/mips/configs/msp71xx_defconfig
+++ b/arch/mips/configs/msp71xx_defconfig
@@ -129,7 +129,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_SYS_SUPPORTS_MULTITHREADING=y
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index fadb351d249b..9477f040796d 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -116,7 +116,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 9e21e333a2fc..be8091ef0a79 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -115,7 +115,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index af67ed4f71ae..e74ba794c789 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -114,7 +114,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index 7956f56cbf3e..1d896fd830da 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -115,7 +115,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pnx8335-stb225_defconfig b/arch/mips/configs/pnx8335-stb225_defconfig
index 2728caa6c2fb..fef4d31c2055 100644
--- a/arch/mips/configs/pnx8335-stb225_defconfig
+++ b/arch/mips/configs/pnx8335-stb225_defconfig
@@ -112,7 +112,6 @@ CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_MIPSR2_IRQ_VI=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 723bd5176a35..e10c7116c3c2 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -112,7 +112,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig
index b5052fb42e9e..5ed3c8dfa0a1 100644
--- a/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/arch/mips/configs/pnx8550-stb810_defconfig
@@ -112,7 +112,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig
index f28dc32974e5..f40c3a04739d 100644
--- a/arch/mips/configs/rb532_defconfig
+++ b/arch/mips/configs/rb532_defconfig
@@ -113,7 +113,6 @@ CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig
index 1efe977497dd..c69813b8488c 100644
--- a/arch/mips/configs/rbtx49xx_defconfig
+++ b/arch/mips/configs/rbtx49xx_defconfig
@@ -142,7 +142,6 @@ CONFIG_CPU_HAS_PREFETCH=y
 CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 0f4da0325ea4..e53b8d096cfc 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -124,7 +124,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index a9acaa2f9da3..7f38c0b956f3 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -133,7 +133,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMP is not set
 # CONFIG_MIPS_MT_SMTC is not set
 CONFIG_SB1_PASS_2_WORKAROUNDS=y
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index fc2c56731b98..06acc7482e4c 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -120,7 +120,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index ea8249c75b3f..69feaf88b510 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -115,7 +115,6 @@ CONFIG_MIPS_MT_DISABLED=y
 # CONFIG_MIPS_MT_SMTC is not set
 # CONFIG_MIPS_VPE_LOADER is not set
 # CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c
index 5a557e268f78..e95ff3054ff6 100644
--- a/arch/mips/dec/prom/memory.c
+++ b/arch/mips/dec/prom/memory.c
@@ -18,7 +18,7 @@
 #include <asm/sections.h>
 
 
-volatile unsigned long mem_err = 0;     /* So we know an error occurred */
+volatile unsigned long mem_err;         /* So we know an error occurred */
 
 /*
  * Probe memory in 4MB chunks, waiting for an error to tell us we've fallen
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 463136e6685a..02f505f23c32 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -18,7 +18,7 @@
 #include <asm/dec/ioasic.h>
 #include <asm/dec/machtype.h>
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
         unsigned int year, mon, day, hour, min, sec, real_year;
         unsigned long flags;
@@ -53,7 +53,8 @@ unsigned long read_persistent_clock(void)
 
         year += real_year - 72 + 2000;
 
-        return mktime(year, mon, day, hour, min, sec);
+        ts->tv_sec = mktime(year, mon, day, hour, min, sec);
+        ts->tv_nsec = 0;
 }
 
 /*
diff --git a/arch/mips/emma/markeins/setup.c b/arch/mips/emma/markeins/setup.c
index 335dc8c1a1bb..9b3f51e5f140 100644
--- a/arch/mips/emma/markeins/setup.c
+++ b/arch/mips/emma/markeins/setup.c
@@ -32,7 +32,7 @@
 
 extern void markeins_led(const char *);
 
-static int bus_frequency = 0;
+static int bus_frequency;
 
 static void markeins_machine_restart(char *command)
 {
diff --git a/arch/mips/fw/arc/Makefile b/arch/mips/fw/arc/Makefile
index 4f349ec1ea2d..e0aaad482b0e 100644
--- a/arch/mips/fw/arc/Makefile
+++ b/arch/mips/fw/arc/Makefile
@@ -8,3 +8,5 @@ lib-y				+= cmdline.o env.o file.o identify.o init.o \
 lib-$(CONFIG_ARC_MEMORY)        += memory.o
 lib-$(CONFIG_ARC_CONSOLE)       += arc_con.o
 lib-$(CONFIG_ARC_PROMLIB)       += promlib.o
+
+EXTRA_CFLAGS                    += -Werror
diff --git a/arch/mips/fw/cfe/cfe_api.c b/arch/mips/fw/cfe/cfe_api.c
index 717db74f7c6e..d06dc5a6b8d3 100644
--- a/arch/mips/fw/cfe/cfe_api.c
+++ b/arch/mips/fw/cfe/cfe_api.c
@@ -45,8 +45,8 @@ int cfe_iocb_dispatch(struct cfe_xiocb *xiocb);
  * passed in two registers each, and CFE expects one.
  */
 
-static int (*cfe_dispfunc) (intptr_t handle, intptr_t xiocb) = 0;
-static u64 cfe_handle = 0;
+static int (*cfe_dispfunc) (intptr_t handle, intptr_t xiocb);
+static u64 cfe_handle;
 
 int cfe_init(u64 handle, u64 ept)
 {
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index eb7f01cfd1ac..dd75d673447e 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -49,7 +49,7 @@
  */
 static __inline__ void atomic_add(int i, atomic_t * v)
 {
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -61,7 +61,7 @@ static __inline__ void atomic_add(int i, atomic_t * v)
                 "       .set    mips0                                   \n"
                 : "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter));
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -94,7 +94,7 @@ static __inline__ void atomic_add(int i, atomic_t * v)
  */
 static __inline__ void atomic_sub(int i, atomic_t * v)
 {
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -106,7 +106,7 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
                 "       .set    mips0                                   \n"
                 : "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter));
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -139,7 +139,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -153,7 +153,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -191,7 +191,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -205,7 +205,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -251,7 +251,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -269,7 +269,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 int temp;
 
                 __asm__ __volatile__(
@@ -428,7 +428,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
  */
 static __inline__ void atomic64_add(long i, atomic64_t * v)
 {
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -440,7 +440,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
                 "       .set    mips0                                   \n"
                 : "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter));
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -473,7 +473,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
  */
 static __inline__ void atomic64_sub(long i, atomic64_t * v)
 {
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -485,7 +485,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
                 "       .set    mips0                                   \n"
                 : "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter));
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -518,7 +518,7 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -532,7 +532,7 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -570,7 +570,7 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -584,7 +584,7 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -630,7 +630,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 long temp;
 
                 __asm__ __volatile__(
@@ -648,7 +648,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 long temp;
 
                 __asm__ __volatile__(
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index b1e9e97a9c78..84a383806b2c 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -61,7 +61,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
         unsigned short bit = nr & SZLONG_MASK;
         unsigned long temp;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     " __LL "%0, %1                  # set_bit       \n"
@@ -72,7 +72,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
                 : "=&r" (temp), "=m" (*m)
                 : "ir" (1UL << bit), "m" (*m));
 #ifdef CONFIG_CPU_MIPSR2
-        } else if (__builtin_constant_p(bit)) {
+        } else if (kernel_uses_llsc && __builtin_constant_p(bit)) {
                 __asm__ __volatile__(
                 "1:     " __LL "%0, %1                  # set_bit       \n"
                 "       " __INS "%0, %4, %2, 1                          \n"
@@ -84,7 +84,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
                 : "=&r" (temp), "=m" (*m)
                 : "ir" (bit), "m" (*m), "r" (~0));
 #endif /* CONFIG_CPU_MIPSR2 */
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     " __LL "%0, %1                  # set_bit       \n"
@@ -126,7 +126,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
         unsigned short bit = nr & SZLONG_MASK;
         unsigned long temp;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     " __LL "%0, %1                  # clear_bit     \n"
@@ -137,7 +137,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
                 : "=&r" (temp), "=m" (*m)
                 : "ir" (~(1UL << bit)), "m" (*m));
 #ifdef CONFIG_CPU_MIPSR2
-        } else if (__builtin_constant_p(bit)) {
+        } else if (kernel_uses_llsc && __builtin_constant_p(bit)) {
                 __asm__ __volatile__(
                 "1:     " __LL "%0, %1                  # clear_bit     \n"
                 "       " __INS "%0, $0, %2, 1                          \n"
@@ -149,7 +149,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
                 : "=&r" (temp), "=m" (*m)
                 : "ir" (bit), "m" (*m));
 #endif /* CONFIG_CPU_MIPSR2 */
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     " __LL "%0, %1                  # clear_bit     \n"
@@ -202,7 +202,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
 {
         unsigned short bit = nr & SZLONG_MASK;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -215,7 +215,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
                 "       .set    mips0                           \n"
                 : "=&r" (temp), "=m" (*m)
                 : "ir" (1UL << bit), "m" (*m));
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -260,7 +260,7 @@ static inline int test_and_set_bit(unsigned long nr,
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -275,7 +275,7 @@ static inline int test_and_set_bit(unsigned long nr,
                 : "=&r" (temp), "=m" (*m), "=&r" (res)
                 : "r" (1UL << bit), "m" (*m)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -328,7 +328,7 @@ static inline int test_and_set_bit_lock(unsigned long nr,
         unsigned short bit = nr & SZLONG_MASK;
         unsigned long res;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -343,7 +343,7 @@ static inline int test_and_set_bit_lock(unsigned long nr,
                 : "=&r" (temp), "=m" (*m), "=&r" (res)
                 : "r" (1UL << bit), "m" (*m)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -397,7 +397,7 @@ static inline int test_and_clear_bit(unsigned long nr,
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -414,7 +414,7 @@ static inline int test_and_clear_bit(unsigned long nr,
                 : "r" (1UL << bit), "m" (*m)
                 : "memory");
 #ifdef CONFIG_CPU_MIPSR2
-        } else if (__builtin_constant_p(nr)) {
+        } else if (kernel_uses_llsc && __builtin_constant_p(nr)) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -431,7 +431,7 @@ static inline int test_and_clear_bit(unsigned long nr,
                 : "ir" (bit), "m" (*m)
                 : "memory");
 #endif
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -487,7 +487,7 @@ static inline int test_and_change_bit(unsigned long nr,
 
         smp_llsc_mb();
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
@@ -502,7 +502,7 @@ static inline int test_and_change_bit(unsigned long nr,
                 : "=&r" (temp), "=m" (*m), "=&r" (res)
                 : "r" (1UL << bit), "m" (*m)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
                 unsigned long temp;
 
diff --git a/arch/mips/include/asm/bootinfo.h b/arch/mips/include/asm/bootinfo.h
index 610fe3af7a03..f5dfaf6a1606 100644
--- a/arch/mips/include/asm/bootinfo.h
+++ b/arch/mips/include/asm/bootinfo.h
@@ -7,6 +7,7 @@
  * Copyright (C) 1995, 1996 Andreas Busse
  * Copyright (C) 1995, 1996 Stoned Elipot
  * Copyright (C) 1995, 1996 Paul M. Antoine.
+ * Copyright (C) 2009       Zhang Le
  */
 #ifndef _ASM_BOOTINFO_H
 #define _ASM_BOOTINFO_H
@@ -57,6 +58,17 @@
 #define MACH_MIKROTIK_RB532     0       /* Mikrotik RouterBoard 532     */
 #define MACH_MIKROTIK_RB532A    1       /* Mikrotik RouterBoard 532A    */
 
+/*
+ * Valid machtype for Loongson family
+ */
+#define MACH_LOONGSON_UNKNOWN  0
+#define MACH_LEMOTE_FL2E       1
+#define MACH_LEMOTE_FL2F       2
+#define MACH_LEMOTE_ML2F7      3
+#define MACH_LEMOTE_YL2F89     4
+#define MACH_DEXXON_GDIUM2F10  5
+#define MACH_LOONGSON_END      6
+
 #define CL_SIZE                 COMMAND_LINE_SIZE
 
 extern char *system_type;
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index 4a812c3ceb90..815a438a268d 100644
--- a/arch/mips/include/asm/cmpxchg.h
+++ b/arch/mips/include/asm/cmpxchg.h
@@ -16,7 +16,7 @@
 ({                                                                      \
         __typeof(*(m)) __ret;                                           \
                                                                         \
-        if (cpu_has_llsc && R10000_LLSC_WAR) {                          \
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {                              \
                 __asm__ __volatile__(                                   \
                 "       .set    push                            \n"     \
                 "       .set    noat                            \n"     \
@@ -33,7 +33,7 @@
                 : "=&r" (__ret), "=R" (*m)                              \
                 : "R" (*m), "Jr" (old), "Jr" (new)                      \
                 : "memory");                                            \
-        } else if (cpu_has_llsc) {                                      \
+        } else if (kernel_uses_llsc) {                                  \
                 __asm__ __volatile__(                                   \
                 "       .set    push                            \n"     \
                 "       .set    noat                            \n"     \
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 8ab1d12ba7f4..1f4df647c384 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -80,6 +80,9 @@
 #ifndef cpu_has_llsc
 #define cpu_has_llsc            (cpu_data[0].options & MIPS_CPU_LLSC)
 #endif
+#ifndef kernel_uses_llsc
+#define kernel_uses_llsc        cpu_has_llsc
+#endif
 #ifndef cpu_has_mips16
 #define cpu_has_mips16          (cpu_data[0].ases & MIPS_ASE_MIPS16)
 #endif
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 3bdc0e3d89cc..4b96d1a36056 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -113,6 +113,12 @@
 
 #define PRID_IMP_BCM4710        0x4000
 #define PRID_IMP_BCM3302        0x9000
+#define PRID_IMP_BCM6338        0x9000
+#define PRID_IMP_BCM6345        0x8000
+#define PRID_IMP_BCM6348        0x9100
+#define PRID_IMP_BCM4350        0xA000
+#define PRID_REV_BCM6358        0x0010
+#define PRID_REV_BCM6368        0x0030
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM
@@ -210,6 +216,7 @@ enum cpu_type_enum {
          */
         CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
         CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
+        CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
 
         /*
          * MIPS64 class processors
diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h
index d2d8949be6b7..e7cd78277c23 100644
--- a/arch/mips/include/asm/delay.h
+++ b/arch/mips/include/asm/delay.h
@@ -11,6 +11,8 @@
 #ifndef _ASM_DELAY_H
 #define _ASM_DELAY_H
 
+#include <linux/param.h>
+
 extern void __delay(unsigned int loops);
 extern void __ndelay(unsigned int ns);
 extern void __udelay(unsigned int us);
diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h
index 0f5caa1307f1..efeddc8db8b1 100644
--- a/arch/mips/include/asm/fixmap.h
+++ b/arch/mips/include/asm/fixmap.h
@@ -67,11 +67,15 @@ enum fixed_addresses {
  * the start of the fixmap, and leave one page empty
  * at the top of mem..
  */
+#ifdef CONFIG_BCM63XX
+#define FIXADDR_TOP     ((unsigned long)(long)(int)0xff000000)
+#else
 #if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX)
 #define FIXADDR_TOP     ((unsigned long)(long)(int)(0xff000000 - 0x20000))
 #else
 #define FIXADDR_TOP     ((unsigned long)(long)(int)0xfffe0000)
 #endif
+#endif
 #define FIXADDR_SIZE    (__end_of_fixed_addresses << PAGE_SHIFT)
 #define FIXADDR_START   (FIXADDR_TOP - FIXADDR_SIZE)
 
diff --git a/arch/mips/include/asm/hardirq.h b/arch/mips/include/asm/hardirq.h
index 90bf399e6dd9..c977a86c2c65 100644
--- a/arch/mips/include/asm/hardirq.h
+++ b/arch/mips/include/asm/hardirq.h
@@ -10,15 +10,9 @@
 #ifndef _ASM_HARDIRQ_H
 #define _ASM_HARDIRQ_H
 
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
 extern void ack_bad_irq(unsigned int irq);
+#define ack_bad_irq ack_bad_irq
+
+#include <asm-generic/hardirq.h>
 
 #endif /* _ASM_HARDIRQ_H */
diff --git a/arch/mips/include/asm/lasat/lasat.h b/arch/mips/include/asm/lasat/lasat.h
index caeba1e302a2..a1ada1c27c16 100644
--- a/arch/mips/include/asm/lasat/lasat.h
+++ b/arch/mips/include/asm/lasat/lasat.h
@@ -227,6 +227,7 @@ extern void lasat_write_eeprom_info(void);
  * It is used for the bit-banging rtc and eeprom drivers */
 
 #include <linux/delay.h>
+#include <linux/smp.h>
 
 /* calculating with the slowest board with 100 MHz clock */
 #define LASAT_100_DIVIDER 20
diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h
index f96fd59e0845..361f4f16c30c 100644
--- a/arch/mips/include/asm/local.h
+++ b/arch/mips/include/asm/local.h
@@ -29,7 +29,7 @@ static __inline__ long local_add_return(long i, local_t * l)
 {
         unsigned long result;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
 
                 __asm__ __volatile__(
@@ -43,7 +43,7 @@ static __inline__ long local_add_return(long i, local_t * l)
                 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
                 : "Ir" (i), "m" (l->a.counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long temp;
 
                 __asm__ __volatile__(
@@ -74,7 +74,7 @@ static __inline__ long local_sub_return(long i, local_t * l)
 {
         unsigned long result;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
 
                 __asm__ __volatile__(
@@ -88,7 +88,7 @@ static __inline__ long local_sub_return(long i, local_t * l)
                 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
                 : "Ir" (i), "m" (l->a.counter)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long temp;
 
                 __asm__ __volatile__(
diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
index 127d4ed9f073..feea00148b5d 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h
@@ -578,6 +578,15 @@ static inline int irq_to_gpio(int irq)
         return alchemy_irq_to_gpio(irq);
 }
 
+static inline int gpio_request(unsigned gpio, const char *label)
+{
+        return 0;
+}
+
+static inline void gpio_free(unsigned gpio)
+{
+}
+
 #endif  /* !CONFIG_ALCHEMY_GPIO_INDIRECT */
 
 
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
new file mode 100644
index 000000000000..fa3e7e617b09
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
@@ -0,0 +1,12 @@
+#ifndef BCM63XX_BOARD_H_
+#define BCM63XX_BOARD_H_
+
+const char *board_get_name(void);
+
+void board_prom_init(void);
+
+void board_setup(void);
+
+int board_register_devices(void);
+
+#endif /* ! BCM63XX_BOARD_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h
new file mode 100644
index 000000000000..8fcf8df4418a
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h
@@ -0,0 +1,11 @@
+#ifndef BCM63XX_CLK_H_
+#define BCM63XX_CLK_H_
+
+struct clk {
+        void            (*set)(struct clk *, int);
+        unsigned int    rate;
+        unsigned int    usage;
+        int             id;
+};
+
+#endif /* ! BCM63XX_CLK_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
new file mode 100644
index 000000000000..b12c4aca2cc9
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -0,0 +1,538 @@
+#ifndef BCM63XX_CPU_H_
+#define BCM63XX_CPU_H_
+
+#include <linux/types.h>
+#include <linux/init.h>
+
+/*
+ * Macro to fetch bcm63xx cpu id and revision, should be optimized at
+ * compile time if only one CPU support is enabled (idea stolen from
+ * arm mach-types)
+ */
+#define BCM6338_CPU_ID          0x6338
+#define BCM6345_CPU_ID          0x6345
+#define BCM6348_CPU_ID          0x6348
+#define BCM6358_CPU_ID          0x6358
+
+void __init bcm63xx_cpu_init(void);
+u16 __bcm63xx_get_cpu_id(void);
+u16 bcm63xx_get_cpu_rev(void);
+unsigned int bcm63xx_get_cpu_freq(void);
+
+#ifdef CONFIG_BCM63XX_CPU_6338
+# ifdef bcm63xx_get_cpu_id
+#  undef bcm63xx_get_cpu_id
+#  define bcm63xx_get_cpu_id()  __bcm63xx_get_cpu_id()
+#  define BCMCPU_RUNTIME_DETECT
+# else
+#  define bcm63xx_get_cpu_id()  BCM6338_CPU_ID
+# endif
+# define BCMCPU_IS_6338()       (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
+#else
+# define BCMCPU_IS_6338()       (0)
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6345
+# ifdef bcm63xx_get_cpu_id
+#  undef bcm63xx_get_cpu_id
+#  define bcm63xx_get_cpu_id()  __bcm63xx_get_cpu_id()
+#  define BCMCPU_RUNTIME_DETECT
+# else
+#  define bcm63xx_get_cpu_id()  BCM6345_CPU_ID
+# endif
+# define BCMCPU_IS_6345()       (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
+#else
+# define BCMCPU_IS_6345()       (0)
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6348
+# ifdef bcm63xx_get_cpu_id
+#  undef bcm63xx_get_cpu_id
+#  define bcm63xx_get_cpu_id()  __bcm63xx_get_cpu_id()
+#  define BCMCPU_RUNTIME_DETECT
+# else
+#  define bcm63xx_get_cpu_id()  BCM6348_CPU_ID
+# endif
+# define BCMCPU_IS_6348()       (bcm63xx_get_cpu_id() == BCM6348_CPU_ID)
+#else
+# define BCMCPU_IS_6348()       (0)
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6358
+# ifdef bcm63xx_get_cpu_id
+#  undef bcm63xx_get_cpu_id
+#  define bcm63xx_get_cpu_id()  __bcm63xx_get_cpu_id()
+#  define BCMCPU_RUNTIME_DETECT
+# else
+#  define bcm63xx_get_cpu_id()  BCM6358_CPU_ID
+# endif
+# define BCMCPU_IS_6358()       (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
+#else
+# define BCMCPU_IS_6358()       (0)
+#endif
+
+#ifndef bcm63xx_get_cpu_id
+#error "No CPU support configured"
+#endif
+
+/*
+ * While registers sets are (mostly) the same across 63xx CPU, base
+ * address of these sets do change.
+ */
+enum bcm63xx_regs_set {
+        RSET_DSL_LMEM = 0,
+        RSET_PERF,
+        RSET_TIMER,
+        RSET_WDT,
+        RSET_UART0,
+        RSET_GPIO,
+        RSET_SPI,
+        RSET_UDC0,
+        RSET_OHCI0,
+        RSET_OHCI_PRIV,
+        RSET_USBH_PRIV,
+        RSET_MPI,
+        RSET_PCMCIA,
+        RSET_DSL,
+        RSET_ENET0,
+        RSET_ENET1,
+        RSET_ENETDMA,
+        RSET_EHCI0,
+        RSET_SDRAM,
+        RSET_MEMC,
+        RSET_DDR,
+};
+
+#define RSET_DSL_LMEM_SIZE              (64 * 1024 * 4)
+#define RSET_DSL_SIZE                   4096
+#define RSET_WDT_SIZE                   12
+#define RSET_ENET_SIZE                  2048
+#define RSET_ENETDMA_SIZE               2048
+#define RSET_UART_SIZE                  24
+#define RSET_UDC_SIZE                   256
+#define RSET_OHCI_SIZE                  256
+#define RSET_EHCI_SIZE                  256
+#define RSET_PCMCIA_SIZE                12
+
+/*
+ * 6338 register sets base address
+ */
+#define BCM_6338_DSL_LMEM_BASE          (0xfff00000)
+#define BCM_6338_PERF_BASE              (0xfffe0000)
+#define BCM_6338_BB_BASE                (0xfffe0100)
+#define BCM_6338_TIMER_BASE             (0xfffe0200)
+#define BCM_6338_WDT_BASE               (0xfffe021c)
+#define BCM_6338_UART0_BASE             (0xfffe0300)
+#define BCM_6338_GPIO_BASE              (0xfffe0400)
+#define BCM_6338_SPI_BASE               (0xfffe0c00)
+#define BCM_6338_UDC0_BASE              (0xdeadbeef)
+#define BCM_6338_USBDMA_BASE            (0xfffe2400)
+#define BCM_6338_OHCI0_BASE             (0xdeadbeef)
+#define BCM_6338_OHCI_PRIV_BASE         (0xfffe3000)
+#define BCM_6338_USBH_PRIV_BASE         (0xdeadbeef)
+#define BCM_6338_MPI_BASE               (0xfffe3160)
+#define BCM_6338_PCMCIA_BASE            (0xdeadbeef)
+#define BCM_6338_SDRAM_REGS_BASE        (0xfffe3100)
+#define BCM_6338_DSL_BASE               (0xfffe1000)
+#define BCM_6338_SAR_BASE               (0xfffe2000)
+#define BCM_6338_UBUS_BASE              (0xdeadbeef)
+#define BCM_6338_ENET0_BASE             (0xfffe2800)
+#define BCM_6338_ENET1_BASE             (0xdeadbeef)
+#define BCM_6338_ENETDMA_BASE           (0xfffe2400)
+#define BCM_6338_EHCI0_BASE             (0xdeadbeef)
+#define BCM_6338_SDRAM_BASE             (0xfffe3100)
+#define BCM_6338_MEMC_BASE              (0xdeadbeef)
+#define BCM_6338_DDR_BASE               (0xdeadbeef)
+
+/*
+ * 6345 register sets base address
+ */
+#define BCM_6345_DSL_LMEM_BASE          (0xfff00000)
+#define BCM_6345_PERF_BASE              (0xfffe0000)
+#define BCM_6345_BB_BASE                (0xfffe0100)
+#define BCM_6345_TIMER_BASE             (0xfffe0200)
+#define BCM_6345_WDT_BASE               (0xfffe021c)
+#define BCM_6345_UART0_BASE             (0xfffe0300)
+#define BCM_6345_GPIO_BASE              (0xfffe0400)
+#define BCM_6345_SPI_BASE               (0xdeadbeef)
+#define BCM_6345_UDC0_BASE              (0xdeadbeef)
+#define BCM_6345_USBDMA_BASE            (0xfffe2800)
+#define BCM_6345_ENET0_BASE             (0xfffe1800)
+#define BCM_6345_ENETDMA_BASE           (0xfffe2800)
+#define BCM_6345_PCMCIA_BASE            (0xfffe2028)
+#define BCM_6345_MPI_BASE               (0xdeadbeef)
+#define BCM_6345_OHCI0_BASE             (0xfffe2100)
+#define BCM_6345_OHCI_PRIV_BASE         (0xfffe2200)
+#define BCM_6345_USBH_PRIV_BASE         (0xdeadbeef)
+#define BCM_6345_SDRAM_REGS_BASE        (0xfffe2300)
+#define BCM_6345_DSL_BASE               (0xdeadbeef)
+#define BCM_6345_SAR_BASE               (0xdeadbeef)
+#define BCM_6345_UBUS_BASE              (0xdeadbeef)
+#define BCM_6345_ENET1_BASE             (0xdeadbeef)
+#define BCM_6345_EHCI0_BASE             (0xdeadbeef)
+#define BCM_6345_SDRAM_BASE             (0xfffe2300)
+#define BCM_6345_MEMC_BASE              (0xdeadbeef)
+#define BCM_6345_DDR_BASE               (0xdeadbeef)
+
+/*
+ * 6348 register sets base address
+ */
+#define BCM_6348_DSL_LMEM_BASE          (0xfff00000)
+#define BCM_6348_PERF_BASE              (0xfffe0000)
+#define BCM_6348_TIMER_BASE             (0xfffe0200)
+#define BCM_6348_WDT_BASE               (0xfffe021c)
+#define BCM_6348_UART0_BASE             (0xfffe0300)
+#define BCM_6348_GPIO_BASE              (0xfffe0400)
+#define BCM_6348_SPI_BASE               (0xfffe0c00)
+#define BCM_6348_UDC0_BASE              (0xfffe1000)
+#define BCM_6348_OHCI0_BASE             (0xfffe1b00)
+#define BCM_6348_OHCI_PRIV_BASE         (0xfffe1c00)
+#define BCM_6348_USBH_PRIV_BASE         (0xdeadbeef)
+#define BCM_6348_MPI_BASE               (0xfffe2000)
+#define BCM_6348_PCMCIA_BASE            (0xfffe2054)
+#define BCM_6348_SDRAM_REGS_BASE        (0xfffe2300)
+#define BCM_6348_DSL_BASE               (0xfffe3000)
+#define BCM_6348_ENET0_BASE             (0xfffe6000)
+#define BCM_6348_ENET1_BASE             (0xfffe6800)
+#define BCM_6348_ENETDMA_BASE           (0xfffe7000)
+#define BCM_6348_EHCI0_BASE             (0xdeadbeef)
+#define BCM_6348_SDRAM_BASE             (0xfffe2300)
+#define BCM_6348_MEMC_BASE              (0xdeadbeef)
+#define BCM_6348_DDR_BASE               (0xdeadbeef)
+
+/*
+ * 6358 register sets base address
+ */
+#define BCM_6358_DSL_LMEM_BASE          (0xfff00000)
+#define BCM_6358_PERF_BASE              (0xfffe0000)
+#define BCM_6358_TIMER_BASE             (0xfffe0040)
+#define BCM_6358_WDT_BASE               (0xfffe005c)
+#define BCM_6358_UART0_BASE             (0xfffe0100)
+#define BCM_6358_GPIO_BASE              (0xfffe0080)
+#define BCM_6358_SPI_BASE               (0xdeadbeef)
+#define BCM_6358_UDC0_BASE              (0xfffe0800)
+#define BCM_6358_OHCI0_BASE             (0xfffe1400)
+#define BCM_6358_OHCI_PRIV_BASE         (0xdeadbeef)
+#define BCM_6358_USBH_PRIV_BASE         (0xfffe1500)
+#define BCM_6358_MPI_BASE               (0xfffe1000)
+#define BCM_6358_PCMCIA_BASE            (0xfffe1054)
+#define BCM_6358_SDRAM_REGS_BASE        (0xfffe2300)
+#define BCM_6358_DSL_BASE               (0xfffe3000)
+#define BCM_6358_ENET0_BASE             (0xfffe4000)
+#define BCM_6358_ENET1_BASE             (0xfffe4800)
+#define BCM_6358_ENETDMA_BASE           (0xfffe5000)
+#define BCM_6358_EHCI0_BASE             (0xfffe1300)
+#define BCM_6358_SDRAM_BASE             (0xdeadbeef)
+#define BCM_6358_MEMC_BASE              (0xfffe1200)
+#define BCM_6358_DDR_BASE               (0xfffe12a0)
+
+
+extern const unsigned long *bcm63xx_regs_base;
+
+static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set)
+{
+#ifdef BCMCPU_RUNTIME_DETECT
+        return bcm63xx_regs_base[set];
+#else
+#ifdef CONFIG_BCM63XX_CPU_6338
+        switch (set) {
+        case RSET_DSL_LMEM:
+                return BCM_6338_DSL_LMEM_BASE;
+        case RSET_PERF:
+                return BCM_6338_PERF_BASE;
+        case RSET_TIMER:
+                return BCM_6338_TIMER_BASE;
+        case RSET_WDT:
+                return BCM_6338_WDT_BASE;
+        case RSET_UART0:
+                return BCM_6338_UART0_BASE;
+        case RSET_GPIO:
+                return BCM_6338_GPIO_BASE;
+        case RSET_SPI:
+                return BCM_6338_SPI_BASE;
+        case RSET_UDC0:
+                return BCM_6338_UDC0_BASE;
+        case RSET_OHCI0:
+                return BCM_6338_OHCI0_BASE;
+        case RSET_OHCI_PRIV:
+                return BCM_6338_OHCI_PRIV_BASE;
+        case RSET_USBH_PRIV:
+                return BCM_6338_USBH_PRIV_BASE;
+        case RSET_MPI:
+                return BCM_6338_MPI_BASE;
+        case RSET_PCMCIA:
+                return BCM_6338_PCMCIA_BASE;
+        case RSET_DSL:
+                return BCM_6338_DSL_BASE;
+        case RSET_ENET0:
+                return BCM_6338_ENET0_BASE;
+        case RSET_ENET1:
+                return BCM_6338_ENET1_BASE;
+        case RSET_ENETDMA:
+                return BCM_6338_ENETDMA_BASE;
+        case RSET_EHCI0:
+                return BCM_6338_EHCI0_BASE;
+        case RSET_SDRAM:
+                return BCM_6338_SDRAM_BASE;
+        case RSET_MEMC:
+                return BCM_6338_MEMC_BASE;
+        case RSET_DDR:
+                return BCM_6338_DDR_BASE;
+        }
+#endif
+#ifdef CONFIG_BCM63XX_CPU_6345
+        switch (set) {
+        case RSET_DSL_LMEM:
+                return BCM_6345_DSL_LMEM_BASE;
+        case RSET_PERF:
+                return BCM_6345_PERF_BASE;
+        case RSET_TIMER:
+                return BCM_6345_TIMER_BASE;
+        case RSET_WDT:
+                return BCM_6345_WDT_BASE;
+        case RSET_UART0:
+                return BCM_6345_UART0_BASE;
+        case RSET_GPIO:
+                return BCM_6345_GPIO_BASE;
+        case RSET_SPI:
+                return BCM_6345_SPI_BASE;
+        case RSET_UDC0:
+                return BCM_6345_UDC0_BASE;
+        case RSET_OHCI0:
+                return BCM_6345_OHCI0_BASE;
+        case RSET_OHCI_PRIV:
+                return BCM_6345_OHCI_PRIV_BASE;
+        case RSET_USBH_PRIV:
+                return BCM_6345_USBH_PRIV_BASE;
+        case RSET_MPI:
+                return BCM_6345_MPI_BASE;
+        case RSET_PCMCIA:
+                return BCM_6345_PCMCIA_BASE;
+        case RSET_DSL:
+                return BCM_6345_DSL_BASE;
+        case RSET_ENET0:
+                return BCM_6345_ENET0_BASE;
+        case RSET_ENET1:
+                return BCM_6345_ENET1_BASE;
+        case RSET_ENETDMA:
+                return BCM_6345_ENETDMA_BASE;
+        case RSET_EHCI0:
+                return BCM_6345_EHCI0_BASE;
+        case RSET_SDRAM:
+                return BCM_6345_SDRAM_BASE;
+        case RSET_MEMC:
+                return BCM_6345_MEMC_BASE;
+        case RSET_DDR:
+                return BCM_6345_DDR_BASE;
+        }
+#endif
+#ifdef CONFIG_BCM63XX_CPU_6348
+        switch (set) {
+        case RSET_DSL_LMEM:
+                return BCM_6348_DSL_LMEM_BASE;
+        case RSET_PERF:
+                return BCM_6348_PERF_BASE;
+        case RSET_TIMER:
+                return BCM_6348_TIMER_BASE;
+        case RSET_WDT:
+                return BCM_6348_WDT_BASE;
+        case RSET_UART0:
+                return BCM_6348_UART0_BASE;
+        case RSET_GPIO:
+                return BCM_6348_GPIO_BASE;
+        case RSET_SPI:
+                return BCM_6348_SPI_BASE;
+        case RSET_UDC0:
+                return BCM_6348_UDC0_BASE;
+        case RSET_OHCI0:
+                return BCM_6348_OHCI0_BASE;
+        case RSET_OHCI_PRIV:
+                return BCM_6348_OHCI_PRIV_BASE;
+        case RSET_USBH_PRIV:
+                return BCM_6348_USBH_PRIV_BASE;
+        case RSET_MPI:
+                return BCM_6348_MPI_BASE;
+        case RSET_PCMCIA:
+                return BCM_6348_PCMCIA_BASE;
+        case RSET_DSL:
+                return BCM_6348_DSL_BASE;
+        case RSET_ENET0:
+                return BCM_6348_ENET0_BASE;
+        case RSET_ENET1:
+                return BCM_6348_ENET1_BASE;
+        case RSET_ENETDMA:
+                return BCM_6348_ENETDMA_BASE;
+        case RSET_EHCI0:
+                return BCM_6348_EHCI0_BASE;
+        case RSET_SDRAM:
+                return BCM_6348_SDRAM_BASE;
+        case RSET_MEMC:
+                return BCM_6348_MEMC_BASE;
+        case RSET_DDR:
+                return BCM_6348_DDR_BASE;
+        }
+#endif
+#ifdef CONFIG_BCM63XX_CPU_6358
+        switch (set) {
+        case RSET_DSL_LMEM:
+                return BCM_6358_DSL_LMEM_BASE;
+        case RSET_PERF:
+                return BCM_6358_PERF_BASE;
+        case RSET_TIMER:
+                return BCM_6358_TIMER_BASE;
+        case RSET_WDT:
+                return BCM_6358_WDT_BASE;
+        case RSET_UART0:
+                return BCM_6358_UART0_BASE;
+        case RSET_GPIO:
+                return BCM_6358_GPIO_BASE;
+        case RSET_SPI:
+                return BCM_6358_SPI_BASE;
+        case RSET_UDC0:
+                return BCM_6358_UDC0_BASE;
+        case RSET_OHCI0:
+                return BCM_6358_OHCI0_BASE;
+        case RSET_OHCI_PRIV:
+                return BCM_6358_OHCI_PRIV_BASE;
+        case RSET_USBH_PRIV:
+                return BCM_6358_USBH_PRIV_BASE;
+        case RSET_MPI:
+                return BCM_6358_MPI_BASE;
+        case RSET_PCMCIA:
+                return BCM_6358_PCMCIA_BASE;
+        case RSET_ENET0:
+                return BCM_6358_ENET0_BASE;
+        case RSET_ENET1:
+                return BCM_6358_ENET1_BASE;
+        case RSET_ENETDMA:
+                return BCM_6358_ENETDMA_BASE;
+        case RSET_DSL:
+                return BCM_6358_DSL_BASE;
+        case RSET_EHCI0:
+                return BCM_6358_EHCI0_BASE;
+        case RSET_SDRAM:
+                return BCM_6358_SDRAM_BASE;
+        case RSET_MEMC:
+                return BCM_6358_MEMC_BASE;
+        case RSET_DDR:
+                return BCM_6358_DDR_BASE;
+        }
+#endif
+#endif
+        /* unreached */
+        return 0;
+}
+
+/*
+ * IRQ number changes across CPU too
+ */
+enum bcm63xx_irq {
+        IRQ_TIMER = 0,
+        IRQ_UART0,
+        IRQ_DSL,
+        IRQ_ENET0,
+        IRQ_ENET1,
+        IRQ_ENET_PHY,
+        IRQ_OHCI0,
+        IRQ_EHCI0,
+        IRQ_PCMCIA0,
+        IRQ_ENET0_RXDMA,
+        IRQ_ENET0_TXDMA,
+        IRQ_ENET1_RXDMA,
+        IRQ_ENET1_TXDMA,
+        IRQ_PCI,
+        IRQ_PCMCIA,
+};
+
+/*
+ * 6338 irqs
+ */
+#define BCM_6338_TIMER_IRQ              (IRQ_INTERNAL_BASE + 0)
+#define BCM_6338_SPI_IRQ                (IRQ_INTERNAL_BASE + 1)
+#define BCM_6338_UART0_IRQ              (IRQ_INTERNAL_BASE + 2)
+#define BCM_6338_DG_IRQ                 (IRQ_INTERNAL_BASE + 4)
+#define BCM_6338_DSL_IRQ                (IRQ_INTERNAL_BASE + 5)
+#define BCM_6338_ATM_IRQ                (IRQ_INTERNAL_BASE + 6)
+#define BCM_6338_UDC0_IRQ               (IRQ_INTERNAL_BASE + 7)
+#define BCM_6338_ENET0_IRQ              (IRQ_INTERNAL_BASE + 8)
+#define BCM_6338_ENET_PHY_IRQ           (IRQ_INTERNAL_BASE + 9)
+#define BCM_6338_SDRAM_IRQ              (IRQ_INTERNAL_BASE + 10)
+#define BCM_6338_USB_CNTL_RX_DMA_IRQ    (IRQ_INTERNAL_BASE + 11)
+#define BCM_6338_USB_CNTL_TX_DMA_IRQ    (IRQ_INTERNAL_BASE + 12)
+#define BCM_6338_USB_BULK_RX_DMA_IRQ    (IRQ_INTERNAL_BASE + 13)
+#define BCM_6338_USB_BULK_TX_DMA_IRQ    (IRQ_INTERNAL_BASE + 14)
+#define BCM_6338_ENET0_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 15)
+#define BCM_6338_ENET0_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 16)
+#define BCM_6338_SDIO_IRQ               (IRQ_INTERNAL_BASE + 17)
+
+/*
+ * 6345 irqs
+ */
+#define BCM_6345_TIMER_IRQ              (IRQ_INTERNAL_BASE + 0)
+#define BCM_6345_UART0_IRQ              (IRQ_INTERNAL_BASE + 2)
+#define BCM_6345_DSL_IRQ                (IRQ_INTERNAL_BASE + 3)
+#define BCM_6345_ATM_IRQ                (IRQ_INTERNAL_BASE + 4)
+#define BCM_6345_USB_IRQ                (IRQ_INTERNAL_BASE + 5)
+#define BCM_6345_ENET0_IRQ              (IRQ_INTERNAL_BASE + 8)
+#define BCM_6345_ENET_PHY_IRQ           (IRQ_INTERNAL_BASE + 12)
+#define BCM_6345_ENET0_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 13 + 1)
+#define BCM_6345_ENET0_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 13 + 2)
+#define BCM_6345_EBI_RX_IRQ             (IRQ_INTERNAL_BASE + 13 + 5)
+#define BCM_6345_EBI_TX_IRQ             (IRQ_INTERNAL_BASE + 13 + 6)
+#define BCM_6345_RESERVED_RX_IRQ        (IRQ_INTERNAL_BASE + 13 + 9)
+#define BCM_6345_RESERVED_TX_IRQ        (IRQ_INTERNAL_BASE + 13 + 10)
+#define BCM_6345_USB_BULK_RX_DMA_IRQ    (IRQ_INTERNAL_BASE + 13 + 13)
+#define BCM_6345_USB_BULK_TX_DMA_IRQ    (IRQ_INTERNAL_BASE + 13 + 14)
+#define BCM_6345_USB_CNTL_RX_DMA_IRQ    (IRQ_INTERNAL_BASE + 13 + 15)
+#define BCM_6345_USB_CNTL_TX_DMA_IRQ    (IRQ_INTERNAL_BASE + 13 + 16)
+#define BCM_6345_USB_ISO_RX_DMA_IRQ     (IRQ_INTERNAL_BASE + 13 + 17)
+#define BCM_6345_USB_ISO_TX_DMA_IRQ     (IRQ_INTERNAL_BASE + 13 + 18)
+
+/*
+ * 6348 irqs
+ */
+#define BCM_6348_TIMER_IRQ              (IRQ_INTERNAL_BASE + 0)
+#define BCM_6348_UART0_IRQ              (IRQ_INTERNAL_BASE + 2)
+#define BCM_6348_DSL_IRQ                (IRQ_INTERNAL_BASE + 4)
+#define BCM_6348_ENET1_IRQ              (IRQ_INTERNAL_BASE + 7)
+#define BCM_6348_ENET0_IRQ              (IRQ_INTERNAL_BASE + 8)
+#define BCM_6348_ENET_PHY_IRQ           (IRQ_INTERNAL_BASE + 9)
+#define BCM_6348_OHCI0_IRQ              (IRQ_INTERNAL_BASE + 12)
+#define BCM_6348_ENET0_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 20)
+#define BCM_6348_ENET0_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 21)
+#define BCM_6348_ENET1_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 22)
+#define BCM_6348_ENET1_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 23)
+#define BCM_6348_PCMCIA_IRQ             (IRQ_INTERNAL_BASE + 24)
+#define BCM_6348_PCI_IRQ                (IRQ_INTERNAL_BASE + 24)
+
+/*
+ * 6358 irqs
+ */
+#define BCM_6358_TIMER_IRQ              (IRQ_INTERNAL_BASE + 0)
+#define BCM_6358_UART0_IRQ              (IRQ_INTERNAL_BASE + 2)
+#define BCM_6358_OHCI0_IRQ              (IRQ_INTERNAL_BASE + 5)
+#define BCM_6358_ENET1_IRQ              (IRQ_INTERNAL_BASE + 6)
+#define BCM_6358_ENET0_IRQ              (IRQ_INTERNAL_BASE + 8)
+#define BCM_6358_ENET_PHY_IRQ           (IRQ_INTERNAL_BASE + 9)
+#define BCM_6358_EHCI0_IRQ              (IRQ_INTERNAL_BASE + 10)
+#define BCM_6358_ENET0_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 15)
+#define BCM_6358_ENET0_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 16)
+#define BCM_6358_ENET1_RXDMA_IRQ        (IRQ_INTERNAL_BASE + 17)
+#define BCM_6358_ENET1_TXDMA_IRQ        (IRQ_INTERNAL_BASE + 18)
+#define BCM_6358_DSL_IRQ                (IRQ_INTERNAL_BASE + 29)
+#define BCM_6358_PCI_IRQ                (IRQ_INTERNAL_BASE + 31)
+#define BCM_6358_PCMCIA_IRQ             (IRQ_INTERNAL_BASE + 24)
+
+extern const int *bcm63xx_irqs;
+
+static inline int bcm63xx_get_irq_number(enum bcm63xx_irq irq)
+{
+        return bcm63xx_irqs[irq];
+}
+
+/*
+ * return installed memory size
+ */
+unsigned int bcm63xx_get_memory_size(void);
+
+#endif /* !BCM63XX_CPU_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cs.h
new file mode 100644
index 000000000000..b1821c866e53
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cs.h
@@ -0,0 +1,10 @@
+#ifndef BCM63XX_CS_H
+#define BCM63XX_CS_H
+
+int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size);
+int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait,
+                           unsigned int setup, unsigned int hold);
+int bcm63xx_set_cs_param(unsigned int cs, u32 flags);
+int bcm63xx_set_cs_status(unsigned int cs, int enable);
+
+#endif /* !BCM63XX_CS_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_dsp.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_dsp.h
new file mode 100644
index 000000000000..b587d45c3045
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_dsp.h
@@ -0,0 +1,13 @@
+#ifndef __BCM63XX_DSP_H
+#define __BCM63XX_DSP_H
+
+struct bcm63xx_dsp_platform_data {
+        unsigned gpio_rst;
+        unsigned gpio_int;
+        unsigned cs;
+        unsigned ext_irq;
+};
+
+int __init bcm63xx_dsp_register(const struct bcm63xx_dsp_platform_data *pd);
+
+#endif /* __BCM63XX_DSP_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
new file mode 100644
index 000000000000..d53f611184b9
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
@@ -0,0 +1,45 @@
+#ifndef BCM63XX_DEV_ENET_H_
+#define BCM63XX_DEV_ENET_H_
+
+#include <linux/if_ether.h>
+#include <linux/init.h>
+
+/*
+ * on board ethernet platform data
+ */
+struct bcm63xx_enet_platform_data {
+        char mac_addr[ETH_ALEN];
+
+        int has_phy;
+
+        /* if has_phy, then set use_internal_phy */
+        int use_internal_phy;
+
+        /* or fill phy info to use an external one */
+        int phy_id;
+        int has_phy_interrupt;
+        int phy_interrupt;
+
+        /* if has_phy, use autonegociated pause parameters or force
+         * them */
+        int pause_auto;
+        int pause_rx;
+        int pause_tx;
+
+        /* if !has_phy, set desired forced speed/duplex */
+        int force_speed_100;
+        int force_duplex_full;
+
+        /* if !has_phy, set callback to perform mii device
+         * init/remove */
+        int (*mii_config)(struct net_device *dev, int probe,
+                          int (*mii_read)(struct net_device *dev,
+                                          int phy_id, int reg),
+                          void (*mii_write)(struct net_device *dev,
+                                            int phy_id, int reg, int val));
+};
+
+int __init bcm63xx_enet_register(int unit,
+                                 const struct bcm63xx_enet_platform_data *pd);
+
+#endif /* ! BCM63XX_DEV_ENET_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_pci.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_pci.h
new file mode 100644
index 000000000000..c549344b70ad
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_pci.h
@@ -0,0 +1,6 @@
+#ifndef BCM63XX_DEV_PCI_H_
+#define BCM63XX_DEV_PCI_H_
+
+extern int bcm63xx_pci_enabled;
+
+#endif /* BCM63XX_DEV_PCI_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
new file mode 100644
index 000000000000..76a0b7216af5
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
@@ -0,0 +1,22 @@
+#ifndef BCM63XX_GPIO_H
+#define BCM63XX_GPIO_H
+
+#include <linux/init.h>
+
+int __init bcm63xx_gpio_init(void);
+
+static inline unsigned long bcm63xx_gpio_count(void)
+{
+        switch (bcm63xx_get_cpu_id()) {
+        case BCM6358_CPU_ID:
+                return 40;
+        case BCM6348_CPU_ID:
+        default:
+                return 37;
+        }
+}
+
+#define GPIO_DIR_OUT    0x0
+#define GPIO_DIR_IN     0x1
+
+#endif /* !BCM63XX_GPIO_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
new file mode 100644
index 000000000000..91180fac6ed9
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
@@ -0,0 +1,93 @@
+#ifndef BCM63XX_IO_H_
+#define BCM63XX_IO_H_
+
+#include "bcm63xx_cpu.h"
+
+/*
+ * Physical memory map, RAM is mapped at 0x0.
+ *
+ * Note that size MUST be a power of two.
+ */
+#define BCM_PCMCIA_COMMON_BASE_PA       (0x20000000)
+#define BCM_PCMCIA_COMMON_SIZE          (16 * 1024 * 1024)
+#define BCM_PCMCIA_COMMON_END_PA        (BCM_PCMCIA_COMMON_BASE_PA +    \
+                                         BCM_PCMCIA_COMMON_SIZE - 1)
+
+#define BCM_PCMCIA_ATTR_BASE_PA         (0x21000000)
+#define BCM_PCMCIA_ATTR_SIZE            (16 * 1024 * 1024)
+#define BCM_PCMCIA_ATTR_END_PA          (BCM_PCMCIA_ATTR_BASE_PA +      \
+                                         BCM_PCMCIA_ATTR_SIZE - 1)
+
+#define BCM_PCMCIA_IO_BASE_PA           (0x22000000)
+#define BCM_PCMCIA_IO_SIZE              (64 * 1024)
+#define BCM_PCMCIA_IO_END_PA            (BCM_PCMCIA_IO_BASE_PA +        \
+                                        BCM_PCMCIA_IO_SIZE - 1)
+
+#define BCM_PCI_MEM_BASE_PA             (0x30000000)
+#define BCM_PCI_MEM_SIZE                (128 * 1024 * 1024)
+#define BCM_PCI_MEM_END_PA              (BCM_PCI_MEM_BASE_PA +          \
+                                        BCM_PCI_MEM_SIZE - 1)
+
+#define BCM_PCI_IO_BASE_PA              (0x08000000)
+#define BCM_PCI_IO_SIZE                 (64 * 1024)
+#define BCM_PCI_IO_END_PA               (BCM_PCI_IO_BASE_PA +           \
+                                        BCM_PCI_IO_SIZE - 1)
+#define BCM_PCI_IO_HALF_PA              (BCM_PCI_IO_BASE_PA +           \
+                                        (BCM_PCI_IO_SIZE / 2) - 1)
+
+#define BCM_CB_MEM_BASE_PA              (0x38000000)
+#define BCM_CB_MEM_SIZE                 (128 * 1024 * 1024)
+#define BCM_CB_MEM_END_PA               (BCM_CB_MEM_BASE_PA +           \
+                                        BCM_CB_MEM_SIZE - 1)
+
+
+/*
+ * Internal registers are accessed through KSEG3
+ */
+#define BCM_REGS_VA(x)  ((void __iomem *)(x))
+
+#define bcm_readb(a)    (*(volatile unsigned char *)    BCM_REGS_VA(a))
+#define bcm_readw(a)    (*(volatile unsigned short *)   BCM_REGS_VA(a))
+#define bcm_readl(a)    (*(volatile unsigned int *)     BCM_REGS_VA(a))
+#define bcm_writeb(v, a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v))
+#define bcm_writew(v, a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v))
+#define bcm_writel(v, a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v))
+
+/*
+ * IO helpers to access register set for current CPU
+ */
+#define bcm_rset_readb(s, o)    bcm_readb(bcm63xx_regset_address(s) + (o))
+#define bcm_rset_readw(s, o)    bcm_readw(bcm63xx_regset_address(s) + (o))
+#define bcm_rset_readl(s, o)    bcm_readl(bcm63xx_regset_address(s) + (o))
+#define bcm_rset_writeb(s, v, o)        bcm_writeb((v), \
+                                        bcm63xx_regset_address(s) + (o))
+#define bcm_rset_writew(s, v, o)        bcm_writew((v), \
+                                        bcm63xx_regset_address(s) + (o))
+#define bcm_rset_writel(s, v, o)        bcm_writel((v), \
+                                        bcm63xx_regset_address(s) + (o))
+
+/*
+ * helpers for frequently used register sets
+ */
+#define bcm_perf_readl(o)       bcm_rset_readl(RSET_PERF, (o))
+#define bcm_perf_writel(v, o)   bcm_rset_writel(RSET_PERF, (v), (o))
+#define bcm_timer_readl(o)      bcm_rset_readl(RSET_TIMER, (o))
+#define bcm_timer_writel(v, o)  bcm_rset_writel(RSET_TIMER, (v), (o))
+#define bcm_wdt_readl(o)        bcm_rset_readl(RSET_WDT, (o))
+#define bcm_wdt_writel(v, o)    bcm_rset_writel(RSET_WDT, (v), (o))
+#define bcm_gpio_readl(o)       bcm_rset_readl(RSET_GPIO, (o))
+#define bcm_gpio_writel(v, o)   bcm_rset_writel(RSET_GPIO, (v), (o))
+#define bcm_uart0_readl(o)      bcm_rset_readl(RSET_UART0, (o))
+#define bcm_uart0_writel(v, o)  bcm_rset_writel(RSET_UART0, (v), (o))
+#define bcm_mpi_readl(o)        bcm_rset_readl(RSET_MPI, (o))
+#define bcm_mpi_writel(v, o)    bcm_rset_writel(RSET_MPI, (v), (o))
+#define bcm_pcmcia_readl(o)     bcm_rset_readl(RSET_PCMCIA, (o))
+#define bcm_pcmcia_writel(v, o) bcm_rset_writel(RSET_PCMCIA, (v), (o))
+#define bcm_sdram_readl(o)      bcm_rset_readl(RSET_SDRAM, (o))
+#define bcm_sdram_writel(v, o)  bcm_rset_writel(RSET_SDRAM, (v), (o))
+#define bcm_memc_readl(o)       bcm_rset_readl(RSET_MEMC, (o))
+#define bcm_memc_writel(v, o)   bcm_rset_writel(RSET_MEMC, (v), (o))
+#define bcm_ddr_readl(o)        bcm_rset_readl(RSET_DDR, (o))
+#define bcm_ddr_writel(v, o)    bcm_rset_writel(RSET_DDR, (v), (o))
+
+#endif /* ! BCM63XX_IO_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
new file mode 100644
index 000000000000..5f95577c8213
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
@@ -0,0 +1,15 @@
+#ifndef BCM63XX_IRQ_H_
+#define BCM63XX_IRQ_H_
+
+#include <bcm63xx_cpu.h>
+
+#define IRQ_MIPS_BASE                   0
+#define IRQ_INTERNAL_BASE               8
+
+#define IRQ_EXT_BASE                    (IRQ_MIPS_BASE + 3)
+#define IRQ_EXT_0                       (IRQ_EXT_BASE + 0)
+#define IRQ_EXT_1                       (IRQ_EXT_BASE + 1)
+#define IRQ_EXT_2                       (IRQ_EXT_BASE + 2)
+#define IRQ_EXT_3                       (IRQ_EXT_BASE + 3)
+
+#endif /* ! BCM63XX_IRQ_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
new file mode 100644
index 000000000000..ed4ccec87dd4
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -0,0 +1,773 @@
+#ifndef BCM63XX_REGS_H_
+#define BCM63XX_REGS_H_
+
+/*************************************************************************
+ * _REG relative to RSET_PERF
+ *************************************************************************/
+
+/* Chip Identifier / Revision register */
+#define PERF_REV_REG                    0x0
+#define REV_CHIPID_SHIFT                16
+#define REV_CHIPID_MASK                 (0xffff << REV_CHIPID_SHIFT)
+#define REV_REVID_SHIFT                 0
+#define REV_REVID_MASK                  (0xffff << REV_REVID_SHIFT)
+
+/* Clock Control register */
+#define PERF_CKCTL_REG                  0x4
+
+#define CKCTL_6338_ADSLPHY_EN           (1 << 0)
+#define CKCTL_6338_MPI_EN               (1 << 1)
+#define CKCTL_6338_DRAM_EN              (1 << 2)
+#define CKCTL_6338_ENET_EN              (1 << 4)
+#define CKCTL_6338_USBS_EN              (1 << 4)
+#define CKCTL_6338_SAR_EN               (1 << 5)
+#define CKCTL_6338_SPI_EN               (1 << 9)
+
+#define CKCTL_6338_ALL_SAFE_EN          (CKCTL_6338_ADSLPHY_EN |        \
+                                        CKCTL_6338_MPI_EN |             \
+                                        CKCTL_6338_ENET_EN |            \
+                                        CKCTL_6338_SAR_EN |             \
+                                        CKCTL_6338_SPI_EN)
+
+#define CKCTL_6345_CPU_EN               (1 << 0)
+#define CKCTL_6345_BUS_EN               (1 << 1)
+#define CKCTL_6345_EBI_EN               (1 << 2)
+#define CKCTL_6345_UART_EN              (1 << 3)
+#define CKCTL_6345_ADSLPHY_EN           (1 << 4)
+#define CKCTL_6345_ENET_EN              (1 << 7)
+#define CKCTL_6345_USBH_EN              (1 << 8)
+
+#define CKCTL_6345_ALL_SAFE_EN          (CKCTL_6345_ENET_EN |   \
+                                        CKCTL_6345_USBH_EN |    \
+                                        CKCTL_6345_ADSLPHY_EN)
+
+#define CKCTL_6348_ADSLPHY_EN           (1 << 0)
+#define CKCTL_6348_MPI_EN               (1 << 1)
+#define CKCTL_6348_SDRAM_EN             (1 << 2)
+#define CKCTL_6348_M2M_EN               (1 << 3)
+#define CKCTL_6348_ENET_EN              (1 << 4)
+#define CKCTL_6348_SAR_EN               (1 << 5)
+#define CKCTL_6348_USBS_EN              (1 << 6)
+#define CKCTL_6348_USBH_EN              (1 << 8)
+#define CKCTL_6348_SPI_EN               (1 << 9)
+
+#define CKCTL_6348_ALL_SAFE_EN          (CKCTL_6348_ADSLPHY_EN |        \
+                                        CKCTL_6348_M2M_EN |             \
+                                        CKCTL_6348_ENET_EN |            \
+                                        CKCTL_6348_SAR_EN |             \
+                                        CKCTL_6348_USBS_EN |            \
+                                        CKCTL_6348_USBH_EN |            \
+                                        CKCTL_6348_SPI_EN)
+
+#define CKCTL_6358_ENET_EN              (1 << 4)
+#define CKCTL_6358_ADSLPHY_EN           (1 << 5)
+#define CKCTL_6358_PCM_EN               (1 << 8)
+#define CKCTL_6358_SPI_EN               (1 << 9)
+#define CKCTL_6358_USBS_EN              (1 << 10)
+#define CKCTL_6358_SAR_EN               (1 << 11)
+#define CKCTL_6358_EMUSB_EN             (1 << 17)
+#define CKCTL_6358_ENET0_EN             (1 << 18)
+#define CKCTL_6358_ENET1_EN             (1 << 19)
+#define CKCTL_6358_USBSU_EN             (1 << 20)
+#define CKCTL_6358_EPHY_EN              (1 << 21)
+
+#define CKCTL_6358_ALL_SAFE_EN          (CKCTL_6358_ENET_EN |           \
+                                        CKCTL_6358_ADSLPHY_EN |         \
+                                        CKCTL_6358_PCM_EN |             \
+                                        CKCTL_6358_SPI_EN |             \
+                                        CKCTL_6358_USBS_EN |            \
+                                        CKCTL_6358_SAR_EN |             \
+                                        CKCTL_6358_EMUSB_EN |           \
+                                        CKCTL_6358_ENET0_EN |           \
+                                        CKCTL_6358_ENET1_EN |           \
+                                        CKCTL_6358_USBSU_EN |           \
+                                        CKCTL_6358_EPHY_EN)
+
+/* System PLL Control register  */
+#define PERF_SYS_PLL_CTL_REG            0x8
+#define SYS_PLL_SOFT_RESET              0x1
+
+/* Interrupt Mask register */
+#define PERF_IRQMASK_REG                0xc
+#define PERF_IRQSTAT_REG                0x10
+
+/* Interrupt Status register */
+#define PERF_IRQSTAT_REG                0x10
+
+/* External Interrupt Configuration register */
+#define PERF_EXTIRQ_CFG_REG             0x14
+#define EXTIRQ_CFG_SENSE(x)             (1 << (x))
+#define EXTIRQ_CFG_STAT(x)              (1 << (x + 5))
+#define EXTIRQ_CFG_CLEAR(x)             (1 << (x + 10))
+#define EXTIRQ_CFG_MASK(x)              (1 << (x + 15))
+#define EXTIRQ_CFG_BOTHEDGE(x)          (1 << (x + 20))
+#define EXTIRQ_CFG_LEVELSENSE(x)        (1 << (x + 25))
+
+#define EXTIRQ_CFG_CLEAR_ALL            (0xf << 10)
+#define EXTIRQ_CFG_MASK_ALL             (0xf << 15)
+
+/* Soft Reset register */
+#define PERF_SOFTRESET_REG              0x28
+
+#define SOFTRESET_6338_SPI_MASK         (1 << 0)
+#define SOFTRESET_6338_ENET_MASK        (1 << 2)
+#define SOFTRESET_6338_USBH_MASK        (1 << 3)
+#define SOFTRESET_6338_USBS_MASK        (1 << 4)
+#define SOFTRESET_6338_ADSL_MASK        (1 << 5)
+#define SOFTRESET_6338_DMAMEM_MASK      (1 << 6)
+#define SOFTRESET_6338_SAR_MASK         (1 << 7)
+#define SOFTRESET_6338_ACLC_MASK        (1 << 8)
+#define SOFTRESET_6338_ADSLMIPSPLL_MASK (1 << 10)
+#define SOFTRESET_6338_ALL       (SOFTRESET_6338_SPI_MASK |             \
+                                  SOFTRESET_6338_ENET_MASK |            \
+                                  SOFTRESET_6338_USBH_MASK |            \
+                                  SOFTRESET_6338_USBS_MASK |            \
+                                  SOFTRESET_6338_ADSL_MASK |            \
+                                  SOFTRESET_6338_DMAMEM_MASK |          \
+                                  SOFTRESET_6338_SAR_MASK |             \
+                                  SOFTRESET_6338_ACLC_MASK |            \
+                                  SOFTRESET_6338_ADSLMIPSPLL_MASK)
+
+#define SOFTRESET_6348_SPI_MASK         (1 << 0)
+#define SOFTRESET_6348_ENET_MASK        (1 << 2)
+#define SOFTRESET_6348_USBH_MASK        (1 << 3)
+#define SOFTRESET_6348_USBS_MASK        (1 << 4)
+#define SOFTRESET_6348_ADSL_MASK        (1 << 5)
+#define SOFTRESET_6348_DMAMEM_MASK      (1 << 6)
+#define SOFTRESET_6348_SAR_MASK         (1 << 7)
+#define SOFTRESET_6348_ACLC_MASK        (1 << 8)
+#define SOFTRESET_6348_ADSLMIPSPLL_MASK (1 << 10)
+
+#define SOFTRESET_6348_ALL       (SOFTRESET_6348_SPI_MASK |             \
+                                  SOFTRESET_6348_ENET_MASK |            \
+                                  SOFTRESET_6348_USBH_MASK |            \
+                                  SOFTRESET_6348_USBS_MASK |            \
+                                  SOFTRESET_6348_ADSL_MASK |            \
+                                  SOFTRESET_6348_DMAMEM_MASK |          \
+                                  SOFTRESET_6348_SAR_MASK |             \
+                                  SOFTRESET_6348_ACLC_MASK |            \
+                                  SOFTRESET_6348_ADSLMIPSPLL_MASK)
+
+/* MIPS PLL control register */
+#define PERF_MIPSPLLCTL_REG             0x34
+#define MIPSPLLCTL_N1_SHIFT             20
+#define MIPSPLLCTL_N1_MASK              (0x7 << MIPSPLLCTL_N1_SHIFT)
+#define MIPSPLLCTL_N2_SHIFT             15
+#define MIPSPLLCTL_N2_MASK              (0x1f << MIPSPLLCTL_N2_SHIFT)
+#define MIPSPLLCTL_M1REF_SHIFT          12
+#define MIPSPLLCTL_M1REF_MASK           (0x7 << MIPSPLLCTL_M1REF_SHIFT)
+#define MIPSPLLCTL_M2REF_SHIFT          9
+#define MIPSPLLCTL_M2REF_MASK           (0x7 << MIPSPLLCTL_M2REF_SHIFT)
+#define MIPSPLLCTL_M1CPU_SHIFT          6
+#define MIPSPLLCTL_M1CPU_MASK           (0x7 << MIPSPLLCTL_M1CPU_SHIFT)
+#define MIPSPLLCTL_M1BUS_SHIFT          3
+#define MIPSPLLCTL_M1BUS_MASK           (0x7 << MIPSPLLCTL_M1BUS_SHIFT)
+#define MIPSPLLCTL_M2BUS_SHIFT          0
+#define MIPSPLLCTL_M2BUS_MASK           (0x7 << MIPSPLLCTL_M2BUS_SHIFT)
+
+/* ADSL PHY PLL Control register */
+#define PERF_ADSLPLLCTL_REG             0x38
+#define ADSLPLLCTL_N1_SHIFT             20
+#define ADSLPLLCTL_N1_MASK              (0x7 << ADSLPLLCTL_N1_SHIFT)
+#define ADSLPLLCTL_N2_SHIFT             15
+#define ADSLPLLCTL_N2_MASK              (0x1f << ADSLPLLCTL_N2_SHIFT)
+#define ADSLPLLCTL_M1REF_SHIFT          12
+#define ADSLPLLCTL_M1REF_MASK           (0x7 << ADSLPLLCTL_M1REF_SHIFT)
+#define ADSLPLLCTL_M2REF_SHIFT          9
+#define ADSLPLLCTL_M2REF_MASK           (0x7 << ADSLPLLCTL_M2REF_SHIFT)
+#define ADSLPLLCTL_M1CPU_SHIFT          6
+#define ADSLPLLCTL_M1CPU_MASK           (0x7 << ADSLPLLCTL_M1CPU_SHIFT)
+#define ADSLPLLCTL_M1BUS_SHIFT          3
+#define ADSLPLLCTL_M1BUS_MASK           (0x7 << ADSLPLLCTL_M1BUS_SHIFT)
+#define ADSLPLLCTL_M2BUS_SHIFT          0
+#define ADSLPLLCTL_M2BUS_MASK           (0x7 << ADSLPLLCTL_M2BUS_SHIFT)
+
+#define ADSLPLLCTL_VAL(n1, n2, m1ref, m2ref, m1cpu, m1bus, m2bus)       \
+                                (((n1) << ADSLPLLCTL_N1_SHIFT) |        \
+                                ((n2) << ADSLPLLCTL_N2_SHIFT) |         \
+                                ((m1ref) << ADSLPLLCTL_M1REF_SHIFT) |   \
+                                ((m2ref) << ADSLPLLCTL_M2REF_SHIFT) |   \
+                                ((m1cpu) << ADSLPLLCTL_M1CPU_SHIFT) |   \
+                                ((m1bus) << ADSLPLLCTL_M1BUS_SHIFT) |   \
+                                ((m2bus) << ADSLPLLCTL_M2BUS_SHIFT))
+
+
+/*************************************************************************
+ * _REG relative to RSET_TIMER
+ *************************************************************************/
+
+#define BCM63XX_TIMER_COUNT             4
+#define TIMER_T0_ID                     0
+#define TIMER_T1_ID                     1
+#define TIMER_T2_ID                     2
+#define TIMER_WDT_ID                    3
+
+/* Timer irqstat register */
+#define TIMER_IRQSTAT_REG               0
+#define TIMER_IRQSTAT_TIMER_CAUSE(x)    (1 << (x))
+#define TIMER_IRQSTAT_TIMER0_CAUSE      (1 << 0)
+#define TIMER_IRQSTAT_TIMER1_CAUSE      (1 << 1)
+#define TIMER_IRQSTAT_TIMER2_CAUSE      (1 << 2)
+#define TIMER_IRQSTAT_WDT_CAUSE         (1 << 3)
+#define TIMER_IRQSTAT_TIMER_IR_EN(x)    (1 << ((x) + 8))
+#define TIMER_IRQSTAT_TIMER0_IR_EN      (1 << 8)
+#define TIMER_IRQSTAT_TIMER1_IR_EN      (1 << 9)
+#define TIMER_IRQSTAT_TIMER2_IR_EN      (1 << 10)
+
+/* Timer control register */
+#define TIMER_CTLx_REG(x)               (0x4 + (x * 4))
+#define TIMER_CTL0_REG                  0x4
+#define TIMER_CTL1_REG                  0x8
+#define TIMER_CTL2_REG                  0xC
+#define TIMER_CTL_COUNTDOWN_MASK        (0x3fffffff)
+#define TIMER_CTL_MONOTONIC_MASK        (1 << 30)
+#define TIMER_CTL_ENABLE_MASK           (1 << 31)
+
+
+/*************************************************************************
+ * _REG relative to RSET_WDT
+ *************************************************************************/
+
+/* Watchdog default count register */
+#define WDT_DEFVAL_REG                  0x0
+
+/* Watchdog control register */
+#define WDT_CTL_REG                     0x4
+
+/* Watchdog control register constants */
+#define WDT_START_1                     (0xff00)
+#define WDT_START_2                     (0x00ff)
+#define WDT_STOP_1                      (0xee00)
+#define WDT_STOP_2                      (0x00ee)
+
+/* Watchdog reset length register */
+#define WDT_RSTLEN_REG                  0x8
+
+
+/*************************************************************************
+ * _REG relative to RSET_UARTx
+ *************************************************************************/
+
+/* UART Control Register */
+#define UART_CTL_REG                    0x0
+#define UART_CTL_RXTMOUTCNT_SHIFT       0
+#define UART_CTL_RXTMOUTCNT_MASK        (0x1f << UART_CTL_RXTMOUTCNT_SHIFT)
+#define UART_CTL_RSTTXDN_SHIFT          5
+#define UART_CTL_RSTTXDN_MASK           (1 << UART_CTL_RSTTXDN_SHIFT)
+#define UART_CTL_RSTRXFIFO_SHIFT                6
+#define UART_CTL_RSTRXFIFO_MASK         (1 << UART_CTL_RSTRXFIFO_SHIFT)
+#define UART_CTL_RSTTXFIFO_SHIFT                7
+#define UART_CTL_RSTTXFIFO_MASK         (1 << UART_CTL_RSTTXFIFO_SHIFT)
+#define UART_CTL_STOPBITS_SHIFT         8
+#define UART_CTL_STOPBITS_MASK          (0xf << UART_CTL_STOPBITS_SHIFT)
+#define UART_CTL_STOPBITS_1             (0x7 << UART_CTL_STOPBITS_SHIFT)
+#define UART_CTL_STOPBITS_2             (0xf << UART_CTL_STOPBITS_SHIFT)
+#define UART_CTL_BITSPERSYM_SHIFT       12
+#define UART_CTL_BITSPERSYM_MASK        (0x3 << UART_CTL_BITSPERSYM_SHIFT)
+#define UART_CTL_XMITBRK_SHIFT          14
+#define UART_CTL_XMITBRK_MASK           (1 << UART_CTL_XMITBRK_SHIFT)
+#define UART_CTL_RSVD_SHIFT             15
+#define UART_CTL_RSVD_MASK              (1 << UART_CTL_RSVD_SHIFT)
+#define UART_CTL_RXPAREVEN_SHIFT                16
+#define UART_CTL_RXPAREVEN_MASK         (1 << UART_CTL_RXPAREVEN_SHIFT)
+#define UART_CTL_RXPAREN_SHIFT          17
+#define UART_CTL_RXPAREN_MASK           (1 << UART_CTL_RXPAREN_SHIFT)
+#define UART_CTL_TXPAREVEN_SHIFT                18
+#define UART_CTL_TXPAREVEN_MASK         (1 << UART_CTL_TXPAREVEN_SHIFT)
+#define UART_CTL_TXPAREN_SHIFT          18
+#define UART_CTL_TXPAREN_MASK           (1 << UART_CTL_TXPAREN_SHIFT)
+#define UART_CTL_LOOPBACK_SHIFT         20
+#define UART_CTL_LOOPBACK_MASK          (1 << UART_CTL_LOOPBACK_SHIFT)
+#define UART_CTL_RXEN_SHIFT             21
+#define UART_CTL_RXEN_MASK              (1 << UART_CTL_RXEN_SHIFT)
+#define UART_CTL_TXEN_SHIFT             22
+#define UART_CTL_TXEN_MASK              (1 << UART_CTL_TXEN_SHIFT)
+#define UART_CTL_BRGEN_SHIFT            23
+#define UART_CTL_BRGEN_MASK             (1 << UART_CTL_BRGEN_SHIFT)
+
+/* UART Baudword register */
+#define UART_BAUD_REG                   0x4
+
+/* UART Misc Control register */
+#define UART_MCTL_REG                   0x8
+#define UART_MCTL_DTR_SHIFT             0
+#define UART_MCTL_DTR_MASK              (1 << UART_MCTL_DTR_SHIFT)
+#define UART_MCTL_RTS_SHIFT             1
+#define UART_MCTL_RTS_MASK              (1 << UART_MCTL_RTS_SHIFT)
+#define UART_MCTL_RXFIFOTHRESH_SHIFT    8
+#define UART_MCTL_RXFIFOTHRESH_MASK     (0xf << UART_MCTL_RXFIFOTHRESH_SHIFT)
+#define UART_MCTL_TXFIFOTHRESH_SHIFT    12
+#define UART_MCTL_TXFIFOTHRESH_MASK     (0xf << UART_MCTL_TXFIFOTHRESH_SHIFT)
+#define UART_MCTL_RXFIFOFILL_SHIFT      16
+#define UART_MCTL_RXFIFOFILL_MASK       (0x1f << UART_MCTL_RXFIFOFILL_SHIFT)
+#define UART_MCTL_TXFIFOFILL_SHIFT      24
+#define UART_MCTL_TXFIFOFILL_MASK       (0x1f << UART_MCTL_TXFIFOFILL_SHIFT)
+
+/* UART External Input Configuration register */
+#define UART_EXTINP_REG                 0xc
+#define UART_EXTINP_RI_SHIFT            0
+#define UART_EXTINP_RI_MASK             (1 << UART_EXTINP_RI_SHIFT)
+#define UART_EXTINP_CTS_SHIFT           1
+#define UART_EXTINP_CTS_MASK            (1 << UART_EXTINP_CTS_SHIFT)
+#define UART_EXTINP_DCD_SHIFT           2
+#define UART_EXTINP_DCD_MASK            (1 << UART_EXTINP_DCD_SHIFT)
+#define UART_EXTINP_DSR_SHIFT           3
+#define UART_EXTINP_DSR_MASK            (1 << UART_EXTINP_DSR_SHIFT)
+#define UART_EXTINP_IRSTAT(x)           (1 << (x + 4))
+#define UART_EXTINP_IRMASK(x)           (1 << (x + 8))
+#define UART_EXTINP_IR_RI               0
+#define UART_EXTINP_IR_CTS              1
+#define UART_EXTINP_IR_DCD              2
+#define UART_EXTINP_IR_DSR              3
+#define UART_EXTINP_RI_NOSENSE_SHIFT    16
+#define UART_EXTINP_RI_NOSENSE_MASK     (1 << UART_EXTINP_RI_NOSENSE_SHIFT)
+#define UART_EXTINP_CTS_NOSENSE_SHIFT   17
+#define UART_EXTINP_CTS_NOSENSE_MASK    (1 << UART_EXTINP_CTS_NOSENSE_SHIFT)
+#define UART_EXTINP_DCD_NOSENSE_SHIFT   18
+#define UART_EXTINP_DCD_NOSENSE_MASK    (1 << UART_EXTINP_DCD_NOSENSE_SHIFT)
+#define UART_EXTINP_DSR_NOSENSE_SHIFT   19
+#define UART_EXTINP_DSR_NOSENSE_MASK    (1 << UART_EXTINP_DSR_NOSENSE_SHIFT)
+
+/* UART Interrupt register */
+#define UART_IR_REG                     0x10
+#define UART_IR_MASK(x)                 (1 << (x + 16))
+#define UART_IR_STAT(x)                 (1 << (x))
+#define UART_IR_EXTIP                   0
+#define UART_IR_TXUNDER                 1
+#define UART_IR_TXOVER                  2
+#define UART_IR_TXTRESH                 3
+#define UART_IR_TXRDLATCH               4
+#define UART_IR_TXEMPTY                 5
+#define UART_IR_RXUNDER                 6
+#define UART_IR_RXOVER                  7
+#define UART_IR_RXTIMEOUT               8
+#define UART_IR_RXFULL                  9
+#define UART_IR_RXTHRESH                10
+#define UART_IR_RXNOTEMPTY              11
+#define UART_IR_RXFRAMEERR              12
+#define UART_IR_RXPARERR                13
+#define UART_IR_RXBRK                   14
+#define UART_IR_TXDONE                  15
+
+/* UART Fifo register */
+#define UART_FIFO_REG                   0x14
+#define UART_FIFO_VALID_SHIFT           0
+#define UART_FIFO_VALID_MASK            0xff
+#define UART_FIFO_FRAMEERR_SHIFT        8
+#define UART_FIFO_FRAMEERR_MASK         (1 << UART_FIFO_FRAMEERR_SHIFT)
+#define UART_FIFO_PARERR_SHIFT          9
+#define UART_FIFO_PARERR_MASK           (1 << UART_FIFO_PARERR_SHIFT)
+#define UART_FIFO_BRKDET_SHIFT          10
+#define UART_FIFO_BRKDET_MASK           (1 << UART_FIFO_BRKDET_SHIFT)
+#define UART_FIFO_ANYERR_MASK           (UART_FIFO_FRAMEERR_MASK |      \
+                                        UART_FIFO_PARERR_MASK |         \
+                                        UART_FIFO_BRKDET_MASK)
+
+
+/*************************************************************************
+ * _REG relative to RSET_GPIO
+ *************************************************************************/
+
+/* GPIO registers */
+#define GPIO_CTL_HI_REG                 0x0
+#define GPIO_CTL_LO_REG                 0x4
+#define GPIO_DATA_HI_REG                0x8
+#define GPIO_DATA_LO_REG                0xC
+
+/* GPIO mux registers and constants */
+#define GPIO_MODE_REG                   0x18
+
+#define GPIO_MODE_6348_G4_DIAG          0x00090000
+#define GPIO_MODE_6348_G4_UTOPIA        0x00080000
+#define GPIO_MODE_6348_G4_LEGACY_LED    0x00030000
+#define GPIO_MODE_6348_G4_MII_SNOOP     0x00020000
+#define GPIO_MODE_6348_G4_EXT_EPHY      0x00010000
+#define GPIO_MODE_6348_G3_DIAG          0x00009000
+#define GPIO_MODE_6348_G3_UTOPIA        0x00008000
+#define GPIO_MODE_6348_G3_EXT_MII       0x00007000
+#define GPIO_MODE_6348_G2_DIAG          0x00000900
+#define GPIO_MODE_6348_G2_PCI           0x00000500
+#define GPIO_MODE_6348_G1_DIAG          0x00000090
+#define GPIO_MODE_6348_G1_UTOPIA        0x00000080
+#define GPIO_MODE_6348_G1_SPI_UART      0x00000060
+#define GPIO_MODE_6348_G1_SPI_MASTER    0x00000060
+#define GPIO_MODE_6348_G1_MII_PCCARD    0x00000040
+#define GPIO_MODE_6348_G1_MII_SNOOP     0x00000020
+#define GPIO_MODE_6348_G1_EXT_EPHY      0x00000010
+#define GPIO_MODE_6348_G0_DIAG          0x00000009
+#define GPIO_MODE_6348_G0_EXT_MII       0x00000007
+
+#define GPIO_MODE_6358_EXTRACS          (1 << 5)
+#define GPIO_MODE_6358_UART1            (1 << 6)
+#define GPIO_MODE_6358_EXTRA_SPI_SS     (1 << 7)
+#define GPIO_MODE_6358_SERIAL_LED       (1 << 10)
+#define GPIO_MODE_6358_UTOPIA           (1 << 12)
+
+
+/*************************************************************************
+ * _REG relative to RSET_ENET
+ *************************************************************************/
+
+/* Receiver Configuration register */
+#define ENET_RXCFG_REG                  0x0
+#define ENET_RXCFG_ALLMCAST_SHIFT       1
+#define ENET_RXCFG_ALLMCAST_MASK        (1 << ENET_RXCFG_ALLMCAST_SHIFT)
+#define ENET_RXCFG_PROMISC_SHIFT        3
+#define ENET_RXCFG_PROMISC_MASK         (1 << ENET_RXCFG_PROMISC_SHIFT)
+#define ENET_RXCFG_LOOPBACK_SHIFT       4
+#define ENET_RXCFG_LOOPBACK_MASK        (1 << ENET_RXCFG_LOOPBACK_SHIFT)
+#define ENET_RXCFG_ENFLOW_SHIFT         5
+#define ENET_RXCFG_ENFLOW_MASK          (1 << ENET_RXCFG_ENFLOW_SHIFT)
+
+/* Receive Maximum Length register */
+#define ENET_RXMAXLEN_REG               0x4
+#define ENET_RXMAXLEN_SHIFT             0
+#define ENET_RXMAXLEN_MASK              (0x7ff << ENET_RXMAXLEN_SHIFT)
+
+/* Transmit Maximum Length register */
+#define ENET_TXMAXLEN_REG               0x8
+#define ENET_TXMAXLEN_SHIFT             0
+#define ENET_TXMAXLEN_MASK              (0x7ff << ENET_TXMAXLEN_SHIFT)
+
+/* MII Status/Control register */
+#define ENET_MIISC_REG                  0x10
+#define ENET_MIISC_MDCFREQDIV_SHIFT     0
+#define ENET_MIISC_MDCFREQDIV_MASK      (0x7f << ENET_MIISC_MDCFREQDIV_SHIFT)
+#define ENET_MIISC_PREAMBLEEN_SHIFT     7
+#define ENET_MIISC_PREAMBLEEN_MASK      (1 << ENET_MIISC_PREAMBLEEN_SHIFT)
+
+/* MII Data register */
+#define ENET_MIIDATA_REG                0x14
+#define ENET_MIIDATA_DATA_SHIFT         0
+#define ENET_MIIDATA_DATA_MASK          (0xffff << ENET_MIIDATA_DATA_SHIFT)
+#define ENET_MIIDATA_TA_SHIFT           16
+#define ENET_MIIDATA_TA_MASK            (0x3 << ENET_MIIDATA_TA_SHIFT)
+#define ENET_MIIDATA_REG_SHIFT          18
+#define ENET_MIIDATA_REG_MASK           (0x1f << ENET_MIIDATA_REG_SHIFT)
+#define ENET_MIIDATA_PHYID_SHIFT        23
+#define ENET_MIIDATA_PHYID_MASK         (0x1f << ENET_MIIDATA_PHYID_SHIFT)
+#define ENET_MIIDATA_OP_READ_MASK       (0x6 << 28)
+#define ENET_MIIDATA_OP_WRITE_MASK      (0x5 << 28)
+
+/* Ethernet Interrupt Mask register */
+#define ENET_IRMASK_REG                 0x18
+
+/* Ethernet Interrupt register */
+#define ENET_IR_REG                     0x1c
+#define ENET_IR_MII                     (1 << 0)
+#define ENET_IR_MIB                     (1 << 1)
+#define ENET_IR_FLOWC                   (1 << 2)
+
+/* Ethernet Control register */
+#define ENET_CTL_REG                    0x2c
+#define ENET_CTL_ENABLE_SHIFT           0
+#define ENET_CTL_ENABLE_MASK            (1 << ENET_CTL_ENABLE_SHIFT)
+#define ENET_CTL_DISABLE_SHIFT          1
+#define ENET_CTL_DISABLE_MASK           (1 << ENET_CTL_DISABLE_SHIFT)
+#define ENET_CTL_SRESET_SHIFT           2
+#define ENET_CTL_SRESET_MASK            (1 << ENET_CTL_SRESET_SHIFT)
+#define ENET_CTL_EPHYSEL_SHIFT          3
+#define ENET_CTL_EPHYSEL_MASK           (1 << ENET_CTL_EPHYSEL_SHIFT)
+
+/* Transmit Control register */
+#define ENET_TXCTL_REG                  0x30
+#define ENET_TXCTL_FD_SHIFT             0
+#define ENET_TXCTL_FD_MASK              (1 << ENET_TXCTL_FD_SHIFT)
+
+/* Transmit Watermask register */
+#define ENET_TXWMARK_REG                0x34
+#define ENET_TXWMARK_WM_SHIFT           0
+#define ENET_TXWMARK_WM_MASK            (0x3f << ENET_TXWMARK_WM_SHIFT)
+
+/* MIB Control register */
+#define ENET_MIBCTL_REG                 0x38
+#define ENET_MIBCTL_RDCLEAR_SHIFT       0
+#define ENET_MIBCTL_RDCLEAR_MASK        (1 << ENET_MIBCTL_RDCLEAR_SHIFT)
+
+/* Perfect Match Data Low register */
+#define ENET_PML_REG(x)                 (0x58 + (x) * 8)
+#define ENET_PMH_REG(x)                 (0x5c + (x) * 8)
+#define ENET_PMH_DATAVALID_SHIFT        16
+#define ENET_PMH_DATAVALID_MASK         (1 << ENET_PMH_DATAVALID_SHIFT)
+
+/* MIB register */
+#define ENET_MIB_REG(x)                 (0x200 + (x) * 4)
+#define ENET_MIB_REG_COUNT              55
+
+
+/*************************************************************************
+ * _REG relative to RSET_ENETDMA
+ *************************************************************************/
+
+/* Controller Configuration Register */
+#define ENETDMA_CFG_REG                 (0x0)
+#define ENETDMA_CFG_EN_SHIFT            0
+#define ENETDMA_CFG_EN_MASK             (1 << ENETDMA_CFG_EN_SHIFT)
+#define ENETDMA_CFG_FLOWCH_MASK(x)      (1 << ((x >> 1) + 1))
+
+/* Flow Control Descriptor Low Threshold register */
+#define ENETDMA_FLOWCL_REG(x)           (0x4 + (x) * 6)
+
+/* Flow Control Descriptor High Threshold register */
+#define ENETDMA_FLOWCH_REG(x)           (0x8 + (x) * 6)
+
+/* Flow Control Descriptor Buffer Alloca Threshold register */
+#define ENETDMA_BUFALLOC_REG(x)         (0xc + (x) * 6)
+#define ENETDMA_BUFALLOC_FORCE_SHIFT    31
+#define ENETDMA_BUFALLOC_FORCE_MASK     (1 << ENETDMA_BUFALLOC_FORCE_SHIFT)
+
+/* Channel Configuration register */
+#define ENETDMA_CHANCFG_REG(x)          (0x100 + (x) * 0x10)
+#define ENETDMA_CHANCFG_EN_SHIFT        0
+#define ENETDMA_CHANCFG_EN_MASK         (1 << ENETDMA_CHANCFG_EN_SHIFT)
+#define ENETDMA_CHANCFG_PKTHALT_SHIFT   1
+#define ENETDMA_CHANCFG_PKTHALT_MASK    (1 << ENETDMA_CHANCFG_PKTHALT_SHIFT)
+
+/* Interrupt Control/Status register */
+#define ENETDMA_IR_REG(x)               (0x104 + (x) * 0x10)
+#define ENETDMA_IR_BUFDONE_MASK         (1 << 0)
+#define ENETDMA_IR_PKTDONE_MASK         (1 << 1)
+#define ENETDMA_IR_NOTOWNER_MASK        (1 << 2)
+
+/* Interrupt Mask register */
+#define ENETDMA_IRMASK_REG(x)           (0x108 + (x) * 0x10)
+
+/* Maximum Burst Length */
+#define ENETDMA_MAXBURST_REG(x)         (0x10C + (x) * 0x10)
+
+/* Ring Start Address register */
+#define ENETDMA_RSTART_REG(x)           (0x200 + (x) * 0x10)
+
+/* State Ram Word 2 */
+#define ENETDMA_SRAM2_REG(x)            (0x204 + (x) * 0x10)
+
+/* State Ram Word 3 */
+#define ENETDMA_SRAM3_REG(x)            (0x208 + (x) * 0x10)
+
+/* State Ram Word 4 */
+#define ENETDMA_SRAM4_REG(x)            (0x20c + (x) * 0x10)
+
+
+/*************************************************************************
+ * _REG relative to RSET_OHCI_PRIV
+ *************************************************************************/
+
+#define OHCI_PRIV_REG                   0x0
+#define OHCI_PRIV_PORT1_HOST_SHIFT      0
+#define OHCI_PRIV_PORT1_HOST_MASK       (1 << OHCI_PRIV_PORT1_HOST_SHIFT)
+#define OHCI_PRIV_REG_SWAP_SHIFT        3
+#define OHCI_PRIV_REG_SWAP_MASK         (1 << OHCI_PRIV_REG_SWAP_SHIFT)
+
+
+/*************************************************************************
+ * _REG relative to RSET_USBH_PRIV
+ *************************************************************************/
+
+#define USBH_PRIV_SWAP_REG              0x0
+#define USBH_PRIV_SWAP_EHCI_ENDN_SHIFT  4
+#define USBH_PRIV_SWAP_EHCI_ENDN_MASK   (1 << USBH_PRIV_SWAP_EHCI_ENDN_SHIFT)
+#define USBH_PRIV_SWAP_EHCI_DATA_SHIFT  3
+#define USBH_PRIV_SWAP_EHCI_DATA_MASK   (1 << USBH_PRIV_SWAP_EHCI_DATA_SHIFT)
+#define USBH_PRIV_SWAP_OHCI_ENDN_SHIFT  1
+#define USBH_PRIV_SWAP_OHCI_ENDN_MASK   (1 << USBH_PRIV_SWAP_OHCI_ENDN_SHIFT)
+#define USBH_PRIV_SWAP_OHCI_DATA_SHIFT  0
+#define USBH_PRIV_SWAP_OHCI_DATA_MASK   (1 << USBH_PRIV_SWAP_OHCI_DATA_SHIFT)
+
+#define USBH_PRIV_TEST_REG              0x24
+
+
+/*************************************************************************
+ * _REG relative to RSET_MPI
+ *************************************************************************/
+
+/* well known (hard wired) chip select */
+#define MPI_CS_PCMCIA_COMMON            4
+#define MPI_CS_PCMCIA_ATTR              5
+#define MPI_CS_PCMCIA_IO                6
+
+/* Chip select base register */
+#define MPI_CSBASE_REG(x)               (0x0 + (x) * 8)
+#define MPI_CSBASE_BASE_SHIFT           13
+#define MPI_CSBASE_BASE_MASK            (0x1ffff << MPI_CSBASE_BASE_SHIFT)
+#define MPI_CSBASE_SIZE_SHIFT           0
+#define MPI_CSBASE_SIZE_MASK            (0xf << MPI_CSBASE_SIZE_SHIFT)
+
+#define MPI_CSBASE_SIZE_8K              0
+#define MPI_CSBASE_SIZE_16K             1
+#define MPI_CSBASE_SIZE_32K             2
+#define MPI_CSBASE_SIZE_64K             3
+#define MPI_CSBASE_SIZE_128K            4
+#define MPI_CSBASE_SIZE_256K            5
+#define MPI_CSBASE_SIZE_512K            6
+#define MPI_CSBASE_SIZE_1M              7
+#define MPI_CSBASE_SIZE_2M              8
+#define MPI_CSBASE_SIZE_4M              9
+#define MPI_CSBASE_SIZE_8M              10
+#define MPI_CSBASE_SIZE_16M             11
+#define MPI_CSBASE_SIZE_32M             12
+#define MPI_CSBASE_SIZE_64M             13
+#define MPI_CSBASE_SIZE_128M            14
+#define MPI_CSBASE_SIZE_256M            15
+
+/* Chip select control register */
+#define MPI_CSCTL_REG(x)                (0x4 + (x) * 8)
+#define MPI_CSCTL_ENABLE_MASK           (1 << 0)
+#define MPI_CSCTL_WAIT_SHIFT            1
+#define MPI_CSCTL_WAIT_MASK             (0x7 << MPI_CSCTL_WAIT_SHIFT)
+#define MPI_CSCTL_DATA16_MASK           (1 << 4)
+#define MPI_CSCTL_SYNCMODE_MASK         (1 << 7)
+#define MPI_CSCTL_TSIZE_MASK            (1 << 8)
+#define MPI_CSCTL_ENDIANSWAP_MASK       (1 << 10)
+#define MPI_CSCTL_SETUP_SHIFT           16
+#define MPI_CSCTL_SETUP_MASK            (0xf << MPI_CSCTL_SETUP_SHIFT)
+#define MPI_CSCTL_HOLD_SHIFT            20
+#define MPI_CSCTL_HOLD_MASK             (0xf << MPI_CSCTL_HOLD_SHIFT)
+
+/* PCI registers */
+#define MPI_SP0_RANGE_REG               0x100
+#define MPI_SP0_REMAP_REG               0x104
+#define MPI_SP0_REMAP_ENABLE_MASK       (1 << 0)
+#define MPI_SP1_RANGE_REG               0x10C
+#define MPI_SP1_REMAP_REG               0x110
+#define MPI_SP1_REMAP_ENABLE_MASK       (1 << 0)
+
+#define MPI_L2PCFG_REG                  0x11C
+#define MPI_L2PCFG_CFG_TYPE_SHIFT       0
+#define MPI_L2PCFG_CFG_TYPE_MASK        (0x3 << MPI_L2PCFG_CFG_TYPE_SHIFT)
+#define MPI_L2PCFG_REG_SHIFT            2
+#define MPI_L2PCFG_REG_MASK             (0x3f << MPI_L2PCFG_REG_SHIFT)
+#define MPI_L2PCFG_FUNC_SHIFT           8
+#define MPI_L2PCFG_FUNC_MASK            (0x7 << MPI_L2PCFG_FUNC_SHIFT)
+#define MPI_L2PCFG_DEVNUM_SHIFT         11
+#define MPI_L2PCFG_DEVNUM_MASK          (0x1f << MPI_L2PCFG_DEVNUM_SHIFT)
+#define MPI_L2PCFG_CFG_USEREG_MASK      (1 << 30)
+#define MPI_L2PCFG_CFG_SEL_MASK         (1 << 31)
+
+#define MPI_L2PMEMRANGE1_REG            0x120
+#define MPI_L2PMEMBASE1_REG             0x124
+#define MPI_L2PMEMREMAP1_REG            0x128
+#define MPI_L2PMEMRANGE2_REG            0x12C
+#define MPI_L2PMEMBASE2_REG             0x130
+#define MPI_L2PMEMREMAP2_REG            0x134
+#define MPI_L2PIORANGE_REG              0x138
+#define MPI_L2PIOBASE_REG               0x13C
+#define MPI_L2PIOREMAP_REG              0x140
+#define MPI_L2P_BASE_MASK               (0xffff8000)
+#define MPI_L2PREMAP_ENABLED_MASK       (1 << 0)
+#define MPI_L2PREMAP_IS_CARDBUS_MASK    (1 << 2)
+
+#define MPI_PCIMODESEL_REG              0x144
+#define MPI_PCIMODESEL_BAR1_NOSWAP_MASK (1 << 0)
+#define MPI_PCIMODESEL_BAR2_NOSWAP_MASK (1 << 1)
+#define MPI_PCIMODESEL_EXT_ARB_MASK     (1 << 2)
+#define MPI_PCIMODESEL_PREFETCH_SHIFT   4
+#define MPI_PCIMODESEL_PREFETCH_MASK    (0xf << MPI_PCIMODESEL_PREFETCH_SHIFT)
+
+#define MPI_LOCBUSCTL_REG               0x14C
+#define MPI_LOCBUSCTL_EN_PCI_GPIO_MASK  (1 << 0)
+#define MPI_LOCBUSCTL_U2P_NOSWAP_MASK   (1 << 1)
+
+#define MPI_LOCINT_REG                  0x150
+#define MPI_LOCINT_MASK(x)              (1 << (x + 16))
+#define MPI_LOCINT_STAT(x)              (1 << (x))
+#define MPI_LOCINT_DIR_FAILED           6
+#define MPI_LOCINT_EXT_PCI_INT          7
+#define MPI_LOCINT_SERR                 8
+#define MPI_LOCINT_CSERR                9
+
+#define MPI_PCICFGCTL_REG               0x178
+#define MPI_PCICFGCTL_CFGADDR_SHIFT     2
+#define MPI_PCICFGCTL_CFGADDR_MASK      (0x1f << MPI_PCICFGCTL_CFGADDR_SHIFT)
+#define MPI_PCICFGCTL_WRITEEN_MASK      (1 << 7)
+
+#define MPI_PCICFGDATA_REG              0x17C
+
+/* PCI host bridge custom register */
+#define BCMPCI_REG_TIMERS               0x40
+#define REG_TIMER_TRDY_SHIFT            0
+#define REG_TIMER_TRDY_MASK             (0xff << REG_TIMER_TRDY_SHIFT)
+#define REG_TIMER_RETRY_SHIFT           8
+#define REG_TIMER_RETRY_MASK            (0xff << REG_TIMER_RETRY_SHIFT)
+
+
+/*************************************************************************
+ * _REG relative to RSET_PCMCIA
+ *************************************************************************/
+
+#define PCMCIA_C1_REG                   0x0
+#define PCMCIA_C1_CD1_MASK              (1 << 0)
+#define PCMCIA_C1_CD2_MASK              (1 << 1)
+#define PCMCIA_C1_VS1_MASK              (1 << 2)
+#define PCMCIA_C1_VS2_MASK              (1 << 3)
+#define PCMCIA_C1_VS1OE_MASK            (1 << 6)
+#define PCMCIA_C1_VS2OE_MASK            (1 << 7)
+#define PCMCIA_C1_CBIDSEL_SHIFT         (8)
+#define PCMCIA_C1_CBIDSEL_MASK          (0x1f << PCMCIA_C1_CBIDSEL_SHIFT)
+#define PCMCIA_C1_EN_PCMCIA_GPIO_MASK   (1 << 13)
+#define PCMCIA_C1_EN_PCMCIA_MASK        (1 << 14)
+#define PCMCIA_C1_EN_CARDBUS_MASK       (1 << 15)
+#define PCMCIA_C1_RESET_MASK            (1 << 18)
+
+#define PCMCIA_C2_REG                   0x8
+#define PCMCIA_C2_DATA16_MASK           (1 << 0)
+#define PCMCIA_C2_BYTESWAP_MASK         (1 << 1)
+#define PCMCIA_C2_RWCOUNT_SHIFT         2
+#define PCMCIA_C2_RWCOUNT_MASK          (0x3f << PCMCIA_C2_RWCOUNT_SHIFT)
+#define PCMCIA_C2_INACTIVE_SHIFT        8
+#define PCMCIA_C2_INACTIVE_MASK         (0x3f << PCMCIA_C2_INACTIVE_SHIFT)
+#define PCMCIA_C2_SETUP_SHIFT           16
+#define PCMCIA_C2_SETUP_MASK            (0x3f << PCMCIA_C2_SETUP_SHIFT)
+#define PCMCIA_C2_HOLD_SHIFT            24
+#define PCMCIA_C2_HOLD_MASK             (0x3f << PCMCIA_C2_HOLD_SHIFT)
+
+
+/*************************************************************************
+ * _REG relative to RSET_SDRAM
+ *************************************************************************/
+
+#define SDRAM_CFG_REG                   0x0
+#define SDRAM_CFG_ROW_SHIFT             4
+#define SDRAM_CFG_ROW_MASK              (0x3 << SDRAM_CFG_ROW_SHIFT)
+#define SDRAM_CFG_COL_SHIFT             6
+#define SDRAM_CFG_COL_MASK              (0x3 << SDRAM_CFG_COL_SHIFT)
+#define SDRAM_CFG_32B_SHIFT             10
+#define SDRAM_CFG_32B_MASK              (1 << SDRAM_CFG_32B_SHIFT)
+#define SDRAM_CFG_BANK_SHIFT            13
+#define SDRAM_CFG_BANK_MASK             (1 << SDRAM_CFG_BANK_SHIFT)
+
+#define SDRAM_PRIO_REG                  0x2C
+#define SDRAM_PRIO_MIPS_SHIFT           29
+#define SDRAM_PRIO_MIPS_MASK            (1 << SDRAM_PRIO_MIPS_SHIFT)
+#define SDRAM_PRIO_ADSL_SHIFT           30
+#define SDRAM_PRIO_ADSL_MASK            (1 << SDRAM_PRIO_ADSL_SHIFT)
+#define SDRAM_PRIO_EN_SHIFT             31
+#define SDRAM_PRIO_EN_MASK              (1 << SDRAM_PRIO_EN_SHIFT)
+
+
+/*************************************************************************
+ * _REG relative to RSET_MEMC
+ *************************************************************************/
+
+#define MEMC_CFG_REG                    0x4
+#define MEMC_CFG_32B_SHIFT              1
+#define MEMC_CFG_32B_MASK               (1 << MEMC_CFG_32B_SHIFT)
+#define MEMC_CFG_COL_SHIFT              3
+#define MEMC_CFG_COL_MASK               (0x3 << MEMC_CFG_COL_SHIFT)
+#define MEMC_CFG_ROW_SHIFT              6
+#define MEMC_CFG_ROW_MASK               (0x3 << MEMC_CFG_ROW_SHIFT)
+
+
+/*************************************************************************
+ * _REG relative to RSET_DDR
+ *************************************************************************/
+
+#define DDR_DMIPSPLLCFG_REG             0x18
+#define DMIPSPLLCFG_M1_SHIFT            0
+#define DMIPSPLLCFG_M1_MASK             (0xff << DMIPSPLLCFG_M1_SHIFT)
+#define DMIPSPLLCFG_N1_SHIFT            23
+#define DMIPSPLLCFG_N1_MASK             (0x3f << DMIPSPLLCFG_N1_SHIFT)
+#define DMIPSPLLCFG_N2_SHIFT            29
+#define DMIPSPLLCFG_N2_MASK             (0x7 << DMIPSPLLCFG_N2_SHIFT)
+
+#endif /* BCM63XX_REGS_H_ */
+
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_timer.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_timer.h
new file mode 100644
index 000000000000..c0fce833c9ed
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_timer.h
@@ -0,0 +1,11 @@
+#ifndef BCM63XX_TIMER_H_
+#define BCM63XX_TIMER_H_
+
+int bcm63xx_timer_register(int id, void (*callback)(void *data), void *data);
+void bcm63xx_timer_unregister(int id);
+int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us);
+int bcm63xx_timer_enable(int id);
+int bcm63xx_timer_disable(int id);
+unsigned int bcm63xx_timer_countdown(unsigned int countdown_us);
+
+#endif /* !BCM63XX_TIMER_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
new file mode 100644
index 000000000000..6479090a4106
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -0,0 +1,60 @@
+#ifndef BOARD_BCM963XX_H_
+#define BOARD_BCM963XX_H_
+
+#include <linux/types.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+#include <bcm63xx_dev_enet.h>
+#include <bcm63xx_dev_dsp.h>
+
+/*
+ * flash mapping
+ */
+#define BCM963XX_CFE_VERSION_OFFSET     0x570
+#define BCM963XX_NVRAM_OFFSET           0x580
+
+/*
+ * nvram structure
+ */
+struct bcm963xx_nvram {
+        u32     version;
+        u8      reserved1[256];
+        u8      name[16];
+        u32     main_tp_number;
+        u32     psi_size;
+        u32     mac_addr_count;
+        u8      mac_addr_base[6];
+        u8      reserved2[2];
+        u32     checksum_old;
+        u8      reserved3[720];
+        u32     checksum_high;
+};
+
+/*
+ * board definition
+ */
+struct board_info {
+        u8              name[16];
+        unsigned int    expected_cpu_id;
+
+        /* enabled feature/device */
+        unsigned int    has_enet0:1;
+        unsigned int    has_enet1:1;
+        unsigned int    has_pci:1;
+        unsigned int    has_pccard:1;
+        unsigned int    has_ohci0:1;
+        unsigned int    has_ehci0:1;
+        unsigned int    has_dsp:1;
+
+        /* ethernet config */
+        struct bcm63xx_enet_platform_data enet0;
+        struct bcm63xx_enet_platform_data enet1;
+
+        /* DSP config */
+        struct bcm63xx_dsp_platform_data dsp;
+
+        /* GPIO LEDs */
+        struct gpio_led leds[5];
+};
+
+#endif /* ! BOARD_BCM963XX_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
new file mode 100644
index 000000000000..71742bac940d
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
@@ -0,0 +1,51 @@
+#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
+
+#include <bcm63xx_cpu.h>
+
+#define cpu_has_tlb                     1
+#define cpu_has_4kex                    1
+#define cpu_has_4k_cache                1
+#define cpu_has_fpu                     0
+#define cpu_has_32fpr                   0
+#define cpu_has_counter                 1
+#define cpu_has_watch                   0
+#define cpu_has_divec                   1
+#define cpu_has_vce                     0
+#define cpu_has_cache_cdex_p            0
+#define cpu_has_cache_cdex_s            0
+#define cpu_has_prefetch                1
+#define cpu_has_mcheck                  1
+#define cpu_has_ejtag                   1
+#define cpu_has_llsc                    1
+#define cpu_has_mips16                  0
+#define cpu_has_mdmx                    0
+#define cpu_has_mips3d                  0
+#define cpu_has_smartmips               0
+#define cpu_has_vtag_icache             0
+
+#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCMCPU_IS_6348) || defined(CONFIG_CPU_IS_6338) || defined(CONFIG_CPU_IS_BCM6345))
+#define cpu_has_dc_aliases              0
+#endif
+
+#define cpu_has_ic_fills_f_dc           0
+#define cpu_has_pindexed_dcache         0
+
+#define cpu_has_mips32r1                1
+#define cpu_has_mips32r2                0
+#define cpu_has_mips64r1                0
+#define cpu_has_mips64r2                0
+
+#define cpu_has_dsp                     0
+#define cpu_has_mipsmt                  0
+#define cpu_has_userlocal               0
+
+#define cpu_has_nofpuex                 0
+#define cpu_has_64bits                  0
+#define cpu_has_64bit_zero_reg          0
+
+#define cpu_dcache_line_size()          16
+#define cpu_icache_line_size()          16
+#define cpu_scache_line_size()          0
+
+#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/gpio.h b/arch/mips/include/asm/mach-bcm63xx/gpio.h
new file mode 100644
index 000000000000..7cda8c0a3979
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/gpio.h
@@ -0,0 +1,15 @@
+#ifndef __ASM_MIPS_MACH_BCM63XX_GPIO_H
+#define __ASM_MIPS_MACH_BCM63XX_GPIO_H
+
+#include <bcm63xx_gpio.h>
+
+#define gpio_to_irq(gpio)       NULL
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+
+#define gpio_cansleep __gpio_cansleep
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_MIPS_MACH_BCM63XX_GPIO_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/war.h b/arch/mips/include/asm/mach-bcm63xx/war.h
new file mode 100644
index 000000000000..8e3f3fdf3209
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_BCM63XX_WAR_H
+#define __ASM_MIPS_MACH_BCM63XX_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR     0
+#define R4600_V1_HIT_CACHEOP_WAR        0
+#define R4600_V2_HIT_CACHEOP_WAR        0
+#define R5432_CP0_INTERRUPT_WAR         0
+#define BCM1250_M3_WAR                  0
+#define SIBYTE_1956_WAR                 0
+#define MIPS4K_ICACHE_REFILL_WAR        0
+#define MIPS_CACHE_SYNC_WAR             0
+#define TX49XX_ICACHE_INDEX_INV_WAR     0
+#define RM9000_CDEX_SMP_WAR             0
+#define ICACHE_REFILLS_WORKAROUND_WAR   0
+#define R10000_LLSC_WAR                 0
+#define MIPS34K_MISSED_ITLB_WAR         0
+
+#endif /* __ASM_MIPS_MACH_BCM63XX_WAR_H */
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index 3d830756b13a..425e708d4fb9 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -31,12 +31,16 @@
 #define cpu_has_cache_cdex_s    0
 #define cpu_has_prefetch        1
 
+#define cpu_has_llsc            1
 /*
- * We should disable LL/SC on non SMP systems as it is faster to
- * disable interrupts for atomic access than a LL/SC.  Unfortunatly we
- * cannot as this breaks asm/futex.h
+ * We Disable LL/SC on non SMP systems as it is faster to disable
+ * interrupts for atomic access than a LL/SC.
  */
-#define cpu_has_llsc            1
+#ifdef CONFIG_SMP
+# define kernel_uses_llsc       1
+#else
+# define kernel_uses_llsc       0
+#endif
 #define cpu_has_vtag_icache     1
 #define cpu_has_dc_aliases      0
 #define cpu_has_ic_fills_f_dc   0
diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h
index 07547231e078..f6837422fe65 100644
--- a/arch/mips/include/asm/mach-ip27/topology.h
+++ b/arch/mips/include/asm/mach-ip27/topology.h
@@ -24,12 +24,10 @@ extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
 
 #define cpu_to_node(cpu)        (sn_cpu_info[(cpu)].p_nodeid)
 #define parent_node(node)       (node)
-#define node_to_cpumask(node)   (hub_data(node)->h_cpus)
 #define cpumask_of_node(node)   (&hub_data(node)->h_cpus)
 struct pci_bus;
 extern int pcibus_to_node(struct pci_bus *);
 
-#define pcibus_to_cpumask(bus)  (cpu_online_map)
 #define cpumask_of_pcibus(bus)  (cpu_online_mask)
 
 extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
@@ -48,7 +46,6 @@ extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
         .cache_nice_tries       = 1,                    \
         .flags                  = SD_LOAD_BALANCE       \
                                 | SD_BALANCE_EXEC       \
-                                | SD_WAKE_BALANCE,      \
         .last_balance           = jiffies,              \
         .balance_interval       = 1,                    \
         .nr_balance_failed      = 0,                    \
diff --git a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
index 550a10dc9dba..ce5b6e270e3f 100644
--- a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
@@ -13,8 +13,8 @@
  *      loongson2f user manual.
  */
 
-#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
+#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
 
 #define cpu_dcache_line_size()  32
 #define cpu_icache_line_size()  32
@@ -56,4 +56,4 @@
 #define cpu_has_watch           1
 #define cpu_icache_snoops_remote_store  1
 
-#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */
+#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-lemote/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h
index c8de5e750777..71a6851ba833 100644
--- a/arch/mips/include/asm/mach-lemote/dma-coherence.h
+++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h
@@ -8,8 +8,8 @@
  * Author: Fuxin Zhang, zhangfx@lemote.com
  *
  */
-#ifndef __ASM_MACH_LEMOTE_DMA_COHERENCE_H
-#define __ASM_MACH_LEMOTE_DMA_COHERENCE_H
+#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H
+#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H
 
 struct device;
 
@@ -65,4 +65,4 @@ static inline int plat_device_is_coherent(struct device *dev)
         return 0;
 }
 
-#endif /* __ASM_MACH_LEMOTE_DMA_COHERENCE_H */
+#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h
new file mode 100644
index 000000000000..da70bcf2304e
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/loongson.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
+ * Author: Wu Zhangjin <wuzj@lemote.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef __ASM_MACH_LOONGSON_LOONGSON_H
+#define __ASM_MACH_LOONGSON_LOONGSON_H
+
+#include <linux/io.h>
+#include <linux/init.h>
+
+/* there is an internal bonito64-compatiable northbridge in loongson2e/2f */
+#include <asm/mips-boards/bonito64.h>
+
+/* loongson internal northbridge initialization */
+extern void bonito_irq_init(void);
+
+/* machine-specific reboot/halt operation */
+extern void mach_prepare_reboot(void);
+extern void mach_prepare_shutdown(void);
+
+/* environment arguments from bootloader */
+extern unsigned long bus_clock, cpu_clock_freq;
+extern unsigned long memsize, highmemsize;
+
+/* loongson-specific command line, env and memory initialization */
+extern void __init prom_init_memory(void);
+extern void __init prom_init_cmdline(void);
+extern void __init prom_init_env(void);
+
+/* irq operation functions */
+extern void bonito_irqdispatch(void);
+extern void __init bonito_irq_init(void);
+extern void __init set_irq_trigger_mode(void);
+extern void __init mach_init_irq(void);
+extern void mach_irq_dispatch(unsigned int pending);
+
+/* PCI Configuration Registers */
+#define LOONGSON_PCI_ISR4C  BONITO_PCI_REG(0x4c)
+
+/* PCI_Hit*_Sel_* */
+
+#define LOONGSON_PCI_HIT0_SEL_L     BONITO(BONITO_REGBASE + 0x50)
+#define LOONGSON_PCI_HIT0_SEL_H     BONITO(BONITO_REGBASE + 0x54)
+#define LOONGSON_PCI_HIT1_SEL_L     BONITO(BONITO_REGBASE + 0x58)
+#define LOONGSON_PCI_HIT1_SEL_H     BONITO(BONITO_REGBASE + 0x5c)
+#define LOONGSON_PCI_HIT2_SEL_L     BONITO(BONITO_REGBASE + 0x60)
+#define LOONGSON_PCI_HIT2_SEL_H     BONITO(BONITO_REGBASE + 0x64)
+
+/* PXArb Config & Status */
+
+#define LOONGSON_PXARB_CFG      BONITO(BONITO_REGBASE + 0x68)
+#define LOONGSON_PXARB_STATUS       BONITO(BONITO_REGBASE + 0x6c)
+
+/* loongson2-specific perf counter IRQ */
+#define LOONGSON2_PERFCNT_IRQ   (MIPS_CPU_IRQ_BASE + 6)
+
+#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */
diff --git a/arch/mips/include/asm/mach-loongson/machine.h b/arch/mips/include/asm/mach-loongson/machine.h
new file mode 100644
index 000000000000..206ea2067916
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/machine.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
+ * Author: Wu Zhangjin <wuzj@lemote.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON_MACHINE_H
+#define __ASM_MACH_LOONGSON_MACHINE_H
+
+#ifdef CONFIG_LEMOTE_FULOONG2E
+
+#define LOONGSON_UART_BASE (BONITO_PCIIO_BASE + 0x3f8)
+
+#define LOONGSON_MACHTYPE MACH_LEMOTE_FL2E
+
+#endif
+
+#endif /* __ASM_MACH_LOONGSON_MACHINE_H */
diff --git a/arch/mips/include/asm/mach-lemote/mc146818rtc.h b/arch/mips/include/asm/mach-loongson/mc146818rtc.h
index ed5147e11085..ed7fe978335a 100644
--- a/arch/mips/include/asm/mach-lemote/mc146818rtc.h
+++ b/arch/mips/include/asm/mach-loongson/mc146818rtc.h
@@ -7,8 +7,8 @@
  *
  * RTC routines for PC style attached Dallas chip.
  */
-#ifndef __ASM_MACH_LEMOTE_MC146818RTC_H
-#define __ASM_MACH_LEMOTE_MC146818RTC_H
+#ifndef __ASM_MACH_LOONGSON_MC146818RTC_H
+#define __ASM_MACH_LOONGSON_MC146818RTC_H
 
 #include <linux/io.h>
 
@@ -33,4 +33,4 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
 #define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970)
 #endif
 
-#endif /* __ASM_MACH_LEMOTE_MC146818RTC_H */
+#endif /* __ASM_MACH_LOONGSON_MC146818RTC_H */
diff --git a/arch/mips/include/asm/mach-loongson/mem.h b/arch/mips/include/asm/mach-loongson/mem.h
new file mode 100644
index 000000000000..bd7b3cba7e35
--- /dev/null
+++ b/arch/mips/include/asm/mach-loongson/mem.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
+ * Author: Wu Zhangjin <wuzj@lemote.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_MACH_LOONGSON_MEM_H
+#define __ASM_MACH_LOONGSON_MEM_H
+
+/*
+ * On Lemote Loongson 2e
+ *
+ * the high memory space starts from 512M.
+ * the peripheral registers reside between 0x1000:0000 and 0x2000:0000.
+ */
+
+#ifdef CONFIG_LEMOTE_FULOONG2E
+
+#define LOONGSON_HIGHMEM_START  0x20000000
+
+#define LOONGSON_MMIO_MEM_START 0x10000000
+#define LOONGSON_MMIO_MEM_END   0x20000000
+
+#endif
+
+#endif /* __ASM_MACH_LOONGSON_MEM_H */
diff --git a/arch/mips/include/asm/mach-lemote/pci.h b/arch/mips/include/asm/mach-loongson/pci.h
index ea6aa143b78e..f1663ca81da0 100644
--- a/arch/mips/include/asm/mach-lemote/pci.h
+++ b/arch/mips/include/asm/mach-loongson/pci.h
@@ -19,12 +19,19 @@
  * 02139, USA.
  */
 
-#ifndef _LEMOTE_PCI_H_
-#define _LEMOTE_PCI_H_
+#ifndef __ASM_MACH_LOONGSON_PCI_H_
+#define __ASM_MACH_LOONGSON_PCI_H_
 
-#define LOONGSON2E_PCI_MEM_START        0x14000000UL
-#define LOONGSON2E_PCI_MEM_END          0x1fffffffUL
-#define LOONGSON2E_PCI_IO_START         0x00004000UL
-#define LOONGSON2E_IO_PORT_BASE         0x1fd00000UL
+extern struct pci_ops bonito64_pci_ops;
 
-#endif /* !_LEMOTE_PCI_H_ */
+#ifdef CONFIG_LEMOTE_FULOONG2E
+
+/* this pci memory space is mapped by pcimap in pci.c */
+#define LOONGSON_PCI_MEM_START  BONITO_PCILO1_BASE
+#define LOONGSON_PCI_MEM_END    (BONITO_PCILO1_BASE + 0x04000000 * 2)
+/* this is an offset from mips_io_port_base */
+#define LOONGSON_PCI_IO_START   0x00004000UL
+
+#endif
+
+#endif /* !__ASM_MACH_LOONGSON_PCI_H_ */
diff --git a/arch/mips/include/asm/mach-lemote/war.h b/arch/mips/include/asm/mach-loongson/war.h
index 05f89e0f2a11..4b971c3ffd8d 100644
--- a/arch/mips/include/asm/mach-lemote/war.h
+++ b/arch/mips/include/asm/mach-loongson/war.h
@@ -5,8 +5,8 @@
  *
  * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
  */
-#ifndef __ASM_MIPS_MACH_LEMOTE_WAR_H
-#define __ASM_MIPS_MACH_LEMOTE_WAR_H
+#ifndef __ASM_MACH_LOONGSON_WAR_H
+#define __ASM_MACH_LOONGSON_WAR_H
 
 #define R4600_V1_INDEX_ICACHEOP_WAR     0
 #define R4600_V1_HIT_CACHEOP_WAR        0
@@ -22,4 +22,4 @@
 #define R10000_LLSC_WAR                 0
 #define MIPS34K_MISSED_ITLB_WAR         0
 
-#endif /* __ASM_MIPS_MACH_LEMOTE_WAR_H */
+#endif /* __ASM_MACH_LEMOTE_WAR_H */
diff --git a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
index 7f3e3f9bd23a..2848cea42bce 100644
--- a/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
@@ -28,11 +28,7 @@
 /* #define cpu_has_prefetch     ? */
 #define cpu_has_mcheck          1
 /* #define cpu_has_ejtag        ? */
-#ifdef CONFIG_CPU_HAS_LLSC
 #define cpu_has_llsc            1
-#else
-#define cpu_has_llsc            0
-#endif
 /* #define cpu_has_vtag_icache  ? */
 /* #define cpu_has_dc_aliases   ? */
 /* #define cpu_has_ic_fills_f_dc ? */
diff --git a/arch/mips/include/asm/mips-boards/bonito64.h b/arch/mips/include/asm/mips-boards/bonito64.h
index a0f04bb99c99..a576ce044c3c 100644
--- a/arch/mips/include/asm/mips-boards/bonito64.h
+++ b/arch/mips/include/asm/mips-boards/bonito64.h
@@ -26,7 +26,7 @@
 /* offsets from base register */
 #define BONITO(x)       (x)
 
-#elif defined(CONFIG_LEMOTE_FULONG)
+#elif defined(CONFIG_LEMOTE_FULOONG2E)
 
 #define BONITO(x) (*(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x)))
 #define BONITO_IRQ_BASE   32
diff --git a/arch/mips/include/asm/mips-boards/generic.h b/arch/mips/include/asm/mips-boards/generic.h
index c0da1a881e3d..46c08563e532 100644
--- a/arch/mips/include/asm/mips-boards/generic.h
+++ b/arch/mips/include/asm/mips-boards/generic.h
@@ -87,8 +87,6 @@
 
 extern int mips_revision_sconid;
 
-extern void mips_reboot_setup(void);
-
 #ifdef CONFIG_PCI
 extern void mips_pcibios_init(void);
 #else
diff --git a/arch/mips/include/asm/mman.h b/arch/mips/include/asm/mman.h
index e4d6f1fb1cf7..a2250f390a29 100644
--- a/arch/mips/include/asm/mman.h
+++ b/arch/mips/include/asm/mman.h
@@ -46,6 +46,8 @@
 #define MAP_LOCKED      0x8000          /* pages are locked */
 #define MAP_POPULATE    0x10000         /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x20000         /* do not block on IO */
+#define MAP_STACK       0x40000         /* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB     0x80000         /* create a huge page mapping */
 
 /*
  * Flags for msync
@@ -71,6 +73,9 @@
 #define MADV_DONTFORK   10              /* don't inherit across fork */
 #define MADV_DOFORK     11              /* do inherit across fork */
 
+#define MADV_MERGEABLE   12             /* KSM may merge identical pages */
+#define MADV_UNMERGEABLE 13             /* KSM may not merge identical pages */
+
 /* compatibility flags */
 #define MAP_FILE        0
 
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index d3bea88d8744..d9743536a621 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -178,8 +178,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
          * Mark current->active_mm as not "active" anymore.
          * We don't want to mislead possible IPI tlb flush routines.
          */
-        cpu_clear(cpu, prev->cpu_vm_mask);
-        cpu_set(cpu, next->cpu_vm_mask);
+        cpumask_clear_cpu(cpu, mm_cpumask(prev));
+        cpumask_set_cpu(cpu, mm_cpumask(next));
 
         local_irq_restore(flags);
 }
@@ -235,8 +235,8 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
         TLBMISS_HANDLER_SETUP_PGD(next->pgd);
 
         /* mark mmu ownership change */
-        cpu_clear(cpu, prev->cpu_vm_mask);
-        cpu_set(cpu, next->cpu_vm_mask);
+        cpumask_clear_cpu(cpu, mm_cpumask(prev));
+        cpumask_set_cpu(cpu, mm_cpumask(next));
 
         local_irq_restore(flags);
 }
@@ -258,7 +258,7 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
 
         local_irq_save(flags);
 
-        if (cpu_isset(cpu, mm->cpu_vm_mask))  {
+        if (cpumask_test_cpu(cpu, mm_cpumask(mm)))  {
                 get_new_mmu_context(mm, cpu);
 #ifdef CONFIG_MIPS_MT_SMTC
                 /* See comments for similar code above */
diff --git a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
new file mode 100644
index 000000000000..4586958c97be
--- /dev/null
+++ b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
@@ -0,0 +1,88 @@
+/***********************license start***************
+ * Author: Cavium Networks
+ *
+ * Contact: support@caviumnetworks.com
+ * This file is part of the OCTEON SDK
+ *
+ * Copyright (c) 2003-2008 Cavium Networks
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, Version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful, but
+ * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
+ * NONINFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this file; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * or visit http://www.gnu.org/licenses/.
+ *
+ * This file may also be available under a different license from Cavium.
+ * Contact Cavium Networks for more information
+ ***********************license end**************************************/
+
+#ifndef __CVMX_RNM_DEFS_H__
+#define __CVMX_RNM_DEFS_H__
+
+#include <linux/types.h>
+
+#define CVMX_RNM_BIST_STATUS \
+         CVMX_ADD_IO_SEG(0x0001180040000008ull)
+#define CVMX_RNM_CTL_STATUS \
+         CVMX_ADD_IO_SEG(0x0001180040000000ull)
+
+union cvmx_rnm_bist_status {
+        uint64_t u64;
+        struct cvmx_rnm_bist_status_s {
+                uint64_t reserved_2_63:62;
+                uint64_t rrc:1;
+                uint64_t mem:1;
+        } s;
+        struct cvmx_rnm_bist_status_s cn30xx;
+        struct cvmx_rnm_bist_status_s cn31xx;
+        struct cvmx_rnm_bist_status_s cn38xx;
+        struct cvmx_rnm_bist_status_s cn38xxp2;
+        struct cvmx_rnm_bist_status_s cn50xx;
+        struct cvmx_rnm_bist_status_s cn52xx;
+        struct cvmx_rnm_bist_status_s cn52xxp1;
+        struct cvmx_rnm_bist_status_s cn56xx;
+        struct cvmx_rnm_bist_status_s cn56xxp1;
+        struct cvmx_rnm_bist_status_s cn58xx;
+        struct cvmx_rnm_bist_status_s cn58xxp1;
+};
+
+union cvmx_rnm_ctl_status {
+        uint64_t u64;
+        struct cvmx_rnm_ctl_status_s {
+                uint64_t reserved_9_63:55;
+                uint64_t ent_sel:4;
+                uint64_t exp_ent:1;
+                uint64_t rng_rst:1;
+                uint64_t rnm_rst:1;
+                uint64_t rng_en:1;
+                uint64_t ent_en:1;
+        } s;
+        struct cvmx_rnm_ctl_status_cn30xx {
+                uint64_t reserved_4_63:60;
+                uint64_t rng_rst:1;
+                uint64_t rnm_rst:1;
+                uint64_t rng_en:1;
+                uint64_t ent_en:1;
+        } cn30xx;
+        struct cvmx_rnm_ctl_status_cn30xx cn31xx;
+        struct cvmx_rnm_ctl_status_cn30xx cn38xx;
+        struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
+        struct cvmx_rnm_ctl_status_s cn50xx;
+        struct cvmx_rnm_ctl_status_s cn52xx;
+        struct cvmx_rnm_ctl_status_s cn52xxp1;
+        struct cvmx_rnm_ctl_status_s cn56xx;
+        struct cvmx_rnm_ctl_status_s cn56xxp1;
+        struct cvmx_rnm_ctl_status_s cn58xx;
+        struct cvmx_rnm_ctl_status_s cn58xxp1;
+};
+
+#endif
diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h
index e31e3fe14f8a..9d9381e2e3d8 100644
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -271,7 +271,7 @@ static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val)
          * what RSL read we do, so we choose CVMX_MIO_BOOT_BIST_STAT
          * because it is fast and harmless.
          */
-        if ((csr_addr >> 40) == (0x800118))
+        if (((csr_addr >> 40) & 0x7ffff) == (0x118))
                 cvmx_read64(CVMX_MIO_BOOT_BIST_STAT);
 }
 
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 4320239cf4ef..f266295cce51 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -10,6 +10,7 @@
 #define _ASM_PAGE_H
 
 #include <spaces.h>
+#include <linux/const.h>
 
 /*
  * PAGE_SHIFT determines the page size
@@ -29,12 +30,12 @@
 #ifdef CONFIG_PAGE_SIZE_64KB
 #define PAGE_SHIFT      16
 #endif
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_SIZE       (_AC(1,UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~((1 << PAGE_SHIFT) - 1))
 
 #ifdef CONFIG_HUGETLB_PAGE
 #define HPAGE_SHIFT     (PAGE_SHIFT + PAGE_SHIFT - 3)
-#define HPAGE_SIZE      ((1UL) << HPAGE_SHIFT)
+#define HPAGE_SIZE      (_AC(1,UL) << HPAGE_SHIFT)
 #define HPAGE_MASK      (~(HPAGE_SIZE - 1))
 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 #endif /* CONFIG_HUGETLB_PAGE */
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index a68d111e55e9..5ebf82572ec0 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -65,8 +65,6 @@ extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 
 extern unsigned int pcibios_assign_all_busses(void);
 
-#define pcibios_scan_all_fns(a, b)      0
-
 extern unsigned long PCIBIOS_MIN_IO;
 extern unsigned long PCIBIOS_MIN_MEM;
 
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 4ed9d1bba2ba..9cd508993956 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -109,13 +109,13 @@
 
 #define VMALLOC_START           MAP_BASE
 #define VMALLOC_END     \
-        (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
+        (VMALLOC_START + \
+         PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE - (1UL << 32))
 #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
         VMALLOC_START != CKSSEG
 /* Load modules into 32bit-compatible segment. */
 #define MODULE_START    CKSSEG
 #define MODULE_END      (FIXADDR_START-2*PAGE_SIZE)
-extern pgd_t module_pg_dir[PTRS_PER_PGD];
 #endif
 
 #define pte_ERROR(e) \
@@ -188,12 +188,7 @@ static inline void pud_clear(pud_t *pudp)
 #define __pmd_offset(address)   pmd_index(address)
 
 /* to find an entry in a kernel page-table-directory */
-#ifdef MODULE_START
-#define pgd_offset_k(address) \
-        ((address) >= MODULE_START ? module_pg_dir : pgd_offset(&init_mm, 0UL))
-#else
-#define pgd_offset_k(address) pgd_offset(&init_mm, 0UL)
-#endif
+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
 
 #define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 #define pmd_index(address)      (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 1a9f9b257551..d6eb6134abec 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -76,6 +76,16 @@ extern unsigned long zero_page_mask;
 #define ZERO_PAGE(vaddr) \
         (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
 
+#define is_zero_pfn is_zero_pfn
+static inline int is_zero_pfn(unsigned long pfn)
+{
+        extern unsigned long zero_pfn;
+        unsigned long offset_from_zero_pfn = pfn - zero_pfn;
+        return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
+}
+
+#define my_zero_pfn(addr)       page_to_pfn(ZERO_PAGE(addr))
+
 extern void paging_init(void);
 
 /*
diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h
index fd545547b8aa..9e09af34c8a8 100644
--- a/arch/mips/include/asm/smp-ops.h
+++ b/arch/mips/include/asm/smp-ops.h
@@ -19,7 +19,7 @@ struct task_struct;
 
 struct plat_smp_ops {
         void (*send_ipi_single)(int cpu, unsigned int action);
-        void (*send_ipi_mask)(cpumask_t mask, unsigned int action);
+        void (*send_ipi_mask)(const struct cpumask *mask, unsigned int action);
         void (*init_secondary)(void);
         void (*smp_finish)(void);
         void (*cpus_done)(void);
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index aaa2d4ab26dc..e15f11a09311 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -78,6 +78,6 @@ extern void play_dead(void);
 extern asmlinkage void smp_call_function_interrupt(void);
 
 extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi(cpumask_t mask);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 
 #endif /* __ASM_SMP_H */
diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
index cd30f83235bb..fcf5f98d90cc 100644
--- a/arch/mips/include/asm/system.h
+++ b/arch/mips/include/asm/system.h
@@ -32,6 +32,9 @@ extern asmlinkage void *resume(void *last, void *next, void *next_ti);
 
 struct task_struct;
 
+extern unsigned int ll_bit;
+extern struct task_struct *ll_task;
+
 #ifdef CONFIG_MIPS_MT_FPAFF
 
 /*
@@ -63,11 +66,18 @@ do {									\
 #define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
 #endif
 
+#define __clear_software_ll_bit()                                       \
+do {                                                                    \
+        if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc)       \
+                ll_bit = 0;                                             \
+} while (0)
+
 #define switch_to(prev, next, last)                                     \
 do {                                                                    \
         __mips_mt_fpaff_switch_to(prev);                                \
         if (cpu_has_dsp)                                                \
                 __save_dsp(prev);                                       \
+        __clear_software_ll_bit();                                      \
         (last) = resume(prev, next, task_thread_info(next));            \
 } while (0)
 
@@ -84,7 +94,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
 {
         __u32 retval;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long dummy;
 
                 __asm__ __volatile__(
@@ -99,7 +109,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
                 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
                 : "R" (*m), "Jr" (val)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long dummy;
 
                 __asm__ __volatile__(
@@ -136,7 +146,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
 {
         __u64 retval;
 
-        if (cpu_has_llsc && R10000_LLSC_WAR) {
+        if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long dummy;
 
                 __asm__ __volatile__(
@@ -149,7 +159,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
                 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
                 : "R" (*m), "Jr" (val)
                 : "memory");
-        } else if (cpu_has_llsc) {
+        } else if (kernel_uses_llsc) {
                 unsigned long dummy;
 
                 __asm__ __volatile__(
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index e753a777949b..8c9dfa9e9018 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -353,7 +353,7 @@
 #define __NR_preadv                     (__NR_Linux + 330)
 #define __NR_pwritev                    (__NR_Linux + 331)
 #define __NR_rt_tgsigqueueinfo          (__NR_Linux + 332)
-#define __NR_perf_counter_open          (__NR_Linux + 333)
+#define __NR_perf_event_open            (__NR_Linux + 333)
 #define __NR_accept4                    (__NR_Linux + 334)
 
 /*
@@ -664,7 +664,7 @@
 #define __NR_preadv                     (__NR_Linux + 289)
 #define __NR_pwritev                    (__NR_Linux + 290)
 #define __NR_rt_tgsigqueueinfo          (__NR_Linux + 291)
-#define __NR_perf_counter_open          (__NR_Linux + 292)
+#define __NR_perf_event_open            (__NR_Linux + 292)
 #define __NR_accept4                    (__NR_Linux + 293)
 
 /*
@@ -979,7 +979,7 @@
 #define __NR_preadv                     (__NR_Linux + 293)
 #define __NR_pwritev                    (__NR_Linux + 294)
 #define __NR_rt_tgsigqueueinfo          (__NR_Linux + 295)
-#define __NR_perf_counter_open          (__NR_Linux + 296)
+#define __NR_perf_event_open            (__NR_Linux + 296)
 #define __NR_accept4                    (__NR_Linux + 297)
 
 /*
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 8d006ec65677..2c1e1d02338b 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -183,9 +183,6 @@ void output_mm_defines(void)
         OFFSET(MM_PGD, mm_struct, pgd);
         OFFSET(MM_CONTEXT, mm_struct, context);
         BLANK();
-        DEFINE(_PAGE_SIZE, PAGE_SIZE);
-        DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
-        BLANK();
         DEFINE(_PGD_T_SIZE, sizeof(pgd_t));
         DEFINE(_PMD_T_SIZE, sizeof(pmd_t));
         DEFINE(_PTE_T_SIZE, sizeof(pte_t));
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index 02b7713cf71c..408d0a07b3a3 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -167,7 +167,7 @@ static inline void check_mult_sh(void)
         panic(bug64hit, !R4000_WAR ? r4kwar : nowar);
 }
 
-static volatile int daddi_ov __cpuinitdata = 0;
+static volatile int daddi_ov __cpuinitdata;
 
 asmlinkage void __init do_daddi_ov(struct pt_regs *regs)
 {
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 1abe9905c9c1..f709657e4dcd 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -31,7 +31,7 @@
  * The wait instruction stops the pipeline and reduces the power consumption of
  * the CPU very much.
  */
-void (*cpu_wait)(void) = NULL;
+void (*cpu_wait)(void);
 
 static void r3081_wait(void)
 {
@@ -91,16 +91,13 @@ static void rm7k_wait_irqoff(void)
         local_irq_enable();
 }
 
-/* The Au1xxx wait is available only if using 32khz counter or
- * external timer source, but specifically not CP0 Counter. */
-int allow_au1k_wait;
-
+/*
+ * The Au1xxx wait is available only if using 32khz counter or
+ * external timer source, but specifically not CP0 Counter.
+ * alchemy/common/time.c may override cpu_wait!
+ */
 static void au1k_wait(void)
 {
-        if (!allow_au1k_wait)
-                return;
-
-        /* using the wait instruction makes CP0 counter unusable */
         __asm__("       .set    mips3                   \n"
                 "       cache   0x14, 0(%0)             \n"
                 "       cache   0x14, 32(%0)            \n"
@@ -115,7 +112,7 @@ static void au1k_wait(void)
                 : : "r" (au1k_wait));
 }
 
-static int __initdata nowait = 0;
+static int __initdata nowait;
 
 static int __init wait_disable(char *s)
 {
@@ -159,6 +156,9 @@ void __init check_wait(void)
         case CPU_25KF:
         case CPU_PR4450:
         case CPU_BCM3302:
+        case CPU_BCM6338:
+        case CPU_BCM6348:
+        case CPU_BCM6358:
         case CPU_CAVIUM_OCTEON:
                 cpu_wait = r4k_wait;
                 break;
@@ -857,6 +857,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
         decode_configs(c);
         switch (c->processor_id & 0xff00) {
         case PRID_IMP_BCM3302:
+         /* same as PRID_IMP_BCM6338 */
                 c->cputype = CPU_BCM3302;
                 __cpu_name[cpu] = "Broadcom BCM3302";
                 break;
@@ -864,6 +865,25 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
                 c->cputype = CPU_BCM4710;
                 __cpu_name[cpu] = "Broadcom BCM4710";
                 break;
+        case PRID_IMP_BCM6345:
+                c->cputype = CPU_BCM6345;
+                __cpu_name[cpu] = "Broadcom BCM6345";
+                break;
+        case PRID_IMP_BCM6348:
+                c->cputype = CPU_BCM6348;
+                __cpu_name[cpu] = "Broadcom BCM6348";
+                break;
+        case PRID_IMP_BCM4350:
+                switch (c->processor_id & 0xf0) {
+                case PRID_REV_BCM6358:
+                        c->cputype = CPU_BCM6358;
+                        __cpu_name[cpu] = "Broadcom BCM6358";
+                        break;
+                default:
+                        c->cputype = CPU_UNKNOWN;
+                        break;
+                }
+                break;
         }
 }
 
diff --git a/arch/mips/kernel/init_task.c b/arch/mips/kernel/init_task.c
index 5b457a40c784..6d6ca5305895 100644
--- a/arch/mips/kernel/init_task.c
+++ b/arch/mips/kernel/init_task.c
@@ -21,9 +21,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  *
  * The things we do for performance..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"),
-                       __aligned__(THREAD_SIZE))) =
+union thread_union init_thread_union __init_task_data
+        __attribute__((__aligned__(THREAD_SIZE))) =
                 { INIT_THREAD_INFO(init_task) };
 
 /*
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index fd6e51224034..f2397f00db43 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -31,7 +31,7 @@
 #include <asm/rtlx.h>
 #include <asm/kspd.h>
 
-static struct workqueue_struct *workqueue = NULL;
+static struct workqueue_struct *workqueue;
 static struct work_struct work;
 
 extern unsigned long cpu_khz;
@@ -58,7 +58,7 @@ struct mtsp_syscall_generic {
 };
 
 static struct list_head kspd_notifylist;
-static int sp_stopping = 0;
+static int sp_stopping;
 
 /* these should match with those in the SDE kit */
 #define MTSP_SYSCALL_BASE       0
@@ -328,7 +328,7 @@ static void sp_cleanup(void)
         sys_chdir("/");
 }
 
-static int channel_open = 0;
+static int channel_open;
 
 /* the work handler */
 static void sp_work(struct work_struct *unused)
diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c
index 42461310b185..cbc6182b0065 100644
--- a/arch/mips/kernel/mips-mt-fpaff.c
+++ b/arch/mips/kernel/mips-mt-fpaff.c
@@ -18,7 +18,7 @@
 cpumask_t mt_fpu_cpumask;
 
 static int fpaff_threshold = -1;
-unsigned long mt_fpemul_threshold = 0;
+unsigned long mt_fpemul_threshold;
 
 /*
  * Replacement functions for the sys_sched_setaffinity() and
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index d01665a453f5..b2259e7cd829 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -125,10 +125,10 @@ void mips_mt_regdump(unsigned long mvpctl)
         local_irq_restore(flags);
 }
 
-static int mt_opt_norps = 0;
+static int mt_opt_norps;
 static int mt_opt_rpsctl = -1;
 static int mt_opt_nblsu = -1;
-static int mt_opt_forceconfig7 = 0;
+static int mt_opt_forceconfig7;
 static int mt_opt_config7 = -1;
 
 static int __init rps_disable(char *s)
@@ -161,8 +161,8 @@ static int __init config7_set(char *str)
 __setup("config7=", config7_set);
 
 /* Experimental cache flush control parameters that should go away some day */
-int mt_protiflush = 0;
-int mt_protdflush = 0;
+int mt_protiflush;
+int mt_protdflush;
 int mt_n_iflushes = 1;
 int mt_n_dflushes = 1;
 
@@ -194,7 +194,7 @@ static int __init ndflush(char *s)
 }
 __setup("ndflush=", ndflush);
 
-static unsigned int itc_base = 0;
+static unsigned int itc_base;
 
 static int __init set_itc_base(char *str)
 {
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel/octeon_switch.S
index d52389672b06..3952b8323efa 100644
--- a/arch/mips/kernel/octeon_switch.S
+++ b/arch/mips/kernel/octeon_switch.S
@@ -36,9 +36,6 @@
         .align  7
         LEAF(resume)
         .set arch=octeon
-#ifndef CONFIG_CPU_HAS_LLSC
-        sw      zero, ll_bit
-#endif
         mfc0    t1, CP0_STATUS
         LONG_S  t1, THREAD_STATUS(a0)
         cpu_save_nonscratch a0
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 656bde2e11b1..698414b7a253 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -46,9 +46,6 @@
  *                     struct thread_info *next_ti) )
  */
 LEAF(resume)
-#ifndef CONFIG_CPU_HAS_LLSC
-        sw      zero, ll_bit
-#endif
         mfc0    t1, CP0_STATUS
         sw      t1, THREAD_STATUS(a0)
         cpu_save_nonscratch a0
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index d9bfae53c43f..8893ee1a2368 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -45,9 +45,6 @@
  */
         .align  5
         LEAF(resume)
-#ifndef CONFIG_CPU_HAS_LLSC
-        sw      zero, ll_bit
-#endif
         mfc0    t1, CP0_STATUS
         LONG_S  t1, THREAD_STATUS(a0)
         cpu_save_nonscratch a0
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index 4ce93aa7b372..a10ebfdc28ae 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -57,7 +57,7 @@ static struct chan_waitqueues {
 } channel_wqs[RTLX_CHANNELS];
 
 static struct vpe_notifications notify;
-static int sp_stopping = 0;
+static int sp_stopping;
 
 extern void *vpe_get_shared(int index);
 
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index b57082123536..fd2a9bb620d6 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -187,78 +187,6 @@ illegal_syscall:
         j       o32_syscall_exit
         END(handle_sys)
 
-        LEAF(mips_atomic_set)
-        andi    v0, a1, 3                       # must be word aligned
-        bnez    v0, bad_alignment
-
-        lw      v1, TI_ADDR_LIMIT($28)          # in legal address range?
-        addiu   a0, a1, 4
-        or      a0, a0, a1
-        and     a0, a0, v1
-        bltz    a0, bad_address
-
-#ifdef CONFIG_CPU_HAS_LLSC
-        /* Ok, this is the ll/sc case.  World is sane :-)  */
-1:      ll      v0, (a1)
-        move    a0, a2
-2:      sc      a0, (a1)
-#if R10000_LLSC_WAR
-        beqzl   a0, 1b
-#else
-        beqz    a0, 1b
-#endif
-
-        .section __ex_table,"a"
-        PTR     1b, bad_stack
-        PTR     2b, bad_stack
-        .previous
-#else
-        sw      a1, 16(sp)
-        sw      a2, 20(sp)
-
-        move    a0, sp
-        move    a2, a1
-        li      a1, 1
-        jal     do_page_fault
-
-        lw      a1, 16(sp)
-        lw      a2, 20(sp)
-
-        /*
-         * At this point the page should be readable and writable unless
-         * there was no more memory available.
-         */
-1:      lw      v0, (a1)
-2:      sw      a2, (a1)
-
-        .section __ex_table,"a"
-        PTR     1b, no_mem
-        PTR     2b, no_mem
-        .previous
-#endif
-
-        sw      zero, PT_R7(sp)         # success
-        sw      v0, PT_R2(sp)           # result
-
-        j       o32_syscall_exit        # continue like a normal syscall
-
-no_mem: li      v0, -ENOMEM
-        jr      ra
-
-bad_address:
-        li      v0, -EFAULT
-        jr      ra
-
-bad_alignment:
-        li      v0, -EINVAL
-        jr      ra
-        END(mips_atomic_set)
-
-        LEAF(sys_sysmips)
-        beq     a0, MIPS_ATOMIC_SET, mips_atomic_set
-        j       _sys_sysmips
-        END(sys_sysmips)
-
         LEAF(sys_syscall)
         subu    t0, a0, __NR_O32_Linux  # check syscall number
         sltiu   v0, t0, __NR_O32_Linux_syscalls + 1
@@ -653,7 +581,7 @@ einval:	li	v0, -ENOSYS
         sys     sys_preadv              6       /* 4330 */
         sys     sys_pwritev             6
         sys     sys_rt_tgsigqueueinfo   4
-        sys     sys_perf_counter_open   5
+        sys     sys_perf_event_open     5
         sys     sys_accept4             4
         .endm
 
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 3d866f24e064..18bf7f32c5e4 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -124,78 +124,6 @@ illegal_syscall:
         j       n64_syscall_exit
         END(handle_sys64)
 
-        LEAF(mips_atomic_set)
-        andi    v0, a1, 3                       # must be word aligned
-        bnez    v0, bad_alignment
-
-        LONG_L  v1, TI_ADDR_LIMIT($28)          # in legal address range?
-        LONG_ADDIU      a0, a1, 4
-        or      a0, a0, a1
-        and     a0, a0, v1
-        bltz    a0, bad_address
-
-#ifdef CONFIG_CPU_HAS_LLSC
-        /* Ok, this is the ll/sc case.  World is sane :-)  */
-1:      ll      v0, (a1)
-        move    a0, a2
-2:      sc      a0, (a1)
-#if R10000_LLSC_WAR
-        beqzl   a0, 1b
-#else
-        beqz    a0, 1b
-#endif
-
-        .section __ex_table,"a"
-        PTR     1b, bad_stack
-        PTR     2b, bad_stack
-        .previous
-#else
-        sw      a1, 16(sp)
-        sw      a2, 20(sp)
-
-        move    a0, sp
-        move    a2, a1
-        li      a1, 1
-        jal     do_page_fault
-
-        lw      a1, 16(sp)
-        lw      a2, 20(sp)
-
-        /*
-         * At this point the page should be readable and writable unless
-         * there was no more memory available.
-         */
-1:      lw      v0, (a1)
-2:      sw      a2, (a1)
-
-        .section __ex_table,"a"
-        PTR     1b, no_mem
-        PTR     2b, no_mem
-        .previous
-#endif
-
-        sd      zero, PT_R7(sp)         # success
-        sd      v0, PT_R2(sp)           # result
-
-        j       n64_syscall_exit        # continue like a normal syscall
-
-no_mem: li      v0, -ENOMEM
-        jr      ra
-
-bad_address:
-        li      v0, -EFAULT
-        jr      ra
-
-bad_alignment:
-        li      v0, -EINVAL
-        jr      ra
-        END(mips_atomic_set)
-
-        LEAF(sys_sysmips)
-        beq     a0, MIPS_ATOMIC_SET, mips_atomic_set
-        j       _sys_sysmips
-        END(sys_sysmips)
-
         .align  3
 sys_call_table:
         PTR     sys_read                        /* 5000 */
@@ -490,6 +418,6 @@ sys_call_table:
         PTR     sys_preadv
         PTR     sys_pwritev                     /* 5390 */
         PTR     sys_rt_tgsigqueueinfo
-        PTR     sys_perf_counter_open
+        PTR     sys_perf_event_open
         PTR     sys_accept4
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 1a6ae124635b..6ebc07976694 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -416,6 +416,6 @@ EXPORT(sysn32_call_table)
         PTR     sys_preadv
         PTR     sys_pwritev
         PTR     compat_sys_rt_tgsigqueueinfo    /* 5295 */
-        PTR     sys_perf_counter_open
+        PTR     sys_perf_event_open
         PTR     sys_accept4
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index cd31087a651f..9bbf9775e0bd 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -536,6 +536,6 @@ sys_call_table:
         PTR     compat_sys_preadv               /* 4330 */
         PTR     compat_sys_pwritev
         PTR     compat_sys_rt_tgsigqueueinfo
-        PTR     sys_perf_counter_open
+        PTR     sys_perf_event_open
         PTR     sys_accept4
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 2950b97253b7..2b290d70083e 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -441,7 +441,7 @@ static void __init bootmem_init(void)
  * initialization hook for anything else was introduced.
  */
 
-static int usermem __initdata = 0;
+static int usermem __initdata;
 
 static int __init early_parse_mem(char *p)
 {
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index ad0ff5dc4d59..cc81771b882c 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -80,11 +80,11 @@ void cmp_send_ipi_single(int cpu, unsigned int action)
         local_irq_restore(flags);
 }
 
-static void cmp_send_ipi_mask(cpumask_t mask, unsigned int action)
+static void cmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 cmp_send_ipi_single(i, action);
 }
 
@@ -171,7 +171,7 @@ void __init cmp_smp_setup(void)
 
         for (i = 1; i < NR_CPUS; i++) {
                 if (amon_cpu_avail(i)) {
-                        cpu_set(i, cpu_possible_map);
+                        set_cpu_possible(i, true);
                         __cpu_number_map[i]     = ++ncpu;
                         __cpu_logical_map[ncpu] = i;
                 }
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 6f7ee5ac46ee..43e7cdc5ded2 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -70,7 +70,7 @@ static unsigned int __init smvp_vpe_init(unsigned int tc, unsigned int mvpconf0,
                 write_vpe_c0_vpeconf0(tmp);
 
                 /* Record this as available CPU */
-                cpu_set(tc, cpu_possible_map);
+                set_cpu_possible(tc, true);
                 __cpu_number_map[tc]    = ++ncpu;
                 __cpu_logical_map[ncpu] = tc;
         }
@@ -141,11 +141,11 @@ static void vsmp_send_ipi_single(int cpu, unsigned int action)
         local_irq_restore(flags);
 }
 
-static void vsmp_send_ipi_mask(cpumask_t mask, unsigned int action)
+static void vsmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 vsmp_send_ipi_single(i, action);
 }
 
diff --git a/arch/mips/kernel/smp-up.c b/arch/mips/kernel/smp-up.c
index 2508d55d68fd..00500fea2750 100644
--- a/arch/mips/kernel/smp-up.c
+++ b/arch/mips/kernel/smp-up.c
@@ -18,7 +18,8 @@ static void up_send_ipi_single(int cpu, unsigned int action)
         panic(KERN_ERR "%s called", __func__);
 }
 
-static inline void up_send_ipi_mask(cpumask_t mask, unsigned int action)
+static inline void up_send_ipi_mask(const struct cpumask *mask,
+                                    unsigned int action)
 {
         panic(KERN_ERR "%s called", __func__);
 }
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index bc7d9b05e2f4..4eb106c6a3ec 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -32,6 +32,7 @@
 #include <linux/cpumask.h>
 #include <linux/cpu.h>
 #include <linux/err.h>
+#include <linux/smp.h>
 
 #include <asm/atomic.h>
 #include <asm/cpu.h>
@@ -49,8 +50,6 @@ volatile cpumask_t cpu_callin_map;	/* Bitmask of started secondaries */
 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
 
-extern void cpu_idle(void);
-
 /* Number of TCs (or siblings in Intel speak) per CPU core */
 int smp_num_siblings = 1;
 EXPORT_SYMBOL(smp_num_siblings);
@@ -129,7 +128,7 @@ asmlinkage __cpuinit void start_secondary(void)
         cpu_idle();
 }
 
-void arch_send_call_function_ipi(cpumask_t mask)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION);
 }
@@ -184,15 +183,15 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         mp_ops->prepare_cpus(max_cpus);
         set_cpu_sibling_map(0);
 #ifndef CONFIG_HOTPLUG_CPU
-        cpu_present_map = cpu_possible_map;
+        init_cpu_present(&cpu_possible_map);
 #endif
 }
 
 /* preload SMP state for boot cpu */
 void __devinit smp_prepare_boot_cpu(void)
 {
-        cpu_set(0, cpu_possible_map);
-        cpu_set(0, cpu_online_map);
+        set_cpu_possible(0, true);
+        set_cpu_online(0, true);
         cpu_set(0, cpu_callin_map);
 }
 
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index c16bb6d6c25c..67153a0dc267 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -95,14 +95,14 @@ void init_smtc_stats(void);
 
 /* Global SMTC Status */
 
-unsigned int smtc_status = 0;
+unsigned int smtc_status;
 
 /* Boot command line configuration overrides */
 
 static int vpe0limit;
-static int ipibuffers = 0;
-static int nostlb = 0;
-static int asidmask = 0;
+static int ipibuffers;
+static int nostlb;
+static int asidmask;
 unsigned long smtc_asid_mask = 0xff;
 
 static int __init vpe0tcs(char *str)
@@ -151,7 +151,7 @@ __setup("asidmask=", asidmask_set);
 
 #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
 
-static int hang_trig = 0;
+static int hang_trig;
 
 static int __init hangtrig_enable(char *s)
 {
@@ -305,7 +305,7 @@ int __init smtc_build_cpu_map(int start_cpu_slot)
          */
         ntcs = ((read_c0_mvpconf0() & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1;
         for (i=start_cpu_slot; i<NR_CPUS && i<ntcs; i++) {
-                cpu_set(i, cpu_possible_map);
+                set_cpu_possible(i, true);
                 __cpu_number_map[i] = i;
                 __cpu_logical_map[i] = i;
         }
@@ -525,8 +525,8 @@ void smtc_prepare_cpus(int cpus)
          * Pull any physically present but unused TCs out of circulation.
          */
         while (tc < (((val & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1)) {
-                cpu_clear(tc, cpu_possible_map);
-                cpu_clear(tc, cpu_present_map);
+                set_cpu_possible(tc, false);
+                set_cpu_present(tc, false);
                 tc++;
         }
 
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 8cf384644040..3fe1fcfa2e73 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -28,7 +28,9 @@
 #include <linux/compiler.h>
 #include <linux/module.h>
 #include <linux/ipc.h>
+#include <linux/uaccess.h>
 
+#include <asm/asm.h>
 #include <asm/branch.h>
 #include <asm/cachectl.h>
 #include <asm/cacheflush.h>
@@ -290,12 +292,116 @@ SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
         return 0;
 }
 
-asmlinkage int _sys_sysmips(long cmd, long arg1, long arg2, long arg3)
+static inline int mips_atomic_set(struct pt_regs *regs,
+        unsigned long addr, unsigned long new)
 {
+        unsigned long old, tmp;
+        unsigned int err;
+
+        if (unlikely(addr & 3))
+                return -EINVAL;
+
+        if (unlikely(!access_ok(VERIFY_WRITE, addr, 4)))
+                return -EINVAL;
+
+        if (cpu_has_llsc && R10000_LLSC_WAR) {
+                __asm__ __volatile__ (
+                "       li      %[err], 0                               \n"
+                "1:     ll      %[old], (%[addr])                       \n"
+                "       move    %[tmp], %[new]                          \n"
+                "2:     sc      %[tmp], (%[addr])                       \n"
+                "       beqzl   %[tmp], 1b                              \n"
+                "3:                                                     \n"
+                "       .section .fixup,\"ax\"                          \n"
+                "4:     li      %[err], %[efault]                       \n"
+                "       j       3b                                      \n"
+                "       .previous                                       \n"
+                "       .section __ex_table,\"a\"                       \n"
+                "       "STR(PTR)"      1b, 4b                          \n"
+                "       "STR(PTR)"      2b, 4b                          \n"
+                "       .previous                                       \n"
+                : [old] "=&r" (old),
+                  [err] "=&r" (err),
+                  [tmp] "=&r" (tmp)
+                : [addr] "r" (addr),
+                  [new] "r" (new),
+                  [efault] "i" (-EFAULT)
+                : "memory");
+        } else if (cpu_has_llsc) {
+                __asm__ __volatile__ (
+                "       li      %[err], 0                               \n"
+                "1:     ll      %[old], (%[addr])                       \n"
+                "       move    %[tmp], %[new]                          \n"
+                "2:     sc      %[tmp], (%[addr])                       \n"
+                "       bnez    %[tmp], 4f                              \n"
+                "3:                                                     \n"
+                "       .subsection 2                                   \n"
+                "4:     b       1b                                      \n"
+                "       .previous                                       \n"
+                "                                                       \n"
+                "       .section .fixup,\"ax\"                          \n"
+                "5:     li      %[err], %[efault]                       \n"
+                "       j       3b                                      \n"
+                "       .previous                                       \n"
+                "       .section __ex_table,\"a\"                       \n"
+                "       "STR(PTR)"      1b, 5b                          \n"
+                "       "STR(PTR)"      2b, 5b                          \n"
+                "       .previous                                       \n"
+                : [old] "=&r" (old),
+                  [err] "=&r" (err),
+                  [tmp] "=&r" (tmp)
+                : [addr] "r" (addr),
+                  [new] "r" (new),
+                  [efault] "i" (-EFAULT)
+                : "memory");
+        } else {
+                do {
+                        preempt_disable();
+                        ll_bit = 1;
+                        ll_task = current;
+                        preempt_enable();
+
+                        err = __get_user(old, (unsigned int *) addr);
+                        err |= __put_user(new, (unsigned int *) addr);
+                        if (err)
+                                break;
+                        rmb();
+                } while (!ll_bit);
+        }
+
+        if (unlikely(err))
+                return err;
+
+        regs->regs[2] = old;
+        regs->regs[7] = 0;      /* No error */
+
+        /*
+         * Don't let your children do this ...
+         */
+        __asm__ __volatile__(
+        "       move    $29, %0                                         \n"
+        "       j       syscall_exit                                    \n"
+        : /* no outputs */
+        : "r" (regs));
+
+        /* unreached.  Honestly.  */
+        while (1);
+}
+
+save_static_function(sys_sysmips);
+static int __used noinline
+_sys_sysmips(nabi_no_regargs struct pt_regs regs)
+{
+        long cmd, arg1, arg2, arg3;
+
+        cmd = regs.regs[4];
+        arg1 = regs.regs[5];
+        arg2 = regs.regs[6];
+        arg3 = regs.regs[7];
+
         switch (cmd) {
         case MIPS_ATOMIC_SET:
-                printk(KERN_CRIT "How did I get here?\n");
-                return -EINVAL;
+                return mips_atomic_set(&regs, arg1, arg2);
 
         case MIPS_FIXADE:
                 if (arg1 & ~3)
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 08f1edf355e8..0a18b4c62afb 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -466,9 +466,8 @@ asmlinkage void do_be(struct pt_regs *regs)
  * The ll_bit is cleared by r*_switch.S
  */
 
-unsigned long ll_bit;
-
-static struct task_struct *ll_task = NULL;
+unsigned int ll_bit;
+struct task_struct *ll_task;
 
 static inline int simulate_ll(struct pt_regs *regs, unsigned int opcode)
 {
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 1474c18fb777..9bf0e3df7c5a 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -1,4 +1,5 @@
 #include <asm/asm-offsets.h>
+#include <asm/page.h>
 #include <asm-generic/vmlinux.lds.h>
 
 #undef mips
@@ -9,7 +10,16 @@ PHDRS {
         text PT_LOAD FLAGS(7);  /* RWX */
         note PT_NOTE FLAGS(4);  /* R__ */
 }
-jiffies = JIFFIES;
+
+ifdef CONFIG_32BIT
+        ifdef CONFIG_CPU_LITTLE_ENDIAN
+                jiffies  = jiffies_64;
+        else
+                jiffies  = jiffies_64 + 4;
+        endif
+else
+        jiffies  = jiffies_64;
+endif
 
 SECTIONS
 {
@@ -28,7 +38,7 @@ SECTIONS
         /* . = 0xa800000000300000; */
         . = 0xffffffff80300000;
 #endif
-        . = LOADADDR;
+        . = VMLINUX_LOAD_ADDRESS;
         /* read-only */
         _text = .;      /* Text and read-only data */
         .text : {
@@ -42,13 +52,7 @@ SECTIONS
         } :text = 0
         _etext = .;     /* End of text section */
 
-        /* Exception table */
-        . = ALIGN(16);
-        __ex_table : {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
+        EXCEPTION_TABLE(16)
 
         /* Exception table for data bus errors */
         __dbe_table : {
@@ -65,20 +69,10 @@ SECTIONS
         /* writeable */
         .data : {       /* Data */
                 . = . + DATAOFFSET;             /* for CONFIG_MAPPED_KERNEL */
-                /*
-                 * This ALIGN is needed as a workaround for a bug a
-                 * gcc bug upto 4.1 which limits the maximum alignment
-                 * to at most 32kB and results in the following
-                 * warning:
-                 *
-                 *  CC      arch/mips/kernel/init_task.o
-                 * arch/mips/kernel/init_task.c:30: warning: alignment
-                 * of ‘init_thread_union’ is greater than maximum
-                 * object file alignment.  Using 32768
-                 */
-                . = ALIGN(_PAGE_SIZE);
-                *(.data.init_task)
 
+                INIT_TASK_DATA(PAGE_SIZE)
+                NOSAVE_DATA
+                CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
                 DATA_DATA
                 CONSTRUCTORS
         }
@@ -95,51 +89,13 @@ SECTIONS
         .sdata : {
                 *(.sdata)
         }
-
-        . = ALIGN(_PAGE_SIZE);
-        .data_nosave : {
-                __nosave_begin = .;
-                *(.data.nosave)
-        }
-        . = ALIGN(_PAGE_SIZE);
-        __nosave_end = .;
-
-        . = ALIGN(1 << CONFIG_MIPS_L1_CACHE_SHIFT);
-        .data.cacheline_aligned : {
-                *(.data.cacheline_aligned)
-        }
         _edata =  .;                    /* End of data section */
 
         /* will be freed after init */
-        . = ALIGN(_PAGE_SIZE);          /* Init code and data */
+        . = ALIGN(PAGE_SIZE);           /* Init code and data */
         __init_begin = .;
-        .init.text : {
-                _sinittext = .;
-                INIT_TEXT
-                _einittext = .;
-        }
-        .init.data : {
-                INIT_DATA
-        }
-        . = ALIGN(16);
-        .init.setup : {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
-        }
-
-        .initcall.init : {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
-        }
-
-        .con_initcall.init : {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
-        }
-        SECURITY_INIT
+        INIT_TEXT_SECTION(PAGE_SIZE)
+        INIT_DATA_SECTION(16)
 
         /* .exit.text is discarded at runtime, not link time, to deal with
          * references from .rodata
@@ -150,29 +106,13 @@ SECTIONS
         .exit.data : {
                 EXIT_DATA
         }
-#if defined(CONFIG_BLK_DEV_INITRD)
-        . = ALIGN(_PAGE_SIZE);
-        .init.ramfs : {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
-        }
-#endif
-        PERCPU(_PAGE_SIZE)
-        . = ALIGN(_PAGE_SIZE);
+
+        PERCPU(PAGE_SIZE)
+        . = ALIGN(PAGE_SIZE);
         __init_end = .;
         /* freed after init ends here */
 
-        __bss_start = .;        /* BSS */
-        .sbss  : {
-                *(.sbss)
-                *(.scommon)
-        }
-        .bss : {
-                *(.bss)
-                *(COMMON)
-        }
-        __bss_stop = .;
+        BSS_SECTION(0, 0, 0)
 
         _end = . ;
 
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 9a1ab7e87fd4..eb6c4c5b7fbe 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -74,7 +74,7 @@ static const int minor = 1;	/* fixed for now  */
 
 #ifdef CONFIG_MIPS_APSP_KSPD
 static struct kspd_notifications kspd_events;
-static int kspd_events_reqd = 0;
+static int kspd_events_reqd;
 #endif
 
 /* grab the likely amount of memory we will need. */
diff --git a/arch/mips/lasat/ds1603.c b/arch/mips/lasat/ds1603.c
index 52cb1436a12a..c6fd96ff118d 100644
--- a/arch/mips/lasat/ds1603.c
+++ b/arch/mips/lasat/ds1603.c
@@ -135,7 +135,7 @@ static void rtc_end_op(void)
         lasat_ndelay(1000);
 }
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
         unsigned long word;
         unsigned long flags;
@@ -147,7 +147,8 @@ unsigned long read_persistent_clock(void)
         rtc_end_op();
         spin_unlock_irqrestore(&rtc_lock, flags);
 
-        return word;
+        ts->tv_sec = word;
+        ts->tv_nsec = 0;
 }
 
 int rtc_mips_set_mmss(unsigned long time)
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index 8f88886feb12..b3deed8db619 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -56,12 +56,12 @@ int sysctl_lasatstring(ctl_table *table,
 
 
 /* And the same for proc */
-int proc_dolasatstring(ctl_table *table, int write, struct file *filp,
+int proc_dolasatstring(ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         int r;
 
-        r = proc_dostring(table, write, filp, buffer, lenp, ppos);
+        r = proc_dostring(table, write, buffer, lenp, ppos);
         if ((!write) || r)
                 return r;
 
@@ -71,12 +71,12 @@ int proc_dolasatstring(ctl_table *table, int write, struct file *filp,
 }
 
 /* proc function to write EEPROM after changing int entry */
-int proc_dolasatint(ctl_table *table, int write, struct file *filp,
+int proc_dolasatint(ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         int r;
 
-        r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
+        r = proc_dointvec(table, write, buffer, lenp, ppos);
         if ((!write) || r)
                 return r;
 
@@ -89,18 +89,20 @@ int proc_dolasatint(ctl_table *table, int write, struct file *filp,
 static int rtctmp;
 
 /* proc function to read/write RealTime Clock */
-int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
+int proc_dolasatrtc(ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
+        struct timespec ts;
         int r;
 
         if (!write) {
-                rtctmp = read_persistent_clock();
+                read_persistent_clock(&ts);
+                rtctmp = ts.tv_sec;
                 /* check for time < 0 and set to 0 */
                 if (rtctmp < 0)
                         rtctmp = 0;
         }
-        r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
+        r = proc_dointvec(table, write, buffer, lenp, ppos);
         if (r)
                 return r;
 
@@ -134,9 +136,11 @@ int sysctl_lasat_rtc(ctl_table *table,
                     void *oldval, size_t *oldlenp,
                     void *newval, size_t newlen)
 {
+        struct timespec ts;
         int r;
 
-        rtctmp = read_persistent_clock();
+        read_persistent_clock(&ts);
+        rtctmp = ts.tv_sec;
         if (rtctmp < 0)
                 rtctmp = 0;
         r = sysctl_intvec(table, oldval, oldlenp, newval, newlen);
@@ -150,7 +154,7 @@ int sysctl_lasat_rtc(ctl_table *table,
 #endif
 
 #ifdef CONFIG_INET
-int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
+int proc_lasat_ip(ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         unsigned int ip;
@@ -227,12 +231,12 @@ static int sysctl_lasat_prid(ctl_table *table,
         return 0;
 }
 
-int proc_lasat_prid(ctl_table *table, int write, struct file *filp,
+int proc_lasat_prid(ctl_table *table, int write,
                        void *buffer, size_t *lenp, loff_t *ppos)
 {
         int r;
 
-        r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
+        r = proc_dointvec(table, write, buffer, lenp, ppos);
         if (r < 0)
                 return r;
         if (write) {
diff --git a/arch/mips/lemote/lm2e/Makefile b/arch/mips/lemote/lm2e/Makefile
deleted file mode 100644
index d34671d1b899..000000000000
--- a/arch/mips/lemote/lm2e/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Makefile for Lemote Fulong mini-PC board.
-#
-
-obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o dbg_io.o mem.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/lemote/lm2e/dbg_io.c b/arch/mips/lemote/lm2e/dbg_io.c
deleted file mode 100644
index 6c95da3ca76f..000000000000
--- a/arch/mips/lemote/lm2e/dbg_io.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
- *
- * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
- * Author: Fuxin Zhang, zhangfx@lemote.com
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <linux/io.h>
-#include <linux/init.h>
-#include <linux/types.h>
-
-#include <asm/serial.h>
-
-#define         UART16550_BAUD_2400             2400
-#define         UART16550_BAUD_4800             4800
-#define         UART16550_BAUD_9600             9600
-#define         UART16550_BAUD_19200            19200
-#define         UART16550_BAUD_38400            38400
-#define         UART16550_BAUD_57600            57600
-#define         UART16550_BAUD_115200           115200
-
-#define         UART16550_PARITY_NONE           0
-#define         UART16550_PARITY_ODD            0x08
-#define         UART16550_PARITY_EVEN           0x18
-#define         UART16550_PARITY_MARK           0x28
-#define         UART16550_PARITY_SPACE          0x38
-
-#define         UART16550_DATA_5BIT             0x0
-#define         UART16550_DATA_6BIT             0x1
-#define         UART16550_DATA_7BIT             0x2
-#define         UART16550_DATA_8BIT             0x3
-
-#define         UART16550_STOP_1BIT             0x0
-#define         UART16550_STOP_2BIT             0x4
-
-/* ----------------------------------------------------- */
-
-/* === CONFIG === */
-#ifdef CONFIG_64BIT
-#define         BASE                    (0xffffffffbfd003f8)
-#else
-#define         BASE                    (0xbfd003f8)
-#endif
-
-#define         MAX_BAUD                BASE_BAUD
-/* === END OF CONFIG === */
-
-#define         REG_OFFSET              1
-
-/* register offset */
-#define         OFS_RCV_BUFFER          0
-#define         OFS_TRANS_HOLD          0
-#define         OFS_SEND_BUFFER         0
-#define         OFS_INTR_ENABLE         (1*REG_OFFSET)
-#define         OFS_INTR_ID             (2*REG_OFFSET)
-#define         OFS_DATA_FORMAT         (3*REG_OFFSET)
-#define         OFS_LINE_CONTROL        (3*REG_OFFSET)
-#define         OFS_MODEM_CONTROL       (4*REG_OFFSET)
-#define         OFS_RS232_OUTPUT        (4*REG_OFFSET)
-#define         OFS_LINE_STATUS         (5*REG_OFFSET)
-#define         OFS_MODEM_STATUS        (6*REG_OFFSET)
-#define         OFS_RS232_INPUT         (6*REG_OFFSET)
-#define         OFS_SCRATCH_PAD         (7*REG_OFFSET)
-
-#define         OFS_DIVISOR_LSB         (0*REG_OFFSET)
-#define         OFS_DIVISOR_MSB         (1*REG_OFFSET)
-
-/* memory-mapped read/write of the port */
-#define         UART16550_READ(y)       readb((char *)BASE + (y))
-#define         UART16550_WRITE(y, z)   writeb(z, (char *)BASE + (y))
-
-void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
-{
-        u32 divisor;
-
-        /* disable interrupts */
-        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-
-        /* set up buad rate */
-        /* set DIAB bit */
-        UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
-
-        /* set divisor */
-        divisor = MAX_BAUD / baud;
-        UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
-        UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
-
-        /* clear DIAB bit */
-        UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
-
-        /* set data format */
-        UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
-}
-
-static int remoteDebugInitialized;
-
-u8 getDebugChar(void)
-{
-        if (!remoteDebugInitialized) {
-                remoteDebugInitialized = 1;
-                debugInit(UART16550_BAUD_115200,
-                          UART16550_DATA_8BIT,
-                          UART16550_PARITY_NONE, UART16550_STOP_1BIT);
-        }
-
-        while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0) ;
-        return UART16550_READ(OFS_RCV_BUFFER);
-}
-
-int putDebugChar(u8 byte)
-{
-        if (!remoteDebugInitialized) {
-                remoteDebugInitialized = 1;
-                /*
-                   debugInit(UART16550_BAUD_115200,
-                   UART16550_DATA_8BIT,
-                   UART16550_PARITY_NONE, UART16550_STOP_1BIT); */
-        }
-
-        while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0) ;
-        UART16550_WRITE(OFS_SEND_BUFFER, byte);
-        return 1;
-}
diff --git a/arch/mips/lemote/lm2e/irq.c b/arch/mips/lemote/lm2e/irq.c
deleted file mode 100644
index 1d0a09f3b832..000000000000
--- a/arch/mips/lemote/lm2e/irq.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
- * Author: Fuxin Zhang, zhangfx@lemote.com
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-
-#include <asm/irq_cpu.h>
-#include <asm/i8259.h>
-#include <asm/mipsregs.h>
-#include <asm/mips-boards/bonito64.h>
-
-
-/*
- * the first level int-handler will jump here if it is a bonito irq
- */
-static void bonito_irqdispatch(void)
-{
-        u32 int_status;
-        int i;
-
-        /* workaround the IO dma problem: let cpu looping to allow DMA finish */
-        int_status = BONITO_INTISR;
-        if (int_status & (1 << 10)) {
-                while (int_status & (1 << 10)) {
-                        udelay(1);
-                        int_status = BONITO_INTISR;
-                }
-        }
-
-        /* Get pending sources, masked by current enables */
-        int_status = BONITO_INTISR & BONITO_INTEN;
-
-        if (int_status != 0) {
-                i = __ffs(int_status);
-                int_status &= ~(1 << i);
-                do_IRQ(BONITO_IRQ_BASE + i);
-        }
-}
-
-static void i8259_irqdispatch(void)
-{
-        int irq;
-
-        irq = i8259_irq();
-        if (irq >= 0) {
-                do_IRQ(irq);
-        } else {
-                spurious_interrupt();
-        }
-
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
-        unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
-
-        if (pending & CAUSEF_IP7) {
-                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
-        } else if (pending & CAUSEF_IP5) {
-                i8259_irqdispatch();
-        } else if (pending & CAUSEF_IP2) {
-                bonito_irqdispatch();
-        } else {
-                spurious_interrupt();
-        }
-}
-
-static struct irqaction cascade_irqaction = {
-        .handler = no_action,
-        .name = "cascade",
-};
-
-void __init arch_init_irq(void)
-{
-        extern void bonito_irq_init(void);
-
-        /*
-         * Clear all of the interrupts while we change the able around a bit.
-         * int-handler is not on bootstrap
-         */
-        clear_c0_status(ST0_IM | ST0_BEV);
-        local_irq_disable();
-
-        /* most bonito irq should be level triggered */
-        BONITO_INTEDGE = BONITO_ICU_SYSTEMERR | BONITO_ICU_MASTERERR |
-                BONITO_ICU_RETRYERR | BONITO_ICU_MBOXES;
-        BONITO_INTSTEER = 0;
-
-        /*
-         * Mask out all interrupt by writing "1" to all bit position in
-         * the interrupt reset reg.
-         */
-        BONITO_INTENCLR = ~0;
-
-        /* init all controller
-         *   0-15         ------> i8259 interrupt
-         *   16-23        ------> mips cpu interrupt
-         *   32-63        ------> bonito irq
-         */
-
-        /* Sets the first-level interrupt dispatcher. */
-        mips_cpu_irq_init();
-        init_i8259_irqs();
-        bonito_irq_init();
-
-        /*
-        printk("GPIODATA=%x, GPIOIE=%x\n", BONITO_GPIODATA, BONITO_GPIOIE);
-        printk("INTEN=%x, INTSET=%x, INTCLR=%x, INTISR=%x\n",
-                        BONITO_INTEN, BONITO_INTENSET,
-                        BONITO_INTENCLR, BONITO_INTISR);
-        */
-
-        /* bonito irq at IP2 */
-        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction);
-        /* 8259 irq at IP5 */
-        setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
-
-}
diff --git a/arch/mips/lemote/lm2e/pci.c b/arch/mips/lemote/lm2e/pci.c
deleted file mode 100644
index 8be03a8e1ad4..000000000000
--- a/arch/mips/lemote/lm2e/pci.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * pci.c
- *
- * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
- * Author: Fuxin Zhang, zhangfx@lemote.com
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <asm/mips-boards/bonito64.h>
-#include <asm/mach-lemote/pci.h>
-
-extern struct pci_ops bonito64_pci_ops;
-
-static struct resource loongson2e_pci_mem_resource = {
-        .name   = "LOONGSON2E PCI MEM",
-        .start  = LOONGSON2E_PCI_MEM_START,
-        .end    = LOONGSON2E_PCI_MEM_END,
-        .flags  = IORESOURCE_MEM,
-};
-
-static struct resource loongson2e_pci_io_resource = {
-        .name   = "LOONGSON2E PCI IO MEM",
-        .start  = LOONGSON2E_PCI_IO_START,
-        .end    = IO_SPACE_LIMIT,
-        .flags  = IORESOURCE_IO,
-};
-
-static struct pci_controller  loongson2e_pci_controller = {
-        .pci_ops        = &bonito64_pci_ops,
-        .io_resource    = &loongson2e_pci_io_resource,
-        .mem_resource   = &loongson2e_pci_mem_resource,
-        .mem_offset     = 0x00000000UL,
-        .io_offset      = 0x00000000UL,
-};
-
-static void __init ict_pcimap(void)
-{
-        /*
-         * local to PCI mapping: [256M,512M] -> [256M,512M]; differ from PMON
-         *
-         * CPU address space [256M,448M] is window for accessing pci space
-         * we set pcimap_lo[0,1,2] to map it to pci space [256M,448M]
-         * pcimap: bit18,pcimap_2; bit[17-12],lo2;bit[11-6],lo1;bit[5-0],lo0
-         */
-        /* 1,00 0110 ,0001 01,00 0000 */
-        BONITO_PCIMAP = 0x46140;
-
-        /* 1, 00 0010, 0000,01, 00 0000 */
-        /* BONITO_PCIMAP = 0x42040; */
-
-        /*
-         * PCI to local mapping: [2G,2G+256M] -> [0,256M]
-         */
-        BONITO_PCIBASE0 = 0x80000000;
-        BONITO_PCIBASE1 = 0x00800000;
-        BONITO_PCIBASE2 = 0x90000000;
-
-}
-
-static int __init pcibios_init(void)
-{
-        ict_pcimap();
-
-        loongson2e_pci_controller.io_map_base =
-            (unsigned long) ioremap(LOONGSON2E_IO_PORT_BASE,
-                                    loongson2e_pci_io_resource.end -
-                                    loongson2e_pci_io_resource.start + 1);
-
-        register_pci_controller(&loongson2e_pci_controller);
-
-        return 0;
-}
-
-arch_initcall(pcibios_init);
diff --git a/arch/mips/lemote/lm2e/prom.c b/arch/mips/lemote/lm2e/prom.c
deleted file mode 100644
index 7edc15dfed6c..000000000000
--- a/arch/mips/lemote/lm2e/prom.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Based on Ocelot Linux port, which is
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * Copyright 2003 ICT CAS
- * Author: Michael Guo <guoyi@ict.ac.cn>
- *
- * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
- * Author: Fuxin Zhang, zhangfx@lemote.com
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-#include <linux/init.h>
-#include <linux/bootmem.h>
-#include <asm/bootinfo.h>
-
-extern unsigned long bus_clock;
-extern unsigned long cpu_clock_freq;
-extern unsigned int memsize, highmemsize;
-extern int putDebugChar(unsigned char byte);
-
-static int argc;
-/* pmon passes arguments in 32bit pointers */
-static int *arg;
-static int *env;
-
-const char *get_system_type(void)
-{
-        return "lemote-fulong";
-}
-
-void __init prom_init_cmdline(void)
-{
-        int i;
-        long l;
-
-        /* arg[0] is "g", the rest is boot parameters */
-        arcs_cmdline[0] = '\0';
-        for (i = 1; i < argc; i++) {
-                l = (long)arg[i];
-                if (strlen(arcs_cmdline) + strlen(((char *)l) + 1)
-                    >= sizeof(arcs_cmdline))
-                        break;
-                strcat(arcs_cmdline, ((char *)l));
-                strcat(arcs_cmdline, " ");
-        }
-}
-
-void __init prom_init(void)
-{
-        long l;
-        argc = fw_arg0;
-        arg = (int *)fw_arg1;
-        env = (int *)fw_arg2;
-
-        prom_init_cmdline();
-
-        if ((strstr(arcs_cmdline, "console=")) == NULL)
-                strcat(arcs_cmdline, " console=ttyS0,115200");
-        if ((strstr(arcs_cmdline, "root=")) == NULL)
-                strcat(arcs_cmdline, " root=/dev/hda1");
-
-#define parse_even_earlier(res, option, p)                              \
-do {                                                                    \
-        if (strncmp(option, (char *)p, strlen(option)) == 0)            \
-                res = simple_strtol((char *)p + strlen(option"="),      \
-                                    NULL, 10);                          \
-} while (0)
-
-        l = (long)*env;
-        while (l != 0) {
-                parse_even_earlier(bus_clock, "busclock", l);
-                parse_even_earlier(cpu_clock_freq, "cpuclock", l);
-                parse_even_earlier(memsize, "memsize", l);
-                parse_even_earlier(highmemsize, "highmemsize", l);
-                env++;
-                l = (long)*env;
-        }
-        if (memsize == 0)
-                memsize = 256;
-
-        pr_info("busclock=%ld, cpuclock=%ld,memsize=%d,highmemsize=%d\n",
-               bus_clock, cpu_clock_freq, memsize, highmemsize);
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-void prom_putchar(char c)
-{
-        putDebugChar(c);
-}
diff --git a/arch/mips/lemote/lm2e/reset.c b/arch/mips/lemote/lm2e/reset.c
deleted file mode 100644
index 099387a3827a..000000000000
--- a/arch/mips/lemote/lm2e/reset.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
- * Author: Fuxin Zhang, zhangfx@lemote.com
- */
-#include <linux/pm.h>
-
-#include <asm/reboot.h>
-
-static void loongson2e_restart(char *command)
-{
-#ifdef CONFIG_32BIT
-        *(unsigned long *)0xbfe00104 &= ~(1 << 2);
-        *(unsigned long *)0xbfe00104 |= (1 << 2);
-#else
-        *(unsigned long *)0xffffffffbfe00104 &= ~(1 << 2);
-        *(unsigned long *)0xffffffffbfe00104 |= (1 << 2);
-#endif
-        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
-}
-
-static void loongson2e_halt(void)
-{
-        while (1) ;
-}
-
-static void loongson2e_power_off(void)
-{
-        loongson2e_halt();
-}
-
-void mips_reboot_setup(void)
-{
-        _machine_restart = loongson2e_restart;
-        _machine_halt = loongson2e_halt;
-        pm_power_off = loongson2e_power_off;
-}
diff --git a/arch/mips/lemote/lm2e/setup.c b/arch/mips/lemote/lm2e/setup.c
deleted file mode 100644
index ebd6ceaef2fd..000000000000
--- a/arch/mips/lemote/lm2e/setup.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * setup.c - board dependent boot routines
- *
- * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
- * Author: Fuxin Zhang, zhangfx@lemote.com
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#include <linux/bootmem.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-
-#include <asm/bootinfo.h>
-#include <asm/mc146818-time.h>
-#include <asm/time.h>
-#include <asm/wbflush.h>
-#include <asm/mach-lemote/pci.h>
-
-#ifdef CONFIG_VT
-#include <linux/console.h>
-#include <linux/screen_info.h>
-#endif
-
-extern void mips_reboot_setup(void);
-
-unsigned long cpu_clock_freq;
-unsigned long bus_clock;
-unsigned int memsize;
-unsigned int highmemsize = 0;
-
-void __init plat_time_init(void)
-{
-        /* setup mips r4k timer */
-        mips_hpt_frequency = cpu_clock_freq / 2;
-}
-
-unsigned long read_persistent_clock(void)
-{
-        return mc146818_get_cmos_time();
-}
-
-void (*__wbflush)(void);
-EXPORT_SYMBOL(__wbflush);
-
-static void wbflush_loongson2e(void)
-{
-        asm(".set\tpush\n\t"
-            ".set\tnoreorder\n\t"
-            ".set mips3\n\t"
-            "sync\n\t"
-            "nop\n\t"
-            ".set\tpop\n\t"
-            ".set mips0\n\t");
-}
-
-void __init plat_mem_setup(void)
-{
-        set_io_port_base((unsigned long)ioremap(LOONGSON2E_IO_PORT_BASE,
-                                IO_SPACE_LIMIT - LOONGSON2E_PCI_IO_START + 1));
-        mips_reboot_setup();
-
-        __wbflush = wbflush_loongson2e;
-
-        add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
-#ifdef CONFIG_64BIT
-        if (highmemsize > 0) {
-                add_memory_region(0x20000000, highmemsize << 20, BOOT_MEM_RAM);
-        }
-#endif
-
-#ifdef CONFIG_VT
-#if defined(CONFIG_VGA_CONSOLE)
-        conswitchp = &vga_con;
-
-        screen_info = (struct screen_info) {
-                0, 25,          /* orig-x, orig-y */
-                    0,          /* unused */
-                    0,          /* orig-video-page */
-                    0,          /* orig-video-mode */
-                    80,         /* orig-video-cols */
-                    0, 0, 0,    /* ega_ax, ega_bx, ega_cx */
-                    25,         /* orig-video-lines */
-                    VIDEO_TYPE_VGAC,    /* orig-video-isVGA */
-                    16          /* orig-video-points */
-        };
-#elif defined(CONFIG_DUMMY_CONSOLE)
-        conswitchp = &dummy_con;
-#endif
-#endif
-
-}
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
new file mode 100644
index 000000000000..d45092505fa1
--- /dev/null
+++ b/arch/mips/loongson/Kconfig
@@ -0,0 +1,31 @@
+choice
+    prompt "Machine Type"
+    depends on MACH_LOONGSON
+
+config LEMOTE_FULOONG2E
+    bool "Lemote Fuloong(2e) mini-PC"
+    select ARCH_SPARSEMEM_ENABLE
+    select CEVT_R4K
+    select CSRC_R4K
+    select SYS_HAS_CPU_LOONGSON2E
+    select DMA_NONCOHERENT
+    select BOOT_ELF32
+    select BOARD_SCACHE
+    select HW_HAS_PCI
+    select I8259
+    select ISA
+    select IRQ_CPU
+    select SYS_SUPPORTS_32BIT_KERNEL
+    select SYS_SUPPORTS_64BIT_KERNEL
+    select SYS_SUPPORTS_LITTLE_ENDIAN
+    select SYS_SUPPORTS_HIGHMEM
+    select SYS_HAS_EARLY_PRINTK
+    select GENERIC_HARDIRQS_NO__DO_IRQ
+    select GENERIC_ISA_DMA_SUPPORT_BROKEN
+    select CPU_HAS_WB
+    help
+      Lemote Fuloong(2e) mini-PC board based on the Chinese Loongson-2E CPU and
+      an FPGA northbridge
+
+      Lemote Fuloong(2e) mini PC have a VIA686B south bridge.
+endchoice
diff --git a/arch/mips/loongson/Makefile b/arch/mips/loongson/Makefile
new file mode 100644
index 000000000000..39048c455d7d
--- /dev/null
+++ b/arch/mips/loongson/Makefile
@@ -0,0 +1,11 @@
+#
+# Common code for all Loongson based systems
+#
+
+obj-$(CONFIG_MACH_LOONGSON) += common/
+
+#
+# Lemote Fuloong mini-PC (Loongson 2E-based)
+#
+
+obj-$(CONFIG_LEMOTE_FULOONG2E)  += fuloong-2e/
diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile
new file mode 100644
index 000000000000..656b3cc0a2a6
--- /dev/null
+++ b/arch/mips/loongson/common/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for loongson based machines.
+#
+
+obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \
+    pci.o bonito-irq.o mem.o machtype.o
+
+#
+# Early printk support
+#
+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
diff --git a/arch/mips/lemote/lm2e/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c
index 8fc3bce7075b..3e31e7ad713e 100644
--- a/arch/mips/lemote/lm2e/bonito-irq.c
+++ b/arch/mips/loongson/common/bonito-irq.c
@@ -10,32 +10,10 @@
  *  under  the terms of  the GNU General  Public License as published by the
  *  Free Software Foundation;  either version 2 of the  License, or (at your
  *  option) any later version.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
  */
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/types.h>
 #include <linux/interrupt.h>
-#include <linux/irq.h>
-
-#include <asm/mips-boards/bonito64.h>
 
+#include <loongson.h>
 
 static inline void bonito_irq_enable(unsigned int irq)
 {
@@ -66,9 +44,8 @@ void bonito_irq_init(void)
 {
         u32 i;
 
-        for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) {
+        for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++)
                 set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq);
-        }
 
         setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction);
 }
diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson/common/cmdline.c
new file mode 100644
index 000000000000..75f1b243ee4e
--- /dev/null
+++ b/arch/mips/loongson/common/cmdline.c
@@ -0,0 +1,52 @@
+/*
+ * Based on Ocelot Linux port, which is
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright 2003 ICT CAS
+ * Author: Michael Guo <guoyi@ict.ac.cn>
+ *
+ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ *
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <asm/bootinfo.h>
+
+#include <loongson.h>
+
+int prom_argc;
+/* pmon passes arguments in 32bit pointers */
+int *_prom_argv;
+
+void __init prom_init_cmdline(void)
+{
+        int i;
+        long l;
+
+        /* firmware arguments are initialized in head.S */
+        prom_argc = fw_arg0;
+        _prom_argv = (int *)fw_arg1;
+
+        /* arg[0] is "g", the rest is boot parameters */
+        arcs_cmdline[0] = '\0';
+        for (i = 1; i < prom_argc; i++) {
+                l = (long)_prom_argv[i];
+                if (strlen(arcs_cmdline) + strlen(((char *)l) + 1)
+                    >= sizeof(arcs_cmdline))
+                        break;
+                strcat(arcs_cmdline, ((char *)l));
+                strcat(arcs_cmdline, " ");
+        }
+
+        if ((strstr(arcs_cmdline, "console=")) == NULL)
+                strcat(arcs_cmdline, " console=ttyS0,115200");
+        if ((strstr(arcs_cmdline, "root=")) == NULL)
+                strcat(arcs_cmdline, " root=/dev/hda1");
+}
diff --git a/arch/mips/loongson/common/early_printk.c b/arch/mips/loongson/common/early_printk.c
new file mode 100644
index 000000000000..bc73edc0cfd8
--- /dev/null
+++ b/arch/mips/loongson/common/early_printk.c
@@ -0,0 +1,38 @@
+/*  early printk support
+ *
+ *  Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
+ *  Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ *  Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <linux/serial_reg.h>
+
+#include <loongson.h>
+#include <machine.h>
+
+#define PORT(base, offset) (u8 *)(base + offset)
+
+static inline unsigned int serial_in(phys_addr_t base, int offset)
+{
+        return readb(PORT(base, offset));
+}
+
+static inline void serial_out(phys_addr_t base, int offset, int value)
+{
+        writeb(value, PORT(base, offset));
+}
+
+void prom_putchar(char c)
+{
+        phys_addr_t uart_base =
+                (phys_addr_t) ioremap_nocache(LOONGSON_UART_BASE, 8);
+
+        while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0)
+                ;
+
+        serial_out(uart_base, UART_TX, c);
+}
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c
new file mode 100644
index 000000000000..b9ef50385541
--- /dev/null
+++ b/arch/mips/loongson/common/env.c
@@ -0,0 +1,58 @@
+/*
+ * Based on Ocelot Linux port, which is
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright 2003 ICT CAS
+ * Author: Michael Guo <guoyi@ict.ac.cn>
+ *
+ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ *
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <asm/bootinfo.h>
+
+#include <loongson.h>
+
+unsigned long bus_clock, cpu_clock_freq;
+unsigned long memsize, highmemsize;
+
+/* pmon passes arguments in 32bit pointers */
+int *_prom_envp;
+
+#define parse_even_earlier(res, option, p)                              \
+do {                                                                    \
+        if (strncmp(option, (char *)p, strlen(option)) == 0)            \
+                        strict_strtol((char *)p + strlen(option"="),    \
+                                        10, &res);                      \
+} while (0)
+
+void __init prom_init_env(void)
+{
+        long l;
+
+        /* firmware arguments are initialized in head.S */
+        _prom_envp = (int *)fw_arg2;
+
+        l = (long)*_prom_envp;
+        while (l != 0) {
+                parse_even_earlier(bus_clock, "busclock", l);
+                parse_even_earlier(cpu_clock_freq, "cpuclock", l);
+                parse_even_earlier(memsize, "memsize", l);
+                parse_even_earlier(highmemsize, "highmemsize", l);
+                _prom_envp++;
+                l = (long)*_prom_envp;
+        }
+        if (memsize == 0)
+                memsize = 256;
+
+        pr_info("busclock=%ld, cpuclock=%ld, memsize=%ld, highmemsize=%ld\n",
+                bus_clock, cpu_clock_freq, memsize, highmemsize);
+}
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c
new file mode 100644
index 000000000000..3abe927422a3
--- /dev/null
+++ b/arch/mips/loongson/common/init.c
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/bootmem.h>
+
+#include <asm/bootinfo.h>
+
+#include <loongson.h>
+
+void __init prom_init(void)
+{
+    /* init base address of io space */
+        set_io_port_base((unsigned long)
+                ioremap(BONITO_PCIIO_BASE, BONITO_PCIIO_SIZE));
+
+        prom_init_cmdline();
+        prom_init_env();
+        prom_init_memory();
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c
new file mode 100644
index 000000000000..f368c735cbd3
--- /dev/null
+++ b/arch/mips/loongson/common/irq.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <loongson.h>
+/*
+ * the first level int-handler will jump here if it is a bonito irq
+ */
+void bonito_irqdispatch(void)
+{
+        u32 int_status;
+        int i;
+
+        /* workaround the IO dma problem: let cpu looping to allow DMA finish */
+        int_status = BONITO_INTISR;
+        if (int_status & (1 << 10)) {
+                while (int_status & (1 << 10)) {
+                        udelay(1);
+                        int_status = BONITO_INTISR;
+                }
+        }
+
+        /* Get pending sources, masked by current enables */
+        int_status = BONITO_INTISR & BONITO_INTEN;
+
+        if (int_status != 0) {
+                i = __ffs(int_status);
+                int_status &= ~(1 << i);
+                do_IRQ(BONITO_IRQ_BASE + i);
+        }
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+        unsigned int pending;
+
+        pending = read_c0_cause() & read_c0_status() & ST0_IM;
+
+        /* machine-specific plat_irq_dispatch */
+        mach_irq_dispatch(pending);
+}
+
+void __init arch_init_irq(void)
+{
+        /*
+         * Clear all of the interrupts while we change the able around a bit.
+         * int-handler is not on bootstrap
+         */
+        clear_c0_status(ST0_IM | ST0_BEV);
+        local_irq_disable();
+
+        /* setting irq trigger mode */
+        set_irq_trigger_mode();
+
+        /* no steer */
+        BONITO_INTSTEER = 0;
+
+        /*
+         * Mask out all interrupt by writing "1" to all bit position in
+         * the interrupt reset reg.
+         */
+        BONITO_INTENCLR = ~0;
+
+        /* machine specific irq init */
+        mach_init_irq();
+}
diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson/common/machtype.c
new file mode 100644
index 000000000000..7b348248de7d
--- /dev/null
+++ b/arch/mips/loongson/common/machtype.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ * Copyright (c) 2009 Zhang Le <r0bertz@gentoo.org>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/errno.h>
+#include <asm/bootinfo.h>
+
+#include <loongson.h>
+#include <machine.h>
+
+static const char *system_types[] = {
+        [MACH_LOONGSON_UNKNOWN]         "unknown loongson machine",
+        [MACH_LEMOTE_FL2E]              "lemote-fuloong-2e-box",
+        [MACH_LEMOTE_FL2F]              "lemote-fuloong-2f-box",
+        [MACH_LEMOTE_ML2F7]             "lemote-mengloong-2f-7inches",
+        [MACH_LEMOTE_YL2F89]            "lemote-yeeloong-2f-8.9inches",
+        [MACH_DEXXON_GDIUM2F10]         "dexxon-gidum-2f-10inches",
+        [MACH_LOONGSON_END]             NULL,
+};
+
+const char *get_system_type(void)
+{
+        if (mips_machtype == MACH_UNKNOWN)
+                mips_machtype = LOONGSON_MACHTYPE;
+
+        return system_types[mips_machtype];
+}
+
+static __init int machtype_setup(char *str)
+{
+        int machtype = MACH_LEMOTE_FL2E;
+
+        if (!str)
+                return -EINVAL;
+
+        for (; system_types[machtype]; machtype++)
+                if (strstr(system_types[machtype], str)) {
+                        mips_machtype = machtype;
+                        break;
+                }
+        return 0;
+}
+__setup("machtype=", machtype_setup);
diff --git a/arch/mips/lemote/lm2e/mem.c b/arch/mips/loongson/common/mem.c
index 16cd21587d34..7c92f79b6480 100644
--- a/arch/mips/lemote/lm2e/mem.c
+++ b/arch/mips/loongson/common/mem.c
@@ -8,16 +8,28 @@
 #include <linux/fcntl.h>
 #include <linux/mm.h>
 
+#include <asm/bootinfo.h>
+
+#include <loongson.h>
+#include <mem.h>
+
+void __init prom_init_memory(void)
+{
+    add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM);
+#ifdef CONFIG_64BIT
+    if (highmemsize > 0)
+        add_memory_region(LOONGSON_HIGHMEM_START,
+                highmemsize << 20, BOOT_MEM_RAM);
+#endif /* CONFIG_64BIT */
+}
+
 /* override of arch/mips/mm/cache.c: __uncached_access */
 int __uncached_access(struct file *file, unsigned long addr)
 {
         if (file->f_flags & O_SYNC)
                 return 1;
 
-        /*
-         * On the Lemote Loongson 2e system, the peripheral registers
-         * reside between 0x1000:0000 and 0x2000:0000.
-         */
         return addr >= __pa(high_memory) ||
-                ((addr >= 0x10000000) && (addr < 0x20000000));
+                ((addr >= LOONGSON_MMIO_MEM_START) &&
+                 (addr < LOONGSON_MMIO_MEM_END));
 }
diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c
new file mode 100644
index 000000000000..a3a4abfb6c9a
--- /dev/null
+++ b/arch/mips/loongson/common/pci.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <linux/pci.h>
+
+#include <pci.h>
+#include <loongson.h>
+
+static struct resource loongson_pci_mem_resource = {
+        .name   = "pci memory space",
+        .start  = LOONGSON_PCI_MEM_START,
+        .end    = LOONGSON_PCI_MEM_END,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct resource loongson_pci_io_resource = {
+        .name   = "pci io space",
+        .start  = LOONGSON_PCI_IO_START,
+        .end    = IO_SPACE_LIMIT,
+        .flags  = IORESOURCE_IO,
+};
+
+static struct pci_controller  loongson_pci_controller = {
+        .pci_ops        = &bonito64_pci_ops,
+        .io_resource    = &loongson_pci_io_resource,
+        .mem_resource   = &loongson_pci_mem_resource,
+        .mem_offset     = 0x00000000UL,
+        .io_offset      = 0x00000000UL,
+};
+
+static void __init setup_pcimap(void)
+{
+        /*
+         * local to PCI mapping for CPU accessing PCI space
+         * CPU address space [256M,448M] is window for accessing pci space
+         * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M]
+         *
+         * pcimap: PCI_MAP2  PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0
+         *           [<2G]   [384M,448M] [320M,384M] [0M,64M]
+         */
+        BONITO_PCIMAP = BONITO_PCIMAP_PCIMAP_2 |
+                BONITO_PCIMAP_WIN(2, BONITO_PCILO2_BASE) |
+                BONITO_PCIMAP_WIN(1, BONITO_PCILO1_BASE) |
+                BONITO_PCIMAP_WIN(0, 0);
+
+        /*
+         * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M]
+         */
+        BONITO_PCIBASE0 = 0x80000000ul;   /* base: 2G -> mmap: 0M */
+        /* size: 256M, burst transmission, pre-fetch enable, 64bit */
+        LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul;
+        LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful;
+        LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */
+        LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul;
+        LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */
+        LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul;
+
+        /* avoid deadlock of PCI reading/writing lock operation */
+        LOONGSON_PCI_ISR4C = 0xd2000001ul;
+
+        /* can not change gnt to break pci transfer when device's gnt not
+        deassert for some broken device */
+        LOONGSON_PXARB_CFG = 0x00fe0105ul;
+}
+
+static int __init pcibios_init(void)
+{
+        setup_pcimap();
+
+        loongson_pci_controller.io_map_base = mips_io_port_base;
+
+        register_pci_controller(&loongson_pci_controller);
+
+        return 0;
+}
+
+arch_initcall(pcibios_init);
diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c
new file mode 100644
index 000000000000..97e918251edd
--- /dev/null
+++ b/arch/mips/loongson/common/reset.c
@@ -0,0 +1,44 @@
+/*
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
+ * Author: Zhangjin Wu, wuzj@lemote.com
+ */
+#include <linux/init.h>
+#include <linux/pm.h>
+
+#include <asm/reboot.h>
+
+#include <loongson.h>
+
+static void loongson_restart(char *command)
+{
+        /* do preparation for reboot */
+        mach_prepare_reboot();
+
+        /* reboot via jumping to boot base address */
+        ((void (*)(void))ioremap_nocache(BONITO_BOOT_BASE, 4)) ();
+}
+
+static void loongson_halt(void)
+{
+        mach_prepare_shutdown();
+        while (1)
+                ;
+}
+
+static int __init mips_reboot_setup(void)
+{
+        _machine_restart = loongson_restart;
+        _machine_halt = loongson_halt;
+        pm_power_off = loongson_halt;
+
+        return 0;
+}
+
+arch_initcall(mips_reboot_setup);
diff --git a/arch/mips/loongson/common/setup.c b/arch/mips/loongson/common/setup.c
new file mode 100644
index 000000000000..4cd2aa9a342c
--- /dev/null
+++ b/arch/mips/loongson/common/setup.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <linux/module.h>
+
+#include <asm/wbflush.h>
+
+#include <loongson.h>
+
+#ifdef CONFIG_VT
+#include <linux/console.h>
+#include <linux/screen_info.h>
+#endif
+
+void (*__wbflush)(void);
+EXPORT_SYMBOL(__wbflush);
+
+static void wbflush_loongson(void)
+{
+        asm(".set\tpush\n\t"
+            ".set\tnoreorder\n\t"
+            ".set mips3\n\t"
+            "sync\n\t"
+            "nop\n\t"
+            ".set\tpop\n\t"
+            ".set mips0\n\t");
+}
+
+void __init plat_mem_setup(void)
+{
+        __wbflush = wbflush_loongson;
+
+#ifdef CONFIG_VT
+#if defined(CONFIG_VGA_CONSOLE)
+        conswitchp = &vga_con;
+
+        screen_info = (struct screen_info) {
+                0, 25,          /* orig-x, orig-y */
+                    0,          /* unused */
+                    0,          /* orig-video-page */
+                    0,          /* orig-video-mode */
+                    80,         /* orig-video-cols */
+                    0, 0, 0,    /* ega_ax, ega_bx, ega_cx */
+                    25,         /* orig-video-lines */
+                    VIDEO_TYPE_VGAC,    /* orig-video-isVGA */
+                    16          /* orig-video-points */
+        };
+#elif defined(CONFIG_DUMMY_CONSOLE)
+        conswitchp = &dummy_con;
+#endif
+#endif
+}
diff --git a/arch/mips/loongson/common/time.c b/arch/mips/loongson/common/time.c
new file mode 100644
index 000000000000..6e08c8270abe
--- /dev/null
+++ b/arch/mips/loongson/common/time.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ *
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <asm/mc146818-time.h>
+#include <asm/time.h>
+
+#include <loongson.h>
+
+void __init plat_time_init(void)
+{
+        /* setup mips r4k timer */
+        mips_hpt_frequency = cpu_clock_freq / 2;
+}
+
+void read_persistent_clock(struct timespec *ts)
+{
+        ts->tv_sec = mc146818_get_cmos_time();
+        ts->tv_nsec = 0;
+}
diff --git a/arch/mips/loongson/fuloong-2e/Makefile b/arch/mips/loongson/fuloong-2e/Makefile
new file mode 100644
index 000000000000..3aba5fcc09dc
--- /dev/null
+++ b/arch/mips/loongson/fuloong-2e/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for Lemote Fuloong2e mini-PC board.
+#
+
+obj-y += irq.o reset.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson/fuloong-2e/irq.c
new file mode 100644
index 000000000000..7888cf69424a
--- /dev/null
+++ b/arch/mips/loongson/fuloong-2e/irq.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology
+ * Author: Fuxin Zhang, zhangfx@lemote.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <linux/interrupt.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/i8259.h>
+
+#include <loongson.h>
+
+static void i8259_irqdispatch(void)
+{
+        int irq;
+
+        irq = i8259_irq();
+        if (irq >= 0)
+                do_IRQ(irq);
+        else
+                spurious_interrupt();
+}
+
+asmlinkage void mach_irq_dispatch(unsigned int pending)
+{
+        if (pending & CAUSEF_IP7)
+                do_IRQ(MIPS_CPU_IRQ_BASE + 7);
+        else if (pending & CAUSEF_IP6) /* perf counter loverflow */
+                do_IRQ(LOONGSON2_PERFCNT_IRQ);
+        else if (pending & CAUSEF_IP5)
+                i8259_irqdispatch();
+        else if (pending & CAUSEF_IP2)
+                bonito_irqdispatch();
+        else
+                spurious_interrupt();
+}
+
+static struct irqaction cascade_irqaction = {
+        .handler = no_action,
+        .name = "cascade",
+};
+
+void __init set_irq_trigger_mode(void)
+{
+        /* most bonito irq should be level triggered */
+        BONITO_INTEDGE = BONITO_ICU_SYSTEMERR | BONITO_ICU_MASTERERR |
+            BONITO_ICU_RETRYERR | BONITO_ICU_MBOXES;
+}
+
+void __init mach_init_irq(void)
+{
+        /* init all controller
+         *   0-15         ------> i8259 interrupt
+         *   16-23        ------> mips cpu interrupt
+         *   32-63        ------> bonito irq
+         */
+
+        /* Sets the first-level interrupt dispatcher. */
+        mips_cpu_irq_init();
+        init_i8259_irqs();
+        bonito_irq_init();
+
+        /* bonito irq at IP2 */
+        setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction);
+        /* 8259 irq at IP5 */
+        setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);
+}
diff --git a/arch/mips/loongson/fuloong-2e/reset.c b/arch/mips/loongson/fuloong-2e/reset.c
new file mode 100644
index 000000000000..677fe186db95
--- /dev/null
+++ b/arch/mips/loongson/fuloong-2e/reset.c
@@ -0,0 +1,23 @@
+/* Board-specific reboot/shutdown routines
+ * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
+ *
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <loongson.h>
+
+void mach_prepare_reboot(void)
+{
+        BONITO_BONGENCFG &= ~(1 << 2);
+        BONITO_BONGENCFG |= (1 << 2);
+}
+
+void mach_prepare_shutdown(void)
+{
+}
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
index 7c7148ef2646..2877675c5f0d 100644
--- a/arch/mips/mipssim/sim_setup.c
+++ b/arch/mips/mipssim/sim_setup.c
@@ -37,7 +37,7 @@
 
 
 static void __init serial_init(void);
-unsigned int _isbonito = 0;
+unsigned int _isbonito;
 
 const char *get_system_type(void)
 {
diff --git a/arch/mips/mipssim/sim_smtc.c b/arch/mips/mipssim/sim_smtc.c
index d6e4f656ad14..5da30b6a65b7 100644
--- a/arch/mips/mipssim/sim_smtc.c
+++ b/arch/mips/mipssim/sim_smtc.c
@@ -43,11 +43,12 @@ static void ssmtc_send_ipi_single(int cpu, unsigned int action)
         /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
 }
 
-static inline void ssmtc_send_ipi_mask(cpumask_t mask, unsigned int action)
+static inline void ssmtc_send_ipi_mask(const struct cpumask *mask,
+                                       unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 ssmtc_send_ipi_single(i, action);
 }
 
diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c
index 10ab69f7183f..94e05e5733c1 100644
--- a/arch/mips/mm/c-octeon.c
+++ b/arch/mips/mm/c-octeon.c
@@ -79,7 +79,7 @@ static void octeon_flush_icache_all_cores(struct vm_area_struct *vma)
          * cores it has been used on
          */
         if (vma)
-                mask = vma->vm_mm->cpu_vm_mask;
+                mask = *mm_cpumask(vma->vm_mm);
         else
                 mask = cpu_online_map;
         cpu_clear(cpu, mask);
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index f956ecbb8136..e97a7a2fb2c0 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -58,11 +58,17 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
          * only copy the information from the master page table,
          * nothing more.
          */
+#ifdef CONFIG_64BIT
+# define VMALLOC_FAULT_TARGET no_context
+#else
+# define VMALLOC_FAULT_TARGET vmalloc_fault
+#endif
+
         if (unlikely(address >= VMALLOC_START && address <= VMALLOC_END))
-                goto vmalloc_fault;
+                goto VMALLOC_FAULT_TARGET;
 #ifdef MODULE_START
         if (unlikely(address >= MODULE_START && address < MODULE_END))
-                goto vmalloc_fault;
+                goto VMALLOC_FAULT_TARGET;
 #endif
 
         /*
@@ -203,6 +209,7 @@ do_sigbus:
         force_sig_info(SIGBUS, &info, tsk);
 
         return;
+#ifndef CONFIG_64BIT
 vmalloc_fault:
         {
                 /*
@@ -241,4 +248,5 @@ vmalloc_fault:
                         goto no_context;
                 return;
         }
+#endif
 }
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 0e820508ff23..15aa1902a788 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -352,7 +352,6 @@ void __init paging_init(void)
         free_area_init_nodes(max_zone_pfns);
 }
 
-static struct kcore_list kcore_mem, kcore_vmalloc;
 #ifdef CONFIG_64BIT
 static struct kcore_list kcore_kseg0;
 #endif
@@ -409,15 +408,13 @@ void __init mem_init(void)
         if ((unsigned long) &_text > (unsigned long) CKSEG0)
                 /* The -4 is a hack so that user tools don't have to handle
                    the overflow.  */
-                kclist_add(&kcore_kseg0, (void *) CKSEG0, 0x80000000 - 4);
+                kclist_add(&kcore_kseg0, (void *) CKSEG0,
+                                0x80000000 - 4, KCORE_TEXT);
 #endif
-        kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
-        kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
-                   VMALLOC_END-VMALLOC_START);
 
         printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
                "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                ram << (PAGE_SHIFT-10),
                codesize >> 10,
                reservedpages << (PAGE_SHIFT-10),
@@ -475,9 +472,6 @@ unsigned long pgd_current[NR_CPUS];
  */
 pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER);
 #ifdef CONFIG_64BIT
-#ifdef MODULE_START
-pgd_t module_pg_dir[PTRS_PER_PGD] __page_aligned(PGD_ORDER);
-#endif
 pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER);
 #endif
 pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER);
diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c
index e4b565aeb008..1121019fa456 100644
--- a/arch/mips/mm/pgtable-64.c
+++ b/arch/mips/mm/pgtable-64.c
@@ -59,9 +59,6 @@ void __init pagetable_init(void)
 
         /* Initialize the entire pgd.  */
         pgd_init((unsigned long)swapper_pg_dir);
-#ifdef MODULE_START
-        pgd_init((unsigned long)module_pg_dir);
-#endif
         pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
 
         pgd_base = swapper_pg_dir;
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index cee502caf398..d73428b18b0a 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -475,7 +475,7 @@ static void __cpuinit probe_tlb(unsigned long config)
         c->tlbsize = ((reg >> 25) & 0x3f) + 1;
 }
 
-static int __cpuinitdata ntlb = 0;
+static int __cpuinitdata ntlb;
 static int __init set_ntlb(char *str)
 {
         get_option(&str, &ntlb);
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 9a17bf8395df..bb1719a55d22 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -321,6 +321,10 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         case CPU_BCM3302:
         case CPU_BCM4710:
         case CPU_LOONGSON2:
+        case CPU_BCM6338:
+        case CPU_BCM6345:
+        case CPU_BCM6348:
+        case CPU_BCM6358:
         case CPU_R5500:
                 if (m4kc_tlbp_war())
                         uasm_i_nop(p);
@@ -499,11 +503,7 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
          * The vmalloc handling is not in the hotpath.
          */
         uasm_i_dmfc0(p, tmp, C0_BADVADDR);
-#ifdef MODULE_START
-        uasm_il_bltz(p, r, tmp, label_module_alloc);
-#else
         uasm_il_bltz(p, r, tmp, label_vmalloc);
-#endif
         /* No uasm_i_nop needed here, since the next insn doesn't touch TMP. */
 
 #ifdef CONFIG_SMP
@@ -556,52 +556,7 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
 {
         long swpd = (long)swapper_pg_dir;
 
-#ifdef MODULE_START
-        long modd = (long)module_pg_dir;
-
-        uasm_l_module_alloc(l, *p);
-        /*
-         * Assumption:
-         * VMALLOC_START >= 0xc000000000000000UL
-         * MODULE_START >= 0xe000000000000000UL
-         */
-        UASM_i_SLL(p, ptr, bvaddr, 2);
-        uasm_il_bgez(p, r, ptr, label_vmalloc);
-
-        if (uasm_in_compat_space_p(MODULE_START) &&
-            !uasm_rel_lo(MODULE_START)) {
-                uasm_i_lui(p, ptr, uasm_rel_hi(MODULE_START)); /* delay slot */
-        } else {
-                /* unlikely configuration */
-                uasm_i_nop(p); /* delay slot */
-                UASM_i_LA(p, ptr, MODULE_START);
-        }
-        uasm_i_dsubu(p, bvaddr, bvaddr, ptr);
-
-        if (uasm_in_compat_space_p(modd) && !uasm_rel_lo(modd)) {
-                uasm_il_b(p, r, label_vmalloc_done);
-                uasm_i_lui(p, ptr, uasm_rel_hi(modd));
-        } else {
-                UASM_i_LA_mostly(p, ptr, modd);
-                uasm_il_b(p, r, label_vmalloc_done);
-                if (uasm_in_compat_space_p(modd))
-                        uasm_i_addiu(p, ptr, ptr, uasm_rel_lo(modd));
-                else
-                        uasm_i_daddiu(p, ptr, ptr, uasm_rel_lo(modd));
-        }
-
         uasm_l_vmalloc(l, *p);
-        if (uasm_in_compat_space_p(MODULE_START) &&
-            !uasm_rel_lo(MODULE_START) &&
-            MODULE_START << 32 == VMALLOC_START)
-                uasm_i_dsll32(p, ptr, ptr, 0);  /* typical case */
-        else
-                UASM_i_LA(p, ptr, VMALLOC_START);
-#else
-        uasm_l_vmalloc(l, *p);
-        UASM_i_LA(p, ptr, VMALLOC_START);
-#endif
-        uasm_i_dsubu(p, bvaddr, bvaddr, ptr);
 
         if (uasm_in_compat_space_p(swpd) && !uasm_rel_lo(swpd)) {
                 uasm_il_b(p, r, label_vmalloc_done);
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 27c807b67fea..f1b14c8a4a1c 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -47,7 +47,7 @@ int *_prom_argv, *_prom_envp;
  */
 #define prom_envp(index) ((char *)(long)_prom_envp[(index)])
 
-int init_debug = 0;
+int init_debug;
 
 static int mips_revision_corid;
 int mips_revision_sconid;
diff --git a/arch/mips/mti-malta/malta-reset.c b/arch/mips/mti-malta/malta-reset.c
index f48d60e84290..329420536241 100644
--- a/arch/mips/mti-malta/malta-reset.c
+++ b/arch/mips/mti-malta/malta-reset.c
@@ -22,6 +22,7 @@
  * Reset the MIPS boards.
  *
  */
+#include <linux/init.h>
 #include <linux/pm.h>
 
 #include <asm/io.h>
@@ -45,9 +46,13 @@ static void mips_machine_halt(void)
 }
 
 
-void mips_reboot_setup(void)
+static int __init mips_reboot_setup(void)
 {
         _machine_restart = mips_machine_restart;
         _machine_halt = mips_machine_halt;
         pm_power_off = mips_machine_halt;
+
+        return 0;
 }
+
+arch_initcall(mips_reboot_setup);
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c
index dc78b8983eeb..b7f37d4982fa 100644
--- a/arch/mips/mti-malta/malta-setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
@@ -218,7 +218,6 @@ void __init plat_mem_setup(void)
 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
         screen_info_setup();
 #endif
-        mips_reboot_setup();
 
         board_be_init = malta_be_init;
         board_be_handler = malta_be_handler;
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index 499ffe5475df..192cfd2a539c 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -21,11 +21,11 @@ static void msmtc_send_ipi_single(int cpu, unsigned int action)
         smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
 }
 
-static void msmtc_send_ipi_mask(cpumask_t mask, unsigned int action)
+static void msmtc_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 msmtc_send_ipi_single(i, action);
 }
 
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 0b97d47691fc..3c6f190aa61c 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -100,9 +100,10 @@ static unsigned int __init estimate_cpu_frequency(void)
         return count;
 }
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
-        return mc146818_get_cmos_time();
+        ts->tv_sec = mc146818_get_cmos_time();
+        ts->tv_nsec = 0;
 }
 
 static void __init plat_perf_setup(void)
diff --git a/arch/mips/nxp/pnx833x/stb22x/board.c b/arch/mips/nxp/pnx833x/stb22x/board.c
index 90cc604bdadf..644eb7c3210f 100644
--- a/arch/mips/nxp/pnx833x/stb22x/board.c
+++ b/arch/mips/nxp/pnx833x/stb22x/board.c
@@ -39,7 +39,7 @@
 #define PNX8335_DEBUG7 0x441c
 
 int prom_argc;
-char **prom_argv = 0, **prom_envp = 0;
+char **prom_argv, **prom_envp;
 
 extern void prom_init_cmdline(void);
 extern char *prom_getenv(char *envname);
diff --git a/arch/mips/nxp/pnx8550/common/proc.c b/arch/mips/nxp/pnx8550/common/proc.c
index acf1fa889444..af094cd1d85b 100644
--- a/arch/mips/nxp/pnx8550/common/proc.c
+++ b/arch/mips/nxp/pnx8550/common/proc.c
@@ -69,9 +69,9 @@ static int pnx8550_registers_read(char* page, char** start, off_t offset, int co
         return len;
 }
 
-static struct proc_dir_entry* pnx8550_dir        = NULL;
-static struct proc_dir_entry* pnx8550_timers     = NULL;
-static struct proc_dir_entry* pnx8550_registers  = NULL;
+static struct proc_dir_entry* pnx8550_dir;
+static struct proc_dir_entry* pnx8550_timers;
+static struct proc_dir_entry* pnx8550_registers;
 
 static int pnx8550_proc_init( void )
 {
diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile
index bf3be6fcf7ff..02cc65e52d11 100644
--- a/arch/mips/oprofile/Makefile
+++ b/arch/mips/oprofile/Makefile
@@ -15,3 +15,4 @@ oprofile-$(CONFIG_CPU_MIPS64)		+= op_model_mipsxx.o
 oprofile-$(CONFIG_CPU_R10000)           += op_model_mipsxx.o
 oprofile-$(CONFIG_CPU_SB1)              += op_model_mipsxx.o
 oprofile-$(CONFIG_CPU_RM9000)           += op_model_rm9000.o
+oprofile-$(CONFIG_CPU_LOONGSON2)        += op_model_loongson2.o
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index 3bf3354547f6..7832ad257a14 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -16,6 +16,7 @@
 
 extern struct op_mips_model op_model_mipsxx_ops __attribute__((weak));
 extern struct op_mips_model op_model_rm9000_ops __attribute__((weak));
+extern struct op_mips_model op_model_loongson2_ops __attribute__((weak));
 
 static struct op_mips_model *model;
 
@@ -93,6 +94,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         case CPU_RM9000:
                 lmodel = &op_model_rm9000_ops;
                 break;
+        case CPU_LOONGSON2:
+                lmodel = &op_model_loongson2_ops;
+                break;
         };
 
         if (!lmodel)
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c
new file mode 100644
index 000000000000..655cb8dec340
--- /dev/null
+++ b/arch/mips/oprofile/op_model_loongson2.c
@@ -0,0 +1,177 @@
+/*
+ * Loongson2 performance counter driver for oprofile
+ *
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Yanhua <yanh@lemote.com>
+ * Author: Wu Zhangjin <wuzj@lemote.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+#include <linux/init.h>
+#include <linux/oprofile.h>
+#include <linux/interrupt.h>
+
+#include <loongson.h>                   /* LOONGSON2_PERFCNT_IRQ */
+#include "op_impl.h"
+
+/*
+ * a patch should be sent to oprofile with the loongson-specific support.
+ * otherwise, the oprofile tool will not recognize this and complain about
+ * "cpu_type 'unset' is not valid".
+ */
+#define LOONGSON2_CPU_TYPE      "mips/godson2"
+
+#define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5)
+#define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9)
+
+#define LOONGSON2_PERFCNT_EXL                   (1UL    <<  0)
+#define LOONGSON2_PERFCNT_KERNEL                (1UL    <<  1)
+#define LOONGSON2_PERFCNT_SUPERVISOR    (1UL    <<  2)
+#define LOONGSON2_PERFCNT_USER                  (1UL    <<  3)
+#define LOONGSON2_PERFCNT_INT_EN                (1UL    <<  4)
+#define LOONGSON2_PERFCNT_OVERFLOW              (1ULL   << 31)
+
+/* Loongson2 performance counter register */
+#define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
+#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
+#define read_c0_perfcnt() __read_64bit_c0_register($25, 0)
+#define write_c0_perfcnt(val) __write_64bit_c0_register($25, 0, val)
+
+static struct loongson2_register_config {
+        unsigned int ctrl;
+        unsigned long long reset_counter1;
+        unsigned long long reset_counter2;
+        int cnt1_enalbed, cnt2_enalbed;
+} reg;
+
+DEFINE_SPINLOCK(sample_lock);
+
+static char *oprofid = "LoongsonPerf";
+static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
+/* Compute all of the registers in preparation for enabling profiling.  */
+
+static void loongson2_reg_setup(struct op_counter_config *cfg)
+{
+        unsigned int ctrl = 0;
+
+        reg.reset_counter1 = 0;
+        reg.reset_counter2 = 0;
+        /* Compute the performance counter ctrl word.  */
+        /* For now count kernel and user mode */
+        if (cfg[0].enabled) {
+                ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event);
+                reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
+        }
+
+        if (cfg[1].enabled) {
+                ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event);
+                reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
+        }
+
+        if (cfg[0].enabled || cfg[1].enabled) {
+                ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN;
+                if (cfg[0].kernel || cfg[1].kernel)
+                        ctrl |= LOONGSON2_PERFCNT_KERNEL;
+                if (cfg[0].user || cfg[1].user)
+                        ctrl |= LOONGSON2_PERFCNT_USER;
+        }
+
+        reg.ctrl = ctrl;
+
+        reg.cnt1_enalbed = cfg[0].enabled;
+        reg.cnt2_enalbed = cfg[1].enabled;
+
+}
+
+/* Program all of the registers in preparation for enabling profiling.  */
+
+static void loongson2_cpu_setup(void *args)
+{
+        uint64_t perfcount;
+
+        perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1;
+        write_c0_perfcnt(perfcount);
+}
+
+static void loongson2_cpu_start(void *args)
+{
+        /* Start all counters on current CPU */
+        if (reg.cnt1_enalbed || reg.cnt2_enalbed)
+                write_c0_perfctrl(reg.ctrl);
+}
+
+static void loongson2_cpu_stop(void *args)
+{
+        /* Stop all counters on current CPU */
+        write_c0_perfctrl(0);
+        memset(&reg, 0, sizeof(reg));
+}
+
+static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
+{
+        uint64_t counter, counter1, counter2;
+        struct pt_regs *regs = get_irq_regs();
+        int enabled;
+        unsigned long flags;
+
+        /*
+         * LOONGSON2 defines two 32-bit performance counters.
+         * To avoid a race updating the registers we need to stop the counters
+         * while we're messing with
+         * them ...
+         */
+
+        /* Check whether the irq belongs to me */
+        enabled = reg.cnt1_enalbed | reg.cnt2_enalbed;
+        if (!enabled)
+                return IRQ_NONE;
+
+        counter = read_c0_perfcnt();
+        counter1 = counter & 0xffffffff;
+        counter2 = counter >> 32;
+
+        spin_lock_irqsave(&sample_lock, flags);
+
+        if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
+                if (reg.cnt1_enalbed)
+                        oprofile_add_sample(regs, 0);
+                counter1 = reg.reset_counter1;
+        }
+        if (counter2 & LOONGSON2_PERFCNT_OVERFLOW) {
+                if (reg.cnt2_enalbed)
+                        oprofile_add_sample(regs, 1);
+                counter2 = reg.reset_counter2;
+        }
+
+        spin_unlock_irqrestore(&sample_lock, flags);
+
+        write_c0_perfcnt((counter2 << 32) | counter1);
+
+        return IRQ_HANDLED;
+}
+
+static int __init loongson2_init(void)
+{
+        return request_irq(LOONGSON2_PERFCNT_IRQ, loongson2_perfcount_handler,
+                           IRQF_SHARED, "Perfcounter", oprofid);
+}
+
+static void loongson2_exit(void)
+{
+        write_c0_perfctrl(0);
+        free_irq(LOONGSON2_PERFCNT_IRQ, oprofid);
+}
+
+struct op_mips_model op_model_loongson2_ops = {
+        .reg_setup = loongson2_reg_setup,
+        .cpu_setup = loongson2_cpu_setup,
+        .init = loongson2_init,
+        .exit = loongson2_exit,
+        .cpu_start = loongson2_cpu_start,
+        .cpu_stop = loongson2_cpu_stop,
+        .cpu_type = LOONGSON2_CPU_TYPE,
+        .num_counters = 2
+};
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 63d8a297c58d..91bfe73a7f60 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -16,6 +16,8 @@ obj-$(CONFIG_PCI_VR41XX)	+= ops-vr41xx.o pci-vr41xx.o
 obj-$(CONFIG_NEC_MARKEINS)      += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
 obj-$(CONFIG_PCI_TX4927)        += ops-tx4927.o
 obj-$(CONFIG_BCM47XX)           += pci-bcm47xx.o
+obj-$(CONFIG_BCM63XX)           += pci-bcm63xx.o fixup-bcm63xx.o \
+                                        ops-bcm63xx.o
 
 #
 # These are still pretty much in the old state, watch, go blind.
@@ -26,7 +28,7 @@ obj-$(CONFIG_MIPS_COBALT)	+= fixup-cobalt.o
 obj-$(CONFIG_SOC_AU1500)        += fixup-au1000.o ops-au1000.o
 obj-$(CONFIG_SOC_AU1550)        += fixup-au1000.o ops-au1000.o
 obj-$(CONFIG_SOC_PNX8550)       += fixup-pnx8550.o ops-pnx8550.o
-obj-$(CONFIG_LEMOTE_FULONG)     += fixup-lm2e.o ops-bonito64.o
+obj-$(CONFIG_LEMOTE_FULOONG2E)  += fixup-fuloong2e.o ops-bonito64.o
 obj-$(CONFIG_MIPS_MALTA)        += fixup-malta.o
 obj-$(CONFIG_PMC_MSP7120_GW)    += fixup-pmcmsp.o ops-pmcmsp.o
 obj-$(CONFIG_PMC_MSP7120_EVAL)  += fixup-pmcmsp.o ops-pmcmsp.o
diff --git a/arch/mips/pci/fixup-bcm63xx.c b/arch/mips/pci/fixup-bcm63xx.c
new file mode 100644
index 000000000000..340863009da9
--- /dev/null
+++ b/arch/mips/pci/fixup-bcm63xx.c
@@ -0,0 +1,21 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <bcm63xx_cpu.h>
+
+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+        return bcm63xx_get_irq_number(IRQ_PCI);
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        return 0;
+}
diff --git a/arch/mips/pci/fixup-lm2e.c b/arch/mips/pci/fixup-fuloong2e.c
index e18ae4f574c1..0c4c7a81213f 100644
--- a/arch/mips/pci/fixup-lm2e.c
+++ b/arch/mips/pci/fixup-fuloong2e.c
@@ -1,6 +1,4 @@
 /*
- * fixup-lm2e.c
- *
  * Copyright (C) 2004 ICT CAS
  * Author: Li xiaoyu, ICT CAS
  *   lixy@ict.ac.cn
@@ -12,22 +10,6 @@
  *  under  the terms of  the GNU General  Public License as published by the
  *  Free Software Foundation;  either version 2 of the  License, or (at your
  *  option) any later version.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
  */
 #include <linux/init.h>
 #include <linux/pci.h>
diff --git a/arch/mips/pci/ops-bcm63xx.c b/arch/mips/pci/ops-bcm63xx.c
new file mode 100644
index 000000000000..822ae179bc56
--- /dev/null
+++ b/arch/mips/pci/ops-bcm63xx.c
@@ -0,0 +1,467 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+
+#include "pci-bcm63xx.h"
+
+/*
+ * swizzle 32bits data to return only the needed part
+ */
+static int postprocess_read(u32 data, int where, unsigned int size)
+{
+        u32 ret;
+
+        ret = 0;
+        switch (size) {
+        case 1:
+                ret = (data >> ((where & 3) << 3)) & 0xff;
+                break;
+        case 2:
+                ret = (data >> ((where & 3) << 3)) & 0xffff;
+                break;
+        case 4:
+                ret = data;
+                break;
+        }
+        return ret;
+}
+
+static int preprocess_write(u32 orig_data, u32 val, int where,
+                            unsigned int size)
+{
+        u32 ret;
+
+        ret = 0;
+        switch (size) {
+        case 1:
+                ret = (orig_data & ~(0xff << ((where & 3) << 3))) |
+                        (val << ((where & 3) << 3));
+                break;
+        case 2:
+                ret = (orig_data & ~(0xffff << ((where & 3) << 3))) |
+                        (val << ((where & 3) << 3));
+                break;
+        case 4:
+                ret = val;
+                break;
+        }
+        return ret;
+}
+
+/*
+ * setup hardware for a configuration cycle with given parameters
+ */
+static int bcm63xx_setup_cfg_access(int type, unsigned int busn,
+                                    unsigned int devfn, int where)
+{
+        unsigned int slot, func, reg;
+        u32 val;
+
+        slot = PCI_SLOT(devfn);
+        func = PCI_FUNC(devfn);
+        reg = where >> 2;
+
+        /* sanity check */
+        if (slot > (MPI_L2PCFG_DEVNUM_MASK >> MPI_L2PCFG_DEVNUM_SHIFT))
+                return 1;
+
+        if (func > (MPI_L2PCFG_FUNC_MASK >> MPI_L2PCFG_FUNC_SHIFT))
+                return 1;
+
+        if (reg > (MPI_L2PCFG_REG_MASK >> MPI_L2PCFG_REG_SHIFT))
+                return 1;
+
+        /* ok, setup config access */
+        val = (reg << MPI_L2PCFG_REG_SHIFT);
+        val |= (func << MPI_L2PCFG_FUNC_SHIFT);
+        val |= (slot << MPI_L2PCFG_DEVNUM_SHIFT);
+        val |= MPI_L2PCFG_CFG_USEREG_MASK;
+        val |= MPI_L2PCFG_CFG_SEL_MASK;
+        /* type 0 cycle for local bus, type 1 cycle for anything else */
+        if (type != 0) {
+                /* FIXME: how to specify bus ??? */
+                val |= (1 << MPI_L2PCFG_CFG_TYPE_SHIFT);
+        }
+        bcm_mpi_writel(val, MPI_L2PCFG_REG);
+
+        return 0;
+}
+
+static int bcm63xx_do_cfg_read(int type, unsigned int busn,
+                                unsigned int devfn, int where, int size,
+                                u32 *val)
+{
+        u32 data;
+
+        /* two phase cycle, first we write address, then read data at
+         * another location, caller already has a spinlock so no need
+         * to add one here  */
+        if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        iob();
+        data = le32_to_cpu(__raw_readl(pci_iospace_start));
+        /* restore IO space normal behaviour */
+        bcm_mpi_writel(0, MPI_L2PCFG_REG);
+
+        *val = postprocess_read(data, where, size);
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int bcm63xx_do_cfg_write(int type, unsigned int busn,
+                                 unsigned int devfn, int where, int size,
+                                 u32 val)
+{
+        u32 data;
+
+        /* two phase cycle, first we write address, then write data to
+         * another location, caller already has a spinlock so no need
+         * to add one here  */
+        if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        iob();
+
+        data = le32_to_cpu(__raw_readl(pci_iospace_start));
+        data = preprocess_write(data, val, where, size);
+
+        __raw_writel(cpu_to_le32(data), pci_iospace_start);
+        wmb();
+        /* no way to know the access is done, we have to wait */
+        udelay(500);
+        /* restore IO space normal behaviour */
+        bcm_mpi_writel(0, MPI_L2PCFG_REG);
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,
+                             int where, int size, u32 *val)
+{
+        int type;
+
+        type = bus->parent ? 1 : 0;
+
+        if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        return bcm63xx_do_cfg_read(type, bus->number, devfn,
+                                    where, size, val);
+}
+
+static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn,
+                              int where, int size, u32 val)
+{
+        int type;
+
+        type = bus->parent ? 1 : 0;
+
+        if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        return bcm63xx_do_cfg_write(type, bus->number, devfn,
+                                     where, size, val);
+}
+
+struct pci_ops bcm63xx_pci_ops = {
+        .read   = bcm63xx_pci_read,
+        .write  = bcm63xx_pci_write
+};
+
+#ifdef CONFIG_CARDBUS
+/*
+ * emulate configuration read access on a cardbus bridge
+ */
+#define FAKE_CB_BRIDGE_SLOT     0x1e
+
+static int fake_cb_bridge_bus_number = -1;
+
+static struct {
+        u16 pci_command;
+        u8 cb_latency;
+        u8 subordinate_busn;
+        u8 cardbus_busn;
+        u8 pci_busn;
+        int bus_assigned;
+        u16 bridge_control;
+
+        u32 mem_base0;
+        u32 mem_limit0;
+        u32 mem_base1;
+        u32 mem_limit1;
+
+        u32 io_base0;
+        u32 io_limit0;
+        u32 io_base1;
+        u32 io_limit1;
+} fake_cb_bridge_regs;
+
+static int fake_cb_bridge_read(int where, int size, u32 *val)
+{
+        unsigned int reg;
+        u32 data;
+
+        data = 0;
+        reg = where >> 2;
+        switch (reg) {
+        case (PCI_VENDOR_ID >> 2):
+        case (PCI_CB_SUBSYSTEM_VENDOR_ID >> 2):
+                /* create dummy vendor/device id from our cpu id */
+                data = (bcm63xx_get_cpu_id() << 16) | PCI_VENDOR_ID_BROADCOM;
+                break;
+
+        case (PCI_COMMAND >> 2):
+                data = (PCI_STATUS_DEVSEL_SLOW << 16);
+                data |= fake_cb_bridge_regs.pci_command;
+                break;
+
+        case (PCI_CLASS_REVISION >> 2):
+                data = (PCI_CLASS_BRIDGE_CARDBUS << 16);
+                break;
+
+        case (PCI_CACHE_LINE_SIZE >> 2):
+                data = (PCI_HEADER_TYPE_CARDBUS << 16);
+                break;
+
+        case (PCI_INTERRUPT_LINE >> 2):
+                /* bridge control */
+                data = (fake_cb_bridge_regs.bridge_control << 16);
+                /* pin:intA line:0xff */
+                data |= (0x1 << 8) | 0xff;
+                break;
+
+        case (PCI_CB_PRIMARY_BUS >> 2):
+                data = (fake_cb_bridge_regs.cb_latency << 24);
+                data |= (fake_cb_bridge_regs.subordinate_busn << 16);
+                data |= (fake_cb_bridge_regs.cardbus_busn << 8);
+                data |= fake_cb_bridge_regs.pci_busn;
+                break;
+
+        case (PCI_CB_MEMORY_BASE_0 >> 2):
+                data = fake_cb_bridge_regs.mem_base0;
+                break;
+
+        case (PCI_CB_MEMORY_LIMIT_0 >> 2):
+                data = fake_cb_bridge_regs.mem_limit0;
+                break;
+
+        case (PCI_CB_MEMORY_BASE_1 >> 2):
+                data = fake_cb_bridge_regs.mem_base1;
+                break;
+
+        case (PCI_CB_MEMORY_LIMIT_1 >> 2):
+                data = fake_cb_bridge_regs.mem_limit1;
+                break;
+
+        case (PCI_CB_IO_BASE_0 >> 2):
+                /* | 1 for 32bits io support */
+                data = fake_cb_bridge_regs.io_base0 | 0x1;
+                break;
+
+        case (PCI_CB_IO_LIMIT_0 >> 2):
+                data = fake_cb_bridge_regs.io_limit0;
+                break;
+
+        case (PCI_CB_IO_BASE_1 >> 2):
+                /* | 1 for 32bits io support */
+                data = fake_cb_bridge_regs.io_base1 | 0x1;
+                break;
+
+        case (PCI_CB_IO_LIMIT_1 >> 2):
+                data = fake_cb_bridge_regs.io_limit1;
+                break;
+        }
+
+        *val = postprocess_read(data, where, size);
+        return PCIBIOS_SUCCESSFUL;
+}
+
+/*
+ * emulate configuration write access on a cardbus bridge
+ */
+static int fake_cb_bridge_write(int where, int size, u32 val)
+{
+        unsigned int reg;
+        u32 data, tmp;
+        int ret;
+
+        ret = fake_cb_bridge_read((where & ~0x3), 4, &data);
+        if (ret != PCIBIOS_SUCCESSFUL)
+                return ret;
+
+        data = preprocess_write(data, val, where, size);
+
+        reg = where >> 2;
+        switch (reg) {
+        case (PCI_COMMAND >> 2):
+                fake_cb_bridge_regs.pci_command = (data & 0xffff);
+                break;
+
+        case (PCI_CB_PRIMARY_BUS >> 2):
+                fake_cb_bridge_regs.cb_latency = (data >> 24) & 0xff;
+                fake_cb_bridge_regs.subordinate_busn = (data >> 16) & 0xff;
+                fake_cb_bridge_regs.cardbus_busn = (data >> 8) & 0xff;
+                fake_cb_bridge_regs.pci_busn = data & 0xff;
+                if (fake_cb_bridge_regs.cardbus_busn)
+                        fake_cb_bridge_regs.bus_assigned = 1;
+                break;
+
+        case (PCI_INTERRUPT_LINE >> 2):
+                tmp = (data >> 16) & 0xffff;
+                /* disable memory prefetch support */
+                tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
+                tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
+                fake_cb_bridge_regs.bridge_control = tmp;
+                break;
+
+        case (PCI_CB_MEMORY_BASE_0 >> 2):
+                fake_cb_bridge_regs.mem_base0 = data;
+                break;
+
+        case (PCI_CB_MEMORY_LIMIT_0 >> 2):
+                fake_cb_bridge_regs.mem_limit0 = data;
+                break;
+
+        case (PCI_CB_MEMORY_BASE_1 >> 2):
+                fake_cb_bridge_regs.mem_base1 = data;
+                break;
+
+        case (PCI_CB_MEMORY_LIMIT_1 >> 2):
+                fake_cb_bridge_regs.mem_limit1 = data;
+                break;
+
+        case (PCI_CB_IO_BASE_0 >> 2):
+                fake_cb_bridge_regs.io_base0 = data;
+                break;
+
+        case (PCI_CB_IO_LIMIT_0 >> 2):
+                fake_cb_bridge_regs.io_limit0 = data;
+                break;
+
+        case (PCI_CB_IO_BASE_1 >> 2):
+                fake_cb_bridge_regs.io_base1 = data;
+                break;
+
+        case (PCI_CB_IO_LIMIT_1 >> 2):
+                fake_cb_bridge_regs.io_limit1 = data;
+                break;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn,
+                           int where, int size, u32 *val)
+{
+        /* snoop access to slot 0x1e on root bus, we fake a cardbus
+         * bridge at this location */
+        if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {
+                fake_cb_bridge_bus_number = bus->number;
+                return fake_cb_bridge_read(where, size, val);
+        }
+
+        /* a  configuration  cycle for  the  device  behind the  cardbus
+         * bridge is  actually done as a  type 0 cycle  on the primary
+         * bus. This means that only  one device can be on the cardbus
+         * bus */
+        if (fake_cb_bridge_regs.bus_assigned &&
+            bus->number == fake_cb_bridge_regs.cardbus_busn &&
+            PCI_SLOT(devfn) == 0)
+                return bcm63xx_do_cfg_read(0, 0,
+                                           PCI_DEVFN(CARDBUS_PCI_IDSEL, 0),
+                                           where, size, val);
+
+        return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+static int bcm63xx_cb_write(struct pci_bus *bus, unsigned int devfn,
+                            int where, int size, u32 val)
+{
+        if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) {
+                fake_cb_bridge_bus_number = bus->number;
+                return fake_cb_bridge_write(where, size, val);
+        }
+
+        if (fake_cb_bridge_regs.bus_assigned &&
+            bus->number == fake_cb_bridge_regs.cardbus_busn &&
+            PCI_SLOT(devfn) == 0)
+                return bcm63xx_do_cfg_write(0, 0,
+                                            PCI_DEVFN(CARDBUS_PCI_IDSEL, 0),
+                                            where, size, val);
+
+        return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+struct pci_ops bcm63xx_cb_ops = {
+        .read   = bcm63xx_cb_read,
+        .write   = bcm63xx_cb_write,
+};
+
+/*
+ * only one IO window, so it  cannot be shared by PCI and cardbus, use
+ * fixup to choose and detect unhandled configuration
+ */
+static void bcm63xx_fixup(struct pci_dev *dev)
+{
+        static int io_window = -1;
+        int i, found, new_io_window;
+        u32 val;
+
+        /* look for any io resource */
+        found = 0;
+        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+                if (pci_resource_flags(dev, i) & IORESOURCE_IO) {
+                        found = 1;
+                        break;
+                }
+        }
+
+        if (!found)
+                return;
+
+        /* skip our fake bus with only cardbus bridge on it */
+        if (dev->bus->number == fake_cb_bridge_bus_number)
+                return;
+
+        /* find on which bus the device is */
+        if (fake_cb_bridge_regs.bus_assigned &&
+            dev->bus->number == fake_cb_bridge_regs.cardbus_busn &&
+            PCI_SLOT(dev->devfn) == 0)
+                new_io_window = 1;
+        else
+                new_io_window = 0;
+
+        if (new_io_window == io_window)
+                return;
+
+        if (io_window != -1) {
+                printk(KERN_ERR "bcm63xx: both PCI and cardbus devices "
+                       "need IO, which hardware cannot do\n");
+                return;
+        }
+
+        printk(KERN_INFO "bcm63xx: PCI IO window assigned to %s\n",
+               (new_io_window == 0) ? "PCI" : "cardbus");
+
+        val = bcm_mpi_readl(MPI_L2PIOREMAP_REG);
+        if (io_window)
+                val |= MPI_L2PREMAP_IS_CARDBUS_MASK;
+        else
+                val &= ~MPI_L2PREMAP_IS_CARDBUS_MASK;
+        bcm_mpi_writel(val, MPI_L2PIOREMAP_REG);
+
+        io_window = new_io_window;
+}
+
+DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, bcm63xx_fixup);
+#endif
diff --git a/arch/mips/pci/ops-bonito64.c b/arch/mips/pci/ops-bonito64.c
index f742c51acf0d..54e55e7a2431 100644
--- a/arch/mips/pci/ops-bonito64.c
+++ b/arch/mips/pci/ops-bonito64.c
@@ -29,7 +29,7 @@
 #define PCI_ACCESS_READ  0
 #define PCI_ACCESS_WRITE 1
 
-#ifdef CONFIG_LEMOTE_FULONG
+#ifdef CONFIG_LEMOTE_FULOONG2E
 #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (offset))
 #define ID_SEL_BEGIN 11
 #else
@@ -77,7 +77,7 @@ static int bonito64_pcibios_config_access(unsigned char access_type,
         addrp = CFG_SPACE_REG(addr & 0xffff);
         if (access_type == PCI_ACCESS_WRITE) {
                 writel(cpu_to_le32(*data), addrp);
-#ifndef CONFIG_LEMOTE_FULONG
+#ifndef CONFIG_LEMOTE_FULOONG2E
                 /* Wait till done */
                 while (BONITO_PCIMSTAT & 0xF);
 #endif
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index a9060c771840..6f5e24c6ae67 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -57,7 +57,7 @@ static void *cfg_space;
 #define PCI_BUS_ENABLED 1
 #define PCI_DEVICE_MODE 2
 
-static int bcm1480_bus_status = 0;
+static int bcm1480_bus_status;
 
 #define PCI_BRIDGE_DEVICE  0
 
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index f54f45412b0b..50cc6e9e8240 100644
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -56,7 +56,7 @@ static void *ht_cfg_space;
 #define PCI_BUS_ENABLED 1
 #define PCI_DEVICE_MODE 2
 
-static int bcm1480ht_bus_status = 0;
+static int bcm1480ht_bus_status;
 
 #define PCI_BRIDGE_DEVICE  0
 #define HT_BRIDGE_DEVICE   1
diff --git a/arch/mips/pci/pci-bcm63xx.c b/arch/mips/pci/pci-bcm63xx.c
new file mode 100644
index 000000000000..82e0fde1dba0
--- /dev/null
+++ b/arch/mips/pci/pci-bcm63xx.c
@@ -0,0 +1,224 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+
+#include "pci-bcm63xx.h"
+
+/*
+ * Allow PCI to be disabled at runtime depending on board nvram
+ * configuration
+ */
+int bcm63xx_pci_enabled;
+
+static struct resource bcm_pci_mem_resource = {
+        .name   = "bcm63xx PCI memory space",
+        .start  = BCM_PCI_MEM_BASE_PA,
+        .end    = BCM_PCI_MEM_END_PA,
+        .flags  = IORESOURCE_MEM
+};
+
+static struct resource bcm_pci_io_resource = {
+        .name   = "bcm63xx PCI IO space",
+        .start  = BCM_PCI_IO_BASE_PA,
+#ifdef CONFIG_CARDBUS
+        .end    = BCM_PCI_IO_HALF_PA,
+#else
+        .end    = BCM_PCI_IO_END_PA,
+#endif
+        .flags  = IORESOURCE_IO
+};
+
+struct pci_controller bcm63xx_controller = {
+        .pci_ops        = &bcm63xx_pci_ops,
+        .io_resource    = &bcm_pci_io_resource,
+        .mem_resource   = &bcm_pci_mem_resource,
+};
+
+/*
+ * We handle cardbus  via a fake Cardbus bridge,  memory and io spaces
+ * have to be  clearly separated from PCI one  since we have different
+ * memory decoder.
+ */
+#ifdef CONFIG_CARDBUS
+static struct resource bcm_cb_mem_resource = {
+        .name   = "bcm63xx Cardbus memory space",
+        .start  = BCM_CB_MEM_BASE_PA,
+        .end    = BCM_CB_MEM_END_PA,
+        .flags  = IORESOURCE_MEM
+};
+
+static struct resource bcm_cb_io_resource = {
+        .name   = "bcm63xx Cardbus IO space",
+        .start  = BCM_PCI_IO_HALF_PA + 1,
+        .end    = BCM_PCI_IO_END_PA,
+        .flags  = IORESOURCE_IO
+};
+
+struct pci_controller bcm63xx_cb_controller = {
+        .pci_ops        = &bcm63xx_cb_ops,
+        .io_resource    = &bcm_cb_io_resource,
+        .mem_resource   = &bcm_cb_mem_resource,
+};
+#endif
+
+static u32 bcm63xx_int_cfg_readl(u32 reg)
+{
+        u32 tmp;
+
+        tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK;
+        tmp |= MPI_PCICFGCTL_WRITEEN_MASK;
+        bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG);
+        iob();
+        return bcm_mpi_readl(MPI_PCICFGDATA_REG);
+}
+
+static void bcm63xx_int_cfg_writel(u32 val, u32 reg)
+{
+        u32 tmp;
+
+        tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK;
+        tmp |=  MPI_PCICFGCTL_WRITEEN_MASK;
+        bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG);
+        bcm_mpi_writel(val, MPI_PCICFGDATA_REG);
+}
+
+void __iomem *pci_iospace_start;
+
+static int __init bcm63xx_pci_init(void)
+{
+        unsigned int mem_size;
+        u32 val;
+
+        if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358())
+                return -ENODEV;
+
+        if (!bcm63xx_pci_enabled)
+                return -ENODEV;
+
+        /*
+         * configuration  access are  done through  IO space,  remap 4
+         * first bytes to access it from CPU.
+         *
+         * this means that  no io access from CPU  should happen while
+         * we do a configuration cycle,  but there's no way we can add
+         * a spinlock for each io access, so this is currently kind of
+         * broken on SMP.
+         */
+        pci_iospace_start = ioremap_nocache(BCM_PCI_IO_BASE_PA, 4);
+        if (!pci_iospace_start)
+                return -ENOMEM;
+
+        /* setup local bus to PCI access (PCI memory) */
+        val = BCM_PCI_MEM_BASE_PA & MPI_L2P_BASE_MASK;
+        bcm_mpi_writel(val, MPI_L2PMEMBASE1_REG);
+        bcm_mpi_writel(~(BCM_PCI_MEM_SIZE - 1), MPI_L2PMEMRANGE1_REG);
+        bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PMEMREMAP1_REG);
+
+        /* set Cardbus IDSEL (type 0 cfg access on primary bus for
+         * this IDSEL will be done on Cardbus instead) */
+        val = bcm_pcmcia_readl(PCMCIA_C1_REG);
+        val &= ~PCMCIA_C1_CBIDSEL_MASK;
+        val |= (CARDBUS_PCI_IDSEL << PCMCIA_C1_CBIDSEL_SHIFT);
+        bcm_pcmcia_writel(val, PCMCIA_C1_REG);
+
+#ifdef CONFIG_CARDBUS
+        /* setup local bus to PCI access (Cardbus memory) */
+        val = BCM_CB_MEM_BASE_PA & MPI_L2P_BASE_MASK;
+        bcm_mpi_writel(val, MPI_L2PMEMBASE2_REG);
+        bcm_mpi_writel(~(BCM_CB_MEM_SIZE - 1), MPI_L2PMEMRANGE2_REG);
+        val |= MPI_L2PREMAP_ENABLED_MASK | MPI_L2PREMAP_IS_CARDBUS_MASK;
+        bcm_mpi_writel(val, MPI_L2PMEMREMAP2_REG);
+#else
+        /* disable second access windows */
+        bcm_mpi_writel(0, MPI_L2PMEMREMAP2_REG);
+#endif
+
+        /* setup local bus  to PCI access (IO memory),  we have only 1
+         * IO window  for both PCI  and cardbus, but it  cannot handle
+         * both  at the  same time,  assume standard  PCI for  now, if
+         * cardbus card has  IO zone, PCI fixup will  change window to
+         * cardbus */
+        val = BCM_PCI_IO_BASE_PA & MPI_L2P_BASE_MASK;
+        bcm_mpi_writel(val, MPI_L2PIOBASE_REG);
+        bcm_mpi_writel(~(BCM_PCI_IO_SIZE - 1), MPI_L2PIORANGE_REG);
+        bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PIOREMAP_REG);
+
+        /* enable PCI related GPIO pins */
+        bcm_mpi_writel(MPI_LOCBUSCTL_EN_PCI_GPIO_MASK, MPI_LOCBUSCTL_REG);
+
+        /* setup PCI to local bus access, used by PCI device to target
+         * local RAM while bus mastering */
+        bcm63xx_int_cfg_writel(0, PCI_BASE_ADDRESS_3);
+        if (BCMCPU_IS_6358())
+                val = MPI_SP0_REMAP_ENABLE_MASK;
+        else
+                val = 0;
+        bcm_mpi_writel(val, MPI_SP0_REMAP_REG);
+
+        bcm63xx_int_cfg_writel(0x0, PCI_BASE_ADDRESS_4);
+        bcm_mpi_writel(0, MPI_SP1_REMAP_REG);
+
+        mem_size = bcm63xx_get_memory_size();
+
+        /* 6348 before rev b0 exposes only 16 MB of RAM memory through
+         * PCI, throw a warning if we have more memory */
+        if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() & 0xf0) == 0xa0) {
+                if (mem_size > (16 * 1024 * 1024))
+                        printk(KERN_WARNING "bcm63xx: this CPU "
+                               "revision cannot handle more than 16MB "
+                               "of RAM for PCI bus mastering\n");
+        } else {
+                /* setup sp0 range to local RAM size */
+                bcm_mpi_writel(~(mem_size - 1), MPI_SP0_RANGE_REG);
+                bcm_mpi_writel(0, MPI_SP1_RANGE_REG);
+        }
+
+        /* change  host bridge  retry  counter to  infinite number  of
+         * retry,  needed for  some broadcom  wifi cards  with Silicon
+         * Backplane bus where access to srom seems very slow  */
+        val = bcm63xx_int_cfg_readl(BCMPCI_REG_TIMERS);
+        val &= ~REG_TIMER_RETRY_MASK;
+        bcm63xx_int_cfg_writel(val, BCMPCI_REG_TIMERS);
+
+        /* enable memory decoder and bus mastering */
+        val = bcm63xx_int_cfg_readl(PCI_COMMAND);
+        val |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
+        bcm63xx_int_cfg_writel(val, PCI_COMMAND);
+
+        /* enable read prefetching & disable byte swapping for bus
+         * mastering transfers */
+        val = bcm_mpi_readl(MPI_PCIMODESEL_REG);
+        val &= ~MPI_PCIMODESEL_BAR1_NOSWAP_MASK;
+        val &= ~MPI_PCIMODESEL_BAR2_NOSWAP_MASK;
+        val &= ~MPI_PCIMODESEL_PREFETCH_MASK;
+        val |= (8 << MPI_PCIMODESEL_PREFETCH_SHIFT);
+        bcm_mpi_writel(val, MPI_PCIMODESEL_REG);
+
+        /* enable pci interrupt */
+        val = bcm_mpi_readl(MPI_LOCINT_REG);
+        val |= MPI_LOCINT_MASK(MPI_LOCINT_EXT_PCI_INT);
+        bcm_mpi_writel(val, MPI_LOCINT_REG);
+
+        register_pci_controller(&bcm63xx_controller);
+
+#ifdef CONFIG_CARDBUS
+        register_pci_controller(&bcm63xx_cb_controller);
+#endif
+
+        /* mark memory space used for IO mapping as reserved */
+        request_mem_region(BCM_PCI_IO_BASE_PA, BCM_PCI_IO_SIZE,
+                           "bcm63xx PCI IO space");
+        return 0;
+}
+
+arch_initcall(bcm63xx_pci_init);
diff --git a/arch/mips/pci/pci-bcm63xx.h b/arch/mips/pci/pci-bcm63xx.h
new file mode 100644
index 000000000000..a6e594ef3d6a
--- /dev/null
+++ b/arch/mips/pci/pci-bcm63xx.h
@@ -0,0 +1,27 @@
+#ifndef PCI_BCM63XX_H_
+#define PCI_BCM63XX_H_
+
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_dev_pci.h>
+
+/*
+ * Cardbus shares  the PCI bus, but has  no IDSEL, so a  special id is
+ * reserved for it.  If you have a standard PCI device at this id, you
+ * need to change the following definition.
+ */
+#define CARDBUS_PCI_IDSEL       0x8
+
+/*
+ * defined in ops-bcm63xx.c
+ */
+extern struct pci_ops bcm63xx_pci_ops;
+extern struct pci_ops bcm63xx_cb_ops;
+
+/*
+ * defined in pci-bcm63xx.c
+ */
+extern void __iomem *pci_iospace_start;
+
+#endif /* ! PCI_BCM63XX_H_ */
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index bf639590b8b2..ada24e6f951f 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -58,7 +58,7 @@ static void *cfg_space;
 #define LDT_BUS_ENABLED 2
 #define PCI_DEVICE_MODE 4
 
-static int sb1250_bus_status = 0;
+static int sb1250_bus_status;
 
 #define PCI_BRIDGE_DEVICE  0
 #define LDT_BRIDGE_DEVICE  1
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index b0eb9e75c682..9a11c2226891 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -31,8 +31,8 @@ unsigned int pci_probe = PCI_ASSIGN_ALL_BUSSES;
 
 static struct pci_controller *hose_head, **hose_tail = &hose_head;
 
-unsigned long PCIBIOS_MIN_IO    = 0x0000;
-unsigned long PCIBIOS_MIN_MEM   = 0;
+unsigned long PCIBIOS_MIN_IO;
+unsigned long PCIBIOS_MIN_MEM;
 
 static int pci_initialized;
 
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c
index 2d3c0dca275d..3498ac9c35af 100644
--- a/arch/mips/pmc-sierra/yosemite/setup.c
+++ b/arch/mips/pmc-sierra/yosemite/setup.c
@@ -70,7 +70,7 @@ void __init bus_error_init(void)
 }
 
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
         unsigned int year, month, day, hour, min, sec;
         unsigned long flags;
@@ -92,7 +92,8 @@ unsigned long read_persistent_clock(void)
         m48t37_base->control = 0x00;
         spin_unlock_irqrestore(&rtc_lock, flags);
 
-        return mktime(year, month, day, hour, min, sec);
+        ts->tv_sec = mktime(year, month, day, hour, min, sec);
+        ts->tv_nsec = 0;
 }
 
 int rtc_mips_set_time(unsigned long tim)
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 8ace27716232..326fe7a392e8 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -97,11 +97,11 @@ static void yos_send_ipi_single(int cpu, unsigned int action)
         }
 }
 
-static void yos_send_ipi_mask(cpumask_t mask, unsigned int action)
+static void yos_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 yos_send_ipi_single(i, action);
 }
 
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S
index 4b8174b382d7..0cf86fb32ec3 100644
--- a/arch/mips/power/hibernate.S
+++ b/arch/mips/power/hibernate.S
@@ -8,6 +8,7 @@
  *         Wu Zhangjin <wuzj@lemote.com>
  */
 #include <asm/asm-offsets.h>
+#include <asm/page.h>
 #include <asm/regdef.h>
 #include <asm/asm.h>
 
@@ -34,7 +35,7 @@ LEAF(swsusp_arch_resume)
 0:
         PTR_L t1, PBE_ADDRESS(t0)   /* source */
         PTR_L t2, PBE_ORIG_ADDRESS(t0) /* destination */
-        PTR_ADDIU t3, t1, _PAGE_SIZE
+        PTR_ADDIU t3, t1, PAGE_SIZE
 1:
         REG_L t8, (t1)
         REG_S t8, (t2)
diff --git a/arch/mips/sgi-ip22/Makefile b/arch/mips/sgi-ip22/Makefile
index ef1564e40c8d..416b18f9fa72 100644
--- a/arch/mips/sgi-ip22/Makefile
+++ b/arch/mips/sgi-ip22/Makefile
@@ -10,4 +10,4 @@ obj-$(CONFIG_SGI_IP22) += ip22-berr.o
 obj-$(CONFIG_SGI_IP28) += ip28-berr.o
 obj-$(CONFIG_EISA)      += ip22-eisa.o
 
-# EXTRA_CFLAGS += -Werror
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index 060d853d7b35..f61c164d1e67 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -421,7 +421,7 @@ static void __init node_mem_init(cnodeid_t node)
 
 /*
  * A node with nothing.  We use it to avoid any special casing in
- * node_to_cpumask
+ * cpumask_of_node
  */
 static struct node_data null_node = {
         .hub = {
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index cbcd7eb83bd1..9aa8f2951df6 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -165,11 +165,11 @@ static void ip27_send_ipi_single(int destid, unsigned int action)
         REMOTE_HUB_SEND_INTR(COMPACT_TO_NASID_NODEID(cpu_to_node(destid)), irq);
 }
 
-static void ip27_send_ipi_mask(cpumask_t mask, unsigned int action)
+static void ip27_send_ipi(const struct cpumask *mask, unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 ip27_send_ipi_single(i, action);
 }
 
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index 314691648c97..47b347c992ea 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -82,11 +82,12 @@ static void bcm1480_send_ipi_single(int cpu, unsigned int action)
         __raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]);
 }
 
-static void bcm1480_send_ipi_mask(cpumask_t mask, unsigned int action)
+static void bcm1480_send_ipi_mask(const struct cpumask *mask,
+                                  unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 bcm1480_send_ipi_single(i, action);
 }
 
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index cad14003b84f..c00a5cb1128d 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -70,11 +70,12 @@ static void sb1250_send_ipi_single(int cpu, unsigned int action)
         __raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
 }
 
-static inline void sb1250_send_ipi_mask(cpumask_t mask, unsigned int action)
+static inline void sb1250_send_ipi_mask(const struct cpumask *mask,
+                                        unsigned int action)
 {
         unsigned int i;
 
-        for_each_cpu_mask(i, mask)
+        for_each_cpu(i, mask)
                 sb1250_send_ipi_single(i, action);
 }
 
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 672e45d495a9..623ffc933c4c 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -87,19 +87,26 @@ enum swarm_rtc_type {
 
 enum swarm_rtc_type swarm_rtc_type;
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
+        unsigned long sec;
+
         switch (swarm_rtc_type) {
         case RTC_XICOR:
-                return xicor_get_time();
+                sec = xicor_get_time();
+                break;
 
         case RTC_M4LT81:
-                return m41t81_get_time();
+                sec = m41t81_get_time();
+                break;
 
         case RTC_NONE:
         default:
-                return mktime(2000, 1, 1, 0, 0, 0);
+                sec = mktime(2000, 1, 1, 0, 0, 0);
+                break;
         }
+        ts->tv_sec = sec;
+        tv->tv_nsec = 0;
 }
 
 int rtc_mips_set_time(unsigned long sec)
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index 0d9ec1a5c24a..62df6a598e0a 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -182,7 +182,8 @@ void __init plat_time_init(void)
         setup_pit_timer();
 }
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
-        return -1;
+        ts->tv_sec = -1;
+        ts->tv_nsec = 0;
 }
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index 7b637a7c0e66..707cfa9c547d 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -341,6 +341,15 @@ static void quirk_slc90e66_ide(struct pci_dev *dev)
 }
 #endif /* CONFIG_TOSHIBA_FPCIB0 */
 
+static void tc35815_fixup(struct pci_dev *dev)
+{
+        /* This device may have PM registers but not they are not suported. */
+        if (dev->pm_cap) {
+                dev_info(&dev->dev, "PM disabled\n");
+                dev->pm_cap = 0;
+        }
+}
+
 static void final_fixup(struct pci_dev *dev)
 {
         unsigned char bist;
@@ -374,6 +383,10 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
 DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
         quirk_slc90e66_ide);
 #endif
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TOSHIBA_2,
+                        PCI_DEVICE_ID_TOSHIBA_TC35815_NWU, tc35815_fixup);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TOSHIBA_2,
+                        PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939, tc35815_fixup);
 DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
 DECLARE_PCI_FIXUP_RESUME(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
 
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index a205e2ba8e7b..c860810722c0 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -782,7 +782,7 @@ void __init txx9_iocled_init(unsigned long baseaddr,
                 return;
         iocled->mmioaddr = ioremap(baseaddr, 1);
         if (!iocled->mmioaddr)
-                return;
+                goto out_free;
         iocled->chip.get = txx9_iocled_get;
         iocled->chip.set = txx9_iocled_set;
         iocled->chip.direction_input = txx9_iocled_dir_in;
@@ -791,13 +791,13 @@ void __init txx9_iocled_init(unsigned long baseaddr,
         iocled->chip.base = basenum;
         iocled->chip.ngpio = num;
         if (gpiochip_add(&iocled->chip))
-                return;
+                goto out_unmap;
         if (basenum < 0)
                 basenum = iocled->chip.base;
 
         pdev = platform_device_alloc("leds-gpio", basenum);
         if (!pdev)
-                return;
+                goto out_gpio;
         iocled->pdata.num_leds = num;
         iocled->pdata.leds = iocled->leds;
         for (i = 0; i < num; i++) {
@@ -812,7 +812,16 @@ void __init txx9_iocled_init(unsigned long baseaddr,
         }
         pdev->dev.platform_data = &iocled->pdata;
         if (platform_device_add(pdev))
-                platform_device_put(pdev);
+                goto out_pdev;
+        return;
+out_pdev:
+        platform_device_put(pdev);
+out_gpio:
+        gpio_remove(&iocled->chip);
+out_unmap:
+        iounmap(iocled->mmioaddr);
+out_free:
+        kfree(iocled);
 }
 #else /* CONFIG_LEDS_GPIO */
 void __init txx9_iocled_init(unsigned long baseaddr,
diff --git a/arch/mn10300/include/asm/cacheflush.h b/arch/mn10300/include/asm/cacheflush.h
index 2db746a251f8..1a55d61f0d06 100644
--- a/arch/mn10300/include/asm/cacheflush.h
+++ b/arch/mn10300/include/asm/cacheflush.h
@@ -17,7 +17,7 @@
 #include <linux/mm.h>
 
 /*
- * virtually-indexed cache managment (our cache is physically indexed)
+ * virtually-indexed cache management (our cache is physically indexed)
  */
 #define flush_cache_all()                       do {} while (0)
 #define flush_cache_mm(mm)                      do {} while (0)
@@ -31,7 +31,7 @@
 #define flush_dcache_mmap_unlock(mapping)       do {} while (0)
 
 /*
- * physically-indexed cache managment
+ * physically-indexed cache management
  */
 #ifndef CONFIG_MN10300_CACHE_DISABLED
 
diff --git a/arch/mn10300/include/asm/gdb-stub.h b/arch/mn10300/include/asm/gdb-stub.h
index e5a6368559af..556cce992548 100644
--- a/arch/mn10300/include/asm/gdb-stub.h
+++ b/arch/mn10300/include/asm/gdb-stub.h
@@ -109,7 +109,6 @@ extern asmlinkage int  gdbstub_intercept(struct pt_regs *, enum exception_code);
 extern asmlinkage void gdbstub_exception(struct pt_regs *, enum exception_code);
 extern asmlinkage void __gdbstub_bug_trap(void);
 extern asmlinkage void __gdbstub_pause(void);
-extern asmlinkage void start_kernel(void);
 
 #ifndef CONFIG_MN10300_CACHE_DISABLED
 extern asmlinkage void gdbstub_purge_cache(void);
diff --git a/arch/mn10300/include/asm/mman.h b/arch/mn10300/include/asm/mman.h
index d04fac1da5aa..8eebf89f5ab1 100644
--- a/arch/mn10300/include/asm/mman.h
+++ b/arch/mn10300/include/asm/mman.h
@@ -1,28 +1 @@
-/* MN10300 Constants for mmap and co.
- *
- * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * - Derived from asm-x86/mman.h
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-#ifndef _ASM_MMAN_H
-#define _ASM_MMAN_H
-
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
-
-#endif /* _ASM_MMAN_H */
+#include <asm-generic/mman.h>
diff --git a/arch/mn10300/include/asm/mmu_context.h b/arch/mn10300/include/asm/mmu_context.h
index a9e2e34f69b0..cb294c244de3 100644
--- a/arch/mn10300/include/asm/mmu_context.h
+++ b/arch/mn10300/include/asm/mmu_context.h
@@ -38,13 +38,13 @@ extern unsigned long mmu_context_cache[NR_CPUS];
 #define enter_lazy_tlb(mm, tsk) do {} while (0)
 
 #ifdef CONFIG_SMP
-#define cpu_ran_vm(cpu, task) \
-        cpu_set((cpu), (task)->cpu_vm_mask)
-#define cpu_maybe_ran_vm(cpu, task) \
-        cpu_test_and_set((cpu), (task)->cpu_vm_mask)
+#define cpu_ran_vm(cpu, mm) \
+        cpumask_set_cpu((cpu), mm_cpumask(mm))
+#define cpu_maybe_ran_vm(cpu, mm) \
+        cpumask_test_and_set_cpu((cpu), mm_cpumask(mm))
 #else
-#define cpu_ran_vm(cpu, task)           do {} while (0)
-#define cpu_maybe_ran_vm(cpu, task)     true
+#define cpu_ran_vm(cpu, mm)             do {} while (0)
+#define cpu_maybe_ran_vm(cpu, mm)       true
 #endif /* CONFIG_SMP */
 
 /*
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h
index 19aecc90f7a4..6095a28561dd 100644
--- a/arch/mn10300/include/asm/pci.h
+++ b/arch/mn10300/include/asm/pci.h
@@ -101,7 +101,18 @@ extern void pcibios_bus_to_resource(struct pci_dev *dev,
                                     struct resource *res,
                                     struct pci_bus_region *region);
 
-#define pcibios_scan_all_fns(a, b)      0
+static inline struct resource *
+pcibios_select_root(struct pci_dev *pdev, struct resource *res)
+{
+        struct resource *root = NULL;
+
+        if (res->flags & IORESOURCE_IO)
+                root = &ioport_resource;
+        if (res->flags & IORESOURCE_MEM)
+                root = &iomem_resource;
+
+        return root;
+}
 
 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 {
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
index fad68616af32..2a983931c11f 100644
--- a/arch/mn10300/include/asm/unistd.h
+++ b/arch/mn10300/include/asm/unistd.h
@@ -347,7 +347,7 @@
 #define __NR_preadv             334
 #define __NR_pwritev            335
 #define __NR_rt_tgsigqueueinfo  336
-#define __NR_perf_counter_open  337
+#define __NR_perf_event_open    337
 
 #ifdef __KERNEL__
 
diff --git a/arch/mn10300/kernel/asm-offsets.c b/arch/mn10300/kernel/asm-offsets.c
index 2646fcbd7d89..02dc7e461fef 100644
--- a/arch/mn10300/kernel/asm-offsets.c
+++ b/arch/mn10300/kernel/asm-offsets.c
@@ -85,7 +85,7 @@ void foo(void)
         OFFSET(__rx_buffer,             mn10300_serial_port, rx_buffer);
         OFFSET(__rx_inp,                mn10300_serial_port, rx_inp);
         OFFSET(__rx_outp,               mn10300_serial_port, rx_outp);
-        OFFSET(__tx_info_buffer,        mn10300_serial_port, uart.info);
+        OFFSET(__uart_state,            mn10300_serial_port, uart.state);
         OFFSET(__tx_xchar,              mn10300_serial_port, tx_xchar);
         OFFSET(__tx_break,              mn10300_serial_port, tx_break);
         OFFSET(__intr_flags,            mn10300_serial_port, intr_flags);
@@ -95,7 +95,7 @@ void foo(void)
         OFFSET(__iobase,                mn10300_serial_port, _iobase);
 
         DEFINE(__UART_XMIT_SIZE,        UART_XMIT_SIZE);
-        OFFSET(__xmit_buffer,           uart_info, xmit.buf);
-        OFFSET(__xmit_head,             uart_info, xmit.head);
-        OFFSET(__xmit_tail,             uart_info, xmit.tail);
+        OFFSET(__xmit_buffer,           uart_state, xmit.buf);
+        OFFSET(__xmit_head,             uart_state, xmit.head);
+        OFFSET(__xmit_tail,             uart_state, xmit.tail);
 }
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index e0d2563af4f2..a94e7ea3faa6 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -723,7 +723,7 @@ ENTRY(sys_call_table)
         .long sys_preadv
         .long sys_pwritev               /* 335 */
         .long sys_rt_tgsigqueueinfo
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
 
 
 nr_syscalls=(.-sys_call_table)/4
diff --git a/arch/mn10300/kernel/init_task.c b/arch/mn10300/kernel/init_task.c
index 80d423b80af3..a481b043bea7 100644
--- a/arch/mn10300/kernel/init_task.c
+++ b/arch/mn10300/kernel/init_task.c
@@ -27,9 +27,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/mn10300/kernel/mn10300-serial-low.S b/arch/mn10300/kernel/mn10300-serial-low.S
index 224485388228..66702d256610 100644
--- a/arch/mn10300/kernel/mn10300-serial-low.S
+++ b/arch/mn10300/kernel/mn10300-serial-low.S
@@ -130,7 +130,7 @@ ENTRY(mn10300_serial_vdma_tx_handler)
         or      d2,d2
         bne     mnsc_vdma_tx_xchar
 
-        mov     (__tx_info_buffer,a3),a2 # get the uart_info struct for Tx
+        mov     (__uart_state,a3),a2    # see if the TTY Tx queue has anything in it
         mov     (__xmit_tail,a2),d3
         mov     (__xmit_head,a2),d2
         cmp     d3,d2
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index 2fd59664d00a..229b710fc5d5 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -391,7 +391,7 @@ static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
 static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
 {
         struct uart_icount *icount = &port->uart.icount;
-        struct tty_struct *tty = port->uart.info->port.tty;
+        struct tty_struct *tty = port->uart.state->port.tty;
         unsigned ix;
         int count;
         u8 st, ch, push, status, overrun;
@@ -566,16 +566,16 @@ static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
 {
         _enter("%s", port->name);
 
-        if (!port->uart.info || !port->uart.info->port.tty) {
+        if (!port->uart.state || !port->uart.state->port.tty) {
                 mn10300_serial_dis_tx_intr(port);
                 return;
         }
 
         if (uart_tx_stopped(&port->uart) ||
-            uart_circ_empty(&port->uart.info->xmit))
+            uart_circ_empty(&port->uart.state->xmit))
                 mn10300_serial_dis_tx_intr(port);
 
-        if (uart_circ_chars_pending(&port->uart.info->xmit) < WAKEUP_CHARS)
+        if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
                 uart_write_wakeup(&port->uart);
 }
 
@@ -596,7 +596,7 @@ static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
         *port->_control = ctr;
 
         uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
-        wake_up_interruptible(&port->uart.info->delta_msr_wait);
+        wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
 }
 
 /*
@@ -705,8 +705,8 @@ static void mn10300_serial_start_tx(struct uart_port *_port)
 
         _enter("%s{%lu}",
                port->name,
-               CIRC_CNT(&port->uart.info->xmit.head,
-                        &port->uart.info->xmit.tail,
+               CIRC_CNT(&port->uart.state->xmit.head,
+                        &port->uart.state->xmit.tail,
                         UART_XMIT_SIZE));
 
         /* kick the virtual DMA controller */
diff --git a/arch/mn10300/kernel/setup.c b/arch/mn10300/kernel/setup.c
index 79890edfd67a..3f24c298a3af 100644
--- a/arch/mn10300/kernel/setup.c
+++ b/arch/mn10300/kernel/setup.c
@@ -285,7 +285,7 @@ static void c_stop(struct seq_file *m, void *v)
 {
 }
 
-struct seq_operations cpuinfo_op = {
+const struct seq_operations cpuinfo_op = {
         .start  = c_start,
         .next   = c_next,
         .stop   = c_stop,
diff --git a/arch/mn10300/kernel/sys_mn10300.c b/arch/mn10300/kernel/sys_mn10300.c
index 3e52a1054327..8ca5af00334c 100644
--- a/arch/mn10300/kernel/sys_mn10300.c
+++ b/arch/mn10300/kernel/sys_mn10300.c
@@ -19,7 +19,6 @@
 #include <linux/stat.h>
 #include <linux/mman.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/tty.h>
 
 #include <asm/uaccess.h>
diff --git a/arch/mn10300/kernel/vmlinux.lds.S b/arch/mn10300/kernel/vmlinux.lds.S
index 76f41bdb79c4..10549dcfb610 100644
--- a/arch/mn10300/kernel/vmlinux.lds.S
+++ b/arch/mn10300/kernel/vmlinux.lds.S
@@ -44,24 +44,8 @@ SECTIONS
   RO_DATA(PAGE_SIZE)
 
   /* writeable */
-  .data : {                     /* Data */
-        DATA_DATA
-        CONSTRUCTORS
-        }
-
-  .data_nosave : { NOSAVE_DATA; }
-
-  .data.page_aligned : { PAGE_ALIGNED_DATA(PAGE_SIZE); }
-  .data.cacheline_aligned : { CACHELINE_ALIGNED_DATA(32); }
-
-  /* rarely changed data like cpu maps */
-  . = ALIGN(32);
-  .data.read_mostly : AT(ADDR(.data.read_mostly)) {
-        READ_MOSTLY_DATA(32);
-        _edata = .;             /* End of data section */
-  }
-
-  .data.init_task : { INIT_TASK_DATA(THREAD_SIZE); }
+  RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
+  _edata = .;
 
   /* might get freed after init */
   . = ALIGN(PAGE_SIZE);
@@ -74,22 +58,8 @@ SECTIONS
   /* will be freed after init */
   . = ALIGN(PAGE_SIZE);         /* Init code and data */
   __init_begin = .;
-  .init.text : {
-        _sinittext = .;
-        INIT_TEXT;
-        _einittext = .;
-  }
-  .init.data : { INIT_DATA; }
-  .setup.init : { INIT_SETUP(16); }
-
-  __initcall_start = .;
-  .initcall.init : {
-        INITCALLS
-  }
-  __initcall_end = .;
-  .con_initcall.init : { CON_INITCALL; }
-
-  SECURITY_INIT
+  INIT_TEXT_SECTION(PAGE_SIZE)
+  INIT_DATA_SECTION(16)
   . = ALIGN(4);
   __alt_instructions = .;
   .altinstructions : { *(.altinstructions) }
@@ -100,8 +70,6 @@ SECTIONS
         .exit.text : { EXIT_TEXT; }
         .exit.data : { EXIT_DATA; }
 
-  .init.ramfs : { INIT_RAM_FS; }
-
   PERCPU(32)
   . = ALIGN(PAGE_SIZE);
   __init_end = .;
diff --git a/arch/mn10300/mm/init.c b/arch/mn10300/mm/init.c
index 8cee387a24fd..ec1420562dc7 100644
--- a/arch/mn10300/mm/init.c
+++ b/arch/mn10300/mm/init.c
@@ -112,7 +112,7 @@ void __init mem_init(void)
                "Memory: %luk/%luk available"
                " (%dk kernel code, %dk reserved, %dk data, %dk init,"
                " %ldk highmem)\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT - 10),
+               nr_free_pages() << (PAGE_SHIFT - 10),
                max_mapnr << (PAGE_SHIFT - 10),
                codesize >> 10,
                reservedpages << (PAGE_SHIFT - 10),
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 06f8d5b5b0f9..f388dc68f605 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -16,7 +16,7 @@ config PARISC
         select RTC_DRV_GENERIC
         select INIT_ALL_POSSIBLE
         select BUG
-        select HAVE_PERF_COUNTERS
+        select HAVE_PERF_EVENTS
         select GENERIC_ATOMIC64 if !64BIT
         help
           The PA-RISC microprocessor is designed by Hewlett-Packard and used
diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile
index da6f66901c92..55cca1dac431 100644
--- a/arch/parisc/Makefile
+++ b/arch/parisc/Makefile
@@ -118,8 +118,8 @@ define archhelp
         @echo  '* vmlinux       - Uncompressed kernel image (./vmlinux)'
         @echo  '  palo          - Bootable image (./lifimage)'
         @echo  '  install       - Install kernel using'
-        @echo  '                  (your) ~/bin/installkernel or'
-        @echo  '                  (distribution) /sbin/installkernel or'
+        @echo  '                  (your) ~/bin/$(INSTALLKERNEL) or'
+        @echo  '                  (distribution) /sbin/$(INSTALLKERNEL) or'
         @echo  '                  copy to $$(INSTALL_PATH)'
 endef
 
diff --git a/arch/parisc/include/asm/fcntl.h b/arch/parisc/include/asm/fcntl.h
index 1e1c824764ee..5f39d5597ced 100644
--- a/arch/parisc/include/asm/fcntl.h
+++ b/arch/parisc/include/asm/fcntl.h
@@ -28,6 +28,8 @@
 #define F_SETOWN        12      /*  for sockets. */
 #define F_SETSIG        13      /*  for sockets. */
 #define F_GETSIG        14      /*  for sockets. */
+#define F_GETOWN_EX     15
+#define F_SETOWN_EX     16
 
 /* for posix fcntl() and lockf() */
 #define F_RDLCK         01
diff --git a/arch/parisc/include/asm/mman.h b/arch/parisc/include/asm/mman.h
index defe752cc996..9749c8afe83a 100644
--- a/arch/parisc/include/asm/mman.h
+++ b/arch/parisc/include/asm/mman.h
@@ -22,6 +22,8 @@
 #define MAP_GROWSDOWN   0x8000          /* stack-like segment */
 #define MAP_POPULATE    0x10000         /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x20000         /* do not block on IO */
+#define MAP_STACK       0x40000         /* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB     0x80000         /* create a huge page mapping */
 
 #define MS_SYNC         1               /* synchronous memory sync */
 #define MS_ASYNC        2               /* sync memory asynchronously */
@@ -54,6 +56,9 @@
 #define MADV_16M_PAGES  24              /* Use 16 Megabyte pages */
 #define MADV_64M_PAGES  26              /* Use 64 Megabyte pages */
 
+#define MADV_MERGEABLE   65             /* KSM may merge identical pages */
+#define MADV_UNMERGEABLE 66             /* KSM may not merge identical pages */
+
 /* compatibility flags */
 #define MAP_FILE        0
 #define MAP_VARIABLE    0
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
index 7d842d699df2..64c7aa590ae5 100644
--- a/arch/parisc/include/asm/pci.h
+++ b/arch/parisc/include/asm/pci.h
@@ -233,7 +233,6 @@ static inline void pcibios_register_hba(struct pci_hba_data *x)
  *   rp7420/8420 boxes and then revisit this issue.
  */
 #define pcibios_assign_all_busses()     (1)
-#define pcibios_scan_all_fns(a, b)      (0)
 
 #define PCIBIOS_MIN_IO          0x10
 #define PCIBIOS_MIN_MEM         0x1000 /* NBPG - but pci/setup-res.c dies */
diff --git a/arch/parisc/include/asm/perf_counter.h b/arch/parisc/include/asm/perf_counter.h
deleted file mode 100644
index dc9e829f7013..000000000000
--- a/arch/parisc/include/asm/perf_counter.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __ASM_PARISC_PERF_COUNTER_H
-#define __ASM_PARISC_PERF_COUNTER_H
-
-/* parisc only supports software counters through this interface. */
-static inline void set_perf_counter_pending(void) { }
-
-#endif /* __ASM_PARISC_PERF_COUNTER_H */
diff --git a/arch/parisc/include/asm/perf_event.h b/arch/parisc/include/asm/perf_event.h
new file mode 100644
index 000000000000..cc146427d8f9
--- /dev/null
+++ b/arch/parisc/include/asm/perf_event.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_PARISC_PERF_EVENT_H
+#define __ASM_PARISC_PERF_EVENT_H
+
+/* parisc only supports software events through this interface. */
+static inline void set_perf_event_pending(void) { }
+
+#endif /* __ASM_PARISC_PERF_EVENT_H */
diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h
index 21eb45a52629..2e73623feb6b 100644
--- a/arch/parisc/include/asm/smp.h
+++ b/arch/parisc/include/asm/smp.h
@@ -30,7 +30,6 @@ extern void smp_send_all_nop(void);
 
 extern void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
-#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 
 #endif /* !ASSEMBLY */
 
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index f3d3b8b012c4..cda158318c62 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -810,9 +810,9 @@
 #define __NR_preadv             (__NR_Linux + 315)
 #define __NR_pwritev            (__NR_Linux + 316)
 #define __NR_rt_tgsigqueueinfo  (__NR_Linux + 317)
-#define __NR_perf_counter_open  (__NR_Linux + 318)
+#define __NR_perf_event_open    (__NR_Linux + 318)
 
-#define __NR_Linux_syscalls     (__NR_perf_counter_open + 1)
+#define __NR_Linux_syscalls     (__NR_perf_event_open + 1)
 
 
 #define __IGNORE_select         /* newselect */
diff --git a/arch/parisc/install.sh b/arch/parisc/install.sh
index 9632b3e164c7..e593fc8d58bc 100644
--- a/arch/parisc/install.sh
+++ b/arch/parisc/install.sh
@@ -21,8 +21,8 @@
 
 # User may have a custom install script
 
-if [ -x ~/bin/installkernel ]; then exec ~/bin/installkernel "$@"; fi
-if [ -x /sbin/installkernel ]; then exec /sbin/installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install
 
diff --git a/arch/parisc/kernel/init_task.c b/arch/parisc/kernel/init_task.c
index 82974b20fc10..d020eae6525c 100644
--- a/arch/parisc/kernel/init_task.c
+++ b/arch/parisc/kernel/init_task.c
@@ -43,8 +43,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((aligned(128))) __attribute__((__section__(".data.init_task"))) =
+union thread_union init_thread_union __init_task_data
+        __attribute__((aligned(128))) =
                 { INIT_THREAD_INFO(init_task) };
 
 #if PT_NLEVELS == 3
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index 92a0acaa0d12..561388b17c91 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -18,7 +18,6 @@
 #include <linux/signal.h>
 #include <linux/resource.h>
 #include <linux/times.h>
-#include <linux/utsname.h>
 #include <linux/time.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index cf145eb026b3..843f423dec67 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -416,7 +416,7 @@
         ENTRY_COMP(preadv)              /* 315 */
         ENTRY_COMP(pwritev)
         ENTRY_COMP(rt_tgsigqueueinfo)
-        ENTRY_SAME(perf_counter_open)
+        ENTRY_SAME(perf_event_open)
 
         /* Nothing yet */
 
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S
index aea1784edbd1..775be2791bc2 100644
--- a/arch/parisc/kernel/vmlinux.lds.S
+++ b/arch/parisc/kernel/vmlinux.lds.S
@@ -77,13 +77,7 @@ SECTIONS
          */
         . = ALIGN(PAGE_SIZE);
         data_start = .;
-        . = ALIGN(16);
-        /* Exception table */
-        __ex_table : {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
+        EXCEPTION_TABLE(16)
 
         NOTES
 
@@ -94,23 +88,8 @@ SECTIONS
                 __stop___unwind = .;
         }
 
-        /* rarely changed data like cpu maps */
-        . = ALIGN(16);
-        .data.read_mostly : {
-                *(.data.read_mostly)
-        }
-
-        . = ALIGN(L1_CACHE_BYTES);
         /* Data */
-        .data : {
-                DATA_DATA
-                CONSTRUCTORS
-        }
-
-        . = ALIGN(L1_CACHE_BYTES);
-        .data.cacheline_aligned : {
-                *(.data.cacheline_aligned)
-        }
+        RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
 
         /* PA-RISC locks requires 16-byte alignment */
         . = ALIGN(16);
@@ -118,17 +97,6 @@ SECTIONS
                 *(.data.lock_aligned)
         }
 
-        /* nosave data is really only used for software suspend...it's here
-         * just in case we ever implement it
-         */
-        . = ALIGN(PAGE_SIZE);
-        __nosave_begin = .;
-        .data_nosave : {
-                *(.data.nosave)
-        }
-        . = ALIGN(PAGE_SIZE);
-        __nosave_end = .;
-
         /* End of data section */
         _edata = .;
 
@@ -147,14 +115,6 @@ SECTIONS
         }
         __bss_stop = .;
 
-
-        /* assembler code expects init_task to be 16k aligned */
-        . = ALIGN(16384);
-        /* init_task */
-        .data.init_task : {
-                *(.data.init_task)
-        }
-
 #ifdef CONFIG_64BIT
         . = ALIGN(16);
         /* Linkage tables */
@@ -172,64 +132,8 @@ SECTIONS
         /* reserve space for interrupt stack by aligning __init* to 16k */
         . = ALIGN(16384);
         __init_begin = .;
-        .init.text : { 
-                _sinittext = .;
-                INIT_TEXT
-                _einittext = .;
-        }
-        .init.data : {
-                INIT_DATA
-        }
-        . = ALIGN(16);
-        .init.setup : {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
-        }
-        .initcall.init : {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
-        }
-        .con_initcall.init : {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
-        }
-        SECURITY_INIT
-
-        /* alternate instruction replacement.  This is a mechanism x86 uses
-         * to detect the CPU type and replace generic instruction sequences
-         * with CPU specific ones.  We don't currently do this in PA, but
-         * it seems like a good idea...
-         */
-        . = ALIGN(4);
-        .altinstructions : {
-                __alt_instructions = .;
-                *(.altinstructions)
-                __alt_instructions_end = .; 
-        } 
-        .altinstr_replacement : {
-                *(.altinstr_replacement)
-        } 
-
-        /* .exit.text is discard at runtime, not link time, to deal with references
-         *  from .altinstructions and .eh_frame
-         */
-        .exit.text : {
-                EXIT_TEXT
-        }
-        .exit.data : {
-                EXIT_DATA
-        }
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
-        .init.ramfs : {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
-        }
-#endif
+        INIT_TEXT_SECTION(16384)
+        INIT_DATA_SECTION(16)
 
         PERCPU(PAGE_SIZE)
         . = ALIGN(PAGE_SIZE);
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index b0831d9e35cb..d5aca31fddbb 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -506,7 +506,7 @@ void __init mem_init(void)
 #endif
 
         printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init)\n",
-                (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 num_physpages << (PAGE_SHIFT-10),
                 codesize >> 10,
                 reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 8250902265c6..10a0a5488a44 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -129,7 +129,7 @@ config PPC
         select HAVE_OPROFILE
         select HAVE_SYSCALL_WRAPPERS if PPC64
         select GENERIC_ATOMIC64 if PPC32
-        select HAVE_PERF_COUNTERS
+        select HAVE_PERF_EVENTS
 
 config EARLY_PRINTK
         bool
@@ -385,9 +385,15 @@ config NUMA
 
 config NODES_SHIFT
         int
+        default "8" if PPC64
         default "4"
         depends on NEED_MULTIPLE_NODES
 
+config MAX_ACTIVE_REGIONS
+        int
+        default "256" if PPC64
+        default "32"
+
 config ARCH_SELECT_MEMORY_MODEL
         def_bool y
         depends on PPC64
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 952a3963e9e8..1a54a3b3a3fa 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -158,14 +158,23 @@ drivers-$(CONFIG_OPROFILE)	+= arch/powerpc/oprofile/
 # Default to zImage, override when needed
 all: zImage
 
-CPPFLAGS_vmlinux.lds    := -Upowerpc
-
 BOOT_TARGETS = zImage zImage.initrd uImage zImage% dtbImage% treeImage.% cuImage.% simpleImage.%
 
 PHONY += $(BOOT_TARGETS)
 
 boot := arch/$(ARCH)/boot
 
+ifeq ($(CONFIG_RELOCATABLE),y)
+quiet_cmd_relocs_check = CALL    $<
+      cmd_relocs_check = perl $< "$(OBJDUMP)" "$(obj)/vmlinux"
+
+PHONY += relocs_check
+relocs_check: arch/powerpc/relocs_check.pl vmlinux
+        $(call cmd,relocs_check)
+
+zImage: relocs_check
+endif
+
 $(BOOT_TARGETS): vmlinux
         $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
 
@@ -182,8 +191,8 @@ define archhelp
   @echo '  simpleImage.<dt> - Firmware independent image.'
   @echo '  treeImage.<dt>  - Support for older IBM 4xx firmware (not U-Boot)'
   @echo '  install         - Install kernel using'
-  @echo '                    (your) ~/bin/installkernel or'
-  @echo '                    (distribution) /sbin/installkernel or'
+  @echo '                    (your) ~/bin/$(INSTALLKERNEL) or'
+  @echo '                    (distribution) /sbin/$(INSTALLKERNEL) or'
   @echo '                    install to $$(INSTALL_PATH) and run lilo'
   @echo '  *_defconfig     - Select default config from arch/$(ARCH)/configs'
   @echo ''
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index f32c2811c6d9..855782c5e5ec 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -159,6 +159,7 @@
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                sdhci,wp-inverted;
                                 /* Filled in by U-Boot */
                                 clock-frequency = <0>;
                         };
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 28e022ac4179..9e2264b10008 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -173,6 +173,7 @@
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                sdhci,wp-inverted;
                                 /* Filled in by U-Boot */
                                 clock-frequency = <111111111>;
                         };
diff --git a/arch/powerpc/boot/dts/mpc8377_wlan.dts b/arch/powerpc/boot/dts/mpc8377_wlan.dts
index 3febc4e91b10..9a603695723b 100644
--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -150,6 +150,7 @@
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                sdhci,wp-inverted;
                                 clock-frequency = <133333333>;
                         };
                 };
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index f720ab9af30d..f70cf6000839 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -159,6 +159,7 @@
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                sdhci,wp-inverted;
                                 /* Filled in by U-Boot */
                                 clock-frequency = <0>;
                         };
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index a11ead8214b4..4e6a1a407bbd 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -173,6 +173,7 @@
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                sdhci,wp-inverted;
                                 /* Filled in by U-Boot */
                                 clock-frequency = <111111111>;
                         };
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 4fa221fd9bdc..645ec51cc6e1 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -157,6 +157,7 @@
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                sdhci,wp-inverted;
                                 /* Filled in by U-Boot */
                                 clock-frequency = <0>;
                         };
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index e35dfba587c8..72336d504528 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -171,6 +171,7 @@
                                 reg = <0x2e000 0x1000>;
                                 interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                sdhci,wp-inverted;
                                 /* Filled in by U-Boot */
                                 clock-frequency = <111111111>;
                         };
diff --git a/arch/powerpc/boot/install.sh b/arch/powerpc/boot/install.sh
index 98312d169c85..b6a256bc96ee 100644
--- a/arch/powerpc/boot/install.sh
+++ b/arch/powerpc/boot/install.sh
@@ -23,8 +23,8 @@ set -e
 
 # User may have a custom install script
 
-if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
-if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install
 
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index f42e623030ee..fa19f3fe05ff 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -18,6 +18,9 @@
 
 #ifndef CONFIG_VIRT_CPU_ACCOUNTING
 #include <asm-generic/cputime.h>
+#ifdef __KERNEL__
+static inline void setup_cputime_one_jiffy(void) { }
+#endif
 #else
 
 #include <linux/types.h>
@@ -49,6 +52,11 @@ typedef u64 cputime64_t;
 #ifdef __KERNEL__
 
 /*
+ * One jiffy in timebase units computed during initialization
+ */
+extern cputime_t cputime_one_jiffy;
+
+/*
  * Convert cputime <-> jiffies
  */
 extern u64 __cputime_jiffies_factor;
@@ -89,6 +97,11 @@ static inline cputime_t jiffies_to_cputime(const unsigned long jif)
         return ct;
 }
 
+static inline void setup_cputime_one_jiffy(void)
+{
+        cputime_one_jiffy = jiffies_to_cputime(1);
+}
+
 static inline cputime64_t jiffies64_to_cputime64(const u64 jif)
 {
         cputime_t ct;
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index 9dade15d1ab4..6d94d27ed850 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -15,7 +15,16 @@ struct dev_archdata {
 
         /* DMA operations on that device */
         struct dma_map_ops      *dma_ops;
-        void                    *dma_data;
+
+        /*
+         * When an iommu is in use, dma_data is used as a ptr to the base of the
+         * iommu_table.  Otherwise, it is a simple numerical offset.
+         */
+        union {
+                dma_addr_t      dma_offset;
+                void            *iommu_table_base;
+        } dma_data;
+
 #ifdef CONFIG_SWIOTLB
         dma_addr_t              max_direct_dma_addr;
 #endif
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index cb2ca41dd526..e281daebddca 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -26,7 +26,6 @@ extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
 extern void dma_direct_free_coherent(struct device *dev, size_t size,
                                      void *vaddr, dma_addr_t dma_handle);
 
-extern unsigned long get_dma_direct_offset(struct device *dev);
 
 #ifdef CONFIG_NOT_COHERENT_CACHE
 /*
@@ -90,6 +89,28 @@ static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
         dev->archdata.dma_ops = ops;
 }
 
+/*
+ * get_dma_offset()
+ *
+ * Get the dma offset on configurations where the dma address can be determined
+ * from the physical address by looking at a simple offset.  Direct dma and
+ * swiotlb use this function, but it is typically not used by implementations
+ * with an iommu.
+ */
+static inline dma_addr_t get_dma_offset(struct device *dev)
+{
+        if (dev)
+                return dev->archdata.dma_data.dma_offset;
+
+        return PCI_DRAM_OFFSET;
+}
+
+static inline void set_dma_offset(struct device *dev, dma_addr_t off)
+{
+        if (dev)
+                dev->archdata.dma_data.dma_offset = off;
+}
+
 /* this will be removed soon */
 #define flush_write_buffers()
 
@@ -181,12 +202,12 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
 
 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
 {
-        return paddr + get_dma_direct_offset(dev);
+        return paddr + get_dma_offset(dev);
 }
 
 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
 {
-        return daddr - get_dma_direct_offset(dev);
+        return daddr - get_dma_offset(dev);
 }
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
diff --git a/arch/powerpc/include/asm/fsldma.h b/arch/powerpc/include/asm/fsldma.h
new file mode 100644
index 000000000000..a67aeed17d40
--- /dev/null
+++ b/arch/powerpc/include/asm/fsldma.h
@@ -0,0 +1,136 @@
+/*
+ * Freescale MPC83XX / MPC85XX DMA Controller
+ *
+ * Copyright (c) 2009 Ira W. Snyder <iws@ovro.caltech.edu>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef __ARCH_POWERPC_ASM_FSLDMA_H__
+#define __ARCH_POWERPC_ASM_FSLDMA_H__
+
+#include <linux/dmaengine.h>
+
+/*
+ * Definitions for the Freescale DMA controller's DMA_SLAVE implemention
+ *
+ * The Freescale DMA_SLAVE implementation was designed to handle many-to-many
+ * transfers. An example usage would be an accelerated copy between two
+ * scatterlists. Another example use would be an accelerated copy from
+ * multiple non-contiguous device buffers into a single scatterlist.
+ *
+ * A DMA_SLAVE transaction is defined by a struct fsl_dma_slave. This
+ * structure contains a list of hardware addresses that should be copied
+ * to/from the scatterlist passed into device_prep_slave_sg(). The structure
+ * also has some fields to enable hardware-specific features.
+ */
+
+/**
+ * struct fsl_dma_hw_addr
+ * @entry: linked list entry
+ * @address: the hardware address
+ * @length: length to transfer
+ *
+ * Holds a single physical hardware address / length pair for use
+ * with the DMAEngine DMA_SLAVE API.
+ */
+struct fsl_dma_hw_addr {
+        struct list_head entry;
+
+        dma_addr_t address;
+        size_t length;
+};
+
+/**
+ * struct fsl_dma_slave
+ * @addresses: a linked list of struct fsl_dma_hw_addr structures
+ * @request_count: value for DMA request count
+ * @src_loop_size: setup and enable constant source-address DMA transfers
+ * @dst_loop_size: setup and enable constant destination address DMA transfers
+ * @external_start: enable externally started DMA transfers
+ * @external_pause: enable externally paused DMA transfers
+ *
+ * Holds a list of address / length pairs for use with the DMAEngine
+ * DMA_SLAVE API implementation for the Freescale DMA controller.
+ */
+struct fsl_dma_slave {
+
+        /* List of hardware address/length pairs */
+        struct list_head addresses;
+
+        /* Support for extra controller features */
+        unsigned int request_count;
+        unsigned int src_loop_size;
+        unsigned int dst_loop_size;
+        bool external_start;
+        bool external_pause;
+};
+
+/**
+ * fsl_dma_slave_append - add an address/length pair to a struct fsl_dma_slave
+ * @slave: the &struct fsl_dma_slave to add to
+ * @address: the hardware address to add
+ * @length: the length of bytes to transfer from @address
+ *
+ * Add a hardware address/length pair to a struct fsl_dma_slave. Returns 0 on
+ * success, -ERRNO otherwise.
+ */
+static inline int fsl_dma_slave_append(struct fsl_dma_slave *slave,
+                                       dma_addr_t address, size_t length)
+{
+        struct fsl_dma_hw_addr *addr;
+
+        addr = kzalloc(sizeof(*addr), GFP_ATOMIC);
+        if (!addr)
+                return -ENOMEM;
+
+        INIT_LIST_HEAD(&addr->entry);
+        addr->address = address;
+        addr->length = length;
+
+        list_add_tail(&addr->entry, &slave->addresses);
+        return 0;
+}
+
+/**
+ * fsl_dma_slave_free - free a struct fsl_dma_slave
+ * @slave: the struct fsl_dma_slave to free
+ *
+ * Free a struct fsl_dma_slave and all associated address/length pairs
+ */
+static inline void fsl_dma_slave_free(struct fsl_dma_slave *slave)
+{
+        struct fsl_dma_hw_addr *addr, *tmp;
+
+        if (slave) {
+                list_for_each_entry_safe(addr, tmp, &slave->addresses, entry) {
+                        list_del(&addr->entry);
+                        kfree(addr);
+                }
+
+                kfree(slave);
+        }
+}
+
+/**
+ * fsl_dma_slave_alloc - allocate a struct fsl_dma_slave
+ * @gfp: the flags to pass to kmalloc when allocating this structure
+ *
+ * Allocate a struct fsl_dma_slave for use by the DMA_SLAVE API. Returns a new
+ * struct fsl_dma_slave on success, or NULL on failure.
+ */
+static inline struct fsl_dma_slave *fsl_dma_slave_alloc(gfp_t gfp)
+{
+        struct fsl_dma_slave *slave;
+
+        slave = kzalloc(sizeof(*slave), gfp);
+        if (!slave)
+                return NULL;
+
+        INIT_LIST_HEAD(&slave->addresses);
+        return slave;
+}
+
+#endif /* __ARCH_POWERPC_ASM_FSLDMA_H__ */
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index e73d554538dd..abbc2aaaced5 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -135,43 +135,43 @@ static inline int irqs_disabled_flags(unsigned long flags)
  */
 struct irq_chip;
 
-#ifdef CONFIG_PERF_COUNTERS
+#ifdef CONFIG_PERF_EVENTS
 
 #ifdef CONFIG_PPC64
-static inline unsigned long test_perf_counter_pending(void)
+static inline unsigned long test_perf_event_pending(void)
 {
         unsigned long x;
 
         asm volatile("lbz %0,%1(13)"
                 : "=r" (x)
-                : "i" (offsetof(struct paca_struct, perf_counter_pending)));
+                : "i" (offsetof(struct paca_struct, perf_event_pending)));
         return x;
 }
 
-static inline void set_perf_counter_pending(void)
+static inline void set_perf_event_pending(void)
 {
         asm volatile("stb %0,%1(13)" : :
                 "r" (1),
-                "i" (offsetof(struct paca_struct, perf_counter_pending)));
+                "i" (offsetof(struct paca_struct, perf_event_pending)));
 }
 
-static inline void clear_perf_counter_pending(void)
+static inline void clear_perf_event_pending(void)
 {
         asm volatile("stb %0,%1(13)" : :
                 "r" (0),
-                "i" (offsetof(struct paca_struct, perf_counter_pending)));
+                "i" (offsetof(struct paca_struct, perf_event_pending)));
 }
 #endif /* CONFIG_PPC64 */
 
-#else  /* CONFIG_PERF_COUNTERS */
+#else  /* CONFIG_PERF_EVENTS */
 
-static inline unsigned long test_perf_counter_pending(void)
+static inline unsigned long test_perf_event_pending(void)
 {
         return 0;
 }
 
-static inline void clear_perf_counter_pending(void) {}
-#endif /* CONFIG_PERF_COUNTERS */
+static inline void clear_perf_event_pending(void) {}
+#endif /* CONFIG_PERF_EVENTS */
 
 #endif  /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 7464c0daddd1..edfc9803ec91 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -70,6 +70,16 @@ struct iommu_table {
 
 struct scatterlist;
 
+static inline void set_iommu_table_base(struct device *dev, void *base)
+{
+        dev->archdata.dma_data.iommu_table_base = base;
+}
+
+static inline void *get_iommu_table_base(struct device *dev)
+{
+        return dev->archdata.dma_data.iommu_table_base;
+}
+
 /* Frees table for an individual device node */
 extern void iommu_free_table(struct iommu_table *tbl, const char *node_name);
 
diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h
index 7b1c49811a24..d4a7f645c5db 100644
--- a/arch/powerpc/include/asm/mman.h
+++ b/arch/powerpc/include/asm/mman.h
@@ -25,6 +25,8 @@
 
 #define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x10000         /* do not block on IO */
+#define MAP_STACK       0x20000         /* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB     0x40000         /* create a huge page mapping */
 
 #ifdef __KERNEL__
 #ifdef CONFIG_PPC64
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index b634456ea893..7d8514ceceae 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -122,7 +122,7 @@ struct paca_struct {
         u8 soft_enabled;                /* irq soft-enable flag */
         u8 hard_enabled;                /* set if irqs are enabled in MSR */
         u8 io_sync;                     /* writel() needs spin_unlock sync */
-        u8 perf_counter_pending;        /* PM interrupt while soft-disabled */
+        u8 perf_event_pending;          /* PM interrupt while soft-disabled */
 
         /* Stuff for accurate time accounting */
         u64 user_time;                  /* accumulated usermode TB ticks */
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 7aca4839387b..b5ea626eea2d 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -45,7 +45,6 @@ struct pci_dev;
  */
 #define pcibios_assign_all_busses() \
         (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
-#define pcibios_scan_all_fns(a, b)      0
 
 static inline void pcibios_set_master(struct pci_dev *dev)
 {
diff --git a/arch/powerpc/include/asm/perf_counter.h b/arch/powerpc/include/asm/perf_event.h
index 0ea0639fcf75..3288ce3997e0 100644
--- a/arch/powerpc/include/asm/perf_counter.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -1,5 +1,5 @@
 /*
- * Performance counter support - PowerPC-specific definitions.
+ * Performance event support - PowerPC-specific definitions.
  *
  * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
  *
@@ -12,7 +12,7 @@
 
 #include <asm/hw_irq.h>
 
-#define MAX_HWCOUNTERS          8
+#define MAX_HWEVENTS            8
 #define MAX_EVENT_ALTERNATIVES  8
 #define MAX_LIMITED_HWCOUNTERS  2
 
@@ -28,12 +28,12 @@ struct power_pmu {
         unsigned long   test_adder;
         int             (*compute_mmcr)(u64 events[], int n_ev,
                                 unsigned int hwc[], unsigned long mmcr[]);
-        int             (*get_constraint)(u64 event, unsigned long *mskp,
+        int             (*get_constraint)(u64 event_id, unsigned long *mskp,
                                 unsigned long *valp);
-        int             (*get_alternatives)(u64 event, unsigned int flags,
+        int             (*get_alternatives)(u64 event_id, unsigned int flags,
                                 u64 alt[]);
         void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
-        int             (*limited_pmc_event)(u64 event);
+        int             (*limited_pmc_event)(u64 event_id);
         u32             flags;
         int             n_generic;
         int             *generic_events;
@@ -61,10 +61,10 @@ struct pt_regs;
 extern unsigned long perf_misc_flags(struct pt_regs *regs);
 extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
 
-#define PERF_COUNTER_INDEX_OFFSET       1
+#define PERF_EVENT_INDEX_OFFSET 1
 
 /*
- * Only override the default definitions in include/linux/perf_counter.h
+ * Only override the default definitions in include/linux/perf_event.h
  * if we have hardware PMU support.
  */
 #ifdef CONFIG_PPC_PERF_CTRS
@@ -73,14 +73,14 @@ extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
 
 /*
  * The power_pmu.get_constraint function returns a 32/64-bit value and
- * a 32/64-bit mask that express the constraints between this event and
+ * a 32/64-bit mask that express the constraints between this event_id and
  * other events.
  *
  * The value and mask are divided up into (non-overlapping) bitfields
  * of three different types:
  *
  * Select field: this expresses the constraint that some set of bits
- * in MMCR* needs to be set to a specific value for this event.  For a
+ * in MMCR* needs to be set to a specific value for this event_id.  For a
  * select field, the mask contains 1s in every bit of the field, and
  * the value contains a unique value for each possible setting of the
  * MMCR* bits.  The constraint checking code will ensure that two events
@@ -102,9 +102,9 @@ extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
  * possible.)  For N classes, the field is N+1 bits wide, and each class
  * is assigned one bit from the least-significant N bits.  The mask has
  * only the most-significant bit set, and the value has only the bit
- * for the event's class set.  The test_adder has the least significant
+ * for the event_id's class set.  The test_adder has the least significant
  * bit set in the field.
  *
- * If an event is not subject to the constraint expressed by a particular
+ * If an event_id is not subject to the constraint expressed by a particular
  * field, then it will have 0 in both the mask and value for that field.
  */
diff --git a/arch/powerpc/include/asm/pmc.h b/arch/powerpc/include/asm/pmc.h
index ccc68b50d05d..5a9ede4962cb 100644
--- a/arch/powerpc/include/asm/pmc.h
+++ b/arch/powerpc/include/asm/pmc.h
@@ -29,7 +29,7 @@ int reserve_pmc_hardware(perf_irq_t new_perf_irq);
 void release_pmc_hardware(void);
 void ppc_enable_pmcs(void);
 
-#ifdef CONFIG_PPC64
+#ifdef CONFIG_PPC_BOOK3S_64
 #include <asm/lppaca.h>
 
 static inline void ppc_set_pmu_inuse(int inuse)
diff --git a/arch/powerpc/include/asm/pte-40x.h b/arch/powerpc/include/asm/pte-40x.h
index 6c3e1f4378d4..ec0b0b0d1df9 100644
--- a/arch/powerpc/include/asm/pte-40x.h
+++ b/arch/powerpc/include/asm/pte-40x.h
@@ -43,6 +43,7 @@
 #define _PAGE_NO_CACHE  0x004   /* I: caching is inhibited */
 #define _PAGE_WRITETHRU 0x008   /* W: caching is write-through */
 #define _PAGE_USER      0x010   /* matches one of the zone permission bits */
+#define _PAGE_SPECIAL   0x020   /* software: Special page */
 #define _PAGE_RW        0x040   /* software: Writes permitted */
 #define _PAGE_DIRTY     0x080   /* software: dirty page */
 #define _PAGE_HWWRITE   0x100   /* hardware: Dirty & RW, set in exception */
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h
index 94e979718dcf..dd5ea95fe61e 100644
--- a/arch/powerpc/include/asm/pte-8xx.h
+++ b/arch/powerpc/include/asm/pte-8xx.h
@@ -32,6 +32,7 @@
 #define _PAGE_FILE      0x0002  /* when !present: nonlinear file mapping */
 #define _PAGE_NO_CACHE  0x0002  /* I: cache inhibit */
 #define _PAGE_SHARED    0x0004  /* No ASID (context) compare */
+#define _PAGE_SPECIAL   0x0008  /* SW entry, forced to 0 by the TLB miss */
 
 /* These five software bits must be masked out when the entry is loaded
  * into the TLB.
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index c3b65076a263..f2b370180a09 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -25,9 +25,6 @@
 #ifndef _PAGE_WRITETHRU
 #define _PAGE_WRITETHRU 0
 #endif
-#ifndef _PAGE_SPECIAL
-#define _PAGE_SPECIAL   0
-#endif
 #ifndef _PAGE_4K_PFN
 #define _PAGE_4K_PFN            0
 #endif
@@ -179,7 +176,5 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
 #define HAVE_PAGE_AGP
 
 /* Advertise support for _PAGE_SPECIAL */
-#ifdef _PAGE_SPECIAL
 #define __HAVE_ARCH_PTE_SPECIAL
-#endif
 
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index c0d3b8af9319..d9ea8d39c342 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -146,7 +146,7 @@ extern void smp_generic_take_timebase(void);
 extern struct smp_ops_t *smp_ops;
 
 extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi(cpumask_t mask);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 
 /* Definitions relative to the secondary CPU spin loop
  * and entry point. Not all of them exist on both 32 and
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index ed24bd92fe49..c7d671a7d9a1 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -322,7 +322,7 @@ SYSCALL_SPU(epoll_create1)
 SYSCALL_SPU(dup3)
 SYSCALL_SPU(pipe2)
 SYSCALL(inotify_init1)
-SYSCALL_SPU(perf_counter_open)
+SYSCALL_SPU(perf_event_open)
 COMPAT_SYS_SPU(preadv)
 COMPAT_SYS_SPU(pwritev)
 COMPAT_SYS(rt_tgsigqueueinfo)
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index 054a16d68082..22f738d12ad9 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -17,11 +17,6 @@ static inline int cpu_to_node(int cpu)
 
 #define parent_node(node)       (node)
 
-static inline cpumask_t node_to_cpumask(int node)
-{
-        return numa_cpumask_lookup_table[node];
-}
-
 #define cpumask_of_node(node) (&numa_cpumask_lookup_table[node])
 
 int of_node_to_nid(struct device_node *device);
@@ -36,11 +31,6 @@ static inline int pcibus_to_node(struct pci_bus *bus)
 }
 #endif
 
-#define pcibus_to_cpumask(bus)  (pcibus_to_node(bus) == -1 ? \
-                                        CPU_MASK_ALL : \
-                                        node_to_cpumask(pcibus_to_node(bus)) \
-                                )
-
 #define cpumask_of_pcibus(bus)  (pcibus_to_node(bus) == -1 ?            \
                                  cpu_all_mask :                         \
                                  cpumask_of_node(pcibus_to_node(bus)))
@@ -57,14 +47,13 @@ static inline int pcibus_to_node(struct pci_bus *bus)
         .cache_nice_tries       = 1,                    \
         .busy_idx               = 3,                    \
         .idle_idx               = 1,                    \
-        .newidle_idx            = 2,                    \
-        .wake_idx               = 1,                    \
+        .newidle_idx            = 0,                    \
+        .wake_idx               = 0,                    \
         .flags                  = SD_LOAD_BALANCE       \
                                 | SD_BALANCE_EXEC       \
+                                | SD_BALANCE_FORK       \
                                 | SD_BALANCE_NEWIDLE    \
-                                | SD_WAKE_IDLE          \
-                                | SD_SERIALIZE          \
-                                | SD_WAKE_BALANCE,      \
+                                | SD_SERIALIZE,         \
         .last_balance           = jiffies,              \
         .balance_interval       = 1,                    \
         .nr_balance_failed      = 0,                    \
@@ -105,8 +94,6 @@ static inline void sysfs_remove_device_from_node(struct sys_device *dev,
 #ifdef CONFIG_PPC64
 #include <asm/smp.h>
 
-#define topology_thread_siblings(cpu)   (per_cpu(cpu_sibling_map, cpu))
-#define topology_core_siblings(cpu)     (per_cpu(cpu_core_map, cpu))
 #define topology_thread_cpumask(cpu)    (&per_cpu(cpu_sibling_map, cpu))
 #define topology_core_cpumask(cpu)      (&per_cpu(cpu_core_map, cpu))
 #define topology_core_id(cpu)           (cpu_to_core_id(cpu))
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index cef080bfc607..f6ca76176766 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -341,7 +341,7 @@
 #define __NR_dup3               316
 #define __NR_pipe2              317
 #define __NR_inotify_init1      318
-#define __NR_perf_counter_open  319
+#define __NR_perf_event_open    319
 #define __NR_preadv             320
 #define __NR_pwritev            321
 #define __NR_rt_tgsigqueueinfo  322
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 569f79ccd310..b23664a0b86c 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -97,7 +97,7 @@ obj64-$(CONFIG_AUDIT)		+= compat_audit.o
 
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
-obj-$(CONFIG_PPC_PERF_CTRS)     += perf_counter.o perf_callchain.o
+obj-$(CONFIG_PPC_PERF_CTRS)     += perf_event.o perf_callchain.o
 obj64-$(CONFIG_PPC_PERF_CTRS)   += power4-pmu.o ppc970-pmu.o power5-pmu.o \
                                    power5+-pmu.o power6-pmu.o power7-pmu.o
 obj32-$(CONFIG_PPC_PERF_CTRS)   += mpc7450-pmu.o
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index f0df285f0f87..0812b0f414bb 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -133,7 +133,7 @@ int main(void)
         DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
         DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
         DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
-        DEFINE(PACAPERFPEND, offsetof(struct paca_struct, perf_counter_pending));
+        DEFINE(PACAPERFPEND, offsetof(struct paca_struct, perf_event_pending));
         DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
 #ifdef CONFIG_PPC_MM_SLICES
         DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index 87ddb3fb948c..37771a518119 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -18,7 +18,7 @@
 static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
                                       dma_addr_t *dma_handle, gfp_t flag)
 {
-        return iommu_alloc_coherent(dev, dev->archdata.dma_data, size,
+        return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size,
                                     dma_handle, device_to_mask(dev), flag,
                                     dev_to_node(dev));
 }
@@ -26,7 +26,7 @@ static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
 static void dma_iommu_free_coherent(struct device *dev, size_t size,
                                     void *vaddr, dma_addr_t dma_handle)
 {
-        iommu_free_coherent(dev->archdata.dma_data, size, vaddr, dma_handle);
+        iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle);
 }
 
 /* Creates TCEs for a user provided buffer.  The user buffer must be
@@ -39,8 +39,8 @@ static dma_addr_t dma_iommu_map_page(struct device *dev, struct page *page,
                                      enum dma_data_direction direction,
                                      struct dma_attrs *attrs)
 {
-        return iommu_map_page(dev, dev->archdata.dma_data, page, offset, size,
-                              device_to_mask(dev), direction, attrs);
+        return iommu_map_page(dev, get_iommu_table_base(dev), page, offset,
+                              size, device_to_mask(dev), direction, attrs);
 }
 
 
@@ -48,7 +48,7 @@ static void dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle,
                                  size_t size, enum dma_data_direction direction,
                                  struct dma_attrs *attrs)
 {
-        iommu_unmap_page(dev->archdata.dma_data, dma_handle, size, direction,
+        iommu_unmap_page(get_iommu_table_base(dev), dma_handle, size, direction,
                          attrs);
 }
 
@@ -57,7 +57,7 @@ static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,
                             int nelems, enum dma_data_direction direction,
                             struct dma_attrs *attrs)
 {
-        return iommu_map_sg(dev, dev->archdata.dma_data, sglist, nelems,
+        return iommu_map_sg(dev, get_iommu_table_base(dev), sglist, nelems,
                             device_to_mask(dev), direction, attrs);
 }
 
@@ -65,14 +65,14 @@ static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,
                 int nelems, enum dma_data_direction direction,
                 struct dma_attrs *attrs)
 {
-        iommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction,
+        iommu_unmap_sg(get_iommu_table_base(dev), sglist, nelems, direction,
                        attrs);
 }
 
 /* We support DMA to/from any memory page via the iommu */
 static int dma_iommu_dma_supported(struct device *dev, u64 mask)
 {
-        struct iommu_table *tbl = dev->archdata.dma_data;
+        struct iommu_table *tbl = get_iommu_table_base(dev);
 
         if (!tbl || tbl->it_offset > mask) {
                 printk(KERN_INFO
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 21b784d7e7d0..6215062caf8c 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -21,13 +21,6 @@
  * default the offset is PCI_DRAM_OFFSET.
  */
 
-unsigned long get_dma_direct_offset(struct device *dev)
-{
-        if (dev)
-                return (unsigned long)dev->archdata.dma_data;
-
-        return PCI_DRAM_OFFSET;
-}
 
 void *dma_direct_alloc_coherent(struct device *dev, size_t size,
                                 dma_addr_t *dma_handle, gfp_t flag)
@@ -37,7 +30,7 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size,
         ret = __dma_alloc_coherent(dev, size, dma_handle, flag);
         if (ret == NULL)
                 return NULL;
-        *dma_handle += get_dma_direct_offset(dev);
+        *dma_handle += get_dma_offset(dev);
         return ret;
 #else
         struct page *page;
@@ -51,7 +44,7 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size,
                 return NULL;
         ret = page_address(page);
         memset(ret, 0, size);
-        *dma_handle = virt_to_abs(ret) + get_dma_direct_offset(dev);
+        *dma_handle = virt_to_abs(ret) + get_dma_offset(dev);
 
         return ret;
 #endif
@@ -75,7 +68,7 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
         int i;
 
         for_each_sg(sgl, sg, nents, i) {
-                sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev);
+                sg->dma_address = sg_phys(sg) + get_dma_offset(dev);
                 sg->dma_length = sg->length;
                 __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
         }
@@ -110,7 +103,7 @@ static inline dma_addr_t dma_direct_map_page(struct device *dev,
 {
         BUG_ON(dir == DMA_NONE);
         __dma_sync_page(page, offset, size, dir);
-        return page_to_phys(page) + offset + get_dma_direct_offset(dev);
+        return page_to_phys(page) + offset + get_dma_offset(dev);
 }
 
 static inline void dma_direct_unmap_page(struct device *dev,
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 66bcda34a6bb..900e0eea0099 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -556,14 +556,14 @@ ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
 2:
         TRACE_AND_RESTORE_IRQ(r5);
 
-#ifdef CONFIG_PERF_COUNTERS
-        /* check paca->perf_counter_pending if we're enabling ints */
+#ifdef CONFIG_PERF_EVENTS
+        /* check paca->perf_event_pending if we're enabling ints */
         lbz     r3,PACAPERFPEND(r13)
         and.    r3,r3,r5
         beq     27f
-        bl      .perf_counter_do_pending
+        bl      .perf_event_do_pending
 27:
-#endif /* CONFIG_PERF_COUNTERS */
+#endif /* CONFIG_PERF_EVENTS */
 
         /* extract EE bit and use it to restore paca->hard_enabled */
         ld      r3,_MSR(r1)
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 9048f96237f6..24dcc0ecf246 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -17,7 +17,6 @@
 #include <asm/cputable.h>
 #include <asm/setup.h>
 #include <asm/thread_info.h>
-#include <asm/reg.h>
 #include <asm/exception-64e.h>
 #include <asm/bug.h>
 #include <asm/irqflags.h>
diff --git a/arch/powerpc/kernel/init_task.c b/arch/powerpc/kernel/init_task.c
index ffc4253fef55..2375b7eb1c76 100644
--- a/arch/powerpc/kernel/init_task.c
+++ b/arch/powerpc/kernel/init_task.c
@@ -16,9 +16,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union 
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index f7f376ea7b17..e5d121177984 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -53,7 +53,7 @@
 #include <linux/bootmem.h>
 #include <linux/pci.h>
 #include <linux/debugfs.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -138,9 +138,9 @@ notrace void raw_local_irq_restore(unsigned long en)
         }
 #endif /* CONFIG_PPC_STD_MMU_64 */
 
-        if (test_perf_counter_pending()) {
-                clear_perf_counter_pending();
-                perf_counter_do_pending();
+        if (test_perf_event_pending()) {
+                clear_perf_event_pending();
+                perf_event_do_pending();
         }
 
         /*
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index 49e705fcee6d..040bd1de8d99 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -13,6 +13,7 @@
 #include <linux/kexec.h>
 #include <linux/smp.h>
 #include <linux/thread_info.h>
+#include <linux/init_task.h>
 #include <linux/errno.h>
 
 #include <asm/page.h>
@@ -249,8 +250,8 @@ static void kexec_prepare_cpus(void)
  * We could use a smaller stack if we don't care about anything using
  * current, but that audit has not been performed.
  */
-static union thread_union kexec_stack
-        __attribute__((__section__(".data.init_task"))) = { };
+static union thread_union kexec_stack __init_task_data =
+        { };
 
 /* Our assembly helper, in kexec_stub.S */
 extern NORET_TYPE void kexec_sequence(void *newstack, unsigned long start,
diff --git a/arch/powerpc/kernel/mpc7450-pmu.c b/arch/powerpc/kernel/mpc7450-pmu.c
index cc466d039af6..09d72028f317 100644
--- a/arch/powerpc/kernel/mpc7450-pmu.c
+++ b/arch/powerpc/kernel/mpc7450-pmu.c
@@ -9,7 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include <linux/string.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
 
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index e9f4840096b3..bb8209e34931 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1117,7 +1117,7 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
 
                 /* Hook up default DMA ops */
                 sd->dma_ops = pci_dma_ops;
-                sd->dma_data = (void *)PCI_DRAM_OFFSET;
+                set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
 
                 /* Additional platform DMA/iommu setup */
                 if (ppc_md.pci_dma_dev_setup)
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 72c31bcb7aa4..7311fdfb9bf8 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -139,6 +139,7 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
         dev->dev.bus = &pci_bus_type;
         dev->devfn = devfn;
         dev->multifunction = 0;         /* maybe a lie? */
+        dev->needs_freset = 0;          /* pcie fundamental reset required */
 
         dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
         dev->device = get_int_prop(node, "device-id", 0xffff);
diff --git a/arch/powerpc/kernel/perf_callchain.c b/arch/powerpc/kernel/perf_callchain.c
index f74b62c67511..0a03cf70d247 100644
--- a/arch/powerpc/kernel/perf_callchain.c
+++ b/arch/powerpc/kernel/perf_callchain.c
@@ -10,7 +10,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/sched.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/percpu.h>
 #include <linux/uaccess.h>
 #include <linux/mm.h>
diff --git a/arch/powerpc/kernel/perf_counter.c b/arch/powerpc/kernel/perf_event.c
index 7ceefaf3a7f5..bbcbae183e92 100644
--- a/arch/powerpc/kernel/perf_counter.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -1,5 +1,5 @@
 /*
- * Performance counter support - powerpc architecture code
+ * Performance event support - powerpc architecture code
  *
  * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
  *
@@ -10,7 +10,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/sched.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/percpu.h>
 #include <linux/hardirq.h>
 #include <asm/reg.h>
@@ -19,24 +19,24 @@
 #include <asm/firmware.h>
 #include <asm/ptrace.h>
 
-struct cpu_hw_counters {
-        int n_counters;
+struct cpu_hw_events {
+        int n_events;
         int n_percpu;
         int disabled;
         int n_added;
         int n_limited;
         u8  pmcs_enabled;
-        struct perf_counter *counter[MAX_HWCOUNTERS];
-        u64 events[MAX_HWCOUNTERS];
-        unsigned int flags[MAX_HWCOUNTERS];
+        struct perf_event *event[MAX_HWEVENTS];
+        u64 events[MAX_HWEVENTS];
+        unsigned int flags[MAX_HWEVENTS];
         unsigned long mmcr[3];
-        struct perf_counter *limited_counter[MAX_LIMITED_HWCOUNTERS];
+        struct perf_event *limited_counter[MAX_LIMITED_HWCOUNTERS];
         u8  limited_hwidx[MAX_LIMITED_HWCOUNTERS];
-        u64 alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];
-        unsigned long amasks[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];
-        unsigned long avalues[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];
+        u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
+        unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
+        unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
 };
-DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters);
+DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
 
 struct power_pmu *ppmu;
 
@@ -47,7 +47,7 @@ struct power_pmu *ppmu;
  * where the hypervisor bit is forced to 1 (as on Apple G5 processors),
  * then we need to use the FCHV bit to ignore kernel events.
  */
-static unsigned int freeze_counters_kernel = MMCR0_FCS;
+static unsigned int freeze_events_kernel = MMCR0_FCS;
 
 /*
  * 32-bit doesn't have MMCRA but does have an MMCR2,
@@ -122,14 +122,14 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
 
         if (ppmu->flags & PPMU_ALT_SIPR) {
                 if (mmcra & POWER6_MMCRA_SIHV)
-                        return PERF_EVENT_MISC_HYPERVISOR;
+                        return PERF_RECORD_MISC_HYPERVISOR;
                 return (mmcra & POWER6_MMCRA_SIPR) ?
-                        PERF_EVENT_MISC_USER : PERF_EVENT_MISC_KERNEL;
+                        PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL;
         }
         if (mmcra & MMCRA_SIHV)
-                return PERF_EVENT_MISC_HYPERVISOR;
-        return (mmcra & MMCRA_SIPR) ? PERF_EVENT_MISC_USER :
-                PERF_EVENT_MISC_KERNEL;
+                return PERF_RECORD_MISC_HYPERVISOR;
+        return (mmcra & MMCRA_SIPR) ? PERF_RECORD_MISC_USER :
+                PERF_RECORD_MISC_KERNEL;
 }
 
 /*
@@ -152,9 +152,9 @@ static inline int perf_intr_is_nmi(struct pt_regs *regs)
 
 #endif /* CONFIG_PPC64 */
 
-static void perf_counter_interrupt(struct pt_regs *regs);
+static void perf_event_interrupt(struct pt_regs *regs);
 
-void perf_counter_print_debug(void)
+void perf_event_print_debug(void)
 {
 }
 
@@ -240,15 +240,15 @@ static void write_pmc(int idx, unsigned long val)
  * Check if a set of events can all go on the PMU at once.
  * If they can't, this will look at alternative codes for the events
  * and see if any combination of alternative codes is feasible.
- * The feasible set is returned in event[].
+ * The feasible set is returned in event_id[].
  */
-static int power_check_constraints(struct cpu_hw_counters *cpuhw,
-                                   u64 event[], unsigned int cflags[],
+static int power_check_constraints(struct cpu_hw_events *cpuhw,
+                                   u64 event_id[], unsigned int cflags[],
                                    int n_ev)
 {
         unsigned long mask, value, nv;
-        unsigned long smasks[MAX_HWCOUNTERS], svalues[MAX_HWCOUNTERS];
-        int n_alt[MAX_HWCOUNTERS], choice[MAX_HWCOUNTERS];
+        unsigned long smasks[MAX_HWEVENTS], svalues[MAX_HWEVENTS];
+        int n_alt[MAX_HWEVENTS], choice[MAX_HWEVENTS];
         int i, j;
         unsigned long addf = ppmu->add_fields;
         unsigned long tadd = ppmu->test_adder;
@@ -259,12 +259,12 @@ static int power_check_constraints(struct cpu_hw_counters *cpuhw,
         /* First see if the events will go on as-is */
         for (i = 0; i < n_ev; ++i) {
                 if ((cflags[i] & PPMU_LIMITED_PMC_REQD)
-                    && !ppmu->limited_pmc_event(event[i])) {
-                        ppmu->get_alternatives(event[i], cflags[i],
+                    && !ppmu->limited_pmc_event(event_id[i])) {
+                        ppmu->get_alternatives(event_id[i], cflags[i],
                                                cpuhw->alternatives[i]);
-                        event[i] = cpuhw->alternatives[i][0];
+                        event_id[i] = cpuhw->alternatives[i][0];
                 }
-                if (ppmu->get_constraint(event[i], &cpuhw->amasks[i][0],
+                if (ppmu->get_constraint(event_id[i], &cpuhw->amasks[i][0],
                                          &cpuhw->avalues[i][0]))
                         return -1;
         }
@@ -287,7 +287,7 @@ static int power_check_constraints(struct cpu_hw_counters *cpuhw,
                 return -1;
         for (i = 0; i < n_ev; ++i) {
                 choice[i] = 0;
-                n_alt[i] = ppmu->get_alternatives(event[i], cflags[i],
+                n_alt[i] = ppmu->get_alternatives(event_id[i], cflags[i],
                                                   cpuhw->alternatives[i]);
                 for (j = 1; j < n_alt[i]; ++j)
                         ppmu->get_constraint(cpuhw->alternatives[i][j],
@@ -307,7 +307,7 @@ static int power_check_constraints(struct cpu_hw_counters *cpuhw,
                         j = choice[i];
                 }
                 /*
-                 * See if any alternative k for event i,
+                 * See if any alternative k for event_id i,
                  * where k > j, will satisfy the constraints.
                  */
                 while (++j < n_alt[i]) {
@@ -321,16 +321,16 @@ static int power_check_constraints(struct cpu_hw_counters *cpuhw,
                 if (j >= n_alt[i]) {
                         /*
                          * No feasible alternative, backtrack
-                         * to event i-1 and continue enumerating its
+                         * to event_id i-1 and continue enumerating its
                          * alternatives from where we got up to.
                          */
                         if (--i < 0)
                                 return -1;
                 } else {
                         /*
-                         * Found a feasible alternative for event i,
-                         * remember where we got up to with this event,
-                         * go on to the next event, and start with
+                         * Found a feasible alternative for event_id i,
+                         * remember where we got up to with this event_id,
+                         * go on to the next event_id, and start with
                          * the first alternative for it.
                          */
                         choice[i] = j;
@@ -345,21 +345,21 @@ static int power_check_constraints(struct cpu_hw_counters *cpuhw,
 
         /* OK, we have a feasible combination, tell the caller the solution */
         for (i = 0; i < n_ev; ++i)
-                event[i] = cpuhw->alternatives[i][choice[i]];
+                event_id[i] = cpuhw->alternatives[i][choice[i]];
         return 0;
 }
 
 /*
- * Check if newly-added counters have consistent settings for
+ * Check if newly-added events have consistent settings for
  * exclude_{user,kernel,hv} with each other and any previously
- * added counters.
+ * added events.
  */
-static int check_excludes(struct perf_counter **ctrs, unsigned int cflags[],
+static int check_excludes(struct perf_event **ctrs, unsigned int cflags[],
                           int n_prev, int n_new)
 {
         int eu = 0, ek = 0, eh = 0;
         int i, n, first;
-        struct perf_counter *counter;
+        struct perf_event *event;
 
         n = n_prev + n_new;
         if (n <= 1)
@@ -371,15 +371,15 @@ static int check_excludes(struct perf_counter **ctrs, unsigned int cflags[],
                         cflags[i] &= ~PPMU_LIMITED_PMC_REQD;
                         continue;
                 }
-                counter = ctrs[i];
+                event = ctrs[i];
                 if (first) {
-                        eu = counter->attr.exclude_user;
-                        ek = counter->attr.exclude_kernel;
-                        eh = counter->attr.exclude_hv;
+                        eu = event->attr.exclude_user;
+                        ek = event->attr.exclude_kernel;
+                        eh = event->attr.exclude_hv;
                         first = 0;
-                } else if (counter->attr.exclude_user != eu ||
-                           counter->attr.exclude_kernel != ek ||
-                           counter->attr.exclude_hv != eh) {
+                } else if (event->attr.exclude_user != eu ||
+                           event->attr.exclude_kernel != ek ||
+                           event->attr.exclude_hv != eh) {
                         return -EAGAIN;
                 }
         }
@@ -392,11 +392,11 @@ static int check_excludes(struct perf_counter **ctrs, unsigned int cflags[],
         return 0;
 }
 
-static void power_pmu_read(struct perf_counter *counter)
+static void power_pmu_read(struct perf_event *event)
 {
         s64 val, delta, prev;
 
-        if (!counter->hw.idx)
+        if (!event->hw.idx)
                 return;
         /*
          * Performance monitor interrupts come even when interrupts
@@ -404,21 +404,21 @@ static void power_pmu_read(struct perf_counter *counter)
          * Therefore we treat them like NMIs.
          */
         do {
-                prev = atomic64_read(&counter->hw.prev_count);
+                prev = atomic64_read(&event->hw.prev_count);
                 barrier();
-                val = read_pmc(counter->hw.idx);
-        } while (atomic64_cmpxchg(&counter->hw.prev_count, prev, val) != prev);
+                val = read_pmc(event->hw.idx);
+        } while (atomic64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
 
         /* The counters are only 32 bits wide */
         delta = (val - prev) & 0xfffffffful;
-        atomic64_add(delta, &counter->count);
-        atomic64_sub(delta, &counter->hw.period_left);
+        atomic64_add(delta, &event->count);
+        atomic64_sub(delta, &event->hw.period_left);
 }
 
 /*
  * On some machines, PMC5 and PMC6 can't be written, don't respect
  * the freeze conditions, and don't generate interrupts.  This tells
- * us if `counter' is using such a PMC.
+ * us if `event' is using such a PMC.
  */
 static int is_limited_pmc(int pmcnum)
 {
@@ -426,53 +426,53 @@ static int is_limited_pmc(int pmcnum)
                 && (pmcnum == 5 || pmcnum == 6);
 }
 
-static void freeze_limited_counters(struct cpu_hw_counters *cpuhw,
+static void freeze_limited_counters(struct cpu_hw_events *cpuhw,
                                     unsigned long pmc5, unsigned long pmc6)
 {
-        struct perf_counter *counter;
+        struct perf_event *event;
         u64 val, prev, delta;
         int i;
 
         for (i = 0; i < cpuhw->n_limited; ++i) {
-                counter = cpuhw->limited_counter[i];
-                if (!counter->hw.idx)
+                event = cpuhw->limited_counter[i];
+                if (!event->hw.idx)
                         continue;
-                val = (counter->hw.idx == 5) ? pmc5 : pmc6;
-                prev = atomic64_read(&counter->hw.prev_count);
-                counter->hw.idx = 0;
+                val = (event->hw.idx == 5) ? pmc5 : pmc6;
+                prev = atomic64_read(&event->hw.prev_count);
+                event->hw.idx = 0;
                 delta = (val - prev) & 0xfffffffful;
-                atomic64_add(delta, &counter->count);
+                atomic64_add(delta, &event->count);
         }
 }
 
-static void thaw_limited_counters(struct cpu_hw_counters *cpuhw,
+static void thaw_limited_counters(struct cpu_hw_events *cpuhw,
                                   unsigned long pmc5, unsigned long pmc6)
 {
-        struct perf_counter *counter;
+        struct perf_event *event;
         u64 val;
         int i;
 
         for (i = 0; i < cpuhw->n_limited; ++i) {
-                counter = cpuhw->limited_counter[i];
-                counter->hw.idx = cpuhw->limited_hwidx[i];
-                val = (counter->hw.idx == 5) ? pmc5 : pmc6;
-                atomic64_set(&counter->hw.prev_count, val);
-                perf_counter_update_userpage(counter);
+                event = cpuhw->limited_counter[i];
+                event->hw.idx = cpuhw->limited_hwidx[i];
+                val = (event->hw.idx == 5) ? pmc5 : pmc6;
+                atomic64_set(&event->hw.prev_count, val);
+                perf_event_update_userpage(event);
         }
 }
 
 /*
- * Since limited counters don't respect the freeze conditions, we
+ * Since limited events don't respect the freeze conditions, we
  * have to read them immediately after freezing or unfreezing the
- * other counters.  We try to keep the values from the limited
- * counters as consistent as possible by keeping the delay (in
+ * other events.  We try to keep the values from the limited
+ * events as consistent as possible by keeping the delay (in
  * cycles and instructions) between freezing/unfreezing and reading
- * the limited counters as small and consistent as possible.
- * Therefore, if any limited counters are in use, we read them
+ * the limited events as small and consistent as possible.
+ * Therefore, if any limited events are in use, we read them
  * both, and always in the same order, to minimize variability,
  * and do it inside the same asm that writes MMCR0.
  */
-static void write_mmcr0(struct cpu_hw_counters *cpuhw, unsigned long mmcr0)
+static void write_mmcr0(struct cpu_hw_events *cpuhw, unsigned long mmcr0)
 {
         unsigned long pmc5, pmc6;
 
@@ -485,7 +485,7 @@ static void write_mmcr0(struct cpu_hw_counters *cpuhw, unsigned long mmcr0)
          * Write MMCR0, then read PMC5 and PMC6 immediately.
          * To ensure we don't get a performance monitor interrupt
          * between writing MMCR0 and freezing/thawing the limited
-         * counters, we first write MMCR0 with the counter overflow
+         * events, we first write MMCR0 with the event overflow
          * interrupt enable bits turned off.
          */
         asm volatile("mtspr %3,%2; mfspr %0,%4; mfspr %1,%5"
@@ -500,7 +500,7 @@ static void write_mmcr0(struct cpu_hw_counters *cpuhw, unsigned long mmcr0)
                 thaw_limited_counters(cpuhw, pmc5, pmc6);
 
         /*
-         * Write the full MMCR0 including the counter overflow interrupt
+         * Write the full MMCR0 including the event overflow interrupt
          * enable bits, if necessary.
          */
         if (mmcr0 & (MMCR0_PMC1CE | MMCR0_PMCjCE))
@@ -508,18 +508,18 @@ static void write_mmcr0(struct cpu_hw_counters *cpuhw, unsigned long mmcr0)
 }
 
 /*
- * Disable all counters to prevent PMU interrupts and to allow
- * counters to be added or removed.
+ * Disable all events to prevent PMU interrupts and to allow
+ * events to be added or removed.
  */
 void hw_perf_disable(void)
 {
-        struct cpu_hw_counters *cpuhw;
+        struct cpu_hw_events *cpuhw;
         unsigned long flags;
 
         if (!ppmu)
                 return;
         local_irq_save(flags);
-        cpuhw = &__get_cpu_var(cpu_hw_counters);
+        cpuhw = &__get_cpu_var(cpu_hw_events);
 
         if (!cpuhw->disabled) {
                 cpuhw->disabled = 1;
@@ -545,7 +545,7 @@ void hw_perf_disable(void)
                 /*
                  * Set the 'freeze counters' bit.
                  * The barrier is to make sure the mtspr has been
-                 * executed and the PMU has frozen the counters
+                 * executed and the PMU has frozen the events
                  * before we return.
                  */
                 write_mmcr0(cpuhw, mfspr(SPRN_MMCR0) | MMCR0_FC);
@@ -555,26 +555,26 @@ void hw_perf_disable(void)
 }
 
 /*
- * Re-enable all counters if disable == 0.
- * If we were previously disabled and counters were added, then
+ * Re-enable all events if disable == 0.
+ * If we were previously disabled and events were added, then
  * put the new config on the PMU.
  */
 void hw_perf_enable(void)
 {
-        struct perf_counter *counter;
-        struct cpu_hw_counters *cpuhw;
+        struct perf_event *event;
+        struct cpu_hw_events *cpuhw;
         unsigned long flags;
         long i;
         unsigned long val;
         s64 left;
-        unsigned int hwc_index[MAX_HWCOUNTERS];
+        unsigned int hwc_index[MAX_HWEVENTS];
         int n_lim;
         int idx;
 
         if (!ppmu)
                 return;
         local_irq_save(flags);
-        cpuhw = &__get_cpu_var(cpu_hw_counters);
+        cpuhw = &__get_cpu_var(cpu_hw_events);
         if (!cpuhw->disabled) {
                 local_irq_restore(flags);
                 return;
@@ -582,23 +582,23 @@ void hw_perf_enable(void)
         cpuhw->disabled = 0;
 
         /*
-         * If we didn't change anything, or only removed counters,
+         * If we didn't change anything, or only removed events,
          * no need to recalculate MMCR* settings and reset the PMCs.
          * Just reenable the PMU with the current MMCR* settings
-         * (possibly updated for removal of counters).
+         * (possibly updated for removal of events).
          */
         if (!cpuhw->n_added) {
                 mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
                 mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
-                if (cpuhw->n_counters == 0)
+                if (cpuhw->n_events == 0)
                         ppc_set_pmu_inuse(0);
                 goto out_enable;
         }
 
         /*
-         * Compute MMCR* values for the new set of counters
+         * Compute MMCR* values for the new set of events
          */
-        if (ppmu->compute_mmcr(cpuhw->events, cpuhw->n_counters, hwc_index,
+        if (ppmu->compute_mmcr(cpuhw->events, cpuhw->n_events, hwc_index,
                                cpuhw->mmcr)) {
                 /* shouldn't ever get here */
                 printk(KERN_ERR "oops compute_mmcr failed\n");
@@ -607,22 +607,22 @@ void hw_perf_enable(void)
 
         /*
          * Add in MMCR0 freeze bits corresponding to the
-         * attr.exclude_* bits for the first counter.
-         * We have already checked that all counters have the
-         * same values for these bits as the first counter.
+         * attr.exclude_* bits for the first event.
+         * We have already checked that all events have the
+         * same values for these bits as the first event.
          */
-        counter = cpuhw->counter[0];
-        if (counter->attr.exclude_user)
+        event = cpuhw->event[0];
+        if (event->attr.exclude_user)
                 cpuhw->mmcr[0] |= MMCR0_FCP;
-        if (counter->attr.exclude_kernel)
-                cpuhw->mmcr[0] |= freeze_counters_kernel;
-        if (counter->attr.exclude_hv)
+        if (event->attr.exclude_kernel)
+                cpuhw->mmcr[0] |= freeze_events_kernel;
+        if (event->attr.exclude_hv)
                 cpuhw->mmcr[0] |= MMCR0_FCHV;
 
         /*
          * Write the new configuration to MMCR* with the freeze
-         * bit set and set the hardware counters to their initial values.
-         * Then unfreeze the counters.
+         * bit set and set the hardware events to their initial values.
+         * Then unfreeze the events.
          */
         ppc_set_pmu_inuse(1);
         mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
@@ -631,43 +631,43 @@ void hw_perf_enable(void)
                                 | MMCR0_FC);
 
         /*
-         * Read off any pre-existing counters that need to move
+         * Read off any pre-existing events that need to move
          * to another PMC.
          */
-        for (i = 0; i < cpuhw->n_counters; ++i) {
-                counter = cpuhw->counter[i];
-                if (counter->hw.idx && counter->hw.idx != hwc_index[i] + 1) {
-                        power_pmu_read(counter);
-                        write_pmc(counter->hw.idx, 0);
-                        counter->hw.idx = 0;
+        for (i = 0; i < cpuhw->n_events; ++i) {
+                event = cpuhw->event[i];
+                if (event->hw.idx && event->hw.idx != hwc_index[i] + 1) {
+                        power_pmu_read(event);
+                        write_pmc(event->hw.idx, 0);
+                        event->hw.idx = 0;
                 }
         }
 
         /*
-         * Initialize the PMCs for all the new and moved counters.
+         * Initialize the PMCs for all the new and moved events.
          */
         cpuhw->n_limited = n_lim = 0;
-        for (i = 0; i < cpuhw->n_counters; ++i) {
-                counter = cpuhw->counter[i];
-                if (counter->hw.idx)
+        for (i = 0; i < cpuhw->n_events; ++i) {
+                event = cpuhw->event[i];
+                if (event->hw.idx)
                         continue;
                 idx = hwc_index[i] + 1;
                 if (is_limited_pmc(idx)) {
-                        cpuhw->limited_counter[n_lim] = counter;
+                        cpuhw->limited_counter[n_lim] = event;
                         cpuhw->limited_hwidx[n_lim] = idx;
                         ++n_lim;
                         continue;
                 }
                 val = 0;
-                if (counter->hw.sample_period) {
-                        left = atomic64_read(&counter->hw.period_left);
+                if (event->hw.sample_period) {
+                        left = atomic64_read(&event->hw.period_left);
                         if (left < 0x80000000L)
                                 val = 0x80000000L - left;
                 }
-                atomic64_set(&counter->hw.prev_count, val);
-                counter->hw.idx = idx;
+                atomic64_set(&event->hw.prev_count, val);
+                event->hw.idx = idx;
                 write_pmc(idx, val);
-                perf_counter_update_userpage(counter);
+                perf_event_update_userpage(event);
         }
         cpuhw->n_limited = n_lim;
         cpuhw->mmcr[0] |= MMCR0_PMXE | MMCR0_FCECE;
@@ -688,85 +688,85 @@ void hw_perf_enable(void)
         local_irq_restore(flags);
 }
 
-static int collect_events(struct perf_counter *group, int max_count,
-                          struct perf_counter *ctrs[], u64 *events,
+static int collect_events(struct perf_event *group, int max_count,
+                          struct perf_event *ctrs[], u64 *events,
                           unsigned int *flags)
 {
         int n = 0;
-        struct perf_counter *counter;
+        struct perf_event *event;
 
-        if (!is_software_counter(group)) {
+        if (!is_software_event(group)) {
                 if (n >= max_count)
                         return -1;
                 ctrs[n] = group;
-                flags[n] = group->hw.counter_base;
+                flags[n] = group->hw.event_base;
                 events[n++] = group->hw.config;
         }
-        list_for_each_entry(counter, &group->sibling_list, list_entry) {
-                if (!is_software_counter(counter) &&
-                    counter->state != PERF_COUNTER_STATE_OFF) {
+        list_for_each_entry(event, &group->sibling_list, group_entry) {
+                if (!is_software_event(event) &&
+                    event->state != PERF_EVENT_STATE_OFF) {
                         if (n >= max_count)
                                 return -1;
-                        ctrs[n] = counter;
-                        flags[n] = counter->hw.counter_base;
-                        events[n++] = counter->hw.config;
+                        ctrs[n] = event;
+                        flags[n] = event->hw.event_base;
+                        events[n++] = event->hw.config;
                 }
         }
         return n;
 }
 
-static void counter_sched_in(struct perf_counter *counter, int cpu)
+static void event_sched_in(struct perf_event *event, int cpu)
 {
-        counter->state = PERF_COUNTER_STATE_ACTIVE;
-        counter->oncpu = cpu;
-        counter->tstamp_running += counter->ctx->time - counter->tstamp_stopped;
-        if (is_software_counter(counter))
-                counter->pmu->enable(counter);
+        event->state = PERF_EVENT_STATE_ACTIVE;
+        event->oncpu = cpu;
+        event->tstamp_running += event->ctx->time - event->tstamp_stopped;
+        if (is_software_event(event))
+                event->pmu->enable(event);
 }
 
 /*
- * Called to enable a whole group of counters.
+ * Called to enable a whole group of events.
  * Returns 1 if the group was enabled, or -EAGAIN if it could not be.
  * Assumes the caller has disabled interrupts and has
  * frozen the PMU with hw_perf_save_disable.
  */
-int hw_perf_group_sched_in(struct perf_counter *group_leader,
+int hw_perf_group_sched_in(struct perf_event *group_leader,
                struct perf_cpu_context *cpuctx,
-               struct perf_counter_context *ctx, int cpu)
+               struct perf_event_context *ctx, int cpu)
 {
-        struct cpu_hw_counters *cpuhw;
+        struct cpu_hw_events *cpuhw;
         long i, n, n0;
-        struct perf_counter *sub;
+        struct perf_event *sub;
 
         if (!ppmu)
                 return 0;
-        cpuhw = &__get_cpu_var(cpu_hw_counters);
-        n0 = cpuhw->n_counters;
+        cpuhw = &__get_cpu_var(cpu_hw_events);
+        n0 = cpuhw->n_events;
         n = collect_events(group_leader, ppmu->n_counter - n0,
-                           &cpuhw->counter[n0], &cpuhw->events[n0],
+                           &cpuhw->event[n0], &cpuhw->events[n0],
                            &cpuhw->flags[n0]);
         if (n < 0)
                 return -EAGAIN;
-        if (check_excludes(cpuhw->counter, cpuhw->flags, n0, n))
+        if (check_excludes(cpuhw->event, cpuhw->flags, n0, n))
                 return -EAGAIN;
         i = power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n + n0);
         if (i < 0)
                 return -EAGAIN;
-        cpuhw->n_counters = n0 + n;
+        cpuhw->n_events = n0 + n;
         cpuhw->n_added += n;
 
         /*
-         * OK, this group can go on; update counter states etc.,
-         * and enable any software counters
+         * OK, this group can go on; update event states etc.,
+         * and enable any software events
          */
         for (i = n0; i < n0 + n; ++i)
-                cpuhw->counter[i]->hw.config = cpuhw->events[i];
+                cpuhw->event[i]->hw.config = cpuhw->events[i];
         cpuctx->active_oncpu += n;
         n = 1;
-        counter_sched_in(group_leader, cpu);
-        list_for_each_entry(sub, &group_leader->sibling_list, list_entry) {
-                if (sub->state != PERF_COUNTER_STATE_OFF) {
-                        counter_sched_in(sub, cpu);
+        event_sched_in(group_leader, cpu);
+        list_for_each_entry(sub, &group_leader->sibling_list, group_entry) {
+                if (sub->state != PERF_EVENT_STATE_OFF) {
+                        event_sched_in(sub, cpu);
                         ++n;
                 }
         }
@@ -776,14 +776,14 @@ int hw_perf_group_sched_in(struct perf_counter *group_leader,
 }
 
 /*
- * Add a counter to the PMU.
- * If all counters are not already frozen, then we disable and
+ * Add a event to the PMU.
+ * If all events are not already frozen, then we disable and
  * re-enable the PMU in order to get hw_perf_enable to do the
  * actual work of reconfiguring the PMU.
  */
-static int power_pmu_enable(struct perf_counter *counter)
+static int power_pmu_enable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuhw;
+        struct cpu_hw_events *cpuhw;
         unsigned long flags;
         int n0;
         int ret = -EAGAIN;
@@ -792,23 +792,23 @@ static int power_pmu_enable(struct perf_counter *counter)
         perf_disable();
 
         /*
-         * Add the counter to the list (if there is room)
+         * Add the event to the list (if there is room)
          * and check whether the total set is still feasible.
          */
-        cpuhw = &__get_cpu_var(cpu_hw_counters);
-        n0 = cpuhw->n_counters;
+        cpuhw = &__get_cpu_var(cpu_hw_events);
+        n0 = cpuhw->n_events;
         if (n0 >= ppmu->n_counter)
                 goto out;
-        cpuhw->counter[n0] = counter;
-        cpuhw->events[n0] = counter->hw.config;
-        cpuhw->flags[n0] = counter->hw.counter_base;
-        if (check_excludes(cpuhw->counter, cpuhw->flags, n0, 1))
+        cpuhw->event[n0] = event;
+        cpuhw->events[n0] = event->hw.config;
+        cpuhw->flags[n0] = event->hw.event_base;
+        if (check_excludes(cpuhw->event, cpuhw->flags, n0, 1))
                 goto out;
         if (power_check_constraints(cpuhw, cpuhw->events, cpuhw->flags, n0 + 1))
                 goto out;
 
-        counter->hw.config = cpuhw->events[n0];
-        ++cpuhw->n_counters;
+        event->hw.config = cpuhw->events[n0];
+        ++cpuhw->n_events;
         ++cpuhw->n_added;
 
         ret = 0;
@@ -819,36 +819,36 @@ static int power_pmu_enable(struct perf_counter *counter)
 }
 
 /*
- * Remove a counter from the PMU.
+ * Remove a event from the PMU.
  */
-static void power_pmu_disable(struct perf_counter *counter)
+static void power_pmu_disable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuhw;
+        struct cpu_hw_events *cpuhw;
         long i;
         unsigned long flags;
 
         local_irq_save(flags);
         perf_disable();
 
-        power_pmu_read(counter);
-
-        cpuhw = &__get_cpu_var(cpu_hw_counters);
-        for (i = 0; i < cpuhw->n_counters; ++i) {
-                if (counter == cpuhw->counter[i]) {
-                        while (++i < cpuhw->n_counters)
-                                cpuhw->counter[i-1] = cpuhw->counter[i];
-                        --cpuhw->n_counters;
-                        ppmu->disable_pmc(counter->hw.idx - 1, cpuhw->mmcr);
-                        if (counter->hw.idx) {
-                                write_pmc(counter->hw.idx, 0);
-                                counter->hw.idx = 0;
+        power_pmu_read(event);
+
+        cpuhw = &__get_cpu_var(cpu_hw_events);
+        for (i = 0; i < cpuhw->n_events; ++i) {
+                if (event == cpuhw->event[i]) {
+                        while (++i < cpuhw->n_events)
+                                cpuhw->event[i-1] = cpuhw->event[i];
+                        --cpuhw->n_events;
+                        ppmu->disable_pmc(event->hw.idx - 1, cpuhw->mmcr);
+                        if (event->hw.idx) {
+                                write_pmc(event->hw.idx, 0);
+                                event->hw.idx = 0;
                         }
-                        perf_counter_update_userpage(counter);
+                        perf_event_update_userpage(event);
                         break;
                 }
         }
         for (i = 0; i < cpuhw->n_limited; ++i)
-                if (counter == cpuhw->limited_counter[i])
+                if (event == cpuhw->limited_counter[i])
                         break;
         if (i < cpuhw->n_limited) {
                 while (++i < cpuhw->n_limited) {
@@ -857,8 +857,8 @@ static void power_pmu_disable(struct perf_counter *counter)
                 }
                 --cpuhw->n_limited;
         }
-        if (cpuhw->n_counters == 0) {
-                /* disable exceptions if no counters are running */
+        if (cpuhw->n_events == 0) {
+                /* disable exceptions if no events are running */
                 cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE);
         }
 
@@ -867,28 +867,28 @@ static void power_pmu_disable(struct perf_counter *counter)
 }
 
 /*
- * Re-enable interrupts on a counter after they were throttled
+ * Re-enable interrupts on a event after they were throttled
  * because they were coming too fast.
  */
-static void power_pmu_unthrottle(struct perf_counter *counter)
+static void power_pmu_unthrottle(struct perf_event *event)
 {
         s64 val, left;
         unsigned long flags;
 
-        if (!counter->hw.idx || !counter->hw.sample_period)
+        if (!event->hw.idx || !event->hw.sample_period)
                 return;
         local_irq_save(flags);
         perf_disable();
-        power_pmu_read(counter);
-        left = counter->hw.sample_period;
-        counter->hw.last_period = left;
+        power_pmu_read(event);
+        left = event->hw.sample_period;
+        event->hw.last_period = left;
         val = 0;
         if (left < 0x80000000L)
                 val = 0x80000000L - left;
-        write_pmc(counter->hw.idx, val);
-        atomic64_set(&counter->hw.prev_count, val);
-        atomic64_set(&counter->hw.period_left, left);
-        perf_counter_update_userpage(counter);
+        write_pmc(event->hw.idx, val);
+        atomic64_set(&event->hw.prev_count, val);
+        atomic64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
         perf_enable();
         local_irq_restore(flags);
 }
@@ -901,29 +901,29 @@ struct pmu power_pmu = {
 };
 
 /*
- * Return 1 if we might be able to put counter on a limited PMC,
+ * Return 1 if we might be able to put event on a limited PMC,
  * or 0 if not.
- * A counter can only go on a limited PMC if it counts something
+ * A event can only go on a limited PMC if it counts something
  * that a limited PMC can count, doesn't require interrupts, and
  * doesn't exclude any processor mode.
  */
-static int can_go_on_limited_pmc(struct perf_counter *counter, u64 ev,
+static int can_go_on_limited_pmc(struct perf_event *event, u64 ev,
                                  unsigned int flags)
 {
         int n;
         u64 alt[MAX_EVENT_ALTERNATIVES];
 
-        if (counter->attr.exclude_user
-            || counter->attr.exclude_kernel
-            || counter->attr.exclude_hv
-            || counter->attr.sample_period)
+        if (event->attr.exclude_user
+            || event->attr.exclude_kernel
+            || event->attr.exclude_hv
+            || event->attr.sample_period)
                 return 0;
 
         if (ppmu->limited_pmc_event(ev))
                 return 1;
 
         /*
-         * The requested event isn't on a limited PMC already;
+         * The requested event_id isn't on a limited PMC already;
          * see if any alternative code goes on a limited PMC.
          */
         if (!ppmu->get_alternatives)
@@ -936,9 +936,9 @@ static int can_go_on_limited_pmc(struct perf_counter *counter, u64 ev,
 }
 
 /*
- * Find an alternative event that goes on a normal PMC, if possible,
- * and return the event code, or 0 if there is no such alternative.
- * (Note: event code 0 is "don't count" on all machines.)
+ * Find an alternative event_id that goes on a normal PMC, if possible,
+ * and return the event_id code, or 0 if there is no such alternative.
+ * (Note: event_id code 0 is "don't count" on all machines.)
  */
 static u64 normal_pmc_alternative(u64 ev, unsigned long flags)
 {
@@ -952,26 +952,26 @@ static u64 normal_pmc_alternative(u64 ev, unsigned long flags)
         return alt[0];
 }
 
-/* Number of perf_counters counting hardware events */
-static atomic_t num_counters;
+/* Number of perf_events counting hardware events */
+static atomic_t num_events;
 /* Used to avoid races in calling reserve/release_pmc_hardware */
 static DEFINE_MUTEX(pmc_reserve_mutex);
 
 /*
- * Release the PMU if this is the last perf_counter.
+ * Release the PMU if this is the last perf_event.
  */
-static void hw_perf_counter_destroy(struct perf_counter *counter)
+static void hw_perf_event_destroy(struct perf_event *event)
 {
-        if (!atomic_add_unless(&num_counters, -1, 1)) {
+        if (!atomic_add_unless(&num_events, -1, 1)) {
                 mutex_lock(&pmc_reserve_mutex);
-                if (atomic_dec_return(&num_counters) == 0)
+                if (atomic_dec_return(&num_events) == 0)
                         release_pmc_hardware();
                 mutex_unlock(&pmc_reserve_mutex);
         }
 }
 
 /*
- * Translate a generic cache event config to a raw event code.
+ * Translate a generic cache event_id config to a raw event_id code.
  */
 static int hw_perf_cache_event(u64 config, u64 *eventp)
 {
@@ -1000,39 +1000,39 @@ static int hw_perf_cache_event(u64 config, u64 *eventp)
         return 0;
 }
 
-const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
+const struct pmu *hw_perf_event_init(struct perf_event *event)
 {
         u64 ev;
         unsigned long flags;
-        struct perf_counter *ctrs[MAX_HWCOUNTERS];
-        u64 events[MAX_HWCOUNTERS];
-        unsigned int cflags[MAX_HWCOUNTERS];
+        struct perf_event *ctrs[MAX_HWEVENTS];
+        u64 events[MAX_HWEVENTS];
+        unsigned int cflags[MAX_HWEVENTS];
         int n;
         int err;
-        struct cpu_hw_counters *cpuhw;
+        struct cpu_hw_events *cpuhw;
 
         if (!ppmu)
                 return ERR_PTR(-ENXIO);
-        switch (counter->attr.type) {
+        switch (event->attr.type) {
         case PERF_TYPE_HARDWARE:
-                ev = counter->attr.config;
+                ev = event->attr.config;
                 if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
                         return ERR_PTR(-EOPNOTSUPP);
                 ev = ppmu->generic_events[ev];
                 break;
         case PERF_TYPE_HW_CACHE:
-                err = hw_perf_cache_event(counter->attr.config, &ev);
+                err = hw_perf_cache_event(event->attr.config, &ev);
                 if (err)
                         return ERR_PTR(err);
                 break;
         case PERF_TYPE_RAW:
-                ev = counter->attr.config;
+                ev = event->attr.config;
                 break;
         default:
                 return ERR_PTR(-EINVAL);
         }
-        counter->hw.config_base = ev;
-        counter->hw.idx = 0;
+        event->hw.config_base = ev;
+        event->hw.idx = 0;
 
         /*
          * If we are not running on a hypervisor, force the
@@ -1040,28 +1040,28 @@ const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
          * the user set it to.
          */
         if (!firmware_has_feature(FW_FEATURE_LPAR))
-                counter->attr.exclude_hv = 0;
+                event->attr.exclude_hv = 0;
 
         /*
-         * If this is a per-task counter, then we can use
+         * If this is a per-task event, then we can use
          * PM_RUN_* events interchangeably with their non RUN_*
          * equivalents, e.g. PM_RUN_CYC instead of PM_CYC.
          * XXX we should check if the task is an idle task.
          */
         flags = 0;
-        if (counter->ctx->task)
+        if (event->ctx->task)
                 flags |= PPMU_ONLY_COUNT_RUN;
 
         /*
-         * If this machine has limited counters, check whether this
-         * event could go on a limited counter.
+         * If this machine has limited events, check whether this
+         * event_id could go on a limited event.
          */
         if (ppmu->flags & PPMU_LIMITED_PMC5_6) {
-                if (can_go_on_limited_pmc(counter, ev, flags)) {
+                if (can_go_on_limited_pmc(event, ev, flags)) {
                         flags |= PPMU_LIMITED_PMC_OK;
                 } else if (ppmu->limited_pmc_event(ev)) {
                         /*
-                         * The requested event is on a limited PMC,
+                         * The requested event_id is on a limited PMC,
                          * but we can't use a limited PMC; see if any
                          * alternative goes on a normal PMC.
                          */
@@ -1073,50 +1073,50 @@ const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
 
         /*
          * If this is in a group, check if it can go on with all the
-         * other hardware counters in the group.  We assume the counter
+         * other hardware events in the group.  We assume the event
          * hasn't been linked into its leader's sibling list at this point.
          */
         n = 0;
-        if (counter->group_leader != counter) {
-                n = collect_events(counter->group_leader, ppmu->n_counter - 1,
+        if (event->group_leader != event) {
+                n = collect_events(event->group_leader, ppmu->n_counter - 1,
                                    ctrs, events, cflags);
                 if (n < 0)
                         return ERR_PTR(-EINVAL);
         }
         events[n] = ev;
-        ctrs[n] = counter;
+        ctrs[n] = event;
         cflags[n] = flags;
         if (check_excludes(ctrs, cflags, n, 1))
                 return ERR_PTR(-EINVAL);
 
-        cpuhw = &get_cpu_var(cpu_hw_counters);
+        cpuhw = &get_cpu_var(cpu_hw_events);
         err = power_check_constraints(cpuhw, events, cflags, n + 1);
-        put_cpu_var(cpu_hw_counters);
+        put_cpu_var(cpu_hw_events);
         if (err)
                 return ERR_PTR(-EINVAL);
 
-        counter->hw.config = events[n];
-        counter->hw.counter_base = cflags[n];
-        counter->hw.last_period = counter->hw.sample_period;
-        atomic64_set(&counter->hw.period_left, counter->hw.last_period);
+        event->hw.config = events[n];
+        event->hw.event_base = cflags[n];
+        event->hw.last_period = event->hw.sample_period;
+        atomic64_set(&event->hw.period_left, event->hw.last_period);
 
         /*
          * See if we need to reserve the PMU.
-         * If no counters are currently in use, then we have to take a
+         * If no events are currently in use, then we have to take a
          * mutex to ensure that we don't race with another task doing
          * reserve_pmc_hardware or release_pmc_hardware.
          */
         err = 0;
-        if (!atomic_inc_not_zero(&num_counters)) {
+        if (!atomic_inc_not_zero(&num_events)) {
                 mutex_lock(&pmc_reserve_mutex);
-                if (atomic_read(&num_counters) == 0 &&
-                    reserve_pmc_hardware(perf_counter_interrupt))
+                if (atomic_read(&num_events) == 0 &&
+                    reserve_pmc_hardware(perf_event_interrupt))
                         err = -EBUSY;
                 else
-                        atomic_inc(&num_counters);
+                        atomic_inc(&num_events);
                 mutex_unlock(&pmc_reserve_mutex);
         }
-        counter->destroy = hw_perf_counter_destroy;
+        event->destroy = hw_perf_event_destroy;
 
         if (err)
                 return ERR_PTR(err);
@@ -1128,24 +1128,24 @@ const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
  * things if requested.  Note that interrupts are hard-disabled
  * here so there is no possibility of being interrupted.
  */
-static void record_and_restart(struct perf_counter *counter, unsigned long val,
+static void record_and_restart(struct perf_event *event, unsigned long val,
                                struct pt_regs *regs, int nmi)
 {
-        u64 period = counter->hw.sample_period;
+        u64 period = event->hw.sample_period;
         s64 prev, delta, left;
         int record = 0;
 
         /* we don't have to worry about interrupts here */
-        prev = atomic64_read(&counter->hw.prev_count);
+        prev = atomic64_read(&event->hw.prev_count);
         delta = (val - prev) & 0xfffffffful;
-        atomic64_add(delta, &counter->count);
+        atomic64_add(delta, &event->count);
 
         /*
-         * See if the total period for this counter has expired,
+         * See if the total period for this event has expired,
          * and update for the next period.
          */
         val = 0;
-        left = atomic64_read(&counter->hw.period_left) - delta;
+        left = atomic64_read(&event->hw.period_left) - delta;
         if (period) {
                 if (left <= 0) {
                         left += period;
@@ -1162,20 +1162,19 @@ static void record_and_restart(struct perf_counter *counter, unsigned long val,
          */
         if (record) {
                 struct perf_sample_data data = {
-                        .regs   = regs,
                         .addr   = 0,
-                        .period = counter->hw.last_period,
+                        .period = event->hw.last_period,
                 };
 
-                if (counter->attr.sample_type & PERF_SAMPLE_ADDR)
+                if (event->attr.sample_type & PERF_SAMPLE_ADDR)
                         perf_get_data_addr(regs, &data.addr);
 
-                if (perf_counter_overflow(counter, nmi, &data)) {
+                if (perf_event_overflow(event, nmi, &data, regs)) {
                         /*
                          * Interrupts are coming too fast - throttle them
-                         * by setting the counter to 0, so it will be
+                         * by setting the event to 0, so it will be
                          * at least 2^30 cycles until the next interrupt
-                         * (assuming each counter counts at most 2 counts
+                         * (assuming each event counts at most 2 counts
                          * per cycle).
                          */
                         val = 0;
@@ -1183,15 +1182,15 @@ static void record_and_restart(struct perf_counter *counter, unsigned long val,
                 }
         }
 
-        write_pmc(counter->hw.idx, val);
-        atomic64_set(&counter->hw.prev_count, val);
-        atomic64_set(&counter->hw.period_left, left);
-        perf_counter_update_userpage(counter);
+        write_pmc(event->hw.idx, val);
+        atomic64_set(&event->hw.prev_count, val);
+        atomic64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
 }
 
 /*
  * Called from generic code to get the misc flags (i.e. processor mode)
- * for an event.
+ * for an event_id.
  */
 unsigned long perf_misc_flags(struct pt_regs *regs)
 {
@@ -1199,13 +1198,13 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
 
         if (flags)
                 return flags;
-        return user_mode(regs) ? PERF_EVENT_MISC_USER :
-                PERF_EVENT_MISC_KERNEL;
+        return user_mode(regs) ? PERF_RECORD_MISC_USER :
+                PERF_RECORD_MISC_KERNEL;
 }
 
 /*
  * Called from generic code to get the instruction pointer
- * for an event.
+ * for an event_id.
  */
 unsigned long perf_instruction_pointer(struct pt_regs *regs)
 {
@@ -1221,11 +1220,11 @@ unsigned long perf_instruction_pointer(struct pt_regs *regs)
 /*
  * Performance monitor interrupt stuff
  */
-static void perf_counter_interrupt(struct pt_regs *regs)
+static void perf_event_interrupt(struct pt_regs *regs)
 {
         int i;
-        struct cpu_hw_counters *cpuhw = &__get_cpu_var(cpu_hw_counters);
-        struct perf_counter *counter;
+        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+        struct perf_event *event;
         unsigned long val;
         int found = 0;
         int nmi;
@@ -1242,21 +1241,21 @@ static void perf_counter_interrupt(struct pt_regs *regs)
         else
                 irq_enter();
 
-        for (i = 0; i < cpuhw->n_counters; ++i) {
-                counter = cpuhw->counter[i];
-                if (!counter->hw.idx || is_limited_pmc(counter->hw.idx))
+        for (i = 0; i < cpuhw->n_events; ++i) {
+                event = cpuhw->event[i];
+                if (!event->hw.idx || is_limited_pmc(event->hw.idx))
                         continue;
-                val = read_pmc(counter->hw.idx);
+                val = read_pmc(event->hw.idx);
                 if ((int)val < 0) {
-                        /* counter has overflowed */
+                        /* event has overflowed */
                         found = 1;
-                        record_and_restart(counter, val, regs, nmi);
+                        record_and_restart(event, val, regs, nmi);
                 }
         }
 
         /*
-         * In case we didn't find and reset the counter that caused
-         * the interrupt, scan all counters and reset any that are
+         * In case we didn't find and reset the event that caused
+         * the interrupt, scan all events and reset any that are
          * negative, to avoid getting continual interrupts.
          * Any that we processed in the previous loop will not be negative.
          */
@@ -1274,7 +1273,7 @@ static void perf_counter_interrupt(struct pt_regs *regs)
          * Reset MMCR0 to its normal value.  This will set PMXE and
          * clear FC (freeze counters) and PMAO (perf mon alert occurred)
          * and thus allow interrupts to occur again.
-         * XXX might want to use MSR.PM to keep the counters frozen until
+         * XXX might want to use MSR.PM to keep the events frozen until
          * we get back out of this interrupt.
          */
         write_mmcr0(cpuhw, cpuhw->mmcr[0]);
@@ -1285,9 +1284,9 @@ static void perf_counter_interrupt(struct pt_regs *regs)
                 irq_exit();
 }
 
-void hw_perf_counter_setup(int cpu)
+void hw_perf_event_setup(int cpu)
 {
-        struct cpu_hw_counters *cpuhw = &per_cpu(cpu_hw_counters, cpu);
+        struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);
 
         if (!ppmu)
                 return;
@@ -1309,7 +1308,7 @@ int register_power_pmu(struct power_pmu *pmu)
          * Use FCHV to ignore kernel events if MSR.HV is set.
          */
         if (mfmsr() & MSR_HV)
-                freeze_counters_kernel = MMCR0_FCHV;
+                freeze_events_kernel = MMCR0_FCHV;
 #endif /* CONFIG_PPC64 */
 
         return 0;
diff --git a/arch/powerpc/kernel/power4-pmu.c b/arch/powerpc/kernel/power4-pmu.c
index 3c90a3d9173e..2a361cdda635 100644
--- a/arch/powerpc/kernel/power4-pmu.c
+++ b/arch/powerpc/kernel/power4-pmu.c
@@ -9,7 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include <linux/kernel.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/string.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
diff --git a/arch/powerpc/kernel/power5+-pmu.c b/arch/powerpc/kernel/power5+-pmu.c
index 31918af3e355..0f4c1c73a6ad 100644
--- a/arch/powerpc/kernel/power5+-pmu.c
+++ b/arch/powerpc/kernel/power5+-pmu.c
@@ -9,7 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include <linux/kernel.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/string.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
diff --git a/arch/powerpc/kernel/power5-pmu.c b/arch/powerpc/kernel/power5-pmu.c
index 867f6f663963..c351b3a57fbb 100644
--- a/arch/powerpc/kernel/power5-pmu.c
+++ b/arch/powerpc/kernel/power5-pmu.c
@@ -9,7 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include <linux/kernel.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/string.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
diff --git a/arch/powerpc/kernel/power6-pmu.c b/arch/powerpc/kernel/power6-pmu.c
index fa21890531da..ca399ba5034c 100644
--- a/arch/powerpc/kernel/power6-pmu.c
+++ b/arch/powerpc/kernel/power6-pmu.c
@@ -9,7 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include <linux/kernel.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/string.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
diff --git a/arch/powerpc/kernel/power7-pmu.c b/arch/powerpc/kernel/power7-pmu.c
index 018d094d92f9..28a4daacdc02 100644
--- a/arch/powerpc/kernel/power7-pmu.c
+++ b/arch/powerpc/kernel/power7-pmu.c
@@ -9,7 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include <linux/kernel.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/string.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
diff --git a/arch/powerpc/kernel/ppc970-pmu.c b/arch/powerpc/kernel/ppc970-pmu.c
index 75dccb71a043..479574413a93 100644
--- a/arch/powerpc/kernel/ppc970-pmu.c
+++ b/arch/powerpc/kernel/ppc970-pmu.c
@@ -9,7 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include <linux/string.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <asm/reg.h>
 #include <asm/cputable.h>
 
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 0a3216433051..1168c5f440ab 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1165,7 +1165,22 @@ static inline unsigned long brk_rnd(void)
 
 unsigned long arch_randomize_brk(struct mm_struct *mm)
 {
-        unsigned long ret = PAGE_ALIGN(mm->brk + brk_rnd());
+        unsigned long base = mm->brk;
+        unsigned long ret;
+
+#ifdef CONFIG_PPC64
+        /*
+         * If we are using 1TB segments and we are allowed to randomise
+         * the heap, we can put it above 1TB so it is backed by a 1TB
+         * segment. Otherwise the heap will be in the bottom 1TB
+         * which always uses 256MB segments and this may result in a
+         * performance penalty.
+         */
+        if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
+                base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
+#endif
+
+        ret = PAGE_ALIGN(base + brk_rnd());
 
         if (ret < mm->brk)
                 return mm->brk;
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 864334b337a3..bafac2e41ae1 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -800,7 +800,7 @@ static void __init prom_send_capabilities(void)
         root = call_prom("open", 1, 1, ADDR("/"));
         if (root != 0) {
                 /* try calling the ibm,client-architecture-support method */
-                prom_printf("Calling ibm,client-architecture...");
+                prom_printf("Calling ibm,client-architecture-support...");
                 if (call_prom_ret("call-method", 3, 2, &ret,
                                   ADDR("ibm,client-architecture-support"),
                                   root,
@@ -814,6 +814,7 @@ static void __init prom_send_capabilities(void)
                         return;
                 }
                 call_prom("close", 1, 0, root);
+                prom_printf(" not implemented\n");
         }
 
         /* no ibm,client-architecture-support call, try the old way */
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 02fed27af7f6..4271f7a655a3 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -24,7 +24,6 @@
 #include <linux/seq_file.h>
 #include <linux/ioport.h>
 #include <linux/console.h>
-#include <linux/utsname.h>
 #include <linux/screen_info.h>
 #include <linux/root_dev.h>
 #include <linux/notifier.h>
@@ -328,7 +327,7 @@ static void c_stop(struct seq_file *m, void *v)
 {
 }
 
-struct seq_operations cpuinfo_op = {
+const struct seq_operations cpuinfo_op = {
         .start =c_start,
         .next = c_next,
         .stop = c_stop,
@@ -432,9 +431,9 @@ void __init smp_setup_cpu_maps(void)
                 for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
                         DBG("    thread %d -> cpu %d (hard id %d)\n",
                             j, cpu, intserv[j]);
-                        cpu_set(cpu, cpu_present_map);
+                        set_cpu_present(cpu, true);
                         set_hard_smp_processor_id(cpu, intserv[j]);
-                        cpu_set(cpu, cpu_possible_map);
+                        set_cpu_possible(cpu, true);
                         cpu++;
                 }
         }
@@ -480,7 +479,7 @@ void __init smp_setup_cpu_maps(void)
                                maxcpus);
 
                 for (cpu = 0; cpu < maxcpus; cpu++)
-                        cpu_set(cpu, cpu_possible_map);
+                        set_cpu_possible(cpu, true);
         out:
                 of_node_put(dn);
         }
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index d387b3937ccc..9b86a74d2815 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -189,11 +189,11 @@ void arch_send_call_function_single_ipi(int cpu)
         smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE);
 }
 
-void arch_send_call_function_ipi(cpumask_t mask)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         unsigned int cpu;
 
-        for_each_cpu_mask(cpu, mask)
+        for_each_cpu(cpu, mask)
                 smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION);
 }
 
@@ -287,7 +287,7 @@ void __devinit smp_prepare_boot_cpu(void)
 {
         BUG_ON(smp_processor_id() != boot_cpuid);
 
-        cpu_set(boot_cpuid, cpu_online_map);
+        set_cpu_online(boot_cpuid, true);
         cpu_set(boot_cpuid, per_cpu(cpu_sibling_map, boot_cpuid));
         cpu_set(boot_cpuid, per_cpu(cpu_core_map, boot_cpuid));
 #ifdef CONFIG_PPC64
@@ -307,7 +307,7 @@ int generic_cpu_disable(void)
         if (cpu == boot_cpuid)
                 return -EBUSY;
 
-        cpu_clear(cpu, cpu_online_map);
+        set_cpu_online(cpu, false);
 #ifdef CONFIG_PPC64
         vdso_data->processorCount--;
         fixup_irqs(cpu_online_map);
@@ -361,7 +361,7 @@ void generic_mach_cpu_die(void)
         smp_wmb();
         while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE)
                 cpu_relax();
-        cpu_set(cpu, cpu_online_map);
+        set_cpu_online(cpu, true);
         local_irq_enable();
 }
 #endif
@@ -508,7 +508,7 @@ int __devinit start_secondary(void *unused)
 
         ipi_call_lock();
         notify_cpu_starting(cpu);
-        cpu_set(cpu, cpu_online_map);
+        set_cpu_online(cpu, true);
         /* Update sibling maps */
         base = cpu_first_thread_in_core(cpu);
         for (i = 0; i < threads_per_core; i++) {
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index 1cc5e9e5da96..b97c2d67f4ac 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -22,7 +22,6 @@
 #include <linux/signal.h>
 #include <linux/resource.h>
 #include <linux/times.h>
-#include <linux/utsname.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
 #include <linux/sem.h>
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index a180b4f9a4f6..92dc844299b6 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -53,7 +53,7 @@
 #include <linux/posix-timers.h>
 #include <linux/irq.h>
 #include <linux/delay.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 
 #include <asm/io.h>
 #include <asm/processor.h>
@@ -193,6 +193,8 @@ EXPORT_SYMBOL(__cputime_clockt_factor);
 DEFINE_PER_CPU(unsigned long, cputime_last_delta);
 DEFINE_PER_CPU(unsigned long, cputime_scaled_last_delta);
 
+cputime_t cputime_one_jiffy;
+
 static void calc_cputime_factors(void)
 {
         struct div_result res;
@@ -501,6 +503,7 @@ static int __init iSeries_tb_recal(void)
                                 tb_to_xs = divres.result_low;
                                 vdso_data->tb_ticks_per_sec = tb_ticks_per_sec;
                                 vdso_data->tb_to_xs = tb_to_xs;
+                                setup_cputime_one_jiffy();
                         }
                         else {
                                 printk( "Titan recalibrate: FAILED (difference > 4 percent)\n"
@@ -527,25 +530,25 @@ void __init iSeries_time_init_early(void)
 }
 #endif /* CONFIG_PPC_ISERIES */
 
-#if defined(CONFIG_PERF_COUNTERS) && defined(CONFIG_PPC32)
-DEFINE_PER_CPU(u8, perf_counter_pending);
+#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_PPC32)
+DEFINE_PER_CPU(u8, perf_event_pending);
 
-void set_perf_counter_pending(void)
+void set_perf_event_pending(void)
 {
-        get_cpu_var(perf_counter_pending) = 1;
+        get_cpu_var(perf_event_pending) = 1;
         set_dec(1);
-        put_cpu_var(perf_counter_pending);
+        put_cpu_var(perf_event_pending);
 }
 
-#define test_perf_counter_pending()     __get_cpu_var(perf_counter_pending)
-#define clear_perf_counter_pending()    __get_cpu_var(perf_counter_pending) = 0
+#define test_perf_event_pending()       __get_cpu_var(perf_event_pending)
+#define clear_perf_event_pending()      __get_cpu_var(perf_event_pending) = 0
 
-#else  /* CONFIG_PERF_COUNTERS && CONFIG_PPC32 */
+#else  /* CONFIG_PERF_EVENTS && CONFIG_PPC32 */
 
-#define test_perf_counter_pending()     0
-#define clear_perf_counter_pending()
+#define test_perf_event_pending()       0
+#define clear_perf_event_pending()
 
-#endif /* CONFIG_PERF_COUNTERS && CONFIG_PPC32 */
+#endif /* CONFIG_PERF_EVENTS && CONFIG_PPC32 */
 
 /*
  * For iSeries shared processors, we have to let the hypervisor
@@ -573,9 +576,9 @@ void timer_interrupt(struct pt_regs * regs)
         set_dec(DECREMENTER_MAX);
 
 #ifdef CONFIG_PPC32
-        if (test_perf_counter_pending()) {
-                clear_perf_counter_pending();
-                perf_counter_do_pending();
+        if (test_perf_event_pending()) {
+                clear_perf_event_pending();
+                perf_event_do_pending();
         }
         if (atomic_read(&ppc_n_lost_interrupts) != 0)
                 do_IRQ(regs);
@@ -774,11 +777,12 @@ int update_persistent_clock(struct timespec now)
         return ppc_md.set_rtc_time(&tm);
 }
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
         struct rtc_time tm;
         static int first = 1;
 
+        ts->tv_nsec = 0;
         /* XXX this is a litle fragile but will work okay in the short term */
         if (first) {
                 first = 0;
@@ -786,14 +790,18 @@ unsigned long read_persistent_clock(void)
                         timezone_offset = ppc_md.time_init();
 
                 /* get_boot_time() isn't guaranteed to be safe to call late */
-                if (ppc_md.get_boot_time)
-                        return ppc_md.get_boot_time() -timezone_offset;
+                if (ppc_md.get_boot_time) {
+                        ts->tv_sec = ppc_md.get_boot_time() - timezone_offset;
+                        return;
+                }
+        }
+        if (!ppc_md.get_rtc_time) {
+                ts->tv_sec = 0;
+                return;
         }
-        if (!ppc_md.get_rtc_time)
-                return 0;
         ppc_md.get_rtc_time(&tm);
-        return mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
-                      tm.tm_hour, tm.tm_min, tm.tm_sec);
+        ts->tv_sec = mktime(tm.tm_year+1900, tm.tm_mon+1, tm.tm_mday,
+                            tm.tm_hour, tm.tm_min, tm.tm_sec);
 }
 
 /* clocksource code */
@@ -955,6 +963,7 @@ void __init time_init(void)
         tb_ticks_per_usec = ppc_tb_freq / 1000000;
         tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000);
         calc_cputime_factors();
+        setup_cputime_one_jiffy();
 
         /*
          * Calculate the length of each tick in ns.  It will not be
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index acb74a17bbbf..b4b167b33643 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -1,5 +1,5 @@
 /*
- * udbg for for NS16550 compatable serial ports
+ * udbg for NS16550 compatable serial ports
  *
  * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
  *
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index a0abce251d0a..94e2df3cae07 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -1,3 +1,4 @@
+
 /*
  *    Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.
  *                       <benh@kernel.crashing.org>
@@ -74,7 +75,7 @@ static int vdso_ready;
 static union {
         struct vdso_data        data;
         u8                      page[PAGE_SIZE];
-} vdso_data_store __attribute__((__section__(".data.page_aligned")));
+} vdso_data_store __page_aligned_data;
 struct vdso_data *vdso_data = &vdso_data_store.data;
 
 /* Format of the patch table */
@@ -240,6 +241,13 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
         }
 
         /*
+         * Put vDSO base into mm struct. We need to do this before calling
+         * install_special_mapping or the perf counter mmap tracking code
+         * will fail to recognise it as a vDSO (since arch_vma_name fails).
+         */
+        current->mm->context.vdso_base = vdso_base;
+
+        /*
          * our vma flags don't have VM_WRITE so by default, the process isn't
          * allowed to write those pages.
          * gdb can break that with ptrace interface, and thus trigger COW on
@@ -259,11 +267,10 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
                                      VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|
                                      VM_ALWAYSDUMP,
                                      vdso_pagelist);
-        if (rc)
+        if (rc) {
+                current->mm->context.vdso_base = 0;
                 goto fail_mmapsem;
-
-        /* Put vDSO base into mm struct */
-        current->mm->context.vdso_base = vdso_base;
+        }
 
         up_write(&mm->mmap_sem);
         return 0;
diff --git a/arch/powerpc/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile
index b54b81688132..51ead52141bd 100644
--- a/arch/powerpc/kernel/vdso32/Makefile
+++ b/arch/powerpc/kernel/vdso32/Makefile
@@ -16,7 +16,7 @@ GCOV_PROFILE := n
 
 EXTRA_CFLAGS := -shared -fno-common -fno-builtin
 EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
-                $(call ld-option, -Wl$(comma)--hash-style=sysv)
+                $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 EXTRA_AFLAGS := -D__VDSO32__ -s
 
 obj-y += vdso32_wrapper.o
diff --git a/arch/powerpc/kernel/vdso32/vdso32_wrapper.S b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
index 556f0caa5d84..6e8f507ed32b 100644
--- a/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
+++ b/arch/powerpc/kernel/vdso32/vdso32_wrapper.S
@@ -1,7 +1,8 @@
 #include <linux/init.h>
+#include <linux/linkage.h>
 #include <asm/page.h>
 
-        .section ".data.page_aligned"
+        __PAGE_ALIGNED_DATA
 
         .globl vdso32_start, vdso32_end
         .balign PAGE_SIZE
diff --git a/arch/powerpc/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile
index dd0c8e936775..79da65d44a2a 100644
--- a/arch/powerpc/kernel/vdso64/Makefile
+++ b/arch/powerpc/kernel/vdso64/Makefile
@@ -11,7 +11,7 @@ GCOV_PROFILE := n
 
 EXTRA_CFLAGS := -shared -fno-common -fno-builtin
 EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
-                $(call ld-option, -Wl$(comma)--hash-style=sysv)
+                $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 EXTRA_AFLAGS := -D__VDSO64__ -s
 
 obj-y += vdso64_wrapper.o
diff --git a/arch/powerpc/kernel/vdso64/vdso64_wrapper.S b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
index 0529cb9e3b97..b8553d62b792 100644
--- a/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
+++ b/arch/powerpc/kernel/vdso64/vdso64_wrapper.S
@@ -1,7 +1,8 @@
 #include <linux/init.h>
+#include <linux/linkage.h>
 #include <asm/page.h>
 
-        .section ".data.page_aligned"
+        __PAGE_ALIGNED_DATA
 
         .globl vdso64_start, vdso64_end
         .balign PAGE_SIZE
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index bc7b41edbdfc..77f64218abf3 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -1054,6 +1054,8 @@ static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev)
                 return NULL;
 
         tbl = kmalloc(sizeof(*tbl), GFP_KERNEL);
+        if (tbl == NULL)
+                return NULL;
 
         of_parse_dma_window(dev->dev.archdata.of_node, dma_window,
                             &tbl->it_index, &offset, &size);
@@ -1233,7 +1235,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
                 vio_cmo_set_dma_ops(viodev);
         else
                 viodev->dev.archdata.dma_ops = &dma_iommu_ops;
-        viodev->dev.archdata.dma_data = vio_build_iommu_table(viodev);
+        set_iommu_table_base(&viodev->dev, vio_build_iommu_table(viodev));
         set_dev_node(&viodev->dev, of_node_to_nid(of_node));
 
         /* init generic 'struct device' fields: */
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 58da4070723d..f56429362a12 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -6,6 +6,7 @@
 #include <asm/page.h>
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/cache.h>
+#include <asm/thread_info.h>
 
 ENTRY(_stext)
 
@@ -71,12 +72,7 @@ SECTIONS
         /* Read-only data */
         RODATA
 
-        /* Exception & bug tables */
-        __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
+        EXCEPTION_TABLE(0)
 
         NOTES :kernel :notes
 
@@ -93,12 +89,7 @@ SECTIONS
  */
         . = ALIGN(PAGE_SIZE);
         __init_begin = .;
-
-        .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
-                _sinittext = .;
-                INIT_TEXT
-                _einittext = .;
-        } :kernel
+        INIT_TEXT_SECTION(PAGE_SIZE) :kernel
 
         /* .exit.text is discarded at runtime, not link time,
          * to deal with references from __bug_table
@@ -122,23 +113,16 @@ SECTIONS
 #endif
         }
 
-        . = ALIGN(16);
         .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
+                INIT_SETUP(16)
         }
 
         .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
-                }
+                INIT_CALLS
+        }
 
         .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
+                CON_INITCALL
         }
 
         SECURITY_INIT
@@ -169,14 +153,10 @@ SECTIONS
                 __stop___fw_ftr_fixup = .;
         }
 #endif
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
         .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
+                INIT_RAM_FS
         }
-#endif
+
         PERCPU(PAGE_SIZE)
 
         . = ALIGN(8);
@@ -240,36 +220,24 @@ SECTIONS
 #endif
 
         /* The initial task and kernel stack */
-#ifdef CONFIG_PPC32
-        . = ALIGN(8192);
-#else
-        . = ALIGN(16384);
-#endif
         .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
-                *(.data.init_task)
+                INIT_TASK_DATA(THREAD_SIZE)
         }
 
-        . = ALIGN(PAGE_SIZE);
         .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) {
-                *(.data.page_aligned)
+                PAGE_ALIGNED_DATA(PAGE_SIZE)
         }
 
-        . = ALIGN(L1_CACHE_BYTES);
         .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
-                *(.data.cacheline_aligned)
+                CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
         }
 
-        . = ALIGN(L1_CACHE_BYTES);
         .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) {
-                *(.data.read_mostly)
+                READ_MOSTLY_DATA(L1_CACHE_BYTES)
         }
 
-        . = ALIGN(PAGE_SIZE);
         .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
-                __nosave_begin = .;
-                *(.data.nosave)
-                . = ALIGN(PAGE_SIZE);
-                __nosave_end = .;
+                NOSAVE_DATA
         }
 
         . = ALIGN(PAGE_SIZE);
@@ -280,14 +248,7 @@ SECTIONS
  * And finally the bss
  */
 
-        .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
-                __bss_start = .;
-                *(.sbss) *(.scommon)
-                *(.dynbss)
-                *(.bss)
-                *(COMMON)
-                __bss_stop = .;
-        }
+        BSS_SECTION(0, 0, 0)
 
         . = ALIGN(PAGE_SIZE);
         _end = . ;
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 830bef0a1131..e7dae82c1285 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -29,7 +29,7 @@
 #include <linux/module.h>
 #include <linux/kprobes.h>
 #include <linux/kdebug.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 
 #include <asm/firmware.h>
 #include <asm/page.h>
@@ -171,7 +171,7 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
                 die("Weird page fault", regs, SIGSEGV);
         }
 
-        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
 
         /* When running in the kernel we expect faults to occur only to
          * addresses in user space.  All other faults represent errors in the
@@ -312,7 +312,7 @@ good_area:
         }
         if (ret & VM_FAULT_MAJOR) {
                 current->maj_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
                                      regs, address);
 #ifdef CONFIG_PPC_SMLPAR
                 if (firmware_has_feature(FW_FEATURE_CMO)) {
@@ -323,7 +323,7 @@ good_area:
 #endif
         } else {
                 current->min_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
                                      regs, address);
         }
         up_read(&mm->mmap_sem);
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 3ef5084b90ca..9ddcfb4dc139 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -242,39 +242,3 @@ void free_initrd_mem(unsigned long start, unsigned long end)
 }
 #endif
 
-#ifdef CONFIG_PROC_KCORE
-static struct kcore_list kcore_vmem;
-
-static int __init setup_kcore(void)
-{
-        int i;
-
-        for (i = 0; i < lmb.memory.cnt; i++) {
-                unsigned long base;
-                unsigned long size;
-                struct kcore_list *kcore_mem;
-
-                base = lmb.memory.region[i].base;
-                size = lmb.memory.region[i].size;
-
-                kcore_mem = kmalloc(sizeof(struct kcore_list), GFP_ATOMIC);
-                if (!kcore_mem)
-                        panic("%s: kmalloc failed\n", __func__);
-
-                /* must stay under 32 bits */
-                if ( 0xfffffffful - (unsigned long)__va(base) < size) {
-                        size = 0xfffffffful - (unsigned long)(__va(base));
-                        printk(KERN_DEBUG "setup_kcore: restrict size=%lx\n",
-                                                size);
-                }
-
-                kclist_add(kcore_mem, __va(base), size);
-        }
-
-        kclist_add(&kcore_vmem, (void *)VMALLOC_START,
-                VMALLOC_END-VMALLOC_START);
-
-        return 0;
-}
-module_init(setup_kcore);
-#endif
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 31582329cd67..335c578b9cc3 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -109,35 +109,6 @@ void free_initrd_mem(unsigned long start, unsigned long end)
 }
 #endif
 
-#ifdef CONFIG_PROC_KCORE
-static struct kcore_list kcore_vmem;
-
-static int __init setup_kcore(void)
-{
-        int i;
-
-        for (i=0; i < lmb.memory.cnt; i++) {
-                unsigned long base, size;
-                struct kcore_list *kcore_mem;
-
-                base = lmb.memory.region[i].base;
-                size = lmb.memory.region[i].size;
-
-                /* GFP_ATOMIC to avoid might_sleep warnings during boot */
-                kcore_mem = kmalloc(sizeof(struct kcore_list), GFP_ATOMIC);
-                if (!kcore_mem)
-                        panic("%s: kmalloc failed\n", __func__);
-
-                kclist_add(kcore_mem, __va(base), size);
-        }
-
-        kclist_add(&kcore_vmem, (void *)VMALLOC_START, VMALLOC_END-VMALLOC_START);
-
-        return 0;
-}
-module_init(setup_kcore);
-#endif
-
 static void pgd_ctor(void *addr)
 {
         memset(addr, 0, PGD_TABLE_SIZE);
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 579382c163a9..59736317bf0e 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -143,8 +143,8 @@ int arch_add_memory(int nid, u64 start, u64 size)
  * memory regions, find holes and callback for contiguous regions.
  */
 int
-walk_memory_resource(unsigned long start_pfn, unsigned long nr_pages, void *arg,
-                        int (*func)(unsigned long, unsigned long, void *))
+walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages,
+                void *arg, int (*func)(unsigned long, unsigned long, void *))
 {
         struct lmb_property res;
         unsigned long pfn, len;
@@ -166,7 +166,7 @@ walk_memory_resource(unsigned long start_pfn, unsigned long nr_pages, void *arg,
         }
         return ret;
 }
-EXPORT_SYMBOL_GPL(walk_memory_resource);
+EXPORT_SYMBOL_GPL(walk_system_ram_range);
 
 /*
  * Initialize the bootmem system and give it all the memory we
@@ -372,7 +372,7 @@ void __init mem_init(void)
 
         printk(KERN_INFO "Memory: %luk/%luk available (%luk kernel code, "
                "%luk reserved, %luk data, %luk bss, %luk init)\n",
-                (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 num_physpages << (PAGE_SHIFT-10),
                 codesize >> 10,
                 reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 83f1551ec2c9..53040931de32 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -30,6 +30,8 @@
 #include <asm/tlbflush.h>
 #include <asm/tlb.h>
 
+#include "mmu_decl.h"
+
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
 #ifdef CONFIG_SMP
@@ -166,7 +168,7 @@ struct page * maybe_pte_to_page(pte_t pte)
  * support falls into the same category.
  */
 
-static pte_t set_pte_filter(pte_t pte)
+static pte_t set_pte_filter(pte_t pte, unsigned long addr)
 {
         pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
         if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
@@ -175,6 +177,17 @@ static pte_t set_pte_filter(pte_t pte)
                 if (!pg)
                         return pte;
                 if (!test_bit(PG_arch_1, &pg->flags)) {
+#ifdef CONFIG_8xx
+                        /* On 8xx, cache control instructions (particularly
+                         * "dcbst" from flush_dcache_icache) fault as write
+                         * operation if there is an unpopulated TLB entry
+                         * for the address in question. To workaround that,
+                         * we invalidate the TLB here, thus avoiding dcbst
+                         * misbehaviour.
+                         */
+                        /* 8xx doesn't care about PID, size or ind args */
+                        _tlbil_va(addr, 0, 0, 0);
+#endif /* CONFIG_8xx */
                         flush_dcache_icache_page(pg);
                         set_bit(PG_arch_1, &pg->flags);
                 }
@@ -194,7 +207,7 @@ static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
  * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
  * instead we "filter out" the exec permission for non clean pages.
  */
-static pte_t set_pte_filter(pte_t pte)
+static pte_t set_pte_filter(pte_t pte, unsigned long addr)
 {
         struct page *pg;
 
@@ -276,7 +289,7 @@ void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
          * this context might not have been activated yet when this
          * is called.
          */
-        pte = set_pte_filter(pte);
+        pte = set_pte_filter(pte, addr);
 
         /* Perform the setting of the PTE */
         __set_pte_at(mm, addr, ptep, pte, 0);
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index ef1cccf71173..f288279e679d 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -18,7 +18,6 @@
 #include <asm/asm-offsets.h>
 #include <asm/cputable.h>
 #include <asm/pgtable.h>
-#include <asm/reg.h>
 #include <asm/exception-64e.h>
 #include <asm/ppc-opcode.h>
 
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 9efc8bda01b4..e382cae678b8 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -280,9 +280,9 @@ config PPC_HAVE_PMU_SUPPORT
 
 config PPC_PERF_CTRS
        def_bool y
-       depends on PERF_COUNTERS && PPC_HAVE_PMU_SUPPORT
+       depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
        help
-         This enables the powerpc-specific perf_counter back-end.
+         This enables the powerpc-specific perf_event back-end.
 
 config SMP
         depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE
diff --git a/arch/powerpc/platforms/cell/beat_iommu.c b/arch/powerpc/platforms/cell/beat_iommu.c
index 93b0efddd658..39d361c5c6d2 100644
--- a/arch/powerpc/platforms/cell/beat_iommu.c
+++ b/arch/powerpc/platforms/cell/beat_iommu.c
@@ -77,7 +77,7 @@ static void __init celleb_init_direct_mapping(void)
 static void celleb_dma_dev_setup(struct device *dev)
 {
         dev->archdata.dma_ops = get_pci_dma_ops();
-        dev->archdata.dma_data = (void *)celleb_dma_direct_offset;
+        set_dma_offset(dev, celleb_dma_direct_offset);
 }
 
 static void celleb_pci_dma_dev_setup(struct pci_dev *pdev)
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 416db17eb18f..ca5bfdfe47f2 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -657,15 +657,13 @@ static void cell_dma_dev_setup_fixed(struct device *dev);
 
 static void cell_dma_dev_setup(struct device *dev)
 {
-        struct dev_archdata *archdata = &dev->archdata;
-
         /* Order is important here, these are not mutually exclusive */
         if (get_dma_ops(dev) == &dma_iommu_fixed_ops)
                 cell_dma_dev_setup_fixed(dev);
         else if (get_pci_dma_ops() == &dma_iommu_ops)
-                archdata->dma_data = cell_get_iommu_table(dev);
+                set_iommu_table_base(dev, cell_get_iommu_table(dev));
         else if (get_pci_dma_ops() == &dma_direct_ops)
-                archdata->dma_data = (void *)cell_dma_direct_offset;
+                set_dma_offset(dev, cell_dma_direct_offset);
         else
                 BUG();
 }
@@ -973,11 +971,10 @@ static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask)
 
 static void cell_dma_dev_setup_fixed(struct device *dev)
 {
-        struct dev_archdata *archdata = &dev->archdata;
         u64 addr;
 
         addr = cell_iommu_get_fixed_address(dev) + dma_iommu_fixed_base;
-        archdata->dma_data = (void *)addr;
+        set_dma_offset(dev, addr);
 
         dev_dbg(dev, "iommu: fixed addr = %llx\n", addr);
 }
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index ab8aef9bb8ea..8f079b865ad0 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -29,7 +29,6 @@
 #include <linux/poll.h>
 #include <linux/ptrace.h>
 #include <linux/seq_file.h>
-#include <linux/marker.h>
 
 #include <asm/io.h>
 #include <asm/time.h>
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 24b30b6909c4..fc1b1c42b1dc 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -119,7 +119,7 @@ spufs_new_file(struct super_block *sb, struct dentry *dentry,
                 const struct file_operations *fops, int mode,
                 size_t size, struct spu_context *ctx)
 {
-        static struct inode_operations spufs_file_iops = {
+        static const struct inode_operations spufs_file_iops = {
                 .setattr = spufs_setattr,
         };
         struct inode *inode;
@@ -773,7 +773,7 @@ static int
 spufs_fill_super(struct super_block *sb, void *data, int silent)
 {
         struct spufs_sb_info *info;
-        static struct super_operations s_ops = {
+        static const struct super_operations s_ops = {
                 .alloc_inode = spufs_alloc_inode,
                 .destroy_inode = spufs_destroy_inode,
                 .statfs = simple_statfs,
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index bb5b77c66d05..4678078fede8 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -39,7 +39,6 @@
 #include <linux/pid_namespace.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
-#include <linux/marker.h>
 
 #include <asm/io.h>
 #include <asm/mmu_context.h>
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index 6c1e1011959e..9d53cb481a7c 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -193,7 +193,7 @@ static void pci_dma_dev_setup_iseries(struct pci_dev *pdev)
                 pdn->iommu_table = iommu_init_table(tbl, -1);
         else
                 kfree(tbl);
-        pdev->dev.archdata.dma_data = pdn->iommu_table;
+        set_iommu_table_base(&pdev->dev, pdn->iommu_table);
 }
 #else
 #define pci_dma_dev_setup_iseries       NULL
diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c
index a0ff03a3d8da..7b1d608ea3c8 100644
--- a/arch/powerpc/platforms/pasemi/iommu.c
+++ b/arch/powerpc/platforms/pasemi/iommu.c
@@ -189,7 +189,7 @@ static void pci_dma_dev_setup_pasemi(struct pci_dev *dev)
         }
 #endif
 
-        dev->dev.archdata.dma_data = &iommu_table_iobmap;
+        set_iommu_table_base(&dev->dev, &iommu_table_iobmap);
 }
 
 static void pci_dma_bus_setup_null(struct pci_bus *b) { }
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index 937a38e73178..b40c22d697f0 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -320,7 +320,7 @@ static int __init smp_psurge_probe(void)
         if (ncpus > NR_CPUS)
                 ncpus = NR_CPUS;
         for (i = 1; i < ncpus ; ++i)
-                cpu_set(i, cpu_present_map);
+                set_cpu_present(i, true);
 
         if (ppc_md.progress) ppc_md.progress("smp_psurge_probe - done", 0x352);
 
@@ -867,7 +867,7 @@ static void __devinit smp_core99_setup_cpu(int cpu_nr)
 
 int smp_core99_cpu_disable(void)
 {
-        cpu_clear(smp_processor_id(), cpu_online_map);
+        set_cpu_online(smp_processor_id(), false);
 
         /* XXX reset cpu affinity here */
         mpic_cpu_set_priority(0xf);
@@ -952,7 +952,7 @@ void __init pmac_setup_smp(void)
                 int cpu;
 
                 for (cpu = 1; cpu < 4 && cpu < NR_CPUS; ++cpu)
-                        cpu_set(cpu, cpu_possible_map);
+                        set_cpu_possible(cpu, true);
                 smp_ops = &psurge_smp_ops;
         }
 #endif /* CONFIG_PPC32 */
diff --git a/arch/powerpc/platforms/powermac/udbg_scc.c b/arch/powerpc/platforms/powermac/udbg_scc.c
index 572771fd8463..9490157da62e 100644
--- a/arch/powerpc/platforms/powermac/udbg_scc.c
+++ b/arch/powerpc/platforms/powermac/udbg_scc.c
@@ -1,5 +1,5 @@
 /*
- * udbg for for zilog scc ports as found on Apple PowerMacs
+ * udbg for zilog scc ports as found on Apple PowerMacs
  *
  * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
  *
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 989d6462c154..ccd8dd03b8c9 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -744,7 +744,15 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
 
 static void __rtas_set_slot_reset(struct pci_dn *pdn)
 {
-        rtas_pci_slot_reset (pdn, 1);
+        struct pci_dev *dev = pdn->pcidev;
+
+        /* Determine type of EEH reset required by device,
+         * default hot reset or fundamental reset
+         */
+        if (dev->needs_freset)
+                rtas_pci_slot_reset(pdn, 3);
+        else
+                rtas_pci_slot_reset(pdn, 1);
 
         /* The PCI bus requires that the reset be held high for at least
          * a 100 milliseconds. We wait a bit longer 'just in case'.  */
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index a20ead87153d..ebff6d9a4e39 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -94,7 +94,7 @@ static int pseries_cpu_disable(void)
 {
         int cpu = smp_processor_id();
 
-        cpu_clear(cpu, cpu_online_map);
+        set_cpu_online(cpu, false);
         vdso_data->processorCount--;
 
         /*fix boot_cpuid here*/
@@ -185,7 +185,7 @@ static int pseries_add_processor(struct device_node *np)
 
         for_each_cpu_mask(cpu, tmp) {
                 BUG_ON(cpu_isset(cpu, cpu_present_map));
-                cpu_set(cpu, cpu_present_map);
+                set_cpu_present(cpu, true);
                 set_hard_smp_processor_id(cpu, *intserv++);
         }
         err = 0;
@@ -217,7 +217,7 @@ static void pseries_remove_processor(struct device_node *np)
                         if (get_hard_smp_processor_id(cpu) != intserv[i])
                                 continue;
                         BUG_ON(cpu_online(cpu));
-                        cpu_clear(cpu, cpu_present_map);
+                        set_cpu_present(cpu, false);
                         set_hard_smp_processor_id(cpu, -1);
                         break;
                 }
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index eae51ef9af24..3631a4f277eb 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -71,7 +71,7 @@ static int hc_show(struct seq_file *m, void *p)
         return 0;
 }
 
-static struct seq_operations hcall_inst_seq_ops = {
+static const struct seq_operations hcall_inst_seq_ops = {
         .start = hc_start,
         .next  = hc_next,
         .stop  = hc_stop,
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 661c8e02bcba..1a0000a4b6d6 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -482,7 +482,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
                                    phb->node);
                 iommu_table_setparms(phb, dn, tbl);
                 PCI_DN(dn)->iommu_table = iommu_init_table(tbl, phb->node);
-                dev->dev.archdata.dma_data = PCI_DN(dn)->iommu_table;
+                set_iommu_table_base(&dev->dev, PCI_DN(dn)->iommu_table);
                 return;
         }
 
@@ -494,7 +494,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
                 dn = dn->parent;
 
         if (dn && PCI_DN(dn))
-                dev->dev.archdata.dma_data = PCI_DN(dn)->iommu_table;
+                set_iommu_table_base(&dev->dev, PCI_DN(dn)->iommu_table);
         else
                 printk(KERN_WARNING "iommu: Device %s has no iommu table\n",
                        pci_name(dev));
@@ -538,7 +538,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
          */
         if (dma_window == NULL || pdn->parent == NULL) {
                 pr_debug("  no dma window for device, linking to parent\n");
-                dev->dev.archdata.dma_data = PCI_DN(pdn)->iommu_table;
+                set_iommu_table_base(&dev->dev, PCI_DN(pdn)->iommu_table);
                 return;
         }
 
@@ -554,7 +554,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
                 pr_debug("  found DMA window, table: %p\n", pci->iommu_table);
         }
 
-        dev->dev.archdata.dma_data = pci->iommu_table;
+        set_iommu_table_base(&dev->dev, pci->iommu_table);
 }
 #else  /* CONFIG_PCI */
 #define pci_dma_bus_setup_pSeries       NULL
diff --git a/arch/powerpc/relocs_check.pl b/arch/powerpc/relocs_check.pl
new file mode 100755
index 000000000000..d2571096c3e9
--- /dev/null
+++ b/arch/powerpc/relocs_check.pl
@@ -0,0 +1,56 @@
+#!/usr/bin/perl
+
+# Copyright © 2009 IBM Corporation
+
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version
+# 2 of the License, or (at your option) any later version.
+
+# This script checks the relcoations of a vmlinux for "suspicious"
+# relocations.
+
+use strict;
+use warnings;
+
+if ($#ARGV != 1) {
+        die "$0 [path to objdump] [path to vmlinux]\n";
+}
+
+# Have Kbuild supply the path to objdump so we handle cross compilation.
+my $objdump = shift;
+my $vmlinux = shift;
+my $bad_relocs_count = 0;
+my $bad_relocs = "";
+my $old_binutils = 0;
+
+open(FD, "$objdump -R $vmlinux|") or die;
+while (<FD>) {
+        study $_;
+
+        # Only look at relcoation lines.
+        next if (!/\s+R_/);
+
+        # These relocations are okay
+        next if (/R_PPC64_RELATIVE/ or /R_PPC64_NONE/ or
+                 /R_PPC64_ADDR64\s+mach_/);
+
+        # If we see this type of relcoation it's an idication that
+        # we /may/ be using an old version of binutils.
+        if (/R_PPC64_UADDR64/) {
+                $old_binutils++;
+        }
+
+        $bad_relocs_count++;
+        $bad_relocs .= $_;
+}
+
+if ($bad_relocs_count) {
+        print "WARNING: $bad_relocs_count bad relocations\n";
+        print $bad_relocs;
+}
+
+if ($old_binutils) {
+        print "WARNING: You need at binutils >= 2.19 to build a ".
+              "CONFIG_RELCOATABLE kernel\n";
+}
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c
index a4779912a5ca..88f4ae787832 100644
--- a/arch/powerpc/sysdev/axonram.c
+++ b/arch/powerpc/sysdev/axonram.c
@@ -165,7 +165,7 @@ axon_ram_direct_access(struct block_device *device, sector_t sector,
         return 0;
 }
 
-static struct block_device_operations axon_ram_devops = {
+static const struct block_device_operations axon_ram_devops = {
         .owner          = THIS_MODULE,
         .direct_access  = axon_ram_direct_access
 };
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 89639ecbf381..ae3c4db86fe8 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -297,7 +297,7 @@ static void pci_dma_dev_setup_dart(struct pci_dev *dev)
         /* We only have one iommu table on the mac for now, which makes
          * things simple. Setup all PCI devices to point to this table
          */
-        dev->dev.archdata.dma_data = &iommu_table_dart;
+        set_iommu_table_base(&dev->dev, &iommu_table_dart);
 }
 
 static void pci_dma_bus_setup_dart(struct pci_bus *bus)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 0e09a45ac79a..c6f0a71b405e 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -335,6 +335,16 @@ int cpus_are_in_xmon(void)
 }
 #endif
 
+static inline int unrecoverable_excp(struct pt_regs *regs)
+{
+#ifdef CONFIG_4xx
+        /* We have no MSR_RI bit on 4xx, so we simply return false */
+        return 0;
+#else
+        return ((regs->msr & MSR_RI) == 0);
+#endif
+}
+
 static int xmon_core(struct pt_regs *regs, int fromipi)
 {
         int cmd = 0;
@@ -388,7 +398,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
         bp = NULL;
         if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF))
                 bp = at_breakpoint(regs->nip);
-        if (bp || (regs->msr & MSR_RI) == 0)
+        if (bp || unrecoverable_excp(regs))
                 fromipi = 0;
 
         if (!fromipi) {
@@ -399,7 +409,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
                                cpu, BP_NUM(bp));
                         xmon_print_symbol(regs->nip, " ", ")\n");
                 }
-                if ((regs->msr & MSR_RI) == 0)
+                if (unrecoverable_excp(regs))
                         printf("WARNING: exception is not recoverable, "
                                "can't continue\n");
                 release_output_lock();
@@ -490,7 +500,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
                         printf("Stopped at breakpoint %x (", BP_NUM(bp));
                         xmon_print_symbol(regs->nip, " ", ")\n");
                 }
-                if ((regs->msr & MSR_RI) == 0)
+                if (unrecoverable_excp(regs))
                         printf("WARNING: exception is not recoverable, "
                                "can't continue\n");
                 remove_bpts();
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 1c866efd217d..43c0acad7160 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -94,7 +94,7 @@ config S390
         select HAVE_KVM if 64BIT
         select HAVE_ARCH_TRACEHOOK
         select INIT_ALL_POSSIBLE
-        select HAVE_PERF_COUNTERS
+        select HAVE_PERF_EVENTS
 
 config SCHED_OMIT_FRAME_POINTER
         bool
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 264528e4f58d..b55fd7ed1c31 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -50,10 +50,9 @@ static struct platform_device *appldata_pdev;
  * /proc entries (sysctl)
  */
 static const char appldata_proc_name[APPLDATA_PROC_NAME_LENGTH] = "appldata";
-static int appldata_timer_handler(ctl_table *ctl, int write, struct file *filp,
+static int appldata_timer_handler(ctl_table *ctl, int write,
                                   void __user *buffer, size_t *lenp, loff_t *ppos);
 static int appldata_interval_handler(ctl_table *ctl, int write,
-                                         struct file *filp,
                                          void __user *buffer,
                                          size_t *lenp, loff_t *ppos);
 
@@ -247,7 +246,7 @@ __appldata_vtimer_setup(int cmd)
  * Start/Stop timer, show status of timer (0 = not active, 1 = active)
  */
 static int
-appldata_timer_handler(ctl_table *ctl, int write, struct file *filp,
+appldata_timer_handler(ctl_table *ctl, int write,
                            void __user *buffer, size_t *lenp, loff_t *ppos)
 {
         int len;
@@ -289,7 +288,7 @@ out:
  * current timer interval.
  */
 static int
-appldata_interval_handler(ctl_table *ctl, int write, struct file *filp,
+appldata_interval_handler(ctl_table *ctl, int write,
                            void __user *buffer, size_t *lenp, loff_t *ppos)
 {
         int len, interval;
@@ -335,7 +334,7 @@ out:
  * monitoring (0 = not in process, 1 = in process)
  */
 static int
-appldata_generic_handler(ctl_table *ctl, int write, struct file *filp,
+appldata_generic_handler(ctl_table *ctl, int write,
                            void __user *buffer, size_t *lenp, loff_t *ppos)
 {
         struct appldata_ops *ops = NULL, *tmp_ops;
diff --git a/arch/s390/boot/install.sh b/arch/s390/boot/install.sh
index d4026f62cb06..aed3069699bd 100644
--- a/arch/s390/boot/install.sh
+++ b/arch/s390/boot/install.sh
@@ -21,8 +21,8 @@
 
 # User may have a custom install script
 
-if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
-if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install - same as make zlilo
 
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index 4e91a2573cc4..ab4464486b7a 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Mon Jun 22 11:08:16 2009
+# Linux kernel version: 2.6.31
+# Tue Sep 22 17:43:13 2009
 #
 CONFIG_SCHED_MC=y
 CONFIG_MMU=y
@@ -24,6 +24,7 @@ CONFIG_PGSTE=y
 CONFIG_VIRT_CPU_ACCOUNTING=y
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_S390=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 CONFIG_CONSTRUCTORS=y
 
@@ -48,11 +49,12 @@ CONFIG_AUDIT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=64
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=17
@@ -103,11 +105,12 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
-CONFIG_HAVE_PERF_COUNTERS=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
 # CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 # CONFIG_STRIP_ASM_SYMS is not set
@@ -116,7 +119,6 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
 CONFIG_HAVE_SYSCALL_WRAPPERS=y
@@ -176,6 +178,7 @@ CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_64BIT=y
+# CONFIG_KTIME_SCALAR is not set
 CONFIG_SMP=y
 CONFIG_NR_CPUS=32
 CONFIG_HOTPLUG_CPU=y
@@ -257,7 +260,6 @@ CONFIG_FORCE_MAX_ZONEORDER=9
 CONFIG_PFAULT=y
 # CONFIG_SHARED_KERNEL is not set
 # CONFIG_CMM is not set
-# CONFIG_PAGE_STATES is not set
 # CONFIG_APPLDATA_BASE is not set
 CONFIG_HZ_100=y
 # CONFIG_HZ_250 is not set
@@ -280,6 +282,7 @@ CONFIG_PM_SLEEP_SMP=y
 CONFIG_PM_SLEEP=y
 CONFIG_HIBERNATION=y
 CONFIG_PM_STD_PARTITION=""
+# CONFIG_PM_RUNTIME is not set
 CONFIG_NET=y
 
 #
@@ -394,6 +397,7 @@ CONFIG_IP_SCTP=m
 # CONFIG_SCTP_HMAC_NONE is not set
 # CONFIG_SCTP_HMAC_SHA1 is not set
 CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -487,6 +491,7 @@ CONFIG_CCW=y
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -501,6 +506,7 @@ CONFIG_BLK_DEV=y
 CONFIG_BLK_DEV_LOOP=m
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
 CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_OSD is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
@@ -594,8 +600,11 @@ CONFIG_BLK_DEV_DM=y
 CONFIG_DM_CRYPT=y
 CONFIG_DM_SNAPSHOT=y
 CONFIG_DM_MIRROR=y
+# CONFIG_DM_LOG_USERSPACE is not set
 CONFIG_DM_ZERO=y
 CONFIG_DM_MULTIPATH=m
+# CONFIG_DM_MULTIPATH_QL is not set
+# CONFIG_DM_MULTIPATH_ST is not set
 # CONFIG_DM_DELAY is not set
 # CONFIG_DM_UEVENT is not set
 CONFIG_NETDEVICES=y
@@ -615,7 +624,6 @@ CONFIG_NET_ETHERNET=y
 # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
-# CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
 # CONFIG_TR is not set
@@ -678,6 +686,7 @@ CONFIG_SCLP_CONSOLE=y
 CONFIG_SCLP_VT220_TTY=y
 CONFIG_SCLP_VT220_CONSOLE=y
 CONFIG_SCLP_CPI=m
+CONFIG_SCLP_ASYNC=m
 CONFIG_S390_TAPE=m
 
 #
@@ -737,6 +746,7 @@ CONFIG_FS_POSIX_ACL=y
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -798,7 +808,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
 # CONFIG_EXOFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -885,11 +894,13 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
@@ -979,11 +990,13 @@ CONFIG_CRYPTO_PCBC=m
 #
 CONFIG_CRYPTO_HMAC=m
 # CONFIG_CRYPTO_XCBC is not set
+CONFIG_CRYPTO_VMAC=m
 
 #
 # Digest
 #
 CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_GHASH=m
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=m
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index bd9914b89488..341aff2687a5 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -41,7 +41,7 @@ struct hypfs_sb_info {
 
 static const struct file_operations hypfs_file_ops;
 static struct file_system_type hypfs_type;
-static struct super_operations hypfs_s_ops;
+static const struct super_operations hypfs_s_ops;
 
 /* start of list of all dentries, which have to be deleted on update */
 static struct dentry *hypfs_last_dentry;
@@ -472,7 +472,7 @@ static struct file_system_type hypfs_type = {
         .kill_sb        = hypfs_kill_super
 };
 
-static struct super_operations hypfs_s_ops = {
+static const struct super_operations hypfs_s_ops = {
         .statfs         = simple_statfs,
         .drop_inode     = hypfs_drop_inode,
         .show_options   = hypfs_show_options,
@@ -496,7 +496,7 @@ static int __init hypfs_init(void)
         }
         s390_kobj = kobject_create_and_add("s390", hypervisor_kobj);
         if (!s390_kobj) {
-                rc = -ENOMEM;;
+                rc = -ENOMEM;
                 goto fail_sysfs;
         }
         rc = register_filesystem(&hypfs_type);
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 7a3817a656df..24b1244aadb9 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -42,6 +42,7 @@ __div(unsigned long long n, unsigned int base)
 #endif /* __s390x__ */
 
 #define cputime_zero                    (0ULL)
+#define cputime_one_jiffy               jiffies_to_cputime(1)
 #define cputime_max                     ((~0UL >> 1) - 1)
 #define cputime_add(__a, __b)           ((__a) +  (__b))
 #define cputime_sub(__a, __b)           ((__a) -  (__b))
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 6bc9426a6fbf..f2ef4b619ce1 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -86,6 +86,7 @@
 #define __LC_PGM_OLD_PSW                0x0150
 #define __LC_MCK_OLD_PSW                0x0160
 #define __LC_IO_OLD_PSW                 0x0170
+#define __LC_RESTART_PSW                0x01a0
 #define __LC_EXT_NEW_PSW                0x01b0
 #define __LC_SVC_NEW_PSW                0x01c0
 #define __LC_PGM_NEW_PSW                0x01d0
@@ -189,6 +190,14 @@ union save_area {
 #define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
 #endif
 
+#ifndef __s390x__
+#define LC_ORDER 0
+#else
+#define LC_ORDER 1
+#endif
+
+#define LC_PAGES (1UL << LC_ORDER)
+
 struct _lowcore
 {
 #ifndef __s390x__
diff --git a/arch/s390/include/asm/mman.h b/arch/s390/include/asm/mman.h
index f63fe7b431ed..4e9c8ae0a637 100644
--- a/arch/s390/include/asm/mman.h
+++ b/arch/s390/include/asm/mman.h
@@ -9,18 +9,7 @@
 #ifndef __S390_MMAN_H__
 #define __S390_MMAN_H__
 
-#include <asm-generic/mman-common.h>
-
-#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
-#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
-#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
-#define MAP_LOCKED      0x2000          /* pages are locked */
-#define MAP_NORESERVE   0x4000          /* don't check for reservations */
-#define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
-#define MAP_NONBLOCK    0x10000         /* do not block on IO */
-
-#define MCL_CURRENT     1               /* lock all current mappings */
-#define MCL_FUTURE      2               /* lock all future mappings */
+#include <asm-generic/mman.h>
 
 #if defined(__KERNEL__) && !defined(__ASSEMBLY__) && defined(CONFIG_64BIT)
 int s390_mmap_check(unsigned long addr, unsigned long len);
diff --git a/arch/s390/include/asm/perf_counter.h b/arch/s390/include/asm/perf_counter.h
deleted file mode 100644
index 7015188c2cc2..000000000000
--- a/arch/s390/include/asm/perf_counter.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * Performance counter support - s390 specific definitions.
- *
- * Copyright 2009 Martin Schwidefsky, IBM Corporation.
- */
-
-static inline void set_perf_counter_pending(void) {}
-static inline void clear_perf_counter_pending(void) {}
-
-#define PERF_COUNTER_INDEX_OFFSET 0
diff --git a/arch/s390/include/asm/perf_event.h b/arch/s390/include/asm/perf_event.h
new file mode 100644
index 000000000000..3840cbe77637
--- /dev/null
+++ b/arch/s390/include/asm/perf_event.h
@@ -0,0 +1,10 @@
+/*
+ * Performance event support - s390 specific definitions.
+ *
+ * Copyright 2009 Martin Schwidefsky, IBM Corporation.
+ */
+
+static inline void set_perf_event_pending(void) {}
+static inline void clear_perf_event_pending(void) {}
+
+#define PERF_EVENT_INDEX_OFFSET 0
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index cf8eed3fa779..b42715458312 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -295,7 +295,7 @@ static inline void ATTRIB_NORET disabled_wait(unsigned long code)
                 "       oi      0x384(1),0x10\n"/* fake protection bit */
                 "       lpswe   0(%1)"
                 : "=m" (ctl_buf)
-                : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
+                : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
 #endif /* __s390x__ */
         while (1);
 }
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index c991fe6473c9..a868b272c257 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -62,7 +62,7 @@ extern struct mutex smp_cpu_state_mutex;
 extern int smp_cpu_polarization[];
 
 extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi(cpumask_t mask);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
 
 #endif
 
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index 5e0ad618dc45..6e7211abd950 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -9,7 +9,6 @@ const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
 
 extern cpumask_t cpu_core_map[NR_CPUS];
 
-#define topology_core_siblings(cpu)     (cpu_core_map[cpu])
 #define topology_core_cpumask(cpu)      (&cpu_core_map[cpu])
 
 int topology_set_cpu_management(int fc);
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index c80602d7c880..cb5232df151e 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -268,7 +268,7 @@
 #define __NR_preadv             328
 #define __NR_pwritev            329
 #define __NR_rt_tgsigqueueinfo  330
-#define __NR_perf_counter_open  331
+#define __NR_perf_event_open    331
 #define NR_syscalls 332
 
 /* 
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c
index fa9905ce7d0b..63e46433e81d 100644
--- a/arch/s390/kernel/asm-offsets.c
+++ b/arch/s390/kernel/asm-offsets.c
@@ -7,6 +7,7 @@
 #include <linux/sched.h>
 #include <linux/kbuild.h>
 #include <asm/vdso.h>
+#include <asm/sigp.h>
 
 int main(void)
 {
@@ -59,6 +60,10 @@ int main(void)
         DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
         DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
         DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
-
+        /* constants for SIGP */
+        DEFINE(__SIGP_STOP, sigp_stop);
+        DEFINE(__SIGP_RESTART, sigp_restart);
+        DEFINE(__SIGP_SENSE, sigp_sense);
+        DEFINE(__SIGP_INITIAL_CPU_RESET, sigp_initial_cpu_reset);
         return 0;
 }
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 9ab188d67a3d..0debcec23a39 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -24,7 +24,6 @@
 #include <linux/signal.h>
 #include <linux/resource.h>
 #include <linux/times.h>
-#include <linux/utsname.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
 #include <linux/sem.h>
@@ -443,66 +442,28 @@ sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *uinfo)
  * sys32_execve() executes a new program after the asm stub has set
  * things up for us.  This should basically do what I want it to.
  */
-asmlinkage long sys32_execve(void)
+asmlinkage long sys32_execve(char __user *name, compat_uptr_t __user *argv,
+                             compat_uptr_t __user *envp)
 {
         struct pt_regs *regs = task_pt_regs(current);
         char *filename;
-        unsigned long result;
-        int rc;
-
-        filename = getname(compat_ptr(regs->orig_gpr2));
-        if (IS_ERR(filename)) {
-                result = PTR_ERR(filename);
-                goto out;
-        }
-        rc = compat_do_execve(filename, compat_ptr(regs->gprs[3]),
-                              compat_ptr(regs->gprs[4]), regs);
-        if (rc) {
-                result = rc;
-                goto out_putname;
-        }
+        long rc;
+
+        filename = getname(name);
+        rc = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                return rc;
+        rc = compat_do_execve(filename, argv, envp, regs);
+        if (rc)
+                goto out;
         current->thread.fp_regs.fpc=0;
         asm volatile("sfpc %0,0" : : "d" (0));
-        result = regs->gprs[2];
-out_putname:
-        putname(filename);
+        rc = regs->gprs[2];
 out:
-        return result;
-}
-
-
-#ifdef CONFIG_MODULES
-
-asmlinkage long
-sys32_init_module(void __user *umod, unsigned long len,
-                const char __user *uargs)
-{
-        return sys_init_module(umod, len, uargs);
-}
-
-asmlinkage long
-sys32_delete_module(const char __user *name_user, unsigned int flags)
-{
-        return sys_delete_module(name_user, flags);
-}
-
-#else /* CONFIG_MODULES */
-
-asmlinkage long
-sys32_init_module(void __user *umod, unsigned long len,
-                const char __user *uargs)
-{
-        return -ENOSYS;
+        putname(filename);
+        return rc;
 }
 
-asmlinkage long
-sys32_delete_module(const char __user *name_user, unsigned int flags)
-{
-        return -ENOSYS;
-}
-
-#endif  /* CONFIG_MODULES */
-
 asmlinkage long sys32_pread64(unsigned int fd, char __user *ubuf,
                                 size_t count, u32 poshi, u32 poslo)
 {
@@ -801,23 +762,6 @@ asmlinkage long sys32_write(unsigned int fd, char __user * buf, size_t count)
         return sys_write(fd, buf, count);
 }
 
-asmlinkage long sys32_clone(void)
-{
-        struct pt_regs *regs = task_pt_regs(current);
-        unsigned long clone_flags;
-        unsigned long newsp;
-        int __user *parent_tidptr, *child_tidptr;
-
-        clone_flags = regs->gprs[3] & 0xffffffffUL;
-        newsp = regs->orig_gpr2 & 0x7fffffffUL;
-        parent_tidptr = compat_ptr(regs->gprs[4]);
-        child_tidptr = compat_ptr(regs->gprs[5]);
-        if (!newsp)
-                newsp = regs->gprs[15];
-        return do_fork(clone_flags, newsp, regs, 0,
-                       parent_tidptr, child_tidptr);
-}
-
 /*
  * 31 bit emulation wrapper functions for sys_fadvise64/fadvise64_64.
  * These need to rewrite the advise values for POSIX_FADV_{DONTNEED,NOREUSE}
diff --git a/arch/s390/kernel/compat_linux.h b/arch/s390/kernel/compat_linux.h
index 836a28842900..c07f9ca05ade 100644
--- a/arch/s390/kernel/compat_linux.h
+++ b/arch/s390/kernel/compat_linux.h
@@ -198,7 +198,8 @@ long sys32_rt_sigprocmask(int how, compat_sigset_t __user *set,
                           compat_sigset_t __user *oset, size_t sigsetsize);
 long sys32_rt_sigpending(compat_sigset_t __user *set, size_t sigsetsize);
 long sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *uinfo);
-long sys32_execve(void);
+long sys32_execve(char __user *name, compat_uptr_t __user *argv,
+                  compat_uptr_t __user *envp);
 long sys32_init_module(void __user *umod, unsigned long len,
                        const char __user *uargs);
 long sys32_delete_module(const char __user *name_user, unsigned int flags);
@@ -222,7 +223,6 @@ unsigned long old32_mmap(struct mmap_arg_struct_emu31 __user *arg);
 long sys32_mmap2(struct mmap_arg_struct_emu31 __user *arg);
 long sys32_read(unsigned int fd, char __user * buf, size_t count);
 long sys32_write(unsigned int fd, char __user * buf, size_t count);
-long sys32_clone(void);
 long sys32_fadvise64(int fd, loff_t offset, size_t len, int advise);
 long sys32_fadvise64_64(struct fadvise64_64_args __user *args);
 long sys32_sigaction(int sig, const struct old_sigaction32 __user *act,
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 88a83366819f..682fb69dba21 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -568,18 +568,18 @@ compat_sys_sigprocmask_wrapper:
         llgtr   %r4,%r4                 # compat_old_sigset_t *
         jg      compat_sys_sigprocmask          # branch to system call
 
-        .globl  sys32_init_module_wrapper
-sys32_init_module_wrapper:
+        .globl  sys_init_module_wrapper
+sys_init_module_wrapper:
         llgtr   %r2,%r2                 # void *
         llgfr   %r3,%r3                 # unsigned long
         llgtr   %r4,%r4                 # char *
-        jg      sys32_init_module       # branch to system call
+        jg      sys_init_module         # branch to system call
 
-        .globl  sys32_delete_module_wrapper
-sys32_delete_module_wrapper:
+        .globl  sys_delete_module_wrapper
+sys_delete_module_wrapper:
         llgtr   %r2,%r2                 # const char *
         llgfr   %r3,%r3                 # unsigned int
-        jg      sys32_delete_module     # branch to system call
+        jg      sys_delete_module       # branch to system call
 
         .globl  sys32_quotactl_wrapper
 sys32_quotactl_wrapper:
@@ -1832,11 +1832,26 @@ compat_sys_rt_tgsigqueueinfo_wrapper:
         llgtr   %r5,%r5                 # struct compat_siginfo *
         jg      compat_sys_rt_tgsigqueueinfo_wrapper # branch to system call
 
-        .globl  sys_perf_counter_open_wrapper
-sys_perf_counter_open_wrapper:
-        llgtr   %r2,%r2                 # const struct perf_counter_attr *
+        .globl  sys_perf_event_open_wrapper
+sys_perf_event_open_wrapper:
+        llgtr   %r2,%r2                 # const struct perf_event_attr *
         lgfr    %r3,%r3                 # pid_t
         lgfr    %r4,%r4                 # int
         lgfr    %r5,%r5                 # int
         llgfr   %r6,%r6                 # unsigned long
-        jg      sys_perf_counter_open   # branch to system call
+        jg      sys_perf_event_open     # branch to system call
+
+        .globl  sys_clone_wrapper
+sys_clone_wrapper:
+        llgfr   %r2,%r2                 # unsigned long
+        llgfr   %r3,%r3                 # unsigned long
+        llgtr   %r4,%r4                 # int *
+        llgtr   %r5,%r5                 # int *
+        jg      sys_clone               # branch to system call
+
+        .globl  sys32_execve_wrapper
+sys32_execve_wrapper:
+        llgtr   %r2,%r2                 # char *
+        llgtr   %r3,%r3                 # compat_uptr_t *
+        llgtr   %r4,%r4                 # compat_uptr_t *
+        jg      sys32_execve            # branch to system call
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index 4c512561687d..20f282c911c2 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -881,11 +881,11 @@ static int debug_active=1;
  * if debug_active is already off
  */
 static int
-s390dbf_procactive(ctl_table *table, int write, struct file *filp,
+s390dbf_procactive(ctl_table *table, int write,
                      void __user *buffer, size_t *lenp, loff_t *ppos)
 {
         if (!write || debug_stoppable || !debug_active)
-                return proc_dointvec(table, write, filp, buffer, lenp, ppos);
+                return proc_dointvec(table, write, buffer, lenp, ppos);
         else
                 return 0;
 }
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index 950c59c6688b..e1e5e767ab56 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -42,10 +42,12 @@ long sys_s390_fadvise64_64(struct fadvise64_64_args __user *args);
 long sys_s390_fallocate(int fd, int mode, loff_t offset, u32 len_high,
                         u32 len_low);
 long sys_fork(void);
-long sys_clone(void);
+long sys_clone(unsigned long newsp, unsigned long clone_flags,
+               int __user *parent_tidptr, int __user *child_tidptr);
 long sys_vfork(void);
 void execve_tail(void);
-long sys_execve(void);
+long sys_execve(char __user *name, char __user * __user *argv,
+                char __user * __user *envp);
 long sys_sigsuspend(int history0, int history1, old_sigset_t mask);
 long sys_sigaction(int sig, const struct old_sigaction __user *act,
                    struct old_sigaction __user *oact);
diff --git a/arch/s390/kernel/init_task.c b/arch/s390/kernel/init_task.c
index fe787f9e5f3f..4d1c9fb0b540 100644
--- a/arch/s390/kernel/init_task.c
+++ b/arch/s390/kernel/init_task.c
@@ -25,9 +25,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union 
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 5a43f27eec13..5417eb57271a 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -27,11 +27,11 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/notifier.h>
-#include <linux/utsname.h>
 #include <linux/tick.h>
 #include <linux/elfcore.h>
 #include <linux/kernel_stat.h>
 #include <linux/syscalls.h>
+#include <linux/compat.h>
 #include <asm/compat.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -230,17 +230,11 @@ SYSCALL_DEFINE0(fork)
         return do_fork(SIGCHLD, regs->gprs[15], regs, 0, NULL, NULL);
 }
 
-SYSCALL_DEFINE0(clone)
+SYSCALL_DEFINE4(clone, unsigned long, newsp, unsigned long, clone_flags,
+                int __user *, parent_tidptr, int __user *, child_tidptr)
 {
         struct pt_regs *regs = task_pt_regs(current);
-        unsigned long clone_flags;
-        unsigned long newsp;
-        int __user *parent_tidptr, *child_tidptr;
 
-        clone_flags = regs->gprs[3];
-        newsp = regs->orig_gpr2;
-        parent_tidptr = (int __user *) regs->gprs[4];
-        child_tidptr = (int __user *) regs->gprs[5];
         if (!newsp)
                 newsp = regs->gprs[15];
         return do_fork(clone_flags, newsp, regs, 0,
@@ -274,30 +268,25 @@ asmlinkage void execve_tail(void)
 /*
  * sys_execve() executes a new program.
  */
-SYSCALL_DEFINE0(execve)
+SYSCALL_DEFINE3(execve, char __user *, name, char __user * __user *, argv,
+                char __user * __user *, envp)
 {
         struct pt_regs *regs = task_pt_regs(current);
         char *filename;
-        unsigned long result;
-        int rc;
+        long rc;
 
-        filename = getname((char __user *) regs->orig_gpr2);
-        if (IS_ERR(filename)) {
-                result = PTR_ERR(filename);
+        filename = getname(name);
+        rc = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                return rc;
+        rc = do_execve(filename, argv, envp, regs);
+        if (rc)
                 goto out;
-        }
-        rc = do_execve(filename, (char __user * __user *) regs->gprs[3],
-                       (char __user * __user *) regs->gprs[4], regs);
-        if (rc) {
-                result = rc;
-                goto out_putname;
-        }
         execve_tail();
-        result = regs->gprs[2];
-out_putname:
-        putname(filename);
+        rc = regs->gprs[2];
 out:
-        return result;
+        putname(filename);
+        return rc;
 }
 
 /*
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index f3ddd7ac06c5..a8738676b26c 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -339,24 +339,10 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         int copied, ret;
 
         switch (request) {
-        case PTRACE_PEEKTEXT:
-        case PTRACE_PEEKDATA:
-                /* Remove high order bit from address (only for 31 bit). */
-                addr &= PSW_ADDR_INSN;
-                /* read word at location addr. */
-                return generic_ptrace_peekdata(child, addr, data);
-
         case PTRACE_PEEKUSR:
                 /* read the word at location addr in the USER area. */
                 return peek_user(child, addr, data);
 
-        case PTRACE_POKETEXT:
-        case PTRACE_POKEDATA:
-                /* Remove high order bit from address (only for 31 bit). */
-                addr &= PSW_ADDR_INSN;
-                /* write the word at location addr. */
-                return generic_ptrace_pokedata(child, addr, data);
-
         case PTRACE_POKEUSR:
                 /* write the word at location addr in the USER area */
                 return poke_user(child, addr, data);
@@ -386,8 +372,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                         copied += sizeof(unsigned long);
                 }
                 return 0;
+        default:
+                /* Removing high order bit from addr (only for 31 bit). */
+                addr &= PSW_ADDR_INSN;
+                return ptrace_request(child, request, addr, data);
         }
-        return ptrace_request(child, request, addr, data);
 }
 
 #ifdef CONFIG_COMPAT
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index 20639dfe0c42..e27ca63076d1 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -24,8 +24,6 @@ LC_EXT_INT_CODE		= 0x86			# addr of ext int code
 #   R3  = external interruption parameter if R2=0
 #
 
-.section ".init.text","ax"
-
 _sclp_wait_int:
         stm     %r6,%r15,24(%r15)               # save registers
         basr    %r13,0                          # get base register
@@ -318,9 +316,8 @@ _sclp_print_early:
         .long   _sclp_work_area
 .Lascebc:
         .long   _ascebc
-.previous
 
-.section ".init.data","a"
+.section .data,"aw",@progbits
         .balign 4096
 _sclp_work_area:
         .fill   4096
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 56c16876b919..c932caa5e850 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -147,11 +147,11 @@ static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
                 udelay(10);
 }
 
-void arch_send_call_function_ipi(cpumask_t mask)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         int cpu;
 
-        for_each_cpu_mask(cpu, mask)
+        for_each_cpu(cpu, mask)
                 smp_ext_bitcall(cpu, ec_call_function);
 }
 
@@ -475,10 +475,8 @@ static int __cpuinit smp_alloc_lowcore(int cpu)
 {
         unsigned long async_stack, panic_stack;
         struct _lowcore *lowcore;
-        int lc_order;
 
-        lc_order = sizeof(long) == 8 ? 1 : 0;
-        lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
+        lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
         if (!lowcore)
                 return -ENOMEM;
         async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
@@ -509,16 +507,14 @@ static int __cpuinit smp_alloc_lowcore(int cpu)
 out:
         free_page(panic_stack);
         free_pages(async_stack, ASYNC_ORDER);
-        free_pages((unsigned long) lowcore, lc_order);
+        free_pages((unsigned long) lowcore, LC_ORDER);
         return -ENOMEM;
 }
 
 static void smp_free_lowcore(int cpu)
 {
         struct _lowcore *lowcore;
-        int lc_order;
 
-        lc_order = sizeof(long) == 8 ? 1 : 0;
         lowcore = lowcore_ptr[cpu];
 #ifndef CONFIG_64BIT
         if (MACHINE_HAS_IEEE)
@@ -528,7 +524,7 @@ static void smp_free_lowcore(int cpu)
 #endif
         free_page(lowcore->panic_stack - PAGE_SIZE);
         free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
-        free_pages((unsigned long) lowcore, lc_order);
+        free_pages((unsigned long) lowcore, LC_ORDER);
         lowcore_ptr[cpu] = NULL;
 }
 
@@ -664,7 +660,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         unsigned long async_stack, panic_stack;
         struct _lowcore *lowcore;
         unsigned int cpu;
-        int lc_order;
 
         smp_detect_cpus();
 
@@ -674,8 +669,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         print_cpu_info();
 
         /* Reallocate current lowcore, but keep its contents. */
-        lc_order = sizeof(long) == 8 ? 1 : 0;
-        lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
+        lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
         panic_stack = __get_free_page(GFP_KERNEL);
         async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
         BUG_ON(!lowcore || !panic_stack || !async_stack);
@@ -1047,42 +1041,6 @@ out:
 static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
                          dispatching_store);
 
-/*
- * If the resume kernel runs on another cpu than the suspended kernel,
- * we have to switch the cpu IDs in the logical map.
- */
-void smp_switch_boot_cpu_in_resume(u32 resume_phys_cpu_id,
-                                   struct _lowcore *suspend_lowcore)
-{
-        int cpu, suspend_cpu_id, resume_cpu_id;
-        u32 suspend_phys_cpu_id;
-
-        suspend_phys_cpu_id = __cpu_logical_map[suspend_lowcore->cpu_nr];
-        suspend_cpu_id = suspend_lowcore->cpu_nr;
-
-        for_each_present_cpu(cpu) {
-                if (__cpu_logical_map[cpu] == resume_phys_cpu_id) {
-                        resume_cpu_id = cpu;
-                        goto found;
-                }
-        }
-        panic("Could not find resume cpu in logical map.\n");
-
-found:
-        printk("Resume  cpu ID: %i/%i\n", resume_phys_cpu_id, resume_cpu_id);
-        printk("Suspend cpu ID: %i/%i\n", suspend_phys_cpu_id, suspend_cpu_id);
-
-        __cpu_logical_map[resume_cpu_id] = suspend_phys_cpu_id;
-        __cpu_logical_map[suspend_cpu_id] = resume_phys_cpu_id;
-
-        lowcore_ptr[suspend_cpu_id]->cpu_addr = resume_phys_cpu_id;
-}
-
-u32 smp_get_phys_cpu_id(void)
-{
-        return __cpu_logical_map[smp_processor_id()];
-}
-
 static int __init topology_init(void)
 {
         int cpu;
diff --git a/arch/s390/kernel/suspend.c b/arch/s390/kernel/suspend.c
index 086bee970cae..cf9e5c6d5527 100644
--- a/arch/s390/kernel/suspend.c
+++ b/arch/s390/kernel/suspend.c
@@ -6,36 +6,26 @@
  * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
  */
 
-#include <linux/suspend.h>
-#include <linux/reboot.h>
 #include <linux/pfn.h>
-#include <linux/mm.h>
-#include <asm/sections.h>
 #include <asm/system.h>
-#include <asm/ipl.h>
 
 /*
  * References to section boundaries
  */
 extern const void __nosave_begin, __nosave_end;
 
-/*
- *  check if given pfn is in the 'nosave' or in the read only NSS section
- */
 int pfn_is_nosave(unsigned long pfn)
 {
-        unsigned long nosave_begin_pfn = __pa(&__nosave_begin) >> PAGE_SHIFT;
-        unsigned long nosave_end_pfn = PAGE_ALIGN(__pa(&__nosave_end))
-                                        >> PAGE_SHIFT;
-        unsigned long eshared_pfn = PFN_DOWN(__pa(&_eshared)) - 1;
-        unsigned long stext_pfn = PFN_DOWN(__pa(&_stext));
+        unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
+        unsigned long nosave_end_pfn = PFN_DOWN(__pa(&__nosave_end));
 
+        /* Always save lowcore pages (LC protection might be enabled). */
+        if (pfn <= LC_PAGES)
+                return 0;
         if (pfn >= nosave_begin_pfn && pfn < nosave_end_pfn)
                 return 1;
-        if (pfn >= stext_pfn && pfn <= eshared_pfn) {
-                if (ipl_info.type == IPL_TYPE_NSS)
-                        return 1;
-        } else if ((tprot(pfn * PAGE_SIZE) && pfn > 0))
+        /* Skip memory holes and read-only pages (NSS, DCSS, ...). */
+        if (tprot(PFN_PHYS(pfn)))
                 return 1;
         return 0;
 }
diff --git a/arch/s390/kernel/swsusp_asm64.S b/arch/s390/kernel/swsusp_asm64.S
index 7cd6b096f0d1..fe927d0bc20b 100644
--- a/arch/s390/kernel/swsusp_asm64.S
+++ b/arch/s390/kernel/swsusp_asm64.S
@@ -9,6 +9,7 @@
 
 #include <asm/page.h>
 #include <asm/ptrace.h>
+#include <asm/thread_info.h>
 #include <asm/asm-offsets.h>
 
 /*
@@ -41,6 +42,9 @@ swsusp_arch_suspend:
         /* Get pointer to save area */
         lghi    %r1,0x1000
 
+        /* Save CPU address */
+        stap    __LC_CPU_ADDRESS(%r1)
+
         /* Store registers */
         mvc     0x318(4,%r1),__SF_EMPTY(%r15)   /* move prefix to lowcore */
         stfpc   0x31c(%r1)                      /* store fpu control */
@@ -102,11 +106,10 @@ swsusp_arch_resume:
         aghi    %r15,-STACK_FRAME_OVERHEAD
         stg     %r1,__SF_BACKCHAIN(%r15)
 
-#ifdef CONFIG_SMP
-        /* Save boot cpu number */
-        brasl   %r14,smp_get_phys_cpu_id
-        lgr     %r10,%r2
-#endif
+        /* Make all free pages stable */
+        lghi    %r2,1
+        brasl   %r14,arch_set_page_states
+
         /* Deactivate DAT */
         stnsm   __SF_EMPTY(%r15),0xfb
 
@@ -133,6 +136,69 @@ swsusp_arch_resume:
 2:
         ptlb                            /* flush tlb */
 
+        /* Reset System */
+        larl    %r1,restart_entry
+        larl    %r2,.Lrestart_diag308_psw
+        og      %r1,0(%r2)
+        stg     %r1,0(%r0)
+        larl    %r1,.Lnew_pgm_check_psw
+        epsw    %r2,%r3
+        stm     %r2,%r3,0(%r1)
+        mvc     __LC_PGM_NEW_PSW(16,%r0),0(%r1)
+        lghi    %r0,0
+        diag    %r0,%r0,0x308
+restart_entry:
+        lhi     %r1,1
+        sigp    %r1,%r0,0x12
+        sam64
+        larl    %r1,.Lnew_pgm_check_psw
+        lpswe   0(%r1)
+pgm_check_entry:
+
+        /* Switch to original suspend CPU */
+        larl    %r1,.Lresume_cpu                /* Resume CPU address: r2 */
+        stap    0(%r1)
+        llgh    %r2,0(%r1)
+        lghi    %r3,0x1000
+        llgh    %r1,__LC_CPU_ADDRESS(%r3)       /* Suspend CPU address: r1 */
+        cgr     %r1,%r2
+        je      restore_registers               /* r1 = r2 -> nothing to do */
+        larl    %r4,.Lrestart_suspend_psw       /* Set new restart PSW */
+        mvc     __LC_RESTART_PSW(16,%r0),0(%r4)
+3:
+        sigp    %r9,%r1,__SIGP_INITIAL_CPU_RESET
+        brc     8,4f    /* accepted */
+        brc     2,3b    /* busy, try again */
+
+        /* Suspend CPU not available -> panic */
+        larl    %r15,init_thread_union
+        ahi     %r15,1<<(PAGE_SHIFT+THREAD_ORDER)
+        larl    %r2,.Lpanic_string
+        larl    %r3,_sclp_print_early
+        lghi    %r1,0
+        sam31
+        sigp    %r1,%r0,0x12
+        basr    %r14,%r3
+        larl    %r3,.Ldisabled_wait_31
+        lpsw    0(%r3)
+4:
+        /* Switch to suspend CPU */
+        sigp    %r9,%r1,__SIGP_RESTART  /* start suspend CPU */
+        brc     2,4b                    /* busy, try again */
+5:
+        sigp    %r9,%r2,__SIGP_STOP     /* stop resume (current) CPU */
+6:      j       6b
+
+restart_suspend:
+        larl    %r1,.Lresume_cpu
+        llgh    %r2,0(%r1)
+7:
+        sigp    %r9,%r2,__SIGP_SENSE    /* Wait for resume CPU */
+        brc     2,7b                    /* busy, try again */
+        tmll    %r9,0x40                /* Test if resume CPU is stopped */
+        jz      7b
+
+restore_registers:
         /* Restore registers */
         lghi    %r13,0x1000             /* %r1 = pointer to save arae */
 
@@ -166,19 +232,33 @@ swsusp_arch_resume:
         /* Pointer to save area */
         lghi    %r13,0x1000
 
-#ifdef CONFIG_SMP
-        /* Switch CPUs */
-        lgr     %r2,%r10                /* get cpu id */
-        llgf    %r3,0x318(%r13)
-        brasl   %r14,smp_switch_boot_cpu_in_resume
-#endif
         /* Restore prefix register */
         spx     0x318(%r13)
 
         /* Activate DAT */
         stosm   __SF_EMPTY(%r15),0x04
 
+        /* Make all free pages unstable */
+        lghi    %r2,0
+        brasl   %r14,arch_set_page_states
+
         /* Return 0 */
         lmg     %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
         lghi    %r2,0
         br      %r14
+
+        .section .data.nosave,"aw",@progbits
+        .align  8
+.Ldisabled_wait_31:
+        .long  0x000a0000,0x00000000
+.Lpanic_string:
+        .asciz  "Resume not possible because suspend CPU is no longer available"
+        .align  8
+.Lrestart_diag308_psw:
+        .long   0x00080000,0x80000000
+.Lrestart_suspend_psw:
+        .quad   0x0000000180000000,restart_suspend
+.Lnew_pgm_check_psw:
+        .quad   0,pgm_check_entry
+.Lresume_cpu:
+        .byte   0,0
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index c7ae4b17e0e3..e9d94f61d500 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -29,7 +29,6 @@
 #include <linux/personality.h>
 #include <linux/unistd.h>
 #include <linux/ipc.h>
-#include <linux/syscalls.h>
 #include <asm/uaccess.h>
 #include "entry.h"
 
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index ad1acd200385..30eca070d426 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -19,7 +19,7 @@ SYSCALL(sys_restart_syscall,sys_restart_syscall,sys_restart_syscall)
 SYSCALL(sys_creat,sys_creat,sys32_creat_wrapper)
 SYSCALL(sys_link,sys_link,sys32_link_wrapper)
 SYSCALL(sys_unlink,sys_unlink,sys32_unlink_wrapper)             /* 10 */
-SYSCALL(sys_execve,sys_execve,sys32_execve)
+SYSCALL(sys_execve,sys_execve,sys32_execve_wrapper)
 SYSCALL(sys_chdir,sys_chdir,sys32_chdir_wrapper)
 SYSCALL(sys_time,sys_ni_syscall,sys32_time_wrapper)             /* old time syscall */
 SYSCALL(sys_mknod,sys_mknod,sys32_mknod_wrapper)
@@ -128,7 +128,7 @@ SYSCALL(sys_sysinfo,sys_sysinfo,compat_sys_sysinfo_wrapper)
 SYSCALL(sys_ipc,sys_ipc,sys32_ipc_wrapper)
 SYSCALL(sys_fsync,sys_fsync,sys32_fsync_wrapper)
 SYSCALL(sys_sigreturn,sys_sigreturn,sys32_sigreturn)
-SYSCALL(sys_clone,sys_clone,sys32_clone)                        /* 120 */
+SYSCALL(sys_clone,sys_clone,sys_clone_wrapper)                  /* 120 */
 SYSCALL(sys_setdomainname,sys_setdomainname,sys32_setdomainname_wrapper)
 SYSCALL(sys_newuname,sys_s390_newuname,sys32_newuname_wrapper)
 NI_SYSCALL                                                      /* modify_ldt for i386 */
@@ -136,8 +136,8 @@ SYSCALL(sys_adjtimex,sys_adjtimex,compat_sys_adjtimex_wrapper)
 SYSCALL(sys_mprotect,sys_mprotect,sys32_mprotect_wrapper)       /* 125 */
 SYSCALL(sys_sigprocmask,sys_sigprocmask,compat_sys_sigprocmask_wrapper)
 NI_SYSCALL                                                      /* old "create module" */
-SYSCALL(sys_init_module,sys_init_module,sys32_init_module_wrapper)
-SYSCALL(sys_delete_module,sys_delete_module,sys32_delete_module_wrapper)
+SYSCALL(sys_init_module,sys_init_module,sys_init_module_wrapper)
+SYSCALL(sys_delete_module,sys_delete_module,sys_delete_module_wrapper)
 NI_SYSCALL                                                      /* 130: old get_kernel_syms */
 SYSCALL(sys_quotactl,sys_quotactl,sys32_quotactl_wrapper)
 SYSCALL(sys_getpgid,sys_getpgid,sys32_getpgid_wrapper)
@@ -339,4 +339,4 @@ SYSCALL(sys_epoll_create1,sys_epoll_create1,sys_epoll_create1_wrapper)
 SYSCALL(sys_preadv,sys_preadv,compat_sys_preadv_wrapper)
 SYSCALL(sys_pwritev,sys_pwritev,compat_sys_pwritev_wrapper)
 SYSCALL(sys_rt_tgsigqueueinfo,sys_rt_tgsigqueueinfo,compat_sys_rt_tgsigqueueinfo_wrapper) /* 330 */
-SYSCALL(sys_perf_counter_open,sys_perf_counter_open,sys_perf_counter_open_wrapper)
+SYSCALL(sys_perf_event_open,sys_perf_event_open,sys_perf_event_open_wrapper)
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index e3dc28b8075d..34162a0b2caa 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -184,12 +184,14 @@ static void timing_alert_interrupt(__u16 code)
 static void etr_reset(void);
 static void stp_reset(void);
 
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
-        struct timespec ts;
+        tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
+}
 
-        tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
-        return ts.tv_sec;
+void read_boot_clock(struct timespec *ts)
+{
+        tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
 }
 
 static cycle_t read_tod_clock(struct clocksource *cs)
@@ -207,6 +209,10 @@ static struct clocksource clocksource_tod = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+struct clocksource * __init clocksource_default_clock(void)
+{
+        return &clocksource_tod;
+}
 
 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
 {
@@ -244,10 +250,6 @@ void update_vsyscall_tz(void)
  */
 void __init time_init(void)
 {
-        struct timespec ts;
-        unsigned long flags;
-        cycle_t now;
-
         /* Reset time synchronization interfaces. */
         etr_reset();
         stp_reset();
@@ -263,26 +265,6 @@ void __init time_init(void)
         if (clocksource_register(&clocksource_tod) != 0)
                 panic("Could not register TOD clock source");
 
-        /*
-         * The TOD clock is an accurate clock. The xtime should be
-         * initialized in a way that the difference between TOD and
-         * xtime is reasonably small. Too bad that timekeeping_init
-         * sets xtime.tv_nsec to zero. In addition the clock source
-         * change from the jiffies clock source to the TOD clock
-         * source add another error of up to 1/HZ second. The same
-         * function sets wall_to_monotonic to a value that is too
-         * small for /proc/uptime to be accurate.
-         * Reset xtime and wall_to_monotonic to sane values.
-         */
-        write_seqlock_irqsave(&xtime_lock, flags);
-        now = get_clock();
-        tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
-        clocksource_tod.cycle_last = now;
-        clocksource_tod.raw_time = xtime;
-        tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
-        set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
-        write_sequnlock_irqrestore(&xtime_lock, flags);
-
         /* Enable TOD clock interrupts on the boot cpu. */
         init_cpu_timer();
 
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index 45e1708b70fd..45a3e9a7ae21 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -75,7 +75,7 @@ __setup("vdso=", vdso_setup);
 static union {
         struct vdso_data        data;
         u8                      page[PAGE_SIZE];
-} vdso_data_store __attribute__((__section__(".data.page_aligned")));
+} vdso_data_store __page_aligned_data;
 struct vdso_data *vdso_data = &vdso_data_store.data;
 
 /*
diff --git a/arch/s390/kernel/vdso32/Makefile b/arch/s390/kernel/vdso32/Makefile
index ca78ad60ba24..d13e8755a8cc 100644
--- a/arch/s390/kernel/vdso32/Makefile
+++ b/arch/s390/kernel/vdso32/Makefile
@@ -13,7 +13,7 @@ KBUILD_AFLAGS_31 += -m31 -s
 KBUILD_CFLAGS_31 := $(filter-out -m64,$(KBUILD_CFLAGS))
 KBUILD_CFLAGS_31 += -m31 -fPIC -shared -fno-common -fno-builtin
 KBUILD_CFLAGS_31 += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
-                        $(call ld-option, -Wl$(comma)--hash-style=sysv)
+                        $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 
 $(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_31)
 $(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_31)
diff --git a/arch/s390/kernel/vdso32/vdso32_wrapper.S b/arch/s390/kernel/vdso32/vdso32_wrapper.S
index 61639a89e70b..ae42f8ce350b 100644
--- a/arch/s390/kernel/vdso32/vdso32_wrapper.S
+++ b/arch/s390/kernel/vdso32/vdso32_wrapper.S
@@ -1,7 +1,8 @@
 #include <linux/init.h>
+#include <linux/linkage.h>
 #include <asm/page.h>
 
-        .section ".data.page_aligned"
+        __PAGE_ALIGNED_DATA
 
         .globl vdso32_start, vdso32_end
         .balign PAGE_SIZE
diff --git a/arch/s390/kernel/vdso64/Makefile b/arch/s390/kernel/vdso64/Makefile
index 6fc8e829258c..449352dda9cd 100644
--- a/arch/s390/kernel/vdso64/Makefile
+++ b/arch/s390/kernel/vdso64/Makefile
@@ -13,7 +13,7 @@ KBUILD_AFLAGS_64 += -m64 -s
 KBUILD_CFLAGS_64 := $(filter-out -m64,$(KBUILD_CFLAGS))
 KBUILD_CFLAGS_64 += -m64 -fPIC -shared -fno-common -fno-builtin
 KBUILD_CFLAGS_64 += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
-                        $(call ld-option, -Wl$(comma)--hash-style=sysv)
+                        $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 
 $(targets:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_64)
 $(targets:%=$(obj)/%.dbg): KBUILD_AFLAGS = $(KBUILD_AFLAGS_64)
diff --git a/arch/s390/kernel/vdso64/vdso64_wrapper.S b/arch/s390/kernel/vdso64/vdso64_wrapper.S
index d8e2ac14d564..c245842b516f 100644
--- a/arch/s390/kernel/vdso64/vdso64_wrapper.S
+++ b/arch/s390/kernel/vdso64/vdso64_wrapper.S
@@ -1,7 +1,8 @@
 #include <linux/init.h>
+#include <linux/linkage.h>
 #include <asm/page.h>
 
-        .section ".data.page_aligned"
+        __PAGE_ALIGNED_DATA
 
         .globl vdso64_start, vdso64_end
         .balign PAGE_SIZE
diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
index 2c2f98353415..43486c2408e1 100644
--- a/arch/s390/kvm/interrupt.c
+++ b/arch/s390/kvm/interrupt.c
@@ -478,7 +478,7 @@ int kvm_s390_inject_program_int(struct kvm_vcpu *vcpu, u16 code)
         if (!inti)
                 return -ENOMEM;
 
-        inti->type = KVM_S390_PROGRAM_INT;;
+        inti->type = KVM_S390_PROGRAM_INT;
         inti->pgm.code = code;
 
         VCPU_EVENT(vcpu, 3, "inject: program check %d (from kernel)", code);
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c
index 413c240cbca7..b201135cc18c 100644
--- a/arch/s390/mm/cmm.c
+++ b/arch/s390/mm/cmm.c
@@ -262,7 +262,7 @@ cmm_skip_blanks(char *cp, char **endp)
 static struct ctl_table cmm_table[];
 
 static int
-cmm_pages_handler(ctl_table *ctl, int write, struct file *filp,
+cmm_pages_handler(ctl_table *ctl, int write,
                   void __user *buffer, size_t *lenp, loff_t *ppos)
 {
         char buf[16], *p;
@@ -303,7 +303,7 @@ cmm_pages_handler(ctl_table *ctl, int write, struct file *filp,
 }
 
 static int
-cmm_timeout_handler(ctl_table *ctl, int write, struct file *filp,
+cmm_timeout_handler(ctl_table *ctl, int write,
                     void __user *buffer, size_t *lenp, loff_t *ppos)
 {
         char buf[64], *p;
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 1abbadd497e1..6d507462967a 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -10,7 +10,7 @@
  *    Copyright (C) 1995  Linus Torvalds
  */
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
@@ -306,7 +306,7 @@ do_exception(struct pt_regs *regs, unsigned long error_code, int write)
          * interrupts again and then search the VMAs
          */
         local_irq_enable();
-        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
         down_read(&mm->mmap_sem);
 
         si_code = SEGV_MAPERR;
@@ -366,11 +366,11 @@ good_area:
         }
         if (fault & VM_FAULT_MAJOR) {
                 tsk->maj_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
                                      regs, address);
         } else {
                 tsk->min_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
                                      regs, address);
         }
         up_read(&mm->mmap_sem);
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index c634dfbe92e9..765647952221 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -105,7 +105,7 @@ void __init mem_init(void)
         datasize =  (unsigned long) &_edata - (unsigned long) &_etext;
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
         printk("Memory: %luk/%luk available (%ldk kernel code, %ldk reserved, %ldk data, %ldk init)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 max_mapnr << (PAGE_SHIFT-10),
                 codesize >> 10,
                 reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/s390/mm/page-states.c b/arch/s390/mm/page-states.c
index f92ec203ad92..098923ae458f 100644
--- a/arch/s390/mm/page-states.c
+++ b/arch/s390/mm/page-states.c
@@ -50,28 +50,64 @@ void __init cmma_init(void)
                 cmma_flag = 0;
 }
 
-void arch_free_page(struct page *page, int order)
+static inline void set_page_unstable(struct page *page, int order)
 {
         int i, rc;
 
-        if (!cmma_flag)
-                return;
         for (i = 0; i < (1 << order); i++)
                 asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
                              : "=&d" (rc)
-                             : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
+                             : "a" (page_to_phys(page + i)),
                                "i" (ESSA_SET_UNUSED));
 }
 
-void arch_alloc_page(struct page *page, int order)
+void arch_free_page(struct page *page, int order)
 {
-        int i, rc;
-
         if (!cmma_flag)
                 return;
+        set_page_unstable(page, order);
+}
+
+static inline void set_page_stable(struct page *page, int order)
+{
+        int i, rc;
+
         for (i = 0; i < (1 << order); i++)
                 asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
                              : "=&d" (rc)
-                             : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
+                             : "a" (page_to_phys(page + i)),
                                "i" (ESSA_SET_STABLE));
 }
+
+void arch_alloc_page(struct page *page, int order)
+{
+        if (!cmma_flag)
+                return;
+        set_page_stable(page, order);
+}
+
+void arch_set_page_states(int make_stable)
+{
+        unsigned long flags, order, t;
+        struct list_head *l;
+        struct page *page;
+        struct zone *zone;
+
+        if (!cmma_flag)
+                return;
+        if (make_stable)
+                drain_local_pages(NULL);
+        for_each_populated_zone(zone) {
+                spin_lock_irqsave(&zone->lock, flags);
+                for_each_migratetype_order(order, t) {
+                        list_for_each(l, &zone->free_area[order].free_list[t]) {
+                                page = list_entry(l, struct page, lru);
+                                if (make_stable)
+                                        set_page_stable(page, order);
+                                else
+                                        set_page_unstable(page, order);
+                        }
+                }
+                spin_unlock_irqrestore(&zone->lock, flags);
+        }
+}
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index c70215247071..c60bfb309ce6 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -314,21 +314,18 @@ int s390_enable_sie(void)
 }
 EXPORT_SYMBOL_GPL(s390_enable_sie);
 
-#ifdef CONFIG_DEBUG_PAGEALLOC
-#ifdef CONFIG_HIBERNATION
+#if defined(CONFIG_DEBUG_PAGEALLOC) && defined(CONFIG_HIBERNATION)
 bool kernel_page_present(struct page *page)
 {
         unsigned long addr;
         int cc;
 
         addr = page_to_phys(page);
-        asm("lra %1,0(%1)\n"
-            "ipm %0\n"
-            "srl %0,28"
-            :"=d"(cc),"+a"(addr)::"cc");
+        asm volatile(
+                "       lra     %1,0(%1)\n"
+                "       ipm     %0\n"
+                "       srl     %0,28"
+                : "=d" (cc), "+a" (addr) : : "cc");
         return cc == 0;
 }
-
-#endif /* CONFIG_HIBERNATION */
-#endif /* CONFIG_DEBUG_PAGEALLOC */
-
+#endif /* CONFIG_HIBERNATION && CONFIG_DEBUG_PAGEALLOC */
diff --git a/arch/score/Kconfig b/arch/score/Kconfig
new file mode 100644
index 000000000000..55d413e6dcf2
--- /dev/null
+++ b/arch/score/Kconfig
@@ -0,0 +1,141 @@
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+
+mainmenu "Linux/SCORE Kernel Configuration"
+
+menu "Machine selection"
+
+choice
+        prompt "System type"
+        default MACH_SPCT6600
+
+config ARCH_SCORE7
+        bool "SCORE7 processor"
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select CPU_SCORE7
+        select GENERIC_HAS_IOMAP
+
+config MACH_SPCT6600
+        bool "SPCT6600 series based machines"
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select CPU_SCORE7
+        select GENERIC_HAS_IOMAP
+
+config SCORE_SIM
+        bool "Score simulator"
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select CPU_SCORE7
+        select GENERIC_HAS_IOMAP
+endchoice
+
+endmenu
+
+config CPU_SCORE7
+        bool
+
+config GENERIC_IOMAP
+        def_bool y
+
+config NO_DMA
+        bool
+        default y
+
+config RWSEM_GENERIC_SPINLOCK
+        def_bool y
+
+config GENERIC_FIND_NEXT_BIT
+        def_bool y
+
+config GENERIC_HWEIGHT
+        def_bool y
+
+config GENERIC_CALIBRATE_DELAY
+        def_bool y
+
+config GENERIC_CLOCKEVENTS
+        def_bool y
+
+config GENERIC_TIME
+        def_bool y
+
+config SCHED_NO_NO_OMIT_FRAME_POINTER
+        def_bool y
+
+config GENERIC_HARDIRQS_NO__DO_IRQ
+        def_bool y
+
+config GENERIC_SYSCALL_TABLE
+        def_bool y
+
+config SCORE_L1_CACHE_SHIFT
+        int
+        default "4"
+
+menu "Kernel type"
+
+config 32BIT
+        def_bool y
+
+config GENERIC_HARDIRQS
+        def_bool y
+
+config ARCH_FLATMEM_ENABLE
+        def_bool y
+
+config ARCH_POPULATES_NODE_MAP
+        def_bool y
+
+source "mm/Kconfig"
+
+config MEMORY_START
+        hex
+        default 0xa0000000
+
+source "kernel/time/Kconfig"
+source "kernel/Kconfig.hz"
+source "kernel/Kconfig.preempt"
+
+endmenu
+
+config RWSEM_GENERIC_SPINLOCK
+        def_bool y
+
+config LOCKDEP_SUPPORT
+        def_bool y
+
+config STACKTRACE_SUPPORT
+        def_bool y
+
+source "init/Kconfig"
+
+config PROBE_INITRD_HEADER
+        bool "Probe initrd header created by addinitrd"
+        depends on BLK_DEV_INITRD
+        help
+          Probe initrd header at the last page of kernel image.
+          Say Y here if you are using arch/score/boot/addinitrd.c to
+          add initrd or initramfs image to the kernel image.
+          Otherwise, say N.
+
+config MMU
+        def_bool y
+
+menu "Executable file formats"
+
+source "fs/Kconfig.binfmt"
+
+endmenu
+
+source "net/Kconfig"
+
+source "drivers/Kconfig"
+
+source "fs/Kconfig"
+
+source "arch/score/Kconfig.debug"
+
+source "security/Kconfig"
+
+source "crypto/Kconfig"
+
+source "lib/Kconfig"
diff --git a/arch/score/Kconfig.debug b/arch/score/Kconfig.debug
new file mode 100644
index 000000000000..451ed54ce646
--- /dev/null
+++ b/arch/score/Kconfig.debug
@@ -0,0 +1,37 @@
+menu "Kernel hacking"
+
+config TRACE_IRQFLAGS_SUPPORT
+        bool
+        default y
+
+source "lib/Kconfig.debug"
+
+config CMDLINE
+        string "Default kernel command string"
+        default ""
+        help
+          On some platforms, there is currently no way for the boot loader to
+          pass arguments to the kernel. For these platforms, you can supply
+          some command-line options at build time by entering them here.  In
+          other cases you can specify kernel args so that you don't have
+          to set them up in board prom initialization routines.
+
+config DEBUG_STACK_USAGE
+        bool "Enable stack utilization instrumentation"
+        depends on DEBUG_KERNEL
+        help
+          Enables the display of the minimum amount of free stack which each
+          task has ever had available in the sysrq-T and sysrq-P debug output.
+
+          This option will slow down process creation somewhat.
+
+config RUNTIME_DEBUG
+        bool "Enable run-time debugging"
+        depends on DEBUG_KERNEL
+        help
+          If you say Y here, some debugging macros will do run-time checking.
+          If you say N here, those macros will mostly turn to no-ops.  See
+          include/asm-score/debug.h for debuging macros.
+          If unsure, say N.
+
+endmenu
diff --git a/arch/score/Makefile b/arch/score/Makefile
new file mode 100644
index 000000000000..68e0cd06d5c9
--- /dev/null
+++ b/arch/score/Makefile
@@ -0,0 +1,43 @@
+#
+# arch/score/Makefile
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+
+KBUILD_DEFCONFIG := spct6600_defconfig
+CROSS_COMPILE := score-linux-
+
+#
+# CPU-dependent compiler/assembler options for optimization.
+#
+cflags-y += -G0 -pipe -mel -mnhwloop -D__SCOREEL__ \
+        -D__linux__ -ffunction-sections -ffreestanding
+
+#
+# Board-dependent options and extra files
+#
+KBUILD_AFLAGS += $(cflags-y)
+KBUILD_CFLAGS += $(cflags-y)
+MODFLAGS += -mlong-calls
+LDFLAGS += --oformat elf32-littlescore
+LDFLAGS_vmlinux += -G0 -static -nostdlib
+
+head-y := arch/score/kernel/head.o
+libs-y += arch/score/lib/
+core-y += arch/score/kernel/ arch/score/mm/
+
+boot := arch/score/boot
+
+vmlinux.bin: vmlinux
+        $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
+
+archclean:
+        @$(MAKE) $(clean)=$(boot)
+
+define archhelp
+        echo '  vmlinux.bin          - Raw binary boot image'
+        echo
+        echo '  These will be default as apropriate for a configured platform.'
+endef
diff --git a/arch/score/boot/Makefile b/arch/score/boot/Makefile
new file mode 100644
index 000000000000..0c5fbd0fb696
--- /dev/null
+++ b/arch/score/boot/Makefile
@@ -0,0 +1,15 @@
+#
+# arch/score/boot/Makefile
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+
+targets := vmlinux.bin
+
+$(obj)/vmlinux.bin: vmlinux FORCE
+        $(call if_changed,objcopy)
+        @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
+
+clean-files += vmlinux.bin
diff --git a/arch/arm/configs/zylonite_defconfig b/arch/score/configs/spct6600_defconfig
index 7949d04a3602..e064943b13d4 100644
--- a/arch/arm/configs/zylonite_defconfig
+++ b/arch/score/configs/spct6600_defconfig
@@ -1,29 +1,65 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23
-# Tue Oct 23 13:33:20 2007
+# Linux kernel version: 2.6.30-rc5
+# Fri Jun 12 18:57:07 2009
 #
-CONFIG_ARM=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_GENERIC_TIME=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_GENERIC_IRQ_PROBE=y
+
+#
+# Machine selection
+#
+# CONFIG_ARCH_SCORE7 is not set
+CONFIG_MACH_SPCT6600=y
+# CONFIG_SCORE_SIM is not set
+CONFIG_CPU_SCORE7=y
+CONFIG_GENERIC_IOMAP=y
+CONFIG_NO_DMA=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ZONE_DMA=y
-CONFIG_ARCH_MTD_XIP=y
-CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_TIME=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_SYSCALL_TABLE=y
+CONFIG_SCORE_L1_CACHE_SHIFT=4
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_MEMORY_START=0xa0000000
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
@@ -33,60 +69,79 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
-CONFIG_LOG_BUF_SHIFT=18
+CONFIG_LOG_BUF_SHIFT=12
+# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_FAIR_GROUP_SCHED=y
-CONFIG_FAIR_USER_SCHED=y
-# CONFIG_FAIR_CGROUP_SCHED is not set
 CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
-# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
-# CONFIG_EMBEDDED is not set
-CONFIG_UID16=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
 CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLUB_DEBUG=y
-# CONFIG_SLAB is not set
-CONFIG_SLUB=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
-# CONFIG_MODULE_UNLOAD is not set
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+CONFIG_LBD=y
 # CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
 # IO Schedulers
@@ -100,203 +155,57 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_PROBE_INITRD_HEADER is not set
+CONFIG_MMU=y
 
 #
-# System Type
-#
-# CONFIG_ARCH_AAEC2000 is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_VERSATILE is not set
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_IOP13XX is not set
-# CONFIG_ARCH_IOP32X is not set
-# CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP23XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
-# CONFIG_ARCH_MXC is not set
-# CONFIG_ARCH_PNX4008 is not set
-CONFIG_ARCH_PXA=y
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_OMAP is not set
-
-#
-# Intel PXA2xx/PXA3xx Implementations
-#
-
-#
-# Supported PXA3xx Processor Variants
-#
-CONFIG_CPU_PXA300=y
-CONFIG_CPU_PXA310=y
-CONFIG_CPU_PXA320=y
-# CONFIG_ARCH_LUBBOCK is not set
-# CONFIG_MACH_LOGICPD_PXA270 is not set
-# CONFIG_MACH_MAINSTONE is not set
-# CONFIG_ARCH_PXA_IDP is not set
-# CONFIG_PXA_SHARPSL is not set
-# CONFIG_MACH_TRIZEPS4 is not set
-# CONFIG_MACH_EM_X270 is not set
-CONFIG_MACH_ZYLONITE=y
-# CONFIG_MACH_ARMCORE is not set
-CONFIG_PXA3xx=y
-
-#
-# Boot options
-#
-
-#
-# Power management
-#
-
-#
-# Processor Type
-#
-CONFIG_CPU_32=y
-CONFIG_CPU_XSC3=y
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_TLB_V4WBI=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_IO_36=y
-
-#
-# Processor Features
-#
-# CONFIG_ARM_THUMB is not set
-# CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
-CONFIG_IWMMXT=y
-
-#
-# Bus support
-#
-# CONFIG_PCI_SYSCALL is not set
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-# CONFIG_PCCARD is not set
-
-#
-# Kernel Features
-#
-# CONFIG_TICK_ONESHOT is not set
-# CONFIG_NO_HZ is not set
-# CONFIG_HIGH_RES_TIMERS is not set
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-# CONFIG_PREEMPT is not set
-CONFIG_HZ=100
-CONFIG_AEABI=y
-CONFIG_OABI_COMPAT=y
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
-CONFIG_VIRT_TO_BUS=y
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Boot options
-#
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfs/rootfs/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS0,38400 mem=64M debug"
-# CONFIG_XIP_KERNEL is not set
-# CONFIG_KEXEC is not set
-
-#
-# Floating point emulation
-#
-
-#
-# At least one emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-# CONFIG_FPE_FASTFPE is not set
-
-#
-# Userspace binary formats
+# Executable file formats
 #
 CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BINFMT_MISC is not set
-
-#
-# Power management options
-#
-# CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
-
-#
-# Networking
-#
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
 CONFIG_NET=y
 
 #
 # Networking options
 #
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
+# CONFIG_PACKET is not set
 CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
 CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_MULTICAST=y
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
+# CONFIG_IP_PNP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
+# CONFIG_IP_MROUTE is not set
+CONFIG_ARPD=y
 # CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
 # CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
@@ -304,6 +213,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -313,24 +223,21 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -341,17 +248,24 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # Generic Driver Options
 #
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 # CONFIG_MTD is not set
 # CONFIG_PARPORT is not set
-# CONFIG_BLK_DEV is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=y
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
 # CONFIG_MISC_DEVICES is not set
-# CONFIG_IDE is not set
 
 #
 # SCSI device support
@@ -360,28 +274,16 @@ CONFIG_FW_LOADER=y
 # CONFIG_SCSI is not set
 # CONFIG_SCSI_DMA is not set
 # CONFIG_SCSI_NETLINK is not set
-# CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 # CONFIG_VETH is not set
-# CONFIG_PHYLIB is not set
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_AX88796 is not set
-CONFIG_SMC91X=y
-# CONFIG_DM9000 is not set
-# CONFIG_SMC911X is not set
-# CONFIG_IBM_NEW_EMAC_ZMII is not set
-# CONFIG_IBM_NEW_EMAC_RGMII is not set
-# CONFIG_IBM_NEW_EMAC_TAH is not set
-# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-# CONFIG_B44 is not set
+# CONFIG_NET_ETHERNET is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 
@@ -390,14 +292,18 @@ CONFIG_SMC91X=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
 # CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
 
 #
 # Input device support
@@ -409,10 +315,7 @@ CONFIG_INPUT=y
 #
 # Userland interfaces
 #
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_JOYDEV is not set
 # CONFIG_INPUT_EVDEV is not set
 # CONFIG_INPUT_EVBUG is not set
@@ -437,10 +340,17 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Character devices
 #
 CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
 # CONFIG_VT_HW_CONSOLE_BINDING is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_DEVKMEM=y
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_RIO is not set
+CONFIG_STALDRV=y
 
 #
 # Serial drivers
@@ -450,45 +360,50 @@ CONFIG_HW_CONSOLE=y
 #
 # Non-8250 serial port support
 #
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
-# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
 # CONFIG_R3964 is not set
-# CONFIG_RAW_DRIVER is not set
+CONFIG_RAW_DRIVER=y
+CONFIG_MAX_RAW_DEVS=8192
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
-
-#
-# SPI support
-#
 # CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
-
-#
-# Sonics Silicon Backplane
-#
-CONFIG_SSB_POSSIBLE=y
-# CONFIG_SSB is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
 
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
 
 #
 # Multimedia devices
 #
+
+#
+# Multimedia core support
+#
 # CONFIG_VIDEO_DEV is not set
 # CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
 # CONFIG_DAB is not set
 
 #
@@ -496,32 +411,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
-CONFIG_FB=y
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB_DDC is not set
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-# CONFIG_FB_SYS_FILLRECT is not set
-# CONFIG_FB_SYS_COPYAREA is not set
-# CONFIG_FB_SYS_IMAGEBLIT is not set
-# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
-# CONFIG_FB_SVGALIB is not set
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-
-#
-# Frame buffer hardware drivers
-#
-# CONFIG_FB_S1D13XXX is not set
-CONFIG_FB_PXA=y
-# CONFIG_FB_PXA_PARAMETERS is not set
-# CONFIG_FB_MBX is not set
-# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB is not set
 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
@@ -534,56 +424,55 @@ CONFIG_FB_PXA=y
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-CONFIG_FONTS=y
-# CONFIG_FONT_8x8 is not set
-# CONFIG_FONT_8x16 is not set
-CONFIG_FONT_6x11=y
-# CONFIG_FONT_7x14 is not set
-# CONFIG_FONT_PEARL_8x8 is not set
-# CONFIG_FONT_ACORN_8x8 is not set
-# CONFIG_FONT_MINI_4x6 is not set
-# CONFIG_FONT_SUN8x16 is not set
-# CONFIG_FONT_SUN12x22 is not set
-# CONFIG_FONT_10x18 is not set
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_LOGO_LINUX_CLUT224=y
-
-#
-# Sound
-#
 # CONFIG_SOUND is not set
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 # CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
-CONFIG_RTC_LIB=y
+# CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
 
 #
 # File systems
 #
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_INOTIFY is not set
-# CONFIG_QUOTA is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
 # CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
 
 #
 # CD-ROM/DVD Filesystems
@@ -602,43 +491,51 @@ CONFIG_DNOTIFY=y
 # Pseudo filesystems
 #
 CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
 CONFIG_PROC_SYSCTL=y
+# CONFIG_PROC_PAGE_MONITOR is not set
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_HFSPLUS_FS is not set
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
-CONFIG_NFS_DIRECTIO=y
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
 CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_BIND34 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -654,83 +551,167 @@ CONFIG_RPCSEC_GSS_KRB5=y
 CONFIG_MSDOS_PARTITION=y
 # CONFIG_NLS is not set
 # CONFIG_DLM is not set
-# CONFIG_INSTRUMENTATION is not set
 
 #
 # Kernel hacking
 #
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SLUB_DEBUG_ON is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
-CONFIG_DEBUG_USER=y
+CONFIG_CMDLINE=""
 
 #
 # Security options
 #
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
+CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+# CONFIG_SECURITY_PATH is not set
+CONFIG_SECURITY_FILE_CAPABILITIES=y
+CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+# CONFIG_SECURITY_TOMOYO is not set
 CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CRYPTO_CRYPTD=y
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_MD4=y
 CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
 # CONFIG_CRYPTO_SHA1 is not set
 # CONFIG_CRYPTO_SHA256 is not set
 # CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
 # CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=y
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
 # CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
 # CONFIG_CRYPTO_CAST5 is not set
 # CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
 # CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SALSA20 is not set
 # CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
 # CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
 # CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_PLIST=y
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/score/include/asm/Kbuild b/arch/score/include/asm/Kbuild
new file mode 100644
index 000000000000..b367abd4620f
--- /dev/null
+++ b/arch/score/include/asm/Kbuild
@@ -0,0 +1,3 @@
+include include/asm-generic/Kbuild.asm
+
+header-y +=
diff --git a/arch/score/include/asm/asmmacro.h b/arch/score/include/asm/asmmacro.h
new file mode 100644
index 000000000000..a04a54cea25d
--- /dev/null
+++ b/arch/score/include/asm/asmmacro.h
@@ -0,0 +1,161 @@
+#ifndef _ASM_SCORE_ASMMACRO_H
+#define _ASM_SCORE_ASMMACRO_H
+
+#include <asm/asm-offsets.h>
+
+#ifdef __ASSEMBLY__
+
+.macro  SAVE_ALL
+        mfcr    r30, cr0
+        mv      r31, r0
+        nop
+        /* if UMs == 1, change stack. */
+        slli.c  r30, r30, 28
+        bpl     1f
+        la      r31, kernelsp
+        lw      r31, [r31]
+1:
+        mv      r30, r0
+        addri   r0, r31, -PT_SIZE
+
+        sw      r30, [r0, PT_R0]
+        .set    r1
+        sw      r1, [r0, PT_R1]
+        .set    nor1
+        sw      r2, [r0, PT_R2]
+        sw      r3, [r0, PT_R3]
+        sw      r4, [r0, PT_R4]
+        sw      r5, [r0, PT_R5]
+        sw      r6, [r0, PT_R6]
+        sw      r7, [r0, PT_R7]
+
+        sw      r8, [r0, PT_R8]
+        sw      r9, [r0, PT_R9]
+        sw      r10, [r0, PT_R10]
+        sw      r11, [r0, PT_R11]
+        sw      r12, [r0, PT_R12]
+        sw      r13, [r0, PT_R13]
+        sw      r14, [r0, PT_R14]
+        sw      r15, [r0, PT_R15]
+
+        sw      r16, [r0, PT_R16]
+        sw      r17, [r0, PT_R17]
+        sw      r18, [r0, PT_R18]
+        sw      r19, [r0, PT_R19]
+        sw      r20, [r0, PT_R20]
+        sw      r21, [r0, PT_R21]
+        sw      r22, [r0, PT_R22]
+        sw      r23, [r0, PT_R23]
+
+        sw      r24, [r0, PT_R24]
+        sw      r25, [r0, PT_R25]
+        sw      r25, [r0, PT_R25]
+        sw      r26, [r0, PT_R26]
+        sw      r27, [r0, PT_R27]
+
+        sw      r28, [r0, PT_R28]
+        sw      r29, [r0, PT_R29]
+        orri    r28, r0, 0x1fff
+        li      r31, 0x00001fff
+        xor     r28, r28, r31
+
+        mfcehl  r30, r31
+        sw      r30, [r0, PT_CEH]
+        sw      r31, [r0, PT_CEL]
+
+        mfcr    r31, cr0
+        sw      r31, [r0, PT_PSR]
+
+        mfcr    r31, cr1
+        sw      r31, [r0, PT_CONDITION]
+
+        mfcr    r31, cr2
+        sw      r31, [r0, PT_ECR]
+        
+        mfcr    r31, cr5
+        srli    r31, r31, 1
+        slli    r31, r31, 1
+        sw      r31, [r0, PT_EPC]
+.endm
+
+.macro  RESTORE_ALL_AND_RET
+        mfcr    r30, cr0
+        srli    r30, r30, 1
+        slli    r30, r30, 1
+        mtcr    r30, cr0
+        nop
+        nop
+        nop
+        nop
+        nop
+
+        .set    r1
+        ldis    r1, 0x00ff
+        and     r30, r30, r1
+        not     r1, r1
+        lw      r31, [r0, PT_PSR]
+        and     r31, r31, r1
+        .set    nor1
+        or      r31, r31, r30
+        mtcr    r31, cr0
+        nop
+        nop
+        nop
+        nop
+        nop
+
+        lw      r30, [r0, PT_CONDITION]
+        mtcr    r30, cr1
+        nop
+        nop
+        nop
+        nop
+        nop
+
+        lw      r30, [r0, PT_CEH]
+        lw      r31, [r0, PT_CEL]
+        mtcehl  r30, r31
+
+        .set    r1
+        lw      r1, [r0, PT_R1]
+        .set    nor1
+        lw      r2, [r0, PT_R2]
+        lw      r3, [r0, PT_R3]
+        lw      r4, [r0, PT_R4]
+        lw      r5, [r0, PT_R5]
+        lw      r6, [r0, PT_R6]
+        lw      r7, [r0, PT_R7]
+
+        lw      r8, [r0, PT_R8]
+        lw      r9, [r0, PT_R9]
+        lw      r10, [r0, PT_R10]
+        lw      r11, [r0, PT_R11]
+        lw      r12, [r0, PT_R12]
+        lw      r13, [r0, PT_R13]
+        lw      r14, [r0, PT_R14]
+        lw      r15, [r0, PT_R15]
+
+        lw      r16, [r0, PT_R16]
+        lw      r17, [r0, PT_R17]
+        lw      r18, [r0, PT_R18]
+        lw      r19, [r0, PT_R19]
+        lw      r20, [r0, PT_R20]
+        lw      r21, [r0, PT_R21]
+        lw      r22, [r0, PT_R22]
+        lw      r23, [r0, PT_R23]
+
+        lw      r24, [r0, PT_R24]
+        lw      r25, [r0, PT_R25]
+        lw      r26, [r0, PT_R26]
+        lw      r27, [r0, PT_R27]
+        lw      r28, [r0, PT_R28]
+        lw      r29, [r0, PT_R29]
+
+        lw      r30, [r0, PT_EPC]
+        lw      r0, [r0, PT_R0]
+        mtcr    r30, cr5
+        rte
+.endm
+
+#endif /* __ASSEMBLY__ */
+#endif /* _ASM_SCORE_ASMMACRO_H */
diff --git a/arch/score/include/asm/atomic.h b/arch/score/include/asm/atomic.h
new file mode 100644
index 000000000000..84eb8ddf9f3f
--- /dev/null
+++ b/arch/score/include/asm/atomic.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_ATOMIC_H
+#define _ASM_SCORE_ATOMIC_H
+
+#include <asm-generic/atomic.h>
+
+#endif /* _ASM_SCORE_ATOMIC_H */
diff --git a/arch/score/include/asm/auxvec.h b/arch/score/include/asm/auxvec.h
new file mode 100644
index 000000000000..f69151565aee
--- /dev/null
+++ b/arch/score/include/asm/auxvec.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_SCORE_AUXVEC_H
+#define _ASM_SCORE_AUXVEC_H
+
+#endif /* _ASM_SCORE_AUXVEC_H */
diff --git a/arch/score/include/asm/bitops.h b/arch/score/include/asm/bitops.h
new file mode 100644
index 000000000000..2763b050fca8
--- /dev/null
+++ b/arch/score/include/asm/bitops.h
@@ -0,0 +1,16 @@
+#ifndef _ASM_SCORE_BITOPS_H
+#define _ASM_SCORE_BITOPS_H
+
+#include <asm/byteorder.h> /* swab32 */
+#include <asm/system.h> /* save_flags */
+
+/*
+ * clear_bit() doesn't provide any barrier for the compiler.
+ */
+#define smp_mb__before_clear_bit()      barrier()
+#define smp_mb__after_clear_bit()       barrier()
+
+#include <asm-generic/bitops.h>
+#include <asm-generic/bitops/__fls.h>
+
+#endif /* _ASM_SCORE_BITOPS_H */
diff --git a/arch/score/include/asm/bitsperlong.h b/arch/score/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..86ff337aa459
--- /dev/null
+++ b/arch/score/include/asm/bitsperlong.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_BITSPERLONG_H
+#define _ASM_SCORE_BITSPERLONG_H
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* _ASM_SCORE_BITSPERLONG_H */
diff --git a/arch/score/include/asm/bug.h b/arch/score/include/asm/bug.h
new file mode 100644
index 000000000000..bb76a330bcf1
--- /dev/null
+++ b/arch/score/include/asm/bug.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_BUG_H
+#define _ASM_SCORE_BUG_H
+
+#include <asm-generic/bug.h>
+
+#endif /* _ASM_SCORE_BUG_H */
diff --git a/arch/score/include/asm/bugs.h b/arch/score/include/asm/bugs.h
new file mode 100644
index 000000000000..a062e1056bb3
--- /dev/null
+++ b/arch/score/include/asm/bugs.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_BUGS_H
+#define _ASM_SCORE_BUGS_H
+
+#include <asm-generic/bugs.h>
+
+#endif /* _ASM_SCORE_BUGS_H */
diff --git a/arch/score/include/asm/byteorder.h b/arch/score/include/asm/byteorder.h
new file mode 100644
index 000000000000..88cbebc79212
--- /dev/null
+++ b/arch/score/include/asm/byteorder.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_BYTEORDER_H
+#define _ASM_SCORE_BYTEORDER_H
+
+#include <linux/byteorder/little_endian.h>
+
+#endif /* _ASM_SCORE_BYTEORDER_H */
diff --git a/arch/score/include/asm/cache.h b/arch/score/include/asm/cache.h
new file mode 100644
index 000000000000..ae3d59f2d2c4
--- /dev/null
+++ b/arch/score/include/asm/cache.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_SCORE_CACHE_H
+#define _ASM_SCORE_CACHE_H
+
+#define L1_CACHE_SHIFT          4
+#define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
+
+#endif /* _ASM_SCORE_CACHE_H */
diff --git a/arch/score/include/asm/cacheflush.h b/arch/score/include/asm/cacheflush.h
new file mode 100644
index 000000000000..07cc8fc457cd
--- /dev/null
+++ b/arch/score/include/asm/cacheflush.h
@@ -0,0 +1,45 @@
+#ifndef _ASM_SCORE_CACHEFLUSH_H
+#define _ASM_SCORE_CACHEFLUSH_H
+
+/* Keep includes the same across arches. */
+#include <linux/mm.h>
+
+extern void flush_cache_all(void);
+extern void flush_cache_mm(struct mm_struct *mm);
+extern void flush_cache_range(struct vm_area_struct *vma,
+                                unsigned long start, unsigned long end);
+extern void flush_cache_page(struct vm_area_struct *vma,
+                                unsigned long page, unsigned long pfn);
+extern void flush_cache_sigtramp(unsigned long addr);
+extern void flush_icache_all(void);
+extern void flush_icache_range(unsigned long start, unsigned long end);
+extern void flush_dcache_range(unsigned long start, unsigned long end);
+
+#define flush_cache_dup_mm(mm)                  do {} while (0)
+#define flush_dcache_page(page)                 do {} while (0)
+#define flush_dcache_mmap_lock(mapping)         do {} while (0)
+#define flush_dcache_mmap_unlock(mapping)       do {} while (0)
+#define flush_cache_vmap(start, end)            do {} while (0)
+#define flush_cache_vunmap(start, end)          do {} while (0)
+
+static inline void flush_icache_page(struct vm_area_struct *vma,
+        struct page *page)
+{
+        if (vma->vm_flags & VM_EXEC) {
+                void *v = page_address(page);
+                flush_icache_range((unsigned long) v,
+                                (unsigned long) v + PAGE_SIZE);
+        }
+}
+
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+        memcpy(dst, src, len)
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len)      \
+        do {                                                    \
+                memcpy(dst, src, len);                          \
+                if ((vma->vm_flags & VM_EXEC))                  \
+                        flush_cache_page(vma, vaddr, page_to_pfn(page));\
+        } while (0)
+
+#endif /* _ASM_SCORE_CACHEFLUSH_H */
diff --git a/arch/score/include/asm/checksum.h b/arch/score/include/asm/checksum.h
new file mode 100644
index 000000000000..f909ac3144a4
--- /dev/null
+++ b/arch/score/include/asm/checksum.h
@@ -0,0 +1,235 @@
+#ifndef _ASM_SCORE_CHECKSUM_H
+#define _ASM_SCORE_CHECKSUM_H
+
+#include <linux/in6.h>
+#include <asm/uaccess.h>
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+unsigned int csum_partial(const void *buff, int len, __wsum sum);
+unsigned int csum_partial_copy_from_user(const char *src, char *dst, int len,
+                                        unsigned int sum, int *csum_err);
+unsigned int csum_partial_copy(const char *src, char *dst,
+                                        int len, unsigned int sum);
+
+/*
+ * this is a new version of the above that records errors it finds in *errp,
+ * but continues and zeros the rest of the buffer.
+ */
+
+/*
+ * Copy and checksum to user
+ */
+#define HAVE_CSUM_COPY_USER
+static inline
+__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
+                        __wsum sum, int *err_ptr)
+{
+        sum = csum_partial(src, len, sum);
+        if (copy_to_user(dst, src, len)) {
+                *err_ptr = -EFAULT;
+                return (__force __wsum) -1; /* invalid checksum */
+        }
+        return sum;
+}
+
+
+#define csum_partial_copy_nocheck csum_partial_copy
+/*
+ *      Fold a partial checksum without adding pseudo headers
+ */
+
+static inline __sum16 csum_fold(__wsum sum)
+{
+        /* the while loop is unnecessary really, it's always enough with two
+           iterations */
+        __asm__ __volatile__(
+                ".set volatile\n\t"
+                ".set\tr1\n\t"
+                "slli\tr1,%0, 16\n\t"
+                "add\t%0,%0, r1\n\t"
+                "cmp.c\tr1, %0\n\t"
+                "srli\t%0, %0, 16\n\t"
+                "bleu\t1f\n\t"
+                "addi\t%0, 0x1\n\t"
+                "1:ldi\tr30, 0xffff\n\t"
+                "xor\t%0, %0, r30\n\t"
+                "slli\t%0, %0, 16\n\t"
+                "srli\t%0, %0, 16\n\t"
+                ".set\tnor1\n\t"
+                ".set optimize\n\t"
+                : "=r" (sum)
+                : "0" (sum));
+        return sum;
+}
+
+/*
+ *      This is a version of ip_compute_csum() optimized for IP headers,
+ *      which always checksum on 4 octet boundaries.
+ *
+ *      By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by
+ *      Arnt Gulbrandsen.
+ */
+static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+        unsigned int sum;
+        unsigned long dummy;
+
+        __asm__ __volatile__(
+                ".set volatile\n\t"
+                ".set\tnor1\n\t"
+                "lw\t%0, [%1]\n\t"
+                "subri\t%2, %2, 4\n\t"
+                "slli\t%2, %2, 2\n\t"
+                "lw\t%3, [%1, 4]\n\t"
+                "add\t%2, %2, %1\n\t"
+                "add\t%0, %0, %3\n\t"
+                "cmp.c\t%3, %0\n\t"
+                "lw\t%3, [%1, 8]\n\t"
+                "bleu\t1f\n\t"
+                "addi\t%0, 0x1\n\t"
+                "1:\n\t"
+                "add\t%0, %0, %3\n\t"
+                "cmp.c\t%3, %0\n\t"
+                "lw\t%3, [%1, 12]\n\t"
+                "bleu\t1f\n\t"
+                "addi\t%0, 0x1\n\t"
+                "1:add\t%0, %0, %3\n\t"
+                "cmp.c\t%3, %0\n\t"
+                "bleu\t1f\n\t"
+                "addi\t%0, 0x1\n"
+
+                "1:\tlw\t%3, [%1, 16]\n\t"
+                "addi\t%1, 4\n\t"
+                "add\t%0, %0, %3\n\t"
+                "cmp.c\t%3, %0\n\t"
+                "bleu\t2f\n\t"
+                "addi\t%0, 0x1\n"
+                "2:cmp.c\t%2, %1\n\t"
+                "bne\t1b\n\t"
+
+                ".set\tr1\n\t"
+                ".set optimize\n\t"
+                : "=&r" (sum), "=&r" (iph), "=&r" (ihl), "=&r" (dummy)
+                : "1" (iph), "2" (ihl));
+
+        return csum_fold(sum);
+}
+
+static inline __wsum
+csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
+                unsigned short proto, __wsum sum)
+{
+        unsigned long tmp = (ntohs(len) << 16) + proto * 256;
+        __asm__ __volatile__(
+                ".set volatile\n\t"
+                "add\t%0, %0, %2\n\t"
+                "cmp.c\t%2, %0\n\t"
+                "bleu\t1f\n\t"
+                "addi\t%0, 0x1\n\t"
+                "1:\n\t"
+                "add\t%0, %0, %3\n\t"
+                "cmp.c\t%3, %0\n\t"
+                "bleu\t1f\n\t"
+                "addi\t%0, 0x1\n\t"
+                "1:\n\t"
+                "add\t%0, %0, %4\n\t"
+                "cmp.c\t%4, %0\n\t"
+                "bleu\t1f\n\t"
+                "addi\t%0, 0x1\n\t"
+                "1:\n\t"
+                ".set optimize\n\t"
+                : "=r" (sum)
+                : "0" (daddr), "r"(saddr),
+                "r" (tmp),
+                "r" (sum));
+        return sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16
+csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
+                unsigned short proto, __wsum sum)
+{
+        return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
+}
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+
+static inline unsigned short ip_compute_csum(const void *buff, int len)
+{
+        return csum_fold(csum_partial(buff, len, 0));
+}
+
+#define _HAVE_ARCH_IPV6_CSUM
+static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
+                                const struct in6_addr *daddr,
+                                __u32 len, unsigned short proto,
+                                __wsum sum)
+{
+        __asm__ __volatile__(
+                ".set\tnoreorder\t\t\t# csum_ipv6_magic\n\t"
+                ".set\tnoat\n\t"
+                "addu\t%0, %5\t\t\t# proto (long in network byte order)\n\t"
+                "sltu\t$1, %0, %5\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %6\t\t\t# csum\n\t"
+                "sltu\t$1, %0, %6\n\t"
+                "lw\t%1, 0(%2)\t\t\t# four words source address\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "lw\t%1, 4(%2)\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "lw\t%1, 8(%2)\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "lw\t%1, 12(%2)\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "lw\t%1, 0(%3)\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "lw\t%1, 4(%3)\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "lw\t%1, 8(%3)\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "lw\t%1, 12(%3)\n\t"
+                "addu\t%0, $1\n\t"
+                "addu\t%0, %1\n\t"
+                "sltu\t$1, %0, %1\n\t"
+                "addu\t%0, $1\t\t\t# Add final carry\n\t"
+                ".set\tnoat\n\t"
+                ".set\tnoreorder"
+                : "=r" (sum), "=r" (proto)
+                : "r" (saddr), "r" (daddr),
+                  "0" (htonl(len)), "1" (htonl(proto)), "r" (sum));
+
+        return csum_fold(sum);
+}
+#endif /* _ASM_SCORE_CHECKSUM_H */
diff --git a/arch/score/include/asm/cputime.h b/arch/score/include/asm/cputime.h
new file mode 100644
index 000000000000..1fced99f0d67
--- /dev/null
+++ b/arch/score/include/asm/cputime.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_CPUTIME_H
+#define _ASM_SCORE_CPUTIME_H
+
+#include <asm-generic/cputime.h>
+
+#endif /* _ASM_SCORE_CPUTIME_H */
diff --git a/arch/score/include/asm/current.h b/arch/score/include/asm/current.h
new file mode 100644
index 000000000000..16eae9cbaf1a
--- /dev/null
+++ b/arch/score/include/asm/current.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_CURRENT_H
+#define _ASM_SCORE_CURRENT_H
+
+#include <asm-generic/current.h>
+
+#endif /* _ASM_SCORE_CURRENT_H */
diff --git a/arch/score/include/asm/delay.h b/arch/score/include/asm/delay.h
new file mode 100644
index 000000000000..6726ec199dc0
--- /dev/null
+++ b/arch/score/include/asm/delay.h
@@ -0,0 +1,26 @@
+#ifndef _ASM_SCORE_DELAY_H
+#define _ASM_SCORE_DELAY_H
+
+static inline void __delay(unsigned long loops)
+{
+        /* 3 cycles per loop. */
+        __asm__ __volatile__ (
+                "1:\tsubi\t%0, 3\n\t"
+                "cmpz.c\t%0\n\t"
+                "ble\t1b\n\t"
+                : "=r" (loops)
+                : "0" (loops));
+}
+
+static inline void __udelay(unsigned long usecs)
+{
+        unsigned long loops_per_usec;
+
+        loops_per_usec = (loops_per_jiffy * HZ) / 1000000;
+
+        __delay(usecs * loops_per_usec);
+}
+
+#define udelay(usecs) __udelay(usecs)
+
+#endif /* _ASM_SCORE_DELAY_H */
diff --git a/arch/score/include/asm/device.h b/arch/score/include/asm/device.h
new file mode 100644
index 000000000000..2dc7cc5d5ef9
--- /dev/null
+++ b/arch/score/include/asm/device.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_DEVICE_H
+#define _ASM_SCORE_DEVICE_H
+
+#include <asm-generic/device.h>
+
+#endif /* _ASM_SCORE_DEVICE_H */
diff --git a/arch/score/include/asm/div64.h b/arch/score/include/asm/div64.h
new file mode 100644
index 000000000000..75fae19824eb
--- /dev/null
+++ b/arch/score/include/asm/div64.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_DIV64_H
+#define _ASM_SCORE_DIV64_H
+
+#include <asm-generic/div64.h>
+
+#endif /* _ASM_SCORE_DIV64_H */
diff --git a/arch/score/include/asm/dma-mapping.h b/arch/score/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..f9c0193c7a53
--- /dev/null
+++ b/arch/score/include/asm/dma-mapping.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_DMA_MAPPING_H
+#define _ASM_SCORE_DMA_MAPPING_H
+
+#include <asm-generic/dma-mapping-broken.h>
+
+#endif /* _ASM_SCORE_DMA_MAPPING_H */
diff --git a/arch/score/include/asm/dma.h b/arch/score/include/asm/dma.h
new file mode 100644
index 000000000000..9f44185298bf
--- /dev/null
+++ b/arch/score/include/asm/dma.h
@@ -0,0 +1,8 @@
+#ifndef _ASM_SCORE_DMA_H
+#define _ASM_SCORE_DMA_H
+
+#include <asm/io.h>
+
+#define MAX_DMA_ADDRESS         (0)
+
+#endif /* _ASM_SCORE_DMA_H */
diff --git a/arch/score/include/asm/elf.h b/arch/score/include/asm/elf.h
new file mode 100644
index 000000000000..43526d9fda93
--- /dev/null
+++ b/arch/score/include/asm/elf.h
@@ -0,0 +1,103 @@
+#ifndef _ASM_SCORE_ELF_H
+#define _ASM_SCORE_ELF_H
+
+#include <linux/ptrace.h>
+
+#define EM_SCORE7       135
+
+/* Relocation types. */
+#define R_SCORE_NONE            0
+#define R_SCORE_HI16            1
+#define R_SCORE_LO16            2
+#define R_SCORE_BCMP            3
+#define R_SCORE_24              4
+#define R_SCORE_PC19            5
+#define R_SCORE16_11            6
+#define R_SCORE16_PC8           7
+#define R_SCORE_ABS32           8
+#define R_SCORE_ABS16           9
+#define R_SCORE_DUMMY2          10
+#define R_SCORE_GP15            11
+#define R_SCORE_GNU_VTINHERIT   12
+#define R_SCORE_GNU_VTENTRY     13
+#define R_SCORE_GOT15           14
+#define R_SCORE_GOT_LO16        15
+#define R_SCORE_CALL15          16
+#define R_SCORE_GPREL32         17
+#define R_SCORE_REL32           18
+#define R_SCORE_DUMMY_HI16      19
+#define R_SCORE_IMM30           20
+#define R_SCORE_IMM32           21
+
+/* ELF register definitions */
+typedef unsigned long   elf_greg_t;
+
+#define ELF_NGREG       (sizeof(struct pt_regs) / sizeof(elf_greg_t))
+typedef elf_greg_t      elf_gregset_t[ELF_NGREG];
+
+/* Score does not have fp regs. */
+typedef double          elf_fpreg_t;
+typedef elf_fpreg_t     elf_fpregset_t;
+
+#define elf_check_arch(x)       ((x)->e_machine == EM_SCORE7)
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS       ELFCLASS32
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_DATA        ELFDATA2LSB
+#define ELF_ARCH        EM_SCORE7
+
+#define SET_PERSONALITY(ex)                                     \
+do {                                                            \
+        set_personality(PER_LINUX);                             \
+} while (0)
+
+struct task_struct;
+struct pt_regs;
+
+#define CORE_DUMP_USE_REGSET
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE       PAGE_SIZE
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this cpu supports.  This could be done in userspace,
+   but it's not easy, and we've already done it here.  */
+
+#define ELF_HWCAP       (0)
+
+/* This yields a string that ld.so will use to load implementation
+   specific libraries for optimization.  This is more specific in
+   intent than poking at uname or /proc/cpuinfo.
+
+   For the moment, we have only optimizations for the Intel generations,
+   but that could change... */
+
+#define ELF_PLATFORM    (NULL)
+
+#define ELF_PLAT_INIT(_r, load_addr)                                    \
+do {                                                                    \
+        _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0;      \
+        _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0;      \
+        _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0;   \
+        _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0;  \
+        _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0;  \
+        _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0;  \
+        _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0;  \
+        _r->regs[30] = _r->regs[31] = 0;                                \
+} while (0)
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#ifndef ELF_ET_DYN_BASE
+#define ELF_ET_DYN_BASE         (TASK_SIZE / 3 * 2)
+#endif
+
+#endif /* _ASM_SCORE_ELF_H */
diff --git a/arch/score/include/asm/emergency-restart.h b/arch/score/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..ca31e9803a8a
--- /dev/null
+++ b/arch/score/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_EMERGENCY_RESTART_H
+#define _ASM_SCORE_EMERGENCY_RESTART_H
+
+#include <asm-generic/emergency-restart.h>
+
+#endif /* _ASM_SCORE_EMERGENCY_RESTART_H */
diff --git a/arch/score/include/asm/errno.h b/arch/score/include/asm/errno.h
new file mode 100644
index 000000000000..29ff39d5ab47
--- /dev/null
+++ b/arch/score/include/asm/errno.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_ERRNO_H
+#define _ASM_SCORE_ERRNO_H
+
+#include <asm-generic/errno.h>
+
+#endif /* _ASM_SCORE_ERRNO_H */
diff --git a/arch/score/include/asm/fcntl.h b/arch/score/include/asm/fcntl.h
new file mode 100644
index 000000000000..03968a3103a4
--- /dev/null
+++ b/arch/score/include/asm/fcntl.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_FCNTL_H
+#define _ASM_SCORE_FCNTL_H
+
+#include <asm-generic/fcntl.h>
+
+#endif /* _ASM_SCORE_FCNTL_H */
diff --git a/arch/score/include/asm/fixmap.h b/arch/score/include/asm/fixmap.h
new file mode 100644
index 000000000000..ee1676694024
--- /dev/null
+++ b/arch/score/include/asm/fixmap.h
@@ -0,0 +1,82 @@
+#ifndef _ASM_SCORE_FIXMAP_H
+#define _ASM_SCORE_FIXMAP_H
+
+#include <asm/page.h>
+
+#define PHY_RAM_BASE            0x00000000
+#define PHY_IO_BASE             0x10000000
+
+#define VIRTUAL_RAM_BASE        0xa0000000
+#define VIRTUAL_IO_BASE         0xb0000000
+
+#define RAM_SPACE_SIZE          0x10000000
+#define IO_SPACE_SIZE           0x10000000
+
+/* Kernel unmapped, cached 512MB */
+#define KSEG1                   0xa0000000
+
+/*
+ * Here we define all the compile-time 'special' virtual
+ * addresses. The point is to have a constant address at
+ * compile time, but to set the physical address only
+ * in the boot process. We allocate these special addresses
+ * from the end of virtual memory (0xfffff000) backwards.
+ * Also this lets us do fail-safe vmalloc(), we
+ * can guarantee that these special addresses and
+ * vmalloc()-ed addresses never overlap.
+ *
+ * these 'compile-time allocated' memory buffers are
+ * fixed-size 4k pages. (or larger if used with an increment
+ * highger than 1) use fixmap_set(idx,phys) to associate
+ * physical memory with fixmap indices.
+ *
+ * TLB entries of such buffers will not be flushed across
+ * task switches.
+ */
+
+/*
+ * on UP currently we will have no trace of the fixmap mechanizm,
+ * no page table allocations, etc. This might change in the
+ * future, say framebuffers for the console driver(s) could be
+ * fix-mapped?
+ */
+enum fixed_addresses {
+#define FIX_N_COLOURS 8
+        FIX_CMAP_BEGIN,
+        FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS,
+        __end_of_fixed_addresses
+};
+
+/*
+ * used by vmalloc.c.
+ *
+ * Leave one empty page between vmalloc'ed areas and
+ * the start of the fixmap, and leave one page empty
+ * at the top of mem..
+ */
+#define FIXADDR_TOP     ((unsigned long)(long)(int)0xfefe0000)
+#define FIXADDR_SIZE    (__end_of_fixed_addresses << PAGE_SHIFT)
+#define FIXADDR_START   (FIXADDR_TOP - FIXADDR_SIZE)
+
+#define __fix_to_virt(x)        (FIXADDR_TOP - ((x) << PAGE_SHIFT))
+#define __virt_to_fix(x)        \
+        ((FIXADDR_TOP - ((x) & PAGE_MASK)) >> PAGE_SHIFT)
+
+extern void __this_fixmap_does_not_exist(void);
+
+/*
+ * 'index to address' translation. If anyone tries to use the idx
+ * directly without tranlation, we catch the bug with a NULL-deference
+ * kernel oops. Illegal ranges of incoming indices are caught too.
+ */
+static inline unsigned long fix_to_virt(const unsigned int idx)
+{
+        return __fix_to_virt(idx);
+}
+
+static inline unsigned long virt_to_fix(const unsigned long vaddr)
+{
+        return __virt_to_fix(vaddr);
+}
+
+#endif /* _ASM_SCORE_FIXMAP_H */
diff --git a/arch/score/include/asm/ftrace.h b/arch/score/include/asm/ftrace.h
new file mode 100644
index 000000000000..79d6f10e1f5b
--- /dev/null
+++ b/arch/score/include/asm/ftrace.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_SCORE_FTRACE_H
+#define _ASM_SCORE_FTRACE_H
+
+#endif /* _ASM_SCORE_FTRACE_H */
diff --git a/arch/score/include/asm/futex.h b/arch/score/include/asm/futex.h
new file mode 100644
index 000000000000..1dca2420f8db
--- /dev/null
+++ b/arch/score/include/asm/futex.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_FUTEX_H
+#define _ASM_SCORE_FUTEX_H
+
+#include <asm-generic/futex.h>
+
+#endif /* _ASM_SCORE_FUTEX_H */
diff --git a/arch/score/include/asm/hardirq.h b/arch/score/include/asm/hardirq.h
new file mode 100644
index 000000000000..dc932c50d3ee
--- /dev/null
+++ b/arch/score/include/asm/hardirq.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_HARDIRQ_H
+#define _ASM_SCORE_HARDIRQ_H
+
+#include <asm-generic/hardirq.h>
+
+#endif /* _ASM_SCORE_HARDIRQ_H */
diff --git a/arch/score/include/asm/hw_irq.h b/arch/score/include/asm/hw_irq.h
new file mode 100644
index 000000000000..4caafb2b509a
--- /dev/null
+++ b/arch/score/include/asm/hw_irq.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_SCORE_HW_IRQ_H
+#define _ASM_SCORE_HW_IRQ_H
+
+#endif /* _ASM_SCORE_HW_IRQ_H */
diff --git a/arch/score/include/asm/io.h b/arch/score/include/asm/io.h
new file mode 100644
index 000000000000..fbbfd7132e3b
--- /dev/null
+++ b/arch/score/include/asm/io.h
@@ -0,0 +1,9 @@
+#ifndef _ASM_SCORE_IO_H
+#define _ASM_SCORE_IO_H
+
+#include <asm-generic/io.h>
+
+#define virt_to_bus     virt_to_phys
+#define bus_to_virt     phys_to_virt
+
+#endif /* _ASM_SCORE_IO_H */
diff --git a/arch/score/include/asm/ioctl.h b/arch/score/include/asm/ioctl.h
new file mode 100644
index 000000000000..a351d2194bfd
--- /dev/null
+++ b/arch/score/include/asm/ioctl.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_IOCTL_H
+#define _ASM_SCORE_IOCTL_H
+
+#include <asm-generic/ioctl.h>
+
+#endif /* _ASM_SCORE_IOCTL_H */
diff --git a/arch/score/include/asm/ioctls.h b/arch/score/include/asm/ioctls.h
new file mode 100644
index 000000000000..ed01d2b9aeab
--- /dev/null
+++ b/arch/score/include/asm/ioctls.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_IOCTLS_H
+#define _ASM_SCORE_IOCTLS_H
+
+#include <asm-generic/ioctls.h>
+
+#endif /* _ASM_SCORE_IOCTLS_H */
diff --git a/arch/score/include/asm/ipcbuf.h b/arch/score/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..e082ceff1818
--- /dev/null
+++ b/arch/score/include/asm/ipcbuf.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_IPCBUF_H
+#define _ASM_SCORE_IPCBUF_H
+
+#include <asm-generic/ipcbuf.h>
+
+#endif /* _ASM_SCORE_IPCBUF_H */
diff --git a/arch/score/include/asm/irq.h b/arch/score/include/asm/irq.h
new file mode 100644
index 000000000000..c883f3df33fa
--- /dev/null
+++ b/arch/score/include/asm/irq.h
@@ -0,0 +1,25 @@
+#ifndef _ASM_SCORE_IRQ_H
+#define _ASM_SCORE_IRQ_H
+
+#define EXCEPTION_VECTOR_BASE_ADDR      0xa0000000
+#define VECTOR_ADDRESS_OFFSET_MODE4     0
+#define VECTOR_ADDRESS_OFFSET_MODE16    1
+
+#define DEBUG_VECTOR_SIZE               (0x4)
+#define DEBUG_VECTOR_BASE_ADDR          ((EXCEPTION_VECTOR_BASE_ADDR) + 0x1fc)
+
+#define GENERAL_VECTOR_SIZE             (0x10)
+#define GENERAL_VECTOR_BASE_ADDR        ((EXCEPTION_VECTOR_BASE_ADDR) + 0x200)
+
+#define NR_IRQS                         64
+#define IRQ_VECTOR_SIZE                 (0x10)
+#define IRQ_VECTOR_BASE_ADDR            ((EXCEPTION_VECTOR_BASE_ADDR) + 0x210)
+#define IRQ_VECTOR_END_ADDR             ((EXCEPTION_VECTOR_BASE_ADDR) + 0x5f0)
+
+#define irq_canonicalize(irq)   (irq)
+
+#define IRQ_TIMER (7)           /* Timer IRQ number of SPCT6600 */
+
+extern void interrupt_exception_vector(void);
+
+#endif /* _ASM_SCORE_IRQ_H */
diff --git a/arch/score/include/asm/irq_regs.h b/arch/score/include/asm/irq_regs.h
new file mode 100644
index 000000000000..b8e881c9a69f
--- /dev/null
+++ b/arch/score/include/asm/irq_regs.h
@@ -0,0 +1,11 @@
+#ifndef _ASM_SCORE_IRQ_REGS_H
+#define _ASM_SCORE_IRQ_REGS_H
+
+#include <linux/thread_info.h>
+
+static inline struct pt_regs *get_irq_regs(void)
+{
+        return current_thread_info()->regs;
+}
+
+#endif /* _ASM_SCORE_IRQ_REGS_H */
diff --git a/arch/score/include/asm/irqflags.h b/arch/score/include/asm/irqflags.h
new file mode 100644
index 000000000000..690a6cae7294
--- /dev/null
+++ b/arch/score/include/asm/irqflags.h
@@ -0,0 +1,109 @@
+#ifndef _ASM_SCORE_IRQFLAGS_H
+#define _ASM_SCORE_IRQFLAGS_H
+
+#ifndef __ASSEMBLY__
+
+#define raw_local_irq_save(x)                   \
+{                                               \
+        __asm__ __volatile__(                   \
+                "mfcr   r8, cr0;"               \
+                "li     r9, 0xfffffffe;"        \
+                "nop;"                          \
+                "mv     %0, r8;"                \
+                "and    r8, r8, r9;"            \
+                "mtcr   r8, cr0;"               \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                : "=r" (x)                      \
+                :                               \
+                : "r8", "r9"                    \
+                );                              \
+}
+
+#define raw_local_irq_restore(x)                \
+{                                               \
+        __asm__ __volatile__(                   \
+                "mfcr   r8, cr0;"               \
+                "ldi    r9, 0x1;"               \
+                "and    %0, %0, r9;"            \
+                "or     r8, r8, %0;"            \
+                "mtcr   r8, cr0;"               \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                :                               \
+                : "r"(x)                        \
+                : "r8", "r9"                    \
+                );                              \
+}
+
+#define raw_local_irq_enable(void)              \
+{                                               \
+        __asm__ __volatile__(                   \
+                "mfcr\tr8,cr0;"                 \
+                "nop;"                          \
+                "nop;"                          \
+                "ori\tr8,0x1;"                  \
+                "mtcr\tr8,cr0;"                 \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                :                               \
+                :                               \
+                : "r8");                        \
+}
+
+#define raw_local_irq_disable(void)             \
+{                                               \
+        __asm__ __volatile__(                   \
+                "mfcr\tr8,cr0;"                 \
+                "nop;"                          \
+                "nop;"                          \
+                "srli\tr8,r8,1;"                \
+                "slli\tr8,r8,1;"                \
+                "mtcr\tr8,cr0;"                 \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                :                               \
+                :                               \
+                : "r8");                        \
+}
+
+#define raw_local_save_flags(x)                 \
+{                                               \
+        __asm__ __volatile__(                   \
+                "mfcr   r8, cr0;"               \
+                "nop;"                          \
+                "nop;"                          \
+                "mv     %0, r8;"                \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "nop;"                          \
+                "ldi    r9, 0x1;"               \
+                "and    %0, %0, r9;"            \
+                : "=r" (x)                      \
+                :                               \
+                : "r8", "r9"                    \
+                );                              \
+}
+
+static inline int raw_irqs_disabled_flags(unsigned long flags)
+{
+        return !(flags & 1);
+}
+
+#endif
+
+#endif /* _ASM_SCORE_IRQFLAGS_H */
diff --git a/arch/score/include/asm/kdebug.h b/arch/score/include/asm/kdebug.h
new file mode 100644
index 000000000000..a666e513f747
--- /dev/null
+++ b/arch/score/include/asm/kdebug.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_KDEBUG_H
+#define _ASM_SCORE_KDEBUG_H
+
+#include <asm-generic/kdebug.h>
+
+#endif /* _ASM_SCORE_KDEBUG_H */
diff --git a/arch/score/include/asm/kmap_types.h b/arch/score/include/asm/kmap_types.h
new file mode 100644
index 000000000000..6c46eb5077d3
--- /dev/null
+++ b/arch/score/include/asm/kmap_types.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_KMAP_TYPES_H
+#define _ASM_SCORE_KMAP_TYPES_H
+
+#include <asm-generic/kmap_types.h>
+
+#endif /* _ASM_SCORE_KMAP_TYPES_H */
diff --git a/arch/score/include/asm/linkage.h b/arch/score/include/asm/linkage.h
new file mode 100644
index 000000000000..2323a8ecf445
--- /dev/null
+++ b/arch/score/include/asm/linkage.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_SCORE_LINKAGE_H
+#define _ASM_SCORE_LINKAGE_H
+
+#define __ALIGN .align 2
+#define __ALIGN_STR ".align 2"
+
+#endif /* _ASM_SCORE_LINKAGE_H */
diff --git a/arch/score/include/asm/local.h b/arch/score/include/asm/local.h
new file mode 100644
index 000000000000..7e02f13dbba8
--- /dev/null
+++ b/arch/score/include/asm/local.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_LOCAL_H
+#define _ASM_SCORE_LOCAL_H
+
+#include <asm-generic/local.h>
+
+#endif /* _ASM_SCORE_LOCAL_H */
diff --git a/arch/score/include/asm/mman.h b/arch/score/include/asm/mman.h
new file mode 100644
index 000000000000..84d85ddfed8d
--- /dev/null
+++ b/arch/score/include/asm/mman.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_MMAN_H
+#define _ASM_SCORE_MMAN_H
+
+#include <asm-generic/mman.h>
+
+#endif /* _ASM_SCORE_MMAN_H */
diff --git a/arch/score/include/asm/mmu.h b/arch/score/include/asm/mmu.h
new file mode 100644
index 000000000000..676828e4c10a
--- /dev/null
+++ b/arch/score/include/asm/mmu.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_MMU_H
+#define _ASM_SCORE_MMU_H
+
+typedef unsigned long mm_context_t;
+
+#endif /* _ASM_SCORE_MMU_H */
diff --git a/arch/score/include/asm/mmu_context.h b/arch/score/include/asm/mmu_context.h
new file mode 100644
index 000000000000..2644577c96e8
--- /dev/null
+++ b/arch/score/include/asm/mmu_context.h
@@ -0,0 +1,113 @@
+#ifndef _ASM_SCORE_MMU_CONTEXT_H
+#define _ASM_SCORE_MMU_CONTEXT_H
+
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <asm-generic/mm_hooks.h>
+
+#include <asm/cacheflush.h>
+#include <asm/tlbflush.h>
+#include <asm/scoreregs.h>
+
+/*
+ * For the fast tlb miss handlers, we keep a per cpu array of pointers
+ * to the current pgd for each processor. Also, the proc. id is stuffed
+ * into the context register.
+ */
+extern unsigned long asid_cache;
+extern unsigned long pgd_current;
+
+#define TLBMISS_HANDLER_SETUP_PGD(pgd) (pgd_current = (unsigned long)(pgd))
+
+#define TLBMISS_HANDLER_SETUP()                         \
+do {                                                    \
+        write_c0_context(0);                            \
+        TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)       \
+} while (0)
+
+/*
+ * All unused by hardware upper bits will be considered
+ * as a software asid extension.
+ */
+#define ASID_VERSION_MASK       0xfffff000
+#define ASID_FIRST_VERSION      0x1000
+
+/* PEVN    --------- VPN ---------- --ASID--- -NA- */
+/* binary: 0000 0000 0000 0000 0000 0000 0001 0000 */
+/* binary: 0000 0000 0000 0000 0000 1111 1111 0000 */
+#define ASID_INC        0x10
+#define ASID_MASK       0xff0
+
+static inline void enter_lazy_tlb(struct mm_struct *mm,
+                                struct task_struct *tsk)
+{}
+
+static inline void
+get_new_mmu_context(struct mm_struct *mm)
+{
+        unsigned long asid = asid_cache + ASID_INC;
+
+        if (!(asid & ASID_MASK)) {
+                local_flush_tlb_all();          /* start new asid cycle */
+                if (!asid)                      /* fix version if needed */
+                        asid = ASID_FIRST_VERSION;
+        }
+
+        mm->context = asid;
+        asid_cache = asid;
+}
+
+/*
+ * Initialize the context related info for a new mm_struct
+ * instance.
+ */
+static inline int
+init_new_context(struct task_struct *tsk, struct mm_struct *mm)
+{
+        mm->context = 0;
+        return 0;
+}
+
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                        struct task_struct *tsk)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        if ((next->context ^ asid_cache) & ASID_VERSION_MASK)
+                get_new_mmu_context(next);
+
+        pevn_set(next->context);
+        TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+        local_irq_restore(flags);
+}
+
+/*
+ * Destroy context related info for an mm_struct that is about
+ * to be put to rest.
+ */
+static inline void destroy_context(struct mm_struct *mm)
+{}
+
+static inline void
+deactivate_mm(struct task_struct *task, struct mm_struct *mm)
+{}
+
+/*
+ * After we have set current->mm to a new value, this activates
+ * the context for the new mm so we see the new mappings.
+ */
+static inline void
+activate_mm(struct mm_struct *prev, struct mm_struct *next)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        get_new_mmu_context(next);
+        pevn_set(next->context);
+        TLBMISS_HANDLER_SETUP_PGD(next->pgd);
+        local_irq_restore(flags);
+}
+
+#endif /* _ASM_SCORE_MMU_CONTEXT_H */
diff --git a/arch/score/include/asm/module.h b/arch/score/include/asm/module.h
new file mode 100644
index 000000000000..f0b5dc0bd023
--- /dev/null
+++ b/arch/score/include/asm/module.h
@@ -0,0 +1,39 @@
+#ifndef _ASM_SCORE_MODULE_H
+#define _ASM_SCORE_MODULE_H
+
+#include <linux/list.h>
+#include <asm/uaccess.h>
+
+struct mod_arch_specific {
+        /* Data Bus Error exception tables */
+        struct list_head dbe_list;
+        const struct exception_table_entry *dbe_start;
+        const struct exception_table_entry *dbe_end;
+};
+
+typedef uint8_t Elf64_Byte;             /* Type for a 8-bit quantity. */
+
+#define Elf_Shdr        Elf32_Shdr
+#define Elf_Sym         Elf32_Sym
+#define Elf_Ehdr        Elf32_Ehdr
+#define Elf_Addr        Elf32_Addr
+
+/* Given an address, look for it in the exception tables. */
+#ifdef CONFIG_MODULES
+const struct exception_table_entry *search_module_dbetables(unsigned long addr);
+#else
+static inline const struct exception_table_entry
+*search_module_dbetables(unsigned long addr)
+{
+        return NULL;
+}
+#endif
+
+#define MODULE_PROC_FAMILY "SCORE7"
+#define MODULE_KERNEL_TYPE "32BIT "
+#define MODULE_KERNEL_SMTC ""
+
+#define MODULE_ARCH_VERMAGIC \
+        MODULE_PROC_FAMILY MODULE_KERNEL_TYPE MODULE_KERNEL_SMTC
+
+#endif /* _ASM_SCORE_MODULE_H */
diff --git a/arch/score/include/asm/msgbuf.h b/arch/score/include/asm/msgbuf.h
new file mode 100644
index 000000000000..7506721e29fa
--- /dev/null
+++ b/arch/score/include/asm/msgbuf.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_MSGBUF_H
+#define _ASM_SCORE_MSGBUF_H
+
+#include <asm-generic/msgbuf.h>
+
+#endif /* _ASM_SCORE_MSGBUF_H */
diff --git a/arch/score/include/asm/mutex.h b/arch/score/include/asm/mutex.h
new file mode 100644
index 000000000000..10d48fe4db97
--- /dev/null
+++ b/arch/score/include/asm/mutex.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_MUTEX_H
+#define _ASM_SCORE_MUTEX_H
+
+#include <asm-generic/mutex-dec.h>
+
+#endif /* _ASM_SCORE_MUTEX_H */
diff --git a/arch/score/include/asm/page.h b/arch/score/include/asm/page.h
new file mode 100644
index 000000000000..d92a5a2d36d4
--- /dev/null
+++ b/arch/score/include/asm/page.h
@@ -0,0 +1,93 @@
+#ifndef _ASM_SCORE_PAGE_H
+#define _ASM_SCORE_PAGE_H
+
+#include <linux/pfn.h>
+#include <linux/const.h>
+
+/* PAGE_SHIFT determines the page size */
+#define PAGE_SHIFT      (12)
+#define PAGE_SIZE       (_AC(1,UL) << PAGE_SHIFT)
+#define PAGE_MASK       (~(PAGE_SIZE-1))
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+#define PAGE_UP(addr)   (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
+#define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1)))
+
+/* align addr on a size boundary - adjust address up/down if needed */
+#define _ALIGN_UP(addr, size)   (((addr)+((size)-1))&(~((size)-1)))
+#define _ALIGN_DOWN(addr, size) ((addr)&(~((size)-1)))
+
+/* align addr on a size boundary - adjust address up if needed */
+#define _ALIGN(addr, size)      _ALIGN_UP(addr, size)
+
+/*
+ * PAGE_OFFSET -- the first address of the first page of memory. When not
+ * using MMU this corresponds to the first free page in physical memory (aligned
+ * on a page boundary).
+ */
+#define PAGE_OFFSET             (0xA0000000UL)
+
+#define clear_page(pgaddr)                      memset((pgaddr), 0, PAGE_SIZE)
+#define copy_page(to, from)                     memcpy((to), (from), PAGE_SIZE)
+
+#define clear_user_page(pgaddr, vaddr, page)    memset((pgaddr), 0, PAGE_SIZE)
+#define copy_user_page(vto, vfrom, vaddr, topg) \
+                        memcpy((vto), (vfrom), PAGE_SIZE)
+
+/*
+ * These are used to make use of C type-checking..
+ */
+
+typedef struct { unsigned long pte; } pte_t;            /* page table entry */
+typedef struct { unsigned long pgd; } pgd_t;            /* PGD table entry */
+typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct page *pgtable_t;
+
+#define pte_val(x)      ((x).pte)
+#define pgd_val(x)      ((x).pgd)
+#define pgprot_val(x)   ((x).pgprot)
+
+#define __pte(x)        ((pte_t) { (x) })
+#define __pgd(x)        ((pgd_t) { (x) })
+#define __pgprot(x)     ((pgprot_t) { (x) })
+
+extern unsigned long max_low_pfn;
+extern unsigned long min_low_pfn;
+extern unsigned long max_pfn;
+
+#define __pa(x)         ((unsigned long)(x) - PAGE_OFFSET)
+#define __va(x)         ((void *)((unsigned long) (x) + PAGE_OFFSET))
+
+#define phys_to_pfn(phys)       (PFN_DOWN(phys))
+#define pfn_to_phys(pfn)        (PFN_PHYS(pfn))
+
+#define virt_to_pfn(vaddr)      (phys_to_pfn((__pa(vaddr))))
+#define pfn_to_virt(pfn)        __va(pfn_to_phys((pfn)))
+
+#define virt_to_page(vaddr)     (pfn_to_page(virt_to_pfn(vaddr)))
+#define page_to_virt(page)      (pfn_to_virt(page_to_pfn(page)))
+
+#define page_to_phys(page)      (pfn_to_phys(page_to_pfn(page)))
+#define page_to_bus(page)       (page_to_phys(page))
+#define phys_to_page(paddr)     (pfn_to_page(phys_to_pfn(paddr)))
+
+#define pfn_valid(pfn)          ((pfn) >= min_low_pfn && (pfn) < max_mapnr)
+
+#define ARCH_PFN_OFFSET         (PAGE_OFFSET >> PAGE_SHIFT)
+
+#endif /* __ASSEMBLY__ */
+
+#define virt_addr_valid(vaddr)  (pfn_valid(virt_to_pfn(vaddr)))
+
+#endif /* __KERNEL__ */
+
+#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
+                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#include <asm-generic/memory_model.h>
+#include <asm-generic/getorder.h>
+
+#endif /* _ASM_SCORE_PAGE_H */
diff --git a/arch/score/include/asm/param.h b/arch/score/include/asm/param.h
new file mode 100644
index 000000000000..916b8690b6aa
--- /dev/null
+++ b/arch/score/include/asm/param.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_PARAM_H
+#define _ASM_SCORE_PARAM_H
+
+#include <asm-generic/param.h>
+
+#endif /* _ASM_SCORE_PARAM_H */
diff --git a/arch/score/include/asm/pci.h b/arch/score/include/asm/pci.h
new file mode 100644
index 000000000000..3f3cfd82549c
--- /dev/null
+++ b/arch/score/include/asm/pci.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_SCORE_PCI_H
+#define _ASM_SCORE_PCI_H
+
+#endif /* _ASM_SCORE_PCI_H */
diff --git a/arch/score/include/asm/percpu.h b/arch/score/include/asm/percpu.h
new file mode 100644
index 000000000000..e7bd4e05b475
--- /dev/null
+++ b/arch/score/include/asm/percpu.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_PERCPU_H
+#define _ASM_SCORE_PERCPU_H
+
+#include <asm-generic/percpu.h>
+
+#endif /* _ASM_SCORE_PERCPU_H */
diff --git a/arch/score/include/asm/pgalloc.h b/arch/score/include/asm/pgalloc.h
new file mode 100644
index 000000000000..059a61b7071b
--- /dev/null
+++ b/arch/score/include/asm/pgalloc.h
@@ -0,0 +1,83 @@
+#ifndef _ASM_SCORE_PGALLOC_H
+#define _ASM_SCORE_PGALLOC_H
+
+#include <linux/mm.h>
+
+static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
+        pte_t *pte)
+{
+        set_pmd(pmd, __pmd((unsigned long)pte));
+}
+
+static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
+        pgtable_t pte)
+{
+        set_pmd(pmd, __pmd((unsigned long)page_address(pte)));
+}
+
+#define pmd_pgtable(pmd)        pmd_page(pmd)
+
+static inline pgd_t *pgd_alloc(struct mm_struct *mm)
+{
+        pgd_t *ret, *init;
+
+        ret = (pgd_t *) __get_free_pages(GFP_KERNEL, PGD_ORDER);
+        if (ret) {
+                init = pgd_offset(&init_mm, 0UL);
+                pgd_init((unsigned long)ret);
+                memcpy(ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
+                (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
+        }
+
+        return ret;
+}
+
+static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
+{
+        free_pages((unsigned long)pgd, PGD_ORDER);
+}
+
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+        unsigned long address)
+{
+        pte_t *pte;
+
+        pte = (pte_t *) __get_free_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO,
+                                        PTE_ORDER);
+
+        return pte;
+}
+
+static inline struct page *pte_alloc_one(struct mm_struct *mm,
+        unsigned long address)
+{
+        struct page *pte;
+
+        pte = alloc_pages(GFP_KERNEL | __GFP_REPEAT, PTE_ORDER);
+        if (pte) {
+                clear_highpage(pte);
+                pgtable_page_ctor(pte);
+        }
+        return pte;
+}
+
+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        free_pages((unsigned long)pte, PTE_ORDER);
+}
+
+static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
+{
+        pgtable_page_dtor(pte);
+        __free_pages(pte, PTE_ORDER);
+}
+
+#define __pte_free_tlb(tlb, pte, buf)                   \
+do {                                                    \
+        pgtable_page_dtor(pte);                         \
+        tlb_remove_page((tlb), pte);                    \
+} while (0)
+
+#define check_pgt_cache()               do {} while (0)
+
+#endif /* _ASM_SCORE_PGALLOC_H */
diff --git a/arch/score/include/asm/pgtable-bits.h b/arch/score/include/asm/pgtable-bits.h
new file mode 100644
index 000000000000..7d65a96a82e5
--- /dev/null
+++ b/arch/score/include/asm/pgtable-bits.h
@@ -0,0 +1,25 @@
+#ifndef _ASM_SCORE_PGTABLE_BITS_H
+#define _ASM_SCORE_PGTABLE_BITS_H
+
+#define _PAGE_ACCESSED                  (1<<5)  /* implemented in software */
+#define _PAGE_READ                      (1<<6)  /* implemented in software */
+#define _PAGE_WRITE                     (1<<7)  /* implemented in software */
+#define _PAGE_PRESENT                   (1<<9)  /* implemented in software */
+#define _PAGE_MODIFIED                  (1<<10) /* implemented in software */
+#define _PAGE_FILE                      (1<<10)
+
+#define _PAGE_GLOBAL                    (1<<0)
+#define _PAGE_VALID                     (1<<1)
+#define _PAGE_SILENT_READ               (1<<1)  /* synonym */
+#define _PAGE_DIRTY                     (1<<2)  /* Write bit */
+#define _PAGE_SILENT_WRITE              (1<<2)
+#define _PAGE_CACHE                     (1<<3)  /* cache */
+#define _CACHE_MASK                     (1<<3)
+#define _PAGE_BUFFERABLE                (1<<4)  /*Fallow Spec. */
+
+#define __READABLE      (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
+#define __WRITEABLE     (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
+#define _PAGE_CHG_MASK                  \
+        (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _PAGE_CACHE)
+
+#endif /* _ASM_SCORE_PGTABLE_BITS_H */
diff --git a/arch/score/include/asm/pgtable.h b/arch/score/include/asm/pgtable.h
new file mode 100644
index 000000000000..674934b40170
--- /dev/null
+++ b/arch/score/include/asm/pgtable.h
@@ -0,0 +1,287 @@
+#ifndef _ASM_SCORE_PGTABLE_H
+#define _ASM_SCORE_PGTABLE_H
+
+#include <linux/const.h>
+#include <asm-generic/pgtable-nopmd.h>
+
+#include <asm/fixmap.h>
+#include <asm/setup.h>
+#include <asm/pgtable-bits.h>
+
+extern void load_pgd(unsigned long pg_dir);
+extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)];
+
+/* PGDIR_SHIFT determines what a third-level page table entry can map */
+#define PGDIR_SHIFT     22
+#define PGDIR_SIZE      (_AC(1, UL) << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE - 1))
+
+/*
+ * Entries per page directory level: we use two-level, so
+ * we don't really have any PUD/PMD directory physically.
+ */
+#define PGD_ORDER       0
+#define PTE_ORDER       0
+
+#define PTRS_PER_PGD    1024
+#define PTRS_PER_PTE    1024
+
+#define USER_PTRS_PER_PGD       (0x80000000UL/PGDIR_SIZE)
+#define FIRST_USER_ADDRESS      0
+
+#define VMALLOC_START           (0xc0000000UL)
+
+#define PKMAP_BASE              (0xfd000000UL)
+
+#define VMALLOC_END             (FIXADDR_START - 2*PAGE_SIZE)
+
+#define pte_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
+                __FILE__, __LINE__, pte_val(e))
+#define pgd_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
+                __FILE__, __LINE__, pgd_val(e))
+
+/*
+ * Empty pgd/pmd entries point to the invalid_pte_table.
+ */
+static inline int pmd_none(pmd_t pmd)
+{
+        return pmd_val(pmd) == (unsigned long) invalid_pte_table;
+}
+
+#define pmd_bad(pmd)            (pmd_val(pmd) & ~PAGE_MASK)
+
+static inline int pmd_present(pmd_t pmd)
+{
+        return pmd_val(pmd) != (unsigned long) invalid_pte_table;
+}
+
+static inline void pmd_clear(pmd_t *pmdp)
+{
+        pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
+}
+
+#define pte_page(x)             pfn_to_page(pte_pfn(x))
+#define pte_pfn(x)              ((unsigned long)((x).pte >> PAGE_SHIFT))
+#define pfn_pte(pfn, prot)      \
+        __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
+
+#define __pgd_offset(address)   pgd_index(address)
+#define __pud_offset(address)   (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
+#define __pmd_offset(address)   (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address)   pgd_offset(&init_mm, address)
+#define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
+
+/* to find an entry in a page-table-directory */
+#define pgd_offset(mm, addr)    ((mm)->pgd + pgd_index(addr))
+
+/* Find an entry in the third-level page table.. */
+#define __pte_offset(address)           \
+        (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset(dir, address)        \
+        ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
+#define pte_offset_kernel(dir, address) \
+        ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
+
+#define pte_offset_map(dir, address)    \
+        ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
+#define pte_offset_map_nested(dir, address)     \
+        ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
+#define pte_unmap(pte) ((void)(pte))
+#define pte_unmap_nested(pte) ((void)(pte))
+
+/*
+ * Bits 9(_PAGE_PRESENT) and 10(_PAGE_FILE)are taken,
+ * split up 30 bits of offset into this range:
+ */
+#define PTE_FILE_MAX_BITS       30
+#define pte_to_pgoff(_pte)              \
+        (((_pte).pte & 0x1ff) | (((_pte).pte >> 11) << 9))
+#define pgoff_to_pte(off)               \
+        ((pte_t) {((off) & 0x1ff) | (((off) >> 9) << 11) | _PAGE_FILE})
+#define __pte_to_swp_entry(pte)         \
+        ((swp_entry_t) { pte_val(pte)})
+#define __swp_entry_to_pte(x)   ((pte_t) {(x).val})
+
+#define pmd_phys(pmd)           __pa((void *)pmd_val(pmd))
+#define pmd_page(pmd)           (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
+#define mk_pte(page, prot)      pfn_pte(page_to_pfn(page), prot)
+static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
+
+#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
+#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
+#define pte_clear(mm, addr, xp)         \
+        do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
+                remap_pfn_range(vma, vaddr, pfn, size, prot)
+
+/*
+ * The "pgd_xxx()" functions here are trivial for a folded two-level
+ * setup: the pgd is never bad, and a pmd always exists (as it's folded
+ * into the pgd entry)
+ */
+#define pgd_present(pgd)        (1)
+#define pgd_none(pgd)           (0)
+#define pgd_bad(pgd)            (0)
+#define pgd_clear(pgdp)         do { } while (0)
+
+#define kern_addr_valid(addr)   (1)
+#define pmd_page_vaddr(pmd)     pmd_val(pmd)
+
+#define pte_none(pte)           (!(pte_val(pte) & ~_PAGE_GLOBAL))
+#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
+
+#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_CACHE)
+#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
+                                _PAGE_CACHE)
+#define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHE)
+#define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHE)
+#define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
+                                _PAGE_GLOBAL | _PAGE_CACHE)
+#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
+                                __WRITEABLE | _PAGE_GLOBAL & ~_PAGE_CACHE)
+
+#define __P000  PAGE_NONE
+#define __P001  PAGE_READONLY
+#define __P010  PAGE_COPY
+#define __P011  PAGE_COPY
+#define __P100  PAGE_READONLY
+#define __P101  PAGE_READONLY
+#define __P110  PAGE_COPY
+#define __P111  PAGE_COPY
+
+#define __S000  PAGE_NONE
+#define __S001  PAGE_READONLY
+#define __S010  PAGE_SHARED
+#define __S011  PAGE_SHARED
+#define __S100  PAGE_READONLY
+#define __S101  PAGE_READONLY
+#define __S110  PAGE_SHARED
+#define __S111  PAGE_SHARED
+
+#define pgprot_noncached pgprot_noncached
+
+static inline pgprot_t pgprot_noncached(pgprot_t _prot)
+{
+        unsigned long prot = pgprot_val(_prot);
+
+        prot = (prot & ~_CACHE_MASK);
+
+        return __pgprot(prot);
+}
+
+#define __swp_type(x)           ((x).val & 0x1f)
+#define __swp_offset(x)         ((x).val >> 11)
+#define __swp_entry(type, offset) ((swp_entry_t){(type) | ((offset) << 11)})
+
+extern unsigned long empty_zero_page;
+extern unsigned long zero_page_mask;
+
+#define ZERO_PAGE(vaddr) \
+        (virt_to_page((void *)(empty_zero_page + \
+         (((unsigned long)(vaddr)) & zero_page_mask))))
+
+#define pgtable_cache_init()    do {} while (0)
+
+#define arch_enter_lazy_cpu_mode()      do {} while (0)
+
+static inline int pte_write(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_WRITE;
+}
+
+static inline int pte_dirty(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_MODIFIED;
+}
+
+static inline int pte_young(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_ACCESSED;
+}
+
+static inline int pte_file(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_FILE;
+}
+
+#define pte_special(pte)        (0)
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+        pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
+        return pte;
+}
+
+static inline pte_t pte_mkclean(pte_t pte)
+{
+        pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
+        return pte;
+}
+
+static inline pte_t pte_mkold(pte_t pte)
+{
+        pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
+        return pte;
+}
+
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+        pte_val(pte) |= _PAGE_WRITE;
+        if (pte_val(pte) & _PAGE_MODIFIED)
+                pte_val(pte) |= _PAGE_SILENT_WRITE;
+        return pte;
+}
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+        pte_val(pte) |= _PAGE_MODIFIED;
+        if (pte_val(pte) & _PAGE_WRITE)
+                pte_val(pte) |= _PAGE_SILENT_WRITE;
+        return pte;
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+        pte_val(pte) |= _PAGE_ACCESSED;
+        if (pte_val(pte) & _PAGE_READ)
+                pte_val(pte) |= _PAGE_SILENT_READ;
+        return pte;
+}
+
+#define set_pmd(pmdptr, pmdval)         \
+         do { *(pmdptr) = (pmdval); } while (0)
+#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
+
+extern unsigned long pgd_current;
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+extern void paging_init(void);
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
+}
+
+extern void __update_tlb(struct vm_area_struct *vma,
+        unsigned long address,  pte_t pte);
+extern void __update_cache(struct vm_area_struct *vma,
+        unsigned long address,  pte_t pte);
+
+static inline void update_mmu_cache(struct vm_area_struct *vma,
+        unsigned long address, pte_t pte)
+{
+        __update_tlb(vma, address, pte);
+        __update_cache(vma, address, pte);
+}
+
+#ifndef __ASSEMBLY__
+#include <asm-generic/pgtable.h>
+
+void setup_memory(void);
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_SCORE_PGTABLE_H */
diff --git a/arch/score/include/asm/poll.h b/arch/score/include/asm/poll.h
new file mode 100644
index 000000000000..18532db02861
--- /dev/null
+++ b/arch/score/include/asm/poll.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_POLL_H
+#define _ASM_SCORE_POLL_H
+
+#include <asm-generic/poll.h>
+
+#endif /* _ASM_SCORE_POLL_H */
diff --git a/arch/score/include/asm/posix_types.h b/arch/score/include/asm/posix_types.h
new file mode 100644
index 000000000000..b88acf80048a
--- /dev/null
+++ b/arch/score/include/asm/posix_types.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_POSIX_TYPES_H
+#define _ASM_SCORE_POSIX_TYPES_H
+
+#include <asm-generic/posix_types.h>
+
+#endif /* _ASM_SCORE_POSIX_TYPES_H */
diff --git a/arch/score/include/asm/processor.h b/arch/score/include/asm/processor.h
new file mode 100644
index 000000000000..7e22f216d771
--- /dev/null
+++ b/arch/score/include/asm/processor.h
@@ -0,0 +1,106 @@
+#ifndef _ASM_SCORE_PROCESSOR_H
+#define _ASM_SCORE_PROCESSOR_H
+
+#include <linux/cpumask.h>
+#include <linux/threads.h>
+
+#include <asm/segment.h>
+
+struct task_struct;
+
+/*
+ * System setup and hardware flags..
+ */
+extern void (*cpu_wait)(void);
+
+extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+extern unsigned long thread_saved_pc(struct task_struct *tsk);
+extern void start_thread(struct pt_regs *regs,
+                        unsigned long pc, unsigned long sp);
+extern unsigned long get_wchan(struct task_struct *p);
+
+/*
+ * Return current * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l; })
+
+#define cpu_relax()             barrier()
+#define release_thread(thread)  do {} while (0)
+#define prepare_to_copy(tsk)    do {} while (0)
+
+/*
+ * User space process size: 2GB. This is hardcoded into a few places,
+ * so don't change it unless you know what you are doing.
+ */
+#define TASK_SIZE       0x7fff8000UL
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE      ((TASK_SIZE / 3) & ~(PAGE_SIZE))
+
+#ifdef __KERNEL__
+#define STACK_TOP       TASK_SIZE
+#define STACK_TOP_MAX   TASK_SIZE
+#endif
+
+/*
+ * If you change thread_struct remember to change the #defines below too!
+ */
+struct thread_struct {
+        unsigned long reg0, reg2, reg3;
+        unsigned long reg12, reg13, reg14, reg15, reg16;
+        unsigned long reg17, reg18, reg19, reg20, reg21;
+
+        unsigned long cp0_psr;
+        unsigned long cp0_ema;          /* Last user fault */
+        unsigned long cp0_badvaddr;     /* Last user fault */
+        unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
+        unsigned long error_code;
+        unsigned long trap_no;
+
+        unsigned long mflags;
+        unsigned long reg29;
+
+        unsigned long single_step;
+        unsigned long ss_nextcnt;
+
+        unsigned long insn1_type;
+        unsigned long addr1;
+        unsigned long insn1;
+
+        unsigned long insn2_type;
+        unsigned long addr2;
+        unsigned long insn2;
+
+        mm_segment_t current_ds;
+};
+
+#define INIT_THREAD {                                           \
+        .reg0                   = 0,                            \
+        .reg2                   = 0,                            \
+        .reg3                   = 0,                            \
+        .reg12                  = 0,                            \
+        .reg13                  = 0,                            \
+        .reg14                  = 0,                            \
+        .reg15                  = 0,                            \
+        .reg16                  = 0,                            \
+        .reg17                  = 0,                            \
+        .reg18                  = 0,                            \
+        .reg19                  = 0,                            \
+        .reg20                  = 0,                            \
+        .reg21                  = 0,                            \
+        .cp0_psr                = 0,                            \
+        .error_code             = 0,                            \
+        .trap_no                = 0,                            \
+}
+
+#define kstk_tos(tsk)           \
+        ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
+#define task_pt_regs(tsk)       ((struct pt_regs *)kstk_tos(tsk) - 1)
+
+#define KSTK_EIP(tsk)           (task_pt_regs(tsk)->cp0_epc)
+#define KSTK_ESP(tsk)           (task_pt_regs(tsk)->regs[29])
+
+#endif /* _ASM_SCORE_PROCESSOR_H */
diff --git a/arch/score/include/asm/ptrace.h b/arch/score/include/asm/ptrace.h
new file mode 100644
index 000000000000..d40e691f23e2
--- /dev/null
+++ b/arch/score/include/asm/ptrace.h
@@ -0,0 +1,97 @@
+#ifndef _ASM_SCORE_PTRACE_H
+#define _ASM_SCORE_PTRACE_H
+
+#define PTRACE_GETREGS          12
+#define PTRACE_SETREGS          13
+
+#define PC              32
+#define CONDITION       33
+#define ECR             34
+#define EMA             35
+#define CEH             36
+#define CEL             37
+#define COUNTER         38
+#define LDCR            39
+#define STCR            40
+#define PSR             41
+
+#define SINGLESTEP16_INSN       0x7006
+#define SINGLESTEP32_INSN       0x840C8000
+#define BREAKPOINT16_INSN       0x7002          /* work on SPG300 */
+#define BREAKPOINT32_INSN       0x84048000      /* work on SPG300 */
+
+/* Define instruction mask */
+#define INSN32_MASK     0x80008000
+
+#define J32     0x88008000      /* 1_00010_0000000000_1_000000000000000 */
+#define J32M    0xFC008000      /* 1_11111_0000000000_1_000000000000000 */
+
+#define B32     0x90008000      /* 1_00100_0000000000_1_000000000000000 */
+#define B32M    0xFC008000
+#define BL32    0x90008001      /* 1_00100_0000000000_1_000000000000001 */
+#define BL32M   B32
+#define BR32    0x80008008      /* 1_00000_0000000000_1_00000000_000100_0 */
+#define BR32M   0xFFE0807E
+#define BRL32   0x80008009      /* 1_00000_0000000000_1_00000000_000100_1 */
+#define BRL32M  BR32M
+
+#define B32_SET (J32 | B32 | BL32 | BR32 | BRL32)
+
+#define J16     0x3000          /* 0_011_....... */
+#define J16M    0xF000
+#define B16     0x4000          /* 0_100_....... */
+#define B16M    0xF000
+#define BR16    0x0004          /* 0_000.......0100 */
+#define BR16M   0xF00F
+#define B16_SET (J16 | B16 | BR16)
+
+
+/*
+ * This struct defines the way the registers are stored on the stack during a
+ * system call/exception. As usual the registers k0/k1 aren't being saved.
+ */
+struct pt_regs {
+        unsigned long pad0[6];  /* stack arguments */
+        unsigned long orig_r4;
+        unsigned long orig_r7;
+        long is_syscall;
+
+        unsigned long regs[32];
+
+        unsigned long cel;
+        unsigned long ceh;
+
+        unsigned long sr0;      /* cnt */
+        unsigned long sr1;      /* lcr */
+        unsigned long sr2;      /* scr */
+
+        unsigned long cp0_epc;
+        unsigned long cp0_ema;
+        unsigned long cp0_psr;
+        unsigned long cp0_ecr;
+        unsigned long cp0_condition;
+};
+
+#ifdef __KERNEL__
+
+struct task_struct;
+
+/*
+ * Does the process account for user or for system time?
+ */
+#define user_mode(regs)         ((regs->cp0_psr & 8) == 8)
+
+#define instruction_pointer(regs)       ((unsigned long)(regs)->cp0_epc)
+#define profile_pc(regs)                instruction_pointer(regs)
+
+extern void do_syscall_trace(struct pt_regs *regs, int entryexit);
+extern int read_tsk_long(struct task_struct *, unsigned long, unsigned long *);
+extern int read_tsk_short(struct task_struct *, unsigned long,
+                         unsigned short *);
+
+#define arch_has_single_step()  (1)
+extern void user_enable_single_step(struct task_struct *);
+extern void user_disable_single_step(struct task_struct *);
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_SCORE_PTRACE_H */
diff --git a/arch/score/include/asm/resource.h b/arch/score/include/asm/resource.h
new file mode 100644
index 000000000000..9ce22bc7b475
--- /dev/null
+++ b/arch/score/include/asm/resource.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_RESOURCE_H
+#define _ASM_SCORE_RESOURCE_H
+
+#include <asm-generic/resource.h>
+
+#endif /* _ASM_SCORE_RESOURCE_H */
diff --git a/arch/score/include/asm/scatterlist.h b/arch/score/include/asm/scatterlist.h
new file mode 100644
index 000000000000..9f533b8362c7
--- /dev/null
+++ b/arch/score/include/asm/scatterlist.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SCATTERLIST_H
+#define _ASM_SCORE_SCATTERLIST_H
+
+#include <asm-generic/scatterlist.h>
+
+#endif /* _ASM_SCORE_SCATTERLIST_H */
diff --git a/arch/score/include/asm/scoreregs.h b/arch/score/include/asm/scoreregs.h
new file mode 100644
index 000000000000..d0ad29204518
--- /dev/null
+++ b/arch/score/include/asm/scoreregs.h
@@ -0,0 +1,51 @@
+#ifndef _ASM_SCORE_SCOREREGS_H
+#define _ASM_SCORE_SCOREREGS_H
+
+#include <linux/linkage.h>
+
+/* TIMER register */
+#define TIME0BASE               0x96080000
+#define P_TIMER0_CTRL           (TIME0BASE + 0x00)
+#define P_TIMER0_CPP_CTRL       (TIME0BASE + 0x04)
+#define P_TIMER0_PRELOAD        (TIME0BASE + 0x08)
+#define P_TIMER0_CPP_REG        (TIME0BASE + 0x0C)
+#define P_TIMER0_UPCNT          (TIME0BASE + 0x10)
+
+/* Timer Controller Register */
+/* bit 0 Timer enable */
+#define TMR_DISABLE     0x0000
+#define TMR_ENABLE      0x0001
+
+/* bit 1 Interrupt enable */
+#define TMR_IE_DISABLE  0x0000
+#define TMR_IE_ENABLE   0x0002
+
+/* bit 2 Output enable */
+#define TMR_OE_DISABLE  0x0004
+#define TMR_OE_ENABLE   0x0000
+
+/* bit4 Up/Down counting selection */
+#define TMR_UD_DOWN     0x0000
+#define TMR_UD_UP       0x0010
+
+/* bit5 Up/Down counting control selection */
+#define TMR_UDS_UD      0x0000
+#define TMR_UDS_EXTUD   0x0020
+
+/* bit6 Time output mode */
+#define TMR_OM_TOGGLE   0x0000
+#define TMR_OM_PILSE    0x0040
+
+/* bit 8..9 External input active edge selection */
+#define TMR_ES_PE       0x0000
+#define TMR_ES_NE       0x0100
+#define TMR_ES_BOTH     0x0200
+
+/* bit 10..11 Operating mode */
+#define TMR_M_FREE      0x0000 /* free running timer mode */
+#define TMR_M_PERIODIC  0x0400 /* periodic timer mode */
+#define TMR_M_FC        0x0800 /* free running counter mode */
+#define TMR_M_PC        0x0c00 /* periodic counter mode */
+
+#define SYSTEM_CLOCK            (27*1000000/4)          /* 27 MHz */
+#endif /* _ASM_SCORE_SCOREREGS_H */
diff --git a/arch/score/include/asm/sections.h b/arch/score/include/asm/sections.h
new file mode 100644
index 000000000000..9441d23af005
--- /dev/null
+++ b/arch/score/include/asm/sections.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SECTIONS_H
+#define _ASM_SCORE_SECTIONS_H
+
+#include <asm-generic/sections.h>
+
+#endif /* _ASM_SCORE_SECTIONS_H */
diff --git a/arch/score/include/asm/segment.h b/arch/score/include/asm/segment.h
new file mode 100644
index 000000000000..e16cf6afb495
--- /dev/null
+++ b/arch/score/include/asm/segment.h
@@ -0,0 +1,21 @@
+#ifndef _ASM_SCORE_SEGMENT_H
+#define _ASM_SCORE_SEGMENT_H
+
+#ifndef __ASSEMBLY__
+
+typedef struct {
+        unsigned long seg;
+} mm_segment_t;
+
+#define KERNEL_DS       ((mm_segment_t){0})
+#define USER_DS KERNEL_DS
+
+# define get_ds()       (KERNEL_DS)
+# define get_fs()       (current_thread_info()->addr_limit)
+# define set_fs(x)      \
+        do { current_thread_info()->addr_limit = (x); } while (0)
+
+# define segment_eq(a, b)       ((a).seg == (b).seg)
+
+# endif /* __ASSEMBLY__ */
+#endif /* _ASM_SCORE_SEGMENT_H */
diff --git a/arch/score/include/asm/sembuf.h b/arch/score/include/asm/sembuf.h
new file mode 100644
index 000000000000..dae5e835ce9e
--- /dev/null
+++ b/arch/score/include/asm/sembuf.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SEMBUF_H
+#define _ASM_SCORE_SEMBUF_H
+
+#include <asm-generic/sembuf.h>
+
+#endif /* _ASM_SCORE_SEMBUF_H */
diff --git a/arch/score/include/asm/setup.h b/arch/score/include/asm/setup.h
new file mode 100644
index 000000000000..3cb944dc68dc
--- /dev/null
+++ b/arch/score/include/asm/setup.h
@@ -0,0 +1,41 @@
+#ifndef _ASM_SCORE_SETUP_H
+#define _ASM_SCORE_SETUP_H
+
+#define COMMAND_LINE_SIZE       256
+#define MEMORY_START            0
+#define MEMORY_SIZE             0x2000000
+
+#ifdef __KERNEL__
+
+extern void pagetable_init(void);
+extern void pgd_init(unsigned long page);
+
+extern void setup_early_printk(void);
+extern void cpu_cache_init(void);
+extern void tlb_init(void);
+
+extern void handle_nmi(void);
+extern void handle_adelinsn(void);
+extern void handle_adedata(void);
+extern void handle_ibe(void);
+extern void handle_pel(void);
+extern void handle_sys(void);
+extern void handle_ccu(void);
+extern void handle_ri(void);
+extern void handle_tr(void);
+extern void handle_ades(void);
+extern void handle_cee(void);
+extern void handle_cpe(void);
+extern void handle_dve(void);
+extern void handle_dbe(void);
+extern void handle_reserved(void);
+extern void handle_tlb_refill(void);
+extern void handle_tlb_invaild(void);
+extern void handle_mod(void);
+extern void debug_exception_vector(void);
+extern void general_exception_vector(void);
+extern void interrupt_exception_vector(void);
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_SCORE_SETUP_H */
diff --git a/arch/score/include/asm/shmbuf.h b/arch/score/include/asm/shmbuf.h
new file mode 100644
index 000000000000..c85b2429ba21
--- /dev/null
+++ b/arch/score/include/asm/shmbuf.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SHMBUF_H
+#define _ASM_SCORE_SHMBUF_H
+
+#include <asm-generic/shmbuf.h>
+
+#endif /* _ASM_SCORE_SHMBUF_H */
diff --git a/arch/score/include/asm/shmparam.h b/arch/score/include/asm/shmparam.h
new file mode 100644
index 000000000000..1d60813141b6
--- /dev/null
+++ b/arch/score/include/asm/shmparam.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SHMPARAM_H
+#define _ASM_SCORE_SHMPARAM_H
+
+#include <asm-generic/shmparam.h>
+
+#endif /* _ASM_SCORE_SHMPARAM_H */
diff --git a/arch/score/include/asm/sigcontext.h b/arch/score/include/asm/sigcontext.h
new file mode 100644
index 000000000000..5ffda39ddb90
--- /dev/null
+++ b/arch/score/include/asm/sigcontext.h
@@ -0,0 +1,22 @@
+#ifndef _ASM_SCORE_SIGCONTEXT_H
+#define _ASM_SCORE_SIGCONTEXT_H
+
+/*
+ * Keep this struct definition in sync with the sigcontext fragment
+ * in arch/score/tools/offset.c
+ */
+struct sigcontext {
+        unsigned int            sc_regmask;
+        unsigned int            sc_psr;
+        unsigned int            sc_condition;
+        unsigned long           sc_pc;
+        unsigned long           sc_regs[32];
+        unsigned int            sc_ssflags;
+        unsigned int            sc_mdceh;
+        unsigned int            sc_mdcel;
+        unsigned int            sc_ecr;
+        unsigned long           sc_ema;
+        unsigned long           sc_sigset[4];
+};
+
+#endif /* _ASM_SCORE_SIGCONTEXT_H */
diff --git a/arch/score/include/asm/siginfo.h b/arch/score/include/asm/siginfo.h
new file mode 100644
index 000000000000..87ca35607a28
--- /dev/null
+++ b/arch/score/include/asm/siginfo.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SIGINFO_H
+#define _ASM_SCORE_SIGINFO_H
+
+#include <asm-generic/siginfo.h>
+
+#endif /* _ASM_SCORE_SIGINFO_H */
diff --git a/arch/score/include/asm/signal.h b/arch/score/include/asm/signal.h
new file mode 100644
index 000000000000..2605bc06b64f
--- /dev/null
+++ b/arch/score/include/asm/signal.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SIGNAL_H
+#define _ASM_SCORE_SIGNAL_H
+
+#include <asm-generic/signal.h>
+
+#endif /* _ASM_SCORE_SIGNAL_H */
diff --git a/arch/score/include/asm/socket.h b/arch/score/include/asm/socket.h
new file mode 100644
index 000000000000..612a70e385ba
--- /dev/null
+++ b/arch/score/include/asm/socket.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SOCKET_H
+#define _ASM_SCORE_SOCKET_H
+
+#include <asm-generic/socket.h>
+
+#endif /* _ASM_SCORE_SOCKET_H */
diff --git a/arch/score/include/asm/sockios.h b/arch/score/include/asm/sockios.h
new file mode 100644
index 000000000000..ba8256480189
--- /dev/null
+++ b/arch/score/include/asm/sockios.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SOCKIOS_H
+#define _ASM_SCORE_SOCKIOS_H
+
+#include <asm-generic/sockios.h>
+
+#endif /* _ASM_SCORE_SOCKIOS_H */
diff --git a/arch/score/include/asm/stat.h b/arch/score/include/asm/stat.h
new file mode 100644
index 000000000000..5037055500a2
--- /dev/null
+++ b/arch/score/include/asm/stat.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_STAT_H
+#define _ASM_SCORE_STAT_H
+
+#include <asm-generic/stat.h>
+
+#endif /* _ASM_SCORE_STAT_H */
diff --git a/arch/score/include/asm/statfs.h b/arch/score/include/asm/statfs.h
new file mode 100644
index 000000000000..36e41004e996
--- /dev/null
+++ b/arch/score/include/asm/statfs.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_STATFS_H
+#define _ASM_SCORE_STATFS_H
+
+#include <asm-generic/statfs.h>
+
+#endif /* _ASM_SCORE_STATFS_H */
diff --git a/arch/score/include/asm/string.h b/arch/score/include/asm/string.h
new file mode 100644
index 000000000000..8a6bf5063aa5
--- /dev/null
+++ b/arch/score/include/asm/string.h
@@ -0,0 +1,8 @@
+#ifndef _ASM_SCORE_STRING_H
+#define _ASM_SCORE_STRING_H
+
+extern void *memset(void *__s, int __c, size_t __count);
+extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
+extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
+
+#endif /* _ASM_SCORE_STRING_H */
diff --git a/arch/score/include/asm/swab.h b/arch/score/include/asm/swab.h
new file mode 100644
index 000000000000..fadc3cc6d8a2
--- /dev/null
+++ b/arch/score/include/asm/swab.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_SWAB_H
+#define _ASM_SCORE_SWAB_H
+
+#include <asm-generic/swab.h>
+
+#endif /* _ASM_SCORE_SWAB_H */
diff --git a/arch/score/include/asm/syscalls.h b/arch/score/include/asm/syscalls.h
new file mode 100644
index 000000000000..1dd5e0d6b0c3
--- /dev/null
+++ b/arch/score/include/asm/syscalls.h
@@ -0,0 +1,11 @@
+#ifndef _ASM_SCORE_SYSCALLS_H
+#define _ASM_SCORE_SYSCALLS_H
+
+asmlinkage long score_clone(struct pt_regs *regs);
+asmlinkage long score_execve(struct pt_regs *regs);
+asmlinkage long score_sigaltstack(struct pt_regs *regs);
+asmlinkage long score_rt_sigreturn(struct pt_regs *regs);
+
+#include <asm-generic/syscalls.h>
+
+#endif /* _ASM_SCORE_SYSCALLS_H */
diff --git a/arch/score/include/asm/system.h b/arch/score/include/asm/system.h
new file mode 100644
index 000000000000..589d5c7e171c
--- /dev/null
+++ b/arch/score/include/asm/system.h
@@ -0,0 +1,90 @@
+#ifndef _ASM_SCORE_SYSTEM_H
+#define _ASM_SCORE_SYSTEM_H
+
+#include <linux/types.h>
+#include <linux/irqflags.h>
+
+struct pt_regs;
+struct task_struct;
+
+extern void *resume(void *last, void *next, void *next_ti);
+
+#define switch_to(prev, next, last)                             \
+do {                                                            \
+        (last) = resume(prev, next, task_thread_info(next));    \
+} while (0)
+
+#define finish_arch_switch(prev)        do {} while (0)
+
+typedef void (*vi_handler_t)(void);
+extern unsigned long arch_align_stack(unsigned long sp);
+
+#define mb()            barrier()
+#define rmb()           barrier()
+#define wmb()           barrier()
+#define smp_mb()        barrier()
+#define smp_rmb()       barrier()
+#define smp_wmb()       barrier()
+
+#define read_barrier_depends()          do {} while (0)
+#define smp_read_barrier_depends()      do {} while (0)
+
+#define set_mb(var, value)              do {var = value; wmb(); } while (0)
+
+#define __HAVE_ARCH_CMPXCHG     1
+
+#include <asm-generic/cmpxchg-local.h>
+
+#ifndef __ASSEMBLY__
+
+struct __xchg_dummy { unsigned long a[100]; };
+#define __xg(x) ((struct __xchg_dummy *)(x))
+
+static inline
+unsigned long __xchg(volatile unsigned long *m, unsigned long val)
+{
+        unsigned long retval;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        retval = *m;
+        *m = val;
+        local_irq_restore(flags);
+        return retval;
+}
+
+#define xchg(ptr, v)                                            \
+        ((__typeof__(*(ptr))) __xchg((unsigned long *)(ptr),    \
+                                        (unsigned long)(v)))
+
+static inline unsigned long __cmpxchg(volatile unsigned long *m,
+                                unsigned long old, unsigned long new)
+{
+        unsigned long retval;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        retval = *m;
+        if (retval == old)
+                *m = new;
+        local_irq_restore(flags);
+        return retval;
+}
+
+#define cmpxchg(ptr, o, n)                                      \
+        ((__typeof__(*(ptr))) __cmpxchg((unsigned long *)(ptr), \
+                                        (unsigned long)(o),     \
+                                        (unsigned long)(n)))
+
+extern void __die(const char *, struct pt_regs *, const char *,
+        const char *, unsigned long) __attribute__((noreturn));
+extern void __die_if_kernel(const char *, struct pt_regs *, const char *,
+        const char *, unsigned long);
+
+#define die(msg, regs)                                                  \
+        __die(msg, regs, __FILE__ ":", __func__, __LINE__)
+#define die_if_kernel(msg, regs)                                        \
+        __die_if_kernel(msg, regs, __FILE__ ":", __func__, __LINE__)
+
+#endif /* !__ASSEMBLY__ */
+#endif /* _ASM_SCORE_SYSTEM_H */
diff --git a/arch/score/include/asm/termbits.h b/arch/score/include/asm/termbits.h
new file mode 100644
index 000000000000..9a95c1412437
--- /dev/null
+++ b/arch/score/include/asm/termbits.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_TERMBITS_H
+#define _ASM_SCORE_TERMBITS_H
+
+#include <asm-generic/termbits.h>
+
+#endif /* _ASM_SCORE_TERMBITS_H */
diff --git a/arch/score/include/asm/termios.h b/arch/score/include/asm/termios.h
new file mode 100644
index 000000000000..40984e811ad6
--- /dev/null
+++ b/arch/score/include/asm/termios.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_TERMIOS_H
+#define _ASM_SCORE_TERMIOS_H
+
+#include <asm-generic/termios.h>
+
+#endif /* _ASM_SCORE_TERMIOS_H */
diff --git a/arch/score/include/asm/thread_info.h b/arch/score/include/asm/thread_info.h
new file mode 100644
index 000000000000..55939992c27d
--- /dev/null
+++ b/arch/score/include/asm/thread_info.h
@@ -0,0 +1,108 @@
+#ifndef _ASM_SCORE_THREAD_INFO_H
+#define _ASM_SCORE_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+#define KU_MASK 0x08
+#define KU_USER 0x08
+#define KU_KERN 0x00
+
+#include <asm/page.h>
+#include <linux/const.h>
+
+/* thread information allocation */
+#define THREAD_SIZE_ORDER       (1)
+#define THREAD_SIZE             (PAGE_SIZE << THREAD_SIZE_ORDER)
+#define THREAD_MASK             (THREAD_SIZE - _AC(1,UL))
+#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
+
+#ifndef __ASSEMBLY__
+
+#include <asm/processor.h>
+
+/*
+ * low level task data that entry.S needs immediate access to
+ * - this struct should fit entirely inside of one cache line
+ * - this struct shares the supervisor stack pages
+ * - if the contents of this structure are changed, the assembly constants
+ *   must also be changed
+ */
+struct thread_info {
+        struct task_struct      *task;          /* main task structure */
+        struct exec_domain      *exec_domain;   /* execution domain */
+        unsigned long           flags;          /* low level flags */
+        unsigned long           tp_value;       /* thread pointer */
+        __u32                   cpu;            /* current CPU */
+
+        /* 0 => preemptable, < 0 => BUG */
+        int                     preempt_count;
+
+        /*
+         * thread address space:
+         * 0-0xBFFFFFFF for user-thead
+         * 0-0xFFFFFFFF for kernel-thread
+         */
+        mm_segment_t            addr_limit;
+        struct restart_block    restart_block;
+        struct pt_regs          *regs;
+};
+
+/*
+ * macros/functions for gaining access to the thread information structure
+ *
+ * preempt_count needs to be 1 initially, until the scheduler is functional.
+ */
+#define INIT_THREAD_INFO(tsk)                   \
+{                                               \
+        .task           = &tsk,                 \
+        .exec_domain    = &default_exec_domain, \
+        .cpu            = 0,                    \
+        .preempt_count  = 1,                    \
+        .addr_limit     = KERNEL_DS,            \
+        .restart_block  = {                     \
+                .fn = do_no_restart_syscall,    \
+        },                                      \
+}
+
+#define init_thread_info        (init_thread_union.thread_info)
+#define init_stack              (init_thread_union.stack)
+
+/* How to get the thread information struct from C. */
+register struct thread_info *__current_thread_info __asm__("r28");
+#define current_thread_info()   __current_thread_info
+
+#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL)
+#define free_thread_info(info) kfree(info)
+
+#endif /* !__ASSEMBLY__ */
+
+#define PREEMPT_ACTIVE          0x10000000
+
+/*
+ * thread information flags
+ * - these are process state flags that various assembly files may need to
+ *   access
+ * - pending work-to-be-done flags are in LSW
+ * - other flags in MSW
+ */
+#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
+#define TIF_SIGPENDING          1       /* signal pending */
+#define TIF_NEED_RESCHED        2       /* rescheduling necessary */
+#define TIF_NOTIFY_RESUME       5       /* callback before returning to user */
+#define TIF_RESTORE_SIGMASK     9       /* restore signal mask in do_signal() */
+#define TIF_POLLING_NRFLAG      17      /* true if poll_idle() is polling
+                                                 TIF_NEED_RESCHED */
+#define TIF_MEMDIE              18
+
+#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
+#define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
+#define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
+#define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
+#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
+
+#define _TIF_WORK_MASK          (0x0000ffff)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ASM_SCORE_THREAD_INFO_H */
diff --git a/arch/score/include/asm/timex.h b/arch/score/include/asm/timex.h
new file mode 100644
index 000000000000..a524ae0c5e7b
--- /dev/null
+++ b/arch/score/include/asm/timex.h
@@ -0,0 +1,8 @@
+#ifndef _ASM_SCORE_TIMEX_H
+#define _ASM_SCORE_TIMEX_H
+
+#define CLOCK_TICK_RATE 27000000 /* Timer input freq. */
+
+#include <asm-generic/timex.h>
+
+#endif /* _ASM_SCORE_TIMEX_H */
diff --git a/arch/score/include/asm/tlb.h b/arch/score/include/asm/tlb.h
new file mode 100644
index 000000000000..46882ed524e6
--- /dev/null
+++ b/arch/score/include/asm/tlb.h
@@ -0,0 +1,17 @@
+#ifndef _ASM_SCORE_TLB_H
+#define _ASM_SCORE_TLB_H
+
+/*
+ * SCORE doesn't need any special per-pte or per-vma handling, except
+ * we need to flush cache for area to be unmapped.
+ */
+#define tlb_start_vma(tlb, vma)         do {} while (0)
+#define tlb_end_vma(tlb, vma)           do {} while (0)
+#define __tlb_remove_tlb_entry(tlb, ptep, address) do {} while (0)
+#define tlb_flush(tlb)                  flush_tlb_mm((tlb)->mm)
+
+extern void score7_FTLB_refill_Handler(void);
+
+#include <asm-generic/tlb.h>
+
+#endif /* _ASM_SCORE_TLB_H */
diff --git a/arch/score/include/asm/tlbflush.h b/arch/score/include/asm/tlbflush.h
new file mode 100644
index 000000000000..9cce978367d5
--- /dev/null
+++ b/arch/score/include/asm/tlbflush.h
@@ -0,0 +1,142 @@
+#ifndef _ASM_SCORE_TLBFLUSH_H
+#define _ASM_SCORE_TLBFLUSH_H
+
+#include <linux/mm.h>
+
+/*
+ * TLB flushing:
+ *
+ * - flush_tlb_all() flushes all processes TLB entries
+ * - flush_tlb_mm(mm) flushes the specified mm context TLB entries
+ * - flush_tlb_page(vma, vmaddr) flushes one page
+ * - flush_tlb_range(vma, start, end) flushes a range of pages
+ * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
+ */
+extern void local_flush_tlb_all(void);
+extern void local_flush_tlb_mm(struct mm_struct *mm);
+extern void local_flush_tlb_range(struct vm_area_struct *vma,
+        unsigned long start, unsigned long end);
+extern void local_flush_tlb_kernel_range(unsigned long start,
+        unsigned long end);
+extern void local_flush_tlb_page(struct vm_area_struct *vma,
+        unsigned long page);
+extern void local_flush_tlb_one(unsigned long vaddr);
+
+#define flush_tlb_all()                 local_flush_tlb_all()
+#define flush_tlb_mm(mm)                local_flush_tlb_mm(mm)
+#define flush_tlb_range(vma, vmaddr, end) \
+        local_flush_tlb_range(vma, vmaddr, end)
+#define flush_tlb_kernel_range(vmaddr, end) \
+        local_flush_tlb_kernel_range(vmaddr, end)
+#define flush_tlb_page(vma, page)       local_flush_tlb_page(vma, page)
+#define flush_tlb_one(vaddr)            local_flush_tlb_one(vaddr)
+
+#ifndef __ASSEMBLY__
+
+static inline unsigned long pevn_get(void)
+{
+        unsigned long val;
+
+        __asm__ __volatile__(
+                "mfcr %0, cr11\n"
+                "nop\nnop\n"
+                : "=r" (val));
+
+        return val;
+}
+
+static inline void pevn_set(unsigned long val)
+{
+        __asm__ __volatile__(
+                "mtcr %0, cr11\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+        : : "r" (val));
+}
+
+static inline void pectx_set(unsigned long val)
+{
+        __asm__ __volatile__(
+                "mtcr %0, cr12\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+        : : "r" (val));
+}
+
+static inline unsigned long pectx_get(void)
+{
+        unsigned long val;
+        __asm__ __volatile__(
+                "mfcr %0, cr12\n"
+                "nop\nnop\n"
+        : "=r" (val));
+        return val;
+}
+static inline unsigned long tlblock_get(void)
+{
+        unsigned long val;
+
+        __asm__ __volatile__(
+                "mfcr %0, cr7\n"
+                "nop\nnop\n"
+        : "=r" (val));
+        return val;
+}
+static inline void tlblock_set(unsigned long val)
+{
+        __asm__ __volatile__(
+                "mtcr %0, cr7\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+        : : "r" (val));
+}
+
+static inline void tlbpt_set(unsigned long val)
+{
+        __asm__ __volatile__(
+                "mtcr %0, cr8\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+                : : "r" (val));
+}
+
+static inline long tlbpt_get(void)
+{
+        long val;
+
+        __asm__ __volatile__(
+                "mfcr %0, cr8\n"
+                "nop\nnop\n"
+                : "=r" (val));
+
+        return val;
+}
+
+static inline void peaddr_set(unsigned long val)
+{
+        __asm__ __volatile__(
+                "mtcr %0, cr9\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+                : : "r" (val));
+}
+
+/* TLB operations. */
+static inline void tlb_probe(void)
+{
+        __asm__ __volatile__("stlb;nop;nop;nop;nop;nop");
+}
+
+static inline void tlb_read(void)
+{
+        __asm__ __volatile__("mftlb;nop;nop;nop;nop;nop");
+}
+
+static inline void tlb_write_indexed(void)
+{
+        __asm__ __volatile__("mtptlb;nop;nop;nop;nop;nop");
+}
+
+static inline void tlb_write_random(void)
+{
+        __asm__ __volatile__("mtrtlb;nop;nop;nop;nop;nop");
+}
+
+#endif /* Not __ASSEMBLY__ */
+
+#endif /* _ASM_SCORE_TLBFLUSH_H */
diff --git a/arch/score/include/asm/topology.h b/arch/score/include/asm/topology.h
new file mode 100644
index 000000000000..425fba381f88
--- /dev/null
+++ b/arch/score/include/asm/topology.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_TOPOLOGY_H
+#define _ASM_SCORE_TOPOLOGY_H
+
+#include <asm-generic/topology.h>
+
+#endif /* _ASM_SCORE_TOPOLOGY_H */
diff --git a/arch/score/include/asm/types.h b/arch/score/include/asm/types.h
new file mode 100644
index 000000000000..2140032778ee
--- /dev/null
+++ b/arch/score/include/asm/types.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_TYPES_H
+#define _ASM_SCORE_TYPES_H
+
+#include <asm-generic/types.h>
+
+#endif /* _ASM_SCORE_TYPES_H */
diff --git a/arch/score/include/asm/uaccess.h b/arch/score/include/asm/uaccess.h
new file mode 100644
index 000000000000..ab66ddde777b
--- /dev/null
+++ b/arch/score/include/asm/uaccess.h
@@ -0,0 +1,424 @@
+#ifndef __SCORE_UACCESS_H
+#define __SCORE_UACCESS_H
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/thread_info.h>
+
+#define VERIFY_READ             0
+#define VERIFY_WRITE            1
+
+#define get_ds()                (KERNEL_DS)
+#define get_fs()                (current_thread_info()->addr_limit)
+#define segment_eq(a, b)        ((a).seg == (b).seg)
+
+/*
+ * Is a address valid? This does a straighforward calculation rather
+ * than tests.
+ *
+ * Address valid if:
+ *  - "addr" doesn't have any high-bits set
+ *  - AND "size" doesn't have any high-bits set
+ *  - AND "addr+size" doesn't have any high-bits set
+ *  - OR we are in kernel mode.
+ *
+ * __ua_size() is a trick to avoid runtime checking of positive constant
+ * sizes; for those we already know at compile time that the size is ok.
+ */
+#define __ua_size(size)                                                 \
+        ((__builtin_constant_p(size) && (signed long) (size) > 0) ? 0 : (size))
+
+/*
+ * access_ok: - Checks if a user space pointer is valid
+ * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE.  Note that
+ *        %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
+ *        to write to a block, it is always safe to read from it.
+ * @addr: User space pointer to start of block to check
+ * @size: Size of block to check
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * Checks if a pointer to a block of memory in user space is valid.
+ *
+ * Returns true (nonzero) if the memory block may be valid, false (zero)
+ * if it is definitely invalid.
+ *
+ * Note that, depending on architecture, this function probably just
+ * checks that the pointer is in the user space range - after calling
+ * this function, memory access functions may still return -EFAULT.
+ */
+
+#define __access_ok(addr, size)                                 \
+        (((long)((get_fs().seg) &                               \
+                 ((addr) | ((addr) + (size)) |                  \
+                  __ua_size(size)))) == 0)
+
+#define access_ok(type, addr, size)                             \
+        likely(__access_ok((unsigned long)(addr), (size)))
+
+/*
+ * put_user: - Write a simple value into user space.
+ * @x:   Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ */
+#define put_user(x, ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
+
+/*
+ * get_user: - Get a simple variable from user space.
+ * @x:   Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
+#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
+
+/*
+ * __put_user: - Write a simple value into user space, with less checking.
+ * @x:   Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ */
+#define __put_user(x, ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+/*
+ * __get_user: - Get a simple variable from user space, with less checking.
+ * @x:   Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
+#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
+
+struct __large_struct { unsigned long buf[100]; };
+#define __m(x) (*(struct __large_struct __user *)(x))
+
+/*
+ * Yuck.  We need two variants, one for 64bit operation and one
+ * for 32 bit mode and old iron.
+ */
+extern void __get_user_unknown(void);
+
+#define __get_user_common(val, size, ptr)                               \
+do {                                                                    \
+        switch (size) {                                                 \
+        case 1:                                                         \
+                __get_user_asm(val, "lb", ptr);                         \
+                break;                                                  \
+        case 2:                                                         \
+                __get_user_asm(val, "lh", ptr);                         \
+                 break;                                                 \
+        case 4:                                                         \
+                __get_user_asm(val, "lw", ptr);                         \
+                 break;                                                 \
+        case 8:                                                         \
+                if ((copy_from_user((void *)&val, ptr, 8)) == 0)        \
+                        __gu_err = 0;                                   \
+                else                                                    \
+                        __gu_err = -EFAULT;                             \
+                break;                                                  \
+        default:                                                        \
+                __get_user_unknown();                                   \
+                break;                                                  \
+        }                                                               \
+} while (0)
+
+#define __get_user_nocheck(x, ptr, size)                                \
+({                                                                      \
+        long __gu_err = 0;                                              \
+        __get_user_common((x), size, ptr);                              \
+        __gu_err;                                                       \
+})
+
+#define __get_user_check(x, ptr, size)                                  \
+({                                                                      \
+        long __gu_err = -EFAULT;                                        \
+        const __typeof__(*(ptr)) __user *__gu_ptr = (ptr);              \
+                                                                        \
+        if (likely(access_ok(VERIFY_READ, __gu_ptr, size)))             \
+                __get_user_common((x), size, __gu_ptr);                 \
+                                                                        \
+        __gu_err;                                                       \
+})
+
+#define __get_user_asm(val, insn, addr)                                 \
+{                                                                       \
+        long __gu_tmp;                                                  \
+                                                                        \
+        __asm__ __volatile__(                                           \
+                "1:" insn " %1, %3\n"                                   \
+                "2:\n"                                                  \
+                ".section .fixup,\"ax\"\n"                              \
+                "3:li   %0, %4\n"                                       \
+                "j      2b\n"                                           \
+                ".previous\n"                                           \
+                ".section __ex_table,\"a\"\n"                           \
+                ".word  1b, 3b\n"                                       \
+                ".previous\n"                                           \
+                : "=r" (__gu_err), "=r" (__gu_tmp)                      \
+                : "0" (0), "o" (__m(addr)), "i" (-EFAULT));             \
+                                                                        \
+                (val) = (__typeof__(*(addr))) __gu_tmp;                 \
+}
+
+/*
+ * Yuck.  We need two variants, one for 64bit operation and one
+ * for 32 bit mode and old iron.
+ */
+#define __put_user_nocheck(val, ptr, size)                              \
+({                                                                      \
+        __typeof__(*(ptr)) __pu_val;                                    \
+        long __pu_err = 0;                                              \
+                                                                        \
+        __pu_val = (val);                                               \
+        switch (size) {                                                 \
+        case 1:                                                         \
+                __put_user_asm("sb", ptr);                              \
+                break;                                                  \
+        case 2:                                                         \
+                __put_user_asm("sh", ptr);                              \
+                break;                                                  \
+        case 4:                                                         \
+                __put_user_asm("sw", ptr);                              \
+                break;                                                  \
+        case 8:                                                         \
+                if ((__copy_to_user((void *)ptr, &__pu_val, 8)) == 0)   \
+                        __pu_err = 0;                                   \
+                else                                                    \
+                        __pu_err = -EFAULT;                             \
+                break;                                                  \
+        default:                                                        \
+                 __put_user_unknown();                                  \
+                 break;                                                 \
+        }                                                               \
+        __pu_err;                                                       \
+})
+
+
+#define __put_user_check(val, ptr, size)                                \
+({                                                                      \
+        __typeof__(*(ptr)) __user *__pu_addr = (ptr);                   \
+        __typeof__(*(ptr)) __pu_val = (val);                            \
+        long __pu_err = -EFAULT;                                        \
+                                                                        \
+        if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) {         \
+                switch (size) {                                         \
+                case 1:                                                 \
+                        __put_user_asm("sb", __pu_addr);                \
+                        break;                                          \
+                case 2:                                                 \
+                        __put_user_asm("sh", __pu_addr);                \
+                        break;                                          \
+                case 4:                                                 \
+                        __put_user_asm("sw", __pu_addr);                \
+                        break;                                          \
+                case 8:                                                 \
+                        if ((__copy_to_user((void *)__pu_addr, &__pu_val, 8)) == 0)\
+                                __pu_err = 0;                           \
+                        else                                            \
+                                __pu_err = -EFAULT;                     \
+                        break;                                          \
+                default:                                                \
+                        __put_user_unknown();                           \
+                        break;                                          \
+                }                                                       \
+        }                                                               \
+        __pu_err;                                                       \
+})
+
+#define __put_user_asm(insn, ptr)                                       \
+        __asm__ __volatile__(                                           \
+                "1:" insn " %2, %3\n"                                   \
+                "2:\n"                                                  \
+                ".section .fixup,\"ax\"\n"                              \
+                "3:li %0, %4\n"                                         \
+                "j 2b\n"                                                \
+                ".previous\n"                                           \
+                ".section __ex_table,\"a\"\n"                           \
+                ".word 1b, 3b\n"                                        \
+                ".previous\n"                                           \
+                : "=r" (__pu_err)                                       \
+                : "0" (0), "r" (__pu_val), "o" (__m(ptr)),              \
+                  "i" (-EFAULT));
+
+extern void __put_user_unknown(void);
+extern int __copy_tofrom_user(void *to, const void *from, unsigned long len);
+
+static inline unsigned long
+copy_from_user(void *to, const void *from, unsigned long len)
+{
+        unsigned long over;
+
+        if (access_ok(VERIFY_READ, from, len))
+                return __copy_tofrom_user(to, from, len);
+
+        if ((unsigned long)from < TASK_SIZE) {
+                over = (unsigned long)from + len - TASK_SIZE;
+                return __copy_tofrom_user(to, from, len - over) + over;
+        }
+        return len;
+}
+
+static inline unsigned long
+copy_to_user(void *to, const void *from, unsigned long len)
+{
+        unsigned long over;
+
+        if (access_ok(VERIFY_WRITE, to, len))
+                return __copy_tofrom_user(to, from, len);
+
+        if ((unsigned long)to < TASK_SIZE) {
+                over = (unsigned long)to + len - TASK_SIZE;
+                return __copy_tofrom_user(to, from, len - over) + over;
+        }
+        return len;
+}
+
+#define __copy_from_user(to, from, len) \
+                __copy_tofrom_user((to), (from), (len))
+
+#define __copy_to_user(to, from, len)           \
+                __copy_tofrom_user((to), (from), (len))
+
+static inline unsigned long
+__copy_to_user_inatomic(void *to, const void *from, unsigned long len)
+{
+        return __copy_to_user(to, from, len);
+}
+
+static inline unsigned long
+__copy_from_user_inatomic(void *to, const void *from, unsigned long len)
+{
+        return __copy_from_user(to, from, len);
+}
+
+#define __copy_in_user(to, from, len)   __copy_from_user(to, from, len)
+
+static inline unsigned long
+copy_in_user(void *to, const void *from, unsigned long len)
+{
+        if (access_ok(VERIFY_READ, from, len) &&
+                      access_ok(VERFITY_WRITE, to, len))
+                return copy_from_user(to, from, len);
+}
+
+/*
+ * __clear_user: - Zero a block of memory in user space, with less checking.
+ * @to:   Destination address, in user space.
+ * @n:    Number of bytes to zero.
+ *
+ * Zero a block of memory in user space.  Caller must check
+ * the specified block with access_ok() before calling this function.
+ *
+ * Returns number of bytes that could not be cleared.
+ * On success, this will be zero.
+ */
+extern unsigned long __clear_user(void __user *src, unsigned long size);
+
+static inline unsigned long clear_user(char *src, unsigned long size)
+{
+        if (access_ok(VERIFY_WRITE, src, size))
+                return __clear_user(src, size);
+
+        return -EFAULT;
+}
+/*
+ * __strncpy_from_user: - Copy a NUL terminated string from userspace, with less checking.
+ * @dst:   Destination address, in kernel space.  This buffer must be at
+ *         least @count bytes long.
+ * @src:   Source address, in user space.
+ * @count: Maximum number of bytes to copy, including the trailing NUL.
+ *
+ * Copies a NUL-terminated string from userspace to kernel space.
+ * Caller must check the specified block with access_ok() before calling
+ * this function.
+ *
+ * On success, returns the length of the string (not including the trailing
+ * NUL).
+ *
+ * If access to userspace fails, returns -EFAULT (some data may have been
+ * copied).
+ *
+ * If @count is smaller than the length of the string, copies @count bytes
+ * and returns @count.
+ */
+extern int __strncpy_from_user(char *dst, const char *src, long len);
+
+static inline int strncpy_from_user(char *dst, const char *src, long len)
+{
+        if (access_ok(VERIFY_READ, src, 1))
+                return __strncpy_from_user(dst, src, len);
+
+        return -EFAULT;
+}
+
+extern int __strlen_user(const char *src);
+static inline long strlen_user(const char __user *src)
+{
+        return __strlen_user(src);
+}
+
+extern int __strnlen_user(const char *str, long len);
+static inline long strnlen_user(const char __user *str, long len)
+{
+        if (!access_ok(VERIFY_READ, str, 0))
+                return 0;
+        else            
+                return __strnlen_user(str, len);
+}
+
+struct exception_table_entry {
+        unsigned long insn;
+        unsigned long fixup;
+};
+
+extern int fixup_exception(struct pt_regs *regs);
+
+#endif /* __SCORE_UACCESS_H */
+
diff --git a/arch/score/include/asm/ucontext.h b/arch/score/include/asm/ucontext.h
new file mode 100644
index 000000000000..9bc07b9f30fb
--- /dev/null
+++ b/arch/score/include/asm/ucontext.h
@@ -0,0 +1 @@
+#include <asm-generic/ucontext.h>
diff --git a/arch/score/include/asm/unaligned.h b/arch/score/include/asm/unaligned.h
new file mode 100644
index 000000000000..2fc06de51c62
--- /dev/null
+++ b/arch/score/include/asm/unaligned.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_SCORE_UNALIGNED_H
+#define _ASM_SCORE_UNALIGNED_H
+
+#include <asm-generic/unaligned.h>
+
+#endif /* _ASM_SCORE_UNALIGNED_H */
diff --git a/arch/score/include/asm/unistd.h b/arch/score/include/asm/unistd.h
new file mode 100644
index 000000000000..4aa957364d4d
--- /dev/null
+++ b/arch/score/include/asm/unistd.h
@@ -0,0 +1,13 @@
+#if !defined(_ASM_SCORE_UNISTD_H) || defined(__SYSCALL)
+#define _ASM_SCORE_UNISTD_H
+
+#define __ARCH_HAVE_MMU
+
+#define __ARCH_WANT_SYSCALL_NO_AT
+#define __ARCH_WANT_SYSCALL_NO_FLAGS
+#define __ARCH_WANT_SYSCALL_OFF_T
+#define __ARCH_WANT_SYSCALL_DEPRECATED
+
+#include <asm-generic/unistd.h>
+
+#endif /* _ASM_SCORE_UNISTD_H */
diff --git a/arch/score/include/asm/user.h b/arch/score/include/asm/user.h
new file mode 100644
index 000000000000..7bfb8e2c8054
--- /dev/null
+++ b/arch/score/include/asm/user.h
@@ -0,0 +1,21 @@
+#ifndef _ASM_SCORE_USER_H
+#define _ASM_SCORE_USER_H
+
+struct user_regs_struct {
+        unsigned long regs[32];
+
+        unsigned long cel;
+        unsigned long ceh;
+
+        unsigned long sr0;      /* cnt */
+        unsigned long sr1;      /* lcr */
+        unsigned long sr2;      /* scr */
+
+        unsigned long cp0_epc;
+        unsigned long cp0_ema;
+        unsigned long cp0_psr;
+        unsigned long cp0_ecr;
+        unsigned long cp0_condition;
+};
+
+#endif /* _ASM_SCORE_USER_H */
diff --git a/arch/score/kernel/Makefile b/arch/score/kernel/Makefile
new file mode 100644
index 000000000000..f218673b5d3d
--- /dev/null
+++ b/arch/score/kernel/Makefile
@@ -0,0 +1,11 @@
+#
+# Makefile for the Linux/SCORE kernel.
+#
+
+extra-y := head.o vmlinux.lds
+
+obj-y += entry.o init_task.o irq.o process.o ptrace.o \
+        setup.o signal.o sys_score.o time.o traps.o \
+        sys_call_table.o
+
+obj-$(CONFIG_MODULES) += module.o
diff --git a/arch/score/kernel/asm-offsets.c b/arch/score/kernel/asm-offsets.c
new file mode 100644
index 000000000000..57788f44c6fb
--- /dev/null
+++ b/arch/score/kernel/asm-offsets.c
@@ -0,0 +1,216 @@
+/*
+ * arch/score/kernel/asm-offsets.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/kbuild.h>
+#include <linux/interrupt.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+
+#include <asm-generic/cmpxchg-local.h>
+
+void output_ptreg_defines(void)
+{
+        COMMENT("SCORE pt_regs offsets.");
+        OFFSET(PT_R0, pt_regs, regs[0]);
+        OFFSET(PT_R1, pt_regs, regs[1]);
+        OFFSET(PT_R2, pt_regs, regs[2]);
+        OFFSET(PT_R3, pt_regs, regs[3]);
+        OFFSET(PT_R4, pt_regs, regs[4]);
+        OFFSET(PT_R5, pt_regs, regs[5]);
+        OFFSET(PT_R6, pt_regs, regs[6]);
+        OFFSET(PT_R7, pt_regs, regs[7]);
+        OFFSET(PT_R8, pt_regs, regs[8]);
+        OFFSET(PT_R9, pt_regs, regs[9]);
+        OFFSET(PT_R10, pt_regs, regs[10]);
+        OFFSET(PT_R11, pt_regs, regs[11]);
+        OFFSET(PT_R12, pt_regs, regs[12]);
+        OFFSET(PT_R13, pt_regs, regs[13]);
+        OFFSET(PT_R14, pt_regs, regs[14]);
+        OFFSET(PT_R15, pt_regs, regs[15]);
+        OFFSET(PT_R16, pt_regs, regs[16]);
+        OFFSET(PT_R17, pt_regs, regs[17]);
+        OFFSET(PT_R18, pt_regs, regs[18]);
+        OFFSET(PT_R19, pt_regs, regs[19]);
+        OFFSET(PT_R20, pt_regs, regs[20]);
+        OFFSET(PT_R21, pt_regs, regs[21]);
+        OFFSET(PT_R22, pt_regs, regs[22]);
+        OFFSET(PT_R23, pt_regs, regs[23]);
+        OFFSET(PT_R24, pt_regs, regs[24]);
+        OFFSET(PT_R25, pt_regs, regs[25]);
+        OFFSET(PT_R26, pt_regs, regs[26]);
+        OFFSET(PT_R27, pt_regs, regs[27]);
+        OFFSET(PT_R28, pt_regs, regs[28]);
+        OFFSET(PT_R29, pt_regs, regs[29]);
+        OFFSET(PT_R30, pt_regs, regs[30]);
+        OFFSET(PT_R31, pt_regs, regs[31]);
+
+        OFFSET(PT_ORIG_R4, pt_regs, orig_r4);
+        OFFSET(PT_ORIG_R7, pt_regs, orig_r7);
+        OFFSET(PT_CEL, pt_regs, cel);
+        OFFSET(PT_CEH, pt_regs, ceh);
+        OFFSET(PT_SR0, pt_regs, sr0);
+        OFFSET(PT_SR1, pt_regs, sr1);
+        OFFSET(PT_SR2, pt_regs, sr2);
+        OFFSET(PT_EPC, pt_regs, cp0_epc);
+        OFFSET(PT_EMA, pt_regs, cp0_ema);
+        OFFSET(PT_PSR, pt_regs, cp0_psr);
+        OFFSET(PT_ECR, pt_regs, cp0_ecr);
+        OFFSET(PT_CONDITION, pt_regs, cp0_condition);
+        OFFSET(PT_IS_SYSCALL, pt_regs, is_syscall);
+
+        DEFINE(PT_SIZE, sizeof(struct pt_regs));
+        BLANK();
+}
+
+void output_task_defines(void)
+{
+        COMMENT("SCORE task_struct offsets.");
+        OFFSET(TASK_STATE, task_struct, state);
+        OFFSET(TASK_THREAD_INFO, task_struct, stack);
+        OFFSET(TASK_FLAGS, task_struct, flags);
+        OFFSET(TASK_MM, task_struct, mm);
+        OFFSET(TASK_PID, task_struct, pid);
+        DEFINE(TASK_STRUCT_SIZE, sizeof(struct task_struct));
+        BLANK();
+}
+
+void output_thread_info_defines(void)
+{
+        COMMENT("SCORE thread_info offsets.");
+        OFFSET(TI_TASK, thread_info, task);
+        OFFSET(TI_EXEC_DOMAIN, thread_info, exec_domain);
+        OFFSET(TI_FLAGS, thread_info, flags);
+        OFFSET(TI_TP_VALUE, thread_info, tp_value);
+        OFFSET(TI_CPU, thread_info, cpu);
+        OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
+        OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
+        OFFSET(TI_RESTART_BLOCK, thread_info, restart_block);
+        OFFSET(TI_REGS, thread_info, regs);
+        DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
+        DEFINE(KERNEL_STACK_MASK, THREAD_MASK);
+        BLANK();
+}
+
+void output_thread_defines(void)
+{
+        COMMENT("SCORE specific thread_struct offsets.");
+        OFFSET(THREAD_REG0, task_struct, thread.reg0);
+        OFFSET(THREAD_REG2, task_struct, thread.reg2);
+        OFFSET(THREAD_REG3, task_struct, thread.reg3);
+        OFFSET(THREAD_REG12, task_struct, thread.reg12);
+        OFFSET(THREAD_REG13, task_struct, thread.reg13);
+        OFFSET(THREAD_REG14, task_struct, thread.reg14);
+        OFFSET(THREAD_REG15, task_struct, thread.reg15);
+        OFFSET(THREAD_REG16, task_struct, thread.reg16);
+        OFFSET(THREAD_REG17, task_struct, thread.reg17);
+        OFFSET(THREAD_REG18, task_struct, thread.reg18);
+        OFFSET(THREAD_REG19, task_struct, thread.reg19);
+        OFFSET(THREAD_REG20, task_struct, thread.reg20);
+        OFFSET(THREAD_REG21, task_struct, thread.reg21);
+        OFFSET(THREAD_REG29, task_struct, thread.reg29);
+
+        OFFSET(THREAD_PSR, task_struct, thread.cp0_psr);
+        OFFSET(THREAD_EMA, task_struct, thread.cp0_ema);
+        OFFSET(THREAD_BADUADDR, task_struct, thread.cp0_baduaddr);
+        OFFSET(THREAD_ECODE, task_struct, thread.error_code);
+        OFFSET(THREAD_TRAPNO, task_struct, thread.trap_no);
+        BLANK();
+}
+
+void output_mm_defines(void)
+{
+        COMMENT("Size of struct page");
+        DEFINE(STRUCT_PAGE_SIZE, sizeof(struct page));
+        BLANK();
+        COMMENT("Linux mm_struct offsets.");
+        OFFSET(MM_USERS, mm_struct, mm_users);
+        OFFSET(MM_PGD, mm_struct, pgd);
+        OFFSET(MM_CONTEXT, mm_struct, context);
+        BLANK();
+        DEFINE(_PAGE_SIZE, PAGE_SIZE);
+        DEFINE(_PAGE_SHIFT, PAGE_SHIFT);
+        BLANK();
+        DEFINE(_PGD_T_SIZE, sizeof(pgd_t));
+        DEFINE(_PTE_T_SIZE, sizeof(pte_t));
+        BLANK();
+        DEFINE(_PGD_ORDER, PGD_ORDER);
+        DEFINE(_PTE_ORDER, PTE_ORDER);
+        BLANK();
+        DEFINE(_PGDIR_SHIFT, PGDIR_SHIFT);
+        BLANK();
+        DEFINE(_PTRS_PER_PGD, PTRS_PER_PGD);
+        DEFINE(_PTRS_PER_PTE, PTRS_PER_PTE);
+        BLANK();
+}
+
+void output_sc_defines(void)
+{
+        COMMENT("Linux sigcontext offsets.");
+        OFFSET(SC_REGS, sigcontext, sc_regs);
+        OFFSET(SC_MDCEH, sigcontext, sc_mdceh);
+        OFFSET(SC_MDCEL, sigcontext, sc_mdcel);
+        OFFSET(SC_PC, sigcontext, sc_pc);
+        OFFSET(SC_PSR, sigcontext, sc_psr);
+        OFFSET(SC_ECR, sigcontext, sc_ecr);
+        OFFSET(SC_EMA, sigcontext, sc_ema);
+        BLANK();
+}
+
+void output_signal_defined(void)
+{
+        COMMENT("Linux signal numbers.");
+        DEFINE(_SIGHUP, SIGHUP);
+        DEFINE(_SIGINT, SIGINT);
+        DEFINE(_SIGQUIT, SIGQUIT);
+        DEFINE(_SIGILL, SIGILL);
+        DEFINE(_SIGTRAP, SIGTRAP);
+        DEFINE(_SIGIOT, SIGIOT);
+        DEFINE(_SIGABRT, SIGABRT);
+        DEFINE(_SIGFPE, SIGFPE);
+        DEFINE(_SIGKILL, SIGKILL);
+        DEFINE(_SIGBUS, SIGBUS);
+        DEFINE(_SIGSEGV, SIGSEGV);
+        DEFINE(_SIGSYS, SIGSYS);
+        DEFINE(_SIGPIPE, SIGPIPE);
+        DEFINE(_SIGALRM, SIGALRM);
+        DEFINE(_SIGTERM, SIGTERM);
+        DEFINE(_SIGUSR1, SIGUSR1);
+        DEFINE(_SIGUSR2, SIGUSR2);
+        DEFINE(_SIGCHLD, SIGCHLD);
+        DEFINE(_SIGPWR, SIGPWR);
+        DEFINE(_SIGWINCH, SIGWINCH);
+        DEFINE(_SIGURG, SIGURG);
+        DEFINE(_SIGIO, SIGIO);
+        DEFINE(_SIGSTOP, SIGSTOP);
+        DEFINE(_SIGTSTP, SIGTSTP);
+        DEFINE(_SIGCONT, SIGCONT);
+        DEFINE(_SIGTTIN, SIGTTIN);
+        DEFINE(_SIGTTOU, SIGTTOU);
+        DEFINE(_SIGVTALRM, SIGVTALRM);
+        DEFINE(_SIGPROF, SIGPROF);
+        DEFINE(_SIGXCPU, SIGXCPU);
+        DEFINE(_SIGXFSZ, SIGXFSZ);
+        BLANK();
+}
diff --git a/arch/score/kernel/entry.S b/arch/score/kernel/entry.S
new file mode 100644
index 000000000000..577abba3fac6
--- /dev/null
+++ b/arch/score/kernel/entry.S
@@ -0,0 +1,514 @@
+/*
+ * arch/score/kernel/entry.S
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/linkage.h>
+
+#include <asm/asmmacro.h>
+#include <asm/thread_info.h>
+#include <asm/unistd.h>
+
+/*
+ * disable interrupts.
+ */
+.macro  disable_irq
+        mfcr    r8, cr0
+        srli    r8, r8, 1
+        slli    r8, r8, 1
+        mtcr    r8, cr0
+        nop
+        nop
+        nop
+        nop
+        nop
+.endm
+
+/*
+ * enable interrupts.
+ */
+.macro  enable_irq
+        mfcr    r8, cr0
+        ori     r8, 1
+        mtcr    r8, cr0
+        nop
+        nop
+        nop
+        nop
+        nop
+.endm
+
+__INIT
+ENTRY(debug_exception_vector)
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+
+ENTRY(general_exception_vector)                 # should move to addr 0x200
+        j       general_exception
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+
+ENTRY(interrupt_exception_vector)               # should move to addr 0x210
+        j       interrupt_exception
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+        nop!
+
+        .section ".text", "ax"
+        .align  2;
+general_exception:
+        mfcr    r31, cr2
+        nop
+        la      r30, exception_handlers
+        andi    r31, 0x1f                       # get ecr.exc_code
+        slli    r31, r31, 2
+        add     r30, r30, r31
+        lw      r30, [r30]
+        br      r30
+
+interrupt_exception:
+        SAVE_ALL
+        mfcr    r4, cr2
+        nop
+        lw      r16, [r28, TI_REGS]
+        sw      r0, [r28, TI_REGS]
+        la      r3, ret_from_irq
+        srli    r4, r4, 18                      # get ecr.ip[7:2], interrupt No.
+        mv      r5, r0
+        j       do_IRQ
+
+ENTRY(handle_nmi)                               # NMI #1
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, nmi_exception_handler
+        brl     r8
+        j       restore_all
+
+ENTRY(handle_adelinsn)                          # AdEL-instruction #2
+        SAVE_ALL
+        mfcr    r8, cr6
+        nop
+        nop
+        sw      r8, [r0, PT_EMA]
+        mv      r4, r0
+        la      r8, do_adelinsn
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_ibe)                               # BusEL-instruction #5
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_be
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_pel)                               # P-EL #6
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_pel
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_ccu)                               # CCU #8
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_ccu
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_ri)                                # RI #9
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_ri
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_tr)                                # Trap #10
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_tr
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_adedata)                           # AdES-instruction #12
+        SAVE_ALL
+        mfcr    r8, cr6
+        nop
+        nop
+        sw      r8, [r0, PT_EMA]
+        mv      r4, r0
+        la      r8, do_adedata
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_cee)                               # CeE #16
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_cee
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_cpe)                               # CpE #17
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_cpe
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_dbe)                               # BusEL-data #18
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_be
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+ENTRY(handle_reserved)                          # others
+        SAVE_ALL
+        mv      r4, r0
+        la      r8, do_reserved
+        brl     r8
+        mv      r4, r0
+        j       ret_from_exception
+        nop
+
+#ifndef CONFIG_PREEMPT
+#define resume_kernel   restore_all
+#else
+#define __ret_from_irq  ret_from_exception
+#endif
+
+        .align  2
+#ifndef CONFIG_PREEMPT
+ENTRY(ret_from_exception)
+        disable_irq                     # preempt stop
+        nop
+        j       __ret_from_irq
+        nop
+#endif
+
+ENTRY(ret_from_irq)
+        sw      r16, [r28, TI_REGS]
+
+ENTRY(__ret_from_irq)
+        lw      r8, [r0, PT_PSR]        # returning to kernel mode?
+        andri.c r8, r8, KU_USER
+        beq     resume_kernel
+
+resume_userspace:
+        disable_irq
+        lw      r6, [r28, TI_FLAGS]     # current->work
+        li      r8, _TIF_WORK_MASK
+        and.c   r8, r8, r6              # ignoring syscall_trace
+        bne     work_pending
+        nop
+        j       restore_all
+        nop
+
+#ifdef CONFIG_PREEMPT
+resume_kernel:
+        disable_irq
+        lw      r8, [r28, TI_PRE_COUNT]
+        cmpz.c  r8
+        bne     r8, restore_all
+need_resched:
+        lw      r8, [r28, TI_FLAGS]
+        andri.c r9, r8, _TIF_NEED_RESCHED
+        beq     restore_all
+        lw      r8, [r28, PT_PSR]               # Interrupts off?
+        andri.c r8, r8, 1
+        beq     restore_all
+        bl      preempt_schedule_irq
+        nop
+        j       need_resched
+        nop
+#endif
+
+ENTRY(ret_from_fork)
+        bl      schedule_tail                   # r4=struct task_struct *prev
+
+ENTRY(syscall_exit)
+        nop
+        disable_irq
+        lw      r6, [r28, TI_FLAGS]             # current->work
+        li      r8, _TIF_WORK_MASK
+        and.c   r8, r6, r8
+        bne     syscall_exit_work
+
+ENTRY(restore_all)                                      # restore full frame
+        RESTORE_ALL_AND_RET
+
+work_pending:
+        andri.c r8, r6, _TIF_NEED_RESCHED # r6 is preloaded with TI_FLAGS
+        beq     work_notifysig
+work_resched:
+        bl      schedule
+        nop
+        disable_irq
+        lw      r6, [r28, TI_FLAGS]
+        li      r8, _TIF_WORK_MASK
+        and.c   r8, r6, r8      # is there any work to be done
+                                # other than syscall tracing?
+        beq     restore_all
+        andri.c r8, r6, _TIF_NEED_RESCHED
+        bne     work_resched
+
+work_notifysig:
+        mv      r4, r0
+        li      r5, 0
+        bl      do_notify_resume        # r6 already loaded
+        nop
+        j       resume_userspace
+        nop
+
+ENTRY(syscall_exit_work)
+        li      r8, _TIF_SYSCALL_TRACE
+        and.c   r8, r8, r6              # r6 is preloaded with TI_FLAGS
+        beq     work_pending            # trace bit set?
+        nop
+        enable_irq
+        mv      r4, r0
+        li      r5, 1
+        bl      do_syscall_trace
+        nop
+        b       resume_userspace
+        nop
+
+.macro  save_context    reg
+        sw      r12, [\reg, THREAD_REG12];
+        sw      r13, [\reg, THREAD_REG13];
+        sw      r14, [\reg, THREAD_REG14];
+        sw      r15, [\reg, THREAD_REG15];
+        sw      r16, [\reg, THREAD_REG16];
+        sw      r17, [\reg, THREAD_REG17];
+        sw      r18, [\reg, THREAD_REG18];
+        sw      r19, [\reg, THREAD_REG19];
+        sw      r20, [\reg, THREAD_REG20];
+        sw      r21, [\reg, THREAD_REG21];
+        sw      r29, [\reg, THREAD_REG29];
+        sw      r2, [\reg, THREAD_REG2];
+        sw      r0, [\reg, THREAD_REG0]
+.endm
+
+.macro  restore_context reg
+        lw      r12, [\reg, THREAD_REG12];
+        lw      r13, [\reg, THREAD_REG13];
+        lw      r14, [\reg, THREAD_REG14];
+        lw      r15, [\reg, THREAD_REG15];
+        lw      r16, [\reg, THREAD_REG16];
+        lw      r17, [\reg, THREAD_REG17];
+        lw      r18, [\reg, THREAD_REG18];
+        lw      r19, [\reg, THREAD_REG19];
+        lw      r20, [\reg, THREAD_REG20];
+        lw      r21, [\reg, THREAD_REG21];
+        lw      r29, [\reg, THREAD_REG29];
+        lw      r0, [\reg, THREAD_REG0];
+        lw      r2, [\reg, THREAD_REG2];
+        lw      r3, [\reg, THREAD_REG3]
+.endm
+
+/*
+ * task_struct *resume(task_struct *prev, task_struct *next,
+ *                      struct thread_info *next_ti)
+ */
+ENTRY(resume)
+        mfcr    r9, cr0
+        nop
+        nop
+        sw      r9, [r4, THREAD_PSR]
+        save_context    r4
+        sw      r3, [r4, THREAD_REG3]
+
+        mv      r28, r6
+        restore_context r5
+        mv      r8, r6
+        addi    r8, KERNEL_STACK_SIZE
+        subi    r8, 32
+        la      r9, kernelsp;
+        sw      r8, [r9];
+
+        mfcr    r9, cr0
+        ldis    r7, 0x00ff
+        nop
+        and     r9, r9, r7
+        lw      r6, [r5, THREAD_PSR]
+        not     r7, r7
+        and     r6, r6, r7
+        or      r6, r6, r9
+        mtcr    r6, cr0
+        nop; nop; nop; nop; nop
+        br      r3
+
+ENTRY(handle_sys)
+        SAVE_ALL
+        sw      r8, [r0, 16]            # argument 5 from user r8
+        sw      r9, [r0, 20]            # argument 6 from user r9
+        enable_irq
+
+        sw      r4, [r0, PT_ORIG_R4]    #for restart syscall
+        sw      r7, [r0, PT_ORIG_R7]    #for restart syscall
+        sw      r27, [r0, PT_IS_SYSCALL] # it from syscall
+
+        lw      r9, [r0, PT_EPC]        # skip syscall on return
+        addi    r9, 4
+        sw      r9, [r0, PT_EPC]
+
+        cmpi.c  r27, __NR_syscalls      # check syscall number
+        bgtu    illegal_syscall
+
+        slli    r8, r27, 2              # get syscall routine
+        la      r11, sys_call_table
+        add     r11, r11, r8
+        lw      r10, [r11]              # get syscall entry
+
+        cmpz.c  r10
+        beq     illegal_syscall
+
+        lw      r8, [r28, TI_FLAGS]
+        li      r9, _TIF_SYSCALL_TRACE
+        and.c   r8, r8, r9
+        bne     syscall_trace_entry
+
+        brl     r10                     # Do The Real system call
+
+        cmpi.c  r4, 0
+        blt     1f
+        ldi     r8, 0
+        sw      r8, [r0, PT_R7]
+        b 2f
+1:
+        cmpi.c  r4, -MAX_ERRNO - 1
+        ble     2f
+        ldi     r8, 0x1;
+        sw      r8, [r0, PT_R7]
+        neg     r4, r4
+2:
+        sw      r4, [r0, PT_R4]         # save result
+
+syscall_return:
+        disable_irq
+        lw      r6, [r28, TI_FLAGS]     # current->work
+        li      r8, _TIF_WORK_MASK
+        and.c   r8, r6, r8
+        bne     syscall_return_work
+        j       restore_all
+
+syscall_return_work:
+        j       syscall_exit_work
+
+syscall_trace_entry:
+        mv      r16, r10
+        mv      r4, r0
+        li      r5, 0
+        bl      do_syscall_trace
+
+        mv      r8, r16
+        lw      r4, [r0, PT_R4]         # Restore argument registers
+        lw      r5, [r0, PT_R5]
+        lw      r6, [r0, PT_R6]
+        lw      r7, [r0, PT_R7]
+        brl     r8
+
+        li      r8, -MAX_ERRNO - 1
+        sw      r8, [r0, PT_R7]         # set error flag
+
+        neg     r4, r4                  # error
+        sw      r4, [r0, PT_R0]         # set flag for syscall
+                                        # restarting
+1:      sw      r4, [r0, PT_R2]         # result
+        j       syscall_exit
+
+illegal_syscall:
+        ldi     r4, -ENOSYS             # error
+        sw      r4, [r0, PT_ORIG_R4]
+        sw      r4, [r0, PT_R4]
+        ldi     r9, 1                   # set error flag
+        sw      r9, [r0, PT_R7]
+        j       syscall_return
+
+ENTRY(sys_execve)
+        mv      r4, r0
+        la      r8, score_execve
+        br      r8
+
+ENTRY(sys_clone)
+        mv      r4, r0
+        la      r8, score_clone
+        br      r8
+
+ENTRY(sys_rt_sigreturn)
+        mv      r4, r0
+        la      r8, score_rt_sigreturn
+        br      r8
+
+ENTRY(sys_sigaltstack)
+        mv      r4, r0
+        la      r8, score_sigaltstack
+        br      r8
+
+#ifdef __ARCH_WANT_SYSCALL_DEPRECATED
+ENTRY(sys_fork)
+        mv      r4, r0
+        la      r8, score_fork
+        br      r8
+
+ENTRY(sys_vfork)
+        mv      r4, r0
+        la      r8, score_vfork
+        br      r8
+#endif /* __ARCH_WANT_SYSCALL_DEPRECATED */
+
diff --git a/arch/score/kernel/head.S b/arch/score/kernel/head.S
new file mode 100644
index 000000000000..22a7e3c7292b
--- /dev/null
+++ b/arch/score/kernel/head.S
@@ -0,0 +1,70 @@
+/*
+ * arch/score/kernel/head.S
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/init.h>
+#include <linux/linkage.h>
+
+#include <asm/asm-offsets.h>
+
+        .extern start_kernel
+        .global init_thread_union
+        .global kernelsp
+
+__INIT
+ENTRY(_stext)
+        la      r30, __bss_start        /* initialize BSS segment. */
+        la      r31, _end
+        xor     r8, r8, r8
+
+1:      cmp.c   r31, r30
+        beq     2f
+
+        sw      r8, [r30]               /* clean memory. */
+        addi    r30, 4
+        b       1b
+
+2:      la      r28, init_thread_union  /* set kernel stack. */
+        mv      r0, r28
+        addi    r0, KERNEL_STACK_SIZE - 32
+        la      r30, kernelsp
+        sw      r0, [r30]
+        subi    r0, 4*4
+        xor     r30, r30, r30
+        ori     r30, 0x02               /* enable MMU. */
+        mtcr    r30, cr4
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+
+        /* there is no parameter */
+        xor     r4, r4, r4
+        xor     r5, r5, r5
+        xor     r6, r6, r6
+        xor     r7, r7, r7
+        la      r30, start_kernel       /* jump to init_arch */
+        br      r30
diff --git a/arch/score/kernel/init_task.c b/arch/score/kernel/init_task.c
new file mode 100644
index 000000000000..baa03ee217d1
--- /dev/null
+++ b/arch/score/kernel/init_task.c
@@ -0,0 +1,46 @@
+/*
+ * arch/score/kernel/init_task.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/init_task.h>
+#include <linux/mqueue.h>
+
+static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
+static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
+
+/*
+ * Initial thread structure.
+ *
+ * We need to make sure that this is THREAD_SIZE aligned due to the
+ * way process stacks are handled. This is done by having a special
+ * "init_task" linker map entry..
+ */
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
+
+/*
+ * Initial task structure.
+ *
+ * All other task structs will be allocated on slabs in fork.c
+ */
+struct task_struct init_task = INIT_TASK(init_task);
+EXPORT_SYMBOL(init_task);
diff --git a/arch/score/kernel/irq.c b/arch/score/kernel/irq.c
new file mode 100644
index 000000000000..47647dde09ca
--- /dev/null
+++ b/arch/score/kernel/irq.c
@@ -0,0 +1,148 @@
+/*
+ * arch/score/kernel/irq.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/seq_file.h>
+
+#include <asm/io.h>
+
+/* the interrupt controller is hardcoded at this address */
+#define SCORE_PIC               ((u32 __iomem __force *)0x95F50000)
+
+#define INT_PNDL                0
+#define INT_PNDH                1
+#define INT_PRIORITY_M          2
+#define INT_PRIORITY_SG0        4
+#define INT_PRIORITY_SG1        5
+#define INT_PRIORITY_SG2        6
+#define INT_PRIORITY_SG3        7
+#define INT_MASKL               8
+#define INT_MASKH               9
+
+/*
+ * handles all normal device IRQs
+ */
+asmlinkage void do_IRQ(int irq)
+{
+        irq_enter();
+        generic_handle_irq(irq);
+        irq_exit();
+}
+
+static void score_mask(unsigned int irq_nr)
+{
+        unsigned int irq_source = 63 - irq_nr;
+
+        if (irq_source < 32)
+                __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \
+                        (1 << irq_source)), SCORE_PIC + INT_MASKL);
+        else
+                __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) | \
+                        (1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
+}
+
+static void score_unmask(unsigned int irq_nr)
+{
+        unsigned int irq_source = 63 - irq_nr;
+
+        if (irq_source < 32)
+                __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \
+                        ~(1 << irq_source)), SCORE_PIC + INT_MASKL);
+        else
+                __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) & \
+                        ~(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
+}
+
+struct irq_chip score_irq_chip = {
+        .name           = "Score7-level",
+        .mask           = score_mask,
+        .mask_ack       = score_mask,
+        .unmask         = score_unmask,
+};
+
+/*
+ * initialise the interrupt system
+ */
+void __init init_IRQ(void)
+{
+        int index;
+        unsigned long target_addr;
+
+        for (index = 0; index < NR_IRQS; ++index)
+                set_irq_chip_and_handler(index, &score_irq_chip,
+                                         handle_level_irq);
+
+        for (target_addr = IRQ_VECTOR_BASE_ADDR;
+                target_addr <= IRQ_VECTOR_END_ADDR;
+                target_addr += IRQ_VECTOR_SIZE)
+                memcpy((void *)target_addr, \
+                        interrupt_exception_vector, IRQ_VECTOR_SIZE);
+
+        __raw_writel(0xffffffff, SCORE_PIC + INT_MASKL);
+        __raw_writel(0xffffffff, SCORE_PIC + INT_MASKH);
+
+        __asm__ __volatile__(
+                "mtcr   %0, cr3\n\t"
+                : : "r" (EXCEPTION_VECTOR_BASE_ADDR | \
+                        VECTOR_ADDRESS_OFFSET_MODE16));
+}
+
+/*
+ * Generic, controller-independent functions:
+ */
+int show_interrupts(struct seq_file *p, void *v)
+{
+        int i = *(loff_t *)v, cpu;
+        struct irqaction *action;
+        unsigned long flags;
+
+        if (i == 0) {
+                seq_puts(p, "           ");
+                for_each_online_cpu(cpu)
+                        seq_printf(p, "CPU%d       ", cpu);
+                seq_putc(p, '\n');
+        }
+
+        if (i < NR_IRQS) {
+                spin_lock_irqsave(&irq_desc[i].lock, flags);
+                action = irq_desc[i].action;
+                if (!action)
+                        goto unlock;
+
+                seq_printf(p, "%3d: ", i);
+                seq_printf(p, "%10u ", kstat_irqs(i));
+                seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
+                seq_printf(p, "  %s", action->name);
+                for (action = action->next; action; action = action->next)
+                        seq_printf(p, ", %s", action->name);
+
+                seq_putc(p, '\n');
+unlock:
+                spin_unlock_irqrestore(&irq_desc[i].lock, flags);
+        }
+
+        return 0;
+}
diff --git a/arch/score/kernel/module.c b/arch/score/kernel/module.c
new file mode 100644
index 000000000000..4de8d47becd3
--- /dev/null
+++ b/arch/score/kernel/module.c
@@ -0,0 +1,165 @@
+/*
+ * arch/score/kernel/module.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/moduleloader.h>
+#include <linux/module.h>
+#include <linux/vmalloc.h>
+
+void *module_alloc(unsigned long size)
+{
+        return size ? vmalloc(size) : NULL;
+}
+
+/* Free memory returned from module_alloc */
+void module_free(struct module *mod, void *module_region)
+{
+        vfree(module_region);
+}
+
+int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
+                        char *secstrings, struct module *mod)
+{
+        return 0;
+}
+
+int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
+                unsigned int symindex, unsigned int relindex,
+                struct module *me)
+{
+        Elf32_Shdr *symsec = sechdrs + symindex;
+        Elf32_Shdr *relsec = sechdrs + relindex;
+        Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
+        Elf32_Rel *rel = (void *)relsec->sh_addr;
+        unsigned int i;
+
+        for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
+                unsigned long loc;
+                Elf32_Sym *sym;
+                s32 r_offset;
+
+                r_offset = ELF32_R_SYM(rel->r_info);
+                if ((r_offset < 0) ||
+                    (r_offset > (symsec->sh_size / sizeof(Elf32_Sym)))) {
+                        printk(KERN_ERR "%s: bad relocation, section %d reloc %d\n",
+                                me->name, relindex, i);
+                                return -ENOEXEC;
+                }
+
+                sym = ((Elf32_Sym *)symsec->sh_addr) + r_offset;
+
+                if ((rel->r_offset < 0) ||
+                    (rel->r_offset > dstsec->sh_size - sizeof(u32))) {
+                        printk(KERN_ERR "%s: out of bounds relocation, "
+                                "section %d reloc %d offset %d size %d\n",
+                                me->name, relindex, i, rel->r_offset,
+                                dstsec->sh_size);
+                        return -ENOEXEC;
+                }
+
+                loc = dstsec->sh_addr + rel->r_offset;
+                switch (ELF32_R_TYPE(rel->r_info)) {
+                case R_SCORE_NONE:
+                        break;
+                case R_SCORE_ABS32:
+                        *(unsigned long *)loc += sym->st_value;
+                        break;
+                case R_SCORE_HI16:
+                        break;
+                case R_SCORE_LO16: {
+                        unsigned long hi16_offset, offset;
+                        unsigned long uvalue;
+                        unsigned long temp, temp_hi;
+                        temp_hi = *((unsigned long *)loc - 1);
+                        temp = *(unsigned long *)loc;
+
+                        hi16_offset = (((((temp_hi) >> 16) & 0x3) << 15) |
+                                        ((temp_hi) & 0x7fff)) >> 1;
+                        offset = ((temp >> 16 & 0x03) << 15) |
+                                        ((temp & 0x7fff) >> 1);
+                        offset = (hi16_offset << 16) | (offset & 0xffff);
+                        uvalue = sym->st_value + offset;
+                        hi16_offset = (uvalue >> 16) << 1;
+
+                        temp_hi = ((temp_hi) & (~(0x37fff))) |
+                                        (hi16_offset & 0x7fff) |
+                                        ((hi16_offset << 1) & 0x30000);
+                        *((unsigned long *)loc - 1) = temp_hi;
+
+                        offset = (uvalue & 0xffff) << 1;
+                        temp = (temp & (~(0x37fff))) | (offset & 0x7fff) |
+                                ((offset << 1) & 0x30000);
+                        *(unsigned long *)loc = temp;
+                        break;
+                }
+                case R_SCORE_24: {
+                        unsigned long hi16_offset, offset;
+                        unsigned long uvalue;
+                        unsigned long temp;
+
+                        temp = *(unsigned long *)loc;
+                        offset = (temp & 0x03FF7FFE);
+                        hi16_offset = (offset & 0xFFFF0000);
+                        offset = (hi16_offset | ((offset & 0xFFFF) << 1)) >> 2;
+
+                        uvalue = (sym->st_value + offset) >> 1;
+                        uvalue = uvalue & 0x00ffffff;
+
+                        temp = (temp & 0xfc008001) |
+                                ((uvalue << 2) & 0x3ff0000) |
+                                ((uvalue & 0x3fff) << 1);
+                        *(unsigned long *)loc = temp;
+                        break;
+                }
+                default:
+                        printk(KERN_ERR "%s: unknown relocation: %u\n",
+                                me->name, ELF32_R_TYPE(rel->r_info));
+                        return -ENOEXEC;
+                }
+        }
+
+        return 0;
+}
+
+int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
+                unsigned int symindex, unsigned int relsec,
+                struct module *me)
+{
+        return 0;
+}
+
+/* Given an address, look for it in the module exception tables. */
+const struct exception_table_entry *search_module_dbetables(unsigned long addr)
+{
+        return NULL;
+}
+
+/* Put in dbe list if necessary. */
+int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
+                struct module *me)
+{
+        return 0;
+}
+
+void module_arch_cleanup(struct module *mod) {}
diff --git a/arch/score/kernel/process.c b/arch/score/kernel/process.c
new file mode 100644
index 000000000000..25d08030a883
--- /dev/null
+++ b/arch/score/kernel/process.c
@@ -0,0 +1,168 @@
+/*
+ * arch/score/kernel/process.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include <linux/reboot.h>
+#include <linux/elfcore.h>
+#include <linux/pm.h>
+
+void (*pm_power_off)(void);
+EXPORT_SYMBOL(pm_power_off);
+
+/* If or when software machine-restart is implemented, add code here. */
+void machine_restart(char *command) {}
+
+/* If or when software machine-halt is implemented, add code here. */
+void machine_halt(void) {}
+
+/* If or when software machine-power-off is implemented, add code here. */
+void machine_power_off(void) {}
+
+/*
+ * The idle thread. There's no useful work to be
+ * done, so just try to conserve power and have a
+ * low exit latency (ie sit in a loop waiting for
+ * somebody to say that they'd like to reschedule)
+ */
+void __noreturn cpu_idle(void)
+{
+        /* endless idle loop with no priority at all */
+        while (1) {
+                while (!need_resched())
+                        barrier();
+
+                preempt_enable_no_resched();
+                schedule();
+                preempt_disable();
+        }
+}
+
+void ret_from_fork(void);
+
+void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)
+{
+        unsigned long status;
+
+        /* New thread loses kernel privileges. */
+        status = regs->cp0_psr & ~(KU_MASK);
+        status |= KU_USER;
+        regs->cp0_psr = status;
+        regs->cp0_epc = pc;
+        regs->regs[0] = sp;
+}
+
+void exit_thread(void) {}
+
+/*
+ * When a process does an "exec", machine state like FPU and debug
+ * registers need to be reset.  This is a hook function for that.
+ * Currently we don't have any such state to reset, so this is empty.
+ */
+void flush_thread(void) {}
+
+/*
+ * set up the kernel stack and exception frames for a new process
+ */
+int copy_thread(unsigned long clone_flags, unsigned long usp,
+                unsigned long unused,
+                struct task_struct *p, struct pt_regs *regs)
+{
+        struct thread_info *ti = task_thread_info(p);
+        struct pt_regs *childregs = task_pt_regs(p);
+
+        p->set_child_tid = NULL;
+        p->clear_child_tid = NULL;
+
+        *childregs = *regs;
+        childregs->regs[7] = 0;         /* Clear error flag */
+        childregs->regs[4] = 0;         /* Child gets zero as return value */
+        regs->regs[4] = p->pid;
+
+        if (childregs->cp0_psr & 0x8) { /* test kernel fork or user fork */
+                childregs->regs[0] = usp;               /* user fork */
+        } else {
+                childregs->regs[28] = (unsigned long) ti; /* kernel fork */
+                childregs->regs[0] = (unsigned long) childregs;
+        }
+
+        p->thread.reg0 = (unsigned long) childregs;
+        p->thread.reg3 = (unsigned long) ret_from_fork;
+        p->thread.cp0_psr = 0;
+
+        return 0;
+}
+
+/* Fill in the fpu structure for a core dump. */
+int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
+{
+        return 1;
+}
+
+static void __noreturn
+kernel_thread_helper(void *unused0, int (*fn)(void *),
+                 void *arg, void *unused1)
+{
+        do_exit(fn(arg));
+}
+
+/*
+ * Create a kernel thread.
+ */
+long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
+{
+        struct pt_regs regs;
+
+        memset(&regs, 0, sizeof(regs));
+
+        regs.regs[6] = (unsigned long) arg;
+        regs.regs[5] = (unsigned long) fn;
+        regs.cp0_epc = (unsigned long) kernel_thread_helper;
+        regs.cp0_psr = (regs.cp0_psr & ~(0x1|0x4|0x8)) | \
+                        ((regs.cp0_psr & 0x3) << 2);
+
+        return do_fork(flags | CLONE_VM | CLONE_UNTRACED, \
+                        0, &regs, 0, NULL, NULL);
+}
+
+unsigned long thread_saved_pc(struct task_struct *tsk)
+{
+        return task_pt_regs(tsk)->cp0_epc;
+}
+
+unsigned long get_wchan(struct task_struct *task)
+{
+        if (!task || task == current || task->state == TASK_RUNNING)
+                return 0;
+
+        if (!task_stack_page(task))
+                return 0;
+
+        return task_pt_regs(task)->cp0_epc;
+}
+
+unsigned long arch_align_stack(unsigned long sp)
+{
+        return sp;
+}
diff --git a/arch/score/kernel/ptrace.c b/arch/score/kernel/ptrace.c
new file mode 100644
index 000000000000..174c6422b096
--- /dev/null
+++ b/arch/score/kernel/ptrace.c
@@ -0,0 +1,382 @@
+/*
+ * arch/score/kernel/ptrace.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/elf.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/ptrace.h>
+#include <linux/regset.h>
+
+#include <asm/uaccess.h>
+
+/*
+ * retrieve the contents of SCORE userspace general registers
+ */
+static int genregs_get(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       void *kbuf, void __user *ubuf)
+{
+        const struct pt_regs *regs = task_pt_regs(target);
+        int ret;
+
+        /* skip 9 * sizeof(unsigned long) not use for pt_regs */
+        ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                        0, offsetof(struct pt_regs, regs));
+
+        /* r0 - r31, cel, ceh, sr0, sr1, sr2, epc, ema, psr, ecr, condition */
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  regs->regs,
+                                  offsetof(struct pt_regs, regs),
+                                  offsetof(struct pt_regs, cp0_condition));
+
+        if (!ret)
+                ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                                sizeof(struct pt_regs), -1);
+
+        return ret;
+}
+
+/*
+ * update the contents of the SCORE userspace general registers
+ */
+static int genregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
+{
+        struct pt_regs *regs = task_pt_regs(target);
+        int ret;
+
+        /* skip 9 * sizeof(unsigned long) */
+        ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                        0, offsetof(struct pt_regs, regs));
+
+        /* r0 - r31, cel, ceh, sr0, sr1, sr2, epc, ema, psr, ecr, condition */
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                  regs->regs,
+                                  offsetof(struct pt_regs, regs),
+                                  offsetof(struct pt_regs, cp0_condition));
+
+        if (!ret)
+                ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                                sizeof(struct pt_regs), -1);
+
+        return ret;
+}
+
+/*
+ * Define the register sets available on the score7 under Linux
+ */
+enum score7_regset {
+        REGSET_GENERAL,
+};
+
+static const struct user_regset score7_regsets[] = {
+        [REGSET_GENERAL] = {
+                .core_note_type = NT_PRSTATUS,
+                .n              = ELF_NGREG,
+                .size           = sizeof(long),
+                .align          = sizeof(long),
+                .get            = genregs_get,
+                .set            = genregs_set,
+        },
+};
+
+static const struct user_regset_view user_score_native_view = {
+        .name           = "score7",
+        .e_machine      = EM_SCORE7,
+        .regsets        = score7_regsets,
+        .n              = ARRAY_SIZE(score7_regsets),
+};
+
+const struct user_regset_view *task_user_regset_view(struct task_struct *task)
+{
+        return &user_score_native_view;
+}
+
+static int is_16bitinsn(unsigned long insn)
+{
+        if ((insn & INSN32_MASK) == INSN32_MASK)
+                return 0;
+        else
+                return 1;
+}
+
+int
+read_tsk_long(struct task_struct *child,
+                unsigned long addr, unsigned long *res)
+{
+        int copied;
+
+        copied = access_process_vm(child, addr, res, sizeof(*res), 0);
+
+        return copied != sizeof(*res) ? -EIO : 0;
+}
+
+int
+read_tsk_short(struct task_struct *child,
+                unsigned long addr, unsigned short *res)
+{
+        int copied;
+
+        copied = access_process_vm(child, addr, res, sizeof(*res), 0);
+
+        return copied != sizeof(*res) ? -EIO : 0;
+}
+
+static int
+write_tsk_short(struct task_struct *child,
+                unsigned long addr, unsigned short val)
+{
+        int copied;
+
+        copied = access_process_vm(child, addr, &val, sizeof(val), 1);
+
+        return copied != sizeof(val) ? -EIO : 0;
+}
+
+static int
+write_tsk_long(struct task_struct *child,
+                unsigned long addr, unsigned long val)
+{
+        int copied;
+
+        copied = access_process_vm(child, addr, &val, sizeof(val), 1);
+
+        return copied != sizeof(val) ? -EIO : 0;
+}
+
+void user_enable_single_step(struct task_struct *child)
+{
+        /* far_epc is the target of branch */
+        unsigned int epc, far_epc = 0;
+        unsigned long epc_insn, far_epc_insn;
+        int ninsn_type;                 /* next insn type 0=16b, 1=32b */
+        unsigned int tmp, tmp2;
+        struct pt_regs *regs = task_pt_regs(child);
+        child->thread.single_step = 1;
+        child->thread.ss_nextcnt = 1;
+        epc = regs->cp0_epc;
+
+        read_tsk_long(child, epc, &epc_insn);
+
+        if (is_16bitinsn(epc_insn)) {
+                if ((epc_insn & J16M) == J16) {
+                        tmp = epc_insn & 0xFFE;
+                        epc = (epc & 0xFFFFF000) | tmp;
+                } else if ((epc_insn & B16M) == B16) {
+                        child->thread.ss_nextcnt = 2;
+                        tmp = (epc_insn & 0xFF) << 1;
+                        tmp = tmp << 23;
+                        tmp = (unsigned int)((int) tmp >> 23);
+                        far_epc = epc + tmp;
+                        epc += 2;
+                } else if ((epc_insn & BR16M) == BR16) {
+                        child->thread.ss_nextcnt = 2;
+                        tmp = (epc_insn >> 4) & 0xF;
+                        far_epc = regs->regs[tmp];
+                        epc += 2;
+                } else
+                        epc += 2;
+        } else {
+                if ((epc_insn & J32M) == J32) {
+                        tmp = epc_insn & 0x03FFFFFE;
+                        tmp2 = tmp & 0x7FFF;
+                        tmp = (((tmp >> 16) & 0x3FF) << 15) | tmp2;
+                        epc = (epc & 0xFFC00000) | tmp;
+                } else if ((epc_insn & B32M) == B32) {
+                        child->thread.ss_nextcnt = 2;
+                        tmp = epc_insn & 0x03FFFFFE;    /* discard LK bit */
+                        tmp2 = tmp & 0x3FF;
+                        tmp = (((tmp >> 16) & 0x3FF) << 10) | tmp2; /* 20bit */
+                        tmp = tmp << 12;
+                        tmp = (unsigned int)((int) tmp >> 12);
+                        far_epc = epc + tmp;
+                        epc += 4;
+                } else if ((epc_insn & BR32M) == BR32) {
+                        child->thread.ss_nextcnt = 2;
+                        tmp = (epc_insn >> 16) & 0x1F;
+                        far_epc = regs->regs[tmp];
+                        epc += 4;
+                } else
+                        epc += 4;
+        }
+
+        if (child->thread.ss_nextcnt == 1) {
+                read_tsk_long(child, epc, &epc_insn);
+
+                if (is_16bitinsn(epc_insn)) {
+                        write_tsk_short(child, epc, SINGLESTEP16_INSN);
+                        ninsn_type = 0;
+                } else {
+                        write_tsk_long(child, epc, SINGLESTEP32_INSN);
+                        ninsn_type = 1;
+                }
+
+                if (ninsn_type == 0) {  /* 16bits */
+                        child->thread.insn1_type = 0;
+                        child->thread.addr1 = epc;
+                         /* the insn may have 32bit data */
+                        child->thread.insn1 = (short)epc_insn;
+                } else {
+                        child->thread.insn1_type = 1;
+                        child->thread.addr1 = epc;
+                        child->thread.insn1 = epc_insn;
+                }
+        } else {
+                /* branch! have two target child->thread.ss_nextcnt=2 */
+                read_tsk_long(child, epc, &epc_insn);
+                read_tsk_long(child, far_epc, &far_epc_insn);
+                if (is_16bitinsn(epc_insn)) {
+                        write_tsk_short(child, epc, SINGLESTEP16_INSN);
+                        ninsn_type = 0;
+                } else {
+                        write_tsk_long(child, epc, SINGLESTEP32_INSN);
+                        ninsn_type = 1;
+                }
+
+                if (ninsn_type == 0) {  /* 16bits */
+                        child->thread.insn1_type = 0;
+                        child->thread.addr1 = epc;
+                         /* the insn may have 32bit data */
+                        child->thread.insn1 = (short)epc_insn;
+                } else {
+                        child->thread.insn1_type = 1;
+                        child->thread.addr1 = epc;
+                        child->thread.insn1 = epc_insn;
+                }
+
+                if (is_16bitinsn(far_epc_insn)) {
+                        write_tsk_short(child, far_epc, SINGLESTEP16_INSN);
+                        ninsn_type = 0;
+                } else {
+                        write_tsk_long(child, far_epc, SINGLESTEP32_INSN);
+                        ninsn_type = 1;
+                }
+
+                if (ninsn_type == 0) {  /* 16bits */
+                        child->thread.insn2_type = 0;
+                        child->thread.addr2 = far_epc;
+                         /* the insn may have 32bit data */
+                        child->thread.insn2 = (short)far_epc_insn;
+                } else {
+                        child->thread.insn2_type = 1;
+                        child->thread.addr2 = far_epc;
+                        child->thread.insn2 = far_epc_insn;
+                }
+        }
+}
+
+void user_disable_single_step(struct task_struct *child)
+{
+        if (child->thread.insn1_type == 0)
+                write_tsk_short(child, child->thread.addr1,
+                                child->thread.insn1);
+
+        if (child->thread.insn1_type == 1)
+                write_tsk_long(child, child->thread.addr1,
+                                child->thread.insn1);
+
+        if (child->thread.ss_nextcnt == 2) {    /* branch */
+                if (child->thread.insn1_type == 0)
+                        write_tsk_short(child, child->thread.addr1,
+                                        child->thread.insn1);
+                if (child->thread.insn1_type == 1)
+                        write_tsk_long(child, child->thread.addr1,
+                                        child->thread.insn1);
+                if (child->thread.insn2_type == 0)
+                        write_tsk_short(child, child->thread.addr2,
+                                        child->thread.insn2);
+                if (child->thread.insn2_type == 1)
+                        write_tsk_long(child, child->thread.addr2,
+                                        child->thread.insn2);
+        }
+
+        child->thread.single_step = 0;
+        child->thread.ss_nextcnt = 0;
+}
+
+void ptrace_disable(struct task_struct *child)
+{
+        user_disable_single_step(child);
+}
+
+long
+arch_ptrace(struct task_struct *child, long request, long addr, long data)
+{
+        int ret;
+        unsigned long __user *datap = (void __user *)data;
+
+        switch (request) {
+        case PTRACE_GETREGS:
+                ret = copy_regset_to_user(child, &user_score_native_view,
+                                                REGSET_GENERAL,
+                                                0, sizeof(struct pt_regs),
+                                                (void __user *)datap);
+                break;
+
+        case PTRACE_SETREGS:
+                ret = copy_regset_from_user(child, &user_score_native_view,
+                                                REGSET_GENERAL,
+                                                0, sizeof(struct pt_regs),
+                                                (const void __user *)datap);
+                break;
+
+        default:
+                ret = ptrace_request(child, request, addr, data);
+                break;
+        }
+
+        return ret;
+}
+
+/*
+ * Notification of system call entry/exit
+ * - triggered by current->work.syscall_trace
+ */
+asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
+{
+        if (!(current->ptrace & PT_PTRACED))
+                return;
+
+        if (!test_thread_flag(TIF_SYSCALL_TRACE))
+                return;
+
+        /* The 0x80 provides a way for the tracing parent to distinguish
+           between a syscall stop and SIGTRAP delivery. */
+        ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
+                        0x80 : 0));
+
+        /*
+         * this isn't the same as continuing with a signal, but it will do
+         * for normal use.  strace only continues with a signal if the
+         * stopping signal is not SIGTRAP.  -brl
+         */
+        if (current->exit_code) {
+                send_sig(current->exit_code, current, 1);
+                current->exit_code = 0;
+        }
+}
diff --git a/arch/score/kernel/setup.c b/arch/score/kernel/setup.c
new file mode 100644
index 000000000000..6a2503c75c4e
--- /dev/null
+++ b/arch/score/kernel/setup.c
@@ -0,0 +1,159 @@
+/*
+ * arch/score/kernel/setup.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/bootmem.h>
+#include <linux/initrd.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/seq_file.h>
+#include <linux/screen_info.h>
+
+#include <asm-generic/sections.h>
+#include <asm/setup.h>
+
+struct screen_info screen_info;
+unsigned long kernelsp;
+
+static char command_line[COMMAND_LINE_SIZE];
+static struct resource code_resource = { .name = "Kernel code",};
+static struct resource data_resource = { .name = "Kernel data",};
+
+static void __init bootmem_init(void)
+{
+        unsigned long start_pfn, bootmap_size;
+        unsigned long size = initrd_end - initrd_start;
+
+        start_pfn = PFN_UP(__pa(&_end));
+
+        min_low_pfn = PFN_UP(MEMORY_START);
+        max_low_pfn = PFN_UP(MEMORY_START + MEMORY_SIZE);
+
+        /* Initialize the boot-time allocator with low memory only. */
+        bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
+                                         min_low_pfn, max_low_pfn);
+        add_active_range(0, min_low_pfn, max_low_pfn);
+
+        free_bootmem(PFN_PHYS(start_pfn),
+                     (max_low_pfn - start_pfn) << PAGE_SHIFT);
+        memory_present(0, start_pfn, max_low_pfn);
+
+        /* Reserve space for the bootmem bitmap. */
+        reserve_bootmem(PFN_PHYS(start_pfn), bootmap_size, BOOTMEM_DEFAULT);
+
+        if (size == 0) {
+                printk(KERN_INFO "Initrd not found or empty");
+                goto disable;
+        }
+
+        if (__pa(initrd_end) > PFN_PHYS(max_low_pfn)) {
+                printk(KERN_ERR "Initrd extends beyond end of memory");
+                goto disable;
+        }
+
+        /* Reserve space for the initrd bitmap. */
+        reserve_bootmem(__pa(initrd_start), size, BOOTMEM_DEFAULT);
+        initrd_below_start_ok = 1;
+
+        pr_info("Initial ramdisk at: 0x%lx (%lu bytes)\n",
+                 initrd_start, size);
+        return;
+disable:
+        printk(KERN_CONT " - disabling initrd\n");
+        initrd_start = 0;
+        initrd_end = 0;
+}
+
+static void __init resource_init(void)
+{
+        struct resource *res;
+
+        code_resource.start = __pa(&_text);
+        code_resource.end = __pa(&_etext) - 1;
+        data_resource.start = __pa(&_etext);
+        data_resource.end = __pa(&_edata) - 1;
+
+        res = alloc_bootmem(sizeof(struct resource));
+        res->name = "System RAM";
+        res->start = MEMORY_START;
+        res->end = MEMORY_START + MEMORY_SIZE - 1;
+        res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+        request_resource(&iomem_resource, res);
+
+        request_resource(res, &code_resource);
+        request_resource(res, &data_resource);
+}
+
+void __init setup_arch(char **cmdline_p)
+{
+        randomize_va_space = 0;
+        *cmdline_p = command_line;
+
+        cpu_cache_init();
+        tlb_init();
+        bootmem_init();
+        paging_init();
+        resource_init();
+}
+
+static int show_cpuinfo(struct seq_file *m, void *v)
+{
+        unsigned long n = (unsigned long) v - 1;
+
+        seq_printf(m, "processor\t\t: %ld\n", n);
+        seq_printf(m, "\n");
+
+        return 0;
+}
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+        unsigned long i = *pos;
+
+        return i < 1 ? (void *) (i + 1) : NULL;
+}
+
+static void *c_next(struct seq_file *m, void *v, loff_t *pos)
+{
+        ++*pos;
+        return c_start(m, pos);
+}
+
+static void c_stop(struct seq_file *m, void *v)
+{
+}
+
+const struct seq_operations cpuinfo_op = {
+        .start  = c_start,
+        .next   = c_next,
+        .stop   = c_stop,
+        .show   = show_cpuinfo,
+};
+
+static int __init topology_init(void)
+{
+        return 0;
+}
+
+subsys_initcall(topology_init);
diff --git a/arch/score/kernel/signal.c b/arch/score/kernel/signal.c
new file mode 100644
index 000000000000..aa57440e4973
--- /dev/null
+++ b/arch/score/kernel/signal.c
@@ -0,0 +1,361 @@
+/*
+ * arch/score/kernel/signal.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/errno.h>
+#include <linux/signal.h>
+#include <linux/ptrace.h>
+#include <linux/unistd.h>
+#include <linux/uaccess.h>
+
+#include <asm/cacheflush.h>
+#include <asm/syscalls.h>
+#include <asm/ucontext.h>
+
+#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
+
+struct rt_sigframe {
+        u32 rs_ass[4];          /* argument save space */
+        u32 rs_code[2];         /* signal trampoline */
+        struct siginfo rs_info;
+        struct ucontext rs_uc;
+};
+
+static int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
+{
+        int err = 0;
+        unsigned long reg;
+
+        reg = regs->cp0_epc; err |= __put_user(reg, &sc->sc_pc);
+        err |= __put_user(regs->cp0_psr, &sc->sc_psr);
+        err |= __put_user(regs->cp0_condition, &sc->sc_condition);
+
+
+#define save_gp_reg(i) {                                \
+        reg = regs->regs[i];                            \
+        err |= __put_user(reg, &sc->sc_regs[i]);        \
+} while (0)
+        save_gp_reg(0); save_gp_reg(1); save_gp_reg(2);
+        save_gp_reg(3); save_gp_reg(4); save_gp_reg(5);
+        save_gp_reg(6); save_gp_reg(7); save_gp_reg(8);
+        save_gp_reg(9); save_gp_reg(10); save_gp_reg(11);
+        save_gp_reg(12); save_gp_reg(13); save_gp_reg(14);
+        save_gp_reg(15); save_gp_reg(16); save_gp_reg(17);
+        save_gp_reg(18); save_gp_reg(19); save_gp_reg(20);
+        save_gp_reg(21); save_gp_reg(22); save_gp_reg(23);
+        save_gp_reg(24); save_gp_reg(25); save_gp_reg(26);
+        save_gp_reg(27); save_gp_reg(28); save_gp_reg(29);
+#undef save_gp_reg
+
+        reg = regs->ceh; err |= __put_user(reg, &sc->sc_mdceh);
+        reg = regs->cel; err |= __put_user(reg, &sc->sc_mdcel);
+        err |= __put_user(regs->cp0_ecr, &sc->sc_ecr);
+        err |= __put_user(regs->cp0_ema, &sc->sc_ema);
+
+        return err;
+}
+
+static int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
+{
+        int err = 0;
+        u32 reg;
+
+        err |= __get_user(regs->cp0_epc, &sc->sc_pc);
+        err |= __get_user(regs->cp0_condition, &sc->sc_condition);
+
+        err |= __get_user(reg, &sc->sc_mdceh);
+        regs->ceh = (int) reg;
+        err |= __get_user(reg, &sc->sc_mdcel);
+        regs->cel = (int) reg;
+
+        err |= __get_user(reg, &sc->sc_psr);
+        regs->cp0_psr = (int) reg;
+        err |= __get_user(reg, &sc->sc_ecr);
+        regs->cp0_ecr = (int) reg;
+        err |= __get_user(reg, &sc->sc_ema);
+        regs->cp0_ema = (int) reg;
+
+#define restore_gp_reg(i) do {                          \
+        err |= __get_user(reg, &sc->sc_regs[i]);        \
+        regs->regs[i] = reg;                            \
+} while (0)
+        restore_gp_reg(0); restore_gp_reg(1); restore_gp_reg(2);
+        restore_gp_reg(3); restore_gp_reg(4); restore_gp_reg(5);
+        restore_gp_reg(6); restore_gp_reg(7); restore_gp_reg(8);
+        restore_gp_reg(9); restore_gp_reg(10); restore_gp_reg(11);
+        restore_gp_reg(12); restore_gp_reg(13); restore_gp_reg(14);
+        restore_gp_reg(15); restore_gp_reg(16); restore_gp_reg(17);
+        restore_gp_reg(18); restore_gp_reg(19); restore_gp_reg(20);
+        restore_gp_reg(21); restore_gp_reg(22); restore_gp_reg(23);
+        restore_gp_reg(24); restore_gp_reg(25); restore_gp_reg(26);
+        restore_gp_reg(27); restore_gp_reg(28); restore_gp_reg(29);
+#undef restore_gp_reg
+
+        return err;
+}
+
+/*
+ * Determine which stack to use..
+ */
+static void __user *get_sigframe(struct k_sigaction *ka,
+                        struct pt_regs *regs, size_t frame_size)
+{
+        unsigned long sp;
+
+        /* Default to using normal stack */
+        sp = regs->regs[0];
+        sp -= 32;
+
+        /* This is the X/Open sanctioned signal stack switching.  */
+        if ((ka->sa.sa_flags & SA_ONSTACK) && (!on_sig_stack(sp)))
+                sp = current->sas_ss_sp + current->sas_ss_size;
+
+        return (void __user*)((sp - frame_size) & ~7);
+}
+
+asmlinkage long
+score_sigaltstack(struct pt_regs *regs)
+{
+        const stack_t __user *uss = (const stack_t __user *) regs->regs[4];
+        stack_t __user *uoss = (stack_t __user *) regs->regs[5];
+        unsigned long usp = regs->regs[0];
+
+        return do_sigaltstack(uss, uoss, usp);
+}
+
+asmlinkage long
+score_rt_sigreturn(struct pt_regs *regs)
+{
+        struct rt_sigframe __user *frame;
+        sigset_t set;
+        stack_t st;
+        int sig;
+
+        frame = (struct rt_sigframe __user *) regs->regs[0];
+        if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
+                goto badframe;
+        if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set)))
+                goto badframe;
+
+        sigdelsetmask(&set, ~_BLOCKABLE);
+        spin_lock_irq(&current->sighand->siglock);
+        current->blocked = set;
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        sig = restore_sigcontext(regs, &frame->rs_uc.uc_mcontext);
+        if (sig < 0)
+                goto badframe;
+        else if (sig)
+                force_sig(sig, current);
+
+        if (__copy_from_user(&st, &frame->rs_uc.uc_stack, sizeof(st)))
+                goto badframe;
+
+        /* It is more difficult to avoid calling this function than to
+           call it and ignore errors.  */
+        do_sigaltstack((stack_t __user *)&st, NULL, regs->regs[0]);
+
+        __asm__ __volatile__(
+                "mv\tr0, %0\n\t"
+                "la\tr8, syscall_exit\n\t"
+                "br\tr8\n\t"
+                : : "r" (regs) : "r8");
+
+badframe:
+        force_sig(SIGSEGV, current);
+
+        return 0;
+}
+
+static int setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs,
+                int signr, sigset_t *set, siginfo_t *info)
+{
+        struct rt_sigframe __user *frame;
+        int err = 0;
+
+        frame = get_sigframe(ka, regs, sizeof(*frame));
+        if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
+                goto give_sigsegv;
+
+        /*
+         * Set up the return code ...
+         *
+         *         li      v0, __NR_rt_sigreturn
+         *         syscall
+         */
+        err |= __put_user(0x87788000 + __NR_rt_sigreturn*2,
+                        frame->rs_code + 0);
+        err |= __put_user(0x80008002, frame->rs_code + 1);
+        flush_cache_sigtramp((unsigned long) frame->rs_code);
+
+        err |= copy_siginfo_to_user(&frame->rs_info, info);
+        err |= __put_user(0, &frame->rs_uc.uc_flags);
+        err |= __put_user(NULL, &frame->rs_uc.uc_link);
+        err |= __put_user((void __user *)current->sas_ss_sp,
+                                &frame->rs_uc.uc_stack.ss_sp);
+        err |= __put_user(sas_ss_flags(regs->regs[0]),
+                                &frame->rs_uc.uc_stack.ss_flags);
+        err |= __put_user(current->sas_ss_size,
+                                &frame->rs_uc.uc_stack.ss_size);
+        err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext);
+        err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
+
+        if (err)
+                goto give_sigsegv;
+
+        regs->regs[0] = (unsigned long) frame;
+        regs->regs[3] = (unsigned long) frame->rs_code;
+        regs->regs[4] = signr;
+        regs->regs[5] = (unsigned long) &frame->rs_info;
+        regs->regs[6] = (unsigned long) &frame->rs_uc;
+        regs->regs[29] = (unsigned long) ka->sa.sa_handler;
+        regs->cp0_epc = (unsigned long) ka->sa.sa_handler;
+
+        return 0;
+
+give_sigsegv:
+        if (signr == SIGSEGV)
+                ka->sa.sa_handler = SIG_DFL;
+        force_sig(SIGSEGV, current);
+        return -EFAULT;
+}
+
+static int handle_signal(unsigned long sig, siginfo_t *info,
+        struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs)
+{
+        int ret;
+
+        if (regs->is_syscall) {
+                switch (regs->regs[4]) {
+                case ERESTART_RESTARTBLOCK:
+                case ERESTARTNOHAND:
+                        regs->regs[4] = EINTR;
+                        break;
+                case ERESTARTSYS:
+                        if (!(ka->sa.sa_flags & SA_RESTART)) {
+                                regs->regs[4] = EINTR;
+                                break;
+                        }
+                case ERESTARTNOINTR:
+                        regs->regs[4] = regs->orig_r4;
+                        regs->regs[7] = regs->orig_r7;
+                        regs->cp0_epc -= 8;
+                }
+
+                regs->is_syscall = 0;
+        }
+
+        /*
+         * Set up the stack frame
+         */
+        ret = setup_rt_frame(ka, regs, sig, oldset, info);
+
+        spin_lock_irq(&current->sighand->siglock);
+        sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);
+        if (!(ka->sa.sa_flags & SA_NODEFER))
+                sigaddset(&current->blocked, sig);
+        recalc_sigpending();
+        spin_unlock_irq(&current->sighand->siglock);
+
+        return ret;
+}
+
+static void do_signal(struct pt_regs *regs)
+{
+        struct k_sigaction ka;
+        sigset_t *oldset;
+        siginfo_t info;
+        int signr;
+
+        /*
+         * We want the common case to go fast, which is why we may in certain
+         * cases get here from kernel mode. Just return without doing anything
+         * if so.
+         */
+        if (!user_mode(regs))
+                return;
+
+        if (test_thread_flag(TIF_RESTORE_SIGMASK))
+                oldset = &current->saved_sigmask;
+        else
+                oldset = &current->blocked;
+
+        signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+        if (signr > 0) {
+                /* Actually deliver the signal.  */
+                if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
+                        /*
+                         * A signal was successfully delivered; the saved
+                         * sigmask will have been stored in the signal frame,
+                         * and will be restored by sigreturn, so we can simply
+                         * clear the TIF_RESTORE_SIGMASK flag.
+                         */
+                        if (test_thread_flag(TIF_RESTORE_SIGMASK))
+                                clear_thread_flag(TIF_RESTORE_SIGMASK);
+                }
+
+                return;
+        }
+
+        if (regs->is_syscall) {
+                if (regs->regs[4] == ERESTARTNOHAND ||
+                    regs->regs[4] == ERESTARTSYS ||
+                    regs->regs[4] == ERESTARTNOINTR) {
+                        regs->regs[4] = regs->orig_r4;
+                        regs->regs[7] = regs->orig_r7;
+                        regs->cp0_epc -= 8;
+                }
+
+                if (regs->regs[4] == ERESTART_RESTARTBLOCK) {
+                        regs->regs[27] = __NR_restart_syscall;
+                        regs->regs[4] = regs->orig_r4;
+                        regs->regs[7] = regs->orig_r7;
+                        regs->cp0_epc -= 8;
+                }
+
+                regs->is_syscall = 0;   /* Don't deal with this again.  */
+        }
+
+        /*
+         * If there's no signal to deliver, we just put the saved sigmask
+         * back
+         */
+        if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
+                clear_thread_flag(TIF_RESTORE_SIGMASK);
+                sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
+        }
+}
+
+/*
+ * notification of userspace execution resumption
+ * - triggered by the TIF_WORK_MASK flags
+ */
+asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused,
+                                __u32 thread_info_flags)
+{
+        /* deal with pending signal delivery */
+        if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
+                do_signal(regs);
+}
diff --git a/arch/score/kernel/sys_call_table.c b/arch/score/kernel/sys_call_table.c
new file mode 100644
index 000000000000..287369b88c43
--- /dev/null
+++ b/arch/score/kernel/sys_call_table.c
@@ -0,0 +1,12 @@
+#include <linux/syscalls.h>
+#include <linux/signal.h>
+#include <linux/unistd.h>
+
+#include <asm/syscalls.h>
+
+#undef __SYSCALL
+#define __SYSCALL(nr, call) [nr] = (call),
+
+void *sys_call_table[__NR_syscalls] = {
+#include <asm/unistd.h>
+};
diff --git a/arch/score/kernel/sys_score.c b/arch/score/kernel/sys_score.c
new file mode 100644
index 000000000000..001249469866
--- /dev/null
+++ b/arch/score/kernel/sys_score.c
@@ -0,0 +1,151 @@
+/*
+ * arch/score/kernel/syscall.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/file.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/module.h>
+#include <linux/unistd.h>
+#include <linux/syscalls.h>
+#include <asm/syscalls.h>
+
+asmlinkage long 
+sys_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
+          unsigned long flags, unsigned long fd, unsigned long pgoff)
+{
+        int error = -EBADF;
+        struct file *file = NULL;
+
+        if (pgoff & (~PAGE_MASK >> 12))
+                return -EINVAL;
+
+        flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
+        if (!(flags & MAP_ANONYMOUS)) {
+                file = fget(fd);
+                if (!file)
+                        return error;
+        }
+
+        down_write(&current->mm->mmap_sem);
+        error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
+        up_write(&current->mm->mmap_sem);
+
+        if (file)
+                fput(file);
+
+        return error;
+}
+
+asmlinkage long
+sys_mmap(unsigned long addr, unsigned long len, unsigned long prot,
+        unsigned long flags, unsigned long fd, off_t pgoff)
+{
+        return sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT);
+}
+
+asmlinkage long
+score_fork(struct pt_regs *regs)
+{
+        return do_fork(SIGCHLD, regs->regs[0], regs, 0, NULL, NULL);
+}
+
+/*
+ * Clone a task - this clones the calling program thread.
+ * This is called indirectly via a small wrapper
+ */
+asmlinkage long
+score_clone(struct pt_regs *regs)
+{
+        unsigned long clone_flags;
+        unsigned long newsp;
+        int __user *parent_tidptr, *child_tidptr;
+
+        clone_flags = regs->regs[4];
+        newsp = regs->regs[5];
+        if (!newsp)
+                newsp = regs->regs[0];
+        parent_tidptr = (int __user *)regs->regs[6];
+        child_tidptr = (int __user *)regs->regs[8];
+
+        return do_fork(clone_flags, newsp, regs, 0,
+                        parent_tidptr, child_tidptr);
+}
+
+asmlinkage long
+score_vfork(struct pt_regs *regs)
+{
+        return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD,
+                        regs->regs[0], regs, 0, NULL, NULL);
+}
+
+/*
+ * sys_execve() executes a new program.
+ * This is called indirectly via a small wrapper
+ */
+asmlinkage long
+score_execve(struct pt_regs *regs)
+{
+        int error;
+        char *filename;
+
+        filename = getname((char __user*)regs->regs[4]);
+        error = PTR_ERR(filename);
+        if (IS_ERR(filename))
+                return error;
+
+        error = do_execve(filename, (char __user *__user*)regs->regs[5],
+                          (char __user *__user *) regs->regs[6], regs);
+
+        putname(filename);
+        return error;
+}
+
+/*
+ * Do a system call from kernel instead of calling sys_execve so we
+ * end up with proper pt_regs.
+ */
+int kernel_execve(const char *filename, char *const argv[], char *const envp[])
+{
+        register unsigned long __r4 asm("r4") = (unsigned long) filename;
+        register unsigned long __r5 asm("r5") = (unsigned long) argv;
+        register unsigned long __r6 asm("r6") = (unsigned long) envp;
+        register unsigned long __r7 asm("r7");
+
+        __asm__ __volatile__ (" \n"
+                "ldi    r27, %5         \n"
+                "syscall                \n"
+                "mv     %0, r4          \n"
+                "mv     %1, r7          \n"
+                : "=&r" (__r4), "=r" (__r7)
+                : "r" (__r4), "r" (__r5), "r" (__r6), "i" (__NR_execve)
+                : "r8", "r9", "r10", "r11", "r22", "r23", "r24", "r25",
+                  "r26", "r27", "memory");
+
+        if (__r7 == 0)
+                return __r4;
+
+        return -__r4;
+}
diff --git a/arch/score/kernel/time.c b/arch/score/kernel/time.c
new file mode 100644
index 000000000000..f0a43affb201
--- /dev/null
+++ b/arch/score/kernel/time.c
@@ -0,0 +1,99 @@
+/*
+ * arch/score/kernel/time.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+
+#include <asm/scoreregs.h>
+
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
+{
+        struct clock_event_device *evdev = dev_id;
+
+        /* clear timer interrupt flag */
+        outl(1, P_TIMER0_CPP_REG);
+        evdev->event_handler(evdev);
+
+        return IRQ_HANDLED;
+}
+
+static struct irqaction timer_irq = {
+        .handler = timer_interrupt,
+        .flags = IRQF_DISABLED | IRQF_TIMER,
+        .name = "timer",
+};
+
+static int score_timer_set_next_event(unsigned long delta,
+                struct clock_event_device *evdev)
+{
+        outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL);
+        outl(delta, P_TIMER0_PRELOAD);
+        outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL);
+
+        return 0;
+}
+
+static void score_timer_set_mode(enum clock_event_mode mode,
+                struct clock_event_device *evdev)
+{
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+                outl((TMR_M_PERIODIC | TMR_IE_ENABLE), P_TIMER0_CTRL);
+                outl(SYSTEM_CLOCK/HZ, P_TIMER0_PRELOAD);
+                outl(inl(P_TIMER0_CTRL) | TMR_ENABLE, P_TIMER0_CTRL);
+                break;
+        case CLOCK_EVT_MODE_ONESHOT:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_RESUME:
+        case CLOCK_EVT_MODE_UNUSED:
+                break;
+        default:
+                BUG();
+        }
+}
+
+static struct clock_event_device score_clockevent = {
+        .name           = "score_clockevent",
+        .features       = CLOCK_EVT_FEAT_PERIODIC,
+        .shift          = 16,
+        .set_next_event = score_timer_set_next_event,
+        .set_mode       = score_timer_set_mode,
+};
+
+void __init time_init(void)
+{
+        timer_irq.dev_id = &score_clockevent;
+        setup_irq(IRQ_TIMER , &timer_irq);
+
+        /* setup COMPARE clockevent */
+        score_clockevent.mult = div_sc(SYSTEM_CLOCK, NSEC_PER_SEC,
+                                        score_clockevent.shift);
+        score_clockevent.max_delta_ns = clockevent_delta2ns((u32)~0,
+                                        &score_clockevent);
+        score_clockevent.min_delta_ns = clockevent_delta2ns(50,
+                                                &score_clockevent) + 1;
+        score_clockevent.cpumask = cpumask_of(0);
+        clockevents_register_device(&score_clockevent);
+}
diff --git a/arch/score/kernel/traps.c b/arch/score/kernel/traps.c
new file mode 100644
index 000000000000..0e46fb19a848
--- /dev/null
+++ b/arch/score/kernel/traps.c
@@ -0,0 +1,349 @@
+/*
+ * arch/score/kernel/traps.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include <linux/sched.h>
+
+#include <asm/cacheflush.h>
+#include <asm/irq.h>
+#include <asm/irq_regs.h>
+
+unsigned long exception_handlers[32];
+
+/*
+ * The architecture-independent show_stack generator
+ */
+void show_stack(struct task_struct *task, unsigned long *sp)
+{
+        int i;
+        long stackdata;
+
+        sp = sp ? sp : (unsigned long *)&sp;
+
+        printk(KERN_NOTICE "Stack: ");
+        i = 1;
+        while ((long) sp & (PAGE_SIZE - 1)) {
+                if (i && ((i % 8) == 0))
+                        printk(KERN_NOTICE "\n");
+                if (i > 40) {
+                        printk(KERN_NOTICE " ...");
+                        break;
+                }
+
+                if (__get_user(stackdata, sp++)) {
+                        printk(KERN_NOTICE " (Bad stack address)");
+                        break;
+                }
+
+                printk(KERN_NOTICE " %08lx", stackdata);
+                i++;
+        }
+        printk(KERN_NOTICE "\n");
+}
+
+static void show_trace(long *sp)
+{
+        int i;
+        long addr;
+
+        sp = sp ? sp : (long *) &sp;
+
+        printk(KERN_NOTICE "Call Trace:  ");
+        i = 1;
+        while ((long) sp & (PAGE_SIZE - 1)) {
+                if (__get_user(addr, sp++)) {
+                        if (i && ((i % 6) == 0))
+                                printk(KERN_NOTICE "\n");
+                        printk(KERN_NOTICE " (Bad stack address)\n");
+                        break;
+                }
+
+                if (kernel_text_address(addr)) {
+                        if (i && ((i % 6) == 0))
+                                printk(KERN_NOTICE "\n");
+                        if (i > 40) {
+                                printk(KERN_NOTICE " ...");
+                                break;
+                        }
+
+                        printk(KERN_NOTICE " [<%08lx>]", addr);
+                        i++;
+                }
+        }
+        printk(KERN_NOTICE "\n");
+}
+
+static void show_code(unsigned int *pc)
+{
+        long i;
+
+        printk(KERN_NOTICE "\nCode:");
+
+        for (i = -3; i < 6; i++) {
+                unsigned long insn;
+                if (__get_user(insn, pc + i)) {
+                        printk(KERN_NOTICE " (Bad address in epc)\n");
+                        break;
+                }
+                printk(KERN_NOTICE "%c%08lx%c", (i ? ' ' : '<'),
+                        insn, (i ? ' ' : '>'));
+        }
+}
+
+/*
+ * FIXME: really the generic show_regs should take a const pointer argument.
+ */
+void show_regs(struct pt_regs *regs)
+{
+        printk("r0 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
+                regs->regs[0], regs->regs[1], regs->regs[2], regs->regs[3],
+                regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]);
+        printk("r8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
+                regs->regs[8], regs->regs[9], regs->regs[10], regs->regs[11],
+                regs->regs[12], regs->regs[13], regs->regs[14], regs->regs[15]);
+        printk("r16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
+                regs->regs[16], regs->regs[17], regs->regs[18], regs->regs[19],
+                regs->regs[20], regs->regs[21], regs->regs[22], regs->regs[23]);
+        printk("r24: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
+                regs->regs[24], regs->regs[25], regs->regs[26], regs->regs[27],
+                regs->regs[28], regs->regs[29], regs->regs[30], regs->regs[31]);
+
+        printk("CEH : %08lx\n", regs->ceh);
+        printk("CEL : %08lx\n", regs->cel);
+
+        printk("EMA:%08lx, epc:%08lx %s\nPSR: %08lx\nECR:%08lx\nCondition : %08lx\n",
+                regs->cp0_ema, regs->cp0_epc, print_tainted(), regs->cp0_psr,
+                regs->cp0_ecr, regs->cp0_condition);
+}
+
+static void show_registers(struct pt_regs *regs)
+{
+        show_regs(regs);
+        printk(KERN_NOTICE "Process %s (pid: %d, stackpage=%08lx)\n",
+                current->comm, current->pid, (unsigned long) current);
+        show_stack(current_thread_info()->task, (long *) regs->regs[0]);
+        show_trace((long *) regs->regs[0]);
+        show_code((unsigned int *) regs->cp0_epc);
+        printk(KERN_NOTICE "\n");
+}
+
+/*
+ * The architecture-independent dump_stack generator
+ */
+void dump_stack(void)
+{
+        show_stack(current_thread_info()->task,
+                   (long *) get_irq_regs()->regs[0]);
+}
+EXPORT_SYMBOL(dump_stack);
+
+void __die(const char *str, struct pt_regs *regs, const char *file,
+        const char *func, unsigned long line)
+{
+        console_verbose();
+        printk("%s", str);
+        if (file && func)
+                printk(" in %s:%s, line %ld", file, func, line);
+        printk(":\n");
+        show_registers(regs);
+        do_exit(SIGSEGV);
+}
+
+void __die_if_kernel(const char *str, struct pt_regs *regs,
+                const char *file, const char *func, unsigned long line)
+{
+        if (!user_mode(regs))
+                __die(str, regs, file, func, line);
+}
+
+asmlinkage void do_adelinsn(struct pt_regs *regs)
+{
+        printk("do_ADE-linsn:ema:0x%08lx:epc:0x%08lx\n",
+                 regs->cp0_ema, regs->cp0_epc);
+        die_if_kernel("do_ade execution Exception\n", regs);
+        force_sig(SIGBUS, current);
+}
+
+asmlinkage void do_adedata(struct pt_regs *regs)
+{
+        const struct exception_table_entry *fixup;
+        fixup = search_exception_tables(regs->cp0_epc);
+        if (fixup) {
+                regs->cp0_epc = fixup->fixup;
+                return;
+        }
+        printk("do_ADE-data:ema:0x%08lx:epc:0x%08lx\n",
+                 regs->cp0_ema, regs->cp0_epc);
+        die_if_kernel("do_ade execution Exception\n", regs);
+        force_sig(SIGBUS, current);
+}
+
+asmlinkage void do_pel(struct pt_regs *regs)
+{
+        die_if_kernel("do_pel execution Exception", regs);
+        force_sig(SIGFPE, current);
+}
+
+asmlinkage void do_cee(struct pt_regs *regs)
+{
+        die_if_kernel("do_cee execution Exception", regs);
+        force_sig(SIGFPE, current);
+}
+
+asmlinkage void do_cpe(struct pt_regs *regs)
+{
+        die_if_kernel("do_cpe execution Exception", regs);
+        force_sig(SIGFPE, current);
+}
+
+asmlinkage void do_be(struct pt_regs *regs)
+{
+        die_if_kernel("do_be execution Exception", regs);
+        force_sig(SIGBUS, current);
+}
+
+asmlinkage void do_ov(struct pt_regs *regs)
+{
+        siginfo_t info;
+
+        die_if_kernel("do_ov execution Exception", regs);
+
+        info.si_code = FPE_INTOVF;
+        info.si_signo = SIGFPE;
+        info.si_errno = 0;
+        info.si_addr = (void *)regs->cp0_epc;
+        force_sig_info(SIGFPE, &info, current);
+}
+
+asmlinkage void do_tr(struct pt_regs *regs)
+{
+        die_if_kernel("do_tr execution Exception", regs);
+        force_sig(SIGTRAP, current);
+}
+
+asmlinkage void do_ri(struct pt_regs *regs)
+{
+        unsigned long epc_insn;
+        unsigned long epc = regs->cp0_epc;
+
+        read_tsk_long(current, epc, &epc_insn);
+        if (current->thread.single_step == 1) {
+                if ((epc == current->thread.addr1) ||
+                    (epc == current->thread.addr2)) {
+                        user_disable_single_step(current);
+                        force_sig(SIGTRAP, current);
+                        return;
+                } else
+                        BUG();
+        } else if ((epc_insn == BREAKPOINT32_INSN) ||
+                   ((epc_insn & 0x0000FFFF) == 0x7002) ||
+                   ((epc_insn & 0xFFFF0000) == 0x70020000)) {
+                        force_sig(SIGTRAP, current);
+                        return;
+        } else {
+                die_if_kernel("do_ri execution Exception", regs);
+                force_sig(SIGILL, current);
+        }
+}
+
+asmlinkage void do_ccu(struct pt_regs *regs)
+{
+        die_if_kernel("do_ccu execution Exception", regs);
+        force_sig(SIGILL, current);
+}
+
+asmlinkage void do_reserved(struct pt_regs *regs)
+{
+        /*
+         * Game over - no way to handle this if it ever occurs.  Most probably
+         * caused by a new unknown cpu type or after another deadly
+         * hard/software error.
+         */
+        die_if_kernel("do_reserved execution Exception", regs);
+        show_regs(regs);
+        panic("Caught reserved exception - should not happen.");
+}
+
+/*
+ * NMI exception handler.
+ */
+void nmi_exception_handler(struct pt_regs *regs)
+{
+        die_if_kernel("nmi_exception_handler execution Exception", regs);
+        die("NMI", regs);
+}
+
+/* Install CPU exception handler */
+void *set_except_vector(int n, void *addr)
+{
+        unsigned long handler = (unsigned long) addr;
+        unsigned long old_handler = exception_handlers[n];
+
+        exception_handlers[n] = handler;
+        return (void *)old_handler;
+}
+
+void __init trap_init(void)
+{
+        int i;
+
+        pgd_current = (unsigned long)init_mm.pgd;
+        /* DEBUG EXCEPTION */
+        memcpy((void *)DEBUG_VECTOR_BASE_ADDR,
+                        &debug_exception_vector, DEBUG_VECTOR_SIZE);
+        /* NMI EXCEPTION */
+        memcpy((void *)GENERAL_VECTOR_BASE_ADDR,
+                        &general_exception_vector, GENERAL_VECTOR_SIZE);
+
+        /*
+         * Initialise exception handlers
+         */
+        for (i = 0; i <= 31; i++)
+                set_except_vector(i, handle_reserved);
+
+        set_except_vector(1, handle_nmi);
+        set_except_vector(2, handle_adelinsn);
+        set_except_vector(3, handle_tlb_refill);
+        set_except_vector(4, handle_tlb_invaild);
+        set_except_vector(5, handle_ibe);
+        set_except_vector(6, handle_pel);
+        set_except_vector(7, handle_sys);
+        set_except_vector(8, handle_ccu);
+        set_except_vector(9, handle_ri);
+        set_except_vector(10, handle_tr);
+        set_except_vector(11, handle_adedata);
+        set_except_vector(12, handle_adedata);
+        set_except_vector(13, handle_tlb_refill);
+        set_except_vector(14, handle_tlb_invaild);
+        set_except_vector(15, handle_mod);
+        set_except_vector(16, handle_cee);
+        set_except_vector(17, handle_cpe);
+        set_except_vector(18, handle_dbe);
+        flush_icache_range(DEBUG_VECTOR_BASE_ADDR, IRQ_VECTOR_BASE_ADDR);
+
+        atomic_inc(&init_mm.mm_count);
+        current->active_mm = &init_mm;
+        cpu_cache_init();
+}
diff --git a/arch/score/kernel/vmlinux.lds.S b/arch/score/kernel/vmlinux.lds.S
new file mode 100644
index 000000000000..eebcbaa4e978
--- /dev/null
+++ b/arch/score/kernel/vmlinux.lds.S
@@ -0,0 +1,89 @@
+/*
+ * arch/score/kernel/vmlinux.lds.S
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <asm-generic/vmlinux.lds.h>
+#include <asm/thread_info.h>
+#include <asm/page.h>
+
+OUTPUT_ARCH(score)
+ENTRY(_stext)
+
+jiffies = jiffies_64;
+
+SECTIONS
+{
+        . = CONFIG_MEMORY_START + 0x2000;
+        /* read-only */
+        .text : {
+                _text = .;      /* Text and read-only data */
+                TEXT_TEXT
+                SCHED_TEXT
+                LOCK_TEXT
+                KPROBES_TEXT
+                *(.text.*)
+                *(.fixup)
+                . = ALIGN (4) ;
+                _etext = .;     /* End of text section */
+        }
+
+        . = ALIGN(16);
+        RODATA
+
+        EXCEPTION_TABLE(16)
+
+        RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
+
+        /* We want the small data sections together, so single-instruction offsets
+           can access them all, and initialized data all before uninitialized, so
+           we can shorten the on-disk segment size.  */
+        . = ALIGN(8);
+        .sdata : {
+                *(.sdata)
+        }
+        _edata =  .;                    /* End of data section */
+
+        /* will be freed after init */
+        . = ALIGN(PAGE_SIZE);           /* Init code and data */
+        __init_begin = .;
+
+        INIT_TEXT_SECTION(PAGE_SIZE)
+        INIT_DATA_SECTION(16)
+
+        /* .exit.text is discarded at runtime, not link time, to deal with
+         * references from .rodata
+         */
+        .exit.text : {
+                EXIT_TEXT
+        }
+        .exit.data : {
+                EXIT_DATA
+        }
+        . = ALIGN(PAGE_SIZE);
+        __init_end = .;
+        /* freed after init ends here */
+
+        BSS_SECTION(0, 0, 0)
+        _end = .;
+}
diff --git a/arch/score/lib/Makefile b/arch/score/lib/Makefile
new file mode 100644
index 000000000000..553e30e81faf
--- /dev/null
+++ b/arch/score/lib/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for SCORE-specific library files..
+#
+
+lib-y += string.o checksum.o checksum_copy.o
+
+# libgcc-style stuff needed in the kernel
+obj-y += ashldi3.o ashrdi3.o cmpdi2.o lshrdi3.o ucmpdi2.o
diff --git a/arch/score/lib/ashldi3.c b/arch/score/lib/ashldi3.c
new file mode 100644
index 000000000000..15691a910431
--- /dev/null
+++ b/arch/score/lib/ashldi3.c
@@ -0,0 +1,46 @@
+/*
+ * arch/score/lib/ashldi3.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include "libgcc.h"
+
+long long __ashldi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                w.s.low = 0;
+                w.s.high = (unsigned int) uu.s.low << -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.low >> bm;
+
+                w.s.low = (unsigned int) uu.s.low << b;
+                w.s.high = ((unsigned int) uu.s.high << b) | carries;
+        }
+
+        return w.ll;
+}
+EXPORT_SYMBOL(__ashldi3);
diff --git a/arch/score/lib/ashrdi3.c b/arch/score/lib/ashrdi3.c
new file mode 100644
index 000000000000..d9814a5d8d30
--- /dev/null
+++ b/arch/score/lib/ashrdi3.c
@@ -0,0 +1,48 @@
+/*
+ * arch/score/lib/ashrdi3.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include "libgcc.h"
+
+long long __ashrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                /* w.s.high = 1..1 or 0..0 */
+                w.s.high =
+                    uu.s.high >> 31;
+                w.s.low = uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+
+                w.s.high = uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+
+        return w.ll;
+}
+EXPORT_SYMBOL(__ashrdi3);
diff --git a/arch/score/lib/checksum.S b/arch/score/lib/checksum.S
new file mode 100644
index 000000000000..706157edc7d5
--- /dev/null
+++ b/arch/score/lib/checksum.S
@@ -0,0 +1,255 @@
+/*
+ * arch/score/lib/csum_partial.S
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/linkage.h>
+
+#define ADDC(sum,reg)                   \
+        add     sum, sum, reg;          \
+        cmp.c   reg, sum;               \
+        bleu    9f;                     \
+        addi    sum, 0x1;               \
+9:
+
+#define CSUM_BIGCHUNK(src, offset, sum)         \
+        lw      r8, [src, offset + 0x00];       \
+        lw      r9, [src, offset + 0x04];       \
+        lw      r10, [src, offset + 0x08];      \
+        lw      r11, [src, offset + 0x0c];      \
+        ADDC(sum, r8);                          \
+        ADDC(sum, r9);                          \
+        ADDC(sum, r10);                         \
+        ADDC(sum, r11);                         \
+        lw      r8, [src, offset + 0x10];       \
+        lw      r9, [src, offset + 0x14];       \
+        lw      r10, [src, offset + 0x18];      \
+        lw      r11, [src, offset + 0x1c];      \
+        ADDC(sum, r8);                          \
+        ADDC(sum, r9);                          \
+        ADDC(sum, r10);                         \
+        ADDC(sum, r11);                         \
+
+#define src r4
+#define dest r5
+#define sum r27
+
+        .text
+/* unknown src alignment and < 8 bytes to go */
+small_csumcpy:
+        mv      r5, r10
+        ldi     r9, 0x0
+        cmpi.c  r25, 0x1
+        beq pass_small_set_t7   /*already set, jump to pass_small_set_t7*/
+        andri.c r25,r4 , 0x1    /*Is src 2 bytes aligned?*/
+
+pass_small_set_t7:
+        beq     aligned
+        cmpi.c  r5, 0x0
+        beq     fold
+        lbu     r9, [src]
+        slli    r9,r9, 0x8      /*Little endian*/
+        ADDC(sum, r9)
+        addi    src, 0x1
+        subi.c  r5, 0x1
+
+        /*len still a full word */
+aligned:
+        andri.c r8, r5, 0x4     /*Len >= 4?*/
+        beq     len_less_4bytes
+
+        /* Still a full word (4byte) to go,and the src is word aligned.*/
+        andri.c r8, src, 0x3    /*src is 4bytes aligned, so use LW!!*/
+        beq     four_byte_aligned
+        lhu     r9, [src]
+        addi    src, 2
+        ADDC(sum, r9)
+        lhu     r9, [src]
+        addi    src, 2
+        ADDC(sum, r9)
+        b len_less_4bytes
+
+four_byte_aligned:              /* Len >=4 and four byte aligned */
+        lw      r9, [src]
+        addi    src, 4
+        ADDC(sum, r9)
+
+len_less_4bytes:                /* 2 byte aligned aligned and length<4B */
+        andri.c r8, r5, 0x2
+        beq     len_less_2bytes
+        lhu     r9, [src]
+        addi    src, 0x2        /* src+=2 */
+        ADDC(sum, r9)
+
+len_less_2bytes:                /* len = 1 */
+        andri.c r8, r5, 0x1
+        beq     fold            /* less than 2 and not equal 1--> len=0 -> fold */
+        lbu     r9, [src]
+
+fold_ADDC:
+        ADDC(sum, r9)
+fold:
+        /* fold checksum */
+        slli    r26, sum, 16
+        add     sum, sum, r26
+        cmp.c   r26, sum
+        srli    sum, sum, 16
+        bleu    1f              /* if r26<=sum */
+        addi    sum, 0x1        /* r26>sum */
+1:
+        /* odd buffer alignment? r25 was set in csum_partial */
+        cmpi.c  r25, 0x0
+        beq     1f
+        slli    r26, sum, 8
+        srli    sum, sum, 8
+        or      sum, sum, r26
+        andi    sum, 0xffff
+1:
+        .set    optimize
+        /* Add the passed partial csum. */
+        ADDC(sum, r6)
+        mv      r4, sum
+        br      r3
+        .set    volatile
+
+        .align  5
+ENTRY(csum_partial)
+        ldi sum, 0
+        ldi r25, 0
+        mv r10, r5
+        cmpi.c  r5, 0x8
+        blt     small_csumcpy           /* < 8(singed) bytes to copy */
+        cmpi.c  r5, 0x0
+        beq     out
+        andri.c r25, src, 0x1           /* odd buffer? */
+
+        beq     word_align
+hword_align:                            /* 1 byte */
+        lbu     r8, [src]
+        subi    r5, 0x1
+        slli    r8, r8, 8
+        ADDC(sum, r8)
+        addi    src, 0x1
+
+word_align:                             /* 2 bytes */
+        andri.c r8, src, 0x2            /* 4bytes(dword)_aligned? */
+        beq     dword_align             /* not, maybe dword_align */
+        lhu     r8, [src]
+        subi    r5, 0x2
+        ADDC(sum, r8)
+        addi    src, 0x2
+
+dword_align:                            /* 4bytes */
+        mv      r26, r5                 /* maybe useless when len >=56 */
+        ldi     r8, 56
+        cmp.c   r8, r5
+        bgtu    do_end_words            /* if a1(len)<t0(56) ,unsigned */
+        andri.c r26, src, 0x4
+        beq     qword_align
+        lw      r8, [src]
+        subi    r5, 0x4
+        ADDC(sum, r8)
+        addi    src, 0x4
+
+qword_align:                            /* 8 bytes */
+        andri.c r26, src, 0x8
+        beq     oword_align
+        lw      r8, [src, 0x0]
+        lw      r9, [src, 0x4]
+        subi    r5, 0x8                 /* len-=0x8 */
+        ADDC(sum, r8)
+        ADDC(sum, r9)
+        addi    src, 0x8
+
+oword_align:                            /* 16bytes */
+        andri.c r26, src, 0x10
+        beq     begin_movement
+        lw      r10, [src, 0x08]
+        lw      r11, [src, 0x0c]
+        lw      r8, [src, 0x00]
+        lw      r9, [src, 0x04]
+        ADDC(sum, r10)
+        ADDC(sum, r11)
+        ADDC(sum, r8)
+        ADDC(sum, r9)
+        subi    r5, 0x10
+        addi    src, 0x10
+
+begin_movement:
+        srli.c  r26, r5, 0x7            /* len>=128? */
+        beq     1f                      /* len<128 */
+
+/* r26 is the result that computed in oword_align */
+move_128bytes:
+        CSUM_BIGCHUNK(src, 0x00, sum)
+        CSUM_BIGCHUNK(src, 0x20, sum)
+        CSUM_BIGCHUNK(src, 0x40, sum)
+        CSUM_BIGCHUNK(src, 0x60, sum)
+        subi.c  r26, 0x01               /* r26 equals len/128 */
+        addi    src, 0x80
+        bne     move_128bytes
+
+1:      /* len<128,we process 64byte here */
+        andri.c r10, r5, 0x40
+        beq     1f
+
+move_64bytes:
+        CSUM_BIGCHUNK(src, 0x00, sum)
+        CSUM_BIGCHUNK(src, 0x20, sum)
+        addi    src, 0x40
+
+1:                                      /* len<64 */
+        andri   r26, r5, 0x1c           /* 0x1c=28 */
+        andri.c r10, r5, 0x20
+        beq     do_end_words            /* decided by andri */
+
+move_32bytes:
+        CSUM_BIGCHUNK(src, 0x00, sum)
+        andri   r26, r5, 0x1c
+        addri   src, src, 0x20
+
+do_end_words:                           /* len<32 */
+        /* r26 was set already in dword_align */
+        cmpi.c  r26, 0x0
+        beq     maybe_end_cruft         /* len<28 or len<56 */
+        srli    r26, r26, 0x2
+
+end_words:
+        lw      r8, [src]
+        subi.c  r26, 0x1                /* unit is 4 byte */
+        ADDC(sum, r8)
+        addi    src, 0x4
+        cmpi.c  r26, 0x0
+        bne     end_words               /* r26!=0 */
+
+maybe_end_cruft:                        /* len<4 */
+        andri   r10, r5, 0x3
+
+small_memcpy:
+        mv      r5, r10
+        j       small_csumcpy
+
+out:
+        mv      r4, sum
+        br      r3
+
+END(csum_partial)
diff --git a/arch/score/lib/checksum_copy.c b/arch/score/lib/checksum_copy.c
new file mode 100644
index 000000000000..04565dd3ded8
--- /dev/null
+++ b/arch/score/lib/checksum_copy.c
@@ -0,0 +1,52 @@
+/*
+ * arch/score/lib/csum_partial_copy.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <net/checksum.h>
+
+#include <asm/uaccess.h>
+
+unsigned int csum_partial_copy(const char *src, char *dst,
+                                int len, unsigned int sum)
+{
+        sum = csum_partial(src, len, sum);
+        memcpy(dst, src, len);
+
+        return sum;
+}
+
+unsigned int csum_partial_copy_from_user(const char *src, char *dst,
+                                        int len, unsigned int sum,
+                                        int *err_ptr)
+{
+        int missing;
+
+        missing = copy_from_user(dst, src, len);
+        if (missing) {
+                memset(dst + len - missing, 0, missing);
+                *err_ptr = -EFAULT;
+        }
+
+        return csum_partial(dst, len, sum);
+}
diff --git a/arch/score/lib/cmpdi2.c b/arch/score/lib/cmpdi2.c
new file mode 100644
index 000000000000..1ed5290c66ed
--- /dev/null
+++ b/arch/score/lib/cmpdi2.c
@@ -0,0 +1,44 @@
+/*
+ * arch/score/lib/cmpdi2.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include "libgcc.h"
+
+word_type __cmpdi2(long long a, long long b)
+{
+        const DWunion au = {
+                .ll = a
+        };
+        const DWunion bu = {
+                .ll = b
+        };
+
+        if (au.s.high < bu.s.high)
+                return 0;
+        else if (au.s.high > bu.s.high)
+                return 2;
+
+        if ((unsigned int) au.s.low < (unsigned int) bu.s.low)
+                return 0;
+        else if ((unsigned int) au.s.low > (unsigned int) bu.s.low)
+                return 2;
+
+        return 1;
+}
+EXPORT_SYMBOL(__cmpdi2);
diff --git a/arch/score/lib/libgcc.h b/arch/score/lib/libgcc.h
new file mode 100644
index 000000000000..0f12543d9f31
--- /dev/null
+++ b/arch/score/lib/libgcc.h
@@ -0,0 +1,37 @@
+/*
+ * arch/score/lib/libgcc.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+
+#ifndef __ASM_LIBGCC_H
+#define __ASM_LIBGCC_H
+
+#include <asm/byteorder.h>
+
+typedef int word_type __attribute__((mode(__word__)));
+
+struct DWstruct {
+        int low, high;
+};
+
+typedef union {
+        struct DWstruct s;
+        long long ll;
+} DWunion;
+
+#endif /* __ASM_LIBGCC_H */
diff --git a/arch/score/lib/lshrdi3.c b/arch/score/lib/lshrdi3.c
new file mode 100644
index 000000000000..ce21175fd791
--- /dev/null
+++ b/arch/score/lib/lshrdi3.c
@@ -0,0 +1,47 @@
+/*
+ * arch/score/lib/lshrdi3.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+
+#include <linux/module.h>
+#include "libgcc.h"
+
+long long __lshrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+
+        if (b == 0)
+                return u;
+
+        uu.ll = u;
+        bm = 32 - b;
+
+        if (bm <= 0) {
+                w.s.high = 0;
+                w.s.low = (unsigned int) uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+
+                w.s.high = (unsigned int) uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+
+        return w.ll;
+}
+EXPORT_SYMBOL(__lshrdi3);
diff --git a/arch/score/lib/string.S b/arch/score/lib/string.S
new file mode 100644
index 000000000000..00b7d3a2fc60
--- /dev/null
+++ b/arch/score/lib/string.S
@@ -0,0 +1,184 @@
+/*
+ * arch/score/lib/string.S
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/linkage.h>
+#include <asm-generic/errno.h>
+
+        .text
+        .align 2
+ENTRY(__strncpy_from_user)
+        cmpi.c  r6, 0
+        mv      r9, r6
+        ble     .L2
+0:      lbu     r7, [r5]
+        ldi     r8, 0
+1:      sb      r7, [r4]
+2:      lb      r6, [r5]
+        cmp.c   r6, r8
+        beq     .L2
+
+.L5:
+        addi    r8, 1
+        cmp.c   r8, r9
+        beq     .L7
+3:      lbu     r6, [r5, 1]+
+4:      sb      r6, [r4, 1]+
+5:      lb      r7, [r5]
+        cmpi.c  r7, 0
+        bne     .L5
+.L7:
+        mv      r4, r8
+        br      r3
+.L2:
+        ldi     r8, 0
+        mv      r4, r8
+        br      r3
+        .section .fixup, "ax"
+99:
+        ldi     r4, -EFAULT
+        br      r3
+        .previous
+        .section __ex_table, "a"
+        .align  2
+        .word   0b ,99b
+        .word   1b ,99b
+        .word   2b ,99b
+        .word   3b ,99b
+        .word   4b ,99b
+        .word   5b ,99b
+        .previous
+
+        .align 2
+ENTRY(__strnlen_user)
+        cmpi.c  r5, 0
+        ble     .L11
+0:      lb      r6, [r4]
+        ldi     r7, 0
+        cmp.c   r6, r7
+        beq     .L11
+.L15:
+        addi    r7, 1
+        cmp.c   r7, r5
+        beq     .L23
+1:      lb      r6, [r4,1]+
+        cmpi.c  r6, 0
+        bne     .L15
+.L23:
+        addri   r4, r7, 1
+        br      r3
+
+.L11:
+        ldi     r4, 1
+        br      r3
+        .section .fixup, "ax"
+99:
+        ldi     r4, 0
+        br      r3
+
+        .section __ex_table,"a"
+        .align 2
+        .word   0b, 99b
+        .word   1b, 99b
+        .previous
+
+        .align 2
+ENTRY(__strlen_user)
+0:      lb      r6, [r4]
+        mv      r7, r4
+        extsb   r6, r6
+        cmpi.c  r6, 0
+        mv      r4, r6
+        beq     .L27
+.L28:
+1:      lb      r6, [r7, 1]+
+        addi    r6, 1
+        cmpi.c  r6, 0
+        bne     .L28
+.L27:
+        br      r3
+        .section .fixup, "ax"
+        ldi     r4, 0x0
+        br      r3
+99:
+        ldi     r4, 0
+        br      r3
+        .previous
+        .section __ex_table, "a"
+        .align  2
+        .word   0b ,99b
+        .word   1b ,99b
+        .previous
+
+        .align 2
+ENTRY(__copy_tofrom_user)
+        cmpi.c  r6, 0
+        mv      r10,r6
+        beq     .L32
+        ldi     r9, 0
+.L34:
+        add     r6, r5, r9
+0:      lbu     r8, [r6]
+        add     r7, r4, r9
+1:      sb      r8, [r7]
+        addi    r9, 1
+        cmp.c   r9, r10
+        bne     .L34
+.L32:
+        ldi     r4, 0
+        br      r3
+        .section .fixup, "ax"
+99:
+        sub     r4, r10, r9
+        br      r3
+        .previous
+        .section __ex_table, "a"
+        .align  2
+        .word   0b, 99b
+        .word   1b, 99b
+        .previous
+
+        .align 2
+ENTRY(__clear_user)
+        cmpi.c  r5, 0
+        beq     .L38
+        ldi     r6, 0
+        mv      r7, r6
+.L40:
+        addi    r6, 1
+0:      sb      r7, [r4]+, 1
+        cmp.c   r6, r5
+        bne     .L40
+.L38:
+        ldi     r4, 0
+        br      r3
+
+        .section .fixup, "ax"
+        br      r3
+        .previous
+        .section __ex_table, "a"
+        .align  2
+99:
+        .word   0b, 99b
+        .previous
diff --git a/arch/score/lib/ucmpdi2.c b/arch/score/lib/ucmpdi2.c
new file mode 100644
index 000000000000..b15241e0b079
--- /dev/null
+++ b/arch/score/lib/ucmpdi2.c
@@ -0,0 +1,38 @@
+/*
+ * arch/score/lib/ucmpdi2.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include "libgcc.h"
+
+word_type __ucmpdi2(unsigned long long a, unsigned long long b)
+{
+        const DWunion au = {.ll = a};
+        const DWunion bu = {.ll = b};
+
+        if ((unsigned int) au.s.high < (unsigned int) bu.s.high)
+                return 0;
+        else if ((unsigned int) au.s.high > (unsigned int) bu.s.high)
+                return 2;
+        if ((unsigned int) au.s.low < (unsigned int) bu.s.low)
+                return 0;
+        else if ((unsigned int) au.s.low > (unsigned int) bu.s.low)
+                return 2;
+        return 1;
+}
+EXPORT_SYMBOL(__ucmpdi2);
diff --git a/arch/score/mm/Makefile b/arch/score/mm/Makefile
new file mode 100644
index 000000000000..7b1e29b1f8cd
--- /dev/null
+++ b/arch/score/mm/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the Linux/SCORE-specific parts of the memory manager.
+#
+
+obj-y += cache.o extable.o fault.o init.o \
+        tlb-miss.o tlb-score.o pgtable.o
diff --git a/arch/score/mm/cache.c b/arch/score/mm/cache.c
new file mode 100644
index 000000000000..dbac9d9dfddd
--- /dev/null
+++ b/arch/score/mm/cache.c
@@ -0,0 +1,257 @@
+/*
+ * arch/score/mm/cache.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+
+#include <asm/mmu_context.h>
+
+/*
+Just flush entire Dcache!!
+You must ensure the page doesn't include instructions, because
+the function will not flush the Icache.
+The addr must be cache aligned.
+*/
+static void flush_data_cache_page(unsigned long addr)
+{
+        unsigned int i;
+        for (i = 0; i < (PAGE_SIZE / L1_CACHE_BYTES); i += L1_CACHE_BYTES) {
+                __asm__ __volatile__(
+                "cache 0x0e, [%0, 0]\n"
+                "cache 0x1a, [%0, 0]\n"
+                "nop\n"
+                : : "r" (addr));
+                addr += L1_CACHE_BYTES;
+        }
+}
+
+/* called by update_mmu_cache. */
+void __update_cache(struct vm_area_struct *vma, unsigned long address,
+                pte_t pte)
+{
+        struct page *page;
+        unsigned long pfn, addr;
+        int exec = (vma->vm_flags & VM_EXEC);
+
+        pfn = pte_pfn(pte);
+        if (unlikely(!pfn_valid(pfn)))
+                return;
+        page = pfn_to_page(pfn);
+        if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) {
+                addr = (unsigned long) page_address(page);
+                if (exec)
+                        flush_data_cache_page(addr);
+                clear_bit(PG_arch_1, &page->flags);
+        }
+}
+
+static inline void setup_protection_map(void)
+{
+        protection_map[0] = PAGE_NONE;
+        protection_map[1] = PAGE_READONLY;
+        protection_map[2] = PAGE_COPY;
+        protection_map[3] = PAGE_COPY;
+        protection_map[4] = PAGE_READONLY;
+        protection_map[5] = PAGE_READONLY;
+        protection_map[6] = PAGE_COPY;
+        protection_map[7] = PAGE_COPY;
+        protection_map[8] = PAGE_NONE;
+        protection_map[9] = PAGE_READONLY;
+        protection_map[10] = PAGE_SHARED;
+        protection_map[11] = PAGE_SHARED;
+        protection_map[12] = PAGE_READONLY;
+        protection_map[13] = PAGE_READONLY;
+        protection_map[14] = PAGE_SHARED;
+        protection_map[15] = PAGE_SHARED;
+}
+
+void __devinit cpu_cache_init(void)
+{
+        setup_protection_map();
+}
+
+void flush_icache_all(void)
+{
+        __asm__ __volatile__(
+        "la r8, flush_icache_all\n"
+        "cache 0x10, [r8, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\nnop\n"
+        : : : "r8");
+}
+
+void flush_dcache_all(void)
+{
+        __asm__ __volatile__(
+        "la r8, flush_dcache_all\n"
+        "cache 0x1f, [r8, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\nnop\n"
+        "cache 0x1a, [r8, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\nnop\n"
+        : : : "r8");
+}
+
+void flush_cache_all(void)
+{
+        __asm__ __volatile__(
+        "la r8, flush_cache_all\n"
+        "cache 0x10, [r8, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\nnop\n"
+        "cache 0x1f, [r8, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\nnop\n"
+        "cache 0x1a, [r8, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\nnop\n"
+        : : : "r8");
+}
+
+void flush_cache_mm(struct mm_struct *mm)
+{
+        if (!(mm->context))
+                return;
+        flush_cache_all();
+}
+
+/*if we flush a range precisely , the processing may be very long.
+We must check each page in the range whether present. If the page is present,
+we can flush the range in the page. Be careful, the range may be cross two
+page, a page is present and another is not present.
+*/
+/*
+The interface is provided in hopes that the port can find
+a suitably efficient method for removing multiple page
+sized regions from the cache.
+*/
+void flush_cache_range(struct vm_area_struct *vma,
+                unsigned long start, unsigned long end)
+{
+        struct mm_struct *mm = vma->vm_mm;
+        int exec = vma->vm_flags & VM_EXEC;
+        pgd_t *pgdp;
+        pud_t *pudp;
+        pmd_t *pmdp;
+        pte_t *ptep;
+
+        if (!(mm->context))
+                return;
+
+        pgdp = pgd_offset(mm, start);
+        pudp = pud_offset(pgdp, start);
+        pmdp = pmd_offset(pudp, start);
+        ptep = pte_offset(pmdp, start);
+
+        while (start <= end) {
+                unsigned long tmpend;
+                pgdp = pgd_offset(mm, start);
+                pudp = pud_offset(pgdp, start);
+                pmdp = pmd_offset(pudp, start);
+                ptep = pte_offset(pmdp, start);
+
+                if (!(pte_val(*ptep) & _PAGE_PRESENT)) {
+                        start = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
+                        continue;
+                }
+                tmpend = (start | (PAGE_SIZE-1)) > end ?
+                                 end : (start | (PAGE_SIZE-1));
+
+                flush_dcache_range(start, tmpend);
+                if (exec)
+                        flush_icache_range(start, tmpend);
+                start = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
+        }
+}
+
+void flush_cache_page(struct vm_area_struct *vma,
+                unsigned long addr, unsigned long pfn)
+{
+        int exec = vma->vm_flags & VM_EXEC;
+        unsigned long kaddr = 0xa0000000 | (pfn << PAGE_SHIFT);
+
+        flush_dcache_range(kaddr, kaddr + PAGE_SIZE);
+
+        if (exec)
+                flush_icache_range(kaddr, kaddr + PAGE_SIZE);
+}
+
+void flush_cache_sigtramp(unsigned long addr)
+{
+        __asm__ __volatile__(
+        "cache 0x02, [%0, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\n"
+        "cache 0x02, [%0, 0x4]\n"
+        "nop\nnop\nnop\nnop\nnop\n"
+
+        "cache 0x0d, [%0, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\n"
+        "cache 0x0d, [%0, 0x4]\n"
+        "nop\nnop\nnop\nnop\nnop\n"
+
+        "cache 0x1a, [%0, 0]\n"
+        "nop\nnop\nnop\nnop\nnop\n"
+        : : "r" (addr));
+}
+
+/*
+1. WB and invalid a cache line of Dcache
+2. Drain Write Buffer
+the range must be smaller than PAGE_SIZE
+*/
+void flush_dcache_range(unsigned long start, unsigned long end)
+{
+        int size, i;
+
+        start = start & ~(L1_CACHE_BYTES - 1);
+        end = end & ~(L1_CACHE_BYTES - 1);
+        size = end - start;
+        /* flush dcache to ram, and invalidate dcache lines. */
+        for (i = 0; i < size; i += L1_CACHE_BYTES) {
+                __asm__ __volatile__(
+                "cache 0x0e, [%0, 0]\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+                "cache 0x1a, [%0, 0]\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+                : : "r" (start));
+                start += L1_CACHE_BYTES;
+        }
+}
+
+void flush_icache_range(unsigned long start, unsigned long end)
+{
+        int size, i;
+        start = start & ~(L1_CACHE_BYTES - 1);
+        end = end & ~(L1_CACHE_BYTES - 1);
+
+        size = end - start;
+        /* invalidate icache lines. */
+        for (i = 0; i < size; i += L1_CACHE_BYTES) {
+                __asm__ __volatile__(
+                "cache 0x02, [%0, 0]\n"
+                "nop\nnop\nnop\nnop\nnop\n"
+                : : "r" (start));
+                start += L1_CACHE_BYTES;
+        }
+}
diff --git a/arch/score/mm/extable.c b/arch/score/mm/extable.c
new file mode 100644
index 000000000000..01ff6445171c
--- /dev/null
+++ b/arch/score/mm/extable.c
@@ -0,0 +1,38 @@
+/*
+ * arch/score/mm/extable.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+
+int fixup_exception(struct pt_regs *regs)
+{
+        const struct exception_table_entry *fixup;
+
+        fixup = search_exception_tables(regs->cp0_epc);
+        if (fixup) {
+                regs->cp0_epc = fixup->fixup;
+                return 1;
+        }
+        return 0;
+}
diff --git a/arch/score/mm/fault.c b/arch/score/mm/fault.c
new file mode 100644
index 000000000000..47b600e4b2c5
--- /dev/null
+++ b/arch/score/mm/fault.c
@@ -0,0 +1,235 @@
+/*
+ * arch/score/mm/fault.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+
+/*
+ * This routine handles page faults.  It determines the address,
+ * and the problem, and then passes it off to one of the appropriate
+ * routines.
+ */
+asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
+                                unsigned long address)
+{
+        struct vm_area_struct *vma = NULL;
+        struct task_struct *tsk = current;
+        struct mm_struct *mm = tsk->mm;
+        const int field = sizeof(unsigned long) * 2;
+        siginfo_t info;
+        int fault;
+
+        info.si_code = SEGV_MAPERR;
+
+        /*
+        * We fault-in kernel-space virtual memory on-demand. The
+        * 'reference' page table is init_mm.pgd.
+        *
+        * NOTE! We MUST NOT take any locks for this case. We may
+        * be in an interrupt or a critical region, and should
+        * only copy the information from the master page table,
+        * nothing more.
+        */
+        if (unlikely(address >= VMALLOC_START && address <= VMALLOC_END))
+                goto vmalloc_fault;
+#ifdef MODULE_START
+        if (unlikely(address >= MODULE_START && address < MODULE_END))
+                goto vmalloc_fault;
+#endif
+
+        /*
+        * If we're in an interrupt or have no user
+        * context, we must not take the fault..
+        */
+        if (in_atomic() || !mm)
+                goto bad_area_nosemaphore;
+
+        down_read(&mm->mmap_sem);
+        vma = find_vma(mm, address);
+        if (!vma)
+                goto bad_area;
+        if (vma->vm_start <= address)
+                goto good_area;
+        if (!(vma->vm_flags & VM_GROWSDOWN))
+                goto bad_area;
+        if (expand_stack(vma, address))
+                goto bad_area;
+        /*
+        * Ok, we have a good vm_area for this memory access, so
+        * we can handle it..
+         */
+good_area:
+        info.si_code = SEGV_ACCERR;
+
+        if (write) {
+                if (!(vma->vm_flags & VM_WRITE))
+                        goto bad_area;
+        } else {
+                if (!(vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC)))
+                        goto bad_area;
+        }
+
+survive:
+        /*
+        * If for any reason at all we couldn't handle the fault,
+        * make sure we exit gracefully rather than endlessly redo
+        * the fault.
+        */
+        fault = handle_mm_fault(mm, vma, address, write);
+        if (unlikely(fault & VM_FAULT_ERROR)) {
+                if (fault & VM_FAULT_OOM)
+                        goto out_of_memory;
+                else if (fault & VM_FAULT_SIGBUS)
+                        goto do_sigbus;
+                BUG();
+        }
+        if (fault & VM_FAULT_MAJOR)
+                tsk->maj_flt++;
+        else
+                tsk->min_flt++;
+
+        up_read(&mm->mmap_sem);
+        return;
+
+        /*
+        * Something tried to access memory that isn't in our memory map..
+        * Fix it, but check if it's kernel or user first..
+         */
+bad_area:
+        up_read(&mm->mmap_sem);
+
+bad_area_nosemaphore:
+        /* User mode accesses just cause a SIGSEGV */
+        if (user_mode(regs)) {
+                tsk->thread.cp0_badvaddr = address;
+                tsk->thread.error_code = write;
+                info.si_signo = SIGSEGV;
+                info.si_errno = 0;
+                /* info.si_code has been set above */
+                info.si_addr = (void __user *) address;
+                force_sig_info(SIGSEGV, &info, tsk);
+                return;
+        }
+
+no_context:
+        /* Are we prepared to handle this kernel fault? */
+        if (fixup_exception(regs)) {
+                current->thread.cp0_baduaddr = address;
+                return;
+        }
+
+        /*
+        * Oops. The kernel tried to access some bad page. We'll have to
+        * terminate things with extreme prejudice.
+        */
+        bust_spinlocks(1);
+
+        printk(KERN_ALERT "CPU %d Unable to handle kernel paging request at "
+                        "virtual address %0*lx, epc == %0*lx, ra == %0*lx\n",
+                        0, field, address, field, regs->cp0_epc,
+                        field, regs->regs[3]);
+        die("Oops", regs);
+
+        /*
+        * We ran out of memory, or some other thing happened to us that made
+        * us unable to handle the page fault gracefully.
+        */
+out_of_memory:
+        up_read(&mm->mmap_sem);
+        if (is_global_init(tsk)) {
+                yield();
+                down_read(&mm->mmap_sem);
+                goto survive;
+        }
+        printk("VM: killing process %s\n", tsk->comm);
+        if (user_mode(regs))
+                do_group_exit(SIGKILL);
+        goto no_context;
+
+do_sigbus:
+        up_read(&mm->mmap_sem);
+        /* Kernel mode? Handle exceptions or die */
+        if (!user_mode(regs))
+                goto no_context;
+        else
+        /*
+        * Send a sigbus, regardless of whether we were in kernel
+        * or user mode.
+        */
+        tsk->thread.cp0_badvaddr = address;
+        info.si_signo = SIGBUS;
+        info.si_errno = 0;
+        info.si_code = BUS_ADRERR;
+        info.si_addr = (void __user *) address;
+        force_sig_info(SIGBUS, &info, tsk);
+        return;
+vmalloc_fault:
+        {
+                /*
+                * Synchronize this task's top level page-table
+                * with the 'reference' page table.
+                *
+                * Do _not_ use "tsk" here. We might be inside
+                * an interrupt in the middle of a task switch..
+                */
+                int offset = __pgd_offset(address);
+                pgd_t *pgd, *pgd_k;
+                pud_t *pud, *pud_k;
+                pmd_t *pmd, *pmd_k;
+                pte_t *pte_k;
+
+                pgd = (pgd_t *) pgd_current + offset;
+                pgd_k = init_mm.pgd + offset;
+
+                if (!pgd_present(*pgd_k))
+                        goto no_context;
+                set_pgd(pgd, *pgd_k);
+
+                pud = pud_offset(pgd, address);
+                pud_k = pud_offset(pgd_k, address);
+                if (!pud_present(*pud_k))
+                        goto no_context;
+
+                pmd = pmd_offset(pud, address);
+                pmd_k = pmd_offset(pud_k, address);
+                if (!pmd_present(*pmd_k))
+                        goto no_context;
+                set_pmd(pmd, *pmd_k);
+
+                pte_k = pte_offset_kernel(pmd_k, address);
+                if (!pte_present(*pte_k))
+                        goto no_context;
+                return;
+        }
+}
diff --git a/arch/score/mm/init.c b/arch/score/mm/init.c
new file mode 100644
index 000000000000..4e3dcd0c4716
--- /dev/null
+++ b/arch/score/mm/init.c
@@ -0,0 +1,161 @@
+/*
+ * arch/score/mm/init.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/errno.h>
+#include <linux/bootmem.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/pagemap.h>
+#include <linux/proc_fs.h>
+#include <linux/sched.h>
+#include <linux/initrd.h>
+
+#include <asm/sections.h>
+#include <asm/tlb.h>
+
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+unsigned long empty_zero_page;
+EXPORT_SYMBOL_GPL(empty_zero_page);
+
+static struct kcore_list kcore_mem, kcore_vmalloc;
+
+static unsigned long setup_zero_page(void)
+{
+        struct page *page;
+
+        empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 0);
+        if (!empty_zero_page)
+                panic("Oh boy, that early out of memory?");
+
+        page = virt_to_page((void *) empty_zero_page);
+        SetPageReserved(page);
+
+        return 1UL;
+}
+
+#ifndef CONFIG_NEED_MULTIPLE_NODES
+static int __init page_is_ram(unsigned long pagenr)
+{
+        if (pagenr >= min_low_pfn && pagenr < max_low_pfn)
+                return 1;
+        else
+                return 0;
+}
+
+void __init paging_init(void)
+{
+        unsigned long max_zone_pfns[MAX_NR_ZONES];
+        unsigned long lastpfn;
+
+        pagetable_init();
+        max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
+        lastpfn = max_low_pfn;
+        free_area_init_nodes(max_zone_pfns);
+}
+
+void __init mem_init(void)
+{
+        unsigned long codesize, reservedpages, datasize, initsize;
+        unsigned long tmp, ram = 0;
+
+        max_mapnr = max_low_pfn;
+        high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
+        totalram_pages += free_all_bootmem();
+        totalram_pages -= setup_zero_page();    /* Setup zeroed pages. */
+        reservedpages = 0;
+
+        for (tmp = 0; tmp < max_low_pfn; tmp++)
+                if (page_is_ram(tmp)) {
+                        ram++;
+                        if (PageReserved(pfn_to_page(tmp)))
+                                reservedpages++;
+                }
+
+        num_physpages = ram;
+        codesize = (unsigned long) &_etext - (unsigned long) &_text;
+        datasize = (unsigned long) &_edata - (unsigned long) &_etext;
+        initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
+
+        kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
+        kclist_add(&kcore_vmalloc, (void *) VMALLOC_START,
+                        VMALLOC_END - VMALLOC_START);
+
+        printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
+                        "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
+                        (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                        ram << (PAGE_SHIFT-10), codesize >> 10,
+                        reservedpages << (PAGE_SHIFT-10), datasize >> 10,
+                        initsize >> 10,
+                        (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+}
+#endif /* !CONFIG_NEED_MULTIPLE_NODES */
+
+static void free_init_pages(const char *what, unsigned long begin, unsigned long end)
+{
+        unsigned long pfn;
+
+        for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
+                struct page *page = pfn_to_page(pfn);
+                void *addr = phys_to_virt(PFN_PHYS(pfn));
+
+                ClearPageReserved(page);
+                init_page_count(page);
+                memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
+                __free_page(page);
+                totalram_pages++;
+        }
+        printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
+}
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+        free_init_pages("initrd memory",
+                virt_to_phys((void *) start),
+                virt_to_phys((void *) end));
+}
+#endif
+
+void __init_refok free_initmem(void)
+{
+        free_init_pages("unused kernel memory",
+        __pa(&__init_begin),
+        __pa(&__init_end));
+}
+
+unsigned long pgd_current;
+
+#define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order)))
+
+/*
+ * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
+ * are constants.  So we use the variants from asm-offset.h until that gcc
+ * will officially be retired.
+ */
+pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned(PTE_ORDER);
+pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER);
diff --git a/arch/score/mm/pgtable.c b/arch/score/mm/pgtable.c
new file mode 100644
index 000000000000..6408bb73d3cc
--- /dev/null
+++ b/arch/score/mm/pgtable.c
@@ -0,0 +1,52 @@
+/*
+ * arch/score/mm/pgtable-32.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/bootmem.h>
+#include <linux/init.h>
+#include <linux/pfn.h>
+#include <linux/mm.h>
+
+void pgd_init(unsigned long page)
+{
+        unsigned long *p = (unsigned long *) page;
+        int i;
+
+        for (i = 0; i < USER_PTRS_PER_PGD; i += 8) {
+                p[i + 0] = (unsigned long) invalid_pte_table;
+                p[i + 1] = (unsigned long) invalid_pte_table;
+                p[i + 2] = (unsigned long) invalid_pte_table;
+                p[i + 3] = (unsigned long) invalid_pte_table;
+                p[i + 4] = (unsigned long) invalid_pte_table;
+                p[i + 5] = (unsigned long) invalid_pte_table;
+                p[i + 6] = (unsigned long) invalid_pte_table;
+                p[i + 7] = (unsigned long) invalid_pte_table;
+        }
+}
+
+void __init pagetable_init(void)
+{
+        /* Initialize the entire pgd. */
+        pgd_init((unsigned long)swapper_pg_dir);
+}
diff --git a/arch/score/mm/tlb-miss.S b/arch/score/mm/tlb-miss.S
new file mode 100644
index 000000000000..f27651914e8d
--- /dev/null
+++ b/arch/score/mm/tlb-miss.S
@@ -0,0 +1,199 @@
+/*
+ * arch/score/mm/tlbex.S
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <asm/asmmacro.h>
+#include <asm/pgtable-bits.h>
+#include <asm/scoreregs.h>
+
+/*
+* After this macro runs, the pte faulted on is
+* in register PTE, a ptr into the table in which
+* the pte belongs is in PTR.
+*/
+        .macro  load_pte, pte, ptr
+        la      \ptr, pgd_current
+        lw      \ptr, [\ptr, 0]
+        mfcr    \pte, cr6
+        srli    \pte, \pte, 22
+        slli    \pte, \pte, 2
+        add     \ptr, \ptr, \pte
+        lw      \ptr, [\ptr, 0]
+        mfcr    \pte, cr6
+        srli    \pte, \pte, 10
+        andi    \pte, 0xffc
+        add     \ptr, \ptr, \pte
+        lw      \pte, [\ptr, 0]
+        .endm
+
+        .macro  pte_reload, ptr
+        lw      \ptr, [\ptr, 0]
+        mtcr    \ptr, cr12
+        nop
+        nop
+        nop
+        nop
+        nop
+        .endm
+
+        .macro do_fault, write
+        SAVE_ALL
+        mfcr    r6, cr6
+        mv      r4, r0
+        ldi     r5, \write
+        la      r8, do_page_fault
+        brl     r8
+        j       ret_from_exception
+        .endm
+
+        .macro  pte_writable, pte, ptr, label
+        andi    \pte, 0x280
+        cmpi.c  \pte, 0x280
+        bne     \label
+        lw      \pte, [\ptr, 0]         /*reload PTE*/
+        .endm
+
+/*
+ * Make PTE writable, update software status bits as well,
+ * then store at PTR.
+ */
+        .macro  pte_makewrite, pte, ptr
+        ori     \pte, 0x426
+        sw      \pte, [\ptr, 0]
+        .endm
+
+        .text
+ENTRY(score7_FTLB_refill_Handler)
+        la      r31, pgd_current        /* get pgd pointer */
+        lw      r31, [r31, 0]           /* get the address of PGD */
+        mfcr    r30, cr6
+        srli    r30, r30, 22            /* PGDIR_SHIFT = 22*/
+        slli    r30, r30, 2
+        add     r31, r31, r30
+        lw      r31, [r31, 0]           /* get the address of the start address of PTE table */
+
+        mfcr    r30, cr9
+        andi    r30, 0xfff              /* equivalent to get PET index and right shift 2 bits */
+        add     r31, r31, r30
+        lw      r30, [r31, 0]           /* load pte entry */
+        mtcr    r30, cr12
+        nop
+        nop
+        nop
+        nop
+        nop
+        mtrtlb
+        nop
+        nop
+        nop
+        nop
+        nop
+        rte                             /* 6 cycles to make sure tlb entry works */
+
+ENTRY(score7_KSEG_refill_Handler)
+        la      r31, pgd_current        /* get pgd pointer */
+        lw      r31, [r31, 0]           /* get the address of PGD */
+        mfcr    r30, cr6
+        srli    r30, r30, 22            /* PGDIR_SHIFT = 22 */
+        slli    r30, r30, 2
+        add     r31, r31, r30
+        lw      r31, [r31, 0]           /* get the address of the start address of PTE table */
+
+        mfcr    r30, cr6                /* get Bad VPN */
+        srli    r30, r30, 10
+        andi    r30, 0xffc              /* PTE VPN mask (bit 11~2) */
+
+        add     r31, r31, r30
+        lw      r30, [r31, 0]           /* load pte entry */
+        mtcr    r30, cr12
+        nop
+        nop
+        nop
+        nop
+        nop
+        mtrtlb
+        nop
+        nop
+        nop
+        nop
+        nop
+        rte                             /* 6 cycles to make sure tlb entry works */
+
+nopage_tlbl:
+        do_fault        0               /* Read */
+
+ENTRY(handle_tlb_refill)
+        load_pte        r30, r31
+        pte_writable    r30, r31, handle_tlb_refill_nopage
+        pte_makewrite   r30, r31        /* Access|Modify|Dirty|Valid */
+        pte_reload      r31
+        mtrtlb
+        nop
+        nop
+        nop
+        nop
+        nop
+        rte
+handle_tlb_refill_nopage:
+        do_fault        0               /* Read */
+
+ENTRY(handle_tlb_invaild)
+        load_pte        r30, r31
+        stlb                            /* find faulting entry */
+        pte_writable    r30, r31, handle_tlb_invaild_nopage
+        pte_makewrite   r30, r31        /* Access|Modify|Dirty|Valid */
+        pte_reload      r31
+        mtptlb
+        nop
+        nop
+        nop
+        nop
+        nop
+        rte
+handle_tlb_invaild_nopage:
+        do_fault        0               /* Read */
+
+ENTRY(handle_mod)
+        load_pte        r30, r31
+        stlb                            /* find faulting entry */
+        andi    r30, _PAGE_WRITE        /* Writable? */
+        cmpz.c  r30
+        beq     nowrite_mod
+        lw      r30, [r31, 0]           /* reload into r30 */
+
+        /* Present and writable bits set, set accessed and dirty bits. */
+        pte_makewrite   r30, r31
+
+        /* Now reload the entry into the tlb. */
+        pte_reload      r31
+        mtptlb
+        nop
+        nop
+        nop
+        nop
+        nop
+        rte
+
+nowrite_mod:
+        do_fault        1       /* Write */
diff --git a/arch/score/mm/tlb-score.c b/arch/score/mm/tlb-score.c
new file mode 100644
index 000000000000..4fa5aa5afecc
--- /dev/null
+++ b/arch/score/mm/tlb-score.c
@@ -0,0 +1,251 @@
+/*
+ * arch/score/mm/tlb-score.c
+ *
+ * Score Processor version.
+ *
+ * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
+ *  Lennox Wu <lennox.wu@sunplusct.com>
+ *  Chen Liqin <liqin.chen@sunplusct.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/highmem.h>
+#include <linux/module.h>
+
+#include <asm/irq.h>
+#include <asm/mmu_context.h>
+#include <asm/tlb.h>
+
+#define TLBSIZE 32
+
+unsigned long asid_cache = ASID_FIRST_VERSION;
+EXPORT_SYMBOL(asid_cache);
+
+void local_flush_tlb_all(void)
+{
+        unsigned long flags;
+        unsigned long old_ASID;
+        int entry;
+
+        local_irq_save(flags);
+        old_ASID = pevn_get() & ASID_MASK;
+        pectx_set(0);                   /* invalid */
+        entry = tlblock_get();          /* skip locked entries*/
+
+        for (; entry < TLBSIZE; entry++) {
+                tlbpt_set(entry);
+                pevn_set(KSEG1);
+                barrier();
+                tlb_write_indexed();
+        }
+        pevn_set(old_ASID);
+        local_irq_restore(flags);
+}
+
+/*
+ * If mm is currently active_mm, we can't really drop it. Instead,
+ * we will get a new one for it.
+ */
+static inline void
+drop_mmu_context(struct mm_struct *mm)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        get_new_mmu_context(mm);
+        pevn_set(mm->context & ASID_MASK);
+        local_irq_restore(flags);
+}
+
+void local_flush_tlb_mm(struct mm_struct *mm)
+{
+        if (mm->context != 0)
+                drop_mmu_context(mm);
+}
+
+void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
+        unsigned long end)
+{
+        struct mm_struct *mm = vma->vm_mm;
+        unsigned long vma_mm_context = mm->context;
+        if (mm->context != 0) {
+                unsigned long flags;
+                int size;
+
+                local_irq_save(flags);
+                size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
+                if (size <= TLBSIZE) {
+                        int oldpid = pevn_get() & ASID_MASK;
+                        int newpid = vma_mm_context & ASID_MASK;
+
+                        start &= PAGE_MASK;
+                        end += (PAGE_SIZE - 1);
+                        end &= PAGE_MASK;
+                        while (start < end) {
+                                int idx;
+
+                                pevn_set(start | newpid);
+                                start += PAGE_SIZE;
+                                barrier();
+                                tlb_probe();
+                                idx = tlbpt_get();
+                                pectx_set(0);
+                                pevn_set(KSEG1);
+                                if (idx < 0)
+                                        continue;
+                                tlb_write_indexed();
+                        }
+                        pevn_set(oldpid);
+                } else {
+                        /* Bigger than TLBSIZE, get new ASID directly */
+                        get_new_mmu_context(mm);
+                        if (mm == current->active_mm)
+                                pevn_set(vma_mm_context & ASID_MASK);
+                }
+                local_irq_restore(flags);
+        }
+}
+
+void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
+{
+        unsigned long flags;
+        int size;
+
+        local_irq_save(flags);
+        size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
+        if (size <= TLBSIZE) {
+                int pid = pevn_get();
+
+                start &= PAGE_MASK;
+                end += PAGE_SIZE - 1;
+                end &= PAGE_MASK;
+
+                while (start < end) {
+                        long idx;
+
+                        pevn_set(start);
+                        start += PAGE_SIZE;
+                        tlb_probe();
+                        idx = tlbpt_get();
+                        if (idx < 0)
+                                continue;
+                        pectx_set(0);
+                        pevn_set(KSEG1);
+                        barrier();
+                        tlb_write_indexed();
+                }
+                pevn_set(pid);
+        } else {
+                local_flush_tlb_all();
+        }
+
+        local_irq_restore(flags);
+}
+
+void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
+{
+        if (!vma || vma->vm_mm->context != 0) {
+                unsigned long flags;
+                int oldpid, newpid, idx;
+                unsigned long vma_ASID = vma->vm_mm->context;
+
+                newpid = vma_ASID & ASID_MASK;
+                page &= PAGE_MASK;
+                local_irq_save(flags);
+                oldpid = pevn_get() & ASID_MASK;
+                pevn_set(page | newpid);
+                barrier();
+                tlb_probe();
+                idx = tlbpt_get();
+                pectx_set(0);
+                pevn_set(KSEG1);
+                if (idx < 0)            /* p_bit(31) - 1: miss, 0: hit*/
+                        goto finish;
+                barrier();
+                tlb_write_indexed();
+finish:
+                pevn_set(oldpid);
+                local_irq_restore(flags);
+        }
+}
+
+/*
+ * This one is only used for pages with the global bit set so we don't care
+ * much about the ASID.
+ */
+void local_flush_tlb_one(unsigned long page)
+{
+        unsigned long flags;
+        int oldpid, idx;
+
+        local_irq_save(flags);
+        oldpid = pevn_get();
+        page &= (PAGE_MASK << 1);
+        pevn_set(page);
+        barrier();
+        tlb_probe();
+        idx = tlbpt_get();
+        pectx_set(0);
+        if (idx >= 0) {
+                /* Make sure all entries differ. */
+                pevn_set(KSEG1);
+                barrier();
+                tlb_write_indexed();
+        }
+        pevn_set(oldpid);
+        local_irq_restore(flags);
+}
+
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
+{
+        unsigned long flags;
+        int idx, pid;
+
+        /*
+         * Handle debugger faulting in for debugee.
+         */
+        if (current->active_mm != vma->vm_mm)
+                return;
+
+        pid = pevn_get() & ASID_MASK;
+
+        local_irq_save(flags);
+        address &= PAGE_MASK;
+        pevn_set(address | pid);
+        barrier();
+        tlb_probe();
+        idx = tlbpt_get();
+        pectx_set(pte_val(pte));
+        pevn_set(address | pid);
+        if (idx < 0)
+                tlb_write_random();
+        else
+                tlb_write_indexed();
+
+        pevn_set(pid);
+        local_irq_restore(flags);
+}
+
+void __cpuinit tlb_init(void)
+{
+        tlblock_set(0);
+        local_flush_tlb_all();
+        memcpy((void *)(EXCEPTION_VECTOR_BASE_ADDR + 0x100),
+                        &score7_FTLB_refill_Handler, 0xFC);
+        flush_icache_range(EXCEPTION_VECTOR_BASE_ADDR + 0x100,
+                        EXCEPTION_VECTOR_BASE_ADDR + 0x1FC);
+}
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index e2bdd7b94fd9..b940424f8ccc 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -10,12 +10,17 @@ config SUPERH
         select EMBEDDED
         select HAVE_CLK
         select HAVE_IDE
+        select HAVE_LMB
         select HAVE_OPROFILE
         select HAVE_GENERIC_DMA_COHERENT
         select HAVE_IOREMAP_PROT if MMU
         select HAVE_ARCH_TRACEHOOK
         select HAVE_DMA_API_DEBUG
-        select HAVE_PERF_COUNTERS
+        select HAVE_PERF_EVENTS
+        select HAVE_KERNEL_GZIP
+        select HAVE_KERNEL_BZIP2
+        select HAVE_KERNEL_LZMA
+        select HAVE_SYSCALL_TRACEPOINTS
         select RTC_LIB
         select GENERIC_ATOMIC64
         help
@@ -31,6 +36,9 @@ config SUPERH32
         select HAVE_FUNCTION_TRACER
         select HAVE_FTRACE_MCOUNT_RECORD
         select HAVE_DYNAMIC_FTRACE
+        select HAVE_FUNCTION_TRACE_MCOUNT_TEST
+        select HAVE_FTRACE_SYSCALLS
+        select HAVE_FUNCTION_GRAPH_TRACER
         select HAVE_ARCH_KGDB
         select ARCH_HIBERNATION_POSSIBLE if MMU
 
@@ -212,6 +220,8 @@ config CPU_SHX3
 config ARCH_SHMOBILE
         bool
         select ARCH_SUSPEND_POSSIBLE
+        select PM
+        select PM_RUNTIME
 
 if SUPERH32
 
@@ -389,6 +399,13 @@ config CPU_SUBTYPE_SH7724
         help
           Select SH7724 if you have an SH-MobileR2R CPU.
 
+config CPU_SUBTYPE_SH7757
+        bool "Support SH7757 processor"
+        select CPU_SH4A
+        select CPU_SHX2
+        help
+          Select SH7757 if you have a SH4A SH7757 CPU.
+
 config CPU_SUBTYPE_SH7763
         bool "Support SH7763 processor"
         select CPU_SH4A
@@ -751,12 +768,31 @@ config UBC_WAKEUP
 
           If unsure, say N.
 
-config CMDLINE_BOOL
-        bool "Default bootloader kernel arguments"
+choice
+        prompt "Kernel command line"
+        optional
+        default CMDLINE_OVERWRITE
+        help
+          Setting this option allows the kernel command line arguments
+          to be set.
+
+config CMDLINE_OVERWRITE
+        bool "Overwrite bootloader kernel arguments"
+        help
+          Given string will overwrite any arguments passed in by
+          a bootloader.
+
+config CMDLINE_EXTEND
+        bool "Extend bootloader kernel arguments"
+        help
+          Given string will be concatenated with arguments passed in
+          by a bootloader.
+
+endchoice
 
 config CMDLINE
-        string "Initial kernel command string"
-        depends on CMDLINE_BOOL
+        string "Kernel command line arguments string"
+        depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
         default "console=ttySC1,115200"
 
 endmenu
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 39224b57c6ef..55907af1dc25 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -38,11 +38,13 @@ config EARLY_SCIF_CONSOLE_PORT
         default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
                                 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
                                 CPU_SUBTYPE_SH7343
-        default "0xffea0000" if CPU_SUBTYPE_SH7785
+        default "0xfe4c0000" if CPU_SUBTYPE_SH7757
+        default "0xffeb0000" if CPU_SUBTYPE_SH7785
         default "0xffeb0000" if CPU_SUBTYPE_SH7786
         default "0xfffe8000" if CPU_SUBTYPE_SH7203
         default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
         default "0xffe80000" if CPU_SH4
+        default "0xa4000150" if CPU_SH3
         default "0x00000000"
 
 config EARLY_PRINTK
@@ -61,12 +63,14 @@ config EARLY_PRINTK
           select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using
           the kernel command line option to toggle back and forth.
 
-config DEBUG_STACKOVERFLOW
+config STACK_DEBUG
         bool "Check for stack overflows"
         depends on DEBUG_KERNEL && SUPERH32
         help
           This option will cause messages to be printed if free stack space
-          drops below a certain limit.
+          drops below a certain limit. Saying Y here will add overhead to
+          every function call and will therefore incur a major
+          performance hit. Most users should say N.
 
 config DEBUG_STACK_USAGE
         bool "Stack utilization instrumentation"
@@ -107,6 +111,14 @@ config DUMP_CODE
 
           Those looking for more verbose debugging output should say Y.
 
+config DWARF_UNWINDER
+        bool "Enable the DWARF unwinder for stacktraces"
+        select FRAME_POINTER
+        default n
+        help
+          Enabling this option will make stacktraces more accurate, at
+          the cost of an increase in overall kernel size.
+
 config SH_NO_BSS_INIT
         bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
         depends on DEBUG_KERNEL
@@ -123,4 +135,9 @@ config SH64_SR_WATCH
         bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
         depends on SUPERH64
 
+config MCOUNT
+        def_bool y
+        depends on SUPERH32
+        depends on STACK_DEBUG || FUNCTION_TRACER
+
 endmenu
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 75d049b03f7e..fc51a918b31a 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -136,6 +136,8 @@ machdir-$(CONFIG_SH_7751_SYSTEMH)		+= mach-systemh
 machdir-$(CONFIG_SH_EDOSK7705)                  += mach-edosk7705
 machdir-$(CONFIG_SH_HIGHLANDER)                 += mach-highlander
 machdir-$(CONFIG_SH_MIGOR)                      += mach-migor
+machdir-$(CONFIG_SH_KFR2R09)                    += mach-kfr2r09
+machdir-$(CONFIG_SH_ECOVEC)                     += mach-ecovec24
 machdir-$(CONFIG_SH_SDK7780)                    += mach-sdk7780
 machdir-$(CONFIG_SH_X3PROTO)                    += mach-x3proto
 machdir-$(CONFIG_SH_SH7763RDP)                  += mach-sh7763rdp
@@ -186,17 +188,27 @@ KBUILD_CFLAGS		+= -pipe $(cflags-y)
 KBUILD_CPPFLAGS         += $(cflags-y)
 KBUILD_AFLAGS           += $(cflags-y)
 
+ifeq ($(CONFIG_MCOUNT),y)
+  KBUILD_CFLAGS += -pg
+endif
+
+ifeq ($(CONFIG_DWARF_UNWINDER),y)
+  KBUILD_CFLAGS += -fasynchronous-unwind-tables
+endif
+
 libs-$(CONFIG_SUPERH32)         := arch/sh/lib/ $(libs-y)
 libs-$(CONFIG_SUPERH64)         := arch/sh/lib64/ $(libs-y)
 
-PHONY += maketools FORCE
+BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec \
+               zImage vmlinux.srec romImage
+PHONY += maketools $(BOOT_TARGETS) FORCE
 
 maketools:  include/linux/version.h FORCE
         $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
 
 all: $(KBUILD_IMAGE)
 
-zImage uImage uImage.srec vmlinux.srec: vmlinux
+$(BOOT_TARGETS): vmlinux
         $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
 
 compressed: zImage
@@ -208,10 +220,14 @@ archclean:
         $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall
 
 define archhelp
-        @echo '* zImage                    - Compressed kernel image'
+        @echo '  zImage                    - Compressed kernel image'
+        @echo '  romImage                  - Compressed ROM image, if supported'
         @echo '  vmlinux.srec              - Create an ELF S-record'
-        @echo '  uImage                    - Create a bootable image for U-Boot'
-        @echo '  uImage.srec               - Create an S-record for U-Boot'
+        @echo '* uImage                    - Alias to bootable U-Boot image'
+        @echo '  uImage.srec               - Create an S-record for U-Boot'
+        @echo '* uImage.gz                 - Kernel-only image for U-Boot (gzip)'
+        @echo '  uImage.bz2                - Kernel-only image for U-Boot (bzip2)'
+        @echo '  uImage.lzma               - Kernel-only image for U-Boot (lzma)'
 endef
 
 CLEAN_FILES += include/asm-sh/machtypes.h
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 2b1af0eefa6a..aedd9deb5de2 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -160,7 +160,6 @@ config SH_SH7785LCR
         bool "SH7785LCR"
         depends on CPU_SUBTYPE_SH7785
         select SYS_SUPPORTS_PCI
-        select IO_TRAPPED if MMU
 
 config SH_SH7785LCR_29BIT_PHYSMAPS
         bool "SH7785LCR 29bit physmaps"
@@ -171,6 +170,13 @@ config SH_SH7785LCR_29BIT_PHYSMAPS
           DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
           you can access all on-board device in 29bit address mode.
 
+config SH_SH7785LCR_PT
+        bool "SH7785LCR prototype board on 32-bit MMU mode"
+        depends on SH_SH7785LCR && 32BIT
+        default n
+        help
+          If you use prototype board, this option is enabled.
+
 config SH_URQUELL
         bool "Urquell"
         depends on CPU_SUBTYPE_SH7786
@@ -193,6 +199,20 @@ config SH_AP325RXA
           Renesas "AP-325RXA" support.
           Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
 
+config SH_KFR2R09
+        bool "KFR2R09"
+        depends on CPU_SUBTYPE_SH7724
+        select ARCH_REQUIRE_GPIOLIB
+        help
+          "Kit For R2R for 2009" support.
+
+config SH_ECOVEC
+        bool "EcoVec"
+        depends on CPU_SUBTYPE_SH7724
+        select ARCH_REQUIRE_GPIOLIB
+        help
+          Renesas "R0P7724LC0011/21RL (EcoVec)" support.
+
 config SH_SH7763RDP
         bool "SH7763RDP"
         depends on CPU_SUBTYPE_SH7763
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index b9c88cc519e2..2d080732a964 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -188,7 +188,7 @@ static struct sh_mobile_lcdc_info lcdc_info = {
                         .name = "LB070WV1",
                         .xres = 800,
                         .yres = 480,
-                        .left_margin = 40,
+                        .left_margin = 32,
                         .right_margin = 160,
                         .hsync_len = 8,
                         .upper_margin = 63,
@@ -211,7 +211,7 @@ static struct resource lcdc_resources[] = {
         [0] = {
                 .name   = "LCDC",
                 .start  = 0xfe940000, /* P4-only space */
-                .end    = 0xfe941fff,
+                .end    = 0xfe942fff,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -227,6 +227,9 @@ static struct platform_device lcdc_device = {
         .dev            = {
                 .platform_data  = &lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 static void camera_power(int val)
@@ -307,8 +310,10 @@ static int camera_set_capture(struct soc_camera_platform_info *info,
         return ret;
 }
 
+static int ap325rxa_camera_add(struct soc_camera_link *icl, struct device *dev);
+static void ap325rxa_camera_del(struct soc_camera_link *icl);
+
 static struct soc_camera_platform_info camera_info = {
-        .iface = 0,
         .format_name = "UYVY",
         .format_depth = 16,
         .format = {
@@ -320,24 +325,46 @@ static struct soc_camera_platform_info camera_info = {
         .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
         SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
         .set_capture = camera_set_capture,
+        .link = {
+                .bus_id         = 0,
+                .add_device     = ap325rxa_camera_add,
+                .del_device     = ap325rxa_camera_del,
+                .module_name    = "soc_camera_platform",
+        },
 };
 
+static void dummy_release(struct device *dev)
+{
+}
+
 static struct platform_device camera_device = {
         .name           = "soc_camera_platform",
         .dev            = {
                 .platform_data  = &camera_info,
+                .release        = dummy_release,
         },
 };
 
-static int __init camera_setup(void)
+static int ap325rxa_camera_add(struct soc_camera_link *icl,
+                               struct device *dev)
 {
-        if (camera_probe() > 0)
-                platform_device_register(&camera_device);
+        if (icl != &camera_info.link || camera_probe() <= 0)
+                return -ENODEV;
 
-        return 0;
+        camera_info.dev = dev;
+
+        return platform_device_register(&camera_device);
 }
-late_initcall(camera_setup);
 
+static void ap325rxa_camera_del(struct soc_camera_link *icl)
+{
+        if (icl != &camera_info.link)
+                return;
+
+        platform_device_unregister(&camera_device);
+        memset(&camera_device.dev.kobj, 0,
+               sizeof(camera_device.dev.kobj));
+}
 #endif /* CONFIG_I2C */
 
 static int ov7725_power(struct device *dev, int mode)
@@ -377,6 +404,9 @@ static struct platform_device ceu_device = {
         .dev            = {
                 .platform_data  = &sh_mobile_ceu_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU,
+        },
 };
 
 struct spi_gpio_platform_data sdcard_cn3_platform_data = {
@@ -410,6 +440,7 @@ static struct ov772x_camera_info ov7725_info = {
         .flags          = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
         .edgectrl       = OV772X_AUTO_EDGECTRL(0xf, 0),
         .link = {
+                .bus_id         = 0,
                 .power          = ov7725_power,
                 .board_info     = &ap325rxa_i2c_camera[0],
                 .i2c_adapter_id = 0,
@@ -417,11 +448,19 @@ static struct ov772x_camera_info ov7725_info = {
         },
 };
 
-static struct platform_device ap325rxa_camera = {
-        .name   = "soc-camera-pdrv",
-        .id     = 0,
-        .dev    = {
-                .platform_data = &ov7725_info.link,
+static struct platform_device ap325rxa_camera[] = {
+        {
+                .name   = "soc-camera-pdrv",
+                .id     = 0,
+                .dev    = {
+                        .platform_data = &ov7725_info.link,
+                },
+        }, {
+                .name   = "soc-camera-pdrv",
+                .id     = 1,
+                .dev    = {
+                        .platform_data = &camera_info.link,
+                },
         },
 };
 
@@ -432,7 +471,8 @@ static struct platform_device *ap325rxa_devices[] __initdata = {
         &ceu_device,
         &nand_flash_device,
         &sdcard_cn3_device,
-        &ap325rxa_camera,
+        &ap325rxa_camera[0],
+        &ap325rxa_camera[1],
 };
 
 static struct spi_board_info ap325rxa_spi_devices[] = {
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 42410a15d255..e5a8a2fde39c 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -223,6 +223,19 @@ static struct platform_device sm501_device = {
         .resource       = sm501_resources,
 };
 
+static struct resource i2c_proto_resources[] = {
+        [0] = {
+                .start  = PCA9564_PROTO_32BIT_ADDR,
+                .end    = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
+                .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
+        },
+        [1] = {
+                .start  = 12,
+                .end    = 12,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
 static struct resource i2c_resources[] = {
         [0] = {
                 .start  = PCA9564_ADDR,
@@ -271,6 +284,11 @@ static int __init sh7785lcr_devices_setup(void)
         i2c_register_board_info(0, sh7785lcr_i2c_devices,
                                 ARRAY_SIZE(sh7785lcr_i2c_devices));
 
+        if (mach_is_sh7785lcr_pt()) {
+                i2c_device.resource = i2c_proto_resources;
+                i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
+        }
+
         return platform_add_devices(sh7785lcr_devices,
                                     ARRAY_SIZE(sh7785lcr_devices));
 }
diff --git a/arch/sh/boards/mach-ecovec24/Makefile b/arch/sh/boards/mach-ecovec24/Makefile
new file mode 100644
index 000000000000..51f852151655
--- /dev/null
+++ b/arch/sh/boards/mach-ecovec24/Makefile
@@ -0,0 +1,9 @@
+#
+# Makefile for the R0P7724LC0011/21RL (EcoVec)
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+
+obj-y    := setup.o
\ No newline at end of file
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
new file mode 100644
index 000000000000..5f9881e16e2f
--- /dev/null
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -0,0 +1,671 @@
+/*
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/usb/r8a66597.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <video/sh_mobile_lcdc.h>
+#include <media/sh_mobile_ceu.h>
+#include <asm/heartbeat.h>
+#include <asm/sh_eth.h>
+#include <asm/sh_keysc.h>
+#include <asm/clock.h>
+#include <cpu/sh7724.h>
+
+/*
+ *  Address      Interface        BusWidth
+ *-----------------------------------------
+ *  0x0000_0000  uboot            16bit
+ *  0x0004_0000  Linux romImage   16bit
+ *  0x0014_0000  MTD for Linux    16bit
+ *  0x0400_0000  Internal I/O     16/32bit
+ *  0x0800_0000  DRAM             32bit
+ *  0x1800_0000  MFI              16bit
+ */
+
+/* Heartbeat */
+static unsigned char led_pos[] = { 0, 1, 2, 3 };
+static struct heartbeat_data heartbeat_data = {
+        .regsize = 8,
+        .nr_bits = 4,
+        .bit_pos = led_pos,
+};
+
+static struct resource heartbeat_resources[] = {
+        [0] = {
+                .start  = 0xA405012C, /* PTG */
+                .end    = 0xA405012E - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device heartbeat_device = {
+        .name           = "heartbeat",
+        .id             = -1,
+        .dev = {
+                .platform_data = &heartbeat_data,
+        },
+        .num_resources  = ARRAY_SIZE(heartbeat_resources),
+        .resource       = heartbeat_resources,
+};
+
+/* MTD */
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name = "boot loader",
+                .offset = 0,
+                .size = (5 * 1024 * 1024),
+                .mask_flags = MTD_CAP_ROM,
+        }, {
+                .name = "free-area",
+                .offset = MTDPART_OFS_APPEND,
+                .size = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0] = {
+                .name   = "NOR Flash",
+                .start  = 0x00000000,
+                .end    = 0x03ffffff,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .resource       = nor_flash_resources,
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .dev            = {
+                .platform_data = &nor_flash_data,
+        },
+};
+
+/* SH Eth */
+#define SH_ETH_ADDR     (0xA4600000)
+#define SH_ETH_MAHR     (SH_ETH_ADDR + 0x1C0)
+#define SH_ETH_MALR     (SH_ETH_ADDR + 0x1C8)
+static struct resource sh_eth_resources[] = {
+        [0] = {
+                .start = SH_ETH_ADDR,
+                .end   = SH_ETH_ADDR + 0x1FC,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = 91,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+struct sh_eth_plat_data sh_eth_plat = {
+        .phy = 0x1f, /* SMSC LAN8700 */
+        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+        .ether_link_active_low = 1
+};
+
+static struct platform_device sh_eth_device = {
+        .name = "sh-eth",
+        .id     = 0,
+        .dev = {
+                .platform_data = &sh_eth_plat,
+        },
+        .num_resources = ARRAY_SIZE(sh_eth_resources),
+        .resource = sh_eth_resources,
+};
+
+/* USB0 host */
+void usb0_port_power(int port, int power)
+{
+        gpio_set_value(GPIO_PTB4, power);
+}
+
+static struct r8a66597_platdata usb0_host_data = {
+        .on_chip = 1,
+        .port_power = usb0_port_power,
+};
+
+static struct resource usb0_host_resources[] = {
+        [0] = {
+                .start  = 0xa4d80000,
+                .end    = 0xa4d80124 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 65,
+                .end    = 65,
+                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
+        },
+};
+
+static struct platform_device usb0_host_device = {
+        .name           = "r8a66597_hcd",
+        .id             = 0,
+        .dev = {
+                .dma_mask               = NULL,         /*  not use dma */
+                .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &usb0_host_data,
+        },
+        .num_resources  = ARRAY_SIZE(usb0_host_resources),
+        .resource       = usb0_host_resources,
+};
+
+/*
+ * USB1
+ *
+ * CN5 can use both host/function,
+ * and we can determine it by checking PTB[3]
+ *
+ * This time only USB1 host is supported.
+ */
+void usb1_port_power(int port, int power)
+{
+        if (!gpio_get_value(GPIO_PTB3)) {
+                printk(KERN_ERR "USB1 function is not supported\n");
+                return;
+        }
+
+        gpio_set_value(GPIO_PTB5, power);
+}
+
+static struct r8a66597_platdata usb1_host_data = {
+        .on_chip = 1,
+        .port_power = usb1_port_power,
+};
+
+static struct resource usb1_host_resources[] = {
+        [0] = {
+                .start  = 0xa4d90000,
+                .end    = 0xa4d90124 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 66,
+                .end    = 66,
+                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
+        },
+};
+
+static struct platform_device usb1_host_device = {
+        .name           = "r8a66597_hcd",
+        .id             = 1,
+        .dev = {
+                .dma_mask               = NULL,         /*  not use dma */
+                .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &usb1_host_data,
+        },
+        .num_resources  = ARRAY_SIZE(usb1_host_resources),
+        .resource       = usb1_host_resources,
+};
+
+/* LCDC */
+static struct sh_mobile_lcdc_info lcdc_info = {
+        .ch[0] = {
+                .interface_type = RGB18,
+                .chan = LCDC_CHAN_MAINLCD,
+                .bpp = 16,
+                .lcd_cfg = {
+                        .sync = 0, /* hsync and vsync are active low */
+                },
+                .lcd_size_cfg = { /* 7.0 inch */
+                        .width = 152,
+                        .height = 91,
+                },
+                .board_cfg = {
+                },
+        }
+};
+
+static struct resource lcdc_resources[] = {
+        [0] = {
+                .name   = "LCDC",
+                .start  = 0xfe940000,
+                .end    = 0xfe942fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 106,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device lcdc_device = {
+        .name           = "sh_mobile_lcdc_fb",
+        .num_resources  = ARRAY_SIZE(lcdc_resources),
+        .resource       = lcdc_resources,
+        .dev            = {
+                .platform_data  = &lcdc_info,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
+};
+
+/* CEU0 */
+static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
+        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
+};
+
+static struct resource ceu0_resources[] = {
+        [0] = {
+                .name   = "CEU0",
+                .start  = 0xfe910000,
+                .end    = 0xfe91009f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 52,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device ceu0_device = {
+        .name           = "sh_mobile_ceu",
+        .id             = 0, /* "ceu0" clock */
+        .num_resources  = ARRAY_SIZE(ceu0_resources),
+        .resource       = ceu0_resources,
+        .dev    = {
+                .platform_data  = &sh_mobile_ceu0_info,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU0,
+        },
+};
+
+/* CEU1 */
+static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
+        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
+};
+
+static struct resource ceu1_resources[] = {
+        [0] = {
+                .name   = "CEU1",
+                .start  = 0xfe914000,
+                .end    = 0xfe91409f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 63,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device ceu1_device = {
+        .name           = "sh_mobile_ceu",
+        .id             = 1, /* "ceu1" clock */
+        .num_resources  = ARRAY_SIZE(ceu1_resources),
+        .resource       = ceu1_resources,
+        .dev    = {
+                .platform_data  = &sh_mobile_ceu1_info,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU1,
+        },
+};
+
+/* I2C device */
+static struct i2c_board_info i2c1_devices[] = {
+        {
+                I2C_BOARD_INFO("r2025sd", 0x32),
+        },
+};
+
+/* KEYSC */
+static struct sh_keysc_info keysc_info = {
+        .mode           = SH_KEYSC_MODE_1,
+        .scan_timing    = 3,
+        .delay          = 50,
+        .kycr2_delay    = 100,
+        .keycodes       = { KEY_1, 0, 0, 0, 0,
+                            KEY_2, 0, 0, 0, 0,
+                            KEY_3, 0, 0, 0, 0,
+                            KEY_4, 0, 0, 0, 0,
+                            KEY_5, 0, 0, 0, 0,
+                            KEY_6, 0, 0, 0, 0, },
+};
+
+static struct resource keysc_resources[] = {
+        [0] = {
+                .name   = "KEYSC",
+                .start  = 0x044b0000,
+                .end    = 0x044b000f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 79,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device keysc_device = {
+        .name           = "sh_keysc",
+        .id             = 0, /* keysc0 clock */
+        .num_resources  = ARRAY_SIZE(keysc_resources),
+        .resource       = keysc_resources,
+        .dev    = {
+                .platform_data  = &keysc_info,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
+};
+
+static struct platform_device *ecovec_devices[] __initdata = {
+        &heartbeat_device,
+        &nor_flash_device,
+        &sh_eth_device,
+        &usb0_host_device,
+        &usb1_host_device, /* USB1 host support */
+        &lcdc_device,
+        &ceu0_device,
+        &ceu1_device,
+        &keysc_device,
+};
+
+#define EEPROM_ADDR 0x50
+static u8 mac_read(struct i2c_adapter *a, u8 command)
+{
+        struct i2c_msg msg[2];
+        u8 buf;
+        int ret;
+
+        msg[0].addr  = EEPROM_ADDR;
+        msg[0].flags = 0;
+        msg[0].len   = 1;
+        msg[0].buf   = &command;
+
+        msg[1].addr  = EEPROM_ADDR;
+        msg[1].flags = I2C_M_RD;
+        msg[1].len   = 1;
+        msg[1].buf   = &buf;
+
+        ret = i2c_transfer(a, msg, 2);
+        if (ret < 0) {
+                printk(KERN_ERR "error %d\n", ret);
+                buf = 0xff;
+        }
+
+        return buf;
+}
+
+#define MAC_LEN 6
+static void __init sh_eth_init(void)
+{
+        struct i2c_adapter *a = i2c_get_adapter(1);
+        struct clk *eth_clk;
+        u8 mac[MAC_LEN];
+        int i;
+
+        if (!a) {
+                pr_err("can not get I2C 1\n");
+                return;
+        }
+
+        eth_clk = clk_get(NULL, "eth0");
+        if (!eth_clk) {
+                pr_err("can not get eth0 clk\n");
+                return;
+        }
+
+        /* read MAC address frome EEPROM */
+        for (i = 0; i < MAC_LEN; i++) {
+                mac[i] = mac_read(a, 0x10 + i);
+                msleep(10);
+        }
+
+        /* clock enable */
+        clk_enable(eth_clk);
+
+        /* reset sh-eth */
+        ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
+
+        /* set MAC addr */
+        ctrl_outl((mac[0] << 24) |
+                  (mac[1] << 16) |
+                  (mac[2] <<  8) |
+                  (mac[3] <<  0), SH_ETH_MAHR);
+        ctrl_outl((mac[4] <<  8) |
+                  (mac[5] <<  0), SH_ETH_MALR);
+
+        clk_put(eth_clk);
+}
+
+#define PORT_HIZA 0xA4050158
+#define IODRIVEA  0xA405018A
+static int __init arch_setup(void)
+{
+        /* enable SCIFA0 */
+        gpio_request(GPIO_FN_SCIF0_TXD, NULL);
+        gpio_request(GPIO_FN_SCIF0_RXD, NULL);
+
+        /* enable debug LED */
+        gpio_request(GPIO_PTG0, NULL);
+        gpio_request(GPIO_PTG1, NULL);
+        gpio_request(GPIO_PTG2, NULL);
+        gpio_request(GPIO_PTG3, NULL);
+        gpio_direction_output(GPIO_PTG0, 0);
+        gpio_direction_output(GPIO_PTG1, 0);
+        gpio_direction_output(GPIO_PTG2, 0);
+        gpio_direction_output(GPIO_PTG3, 0);
+        ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
+
+        /* enable SH-Eth */
+        gpio_request(GPIO_PTA1, NULL);
+        gpio_direction_output(GPIO_PTA1, 1);
+        mdelay(20);
+
+        gpio_request(GPIO_FN_RMII_RXD0,    NULL);
+        gpio_request(GPIO_FN_RMII_RXD1,    NULL);
+        gpio_request(GPIO_FN_RMII_TXD0,    NULL);
+        gpio_request(GPIO_FN_RMII_TXD1,    NULL);
+        gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
+        gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
+        gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
+        gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
+        gpio_request(GPIO_FN_MDIO,         NULL);
+        gpio_request(GPIO_FN_MDC,          NULL);
+        gpio_request(GPIO_FN_LNKSTA,       NULL);
+
+        /* enable USB */
+        ctrl_outw(0x0000, 0xA4D80000);
+        ctrl_outw(0x0000, 0xA4D90000);
+        gpio_request(GPIO_PTB3,  NULL);
+        gpio_request(GPIO_PTB4,  NULL);
+        gpio_request(GPIO_PTB5,  NULL);
+        gpio_direction_input(GPIO_PTB3);
+        gpio_direction_output(GPIO_PTB4, 0);
+        gpio_direction_output(GPIO_PTB5, 0);
+        ctrl_outw(0x0600, 0xa40501d4);
+        ctrl_outw(0x0600, 0xa4050192);
+
+        /* enable LCDC */
+        gpio_request(GPIO_FN_LCDD23,   NULL);
+        gpio_request(GPIO_FN_LCDD22,   NULL);
+        gpio_request(GPIO_FN_LCDD21,   NULL);
+        gpio_request(GPIO_FN_LCDD20,   NULL);
+        gpio_request(GPIO_FN_LCDD19,   NULL);
+        gpio_request(GPIO_FN_LCDD18,   NULL);
+        gpio_request(GPIO_FN_LCDD17,   NULL);
+        gpio_request(GPIO_FN_LCDD16,   NULL);
+        gpio_request(GPIO_FN_LCDD15,   NULL);
+        gpio_request(GPIO_FN_LCDD14,   NULL);
+        gpio_request(GPIO_FN_LCDD13,   NULL);
+        gpio_request(GPIO_FN_LCDD12,   NULL);
+        gpio_request(GPIO_FN_LCDD11,   NULL);
+        gpio_request(GPIO_FN_LCDD10,   NULL);
+        gpio_request(GPIO_FN_LCDD9,    NULL);
+        gpio_request(GPIO_FN_LCDD8,    NULL);
+        gpio_request(GPIO_FN_LCDD7,    NULL);
+        gpio_request(GPIO_FN_LCDD6,    NULL);
+        gpio_request(GPIO_FN_LCDD5,    NULL);
+        gpio_request(GPIO_FN_LCDD4,    NULL);
+        gpio_request(GPIO_FN_LCDD3,    NULL);
+        gpio_request(GPIO_FN_LCDD2,    NULL);
+        gpio_request(GPIO_FN_LCDD1,    NULL);
+        gpio_request(GPIO_FN_LCDD0,    NULL);
+        gpio_request(GPIO_FN_LCDDISP,  NULL);
+        gpio_request(GPIO_FN_LCDHSYN,  NULL);
+        gpio_request(GPIO_FN_LCDDCK,   NULL);
+        gpio_request(GPIO_FN_LCDVSYN,  NULL);
+        gpio_request(GPIO_FN_LCDDON,   NULL);
+        gpio_request(GPIO_FN_LCDLCLK,  NULL);
+        ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
+
+        gpio_request(GPIO_PTE6, NULL);
+        gpio_request(GPIO_PTU1, NULL);
+        gpio_request(GPIO_PTR1, NULL);
+        gpio_request(GPIO_PTA2, NULL);
+        gpio_direction_input(GPIO_PTE6);
+        gpio_direction_output(GPIO_PTU1, 0);
+        gpio_direction_output(GPIO_PTR1, 0);
+        gpio_direction_output(GPIO_PTA2, 0);
+
+        /* I/O buffer drive ability is low */
+        ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
+
+        if (gpio_get_value(GPIO_PTE6)) {
+                /* DVI */
+                lcdc_info.clock_source                  = LCDC_CLK_EXTERNAL;
+                lcdc_info.ch[0].clock_divider           = 1,
+                lcdc_info.ch[0].lcd_cfg.name            = "DVI";
+                lcdc_info.ch[0].lcd_cfg.xres            = 1280;
+                lcdc_info.ch[0].lcd_cfg.yres            = 720;
+                lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
+                lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
+                lcdc_info.ch[0].lcd_cfg.hsync_len       = 40;
+                lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
+                lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
+                lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
+
+                gpio_set_value(GPIO_PTA2, 1);
+                gpio_set_value(GPIO_PTU1, 1);
+        } else {
+                /* Panel */
+
+                lcdc_info.clock_source                  = LCDC_CLK_PERIPHERAL;
+                lcdc_info.ch[0].clock_divider           = 2,
+                lcdc_info.ch[0].lcd_cfg.name            = "Panel";
+                lcdc_info.ch[0].lcd_cfg.xres            = 800;
+                lcdc_info.ch[0].lcd_cfg.yres            = 480;
+                lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
+                lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
+                lcdc_info.ch[0].lcd_cfg.hsync_len       = 70;
+                lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
+                lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
+                lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
+
+                gpio_set_value(GPIO_PTR1, 1);
+
+                /* FIXME
+                 *
+                 * LCDDON control is needed for Panel,
+                 * but current sh_mobile_lcdc driver doesn't control it.
+                 * It is temporary correspondence
+                 */
+                gpio_request(GPIO_PTF4, NULL);
+                gpio_direction_output(GPIO_PTF4, 1);
+        }
+
+        /* enable CEU0 */
+        gpio_request(GPIO_FN_VIO0_D15, NULL);
+        gpio_request(GPIO_FN_VIO0_D14, NULL);
+        gpio_request(GPIO_FN_VIO0_D13, NULL);
+        gpio_request(GPIO_FN_VIO0_D12, NULL);
+        gpio_request(GPIO_FN_VIO0_D11, NULL);
+        gpio_request(GPIO_FN_VIO0_D10, NULL);
+        gpio_request(GPIO_FN_VIO0_D9,  NULL);
+        gpio_request(GPIO_FN_VIO0_D8,  NULL);
+        gpio_request(GPIO_FN_VIO0_D7,  NULL);
+        gpio_request(GPIO_FN_VIO0_D6,  NULL);
+        gpio_request(GPIO_FN_VIO0_D5,  NULL);
+        gpio_request(GPIO_FN_VIO0_D4,  NULL);
+        gpio_request(GPIO_FN_VIO0_D3,  NULL);
+        gpio_request(GPIO_FN_VIO0_D2,  NULL);
+        gpio_request(GPIO_FN_VIO0_D1,  NULL);
+        gpio_request(GPIO_FN_VIO0_D0,  NULL);
+        gpio_request(GPIO_FN_VIO0_VD,  NULL);
+        gpio_request(GPIO_FN_VIO0_CLK, NULL);
+        gpio_request(GPIO_FN_VIO0_FLD, NULL);
+        gpio_request(GPIO_FN_VIO0_HD,  NULL);
+        platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
+
+        /* enable CEU1 */
+        gpio_request(GPIO_FN_VIO1_D7,  NULL);
+        gpio_request(GPIO_FN_VIO1_D6,  NULL);
+        gpio_request(GPIO_FN_VIO1_D5,  NULL);
+        gpio_request(GPIO_FN_VIO1_D4,  NULL);
+        gpio_request(GPIO_FN_VIO1_D3,  NULL);
+        gpio_request(GPIO_FN_VIO1_D2,  NULL);
+        gpio_request(GPIO_FN_VIO1_D1,  NULL);
+        gpio_request(GPIO_FN_VIO1_D0,  NULL);
+        gpio_request(GPIO_FN_VIO1_FLD, NULL);
+        gpio_request(GPIO_FN_VIO1_HD,  NULL);
+        gpio_request(GPIO_FN_VIO1_VD,  NULL);
+        gpio_request(GPIO_FN_VIO1_CLK, NULL);
+        platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
+
+        /* enable KEYSC */
+        gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
+        gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
+        gpio_request(GPIO_FN_KEYOUT3,     NULL);
+        gpio_request(GPIO_FN_KEYOUT2,     NULL);
+        gpio_request(GPIO_FN_KEYOUT1,     NULL);
+        gpio_request(GPIO_FN_KEYOUT0,     NULL);
+        gpio_request(GPIO_FN_KEYIN0,      NULL);
+
+        /* enable user debug switch */
+        gpio_request(GPIO_PTR0, NULL);
+        gpio_request(GPIO_PTR4, NULL);
+        gpio_request(GPIO_PTR5, NULL);
+        gpio_request(GPIO_PTR6, NULL);
+        gpio_direction_input(GPIO_PTR0);
+        gpio_direction_input(GPIO_PTR4);
+        gpio_direction_input(GPIO_PTR5);
+        gpio_direction_input(GPIO_PTR6);
+
+        /* enable I2C device */
+        i2c_register_board_info(1, i2c1_devices,
+                                ARRAY_SIZE(i2c1_devices));
+
+        return platform_add_devices(ecovec_devices,
+                                    ARRAY_SIZE(ecovec_devices));
+}
+arch_initcall(arch_setup);
+
+static int __init devices_setup(void)
+{
+        sh_eth_init();
+        return 0;
+}
+device_initcall(devices_setup);
+
+
+static struct sh_machine_vector mv_ecovec __initmv = {
+        .mv_name        = "R0P7724 (EcoVec)",
+};
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 1639f8915000..566e69d8d729 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -22,6 +22,7 @@
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/usb/r8a66597.h>
+#include <linux/usb/m66592.h>
 #include <net/ax88796.h>
 #include <asm/machvec.h>
 #include <mach/highlander.h>
@@ -60,6 +61,11 @@ static struct platform_device r8a66597_usb_host_device = {
         .resource       = r8a66597_usb_host_resources,
 };
 
+static struct m66592_platdata usbf_platdata = {
+        .xtal = M66592_PLATDATA_XTAL_24MHZ,
+        .vif = 1,
+};
+
 static struct resource m66592_usb_peripheral_resources[] = {
         [0] = {
                 .name   = "m66592_udc",
@@ -81,6 +87,7 @@ static struct platform_device m66592_usb_peripheral_device = {
         .dev = {
                 .dma_mask               = NULL,         /* don't use dma */
                 .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &usbf_platdata,
         },
         .num_resources  = ARRAY_SIZE(m66592_usb_peripheral_resources),
         .resource       = m66592_usb_peripheral_resources,
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile
new file mode 100644
index 000000000000..5d5867826e3b
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/Makefile
@@ -0,0 +1,2 @@
+obj-y    := setup.o
+obj-$(CONFIG_FB_SH_MOBILE_LCDC) +=  lcd_wqvga.o
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
new file mode 100644
index 000000000000..8ccb1cc8b589
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
@@ -0,0 +1,332 @@
+/*
+ * KFR2R09 LCD panel support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * Register settings based on the out-of-tree t33fb.c driver
+ * Copyright (C) 2008 Lineo Solutions, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <video/sh_mobile_lcdc.h>
+#include <mach/kfr2r09.h>
+#include <cpu/sh7724.h>
+
+/* The on-board LCD module is a Hitachi TX07D34VM0AAA. This module is made
+ * up of a 240x400 LCD hooked up to a R61517 driver IC. The driver IC is
+ * communicating with the main port of the LCDC using an 18-bit SYS interface.
+ *
+ * The device code for this LCD module is 0x01221517.
+ */
+
+static const unsigned char data_frame_if[] = {
+        0x02, /* WEMODE: 1=cont, 0=one-shot */
+        0x00, 0x00,
+        0x00, /* EPF, DFM */
+        0x02, /* RIM[1] : 1 (18bpp) */
+};
+
+static const unsigned char data_panel[] = {
+        0x0b,
+        0x63, /* 400 lines */
+        0x04, 0x00, 0x00, 0x04, 0x11, 0x00, 0x00,
+};
+
+static const unsigned char data_timing[] = {
+        0x00, 0x00, 0x13, 0x08, 0x08,
+};
+
+static const unsigned char data_timing_src[] = {
+        0x11, 0x01, 0x00, 0x01,
+};
+
+static const unsigned char data_gamma[] = {
+        0x01, 0x02, 0x08, 0x23, 0x03, 0x0c, 0x00, 0x06, 0x00, 0x00,
+        0x01, 0x00, 0x0c, 0x23, 0x03, 0x08, 0x02, 0x06, 0x00, 0x00,
+};
+
+static const unsigned char data_power[] = {
+        0x07, 0xc5, 0xdc, 0x02, 0x33, 0x0a,
+};
+
+static unsigned long read_reg(void *sohandle,
+                              struct sh_mobile_lcdc_sys_bus_ops *so)
+{
+        return so->read_data(sohandle);
+}
+
+static void write_reg(void *sohandle,
+                      struct sh_mobile_lcdc_sys_bus_ops *so,
+                      int i, unsigned long v)
+{
+        if (i)
+                so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */
+        else
+                so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */
+}
+
+static void write_data(void *sohandle,
+                       struct sh_mobile_lcdc_sys_bus_ops *so,
+                       unsigned char const *data, int no_data)
+{
+        int i;
+
+        for (i = 0; i < no_data; i++)
+                write_reg(sohandle, so, 1, data[i]);
+}
+
+static unsigned long read_device_code(void *sohandle,
+                                      struct sh_mobile_lcdc_sys_bus_ops *so)
+{
+        unsigned long device_code;
+
+        /* access protect OFF */
+        write_reg(sohandle, so, 0, 0xb0);
+        write_reg(sohandle, so, 1, 0x00);
+
+        /* deep standby OFF */
+        write_reg(sohandle, so, 0, 0xb1);
+        write_reg(sohandle, so, 1, 0x00);
+
+        /* device code command */
+        write_reg(sohandle, so, 0, 0xbf);
+        mdelay(50);
+
+        /* dummy read */
+        read_reg(sohandle, so);
+
+        /* read device code */
+        device_code = ((read_reg(sohandle, so) & 0xff) << 24);
+        device_code |= ((read_reg(sohandle, so) & 0xff) << 16);
+        device_code |= ((read_reg(sohandle, so) & 0xff) << 8);
+        device_code |= (read_reg(sohandle, so) & 0xff);
+
+        return device_code;
+}
+
+static void write_memory_start(void *sohandle,
+                               struct sh_mobile_lcdc_sys_bus_ops *so)
+{
+        write_reg(sohandle, so, 0, 0x2c);
+}
+
+static void clear_memory(void *sohandle,
+                         struct sh_mobile_lcdc_sys_bus_ops *so)
+{
+        int i;
+
+        /* write start */
+        write_memory_start(sohandle, so);
+
+        /* paint it black */
+        for (i = 0; i < (240 * 400); i++)
+                write_reg(sohandle, so, 1, 0x00);
+}
+
+static void display_on(void *sohandle,
+                       struct sh_mobile_lcdc_sys_bus_ops *so)
+{
+        /* access protect off */
+        write_reg(sohandle, so, 0, 0xb0);
+        write_reg(sohandle, so, 1, 0x00);
+
+        /* exit deep standby mode */
+        write_reg(sohandle, so, 0, 0xb1);
+        write_reg(sohandle, so, 1, 0x00);
+
+        /* frame memory I/F */
+        write_reg(sohandle, so, 0, 0xb3);
+        write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if));
+
+        /* display mode and frame memory write mode */
+        write_reg(sohandle, so, 0, 0xb4);
+        write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */
+
+        /* panel */
+        write_reg(sohandle, so, 0, 0xc0);
+        write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel));
+
+        /* timing (normal) */
+        write_reg(sohandle, so, 0, 0xc1);
+        write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
+
+        /* timing (partial) */
+        write_reg(sohandle, so, 0, 0xc2);
+        write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
+
+        /* timing (idle) */
+        write_reg(sohandle, so, 0, 0xc3);
+        write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
+
+        /* timing (source/VCOM/gate driving) */
+        write_reg(sohandle, so, 0, 0xc4);
+        write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src));
+
+        /* gamma (red) */
+        write_reg(sohandle, so, 0, 0xc8);
+        write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
+
+        /* gamma (green) */
+        write_reg(sohandle, so, 0, 0xc9);
+        write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
+
+        /* gamma (blue) */
+        write_reg(sohandle, so, 0, 0xca);
+        write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
+
+        /* power (common) */
+        write_reg(sohandle, so, 0, 0xd0);
+        write_data(sohandle, so, data_power, ARRAY_SIZE(data_power));
+
+        /* VCOM */
+        write_reg(sohandle, so, 0, 0xd1);
+        write_reg(sohandle, so, 1, 0x00);
+        write_reg(sohandle, so, 1, 0x0f);
+        write_reg(sohandle, so, 1, 0x02);
+
+        /* power (normal) */
+        write_reg(sohandle, so, 0, 0xd2);
+        write_reg(sohandle, so, 1, 0x63);
+        write_reg(sohandle, so, 1, 0x24);
+
+        /* power (partial) */
+        write_reg(sohandle, so, 0, 0xd3);
+        write_reg(sohandle, so, 1, 0x63);
+        write_reg(sohandle, so, 1, 0x24);
+
+        /* power (idle) */
+        write_reg(sohandle, so, 0, 0xd4);
+        write_reg(sohandle, so, 1, 0x63);
+        write_reg(sohandle, so, 1, 0x24);
+
+        write_reg(sohandle, so, 0, 0xd8);
+        write_reg(sohandle, so, 1, 0x77);
+        write_reg(sohandle, so, 1, 0x77);
+
+        /* TE signal */
+        write_reg(sohandle, so, 0, 0x35);
+        write_reg(sohandle, so, 1, 0x00);
+
+        /* TE signal line */
+        write_reg(sohandle, so, 0, 0x44);
+        write_reg(sohandle, so, 1, 0x00);
+        write_reg(sohandle, so, 1, 0x00);
+
+        /* column address */
+        write_reg(sohandle, so, 0, 0x2a);
+        write_reg(sohandle, so, 1, 0x00);
+        write_reg(sohandle, so, 1, 0x00);
+        write_reg(sohandle, so, 1, 0x00);
+        write_reg(sohandle, so, 1, 0xef);
+
+        /* page address */
+        write_reg(sohandle, so, 0, 0x2b);
+        write_reg(sohandle, so, 1, 0x00);
+        write_reg(sohandle, so, 1, 0x00);
+        write_reg(sohandle, so, 1, 0x01);
+        write_reg(sohandle, so, 1, 0x8f);
+
+        /* exit sleep mode */
+        write_reg(sohandle, so, 0, 0x11);
+
+        mdelay(120);
+
+        /* clear vram */
+        clear_memory(sohandle, so);
+
+        /* display ON */
+        write_reg(sohandle, so, 0, 0x29);
+        mdelay(1);
+
+        write_memory_start(sohandle, so);
+}
+
+int kfr2r09_lcd_setup(void *board_data, void *sohandle,
+                      struct sh_mobile_lcdc_sys_bus_ops *so)
+{
+        /* power on */
+        gpio_set_value(GPIO_PTF4, 0);  /* PROTECT/ -> L */
+        gpio_set_value(GPIO_PTE4, 0);  /* LCD_RST/ -> L */
+        gpio_set_value(GPIO_PTF4, 1);  /* PROTECT/ -> H */
+        udelay(1100);
+        gpio_set_value(GPIO_PTE4, 1);  /* LCD_RST/ -> H */
+        udelay(10);
+        gpio_set_value(GPIO_PTF4, 0);  /* PROTECT/ -> L */
+        mdelay(20);
+
+        if (read_device_code(sohandle, so) != 0x01221517)
+                return -ENODEV;
+
+        pr_info("KFR2R09 WQVGA LCD Module detected.\n");
+
+        display_on(sohandle, so);
+        return 0;
+}
+
+#define CTRL_CKSW       0x10
+#define CTRL_C10        0x20
+#define CTRL_CPSW       0x80
+#define MAIN_MLED4      0x40
+#define MAIN_MSW        0x80
+
+static int kfr2r09_lcd_backlight(int on)
+{
+        struct i2c_adapter *a;
+        struct i2c_msg msg;
+        unsigned char buf[2];
+        int ret;
+
+        a = i2c_get_adapter(0);
+        if (!a)
+                return -ENODEV;
+
+        buf[0] = 0x00;
+        if (on)
+                buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW;
+        else
+                buf[1] = 0;
+
+        msg.addr = 0x75;
+        msg.buf = buf;
+        msg.len = 2;
+        msg.flags = 0;
+        ret = i2c_transfer(a, &msg, 1);
+        if (ret != 1)
+                return -ENODEV;
+
+        buf[0] = 0x01;
+        if (on)
+                buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c;
+        else
+                buf[1] = 0;
+
+        msg.addr = 0x75;
+        msg.buf = buf;
+        msg.len = 2;
+        msg.flags = 0;
+        ret = i2c_transfer(a, &msg, 1);
+        if (ret != 1)
+                return -ENODEV;
+
+        return 0;
+}
+
+void kfr2r09_lcd_on(void *board_data)
+{
+        kfr2r09_lcd_backlight(1);
+}
+
+void kfr2r09_lcd_off(void *board_data)
+{
+        kfr2r09_lcd_backlight(0);
+}
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
new file mode 100644
index 000000000000..c08d33fe2104
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -0,0 +1,386 @@
+/*
+ * KFR2R09 board support code
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/onenand.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <linux/i2c.h>
+#include <linux/usb/r8a66597.h>
+#include <video/sh_mobile_lcdc.h>
+#include <asm/clock.h>
+#include <asm/machvec.h>
+#include <asm/io.h>
+#include <asm/sh_keysc.h>
+#include <cpu/sh7724.h>
+#include <mach/kfr2r09.h>
+
+static struct mtd_partition kfr2r09_nor_flash_partitions[] =
+{
+        {
+                .name = "boot",
+                .offset = 0,
+                .size = (4 * 1024 * 1024),
+                .mask_flags = MTD_WRITEABLE,    /* Read-only */
+        },
+        {
+                .name = "other",
+                .offset = MTDPART_OFS_APPEND,
+                .size = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data kfr2r09_nor_flash_data = {
+        .width          = 2,
+        .parts          = kfr2r09_nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(kfr2r09_nor_flash_partitions),
+};
+
+static struct resource kfr2r09_nor_flash_resources[] = {
+        [0] = {
+                .name           = "NOR Flash",
+                .start          = 0x00000000,
+                .end            = 0x03ffffff,
+                .flags          = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device kfr2r09_nor_flash_device = {
+        .name           = "physmap-flash",
+        .resource       = kfr2r09_nor_flash_resources,
+        .num_resources  = ARRAY_SIZE(kfr2r09_nor_flash_resources),
+        .dev            = {
+                .platform_data = &kfr2r09_nor_flash_data,
+        },
+};
+
+static struct resource kfr2r09_nand_flash_resources[] = {
+        [0] = {
+                .name           = "NAND Flash",
+                .start          = 0x10000000,
+                .end            = 0x1001ffff,
+                .flags          = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device kfr2r09_nand_flash_device = {
+        .name           = "onenand-flash",
+        .resource       = kfr2r09_nand_flash_resources,
+        .num_resources  = ARRAY_SIZE(kfr2r09_nand_flash_resources),
+};
+
+static struct sh_keysc_info kfr2r09_sh_keysc_info = {
+        .mode = SH_KEYSC_MODE_1, /* KEYOUT0->4, KEYIN0->4 */
+        .scan_timing = 3,
+        .delay = 10,
+        .keycodes = {
+                KEY_PHONE, KEY_CLEAR, KEY_MAIL, KEY_WWW, KEY_ENTER,
+                KEY_1, KEY_2, KEY_3, 0, KEY_UP,
+                KEY_4, KEY_5, KEY_6, 0, KEY_LEFT,
+                KEY_7, KEY_8, KEY_9, KEY_PROG1, KEY_RIGHT,
+                KEY_S, KEY_0, KEY_P, KEY_PROG2, KEY_DOWN,
+                0, 0, 0, 0, 0
+        },
+};
+
+static struct resource kfr2r09_sh_keysc_resources[] = {
+        [0] = {
+                .name   = "KEYSC",
+                .start  = 0x044b0000,
+                .end    = 0x044b000f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 79,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device kfr2r09_sh_keysc_device = {
+        .name           = "sh_keysc",
+        .id             = 0, /* "keysc0" clock */
+        .num_resources  = ARRAY_SIZE(kfr2r09_sh_keysc_resources),
+        .resource       = kfr2r09_sh_keysc_resources,
+        .dev    = {
+                .platform_data  = &kfr2r09_sh_keysc_info,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
+};
+
+static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
+        .clock_source = LCDC_CLK_BUS,
+        .ch[0] = {
+                .chan = LCDC_CHAN_MAINLCD,
+                .bpp = 16,
+                .interface_type = SYS18,
+                .clock_divider = 6,
+                .flags = LCDC_FLAGS_DWPOL,
+                .lcd_cfg = {
+                        .name = "TX07D34VM0AAA",
+                        .xres = 240,
+                        .yres = 400,
+                        .left_margin = 0,
+                        .right_margin = 16,
+                        .hsync_len = 8,
+                        .upper_margin = 0,
+                        .lower_margin = 1,
+                        .vsync_len = 1,
+                        .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                },
+                .lcd_size_cfg = {
+                        .width = 35,
+                        .height = 58,
+                },
+                .board_cfg = {
+                        .setup_sys = kfr2r09_lcd_setup,
+                        .display_on = kfr2r09_lcd_on,
+                        .display_off = kfr2r09_lcd_off,
+                },
+                .sys_bus_cfg = {
+                        .ldmt2r = 0x07010904,
+                        .ldmt3r = 0x14012914,
+                        /* set 1s delay to encourage fsync() */
+                        .deferred_io_msec = 1000,
+                },
+        }
+};
+
+static struct resource kfr2r09_sh_lcdc_resources[] = {
+        [0] = {
+                .name   = "LCDC",
+                .start  = 0xfe940000, /* P4-only space */
+                .end    = 0xfe942fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 106,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device kfr2r09_sh_lcdc_device = {
+        .name           = "sh_mobile_lcdc_fb",
+        .num_resources  = ARRAY_SIZE(kfr2r09_sh_lcdc_resources),
+        .resource       = kfr2r09_sh_lcdc_resources,
+        .dev    = {
+                .platform_data  = &kfr2r09_sh_lcdc_info,
+        },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
+};
+
+static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
+        .on_chip = 1,
+};
+
+static struct resource kfr2r09_usb0_gadget_resources[] = {
+        [0] = {
+                .start  = 0x04d80000,
+                .end    = 0x04d80123,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 65,
+                .end    = 65,
+                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
+        },
+};
+
+static struct platform_device kfr2r09_usb0_gadget_device = {
+        .name           = "r8a66597_udc",
+        .id             = 0,
+        .dev = {
+                .dma_mask               = NULL,         /*  not use dma */
+                .coherent_dma_mask      = 0xffffffff,
+                .platform_data  = &kfr2r09_usb0_gadget_data,
+        },
+        .num_resources  = ARRAY_SIZE(kfr2r09_usb0_gadget_resources),
+        .resource       = kfr2r09_usb0_gadget_resources,
+};
+
+static struct platform_device *kfr2r09_devices[] __initdata = {
+        &kfr2r09_nor_flash_device,
+        &kfr2r09_nand_flash_device,
+        &kfr2r09_sh_keysc_device,
+        &kfr2r09_sh_lcdc_device,
+};
+
+#define BSC_CS0BCR 0xfec10004
+#define BSC_CS0WCR 0xfec10024
+#define BSC_CS4BCR 0xfec10010
+#define BSC_CS4WCR 0xfec10030
+#define PORT_MSELCRB 0xa4050182
+
+#ifdef CONFIG_I2C
+static int kfr2r09_usb0_gadget_i2c_setup(void)
+{
+        struct i2c_adapter *a;
+        struct i2c_msg msg;
+        unsigned char buf[2];
+        int ret;
+
+        a = i2c_get_adapter(0);
+        if (!a)
+                return -ENODEV;
+
+        /* set bit 1 (the second bit) of chip at 0x09, register 0x13 */
+        buf[0] = 0x13;
+        msg.addr = 0x09;
+        msg.buf = buf;
+        msg.len = 1;
+        msg.flags = 0;
+        ret = i2c_transfer(a, &msg, 1);
+        if (ret != 1)
+                return -ENODEV;
+
+        buf[0] = 0;
+        msg.addr = 0x09;
+        msg.buf = buf;
+        msg.len = 1;
+        msg.flags = I2C_M_RD;
+        ret = i2c_transfer(a, &msg, 1);
+        if (ret != 1)
+                return -ENODEV;
+
+        buf[1] = buf[0] | (1 << 1);
+        buf[0] = 0x13;
+        msg.addr = 0x09;
+        msg.buf = buf;
+        msg.len = 2;
+        msg.flags = 0;
+        ret = i2c_transfer(a, &msg, 1);
+        if (ret != 1)
+                return -ENODEV;
+
+        return 0;
+}
+#else
+static int kfr2r09_usb0_gadget_i2c_setup(void)
+{
+        return -ENODEV;
+}
+#endif
+
+static int kfr2r09_usb0_gadget_setup(void)
+{
+        int plugged_in;
+
+        gpio_request(GPIO_PTN4, NULL); /* USB_DET */
+        gpio_direction_input(GPIO_PTN4);
+        plugged_in = gpio_get_value(GPIO_PTN4);
+        if (!plugged_in)
+                return -ENODEV; /* no cable plugged in */
+
+        if (kfr2r09_usb0_gadget_i2c_setup() != 0)
+                return -ENODEV; /* unable to configure using i2c */
+
+        ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
+        gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
+        gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
+        gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
+        msleep(20); /* wait 20ms to let the clock settle */
+        clk_enable(clk_get(NULL, "usb0"));
+        ctrl_outw(0x0600, 0xa40501d4);
+
+        return 0;
+}
+
+static int __init kfr2r09_devices_setup(void)
+{
+        /* enable SCIF1 serial port for YC401 console support */
+        gpio_request(GPIO_FN_SCIF1_RXD, NULL);
+        gpio_request(GPIO_FN_SCIF1_TXD, NULL);
+
+        /* setup NOR flash at CS0 */
+        ctrl_outl(0x36db0400, BSC_CS0BCR);
+        ctrl_outl(0x00000500, BSC_CS0WCR);
+
+        /* setup NAND flash at CS4 */
+        ctrl_outl(0x36db0400, BSC_CS4BCR);
+        ctrl_outl(0x00000500, BSC_CS4WCR);
+
+        /* setup KEYSC pins */
+        gpio_request(GPIO_FN_KEYOUT0, NULL);
+        gpio_request(GPIO_FN_KEYOUT1, NULL);
+        gpio_request(GPIO_FN_KEYOUT2, NULL);
+        gpio_request(GPIO_FN_KEYOUT3, NULL);
+        gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
+        gpio_request(GPIO_FN_KEYIN0, NULL);
+        gpio_request(GPIO_FN_KEYIN1, NULL);
+        gpio_request(GPIO_FN_KEYIN2, NULL);
+        gpio_request(GPIO_FN_KEYIN3, NULL);
+        gpio_request(GPIO_FN_KEYIN4, NULL);
+        gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
+
+        /* setup LCDC pins for SYS panel */
+        gpio_request(GPIO_FN_LCDD17, NULL);
+        gpio_request(GPIO_FN_LCDD16, NULL);
+        gpio_request(GPIO_FN_LCDD15, NULL);
+        gpio_request(GPIO_FN_LCDD14, NULL);
+        gpio_request(GPIO_FN_LCDD13, NULL);
+        gpio_request(GPIO_FN_LCDD12, NULL);
+        gpio_request(GPIO_FN_LCDD11, NULL);
+        gpio_request(GPIO_FN_LCDD10, NULL);
+        gpio_request(GPIO_FN_LCDD9, NULL);
+        gpio_request(GPIO_FN_LCDD8, NULL);
+        gpio_request(GPIO_FN_LCDD7, NULL);
+        gpio_request(GPIO_FN_LCDD6, NULL);
+        gpio_request(GPIO_FN_LCDD5, NULL);
+        gpio_request(GPIO_FN_LCDD4, NULL);
+        gpio_request(GPIO_FN_LCDD3, NULL);
+        gpio_request(GPIO_FN_LCDD2, NULL);
+        gpio_request(GPIO_FN_LCDD1, NULL);
+        gpio_request(GPIO_FN_LCDD0, NULL);
+        gpio_request(GPIO_FN_LCDRS, NULL); /* LCD_RS */
+        gpio_request(GPIO_FN_LCDCS, NULL); /* LCD_CS/ */
+        gpio_request(GPIO_FN_LCDRD, NULL); /* LCD_RD/ */
+        gpio_request(GPIO_FN_LCDWR, NULL); /* LCD_WR/ */
+        gpio_request(GPIO_FN_LCDVSYN, NULL); /* LCD_VSYNC */
+        gpio_request(GPIO_PTE4, NULL); /* LCD_RST/ */
+        gpio_direction_output(GPIO_PTE4, 1);
+        gpio_request(GPIO_PTF4, NULL); /* PROTECT/ */
+        gpio_direction_output(GPIO_PTF4, 1);
+        gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */
+        gpio_direction_output(GPIO_PTU0, 1);
+
+        /* setup USB function */
+        if (kfr2r09_usb0_gadget_setup() == 0)
+                platform_device_register(&kfr2r09_usb0_gadget_device);
+
+        return platform_add_devices(kfr2r09_devices,
+                                    ARRAY_SIZE(kfr2r09_devices));
+}
+device_initcall(kfr2r09_devices_setup);
+
+/* Return the board specific boot mode pin configuration */
+static int kfr2r09_mode_pins(void)
+{
+        /* MD0=1, MD1=1, MD2=0: Clock Mode 3
+         * MD3=0: 16-bit Area0 Bus Width
+         * MD5=1: Little Endian
+         * MD8=1: Test Mode Disabled
+         */
+        return MODE_PIN0 | MODE_PIN1 | MODE_PIN5 | MODE_PIN8;
+}
+
+/*
+ * The Machine Vector
+ */
+static struct sh_machine_vector mv_kfr2r09 __initmv = {
+        .mv_name                = "kfr2r09",
+        .mv_mode_pins           = kfr2r09_mode_pins,
+};
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index f9b2e4df35b9..6ed1fd32369e 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -98,6 +98,9 @@ static struct platform_device sh_keysc_device = {
         .dev    = {
                 .platform_data  = &sh_keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 static struct mtd_partition migor_nor_flash_partitions[] =
@@ -276,7 +279,7 @@ static struct resource migor_lcdc_resources[] = {
         [0] = {
                 .name   = "LCDC",
                 .start  = 0xfe940000, /* P4-only space */
-                .end    = 0xfe941fff,
+                .end    = 0xfe942fff,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -292,6 +295,9 @@ static struct platform_device migor_lcdc_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 static struct clk *camera_clk;
@@ -379,6 +385,9 @@ static struct platform_device migor_ceu_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU,
+        },
 };
 
 struct spi_gpio_platform_data sdcard_cn9_platform_data = {
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index af84904ed86f..36374078e521 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -22,6 +22,7 @@
 #include <asm/io.h>
 #include <asm/heartbeat.h>
 #include <asm/sh_keysc.h>
+#include <cpu/sh7722.h>
 
 /* Heartbeat */
 static struct heartbeat_data heartbeat_data = {
@@ -137,6 +138,9 @@ static struct platform_device sh_keysc_device = {
         .dev    = {
                 .platform_data  = &sh_keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 static struct platform_device *se7722_devices[] __initdata = {
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 15456a0773bf..e78c3be8ad2f 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -22,6 +22,7 @@
 #include <linux/usb/r8a66597.h>
 #include <video/sh_mobile_lcdc.h>
 #include <media/sh_mobile_ceu.h>
+#include <sound/sh_fsi.h>
 #include <asm/io.h>
 #include <asm/heartbeat.h>
 #include <asm/sh_eth.h>
@@ -39,7 +40,15 @@
  * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
  *                          1 : Digital monitor
  *                      b = 0 : VGA
- *                          1 : SVGA
+ *                          1 : 720p
+ */
+
+/*
+ * about 720p
+ *
+ * When you use 1280 x 720 lcdc output,
+ * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
+ * and change SW41 to use 720p
  */
 
 /* Heartbeat */
@@ -158,7 +167,7 @@ static struct resource lcdc_resources[] = {
         [0] = {
                 .name   = "LCDC",
                 .start  = 0xfe940000,
-                .end    = 0xfe941fff,
+                .end    = 0xfe942fff,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -174,6 +183,9 @@ static struct platform_device lcdc_device = {
         .dev            = {
                 .platform_data  = &lcdc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_LCDC,
+        },
 };
 
 /* CEU0 */
@@ -205,6 +217,9 @@ static struct platform_device ceu0_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu0_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU0,
+        },
 };
 
 /* CEU1 */
@@ -236,6 +251,68 @@ static struct platform_device ceu1_device = {
         .dev    = {
                 .platform_data  = &sh_mobile_ceu1_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_CEU1,
+        },
+};
+
+/* FSI */
+/*
+ * FSI-A use external clock which came from ak464x.
+ * So, we should change parent of fsi
+ */
+#define FCLKACR         0xa4150008
+static void fsimck_init(struct clk *clk)
+{
+        u32 status = ctrl_inl(clk->enable_reg);
+
+        /* use external clock */
+        status &= ~0x000000ff;
+        status |= 0x00000080;
+        ctrl_outl(status, clk->enable_reg);
+}
+
+static struct clk_ops fsimck_clk_ops = {
+        .init = fsimck_init,
+};
+
+static struct clk fsimcka_clk = {
+        .name           = "fsimcka_clk",
+        .id             = -1,
+        .ops            = &fsimck_clk_ops,
+        .enable_reg     = (void __iomem *)FCLKACR,
+        .rate           = 0, /* unknown */
+};
+
+struct sh_fsi_platform_info fsi_info = {
+        .porta_flags = SH_FSI_BRS_INV |
+                       SH_FSI_OUT_SLAVE_MODE |
+                       SH_FSI_IN_SLAVE_MODE |
+                       SH_FSI_OFMT(PCM) |
+                       SH_FSI_IFMT(PCM),
+};
+
+static struct resource fsi_resources[] = {
+        [0] = {
+                .name   = "FSI",
+                .start  = 0xFE3C0000,
+                .end    = 0xFE3C021d,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 108,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device fsi_device = {
+        .name           = "sh_fsi",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(fsi_resources),
+        .resource       = fsi_resources,
+        .dev    = {
+                .platform_data  = &fsi_info,
+        },
 };
 
 /* KEYSC in SoC (Needs SW33-2 set to ON) */
@@ -274,6 +351,9 @@ static struct platform_device keysc_device = {
         .dev    = {
                 .platform_data  = &keysc_info,
         },
+        .archdata = {
+                .hwblk_id = HWBLK_KEYSC,
+        },
 };
 
 /* SH Eth */
@@ -302,15 +382,19 @@ static struct platform_device sh_eth_device = {
         },
         .num_resources = ARRAY_SIZE(sh_eth_resources),
         .resource = sh_eth_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_ETHER,
+        },
 };
 
 static struct r8a66597_platdata sh7724_usb0_host_data = {
+        .on_chip = 1,
 };
 
 static struct resource sh7724_usb0_host_resources[] = {
         [0] = {
                 .start  = 0xa4d80000,
-                .end    = 0xa4d800ff,
+                .end    = 0xa4d80124 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -330,6 +414,38 @@ static struct platform_device sh7724_usb0_host_device = {
         },
         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
         .resource       = sh7724_usb0_host_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_USB0,
+        },
+};
+
+static struct r8a66597_platdata sh7724_usb1_gadget_data = {
+        .on_chip = 1,
+};
+
+static struct resource sh7724_usb1_gadget_resources[] = {
+        [0] = {
+                .start  = 0xa4d90000,
+                .end    = 0xa4d90123,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 66,
+                .end    = 66,
+                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
+        },
+};
+
+static struct platform_device sh7724_usb1_gadget_device = {
+        .name           = "r8a66597_udc",
+        .id             = 1, /* USB1 */
+        .dev = {
+                .dma_mask               = NULL,         /*  not use dma */
+                .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &sh7724_usb1_gadget_data,
+        },
+        .num_resources  = ARRAY_SIZE(sh7724_usb1_gadget_resources),
+        .resource       = sh7724_usb1_gadget_resources,
 };
 
 static struct platform_device *ms7724se_devices[] __initdata = {
@@ -342,6 +458,8 @@ static struct platform_device *ms7724se_devices[] __initdata = {
         &keysc_device,
         &sh_eth_device,
         &sh7724_usb0_host_device,
+        &sh7724_usb1_gadget_device,
+        &fsi_device,
 };
 
 #define EEPROM_OP   0xBA206000
@@ -409,11 +527,13 @@ static void __init sh_eth_init(void)
 static int __init devices_setup(void)
 {
         u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
+        struct clk *fsia_clk;
 
         /* Reset Release */
         ctrl_outw(ctrl_inw(FPGA_OUT) &
                   ~((1 << 1)  | /* LAN */
                     (1 << 6)  | /* VIDEO DAC */
+                    (1 << 7)  | /* AK4643 */
                     (1 << 12) | /* USB0 */
                     (1 << 14)), /* RMII */
                   FPGA_OUT);
@@ -421,9 +541,38 @@ static int __init devices_setup(void)
         /* turn on USB clocks, use external clock */
         ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 
+#ifdef CONFIG_PM
+        /* Let LED9 show STATUS2 */
+        gpio_request(GPIO_FN_STATUS2, NULL);
+
+        /* Lit LED10 show STATUS0 */
+        gpio_request(GPIO_FN_STATUS0, NULL);
+
+        /* Lit LED11 show PDSTATUS */
+        gpio_request(GPIO_FN_PDSTATUS, NULL);
+#else
+        /* Lit LED9 */
+        gpio_request(GPIO_PTJ6, NULL);
+        gpio_direction_output(GPIO_PTJ6, 1);
+        gpio_export(GPIO_PTJ6, 0);
+
+        /* Lit LED10 */
+        gpio_request(GPIO_PTJ5, NULL);
+        gpio_direction_output(GPIO_PTJ5, 1);
+        gpio_export(GPIO_PTJ5, 0);
+
+        /* Lit LED11 */
+        gpio_request(GPIO_PTJ7, NULL);
+        gpio_direction_output(GPIO_PTJ7, 1);
+        gpio_export(GPIO_PTJ7, 0);
+#endif
+
         /* enable USB0 port */
         ctrl_outw(0x0600, 0xa40501d4);
 
+        /* enable USB1 port */
+        ctrl_outw(0x0600, 0xa4050192);
+
         /* enable IRQ 0,1,2 */
         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
         gpio_request(GPIO_FN_INTC_IRQ1, NULL);
@@ -523,6 +672,32 @@ static int __init devices_setup(void)
         gpio_request(GPIO_FN_KEYOUT1,     NULL);
         gpio_request(GPIO_FN_KEYOUT0,     NULL);
 
+        /* enable FSI */
+        gpio_request(GPIO_FN_FSIMCKB,    NULL);
+        gpio_request(GPIO_FN_FSIMCKA,    NULL);
+        gpio_request(GPIO_FN_FSIOASD,    NULL);
+        gpio_request(GPIO_FN_FSIIABCK,   NULL);
+        gpio_request(GPIO_FN_FSIIALRCK,  NULL);
+        gpio_request(GPIO_FN_FSIOABCK,   NULL);
+        gpio_request(GPIO_FN_FSIOALRCK,  NULL);
+        gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
+        gpio_request(GPIO_FN_FSIIBSD,    NULL);
+        gpio_request(GPIO_FN_FSIOBSD,    NULL);
+        gpio_request(GPIO_FN_FSIIBBCK,   NULL);
+        gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
+        gpio_request(GPIO_FN_FSIOBBCK,   NULL);
+        gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
+        gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
+        gpio_request(GPIO_FN_FSIIASD,    NULL);
+
+        /* change parent of FSI A */
+        fsia_clk = clk_get(NULL, "fsia_clk");
+        clk_register(&fsimcka_clk);
+        clk_set_parent(fsia_clk, &fsimcka_clk);
+        clk_set_rate(fsia_clk, 11000);
+        clk_set_rate(&fsimcka_clk, 11000);
+        clk_put(fsia_clk);
+
         /*
          * enable SH-Eth
          *
@@ -546,15 +721,15 @@ static int __init devices_setup(void)
         sh_eth_init();
 
         if (sw & SW41_B) {
-                /* SVGA */
-                lcdc_info.ch[0].lcd_cfg.xres         = 800;
-                lcdc_info.ch[0].lcd_cfg.yres         = 600;
-                lcdc_info.ch[0].lcd_cfg.left_margin  = 142;
-                lcdc_info.ch[0].lcd_cfg.right_margin = 52;
-                lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
-                lcdc_info.ch[0].lcd_cfg.upper_margin = 24;
-                lcdc_info.ch[0].lcd_cfg.lower_margin = 2;
-                lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
+                /* 720p */
+                lcdc_info.ch[0].lcd_cfg.xres         = 1280;
+                lcdc_info.ch[0].lcd_cfg.yres         = 720;
+                lcdc_info.ch[0].lcd_cfg.left_margin  = 220;
+                lcdc_info.ch[0].lcd_cfg.right_margin = 110;
+                lcdc_info.ch[0].lcd_cfg.hsync_len    = 40;
+                lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
+                lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
+                lcdc_info.ch[0].lcd_cfg.vsync_len    = 5;
         } else {
                 /* VGA */
                 lcdc_info.ch[0].lcd_cfg.xres         = 640;
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index 8913ae39a802..efe4cb9f8a77 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -17,6 +17,7 @@
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/usb/r8a66597.h>
+#include <linux/usb/m66592.h>
 #include <asm/ilsel.h>
 
 static struct resource heartbeat_resources[] = {
@@ -89,6 +90,11 @@ static struct platform_device r8a66597_usb_host_device = {
         .resource       = r8a66597_usb_host_resources,
 };
 
+static struct m66592_platdata usbf_platdata = {
+        .xtal = M66592_PLATDATA_XTAL_24MHZ,
+        .vif = 1,
+};
+
 static struct resource m66592_usb_peripheral_resources[] = {
         [0] = {
                 .name   = "m66592_udc",
@@ -109,6 +115,7 @@ static struct platform_device m66592_usb_peripheral_device = {
         .dev = {
                 .dma_mask               = NULL,         /* don't use dma */
                 .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &usbf_platdata,
         },
         .num_resources  = ARRAY_SIZE(m66592_usb_peripheral_resources),
         .resource       = m66592_usb_peripheral_resources,
diff --git a/arch/sh/boot/.gitignore b/arch/sh/boot/.gitignore
index aad5edddf93b..541087d2029c 100644
--- a/arch/sh/boot/.gitignore
+++ b/arch/sh/boot/.gitignore
@@ -1,4 +1,3 @@
 zImage
-vmlinux.srec
-uImage
-uImage.srec
+vmlinux*
+uImage*
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 78efb04c28f3..a1316872be6f 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -20,8 +20,13 @@ CONFIG_BOOT_LINK_OFFSET	?= 0x00800000
 CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
 CONFIG_ENTRY_OFFSET     ?= 0x00001000
 
-targets := zImage vmlinux.srec uImage uImage.srec
-subdir- := compressed
+suffix-$(CONFIG_KERNEL_GZIP)  := gz
+suffix-$(CONFIG_KERNEL_BZIP2) := bz2
+suffix-$(CONFIG_KERNEL_LZMA)  := lzma
+
+targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz uImage.bz2 uImage.lzma
+extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma
+subdir- := compressed romimage
 
 $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
         $(call if_changed,objcopy)
@@ -30,6 +35,13 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
 $(obj)/compressed/vmlinux: FORCE
         $(Q)$(MAKE) $(build)=$(obj)/compressed $@
 
+$(obj)/romImage: $(obj)/romimage/vmlinux FORCE
+        $(call if_changed,objcopy)
+        @echo '  Kernel: $@ is ready'
+
+$(obj)/romimage/vmlinux: $(obj)/zImage FORCE
+        $(Q)$(MAKE) $(build)=$(obj)/romimage $@
+
 KERNEL_MEMORY := 0x00000000
 ifeq ($(CONFIG_PMB_FIXED),y)
 KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
@@ -40,9 +52,6 @@ KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_MEMORY_START)]')
 endif
 
-export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
-       CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY
-
 KERNEL_LOAD     := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_PAGE_OFFSET)  + \
                         $(KERNEL_MEMORY) + \
@@ -55,19 +64,30 @@ KERNEL_ENTRY	:= $(shell /bin/bash -c 'printf "0x%08x" \
 
 quiet_cmd_uimage = UIMAGE  $@
       cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
-                   -C gzip -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
+                   -C $(2) -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
                    -n 'Linux-$(KERNELRELEASE)' -d $< $@
 
-$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
-        $(call if_changed,uimage)
-        @echo '  Image $@ is ready'
-
 $(obj)/vmlinux.bin: vmlinux FORCE
         $(call if_changed,objcopy)
 
 $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
         $(call if_changed,gzip)
 
+$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,bzip2)
+
+$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,lzma)
+
+$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2
+        $(call if_changed,uimage,bzip2)
+
+$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
+        $(call if_changed,uimage,gzip)
+
+$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
+        $(call if_changed,uimage,lzma)
+
 OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
 $(obj)/vmlinux.srec: $(obj)/compressed/vmlinux
         $(call if_changed,objcopy)
@@ -76,5 +96,9 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec
 $(obj)/uImage.srec: $(obj)/uImage
         $(call if_changed,objcopy)
 
-clean-files     += uImage uImage.srec vmlinux.srec \
-                   vmlinux.bin vmlinux.bin.gz
+$(obj)/uImage: $(obj)/uImage.$(suffix-y)
+        @ln -sf $(notdir $<) $@
+        @echo '  Image $@ is ready'
+
+export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
+       CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY suffix-y
diff --git a/arch/sh/boot/compressed/.gitignore b/arch/sh/boot/compressed/.gitignore
new file mode 100644
index 000000000000..2374a83d87b2
--- /dev/null
+++ b/arch/sh/boot/compressed/.gitignore
@@ -0,0 +1 @@
+vmlinux.bin.*
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 9531bf1b7c2f..6182eca5180a 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -5,9 +5,10 @@
 #
 
 targets         := vmlinux vmlinux.bin vmlinux.bin.gz \
-                   head_$(BITS).o misc_$(BITS).o piggy.o
+                   vmlinux.bin.bz2 vmlinux.bin.lzma \
+                   head_$(BITS).o misc.o piggy.o
 
-OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc_$(BITS).o $(obj)/cache.o
+OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
 
 ifdef CONFIG_SH_STANDARD_BIOS
 OBJECTS += $(obj)/../../kernel/sh_bios.o
@@ -23,7 +24,7 @@ IMAGE_OFFSET	:= $(shell /bin/bash -c 'printf "0x%08x" \
 
 LIBGCC  := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
 
-ifeq ($(CONFIG_FUNCTION_TRACER),y)
+ifeq ($(CONFIG_MCOUNT),y)
 ORIG_CFLAGS := $(KBUILD_CFLAGS)
 KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
 endif
@@ -38,10 +39,18 @@ $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
 $(obj)/vmlinux.bin: vmlinux FORCE
         $(call if_changed,objcopy)
 
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
+vmlinux.bin.all-y := $(obj)/vmlinux.bin
+
+$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,gzip)
+$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
+        $(call if_changed,bzip2)
+$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
+        $(call if_changed,lzma)
 
 OBJCOPYFLAGS += -R .empty_zero_page
 
-$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE
-        $(call if_changed,as_o_S)
+LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
+
+$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE
+        $(call if_changed,ld)
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 06ac31f3be88..02a30935f0b9 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -22,7 +22,7 @@ startup:
         bt      clear_bss
         sub     r0, r2
         mov.l   bss_start_addr, r0
-        mov     #0xe0, r1
+        mov     #0xffffffe0, r1
         and     r1, r0                  ! align cache line
         mov.l   text_start_addr, r3
         mov     r0, r1
diff --git a/arch/sh/boot/compressed/install.sh b/arch/sh/boot/compressed/install.sh
index 90589f0fec12..f9f41818b17e 100644
--- a/arch/sh/boot/compressed/install.sh
+++ b/arch/sh/boot/compressed/install.sh
@@ -23,8 +23,8 @@
 
 # User may have a custom install script
 
-if [ -x /sbin/installkernel ]; then
-  exec /sbin/installkernel "$@"
+if [ -x /sbin/${INSTALLKERNEL} ]; then
+  exec /sbin/${INSTALLKERNEL} "$@"
 fi
 
 if [ "$2" = "zImage" ]; then
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
new file mode 100644
index 000000000000..fd56a71ca9d9
--- /dev/null
+++ b/arch/sh/boot/compressed/misc.c
@@ -0,0 +1,149 @@
+/*
+ * arch/sh/boot/compressed/misc.c
+ *
+ * This is a collection of several routines from gzip-1.0.3
+ * adapted for Linux.
+ *
+ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ *
+ * Adapted for SH by Stuart Menefy, Aug 1999
+ *
+ * Modified to use standard LinuxSH BIOS by Greg Banks 7Jul2000
+ */
+
+#include <asm/uaccess.h>
+#include <asm/addrspace.h>
+#include <asm/page.h>
+#include <asm/sh_bios.h>
+
+/*
+ * gzip declarations
+ */
+
+#define STATIC static
+
+#undef memset
+#undef memcpy
+#define memzero(s, n)     memset ((s), 0, (n))
+
+/* cache.c */
+#define CACHE_ENABLE      0
+#define CACHE_DISABLE     1
+int cache_control(unsigned int command);
+
+extern char input_data[];
+extern int input_len;
+static unsigned char *output;
+
+static void error(char *m);
+
+int puts(const char *);
+
+extern int _text;               /* Defined in vmlinux.lds.S */
+extern int _end;
+static unsigned long free_mem_ptr;
+static unsigned long free_mem_end_ptr;
+
+#ifdef CONFIG_HAVE_KERNEL_BZIP2
+#define HEAP_SIZE       0x400000
+#else
+#define HEAP_SIZE       0x10000
+#endif
+
+#ifdef CONFIG_KERNEL_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
+#ifdef CONFIG_KERNEL_BZIP2
+#include "../../../../lib/decompress_bunzip2.c"
+#endif
+
+#ifdef CONFIG_KERNEL_LZMA
+#include "../../../../lib/decompress_unlzma.c"
+#endif
+
+#ifdef CONFIG_SH_STANDARD_BIOS
+size_t strlen(const char *s)
+{
+        int i = 0;
+
+        while (*s++)
+                i++;
+        return i;
+}
+
+int puts(const char *s)
+{
+        int len = strlen(s);
+        sh_bios_console_write(s, len);
+        return len;
+}
+#else
+int puts(const char *s)
+{
+        /* This should be updated to use the sh-sci routines */
+        return 0;
+}
+#endif
+
+void* memset(void* s, int c, size_t n)
+{
+        int i;
+        char *ss = (char*)s;
+
+        for (i=0;i<n;i++) ss[i] = c;
+        return s;
+}
+
+void* memcpy(void* __dest, __const void* __src,
+                            size_t __n)
+{
+        int i;
+        char *d = (char *)__dest, *s = (char *)__src;
+
+        for (i=0;i<__n;i++) d[i] = s[i];
+        return __dest;
+}
+
+static void error(char *x)
+{
+        puts("\n\n");
+        puts(x);
+        puts("\n\n -- System halted");
+
+        while(1);       /* Halt */
+}
+
+#ifdef CONFIG_SUPERH64
+#define stackalign      8
+#else
+#define stackalign      4
+#endif
+
+#define STACK_SIZE (4096)
+long __attribute__ ((aligned(stackalign))) user_stack[STACK_SIZE];
+long *stack_start = &user_stack[STACK_SIZE];
+
+void decompress_kernel(void)
+{
+        unsigned long output_addr;
+
+#ifdef CONFIG_SUPERH64
+        output_addr = (CONFIG_MEMORY_START + 0x2000);
+#else
+        output_addr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
+#ifdef CONFIG_29BIT
+        output_addr |= P2SEG;
+#endif
+#endif
+
+        output = (unsigned char *)output_addr;
+        free_mem_ptr = (unsigned long)&_end;
+        free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
+
+        puts("Uncompressing Linux... ");
+        cache_control(CACHE_ENABLE);
+        decompress(input_data, input_len, NULL, NULL, output, NULL, error);
+        cache_control(CACHE_DISABLE);
+        puts("Ok, booting the kernel.\n");
+}
diff --git a/arch/sh/boot/compressed/misc_32.c b/arch/sh/boot/compressed/misc_32.c
deleted file mode 100644
index efdba6b29572..000000000000
--- a/arch/sh/boot/compressed/misc_32.c
+++ /dev/null
@@ -1,206 +0,0 @@
-/*
- * arch/sh/boot/compressed/misc.c
- *
- * This is a collection of several routines from gzip-1.0.3
- * adapted for Linux.
- *
- * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
- *
- * Adapted for SH by Stuart Menefy, Aug 1999
- *
- * Modified to use standard LinuxSH BIOS by Greg Banks 7Jul2000
- */
-
-#include <asm/uaccess.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-#ifdef CONFIG_SH_STANDARD_BIOS
-#include <asm/sh_bios.h>
-#endif
-
-/*
- * gzip declarations
- */
-
-#define OF(args)  args
-#define STATIC static
-
-#undef memset
-#undef memcpy
-#define memzero(s, n)     memset ((s), 0, (n))
-
-typedef unsigned char  uch;
-typedef unsigned short ush;
-typedef unsigned long  ulg;
-
-#define WSIZE 0x8000            /* Window size must be at least 32k, */
-                                /* and a power of two */
-
-static uch *inbuf;           /* input buffer */
-static uch window[WSIZE];    /* Sliding window buffer */
-
-static unsigned insize = 0;  /* valid bytes in inbuf */
-static unsigned inptr = 0;   /* index of next byte to be processed in inbuf */
-static unsigned outcnt = 0;  /* bytes in output buffer */
-
-/* gzip flag byte */
-#define ASCII_FLAG   0x01 /* bit 0 set: file probably ASCII text */
-#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
-#define EXTRA_FIELD  0x04 /* bit 2 set: extra field present */
-#define ORIG_NAME    0x08 /* bit 3 set: original file name present */
-#define COMMENT      0x10 /* bit 4 set: file comment present */
-#define ENCRYPTED    0x20 /* bit 5 set: file is encrypted */
-#define RESERVED     0xC0 /* bit 6,7:   reserved */
-
-#define get_byte()  (inptr < insize ? inbuf[inptr++] : fill_inbuf())
-
-/* Diagnostic functions */
-#ifdef DEBUG
-#  define Assert(cond,msg) {if(!(cond)) error(msg);}
-#  define Trace(x) fprintf x
-#  define Tracev(x) {if (verbose) fprintf x ;}
-#  define Tracevv(x) {if (verbose>1) fprintf x ;}
-#  define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
-#  define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
-#else
-#  define Assert(cond,msg)
-#  define Trace(x)
-#  define Tracev(x)
-#  define Tracevv(x)
-#  define Tracec(c,x)
-#  define Tracecv(c,x)
-#endif
-
-static int  fill_inbuf(void);
-static void flush_window(void);
-static void error(char *m);
-
-extern char input_data[];
-extern int input_len;
-
-static long bytes_out = 0;
-static uch *output_data;
-static unsigned long output_ptr = 0;
-
-static void error(char *m);
-
-int puts(const char *);
-
-extern int _text;               /* Defined in vmlinux.lds.S */
-extern int _end;
-static unsigned long free_mem_ptr;
-static unsigned long free_mem_end_ptr;
-
-#define HEAP_SIZE             0x10000
-
-#include "../../../../lib/inflate.c"
-
-#ifdef CONFIG_SH_STANDARD_BIOS
-size_t strlen(const char *s)
-{
-        int i = 0;
-
-        while (*s++)
-                i++;
-        return i;
-}
-
-int puts(const char *s)
-{
-        int len = strlen(s);
-        sh_bios_console_write(s, len);
-        return len;
-}
-#else
-int puts(const char *s)
-{
-        /* This should be updated to use the sh-sci routines */
-        return 0;
-}
-#endif
-
-void* memset(void* s, int c, size_t n)
-{
-        int i;
-        char *ss = (char*)s;
-
-        for (i=0;i<n;i++) ss[i] = c;
-        return s;
-}
-
-void* memcpy(void* __dest, __const void* __src,
-                            size_t __n)
-{
-        int i;
-        char *d = (char *)__dest, *s = (char *)__src;
-
-        for (i=0;i<__n;i++) d[i] = s[i];
-        return __dest;
-}
-
-/* ===========================================================================
- * Fill the input buffer. This is called only when the buffer is empty
- * and at least one byte is really needed.
- */
-static int fill_inbuf(void)
-{
-        if (insize != 0) {
-                error("ran out of input data");
-        }
-
-        inbuf = input_data;
-        insize = input_len;
-        inptr = 1;
-        return inbuf[0];
-}
-
-/* ===========================================================================
- * Write the output window window[0..outcnt-1] and update crc and bytes_out.
- * (Used for the decompressed data only.)
- */
-static void flush_window(void)
-{
-    ulg c = crc;         /* temporary variable */
-    unsigned n;
-    uch *in, *out, ch;
-
-    in = window;
-    out = &output_data[output_ptr];
-    for (n = 0; n < outcnt; n++) {
-            ch = *out++ = *in++;
-            c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
-    }
-    crc = c;
-    bytes_out += (ulg)outcnt;
-    output_ptr += (ulg)outcnt;
-    outcnt = 0;
-}
-
-static void error(char *x)
-{
-        puts("\n\n");
-        puts(x);
-        puts("\n\n -- System halted");
-
-        while(1);       /* Halt */
-}
-
-#define STACK_SIZE (4096)
-long user_stack [STACK_SIZE];
-long* stack_start = &user_stack[STACK_SIZE];
-
-void decompress_kernel(void)
-{
-        output_data = NULL;
-        output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
-#ifdef CONFIG_29BIT
-        output_ptr |= P2SEG;
-#endif
-        free_mem_ptr = (unsigned long)&_end;
-        free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
-
-        makecrc();
-        puts("Uncompressing Linux... ");
-        gunzip();
-        puts("Ok, booting the kernel.\n");
-}
diff --git a/arch/sh/boot/compressed/misc_64.c b/arch/sh/boot/compressed/misc_64.c
deleted file mode 100644
index 2941657e18aa..000000000000
--- a/arch/sh/boot/compressed/misc_64.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * arch/sh/boot/compressed/misc_64.c
- *
- * This is a collection of several routines from gzip-1.0.3
- * adapted for Linux.
- *
- * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
- *
- * Adapted for SHmedia from sh by Stuart Menefy, May 2002
- */
-
-#include <asm/uaccess.h>
-
-/* cache.c */
-#define CACHE_ENABLE      0
-#define CACHE_DISABLE     1
-int cache_control(unsigned int command);
-
-/*
- * gzip declarations
- */
-
-#define OF(args)  args
-#define STATIC static
-
-#undef memset
-#undef memcpy
-#define memzero(s, n)     memset ((s), 0, (n))
-
-typedef unsigned char uch;
-typedef unsigned short ush;
-typedef unsigned long ulg;
-
-#define WSIZE 0x8000            /* Window size must be at least 32k, */
-                                /* and a power of two */
-
-static uch *inbuf;              /* input buffer */
-static uch window[WSIZE];       /* Sliding window buffer */
-
-static unsigned insize = 0;     /* valid bytes in inbuf */
-static unsigned inptr = 0;      /* index of next byte to be processed in inbuf */
-static unsigned outcnt = 0;     /* bytes in output buffer */
-
-/* gzip flag byte */
-#define ASCII_FLAG   0x01       /* bit 0 set: file probably ASCII text */
-#define CONTINUATION 0x02       /* bit 1 set: continuation of multi-part gzip file */
-#define EXTRA_FIELD  0x04       /* bit 2 set: extra field present */
-#define ORIG_NAME    0x08       /* bit 3 set: original file name present */
-#define COMMENT      0x10       /* bit 4 set: file comment present */
-#define ENCRYPTED    0x20       /* bit 5 set: file is encrypted */
-#define RESERVED     0xC0       /* bit 6,7:   reserved */
-
-#define get_byte()  (inptr < insize ? inbuf[inptr++] : fill_inbuf())
-
-/* Diagnostic functions */
-#ifdef DEBUG
-#  define Assert(cond,msg) {if(!(cond)) error(msg);}
-#  define Trace(x) fprintf x
-#  define Tracev(x) {if (verbose) fprintf x ;}
-#  define Tracevv(x) {if (verbose>1) fprintf x ;}
-#  define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
-#  define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
-#else
-#  define Assert(cond,msg)
-#  define Trace(x)
-#  define Tracev(x)
-#  define Tracevv(x)
-#  define Tracec(c,x)
-#  define Tracecv(c,x)
-#endif
-
-static int fill_inbuf(void);
-static void flush_window(void);
-static void error(char *m);
-
-extern char input_data[];
-extern int input_len;
-
-static long bytes_out = 0;
-static uch *output_data;
-static unsigned long output_ptr = 0;
-
-static void error(char *m);
-
-static void puts(const char *);
-
-extern int _text;               /* Defined in vmlinux.lds.S */
-extern int _end;
-static unsigned long free_mem_ptr;
-static unsigned long free_mem_end_ptr;
-
-#define HEAP_SIZE             0x10000
-
-#include "../../../../lib/inflate.c"
-
-void puts(const char *s)
-{
-}
-
-void *memset(void *s, int c, size_t n)
-{
-        int i;
-        char *ss = (char *) s;
-
-        for (i = 0; i < n; i++)
-                ss[i] = c;
-        return s;
-}
-
-void *memcpy(void *__dest, __const void *__src, size_t __n)
-{
-        int i;
-        char *d = (char *) __dest, *s = (char *) __src;
-
-        for (i = 0; i < __n; i++)
-                d[i] = s[i];
-        return __dest;
-}
-
-/* ===========================================================================
- * Fill the input buffer. This is called only when the buffer is empty
- * and at least one byte is really needed.
- */
-static int fill_inbuf(void)
-{
-        if (insize != 0) {
-                error("ran out of input data\n");
-        }
-
-        inbuf = input_data;
-        insize = input_len;
-        inptr = 1;
-        return inbuf[0];
-}
-
-/* ===========================================================================
- * Write the output window window[0..outcnt-1] and update crc and bytes_out.
- * (Used for the decompressed data only.)
- */
-static void flush_window(void)
-{
-        ulg c = crc;            /* temporary variable */
-        unsigned n;
-        uch *in, *out, ch;
-
-        in = window;
-        out = &output_data[output_ptr];
-        for (n = 0; n < outcnt; n++) {
-                ch = *out++ = *in++;
-                c = crc_32_tab[((int) c ^ ch) & 0xff] ^ (c >> 8);
-        }
-        crc = c;
-        bytes_out += (ulg) outcnt;
-        output_ptr += (ulg) outcnt;
-        outcnt = 0;
-        puts(".");
-}
-
-static void error(char *x)
-{
-        puts("\n\n");
-        puts(x);
-        puts("\n\n -- System halted");
-
-        while (1) ;             /* Halt */
-}
-
-#define STACK_SIZE (4096)
-long __attribute__ ((aligned(8))) user_stack[STACK_SIZE];
-long *stack_start = &user_stack[STACK_SIZE];
-
-void decompress_kernel(void)
-{
-        output_data = (uch *) (CONFIG_MEMORY_START + 0x2000);
-        free_mem_ptr = (unsigned long) &_end;
-        free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
-
-        makecrc();
-        puts("Uncompressing Linux... ");
-        cache_control(CACHE_ENABLE);
-        gunzip();
-        puts("\n");
-
-#if 0
-        /* When booting from ROM may want to do something like this if the
-         * boot loader doesn't.
-         */
-
-        /* Set up the parameters and command line */
-        {
-                volatile unsigned int *parambase =
-                    (int *) (CONFIG_MEMORY_START + 0x1000);
-
-                parambase[0] = 0x1;     /* MOUNT_ROOT_RDONLY */
-                parambase[1] = 0x0;     /* RAMDISK_FLAGS */
-                parambase[2] = 0x0200;  /* ORIG_ROOT_DEV */
-                parambase[3] = 0x0;     /* LOADER_TYPE */
-                parambase[4] = 0x0;     /* INITRD_START */
-                parambase[5] = 0x0;     /* INITRD_SIZE */
-                parambase[6] = 0;
-
-                strcpy((char *) ((int) parambase + 0x100),
-                       "console=ttySC0,38400");
-        }
-#endif
-
-        puts("Ok, booting the kernel.\n");
-
-        cache_control(CACHE_DISABLE);
-}
diff --git a/arch/sh/boot/compressed/piggy.S b/arch/sh/boot/compressed/piggy.S
deleted file mode 100644
index 566071926b13..000000000000
--- a/arch/sh/boot/compressed/piggy.S
+++ /dev/null
@@ -1,8 +0,0 @@
-        .global input_len, input_data
-        .data
-input_len:
-        .long   input_data_end - input_data
-input_data:
-        .incbin "arch/sh/boot/compressed/vmlinux.bin.gz"
-input_data_end:
-        .end
diff --git a/arch/sh/boot/compressed/vmlinux.scr b/arch/sh/boot/compressed/vmlinux.scr
new file mode 100644
index 000000000000..f02382ae5c48
--- /dev/null
+++ b/arch/sh/boot/compressed/vmlinux.scr
@@ -0,0 +1,10 @@
+SECTIONS
+{
+  .rodata.compressed : {
+        input_len = .;
+        LONG(input_data_end - input_data) input_data = .;
+        *(.data)
+        output_len = . - 4;
+        input_data_end = .;
+        }
+}
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile
new file mode 100644
index 000000000000..5806eee84f6f
--- /dev/null
+++ b/arch/sh/boot/romimage/Makefile
@@ -0,0 +1,19 @@
+#
+# linux/arch/sh/boot/romimage/Makefile
+#
+# create an image suitable for burning to flash from zImage
+#
+
+targets         := vmlinux head.o
+
+OBJECTS = $(obj)/head.o
+LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart
+
+$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
+        $(call if_changed,ld)
+        @:
+
+LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
+
+$(obj)/piggy.o: $(obj)/vmlinux.scr arch/sh/boot/zImage FORCE
+        $(call if_changed,ld)
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S
new file mode 100644
index 000000000000..219bc626dd71
--- /dev/null
+++ b/arch/sh/boot/romimage/head.S
@@ -0,0 +1,10 @@
+/*
+ *  linux/arch/sh/boot/romimage/head.S
+ *
+ * Board specific setup code, executed before zImage loader
+ */
+
+.text
+        .global romstart
+romstart:
+#include <mach/romimage.h>
diff --git a/arch/sh/boot/romimage/vmlinux.scr b/arch/sh/boot/romimage/vmlinux.scr
new file mode 100644
index 000000000000..287c08f8b4bb
--- /dev/null
+++ b/arch/sh/boot/romimage/vmlinux.scr
@@ -0,0 +1,6 @@
+SECTIONS
+{
+  .text : {
+        *(.data)
+        }
+}
diff --git a/arch/sh/configs/ap325rxa_defconfig b/arch/sh/configs/ap325rxa_defconfig
index 6c38a43594fc..2f78d01cc6c0 100644
--- a/arch/sh/configs/ap325rxa_defconfig
+++ b/arch/sh/configs/ap325rxa_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 16:04:11 2009
+# Linux kernel version: 2.6.31
+# Fri Sep 25 11:22:50 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -39,6 +42,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -51,11 +60,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_GROUP_SCHED=y
@@ -88,18 +98,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -107,6 +118,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -119,7 +134,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -135,7 +150,7 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-# CONFIG_FREEZER is not set
+CONFIG_FREEZER=y
 
 #
 # System type
@@ -169,6 +184,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 CONFIG_CPU_SUBTYPE_SH7723=y
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -215,6 +231,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -296,7 +313,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=tty1 console=ttySC5,38400 root=/dev/nfs ip=dhcp"
 
 #
@@ -316,7 +334,13 @@ CONFIG_BINFMT_ELF=y
 #
 # Power management options (EXPERIMENTAL)
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
 # CONFIG_CPU_IDLE is not set
 CONFIG_NET=y
 
@@ -364,6 +388,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -393,6 +418,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -400,7 +426,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -413,6 +438,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -422,9 +448,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -480,6 +506,7 @@ CONFIG_MTD_PHYSMAP=y
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -583,7 +610,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -637,12 +663,10 @@ CONFIG_SMSC911X=y
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
 # CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -726,6 +750,7 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -736,6 +761,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH_MOBILE=y
@@ -757,9 +783,6 @@ CONFIG_I2C_SH_MOBILE=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -780,6 +803,11 @@ CONFIG_SPI_GPIO=y
 #
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_GPIO_SYSFS is not set
@@ -804,11 +832,15 @@ CONFIG_GPIOLIB=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -828,8 +860,12 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
 CONFIG_MEDIA_SUPPORT=y
 
@@ -957,6 +993,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
 CONFIG_MMC_SPI=y
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -992,6 +1030,7 @@ CONFIG_RTC_DRV_PCF8563=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1003,6 +1042,7 @@ CONFIG_RTC_DRV_PCF8563=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1056,8 +1096,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1122,7 +1164,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1202,6 +1243,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1212,8 +1254,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -1221,6 +1266,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1234,7 +1280,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1275,11 +1320,13 @@ CONFIG_CRYPTO_CBC=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1341,5 +1388,6 @@ CONFIG_CRC7=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/dreamcast_defconfig b/arch/sh/configs/dreamcast_defconfig
index 95717a041ed6..aedbd4f13046 100644
--- a/arch/sh/configs/dreamcast_defconfig
+++ b/arch/sh/configs/dreamcast_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:24:48 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 17:56:07 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,7 +30,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -40,6 +43,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,11 +61,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -86,19 +96,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -108,6 +119,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -120,7 +135,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -167,6 +182,7 @@ CONFIG_CPU_SUBTYPE_SH7091=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -218,6 +234,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -322,7 +339,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC1,115200 panic=3"
 
 #
@@ -395,6 +413,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -424,6 +443,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -431,7 +451,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -444,6 +463,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 # CONFIG_STANDALONE is not set
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
@@ -496,7 +516,11 @@ CONFIG_HAVE_IDE=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -561,10 +585,7 @@ CONFIG_8139TOO=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -605,13 +626,14 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 #
 CONFIG_INPUT_KEYBOARD=y
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_KEYBOARD_MAPLE=y
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-CONFIG_KEYBOARD_MAPLE=y
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 CONFIG_INPUT_MOUSE=y
 # CONFIG_MOUSE_PS2 is not set
 # CONFIG_MOUSE_SERIAL is not set
@@ -675,11 +697,15 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -716,6 +742,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -807,7 +834,6 @@ CONFIG_LOGO_SUPERH_CLUT224=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -861,8 +887,10 @@ CONFIG_RTC_LIB=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -922,7 +950,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -949,6 +976,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -958,8 +986,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -967,6 +998,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -980,7 +1012,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1012,11 +1043,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1079,5 +1112,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/ecovec24-romimage_defconfig b/arch/sh/configs/ecovec24-romimage_defconfig
new file mode 100644
index 000000000000..0774924623cc
--- /dev/null
+++ b/arch/sh/configs/ecovec24-romimage_defconfig
@@ -0,0 +1,1032 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31
+# Thu Sep 24 17:56:41 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_CMT=y
+CONFIG_SYS_SUPPORTS_TMU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+
+#
+# Cache configuration
+#
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_7724_SOLUTION_ENGINE is not set
+# CONFIG_SH_KFR2R09 is not set
+CONFIG_SH_ECOVEC=y
+
+#
+# Timer and clock configuration
+#
+# CONFIG_SH_TIMER_TMU is not set
+CONFIG_SH_TIMER_CMT=y
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_SH_CLK_CPG=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+# CONFIG_SPARSE_IRQ is not set
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
+CONFIG_CMDLINE="console=ttySC0,115200"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_MDIO_BITBANG=y
+# CONFIG_MDIO_GPIO is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+CONFIG_SH_ETH=y
+# CONFIG_SMC91X is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+CONFIG_USB_R8A66597_HCD=y
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
new file mode 100644
index 000000000000..ac6469718a2c
--- /dev/null
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -0,0 +1,1576 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31
+# Thu Sep 24 17:45:39 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_CMT=y
+CONFIG_SYS_SUPPORTS_TMU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_FREEZER=y
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+
+#
+# Cache configuration
+#
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_7724_SOLUTION_ENGINE is not set
+# CONFIG_SH_KFR2R09 is not set
+CONFIG_SH_ECOVEC=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_TMU=y
+# CONFIG_SH_TIMER_CMT is not set
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_SH_CLK_CPG=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_SECCOMP=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+# CONFIG_SPARSE_IRQ is not set
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
+CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=120M memchunk.vpu=4m"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_MDIO_BITBANG=y
+# CONFIG_MDIO_GPIO is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+CONFIG_SH_ETH=y
+# CONFIG_SMC91X is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+CONFIG_KEYBOARD_SH_KEYSC=y
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_SH_SCI is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_REGULATOR is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+CONFIG_SOC_CAMERA=y
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+CONFIG_VIDEO_SH_MOBILE_CEU=y
+# CONFIG_V4L_USB_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_USB_MR800 is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+# CONFIG_FB_CFB_FILLRECT is not set
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_SH_MOBILE_LCDC=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+# CONFIG_LOGO_SUPERH_MONO is not set
+# CONFIG_LOGO_SUPERH_VGA16 is not set
+CONFIG_LOGO_SUPERH_CLUT224=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+CONFIG_USB_R8A66597_HCD=y
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+CONFIG_RTC_DRV_PCF8563=y
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SH is not set
+# CONFIG_RTC_DRV_GENERIC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_UBIFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig
index 497414c439f4..86c9bc050629 100644
--- a/arch/sh/configs/edosk7705_defconfig
+++ b/arch/sh/configs/edosk7705_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:25:35 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 17:57:13 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -13,6 +13,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -26,7 +27,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -36,17 +39,24 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SYSVIPC is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
 # CONFIG_CGROUPS is not set
@@ -70,18 +80,19 @@ CONFIG_EMBEDDED=y
 # CONFIG_EVENTFD is not set
 CONFIG_SHMEM=y
 # CONFIG_AIO is not set
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -89,6 +100,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_BASE_SMALL=1
@@ -125,6 +140,7 @@ CONFIG_CPU_SUBTYPE_SH7705=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -165,7 +181,6 @@ CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -173,6 +188,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -250,7 +266,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -321,11 +338,14 @@ CONFIG_HAVE_IDE=y
 # CONFIG_R3964 is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -409,6 +429,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_KERNEL is not set
@@ -416,8 +437,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -425,6 +449,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -449,4 +474,5 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/edosk7760_defconfig b/arch/sh/configs/edosk7760_defconfig
index 77684ed91270..4c0f82b7def2 100644
--- a/arch/sh/configs/edosk7760_defconfig
+++ b/arch/sh/configs/edosk7760_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:25:55 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 17:57:30 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION="_edosk7760"
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -51,11 +60,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=17
@@ -91,19 +101,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -112,6 +123,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -124,7 +139,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -171,6 +186,7 @@ CONFIG_CPU_SUBTYPE_SH7760=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -216,6 +232,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -304,7 +321,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x02000000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="mem=64M console=ttySC2,115200 root=/dev/nfs rw nfsroot=192.168.0.3:/scripts/filesys ip=192.168.0.4"
 
 #
@@ -367,6 +385,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -396,6 +415,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -403,7 +423,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -416,6 +435,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
@@ -426,9 +446,9 @@ CONFIG_DEBUG_DEVRES=y
 CONFIG_MTD=y
 CONFIG_MTD_DEBUG=y
 CONFIG_MTD_DEBUG_VERBOSE=0
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -563,10 +583,7 @@ CONFIG_SMC91X=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -649,6 +666,7 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -659,6 +677,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH7760=y
 # CONFIG_I2C_SH_MOBILE is not set
@@ -680,20 +699,21 @@ CONFIG_I2C_SH7760=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 CONFIG_I2C_DEBUG_CORE=y
 CONFIG_I2C_DEBUG_ALGO=y
 CONFIG_I2C_DEBUG_BUS=y
 CONFIG_I2C_DEBUG_CHIP=y
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -712,8 +732,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -837,8 +859,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -900,7 +924,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -974,6 +997,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_UNUSED_SYMBOLS=y
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1010,18 +1034,23 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
@@ -1029,6 +1058,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1045,11 +1075,11 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
 CONFIG_EARLY_PRINTK=y
-# CONFIG_DEBUG_BOOTMEM is not set
-CONFIG_DEBUG_STACKOVERFLOW=y
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1064,7 +1094,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_HASH=y
@@ -1100,11 +1129,13 @@ CONFIG_CRYPTO_HASH2=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1168,5 +1199,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/espt_defconfig b/arch/sh/configs/espt_defconfig
index 881128eeab35..9b785517abcf 100644
--- a/arch/sh/configs/espt_defconfig
+++ b/arch/sh/configs/espt_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:27:21 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 17:58:18 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -48,11 +57,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -92,19 +102,21 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -114,6 +126,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -125,7 +142,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -173,6 +190,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 CONFIG_CPU_SUBTYPE_SH7763=y
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -214,7 +232,6 @@ CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
 # CONFIG_MEMORY_HOTPLUG is not set
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -222,6 +239,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -303,7 +321,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/nfs ip=bootp"
 
 #
@@ -371,6 +390,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -412,6 +432,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -421,9 +442,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -477,6 +498,7 @@ CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_PHYSMAP=y
 # CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_GPIO_ADDR is not set
 # CONFIG_MTD_PLATRAM is not set
 
 #
@@ -554,7 +576,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -610,10 +631,7 @@ CONFIG_SH_ETH=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -705,11 +723,15 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -819,6 +841,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -888,6 +911,7 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
@@ -930,8 +954,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -997,7 +1023,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1071,6 +1096,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1082,11 +1108,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -1096,6 +1126,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1109,7 +1140,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1141,11 +1171,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1208,5 +1240,6 @@ CONFIG_ZLIB_INFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/hp6xx_defconfig b/arch/sh/configs/hp6xx_defconfig
index 3249d46fdc13..f59be446f829 100644
--- a/arch/sh/configs/hp6xx_defconfig
+++ b/arch/sh/configs/hp6xx_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:28:12 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 17:59:45 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 # CONFIG_SYSVIPC is not set
 CONFIG_BSD_PROCESS_ACCT=y
@@ -46,11 +55,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -81,18 +91,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -100,6 +111,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -107,7 +122,7 @@ CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -154,6 +169,7 @@ CONFIG_CPU_SUBTYPE_SH7709=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -199,6 +215,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -288,7 +305,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -322,6 +340,7 @@ CONFIG_SUSPEND=y
 CONFIG_SUSPEND_FREEZER=y
 # CONFIG_HIBERNATION is not set
 CONFIG_APM_EMULATION=y
+# CONFIG_PM_RUNTIME is not set
 # CONFIG_CPU_IDLE is not set
 # CONFIG_NET is not set
 
@@ -390,7 +409,6 @@ CONFIG_BLK_DEV_SD=y
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -399,6 +417,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 CONFIG_ATA_SFF=y
 # CONFIG_SATA_MV is not set
@@ -428,13 +447,14 @@ CONFIG_INPUT_EVDEV=y
 #
 CONFIG_INPUT_KEYBOARD=y
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_KEYBOARD_HP6XX=y
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-CONFIG_KEYBOARD_HP6XX=y
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -452,6 +472,7 @@ CONFIG_TOUCHSCREEN_HP600=y
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
 # CONFIG_INPUT_MISC is not set
 
 #
@@ -507,11 +528,15 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -663,7 +688,9 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -725,7 +752,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -782,6 +808,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -791,8 +818,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -800,6 +830,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -813,7 +844,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -854,11 +884,13 @@ CONFIG_CRYPTO_PCBC=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -920,4 +952,5 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/kfr2r09-romimage_defconfig b/arch/sh/configs/kfr2r09-romimage_defconfig
new file mode 100644
index 000000000000..02590e127f74
--- /dev/null
+++ b/arch/sh/configs/kfr2r09-romimage_defconfig
@@ -0,0 +1,777 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:01:48 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_CMT=y
+CONFIG_SYS_SUPPORTS_TMU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+# CONFIG_BLOCK is not set
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+
+#
+# Cache configuration
+#
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_7724_SOLUTION_ENGINE is not set
+CONFIG_SH_KFR2R09=y
+# CONFIG_SH_ECOVEC is not set
+
+#
+# Timer and clock configuration
+#
+# CONFIG_SH_TIMER_TMU is not set
+CONFIG_SH_TIMER_CMT=y
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_SH_CLK_CPG=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+# CONFIG_SPARSE_IRQ is not set
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
+CONFIG_CMDLINE="console=ttySC1,115200 quiet"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+CONFIG_PM_RUNTIME=y
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_R8A66597=y
+CONFIG_USB_R8A66597=y
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_CDC_COMPOSITE=y
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/kfr2r09_defconfig b/arch/sh/configs/kfr2r09_defconfig
new file mode 100644
index 000000000000..8ae65d294b11
--- /dev/null
+++ b/arch/sh/configs/kfr2r09_defconfig
@@ -0,0 +1,1080 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31
+# Fri Sep 25 11:54:22 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_CMT=y
+CONFIG_SYS_SUPPORTS_TMU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+
+#
+# Cache configuration
+#
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_7724_SOLUTION_ENGINE is not set
+CONFIG_SH_KFR2R09=y
+# CONFIG_SH_ECOVEC is not set
+
+#
+# Timer and clock configuration
+#
+# CONFIG_SH_TIMER_TMU is not set
+CONFIG_SH_TIMER_CMT=y
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_SH_CLK_CPG=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+# CONFIG_SPARSE_IRQ is not set
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
+CONFIG_CMDLINE="console=tty0 console=ttySC1,115200"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+CONFIG_MTD_ONENAND=y
+# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
+CONFIG_MTD_ONENAND_GENERIC=y
+# CONFIG_MTD_ONENAND_OTP is not set
+# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
+# CONFIG_MTD_ONENAND_SIM is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+CONFIG_KEYBOARD_SH_KEYSC=y
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+# CONFIG_FB_CFB_FILLRECT is not set
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_SH_MOBILE_LCDC=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+CONFIG_FONT_MINI_4x6=y
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+# CONFIG_LOGO_SUPERH_MONO is not set
+CONFIG_LOGO_SUPERH_VGA16=y
+# CONFIG_LOGO_SUPERH_CLUT224 is not set
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_R8A66597=y
+CONFIG_USB_R8A66597=y
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_CDC_COMPOSITE=y
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SH=y
+# CONFIG_RTC_DRV_GENERIC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+
+#
+# TI VLYNQ
+#
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+# CONFIG_INOTIFY is not set
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig
index ba05739fda21..c2a9a3996388 100644
--- a/arch/sh/configs/landisk_defconfig
+++ b/arch/sh/configs/landisk_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:28:45 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:05:49 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -49,11 +58,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -83,19 +93,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -104,6 +115,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -116,7 +131,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -163,6 +178,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -208,6 +224,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -295,7 +312,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -411,6 +429,7 @@ CONFIG_IP_NF_QUEUE=m
 # CONFIG_IP_NF_ARPTABLES is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -442,6 +461,7 @@ CONFIG_ATALK=m
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -449,7 +469,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -462,6 +481,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -631,6 +651,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
 # CONFIG_SCSI_DH is not set
@@ -653,7 +674,11 @@ CONFIG_MD_RAID1=m
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -729,6 +754,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -754,10 +780,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -868,10 +891,20 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_I5K_AMB is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
@@ -886,9 +919,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT8231 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -910,6 +941,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -928,11 +960,11 @@ CONFIG_DUMMY_CONSOLE=y
 CONFIG_FONT_8x16=y
 CONFIG_SOUND=m
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 # CONFIG_SND is not set
 CONFIG_SOUND_PRIME=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -961,6 +993,7 @@ CONFIG_HID_CYPRESS=m
 CONFIG_HID_EZKEY=m
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=m
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=m
 # CONFIG_LOGITECH_FF is not set
@@ -1011,6 +1044,7 @@ CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1177,8 +1211,10 @@ CONFIG_REISERFS_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1251,7 +1287,6 @@ CONFIG_ROMFS_ON_BLOCK=y
 CONFIG_UFS_FS=m
 # CONFIG_UFS_FS_WRITE is not set
 # CONFIG_UFS_DEBUG is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
@@ -1331,6 +1366,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1340,8 +1376,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -1350,6 +1389,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 # CONFIG_EARLY_PRINTK is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1363,7 +1403,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1395,11 +1434,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1462,5 +1503,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/lboxre2_defconfig b/arch/sh/configs/lboxre2_defconfig
index c0bc2fd033b9..ec0c0b432c74 100644
--- a/arch/sh/configs/lboxre2_defconfig
+++ b/arch/sh/configs/lboxre2_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:29:50 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:09:59 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -49,11 +58,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -83,19 +93,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -104,6 +115,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -116,7 +131,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -163,6 +178,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -208,6 +224,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -295,7 +312,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/sda1"
 
 #
@@ -411,6 +429,7 @@ CONFIG_NETFILTER_ADVANCED=y
 # CONFIG_IP_NF_ARPTABLES is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -440,6 +459,7 @@ CONFIG_NETFILTER_ADVANCED=y
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -447,7 +467,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -460,6 +479,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -572,12 +592,14 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -599,6 +621,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -627,6 +650,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_PCMCIA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -645,7 +669,11 @@ CONFIG_PATA_PLATFORM=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -725,6 +753,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -750,10 +779,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -863,10 +889,20 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_I5K_AMB is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
@@ -881,9 +917,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT8231 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -905,6 +939,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -923,7 +958,6 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -1021,8 +1055,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1089,7 +1125,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1155,6 +1190,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1164,8 +1200,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -1174,6 +1213,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 # CONFIG_EARLY_PRINTK is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1187,7 +1227,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1219,11 +1258,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1286,5 +1327,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/magicpanelr2_defconfig b/arch/sh/configs/magicpanelr2_defconfig
index c5859e82d916..79091e3e32c4 100644
--- a/arch/sh/configs/magicpanelr2_defconfig
+++ b/arch/sh/configs/magicpanelr2_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:30:31 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:10:49 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,11 +61,12 @@ CONFIG_AUDIT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
 # CONFIG_GROUP_SCHED is not set
@@ -91,18 +101,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -111,6 +122,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -123,7 +138,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -170,6 +185,7 @@ CONFIG_CPU_SUBTYPE_SH7720=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -215,6 +231,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -306,7 +323,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -368,6 +386,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -397,6 +416,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -404,7 +424,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -417,6 +436,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 # CONFIG_STANDALONE is not set
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 CONFIG_FW_LOADER=y
@@ -428,9 +448,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
 # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
@@ -589,10 +609,7 @@ CONFIG_SMSC911X=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -631,13 +648,15 @@ CONFIG_INPUT_EVDEV=y
 #
 CONFIG_INPUT_KEYBOARD=y
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 CONFIG_INPUT_MOUSE=y
 # CONFIG_MOUSE_PS2 is not set
 # CONFIG_MOUSE_SERIAL is not set
@@ -701,6 +720,11 @@ CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -721,11 +745,14 @@ CONFIG_GPIOLIB=y
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -829,8 +856,10 @@ CONFIG_JBD=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -900,7 +929,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -976,6 +1004,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1006,24 +1035,30 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1036,16 +1071,15 @@ CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
-# CONFIG_KMEMCHECK is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xa4430000
 CONFIG_EARLY_PRINTK=y
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1077,5 +1111,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/microdev_defconfig b/arch/sh/configs/microdev_defconfig
index e5a21e1d625c..6bb5976aff2a 100644
--- a/arch/sh/configs/microdev_defconfig
+++ b/arch/sh/configs/microdev_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:31:56 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:14:35 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 # CONFIG_SYSVIPC is not set
 # CONFIG_POSIX_MQUEUE is not set
@@ -49,11 +58,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -87,18 +97,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -106,6 +117,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -113,7 +128,7 @@ CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -160,6 +175,7 @@ CONFIG_CPU_SH4=y
 CONFIG_CPU_SUBTYPE_SH4_202=y
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -211,6 +227,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -296,7 +313,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/hda1"
 
 #
@@ -364,6 +382,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -393,6 +412,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -400,7 +420,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -413,6 +432,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
@@ -499,10 +519,7 @@ CONFIG_SMC91X=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -561,10 +578,20 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -575,9 +602,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -662,8 +687,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -726,12 +753,12 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 # CONFIG_NFSD is not set
 CONFIG_LOCKD=y
@@ -803,6 +830,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -812,8 +840,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -821,6 +852,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -834,7 +866,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -875,11 +906,13 @@ CONFIG_CRYPTO_ECB=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -943,5 +976,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig
index b18cfd39cac6..65018283c3a8 100644
--- a/arch/sh/configs/migor_defconfig
+++ b/arch/sh/configs/migor_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 16:06:48 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:17:41 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,7 +30,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -39,6 +42,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -50,11 +59,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -89,19 +99,21 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -111,6 +123,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -122,7 +139,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -138,7 +155,7 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-# CONFIG_FREEZER is not set
+CONFIG_FREEZER=y
 
 #
 # System type
@@ -173,6 +190,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -224,6 +242,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -308,7 +327,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 earlyprintk=serial ip=on root=/dev/nfs ip=dhcp"
 
 #
@@ -328,7 +348,13 @@ CONFIG_BINFMT_ELF=y
 #
 # Power management options (EXPERIMENTAL)
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
 # CONFIG_CPU_IDLE is not set
 CONFIG_NET=y
 
@@ -376,6 +402,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -406,6 +433,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -414,7 +442,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -427,6 +454,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
@@ -436,9 +464,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -585,7 +613,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -621,10 +648,7 @@ CONFIG_SMC91X=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -659,14 +683,19 @@ CONFIG_INPUT_EVDEV=y
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 CONFIG_KEYBOARD_SH_KEYSC=y
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -715,6 +744,7 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -725,6 +755,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH_MOBILE=y
@@ -746,15 +777,17 @@ CONFIG_I2C_SH_MOBILE=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_GPIO_SYSFS is not set
@@ -777,11 +810,14 @@ CONFIG_GPIOLIB=y
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -801,8 +837,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 CONFIG_MEDIA_SUPPORT=y
 
@@ -922,7 +960,6 @@ CONFIG_LOGO_SUPERH_VGA16=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -952,13 +989,13 @@ CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_LH7A40X is not set
 # CONFIG_USB_GADGET_OMAP is not set
 # CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
 # CONFIG_USB_GADGET_PXA27X is not set
 # CONFIG_USB_GADGET_S3C_HSOTG is not set
-# CONFIG_USB_GADGET_S3C2410 is not set
 # CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
 CONFIG_USB_GADGET_M66592=y
 CONFIG_USB_M66592=y
-CONFIG_SUPERH_BUILT_IN_M66592=y
 # CONFIG_USB_GADGET_AMD5536UDC is not set
 # CONFIG_USB_GADGET_FSL_QE is not set
 # CONFIG_USB_GADGET_CI13XXX is not set
@@ -1017,6 +1054,7 @@ CONFIG_RTC_DRV_RS5C372=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1064,8 +1102,10 @@ CONFIG_UIO_PDRV_GENIRQ=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -1126,7 +1166,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1161,6 +1200,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1172,11 +1212,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -1188,6 +1232,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
 CONFIG_EARLY_PRINTK=y
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1201,7 +1246,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER2=y
@@ -1240,11 +1284,13 @@ CONFIG_CRYPTO_WORKQUEUE=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1308,5 +1354,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/polaris_defconfig b/arch/sh/configs/polaris_defconfig
index 67edd3f3f9ba..7fc1952419aa 100644
--- a/arch/sh/configs/polaris_defconfig
+++ b/arch/sh/configs/polaris_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:33:28 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:20:53 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,11 +61,12 @@ CONFIG_AUDIT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_GROUP_SCHED=y
@@ -91,18 +101,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -111,6 +122,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -123,7 +138,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -170,6 +185,7 @@ CONFIG_CPU_SUBTYPE_SH7709=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -215,6 +231,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -302,7 +319,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/mtdblock2 rootfstype=jffs2 mem=63M mtdparts=physmap-flash.0:0x00100000(bootloader)ro,0x00500000(Kernel)ro,0x00A00000(Filesystem)"
 
 #
@@ -363,6 +381,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -403,6 +422,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -414,9 +434,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -577,10 +597,7 @@ CONFIG_SMSC911X=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -666,11 +683,15 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -770,8 +791,10 @@ CONFIG_RTC_DRV_SH=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -841,7 +864,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -877,6 +899,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -916,18 +939,23 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 CONFIG_DEBUG_SG=y
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
@@ -935,6 +963,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -947,16 +976,15 @@ CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
-# CONFIG_KMEMCHECK is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 CONFIG_EARLY_SCIF_CONSOLE=y
-CONFIG_EARLY_SCIF_CONSOLE_PORT=0x00000000
+CONFIG_EARLY_SCIF_CONSOLE_PORT=0xa4000150
 CONFIG_EARLY_PRINTK=y
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -987,5 +1015,6 @@ CONFIG_ZLIB_DEFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/r7780mp_defconfig b/arch/sh/configs/r7780mp_defconfig
index 107a8e337ecc..903b021e8d93 100644
--- a/arch/sh/configs/r7780mp_defconfig
+++ b/arch/sh/configs/r7780mp_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:34:44 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:24:31 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,8 +29,10 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_IO_TRAPPED=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -40,6 +43,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,11 +61,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -92,20 +102,22 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=m
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -115,6 +127,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -126,7 +143,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -174,6 +191,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 CONFIG_CPU_SUBTYPE_SH7780=y
@@ -229,6 +247,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -315,7 +334,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
 
 #
@@ -396,6 +416,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 CONFIG_STP=m
@@ -428,6 +449,7 @@ CONFIG_LLC=m
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -436,7 +458,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -449,6 +470,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
@@ -460,9 +482,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -513,6 +535,7 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_PHYSMAP=y
 # CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_PCI is not set
+# CONFIG_MTD_GPIO_ADDR is not set
 # CONFIG_MTD_INTEL_VR_NOR is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -651,11 +674,13 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -677,6 +702,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -704,6 +730,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -722,7 +749,11 @@ CONFIG_PATA_PLATFORM=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -804,6 +835,7 @@ CONFIG_R8169=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -829,10 +861,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -873,13 +902,17 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -933,6 +966,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -961,6 +995,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 CONFIG_I2C_HIGHLANDER=y
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SH_MOBILE is not set
@@ -987,19 +1022,26 @@ CONFIG_I2C_HIGHLANDER=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADM1021 is not set
@@ -1049,6 +1091,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADS7828 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_VT8231 is not set
@@ -1060,7 +1103,6 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 CONFIG_THERMAL=y
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
@@ -1081,14 +1123,17 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1101,11 +1146,11 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_DISPLAY_SUPPORT is not set
 CONFIG_SOUND=m
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 # CONFIG_SND is not set
 CONFIG_SOUND_PRIME=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -1169,6 +1214,7 @@ CONFIG_RTC_DRV_RS5C372=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1221,8 +1267,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1289,12 +1337,12 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
@@ -1370,6 +1418,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1404,21 +1453,27 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
@@ -1427,6 +1482,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1445,11 +1501,11 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
 # CONFIG_EARLY_PRINTK is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-CONFIG_DEBUG_STACKOVERFLOW=y
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1464,7 +1520,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1506,11 +1561,13 @@ CONFIG_CRYPTO_PCBC=m
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1573,5 +1630,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig
index 8a3dc300db4a..27ff46c13a87 100644
--- a/arch/sh/configs/r7785rp_defconfig
+++ b/arch/sh/configs/r7785rp_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:37:20 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:29:23 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,8 +30,10 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_IO_TRAPPED=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -41,6 +44,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -56,12 +65,12 @@ CONFIG_AUDIT_TREE=y
 #
 # RCU Subsystem
 #
-# CONFIG_CLASSIC_RCU is not set
-# CONFIG_TREE_RCU is not set
-CONFIG_PREEMPT_RCU=y
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
 CONFIG_RCU_TRACE=y
-# CONFIG_TREE_RCU_TRACE is not set
-CONFIG_PREEMPT_RCU_TRACE=y
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+CONFIG_TREE_RCU_TRACE=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -93,20 +102,22 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
@@ -117,6 +128,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -129,7 +145,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -178,6 +194,7 @@ CONFIG_CPU_SHX2=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -231,7 +248,6 @@ CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
 # CONFIG_MEMORY_HOTPLUG is not set
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -239,6 +255,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -338,7 +355,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
 
 #
@@ -419,6 +437,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 CONFIG_STP=m
@@ -452,6 +471,7 @@ CONFIG_LLC=m
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -460,7 +480,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -473,6 +492,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
@@ -591,11 +611,13 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -617,6 +639,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -644,6 +667,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -662,7 +686,11 @@ CONFIG_PATA_PLATFORM=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -721,6 +749,7 @@ CONFIG_R8169=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -746,10 +775,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -790,14 +816,19 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -851,6 +882,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -879,6 +911,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 CONFIG_I2C_HIGHLANDER=y
 # CONFIG_I2C_OCORES is not set
@@ -906,15 +939,17 @@ CONFIG_I2C_HIGHLANDER=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -935,14 +970,24 @@ CONFIG_GPIOLIB=y
 # PCI GPIO expanders:
 #
 # CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_LANGWELL is not set
 
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADM1021 is not set
@@ -993,6 +1038,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADS7828 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_VT8231 is not set
@@ -1004,9 +1050,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -1026,14 +1070,17 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1099,11 +1146,11 @@ CONFIG_FB_SH_MOBILE_LCDC=m
 # CONFIG_LOGO is not set
 CONFIG_SOUND=m
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 # CONFIG_SND is not set
 CONFIG_SOUND_PRIME=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -1167,6 +1214,7 @@ CONFIG_RTC_DRV_RS5C372=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1219,8 +1267,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1286,12 +1336,12 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
@@ -1367,6 +1417,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1401,22 +1452,29 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
@@ -1425,6 +1483,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1442,11 +1501,11 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 CONFIG_EARLY_PRINTK=y
-# CONFIG_DEBUG_BOOTMEM is not set
-CONFIG_DEBUG_STACKOVERFLOW=y
+# CONFIG_STACK_DEBUG is not set
 CONFIG_DEBUG_STACK_USAGE=y
 CONFIG_4KSTACKS=y
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1461,7 +1520,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1503,11 +1561,13 @@ CONFIG_CRYPTO_PCBC=m
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1571,5 +1631,6 @@ CONFIG_AUDIT_GENERIC=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/rsk7201_defconfig b/arch/sh/configs/rsk7201_defconfig
index 55c3656a75c1..c40db12e9ad7 100644
--- a/arch/sh/configs/rsk7201_defconfig
+++ b/arch/sh/configs/rsk7201_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:39:54 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:34:29 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
@@ -45,11 +54,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 # CONFIG_IKCONFIG_PROC is not set
 CONFIG_LOG_BUF_SHIFT=14
@@ -86,19 +96,21 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_AIO is not set
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 # CONFIG_SLUB is not set
 CONFIG_SLOB=y
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -107,6 +119,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
@@ -117,7 +134,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -165,6 +182,7 @@ CONFIG_CPU_SUBTYPE_SH7201=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -285,7 +303,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ignore_loglevel"
 
 #
@@ -309,6 +328,7 @@ CONFIG_BINFMT_SHARED_FLAT=y
 #
 CONFIG_PM=y
 # CONFIG_PM_DEBUG is not set
+# CONFIG_PM_RUNTIME is not set
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 # CONFIG_NET is not set
@@ -327,9 +347,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_SYS_HYPERVISOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
 # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
@@ -498,6 +518,11 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -597,7 +622,9 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 # CONFIG_FILE_LOCKING is not set
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -632,7 +659,6 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
 CONFIG_MISC_FILESYSTEMS=y
@@ -668,7 +694,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -686,6 +711,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -698,11 +724,15 @@ CONFIG_STACKTRACE=y
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -712,6 +742,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -741,4 +772,5 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig
index 69e619967b7b..5cabdb3a84fb 100644
--- a/arch/sh/configs/rsk7203_defconfig
+++ b/arch/sh/configs/rsk7203_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:40:44 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:35:04 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
@@ -50,11 +59,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 # CONFIG_IKCONFIG_PROC is not set
 CONFIG_LOG_BUF_SHIFT=14
@@ -93,19 +103,21 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 # CONFIG_SLUB is not set
 CONFIG_SLOB=y
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -114,6 +126,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
@@ -124,7 +141,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -172,6 +189,7 @@ CONFIG_CPU_SUBTYPE_SH7203=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -308,7 +326,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ignore_loglevel"
 
 #
@@ -332,6 +351,7 @@ CONFIG_BINFMT_SHARED_FLAT=y
 #
 CONFIG_PM=y
 # CONFIG_PM_DEBUG is not set
+# CONFIG_PM_RUNTIME is not set
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_NET=y
@@ -373,6 +393,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -403,6 +424,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -410,7 +432,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -432,9 +453,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_REDBOOT_PARTS=y
 CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
 # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
@@ -591,10 +612,7 @@ CONFIG_SMSC911X=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -679,6 +697,11 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -699,6 +722,10 @@ CONFIG_GPIOLIB=y
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -741,7 +768,6 @@ CONFIG_VIDEO_OUTPUT_CONTROL=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -764,6 +790,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -811,6 +838,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 CONFIG_USB_R8A66597_HCD=y
 # CONFIG_USB_HWA_HCD is not set
@@ -954,8 +982,10 @@ CONFIG_RTC_DRV_SH=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -990,7 +1020,6 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
 CONFIG_MISC_FILESYSTEMS=y
@@ -1016,7 +1045,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1090,6 +1118,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1129,22 +1158,28 @@ CONFIG_DEBUG_WRITECOUNT=y
 CONFIG_DEBUG_LIST=y
 CONFIG_DEBUG_SG=y
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
@@ -1152,6 +1187,7 @@ CONFIG_FTRACE=y
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1170,10 +1206,10 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xfffe8000
 CONFIG_EARLY_PRINTK=y
-CONFIG_DEBUG_BOOTMEM=y
-CONFIG_DEBUG_STACKOVERFLOW=y
+# CONFIG_STACK_DEBUG is not set
 CONFIG_DEBUG_STACK_USAGE=y
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1203,5 +1239,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/rts7751r2d1_defconfig b/arch/sh/configs/rts7751r2d1_defconfig
index c6e9b1c0fa3e..f521e82cc19e 100644
--- a/arch/sh/configs/rts7751r2d1_defconfig
+++ b/arch/sh/configs/rts7751r2d1_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:42:26 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:36:25 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,8 +29,10 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_IO_TRAPPED=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -39,6 +42,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -50,11 +59,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -84,20 +94,22 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -107,6 +119,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -118,7 +135,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -165,6 +182,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -210,6 +228,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -303,7 +322,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00010000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial"
 
 #
@@ -378,6 +398,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -408,6 +429,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -416,7 +438,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -429,6 +450,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
@@ -542,11 +564,13 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -568,6 +592,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -595,6 +620,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -613,7 +639,11 @@ CONFIG_PATA_PLATFORM=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -673,6 +703,7 @@ CONFIG_8139TOO=y
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
 # CONFIG_ATL2 is not set
@@ -694,6 +725,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -719,10 +751,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -840,10 +869,20 @@ CONFIG_SPI_SH_SCI=y
 #
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_ADCXX is not set
 # CONFIG_SENSORS_I5K_AMB is not set
 # CONFIG_SENSORS_F71805F is not set
@@ -862,9 +901,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
 # CONFIG_SENSORS_LIS3_SPI is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -880,12 +917,15 @@ CONFIG_SSB_POSSIBLE=y
 CONFIG_MFD_SM501=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -969,6 +1009,7 @@ CONFIG_LOGO=y
 CONFIG_LOGO_SUPERH_CLUT224=y
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
@@ -1071,7 +1112,6 @@ CONFIG_SOUND_PRIME=m
 CONFIG_AC97_BUS=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1094,6 +1134,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1142,6 +1183,7 @@ CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1213,6 +1255,7 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
@@ -1252,6 +1295,7 @@ CONFIG_RTC_INTF_DEV=y
 CONFIG_RTC_DRV_R9701=y
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1293,8 +1337,10 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1357,7 +1403,6 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1423,6 +1468,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1434,11 +1480,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -1450,6 +1500,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
 CONFIG_EARLY_PRINTK=y
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1463,7 +1514,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1495,11 +1545,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1562,5 +1614,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/rts7751r2dplus_defconfig b/arch/sh/configs/rts7751r2dplus_defconfig
index bc10469d31f0..a156cd1e0617 100644
--- a/arch/sh/configs/rts7751r2dplus_defconfig
+++ b/arch/sh/configs/rts7751r2dplus_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:43:19 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:39:48 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,8 +29,10 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_IO_TRAPPED=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -39,6 +42,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -50,11 +59,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -84,20 +94,22 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -107,6 +119,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -118,7 +135,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -165,6 +182,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -210,6 +228,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -303,7 +322,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00010000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=serial"
 
 #
@@ -378,6 +398,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -408,6 +429,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -416,7 +438,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -429,6 +450,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
@@ -438,9 +460,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -499,6 +521,7 @@ CONFIG_MTD_PHYSMAP=y
 # CONFIG_MTD_PMC551 is not set
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -627,11 +650,13 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -653,6 +678,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -680,6 +706,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -698,7 +725,11 @@ CONFIG_PATA_PLATFORM=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -758,6 +789,7 @@ CONFIG_8139TOO=y
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
 # CONFIG_ATL2 is not set
@@ -779,6 +811,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -804,10 +837,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -925,10 +955,20 @@ CONFIG_SPI_SH_SCI=y
 #
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_ADCXX is not set
 # CONFIG_SENSORS_I5K_AMB is not set
 # CONFIG_SENSORS_F71805F is not set
@@ -947,9 +987,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
 # CONFIG_SENSORS_LIS3_SPI is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -965,12 +1003,15 @@ CONFIG_SSB_POSSIBLE=y
 CONFIG_MFD_SM501=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=m
@@ -1054,6 +1095,7 @@ CONFIG_LOGO=y
 CONFIG_LOGO_SUPERH_CLUT224=y
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 CONFIG_SND=m
 CONFIG_SND_TIMER=m
 CONFIG_SND_PCM=m
@@ -1156,7 +1198,6 @@ CONFIG_SOUND_PRIME=m
 CONFIG_AC97_BUS=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1179,6 +1220,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1227,6 +1269,7 @@ CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1298,6 +1341,7 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
@@ -1337,6 +1381,7 @@ CONFIG_RTC_INTF_DEV=y
 CONFIG_RTC_DRV_R9701=y
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1378,8 +1423,10 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1443,7 +1490,6 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1509,6 +1555,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1520,11 +1567,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -1536,6 +1587,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe80000
 CONFIG_EARLY_PRINTK=y
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1549,7 +1601,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1581,11 +1632,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1648,5 +1701,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sdk7780_defconfig b/arch/sh/configs/sdk7780_defconfig
index 753fb276e9f5..055536b5c5cd 100644
--- a/arch/sh/configs/sdk7780_defconfig
+++ b/arch/sh/configs/sdk7780_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:43:54 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:40:25 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -39,6 +42,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION="_SDK7780"
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,11 +61,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=18
@@ -88,20 +98,21 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
 CONFIG_SLUB_DEBUG=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -110,6 +121,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -122,7 +137,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-CONFIG_LBD=y
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -170,6 +185,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 CONFIG_CPU_SUBTYPE_SH7780=y
@@ -225,6 +241,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -314,7 +331,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x01800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="mem=128M console=tty0 console=ttySC0,115200 ip=bootp root=/dev/nfs nfsroot=192.168.0.1:/home/rootfs"
 
 #
@@ -435,6 +453,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -496,6 +515,7 @@ CONFIG_NET_SCH_FIFO=y
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -503,7 +523,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -516,6 +535,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -677,12 +697,14 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -704,6 +726,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -732,6 +755,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_PCMCIA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -760,7 +784,11 @@ CONFIG_BLK_DEV_DM=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -804,10 +832,7 @@ CONFIG_SMC91X=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -862,12 +887,13 @@ CONFIG_INPUT_EVDEV=y
 #
 CONFIG_INPUT_KEYBOARD=y
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 CONFIG_INPUT_MOUSE=y
 CONFIG_MOUSE_PS2=y
 CONFIG_MOUSE_PS2_ALPS=y
@@ -875,6 +901,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y
 CONFIG_MOUSE_PS2_SYNAPTICS=y
 CONFIG_MOUSE_PS2_TRACKPOINT=y
 # CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
 # CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_APPLETOUCH is not set
@@ -947,6 +974,11 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 CONFIG_POWER_SUPPLY=y
 # CONFIG_POWER_SUPPLY_DEBUG is not set
@@ -954,7 +986,6 @@ CONFIG_POWER_SUPPLY=y
 # CONFIG_BATTERY_DS2760 is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -986,6 +1017,7 @@ CONFIG_SSB_DRIVER_PCICORE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1072,11 +1104,11 @@ CONFIG_LOGO_SUPERH_VGA16=y
 CONFIG_LOGO_SUPERH_CLUT224=y
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 # CONFIG_SND is not set
 CONFIG_SOUND_PRIME=y
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1099,6 +1131,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1149,6 +1182,7 @@ CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_OHCI_HCD is not set
 # CONFIG_USB_UHCI_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
@@ -1278,6 +1312,7 @@ CONFIG_FS_POSIX_ACL=y
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1345,7 +1380,6 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1425,6 +1459,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_UNUSED_SYMBOLS=y
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1461,18 +1496,23 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
@@ -1480,6 +1520,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1495,11 +1536,11 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 # CONFIG_EARLY_PRINTK is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-CONFIG_DEBUG_STACKOVERFLOW=y
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1514,7 +1555,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_HASH=y
@@ -1550,11 +1590,13 @@ CONFIG_CRYPTO_HASH2=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1617,5 +1659,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig
index 8dd2f130e491..1cd1777aa436 100644
--- a/arch/sh/configs/se7206_defconfig
+++ b/arch/sh/configs/se7206_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:46:15 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:45:28 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -39,6 +42,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
@@ -53,12 +62,12 @@ CONFIG_AUDIT_TREE=y
 #
 # RCU Subsystem
 #
-# CONFIG_CLASSIC_RCU is not set
-# CONFIG_TREE_RCU is not set
-CONFIG_PREEMPT_RCU=y
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
 CONFIG_RCU_TRACE=y
-# CONFIG_TREE_RCU_TRACE is not set
-CONFIG_PREEMPT_RCU_TRACE=y
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+CONFIG_TREE_RCU_TRACE=y
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -105,19 +114,21 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 # CONFIG_SLUB is not set
 CONFIG_SLOB=y
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -126,6 +137,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
@@ -137,7 +153,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -185,6 +201,7 @@ CONFIG_CPU_SUBTYPE_SH7206=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -319,7 +336,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC3,115200 ignore_loglevel earlyprintk=serial"
 
 #
@@ -389,6 +407,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -419,6 +438,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -426,7 +446,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -448,9 +467,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -588,10 +607,7 @@ CONFIG_SMC91X=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -647,11 +663,15 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -746,8 +766,10 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -782,8 +804,6 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_CONFIGFS_FS=y
 CONFIG_MISC_FILESYSTEMS=y
@@ -809,7 +829,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -846,6 +865,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -882,20 +902,27 @@ CONFIG_DEBUG_VM=y
 CONFIG_DEBUG_LIST=y
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
@@ -904,6 +931,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -920,10 +948,10 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-CONFIG_DEBUG_STACKOVERFLOW=y
+# CONFIG_STACK_DEBUG is not set
 CONFIG_DEBUG_STACK_USAGE=y
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -938,7 +966,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_HASH=y
@@ -974,11 +1001,13 @@ CONFIG_CRYPTO_HASH2=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1046,5 +1075,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
index 18f46debf92a..5531444b808c 100644
--- a/arch/sh/configs/se7343_defconfig
+++ b/arch/sh/configs/se7343_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:47:07 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:46:55 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -50,11 +59,12 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_GROUP_SCHED=y
@@ -88,18 +98,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_SHMEM is not set
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -108,6 +119,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -119,7 +134,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -135,7 +150,7 @@ CONFIG_DEFAULT_DEADLINE=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="deadline"
-# CONFIG_FREEZER is not set
+CONFIG_FREEZER=y
 
 #
 # System type
@@ -169,6 +184,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -214,6 +230,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -296,7 +313,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200"
 
 #
@@ -316,7 +334,12 @@ CONFIG_BINFMT_ELF=y
 #
 # Power management options (EXPERIMENTAL)
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_PM_RUNTIME=y
 # CONFIG_CPU_IDLE is not set
 CONFIG_NET=y
 
@@ -360,6 +383,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -389,6 +413,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -396,7 +421,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -418,9 +442,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -560,10 +584,7 @@ CONFIG_NETDEVICES=y
 CONFIG_MII=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -671,6 +692,7 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -681,6 +703,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH_MOBILE=y
 # CONFIG_I2C_SIMTEC is not set
@@ -702,20 +725,21 @@ CONFIG_I2C_SH_MOBILE=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -734,8 +758,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -788,6 +814,7 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_LOGO is not set
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
@@ -822,7 +849,6 @@ CONFIG_SND_USB=y
 # CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -845,6 +871,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -877,6 +904,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -891,6 +919,7 @@ CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_OXU210HP_HCD is not set
 CONFIG_USB_ISP116X_HCD=y
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 # CONFIG_USB_R8A66597_HCD is not set
 # CONFIG_USB_HWA_HCD is not set
@@ -990,8 +1019,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -1028,8 +1059,6 @@ CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLBFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
@@ -1062,7 +1091,6 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1140,6 +1168,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1149,8 +1178,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -1160,6 +1192,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
 CONFIG_EARLY_PRINTK=y
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1173,7 +1206,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1205,11 +1237,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1273,5 +1307,6 @@ CONFIG_ZLIB_DEFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7619_defconfig b/arch/sh/configs/se7619_defconfig
index 724bb77c9dc9..6921b199b1d6 100644
--- a/arch/sh/configs/se7619_defconfig
+++ b/arch/sh/configs/se7619_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:47:56 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:50:05 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,17 +40,24 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SYSVIPC is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -73,31 +83,36 @@ CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=1
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -144,6 +159,7 @@ CONFIG_CPU_SUBTYPE_SH7619=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -262,7 +278,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -469,11 +486,15 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -507,7 +528,6 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -559,7 +579,9 @@ CONFIG_RTC_LIB=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -594,7 +616,6 @@ CONFIG_INOTIFY_USER=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 # CONFIG_SYSFS is not set
-# CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
@@ -619,7 +640,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -637,6 +657,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_KERNEL is not set
@@ -645,8 +666,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -654,6 +678,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -680,4 +705,5 @@ CONFIG_ZLIB_INFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7705_defconfig b/arch/sh/configs/se7705_defconfig
index 6ca6a2fc06e9..3abb06879f02 100644
--- a/arch/sh/configs/se7705_defconfig
+++ b/arch/sh/configs/se7705_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:48:18 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:50:52 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 # CONFIG_SYSVIPC is not set
 # CONFIG_POSIX_MQUEUE is not set
@@ -48,11 +57,12 @@ CONFIG_LOCALVERSION_AUTO=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -83,18 +93,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -102,6 +113,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -113,7 +128,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -160,6 +175,7 @@ CONFIG_CPU_SUBTYPE_SH7705=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -205,6 +221,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -289,7 +306,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -355,6 +373,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -384,6 +403,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -391,7 +411,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -409,9 +428,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -547,10 +566,7 @@ CONFIG_STNIC=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -642,10 +658,20 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -656,9 +682,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -692,7 +716,6 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -746,7 +769,9 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -815,7 +840,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -849,6 +873,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_KERNEL is not set
@@ -857,8 +882,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -866,6 +894,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -878,7 +907,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -910,11 +938,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -979,5 +1009,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig
index b8aae11bc8fa..1a43cfecb392 100644
--- a/arch/sh/configs/se7712_defconfig
+++ b/arch/sh/configs/se7712_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:49:00 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:53:32 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -13,6 +13,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -26,7 +27,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -36,6 +39,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -49,11 +58,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -84,18 +94,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_SHMEM is not set
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -104,6 +115,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -115,7 +130,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -162,6 +177,7 @@ CONFIG_CPU_SUBTYPE_SH7712=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -207,6 +223,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -291,7 +308,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
 
 #
@@ -368,6 +386,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -433,6 +452,7 @@ CONFIG_NET_SCH_FIFO=y
 CONFIG_FIB_RULES=y
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -440,7 +460,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -464,9 +483,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -597,7 +616,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -605,6 +623,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 CONFIG_ATA_SFF=y
 # CONFIG_SATA_MV is not set
@@ -658,10 +677,7 @@ CONFIG_SH_ETH=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -719,11 +735,15 @@ CONFIG_HW_RANDOM=m
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -828,8 +848,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -866,8 +888,6 @@ CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLBFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
@@ -900,7 +920,6 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -935,6 +954,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -964,24 +984,30 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -994,14 +1020,13 @@ CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
-# CONFIG_KMEMCHECK is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 # CONFIG_DUMP_CODE is not set
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1016,7 +1041,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=y
@@ -1059,11 +1083,13 @@ CONFIG_CRYPTO_PCBC=m
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1127,5 +1153,6 @@ CONFIG_ZLIB_DEFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7721_defconfig b/arch/sh/configs/se7721_defconfig
index 306e21c4253d..b8a3c8c4bac3 100644
--- a/arch/sh/configs/se7721_defconfig
+++ b/arch/sh/configs/se7721_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:50:49 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:57:11 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -13,6 +13,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -50,11 +59,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_GROUP_SCHED=y
@@ -89,18 +99,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_SHMEM is not set
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -109,6 +120,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -120,7 +135,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -167,6 +182,7 @@ CONFIG_CPU_SUBTYPE_SH7721=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -212,6 +228,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -296,7 +313,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda2"
 
 #
@@ -373,6 +391,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -438,6 +457,7 @@ CONFIG_NET_SCH_FIFO=y
 CONFIG_FIB_RULES=y
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -445,7 +465,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -469,9 +488,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -606,6 +625,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 CONFIG_ATA_SFF=y
 # CONFIG_SATA_MV is not set
@@ -621,10 +641,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_NET_ETHERNET is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -672,12 +689,13 @@ CONFIG_INPUT_EVDEV=y
 #
 CONFIG_INPUT_KEYBOARD=y
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 CONFIG_INPUT_MOUSE=y
 # CONFIG_MOUSE_PS2 is not set
 # CONFIG_MOUSE_SERIAL is not set
@@ -725,6 +743,11 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -762,7 +785,6 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -785,6 +807,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -831,6 +854,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -900,6 +924,7 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
@@ -961,8 +986,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -1002,8 +1029,6 @@ CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLBFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
@@ -1036,7 +1061,6 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 # CONFIG_NETWORK_FILESYSTEMS is not set
 
 #
@@ -1095,6 +1119,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1124,24 +1149,30 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1154,14 +1185,13 @@ CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
-# CONFIG_KMEMCHECK is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 # CONFIG_DUMP_CODE is not set
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1176,7 +1206,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=y
@@ -1219,11 +1248,13 @@ CONFIG_CRYPTO_CBC=y
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1287,5 +1318,6 @@ CONFIG_ZLIB_DEFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7722_defconfig b/arch/sh/configs/se7722_defconfig
index 619438299847..d709b7f35ace 100644
--- a/arch/sh/configs/se7722_defconfig
+++ b/arch/sh/configs/se7722_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 12:54:24 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:57:41 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,7 +30,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -40,6 +43,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,11 +61,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -91,19 +101,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -113,6 +124,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -125,7 +141,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -141,7 +157,7 @@ CONFIG_IOSCHED_NOOP=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
-# CONFIG_FREEZER is not set
+CONFIG_FREEZER=y
 
 #
 # System type
@@ -176,6 +192,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -233,6 +250,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -317,7 +335,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -336,7 +355,13 @@ CONFIG_BINFMT_ELF=y
 #
 # Power management options (EXPERIMENTAL)
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
 # CONFIG_CPU_IDLE is not set
 CONFIG_NET=y
 
@@ -381,6 +406,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -410,6 +436,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -417,7 +444,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -430,6 +456,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
@@ -494,7 +521,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -502,6 +528,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 CONFIG_ATA_SFF=y
 # CONFIG_SATA_MV is not set
@@ -535,10 +562,7 @@ CONFIG_SMC91X=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -577,12 +601,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 #
 CONFIG_INPUT_KEYBOARD=y
 CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -631,10 +656,20 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -645,9 +680,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -681,7 +714,6 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -778,8 +810,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -839,7 +873,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -866,6 +899,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -878,8 +912,11 @@ CONFIG_DEBUG_FS=y
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
@@ -889,6 +926,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 # CONFIG_EARLY_PRINTK is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -902,7 +940,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -934,11 +971,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1002,5 +1041,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7724_defconfig b/arch/sh/configs/se7724_defconfig
index 3ee783a0a075..56b0b9ff9e05 100644
--- a/arch/sh/configs/se7724_defconfig
+++ b/arch/sh/configs/se7724_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Mon Jun 29 16:28:43 2009
+# Linux kernel version: 2.6.31
+# Fri Sep 25 11:50:59 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -42,6 +42,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -54,11 +60,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_GROUP_SCHED=y
@@ -91,20 +98,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
-CONFIG_HAVE_PERF_COUNTERS=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
 # CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -144,7 +150,7 @@ CONFIG_IOSCHED_CFQ=y
 CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="cfq"
-# CONFIG_FREEZER is not set
+CONFIG_FREEZER=y
 
 #
 # System type
@@ -178,6 +184,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -224,6 +231,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -249,6 +257,8 @@ CONFIG_CPU_HAS_FPU=y
 #
 CONFIG_SOLUTION_ENGINE=y
 CONFIG_SH_7724_SOLUTION_ENGINE=y
+# CONFIG_SH_KFR2R09 is not set
+# CONFIG_SH_ECOVEC is not set
 
 #
 # Timer and clock configuration
@@ -269,7 +279,10 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 #
 # DMA support
 #
-# CONFIG_SH_DMA is not set
+CONFIG_SH_DMA_API=y
+CONFIG_SH_DMA=y
+CONFIG_NR_ONCHIP_DMA_CHANNELS=12
+# CONFIG_NR_DMA_CHANNELS_BOOL is not set
 
 #
 # Companion Chips
@@ -305,7 +318,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=tty1 console=ttySC3,115200 root=/dev/nfs ip=dhcp memchunk.vpu=4m"
 
 #
@@ -325,7 +339,13 @@ CONFIG_BINFMT_ELF=y
 #
 # Power management options (EXPERIMENTAL)
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
 # CONFIG_CPU_IDLE is not set
 CONFIG_NET=y
 
@@ -373,6 +393,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -402,6 +423,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -409,7 +431,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -422,6 +443,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -431,9 +453,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -489,6 +511,7 @@ CONFIG_MTD_PHYSMAP=y
 #
 # CONFIG_MTD_DATAFLASH is not set
 # CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
@@ -648,12 +671,10 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
 # CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -697,14 +718,19 @@ CONFIG_INPUT_EVDEV=y
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 CONFIG_KEYBOARD_SH_KEYSC=y
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -754,6 +780,7 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -764,6 +791,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH_MOBILE=y
@@ -786,9 +814,6 @@ CONFIG_I2C_SH_MOBILE=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -838,11 +863,15 @@ CONFIG_GPIOLIB=y
 #
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -862,8 +891,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
 # CONFIG_AB3100_CORE is not set
 # CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
@@ -876,24 +907,24 @@ CONFIG_VIDEO_DEV=y
 CONFIG_VIDEO_V4L2_COMMON=y
 # CONFIG_VIDEO_ALLOW_V4L1 is not set
 CONFIG_VIDEO_V4L1_COMPAT=y
-# CONFIG_DVB_CORE is not set
-CONFIG_VIDEO_MEDIA=y
+CONFIG_DVB_CORE=m
+CONFIG_VIDEO_MEDIA=m
 
 #
 # Multimedia drivers
 #
 # CONFIG_MEDIA_ATTACH is not set
-CONFIG_MEDIA_TUNER=y
+CONFIG_MEDIA_TUNER=m
 # CONFIG_MEDIA_TUNER_CUSTOMISE is not set
-CONFIG_MEDIA_TUNER_SIMPLE=y
-CONFIG_MEDIA_TUNER_TDA8290=y
-CONFIG_MEDIA_TUNER_TDA9887=y
-CONFIG_MEDIA_TUNER_TEA5761=y
-CONFIG_MEDIA_TUNER_TEA5767=y
-CONFIG_MEDIA_TUNER_MT20XX=y
-CONFIG_MEDIA_TUNER_XC2028=y
-CONFIG_MEDIA_TUNER_XC5000=y
-CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_MEDIA_TUNER_MC44S803=m
 CONFIG_VIDEO_V4L2=y
 CONFIG_VIDEOBUF_GEN=y
 CONFIG_VIDEOBUF_DMA_CONTIG=y
@@ -904,6 +935,7 @@ CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
 # CONFIG_VIDEO_VIVI is not set
 # CONFIG_VIDEO_SAA5246A is not set
 # CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_VIDEO_AU0828 is not set
 CONFIG_SOC_CAMERA=y
 # CONFIG_SOC_CAMERA_MT9M001 is not set
 # CONFIG_SOC_CAMERA_MT9M111 is not set
@@ -919,15 +951,18 @@ CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
 CONFIG_USB_GSPCA=m
 # CONFIG_USB_M5602 is not set
 # CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
 # CONFIG_USB_GSPCA_CONEX is not set
 # CONFIG_USB_GSPCA_ETOMS is not set
 # CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
 # CONFIG_USB_GSPCA_MARS is not set
 # CONFIG_USB_GSPCA_MR97310A is not set
 # CONFIG_USB_GSPCA_OV519 is not set
 # CONFIG_USB_GSPCA_OV534 is not set
 # CONFIG_USB_GSPCA_PAC207 is not set
 # CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
 # CONFIG_USB_GSPCA_SONIXB is not set
 # CONFIG_USB_GSPCA_SONIXJ is not set
 # CONFIG_USB_GSPCA_SPCA500 is not set
@@ -957,6 +992,26 @@ CONFIG_USB_PWC_INPUT_EVDEV=y
 # CONFIG_USB_STKWEBCAM is not set
 # CONFIG_USB_S2255 is not set
 # CONFIG_RADIO_ADAPTERS is not set
+CONFIG_DVB_MAX_ADAPTERS=8
+# CONFIG_DVB_DYNAMIC_MINORS is not set
+CONFIG_DVB_CAPTURE_DRIVERS=y
+# CONFIG_TTPCI_EEPROM is not set
+
+#
+# Supported USB Adapters
+#
+# CONFIG_DVB_USB is not set
+# CONFIG_SMS_SIANO_MDTV is not set
+
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+# CONFIG_DVB_B2C2_FLEXCOP is not set
+
+#
+# Supported DVB Frontends
+#
+# CONFIG_DVB_FE_CUSTOMISE is not set
 # CONFIG_DAB is not set
 
 #
@@ -1017,10 +1072,80 @@ CONFIG_LOGO=y
 # CONFIG_LOGO_SUPERH_MONO is not set
 # CONFIG_LOGO_SUPERH_VGA16 is not set
 CONFIG_LOGO_SUPERH_CLUT224=y
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_SUPERH is not set
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_SOC=m
+
+#
+# SoC Audio support for SuperH
+#
+CONFIG_SND_SOC_SH4_FSI=m
+CONFIG_SND_FSI_AK4642=y
+CONFIG_SND_SOC_I2C_AND_SPI=m
+CONFIG_SND_SOC_ALL_CODECS=m
+CONFIG_SND_SOC_WM_HUBS=m
+CONFIG_SND_SOC_AD1836=m
+CONFIG_SND_SOC_AD1938=m
+CONFIG_SND_SOC_AD73311=m
+CONFIG_SND_SOC_AK4104=m
+CONFIG_SND_SOC_AK4535=m
+CONFIG_SND_SOC_AK4642=m
+CONFIG_SND_SOC_CS4270=m
+CONFIG_SND_SOC_L3=m
+CONFIG_SND_SOC_PCM3008=m
+CONFIG_SND_SOC_SPDIF=m
+CONFIG_SND_SOC_SSM2602=m
+CONFIG_SND_SOC_TLV320AIC23=m
+CONFIG_SND_SOC_TLV320AIC26=m
+CONFIG_SND_SOC_TLV320AIC3X=m
+CONFIG_SND_SOC_UDA134X=m
+CONFIG_SND_SOC_UDA1380=m
+CONFIG_SND_SOC_WM8510=m
+CONFIG_SND_SOC_WM8523=m
+CONFIG_SND_SOC_WM8580=m
+CONFIG_SND_SOC_WM8728=m
+CONFIG_SND_SOC_WM8731=m
+CONFIG_SND_SOC_WM8750=m
+CONFIG_SND_SOC_WM8753=m
+CONFIG_SND_SOC_WM8776=m
+CONFIG_SND_SOC_WM8900=m
+CONFIG_SND_SOC_WM8903=m
+CONFIG_SND_SOC_WM8940=m
+CONFIG_SND_SOC_WM8960=m
+CONFIG_SND_SOC_WM8961=m
+CONFIG_SND_SOC_WM8971=m
+CONFIG_SND_SOC_WM8974=m
+CONFIG_SND_SOC_WM8988=m
+CONFIG_SND_SOC_WM8990=m
+CONFIG_SND_SOC_WM8993=m
+CONFIG_SND_SOC_WM9081=m
+CONFIG_SND_SOC_MAX9877=m
+# CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1043,6 +1168,7 @@ CONFIG_USB_HID=y
 # CONFIG_HID_EZKEY is not set
 # CONFIG_HID_KYE is not set
 # CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 # CONFIG_HID_LOGITECH is not set
 # CONFIG_HID_MICROSOFT is not set
@@ -1072,6 +1198,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICEFS is not set
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -1086,9 +1213,11 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 CONFIG_USB_R8A66597_HCD=y
 # CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
 
 #
 # USB Device Class drivers
@@ -1151,9 +1280,46 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
-# CONFIG_USB_GADGET is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_R8A66597=y
+CONFIG_USB_R8A66597=y
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH_EEM is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
 
 #
 # OTG and related infrastructure
@@ -1176,6 +1342,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
 CONFIG_MMC_SPI=y
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1223,6 +1391,7 @@ CONFIG_RTC_DRV_PCF8563=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1279,6 +1448,7 @@ CONFIG_FS_POSIX_ACL=y
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1343,7 +1513,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1423,6 +1592,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1433,8 +1603,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -1442,6 +1615,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1455,7 +1629,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1496,11 +1669,13 @@ CONFIG_CRYPTO_CBC=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1562,5 +1737,6 @@ CONFIG_CRC7=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7750_defconfig b/arch/sh/configs/se7750_defconfig
index 564bf7bdce6b..7bc926c17b79 100644
--- a/arch/sh/configs/se7750_defconfig
+++ b/arch/sh/configs/se7750_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:00:01 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 18:58:58 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -49,11 +58,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -84,18 +94,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -104,6 +115,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -115,7 +130,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -162,6 +177,7 @@ CONFIG_CPU_SUBTYPE_SH7750=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -207,6 +223,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -291,7 +308,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -358,6 +376,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -387,6 +406,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -394,7 +414,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -412,9 +431,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -563,7 +582,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -599,10 +617,7 @@ CONFIG_STNIC=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -665,10 +680,20 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -679,9 +704,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -766,8 +789,10 @@ CONFIG_RTC_LIB=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -838,7 +863,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -885,6 +909,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -894,8 +919,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -903,6 +931,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -916,7 +945,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -948,11 +976,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1016,5 +1046,6 @@ CONFIG_ZLIB_DEFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7751_defconfig b/arch/sh/configs/se7751_defconfig
index eb431c43e994..c20ae5e35c81 100644
--- a/arch/sh/configs/se7751_defconfig
+++ b/arch/sh/configs/se7751_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:02:26 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:01:41 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -49,11 +58,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -87,18 +97,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -107,6 +118,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -118,7 +133,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -165,6 +180,7 @@ CONFIG_CPU_SUBTYPE_SH7751=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -210,6 +226,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -295,7 +312,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00010000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC1,38400"
 
 #
@@ -382,6 +400,7 @@ CONFIG_IP_NF_QUEUE=y
 # CONFIG_IP_NF_ARPTABLES is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -411,6 +430,7 @@ CONFIG_IP_NF_QUEUE=y
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -418,7 +438,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -436,9 +455,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -574,10 +593,7 @@ CONFIG_MII=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -632,10 +648,20 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -646,9 +672,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -734,8 +758,10 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -806,7 +832,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -833,6 +858,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -842,8 +868,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -851,6 +880,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -864,7 +894,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -896,11 +925,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -965,5 +996,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/se7780_defconfig b/arch/sh/configs/se7780_defconfig
index 756beec5fb28..82baeef40a96 100644
--- a/arch/sh/configs/se7780_defconfig
+++ b/arch/sh/configs/se7780_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:03:56 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:03:59 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -48,11 +57,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -81,19 +91,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -101,6 +112,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -112,7 +128,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
+CONFIG_BLK_DEV_BSG=y
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
@@ -159,6 +176,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 CONFIG_CPU_SUBTYPE_SH7780=y
@@ -199,7 +217,6 @@ CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -207,6 +224,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -287,8 +305,9 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00810000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttySC0.115200 root=/dev/sda1"
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
+CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
 
 #
 # Bus options
@@ -382,6 +401,7 @@ CONFIG_IPV6=y
 # CONFIG_BT is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -389,7 +409,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 
@@ -406,9 +425,9 @@ CONFIG_STANDALONE=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -549,6 +568,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SPI_ATTRS is not set
 # CONFIG_SCSI_FC_ATTRS is not set
 # CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
@@ -587,11 +607,13 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -612,6 +634,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD64X is not set
 # CONFIG_PATA_CS5520 is not set
@@ -630,6 +653,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_NS87410 is not set
 # CONFIG_PATA_NS87415 is not set
 # CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -648,8 +672,13 @@ CONFIG_SATA_SIL=y
 #
 
 #
-# A new alternative FireWire stack is available with EXPERIMENTAL=y
+# You can enable one or both FireWire driver stacks.
 #
+
+#
+# See the help texts for more information.
+#
+# CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
 # CONFIG_I2O is not set
 CONFIG_NETDEVICES=y
@@ -724,10 +753,7 @@ CONFIG_NET_PCI=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -821,10 +847,19 @@ CONFIG_UNIX98_PTYS=y
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_IT87 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_SIS5595 is not set
@@ -833,7 +868,6 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT8231 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 CONFIG_THERMAL=y
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
@@ -857,6 +891,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -937,11 +972,11 @@ CONFIG_LOGO_LINUX_CLUT224=y
 CONFIG_LOGO_SUPERH_CLUT224=y
 CONFIG_SOUND=y
 CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
 # CONFIG_SND is not set
 CONFIG_SOUND_PRIME=y
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -964,6 +999,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1009,6 +1045,7 @@ CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_EHCI_ROOT_HUB_TT is not set
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1243,6 +1280,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1253,8 +1291,11 @@ CONFIG_DEBUG_FS=y
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
@@ -1263,6 +1304,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1276,7 +1318,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_NULL is not set
@@ -1309,6 +1350,7 @@ CONFIG_CRYPTO=y
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1371,5 +1413,6 @@ CONFIG_ZLIB_INFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh03_defconfig b/arch/sh/configs/sh03_defconfig
index 7fedaaee861d..dd0e8900afb7 100644
--- a/arch/sh/configs/sh03_defconfig
+++ b/arch/sh/configs/sh03_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:04:41 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:07:14 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,7 +30,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -40,6 +43,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -53,11 +62,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -91,20 +101,22 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=m
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -114,6 +126,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -126,7 +143,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -173,6 +190,7 @@ CONFIG_CPU_SUBTYPE_SH7751=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -218,6 +236,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -302,7 +321,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00004000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs"
 
 #
@@ -382,6 +402,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -412,6 +433,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -419,7 +441,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -432,6 +453,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 # CONFIG_STANDALONE is not set
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
 # CONFIG_FW_LOADER is not set
@@ -591,6 +613,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -603,7 +626,11 @@ CONFIG_SCSI_LOWLEVEL=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -679,6 +706,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -704,10 +732,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -804,10 +829,20 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_I5K_AMB is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
@@ -822,9 +857,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT8231 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -861,6 +894,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -879,7 +913,6 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -944,8 +977,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1011,12 +1046,12 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
@@ -1108,6 +1143,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1119,11 +1155,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -1134,6 +1174,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 # CONFIG_EARLY_PRINTK is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1147,7 +1188,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1189,11 +1229,13 @@ CONFIG_CRYPTO_ECB=m
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1259,5 +1301,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh7710voipgw_defconfig b/arch/sh/configs/sh7710voipgw_defconfig
index c296ca5d95cb..662156ec9211 100644
--- a/arch/sh/configs/sh7710voipgw_defconfig
+++ b/arch/sh/configs/sh7710voipgw_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:06:13 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:11:49 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -49,11 +58,12 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_GROUP_SCHED=y
@@ -87,18 +97,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_SHMEM is not set
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -107,6 +118,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -118,7 +134,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -165,6 +181,7 @@ CONFIG_CPU_SUBTYPE_SH7710=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -210,6 +227,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -292,7 +310,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -374,6 +393,7 @@ CONFIG_NETFILTER_ADVANCED=y
 # CONFIG_IP_NF_ARPTABLES is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -440,6 +460,7 @@ CONFIG_NET_SCH_FIFO=y
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -447,7 +468,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -469,9 +489,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -605,10 +625,7 @@ CONFIG_NET_ETHERNET=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -686,6 +703,11 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -723,7 +745,6 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 # CONFIG_HID_PID is not set
 
@@ -775,8 +796,10 @@ CONFIG_RTC_LIB=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -813,8 +836,6 @@ CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLBFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
@@ -847,7 +868,6 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -874,6 +894,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -883,8 +904,11 @@ CONFIG_DEBUG_FS=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
@@ -893,6 +917,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -906,7 +931,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -938,11 +962,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1006,5 +1032,6 @@ CONFIG_ZLIB_DEFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh7724_generic_defconfig b/arch/sh/configs/sh7724_generic_defconfig
index ba26be1b4134..e06719a30ba1 100644
--- a/arch/sh/configs/sh7724_generic_defconfig
+++ b/arch/sh/configs/sh7724_generic_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:06:48 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:14:00 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -46,14 +55,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-# CONFIG_CLASSIC_RCU is not set
 CONFIG_TREE_RCU=y
-# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
 CONFIG_GROUP_SCHED=y
@@ -92,19 +99,21 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -113,13 +122,18 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -169,6 +183,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -214,7 +229,6 @@ CONFIG_SPARSEMEM_STATIC=y
 #
 # Memory hotplug is currently incompatible with Software Suspend
 #
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -222,6 +236,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -246,6 +261,8 @@ CONFIG_CPU_HAS_FPU=y
 # Board support
 #
 # CONFIG_SH_7724_SOLUTION_ENGINE is not set
+# CONFIG_SH_KFR2R09 is not set
+# CONFIG_SH_ECOVEC is not set
 
 #
 # Timer and clock configuration
@@ -318,7 +335,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -345,6 +363,7 @@ CONFIG_SUSPEND_FREEZER=y
 CONFIG_HIBERNATION_NVS=y
 CONFIG_HIBERNATION=y
 CONFIG_PM_STD_PARTITION=""
+CONFIG_PM_RUNTIME=y
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_CPU_IDLE_GOV_MENU=y
@@ -427,6 +446,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -437,6 +457,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH_MOBILE=y
 # CONFIG_I2C_SIMTEC is not set
@@ -456,20 +477,21 @@ CONFIG_I2C_SH_MOBILE=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -488,8 +510,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -540,6 +564,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -587,7 +612,9 @@ CONFIG_UIO_PDRV_GENIRQ=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -642,6 +669,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -654,11 +682,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -668,6 +700,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -692,4 +725,5 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh7763rdp_defconfig b/arch/sh/configs/sh7763rdp_defconfig
index b1d9b2311e3c..194ff703e23d 100644
--- a/arch/sh/configs/sh7763rdp_defconfig
+++ b/arch/sh/configs/sh7763rdp_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:07:15 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:15:37 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -48,11 +57,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -92,19 +102,21 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -114,6 +126,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -125,7 +142,7 @@ CONFIG_MODULES=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -173,6 +190,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 CONFIG_CPU_SUBTYPE_SH7763=y
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -214,7 +232,6 @@ CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
 # CONFIG_MEMORY_HOTPLUG is not set
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -222,6 +239,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -303,7 +321,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC2,115200 root=/dev/sda1 rootdelay=10"
 
 #
@@ -371,6 +390,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -401,6 +421,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -409,7 +430,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -422,6 +442,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -431,9 +452,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AR7_PARTS is not set
@@ -488,6 +509,7 @@ CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_PHYSMAP=y
 # CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_GPIO_ADDR is not set
 # CONFIG_MTD_PLATRAM is not set
 
 #
@@ -565,7 +587,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -621,10 +642,7 @@ CONFIG_SH_ETH=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -716,11 +734,15 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -830,6 +852,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -899,6 +922,7 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
@@ -923,6 +947,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
@@ -956,8 +982,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1022,7 +1050,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1096,6 +1123,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1107,11 +1135,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_LATENCYTOP is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -1121,6 +1153,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1134,7 +1167,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1166,11 +1198,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1232,5 +1266,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh7770_generic_defconfig b/arch/sh/configs/sh7770_generic_defconfig
index 426a88f7a23b..34bed5541f31 100644
--- a/arch/sh/configs/sh7770_generic_defconfig
+++ b/arch/sh/configs/sh7770_generic_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:08:05 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:17:16 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -37,6 +40,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -45,14 +54,12 @@ CONFIG_SYSVIPC_SYSCTL=y
 #
 # RCU Subsystem
 #
-# CONFIG_CLASSIC_RCU is not set
 CONFIG_TREE_RCU=y
-# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
 CONFIG_GROUP_SCHED=y
@@ -91,19 +98,21 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -112,13 +121,18 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -166,6 +180,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 CONFIG_CPU_SUBTYPE_SH7770=y
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -210,7 +225,6 @@ CONFIG_SPARSEMEM_STATIC=y
 #
 # Memory hotplug is currently incompatible with Software Suspend
 #
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -218,6 +232,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -313,7 +328,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -338,6 +354,7 @@ CONFIG_PM_SLEEP=y
 CONFIG_HIBERNATION_NVS=y
 CONFIG_HIBERNATION=y
 CONFIG_PM_STD_PARTITION=""
+# CONFIG_PM_RUNTIME is not set
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_CPU_IDLE_GOV_MENU=y
@@ -420,6 +437,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -430,6 +448,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_OCORES is not set
 CONFIG_I2C_SH_MOBILE=y
 # CONFIG_I2C_SIMTEC is not set
@@ -449,20 +468,21 @@ CONFIG_I2C_SH_MOBILE=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -481,8 +501,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -533,6 +555,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -580,7 +603,9 @@ CONFIG_UIO_PDRV_GENIRQ=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -635,6 +660,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -647,11 +673,15 @@ CONFIG_STACKTRACE=y
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
@@ -661,6 +691,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -685,4 +716,5 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig
index ed316f602db6..51cbaedf7a56 100644
--- a/arch/sh/configs/sh7785lcr_32bit_defconfig
+++ b/arch/sh/configs/sh7785lcr_32bit_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:08:29 2009
+# Linux kernel version: 2.6.31
+# Fri Sep 25 11:39:20 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,8 +30,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
-CONFIG_IO_TRAPPED=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -41,10 +43,17 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_POSIX_MQUEUE is not set
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -53,11 +62,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -67,8 +77,7 @@ CONFIG_FAIR_GROUP_SCHED=y
 CONFIG_USER_SCHED=y
 # CONFIG_CGROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
@@ -79,7 +88,7 @@ CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
+CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
@@ -93,28 +102,37 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+CONFIG_PERF_COUNTERS=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
-# CONFIG_OPROFILE is not set
+CONFIG_TRACEPOINTS=y
+CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
-# CONFIG_KPROBES is not set
+CONFIG_KPROBES=y
+CONFIG_KRETPROBES=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_GCOV_KERNEL=y
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -127,7 +145,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+# CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -176,6 +194,7 @@ CONFIG_CPU_SHX2=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -215,6 +234,12 @@ CONFIG_PAGE_SIZE_4KB=y
 # CONFIG_PAGE_SIZE_8KB is not set
 # CONFIG_PAGE_SIZE_16KB is not set
 # CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_HUGETLB_PAGE_SIZE_64K=y
+# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
+# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 # CONFIG_FLATMEM_MANUAL is not set
 # CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -223,7 +248,6 @@ CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
 # CONFIG_MEMORY_HOTPLUG is not set
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -231,6 +255,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -256,6 +281,7 @@ CONFIG_CPU_HAS_FPU=y
 #
 # CONFIG_SH_HIGHLANDER is not set
 CONFIG_SH_SH7785LCR=y
+# CONFIG_SH_SH7785LCR_PT is not set
 
 #
 # Timer and clock configuration
@@ -264,14 +290,29 @@ CONFIG_SH_TIMER_TMU=y
 CONFIG_SH_PCLK_FREQ=50000000
 CONFIG_SH_CLK_CPG=y
 CONFIG_TICK_ONESHOT=y
-# CONFIG_NO_HZ is not set
+CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 
 #
 # CPU Frequency scaling
 #
-# CONFIG_CPU_FREQ is not set
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_SH_CPU_FREQ=y
 
 #
 # DMA support
@@ -299,12 +340,12 @@ CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 CONFIG_KEXEC=y
 # CONFIG_CRASH_DUMP is not set
-# CONFIG_SECCOMP is not set
+CONFIG_SECCOMP=y
 # CONFIG_PREEMPT_NONE is not set
 # CONFIG_PREEMPT_VOLUNTARY is not set
 CONFIG_PREEMPT=y
 CONFIG_GUSA=y
-# CONFIG_SPARSE_IRQ is not set
+CONFIG_SPARSE_IRQ=y
 
 #
 # Boot options
@@ -312,7 +353,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -321,8 +363,7 @@ CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
-CONFIG_PCI_LEGACY=y
-# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_STUB is not set
 # CONFIG_PCI_IOV is not set
 # CONFIG_PCCARD is not set
@@ -339,8 +380,13 @@ CONFIG_BINFMT_ELF=y
 #
 # Power management options (EXPERIMENTAL)
 #
-# CONFIG_PM is not set
-# CONFIG_CPU_IDLE is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_HIBERNATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
 CONFIG_NET=y
 
 #
@@ -392,6 +438,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -414,6 +461,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_DROP_MONITOR is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 # CONFIG_IRDA is not set
@@ -421,6 +470,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -429,7 +479,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -442,18 +491,17 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -538,7 +586,8 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_DAC960 is not set
 # CONFIG_BLK_DEV_UMEM is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_SX8 is not set
 # CONFIG_BLK_DEV_UB is not set
@@ -561,7 +610,7 @@ CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
 # CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
-CONFIG_SCSI_PROC_FS=y
+# CONFIG_SCSI_PROC_FS is not set
 
 #
 # SCSI support type (disk, tape, CD-ROM)
@@ -591,6 +640,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -612,6 +662,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -639,6 +690,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -657,7 +709,11 @@ CONFIG_SATA_SIL=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -690,6 +746,7 @@ CONFIG_R8169=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -697,12 +754,7 @@ CONFIG_R8169=y
 # CONFIG_JME is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
+# CONFIG_WLAN is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -739,25 +791,42 @@ CONFIG_INPUT_FF_MEMLESS=m
 # Userland interfaces
 #
 CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
 
 #
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_ADP5588 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
-# CONFIG_INPUT_MOUSE is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
@@ -766,7 +835,12 @@ CONFIG_INPUT_KEYBOARD=y
 #
 # Hardware I/O ports
 #
-# CONFIG_SERIO is not set
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
 # CONFIG_GAMEPORT is not set
 
 #
@@ -777,7 +851,7 @@ CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
 CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_DEVKMEM=y
+# CONFIG_DEVKMEM is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 # CONFIG_NOZOMI is not set
 
@@ -796,12 +870,10 @@ CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
-# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
+# CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
-CONFIG_HW_RANDOM=y
-# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_HW_RANDOM is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
 # CONFIG_RAW_DRIVER is not set
@@ -809,6 +881,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_ALGOPCA=y
@@ -838,6 +911,7 @@ CONFIG_I2C_ALGOPCA=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SH_MOBILE is not set
 # CONFIG_I2C_SIMTEC is not set
@@ -864,21 +938,42 @@ CONFIG_I2C_PCA_PLATFORM=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
-# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_ALIM7101_WDT is not set
+CONFIG_SH_WDT=y
+# CONFIG_SH_WDT_MMAP is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
 #
@@ -896,14 +991,17 @@ CONFIG_MFD_SM501=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
 #
+# CONFIG_VGA_ARB is not set
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -915,12 +1013,11 @@ CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
 # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-CONFIG_FB_SYS_FILLRECT=m
-CONFIG_FB_SYS_COPYAREA=m
-CONFIG_FB_SYS_IMAGEBLIT=m
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
 # CONFIG_FB_FOREIGN_ENDIAN is not set
-CONFIG_FB_SYS_FOPS=m
-CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SYS_FOPS is not set
 # CONFIG_FB_SVGALIB is not set
 # CONFIG_FB_MACMODES is not set
 # CONFIG_FB_BACKLIGHT is not set
@@ -955,7 +1052,7 @@ CONFIG_FB_DEFERRED_IO=y
 # CONFIG_FB_ARK is not set
 # CONFIG_FB_PM3 is not set
 # CONFIG_FB_CARMINE is not set
-CONFIG_FB_SH_MOBILE_LCDC=m
+# CONFIG_FB_SH_MOBILE_LCDC is not set
 CONFIG_FB_SM501=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
@@ -981,14 +1078,112 @@ CONFIG_FONT_8x16=y
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_LOGO_LINUX_CLUT224=y
-# CONFIG_LOGO_SUPERH_MONO is not set
-# CONFIG_LOGO_SUPERH_VGA16 is not set
-# CONFIG_LOGO_SUPERH_CLUT224 is not set
-# CONFIG_SOUND is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_SUPERH_MONO=y
+CONFIG_LOGO_SUPERH_VGA16=y
+CONFIG_LOGO_SUPERH_CLUT224=y
+CONFIG_SOUND=y
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=y
+CONFIG_SND_RAWMIDI=y
+CONFIG_SND_SEQUENCER=y
+# CONFIG_SND_SEQ_DUMMY is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
+CONFIG_SND_DYNAMIC_MINORS=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_RAWMIDI_SEQ=y
+CONFIG_SND_OPL3_LIB_SEQ=y
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_MPU401_UART=y
+CONFIG_SND_OPL3_LIB=y
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_PCI=y
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+CONFIG_SND_CMIPCI=y
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CTXFI is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_LX6464ES is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+# CONFIG_SND_SUPERH is not set
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_SOC is not set
+# CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1001,34 +1196,39 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_A4TECH=y
-CONFIG_HID_APPLE=y
-CONFIG_HID_BELKIN=y
-CONFIG_HID_CHERRY=y
-CONFIG_HID_CHICONY=y
-CONFIG_HID_CYPRESS=y
-# CONFIG_HID_DRAGONRISE is not set
-CONFIG_HID_EZKEY=y
-# CONFIG_HID_KYE is not set
-CONFIG_HID_GYRATION=y
-# CONFIG_HID_KENSINGTON is not set
-CONFIG_HID_LOGITECH=y
+CONFIG_HID_A4TECH=m
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+CONFIG_HID_CYPRESS=m
+CONFIG_HID_DRAGONRISE=m
+# CONFIG_DRAGONRISE_FF is not set
+CONFIG_HID_EZKEY=m
+CONFIG_HID_KYE=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_TWINHAN=m
+CONFIG_HID_KENSINGTON=m
+CONFIG_HID_LOGITECH=m
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
-CONFIG_HID_MICROSOFT=y
-CONFIG_HID_MONTEREY=y
-# CONFIG_HID_NTRIG is not set
-CONFIG_HID_PANTHERLORD=y
+CONFIG_HID_MICROSOFT=m
+CONFIG_HID_MONTEREY=m
+CONFIG_HID_NTRIG=m
+CONFIG_HID_PANTHERLORD=m
 # CONFIG_PANTHERLORD_FF is not set
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-# CONFIG_HID_GREENASIA is not set
-# CONFIG_HID_SMARTJOYPLUS is not set
-# CONFIG_HID_TOPSEED is not set
+CONFIG_HID_PETALYNX=m
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SONY=m
+CONFIG_HID_SUNPLUS=m
+CONFIG_HID_GREENASIA=m
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_SMARTJOYPLUS=m
+# CONFIG_SMARTJOYPLUS_FF is not set
+CONFIG_HID_TOPSEED=m
 # CONFIG_HID_THRUSTMASTER is not set
-# CONFIG_HID_ZEROPLUS is not set
+CONFIG_HID_ZEROPLUS=m
+# CONFIG_ZEROPLUS_FF is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1040,13 +1240,14 @@ CONFIG_USB=y
 #
 # Miscellaneous USB options
 #
-CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICEFS is not set
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
-CONFIG_USB_MON=y
+# CONFIG_USB_MON is not set
 # CONFIG_USB_WUSB is not set
 # CONFIG_USB_WUSB_CBAF is not set
 
@@ -1061,10 +1262,8 @@ CONFIG_USB_EHCI_HCD=m
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
-CONFIG_USB_OHCI_HCD=m
-# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
-CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
 # CONFIG_USB_UHCI_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 CONFIG_USB_R8A66597_HCD=y
@@ -1133,7 +1332,7 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
-CONFIG_USB_TEST=m
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
@@ -1143,7 +1342,29 @@ CONFIG_USB_TEST=m
 #
 # CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
-# CONFIG_MMC is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_SDHCI=m
+# CONFIG_MMC_SDHCI_PCI is not set
+CONFIG_MMC_SDHCI_PLTFM=m
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
+# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_CB710 is not set
+# CONFIG_MMC_VIA_SDMMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
@@ -1179,6 +1400,7 @@ CONFIG_RTC_DRV_RS5C372=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1203,9 +1425,20 @@ CONFIG_RTC_DRV_RS5C372=y
 #
 # CONFIG_RTC_DRV_SH is not set
 # CONFIG_RTC_DRV_GENERIC is not set
-# CONFIG_DMADEVICES is not set
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
 # CONFIG_AUXDISPLAY is not set
-# CONFIG_UIO is not set
+CONFIG_UIO=m
+# CONFIG_UIO_CIF is not set
+# CONFIG_UIO_PDRV is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_AEC is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_UIO_PCI_GENERIC is not set
 
 #
 # TI VLYNQ
@@ -1225,13 +1458,15 @@ CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_SECURITY is not set
 # CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
+# CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1275,9 +1510,9 @@ CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
-# CONFIG_HUGETLBFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-# CONFIG_CONFIGFS_FS is not set
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_CONFIGFS_FS=y
 CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
@@ -1297,20 +1532,20 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
+CONFIG_NFSD=m
 CONFIG_NFSD_V3=y
 # CONFIG_NFSD_V3_ACL is not set
-CONFIG_NFSD_V4=y
+# CONFIG_NFSD_V4 is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
+CONFIG_EXPORTFS=m
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
@@ -1373,85 +1608,69 @@ CONFIG_NLS_ISO8859_1=y
 # Kernel hacking
 #
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
-# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
-CONFIG_DETECT_SOFTLOCKUP=y
-# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
-CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
-CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
-CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_DEBUG_KERNEL is not set
 CONFIG_SCHED_DEBUG=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_TIMER_STATS is not set
-# CONFIG_DEBUG_OBJECTS is not set
-# CONFIG_DEBUG_SLAB is not set
-CONFIG_DEBUG_PREEMPT=y
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_PROVE_LOCKING is not set
-# CONFIG_LOCK_STAT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_SCHEDSTATS=y
+CONFIG_TRACE_IRQFLAGS=y
+CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
-# CONFIG_DEBUG_LIST is not set
-# CONFIG_DEBUG_SG is not set
-# CONFIG_DEBUG_NOTIFIERS is not set
-# CONFIG_FRAME_POINTER is not set
-# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_BACKTRACE_SELF_TEST is not set
-# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
-# CONFIG_FAULT_INJECTION is not set
-# CONFIG_LATENCYTOP is not set
+CONFIG_LATENCYTOP=y
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-# CONFIG_PAGE_POISONING is not set
+CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_TRACER_MAX_TRACE=y
+CONFIG_RING_BUFFER=y
+CONFIG_EVENT_TRACING=y
+CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
+CONFIG_TRACING=y
+CONFIG_GENERIC_TRACER=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
-# CONFIG_FUNCTION_TRACER is not set
-# CONFIG_IRQSOFF_TRACER is not set
+CONFIG_FUNCTION_TRACER=y
+CONFIG_FUNCTION_GRAPH_TRACER=y
+CONFIG_IRQSOFF_TRACER=y
 # CONFIG_PREEMPT_TRACER is not set
-# CONFIG_SCHED_TRACER is not set
-# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+CONFIG_SCHED_TRACER=y
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
 # CONFIG_PROFILE_ALL_BRANCHES is not set
-# CONFIG_STACK_TRACER is not set
-# CONFIG_KMEMTRACE is not set
-# CONFIG_WORKQUEUE_TRACER is not set
+CONFIG_STACK_TRACER=y
+CONFIG_KMEMTRACE=y
+CONFIG_WORKQUEUE_TRACER=y
 # CONFIG_BLK_DEV_IO_TRACE is not set
+CONFIG_DYNAMIC_FTRACE=y
+# CONFIG_FUNCTION_PROFILER is not set
+CONFIG_FTRACE_MCOUNT_RECORD=y
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_RING_BUFFER_BENCHMARK is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
-# CONFIG_KGDB is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
-# CONFIG_DEBUG_STACK_USAGE is not set
-# CONFIG_4KSTACKS is not set
-# CONFIG_DUMP_CODE is not set
-# CONFIG_SH_NO_BSS_INIT is not set
+CONFIG_DWARF_UNWINDER=y
+CONFIG_MCOUNT=y
 
 #
 # Security options
@@ -1465,7 +1684,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1507,11 +1725,13 @@ CONFIG_CRYPTO_CBC=y
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1556,7 +1776,7 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
-# CONFIG_BINARY_PRINTF is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
@@ -1573,5 +1793,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/sh7785lcr_defconfig b/arch/sh/configs/sh7785lcr_defconfig
index 004e6f5e8a68..8c2c47ed3991 100644
--- a/arch/sh/configs/sh7785lcr_defconfig
+++ b/arch/sh/configs/sh7785lcr_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:09:34 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:23:18 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,8 +30,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
-CONFIG_IO_TRAPPED=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -41,6 +43,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -53,11 +61,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -93,19 +102,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -115,6 +125,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -127,7 +141,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -176,6 +190,7 @@ CONFIG_CPU_SHX2=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -224,6 +239,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -306,7 +322,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -386,6 +403,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -415,6 +433,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -423,7 +442,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -436,6 +454,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
@@ -445,9 +464,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -585,6 +604,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 # CONFIG_SATA_SIL24 is not set
@@ -606,6 +626,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -633,6 +654,7 @@ CONFIG_SATA_SIL=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -651,7 +673,11 @@ CONFIG_SATA_SIL=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -684,6 +710,7 @@ CONFIG_R8169=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -691,10 +718,7 @@ CONFIG_R8169=y
 # CONFIG_JME is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -744,13 +768,17 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -803,6 +831,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_ALGOPCA=y
@@ -832,6 +861,7 @@ CONFIG_I2C_ALGOPCA=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SH_MOBILE is not set
 # CONFIG_I2C_SIMTEC is not set
@@ -858,20 +888,21 @@ CONFIG_I2C_PCA_PLATFORM=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -890,14 +921,17 @@ CONFIG_MFD_SM501=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -982,7 +1016,6 @@ CONFIG_LOGO_LINUX_CLUT224=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1005,6 +1038,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1055,6 +1089,7 @@ CONFIG_USB_EHCI_HCD=m
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=m
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1173,6 +1208,7 @@ CONFIG_RTC_DRV_RS5C372=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1224,8 +1260,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 CONFIG_FS_POSIX_ACL=y
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1291,12 +1329,12 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
@@ -1372,6 +1410,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1407,18 +1446,23 @@ CONFIG_DEBUG_PREEMPT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
@@ -1426,6 +1470,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1440,11 +1485,11 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 # CONFIG_DUMP_CODE is not set
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1459,7 +1504,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1501,11 +1545,13 @@ CONFIG_CRYPTO_CBC=y
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1567,5 +1613,6 @@ CONFIG_CRC32=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/shmin_defconfig b/arch/sh/configs/shmin_defconfig
index ad7d60972fcf..92115e612750 100644
--- a/arch/sh/configs/shmin_defconfig
+++ b/arch/sh/configs/shmin_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:10:33 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:27:17 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -13,6 +13,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -26,7 +27,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -36,6 +39,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 # CONFIG_SYSVIPC is not set
 # CONFIG_POSIX_MQUEUE is not set
@@ -46,11 +55,12 @@ CONFIG_LOCALVERSION_AUTO=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -77,18 +87,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_SHMEM is not set
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 # CONFIG_SLUB is not set
 CONFIG_SLOB=y
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -96,12 +107,16 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_BASE_SMALL=1
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -148,6 +163,7 @@ CONFIG_CPU_SUBTYPE_SH7706=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -193,6 +209,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -274,7 +291,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00210000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC1,115200 root=1f01 mtdparts=phys_mapped_flash:64k(firm)ro,-(sys) netdev=34,0x300,eth0 "
 
 #
@@ -339,6 +357,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -368,6 +387,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -375,7 +395,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -529,10 +548,7 @@ CONFIG_NET_ETHERNET=y
 # CONFIG_KS8842 is not set
 CONFIG_NETDEV_1000=y
 CONFIG_NETDEV_10000=y
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -591,11 +607,15 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -672,7 +692,9 @@ CONFIG_RTC_LIB=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -709,8 +731,6 @@ CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
 CONFIG_PROC_PAGE_MONITOR=y
 # CONFIG_SYSFS is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLBFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_MISC_FILESYSTEMS=y
@@ -732,7 +752,6 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -768,6 +787,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_KERNEL is not set
@@ -775,8 +795,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -785,6 +808,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 CONFIG_EARLY_PRINTK=y
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -797,7 +821,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -828,11 +851,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -895,5 +920,6 @@ CONFIG_ZLIB_INFLATE=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/shx3_defconfig b/arch/sh/configs/shx3_defconfig
index 207b0c9a8cdf..e3858d757d5e 100644
--- a/arch/sh/configs/shx3_defconfig
+++ b/arch/sh/configs/shx3_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:11:03 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:29:26 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -30,7 +31,9 @@ CONFIG_LOCKDEP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -40,6 +43,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -55,12 +64,12 @@ CONFIG_AUDIT_TREE=y
 #
 # RCU Subsystem
 #
-# CONFIG_CLASSIC_RCU is not set
-# CONFIG_TREE_RCU is not set
-CONFIG_PREEMPT_RCU=y
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
 CONFIG_RCU_TRACE=y
-# CONFIG_TREE_RCU_TRACE is not set
-CONFIG_PREEMPT_RCU_TRACE=y
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+CONFIG_TREE_RCU_TRACE=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -111,19 +120,21 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+CONFIG_EVENT_PROFILE=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 # CONFIG_SLUB is not set
 CONFIG_SLOB=y
 CONFIG_PROFILING=y
 CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
 CONFIG_KPROBES=y
@@ -135,6 +146,11 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
@@ -147,7 +163,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -196,6 +212,7 @@ CONFIG_CPU_SHX3=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -256,6 +273,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -353,7 +371,8 @@ CONFIG_PREEMPT=y
 CONFIG_ZERO_PAGE_OFFSET=0x00010000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00010000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=bios ignore_loglevel"
 
 #
@@ -438,6 +457,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -489,6 +509,7 @@ CONFIG_CAN_VCAN=m
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
@@ -562,7 +583,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -570,6 +590,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 CONFIG_ATA_SFF=y
 # CONFIG_SATA_MV is not set
@@ -602,12 +623,10 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
 # CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -675,6 +694,7 @@ CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_TCG_TPM is not set
 CONFIG_I2C=m
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
 
@@ -685,6 +705,7 @@ CONFIG_I2C_HELPER_AUTO=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SH_MOBILE is not set
 # CONFIG_I2C_SIMTEC is not set
@@ -706,9 +727,6 @@ CONFIG_I2C_HELPER_AUTO=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
@@ -729,11 +747,15 @@ CONFIG_SPI_MASTER=y
 #
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -762,8 +784,12 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_AB3100_CORE is not set
+# CONFIG_EZX_PCAP is not set
 # CONFIG_REGULATOR is not set
 # CONFIG_MEDIA_SUPPORT is not set
 
@@ -808,6 +834,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 CONFIG_USB_R8A66597_HCD=m
 # CONFIG_USB_HWA_HCD is not set
@@ -862,6 +889,7 @@ CONFIG_USB_R8A66597_HCD=m
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 CONFIG_USB_GADGET=y
@@ -876,10 +904,11 @@ CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_LH7A40X is not set
 # CONFIG_USB_GADGET_OMAP is not set
 # CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
 # CONFIG_USB_GADGET_PXA27X is not set
 # CONFIG_USB_GADGET_S3C_HSOTG is not set
-# CONFIG_USB_GADGET_S3C2410 is not set
 # CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
 CONFIG_USB_GADGET_M66592=y
 CONFIG_USB_M66592=y
 # CONFIG_USB_GADGET_AMD5536UDC is not set
@@ -939,6 +968,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -950,6 +980,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
 # CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
 
 #
 # Platform RTC drivers
@@ -1002,8 +1033,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1063,7 +1096,6 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1129,6 +1161,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1164,22 +1197,29 @@ CONFIG_DEBUG_VM=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_KPROBES_SANITY_TEST is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_LKDTM is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_RING_BUFFER=y
 CONFIG_EVENT_TRACING=y
 CONFIG_CONTEXT_SWITCH_TRACER=y
+CONFIG_RING_BUFFER_ALLOW_SWAP=y
 CONFIG_TRACING=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
@@ -1188,6 +1228,7 @@ CONFIG_FTRACE=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1205,10 +1246,10 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 CONFIG_EARLY_PRINTK=y
-# CONFIG_DEBUG_BOOTMEM is not set
-CONFIG_DEBUG_STACKOVERFLOW=y
+# CONFIG_STACK_DEBUG is not set
 CONFIG_DEBUG_STACK_USAGE=y
 CONFIG_DUMP_CODE=y
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1223,7 +1264,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 # CONFIG_CRYPTO_MANAGER is not set
 # CONFIG_CRYPTO_MANAGER2 is not set
 # CONFIG_CRYPTO_GF128MUL is not set
@@ -1255,11 +1295,13 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1322,5 +1364,6 @@ CONFIG_AUDIT_GENERIC=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/snapgear_defconfig b/arch/sh/configs/snapgear_defconfig
index ca3c88a88021..cb919a0de4b2 100644
--- a/arch/sh/configs/snapgear_defconfig
+++ b/arch/sh/configs/snapgear_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:11:58 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:33:00 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 # CONFIG_SWAP is not set
 # CONFIG_SYSVIPC is not set
 # CONFIG_POSIX_MQUEUE is not set
@@ -48,11 +57,12 @@ CONFIG_LOCALVERSION_AUTO=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -86,19 +96,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
@@ -106,6 +117,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -113,7 +128,7 @@ CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -160,6 +175,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -205,6 +221,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -297,7 +314,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -359,6 +377,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -388,6 +407,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 # CONFIG_WIRELESS_EXT is not set
 # CONFIG_LIB80211 is not set
@@ -395,7 +415,6 @@ CONFIG_WIRELESS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -534,7 +553,11 @@ CONFIG_HAVE_IDE=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -599,10 +622,7 @@ CONFIG_8139TOO_PIO=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -686,11 +706,15 @@ CONFIG_LEGACY_PTY_COUNT=256
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -712,6 +736,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -732,7 +757,44 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 CONFIG_RTC_LIB=y
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+CONFIG_RTC_DRV_DS1302=y
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SH is not set
+# CONFIG_RTC_DRV_GENERIC is not set
 # CONFIG_DMADEVICES is not set
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
@@ -754,8 +816,10 @@ CONFIG_EXT2_FS=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 # CONFIG_DNOTIFY is not set
@@ -820,7 +884,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -847,6 +910,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -856,8 +920,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -865,6 +932,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -893,5 +961,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/systemh_defconfig b/arch/sh/configs/systemh_defconfig
index 5d970263c096..b9fe960309f5 100644
--- a/arch/sh/configs/systemh_defconfig
+++ b/arch/sh/configs/systemh_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:12:28 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:35:03 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -27,7 +28,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 # CONFIG_SYSVIPC is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
@@ -45,11 +54,12 @@ CONFIG_SWAP=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -83,18 +93,19 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -103,6 +114,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -115,7 +130,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -162,6 +177,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -207,6 +223,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -294,7 +311,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -402,10 +420,20 @@ CONFIG_HW_RANDOM=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -416,9 +444,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -495,7 +521,9 @@ CONFIG_RTC_LIB=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -559,7 +587,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -577,6 +604,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -586,8 +614,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -595,6 +626,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -623,4 +655,5 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig
index 7ad080e820ce..2ca79ed9fb62 100644
--- a/arch/sh/configs/titan_defconfig
+++ b/arch/sh/configs/titan_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:12:54 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:36:36 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -28,7 +29,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -38,6 +41,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -50,11 +59,12 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
@@ -90,19 +100,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -111,6 +122,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -123,7 +138,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -170,6 +185,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -215,6 +231,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -307,7 +324,8 @@ CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x009e0000
 CONFIG_ENTRY_OFFSET=0x00001000
 # CONFIG_UBC_WAKEUP is not set
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf rw"
 
 #
@@ -509,6 +527,7 @@ CONFIG_IP6_NF_RAW=m
 # CONFIG_BRIDGE_NF_EBTABLES is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 CONFIG_STP=y
@@ -595,6 +614,7 @@ CONFIG_NET_SCH_FIFO=y
 CONFIG_FIB_RULES=y
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -603,7 +623,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -616,6 +635,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=m
@@ -628,9 +648,9 @@ CONFIG_CONNECTOR=m
 CONFIG_MTD=m
 CONFIG_MTD_DEBUG=y
 CONFIG_MTD_DEBUG_VERBOSE=0
+# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_CONCAT is not set
 # CONFIG_MTD_PARTITIONS is not set
-# CONFIG_MTD_TESTS is not set
 
 #
 # User Modules And Translation Layers
@@ -820,6 +840,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_DC390T is not set
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -832,7 +853,11 @@ CONFIG_SCSI_LOWLEVEL=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -931,6 +956,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -956,10 +982,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_SFC is not set
 # CONFIG_BE2NET is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -1087,10 +1110,20 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_I5K_AMB is not set
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
@@ -1105,9 +1138,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT8231 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 # CONFIG_WATCHDOG_NOWAYOUT is not set
 
@@ -1149,6 +1180,7 @@ CONFIG_SSB_POSSIBLE=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1167,7 +1199,6 @@ CONFIG_DUMMY_CONSOLE=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1217,6 +1248,7 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1416,8 +1448,10 @@ CONFIG_XFS_FS=m
 # CONFIG_XFS_POSIX_ACL is not set
 # CONFIG_XFS_RT is not set
 # CONFIG_XFS_DEBUG is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1489,7 +1523,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y
 CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1591,6 +1624,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1621,23 +1655,29 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 # CONFIG_FRAME_POINTER is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 CONFIG_FTRACE=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
@@ -1650,14 +1690,13 @@ CONFIG_BRANCH_PROFILE_NONE=y
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
-# CONFIG_KMEMCHECK is not set
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 # CONFIG_DUMP_CODE is not set
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1672,7 +1711,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=y
@@ -1715,11 +1753,13 @@ CONFIG_CRYPTO_ECB=y
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_GHASH is not set
 CONFIG_CRYPTO_MD4=m
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_MICHAEL_MIC=y
@@ -1790,5 +1830,6 @@ CONFIG_TEXTSEARCH_FSM=m
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/ul2_defconfig b/arch/sh/configs/ul2_defconfig
index 608fe563614c..b012ca77f029 100644
--- a/arch/sh/configs/ul2_defconfig
+++ b/arch/sh/configs/ul2_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:14:36 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:42:33 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,6 +14,7 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 # CONFIG_GENERIC_GPIO is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
@@ -29,7 +30,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -40,6 +43,12 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -52,11 +61,12 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -91,19 +101,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -113,6 +124,10 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -125,7 +140,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -141,7 +156,7 @@ CONFIG_IOSCHED_NOOP=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
-# CONFIG_FREEZER is not set
+CONFIG_FREEZER=y
 
 #
 # System type
@@ -176,6 +191,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -233,6 +249,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -314,7 +331,8 @@ CONFIG_GUSA=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE_OVERWRITE=y
+# CONFIG_CMDLINE_EXTEND is not set
 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/nfs ip=dhcp"
 
 #
@@ -334,7 +352,13 @@ CONFIG_BINFMT_ELF=y
 #
 # Power management options (EXPERIMENTAL)
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_HIBERNATION is not set
+CONFIG_PM_RUNTIME=y
 # CONFIG_CPU_IDLE is not set
 CONFIG_NET=y
 
@@ -382,6 +406,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -411,19 +436,17 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
 # CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_DEFAULT_PS_VALUE=1
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
 CONFIG_LIB80211=m
 # CONFIG_LIB80211_DEBUG is not set
 CONFIG_MAC80211=y
-CONFIG_MAC80211_DEFAULT_PS=y
-CONFIG_MAC80211_DEFAULT_PS_VALUE=1
-
-#
-# Rate control algorithm selection
-#
 CONFIG_MAC80211_RC_PID=y
 # CONFIG_MAC80211_RC_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT_PID=y
@@ -444,6 +467,7 @@ CONFIG_MAC80211_RC_DEFAULT="pid"
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 CONFIG_FW_LOADER=y
@@ -453,9 +477,9 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -590,7 +614,6 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_BNX2_ISCSI is not set
 # CONFIG_LIBFC is not set
 # CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -598,6 +621,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 CONFIG_ATA_SFF=y
 # CONFIG_SATA_MV is not set
@@ -631,10 +655,7 @@ CONFIG_MII=y
 # CONFIG_KS8842 is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 CONFIG_WLAN_80211=y
 CONFIG_LIBERTAS=m
@@ -648,12 +669,13 @@ CONFIG_LIBERTAS_DEBUG=y
 # CONFIG_RTL8187 is not set
 # CONFIG_MAC80211_HWSIM is not set
 # CONFIG_P54_COMMON is not set
-# CONFIG_AR9170_USB is not set
+# CONFIG_ATH_COMMON is not set
 # CONFIG_HOSTAP is not set
 # CONFIG_B43 is not set
 # CONFIG_B43LEGACY is not set
 # CONFIG_ZD1211RW is not set
 # CONFIG_RT2X00 is not set
+# CONFIG_WL12XX is not set
 # CONFIG_IWM is not set
 
 #
@@ -750,10 +772,20 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -764,9 +796,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -813,6 +843,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICEFS is not set
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
@@ -827,9 +858,9 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 # CONFIG_USB_SL811_HCD is not set
 CONFIG_USB_R8A66597_HCD=y
-# CONFIG_SUPERH_ON_CHIP_R8A66597 is not set
 # CONFIG_USB_HWA_HCD is not set
 
 #
@@ -893,6 +924,7 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
@@ -917,6 +949,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_AT91 is not set
+# CONFIG_MMC_ATMELMCI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
 # CONFIG_ACCESSIBILITY is not set
@@ -949,8 +983,10 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 # CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1014,7 +1050,6 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1091,6 +1126,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
@@ -1103,8 +1139,11 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DMA_API_DEBUG is not set
@@ -1112,6 +1151,7 @@ CONFIG_TRACING_SUPPORT=y
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DWARF_UNWINDER is not set
 
 #
 # Security options
@@ -1125,7 +1165,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1167,11 +1206,13 @@ CONFIG_CRYPTO_ECB=y
 #
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 # CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
 CONFIG_CRYPTO_MICHAEL_MIC=y
@@ -1235,5 +1276,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
index ee1987e6cc59..9f8aee5bc559 100644
--- a/arch/sh/configs/urquell_defconfig
+++ b/arch/sh/configs/urquell_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30
-# Thu Jun 18 13:15:28 2009
+# Linux kernel version: 2.6.31
+# Thu Sep 24 19:46:13 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -14,11 +14,13 @@ CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_IRQ_PER_CPU=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 # CONFIG_ARCH_SUSPEND_POSSIBLE is not set
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_SMP=y
 CONFIG_SYS_SUPPORTS_NUMA=y
 CONFIG_SYS_SUPPORTS_PCI=y
 CONFIG_SYS_SUPPORTS_TMU=y
@@ -29,7 +31,9 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -39,6 +43,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
@@ -54,14 +64,12 @@ CONFIG_AUDIT_TREE=y
 #
 # RCU Subsystem
 #
-# CONFIG_CLASSIC_RCU is not set
 CONFIG_TREE_RCU=y
-# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
 # CONFIG_RCU_TRACE is not set
 CONFIG_RCU_FANOUT=32
 # CONFIG_RCU_FANOUT_EXACT is not set
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -111,20 +119,20 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
 
 #
-# Performance Counters
+# Kernel Performance Events And Counters
 #
+CONFIG_PERF_EVENTS=y
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-CONFIG_TRACEPOINTS=y
-CONFIG_MARKERS=y
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -134,6 +142,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
 CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
@@ -146,7 +159,7 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
-# CONFIG_LBD is not set
+CONFIG_LBDAF=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -195,6 +208,7 @@ CONFIG_CPU_SHX3=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
 # CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7757 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -244,7 +258,6 @@ CONFIG_SPARSEMEM=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 CONFIG_SPARSEMEM_STATIC=y
 # CONFIG_MEMORY_HOTPLUG is not set
-CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_MIGRATION=y
 # CONFIG_PHYS_ADDR_T_64BIT is not set
@@ -252,6 +265,7 @@ CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=2
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_KSM is not set
 CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 
 #
@@ -322,6 +336,7 @@ CONFIG_SCHED_HRTICK=y
 CONFIG_KEXEC=y
 # CONFIG_CRASH_DUMP is not set
 CONFIG_SECCOMP=y
+# CONFIG_SMP is not set
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
@@ -334,7 +349,8 @@ CONFIG_SPARSE_IRQ=y
 CONFIG_ZERO_PAGE_OFFSET=0x00001000
 CONFIG_BOOT_LINK_OFFSET=0x00800000
 CONFIG_ENTRY_OFFSET=0x00001000
-# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_CMDLINE_OVERWRITE is not set
+# CONFIG_CMDLINE_EXTEND is not set
 
 #
 # Bus options
@@ -343,6 +359,8 @@ CONFIG_PCI=y
 # CONFIG_SH_PCIDMA_NONCOHERENT is not set
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCIEAER=y
+# CONFIG_PCIE_ECRC is not set
+# CONFIG_PCIEAER_INJECT is not set
 CONFIG_PCIEASPM=y
 CONFIG_PCIEASPM_DEBUG=y
 # CONFIG_ARCH_SUPPORTS_MSI is not set
@@ -367,6 +385,7 @@ CONFIG_BINFMT_MISC=y
 CONFIG_PM=y
 # CONFIG_PM_DEBUG is not set
 # CONFIG_HIBERNATION is not set
+# CONFIG_PM_RUNTIME is not set
 CONFIG_CPU_IDLE=y
 CONFIG_CPU_IDLE_GOV_LADDER=y
 CONFIG_NET=y
@@ -420,6 +439,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -442,7 +462,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
-# CONFIG_NET_DROP_MONITOR is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 # CONFIG_IRDA is not set
@@ -450,6 +469,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_AF_RXRPC is not set
 CONFIG_WIRELESS=y
 # CONFIG_CFG80211 is not set
+CONFIG_CFG80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -458,7 +478,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y
 #
 # CFG80211 needs to be enabled for MAC80211
 #
-CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
@@ -471,6 +490,7 @@ CONFIG_MAC80211_DEFAULT_PS_VALUE=0
 # Generic Driver Options
 #
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_FW_LOADER is not set
@@ -480,9 +500,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_TESTS is not set
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -620,6 +640,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
 CONFIG_SATA_PMP=y
 # CONFIG_SATA_AHCI is not set
 CONFIG_SATA_SIL24=y
@@ -641,6 +662,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_ALI is not set
 # CONFIG_PATA_AMD is not set
 # CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATP867X is not set
 # CONFIG_PATA_ATIIXP is not set
 # CONFIG_PATA_CMD640_PCI is not set
 # CONFIG_PATA_CMD64X is not set
@@ -668,6 +690,7 @@ CONFIG_ATA_SFF=y
 # CONFIG_PATA_OPTIDMA is not set
 # CONFIG_PATA_PDC_OLD is not set
 # CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RDC is not set
 # CONFIG_PATA_RZ1000 is not set
 # CONFIG_PATA_SC1200 is not set
 # CONFIG_PATA_SERVERWORKS is not set
@@ -686,7 +709,11 @@ CONFIG_ATA_SFF=y
 #
 
 #
-# Enable only one of the two stacks, unless you know what you are doing
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# See the help texts for more information.
 #
 # CONFIG_FIREWIRE is not set
 # CONFIG_IEEE1394 is not set
@@ -782,6 +809,7 @@ CONFIG_SKY2_DEBUG=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
@@ -789,10 +817,7 @@ CONFIG_SKY2_DEBUG=y
 # CONFIG_JME is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
+CONFIG_WLAN=y
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
 
@@ -842,14 +867,19 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # Input Device Drivers
 #
 CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
 # CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_QT2160 is not set
 # CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
-# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
 # CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -902,6 +932,7 @@ CONFIG_HW_RANDOM=y
 CONFIG_DEVPORT=y
 CONFIG_I2C=y
 CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
 # CONFIG_I2C_CHARDEV is not set
 CONFIG_I2C_HELPER_AUTO=y
 CONFIG_I2C_ALGOPCA=y
@@ -931,6 +962,7 @@ CONFIG_I2C_ALGOPCA=y
 #
 # I2C system bus drivers (mostly embedded / system-on-chip)
 #
+# CONFIG_I2C_DESIGNWARE is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_SH_MOBILE is not set
@@ -958,15 +990,17 @@ CONFIG_I2C_PCA_PLATFORM=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_PCF8575 is not set
-# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
 # CONFIG_DEBUG_GPIO is not set
@@ -987,14 +1021,24 @@ CONFIG_GPIOLIB=y
 # PCI GPIO expanders:
 #
 # CONFIG_GPIO_BT8XX is not set
+# CONFIG_GPIO_LANGWELL is not set
 
 #
 # SPI GPIO expanders:
 #
+
+#
+# AC97 GPIO expanders:
+#
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADM1021 is not set
@@ -1045,6 +1089,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADS7828 is not set
 # CONFIG_SENSORS_THMC50 is not set
 # CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
 # CONFIG_SENSORS_VIA686A is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_VT8231 is not set
@@ -1056,9 +1101,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_W83L786NG is not set
 # CONFIG_SENSORS_W83627HF is not set
 # CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
-CONFIG_THERMAL_HWMON=y
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
 
@@ -1079,8 +1122,10 @@ CONFIG_MFD_SM501=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_MFD_PCF50633 is not set
+# CONFIG_AB3100_CORE is not set
 # CONFIG_REGULATOR is not set
 CONFIG_MEDIA_SUPPORT=y
 
@@ -1099,6 +1144,7 @@ CONFIG_MEDIA_SUPPORT=y
 #
 # Graphics support
 #
+CONFIG_VGA_ARB=y
 # CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
@@ -1183,7 +1229,6 @@ CONFIG_LOGO_LINUX_CLUT224=y
 # CONFIG_SOUND is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
 
 #
@@ -1206,6 +1251,7 @@ CONFIG_HID_CYPRESS=y
 CONFIG_HID_EZKEY=y
 # CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_TWINHAN is not set
 # CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
@@ -1255,6 +1301,7 @@ CONFIG_USB_MON=y
 # CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1373,6 +1420,7 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
 # CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
 
 #
 # SPI RTC drivers
@@ -1422,6 +1470,7 @@ CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_XATTR=y
 # CONFIG_EXT4_FS_POSIX_ACL is not set
 # CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
 CONFIG_JBD=y
 # CONFIG_JBD_DEBUG is not set
 CONFIG_JBD2=y
@@ -1431,9 +1480,11 @@ CONFIG_FS_MBCACHE=y
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
 CONFIG_BTRFS_FS=y
 # CONFIG_BTRFS_FS_POSIX_ACL is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_FILE_LOCKING=y
 CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
@@ -1499,12 +1550,12 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
+# CONFIG_NFS_V4_1 is not set
 CONFIG_ROOT_NFS=y
 # CONFIG_NFSD is not set
 CONFIG_LOCKD=y
@@ -1576,6 +1627,7 @@ CONFIG_PRINTK_TIME=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1610,18 +1662,23 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
 # CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
 CONFIG_FRAME_POINTER=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_PAGE_POISONING is not set
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
 CONFIG_TRACING_SUPPORT=y
 # CONFIG_FTRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
@@ -1633,11 +1690,11 @@ CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_EARLY_SCIF_CONSOLE=y
 CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffeb0000
 CONFIG_EARLY_PRINTK=y
-# CONFIG_DEBUG_BOOTMEM is not set
-# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_STACK_DEBUG is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_4KSTACKS is not set
 # CONFIG_DUMP_CODE is not set
+# CONFIG_DWARF_UNWINDER is not set
 # CONFIG_SH_NO_BSS_INIT is not set
 
 #
@@ -1652,7 +1709,6 @@ CONFIG_CRYPTO=y
 #
 # Crypto core or helper
 #
-# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
 CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD2=y
@@ -1694,11 +1750,13 @@ CONFIG_CRYPTO_CBC=y
 #
 CONFIG_CRYPTO_HMAC=y
 # CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
 
 #
 # Digest
 #
 CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_GHASH is not set
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1764,5 +1822,6 @@ CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
 CONFIG_NLATTR=y
 CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 63e9dd30b41c..4d58eb0973d4 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -1,12 +1,9 @@
 menu "DMA support"
 
-config SH_DMA_API
-        bool
 
 config SH_DMA
         bool "SuperH on-chip DMA controller (DMAC) support"
         depends on CPU_SH3 || CPU_SH4
-        select SH_DMA_API
         default n
 
 config SH_DMA_IRQ_MULTI
@@ -19,6 +16,15 @@ config SH_DMA_IRQ_MULTI
                      CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785  || \
                      CPU_SUBTYPE_SH7760
 
+config SH_DMA_API
+        depends on SH_DMA
+        bool "SuperH DMA API support"
+        default n
+        help
+          SH_DMA_API always enabled DMA API of used SuperH.
+          If you want to use DMA ENGINE, you must not enable this.
+          Please enable DMA_ENGINE and SH_DMAE.
+
 config NR_ONCHIP_DMA_CHANNELS
         int
         depends on SH_DMA
@@ -27,12 +33,12 @@ config NR_ONCHIP_DMA_CHANNELS
         default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
                        CPU_SUBTYPE_SH7760
         default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
-                        CPU_SUBTYPE_SH7785
+                        CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
         default "6"
         help
           This allows you to specify the number of channels that the on-chip
-          DMAC supports. This will be 4 for SH7091/SH7750/SH7751 and 8 for the
-          SH7750R/SH7751R.
+          DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
+          SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
 
 config NR_DMA_CHANNELS_BOOL
         depends on SH_DMA
diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile
index c6068137b46f..d88c9484762c 100644
--- a/arch/sh/drivers/dma/Makefile
+++ b/arch/sh/drivers/dma/Makefile
@@ -2,8 +2,7 @@
 # Makefile for the SuperH DMA specific kernel interface routines under Linux.
 #
 
-obj-$(CONFIG_SH_DMA_API)        += dma-api.o dma-sysfs.o
-obj-$(CONFIG_SH_DMA)            += dma-sh.o
+obj-$(CONFIG_SH_DMA_API)        += dma-sh.o dma-api.o dma-sysfs.o
 obj-$(CONFIG_PVR2_DMA)          += dma-pvr2.o
 obj-$(CONFIG_G2_DMA)            += dma-g2.o
 obj-$(CONFIG_SH_DMABRG)         += dmabrg.o
diff --git a/arch/sh/drivers/heartbeat.c b/arch/sh/drivers/heartbeat.c
index 938817e34e2b..a9339a6174fc 100644
--- a/arch/sh/drivers/heartbeat.c
+++ b/arch/sh/drivers/heartbeat.c
@@ -40,14 +40,19 @@ static inline void heartbeat_toggle_bit(struct heartbeat_data *hd,
         if (inverted)
                 new = ~new;
 
+        new &= hd->mask;
+
         switch (hd->regsize) {
         case 32:
+                new |= ioread32(hd->base) & ~hd->mask;
                 iowrite32(new, hd->base);
                 break;
         case 16:
+                new |= ioread16(hd->base) & ~hd->mask;
                 iowrite16(new, hd->base);
                 break;
         default:
+                new |= ioread8(hd->base) & ~hd->mask;
                 iowrite8(new, hd->base);
                 break;
         }
@@ -72,6 +77,7 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
 {
         struct resource *res;
         struct heartbeat_data *hd;
+        int i;
 
         if (unlikely(pdev->num_resources != 1)) {
                 dev_err(&pdev->dev, "invalid number of resources\n");
@@ -107,6 +113,10 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
                 hd->nr_bits = ARRAY_SIZE(default_bit_pos);
         }
 
+        hd->mask = 0;
+        for (i = 0; i < hd->nr_bits; i++)
+                hd->mask |= (1 << hd->bit_pos[i]);
+
         if (!hd->regsize)
                 hd->regsize = 8;        /* default access size */
 
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 9a1c423ad167..c481df639022 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -295,6 +295,8 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
                                vma->vm_page_prot);
 }
 
+#ifndef CONFIG_GENERIC_IOMAP
+
 static void __iomem *ioport_map_pci(struct pci_dev *dev,
                                     unsigned long port, unsigned int nr)
 {
@@ -346,6 +348,8 @@ void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
 }
 EXPORT_SYMBOL(pci_iounmap);
 
+#endif /* CONFIG_GENERIC_IOMAP */
+
 #ifdef CONFIG_HOTPLUG
 EXPORT_SYMBOL(pcibios_resource_to_bus);
 EXPORT_SYMBOL(pcibios_bus_to_resource);
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 43910cdf78a5..e121c30f797d 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -1,6 +1,6 @@
 include include/asm-generic/Kbuild.asm
 
-header-y += cpu-features.h
+header-y += cachectl.h cpu-features.h
 
 unifdef-y += unistd_32.h
 unifdef-y += unistd_64.h
diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h
index c01718040166..d02c01b3e6b9 100644
--- a/arch/sh/include/asm/bug.h
+++ b/arch/sh/include/asm/bug.h
@@ -2,6 +2,7 @@
 #define __ASM_SH_BUG_H
 
 #define TRAPA_BUG_OPCODE        0xc33e  /* trapa #0x3e */
+#define BUGFLAG_UNWINDER        (1 << 1)
 
 #ifdef CONFIG_GENERIC_BUG
 #define HAVE_ARCH_BUG
@@ -72,6 +73,36 @@ do {							\
         unlikely(__ret_warn_on);                                \
 })
 
+#define UNWINDER_BUG()                                  \
+do {                                                    \
+        __asm__ __volatile__ (                          \
+                "1:\t.short %O0\n"                      \
+                _EMIT_BUG_ENTRY                         \
+                 :                                      \
+                 : "n" (TRAPA_BUG_OPCODE),              \
+                   "i" (__FILE__),                      \
+                   "i" (__LINE__),                      \
+                   "i" (BUGFLAG_UNWINDER),              \
+                   "i" (sizeof(struct bug_entry)));     \
+} while (0)
+
+#define UNWINDER_BUG_ON(x) ({                                   \
+        int __ret_unwinder_on = !!(x);                          \
+        if (__builtin_constant_p(__ret_unwinder_on)) {          \
+                if (__ret_unwinder_on)                          \
+                        UNWINDER_BUG();                         \
+        } else {                                                \
+                if (unlikely(__ret_unwinder_on))                \
+                        UNWINDER_BUG();                         \
+        }                                                       \
+        unlikely(__ret_unwinder_on);                            \
+})
+
+#else
+
+#define UNWINDER_BUG    BUG
+#define UNWINDER_BUG_ON BUG_ON
+
 #endif /* CONFIG_GENERIC_BUG */
 
 #include <asm-generic/bug.h>
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h
index 4924ff6f5439..46260fcbdf4b 100644
--- a/arch/sh/include/asm/bugs.h
+++ b/arch/sh/include/asm/bugs.h
@@ -21,25 +21,25 @@ static void __init check_bugs(void)
 
         current_cpu_data.loops_per_jiffy = loops_per_jiffy;
 
-        switch (current_cpu_data.type) {
-        case CPU_SH7619:
+        switch (current_cpu_data.family) {
+        case CPU_FAMILY_SH2:
                 *p++ = '2';
                 break;
-        case CPU_SH7201 ... CPU_MXG:
+        case CPU_FAMILY_SH2A:
                 *p++ = '2';
                 *p++ = 'a';
                 break;
-        case CPU_SH7705 ... CPU_SH7729:
+        case CPU_FAMILY_SH3:
                 *p++ = '3';
                 break;
-        case CPU_SH7750 ... CPU_SH4_501:
+        case CPU_FAMILY_SH4:
                 *p++ = '4';
                 break;
-        case CPU_SH7763 ... CPU_SHX3:
+        case CPU_FAMILY_SH4A:
                 *p++ = '4';
                 *p++ = 'a';
                 break;
-        case CPU_SH7343 ... CPU_SH7366:
+        case CPU_FAMILY_SH4AL_DSP:
                 *p++ = '4';
                 *p++ = 'a';
                 *p++ = 'l';
@@ -48,15 +48,15 @@ static void __init check_bugs(void)
                 *p++ = 's';
                 *p++ = 'p';
                 break;
-        case CPU_SH5_101 ... CPU_SH5_103:
+        case CPU_FAMILY_SH5:
                 *p++ = '6';
                 *p++ = '4';
                 break;
-        case CPU_SH_NONE:
+        case CPU_FAMILY_UNKNOWN:
                 /*
-                 * Specifically use CPU_SH_NONE rather than default:,
-                 * so we're able to have the compiler whine about
-                 * unhandled enumerations.
+                 * Specifically use CPU_FAMILY_UNKNOWN rather than
+                 * default:, so we're able to have the compiler whine
+                 * about unhandled enumerations.
                  */
                 break;
         }
diff --git a/arch/sh/include/asm/cachectl.h b/arch/sh/include/asm/cachectl.h
new file mode 100644
index 000000000000..6ffb4b7a212e
--- /dev/null
+++ b/arch/sh/include/asm/cachectl.h
@@ -0,0 +1,19 @@
+#ifndef _SH_CACHECTL_H
+#define _SH_CACHECTL_H
+
+/* Definitions for the cacheflush system call.  */
+
+#define CACHEFLUSH_D_INVAL      0x1     /* invalidate (without write back) */
+#define CACHEFLUSH_D_WB         0x2     /* write back (without invalidate) */
+#define CACHEFLUSH_D_PURGE      0x3     /* writeback and invalidate */
+
+#define CACHEFLUSH_I            0x4
+
+/*
+ * Options for cacheflush system call
+ */
+#define ICACHE  CACHEFLUSH_I            /* flush instruction cache */
+#define DCACHE  CACHEFLUSH_D_PURGE      /* writeback and flush data cache */
+#define BCACHE  (ICACHE|DCACHE)         /* flush both caches */
+
+#endif /* _SH_CACHECTL_H */
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index 4c5462daa74c..c29918f3c819 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -3,45 +3,65 @@
 
 #ifdef __KERNEL__
 
-#ifdef CONFIG_CACHE_OFF
+#include <linux/mm.h>
+
 /*
- * Nothing to do when the cache is disabled, initial flush and explicit
- * disabling is handled at CPU init time.
+ * Cache flushing:
+ *
+ *  - flush_cache_all() flushes entire cache
+ *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
+ *  - flush_cache_dup mm(mm) handles cache flushing when forking
+ *  - flush_cache_page(mm, vmaddr, pfn) flushes a single page
+ *  - flush_cache_range(vma, start, end) flushes a range of pages
  *
- * See arch/sh/kernel/cpu/init.c:cache_init().
+ *  - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
+ *  - flush_icache_range(start, end) flushes(invalidates) a range for icache
+ *  - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
+ *  - flush_cache_sigtramp(vaddr) flushes the signal trampoline
  */
-#define p3_cache_init()                         do { } while (0)
-#define flush_cache_all()                       do { } while (0)
-#define flush_cache_mm(mm)                      do { } while (0)
-#define flush_cache_dup_mm(mm)                  do { } while (0)
-#define flush_cache_range(vma, start, end)      do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)      do { } while (0)
-#define flush_dcache_page(page)                 do { } while (0)
-#define flush_icache_range(start, end)          do { } while (0)
-#define flush_icache_page(vma,pg)               do { } while (0)
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-#define flush_cache_sigtramp(vaddr)             do { } while (0)
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-#define __flush_wback_region(start, size)       do { (void)(start); } while (0)
-#define __flush_purge_region(start, size)       do { (void)(start); } while (0)
-#define __flush_invalidate_region(start, size)  do { (void)(start); } while (0)
-#else
-#include <cpu/cacheflush.h>
+extern void (*local_flush_cache_all)(void *args);
+extern void (*local_flush_cache_mm)(void *args);
+extern void (*local_flush_cache_dup_mm)(void *args);
+extern void (*local_flush_cache_page)(void *args);
+extern void (*local_flush_cache_range)(void *args);
+extern void (*local_flush_dcache_page)(void *args);
+extern void (*local_flush_icache_range)(void *args);
+extern void (*local_flush_icache_page)(void *args);
+extern void (*local_flush_cache_sigtramp)(void *args);
 
-/*
- * Consistent DMA requires that the __flush_xxx() primitives must be set
- * for any of the enabled non-coherent caches (most of the UP CPUs),
- * regardless of PIPT or VIPT cache configurations.
- */
+static inline void cache_noop(void *args) { }
+
+extern void (*__flush_wback_region)(void *start, int size);
+extern void (*__flush_purge_region)(void *start, int size);
+extern void (*__flush_invalidate_region)(void *start, int size);
+
+extern void flush_cache_all(void);
+extern void flush_cache_mm(struct mm_struct *mm);
+extern void flush_cache_dup_mm(struct mm_struct *mm);
+extern void flush_cache_page(struct vm_area_struct *vma,
+                                unsigned long addr, unsigned long pfn);
+extern void flush_cache_range(struct vm_area_struct *vma,
+                                 unsigned long start, unsigned long end);
+extern void flush_dcache_page(struct page *page);
+extern void flush_icache_range(unsigned long start, unsigned long end);
+extern void flush_icache_page(struct vm_area_struct *vma,
+                                 struct page *page);
+extern void flush_cache_sigtramp(unsigned long address);
+
+struct flusher_data {
+        struct vm_area_struct *vma;
+        unsigned long addr1, addr2;
+};
 
-/* Flush (write-back only) a region (smaller than a page) */
-extern void __flush_wback_region(void *start, int size);
-/* Flush (write-back & invalidate) a region (smaller than a page) */
-extern void __flush_purge_region(void *start, int size);
-/* Flush (invalidate only) a region (smaller than a page) */
-extern void __flush_invalidate_region(void *start, int size);
-#endif
+#define ARCH_HAS_FLUSH_ANON_PAGE
+extern void __flush_anon_page(struct page *page, unsigned long);
+
+static inline void flush_anon_page(struct vm_area_struct *vma,
+                                   struct page *page, unsigned long vmaddr)
+{
+        if (boot_cpu_data.dcache.n_aliases && PageAnon(page))
+                __flush_anon_page(page, vmaddr);
+}
 
 #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
 static inline void flush_kernel_dcache_page(struct page *page)
@@ -49,7 +69,6 @@ static inline void flush_kernel_dcache_page(struct page *page)
         flush_dcache_page(page);
 }
 
-#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_CACHE_OFF)
 extern void copy_to_user_page(struct vm_area_struct *vma,
         struct page *page, unsigned long vaddr, void *dst, const void *src,
         unsigned long len);
@@ -57,23 +76,20 @@ extern void copy_to_user_page(struct vm_area_struct *vma,
 extern void copy_from_user_page(struct vm_area_struct *vma,
         struct page *page, unsigned long vaddr, void *dst, const void *src,
         unsigned long len);
-#else
-#define copy_to_user_page(vma, page, vaddr, dst, src, len)      \
-        do {                                                    \
-                flush_cache_page(vma, vaddr, page_to_pfn(page));\
-                memcpy(dst, src, len);                          \
-                flush_icache_user_range(vma, page, vaddr, len); \
-        } while (0)
-
-#define copy_from_user_page(vma, page, vaddr, dst, src, len)    \
-        do {                                                    \
-                flush_cache_page(vma, vaddr, page_to_pfn(page));\
-                memcpy(dst, src, len);                          \
-        } while (0)
-#endif
 
 #define flush_cache_vmap(start, end)            flush_cache_all()
 #define flush_cache_vunmap(start, end)          flush_cache_all()
 
+#define flush_dcache_mmap_lock(mapping)         do { } while (0)
+#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
+
+void kmap_coherent_init(void);
+void *kmap_coherent(struct page *page, unsigned long addr);
+void kunmap_coherent(void *kvaddr);
+
+#define PG_dcache_dirty PG_arch_1
+
+void cpu_cache_init(void);
+
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_CACHEFLUSH_H */
diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h
index 8688a88303ee..b16debfe8c1e 100644
--- a/arch/sh/include/asm/device.h
+++ b/arch/sh/include/asm/device.h
@@ -3,7 +3,9 @@
  *
  * This file is released under the GPLv2
  */
-#include <asm-generic/device.h>
+
+struct dev_archdata {
+};
 
 struct platform_device;
 /* allocate contiguous memory chunk and fill in struct resource */
@@ -12,3 +14,15 @@ int platform_resource_setup_memory(struct platform_device *pdev,
 
 void plat_early_device_setup(void);
 
+#define PDEV_ARCHDATA_FLAG_INIT 0
+#define PDEV_ARCHDATA_FLAG_IDLE 1
+#define PDEV_ARCHDATA_FLAG_SUSP 2
+
+struct pdev_archdata {
+        int hwblk_id;
+#ifdef CONFIG_PM_RUNTIME
+        unsigned long flags;
+        struct list_head entry;
+        struct mutex mutex;
+#endif
+};
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 0c8f8e14622a..78eed3e0bdf5 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -16,6 +16,7 @@
 
 /* DMAOR contorl: The DMAOR access size is different by CPU.*/
 #if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7724)  || \
     defined(CONFIG_CPU_SUBTYPE_SH7780)  || \
     defined(CONFIG_CPU_SUBTYPE_SH7785)
 #define dmaor_read_reg(n) \
@@ -115,4 +116,17 @@ static u32 dma_base_addr[] __maybe_unused = {
 #define CHCR    0x0C
 #define DMAOR   0x40
 
+/*
+ * for dma engine
+ *
+ * SuperH DMA mode
+ */
+#define SHDMA_MIX_IRQ   (1 << 1)
+#define SHDMA_DMAOR1    (1 << 2)
+#define SHDMA_DMAE1             (1 << 3)
+
+struct sh_dmae_pdata {
+        unsigned int mode;
+};
+
 #endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h
new file mode 100644
index 000000000000..ced6795891a6
--- /dev/null
+++ b/arch/sh/include/asm/dwarf.h
@@ -0,0 +1,398 @@
+/*
+ * Copyright (C) 2009 Matt Fleming <matt@console-pimps.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+#ifndef __ASM_SH_DWARF_H
+#define __ASM_SH_DWARF_H
+
+#ifdef CONFIG_DWARF_UNWINDER
+
+/*
+ * DWARF expression operations
+ */
+#define DW_OP_addr      0x03
+#define DW_OP_deref     0x06
+#define DW_OP_const1u   0x08
+#define DW_OP_const1s   0x09
+#define DW_OP_const2u   0x0a
+#define DW_OP_const2s   0x0b
+#define DW_OP_const4u   0x0c
+#define DW_OP_const4s   0x0d
+#define DW_OP_const8u   0x0e
+#define DW_OP_const8s   0x0f
+#define DW_OP_constu    0x10
+#define DW_OP_consts    0x11
+#define DW_OP_dup       0x12
+#define DW_OP_drop      0x13
+#define DW_OP_over      0x14
+#define DW_OP_pick      0x15
+#define DW_OP_swap      0x16
+#define DW_OP_rot       0x17
+#define DW_OP_xderef    0x18
+#define DW_OP_abs       0x19
+#define DW_OP_and       0x1a
+#define DW_OP_div       0x1b
+#define DW_OP_minus     0x1c
+#define DW_OP_mod       0x1d
+#define DW_OP_mul       0x1e
+#define DW_OP_neg       0x1f
+#define DW_OP_not       0x20
+#define DW_OP_or        0x21
+#define DW_OP_plus      0x22
+#define DW_OP_plus_uconst       0x23
+#define DW_OP_shl       0x24
+#define DW_OP_shr       0x25
+#define DW_OP_shra      0x26
+#define DW_OP_xor       0x27
+#define DW_OP_skip      0x2f
+#define DW_OP_bra       0x28
+#define DW_OP_eq        0x29
+#define DW_OP_ge        0x2a
+#define DW_OP_gt        0x2b
+#define DW_OP_le        0x2c
+#define DW_OP_lt        0x2d
+#define DW_OP_ne        0x2e
+#define DW_OP_lit0      0x30
+#define DW_OP_lit1      0x31
+#define DW_OP_lit2      0x32
+#define DW_OP_lit3      0x33
+#define DW_OP_lit4      0x34
+#define DW_OP_lit5      0x35
+#define DW_OP_lit6      0x36
+#define DW_OP_lit7      0x37
+#define DW_OP_lit8      0x38
+#define DW_OP_lit9      0x39
+#define DW_OP_lit10     0x3a
+#define DW_OP_lit11     0x3b
+#define DW_OP_lit12     0x3c
+#define DW_OP_lit13     0x3d
+#define DW_OP_lit14     0x3e
+#define DW_OP_lit15     0x3f
+#define DW_OP_lit16     0x40
+#define DW_OP_lit17     0x41
+#define DW_OP_lit18     0x42
+#define DW_OP_lit19     0x43
+#define DW_OP_lit20     0x44
+#define DW_OP_lit21     0x45
+#define DW_OP_lit22     0x46
+#define DW_OP_lit23     0x47
+#define DW_OP_lit24     0x48
+#define DW_OP_lit25     0x49
+#define DW_OP_lit26     0x4a
+#define DW_OP_lit27     0x4b
+#define DW_OP_lit28     0x4c
+#define DW_OP_lit29     0x4d
+#define DW_OP_lit30     0x4e
+#define DW_OP_lit31     0x4f
+#define DW_OP_reg0      0x50
+#define DW_OP_reg1      0x51
+#define DW_OP_reg2      0x52
+#define DW_OP_reg3      0x53
+#define DW_OP_reg4      0x54
+#define DW_OP_reg5      0x55
+#define DW_OP_reg6      0x56
+#define DW_OP_reg7      0x57
+#define DW_OP_reg8      0x58
+#define DW_OP_reg9      0x59
+#define DW_OP_reg10     0x5a
+#define DW_OP_reg11     0x5b
+#define DW_OP_reg12     0x5c
+#define DW_OP_reg13     0x5d
+#define DW_OP_reg14     0x5e
+#define DW_OP_reg15     0x5f
+#define DW_OP_reg16     0x60
+#define DW_OP_reg17     0x61
+#define DW_OP_reg18     0x62
+#define DW_OP_reg19     0x63
+#define DW_OP_reg20     0x64
+#define DW_OP_reg21     0x65
+#define DW_OP_reg22     0x66
+#define DW_OP_reg23     0x67
+#define DW_OP_reg24     0x68
+#define DW_OP_reg25     0x69
+#define DW_OP_reg26     0x6a
+#define DW_OP_reg27     0x6b
+#define DW_OP_reg28     0x6c
+#define DW_OP_reg29     0x6d
+#define DW_OP_reg30     0x6e
+#define DW_OP_reg31     0x6f
+#define DW_OP_breg0     0x70
+#define DW_OP_breg1     0x71
+#define DW_OP_breg2     0x72
+#define DW_OP_breg3     0x73
+#define DW_OP_breg4     0x74
+#define DW_OP_breg5     0x75
+#define DW_OP_breg6     0x76
+#define DW_OP_breg7     0x77
+#define DW_OP_breg8     0x78
+#define DW_OP_breg9     0x79
+#define DW_OP_breg10    0x7a
+#define DW_OP_breg11    0x7b
+#define DW_OP_breg12    0x7c
+#define DW_OP_breg13    0x7d
+#define DW_OP_breg14    0x7e
+#define DW_OP_breg15    0x7f
+#define DW_OP_breg16    0x80
+#define DW_OP_breg17    0x81
+#define DW_OP_breg18    0x82
+#define DW_OP_breg19    0x83
+#define DW_OP_breg20    0x84
+#define DW_OP_breg21    0x85
+#define DW_OP_breg22    0x86
+#define DW_OP_breg23    0x87
+#define DW_OP_breg24    0x88
+#define DW_OP_breg25    0x89
+#define DW_OP_breg26    0x8a
+#define DW_OP_breg27    0x8b
+#define DW_OP_breg28    0x8c
+#define DW_OP_breg29    0x8d
+#define DW_OP_breg30    0x8e
+#define DW_OP_breg31    0x8f
+#define DW_OP_regx      0x90
+#define DW_OP_fbreg     0x91
+#define DW_OP_bregx     0x92
+#define DW_OP_piece     0x93
+#define DW_OP_deref_size        0x94
+#define DW_OP_xderef_size       0x95
+#define DW_OP_nop       0x96
+#define DW_OP_push_object_address       0x97
+#define DW_OP_call2     0x98
+#define DW_OP_call4     0x99
+#define DW_OP_call_ref  0x9a
+#define DW_OP_form_tls_address  0x9b
+#define DW_OP_call_frame_cfa    0x9c
+#define DW_OP_bit_piece 0x9d
+#define DW_OP_lo_user   0xe0
+#define DW_OP_hi_user   0xff
+
+/*
+ * Addresses used in FDE entries in the .eh_frame section may be encoded
+ * using one of the following encodings.
+ */
+#define DW_EH_PE_absptr 0x00
+#define DW_EH_PE_omit   0xff
+#define DW_EH_PE_uleb128        0x01
+#define DW_EH_PE_udata2 0x02
+#define DW_EH_PE_udata4 0x03
+#define DW_EH_PE_udata8 0x04
+#define DW_EH_PE_sleb128        0x09
+#define DW_EH_PE_sdata2 0x0a
+#define DW_EH_PE_sdata4 0x0b
+#define DW_EH_PE_sdata8 0x0c
+#define DW_EH_PE_signed 0x09
+
+#define DW_EH_PE_pcrel  0x10
+
+/*
+ * The architecture-specific register number that contains the return
+ * address in the .debug_frame table.
+ */
+#define DWARF_ARCH_RA_REG       17
+
+#ifndef __ASSEMBLY__
+/*
+ * Read either the frame pointer (r14) or the stack pointer (r15).
+ * NOTE: this MUST be inlined.
+ */
+static __always_inline unsigned long dwarf_read_arch_reg(unsigned int reg)
+{
+        unsigned long value = 0;
+
+        switch (reg) {
+        case 14:
+                __asm__ __volatile__("mov r14, %0\n" : "=r" (value));
+                break;
+        case 15:
+                __asm__ __volatile__("mov r15, %0\n" : "=r" (value));
+                break;
+        default:
+                BUG();
+        }
+
+        return value;
+}
+
+/**
+ *      dwarf_cie - Common Information Entry
+ */
+struct dwarf_cie {
+        unsigned long length;
+        unsigned long cie_id;
+        unsigned char version;
+        const char *augmentation;
+        unsigned int code_alignment_factor;
+        int data_alignment_factor;
+
+        /* Which column in the rule table represents return addr of func. */
+        unsigned int return_address_reg;
+
+        unsigned char *initial_instructions;
+        unsigned char *instructions_end;
+
+        unsigned char encoding;
+
+        unsigned long cie_pointer;
+
+        struct list_head link;
+
+        unsigned long flags;
+#define DWARF_CIE_Z_AUGMENTATION        (1 << 0)
+};
+
+/**
+ *      dwarf_fde - Frame Description Entry
+ */
+struct dwarf_fde {
+        unsigned long length;
+        unsigned long cie_pointer;
+        struct dwarf_cie *cie;
+        unsigned long initial_location;
+        unsigned long address_range;
+        unsigned char *instructions;
+        unsigned char *end;
+        struct list_head link;
+};
+
+/**
+ *      dwarf_frame - DWARF information for a frame in the call stack
+ */
+struct dwarf_frame {
+        struct dwarf_frame *prev, *next;
+
+        unsigned long pc;
+
+        struct list_head reg_list;
+
+        unsigned long cfa;
+
+        /* Valid when DW_FRAME_CFA_REG_OFFSET is set in flags */
+        unsigned int cfa_register;
+        unsigned int cfa_offset;
+
+        /* Valid when DW_FRAME_CFA_REG_EXP is set in flags */
+        unsigned char *cfa_expr;
+        unsigned int cfa_expr_len;
+
+        unsigned long flags;
+#define DWARF_FRAME_CFA_REG_OFFSET      (1 << 0)
+#define DWARF_FRAME_CFA_REG_EXP         (1 << 1)
+
+        unsigned long return_addr;
+};
+
+/**
+ *      dwarf_reg - DWARF register
+ *      @flags: Describes how to calculate the value of this register
+ */
+struct dwarf_reg {
+        struct list_head link;
+
+        unsigned int number;
+
+        unsigned long addr;
+        unsigned long flags;
+#define DWARF_REG_OFFSET        (1 << 0)
+#define DWARF_VAL_OFFSET        (1 << 1)
+#define DWARF_UNDEFINED         (1 << 2)
+};
+
+/*
+ * Call Frame instruction opcodes.
+ */
+#define DW_CFA_advance_loc      0x40
+#define DW_CFA_offset           0x80
+#define DW_CFA_restore          0xc0
+#define DW_CFA_nop              0x00
+#define DW_CFA_set_loc          0x01
+#define DW_CFA_advance_loc1     0x02
+#define DW_CFA_advance_loc2     0x03
+#define DW_CFA_advance_loc4     0x04
+#define DW_CFA_offset_extended  0x05
+#define DW_CFA_restore_extended 0x06
+#define DW_CFA_undefined        0x07
+#define DW_CFA_same_value       0x08
+#define DW_CFA_register         0x09
+#define DW_CFA_remember_state   0x0a
+#define DW_CFA_restore_state    0x0b
+#define DW_CFA_def_cfa          0x0c
+#define DW_CFA_def_cfa_register 0x0d
+#define DW_CFA_def_cfa_offset   0x0e
+#define DW_CFA_def_cfa_expression       0x0f
+#define DW_CFA_expression       0x10
+#define DW_CFA_offset_extended_sf       0x11
+#define DW_CFA_def_cfa_sf       0x12
+#define DW_CFA_def_cfa_offset_sf        0x13
+#define DW_CFA_val_offset       0x14
+#define DW_CFA_val_offset_sf    0x15
+#define DW_CFA_val_expression   0x16
+#define DW_CFA_lo_user          0x1c
+#define DW_CFA_hi_user          0x3f
+
+/* GNU extension opcodes  */
+#define DW_CFA_GNU_args_size    0x2e
+#define DW_CFA_GNU_negative_offset_extended 0x2f
+
+/*
+ * Some call frame instructions encode their operands in the opcode. We
+ * need some helper functions to extract both the opcode and operands
+ * from an instruction.
+ */
+static inline unsigned int DW_CFA_opcode(unsigned long insn)
+{
+        return (insn & 0xc0);
+}
+
+static inline unsigned int DW_CFA_operand(unsigned long insn)
+{
+        return (insn & 0x3f);
+}
+
+#define DW_EH_FRAME_CIE 0               /* .eh_frame CIE IDs are 0 */
+#define DW_CIE_ID       0xffffffff
+#define DW64_CIE_ID     0xffffffffffffffffULL
+
+/*
+ * DWARF FDE/CIE length field values.
+ */
+#define DW_EXT_LO       0xfffffff0
+#define DW_EXT_HI       0xffffffff
+#define DW_EXT_DWARF64  DW_EXT_HI
+
+extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
+                                              struct dwarf_frame *);
+#endif /* !__ASSEMBLY__ */
+
+#define CFI_STARTPROC   .cfi_startproc
+#define CFI_ENDPROC     .cfi_endproc
+#define CFI_DEF_CFA     .cfi_def_cfa
+#define CFI_REGISTER    .cfi_register
+#define CFI_REL_OFFSET  .cfi_rel_offset
+#define CFI_UNDEFINED   .cfi_undefined
+
+#else
+
+/*
+ * Use the asm comment character to ignore the rest of the line.
+ */
+#define CFI_IGNORE      !
+
+#define CFI_STARTPROC   CFI_IGNORE
+#define CFI_ENDPROC     CFI_IGNORE
+#define CFI_DEF_CFA     CFI_IGNORE
+#define CFI_REGISTER    CFI_IGNORE
+#define CFI_REL_OFFSET  CFI_IGNORE
+#define CFI_UNDEFINED   CFI_IGNORE
+
+#ifndef __ASSEMBLY__
+static inline void dwarf_unwinder_init(void)
+{
+}
+#endif
+
+#endif /* CONFIG_DWARF_UNWINDER */
+
+#endif /* __ASM_SH_DWARF_H */
diff --git a/arch/sh/include/asm/entry-macros.S b/arch/sh/include/asm/entry-macros.S
index 3a4752a65722..cc43a55e1fcf 100644
--- a/arch/sh/include/asm/entry-macros.S
+++ b/arch/sh/include/asm/entry-macros.S
@@ -7,7 +7,7 @@
         .endm
 
         .macro  sti
-        mov     #0xf0, r11
+        mov     #0xfffffff0, r11
         extu.b  r11, r11
         not     r11, r11
         stc     sr, r10
@@ -31,8 +31,92 @@
 #endif  
         .endm
 
+#ifdef CONFIG_TRACE_IRQFLAGS
+
+        .macro  TRACE_IRQS_ON
+        mov.l   r0, @-r15
+        mov.l   r1, @-r15
+        mov.l   r2, @-r15
+        mov.l   r3, @-r15
+        mov.l   r4, @-r15
+        mov.l   r5, @-r15
+        mov.l   r6, @-r15
+        mov.l   r7, @-r15
+
+        mov.l   7834f, r0
+        jsr     @r0
+         nop
+
+        mov.l   @r15+, r7
+        mov.l   @r15+, r6
+        mov.l   @r15+, r5
+        mov.l   @r15+, r4
+        mov.l   @r15+, r3
+        mov.l   @r15+, r2
+        mov.l   @r15+, r1
+        mov.l   @r15+, r0
+        mov.l   7834f, r0
+
+        bra     7835f
+         nop
+        .balign 4
+7834:   .long   trace_hardirqs_on
+7835:
+        .endm
+        .macro  TRACE_IRQS_OFF
+
+        mov.l   r0, @-r15
+        mov.l   r1, @-r15
+        mov.l   r2, @-r15
+        mov.l   r3, @-r15
+        mov.l   r4, @-r15
+        mov.l   r5, @-r15
+        mov.l   r6, @-r15
+        mov.l   r7, @-r15
+
+        mov.l   7834f, r0
+        jsr     @r0
+         nop
+
+        mov.l   @r15+, r7
+        mov.l   @r15+, r6
+        mov.l   @r15+, r5
+        mov.l   @r15+, r4
+        mov.l   @r15+, r3
+        mov.l   @r15+, r2
+        mov.l   @r15+, r1
+        mov.l   @r15+, r0
+        mov.l   7834f, r0
+
+        bra     7835f
+         nop
+        .balign 4
+7834:   .long   trace_hardirqs_off
+7835:
+        .endm
+
+#else
+        .macro  TRACE_IRQS_ON
+        .endm
+
+        .macro  TRACE_IRQS_OFF
+        .endm
+#endif
+
 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
 # define PREF(x)        pref    @x
 #else
 # define PREF(x)        nop
 #endif
+
+        /*
+         * Macro for use within assembly. Because the DWARF unwinder
+         * needs to use the frame register to unwind the stack, we
+         * need to setup r14 with the value of the stack pointer as
+         * the return address is usually on the stack somewhere.
+         */
+        .macro  setup_frame_reg
+#ifdef CONFIG_DWARF_UNWINDER
+        mov     r15, r14
+#endif
+        .endm
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
index 8fea7d8c8258..12f3a31f20af 100644
--- a/arch/sh/include/asm/ftrace.h
+++ b/arch/sh/include/asm/ftrace.h
@@ -4,6 +4,7 @@
 #ifdef CONFIG_FUNCTION_TRACER
 
 #define MCOUNT_INSN_SIZE        4 /* sizeof mcount call */
+#define FTRACE_SYSCALL_MAX      NR_syscalls
 
 #ifndef __ASSEMBLY__
 extern void mcount(void);
@@ -11,10 +12,13 @@ extern void mcount(void);
 #define MCOUNT_ADDR             ((long)(mcount))
 
 #ifdef CONFIG_DYNAMIC_FTRACE
-#define CALLER_ADDR             ((long)(ftrace_caller))
+#define CALL_ADDR               ((long)(ftrace_call))
 #define STUB_ADDR               ((long)(ftrace_stub))
+#define GRAPH_ADDR              ((long)(ftrace_graph_call))
+#define CALLER_ADDR             ((long)(ftrace_caller))
 
-#define MCOUNT_INSN_OFFSET      ((STUB_ADDR - CALLER_ADDR) >> 1)
+#define MCOUNT_INSN_OFFSET      ((STUB_ADDR - CALL_ADDR) - 4)
+#define GRAPH_INSN_OFFSET       ((CALLER_ADDR - GRAPH_ADDR) - 4)
 
 struct dyn_arch_ftrace {
         /* No extra data needed on sh */
diff --git a/arch/sh/include/asm/hardirq.h b/arch/sh/include/asm/hardirq.h
index 715ee237fc77..a5be4afa790b 100644
--- a/arch/sh/include/asm/hardirq.h
+++ b/arch/sh/include/asm/hardirq.h
@@ -1,16 +1,9 @@
 #ifndef __ASM_SH_HARDIRQ_H
 #define __ASM_SH_HARDIRQ_H
 
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-/* entry.S is sensitive to the offsets of these fields */
-typedef struct {
-        unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
-
 extern void ack_bad_irq(unsigned int irq);
+#define ack_bad_irq ack_bad_irq
+
+#include <asm-generic/hardirq.h>
 
 #endif /* __ASM_SH_HARDIRQ_H */
diff --git a/arch/sh/include/asm/heartbeat.h b/arch/sh/include/asm/heartbeat.h
index 724a43ed245e..caaafe5a3ef1 100644
--- a/arch/sh/include/asm/heartbeat.h
+++ b/arch/sh/include/asm/heartbeat.h
@@ -11,6 +11,7 @@ struct heartbeat_data {
         unsigned int nr_bits;
         struct timer_list timer;
         unsigned int regsize;
+        unsigned int mask;
         unsigned long flags;
 };
 
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h
new file mode 100644
index 000000000000..5d3ccae4202b
--- /dev/null
+++ b/arch/sh/include/asm/hwblk.h
@@ -0,0 +1,72 @@
+#ifndef __ASM_SH_HWBLK_H
+#define __ASM_SH_HWBLK_H
+
+#include <asm/clock.h>
+#include <asm/io.h>
+
+#define HWBLK_CNT_USAGE 0
+#define HWBLK_CNT_IDLE 1
+#define HWBLK_CNT_DEVICES 2
+#define HWBLK_CNT_NR 3
+
+#define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */
+
+#define HWBLK_AREA(_flags, _parent)             \
+{                                               \
+        .flags = _flags,                        \
+        .parent = _parent,                      \
+}
+
+struct hwblk_area {
+        int cnt[HWBLK_CNT_NR];
+        unsigned char parent;
+        unsigned char flags;
+};
+
+#define HWBLK(_mstp, _bit, _area)               \
+{                                               \
+        .mstp = (void __iomem *)_mstp,          \
+        .bit = _bit,                            \
+        .area = _area,                          \
+}
+
+struct hwblk {
+        void __iomem *mstp;
+        unsigned char bit;
+        unsigned char area;
+        int cnt[HWBLK_CNT_NR];
+};
+
+struct hwblk_info {
+        struct hwblk_area *areas;
+        int nr_areas;
+        struct hwblk *hwblks;
+        int nr_hwblks;
+};
+
+/* Should be defined by processor-specific code */
+int arch_hwblk_init(void);
+int arch_hwblk_sleep_mode(void);
+
+int hwblk_register(struct hwblk_info *info);
+int hwblk_init(void);
+
+void hwblk_enable(struct hwblk_info *info, int hwblk);
+void hwblk_disable(struct hwblk_info *info, int hwblk);
+
+void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int cnt);
+void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
+
+/* allow clocks to enable and disable hardware blocks */
+#define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags)       \
+{                                                       \
+        .name           = _name,                        \
+        .id             = _id,                          \
+        .parent         = _parent,                      \
+        .arch_flags     = _hwblk,                       \
+        .flags          = _flags,                       \
+}
+
+int sh_hwblk_clk_register(struct clk *clks, int nr);
+
+#endif /* __ASM_SH_HWBLK_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 25348141674b..5be45ea4dfec 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -92,8 +92,12 @@
 
 static inline void ctrl_delay(void)
 {
-#ifdef P2SEG
+#ifdef CONFIG_CPU_SH4
+        __raw_readw(CCN_PVR);
+#elif defined(P2SEG)
         __raw_readw(P2SEG);
+#else
+#error "Need a dummy address for delay"
 #endif
 }
 
@@ -146,6 +150,7 @@ __BUILD_MEMORY_STRING(q, u64)
 #define readl_relaxed(a)        readl(a)
 #define readq_relaxed(a)        readq(a)
 
+#ifndef CONFIG_GENERIC_IOMAP
 /* Simple MMIO */
 #define ioread8(a)              __raw_readb(a)
 #define ioread16(a)             __raw_readw(a)
@@ -166,6 +171,15 @@ __BUILD_MEMORY_STRING(q, u64)
 #define iowrite8_rep(a, s, c)   __raw_writesb((a), (s), (c))
 #define iowrite16_rep(a, s, c)  __raw_writesw((a), (s), (c))
 #define iowrite32_rep(a, s, c)  __raw_writesl((a), (s), (c))
+#endif
+
+#define mmio_insb(p,d,c)        __raw_readsb(p,d,c)
+#define mmio_insw(p,d,c)        __raw_readsw(p,d,c)
+#define mmio_insl(p,d,c)        __raw_readsl(p,d,c)
+
+#define mmio_outsb(p,s,c)       __raw_writesb(p,s,c)
+#define mmio_outsw(p,s,c)       __raw_writesw(p,s,c)
+#define mmio_outsl(p,s,c)       __raw_writesl(p,s,c)
 
 /* synco on SH-4A, otherwise a nop */
 #define mmiowb()                wmb()
diff --git a/arch/sh/include/asm/kdebug.h b/arch/sh/include/asm/kdebug.h
index 0b9f896f203c..985219f9759e 100644
--- a/arch/sh/include/asm/kdebug.h
+++ b/arch/sh/include/asm/kdebug.h
@@ -4,6 +4,7 @@
 /* Grossly misnamed. */
 enum die_val {
         DIE_TRAP,
+        DIE_NMI,
         DIE_OOPS,
 };
 
diff --git a/arch/sh/include/asm/kgdb.h b/arch/sh/include/asm/kgdb.h
index 72704ed725e5..4235e228d921 100644
--- a/arch/sh/include/asm/kgdb.h
+++ b/arch/sh/include/asm/kgdb.h
@@ -30,9 +30,6 @@ static inline void arch_kgdb_breakpoint(void)
         __asm__ __volatile__ ("trapa #0x3c\n");
 }
 
-/* State info */
-extern char in_nmi;             /* Debounce flag to prevent NMI reentry*/
-
 #define BUFMAX                 2048
 
 #define CACHE_FLUSH_IS_SAFE     1
diff --git a/arch/sh/include/asm/lmb.h b/arch/sh/include/asm/lmb.h
new file mode 100644
index 000000000000..9b437f657ffa
--- /dev/null
+++ b/arch/sh/include/asm/lmb.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SH_LMB_H
+#define __ASM_SH_LMB_H
+
+#define LMB_REAL_LIMIT  0
+
+#endif /* __ASM_SH_LMB_H */
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 67d8946db193..41080b173a7a 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -69,7 +69,7 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
                  * We exhaust ASID of this version.
                  * Flush all TLB and start new cycle.
                  */
-                flush_tlb_all();
+                local_flush_tlb_all();
 
 #ifdef CONFIG_SUPERH64
                 /*
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 49592c780a6e..81bffc0d6860 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -50,26 +50,24 @@ extern unsigned long shm_align_mask;
 extern unsigned long max_low_pfn, min_low_pfn;
 extern unsigned long memory_start, memory_end;
 
-extern void clear_page(void *to);
+static inline unsigned long
+pages_do_alias(unsigned long addr1, unsigned long addr2)
+{
+        return (addr1 ^ addr2) & shm_align_mask;
+}
+
+
+#define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, void *from);
 
-#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \
-        (defined(CONFIG_CPU_SH5) || defined(CONFIG_CPU_SH4) || \
-         defined(CONFIG_SH7705_CACHE_32KB))
 struct page;
 struct vm_area_struct;
-extern void clear_user_page(void *to, unsigned long address, struct page *page);
-extern void copy_user_page(void *to, void *from, unsigned long address,
-                           struct page *page);
-#if defined(CONFIG_CPU_SH4)
+
 extern void copy_user_highpage(struct page *to, struct page *from,
                                unsigned long vaddr, struct vm_area_struct *vma);
 #define __HAVE_ARCH_COPY_USER_HIGHPAGE
-#endif
-#else
-#define clear_user_page(page, vaddr, pg)        clear_page(page)
-#define copy_user_page(to, from, vaddr, pg)     copy_page(to, from)
-#endif
+extern void clear_user_highpage(struct page *page, unsigned long vaddr);
+#define clear_user_highpage     clear_user_highpage
 
 /*
  * These are used to make use of C type-checking..
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index d3633f513ebc..4163950cd1c6 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -10,7 +10,6 @@
    or architectures with incomplete PCI setup by the loader */
 
 #define pcibios_assign_all_busses()     1
-#define pcibios_scan_all_fns(a, b)      0
 
 /*
  * A board can define one or more PCI channels that represent built-in (or
diff --git a/arch/sh/include/asm/perf_counter.h b/arch/sh/include/asm/perf_counter.h
deleted file mode 100644
index d8e6bb9c0ccc..000000000000
--- a/arch/sh/include/asm/perf_counter.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __ASM_SH_PERF_COUNTER_H
-#define __ASM_SH_PERF_COUNTER_H
-
-/* SH only supports software counters through this interface. */
-static inline void set_perf_counter_pending(void) {}
-
-#define PERF_COUNTER_INDEX_OFFSET       0
-
-#endif /* __ASM_SH_PERF_COUNTER_H */
diff --git a/arch/sh/include/asm/perf_event.h b/arch/sh/include/asm/perf_event.h
new file mode 100644
index 000000000000..11a302297ab7
--- /dev/null
+++ b/arch/sh/include/asm/perf_event.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_SH_PERF_EVENT_H
+#define __ASM_SH_PERF_EVENT_H
+
+/* SH only supports software events through this interface. */
+static inline void set_perf_event_pending(void) {}
+
+#define PERF_EVENT_INDEX_OFFSET 0
+
+#endif /* __ASM_SH_PERF_EVENT_H */
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 2a011b18090b..4f3efa7d5a64 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -36,6 +36,12 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
 #define NEFF_SIGN       (1LL << (NEFF - 1))
 #define NEFF_MASK       (-1LL << NEFF)
 
+static inline unsigned long long neff_sign_extend(unsigned long val)
+{
+        unsigned long long extended = val;
+        return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended;
+}
+
 #ifdef CONFIG_29BIT
 #define NPHYS           29
 #else
@@ -133,27 +139,25 @@ typedef pte_t *pte_addr_t;
  */
 #define pgtable_cache_init()    do { } while (0)
 
-#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
-        defined(CONFIG_SH7705_CACHE_32KB))
-struct mm_struct;
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
-#endif
-
 struct vm_area_struct;
-extern void update_mmu_cache(struct vm_area_struct * vma,
-                             unsigned long address, pte_t pte);
+
+extern void __update_cache(struct vm_area_struct *vma,
+                           unsigned long address, pte_t pte);
+extern void __update_tlb(struct vm_area_struct *vma,
+                         unsigned long address, pte_t pte);
+
+static inline void
+update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
+{
+        __update_cache(vma, address, pte);
+        __update_tlb(vma, address, pte);
+}
+
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 extern void paging_init(void);
 extern void page_table_range_init(unsigned long start, unsigned long end,
                                   pgd_t *pgd);
 
-#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_CPU_SH4) && defined(CONFIG_MMU)
-extern void kmap_coherent_init(void);
-#else
-#define kmap_coherent_init()    do { } while (0)
-#endif
-
 /* arch/sh/mm/mmap.c */
 #define HAVE_ARCH_UNMAPPED_AREA
 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 72ea209195bd..c0d359ce337b 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -20,7 +20,7 @@
  * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
  *
  * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
- *   Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
+ *   Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL.
  *
  * - On 29 bit platforms, bits 31 to 29 are used for the space attributes
  *   and timing control which (together with bit 0) are moved into the
@@ -52,6 +52,7 @@
 #define _PAGE_PROTNONE  0x200           /* software: if not present  */
 #define _PAGE_ACCESSED  0x400           /* software: page referenced */
 #define _PAGE_FILE      _PAGE_WT        /* software: pagecache or swap? */
+#define _PAGE_SPECIAL   0x800           /* software: special page */
 
 #define _PAGE_SZ_MASK   (_PAGE_SZ0 | _PAGE_SZ1)
 #define _PAGE_PR_MASK   (_PAGE_RW | _PAGE_USER)
@@ -86,6 +87,14 @@
 #define _PAGE_PCC_ATR8  0x60000000      /* Attribute Memory space, 8 bit bus */
 #define _PAGE_PCC_ATR16 0x60000001      /* Attribute Memory space, 6 bit bus */
 
+#ifndef CONFIG_X2TLB
+/* copy the ptea attributes */
+static inline unsigned long copy_ptea_attributes(unsigned long x)
+{
+        return  ((x >> 28) & 0xe) | (x & 0x1);
+}
+#endif
+
 /* Mask which drops unused bits from the PTEL value */
 #if defined(CONFIG_CPU_SH3)
 #define _PAGE_CLEAR_FLAGS       (_PAGE_PROTNONE | _PAGE_ACCESSED| \
@@ -148,8 +157,12 @@
 # define _PAGE_SZHUGE   (_PAGE_FLAGS_HARD)
 #endif
 
+/*
+ * Mask of bits that are to be preserved accross pgprot changes.
+ */
 #define _PAGE_CHG_MASK \
-        (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
+        (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \
+         _PAGE_DIRTY | _PAGE_SPECIAL)
 
 #ifndef __ASSEMBLY__
 
@@ -328,7 +341,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
 #define pte_dirty(pte)          ((pte).pte_low & _PAGE_DIRTY)
 #define pte_young(pte)          ((pte).pte_low & _PAGE_ACCESSED)
 #define pte_file(pte)           ((pte).pte_low & _PAGE_FILE)
-#define pte_special(pte)        (0)
+#define pte_special(pte)        ((pte).pte_low & _PAGE_SPECIAL)
 
 #ifdef CONFIG_X2TLB
 #define pte_write(pte)          ((pte).pte_high & _PAGE_EXT_USER_WRITE)
@@ -358,8 +371,9 @@ PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
 PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
 PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
 PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
+PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL);
 
-static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
+#define __HAVE_ARCH_PTE_SPECIAL
 
 /*
  * Macro and implementation to make a page protection as uncachable.
@@ -394,13 +408,19 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 
 /* to find an entry in a page-table-directory. */
 #define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
-#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
+#define __pgd_offset(address)   pgd_index(address)
 
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(address)   pgd_offset(&init_mm, address)
 
+#define __pud_offset(address)   (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
+#define __pmd_offset(address)   (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+
 /* Find an entry in the third-level page table.. */
 #define pte_index(address)      ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define __pte_offset(address)   pte_index(address)
+
 #define pte_offset_kernel(dir, address) \
         ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
 #define pte_offset_map(dir, address)            pte_offset_kernel(dir, address)
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h
index c78990cda557..17cdbecc3adc 100644
--- a/arch/sh/include/asm/pgtable_64.h
+++ b/arch/sh/include/asm/pgtable_64.h
@@ -60,6 +60,9 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
 /* To find an entry in a kernel PGD. */
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 
+#define __pud_offset(address)   (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
+#define __pmd_offset(address)   (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+
 /*
  * PMD level access routines. Same notes as above.
  */
@@ -80,6 +83,8 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
 #define pte_index(address) \
                 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 
+#define __pte_offset(address)   pte_index(address)
+
 #define pte_offset_kernel(dir, addr) \
                 ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr)))
 
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index ff7daaf9a620..017e0c1807b2 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -32,7 +32,7 @@ enum cpu_type {
 
         /* SH-4A types */
         CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
-        CPU_SH7723, CPU_SH7724, CPU_SHX3,
+        CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,
 
         /* SH4AL-DSP types */
         CPU_SH7343, CPU_SH7722, CPU_SH7366,
@@ -44,6 +44,17 @@ enum cpu_type {
         CPU_SH_NONE
 };
 
+enum cpu_family {
+        CPU_FAMILY_SH2,
+        CPU_FAMILY_SH2A,
+        CPU_FAMILY_SH3,
+        CPU_FAMILY_SH4,
+        CPU_FAMILY_SH4A,
+        CPU_FAMILY_SH4AL_DSP,
+        CPU_FAMILY_SH5,
+        CPU_FAMILY_UNKNOWN,
+};
+
 /*
  * TLB information structure
  *
@@ -61,7 +72,7 @@ struct tlb_info {
 };
 
 struct sh_cpuinfo {
-        unsigned int type;
+        unsigned int type, family;
         int cut_major, cut_minor;
         unsigned long loops_per_jiffy;
         unsigned long asid_cache;
diff --git a/arch/sh/include/asm/romimage-macros.h b/arch/sh/include/asm/romimage-macros.h
new file mode 100644
index 000000000000..ae17a150bb58
--- /dev/null
+++ b/arch/sh/include/asm/romimage-macros.h
@@ -0,0 +1,73 @@
+#ifndef __ROMIMAGE_MACRO_H
+#define __ROMIMAGE_MACRO_H
+
+/* The LIST command is used to include comments in the script */
+.macro  LIST comment
+.endm
+
+/* The ED command is used to write a 32-bit word */
+.macro  ED, addr, data
+        mov.l 1f, r1
+        mov.l 2f, r0
+        mov.l r0, @r1
+        bra 3f
+         nop
+        .align 2
+1 :     .long \addr
+2 :     .long \data
+3 :
+.endm
+
+/* The EW command is used to write a 16-bit word */
+.macro  EW, addr, data
+        mov.l 1f, r1
+        mov.l 2f, r0
+        mov.w r0, @r1
+        bra 3f
+         nop
+        .align 2
+1 :     .long \addr
+2 :     .long \data
+3 :
+.endm
+
+/* The EB command is used to write an 8-bit word */
+.macro  EB, addr, data
+        mov.l 1f, r1
+        mov.l 2f, r0
+        mov.b r0, @r1
+        bra 3f
+         nop
+        .align 2
+1 :     .long \addr
+2 :     .long \data
+3 :
+.endm
+
+/* The WAIT command is used to delay the execution */
+.macro  WAIT, time
+        mov.l  2f, r3
+1 :
+        nop
+        tst     r3, r3
+        bf/s    1b
+        dt      r3
+        bra     3f
+         nop
+        .align 2
+2 :     .long \time * 100
+3 :
+.endm
+
+/* The DD command is used to read a 32-bit word */
+.macro  DD, addr, addr2, nr
+        mov.l 1f, r1
+        mov.l @r1, r0
+        bra 2f
+         nop
+        .align 2
+1 :     .long \addr
+2 :
+.endm
+
+#endif /* __ROMIMAGE_MACRO_H */
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index 01a4076a3719..a78701da775b 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -7,6 +7,7 @@ extern void __nosave_begin, __nosave_end;
 extern long __machvec_start, __machvec_end;
 extern char __uncached_start, __uncached_end;
 extern char _ebss[];
+extern char __start_eh_frame[], __stop_eh_frame[];
 
 #endif /* __ASM_SH_SECTIONS_H */
 
diff --git a/arch/sh/include/asm/sh_keysc.h b/arch/sh/include/asm/sh_keysc.h
index b5a4dd5a9729..4a65b1e40eab 100644
--- a/arch/sh/include/asm/sh_keysc.h
+++ b/arch/sh/include/asm/sh_keysc.h
@@ -7,6 +7,7 @@ struct sh_keysc_info {
         enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode;
         int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */
         int delay;
+        int kycr2_delay;
         int keycodes[SH_KEYSC_MAXKEYS];
 };
 
diff --git a/arch/sh/include/asm/smp.h b/arch/sh/include/asm/smp.h
index ca64f43abe67..53ef26ced75f 100644
--- a/arch/sh/include/asm/smp.h
+++ b/arch/sh/include/asm/smp.h
@@ -44,7 +44,6 @@ void plat_send_ipi(unsigned int cpu, unsigned int message);
 
 void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
-#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 
 #else
 
diff --git a/arch/sh/include/asm/stacktrace.h b/arch/sh/include/asm/stacktrace.h
new file mode 100644
index 000000000000..797018213718
--- /dev/null
+++ b/arch/sh/include/asm/stacktrace.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2009  Matt Fleming
+ *
+ * Based on:
+ *      The x86 implementation - arch/x86/include/asm/stacktrace.h
+ */
+#ifndef _ASM_SH_STACKTRACE_H
+#define _ASM_SH_STACKTRACE_H
+
+/* Generic stack tracer with callbacks */
+
+struct stacktrace_ops {
+        void (*warning)(void *data, char *msg);
+        /* msg must contain %s for the symbol */
+        void (*warning_symbol)(void *data, char *msg, unsigned long symbol);
+        void (*address)(void *data, unsigned long address, int reliable);
+        /* On negative return stop dumping */
+        int (*stack)(void *data, char *name);
+};
+
+void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
+                unsigned long *stack,
+                const struct stacktrace_ops *ops, void *data);
+
+#endif /* _ASM_SH_STACKTRACE_H */
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
index b1b995370e79..5c8ea28ff7a4 100644
--- a/arch/sh/include/asm/suspend.h
+++ b/arch/sh/include/asm/suspend.h
@@ -10,6 +10,15 @@ struct swsusp_arch_regs {
         struct pt_regs user_regs;
         unsigned long bank1_regs[8];
 };
+
+void sh_mobile_call_standby(unsigned long mode);
+
+#ifdef CONFIG_CPU_IDLE
+void sh_mobile_setup_cpuidle(void);
+#else
+static inline void sh_mobile_setup_cpuidle(void) {}
+#endif
+
 #endif
 
 /* flags passed to assembly suspend code */
diff --git a/arch/sh/include/asm/syscall_32.h b/arch/sh/include/asm/syscall_32.h
index 6f83f2cc45c1..7d80df4f09cb 100644
--- a/arch/sh/include/asm/syscall_32.h
+++ b/arch/sh/include/asm/syscall_32.h
@@ -65,6 +65,7 @@ static inline void syscall_get_arguments(struct task_struct *task,
         case 3: args[2] = regs->regs[6];
         case 2: args[1] = regs->regs[5];
         case 1: args[0] = regs->regs[4];
+        case 0:
                 break;
         default:
                 BUG();
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index ab79e1f4fbe0..b5c5acdc8c0e 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -14,18 +14,6 @@
 
 #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
 
-#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
-#define __icbi()                        \
-{                                       \
-        unsigned long __addr;           \
-        __addr = 0xa8000000;            \
-        __asm__ __volatile__(           \
-                "icbi   %0\n\t"         \
-                : /* no output */       \
-                : "m" (__m(__addr)));   \
-}
-#endif
-
 /*
  * A brief note on ctrl_barrier(), the control register write barrier.
  *
@@ -44,7 +32,7 @@
 #define mb()            __asm__ __volatile__ ("synco": : :"memory")
 #define rmb()           mb()
 #define wmb()           __asm__ __volatile__ ("synco": : :"memory")
-#define ctrl_barrier()  __icbi()
+#define ctrl_barrier()  __icbi(0xa8000000)
 #define read_barrier_depends()  do { } while(0)
 #else
 #define mb()            __asm__ __volatile__ ("": : :"memory")
@@ -181,6 +169,11 @@ BUILD_TRAP_HANDLER(breakpoint);
 BUILD_TRAP_HANDLER(singlestep);
 BUILD_TRAP_HANDLER(fpu_error);
 BUILD_TRAP_HANDLER(fpu_state_restore);
+BUILD_TRAP_HANDLER(nmi);
+
+#ifdef CONFIG_BUG
+extern void handle_BUG(struct pt_regs *);
+#endif
 
 #define arch_align_stack(x) (x)
 
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 6c68a51f1cc5..607d413f6168 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -14,12 +14,12 @@ do {									\
                         (u32 *)&tsk->thread.dsp_status;                 \
         __asm__ __volatile__ (                                          \
                 ".balign 4\n\t"                                         \
+                "movs.l @r2+, a0\n\t"                                   \
                 "movs.l @r2+, a1\n\t"                                   \
                 "movs.l @r2+, a0g\n\t"                                  \
                 "movs.l @r2+, a1g\n\t"                                  \
                 "movs.l @r2+, m0\n\t"                                   \
                 "movs.l @r2+, m1\n\t"                                   \
-                "movs.l @r2+, a0\n\t"                                   \
                 "movs.l @r2+, x0\n\t"                                   \
                 "movs.l @r2+, x1\n\t"                                   \
                 "movs.l @r2+, y0\n\t"                                   \
@@ -39,20 +39,20 @@ do {									\
                                                                         \
         __asm__ __volatile__ (                                          \
                 ".balign 4\n\t"                                         \
-                "stc.l  mod, @-r2\n\t"                          \
+                "stc.l  mod, @-r2\n\t"                                  \
                 "stc.l  re, @-r2\n\t"                                   \
                 "stc.l  rs, @-r2\n\t"                                   \
-                "sts.l  dsr, @-r2\n\t"                          \
-                "sts.l  y1, @-r2\n\t"                                   \
-                "sts.l  y0, @-r2\n\t"                                   \
-                "sts.l  x1, @-r2\n\t"                                   \
-                "sts.l  x0, @-r2\n\t"                                   \
-                "sts.l  a0, @-r2\n\t"                                   \
-                ".word  0xf653          ! movs.l        a1, @-r2\n\t"   \
-                ".word  0xf6f3          ! movs.l        a0g, @-r2\n\t"  \
-                ".word  0xf6d3          ! movs.l        a1g, @-r2\n\t"  \
-                ".word  0xf6c3          ! movs.l        m0, @-r2\n\t"   \
-                ".word  0xf6e3          ! movs.l        m1, @-r2\n\t"   \
+                "sts.l  dsr, @-r2\n\t"                                  \
+                "movs.l y1, @-r2\n\t"                                   \
+                "movs.l y0, @-r2\n\t"                                   \
+                "movs.l x1, @-r2\n\t"                                   \
+                "movs.l x0, @-r2\n\t"                                   \
+                "movs.l m1, @-r2\n\t"                                   \
+                "movs.l m0, @-r2\n\t"                                   \
+                "movs.l a1g, @-r2\n\t"                                  \
+                "movs.l a0g, @-r2\n\t"                                  \
+                "movs.l a1, @-r2\n\t"                                   \
+                "movs.l a0, @-r2\n\t"                                   \
                 : : "r" (__ts2));                                       \
 } while (0)
 
@@ -63,6 +63,16 @@ do {									\
 #define __restore_dsp(tsk)      do { } while (0)
 #endif
 
+#if defined(CONFIG_CPU_SH4A)
+#define __icbi(addr)    __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr))
+#else
+#define __icbi(addr)    mb()
+#endif
+
+#define __ocbp(addr)    __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr))
+#define __ocbi(addr)    __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr))
+#define __ocbwb(addr)   __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr))
+
 struct task_struct *__switch_to(struct task_struct *prev,
                                 struct task_struct *next);
 
@@ -198,8 +208,13 @@ do {							\
 })
 #endif
 
+static inline reg_size_t register_align(void *val)
+{
+        return (unsigned long)(signed long)val;
+}
+
 int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
-                            struct mem_access *ma);
+                            struct mem_access *ma, int);
 
 asmlinkage void do_address_error(struct pt_regs *regs,
                                  unsigned long writeaccess,
diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h
index 943acf5ea07c..8e4a03e7966c 100644
--- a/arch/sh/include/asm/system_64.h
+++ b/arch/sh/include/asm/system_64.h
@@ -37,4 +37,14 @@ do {								\
 #define jump_to_uncached()      do { } while (0)
 #define back_to_cached()        do { } while (0)
 
+#define __icbi(addr)    __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
+#define __ocbp(addr)    __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
+#define __ocbi(addr)    __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
+#define __ocbwb(addr)   __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
+
+static inline reg_size_t register_align(void *val)
+{
+        return (unsigned long long)(signed long long)(signed long)val;
+}
+
 #endif /* __ASM_SH_SYSTEM_64_H */
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index d570ac2e5cb9..bdeb9d46d17d 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -97,7 +97,7 @@ static inline struct thread_info *current_thread_info(void)
 
 extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
 extern void free_thread_info(struct thread_info *ti);
- 
+
 #endif /* THREAD_SHIFT < PAGE_SHIFT */
 
 #endif /* __ASSEMBLY__ */
@@ -116,6 +116,7 @@ extern void free_thread_info(struct thread_info *ti);
 #define TIF_SYSCALL_AUDIT       5       /* syscall auditing active */
 #define TIF_SECCOMP             6       /* secure computing */
 #define TIF_NOTIFY_RESUME       7       /* callback before returning to user */
+#define TIF_SYSCALL_TRACEPOINT  8       /* for ftrace syscall instrumentation */
 #define TIF_USEDFPU             16      /* FPU was used by this task this quantum (SMP) */
 #define TIF_POLLING_NRFLAG      17      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              18
@@ -129,25 +130,27 @@ extern void free_thread_info(struct thread_info *ti);
 #define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
+#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
 #define _TIF_USEDFPU            (1 << TIF_USEDFPU)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_FREEZE             (1 << TIF_FREEZE)
 
 /*
- * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within a byte, or we
+ * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we
  * blow the tst immediate size constraints and need to fix up
  * arch/sh/kernel/entry-common.S.
  */
 
 /* work to do in syscall trace */
 #define _TIF_WORK_SYSCALL_MASK  (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \
-                                 _TIF_SYSCALL_AUDIT | _TIF_SECCOMP)
+                                 _TIF_SYSCALL_AUDIT | _TIF_SECCOMP    | \
+                                 _TIF_SYSCALL_TRACEPOINT)
 
 /* work to do on any return to u-space */
 #define _TIF_ALLWORK_MASK       (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING      | \
                                  _TIF_NEED_RESCHED  | _TIF_SYSCALL_AUDIT   | \
                                  _TIF_SINGLESTEP    | _TIF_RESTORE_SIGMASK | \
-                                 _TIF_NOTIFY_RESUME)
+                                 _TIF_NOTIFY_RESUME | _TIF_SYSCALL_TRACEPOINT)
 
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK          (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index b69ee850906d..65e7bd2f2240 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -15,14 +15,14 @@
         .cache_nice_tries       = 2,                    \
         .busy_idx               = 3,                    \
         .idle_idx               = 2,                    \
-        .newidle_idx            = 2,                    \
-        .wake_idx               = 1,                    \
-        .forkexec_idx           = 1,                    \
+        .newidle_idx            = 0,                    \
+        .wake_idx               = 0,                    \
+        .forkexec_idx           = 0,                    \
         .flags                  = SD_LOAD_BALANCE       \
                                 | SD_BALANCE_FORK       \
                                 | SD_BALANCE_EXEC       \
-                                | SD_SERIALIZE          \
-                                | SD_WAKE_BALANCE,      \
+                                | SD_BALANCE_NEWIDLE    \
+                                | SD_SERIALIZE,         \
         .last_balance           = jiffies,              \
         .balance_interval       = 1,                    \
         .nr_balance_failed      = 0,                    \
@@ -31,7 +31,6 @@
 #define cpu_to_node(cpu)        ((void)(cpu),0)
 #define parent_node(node)       ((void)(node),0)
 
-#define node_to_cpumask(node)   ((void)node, cpu_online_map)
 #define cpumask_of_node(node)   ((void)node, cpu_online_mask)
 
 #define pcibus_to_node(bus)     ((void)(bus), -1)
diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h
index c7f3c94837dd..f8421f7ad63a 100644
--- a/arch/sh/include/asm/types.h
+++ b/arch/sh/include/asm/types.h
@@ -11,8 +11,10 @@
 
 #ifdef CONFIG_SUPERH32
 typedef u16 insn_size_t;
+typedef u32 reg_size_t;
 #else
 typedef u32 insn_size_t;
+typedef u64 reg_size_t;
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 61d6ad93d786..f3fd1b9eb6b1 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -132,7 +132,7 @@
 #define __NR_clone              120
 #define __NR_setdomainname      121
 #define __NR_uname              122
-#define __NR_modify_ldt         123
+#define __NR_cacheflush         123
 #define __NR_adjtimex           124
 #define __NR_mprotect           125
 #define __NR_sigprocmask        126
@@ -344,7 +344,7 @@
 #define __NR_preadv             333
 #define __NR_pwritev            334
 #define __NR_rt_tgsigqueueinfo  335
-#define __NR_perf_counter_open  336
+#define __NR_perf_event_open    336
 
 #define NR_syscalls 337
 
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index a751699afda3..343ce8f073ea 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -137,7 +137,7 @@
 #define __NR_clone              120
 #define __NR_setdomainname      121
 #define __NR_uname              122
-#define __NR_modify_ldt         123
+#define __NR_cacheflush         123
 #define __NR_adjtimex           124
 #define __NR_mprotect           125
 #define __NR_sigprocmask        126
@@ -384,7 +384,7 @@
 #define __NR_preadv             361
 #define __NR_pwritev            362
 #define __NR_rt_tgsigqueueinfo  363
-#define __NR_perf_counter_open  364
+#define __NR_perf_event_open    364
 
 #ifdef __KERNEL__
 
diff --git a/arch/sh/include/asm/unwinder.h b/arch/sh/include/asm/unwinder.h
new file mode 100644
index 000000000000..1e65c07b3e18
--- /dev/null
+++ b/arch/sh/include/asm/unwinder.h
@@ -0,0 +1,31 @@
+#ifndef _LINUX_UNWINDER_H
+#define _LINUX_UNWINDER_H
+
+#include <asm/stacktrace.h>
+
+struct unwinder {
+        const char *name;
+        struct list_head list;
+        int rating;
+        void (*dump)(struct task_struct *, struct pt_regs *,
+                     unsigned long *, const struct stacktrace_ops *, void *);
+};
+
+extern int unwinder_init(void);
+extern int unwinder_register(struct unwinder *);
+
+extern void unwind_stack(struct task_struct *, struct pt_regs *,
+                         unsigned long *, const struct stacktrace_ops *,
+                         void *);
+
+extern void stack_reader_dump(struct task_struct *, struct pt_regs *,
+                              unsigned long *, const struct stacktrace_ops *,
+                              void *);
+
+/*
+ * Used by fault handling code to signal to the unwinder code that it
+ * should switch to a different unwinder.
+ */
+extern int unwinder_faulted;
+
+#endif /* _LINUX_UNWINDER_H */
diff --git a/arch/sh/include/asm/vmlinux.lds.h b/arch/sh/include/asm/vmlinux.lds.h
new file mode 100644
index 000000000000..244ec4ad9a79
--- /dev/null
+++ b/arch/sh/include/asm/vmlinux.lds.h
@@ -0,0 +1,17 @@
+#ifndef __ASM_SH_VMLINUX_LDS_H
+#define __ASM_SH_VMLINUX_LDS_H
+
+#include <asm-generic/vmlinux.lds.h>
+
+#ifdef CONFIG_DWARF_UNWINDER
+#define DWARF_EH_FRAME                                                  \
+        .eh_frame : AT(ADDR(.eh_frame) - LOAD_OFFSET) {                 \
+                  VMLINUX_SYMBOL(__start_eh_frame) = .;                 \
+                  *(.eh_frame)                                          \
+                  VMLINUX_SYMBOL(__stop_eh_frame) = .;                  \
+        }
+#else
+#define DWARF_EH_FRAME
+#endif
+
+#endif /* __ASM_SH_VMLINUX_LDS_H */
diff --git a/arch/sh/include/asm/watchdog.h b/arch/sh/include/asm/watchdog.h
index f024fed00a72..2fe7cee9e43a 100644
--- a/arch/sh/include/asm/watchdog.h
+++ b/arch/sh/include/asm/watchdog.h
@@ -13,10 +13,18 @@
 #ifdef __KERNEL__
 
 #include <linux/types.h>
+#include <linux/io.h>
+
+#define WTCNT_HIGH      0x5a
+#define WTCSR_HIGH      0xa5
+
+#define WTCSR_CKS2      0x04
+#define WTCSR_CKS1      0x02
+#define WTCSR_CKS0      0x01
+
 #include <cpu/watchdog.h>
-#include <asm/io.h>
 
-/* 
+/*
  * See cpu-sh2/watchdog.h for explanation of this stupidity..
  */
 #ifndef WTCNT_R
@@ -27,13 +35,6 @@
 #  define WTCSR_R       WTCSR
 #endif
 
-#define WTCNT_HIGH      0x5a
-#define WTCSR_HIGH      0xa5
-
-#define WTCSR_CKS2      0x04
-#define WTCSR_CKS1      0x02
-#define WTCSR_CKS0      0x01
-
 /*
  * CKS0-2 supports a number of clock division ratios. At the time the watchdog
  * is enabled, it defaults to a 41 usec overflow period .. we overload this to
diff --git a/arch/sh/include/cpu-common/cpu/cacheflush.h b/arch/sh/include/cpu-common/cpu/cacheflush.h
deleted file mode 100644
index c3db00b73605..000000000000
--- a/arch/sh/include/cpu-common/cpu/cacheflush.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * include/asm-sh/cpu-sh2/cacheflush.h
- *
- * Copyright (C) 2003 Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_CPU_SH2_CACHEFLUSH_H
-#define __ASM_CPU_SH2_CACHEFLUSH_H
-
-/*
- * Cache flushing:
- *
- *  - flush_cache_all() flushes entire cache
- *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
- *  - flush_cache_dup mm(mm) handles cache flushing when forking
- *  - flush_cache_page(mm, vmaddr, pfn) flushes a single page
- *  - flush_cache_range(vma, start, end) flushes a range of pages
- *
- *  - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
- *  - flush_icache_range(start, end) flushes(invalidates) a range for icache
- *  - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
- *
- *  Caches are indexed (effectively) by physical address on SH-2, so
- *  we don't need them.
- */
-#define flush_cache_all()                       do { } while (0)
-#define flush_cache_mm(mm)                      do { } while (0)
-#define flush_cache_dup_mm(mm)                  do { } while (0)
-#define flush_cache_range(vma, start, end)      do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)      do { } while (0)
-#define flush_dcache_page(page)                 do { } while (0)
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-#define flush_icache_range(start, end)          do { } while (0)
-#define flush_icache_page(vma,pg)               do { } while (0)
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-#define flush_cache_sigtramp(vaddr)             do { } while (0)
-
-#define p3_cache_init()                         do { } while (0)
-
-#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */
diff --git a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h b/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
deleted file mode 100644
index 3d3b9205d2ac..000000000000
--- a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h
+++ /dev/null
@@ -1,34 +0,0 @@
-#ifndef __ASM_CPU_SH2A_CACHEFLUSH_H
-#define __ASM_CPU_SH2A_CACHEFLUSH_H
-
-/* 
- * Cache flushing:
- *
- *  - flush_cache_all() flushes entire cache
- *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
- *  - flush_cache_dup mm(mm) handles cache flushing when forking
- *  - flush_cache_page(mm, vmaddr, pfn) flushes a single page
- *  - flush_cache_range(vma, start, end) flushes a range of pages
- *
- *  - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
- *  - flush_icache_range(start, end) flushes(invalidates) a range for icache
- *  - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
- *
- *  Caches are indexed (effectively) by physical address on SH-2, so
- *  we don't need them.
- */
-#define flush_cache_all()                       do { } while (0)
-#define flush_cache_mm(mm)                      do { } while (0)
-#define flush_cache_dup_mm(mm)                  do { } while (0)
-#define flush_cache_range(vma, start, end)      do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)      do { } while (0)
-#define flush_dcache_page(page)                 do { } while (0)
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-void flush_icache_range(unsigned long start, unsigned long end);
-#define flush_icache_page(vma,pg)               do { } while (0)
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-#define flush_cache_sigtramp(vaddr)             do { } while (0)
-
-#define p3_cache_init()                         do { } while (0)
-#endif /* __ASM_CPU_SH2A_CACHEFLUSH_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/cacheflush.h b/arch/sh/include/cpu-sh3/cpu/cacheflush.h
deleted file mode 100644
index 1ac27aae6700..000000000000
--- a/arch/sh/include/cpu-sh3/cpu/cacheflush.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * include/asm-sh/cpu-sh3/cacheflush.h
- *
- * Copyright (C) 1999 Niibe Yutaka
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_CPU_SH3_CACHEFLUSH_H
-#define __ASM_CPU_SH3_CACHEFLUSH_H
-
-#if defined(CONFIG_SH7705_CACHE_32KB)
-/* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the
- * SH4. Unlike the SH4 this is a unified cache so we need to do some work
- * in mmap when 'exec'ing a new binary
- */
- /* 32KB cache, 4kb PAGE sizes need to check bit 12 */
-#define CACHE_ALIAS 0x00001000
-
-#define PG_mapped       PG_arch_1
-
-void flush_cache_all(void);
-void flush_cache_mm(struct mm_struct *mm);
-#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
-void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
-                              unsigned long end);
-void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
-void flush_dcache_page(struct page *pg);
-void flush_icache_range(unsigned long start, unsigned long end);
-void flush_icache_page(struct vm_area_struct *vma, struct page *page);
-
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-
-/* SH3 has unified cache so no special action needed here */
-#define flush_cache_sigtramp(vaddr)             do { } while (0)
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-
-#define p3_cache_init()                         do { } while (0)
-
-#else
-#include <cpu-common/cpu/cacheflush.h>
-#endif
-
-#endif /* __ASM_CPU_SH3_CACHEFLUSH_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/cacheflush.h b/arch/sh/include/cpu-sh4/cpu/cacheflush.h
deleted file mode 100644
index 065306d376eb..000000000000
--- a/arch/sh/include/cpu-sh4/cpu/cacheflush.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * include/asm-sh/cpu-sh4/cacheflush.h
- *
- * Copyright (C) 1999 Niibe Yutaka
- * Copyright (C) 2003 Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_CPU_SH4_CACHEFLUSH_H
-#define __ASM_CPU_SH4_CACHEFLUSH_H
-
-/*
- *  Caches are broken on SH-4 (unless we use write-through
- *  caching; in which case they're only semi-broken),
- *  so we need them.
- */
-void flush_cache_all(void);
-void flush_dcache_all(void);
-void flush_cache_mm(struct mm_struct *mm);
-#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
-void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
-                       unsigned long end);
-void flush_cache_page(struct vm_area_struct *vma, unsigned long addr,
-                      unsigned long pfn);
-void flush_dcache_page(struct page *pg);
-
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-
-void flush_icache_range(unsigned long start, unsigned long end);
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
-                             unsigned long addr, int len);
-
-#define flush_icache_page(vma,pg)               do { } while (0)
-
-/* Initialization of P3 area for copy_user_page */
-void p3_cache_init(void);
-
-#define PG_mapped       PG_arch_1
-
-#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
index 0ed5178fed69..f0886bc880e0 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -16,7 +16,8 @@
 #define DMAE0_IRQ       38
 #define SH_DMAC_BASE0   0xFF608020
 #define SH_DMARS_BASE   0xFF609000
-#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7724)
 #define DMTE0_IRQ       48      /* DMAC0A*/
 #define DMTE4_IRQ       40      /* DMAC0B */
 #define DMTE6_IRQ       42
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h
index ccf1d999db6d..e1e90960ee9a 100644
--- a/arch/sh/include/cpu-sh4/cpu/freq.h
+++ b/arch/sh/include/cpu-sh4/cpu/freq.h
@@ -22,6 +22,10 @@
 #define MSTPCR0                 0xa4150030
 #define MSTPCR1                 0xa4150034
 #define MSTPCR2                 0xa4150038
+#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
+#define FRQCR                   0xffc80000
+#define OSCCR                   0xffc80018
+#define PLLCR                   0xffc80024
 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
       defined(CONFIG_CPU_SUBTYPE_SH7780)
 #define FRQCR                   0xffc80000
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h
index 738ea43c5038..48560407cbe1 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7722.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h
@@ -221,4 +221,18 @@ enum {
         GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5,
 };
 
+enum {
+        HWBLK_UNKNOWN = 0,
+        HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_URAM, HWBLK_XYMEM,
+        HWBLK_INTC, HWBLK_DMAC, HWBLK_SHYWAY, HWBLK_HUDI,
+        HWBLK_UBC, HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL,
+        HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SIO,
+        HWBLK_SIOF0, HWBLK_SIOF1, HWBLK_IIC, HWBLK_RTC,
+        HWBLK_TPU, HWBLK_IRDA, HWBLK_SDHI, HWBLK_SIM, HWBLK_KEYSC,
+        HWBLK_TSIF, HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU,
+        HWBLK_JPU, HWBLK_BEU, HWBLK_CEU, HWBLK_VEU, HWBLK_VPU,
+        HWBLK_LCDC,
+        HWBLK_NR,
+};
+
 #endif /* __ASM_SH7722_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7723.h b/arch/sh/include/cpu-sh4/cpu/sh7723.h
index 14c8ca936781..9b36fae72324 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7723.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7723.h
@@ -265,4 +265,21 @@ enum {
         GPIO_FN_IDEA1, GPIO_FN_IDEA0,
 };
 
+enum {
+        HWBLK_UNKNOWN = 0,
+        HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_L2C, HWBLK_ILMEM, HWBLK_FPU,
+        HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
+        HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, HWBLK_SUBC,
+        HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
+        HWBLK_FLCTL,
+        HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2,
+        HWBLK_SCIF3, HWBLK_SCIF4, HWBLK_SCIF5,
+        HWBLK_MSIOF0, HWBLK_MSIOF1, HWBLK_MERAM, HWBLK_IIC, HWBLK_RTC,
+        HWBLK_ATAPI, HWBLK_ADC, HWBLK_TPU, HWBLK_IRDA, HWBLK_TSIF, HWBLK_ICB,
+        HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_KEYSC, HWBLK_USB,
+        HWBLK_2DG, HWBLK_SIU, HWBLK_VEU2H1, HWBLK_VOU, HWBLK_BEU, HWBLK_CEU,
+        HWBLK_VEU2H0, HWBLK_VPU, HWBLK_LCDC,
+        HWBLK_NR,
+};
+
 #endif /* __ASM_SH7723_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index 66fd1184359e..0cd1f71a1116 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -266,4 +266,21 @@ enum {
         GPIO_FN_INTC_IRQ1, GPIO_FN_INTC_IRQ0,
 };
 
+enum {
+        HWBLK_UNKNOWN = 0,
+        HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_RSMEM, HWBLK_ILMEM, HWBLK_L2C,
+        HWBLK_FPU, HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
+        HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC,
+        HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
+        HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SCIF3,
+        HWBLK_SCIF4, HWBLK_SCIF5, HWBLK_MSIOF0, HWBLK_MSIOF1,
+        HWBLK_KEYSC, HWBLK_RTC, HWBLK_IIC0, HWBLK_IIC1,
+        HWBLK_MMC, HWBLK_ETHER, HWBLK_ATAPI, HWBLK_TPU, HWBLK_IRDA,
+        HWBLK_TSIF, HWBLK_USB1, HWBLK_USB0, HWBLK_2DG,
+        HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_VEU1, HWBLK_CEU1, HWBLK_BEU1,
+        HWBLK_2DDMAC, HWBLK_SPU, HWBLK_JPU, HWBLK_VOU,
+        HWBLK_BEU0, HWBLK_CEU0, HWBLK_VEU0, HWBLK_VPU, HWBLK_LCDC,
+        HWBLK_NR,
+};
+
 #endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h
new file mode 100644
index 000000000000..f4d267efad71
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h
@@ -0,0 +1,243 @@
+#ifndef __ASM_SH7757_H__
+#define __ASM_SH7757_H__
+
+enum {
+        /* PTA */
+        GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
+        GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0,
+
+        /* PTB */
+        GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4,
+        GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0,
+
+        /* PTC */
+        GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4,
+        GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0,
+
+        /* PTD */
+        GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4,
+        GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0,
+
+        /* PTE */
+        GPIO_PTE7, GPIO_PTE6, GPIO_PTE5, GPIO_PTE4,
+        GPIO_PTE3, GPIO_PTE2, GPIO_PTE1, GPIO_PTE0,
+
+        /* PTF */
+        GPIO_PTF7, GPIO_PTF6, GPIO_PTF5, GPIO_PTF4,
+        GPIO_PTF3, GPIO_PTF2, GPIO_PTF1, GPIO_PTF0,
+
+        /* PTG */
+        GPIO_PTG7, GPIO_PTG6, GPIO_PTG5, GPIO_PTG4,
+        GPIO_PTG3, GPIO_PTG2, GPIO_PTG1, GPIO_PTG0,
+
+        /* PTH */
+        GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4,
+        GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0,
+
+        /* PTI */
+        GPIO_PTI7, GPIO_PTI6, GPIO_PTI5, GPIO_PTI4,
+        GPIO_PTI3, GPIO_PTI2, GPIO_PTI1, GPIO_PTI0,
+
+        /* PTJ */
+        GPIO_PTJ7, GPIO_PTJ6, GPIO_PTJ5, GPIO_PTJ4,
+        GPIO_PTJ3, GPIO_PTJ2, GPIO_PTJ1, GPIO_PTJ0,
+
+        /* PTK */
+        GPIO_PTK7, GPIO_PTK6, GPIO_PTK5, GPIO_PTK4,
+        GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0,
+
+        /* PTL */
+        GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4,
+        GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0,
+
+        /* PTM */
+                   GPIO_PTM6, GPIO_PTM5, GPIO_PTM4,
+        GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0,
+
+        /* PTN */
+        GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4,
+        GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0,
+
+        /* PTO */
+        GPIO_PTO7, GPIO_PTO6, GPIO_PTO5, GPIO_PTO4,
+        GPIO_PTO3, GPIO_PTO2, GPIO_PTO1, GPIO_PTO0,
+
+        /* PTP */
+                   GPIO_PTP6, GPIO_PTP5, GPIO_PTP4,
+        GPIO_PTP3, GPIO_PTP2, GPIO_PTP1, GPIO_PTP0,
+
+        /* PTQ */
+                   GPIO_PTQ6, GPIO_PTQ5, GPIO_PTQ4,
+        GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0,
+
+        /* PTR */
+        GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4,
+        GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0,
+
+        /* PTS */
+        GPIO_PTS7, GPIO_PTS6, GPIO_PTS5, GPIO_PTS4,
+        GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0,
+
+        /* PTT */
+                              GPIO_PTT5, GPIO_PTT4,
+        GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0,
+
+        /* PTU */
+        GPIO_PTU7, GPIO_PTU6, GPIO_PTU5, GPIO_PTU4,
+        GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0,
+
+        /* PTV */
+        GPIO_PTV7, GPIO_PTV6, GPIO_PTV5, GPIO_PTV4,
+        GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0,
+
+        /* PTW */
+        GPIO_PTW7, GPIO_PTW6, GPIO_PTW5, GPIO_PTW4,
+        GPIO_PTW3, GPIO_PTW2, GPIO_PTW1, GPIO_PTW0,
+
+        /* PTX */
+        GPIO_PTX7, GPIO_PTX6, GPIO_PTX5, GPIO_PTX4,
+        GPIO_PTX3, GPIO_PTX2, GPIO_PTX1, GPIO_PTX0,
+
+        /* PTY */
+        GPIO_PTY7, GPIO_PTY6, GPIO_PTY5, GPIO_PTY4,
+        GPIO_PTY3, GPIO_PTY2, GPIO_PTY1, GPIO_PTY0,
+
+        /* PTZ */
+        GPIO_PTZ7, GPIO_PTZ6, GPIO_PTZ5, GPIO_PTZ4,
+        GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1, GPIO_PTZ0,
+
+
+        /* PTA (mobule: LBSC, CPG, LPC) */
+        GPIO_FN_BS,     GPIO_FN_RDWR,   GPIO_FN_WE1,    GPIO_FN_RDY,
+        GPIO_FN_MD10,   GPIO_FN_MD9,    GPIO_FN_MD8,
+        GPIO_FN_LGPIO7, GPIO_FN_LGPIO6, GPIO_FN_LGPIO5, GPIO_FN_LGPIO4,
+        GPIO_FN_LGPIO3, GPIO_FN_LGPIO2, GPIO_FN_LGPIO1, GPIO_FN_LGPIO0,
+
+        /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
+        GPIO_FN_D15,    GPIO_FN_D14,    GPIO_FN_D13,    GPIO_FN_D12,
+        GPIO_FN_D11,    GPIO_FN_D10,    GPIO_FN_D9,     GPIO_FN_D8,
+        GPIO_FN_ET0_MDC,                GPIO_FN_ET0_MDIO,
+        GPIO_FN_ET1_MDC,                GPIO_FN_ET1_MDIO,
+        GPIO_FN_SIM_D,  GPIO_FN_SIM_CLK,                GPIO_FN_SIM_RST,
+        GPIO_FN_WPSZ1,  GPIO_FN_WPSZ0,  GPIO_FN_FWID,   GPIO_FN_FLSHSZ,
+        GPIO_FN_LPC_SPIEN,              GPIO_FN_BASEL,
+
+        /* PTC (mobule: SD) */
+        GPIO_FN_SD_WP,  GPIO_FN_SD_CD,  GPIO_FN_SD_CLK, GPIO_FN_SD_CMD,
+        GPIO_FN_SD_D3,  GPIO_FN_SD_D2,  GPIO_FN_SD_D1,  GPIO_FN_SD_D0,
+
+        /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */
+        GPIO_FN_IRQ7,   GPIO_FN_IRQ6,   GPIO_FN_IRQ5,   GPIO_FN_IRQ4,
+        GPIO_FN_IRQ3,   GPIO_FN_IRQ2,   GPIO_FN_IRQ1,   GPIO_FN_IRQ0,
+        GPIO_FN_MD6,    GPIO_FN_MD5,    GPIO_FN_MD3,    GPIO_FN_MD2,
+        GPIO_FN_MD1,    GPIO_FN_MD0,    GPIO_FN_ADTRG1, GPIO_FN_ADTRG0,
+
+        /* PTE (mobule: EtherC) */
+        GPIO_FN_ET0_CRS_DV,             GPIO_FN_ET0_TXD1,
+        GPIO_FN_ET0_TXD0,               GPIO_FN_ET0_TX_EN,
+        GPIO_FN_ET0_REF_CLK,            GPIO_FN_ET0_RXD1,
+        GPIO_FN_ET0_RXD0,               GPIO_FN_ET0_RX_ER,
+
+        /* PTF (mobule: EtherC) */
+        GPIO_FN_ET1_CRS_DV,             GPIO_FN_ET1_TXD1,
+        GPIO_FN_ET1_TXD0,               GPIO_FN_ET1_TX_EN,
+        GPIO_FN_ET1_REF_CLK,            GPIO_FN_ET1_RXD1,
+        GPIO_FN_ET1_RXD0,               GPIO_FN_ET1_RX_ER,
+
+        /* PTG (mobule: SYSTEM, PWMX, LPC) */
+        GPIO_FN_STATUS0,                GPIO_FN_STATUS1,
+        GPIO_FN_PWX0,   GPIO_FN_PWX1,   GPIO_FN_PWX2,   GPIO_FN_PWX3,
+        GPIO_FN_SERIRQ, GPIO_FN_CLKRUN, GPIO_FN_LPCPD,  GPIO_FN_LDRQ,
+
+        /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */
+        GPIO_FN_TCLK,   GPIO_FN_RXD4,   GPIO_FN_TXD4,
+        GPIO_FN_SP1_MOSI,               GPIO_FN_SP1_MISO,
+        GPIO_FN_SP1_SCK,                GPIO_FN_SP1_SCK_FB,
+        GPIO_FN_SP1_SS0,                GPIO_FN_SP1_SS1,
+        GPIO_FN_SP0_SS1,
+
+        /* PTI (mobule: INTC) */
+        GPIO_FN_IRQ15,  GPIO_FN_IRQ14,  GPIO_FN_IRQ13,  GPIO_FN_IRQ12,
+        GPIO_FN_IRQ11,  GPIO_FN_IRQ10,  GPIO_FN_IRQ9,   GPIO_FN_IRQ8,
+
+        /* PTJ (mobule: SCIF234, SERMUX) */
+        GPIO_FN_RXD3,   GPIO_FN_TXD3,   GPIO_FN_RXD2,   GPIO_FN_TXD2,
+        GPIO_FN_COM1_TXD,               GPIO_FN_COM1_RXD,
+        GPIO_FN_COM1_RTS,               GPIO_FN_COM1_CTS,
+
+        /* PTK (mobule: SERMUX) */
+        GPIO_FN_COM2_TXD,               GPIO_FN_COM2_RXD,
+        GPIO_FN_COM2_RTS,               GPIO_FN_COM2_CTS,
+        GPIO_FN_COM2_DTR,               GPIO_FN_COM2_DSR,
+        GPIO_FN_COM2_DCD,               GPIO_FN_COM2_RI,
+
+        /* PTL (mobule: SERMUX) */
+        GPIO_FN_RAC_TXD,                GPIO_FN_RAC_RXD,
+        GPIO_FN_RAC_RTS,                GPIO_FN_RAC_CTS,
+        GPIO_FN_RAC_DTR,                GPIO_FN_RAC_DSR,
+        GPIO_FN_RAC_DCD,                GPIO_FN_RAC_RI,
+
+        /* PTM (mobule: IIC, LPC) */
+        GPIO_FN_SDA6,   GPIO_FN_SCL6,   GPIO_FN_SDA7,   GPIO_FN_SCL7,
+        GPIO_FN_WP,     GPIO_FN_FMS0,   GPIO_FN_FMS1,
+
+        /* PTN (mobule: SCIF234, EVC) */
+        GPIO_FN_SCK2,   GPIO_FN_RTS4,   GPIO_FN_RTS3,   GPIO_FN_RTS2,
+        GPIO_FN_CTS4,   GPIO_FN_CTS3,   GPIO_FN_CTS2,
+        GPIO_FN_EVENT7, GPIO_FN_EVENT6, GPIO_FN_EVENT5, GPIO_FN_EVENT4,
+        GPIO_FN_EVENT3, GPIO_FN_EVENT2, GPIO_FN_EVENT1, GPIO_FN_EVENT0,
+
+        /* PTO (mobule: SGPIO) */
+        GPIO_FN_SGPIO0_CLK,             GPIO_FN_SGPIO0_LOAD,
+        GPIO_FN_SGPIO0_DI,              GPIO_FN_SGPIO0_DO,
+        GPIO_FN_SGPIO1_CLK,             GPIO_FN_SGPIO1_LOAD,
+        GPIO_FN_SGPIO1_DI,              GPIO_FN_SGPIO1_DO,
+
+        /* PTP (mobule: JMC, SCIF234) */
+        GPIO_FN_JMCTCK, GPIO_FN_JMCTMS, GPIO_FN_JMCTDO, GPIO_FN_JMCTDI,
+        GPIO_FN_JMCRST, GPIO_FN_SCK4,   GPIO_FN_SCK3,
+
+        /* PTQ (mobule: LPC) */
+        GPIO_FN_LAD3,   GPIO_FN_LAD2,   GPIO_FN_LAD1,   GPIO_FN_LAD0,
+        GPIO_FN_LFRAME, GPIO_FN_LRESET, GPIO_FN_LCLK,
+
+        /* PTR (mobule: GRA, IIC) */
+        GPIO_FN_DDC3,   GPIO_FN_DDC2,
+        GPIO_FN_SDA8,   GPIO_FN_SCL8,   GPIO_FN_SDA2,   GPIO_FN_SCL2,
+        GPIO_FN_SDA1,   GPIO_FN_SCL1,   GPIO_FN_SDA0,   GPIO_FN_SCL0,
+
+        /* PTS (mobule: GRA, IIC) */
+        GPIO_FN_DDC1,   GPIO_FN_DDC0,
+        GPIO_FN_SDA9,   GPIO_FN_SCL9,   GPIO_FN_SDA5,   GPIO_FN_SCL5,
+        GPIO_FN_SDA4,   GPIO_FN_SCL4,   GPIO_FN_SDA3,   GPIO_FN_SCL3,
+
+        /* PTT (mobule: SYSTEM, PWMX) */
+        GPIO_FN_AUDSYNC,                GPIO_FN_AUDCK,
+        GPIO_FN_AUDATA3,                GPIO_FN_AUDATA2,
+        GPIO_FN_AUDATA1,                GPIO_FN_AUDATA0,
+        GPIO_FN_PWX7,   GPIO_FN_PWX6,   GPIO_FN_PWX5,   GPIO_FN_PWX4,
+
+        /* PTU (mobule: LBSC, DMAC) */
+        GPIO_FN_CS6,    GPIO_FN_CS5,    GPIO_FN_CS4,    GPIO_FN_CS0,
+        GPIO_FN_RD,     GPIO_FN_WE0,    GPIO_FN_A25,    GPIO_FN_A24,
+        GPIO_FN_DREQ0,  GPIO_FN_DACK0,
+
+        /* PTV (mobule: LBSC, DMAC) */
+        GPIO_FN_A23,    GPIO_FN_A22,    GPIO_FN_A21,    GPIO_FN_A20,
+        GPIO_FN_A19,    GPIO_FN_A18,    GPIO_FN_A17,    GPIO_FN_A16,
+        GPIO_FN_TEND0,  GPIO_FN_DREQ1,  GPIO_FN_DACK1,  GPIO_FN_TEND1,
+
+        /* PTW (mobule: LBSC) */
+        GPIO_FN_A15,    GPIO_FN_A14,    GPIO_FN_A13,    GPIO_FN_A12,
+        GPIO_FN_A11,    GPIO_FN_A10,    GPIO_FN_A9,     GPIO_FN_A8,
+
+        /* PTX (mobule: LBSC) */
+        GPIO_FN_A7,     GPIO_FN_A6,     GPIO_FN_A5,     GPIO_FN_A4,
+        GPIO_FN_A3,     GPIO_FN_A2,     GPIO_FN_A1,     GPIO_FN_A0,
+
+        /* PTY (mobule: LBSC) */
+        GPIO_FN_D7,     GPIO_FN_D6,     GPIO_FN_D5,     GPIO_FN_D4,
+        GPIO_FN_D3,     GPIO_FN_D2,     GPIO_FN_D1,     GPIO_FN_D0,
+};
+
+#endif /* __ASM_SH7757_H__ */
diff --git a/arch/sh/include/cpu-sh5/cpu/cacheflush.h b/arch/sh/include/cpu-sh5/cpu/cacheflush.h
deleted file mode 100644
index 5a11f0b7e66a..000000000000
--- a/arch/sh/include/cpu-sh5/cpu/cacheflush.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifndef __ASM_SH_CPU_SH5_CACHEFLUSH_H
-#define __ASM_SH_CPU_SH5_CACHEFLUSH_H
-
-#ifndef __ASSEMBLY__
-
-struct vm_area_struct;
-struct page;
-struct mm_struct;
-
-extern void flush_cache_all(void);
-extern void flush_cache_mm(struct mm_struct *mm);
-extern void flush_cache_sigtramp(unsigned long vaddr);
-extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
-                              unsigned long end);
-extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn);
-extern void flush_dcache_page(struct page *pg);
-extern void flush_icache_range(unsigned long start, unsigned long end);
-extern void flush_icache_user_range(struct vm_area_struct *vma,
-                                    struct page *page, unsigned long addr,
-                                    int len);
-
-#define flush_cache_dup_mm(mm)  flush_cache_mm(mm)
-
-#define flush_dcache_mmap_lock(mapping)         do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
-
-#define flush_icache_page(vma, page)    do { } while (0)
-void p3_cache_init(void);
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* __ASM_SH_CPU_SH5_CACHEFLUSH_H */
-
diff --git a/arch/sh/include/mach-common/mach/migor.h b/arch/sh/include/mach-common/mach/migor.h
deleted file mode 100644
index e451f0229e00..000000000000
--- a/arch/sh/include/mach-common/mach/migor.h
+++ /dev/null
@@ -1,64 +0,0 @@
-#ifndef __ASM_SH_MIGOR_H
-#define __ASM_SH_MIGOR_H
-
-/*
- * linux/include/asm-sh/migor.h
- *
- * Copyright (C) 2008 Renesas Solutions
- *
- * Portions Copyright (C) 2007 Nobuhiro Iwamatsu
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- */
-#include <asm/addrspace.h>
-
-/* GPIO */
-#define PORT_PACR 0xa4050100
-#define PORT_PDCR 0xa4050106
-#define PORT_PECR 0xa4050108
-#define PORT_PHCR 0xa405010e
-#define PORT_PJCR 0xa4050110
-#define PORT_PKCR 0xa4050112
-#define PORT_PLCR 0xa4050114
-#define PORT_PMCR 0xa4050116
-#define PORT_PRCR 0xa405011c
-#define PORT_PTCR 0xa4050140
-#define PORT_PUCR 0xa4050142
-#define PORT_PVCR 0xa4050144
-#define PORT_PWCR 0xa4050146
-#define PORT_PXCR 0xa4050148
-#define PORT_PYCR 0xa405014a
-#define PORT_PZCR 0xa405014c
-#define PORT_PADR 0xa4050120
-#define PORT_PHDR 0xa405012e
-#define PORT_PTDR 0xa4050160
-#define PORT_PWDR 0xa4050166
-
-#define PORT_HIZCRA 0xa4050158
-#define PORT_HIZCRC 0xa405015c
-
-#define PORT_MSELCRB 0xa4050182
-
-#define PORT_PSELA 0xa405014e
-#define PORT_PSELB 0xa4050150
-#define PORT_PSELC 0xa4050152
-#define PORT_PSELD 0xa4050154
-#define PORT_PSELE 0xa4050156
-
-#define PORT_HIZCRA 0xa4050158
-#define PORT_HIZCRB 0xa405015a
-#define PORT_HIZCRC 0xa405015c
-
-#define BSC_CS4BCR 0xfec10010
-#define BSC_CS6ABCR 0xfec1001c
-#define BSC_CS4WCR 0xfec10030
-
-#include <video/sh_mobile_lcdc.h>
-
-int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
-                         struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
-
-#endif /* __ASM_SH_MIGOR_H */
diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h
new file mode 100644
index 000000000000..267e24112d82
--- /dev/null
+++ b/arch/sh/include/mach-common/mach/romimage.h
@@ -0,0 +1 @@
+/* do nothing here by default */
diff --git a/arch/sh/include/mach-common/mach/sh7785lcr.h b/arch/sh/include/mach-common/mach/sh7785lcr.h
index 90011d435f30..1292ae5c21b3 100644
--- a/arch/sh/include/mach-common/mach/sh7785lcr.h
+++ b/arch/sh/include/mach-common/mach/sh7785lcr.h
@@ -35,6 +35,8 @@
 #define PCA9564_ADDR            0x06000000      /* I2C */
 #define PCA9564_SIZE            0x00000100
 
+#define PCA9564_PROTO_32BIT_ADDR        0x14000000
+
 #define SM107_MEM_ADDR          0x10000000
 #define SM107_MEM_SIZE          0x00e00000
 #define SM107_REG_ADDR          0x13e00000
diff --git a/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
new file mode 100644
index 000000000000..8b8e4fa1fee9
--- /dev/null
+++ b/arch/sh/include/mach-ecovec24/mach/partner-jet-setup.txt
@@ -0,0 +1,82 @@
+LIST "partner-jet-setup.txt"
+LIST "(C) Copyright 2009 Renesas Solutions Corp"
+LIST "Kuninori Morimoto <morimoto.kuninori@renesas.com>"
+LIST "--------------------------------"
+LIST "zImage (RAM boot)"
+LIST "This script can be used to boot the kernel from RAM via JTAG:"
+LIST "> < partner-jet-setup.txt"
+LIST "> RD zImage, 0xa8800000"
+LIST "> G=0xa8800000"
+LIST "--------------------------------"
+LIST "romImage (Flash boot)"
+LIST "Use the following command to burn the zImage to flash via JTAG:"
+LIST "> RD romImage, 0"
+LIST "--------------------------------"
+
+LIST "disable watchdog"
+EW 0xa4520004, 0xa507
+
+LIST "MMU"
+ED 0xff000010, 0x00000004
+
+LIST "setup clocks"
+ED 0xa4150024, 0x00004000
+ED 0xa4150000, 0x8E003508
+ED 0xa4150004, 0x00000000
+
+WAIT 1
+
+LIST "BSC"
+ED 0xff800020, 0xa5a50000
+ED 0xfec10000, 0x00000013
+ED 0xfec10004, 0x11110400
+ED 0xfec10024, 0x00000440
+
+WAIT 1
+
+LIST "setup sdram"
+ED 0xfd000108, 0x00000181
+ED 0xfd000020, 0x015B0002
+ED 0xfd000030, 0x03061502
+ED 0xfd000034, 0x02020102
+ED 0xfd000038, 0x01090305
+ED 0xfd00003c, 0x00000002
+ED 0xfd000008, 0x00000005
+ED 0xfd000018, 0x00000001
+
+WAIT 1
+
+ED 0xfd000014, 0x00000002
+ED 0xfd000060, 0x00020000
+ED 0xfd000060, 0x00030000
+ED 0xfd000060, 0x00010040
+ED 0xfd000060, 0x00000532
+ED 0xfd000014, 0x00000002
+ED 0xfd000014, 0x00000004
+ED 0xfd000014, 0x00000004
+ED 0xfd000060, 0x00000432
+ED 0xfd000060, 0x000103C0
+ED 0xfd000060, 0x00010040
+
+WAIT 1
+
+ED 0xfd000010, 0x00000001
+ED 0xfd000044, 0x00000613
+ED 0xfd000048, 0x238C003A
+ED 0xfd000014, 0x00000002
+
+LIST "Dummy read"
+DD 0x0c400000, 0x0c400000
+
+ED 0xfd000014, 0x00000002
+ED 0xfd000014, 0x00000004
+ED 0xfd000108, 0x00000080
+ED 0xfd000040, 0x00010000
+
+WAIT 1
+
+LIST "setup cache"
+ED 0xff00001c, 0x0000090b
+
+LIST "disable USB"
+EW 0xA4D80000, 0x0000
diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h
new file mode 100644
index 000000000000..1c8787ecb1c1
--- /dev/null
+++ b/arch/sh/include/mach-ecovec24/mach/romimage.h
@@ -0,0 +1,20 @@
+/* EcoVec board specific boot code:
+ * converts the "partner-jet-script.txt" script into assembly
+ * the assembly code is the first code to be executed in the romImage
+ */
+
+#include <asm/romimage-macros.h>
+#include "partner-jet-setup.txt"
+
+        /* execute icbi after enabling cache */
+        mov.l   1f, r0
+        icbi    @r0
+
+        /* jump to cached area */
+        mova    2f, r0
+        jmp     @r0
+        nop
+
+        .align 2
+1 :     .long 0xa8000000
+2 :
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
new file mode 100644
index 000000000000..174374e19547
--- /dev/null
+++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
@@ -0,0 +1,21 @@
+#ifndef __ASM_SH_KFR2R09_H
+#define __ASM_SH_KFR2R09_H
+
+#include <video/sh_mobile_lcdc.h>
+
+#ifdef CONFIG_FB_SH_MOBILE_LCDC
+void kfr2r09_lcd_on(void *board_data);
+void kfr2r09_lcd_off(void *board_data);
+int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
+                      struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
+#else
+static inline void kfr2r09_lcd_on(void *board_data) {}
+static inline void kfr2r09_lcd_off(void *board_data) {}
+static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
+                                    struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
+{
+        return -ENODEV;
+}
+#endif
+
+#endif /* __ASM_SH_KFR2R09_H */
diff --git a/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt
new file mode 100644
index 000000000000..3a65503714ee
--- /dev/null
+++ b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt
@@ -0,0 +1,143 @@
+LIST "partner-jet-setup.txt - 20090729 Magnus Damm"
+LIST "set up enough of the kfr2r09 hardware to boot the kernel"
+
+LIST "zImage (RAM boot)"
+LIST "This script can be used to boot the kernel from RAM via JTAG:"
+LIST "> < partner-jet-setup.txt"
+LIST "> RD zImage, 0xa8800000"
+LIST "> G=0xa8800000"
+
+LIST "romImage (Flash boot)"
+LIST "Use the following command to burn the zImage to flash via JTAG:"
+LIST "> RD romImage, 0"
+
+LIST "--------------------------------"
+
+LIST "disable watchdog"
+EW 0xa4520004, 0xa507
+
+LIST "invalidate instruction cache"
+ED 0xff00001c, 0x00000800
+
+LIST "invalidate TLBs"
+ED 0xff000010, 0x00000004
+
+LIST "select mode for cs5 + cs6"
+ED 0xff800020, 0xa5a50001
+ED 0xfec10000, 0x0000001b
+
+LIST "setup clocks"
+LIST "The PLL and FLL values are updated here for the optimal"
+LIST "RF frequency and improved reception sensitivity."
+ED 0xa4150004, 0x00000050
+ED 0xa4150000, 0x91053508
+WAIT 1
+ED 0xa4150050, 0x00000340
+ED 0xa4150024, 0x00005000
+
+LIST "setup pins"
+EB 0xa4050120, 0x00
+EB 0xa4050122, 0x00
+EB 0xa4050124, 0x00
+EB 0xa4050126, 0x00
+EB 0xa4050128, 0xA0
+EB 0xa405012A, 0x10
+EB 0xa405012C, 0x00
+EB 0xa405012E, 0x00
+EB 0xa4050130, 0x00
+EB 0xa4050132, 0x00
+EB 0xa4050134, 0x01
+EB 0xa4050136, 0x40
+EB 0xa4050138, 0x00
+EB 0xa405013A, 0x00
+EB 0xa405013C, 0x00
+EB 0xa405013E, 0x20
+EB 0xa4050160, 0x00
+EB 0xa4050162, 0x40
+EB 0xa4050164, 0x03
+EB 0xa4050166, 0x00
+EB 0xa4050168, 0x00
+EB 0xa405016A, 0x00
+EB 0xa405016C, 0x00
+
+EW 0xa405014E, 0x5660
+EW 0xa4050150, 0x0145
+EW 0xa4050152, 0x1550
+EW 0xa4050154, 0x0200
+EW 0xa4050156, 0x0040
+
+EW 0xa4050158, 0x0000
+EW 0xa405015a, 0x0000
+EW 0xa405015c, 0x0000
+EW 0xa405015e, 0x0000
+
+EW 0xa4050180, 0x0000
+EW 0xa4050182, 0x8002
+EW 0xa4050184, 0x0000
+
+EW 0xa405018a, 0x9991
+EW 0xa405018c, 0x8011
+EW 0xa405018e, 0x9550
+
+EW 0xa4050100, 0x0000
+EW 0xa4050102, 0x5540
+EW 0xa4050104, 0x0000
+EW 0xa4050106, 0x0000
+EW 0xa4050108, 0x4550
+EW 0xa405010a, 0x0130
+EW 0xa405010c, 0x0555
+EW 0xa405010e, 0x0000
+EW 0xa4050110, 0x0000
+EW 0xa4050112, 0xAAA8
+EW 0xa4050114, 0x8305
+EW 0xa4050116, 0x10F0
+EW 0xa4050118, 0x0F50
+EW 0xa405011a, 0x0000
+EW 0xa405011c, 0x0000
+EW 0xa405011e, 0x0555
+EW 0xa4050140, 0x0000
+EW 0xa4050142, 0x5141
+EW 0xa4050144, 0x5005
+EW 0xa4050146, 0xAAA9
+EW 0xa4050148, 0xFAA9
+EW 0xa405014a, 0x3000
+EW 0xa405014c, 0x0000
+
+LIST "setup sdram"
+ED 0xFD000108, 0x40000301
+ED 0xFD000020, 0x011B0002
+ED 0xFD000030, 0x03060E02
+ED 0xFD000034, 0x01020102
+ED 0xFD000038, 0x01090406
+ED 0xFD000008, 0x00000004
+ED 0xFD000040, 0x00000001
+ED 0xFD000040, 0x00000000
+ED 0xFD000018, 0x00000001
+
+WAIT 1
+
+ED 0xFD000014, 0x00000002
+ED 0xFD000060, 0x00000032
+ED 0xFD000060, 0x00020000
+ED 0xFD000014, 0x00000004
+ED 0xFD000014, 0x00000004
+ED 0xFD000010, 0x00000001
+ED 0xFD000044, 0x000004AF
+ED 0xFD000048, 0x20CF0037
+
+LIST "read 16 bytes from sdram"
+DD 0xa8000000, 0xa8000000, 1
+DD 0xa8000004, 0xa8000004, 1
+DD 0xa8000008, 0xa8000008, 1
+DD 0xa800000c, 0xa800000c, 1
+
+ED 0xFD000014, 0x00000002
+ED 0xFD000014, 0x00000004
+ED 0xFD000108, 0x40000300
+ED 0xFD000040, 0x00010000
+
+LIST "write to internal ram"
+ED 0xfd8007fc, 0
+
+LIST "setup cache"
+ED 0xff00001c, 0x0000090b
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h
new file mode 100644
index 000000000000..a110823f2bde
--- /dev/null
+++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h
@@ -0,0 +1,20 @@
+/* kfr2r09 board specific boot code:
+ * converts the "partner-jet-script.txt" script into assembly
+ * the assembly code is the first code to be executed in the romImage
+ */
+
+#include <asm/romimage-macros.h>
+#include "partner-jet-setup.txt"
+
+        /* execute icbi after enabling cache */
+        mov.l   1f, r0
+        icbi    @r0
+
+        /* jump to cached area */
+        mova    2f, r0
+        jmp     @r0
+         nop
+
+        .align 2
+1:      .long 0xa8000000
+2:
diff --git a/arch/sh/include/mach-migor/mach/migor.h b/arch/sh/include/mach-migor/mach/migor.h
new file mode 100644
index 000000000000..cee6cb88e020
--- /dev/null
+++ b/arch/sh/include/mach-migor/mach/migor.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_SH_MIGOR_H
+#define __ASM_SH_MIGOR_H
+
+#define PORT_MSELCRB 0xa4050182
+#define BSC_CS4BCR 0xfec10010
+#define BSC_CS6ABCR 0xfec1001c
+#define BSC_CS4WCR 0xfec10030
+
+#include <video/sh_mobile_lcdc.h>
+
+int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
+                         struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
+
+#endif /* __ASM_SH_MIGOR_H */
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 349d833deab5..a2d0a40f3848 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -1,5 +1,41 @@
-ifeq ($(CONFIG_SUPERH32),y)
-include ${srctree}/arch/sh/kernel/Makefile_32
-else
-include ${srctree}/arch/sh/kernel/Makefile_64
+#
+# Makefile for the Linux/SuperH kernel.
+#
+
+extra-y := head_$(BITS).o init_task.o vmlinux.lds
+
+ifdef CONFIG_FUNCTION_TRACER
+# Do not profile debug and lowlevel utilities
+CFLAGS_REMOVE_ftrace.o = -pg
 endif
+
+obj-y   := debugtraps.o dumpstack.o idle.o io.o io_generic.o irq.o      \
+           machvec.o nmi_debug.o process_$(BITS).o ptrace_$(BITS).o     \
+           setup.o signal_$(BITS).o sys_sh.o sys_sh$(BITS).o            \
+           syscalls_$(BITS).o time.o topology.o traps.o                 \
+           traps_$(BITS).o unwinder.o
+
+obj-y                           += cpu/
+obj-$(CONFIG_VSYSCALL)          += vsyscall/
+obj-$(CONFIG_SMP)               += smp.o
+obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o
+obj-$(CONFIG_KGDB)              += kgdb.o
+obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
+obj-$(CONFIG_MODULES)           += sh_ksyms_$(BITS).o module.o
+obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
+obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
+obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
+obj-$(CONFIG_STACKTRACE)        += stacktrace.o
+obj-$(CONFIG_IO_TRAPPED)        += io_trapped.o
+obj-$(CONFIG_KPROBES)           += kprobes.o
+obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
+obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
+obj-$(CONFIG_FTRACE_SYSCALLS)   += ftrace.o
+obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
+obj-$(CONFIG_DUMP_CODE)         += disassemble.o
+obj-$(CONFIG_HIBERNATION)       += swsusp.o
+obj-$(CONFIG_DWARF_UNWINDER)    += dwarf.o
+
+obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)     += localtimer.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
deleted file mode 100644
index 9411e3e31e68..000000000000
--- a/arch/sh/kernel/Makefile_32
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Makefile for the Linux/SuperH kernel.
-#
-
-extra-y := head_32.o init_task.o vmlinux.lds
-
-ifdef CONFIG_FUNCTION_TRACER
-# Do not profile debug and lowlevel utilities
-CFLAGS_REMOVE_ftrace.o = -pg
-endif
-
-obj-y   := debugtraps.o idle.o io.o io_generic.o irq.o                  \
-           machvec.o process_32.o ptrace_32.o setup.o signal_32.o       \
-           sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o  \
-           traps.o traps_32.o
-
-obj-y                           += cpu/
-obj-$(CONFIG_VSYSCALL)          += vsyscall/
-obj-$(CONFIG_SMP)               += smp.o
-obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o
-obj-$(CONFIG_KGDB)              += kgdb.o
-obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
-obj-$(CONFIG_MODULES)           += sh_ksyms_32.o module.o
-obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
-obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
-obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
-obj-$(CONFIG_STACKTRACE)        += stacktrace.o
-obj-$(CONFIG_IO_TRAPPED)        += io_trapped.o
-obj-$(CONFIG_KPROBES)           += kprobes.o
-obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
-obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
-obj-$(CONFIG_DUMP_CODE)         += disassemble.o
-obj-$(CONFIG_HIBERNATION)       += swsusp.o
-
-obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)     += localtimer.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
deleted file mode 100644
index 67b9f6c6326b..000000000000
--- a/arch/sh/kernel/Makefile_64
+++ /dev/null
@@ -1,19 +0,0 @@
-extra-y := head_64.o init_task.o vmlinux.lds
-
-obj-y   := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
-           ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
-           syscalls_64.o time.o topology.o traps.o traps_64.o
-
-obj-y                           += cpu/
-obj-$(CONFIG_SMP)               += smp.o
-obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
-obj-$(CONFIG_MODULES)           += sh_ksyms_64.o module.o
-obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
-obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
-obj-$(CONFIG_STACKTRACE)        += stacktrace.o
-obj-$(CONFIG_IO_TRAPPED)        += io_trapped.o
-obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
-
-obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)     += localtimer.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c
index 99aceb28ee24..d218e808294e 100644
--- a/arch/sh/kernel/asm-offsets.c
+++ b/arch/sh/kernel/asm-offsets.c
@@ -26,6 +26,7 @@ int main(void)
         DEFINE(TI_CPU,          offsetof(struct thread_info, cpu));
         DEFINE(TI_PRE_COUNT,    offsetof(struct thread_info, preempt_count));
         DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block));
+        DEFINE(TI_SIZE,         sizeof(struct thread_info));
 
 #ifdef CONFIG_HIBERNATION
         DEFINE(PBE_ADDRESS, offsetof(struct pbe, address));
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index eecad7cbd61e..3d6b9312dc47 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -19,4 +19,4 @@ obj-$(CONFIG_UBC_WAKEUP)	+= ubc.o
 obj-$(CONFIG_SH_ADC)            += adc.o
 obj-$(CONFIG_SH_CLK_CPG)        += clock-cpg.o
 
-obj-y   += irq/ init.o clock.o
+obj-y   += irq/ init.o clock.o hwblk.o
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c
new file mode 100644
index 000000000000..c0ad7d46e784
--- /dev/null
+++ b/arch/sh/kernel/cpu/hwblk.c
@@ -0,0 +1,155 @@
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <asm/clock.h>
+
+static DEFINE_SPINLOCK(hwblk_lock);
+
+static void hwblk_area_mod_cnt(struct hwblk_info *info,
+                               int area, int counter, int value, int goal)
+{
+        struct hwblk_area *hap = info->areas + area;
+
+        hap->cnt[counter] += value;
+
+        if (hap->cnt[counter] != goal)
+                return;
+
+        if (hap->flags & HWBLK_AREA_FLAG_PARENT)
+                hwblk_area_mod_cnt(info, hap->parent, counter, value, goal);
+}
+
+
+static int __hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
+                          int counter, int value, int goal)
+{
+        struct hwblk *hp = info->hwblks + hwblk;
+
+        hp->cnt[counter] += value;
+        if (hp->cnt[counter] == goal)
+                hwblk_area_mod_cnt(info, hp->area, counter, value, goal);
+
+        return hp->cnt[counter];
+}
+
+static void hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
+                          int counter, int value, int goal)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&hwblk_lock, flags);
+        __hwblk_mod_cnt(info, hwblk, counter, value, goal);
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int counter)
+{
+        hwblk_mod_cnt(info, hwblk, counter, 1, 1);
+}
+
+void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int counter)
+{
+        hwblk_mod_cnt(info, hwblk, counter, -1, 0);
+}
+
+void hwblk_enable(struct hwblk_info *info, int hwblk)
+{
+        struct hwblk *hp = info->hwblks + hwblk;
+        unsigned long tmp;
+        unsigned long flags;
+        int ret;
+
+        spin_lock_irqsave(&hwblk_lock, flags);
+
+        ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, 1, 1);
+        if (ret == 1) {
+                tmp = __raw_readl(hp->mstp);
+                tmp &= ~(1 << hp->bit);
+                __raw_writel(tmp, hp->mstp);
+        }
+
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+void hwblk_disable(struct hwblk_info *info, int hwblk)
+{
+        struct hwblk *hp = info->hwblks + hwblk;
+        unsigned long tmp;
+        unsigned long flags;
+        int ret;
+
+        spin_lock_irqsave(&hwblk_lock, flags);
+
+        ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, -1, 0);
+        if (ret == 0) {
+                tmp = __raw_readl(hp->mstp);
+                tmp |= 1 << hp->bit;
+                __raw_writel(tmp, hp->mstp);
+        }
+
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+struct hwblk_info *hwblk_info;
+
+int __init hwblk_register(struct hwblk_info *info)
+{
+        hwblk_info = info;
+        return 0;
+}
+
+int __init __weak arch_hwblk_init(void)
+{
+        return 0;
+}
+
+int __weak arch_hwblk_sleep_mode(void)
+{
+        return SUSP_SH_SLEEP;
+}
+
+int __init hwblk_init(void)
+{
+        return arch_hwblk_init();
+}
+
+/* allow clocks to enable and disable hardware blocks */
+static int sh_hwblk_clk_enable(struct clk *clk)
+{
+        if (!hwblk_info)
+                return -ENOENT;
+
+        hwblk_enable(hwblk_info, clk->arch_flags);
+        return 0;
+}
+
+static void sh_hwblk_clk_disable(struct clk *clk)
+{
+        if (hwblk_info)
+                hwblk_disable(hwblk_info, clk->arch_flags);
+}
+
+static struct clk_ops sh_hwblk_clk_ops = {
+        .enable         = sh_hwblk_clk_enable,
+        .disable        = sh_hwblk_clk_disable,
+        .recalc         = followparent_recalc,
+};
+
+int __init sh_hwblk_clk_register(struct clk *clks, int nr)
+{
+        struct clk *clkp;
+        int ret = 0;
+        int k;
+
+        for (k = 0; !ret && (k < nr); k++) {
+                clkp = clks + k;
+                clkp->ops = &sh_hwblk_clk_ops;
+                ret |= clk_register(clkp);
+        }
+
+        return ret;
+}
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index ad85421099cd..e932ebef4738 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -3,7 +3,7 @@
  *
  * CPU init code
  *
- * Copyright (C) 2002 - 2007  Paul Mundt
+ * Copyright (C) 2002 - 2009  Paul Mundt
  * Copyright (C) 2003  Richard Curnow
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -62,6 +62,37 @@ static void __init speculative_execution_init(void)
 #define speculative_execution_init()    do { } while (0)
 #endif
 
+#ifdef CONFIG_CPU_SH4A
+#define EXPMASK                 0xff2f0004
+#define EXPMASK_RTEDS           (1 << 0)
+#define EXPMASK_BRDSSLP         (1 << 1)
+#define EXPMASK_MMCAW           (1 << 4)
+
+static void __init expmask_init(void)
+{
+        unsigned long expmask = __raw_readl(EXPMASK);
+
+        /*
+         * Future proofing.
+         *
+         * Disable support for slottable sleep instruction
+         * and non-nop instructions in the rte delay slot.
+         */
+        expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP);
+
+        /*
+         * Enable associative writes to the memory-mapped cache array
+         * until the cache flush ops have been rewritten.
+         */
+        expmask |= EXPMASK_MMCAW;
+
+        __raw_writel(expmask, EXPMASK);
+        ctrl_barrier();
+}
+#else
+#define expmask_init()  do { } while (0)
+#endif
+
 /* 2nd-level cache init */
 void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
 {
@@ -268,11 +299,9 @@ asmlinkage void __init sh_cpu_init(void)
         cache_init();
 
         if (raw_smp_processor_id() == 0) {
-#ifdef CONFIG_MMU
                 shm_align_mask = max_t(unsigned long,
                                        current_cpu_data.dcache.way_size - 1,
                                        PAGE_SIZE - 1);
-#endif
 
                 /* Boot CPU sets the cache shape */
                 detect_cache_shape();
@@ -321,4 +350,5 @@ asmlinkage void __init sh_cpu_init(void)
 #endif
 
         speculative_execution_init();
+        expmask_init();
 }
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 808d99a48efb..c1508a90fc6a 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -35,6 +35,7 @@ static void disable_ipr_irq(unsigned int irq)
         unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
         /* Set the priority in IPR to 0 */
         __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
+        (void)__raw_readw(addr);        /* Read back to flush write posting */
 }
 
 static void enable_ipr_irq(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S
index becc54c45692..c8a4331d9b8d 100644
--- a/arch/sh/kernel/cpu/sh2/entry.S
+++ b/arch/sh/kernel/cpu/sh2/entry.S
@@ -227,8 +227,9 @@ ENTRY(sh_bios_handler)
         mov.l   @r15+, r14
         add     #8,r15
         lds.l   @r15+, pr
+        mov.l   @r15+,r15
         rte
-         mov.l  @r15+,r15
+         nop
         .align  2
 1:      .long   gdb_vbr_vector
 #endif /* CONFIG_SH_STANDARD_BIOS */
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 5916d9096b99..1db6d8883888 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -29,6 +29,7 @@ int __init detect_cpu_and_cache_system(void)
          */
         boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
         boot_cpu_data.icache = boot_cpu_data.dcache;
+        boot_cpu_data.family = CPU_FAMILY_SH2;
 
         return 0;
 }
diff --git a/arch/sh/kernel/cpu/sh2a/entry.S b/arch/sh/kernel/cpu/sh2a/entry.S
index ab3903eeda5c..222742ddc0d6 100644
--- a/arch/sh/kernel/cpu/sh2a/entry.S
+++ b/arch/sh/kernel/cpu/sh2a/entry.S
@@ -176,8 +176,9 @@ ENTRY(sh_bios_handler)
         movml.l @r15+,r14
         add     #8,r15
         lds.l   @r15+, pr
+        mov.l   @r15+,r15
         rte
-         mov.l  @r15+,r15
+         nop
         .align  2
 1:      .long   gdb_vbr_vector
 #endif /* CONFIG_SH_STANDARD_BIOS */
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index e098e2f6aa08..6825d6507164 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -15,6 +15,8 @@
 
 int __init detect_cpu_and_cache_system(void)
 {
+        boot_cpu_data.family                    = CPU_FAMILY_SH2A;
+
         /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */
         boot_cpu_data.flags                     |= CPU_HAS_OP32;
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index fa30b6017730..e8749505bd2a 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -22,13 +22,6 @@ static int stc_multipliers[] = { 1, 2, 4, 8, 3, 6, 1, 1 };
 static int ifc_divisors[]    = { 1, 2, 4, 1, 3, 1, 1, 1 };
 static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 };
 
-static void set_bus_parent(struct clk *clk)
-{
-        struct clk *bus_clk = clk_get(NULL, "bus_clk");
-        clk->parent = bus_clk;
-        clk_put(bus_clk);
-}
-
 static void master_clk_init(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
@@ -50,9 +43,6 @@ static unsigned long module_clk_recalc(struct clk *clk)
 }
 
 static struct clk_ops sh7709_module_clk_ops = {
-#ifdef CLOCK_MODE_0_1_2_7
-        .init           = set_bus_parent,
-#endif
         .recalc         = module_clk_recalc,
 };
 
@@ -78,7 +68,6 @@ static unsigned long cpu_clk_recalc(struct clk *clk)
 }
 
 static struct clk_ops sh7709_cpu_clk_ops = {
-        .init           = set_bus_parent,
         .recalc         = cpu_clk_recalc,
 };
 
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 3cb531f233f2..0151933e5253 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -53,10 +53,6 @@
  *      syscall #
  *
  */
-#if defined(CONFIG_KGDB)
-NMI_VEC = 0x1c0                 ! Must catch early for debounce
-#endif
-
 /* Offsets to the stack */
 OFF_R0  =  0            /* Return value. New ABI also arg4 */
 OFF_R1  =  4            /* New ABI: arg5 */
@@ -71,7 +67,6 @@ OFF_PC  =  (16*4)
 OFF_SR  =  (16*4+8)
 OFF_TRA =  (16*4+6*4)
 
-
 #define k0      r0
 #define k1      r1
 #define k2      r2
@@ -113,34 +108,34 @@ OFF_TRA	=  (16*4+6*4)
 #if defined(CONFIG_MMU)
         .align  2
 ENTRY(tlb_miss_load)
-        bra     call_dpf
+        bra     call_handle_tlbmiss
          mov    #0, r5
 
         .align  2
 ENTRY(tlb_miss_store)
-        bra     call_dpf
+        bra     call_handle_tlbmiss
          mov    #1, r5
 
         .align  2
 ENTRY(initial_page_write)
-        bra     call_dpf
-         mov    #1, r5
+        bra     call_handle_tlbmiss
+         mov    #2, r5
 
         .align  2
 ENTRY(tlb_protection_violation_load)
-        bra     call_dpf
+        bra     call_do_page_fault
          mov    #0, r5
 
         .align  2
 ENTRY(tlb_protection_violation_store)
-        bra     call_dpf
+        bra     call_do_page_fault
          mov    #1, r5
 
-call_dpf:
+call_handle_tlbmiss:
+        setup_frame_reg
         mov.l   1f, r0
         mov     r5, r8
         mov.l   @r0, r6
-        mov     r6, r9
         mov.l   2f, r0
         sts     pr, r10
         jsr     @r0
@@ -151,16 +146,25 @@ call_dpf:
          lds    r10, pr
         rts
          nop
-0:      mov.l   3f, r0
-        mov     r9, r6
+0:
         mov     r8, r5
+call_do_page_fault:
+        mov.l   1f, r0
+        mov.l   @r0, r6
+
+        sti
+
+        mov.l   3f, r0
+        mov.l   4f, r1
+        mov     r15, r4
         jmp     @r0
-         mov    r15, r4
+         lds    r1, pr
 
         .align 2
 1:      .long   MMU_TEA
-2:      .long   __do_page_fault
+2:      .long   handle_tlbmiss
 3:      .long   do_page_fault
+4:      .long   ret_from_exception
 
         .align  2
 ENTRY(address_error_load)
@@ -256,7 +260,7 @@ restore_all:
         !
         ! Calculate new SR value
         mov     k3, k2                  ! original SR value
-        mov     #0xf0, k1
+        mov     #0xfffffff0, k1
         extu.b  k1, k1
         not     k1, k1
         and     k1, k2                  ! Mask original SR value
@@ -272,21 +276,12 @@ restore_all:
 6:      or      k0, k2                  ! Set the IMASK-bits
         ldc     k2, ssr
         !
-#if defined(CONFIG_KGDB)
-        ! Clear in_nmi
-        mov.l   6f, k0
-        mov     #0, k1
-        mov.b   k1, @k0
-#endif
         mov     k4, r15
         rte
          nop
 
         .align  2
 5:      .long   0x00001000      ! DSP
-#ifdef CONFIG_KGDB
-6:      .long   in_nmi
-#endif
 7:      .long   0x30000000
 
 ! common exception handler
@@ -478,23 +473,6 @@ ENTRY(save_low_regs)
 !
         .balign         512,0,512
 ENTRY(handle_interrupt)
-#if defined(CONFIG_KGDB)
-        mov.l   2f, k2
-        ! Debounce (filter nested NMI)
-        mov.l   @k2, k0
-        mov.l   9f, k1
-        cmp/eq  k1, k0
-        bf      11f
-        mov.l   10f, k1
-        tas.b   @k1
-        bt      11f
-        rte
-         nop
-        .align  2
-9:      .long   NMI_VEC
-10:     .long   in_nmi
-11:
-#endif /* defined(CONFIG_KGDB) */
         sts     pr, k3          ! save original pr value in k3
         mova    exception_data, k0
 
@@ -507,13 +485,49 @@ ENTRY(handle_interrupt)
         bsr     save_regs       ! needs original pr value in k3
          mov    #-1, k2         ! default vector kept in k2
 
+        setup_frame_reg
+
+        stc     sr, r0  ! get status register
+        shlr2   r0
+        and     #0x3c, r0
+        cmp/eq  #0x3c, r0
+        bf      9f
+        TRACE_IRQS_OFF
+9:
+
         ! Setup return address and jump to do_IRQ
         mov.l   4f, r9          ! fetch return address
         lds     r9, pr          ! put return address in pr
         mov.l   2f, r4
         mov.l   3f, r9
         mov.l   @r4, r4         ! pass INTEVT vector as arg0
+
+        shlr2   r4
+        shlr    r4
+        mov     r4, r0          ! save vector->jmp table offset for later
+
+        shlr2   r4              ! vector to IRQ# conversion
+        add     #-0x10, r4
+
+        cmp/pz  r4              ! is it a valid IRQ?
+        bt      10f
+
+        /*
+         * We got here as a result of taking the INTEVT path for something
+         * that isn't a valid hard IRQ, therefore we bypass the do_IRQ()
+         * path and special case the event dispatch instead.  This is the
+         * expected path for the NMI (and any other brilliantly implemented
+         * exception), which effectively wants regular exception dispatch
+         * but is unfortunately reported through INTEVT rather than
+         * EXPEVT.  Grr.
+         */
+        mov.l   6f, r9
+        mov.l   @(r0, r9), r9
         jmp     @r9
+         mov    r15, r8         ! trap handlers take saved regs in r8
+
+10:
+        jmp     @r9             ! Off to do_IRQ() we go.
          mov    r15, r5         ! pass saved registers as arg1
 
 ENTRY(exception_none)
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index e5a0de39a2db..46610c35c232 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -48,9 +48,7 @@ ENTRY(exception_handling_table)
         .long   system_call     ! Unconditional Trap     /* 160 */
         .long   exception_error ! reserved_instruction (filled by trap_init) /* 180 */
         .long   exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
-ENTRY(nmi_slot)
-        .long   kgdb_handle_exception   /* 1C0 */       ! Allow trap to debugger
-ENTRY(user_break_point_trap)
+        .long   nmi_trap_handler        /* 1C0 */       ! Allow trap to debugger
         .long   break_point_trap        /* 1E0 */
 
         /*
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 10f2a760c5ee..f9c7df64eb01 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -107,5 +107,7 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
         boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
         boot_cpu_data.icache = boot_cpu_data.dcache;
 
+        boot_cpu_data.family = CPU_FAMILY_SH3;
+
         return 0;
 }
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 6c78d0a9c857..d36f0c45f55f 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -57,8 +57,12 @@ int __init detect_cpu_and_cache_system(void)
          * Setup some generic flags we can probe on SH-4A parts
          */
         if (((pvr >> 16) & 0xff) == 0x10) {
-                if ((cvr & 0x10000000) == 0)
+                boot_cpu_data.family = CPU_FAMILY_SH4A;
+
+                if ((cvr & 0x10000000) == 0) {
                         boot_cpu_data.flags |= CPU_HAS_DSP;
+                        boot_cpu_data.family = CPU_FAMILY_SH4AL_DSP;
+                }
 
                 boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER;
                 boot_cpu_data.cut_major = pvr & 0x7f;
@@ -68,6 +72,7 @@ int __init detect_cpu_and_cache_system(void)
         } else {
                 /* And some SH-4 defaults.. */
                 boot_cpu_data.flags |= CPU_HAS_PTEA;
+                boot_cpu_data.family = CPU_FAMILY_SH4;
         }
 
         /* FPU detection works for everyone */
@@ -139,8 +144,15 @@ int __init detect_cpu_and_cache_system(void)
                 }
                 break;
         case 0x300b:
-                boot_cpu_data.type = CPU_SH7724;
-                boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
+                switch (prr) {
+                case 0x20:
+                        boot_cpu_data.type = CPU_SH7724;
+                        boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
+                        break;
+                case 0x50:
+                        boot_cpu_data.type = CPU_SH7757;
+                        break;
+                }
                 break;
         case 0x4000:    /* 1st cut */
         case 0x4001:    /* 2nd cut */
@@ -173,9 +185,6 @@ int __init detect_cpu_and_cache_system(void)
                 boot_cpu_data.dcache.ways = 2;
 
                 break;
-        default:
-                boot_cpu_data.type = CPU_SH_NONE;
-                break;
         }
 
         /*
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index ebdd391d5f42..490d5dc9e372 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -3,6 +3,7 @@
 #
 
 # CPU subtype setup
+obj-$(CONFIG_CPU_SUBTYPE_SH7757)        += setup-sh7757.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7763)        += setup-sh7763.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7770)        += setup-sh7770.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7780)        += setup-sh7780.o
@@ -19,15 +20,16 @@ obj-$(CONFIG_CPU_SUBTYPE_SHX3)		+= setup-shx3.o
 smp-$(CONFIG_CPU_SHX3)                  := smp-shx3.o
 
 # Primary on-chip clocks (common)
+clock-$(CONFIG_CPU_SUBTYPE_SH7757)      := clock-sh7757.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7763)      := clock-sh7763.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7770)      := clock-sh7770.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7780)      := clock-sh7780.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7785)      := clock-sh7785.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7786)      := clock-sh7786.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7343)      := clock-sh7343.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7722)      := clock-sh7722.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7723.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7724)      := clock-sh7724.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7722)      := clock-sh7722.o hwblk-sh7722.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7723.o hwblk-sh7723.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7724)      := clock-sh7724.o hwblk-sh7724.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7366)      := clock-sh7366.o
 clock-$(CONFIG_CPU_SUBTYPE_SHX3)        := clock-shx3.o
 
@@ -35,6 +37,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7722)     := pinmux-sh7722.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7723)     := pinmux-sh7723.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7724)     := pinmux-sh7724.o
+pinmux-$(CONFIG_CPU_SUBTYPE_SH7757)     := pinmux-sh7757.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7785)     := pinmux-sh7785.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7786)     := pinmux-sh7786.o
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 40f859354f79..ea38b554dc05 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -22,6 +22,8 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7722.h>
 
 /* SH7722 registers */
 #define FRQCR           0xa4150000
@@ -30,9 +32,6 @@
 #define SCLKBCR         0xa415000c
 #define IRDACLKCR       0xa4150018
 #define PLLCR           0xa4150024
-#define MSTPCR0         0xa4150030
-#define MSTPCR1         0xa4150034
-#define MSTPCR2         0xa4150038
 #define DLLFRQ          0xa4150050
 
 /* Fixed 32 KHz root clock for RTC and Power Management purposes */
@@ -140,35 +139,37 @@ struct clk div6_clks[] = {
         SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
 };
 
-#define MSTP(_str, _parent, _reg, _bit, _flags) \
-  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags)
+#define R_CLK &r_clk
+#define P_CLK &div4_clks[DIV4_P]
+#define B_CLK &div4_clks[DIV4_B]
+#define U_CLK &div4_clks[DIV4_U]
 
 static struct clk mstp_clks[] = {
-        MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
-        MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
-        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
-        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
-        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
-        MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
-        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
-        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
-        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
-
-        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0),
-        MSTP("rtc0", &r_clk, MSTPCR1, 8, 0),
-
-        MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0),
-        MSTP("keysc0", &r_clk, MSTPCR2, 14, 0),
-        MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0),
-        MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 9, 0),
-        MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0),
-        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0),
-        MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT),
-        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0),
-        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0),
-        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
-        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
-        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0),
+        SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0),
+        SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
+        SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
+        SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
+        SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
+        SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
+        SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
+
+        SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
+        SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
+
+        SH_HWBLK_CLK("sdhi0", -1, P_CLK, HWBLK_SDHI, 0),
+        SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
+        SH_HWBLK_CLK("usbf0", -1, P_CLK, HWBLK_USBF, 0),
+        SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
+        SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
+        SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
+        SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0),
+        SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
+        SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
+        SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, 0),
+        SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0),
+        SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0),
 };
 
 int __init arch_clk_init(void)
@@ -191,7 +192,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
 
         if (!ret)
-                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
+                ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index e67c2678b8ae..20a31c2255a8 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -22,6 +22,8 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7723.h>
 
 /* SH7723 registers */
 #define FRQCR           0xa4150000
@@ -30,9 +32,6 @@
 #define SCLKBCR         0xa415000c
 #define IRDACLKCR       0xa4150018
 #define PLLCR           0xa4150024
-#define MSTPCR0         0xa4150030
-#define MSTPCR1         0xa4150034
-#define MSTPCR2         0xa4150038
 #define DLLFRQ          0xa4150050
 
 /* Fixed 32 KHz root clock for RTC and Power Management purposes */
@@ -140,60 +139,64 @@ struct clk div6_clks[] = {
         SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
 };
 
-#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \
-  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT)
+#define R_CLK (&r_clk)
+#define P_CLK (&div4_clks[DIV4_P])
+#define B_CLK (&div4_clks[DIV4_B])
+#define U_CLK (&div4_clks[DIV4_U])
+#define I_CLK (&div4_clks[DIV4_I])
+#define SH_CLK (&div4_clks[DIV4_SH])
 
 static struct clk mstp_clks[] = {
         /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
-        MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0),
-        MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0),
-        MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0),
-        MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 28, 1, 1, 0),
-        MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0),
-        MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0),
-        MSTP("intc0", &div4_clks[DIV4_I], MSTPCR0, 22, 1, 1, 0),
-        MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1),
-        MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0),
-        MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0),
-        MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0),
-        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0),
-        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0),
-        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0),
-        MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1),
-        MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 11, 0, 1, 0),
-        MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0),
-        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0),
-        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0),
-        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0),
-        MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0),
-        MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0),
-        MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0),
-        MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0),
-        MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0),
-        MSTP("meram0", &div4_clks[DIV4_SH], MSTPCR0, 0, 1, 1, 0),
-
-        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0),
-        MSTP("rtc0", &r_clk, MSTPCR1, 8, 0, 0, 0),
-
-        MSTP("atapi0", &div4_clks[DIV4_SH], MSTPCR2, 28, 0, 1, 0),
-        MSTP("adc0", &div4_clks[DIV4_P], MSTPCR2, 27, 0, 1, 0),
-        MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0),
-        MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0),
-        MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0),
-        MSTP("icb0", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1),
-        MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0),
-        MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0),
-        MSTP("keysc0", &r_clk, MSTPCR2, 14, 0, 0, 0),
-        MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 11, 0, 1, 0),
-        MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 10, 0, 1, 1),
-        MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0, 1, 0),
-        MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1),
-        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1),
-        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1),
-        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1),
-        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1),
-        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1),
-        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1),
+        SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("intc0", -1, I_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0),
+        SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
+        SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
+        SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
+        SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
+        SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
+        SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
+        SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
+        SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
+        SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
+        SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
+        SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
+        SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
+        SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
+        SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
+        SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
+        SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
+        SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0),
+
+        SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
+        SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
+
+        SH_HWBLK_CLK("atapi0", -1, SH_CLK, HWBLK_ATAPI, 0),
+        SH_HWBLK_CLK("adc0", -1, P_CLK, HWBLK_ADC, 0),
+        SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0),
+        SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0),
+        SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0),
+        SH_HWBLK_CLK("icb0", -1, B_CLK, HWBLK_ICB, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
+        SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
+        SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
+        SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0),
+        SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
+        SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
+        SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, 0),
+        SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
+        SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
+        SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
+        SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, 0),
+        SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0),
+        SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
 };
 
 int __init arch_clk_init(void)
@@ -216,7 +219,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
 
         if (!ret)
-                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
+                ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 5d5c9b952883..dfe9192be63e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -22,6 +22,8 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7724.h>
 
 /* SH7724 registers */
 #define FRQCRA          0xa4150000
@@ -31,9 +33,6 @@
 #define FCLKBCR         0xa415000c
 #define IRDACLKCR       0xa4150018
 #define PLLCR           0xa4150024
-#define MSTPCR0         0xa4150030
-#define MSTPCR1         0xa4150034
-#define MSTPCR2         0xa4150038
 #define SPUCLKCR        0xa415003c
 #define FLLFRQ          0xa4150050
 #define LSTATS          0xa4150060
@@ -128,7 +127,7 @@ struct clk *main_clks[] = {
         &div3_clk,
 };
 
-static int divisors[] = { 2, 0, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 };
+static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 };
 
 static struct clk_div_mult_table div4_table = {
         .divisors = divisors,
@@ -156,64 +155,67 @@ struct clk div6_clks[] = {
         SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0),
 };
 
-#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \
-  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT)
+#define R_CLK (&r_clk)
+#define P_CLK (&div4_clks[DIV4_P])
+#define B_CLK (&div4_clks[DIV4_B])
+#define I_CLK (&div4_clks[DIV4_I])
+#define SH_CLK (&div4_clks[DIV4_SH])
 
 static struct clk mstp_clks[] = {
-        MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0),
-        MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0),
-        MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0),
-        MSTP("rs0", &div4_clks[DIV4_B], MSTPCR0, 28, 1, 1, 0),
-        MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0),
-        MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 26, 1, 1, 0),
-        MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0),
-        MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 1, 1, 0),
-        MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1),
-        MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0),
-        MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0),
-        MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0),
-        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0),
-        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0),
-        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0),
-        MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1),
-        MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0),
-        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0),
-        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0),
-        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0),
-        MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0),
-        MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0),
-        MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0),
-        MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0),
-        MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0),
-
-        MSTP("keysc0", &r_clk, MSTPCR1, 12, 0, 0, 0),
-        MSTP("rtc0", &r_clk, MSTPCR1, 11, 0, 0, 0),
-        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0),
-        MSTP("i2c1", &div4_clks[DIV4_P], MSTPCR1, 8, 0, 1, 0),
-
-        MSTP("mmc0", &div4_clks[DIV4_B], MSTPCR2, 29, 0, 1, 0),
-        MSTP("eth0", &div4_clks[DIV4_B], MSTPCR2, 28, 0, 1, 0),
-        MSTP("atapi0", &div4_clks[DIV4_B], MSTPCR2, 26, 0, 1, 0),
-        MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0),
-        MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0),
-        MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0),
-        MSTP("usb1", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1),
-        MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 20, 0, 1, 1),
-        MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 19, 0, 1, 1),
-        MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0),
-        MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0),
-        MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 15, 1, 1, 1),
-        MSTP("ceu1", &div4_clks[DIV4_B], MSTPCR2, 13, 0, 1, 1),
-        MSTP("beu1", &div4_clks[DIV4_B], MSTPCR2, 12, 0, 1, 1),
-        MSTP("2ddmac0", &div4_clks[DIV4_SH], MSTPCR2, 10, 0, 1, 1),
-        MSTP("spu0", &div4_clks[DIV4_B], MSTPCR2, 9, 0, 1, 0),
-        MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1),
-        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1),
-        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1),
-        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1),
-        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1),
-        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1),
-        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1),
+        SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("rs0", -1, B_CLK, HWBLK_RSMEM, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("intc0", -1, P_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0),
+        SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
+        SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
+        SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
+        SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
+        SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
+        SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
+        SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
+        SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
+        SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
+        SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
+        SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
+        SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
+        SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
+        SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
+        SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
+        SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
+
+        SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
+        SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
+        SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC0, 0),
+        SH_HWBLK_CLK("i2c1", -1, P_CLK, HWBLK_IIC1, 0),
+
+        SH_HWBLK_CLK("mmc0", -1, B_CLK, HWBLK_MMC, 0),
+        SH_HWBLK_CLK("eth0", -1, B_CLK, HWBLK_ETHER, 0),
+        SH_HWBLK_CLK("atapi0", -1, B_CLK, HWBLK_ATAPI, 0),
+        SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0),
+        SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0),
+        SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0),
+        SH_HWBLK_CLK("usb1", -1, B_CLK, HWBLK_USB1, 0),
+        SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB0, 0),
+        SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
+        SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
+        SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
+        SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, 0),
+        SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0),
+        SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0),
+        SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0),
+        SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0),
+        SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, 0),
+        SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
+        SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0),
+        SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0),
+        SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, 0),
+        SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, 0),
+        SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
 };
 
 int __init arch_clk_init(void)
@@ -236,7 +238,7 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
 
         if (!ret)
-                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
+                ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
 
         return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
new file mode 100644
index 000000000000..ddc235ca9664
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -0,0 +1,130 @@
+/*
+ * arch/sh/kernel/cpu/sh4/clock-sh7757.c
+ *
+ * SH7757 support for the clock framework
+ *
+ *  Copyright (C) 2009  Renesas Solutions Corp.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+
+static int ifc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
+                              16, 1, 1, 32, 1, 1, 1, 1 };
+static int sfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
+                              16, 1, 1, 32, 1, 1, 1, 1 };
+static int bfc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
+                              16, 1, 1, 32, 1, 1, 1, 1 };
+static int p1fc_divisors[] = { 2, 1, 4, 1, 1, 8, 1, 1,
+                               16, 1, 1, 32, 1, 1, 1, 1 };
+
+static void master_clk_init(struct clk *clk)
+{
+        clk->rate = CONFIG_SH_PCLK_FREQ * 16;
+}
+
+static struct clk_ops sh7757_master_clk_ops = {
+        .init           = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+        int idx = ctrl_inl(FRQCR) & 0x0000000f;
+        clk->rate = clk->parent->rate / p1fc_divisors[idx];
+}
+
+static struct clk_ops sh7757_module_clk_ops = {
+        .recalc         = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+        int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f;
+        clk->rate = clk->parent->rate / bfc_divisors[idx];
+}
+
+static struct clk_ops sh7757_bus_clk_ops = {
+        .recalc         = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+        int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f;
+        clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7757_cpu_clk_ops = {
+        .recalc         = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7757_clk_ops[] = {
+        &sh7757_master_clk_ops,
+        &sh7757_module_clk_ops,
+        &sh7757_bus_clk_ops,
+        &sh7757_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+        if (idx < ARRAY_SIZE(sh7757_clk_ops))
+                *ops = sh7757_clk_ops[idx];
+}
+
+static void shyway_clk_recalc(struct clk *clk)
+{
+        int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f;
+        clk->rate = clk->parent->rate / sfc_divisors[idx];
+}
+
+static struct clk_ops sh7757_shyway_clk_ops = {
+        .recalc         = shyway_clk_recalc,
+};
+
+static struct clk sh7757_shyway_clk = {
+        .name           = "shyway_clk",
+        .flags          = CLK_ENABLE_ON_INIT,
+        .ops            = &sh7757_shyway_clk_ops,
+};
+
+/*
+ * Additional sh7757-specific on-chip clocks that aren't already part of the
+ * clock framework
+ */
+static struct clk *sh7757_onchip_clocks[] = {
+        &sh7757_shyway_clk,
+};
+
+static int __init sh7757_clk_init(void)
+{
+        struct clk *clk = clk_get(NULL, "master_clk");
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(sh7757_onchip_clocks); i++) {
+                struct clk *clkp = sh7757_onchip_clocks[i];
+
+                clkp->parent = clk;
+                clk_register(clkp);
+                clk_enable(clkp);
+        }
+
+        /*
+         * Now that we have the rest of the clocks registered, we need to
+         * force the parent clock to propagate so that these clocks will
+         * automatically figure out their rate. We cheat by handing the
+         * parent clock its current rate and forcing child propagation.
+         */
+        clk_set_rate(clk, clk_get_rate(clk));
+
+        clk_put(clk);
+
+        return 0;
+}
+
+arch_initcall(sh7757_clk_init);
+
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
new file mode 100644
index 000000000000..a288b5d92341
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
@@ -0,0 +1,106 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
+ *
+ * SH7722 hardware block support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7722.h>
+
+/* SH7722 registers */
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+
+/* SH7722 Power Domains */
+enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
+static struct hwblk_area sh7722_hwblk_area[] = {
+        [CORE_AREA] = HWBLK_AREA(0, 0),
+        [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
+        [SUB_AREA] = HWBLK_AREA(0, 0),
+};
+
+/* Table mapping HWBLK to Module Stop Bit and Power Domain */
+static struct hwblk sh7722_hwblk[HWBLK_NR] = {
+        [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
+        [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
+        [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
+        [HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
+        [HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
+        [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
+        [HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
+        [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
+        [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
+        [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
+        [HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
+        [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
+        [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
+        [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
+        [HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
+        [HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
+        [HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
+        [HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
+        [HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
+        [HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
+
+        [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
+        [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
+
+        [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
+        [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
+        [HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
+        [HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
+        [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
+        [HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
+        [HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
+        [HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
+        [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
+        [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
+        [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
+        [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
+        [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
+        [HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
+        [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
+        [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
+};
+
+static struct hwblk_info sh7722_hwblk_info = {
+        .areas = sh7722_hwblk_area,
+        .nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
+        .hwblks = sh7722_hwblk,
+        .nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
+};
+
+int arch_hwblk_sleep_mode(void)
+{
+        if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_STANDBY | SUSP_SH_SF;
+
+        if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_SLEEP | SUSP_SH_SF;
+
+        return SUSP_SH_SLEEP;
+}
+
+int __init arch_hwblk_init(void)
+{
+        return hwblk_register(&sh7722_hwblk_info);
+}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
new file mode 100644
index 000000000000..a7f4684d2032
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
@@ -0,0 +1,117 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
+ *
+ * SH7723 hardware block support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7723.h>
+
+/* SH7723 registers */
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+
+/* SH7723 Power Domains */
+enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
+static struct hwblk_area sh7723_hwblk_area[] = {
+        [CORE_AREA] = HWBLK_AREA(0, 0),
+        [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
+        [SUB_AREA] = HWBLK_AREA(0, 0),
+};
+
+/* Table mapping HWBLK to Module Stop Bit and Power Domain */
+static struct hwblk sh7723_hwblk[HWBLK_NR] = {
+        [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
+        [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
+        [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
+        [HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA),
+        [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
+        [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
+        [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
+        [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
+        [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
+        [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
+        [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
+        [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
+        [HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA),
+        [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
+        [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
+        [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
+        [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
+        [HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA),
+        [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
+        [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
+        [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
+        [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
+        [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
+        [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
+        [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
+        [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
+        [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
+        [HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA),
+
+        [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
+        [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
+
+        [HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
+        [HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA),
+        [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
+        [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
+        [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
+        [HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM),
+        [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
+        [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
+        [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
+        [HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA),
+        [HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
+        [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
+        [HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
+        [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
+        [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
+        [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
+        [HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
+        [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
+        [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
+};
+
+static struct hwblk_info sh7723_hwblk_info = {
+        .areas = sh7723_hwblk_area,
+        .nr_areas = ARRAY_SIZE(sh7723_hwblk_area),
+        .hwblks = sh7723_hwblk,
+        .nr_hwblks = ARRAY_SIZE(sh7723_hwblk),
+};
+
+int arch_hwblk_sleep_mode(void)
+{
+        if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_STANDBY | SUSP_SH_SF;
+
+        if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_SLEEP | SUSP_SH_SF;
+
+        return SUSP_SH_SLEEP;
+}
+
+int __init arch_hwblk_init(void)
+{
+        return hwblk_register(&sh7723_hwblk_info);
+}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
new file mode 100644
index 000000000000..1613ad6013c3
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
@@ -0,0 +1,121 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
+ *
+ * SH7724 hardware block support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/suspend.h>
+#include <asm/hwblk.h>
+#include <cpu/sh7724.h>
+
+/* SH7724 registers */
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+
+/* SH7724 Power Domains */
+enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
+static struct hwblk_area sh7724_hwblk_area[] = {
+        [CORE_AREA] = HWBLK_AREA(0, 0),
+        [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
+        [SUB_AREA] = HWBLK_AREA(0, 0),
+};
+
+/* Table mapping HWBLK to Module Stop Bit and Power Domain */
+static struct hwblk sh7724_hwblk[HWBLK_NR] = {
+        [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
+        [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
+        [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
+        [HWBLK_RSMEM] = HWBLK(MSTPCR0, 28, CORE_AREA),
+        [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
+        [HWBLK_L2C] = HWBLK(MSTPCR0, 26, CORE_AREA),
+        [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
+        [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
+        [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
+        [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
+        [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
+        [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
+        [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
+        [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
+        [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
+        [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
+        [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
+        [HWBLK_TMU1] = HWBLK(MSTPCR0, 10, CORE_AREA),
+        [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
+        [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
+        [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
+        [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
+        [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
+        [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
+        [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
+        [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
+
+        [HWBLK_KEYSC] = HWBLK(MSTPCR1, 12, SUB_AREA),
+        [HWBLK_RTC] = HWBLK(MSTPCR1, 11, SUB_AREA),
+        [HWBLK_IIC0] = HWBLK(MSTPCR1, 9, CORE_AREA),
+        [HWBLK_IIC1] = HWBLK(MSTPCR1, 8, CORE_AREA),
+
+        [HWBLK_MMC] = HWBLK(MSTPCR2, 29, CORE_AREA),
+        [HWBLK_ETHER] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
+        [HWBLK_ATAPI] = HWBLK(MSTPCR2, 26, CORE_AREA_BM),
+        [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
+        [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
+        [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
+        [HWBLK_USB1] = HWBLK(MSTPCR2, 21, CORE_AREA),
+        [HWBLK_USB0] = HWBLK(MSTPCR2, 20, CORE_AREA),
+        [HWBLK_2DG] = HWBLK(MSTPCR2, 19, CORE_AREA_BM),
+        [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
+        [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
+        [HWBLK_VEU1] = HWBLK(MSTPCR2, 15, CORE_AREA_BM),
+        [HWBLK_CEU1] = HWBLK(MSTPCR2, 13, CORE_AREA_BM),
+        [HWBLK_BEU1] = HWBLK(MSTPCR2, 12, CORE_AREA_BM),
+        [HWBLK_2DDMAC] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
+        [HWBLK_SPU] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
+        [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
+        [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
+        [HWBLK_BEU0] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
+        [HWBLK_CEU0] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
+        [HWBLK_VEU0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
+        [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
+        [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
+};
+
+static struct hwblk_info sh7724_hwblk_info = {
+        .areas = sh7724_hwblk_area,
+        .nr_areas = ARRAY_SIZE(sh7724_hwblk_area),
+        .hwblks = sh7724_hwblk,
+        .nr_hwblks = ARRAY_SIZE(sh7724_hwblk),
+};
+
+int arch_hwblk_sleep_mode(void)
+{
+        if (!sh7724_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_STANDBY | SUSP_SH_SF;
+
+        if (!sh7724_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
+                return SUSP_SH_SLEEP | SUSP_SH_SF;
+
+        return SUSP_SH_SLEEP;
+}
+
+int __init arch_hwblk_init(void)
+{
+        return hwblk_register(&sh7724_hwblk_info);
+}
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
new file mode 100644
index 000000000000..ed23b155c097
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
@@ -0,0 +1,2019 @@
+/*
+ * SH7757 (A0 step) Pinmux
+ *
+ *  Copyright (C) 2009  Renesas Solutions Corp.
+ *
+ *  Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * Based on SH7757 Pinmux
+ *  Copyright (C) 2008  Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <cpu/sh7757.h>
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
+        PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
+        PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
+        PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
+        PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
+        PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
+        PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
+        PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
+        PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
+        PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
+        PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
+        PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
+        PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
+        PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
+        PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
+        PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
+        PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
+        PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA,
+        PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
+        PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
+        PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
+        PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
+        PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
+        PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
+        PTM6_DATA, PTM5_DATA, PTM4_DATA,
+        PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
+        PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
+        PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
+        PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
+        PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA,
+        PTP6_DATA, PTP5_DATA, PTP4_DATA,
+        PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
+        PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
+        PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
+        PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
+        PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
+        PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
+        PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
+        PTT5_DATA, PTT4_DATA,
+        PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
+        PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
+        PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
+        PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
+        PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
+        PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
+        PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
+        PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
+        PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
+        PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
+        PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
+        PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
+        PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
+        PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
+        PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
+        PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
+        PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
+        PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
+        PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
+        PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
+        PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN,
+        PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
+        PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
+        PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
+        PTG7_IN, PTG6_IN, PTG5_IN, PTG4_IN,
+        PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
+        PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
+        PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
+        PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN,
+        PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN,
+        PTJ7_IN, PTJ6_IN, PTJ5_IN, PTJ4_IN,
+        PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
+        PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
+        PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
+        PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
+        PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
+        PTM6_IN, PTM5_IN, PTM4_IN,
+        PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
+        PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
+        PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
+        PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN,
+        PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN,
+        PTP6_IN, PTP5_IN, PTP4_IN,
+        PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
+        PTQ6_IN, PTQ5_IN, PTQ4_IN,
+        PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
+        PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
+        PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
+        PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
+        PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
+        PTT5_IN, PTT4_IN,
+        PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
+        PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
+        PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
+        PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
+        PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
+        PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
+        PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
+        PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
+        PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
+        PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
+        PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
+        PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
+        PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
+        PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
+        PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
+        PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
+        PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU,
+        PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
+        PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
+        PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
+        PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
+        PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
+        PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
+        PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
+        PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
+        PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
+        PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
+        PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
+        PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
+        PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT,
+        PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
+        PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
+        PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
+        PTG7_OUT, PTG6_OUT, PTG5_OUT, PTG4_OUT,
+        PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
+        PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
+        PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
+        PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT,
+        PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT,
+        PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
+        PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
+        PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
+        PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
+        PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
+        PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
+        PTM6_OUT, PTM5_OUT, PTM4_OUT,
+        PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
+        PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
+        PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
+        PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT,
+        PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT,
+        PTP6_OUT, PTP5_OUT, PTP4_OUT,
+        PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
+        PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
+        PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
+        PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
+        PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
+        PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
+        PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
+        PTT5_OUT, PTT4_OUT,
+        PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
+        PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
+        PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
+        PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
+        PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
+        PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
+        PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
+        PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
+        PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
+        PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
+        PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
+        PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
+        PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
+        PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
+        PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
+        PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
+        PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
+        PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
+        PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
+        PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
+        PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN,
+        PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
+        PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
+        PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
+        PTG7_FN, PTG6_FN, PTG5_FN, PTG4_FN,
+        PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
+        PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
+        PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
+        PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN,
+        PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN,
+        PTJ7_FN, PTJ6_FN, PTJ5_FN, PTJ4_FN,
+        PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
+        PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
+        PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
+        PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN,
+        PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
+        PTM6_FN, PTM5_FN, PTM4_FN,
+        PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
+        PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN,
+        PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
+        PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN,
+        PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN,
+        PTP6_FN, PTP5_FN, PTP4_FN,
+        PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
+        PTQ6_FN, PTQ5_FN, PTQ4_FN,
+        PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
+        PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
+        PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
+        PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
+        PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
+        PTT5_FN, PTT4_FN,
+        PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
+        PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
+        PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
+        PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
+        PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
+        PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
+        PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
+        PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
+        PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
+        PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
+        PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
+        PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
+        PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
+
+        PS0_15_FN1, PS0_15_FN3,
+        PS0_14_FN1, PS0_14_FN3,
+        PS0_13_FN1, PS0_13_FN3,
+        PS0_12_FN1, PS0_12_FN3,
+        PS0_7_FN1, PS0_7_FN2,
+        PS0_6_FN1, PS0_6_FN2,
+        PS0_5_FN1, PS0_5_FN2,
+        PS0_4_FN1, PS0_4_FN2,
+        PS0_3_FN1, PS0_3_FN2,
+        PS0_2_FN1, PS0_2_FN2,
+        PS0_1_FN1, PS0_1_FN2,
+
+        PS1_7_FN1, PS1_7_FN3,
+        PS1_6_FN1, PS1_6_FN3,
+
+        PS2_13_FN1, PS2_13_FN3,
+        PS2_12_FN1, PS2_12_FN3,
+        PS2_1_FN1, PS2_1_FN2,
+        PS2_0_FN1, PS2_0_FN2,
+
+        PS4_15_FN1, PS4_15_FN2,
+        PS4_14_FN1, PS4_14_FN2,
+        PS4_13_FN1, PS4_13_FN2,
+        PS4_12_FN1, PS4_12_FN2,
+        PS4_11_FN1, PS4_11_FN2,
+        PS4_10_FN1, PS4_10_FN2,
+        PS4_9_FN1, PS4_9_FN2,
+        PS4_3_FN1, PS4_3_FN2,
+        PS4_2_FN1, PS4_2_FN2,
+        PS4_1_FN1, PS4_1_FN2,
+        PS4_0_FN1, PS4_0_FN2,
+
+        PS5_9_FN1, PS5_9_FN2,
+        PS5_8_FN1, PS5_8_FN2,
+        PS5_7_FN1, PS5_7_FN2,
+        PS5_6_FN1, PS5_6_FN2,
+        PS5_5_FN1, PS5_5_FN2,
+        PS5_4_FN1, PS5_4_FN2,
+
+        /* AN15 to 8 : EVENT15 to 8 */
+        PS6_7_FN_AN, PS6_7_FN_EV,
+        PS6_6_FN_AN, PS6_6_FN_EV,
+        PS6_5_FN_AN, PS6_5_FN_EV,
+        PS6_4_FN_AN, PS6_4_FN_EV,
+        PS6_3_FN_AN, PS6_3_FN_EV,
+        PS6_2_FN_AN, PS6_2_FN_EV,
+        PS6_1_FN_AN, PS6_1_FN_EV,
+        PS6_0_FN_AN, PS6_0_FN_EV,
+
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        /* PTA (mobule: LBSC, CPG, LPC) */
+        BS_MARK,        RDWR_MARK,      WE1_MARK,       RDY_MARK,
+        MD10_MARK,      MD9_MARK,       MD8_MARK,
+        LGPIO7_MARK,    LGPIO6_MARK,    LGPIO5_MARK,    LGPIO4_MARK,
+        LGPIO3_MARK,    LGPIO2_MARK,    LGPIO1_MARK,    LGPIO0_MARK,
+
+        /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
+        D15_MARK,       D14_MARK,       D13_MARK,       D12_MARK,
+        D11_MARK,       D10_MARK,       D9_MARK,        D8_MARK,
+        ET0_MDC_MARK,   ET0_MDIO_MARK,  ET1_MDC_MARK,   ET1_MDIO_MARK,
+        SIM_D_MARK,     SIM_CLK_MARK,   SIM_RST_MARK,
+        WPSZ1_MARK,     WPSZ0_MARK,     FWID_MARK,      FLSHSZ_MARK,
+        LPC_SPIEN_MARK, BASEL_MARK,
+
+        /* PTC (mobule: SD) */
+        SD_WP_MARK,     SD_CD_MARK,     SD_CLK_MARK,    SD_CMD_MARK,
+        SD_D3_MARK,     SD_D2_MARK,     SD_D1_MARK,     SD_D0_MARK,
+
+        /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */
+        IRQ7_MARK,      IRQ6_MARK,      IRQ5_MARK,      IRQ4_MARK,
+        IRQ3_MARK,      IRQ2_MARK,      IRQ1_MARK,      IRQ0_MARK,
+        MD6_MARK,       MD5_MARK,       MD3_MARK,       MD2_MARK,
+        MD1_MARK,       MD0_MARK,       ADTRG1_MARK,    ADTRG0_MARK,
+
+        /* PTE (mobule: EtherC) */
+        ET0_CRS_DV_MARK,        ET0_TXD1_MARK,
+        ET0_TXD0_MARK,          ET0_TX_EN_MARK,
+        ET0_REF_CLK_MARK,       ET0_RXD1_MARK,
+        ET0_RXD0_MARK,          ET0_RX_ER_MARK,
+
+        /* PTF (mobule: EtherC) */
+        ET1_CRS_DV_MARK,        ET1_TXD1_MARK,
+        ET1_TXD0_MARK,          ET1_TX_EN_MARK,
+        ET1_REF_CLK_MARK,       ET1_RXD1_MARK,
+        ET1_RXD0_MARK,          ET1_RX_ER_MARK,
+
+        /* PTG (mobule: SYSTEM, PWMX, LPC) */
+        STATUS0_MARK,   STATUS1_MARK,
+        PWX0_MARK,      PWX1_MARK,      PWX2_MARK,      PWX3_MARK,
+        SERIRQ_MARK,    CLKRUN_MARK,    LPCPD_MARK,     LDRQ_MARK,
+
+        /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */
+        TCLK_MARK,      RXD4_MARK,      TXD4_MARK,
+        SP1_MOSI_MARK,  SP1_MISO_MARK,  SP1_SCK_MARK,   SP1_SCK_FB_MARK,
+        SP1_SS0_MARK,   SP1_SS1_MARK,   SP0_SS1_MARK,
+
+        /* PTI (mobule: INTC) */
+        IRQ15_MARK,     IRQ14_MARK,     IRQ13_MARK,     IRQ12_MARK,
+        IRQ11_MARK,     IRQ10_MARK,     IRQ9_MARK,      IRQ8_MARK,
+
+        /* PTJ (mobule: SCIF234, SERMUX) */
+        RXD3_MARK,      TXD3_MARK,      RXD2_MARK,      TXD2_MARK,
+        COM1_TXD_MARK,  COM1_RXD_MARK,  COM1_RTS_MARK,  COM1_CTS_MARK,
+
+        /* PTK (mobule: SERMUX) */
+        COM2_TXD_MARK,  COM2_RXD_MARK,  COM2_RTS_MARK,  COM2_CTS_MARK,
+        COM2_DTR_MARK,  COM2_DSR_MARK,  COM2_DCD_MARK,  COM2_RI_MARK,
+
+        /* PTL (mobule: SERMUX) */
+        RAC_TXD_MARK,   RAC_RXD_MARK,   RAC_RTS_MARK,   RAC_CTS_MARK,
+        RAC_DTR_MARK,   RAC_DSR_MARK,   RAC_DCD_MARK,   RAC_RI_MARK,
+
+        /* PTM (mobule: IIC, LPC) */
+        SDA6_MARK,      SCL6_MARK,      SDA7_MARK,      SCL7_MARK,
+        WP_MARK,        FMS0_MARK,      FMS1_MARK,
+
+        /* PTN (mobule: SCIF234, EVC) */
+        SCK2_MARK,      RTS4_MARK,      RTS3_MARK,      RTS2_MARK,
+        CTS4_MARK,      CTS3_MARK,      CTS2_MARK,
+        EVENT7_MARK,    EVENT6_MARK,    EVENT5_MARK,    EVENT4_MARK,
+        EVENT3_MARK,    EVENT2_MARK,    EVENT1_MARK,    EVENT0_MARK,
+
+        /* PTO (mobule: SGPIO) */
+        SGPIO0_CLK_MARK,        SGPIO0_LOAD_MARK,
+        SGPIO0_DI_MARK,         SGPIO0_DO_MARK,
+        SGPIO1_CLK_MARK,        SGPIO1_LOAD_MARK,
+        SGPIO1_DI_MARK,         SGPIO1_DO_MARK,
+
+        /* PTP (mobule: JMC, SCIF234) */
+        JMCTCK_MARK,    JMCTMS_MARK,    JMCTDO_MARK,    JMCTDI_MARK,
+        JMCRST_MARK,    SCK4_MARK,      SCK3_MARK,
+
+        /* PTQ (mobule: LPC) */
+        LAD3_MARK,      LAD2_MARK,      LAD1_MARK,      LAD0_MARK,
+        LFRAME_MARK,    LRESET_MARK,    LCLK_MARK,
+
+        /* PTR (mobule: GRA, IIC) */
+        DDC3_MARK,      DDC2_MARK,
+        SDA8_MARK,      SCL8_MARK,      SDA2_MARK,      SCL2_MARK,
+        SDA1_MARK,      SCL1_MARK,      SDA0_MARK,      SCL0_MARK,
+
+        /* PTS (mobule: GRA, IIC) */
+        DDC1_MARK,      DDC0_MARK,
+        SDA9_MARK,      SCL9_MARK,      SDA5_MARK,      SCL5_MARK,
+        SDA4_MARK,      SCL4_MARK,      SDA3_MARK,      SCL3_MARK,
+
+        /* PTT (mobule: SYSTEM, PWMX) */
+        AUDSYNC_MARK,           AUDCK_MARK,
+        AUDATA3_MARK,           AUDATA2_MARK,
+        AUDATA1_MARK,           AUDATA0_MARK,
+        PWX7_MARK,      PWX6_MARK,      PWX5_MARK,      PWX4_MARK,
+
+        /* PTU (mobule: LBSC, DMAC) */
+        CS6_MARK,       CS5_MARK,       CS4_MARK,       CS0_MARK,
+        RD_MARK,        WE0_MARK,       A25_MARK,       A24_MARK,
+        DREQ0_MARK,     DACK0_MARK,
+
+        /* PTV (mobule: LBSC, DMAC) */
+        A23_MARK,       A22_MARK,       A21_MARK,       A20_MARK,
+        A19_MARK,       A18_MARK,       A17_MARK,       A16_MARK,
+        TEND0_MARK,     DREQ1_MARK,     DACK1_MARK,     TEND1_MARK,
+
+        /* PTW (mobule: LBSC) */
+        A15_MARK,       A14_MARK,       A13_MARK,       A12_MARK,
+        A11_MARK,       A10_MARK,       A9_MARK,        A8_MARK,
+
+        /* PTX (mobule: LBSC) */
+        A7_MARK,        A6_MARK,        A5_MARK,        A4_MARK,
+        A3_MARK,        A2_MARK,        A1_MARK,        A0_MARK,
+
+        /* PTY (mobule: LBSC) */
+        D7_MARK,        D6_MARK,        D5_MARK,        D4_MARK,
+        D3_MARK,        D2_MARK,        D1_MARK,        D0_MARK,
+        PINMUX_MARK_END,
+};
+
+static pinmux_enum_t pinmux_data[] = {
+        /* PTA GPIO */
+        PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
+        PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
+        PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
+        PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
+        PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
+        PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
+        PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
+        PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
+
+        /* PTB GPIO */
+        PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
+        PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
+        PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
+        PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
+        PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
+        PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
+        PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
+        PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
+
+        /* PTC GPIO */
+        PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
+        PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
+        PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
+        PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
+        PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
+        PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
+        PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
+        PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
+
+        /* PTD GPIO */
+        PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
+        PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
+        PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
+        PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
+        PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
+        PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
+        PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
+        PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
+
+        /* PTE GPIO */
+        PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
+        PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
+        PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
+        PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
+        PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
+        PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
+
+        /* PTF GPIO */
+        PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
+        PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
+        PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
+        PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
+        PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
+        PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
+        PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
+        PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
+
+        /* PTG GPIO */
+        PINMUX_DATA(PTG7_DATA, PTG7_IN, PTG7_OUT),
+        PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT),
+        PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT),
+        PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT),
+        PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT),
+        PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT),
+        PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT),
+        PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT),
+
+        /* PTH GPIO */
+        PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
+        PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
+        PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
+        PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
+        PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
+        PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
+        PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
+        PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
+
+        /* PTI GPIO */
+        PINMUX_DATA(PTI7_DATA, PTI7_IN, PTI7_OUT),
+        PINMUX_DATA(PTI6_DATA, PTI6_IN, PTI6_OUT),
+        PINMUX_DATA(PTI5_DATA, PTI5_IN, PTI5_OUT),
+        PINMUX_DATA(PTI4_DATA, PTI4_IN, PTI4_OUT),
+        PINMUX_DATA(PTI3_DATA, PTI3_IN, PTI3_OUT),
+        PINMUX_DATA(PTI2_DATA, PTI2_IN, PTI2_OUT),
+        PINMUX_DATA(PTI1_DATA, PTI1_IN, PTI1_OUT),
+        PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT),
+
+        /* PTJ GPIO */
+        PINMUX_DATA(PTJ7_DATA, PTJ7_IN, PTJ7_OUT),
+        PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
+        PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
+        PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
+        PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
+        PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
+        PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
+        PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
+
+        /* PTK GPIO */
+        PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
+        PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
+        PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
+        PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
+        PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
+        PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
+        PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
+        PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
+
+        /* PTL GPIO */
+        PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
+        PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
+        PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
+        PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
+        PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
+        PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
+        PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
+        PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
+
+        /* PTM GPIO */
+        PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
+        PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
+        PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
+        PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
+        PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
+        PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
+        PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
+
+        /* PTN GPIO */
+        PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
+        PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
+        PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
+        PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
+        PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
+        PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
+        PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
+        PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
+
+        /* PTO GPIO */
+        PINMUX_DATA(PTO7_DATA, PTO7_IN, PTO7_OUT),
+        PINMUX_DATA(PTO6_DATA, PTO6_IN, PTO6_OUT),
+        PINMUX_DATA(PTO5_DATA, PTO5_IN, PTO5_OUT),
+        PINMUX_DATA(PTO4_DATA, PTO4_IN, PTO4_OUT),
+        PINMUX_DATA(PTO3_DATA, PTO3_IN, PTO3_OUT),
+        PINMUX_DATA(PTO2_DATA, PTO2_IN, PTO2_OUT),
+        PINMUX_DATA(PTO1_DATA, PTO1_IN, PTO1_OUT),
+        PINMUX_DATA(PTO0_DATA, PTO0_IN, PTO0_OUT),
+
+        /* PTQ GPIO */
+        PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT),
+        PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT),
+        PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT),
+        PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT),
+        PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT),
+        PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT),
+        PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT),
+
+        /* PTR GPIO */
+        PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
+        PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
+        PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
+        PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
+        PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT),
+        PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT),
+        PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
+        PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
+
+        /* PTS GPIO */
+        PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT),
+        PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
+        PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
+        PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
+        PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
+        PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
+        PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
+        PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
+
+        /* PTT GPIO */
+        PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
+        PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
+        PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
+        PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
+        PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
+        PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
+
+        /* PTU GPIO */
+        PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT),
+        PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT),
+        PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
+        PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
+        PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
+        PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
+        PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
+        PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
+
+        /* PTV GPIO */
+        PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
+        PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
+        PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
+        PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
+        PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
+        PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
+        PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
+        PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
+
+        /* PTW GPIO */
+        PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
+        PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
+        PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
+        PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
+        PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
+        PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
+        PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
+        PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
+
+        /* PTX GPIO */
+        PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
+        PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
+        PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
+        PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
+        PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
+        PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
+        PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
+        PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
+
+        /* PTY GPIO */
+        PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
+        PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
+        PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
+        PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
+        PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
+        PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
+        PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
+        PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
+
+        /* PTZ GPIO */
+        PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
+        PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
+        PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
+        PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
+        PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
+        PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
+        PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
+        PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
+
+        /* PTA FN */
+        PINMUX_DATA(BS_MARK, PS0_15_FN1, PTA7_FN),
+        PINMUX_DATA(LGPIO7_MARK, PS0_15_FN3, PTA7_FN),
+        PINMUX_DATA(RDWR_MARK, PS0_14_FN1, PTA6_FN),
+        PINMUX_DATA(LGPIO6_MARK, PS0_14_FN3, PTA6_FN),
+        PINMUX_DATA(WE1_MARK, PS0_13_FN1, PTA5_FN),
+        PINMUX_DATA(LGPIO5_MARK, PS0_13_FN3, PTA5_FN),
+        PINMUX_DATA(RDY_MARK, PS0_12_FN1, PTA4_FN),
+        PINMUX_DATA(LGPIO4_MARK, PS0_12_FN3, PTA4_FN),
+        PINMUX_DATA(LGPIO3_MARK, PTA3_FN),
+        PINMUX_DATA(LGPIO2_MARK, PTA2_FN),
+        PINMUX_DATA(LGPIO1_MARK, PTA1_FN),
+        PINMUX_DATA(LGPIO0_MARK, PTA0_FN),
+
+        /* PTB FN */
+        PINMUX_DATA(D15_MARK, PS0_7_FN1, PTB7_FN),
+        PINMUX_DATA(ET0_MDC_MARK, PS0_7_FN2, PTB7_FN),
+        PINMUX_DATA(D14_MARK, PS0_6_FN1, PTB6_FN),
+        PINMUX_DATA(ET0_MDIO_MARK, PS0_6_FN2, PTB6_FN),
+        PINMUX_DATA(D13_MARK, PS0_5_FN1, PTB5_FN),
+        PINMUX_DATA(ET1_MDC_MARK, PS0_5_FN2, PTB5_FN),
+        PINMUX_DATA(D12_MARK, PS0_4_FN1, PTB4_FN),
+        PINMUX_DATA(ET1_MDIO_MARK, PS0_4_FN2, PTB4_FN),
+        PINMUX_DATA(D11_MARK, PS0_3_FN1, PTB3_FN),
+        PINMUX_DATA(SIM_D_MARK, PS0_3_FN2, PTB3_FN),
+        PINMUX_DATA(D10_MARK, PS0_2_FN1, PTB2_FN),
+        PINMUX_DATA(SIM_CLK_MARK, PS0_2_FN2, PTB2_FN),
+        PINMUX_DATA(D9_MARK, PS0_1_FN1, PTB1_FN),
+        PINMUX_DATA(SIM_RST_MARK, PS0_1_FN2, PTB1_FN),
+        PINMUX_DATA(D8_MARK, PTB0_FN),
+
+        /* PTC FN */
+        PINMUX_DATA(SD_WP_MARK, PTC7_FN),
+        PINMUX_DATA(SD_CD_MARK, PTC6_FN),
+        PINMUX_DATA(SD_CLK_MARK, PTC5_FN),
+        PINMUX_DATA(SD_CMD_MARK, PTC4_FN),
+        PINMUX_DATA(SD_D3_MARK, PTC3_FN),
+        PINMUX_DATA(SD_D2_MARK, PTC2_FN),
+        PINMUX_DATA(SD_D1_MARK, PTC1_FN),
+        PINMUX_DATA(SD_D0_MARK, PTC0_FN),
+
+        /* PTD FN */
+        PINMUX_DATA(IRQ7_MARK, PS1_7_FN1, PTD7_FN),
+        PINMUX_DATA(ADTRG1_MARK, PS1_7_FN3, PTD7_FN),
+        PINMUX_DATA(IRQ6_MARK, PS1_6_FN1, PTD6_FN),
+        PINMUX_DATA(ADTRG0_MARK, PS1_6_FN3, PTD6_FN),
+        PINMUX_DATA(IRQ5_MARK, PTD5_FN),
+        PINMUX_DATA(IRQ4_MARK, PTD4_FN),
+        PINMUX_DATA(IRQ3_MARK, PTD3_FN),
+        PINMUX_DATA(IRQ2_MARK, PTD2_FN),
+        PINMUX_DATA(IRQ1_MARK, PTD1_FN),
+        PINMUX_DATA(IRQ0_MARK, PTD0_FN),
+
+        /* PTE FN */
+        PINMUX_DATA(ET0_CRS_DV_MARK, PTE7_FN),
+        PINMUX_DATA(ET0_TXD1_MARK, PTE6_FN),
+        PINMUX_DATA(ET0_TXD0_MARK, PTE5_FN),
+        PINMUX_DATA(ET0_TX_EN_MARK, PTE4_FN),
+        PINMUX_DATA(ET0_REF_CLK_MARK, PTE3_FN),
+        PINMUX_DATA(ET0_RXD1_MARK, PTE2_FN),
+        PINMUX_DATA(ET0_RXD0_MARK, PTE1_FN),
+        PINMUX_DATA(ET0_RX_ER_MARK, PTE0_FN),
+
+        /* PTF FN */
+        PINMUX_DATA(ET1_CRS_DV_MARK, PTF7_FN),
+        PINMUX_DATA(ET1_TXD1_MARK, PTF6_FN),
+        PINMUX_DATA(ET1_TXD0_MARK, PTF5_FN),
+        PINMUX_DATA(ET1_TX_EN_MARK, PTF4_FN),
+        PINMUX_DATA(ET1_REF_CLK_MARK, PTF3_FN),
+        PINMUX_DATA(ET1_RXD1_MARK, PTF2_FN),
+        PINMUX_DATA(ET1_RXD0_MARK, PTF1_FN),
+        PINMUX_DATA(ET1_RX_ER_MARK, PTF0_FN),
+
+        /* PTG FN */
+        PINMUX_DATA(PWX0_MARK, PTG7_FN),
+        PINMUX_DATA(PWX1_MARK, PTG6_FN),
+        PINMUX_DATA(STATUS0_MARK, PS2_13_FN1, PTG5_FN),
+        PINMUX_DATA(PWX2_MARK, PS2_13_FN3, PTG5_FN),
+        PINMUX_DATA(STATUS1_MARK, PS2_12_FN1, PTG4_FN),
+        PINMUX_DATA(PWX3_MARK, PS2_12_FN3, PTG4_FN),
+        PINMUX_DATA(SERIRQ_MARK, PTG3_FN),
+        PINMUX_DATA(CLKRUN_MARK, PTG2_FN),
+        PINMUX_DATA(LPCPD_MARK, PTG1_FN),
+        PINMUX_DATA(LDRQ_MARK, PTG0_FN),
+
+        /* PTH FN */
+        PINMUX_DATA(SP1_MOSI_MARK, PTH7_FN),
+        PINMUX_DATA(SP1_MISO_MARK, PTH6_FN),
+        PINMUX_DATA(SP1_SCK_MARK, PTH5_FN),
+        PINMUX_DATA(SP1_SCK_FB_MARK, PTH4_FN),
+        PINMUX_DATA(SP1_SS0_MARK, PTH3_FN),
+        PINMUX_DATA(TCLK_MARK, PTH2_FN),
+        PINMUX_DATA(RXD4_MARK, PS2_1_FN1, PTH1_FN),
+        PINMUX_DATA(SP1_SS1_MARK, PS2_1_FN2, PTH1_FN),
+        PINMUX_DATA(TXD4_MARK, PS2_0_FN1, PTH0_FN),
+        PINMUX_DATA(SP0_SS1_MARK, PS2_0_FN2, PTH0_FN),
+
+        /* PTI FN */
+        PINMUX_DATA(IRQ15_MARK, PTI7_FN),
+        PINMUX_DATA(IRQ14_MARK, PTI6_FN),
+        PINMUX_DATA(IRQ13_MARK, PTI5_FN),
+        PINMUX_DATA(IRQ12_MARK, PTI4_FN),
+        PINMUX_DATA(IRQ11_MARK, PTI3_FN),
+        PINMUX_DATA(IRQ10_MARK, PTI2_FN),
+        PINMUX_DATA(IRQ9_MARK, PTI1_FN),
+        PINMUX_DATA(IRQ8_MARK, PTI0_FN),
+
+        /* PTJ FN */
+        PINMUX_DATA(RXD3_MARK, PTJ7_FN),
+        PINMUX_DATA(TXD3_MARK, PTJ6_FN),
+        PINMUX_DATA(RXD2_MARK, PTJ5_FN),
+        PINMUX_DATA(TXD2_MARK, PTJ4_FN),
+        PINMUX_DATA(COM1_TXD_MARK, PTJ3_FN),
+        PINMUX_DATA(COM1_RXD_MARK, PTJ2_FN),
+        PINMUX_DATA(COM1_RTS_MARK, PTJ1_FN),
+        PINMUX_DATA(COM1_CTS_MARK, PTJ0_FN),
+
+        /* PTK FN */
+        PINMUX_DATA(COM2_TXD_MARK, PTK7_FN),
+        PINMUX_DATA(COM2_RXD_MARK, PTK6_FN),
+        PINMUX_DATA(COM2_RTS_MARK, PTK5_FN),
+        PINMUX_DATA(COM2_CTS_MARK, PTK4_FN),
+        PINMUX_DATA(COM2_DTR_MARK, PTK3_FN),
+        PINMUX_DATA(COM2_DSR_MARK, PTK2_FN),
+        PINMUX_DATA(COM2_DCD_MARK, PTK1_FN),
+        PINMUX_DATA(COM2_RI_MARK, PTK0_FN),
+
+        /* PTL FN */
+        PINMUX_DATA(RAC_TXD_MARK, PTL7_FN),
+        PINMUX_DATA(RAC_RXD_MARK, PTL6_FN),
+        PINMUX_DATA(RAC_RTS_MARK, PTL5_FN),
+        PINMUX_DATA(RAC_CTS_MARK, PTL4_FN),
+        PINMUX_DATA(RAC_DTR_MARK, PTL3_FN),
+        PINMUX_DATA(RAC_DSR_MARK, PTL2_FN),
+        PINMUX_DATA(RAC_DCD_MARK, PTL1_FN),
+        PINMUX_DATA(RAC_RI_MARK, PTL0_FN),
+
+        /* PTM FN */
+        PINMUX_DATA(WP_MARK, PTM6_FN),
+        PINMUX_DATA(FMS0_MARK, PTM5_FN),
+        PINMUX_DATA(FMS1_MARK, PTM4_FN),
+        PINMUX_DATA(SDA6_MARK, PTM3_FN),
+        PINMUX_DATA(SCL6_MARK, PTM2_FN),
+        PINMUX_DATA(SDA7_MARK, PTM1_FN),
+        PINMUX_DATA(SCL7_MARK, PTM0_FN),
+
+        /* PTN FN */
+        PINMUX_DATA(SCK2_MARK, PS4_15_FN1, PTN7_FN),
+        PINMUX_DATA(EVENT7_MARK, PS4_15_FN2, PTN7_FN),
+        PINMUX_DATA(RTS4_MARK, PS4_14_FN1, PTN6_FN),
+        PINMUX_DATA(EVENT6_MARK, PS4_14_FN2, PTN6_FN),
+        PINMUX_DATA(RTS3_MARK, PS4_13_FN1, PTN5_FN),
+        PINMUX_DATA(EVENT5_MARK, PS4_13_FN2, PTN5_FN),
+        PINMUX_DATA(RTS2_MARK, PS4_12_FN1, PTN4_FN),
+        PINMUX_DATA(EVENT4_MARK, PS4_12_FN2, PTN4_FN),
+        PINMUX_DATA(CTS4_MARK, PS4_11_FN1, PTN3_FN),
+        PINMUX_DATA(EVENT3_MARK, PS4_11_FN2, PTN3_FN),
+        PINMUX_DATA(CTS3_MARK, PS4_10_FN1, PTN2_FN),
+        PINMUX_DATA(EVENT2_MARK, PS4_10_FN2, PTN2_FN),
+        PINMUX_DATA(CTS2_MARK, PS4_9_FN1, PTN1_FN),
+        PINMUX_DATA(EVENT1_MARK, PS4_9_FN2, PTN1_FN),
+        PINMUX_DATA(EVENT0_MARK, PTN0_FN),
+
+        /* PTO FN */
+        PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN),
+        PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN),
+        PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN),
+        PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN),
+        PINMUX_DATA(SGPIO1_CLK_MARK, PTO3_FN),
+        PINMUX_DATA(SGPIO1_LOAD_MARK, PTO2_FN),
+        PINMUX_DATA(SGPIO1_DI_MARK, PTO1_FN),
+        PINMUX_DATA(SGPIO1_DO_MARK, PTO0_FN),
+
+        /* PTP FN */
+        PINMUX_DATA(JMCTCK_MARK, PTP6_FN),
+        PINMUX_DATA(JMCTMS_MARK, PTP5_FN),
+        PINMUX_DATA(JMCTDO_MARK, PTP4_FN),
+        PINMUX_DATA(JMCTDI_MARK, PTP3_FN),
+        PINMUX_DATA(JMCRST_MARK, PTP2_FN),
+        PINMUX_DATA(SCK4_MARK, PTP1_FN),
+        PINMUX_DATA(SCK3_MARK, PTP0_FN),
+
+        /* PTQ FN */
+        PINMUX_DATA(LAD3_MARK, PTQ6_FN),
+        PINMUX_DATA(LAD2_MARK, PTQ5_FN),
+        PINMUX_DATA(LAD1_MARK, PTQ4_FN),
+        PINMUX_DATA(LAD0_MARK, PTQ3_FN),
+        PINMUX_DATA(LFRAME_MARK, PTQ2_FN),
+        PINMUX_DATA(SCK4_MARK, PTQ1_FN),
+        PINMUX_DATA(SCK3_MARK, PTQ0_FN),
+
+        /* PTR FN */
+        PINMUX_DATA(SDA8_MARK, PTR7_FN),        /* DDC3? */
+        PINMUX_DATA(SCL8_MARK, PTR6_FN),        /* DDC2? */
+        PINMUX_DATA(SDA2_MARK, PTR5_FN),
+        PINMUX_DATA(SCL2_MARK, PTR4_FN),
+        PINMUX_DATA(SDA1_MARK, PTR3_FN),
+        PINMUX_DATA(SCL1_MARK, PTR2_FN),
+        PINMUX_DATA(SDA0_MARK, PTR1_FN),
+        PINMUX_DATA(SCL0_MARK, PTR0_FN),
+
+        /* PTS FN */
+        PINMUX_DATA(SDA9_MARK, PTS7_FN),        /* DDC1? */
+        PINMUX_DATA(SCL9_MARK, PTS6_FN),        /* DDC0? */
+        PINMUX_DATA(SDA5_MARK, PTS5_FN),
+        PINMUX_DATA(SCL5_MARK, PTS4_FN),
+        PINMUX_DATA(SDA4_MARK, PTS3_FN),
+        PINMUX_DATA(SCL4_MARK, PTS2_FN),
+        PINMUX_DATA(SDA3_MARK, PTS1_FN),
+        PINMUX_DATA(SCL3_MARK, PTS0_FN),
+
+        /* PTT FN */
+        PINMUX_DATA(AUDSYNC_MARK, PTS5_FN),
+        PINMUX_DATA(AUDCK_MARK, PTS4_FN),
+        PINMUX_DATA(AUDATA3_MARK, PS4_3_FN1, PTS3_FN),
+        PINMUX_DATA(PWX7_MARK, PS4_3_FN2, PTS3_FN),
+        PINMUX_DATA(AUDATA2_MARK, PS4_2_FN1, PTS2_FN),
+        PINMUX_DATA(PWX6_MARK, PS4_2_FN2, PTS2_FN),
+        PINMUX_DATA(AUDATA1_MARK, PS4_1_FN1, PTS1_FN),
+        PINMUX_DATA(PWX5_MARK, PS4_1_FN2, PTS1_FN),
+        PINMUX_DATA(AUDATA0_MARK, PS4_0_FN1, PTS0_FN),
+        PINMUX_DATA(PWX4_MARK, PS4_0_FN2, PTS0_FN),
+
+        /* PTU FN */
+        PINMUX_DATA(CS6_MARK, PTU7_FN),
+        PINMUX_DATA(CS5_MARK, PTU6_FN),
+        PINMUX_DATA(CS4_MARK, PTU5_FN),
+        PINMUX_DATA(CS0_MARK, PTU4_FN),
+        PINMUX_DATA(RD_MARK, PTU3_FN),
+        PINMUX_DATA(WE0_MARK, PTU2_FN),
+        PINMUX_DATA(A25_MARK, PS5_9_FN1, PTU1_FN),
+        PINMUX_DATA(DREQ0_MARK, PS5_9_FN2, PTU1_FN),
+        PINMUX_DATA(A24_MARK, PS5_8_FN1, PTU0_FN),
+        PINMUX_DATA(DACK0_MARK, PS5_8_FN2, PTU0_FN),
+
+        /* PTV FN */
+        PINMUX_DATA(A23_MARK, PS5_7_FN1, PTV7_FN),
+        PINMUX_DATA(TEND0_MARK, PS5_7_FN2, PTV7_FN),
+        PINMUX_DATA(A22_MARK, PS5_6_FN1, PTV6_FN),
+        PINMUX_DATA(DREQ1_MARK, PS5_6_FN2, PTV6_FN),
+        PINMUX_DATA(A21_MARK, PS5_5_FN1, PTV5_FN),
+        PINMUX_DATA(DACK1_MARK, PS5_5_FN2, PTV5_FN),
+        PINMUX_DATA(A20_MARK, PS5_4_FN1, PTV4_FN),
+        PINMUX_DATA(TEND1_MARK, PS5_4_FN2, PTV4_FN),
+        PINMUX_DATA(A19_MARK, PTV3_FN),
+        PINMUX_DATA(A18_MARK, PTV2_FN),
+        PINMUX_DATA(A17_MARK, PTV1_FN),
+        PINMUX_DATA(A16_MARK, PTV0_FN),
+
+        /* PTW FN */
+        PINMUX_DATA(A15_MARK, PTW7_FN),
+        PINMUX_DATA(A14_MARK, PTW6_FN),
+        PINMUX_DATA(A13_MARK, PTW5_FN),
+        PINMUX_DATA(A12_MARK, PTW4_FN),
+        PINMUX_DATA(A11_MARK, PTW3_FN),
+        PINMUX_DATA(A10_MARK, PTW2_FN),
+        PINMUX_DATA(A9_MARK, PTW1_FN),
+        PINMUX_DATA(A8_MARK, PTW0_FN),
+
+        /* PTX FN */
+        PINMUX_DATA(A7_MARK, PTX7_FN),
+        PINMUX_DATA(A6_MARK, PTX6_FN),
+        PINMUX_DATA(A5_MARK, PTX5_FN),
+        PINMUX_DATA(A4_MARK, PTX4_FN),
+        PINMUX_DATA(A3_MARK, PTX3_FN),
+        PINMUX_DATA(A2_MARK, PTX2_FN),
+        PINMUX_DATA(A1_MARK, PTX1_FN),
+        PINMUX_DATA(A0_MARK, PTX0_FN),
+
+        /* PTY FN */
+        PINMUX_DATA(D7_MARK, PTY7_FN),
+        PINMUX_DATA(D6_MARK, PTY6_FN),
+        PINMUX_DATA(D5_MARK, PTY5_FN),
+        PINMUX_DATA(D4_MARK, PTY4_FN),
+        PINMUX_DATA(D3_MARK, PTY3_FN),
+        PINMUX_DATA(D2_MARK, PTY2_FN),
+        PINMUX_DATA(D1_MARK, PTY1_FN),
+        PINMUX_DATA(D0_MARK, PTY0_FN),
+};
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* PTA */
+        PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
+        PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
+        PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
+        PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
+        PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
+        PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
+        PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
+        PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
+
+        /* PTB */
+        PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
+        PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
+        PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
+        PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
+        PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
+        PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
+        PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
+        PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
+
+        /* PTC */
+        PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
+        PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
+        PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
+        PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
+        PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
+        PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
+        PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
+        PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
+
+        /* PTD */
+        PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
+        PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
+        PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
+        PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
+        PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
+        PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
+        PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
+        PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
+
+        /* PTE */
+        PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
+        PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
+        PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
+        PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
+        PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
+        PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
+        PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
+        PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
+
+        /* PTF */
+        PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
+        PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
+        PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
+        PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
+        PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
+        PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
+        PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
+        PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
+
+        /* PTG */
+        PINMUX_GPIO(GPIO_PTG7, PTG7_DATA),
+        PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
+        PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
+        PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
+        PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
+        PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
+        PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
+        PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
+
+        /* PTH */
+        PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
+        PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
+        PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
+        PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
+        PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
+        PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
+        PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
+        PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
+
+        /* PTI */
+        PINMUX_GPIO(GPIO_PTI7, PTI7_DATA),
+        PINMUX_GPIO(GPIO_PTI6, PTI6_DATA),
+        PINMUX_GPIO(GPIO_PTI5, PTI5_DATA),
+        PINMUX_GPIO(GPIO_PTI4, PTI4_DATA),
+        PINMUX_GPIO(GPIO_PTI3, PTI3_DATA),
+        PINMUX_GPIO(GPIO_PTI2, PTI2_DATA),
+        PINMUX_GPIO(GPIO_PTI1, PTI1_DATA),
+        PINMUX_GPIO(GPIO_PTI0, PTI0_DATA),
+
+        /* PTJ */
+        PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
+        PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
+        PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
+        PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
+        PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
+        PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
+        PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
+        PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
+
+        /* PTK */
+        PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
+        PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
+        PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
+        PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
+        PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
+        PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
+        PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
+        PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
+
+        /* PTL */
+        PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
+        PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
+        PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
+        PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
+        PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
+        PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
+        PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
+        PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
+
+        /* PTM */
+        PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
+        PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
+        PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
+        PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
+        PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
+        PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
+        PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
+
+        /* PTN */
+        PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
+        PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
+        PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
+        PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
+        PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
+        PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
+        PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
+        PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
+
+        /* PTO */
+        PINMUX_GPIO(GPIO_PTO7, PTO7_DATA),
+        PINMUX_GPIO(GPIO_PTO6, PTO6_DATA),
+        PINMUX_GPIO(GPIO_PTO5, PTO5_DATA),
+        PINMUX_GPIO(GPIO_PTO4, PTO4_DATA),
+        PINMUX_GPIO(GPIO_PTO3, PTO3_DATA),
+        PINMUX_GPIO(GPIO_PTO2, PTO2_DATA),
+        PINMUX_GPIO(GPIO_PTO1, PTO1_DATA),
+        PINMUX_GPIO(GPIO_PTO0, PTO0_DATA),
+
+        /* PTP */
+        PINMUX_GPIO(GPIO_PTP6, PTP6_DATA),
+        PINMUX_GPIO(GPIO_PTP5, PTP5_DATA),
+        PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
+        PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
+        PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
+        PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
+        PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
+
+        /* PTQ */
+        PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
+        PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
+        PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
+        PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
+        PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
+        PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
+        PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
+
+        /* PTR */
+        PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
+        PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
+        PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
+        PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
+        PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
+        PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
+        PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
+        PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
+
+        /* PTS */
+        PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
+        PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
+        PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
+        PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
+        PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
+        PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
+        PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
+        PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
+
+        /* PTT */
+        PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
+        PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
+        PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
+        PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
+        PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
+        PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
+
+        /* PTU */
+        PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
+        PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
+        PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
+        PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
+        PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
+        PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
+        PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
+        PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
+
+        /* PTV */
+        PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
+        PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
+        PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
+        PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
+        PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
+        PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
+        PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
+        PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
+
+        /* PTW */
+        PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
+        PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
+        PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
+        PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
+        PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
+        PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
+        PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
+        PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
+
+        /* PTX */
+        PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
+        PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
+        PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
+        PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
+        PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
+        PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
+        PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
+        PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
+
+        /* PTY */
+        PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
+        PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
+        PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
+        PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
+        PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
+        PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
+        PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
+        PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
+
+        /* PTZ */
+        PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
+        PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
+        PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
+        PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
+        PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
+        PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
+        PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
+        PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
+
+        /* PTA (mobule: LBSC, CPG, LPC) */
+        PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
+        PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
+        PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK),
+        PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK),
+        PINMUX_GPIO(GPIO_FN_MD10, MD10_MARK),
+        PINMUX_GPIO(GPIO_FN_MD9, MD9_MARK),
+        PINMUX_GPIO(GPIO_FN_MD8, MD8_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
+        PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
+
+        /* PTB (mobule: LBSC, EtherC, SIM, LPC) */
+        PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
+        PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
+        PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
+        PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
+        PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
+        PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
+        PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
+        PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK),
+        PINMUX_GPIO(GPIO_FN_WPSZ1, WPSZ1_MARK),
+        PINMUX_GPIO(GPIO_FN_WPSZ0, WPSZ0_MARK),
+        PINMUX_GPIO(GPIO_FN_FWID, FWID_MARK),
+        PINMUX_GPIO(GPIO_FN_FLSHSZ, FLSHSZ_MARK),
+        PINMUX_GPIO(GPIO_FN_LPC_SPIEN, LPC_SPIEN_MARK),
+        PINMUX_GPIO(GPIO_FN_BASEL, BASEL_MARK),
+
+        /* PTC (mobule: SD) */
+        PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
+        PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
+        PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
+        PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
+        PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
+        PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
+        PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
+
+        /* PTD (mobule: INTC, SPI0, LBSC, CPG, ADC) */
+        PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
+        PINMUX_GPIO(GPIO_FN_MD6, MD6_MARK),
+        PINMUX_GPIO(GPIO_FN_MD5, MD5_MARK),
+        PINMUX_GPIO(GPIO_FN_MD3, MD3_MARK),
+        PINMUX_GPIO(GPIO_FN_MD2, MD2_MARK),
+        PINMUX_GPIO(GPIO_FN_MD1, MD1_MARK),
+        PINMUX_GPIO(GPIO_FN_MD0, MD0_MARK),
+        PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK),
+        PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK),
+
+        /* PTE (mobule: EtherC) */
+        PINMUX_GPIO(GPIO_FN_ET0_CRS_DV, ET0_CRS_DV_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_TXD1, ET0_TXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_TXD0, ET0_TXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_TX_EN, ET0_TX_EN_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_REF_CLK, ET0_REF_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_RXD1, ET0_RXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_RXD0, ET0_RXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_ET0_RX_ER, ET0_RX_ER_MARK),
+
+        /* PTF (mobule: EtherC) */
+        PINMUX_GPIO(GPIO_FN_ET1_CRS_DV, ET1_CRS_DV_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_TXD1, ET1_TXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_TXD0, ET1_TXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_TX_EN, ET1_TX_EN_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_REF_CLK, ET1_REF_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_RXD1, ET1_RXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_RXD0, ET1_RXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_ET1_RX_ER, ET1_RX_ER_MARK),
+
+        /* PTG (mobule: SYSTEM, PWMX, LPC) */
+        PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
+        PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX0, PWX0_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX1, PWX1_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX2, PWX2_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX3, PWX3_MARK),
+        PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK),
+        PINMUX_GPIO(GPIO_FN_CLKRUN, CLKRUN_MARK),
+        PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK),
+        PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK),
+
+        /* PTH (mobule: TMU, SCIF234, SPI1, SPI0) */
+        PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
+        PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
+        PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
+        PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK),
+        PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK),
+        PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK),
+        PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK),
+        PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK),
+        PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK),
+
+        /* PTI (mobule: INTC) */
+        PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK),
+        PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK),
+
+        /* PTJ (mobule: SCIF234, SERMUX) */
+        PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
+        PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
+        PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
+        PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
+        PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
+        PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
+
+        /* PTK (mobule: SERMUX) */
+        PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK),
+        PINMUX_GPIO(GPIO_FN_COM2_CTS, COM2_CTS_MARK),
+        PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK),
+        PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK),
+        PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK),
+        PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK),
+
+        /* PTL (mobule: SERMUX) */
+        PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK),
+        PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK),
+        PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK),
+        PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK),
+        PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK),
+        PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK),
+
+        /* PTM (mobule: IIC, LPC) */
+        PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK),
+        PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
+        PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
+        PINMUX_GPIO(GPIO_FN_FMS1, FMS1_MARK),
+
+        /* PTN (mobule: SCIF234, EVC) */
+        PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
+        PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK),
+        PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
+        PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK),
+        PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK),
+        PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
+        PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
+        PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
+
+        /* PTO (mobule: SGPIO) */
+        PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK),
+        PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK),
+        PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK),
+        PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK),
+        PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK),
+        PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK),
+
+        /* PTP (mobule: JMC, SCIF234) */
+        PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
+        PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
+        PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
+        PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
+        PINMUX_GPIO(GPIO_FN_JMCRST, JMCRST_MARK),
+        PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
+        PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
+
+        /* PTQ (mobule: LPC) */
+        PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK),
+        PINMUX_GPIO(GPIO_FN_LAD2, LAD2_MARK),
+        PINMUX_GPIO(GPIO_FN_LAD1, LAD1_MARK),
+        PINMUX_GPIO(GPIO_FN_LAD0, LAD0_MARK),
+        PINMUX_GPIO(GPIO_FN_LFRAME, LFRAME_MARK),
+        PINMUX_GPIO(GPIO_FN_LRESET, LRESET_MARK),
+        PINMUX_GPIO(GPIO_FN_LCLK, LCLK_MARK),
+
+        /* PTR (mobule: GRA, IIC) */
+        PINMUX_GPIO(GPIO_FN_DDC3, DDC3_MARK),
+        PINMUX_GPIO(GPIO_FN_DDC2, DDC2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA8, SDA8_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL8, SCL8_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
+
+        /* PTS (mobule: GRA, IIC) */
+        PINMUX_GPIO(GPIO_FN_DDC1, DDC1_MARK),
+        PINMUX_GPIO(GPIO_FN_DDC0, DDC0_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA9, SDA9_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL9, SCL9_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA5, SDA5_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL5, SCL5_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA4, SDA4_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL4, SCL4_MARK),
+        PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
+        PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
+
+        /* PTT (mobule: SYSTEM, PWMX) */
+        PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX7, PWX7_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX6, PWX6_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX5, PWX5_MARK),
+        PINMUX_GPIO(GPIO_FN_PWX4, PWX4_MARK),
+
+        /* PTU (mobule: LBSC, DMAC) */
+        PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
+        PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
+        PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
+        PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
+        PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
+        PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
+        PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
+        PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
+
+        /* PTV (mobule: LBSC, DMAC) */
+        PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
+        PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
+        PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
+        PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
+        PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
+        PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
+        PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
+        PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
+        PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
+        PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
+
+        /* PTW (mobule: LBSC) */
+        PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
+        PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
+        PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
+        PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
+        PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
+        PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
+        PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
+        PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
+        PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
+
+        /* PTX (mobule: LBSC) */
+        PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
+        PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
+        PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
+        PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
+        PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
+        PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
+        PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
+        PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
+
+        /* PTY (mobule: LBSC) */
+        PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
+        PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
+        PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
+        PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
+        PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
+        PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
+        PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
+        PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
+ };
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
+                PTA7_FN, PTA7_OUT, PTA7_IN, 0,
+                PTA6_FN, PTA6_OUT, PTA6_IN, 0,
+                PTA5_FN, PTA5_OUT, PTA5_IN, 0,
+                PTA4_FN, PTA4_OUT, PTA4_IN, 0,
+                PTA3_FN, PTA3_OUT, PTA3_IN, 0,
+                PTA2_FN, PTA2_OUT, PTA2_IN, 0,
+                PTA1_FN, PTA1_OUT, PTA1_IN, 0,
+                PTA0_FN, PTA0_OUT, PTA0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
+                PTB7_FN, PTB7_OUT, PTB7_IN, 0,
+                PTB6_FN, PTB6_OUT, PTB6_IN, 0,
+                PTB5_FN, PTB5_OUT, PTB5_IN, 0,
+                PTB4_FN, PTB4_OUT, PTB4_IN, 0,
+                PTB3_FN, PTB3_OUT, PTB3_IN, 0,
+                PTB2_FN, PTB2_OUT, PTB2_IN, 0,
+                PTB1_FN, PTB1_OUT, PTB1_IN, 0,
+                PTB0_FN, PTB0_OUT, PTB0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2) {
+                PTC7_FN, PTC7_OUT, PTC7_IN, 0,
+                PTC6_FN, PTC6_OUT, PTC6_IN, 0,
+                PTC5_FN, PTC5_OUT, PTC5_IN, 0,
+                PTC4_FN, PTC4_OUT, PTC4_IN, 0,
+                PTC3_FN, PTC3_OUT, PTC3_IN, 0,
+                PTC2_FN, PTC2_OUT, PTC2_IN, 0,
+                PTC1_FN, PTC1_OUT, PTC1_IN, 0,
+                PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
+                PTD7_FN, PTD7_OUT, PTD7_IN, 0,
+                PTD6_FN, PTD6_OUT, PTD6_IN, 0,
+                PTD5_FN, PTD5_OUT, PTD5_IN, 0,
+                PTD4_FN, PTD4_OUT, PTD4_IN, 0,
+                PTD3_FN, PTD3_OUT, PTD3_IN, 0,
+                PTD2_FN, PTD2_OUT, PTD2_IN, 0,
+                PTD1_FN, PTD1_OUT, PTD1_IN, 0,
+                PTD0_FN, PTD0_OUT, PTD0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
+                PTE7_FN, PTE7_OUT, PTE7_IN, 0,
+                PTE6_FN, PTE6_OUT, PTE6_IN, 0,
+                PTE5_FN, PTE5_OUT, PTE5_IN, 0,
+                PTE4_FN, PTE4_OUT, PTE4_IN, 0,
+                PTE3_FN, PTE3_OUT, PTE3_IN, 0,
+                PTE2_FN, PTE2_OUT, PTE2_IN, 0,
+                PTE1_FN, PTE1_OUT, PTE1_IN, 0,
+                PTE0_FN, PTE0_OUT, PTE0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
+                PTF7_FN, PTF7_OUT, PTF7_IN, 0,
+                PTF6_FN, PTF6_OUT, PTF6_IN, 0,
+                PTF5_FN, PTF5_OUT, PTF5_IN, 0,
+                PTF4_FN, PTF4_OUT, PTF4_IN, 0,
+                PTF3_FN, PTF3_OUT, PTF3_IN, 0,
+                PTF2_FN, PTF2_OUT, PTF2_IN, 0,
+                PTF1_FN, PTF1_OUT, PTF1_IN, 0,
+                PTF0_FN, PTF0_OUT, PTF0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
+                PTG7_FN, PTG7_OUT, PTG7_IN, 0,
+                PTG6_FN, PTG6_OUT, PTG6_IN, 0,
+                PTG5_FN, PTG5_OUT, PTG5_IN, 0,
+                PTG4_FN, PTG4_OUT, PTG4_IN, 0,
+                PTG3_FN, PTG3_OUT, PTG3_IN, 0,
+                PTG2_FN, PTG2_OUT, PTG2_IN, 0,
+                PTG1_FN, PTG1_OUT, PTG1_IN, 0,
+                PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
+                PTH7_FN, PTH7_OUT, PTH7_IN, 0,
+                PTH6_FN, PTH6_OUT, PTH6_IN, 0,
+                PTH5_FN, PTH5_OUT, PTH5_IN, 0,
+                PTH4_FN, PTH4_OUT, PTH4_IN, 0,
+                PTH3_FN, PTH3_OUT, PTH3_IN, 0,
+                PTH2_FN, PTH2_OUT, PTH2_IN, 0,
+                PTH1_FN, PTH1_OUT, PTH1_IN, 0,
+                PTH0_FN, PTH0_OUT, PTH0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
+                PTI7_FN, PTI7_OUT, PTI7_IN, 0,
+                PTI6_FN, PTI6_OUT, PTI6_IN, 0,
+                PTI5_FN, PTI5_OUT, PTI5_IN, 0,
+                PTI4_FN, PTI4_OUT, PTI4_IN, 0,
+                PTI3_FN, PTI3_OUT, PTI3_IN, 0,
+                PTI2_FN, PTI2_OUT, PTI2_IN, 0,
+                PTI1_FN, PTI1_OUT, PTI1_IN, 0,
+                PTI0_FN, PTI0_OUT, PTI0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
+                PTJ7_FN, PTJ7_OUT, PTJ7_IN, 0,
+                PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0,
+                PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0,
+                PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0,
+                PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0,
+                PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0,
+                PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0,
+                PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
+                PTK7_FN, PTK7_OUT, PTK7_IN, 0,
+                PTK6_FN, PTK6_OUT, PTK6_IN, 0,
+                PTK5_FN, PTK5_OUT, PTK5_IN, 0,
+                PTK4_FN, PTK4_OUT, PTK4_IN, 0,
+                PTK3_FN, PTK3_OUT, PTK3_IN, 0,
+                PTK2_FN, PTK2_OUT, PTK2_IN, 0,
+                PTK1_FN, PTK1_OUT, PTK1_IN, 0,
+                PTK0_FN, PTK0_OUT, PTK0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
+                PTL7_FN, PTL7_OUT, PTL7_IN, 0,
+                PTL6_FN, PTL6_OUT, PTL6_IN, 0,
+                PTL5_FN, PTL5_OUT, PTL5_IN, 0,
+                PTL4_FN, PTL4_OUT, PTL4_IN, 0,
+                PTL3_FN, PTL3_OUT, PTL3_IN, 0,
+                PTL2_FN, PTL2_OUT, PTL2_IN, 0,
+                PTL1_FN, PTL1_OUT, PTL1_IN, 0,
+                PTL0_FN, PTL0_OUT, PTL0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
+                0, 0, 0, 0,     /* reserved: always set 1 */
+                PTM6_FN, PTM6_OUT, PTM6_IN, 0,
+                PTM5_FN, PTM5_OUT, PTM5_IN, 0,
+                PTM4_FN, PTM4_OUT, PTM4_IN, 0,
+                PTM3_FN, PTM3_OUT, PTM3_IN, 0,
+                PTM2_FN, PTM2_OUT, PTM2_IN, 0,
+                PTM1_FN, PTM1_OUT, PTM1_IN, 0,
+                PTM0_FN, PTM0_OUT, PTM0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) {
+                PTN7_FN, PTN7_OUT, PTN7_IN, 0,
+                PTN6_FN, PTN6_OUT, PTN6_IN, 0,
+                PTN5_FN, PTN5_OUT, PTN5_IN, 0,
+                PTN4_FN, PTN4_OUT, PTN4_IN, 0,
+                PTN3_FN, PTN3_OUT, PTN3_IN, 0,
+                PTN2_FN, PTN2_OUT, PTN2_IN, 0,
+                PTN1_FN, PTN1_OUT, PTN1_IN, 0,
+                PTN0_FN, PTN0_OUT, PTN0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
+                PTO7_FN, PTO7_OUT, PTO7_IN, 0,
+                PTO6_FN, PTO6_OUT, PTO6_IN, 0,
+                PTO5_FN, PTO5_OUT, PTO5_IN, 0,
+                PTO4_FN, PTO4_OUT, PTO4_IN, 0,
+                PTO3_FN, PTO3_OUT, PTO3_IN, 0,
+                PTO2_FN, PTO2_OUT, PTO2_IN, 0,
+                PTO1_FN, PTO1_OUT, PTO1_IN, 0,
+                PTO0_FN, PTO0_OUT, PTO0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
+                0, 0, 0, 0,     /* reserved: always set 1 */
+                PTP6_FN, PTP6_OUT, PTP6_IN, 0,
+                PTP5_FN, PTP5_OUT, PTP5_IN, 0,
+                PTP4_FN, PTP4_OUT, PTP4_IN, 0,
+                PTP3_FN, PTP3_OUT, PTP3_IN, 0,
+                PTP2_FN, PTP2_OUT, PTP2_IN, 0,
+                PTP1_FN, PTP1_OUT, PTP1_IN, 0,
+                PTP0_FN, PTP0_OUT, PTP0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) {
+                0, 0, 0, 0,     /* reserved: always set 1 */
+                PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0,
+                PTQ5_FN, PTQ5_OUT, PTQ5_IN, 0,
+                PTQ4_FN, PTQ4_OUT, PTQ4_IN, 0,
+                PTQ3_FN, PTQ3_OUT, PTQ3_IN, 0,
+                PTQ2_FN, PTQ2_OUT, PTQ2_IN, 0,
+                PTQ1_FN, PTQ1_OUT, PTQ1_IN, 0,
+                PTQ0_FN, PTQ0_OUT, PTQ0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PRCR", 0xffec0022, 16, 2) {
+                PTR7_FN, PTR7_OUT, PTR7_IN, 0,
+                PTR6_FN, PTR6_OUT, PTR6_IN, 0,
+                PTR5_FN, PTR5_OUT, PTR5_IN, 0,
+                PTR4_FN, PTR4_OUT, PTR4_IN, 0,
+                PTR3_FN, PTR3_OUT, PTR3_IN, 0,
+                PTR2_FN, PTR2_OUT, PTR2_IN, 0,
+                PTR1_FN, PTR1_OUT, PTR1_IN, 0,
+                PTR0_FN, PTR0_OUT, PTR0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PSCR", 0xffec0024, 16, 2) {
+                PTS7_FN, PTS7_OUT, PTS7_IN, 0,
+                PTS6_FN, PTS6_OUT, PTS6_IN, 0,
+                PTS5_FN, PTS5_OUT, PTS5_IN, 0,
+                PTS4_FN, PTS4_OUT, PTS4_IN, 0,
+                PTS3_FN, PTS3_OUT, PTS3_IN, 0,
+                PTS2_FN, PTS2_OUT, PTS2_IN, 0,
+                PTS1_FN, PTS1_OUT, PTS1_IN, 0,
+                PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
+                0, 0, 0, 0,     /* reserved: always set 1 */
+                0, 0, 0, 0,     /* reserved: always set 1 */
+                PTT5_FN, PTT5_OUT, PTT5_IN, 0,
+                PTT4_FN, PTT4_OUT, PTT4_IN, 0,
+                PTT3_FN, PTT3_OUT, PTT3_IN, 0,
+                PTT2_FN, PTT2_OUT, PTT2_IN, 0,
+                PTT1_FN, PTT1_OUT, PTT1_IN, 0,
+                PTT0_FN, PTT0_OUT, PTT0_IN, 0 }
+        },
+        { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
+                PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
+                PTU6_FN, PTU6_OUT, PTU6_IN, PTU6_IN_PU,
+                PTU5_FN, PTU5_OUT, PTU5_IN, PTU5_IN_PU,
+                PTU4_FN, PTU4_OUT, PTU4_IN, PTU4_IN_PU,
+                PTU3_FN, PTU3_OUT, PTU3_IN, PTU3_IN_PU,
+                PTU2_FN, PTU2_OUT, PTU2_IN, PTU2_IN_PU,
+                PTU1_FN, PTU1_OUT, PTU1_IN, PTU1_IN_PU,
+                PTU0_FN, PTU0_OUT, PTU0_IN, PTU0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) {
+                PTV7_FN, PTV7_OUT, PTV7_IN, PTV7_IN_PU,
+                PTV6_FN, PTV6_OUT, PTV6_IN, PTV6_IN_PU,
+                PTV5_FN, PTV5_OUT, PTV5_IN, PTV5_IN_PU,
+                PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
+                PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
+                PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
+                PTV1_FN, PTV1_OUT, PTV1_IN, PTV1_IN_PU,
+                PTV0_FN, PTV0_OUT, PTV0_IN, PTV0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) {
+                PTW7_FN, PTW7_OUT, PTW7_IN, PTW7_IN_PU,
+                PTW6_FN, PTW6_OUT, PTW6_IN, PTW6_IN_PU,
+                PTW5_FN, PTW5_OUT, PTW5_IN, PTW5_IN_PU,
+                PTW4_FN, PTW4_OUT, PTW4_IN, PTW4_IN_PU,
+                PTW3_FN, PTW3_OUT, PTW3_IN, PTW3_IN_PU,
+                PTW2_FN, PTW2_OUT, PTW2_IN, PTW2_IN_PU,
+                PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
+                PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) {
+                PTX7_FN, PTX7_OUT, PTX7_IN, PTX7_IN_PU,
+                PTX6_FN, PTX6_OUT, PTX6_IN, PTX6_IN_PU,
+                PTX5_FN, PTX5_OUT, PTX5_IN, PTX5_IN_PU,
+                PTX4_FN, PTX4_OUT, PTX4_IN, PTX4_IN_PU,
+                PTX3_FN, PTX3_OUT, PTX3_IN, PTX3_IN_PU,
+                PTX2_FN, PTX2_OUT, PTX2_IN, PTX2_IN_PU,
+                PTX1_FN, PTX1_OUT, PTX1_IN, PTX1_IN_PU,
+                PTX0_FN, PTX0_OUT, PTX0_IN, PTX0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) {
+                PTY7_FN, PTY7_OUT, PTY7_IN, PTY7_IN_PU,
+                PTY6_FN, PTY6_OUT, PTY6_IN, PTY6_IN_PU,
+                PTY5_FN, PTY5_OUT, PTY5_IN, PTY5_IN_PU,
+                PTY4_FN, PTY4_OUT, PTY4_IN, PTY4_IN_PU,
+                PTY3_FN, PTY3_OUT, PTY3_IN, PTY3_IN_PU,
+                PTY2_FN, PTY2_OUT, PTY2_IN, PTY2_IN_PU,
+                PTY1_FN, PTY1_OUT, PTY1_IN, PTY1_IN_PU,
+                PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
+                0, PTZ7_OUT, PTZ7_IN, 0,
+                0, PTZ6_OUT, PTZ6_IN, 0,
+                0, PTZ5_OUT, PTZ5_IN, 0,
+                0, PTZ4_OUT, PTZ4_IN, 0,
+                0, PTZ3_OUT, PTZ3_IN, 0,
+                0, PTZ2_OUT, PTZ2_IN, 0,
+                0, PTZ1_OUT, PTZ1_IN, 0,
+                0, PTZ0_OUT, PTZ0_IN, 0 }
+        },
+
+        { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) {
+                PS0_15_FN3, PS0_15_FN1,
+                PS0_14_FN3, PS0_14_FN1,
+                PS0_13_FN3, PS0_13_FN1,
+                PS0_12_FN3, PS0_12_FN1,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                PS0_7_FN2, PS0_7_FN1,
+                PS0_6_FN2, PS0_6_FN1,
+                PS0_5_FN2, PS0_5_FN1,
+                PS0_4_FN2, PS0_4_FN1,
+                PS0_3_FN2, PS0_3_FN1,
+                PS0_2_FN2, PS0_2_FN1,
+                PS0_1_FN2, PS0_1_FN1,
+                0, 0, }
+        },
+        { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) {
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                PS1_7_FN1, PS1_7_FN3,
+                PS1_6_FN1, PS1_6_FN3,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0, }
+        },
+        { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) {
+                0, 0,
+                0, 0,
+                PS2_13_FN3, PS2_13_FN1,
+                PS2_12_FN3, PS2_12_FN1,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                PS2_1_FN1, PS2_1_FN2,
+                PS2_0_FN1, PS2_0_FN2, }
+        },
+        { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) {
+                PS4_15_FN2, PS4_15_FN1,
+                PS4_14_FN2, PS4_14_FN1,
+                PS4_13_FN2, PS4_13_FN1,
+                PS4_12_FN2, PS4_12_FN1,
+                PS4_11_FN2, PS4_11_FN1,
+                PS4_10_FN2, PS4_10_FN1,
+                PS4_9_FN2, PS4_9_FN1,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                PS4_3_FN2, PS4_3_FN1,
+                PS4_2_FN2, PS4_2_FN1,
+                PS4_1_FN2, PS4_1_FN1,
+                PS4_0_FN2, PS4_0_FN1, }
+        },
+        { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) {
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                PS5_9_FN1, PS5_9_FN2,
+                PS5_8_FN1, PS5_8_FN2,
+                PS5_7_FN1, PS5_7_FN2,
+                PS5_6_FN1, PS5_6_FN2,
+                PS5_5_FN1, PS5_5_FN2,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0, }
+        },
+        { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) {
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                0, 0,
+                PS6_7_FN_AN, PS6_7_FN_EV,
+                PS6_6_FN_AN, PS6_6_FN_EV,
+                PS6_5_FN_AN, PS6_5_FN_EV,
+                PS6_4_FN_AN, PS6_4_FN_EV,
+                PS6_3_FN_AN, PS6_3_FN_EV,
+                PS6_2_FN_AN, PS6_2_FN_EV,
+                PS6_1_FN_AN, PS6_1_FN_EV,
+                PS6_0_FN_AN, PS6_0_FN_EV, }
+        },
+        {}
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PADR", 0xffec0034, 8) {
+                PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
+                PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
+        },
+        { PINMUX_DATA_REG("PBDR", 0xffec0036, 8) {
+                PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
+                PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
+        },
+        { PINMUX_DATA_REG("PCDR", 0xffec0038, 8) {
+                PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
+                PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
+        },
+        { PINMUX_DATA_REG("PDDR", 0xffec003a, 8) {
+                PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
+                PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
+        },
+        { PINMUX_DATA_REG("PEDR", 0xffec003c, 8) {
+                PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
+                PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
+        },
+        { PINMUX_DATA_REG("PFDR", 0xffec003e, 8) {
+                PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
+                PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
+        },
+        { PINMUX_DATA_REG("PGDR", 0xffec0040, 8) {
+                PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
+                PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
+        },
+        { PINMUX_DATA_REG("PHDR", 0xffec0042, 8) {
+                PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
+                PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
+        },
+        { PINMUX_DATA_REG("PIDR", 0xffec0044, 8) {
+                PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
+                PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA }
+        },
+        { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) {
+                PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
+                PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
+        },
+        { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) {
+                PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
+                PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
+        },
+        { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) {
+                PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
+                PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
+        },
+        { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) {
+                0, PTM6_DATA, PTM5_DATA, PTM4_DATA,
+                PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
+        },
+        { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) {
+                PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
+                PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
+        },
+        { PINMUX_DATA_REG("PODR", 0xffec0050, 8) {
+                PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
+                PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA }
+        },
+        { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) {
+                0, PTP6_DATA, PTP5_DATA, PTP4_DATA,
+                PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
+        },
+        { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) {
+                0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
+                PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
+        },
+        { PINMUX_DATA_REG("PRDR", 0xffec0056, 8) {
+                PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
+                PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
+        },
+        { PINMUX_DATA_REG("PSDR", 0xffec0058, 8) {
+                PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
+                PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
+        },
+        { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) {
+                0, 0, PTT5_DATA, PTT4_DATA,
+                PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
+        },
+        { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) {
+                PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
+                PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
+        },
+        { PINMUX_DATA_REG("PVDR", 0xffec005e, 8) {
+                PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
+                PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
+        },
+        { PINMUX_DATA_REG("PWDR", 0xffec0060, 8) {
+                PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
+                PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
+        },
+        { PINMUX_DATA_REG("PXDR", 0xffec0062, 8) {
+                PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
+                PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
+        },
+        { PINMUX_DATA_REG("PYDR", 0xffec0064, 8) {
+                PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
+                PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
+        },
+        { PINMUX_DATA_REG("PZDR", 0xffec0066, 8) {
+                PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
+                PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
+        },
+        { },
+};
+
+static struct pinmux_info sh7757_pinmux_info = {
+        .name = "sh7757_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PTA7,
+        .last_gpio = GPIO_FN_D0,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+static int __init plat_pinmux_setup(void)
+{
+        return register_pinmux(&sh7757_pinmux_info);
+}
+
+arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 1a956b1beccc..4a9010bf4fd3 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -40,7 +40,7 @@ static struct platform_device iic_device = {
 };
 
 static struct r8a66597_platdata r8a66597_data = {
-        /* This set zero to all members */
+        .on_chip = 1,
 };
 
 static struct resource usb_host_resources[] = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index cda76ebf87c3..5491b094cf05 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -13,9 +13,12 @@
 #include <linux/serial_sci.h>
 #include <linux/mm.h>
 #include <linux/uio_driver.h>
+#include <linux/usb/m66592.h>
 #include <linux/sh_timer.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
+#include <asm/dma-sh.h>
+#include <cpu/sh7722.h>
 
 static struct resource rtc_resources[] = {
         [0] = {
@@ -45,11 +48,18 @@ static struct platform_device rtc_device = {
         .id             = -1,
         .num_resources  = ARRAY_SIZE(rtc_resources),
         .resource       = rtc_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_RTC,
+        },
+};
+
+static struct m66592_platdata usbf_platdata = {
+        .on_chip = 1,
 };
 
 static struct resource usbf_resources[] = {
         [0] = {
-                .name   = "m66592_udc",
+                .name   = "USBF",
                 .start  = 0x04480000,
                 .end    = 0x044800FF,
                 .flags  = IORESOURCE_MEM,
@@ -67,9 +77,13 @@ static struct platform_device usbf_device = {
         .dev = {
                 .dma_mask               = NULL,
                 .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &usbf_platdata,
         },
         .num_resources  = ARRAY_SIZE(usbf_resources),
         .resource       = usbf_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_USBF,
+        },
 };
 
 static struct resource iic_resources[] = {
@@ -91,6 +105,9 @@ static struct platform_device iic_device = {
         .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic_resources),
         .resource       = iic_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC,
+        },
 };
 
 static struct uio_info vpu_platform_data = {
@@ -119,6 +136,9 @@ static struct platform_device vpu_device = {
         },
         .resource       = vpu_resources,
         .num_resources  = ARRAY_SIZE(vpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VPU,
+        },
 };
 
 static struct uio_info veu_platform_data = {
@@ -147,6 +167,9 @@ static struct platform_device veu_device = {
         },
         .resource       = veu_resources,
         .num_resources  = ARRAY_SIZE(veu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU,
+        },
 };
 
 static struct uio_info jpu_platform_data = {
@@ -175,6 +198,9 @@ static struct platform_device jpu_device = {
         },
         .resource       = jpu_resources,
         .num_resources  = ARRAY_SIZE(jpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_JPU,
+        },
 };
 
 static struct sh_timer_config cmt_platform_data = {
@@ -207,6 +233,9 @@ static struct platform_device cmt_device = {
         },
         .resource       = cmt_resources,
         .num_resources  = ARRAY_SIZE(cmt_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_CMT,
+        },
 };
 
 static struct sh_timer_config tmu0_platform_data = {
@@ -238,6 +267,9 @@ static struct platform_device tmu0_device = {
         },
         .resource       = tmu0_resources,
         .num_resources  = ARRAY_SIZE(tmu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU,
+        },
 };
 
 static struct sh_timer_config tmu1_platform_data = {
@@ -269,6 +301,9 @@ static struct platform_device tmu1_device = {
         },
         .resource       = tmu1_resources,
         .num_resources  = ARRAY_SIZE(tmu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU,
+        },
 };
 
 static struct sh_timer_config tmu2_platform_data = {
@@ -299,6 +334,9 @@ static struct platform_device tmu2_device = {
         },
         .resource       = tmu2_resources,
         .num_resources  = ARRAY_SIZE(tmu2_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU,
+        },
 };
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -336,6 +374,18 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_dmae_pdata dma_platform_data = {
+        .mode = 0,
+};
+
+static struct platform_device dma_device = {
+        .name           = "sh-dma-engine",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &dma_platform_data,
+        },
+};
+
 static struct platform_device *sh7722_devices[] __initdata = {
         &cmt_device,
         &tmu0_device,
@@ -348,6 +398,7 @@ static struct platform_device *sh7722_devices[] __initdata = {
         &vpu_device,
         &veu_device,
         &jpu_device,
+        &dma_device,
 };
 
 static int __init sh7722_devices_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index b45dace9539f..4caa5a7ca86e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
+#include <cpu/sh7723.h>
 
 static struct uio_info vpu_platform_data = {
         .name = "VPU5",
@@ -45,6 +46,9 @@ static struct platform_device vpu_device = {
         },
         .resource       = vpu_resources,
         .num_resources  = ARRAY_SIZE(vpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VPU,
+        },
 };
 
 static struct uio_info veu0_platform_data = {
@@ -73,6 +77,9 @@ static struct platform_device veu0_device = {
         },
         .resource       = veu0_resources,
         .num_resources  = ARRAY_SIZE(veu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU2H0,
+        },
 };
 
 static struct uio_info veu1_platform_data = {
@@ -101,6 +108,9 @@ static struct platform_device veu1_device = {
         },
         .resource       = veu1_resources,
         .num_resources  = ARRAY_SIZE(veu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU2H1,
+        },
 };
 
 static struct sh_timer_config cmt_platform_data = {
@@ -133,6 +143,9 @@ static struct platform_device cmt_device = {
         },
         .resource       = cmt_resources,
         .num_resources  = ARRAY_SIZE(cmt_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_CMT,
+        },
 };
 
 static struct sh_timer_config tmu0_platform_data = {
@@ -164,6 +177,9 @@ static struct platform_device tmu0_device = {
         },
         .resource       = tmu0_resources,
         .num_resources  = ARRAY_SIZE(tmu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu1_platform_data = {
@@ -195,6 +211,9 @@ static struct platform_device tmu1_device = {
         },
         .resource       = tmu1_resources,
         .num_resources  = ARRAY_SIZE(tmu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu2_platform_data = {
@@ -225,6 +244,9 @@ static struct platform_device tmu2_device = {
         },
         .resource       = tmu2_resources,
         .num_resources  = ARRAY_SIZE(tmu2_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu3_platform_data = {
@@ -255,6 +277,9 @@ static struct platform_device tmu3_device = {
         },
         .resource       = tmu3_resources,
         .num_resources  = ARRAY_SIZE(tmu3_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu4_platform_data = {
@@ -285,6 +310,9 @@ static struct platform_device tmu4_device = {
         },
         .resource       = tmu4_resources,
         .num_resources  = ARRAY_SIZE(tmu4_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu5_platform_data = {
@@ -315,6 +343,9 @@ static struct platform_device tmu5_device = {
         },
         .resource       = tmu5_resources,
         .num_resources  = ARRAY_SIZE(tmu5_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -395,10 +426,13 @@ static struct platform_device rtc_device = {
         .id             = -1,
         .num_resources  = ARRAY_SIZE(rtc_resources),
         .resource       = rtc_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_RTC,
+        },
 };
 
 static struct r8a66597_platdata r8a66597_data = {
-        /* This set zero to all members */
+        .on_chip = 1,
 };
 
 static struct resource sh7723_usb_host_resources[] = {
@@ -424,6 +458,9 @@ static struct platform_device sh7723_usb_host_device = {
         },
         .num_resources  = ARRAY_SIZE(sh7723_usb_host_resources),
         .resource       = sh7723_usb_host_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_USB,
+        },
 };
 
 static struct resource iic_resources[] = {
@@ -445,6 +482,9 @@ static struct platform_device iic_device = {
         .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic_resources),
         .resource       = iic_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC,
+        },
 };
 
 static struct platform_device *sh7723_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index a04edaab9a29..f3851fd757ec 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -22,6 +22,7 @@
 #include <linux/io.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
+#include <cpu/sh7724.h>
 
 /* Serial */
 static struct plat_sci_port sci_platform_data[] = {
@@ -103,6 +104,9 @@ static struct platform_device rtc_device = {
         .id             = -1,
         .num_resources  = ARRAY_SIZE(rtc_resources),
         .resource       = rtc_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_RTC,
+        },
 };
 
 /* I2C0 */
@@ -125,6 +129,9 @@ static struct platform_device iic0_device = {
         .id             = 0, /* "i2c0" clock */
         .num_resources  = ARRAY_SIZE(iic0_resources),
         .resource       = iic0_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC0,
+        },
 };
 
 /* I2C1 */
@@ -147,6 +154,9 @@ static struct platform_device iic1_device = {
         .id             = 1, /* "i2c1" clock */
         .num_resources  = ARRAY_SIZE(iic1_resources),
         .resource       = iic1_resources,
+        .archdata = {
+                .hwblk_id = HWBLK_IIC1,
+        },
 };
 
 /* VPU */
@@ -176,6 +186,9 @@ static struct platform_device vpu_device = {
         },
         .resource       = vpu_resources,
         .num_resources  = ARRAY_SIZE(vpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VPU,
+        },
 };
 
 /* VEU0 */
@@ -205,6 +218,9 @@ static struct platform_device veu0_device = {
         },
         .resource       = veu0_resources,
         .num_resources  = ARRAY_SIZE(veu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU0,
+        },
 };
 
 /* VEU1 */
@@ -234,6 +250,9 @@ static struct platform_device veu1_device = {
         },
         .resource       = veu1_resources,
         .num_resources  = ARRAY_SIZE(veu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_VEU1,
+        },
 };
 
 static struct sh_timer_config cmt_platform_data = {
@@ -266,6 +285,9 @@ static struct platform_device cmt_device = {
         },
         .resource       = cmt_resources,
         .num_resources  = ARRAY_SIZE(cmt_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_CMT,
+        },
 };
 
 static struct sh_timer_config tmu0_platform_data = {
@@ -297,6 +319,9 @@ static struct platform_device tmu0_device = {
         },
         .resource       = tmu0_resources,
         .num_resources  = ARRAY_SIZE(tmu0_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu1_platform_data = {
@@ -328,6 +353,9 @@ static struct platform_device tmu1_device = {
         },
         .resource       = tmu1_resources,
         .num_resources  = ARRAY_SIZE(tmu1_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 static struct sh_timer_config tmu2_platform_data = {
@@ -358,6 +386,9 @@ static struct platform_device tmu2_device = {
         },
         .resource       = tmu2_resources,
         .num_resources  = ARRAY_SIZE(tmu2_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU0,
+        },
 };
 
 
@@ -389,6 +420,9 @@ static struct platform_device tmu3_device = {
         },
         .resource       = tmu3_resources,
         .num_resources  = ARRAY_SIZE(tmu3_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu4_platform_data = {
@@ -419,6 +453,9 @@ static struct platform_device tmu4_device = {
         },
         .resource       = tmu4_resources,
         .num_resources  = ARRAY_SIZE(tmu4_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 static struct sh_timer_config tmu5_platform_data = {
@@ -449,6 +486,9 @@ static struct platform_device tmu5_device = {
         },
         .resource       = tmu5_resources,
         .num_resources  = ARRAY_SIZE(tmu5_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_TMU1,
+        },
 };
 
 /* JPU */
@@ -478,6 +518,9 @@ static struct platform_device jpu_device = {
         },
         .resource       = jpu_resources,
         .num_resources  = ARRAY_SIZE(jpu_resources),
+        .archdata = {
+                .hwblk_id = HWBLK_JPU,
+        },
 };
 
 static struct platform_device *sh7724_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
new file mode 100644
index 000000000000..c470e15f2e03
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -0,0 +1,513 @@
+/*
+ * SH7757 Setup
+ *
+ * Copyright (C) 2009  Renesas Solutions Corp.
+ *
+ *  based on setup-sh7785.c : Copyright (C) 2007  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/serial_sci.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/sh_timer.h>
+
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xfe430008,
+                .end    = 0xfe430013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 28,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xfe430014,
+                .end    = 0xfe43001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 29,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct plat_sci_port sci_platform_data[] = {
+        {
+                .mapbase        = 0xfe4b0000,           /* SCIF2 */
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 40, 40, 40, 40 },
+        }, {
+                .mapbase        = 0xfe4c0000,           /* SCIF3 */
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 76, 76, 76, 76 },
+        }, {
+                .mapbase        = 0xfe4d0000,           /* SCIF4 */
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 104, 104, 104, 104 },
+        }, {
+                .flags = 0,
+        }
+};
+
+static struct platform_device sci_device = {
+        .name           = "sh-sci",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = sci_platform_data,
+        },
+};
+
+static struct platform_device *sh7757_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &sci_device,
+};
+
+static int __init sh7757_devices_setup(void)
+{
+        return platform_add_devices(sh7757_devices,
+                                    ARRAY_SIZE(sh7757_devices));
+}
+arch_initcall(sh7757_devices_setup);
+
+enum {
+        UNUSED = 0,
+
+        /* interrupt sources */
+
+        IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
+        IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
+        IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
+        IRL0_HHLL, IRL0_HHLH, IRL0_HHHL,
+
+        IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
+        IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
+        IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
+        IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
+        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+
+        SDHI,
+        DVC,
+        IRQ8, IRQ9, IRQ10,
+        WDT0,
+        TMU0, TMU1, TMU2, TMU2_TICPI,
+        HUDI,
+
+        ARC4,
+        DMAC0,
+        IRQ11,
+        SCIF2,
+        DMAC1_6,
+        USB0,
+        IRQ12,
+        JMC,
+        SPI1,
+        IRQ13, IRQ14,
+        USB1,
+        TMR01, TMR23, TMR45,
+        WDT1,
+        FRT,
+        LPC,
+        SCIF0, SCIF1, SCIF3,
+        PECI0I, PECI1I, PECI2I,
+        IRQ15,
+        ETHERC,
+        SPI0,
+        ADC1,
+        DMAC1_8,
+        SIM,
+        TMU3, TMU4, TMU5,
+        ADC0,
+        SCIF4,
+        IIC0_0, IIC0_1, IIC0_2, IIC0_3,
+        IIC1_0, IIC1_1, IIC1_2, IIC1_3,
+        IIC2_0, IIC2_1, IIC2_2, IIC2_3,
+        IIC3_0, IIC3_1, IIC3_2, IIC3_3,
+        IIC4_0, IIC4_1, IIC4_2, IIC4_3,
+        IIC5_0, IIC5_1, IIC5_2, IIC5_3,
+        IIC6_0, IIC6_1, IIC6_2, IIC6_3,
+        IIC7_0, IIC7_1, IIC7_2, IIC7_3,
+        IIC8_0, IIC8_1, IIC8_2, IIC8_3,
+        IIC9_0, IIC9_1, IIC9_2, IIC9_3,
+        PCIINTA,
+        PCIE,
+        SGPIO,
+
+        /* interrupt groups */
+
+        TMU012, TMU345,
+};
+
+static struct intc_vect vectors[] __initdata = {
+        INTC_VECT(SDHI, 0x480), INTC_VECT(SDHI, 0x04a0),
+        INTC_VECT(SDHI, 0x4c0),
+        INTC_VECT(DVC, 0x4e0),
+        INTC_VECT(IRQ8, 0x500), INTC_VECT(IRQ9, 0x520),
+        INTC_VECT(IRQ10, 0x540),
+        INTC_VECT(WDT0, 0x560),
+        INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
+        INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
+        INTC_VECT(HUDI, 0x600),
+        INTC_VECT(ARC4, 0x620),
+        INTC_VECT(DMAC0, 0x640), INTC_VECT(DMAC0, 0x660),
+        INTC_VECT(DMAC0, 0x680), INTC_VECT(DMAC0, 0x6a0),
+        INTC_VECT(DMAC0, 0x6c0),
+        INTC_VECT(IRQ11, 0x6e0),
+        INTC_VECT(SCIF2, 0x700), INTC_VECT(SCIF2, 0x720),
+        INTC_VECT(SCIF2, 0x740), INTC_VECT(SCIF2, 0x760),
+        INTC_VECT(DMAC0, 0x780), INTC_VECT(DMAC0, 0x7a0),
+        INTC_VECT(DMAC1_6, 0x7c0), INTC_VECT(DMAC1_6, 0x7e0),
+        INTC_VECT(USB0, 0x840),
+        INTC_VECT(IRQ12, 0x880),
+        INTC_VECT(JMC, 0x8a0),
+        INTC_VECT(SPI1, 0x8c0),
+        INTC_VECT(IRQ13, 0x8e0), INTC_VECT(IRQ14, 0x900),
+        INTC_VECT(USB1, 0x920),
+        INTC_VECT(TMR01, 0xa00), INTC_VECT(TMR23, 0xa20),
+        INTC_VECT(TMR45, 0xa40),
+        INTC_VECT(WDT1, 0xa60),
+        INTC_VECT(FRT, 0xa80),
+        INTC_VECT(LPC, 0xaa0), INTC_VECT(LPC, 0xac0),
+        INTC_VECT(LPC, 0xae0), INTC_VECT(LPC, 0xb00),
+        INTC_VECT(LPC, 0xb20),
+        INTC_VECT(SCIF0, 0xb40), INTC_VECT(SCIF1, 0xb60),
+        INTC_VECT(SCIF3, 0xb80), INTC_VECT(SCIF3, 0xba0),
+        INTC_VECT(SCIF3, 0xbc0), INTC_VECT(SCIF3, 0xbe0),
+        INTC_VECT(PECI0I, 0xc00), INTC_VECT(PECI1I, 0xc20),
+        INTC_VECT(PECI2I, 0xc40),
+        INTC_VECT(IRQ15, 0xc60),
+        INTC_VECT(ETHERC, 0xc80), INTC_VECT(ETHERC, 0xca0),
+        INTC_VECT(SPI0, 0xcc0),
+        INTC_VECT(ADC1, 0xce0),
+        INTC_VECT(DMAC1_8, 0xd00), INTC_VECT(DMAC1_8, 0xd20),
+        INTC_VECT(DMAC1_8, 0xd40), INTC_VECT(DMAC1_8, 0xd60),
+        INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
+        INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
+        INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
+        INTC_VECT(TMU5, 0xe40),
+        INTC_VECT(ADC0, 0xe60),
+        INTC_VECT(SCIF4, 0xf00), INTC_VECT(SCIF4, 0xf20),
+        INTC_VECT(SCIF4, 0xf40), INTC_VECT(SCIF4, 0xf60),
+        INTC_VECT(IIC0_0, 0x1400), INTC_VECT(IIC0_1, 0x1420),
+        INTC_VECT(IIC0_2, 0x1440), INTC_VECT(IIC0_3, 0x1460),
+        INTC_VECT(IIC1_0, 0x1480), INTC_VECT(IIC1_1, 0x14e0),
+        INTC_VECT(IIC1_2, 0x1500), INTC_VECT(IIC1_3, 0x1520),
+        INTC_VECT(IIC2_0, 0x1540), INTC_VECT(IIC2_1, 0x1560),
+        INTC_VECT(IIC2_2, 0x1580), INTC_VECT(IIC2_3, 0x1600),
+        INTC_VECT(IIC3_0, 0x1620), INTC_VECT(IIC3_1, 0x1640),
+        INTC_VECT(IIC3_2, 0x16e0), INTC_VECT(IIC3_3, 0x1700),
+        INTC_VECT(IIC4_0, 0x17c0), INTC_VECT(IIC4_1, 0x1800),
+        INTC_VECT(IIC4_2, 0x1820), INTC_VECT(IIC4_3, 0x1840),
+        INTC_VECT(IIC5_0, 0x1860), INTC_VECT(IIC5_1, 0x1880),
+        INTC_VECT(IIC5_2, 0x18a0), INTC_VECT(IIC5_3, 0x18c0),
+        INTC_VECT(IIC6_0, 0x18e0), INTC_VECT(IIC6_1, 0x1900),
+        INTC_VECT(IIC6_2, 0x1920), INTC_VECT(IIC6_3, 0x1980),
+        INTC_VECT(IIC7_0, 0x19a0), INTC_VECT(IIC7_1, 0x1a00),
+        INTC_VECT(IIC7_2, 0x1a20), INTC_VECT(IIC7_3, 0x1a40),
+        INTC_VECT(IIC8_0, 0x1a60), INTC_VECT(IIC8_1, 0x1a80),
+        INTC_VECT(IIC8_2, 0x1aa0), INTC_VECT(IIC8_3, 0x1b40),
+        INTC_VECT(IIC9_0, 0x1b60), INTC_VECT(IIC9_1, 0x1b80),
+        INTC_VECT(IIC9_2, 0x1c00), INTC_VECT(IIC9_3, 0x1c20),
+        INTC_VECT(PCIINTA, 0x1ce0),
+        INTC_VECT(PCIE, 0x1e00),
+        INTC_VECT(SGPIO, 0x1f80),
+        INTC_VECT(SGPIO, 0x1fa0),
+};
+
+static struct intc_group groups[] __initdata = {
+        INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
+        INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
+};
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+        { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+
+        { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
+          { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
+            IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
+            IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
+            IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, 0,
+            IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
+            IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
+            IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
+            IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } },
+
+        { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
+          { 0, 0, 0, 0, 0, 0, 0, 0,
+            0, DMAC1_8, 0, PECI0I, LPC, FRT, WDT1, TMR45,
+            TMR23, TMR01, 0, 0, 0, 0, 0, DMAC0,
+            HUDI, 0, WDT0, SCIF3, SCIF2, SDHI, TMU345, TMU012
+             } },
+
+        { 0xffd400d0, 0xffd400d4, 32, /* INT2MSKR1 / INT2MSKCR1 */
+          { IRQ15, IRQ14, IRQ13, IRQ12, IRQ11, IRQ10, SCIF4, ETHERC,
+            IRQ9, IRQ8, SCIF1, SCIF0, USB0, 0, 0, USB1,
+            ADC1, 0, DMAC1_6, ADC0, SPI0, SIM, PECI2I, PECI1I,
+            ARC4, 0, SPI1, JMC, 0, 0, 0, DVC
+             } },
+
+        { 0xffd10038, 0xffd1003c, 32, /* INT2MSKR2 / INT2MSKCR2 */
+          { IIC4_1, IIC4_2, IIC5_0, 0, 0, 0, SGPIO, 0,
+            0, 0, 0, IIC9_2, IIC8_2, IIC8_1, IIC8_0, IIC7_3,
+            IIC7_2, IIC7_1, IIC6_3, IIC0_0, IIC0_1, IIC0_2, IIC0_3, IIC3_1,
+            IIC2_3, 0, IIC2_1, IIC9_1, IIC3_3, IIC1_0, PCIE, IIC2_2
+             } },
+
+        { 0xffd100d0, 0xff1400d4, 32, /* INT2MSKR3 / INT2MSKCR4 */
+          { 0, IIC6_1, IIC6_0, IIC5_1, IIC3_2, IIC2_0, 0, 0,
+            IIC1_3, IIC1_2, IIC9_0, IIC8_3, IIC4_3, IIC7_0, 0, IIC6_2,
+            PCIINTA, 0, IIC4_0, 0, 0, 0, 0, IIC9_3,
+            IIC3_0, 0, IIC5_3, IIC5_2, 0, 0, 0, IIC1_1
+             } },
+};
+
+#define INTPRI          0xffd00010
+#define INT2PRI0        0xffd40000
+#define INT2PRI1        0xffd40004
+#define INT2PRI2        0xffd40008
+#define INT2PRI3        0xffd4000c
+#define INT2PRI4        0xffd40010
+#define INT2PRI5        0xffd40014
+#define INT2PRI6        0xffd40018
+#define INT2PRI7        0xffd4001c
+#define INT2PRI8        0xffd400a0
+#define INT2PRI9        0xffd400a4
+#define INT2PRI10       0xffd400a8
+#define INT2PRI11       0xffd400ac
+#define INT2PRI12       0xffd400b0
+#define INT2PRI13       0xffd400b4
+#define INT2PRI14       0xffd400b8
+#define INT2PRI15       0xffd400bc
+#define INT2PRI16       0xffd10000
+#define INT2PRI17       0xffd10004
+#define INT2PRI18       0xffd10008
+#define INT2PRI19       0xffd1000c
+#define INT2PRI20       0xffd10010
+#define INT2PRI21       0xffd10014
+#define INT2PRI22       0xffd10018
+#define INT2PRI23       0xffd1001c
+#define INT2PRI24       0xffd100a0
+#define INT2PRI25       0xffd100a4
+#define INT2PRI26       0xffd100a8
+#define INT2PRI27       0xffd100ac
+#define INT2PRI28       0xffd100b0
+#define INT2PRI29       0xffd100b4
+#define INT2PRI30       0xffd100b8
+#define INT2PRI31       0xffd100bc
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+        { INTPRI, 0, 32, 4, { IRQ0, IRQ1, IRQ2, IRQ3,
+                              IRQ4, IRQ5, IRQ6, IRQ7 } },
+
+        { INT2PRI0, 0, 32, 8, { TMU0, TMU1, TMU2, TMU2_TICPI } },
+        { INT2PRI1, 0, 32, 8, { TMU3, TMU4, TMU5, SDHI } },
+        { INT2PRI2, 0, 32, 8, { SCIF2, SCIF3, WDT0, IRQ8 } },
+        { INT2PRI3, 0, 32, 8, { HUDI, DMAC0, ADC0, IRQ9 } },
+        { INT2PRI4, 0, 32, 8, { IRQ10, 0, TMR01, TMR23 } },
+        { INT2PRI5, 0, 32, 8, { TMR45, WDT1, FRT, LPC } },
+        { INT2PRI6, 0, 32, 8, { PECI0I, ETHERC, DMAC1_8, 0 } },
+        { INT2PRI7, 0, 32, 8, { SCIF4, 0, IRQ11, IRQ12 } },
+        { INT2PRI8, 0, 32, 8, { 0, 0, 0, DVC } },
+        { INT2PRI9, 0, 32, 8, { ARC4, 0, SPI1, JMC } },
+        { INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2I, PECI1I } },
+        { INT2PRI11, 0, 32, 8, { ADC1, IRQ13, DMAC1_6, IRQ14 } },
+        { INT2PRI12, 0, 32, 8, { USB0, 0, IRQ15, USB1 } },
+        { INT2PRI13, 0, 32, 8, { 0, 0, SCIF1, SCIF0 } },
+
+        { INT2PRI16, 0, 32, 8, { IIC2_2, 0, 0, 0 } },
+        { INT2PRI17, 0, 32, 8, { PCIE, 0, 0, IIC1_0 } },
+        { INT2PRI18, 0, 32, 8, { IIC3_3, IIC9_1, IIC2_1, IIC1_2 } },
+        { INT2PRI19, 0, 32, 8, { IIC2_3, IIC3_1, 0, IIC1_3 } },
+        { INT2PRI20, 0, 32, 8, { IIC2_0, IIC6_3, IIC7_1, IIC7_2 } },
+        { INT2PRI21, 0, 32, 8, { IIC7_3, IIC8_0, IIC8_1, IIC8_2 } },
+        { INT2PRI22, 0, 32, 8, { IIC9_2, 0, 0, 0 } },
+        { INT2PRI23, 0, 32, 8, { 0, SGPIO, IIC3_2, IIC5_1 } },
+        { INT2PRI24, 0, 32, 8, { 0, 0, 0, IIC1_1 } },
+        { INT2PRI25, 0, 32, 8, { IIC3_0, 0, IIC5_3, IIC5_2 } },
+        { INT2PRI26, 0, 32, 8, { 0, 0, 0, IIC9_3 } },
+        { INT2PRI27, 0, 32, 8, { PCIINTA, IIC6_0, IIC4_0, IIC6_1 } },
+        { INT2PRI28, 0, 32, 8, { IIC4_3, IIC7_0, 0, IIC6_2 } },
+        { INT2PRI29, 0, 32, 8, { 0, 0, IIC9_0, IIC8_3 } },
+        { INT2PRI30, 0, 32, 8, { IIC4_1, IIC4_2, IIC5_0, 0 } },
+        { INT2PRI31, 0, 32, 8, { IIC0_0, IIC0_1, IIC0_2, IIC0_3 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups,
+                         mask_registers, prio_registers, NULL);
+
+/* Support for external interrupt pins in IRQ mode */
+static struct intc_vect vectors_irq0123[] __initdata = {
+        INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
+        INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
+};
+
+static struct intc_vect vectors_irq4567[] __initdata = {
+        INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380),
+        INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200),
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+        { 0xffd0001c, 32, 2, /* ICR1 */   { IRQ0, IRQ1, IRQ2, IRQ3,
+                                            IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_mask_reg ack_registers[] __initdata = {
+        { 0xffd00024, 0, 32, /* INTREQ */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7757-irq0123",
+                             vectors_irq0123, NULL, mask_registers,
+                             prio_registers, sense_registers, ack_registers);
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7757-irq4567",
+                             vectors_irq4567, NULL, mask_registers,
+                             prio_registers, sense_registers, ack_registers);
+
+/* External interrupt pins in IRL mode */
+static struct intc_vect vectors_irl0123[] __initdata = {
+        INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220),
+        INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260),
+        INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0),
+        INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0),
+        INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320),
+        INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360),
+        INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0),
+        INTC_VECT(IRL0_HHHL, 0x3c0),
+};
+
+static struct intc_vect vectors_irl4567[] __initdata = {
+        INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20),
+        INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60),
+        INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0),
+        INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0),
+        INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20),
+        INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60),
+        INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0),
+        INTC_VECT(IRL4_HHHL, 0xcc0),
+};
+
+static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123,
+                         NULL, mask_registers, NULL, NULL);
+
+static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567,
+                         NULL, mask_registers, NULL, NULL);
+
+#define INTC_ICR0       0xffd00000
+#define INTC_INTMSK0    0xffd00044
+#define INTC_INTMSK1    0xffd00048
+#define INTC_INTMSK2    0xffd40080
+#define INTC_INTMSKCLR1 0xffd00068
+#define INTC_INTMSKCLR2 0xffd40084
+
+void __init plat_irq_setup(void)
+{
+        /* disable IRQ3-0 + IRQ7-4 */
+        ctrl_outl(0xff000000, INTC_INTMSK0);
+
+        /* disable IRL3-0 + IRL7-4 */
+        ctrl_outl(0xc0000000, INTC_INTMSK1);
+        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+
+        /* select IRL mode for IRL3-0 + IRL7-4 */
+        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+
+        /* disable holding function, ie enable "SH-4 Mode" */
+        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+
+        register_intc_controller(&intc_desc);
+}
+
+void __init plat_irq_setup_pins(int mode)
+{
+        switch (mode) {
+        case IRQ_MODE_IRQ7654:
+                /* select IRQ mode for IRL7-4 */
+                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                register_intc_controller(&intc_desc_irq4567);
+                break;
+        case IRQ_MODE_IRQ3210:
+                /* select IRQ mode for IRL3-0 */
+                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                register_intc_controller(&intc_desc_irq0123);
+                break;
+        case IRQ_MODE_IRL7654:
+                /* enable IRL7-4 but don't provide any masking */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL3210:
+                /* enable IRL0-3 but don't provide any masking */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL7654_MASK:
+                /* enable IRL7-4 and mask using cpu intc controller */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_desc_irl4567);
+                break;
+        case IRQ_MODE_IRL3210_MASK:
+                /* enable IRL0-3 and mask using cpu intc controller */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_desc_irl0123);
+                break;
+        default:
+                BUG();
+        }
+}
+
+void __init plat_mem_setup(void)
+{
+}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 2c901f446959..12ff56f19c5c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -13,6 +13,7 @@
 #include <linux/io.h>
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
+#include <asm/dma-sh.h>
 
 static struct sh_timer_config tmu0_platform_data = {
         .name = "TMU0",
@@ -240,6 +241,18 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_dmae_pdata dma_platform_data = {
+        .mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),
+};
+
+static struct platform_device dma_device = {
+        .name           = "sh-dma-engine",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &dma_platform_data,
+        },
+};
+
 static struct platform_device *sh7780_devices[] __initdata = {
         &tmu0_device,
         &tmu1_device,
@@ -249,6 +262,7 @@ static struct platform_device *sh7780_devices[] __initdata = {
         &tmu5_device,
         &rtc_device,
         &sci_device,
+        &dma_device,
 };
 
 static int __init sh7780_devices_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 07f078961c71..e848443deeb9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -268,11 +268,7 @@ enum {
         UNUSED = 0,
 
         /* interrupt sources */
-        IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
-        IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
-        IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
-        IRL_HHLL, IRL_HHLH, IRL_HHHL,
-        IRQ0, IRQ1, IRQ2, IRQ3,
+        IRL, IRQ0, IRQ1, IRQ2, IRQ3,
         HUDII,
         TMU0, TMU1, TMU2, TMU3, TMU4, TMU5,
         PCII0, PCII1, PCII2, PCII3, PCII4,
@@ -287,10 +283,7 @@ enum {
         DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, DMAC1_DMINT9,
         DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE,
         IIC, VIN0, VIN1, VCORE0, ATAPI,
-        DTU0_TEND, DTU0_AE, DTU0_TMISS,
-        DTU1_TEND, DTU1_AE, DTU1_TMISS,
-        DTU2_TEND, DTU2_AE, DTU2_TMISS,
-        DTU3_TEND, DTU3_AE, DTU3_TMISS,
+        DTU0, DTU1, DTU2, DTU3,
         FE0, FE1,
         GPIO0, GPIO1, GPIO2, GPIO3,
         PAM, IRM,
@@ -298,8 +291,8 @@ enum {
         INTICI4, INTICI5, INTICI6, INTICI7,
 
         /* interrupt groups */
-        IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
-        DMAC0, DMAC1, DTU0, DTU1, DTU2, DTU3,
+        PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
+        DMAC0, DMAC1,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -332,14 +325,14 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(IIC, 0xae0),
         INTC_VECT(VIN0, 0xb00), INTC_VECT(VIN1, 0xb20),
         INTC_VECT(VCORE0, 0xb00), INTC_VECT(ATAPI, 0xb60),
-        INTC_VECT(DTU0_TEND, 0xc00), INTC_VECT(DTU0_AE, 0xc20),
-        INTC_VECT(DTU0_TMISS, 0xc40),
-        INTC_VECT(DTU1_TEND, 0xc60), INTC_VECT(DTU1_AE, 0xc80),
-        INTC_VECT(DTU1_TMISS, 0xca0),
-        INTC_VECT(DTU2_TEND, 0xcc0), INTC_VECT(DTU2_AE, 0xce0),
-        INTC_VECT(DTU2_TMISS, 0xd00),
-        INTC_VECT(DTU3_TEND, 0xd20), INTC_VECT(DTU3_AE, 0xd40),
-        INTC_VECT(DTU3_TMISS, 0xd60),
+        INTC_VECT(DTU0, 0xc00), INTC_VECT(DTU0, 0xc20),
+        INTC_VECT(DTU0, 0xc40),
+        INTC_VECT(DTU1, 0xc60), INTC_VECT(DTU1, 0xc80),
+        INTC_VECT(DTU1, 0xca0),
+        INTC_VECT(DTU2, 0xcc0), INTC_VECT(DTU2, 0xce0),
+        INTC_VECT(DTU2, 0xd00),
+        INTC_VECT(DTU3, 0xd20), INTC_VECT(DTU3, 0xd40),
+        INTC_VECT(DTU3, 0xd60),
         INTC_VECT(FE0, 0xe00), INTC_VECT(FE1, 0xe20),
         INTC_VECT(GPIO0, 0xe40), INTC_VECT(GPIO1, 0xe60),
         INTC_VECT(GPIO2, 0xe80), INTC_VECT(GPIO3, 0xea0),
@@ -351,10 +344,6 @@ static struct intc_vect vectors[] __initdata = {
 };
 
 static struct intc_group groups[] __initdata = {
-        INTC_GROUP(IRL, IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
-                   IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
-                   IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
-                   IRL_HHLL, IRL_HHLH, IRL_HHHL),
         INTC_GROUP(PCII56789, PCII5, PCII6, PCII7, PCII8, PCII9),
         INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
         INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
@@ -364,10 +353,6 @@ static struct intc_group groups[] __initdata = {
                    DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
         INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,
                    DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11),
-        INTC_GROUP(DTU0, DTU0_TEND, DTU0_AE, DTU0_TMISS),
-        INTC_GROUP(DTU1, DTU1_TEND, DTU1_AE, DTU1_TMISS),
-        INTC_GROUP(DTU2, DTU2_TEND, DTU2_AE, DTU2_TMISS),
-        INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
@@ -434,14 +419,14 @@ static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
 
 /* External interrupt pins in IRL mode */
 static struct intc_vect vectors_irl[] __initdata = {
-        INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
-        INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
-        INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
-        INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
-        INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
-        INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
-        INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
-        INTC_VECT(IRL_HHHL, 0x3c0),
+        INTC_VECT(IRL, 0x200), INTC_VECT(IRL, 0x220),
+        INTC_VECT(IRL, 0x240), INTC_VECT(IRL, 0x260),
+        INTC_VECT(IRL, 0x280), INTC_VECT(IRL, 0x2a0),
+        INTC_VECT(IRL, 0x2c0), INTC_VECT(IRL, 0x2e0),
+        INTC_VECT(IRL, 0x300), INTC_VECT(IRL, 0x320),
+        INTC_VECT(IRL, 0x340), INTC_VECT(IRL, 0x360),
+        INTC_VECT(IRL, 0x380), INTC_VECT(IRL, 0x3a0),
+        INTC_VECT(IRL, 0x3c0),
 };
 
 static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index 2b6b0d50c576..185ec3976a25 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -57,6 +57,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
 {
         int i;
 
+        local_timer_setup(0);
+
         BUILD_BUG_ON(SMP_MSG_NR >= 8);
 
         for (i = 0; i < SMP_MSG_NR; i++)
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 92ad844b5c12..521d05b3f7ba 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -34,6 +34,8 @@ int __init detect_cpu_and_cache_system(void)
                 /* CPU.VCR aliased at CIR address on SH5-101 */
                 boot_cpu_data.type = CPU_SH5_101;
 
+        boot_cpu_data.family = CPU_FAMILY_SH5;
+
         /*
          * First, setup some sane values for the I-cache.
          */
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile
index 08bfa7c7db29..a39f88ea1a85 100644
--- a/arch/sh/kernel/cpu/shmobile/Makefile
+++ b/arch/sh/kernel/cpu/shmobile/Makefile
@@ -4,3 +4,5 @@
 
 # Power Management & Sleep mode
 obj-$(CONFIG_PM)        += pm.o sleep.o
+obj-$(CONFIG_CPU_IDLE)  += cpuidle.o
+obj-$(CONFIG_PM_RUNTIME)        += pm_runtime.o
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c
new file mode 100644
index 000000000000..1c504bd972c3
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c
@@ -0,0 +1,113 @@
+/*
+ * arch/sh/kernel/cpu/shmobile/cpuidle.c
+ *
+ * Cpuidle support code for SuperH Mobile
+ *
+ *  Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/suspend.h>
+#include <linux/cpuidle.h>
+#include <asm/suspend.h>
+#include <asm/uaccess.h>
+#include <asm/hwblk.h>
+
+static unsigned long cpuidle_mode[] = {
+        SUSP_SH_SLEEP, /* regular sleep mode */
+        SUSP_SH_SLEEP | SUSP_SH_SF, /* sleep mode + self refresh */
+        SUSP_SH_STANDBY | SUSP_SH_SF, /* software standby mode + self refresh */
+};
+
+static int cpuidle_sleep_enter(struct cpuidle_device *dev,
+                               struct cpuidle_state *state)
+{
+        unsigned long allowed_mode = arch_hwblk_sleep_mode();
+        ktime_t before, after;
+        int requested_state = state - &dev->states[0];
+        int allowed_state;
+        int k;
+
+        /* convert allowed mode to allowed state */
+        for (k = ARRAY_SIZE(cpuidle_mode) - 1; k > 0; k--)
+                if (cpuidle_mode[k] == allowed_mode)
+                        break;
+
+        allowed_state = k;
+
+        /* take the following into account for sleep mode selection:
+         * - allowed_state: best mode allowed by hardware (clock deps)
+         * - requested_state: best mode allowed by software (latencies)
+         */
+        k = min_t(int, allowed_state, requested_state);
+
+        dev->last_state = &dev->states[k];
+        before = ktime_get();
+        sh_mobile_call_standby(cpuidle_mode[k]);
+        after = ktime_get();
+        return ktime_to_ns(ktime_sub(after, before)) >> 10;
+}
+
+static struct cpuidle_device cpuidle_dev;
+static struct cpuidle_driver cpuidle_driver = {
+        .name =         "sh_idle",
+        .owner =        THIS_MODULE,
+};
+
+void sh_mobile_setup_cpuidle(void)
+{
+        struct cpuidle_device *dev = &cpuidle_dev;
+        struct cpuidle_state *state;
+        int i;
+
+        cpuidle_register_driver(&cpuidle_driver);
+
+        for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
+                dev->states[i].name[0] = '\0';
+                dev->states[i].desc[0] = '\0';
+        }
+
+        i = CPUIDLE_DRIVER_STATE_START;
+
+        state = &dev->states[i++];
+        snprintf(state->name, CPUIDLE_NAME_LEN, "C0");
+        strncpy(state->desc, "SuperH Sleep Mode", CPUIDLE_DESC_LEN);
+        state->exit_latency = 1;
+        state->target_residency = 1 * 2;
+        state->power_usage = 3;
+        state->flags = 0;
+        state->flags |= CPUIDLE_FLAG_SHALLOW;
+        state->flags |= CPUIDLE_FLAG_TIME_VALID;
+        state->enter = cpuidle_sleep_enter;
+
+        dev->safe_state = state;
+
+        state = &dev->states[i++];
+        snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
+        strncpy(state->desc, "SuperH Sleep Mode [SF]", CPUIDLE_DESC_LEN);
+        state->exit_latency = 100;
+        state->target_residency = 1 * 2;
+        state->power_usage = 1;
+        state->flags = 0;
+        state->flags |= CPUIDLE_FLAG_TIME_VALID;
+        state->enter = cpuidle_sleep_enter;
+
+        state = &dev->states[i++];
+        snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
+        strncpy(state->desc, "SuperH Mobile Standby Mode [SF]", CPUIDLE_DESC_LEN);
+        state->exit_latency = 2300;
+        state->target_residency = 1 * 2;
+        state->power_usage = 1;
+        state->flags = 0;
+        state->flags |= CPUIDLE_FLAG_TIME_VALID;
+        state->enter = cpuidle_sleep_enter;
+
+        dev->state_count = i;
+
+        cpuidle_register_device(dev);
+}
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index 8c067adf6830..ee3c2aaf66fb 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -1,5 +1,5 @@
 /*
- * arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c
+ * arch/sh/kernel/cpu/shmobile/pm.c
  *
  * Power management support code for SuperH Mobile
  *
@@ -32,40 +32,20 @@
  *
  * R-standby mode is unsupported, but will be added in the future
  * U-standby mode is low priority since it needs bootloader hacks
- *
- * All modes should be tied in with cpuidle. But before that can
- * happen we need to keep track of enabled hardware blocks so we
- * can avoid entering sleep modes that stop clocks to hardware
- * blocks that are in use even though the cpu core is idle.
  */
 
+#define ILRAM_BASE 0xe5200000
+
 extern const unsigned char sh_mobile_standby[];
 extern const unsigned int sh_mobile_standby_size;
 
-static void sh_mobile_call_standby(unsigned long mode)
+void sh_mobile_call_standby(unsigned long mode)
 {
-        extern void *vbr_base;
-        void *onchip_mem = (void *)0xe5200000; /* ILRAM */
-        void (*standby_onchip_mem)(unsigned long) = onchip_mem;
-
-        /* Note: Wake up from sleep may generate exceptions!
-         * Setup VBR to point to on-chip ram if self-refresh is
-         * going to be used.
-         */
-        if (mode & SUSP_SH_SF)
-                asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory");
-
-        /* Copy the assembly snippet to the otherwise ununsed ILRAM */
-        memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
-        wmb();
-        ctrl_barrier();
+        void *onchip_mem = (void *)ILRAM_BASE;
+        void (*standby_onchip_mem)(unsigned long, unsigned long) = onchip_mem;
 
         /* Let assembly snippet in on-chip memory handle the rest */
-        standby_onchip_mem(mode);
-
-        /* Put VBR back in System RAM again */
-        if (mode & SUSP_SH_SF)
-                asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory");
+        standby_onchip_mem(mode, ILRAM_BASE);
 }
 
 static int sh_pm_enter(suspend_state_t state)
@@ -85,7 +65,15 @@ static struct platform_suspend_ops sh_pm_ops = {
 
 static int __init sh_pm_init(void)
 {
+        void *onchip_mem = (void *)ILRAM_BASE;
+
+        /* Copy the assembly snippet to the otherwise ununsed ILRAM */
+        memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
+        wmb();
+        ctrl_barrier();
+
         suspend_set_ops(&sh_pm_ops);
+        sh_mobile_setup_cpuidle();
         return 0;
 }
 
diff --git a/arch/sh/kernel/cpu/shmobile/pm_runtime.c b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
new file mode 100644
index 000000000000..7c615b17e209
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/pm_runtime.c
@@ -0,0 +1,303 @@
+/*
+ * arch/sh/kernel/cpu/shmobile/pm_runtime.c
+ *
+ * Runtime PM support code for SuperH Mobile
+ *
+ *  Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/pm_runtime.h>
+#include <linux/platform_device.h>
+#include <linux/mutex.h>
+#include <asm/hwblk.h>
+
+static DEFINE_SPINLOCK(hwblk_lock);
+static LIST_HEAD(hwblk_idle_list);
+static struct work_struct hwblk_work;
+
+extern struct hwblk_info *hwblk_info;
+
+static void platform_pm_runtime_not_idle(struct platform_device *pdev)
+{
+        unsigned long flags;
+
+        /* remove device from idle list */
+        spin_lock_irqsave(&hwblk_lock, flags);
+        if (test_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags)) {
+                list_del(&pdev->archdata.entry);
+                __clear_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags);
+        }
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+}
+
+static int __platform_pm_runtime_resume(struct platform_device *pdev)
+{
+        struct device *d = &pdev->dev;
+        struct pdev_archdata *ad = &pdev->archdata;
+        int hwblk = ad->hwblk_id;
+        int ret = -ENOSYS;
+
+        dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk);
+
+        if (d->driver && d->driver->pm && d->driver->pm->runtime_resume) {
+                hwblk_enable(hwblk_info, hwblk);
+                ret = 0;
+
+                if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) {
+                        ret = d->driver->pm->runtime_resume(d);
+                        if (!ret)
+                                clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
+                        else
+                                hwblk_disable(hwblk_info, hwblk);
+                }
+        }
+
+        dev_dbg(d, "__platform_pm_runtime_resume() [%d] - returns %d\n",
+                hwblk, ret);
+
+        return ret;
+}
+
+static int __platform_pm_runtime_suspend(struct platform_device *pdev)
+{
+        struct device *d = &pdev->dev;
+        struct pdev_archdata *ad = &pdev->archdata;
+        int hwblk = ad->hwblk_id;
+        int ret = -ENOSYS;
+
+        dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk);
+
+        if (d->driver && d->driver->pm && d->driver->pm->runtime_suspend) {
+                BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags));
+
+                hwblk_enable(hwblk_info, hwblk);
+                ret = d->driver->pm->runtime_suspend(d);
+                hwblk_disable(hwblk_info, hwblk);
+
+                if (!ret) {
+                        set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
+                        platform_pm_runtime_not_idle(pdev);
+                        hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
+                }
+        }
+
+        dev_dbg(d, "__platform_pm_runtime_suspend() [%d] - returns %d\n",
+                hwblk, ret);
+
+        return ret;
+}
+
+static void platform_pm_runtime_work(struct work_struct *work)
+{
+        struct platform_device *pdev;
+        unsigned long flags;
+        int ret;
+
+        /* go through the idle list and suspend one device at a time */
+        do {
+                spin_lock_irqsave(&hwblk_lock, flags);
+                if (list_empty(&hwblk_idle_list))
+                        pdev = NULL;
+                else
+                        pdev = list_first_entry(&hwblk_idle_list,
+                                                struct platform_device,
+                                                archdata.entry);
+                spin_unlock_irqrestore(&hwblk_lock, flags);
+
+                if (pdev) {
+                        mutex_lock(&pdev->archdata.mutex);
+                        ret = __platform_pm_runtime_suspend(pdev);
+
+                        /* at this point the platform device may be:
+                         * suspended: ret = 0, FLAG_SUSP set, clock stopped
+                         * failed: ret < 0, FLAG_IDLE set, clock stopped
+                         */
+                        mutex_unlock(&pdev->archdata.mutex);
+                } else {
+                        ret = -ENODEV;
+                }
+        } while (!ret);
+}
+
+/* this function gets called from cpuidle context when all devices in the
+ * main power domain are unused but some are counted as idle, ie the hwblk
+ * counter values are (HWBLK_CNT_USAGE == 0) && (HWBLK_CNT_IDLE != 0)
+ */
+void platform_pm_runtime_suspend_idle(void)
+{
+        queue_work(pm_wq, &hwblk_work);
+}
+
+int platform_pm_runtime_suspend(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct pdev_archdata *ad = &pdev->archdata;
+        unsigned long flags;
+        int hwblk = ad->hwblk_id;
+        int ret = 0;
+
+        dev_dbg(dev, "platform_pm_runtime_suspend() [%d]\n", hwblk);
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                goto out;
+
+        /* interrupt context not allowed */
+        might_sleep();
+
+        /* catch misconfigured drivers not starting with resume */
+        if (test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags)) {
+                ret = -EINVAL;
+                goto out;
+        }
+
+        /* serialize */
+        mutex_lock(&ad->mutex);
+
+        /* disable clock */
+        hwblk_disable(hwblk_info, hwblk);
+
+        /* put device on idle list */
+        spin_lock_irqsave(&hwblk_lock, flags);
+        list_add_tail(&pdev->archdata.entry, &hwblk_idle_list);
+        __set_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags);
+        spin_unlock_irqrestore(&hwblk_lock, flags);
+
+        /* increase idle count */
+        hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_IDLE);
+
+        /* at this point the platform device is:
+         * idle: ret = 0, FLAG_IDLE set, clock stopped
+         */
+        mutex_unlock(&ad->mutex);
+
+out:
+        dev_dbg(dev, "platform_pm_runtime_suspend() [%d] returns %d\n",
+                hwblk, ret);
+
+        return ret;
+}
+
+int platform_pm_runtime_resume(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct pdev_archdata *ad = &pdev->archdata;
+        int hwblk = ad->hwblk_id;
+        int ret = 0;
+
+        dev_dbg(dev, "platform_pm_runtime_resume() [%d]\n", hwblk);
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                goto out;
+
+        /* interrupt context not allowed */
+        might_sleep();
+
+        /* serialize */
+        mutex_lock(&ad->mutex);
+
+        /* make sure device is removed from idle list */
+        platform_pm_runtime_not_idle(pdev);
+
+        /* decrease idle count */
+        if (!test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags) &&
+            !test_bit(PDEV_ARCHDATA_FLAG_SUSP, &pdev->archdata.flags))
+                hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
+
+        /* resume the device if needed */
+        ret = __platform_pm_runtime_resume(pdev);
+
+        /* the driver has been initialized now, so clear the init flag */
+        clear_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
+
+        /* at this point the platform device may be:
+         * resumed: ret = 0, flags = 0, clock started
+         * failed: ret < 0, FLAG_SUSP set, clock stopped
+         */
+        mutex_unlock(&ad->mutex);
+out:
+        dev_dbg(dev, "platform_pm_runtime_resume() [%d] returns %d\n",
+                hwblk, ret);
+
+        return ret;
+}
+
+int platform_pm_runtime_idle(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        int hwblk = pdev->archdata.hwblk_id;
+        int ret = 0;
+
+        dev_dbg(dev, "platform_pm_runtime_idle() [%d]\n", hwblk);
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                goto out;
+
+        /* interrupt context not allowed, use pm_runtime_put()! */
+        might_sleep();
+
+        /* suspend synchronously to disable clocks immediately */
+        ret = pm_runtime_suspend(dev);
+out:
+        dev_dbg(dev, "platform_pm_runtime_idle() [%d] done!\n", hwblk);
+        return ret;
+}
+
+static int platform_bus_notify(struct notifier_block *nb,
+                               unsigned long action, void *data)
+{
+        struct device *dev = data;
+        struct platform_device *pdev = to_platform_device(dev);
+        int hwblk = pdev->archdata.hwblk_id;
+
+        /* ignore off-chip platform devices */
+        if (!hwblk)
+                return 0;
+
+        switch (action) {
+        case BUS_NOTIFY_ADD_DEVICE:
+                INIT_LIST_HEAD(&pdev->archdata.entry);
+                mutex_init(&pdev->archdata.mutex);
+                /* platform devices without drivers should be disabled */
+                hwblk_enable(hwblk_info, hwblk);
+                hwblk_disable(hwblk_info, hwblk);
+                /* make sure driver re-inits itself once */
+                __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
+                break;
+        /* TODO: add BUS_NOTIFY_BIND_DRIVER and increase idle count */
+        case BUS_NOTIFY_BOUND_DRIVER:
+                /* keep track of number of devices in use per hwblk */
+                hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
+                break;
+        case BUS_NOTIFY_UNBOUND_DRIVER:
+                /* keep track of number of devices in use per hwblk */
+                hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
+                /* make sure driver re-inits itself once */
+                __set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
+                break;
+        case BUS_NOTIFY_DEL_DEVICE:
+                break;
+        }
+        return 0;
+}
+
+static struct notifier_block platform_bus_notifier = {
+        .notifier_call = platform_bus_notify
+};
+
+static int __init sh_pm_runtime_init(void)
+{
+        INIT_WORK(&hwblk_work, platform_pm_runtime_work);
+
+        bus_register_notifier(&platform_bus_type, &platform_bus_notifier);
+        return 0;
+}
+core_initcall(sh_pm_runtime_init);
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S
index baf2d7d46b05..a439e6c7824f 100644
--- a/arch/sh/kernel/cpu/shmobile/sleep.S
+++ b/arch/sh/kernel/cpu/shmobile/sleep.S
@@ -16,19 +16,52 @@
 #include <asm/asm-offsets.h>
 #include <asm/suspend.h>
 
+/*
+ * Kernel mode register usage, see entry.S:
+ *      k0      scratch
+ *      k1      scratch
+ *      k4      scratch
+ */
+#define k0      r0
+#define k1      r1
+#define k4      r4
+
 /* manage self-refresh and enter standby mode.
  * this code will be copied to on-chip memory and executed from there.
  */
 
         .balign         4096,0,4096
 ENTRY(sh_mobile_standby)
+
+        /* save original vbr */
+        stc     vbr, r1
+        mova    saved_vbr, r0
+        mov.l   r1, @r0
+
+        /* point vbr to our on-chip memory page */
+        ldc     r5, vbr
+
+        /* save return address */
+        mova    saved_spc, r0
+        sts     pr, r5
+        mov.l   r5, @r0
+
+        /* save sr */
+        mova    saved_sr, r0
+        stc     sr, r5
+        mov.l   r5, @r0
+
+        /* save mode flags */
+        mova    saved_mode, r0
+        mov.l   r4, @r0
+
+        /* put mode flags in r0 */
         mov     r4, r0
 
         tst     #SUSP_SH_SF, r0
         bt      skip_set_sf
 #ifdef CONFIG_CPU_SUBTYPE_SH7724
         /* DBSC: put memory in self-refresh mode */
-
         mov.l   dben_reg, r4
         mov.l   dben_data0, r1
         mov.l   r1, @r4
@@ -60,14 +93,6 @@ ENTRY(sh_mobile_standby)
 #endif
 
 skip_set_sf:
-        tst     #SUSP_SH_SLEEP, r0
-        bt      test_standby
-
-        /* set mode to "sleep mode" */
-        bra     do_sleep
-         mov    #0x00, r1
-
-test_standby:
         tst     #SUSP_SH_STANDBY, r0
         bt      test_rstandby
 
@@ -85,77 +110,107 @@ test_rstandby:
 
 test_ustandby:
         tst     #SUSP_SH_USTANDBY, r0
-        bt      done_sleep
+        bt      force_sleep
 
         /* set mode to "u-standby mode" */
-        mov     #0x10, r1
+        bra     do_sleep
+         mov    #0x10, r1
 
-        /* fall-through */
+force_sleep:
+
+        /* set mode to "sleep mode" */
+        mov     #0x00, r1
 
 do_sleep:
         /* setup and enter selected standby mode */
         mov.l   5f, r4
         mov.l   r1, @r4
+again:
         sleep
+        bra     again
+         nop
+
+restore_jump_vbr:
+        /* setup spc with return address to c code */
+        mov.l   saved_spc, k0
+        ldc     k0, spc
+
+        /* restore vbr */
+        mov.l   saved_vbr, k0
+        ldc     k0, vbr
+
+        /* setup ssr with saved sr */
+        mov.l   saved_sr, k0
+        ldc     k0, ssr
+
+        /* get mode flags */
+        mov.l   saved_mode, k0
 
 done_sleep:
         /* reset standby mode to sleep mode */
-        mov.l   5f, r4
-        mov     #0x00, r1
-        mov.l   r1, @r4
+        mov.l   5f, k4
+        mov     #0x00, k1
+        mov.l   k1, @k4
 
-        tst     #SUSP_SH_SF, r0
+        tst     #SUSP_SH_SF, k0
         bt      skip_restore_sf
 
 #ifdef CONFIG_CPU_SUBTYPE_SH7724
         /* DBSC: put memory in auto-refresh mode */
+        mov.l   dbrfpdn0_reg, k4
+        mov.l   dbrfpdn0_data0, k1
+        mov.l   k1, @k4
 
-        mov.l   dbrfpdn0_reg, r4
-        mov.l   dbrfpdn0_data0, r1
-        mov.l   r1, @r4
-
-        /* sleep 140 ns */
-        nop
+        nop /* sleep 140 ns */
         nop
         nop
         nop
 
-        mov.l   dbcmdcnt_reg, r4
-        mov.l   dbcmdcnt_data0, r1
-        mov.l   r1, @r4
+        mov.l   dbcmdcnt_reg, k4
+        mov.l   dbcmdcnt_data0, k1
+        mov.l   k1, @k4
 
-        mov.l   dbcmdcnt_reg, r4
-        mov.l   dbcmdcnt_data1, r1
-        mov.l   r1, @r4
+        mov.l   dbcmdcnt_reg, k4
+        mov.l   dbcmdcnt_data1, k1
+        mov.l   k1, @k4
 
-        mov.l   dben_reg, r4
-        mov.l   dben_data1, r1
-        mov.l   r1, @r4
+        mov.l   dben_reg, k4
+        mov.l   dben_data1, k1
+        mov.l   k1, @k4
 
-        mov.l   dbrfpdn0_reg, r4
-        mov.l   dbrfpdn0_data2, r1
-        mov.l   r1, @r4
+        mov.l   dbrfpdn0_reg, k4
+        mov.l   dbrfpdn0_data2, k1
+        mov.l   k1, @k4
 #else
         /* SBSC: set auto-refresh mode */
-        mov.l   1f, r4
-        mov.l   @r4, r2
-        mov.l   4f, r3
-        and     r3, r2
-        mov.l   r2, @r4
-        mov.l   6f, r4
-        mov.l   7f, r1
-        mov.l   8f, r2
-        mov.l   @r4, r3
-        mov     #-1, r4
-        add     r4, r3
-        or      r2, r3
-        mov.l   r3, @r1
+        mov.l   1f, k4
+        mov.l   @k4, k0
+        mov.l   4f, k1
+        and     k1, k0
+        mov.l   k0, @k4
+        mov.l   6f, k4
+        mov.l   8f, k0
+        mov.l   @k4, k1
+        mov     #-1, k4
+        add     k4, k1
+        or      k1, k0
+        mov.l   7f, k1
+        mov.l   k0, @k1
 #endif
 skip_restore_sf:
-        rts
+        /* jump to vbr vector */
+        mov.l   saved_vbr, k0
+        mov.l   offset_vbr, k4
+        add     k4, k0
+        jmp     @k0
          nop
 
         .balign 4
+saved_mode:     .long   0
+saved_spc:      .long   0
+saved_sr:       .long   0
+saved_vbr:      .long   0
+offset_vbr:     .long   0x600
 #ifdef CONFIG_CPU_SUBTYPE_SH7724
 dben_reg:       .long   0xfd000010 /* DBEN */
 dben_data0:     .long   0
@@ -178,12 +233,12 @@ dbcmdcnt_data1:	.long	4
 7:      .long   0xfe400018 /* RTCNT */
 8:      .long   0xa55a0000
 
+
 /* interrupt vector @ 0x600 */
         .balign         0x400,0,0x400
         .long   0xdeadbeef
         .balign         0x200,0,0x200
-        /* sh7722 will end up here in sleep mode */
-        rte
+        bra     restore_jump_vbr
          nop
 sh_mobile_standby_end:
 
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index e0590ffebd73..dce4f3ff0932 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -82,7 +82,8 @@ static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         cpuclk = clk_get(NULL, "cpu_clk");
         if (IS_ERR(cpuclk)) {
-                printk(KERN_ERR "cpufreq: couldn't get CPU clk\n");
+                printk(KERN_ERR "cpufreq: couldn't get CPU#%d clk\n",
+                       policy->cpu);
                 return PTR_ERR(cpuclk);
         }
 
@@ -95,22 +96,21 @@ static int sh_cpufreq_cpu_init(struct cpufreq_policy *policy)
         policy->min             = policy->cpuinfo.min_freq;
         policy->max             = policy->cpuinfo.max_freq;
 
-
         /*
          * Catch the cases where the clock framework hasn't been wired up
          * properly to support scaling.
          */
         if (unlikely(policy->min == policy->max)) {
                 printk(KERN_ERR "cpufreq: clock framework rate rounding "
-                       "not supported on this CPU.\n");
+                       "not supported on CPU#%d.\n", policy->cpu);
 
                 clk_put(cpuclk);
                 return -EINVAL;
         }
 
-        printk(KERN_INFO "cpufreq: Frequencies - Minimum %u.%03u MHz, "
+        printk(KERN_INFO "cpufreq: CPU#%d Frequencies - Minimum %u.%03u MHz, "
                "Maximum %u.%03u MHz.\n",
-               policy->min / 1000, policy->min % 1000,
+               policy->cpu, policy->min / 1000, policy->min % 1000,
                policy->max / 1000, policy->max % 1000);
 
         return 0;
diff --git a/arch/sh/kernel/dumpstack.c b/arch/sh/kernel/dumpstack.c
new file mode 100644
index 000000000000..6f5ad1513409
--- /dev/null
+++ b/arch/sh/kernel/dumpstack.c
@@ -0,0 +1,123 @@
+/*
+ *  Copyright (C) 1991, 1992  Linus Torvalds
+ *  Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
+ *  Copyright (C) 2009  Matt Fleming
+ */
+#include <linux/kallsyms.h>
+#include <linux/ftrace.h>
+#include <linux/debug_locks.h>
+#include <asm/unwinder.h>
+#include <asm/stacktrace.h>
+
+void printk_address(unsigned long address, int reliable)
+{
+        printk(" [<%p>] %s%pS\n", (void *) address,
+                        reliable ? "" : "? ", (void *) address);
+}
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+static void
+print_ftrace_graph_addr(unsigned long addr, void *data,
+                        const struct stacktrace_ops *ops,
+                        struct thread_info *tinfo, int *graph)
+{
+        struct task_struct *task = tinfo->task;
+        unsigned long ret_addr;
+        int index = task->curr_ret_stack;
+
+        if (addr != (unsigned long)return_to_handler)
+                return;
+
+        if (!task->ret_stack || index < *graph)
+                return;
+
+        index -= *graph;
+        ret_addr = task->ret_stack[index].ret;
+
+        ops->address(data, ret_addr, 1);
+
+        (*graph)++;
+}
+#else
+static inline void
+print_ftrace_graph_addr(unsigned long addr, void *data,
+                        const struct stacktrace_ops *ops,
+                        struct thread_info *tinfo, int *graph)
+{ }
+#endif
+
+void
+stack_reader_dump(struct task_struct *task, struct pt_regs *regs,
+                  unsigned long *sp, const struct stacktrace_ops *ops,
+                  void *data)
+{
+        struct thread_info *context;
+        int graph = 0;
+
+        context = (struct thread_info *)
+                ((unsigned long)sp & (~(THREAD_SIZE - 1)));
+
+        while (!kstack_end(sp)) {
+                unsigned long addr = *sp++;
+
+                if (__kernel_text_address(addr)) {
+                        ops->address(data, addr, 1);
+
+                        print_ftrace_graph_addr(addr, data, ops,
+                                                context, &graph);
+                }
+        }
+}
+
+static void
+print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
+{
+        printk(data);
+        print_symbol(msg, symbol);
+        printk("\n");
+}
+
+static void print_trace_warning(void *data, char *msg)
+{
+        printk("%s%s\n", (char *)data, msg);
+}
+
+static int print_trace_stack(void *data, char *name)
+{
+        printk("%s <%s> ", (char *)data, name);
+        return 0;
+}
+
+/*
+ * Print one address/symbol entries per line.
+ */
+static void print_trace_address(void *data, unsigned long addr, int reliable)
+{
+        printk(data);
+        printk_address(addr, reliable);
+}
+
+static const struct stacktrace_ops print_trace_ops = {
+        .warning = print_trace_warning,
+        .warning_symbol = print_trace_warning_symbol,
+        .stack = print_trace_stack,
+        .address = print_trace_address,
+};
+
+void show_trace(struct task_struct *tsk, unsigned long *sp,
+                struct pt_regs *regs)
+{
+        if (regs && user_mode(regs))
+                return;
+
+        printk("\nCall trace:\n");
+
+        unwind_stack(tsk, regs, sp, &print_trace_ops, "");
+
+        printk("\n");
+
+        if (!tsk)
+                tsk = current;
+
+        debug_show_held_locks(tsk);
+}
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
new file mode 100644
index 000000000000..03b3616c80a5
--- /dev/null
+++ b/arch/sh/kernel/dwarf.c
@@ -0,0 +1,971 @@
+/*
+ * Copyright (C) 2009 Matt Fleming <matt@console-pimps.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * This is an implementation of a DWARF unwinder. Its main purpose is
+ * for generating stacktrace information. Based on the DWARF 3
+ * specification from http://www.dwarfstd.org.
+ *
+ * TODO:
+ *      - DWARF64 doesn't work.
+ *      - Registers with DWARF_VAL_OFFSET rules aren't handled properly.
+ */
+
+/* #define DEBUG */
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/list.h>
+#include <linux/mempool.h>
+#include <linux/mm.h>
+#include <asm/dwarf.h>
+#include <asm/unwinder.h>
+#include <asm/sections.h>
+#include <asm/unaligned.h>
+#include <asm/stacktrace.h>
+
+/* Reserve enough memory for two stack frames */
+#define DWARF_FRAME_MIN_REQ     2
+/* ... with 4 registers per frame. */
+#define DWARF_REG_MIN_REQ       (DWARF_FRAME_MIN_REQ * 4)
+
+static struct kmem_cache *dwarf_frame_cachep;
+static mempool_t *dwarf_frame_pool;
+
+static struct kmem_cache *dwarf_reg_cachep;
+static mempool_t *dwarf_reg_pool;
+
+static LIST_HEAD(dwarf_cie_list);
+static DEFINE_SPINLOCK(dwarf_cie_lock);
+
+static LIST_HEAD(dwarf_fde_list);
+static DEFINE_SPINLOCK(dwarf_fde_lock);
+
+static struct dwarf_cie *cached_cie;
+
+/**
+ *      dwarf_frame_alloc_reg - allocate memory for a DWARF register
+ *      @frame: the DWARF frame whose list of registers we insert on
+ *      @reg_num: the register number
+ *
+ *      Allocate space for, and initialise, a dwarf reg from
+ *      dwarf_reg_pool and insert it onto the (unsorted) linked-list of
+ *      dwarf registers for @frame.
+ *
+ *      Return the initialised DWARF reg.
+ */
+static struct dwarf_reg *dwarf_frame_alloc_reg(struct dwarf_frame *frame,
+                                               unsigned int reg_num)
+{
+        struct dwarf_reg *reg;
+
+        reg = mempool_alloc(dwarf_reg_pool, GFP_ATOMIC);
+        if (!reg) {
+                printk(KERN_WARNING "Unable to allocate a DWARF register\n");
+                /*
+                 * Let's just bomb hard here, we have no way to
+                 * gracefully recover.
+                 */
+                UNWINDER_BUG();
+        }
+
+        reg->number = reg_num;
+        reg->addr = 0;
+        reg->flags = 0;
+
+        list_add(&reg->link, &frame->reg_list);
+
+        return reg;
+}
+
+static void dwarf_frame_free_regs(struct dwarf_frame *frame)
+{
+        struct dwarf_reg *reg, *n;
+
+        list_for_each_entry_safe(reg, n, &frame->reg_list, link) {
+                list_del(&reg->link);
+                mempool_free(reg, dwarf_reg_pool);
+        }
+}
+
+/**
+ *      dwarf_frame_reg - return a DWARF register
+ *      @frame: the DWARF frame to search in for @reg_num
+ *      @reg_num: the register number to search for
+ *
+ *      Lookup and return the dwarf reg @reg_num for this frame. Return
+ *      NULL if @reg_num is an register invalid number.
+ */
+static struct dwarf_reg *dwarf_frame_reg(struct dwarf_frame *frame,
+                                         unsigned int reg_num)
+{
+        struct dwarf_reg *reg;
+
+        list_for_each_entry(reg, &frame->reg_list, link) {
+                if (reg->number == reg_num)
+                        return reg;
+        }
+
+        return NULL;
+}
+
+/**
+ *      dwarf_read_addr - read dwarf data
+ *      @src: source address of data
+ *      @dst: destination address to store the data to
+ *
+ *      Read 'n' bytes from @src, where 'n' is the size of an address on
+ *      the native machine. We return the number of bytes read, which
+ *      should always be 'n'. We also have to be careful when reading
+ *      from @src and writing to @dst, because they can be arbitrarily
+ *      aligned. Return 'n' - the number of bytes read.
+ */
+static inline int dwarf_read_addr(unsigned long *src, unsigned long *dst)
+{
+        u32 val = get_unaligned(src);
+        put_unaligned(val, dst);
+        return sizeof(unsigned long *);
+}
+
+/**
+ *      dwarf_read_uleb128 - read unsigned LEB128 data
+ *      @addr: the address where the ULEB128 data is stored
+ *      @ret: address to store the result
+ *
+ *      Decode an unsigned LEB128 encoded datum. The algorithm is taken
+ *      from Appendix C of the DWARF 3 spec. For information on the
+ *      encodings refer to section "7.6 - Variable Length Data". Return
+ *      the number of bytes read.
+ */
+static inline unsigned long dwarf_read_uleb128(char *addr, unsigned int *ret)
+{
+        unsigned int result;
+        unsigned char byte;
+        int shift, count;
+
+        result = 0;
+        shift = 0;
+        count = 0;
+
+        while (1) {
+                byte = __raw_readb(addr);
+                addr++;
+                count++;
+
+                result |= (byte & 0x7f) << shift;
+                shift += 7;
+
+                if (!(byte & 0x80))
+                        break;
+        }
+
+        *ret = result;
+
+        return count;
+}
+
+/**
+ *      dwarf_read_leb128 - read signed LEB128 data
+ *      @addr: the address of the LEB128 encoded data
+ *      @ret: address to store the result
+ *
+ *      Decode signed LEB128 data. The algorithm is taken from Appendix
+ *      C of the DWARF 3 spec. Return the number of bytes read.
+ */
+static inline unsigned long dwarf_read_leb128(char *addr, int *ret)
+{
+        unsigned char byte;
+        int result, shift;
+        int num_bits;
+        int count;
+
+        result = 0;
+        shift = 0;
+        count = 0;
+
+        while (1) {
+                byte = __raw_readb(addr);
+                addr++;
+                result |= (byte & 0x7f) << shift;
+                shift += 7;
+                count++;
+
+                if (!(byte & 0x80))
+                        break;
+        }
+
+        /* The number of bits in a signed integer. */
+        num_bits = 8 * sizeof(result);
+
+        if ((shift < num_bits) && (byte & 0x40))
+                result |= (-1 << shift);
+
+        *ret = result;
+
+        return count;
+}
+
+/**
+ *      dwarf_read_encoded_value - return the decoded value at @addr
+ *      @addr: the address of the encoded value
+ *      @val: where to write the decoded value
+ *      @encoding: the encoding with which we can decode @addr
+ *
+ *      GCC emits encoded address in the .eh_frame FDE entries. Decode
+ *      the value at @addr using @encoding. The decoded value is written
+ *      to @val and the number of bytes read is returned.
+ */
+static int dwarf_read_encoded_value(char *addr, unsigned long *val,
+                                    char encoding)
+{
+        unsigned long decoded_addr = 0;
+        int count = 0;
+
+        switch (encoding & 0x70) {
+        case DW_EH_PE_absptr:
+                break;
+        case DW_EH_PE_pcrel:
+                decoded_addr = (unsigned long)addr;
+                break;
+        default:
+                pr_debug("encoding=0x%x\n", (encoding & 0x70));
+                UNWINDER_BUG();
+        }
+
+        if ((encoding & 0x07) == 0x00)
+                encoding |= DW_EH_PE_udata4;
+
+        switch (encoding & 0x0f) {
+        case DW_EH_PE_sdata4:
+        case DW_EH_PE_udata4:
+                count += 4;
+                decoded_addr += get_unaligned((u32 *)addr);
+                __raw_writel(decoded_addr, val);
+                break;
+        default:
+                pr_debug("encoding=0x%x\n", encoding);
+                UNWINDER_BUG();
+        }
+
+        return count;
+}
+
+/**
+ *      dwarf_entry_len - return the length of an FDE or CIE
+ *      @addr: the address of the entry
+ *      @len: the length of the entry
+ *
+ *      Read the initial_length field of the entry and store the size of
+ *      the entry in @len. We return the number of bytes read. Return a
+ *      count of 0 on error.
+ */
+static inline int dwarf_entry_len(char *addr, unsigned long *len)
+{
+        u32 initial_len;
+        int count;
+
+        initial_len = get_unaligned((u32 *)addr);
+        count = 4;
+
+        /*
+         * An initial length field value in the range DW_LEN_EXT_LO -
+         * DW_LEN_EXT_HI indicates an extension, and should not be
+         * interpreted as a length. The only extension that we currently
+         * understand is the use of DWARF64 addresses.
+         */
+        if (initial_len >= DW_EXT_LO && initial_len <= DW_EXT_HI) {
+                /*
+                 * The 64-bit length field immediately follows the
+                 * compulsory 32-bit length field.
+                 */
+                if (initial_len == DW_EXT_DWARF64) {
+                        *len = get_unaligned((u64 *)addr + 4);
+                        count = 12;
+                } else {
+                        printk(KERN_WARNING "Unknown DWARF extension\n");
+                        count = 0;
+                }
+        } else
+                *len = initial_len;
+
+        return count;
+}
+
+/**
+ *      dwarf_lookup_cie - locate the cie
+ *      @cie_ptr: pointer to help with lookup
+ */
+static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
+{
+        struct dwarf_cie *cie;
+        unsigned long flags;
+
+        spin_lock_irqsave(&dwarf_cie_lock, flags);
+
+        /*
+         * We've cached the last CIE we looked up because chances are
+         * that the FDE wants this CIE.
+         */
+        if (cached_cie && cached_cie->cie_pointer == cie_ptr) {
+                cie = cached_cie;
+                goto out;
+        }
+
+        list_for_each_entry(cie, &dwarf_cie_list, link) {
+                if (cie->cie_pointer == cie_ptr) {
+                        cached_cie = cie;
+                        break;
+                }
+        }
+
+        /* Couldn't find the entry in the list. */
+        if (&cie->link == &dwarf_cie_list)
+                cie = NULL;
+out:
+        spin_unlock_irqrestore(&dwarf_cie_lock, flags);
+        return cie;
+}
+
+/**
+ *      dwarf_lookup_fde - locate the FDE that covers pc
+ *      @pc: the program counter
+ */
+struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
+{
+        struct dwarf_fde *fde;
+        unsigned long flags;
+
+        spin_lock_irqsave(&dwarf_fde_lock, flags);
+
+        list_for_each_entry(fde, &dwarf_fde_list, link) {
+                unsigned long start, end;
+
+                start = fde->initial_location;
+                end = fde->initial_location + fde->address_range;
+
+                if (pc >= start && pc < end)
+                        break;
+        }
+
+        /* Couldn't find the entry in the list. */
+        if (&fde->link == &dwarf_fde_list)
+                fde = NULL;
+
+        spin_unlock_irqrestore(&dwarf_fde_lock, flags);
+
+        return fde;
+}
+
+/**
+ *      dwarf_cfa_execute_insns - execute instructions to calculate a CFA
+ *      @insn_start: address of the first instruction
+ *      @insn_end: address of the last instruction
+ *      @cie: the CIE for this function
+ *      @fde: the FDE for this function
+ *      @frame: the instructions calculate the CFA for this frame
+ *      @pc: the program counter of the address we're interested in
+ *
+ *      Execute the Call Frame instruction sequence starting at
+ *      @insn_start and ending at @insn_end. The instructions describe
+ *      how to calculate the Canonical Frame Address of a stackframe.
+ *      Store the results in @frame.
+ */
+static int dwarf_cfa_execute_insns(unsigned char *insn_start,
+                                   unsigned char *insn_end,
+                                   struct dwarf_cie *cie,
+                                   struct dwarf_fde *fde,
+                                   struct dwarf_frame *frame,
+                                   unsigned long pc)
+{
+        unsigned char insn;
+        unsigned char *current_insn;
+        unsigned int count, delta, reg, expr_len, offset;
+        struct dwarf_reg *regp;
+
+        current_insn = insn_start;
+
+        while (current_insn < insn_end && frame->pc <= pc) {
+                insn = __raw_readb(current_insn++);
+
+                /*
+                 * Firstly, handle the opcodes that embed their operands
+                 * in the instructions.
+                 */
+                switch (DW_CFA_opcode(insn)) {
+                case DW_CFA_advance_loc:
+                        delta = DW_CFA_operand(insn);
+                        delta *= cie->code_alignment_factor;
+                        frame->pc += delta;
+                        continue;
+                        /* NOTREACHED */
+                case DW_CFA_offset:
+                        reg = DW_CFA_operand(insn);
+                        count = dwarf_read_uleb128(current_insn, &offset);
+                        current_insn += count;
+                        offset *= cie->data_alignment_factor;
+                        regp = dwarf_frame_alloc_reg(frame, reg);
+                        regp->addr = offset;
+                        regp->flags |= DWARF_REG_OFFSET;
+                        continue;
+                        /* NOTREACHED */
+                case DW_CFA_restore:
+                        reg = DW_CFA_operand(insn);
+                        continue;
+                        /* NOTREACHED */
+                }
+
+                /*
+                 * Secondly, handle the opcodes that don't embed their
+                 * operands in the instruction.
+                 */
+                switch (insn) {
+                case DW_CFA_nop:
+                        continue;
+                case DW_CFA_advance_loc1:
+                        delta = *current_insn++;
+                        frame->pc += delta * cie->code_alignment_factor;
+                        break;
+                case DW_CFA_advance_loc2:
+                        delta = get_unaligned((u16 *)current_insn);
+                        current_insn += 2;
+                        frame->pc += delta * cie->code_alignment_factor;
+                        break;
+                case DW_CFA_advance_loc4:
+                        delta = get_unaligned((u32 *)current_insn);
+                        current_insn += 4;
+                        frame->pc += delta * cie->code_alignment_factor;
+                        break;
+                case DW_CFA_offset_extended:
+                        count = dwarf_read_uleb128(current_insn, &reg);
+                        current_insn += count;
+                        count = dwarf_read_uleb128(current_insn, &offset);
+                        current_insn += count;
+                        offset *= cie->data_alignment_factor;
+                        break;
+                case DW_CFA_restore_extended:
+                        count = dwarf_read_uleb128(current_insn, &reg);
+                        current_insn += count;
+                        break;
+                case DW_CFA_undefined:
+                        count = dwarf_read_uleb128(current_insn, &reg);
+                        current_insn += count;
+                        regp = dwarf_frame_alloc_reg(frame, reg);
+                        regp->flags |= DWARF_UNDEFINED;
+                        break;
+                case DW_CFA_def_cfa:
+                        count = dwarf_read_uleb128(current_insn,
+                                                   &frame->cfa_register);
+                        current_insn += count;
+                        count = dwarf_read_uleb128(current_insn,
+                                                   &frame->cfa_offset);
+                        current_insn += count;
+
+                        frame->flags |= DWARF_FRAME_CFA_REG_OFFSET;
+                        break;
+                case DW_CFA_def_cfa_register:
+                        count = dwarf_read_uleb128(current_insn,
+                                                   &frame->cfa_register);
+                        current_insn += count;
+                        frame->flags |= DWARF_FRAME_CFA_REG_OFFSET;
+                        break;
+                case DW_CFA_def_cfa_offset:
+                        count = dwarf_read_uleb128(current_insn, &offset);
+                        current_insn += count;
+                        frame->cfa_offset = offset;
+                        break;
+                case DW_CFA_def_cfa_expression:
+                        count = dwarf_read_uleb128(current_insn, &expr_len);
+                        current_insn += count;
+
+                        frame->cfa_expr = current_insn;
+                        frame->cfa_expr_len = expr_len;
+                        current_insn += expr_len;
+
+                        frame->flags |= DWARF_FRAME_CFA_REG_EXP;
+                        break;
+                case DW_CFA_offset_extended_sf:
+                        count = dwarf_read_uleb128(current_insn, &reg);
+                        current_insn += count;
+                        count = dwarf_read_leb128(current_insn, &offset);
+                        current_insn += count;
+                        offset *= cie->data_alignment_factor;
+                        regp = dwarf_frame_alloc_reg(frame, reg);
+                        regp->flags |= DWARF_REG_OFFSET;
+                        regp->addr = offset;
+                        break;
+                case DW_CFA_val_offset:
+                        count = dwarf_read_uleb128(current_insn, &reg);
+                        current_insn += count;
+                        count = dwarf_read_leb128(current_insn, &offset);
+                        offset *= cie->data_alignment_factor;
+                        regp = dwarf_frame_alloc_reg(frame, reg);
+                        regp->flags |= DWARF_VAL_OFFSET;
+                        regp->addr = offset;
+                        break;
+                case DW_CFA_GNU_args_size:
+                        count = dwarf_read_uleb128(current_insn, &offset);
+                        current_insn += count;
+                        break;
+                case DW_CFA_GNU_negative_offset_extended:
+                        count = dwarf_read_uleb128(current_insn, &reg);
+                        current_insn += count;
+                        count = dwarf_read_uleb128(current_insn, &offset);
+                        offset *= cie->data_alignment_factor;
+
+                        regp = dwarf_frame_alloc_reg(frame, reg);
+                        regp->flags |= DWARF_REG_OFFSET;
+                        regp->addr = -offset;
+                        break;
+                default:
+                        pr_debug("unhandled DWARF instruction 0x%x\n", insn);
+                        UNWINDER_BUG();
+                        break;
+                }
+        }
+
+        return 0;
+}
+
+/**
+ *      dwarf_unwind_stack - recursively unwind the stack
+ *      @pc: address of the function to unwind
+ *      @prev: struct dwarf_frame of the previous stackframe on the callstack
+ *
+ *      Return a struct dwarf_frame representing the most recent frame
+ *      on the callstack. Each of the lower (older) stack frames are
+ *      linked via the "prev" member.
+ */
+struct dwarf_frame * dwarf_unwind_stack(unsigned long pc,
+                                        struct dwarf_frame *prev)
+{
+        struct dwarf_frame *frame;
+        struct dwarf_cie *cie;
+        struct dwarf_fde *fde;
+        struct dwarf_reg *reg;
+        unsigned long addr;
+
+        /*
+         * If this is the first invocation of this recursive function we
+         * need get the contents of a physical register to get the CFA
+         * in order to begin the virtual unwinding of the stack.
+         *
+         * NOTE: the return address is guaranteed to be setup by the
+         * time this function makes its first function call.
+         */
+        if (!pc && !prev)
+                pc = (unsigned long)current_text_addr();
+
+        frame = mempool_alloc(dwarf_frame_pool, GFP_ATOMIC);
+        if (!frame) {
+                printk(KERN_ERR "Unable to allocate a dwarf frame\n");
+                UNWINDER_BUG();
+        }
+
+        INIT_LIST_HEAD(&frame->reg_list);
+        frame->flags = 0;
+        frame->prev = prev;
+        frame->return_addr = 0;
+
+        fde = dwarf_lookup_fde(pc);
+        if (!fde) {
+                /*
+                 * This is our normal exit path - the one that stops the
+                 * recursion. There's two reasons why we might exit
+                 * here,
+                 *
+                 *      a) pc has no asscociated DWARF frame info and so
+                 *      we don't know how to unwind this frame. This is
+                 *      usually the case when we're trying to unwind a
+                 *      frame that was called from some assembly code
+                 *      that has no DWARF info, e.g. syscalls.
+                 *
+                 *      b) the DEBUG info for pc is bogus. There's
+                 *      really no way to distinguish this case from the
+                 *      case above, which sucks because we could print a
+                 *      warning here.
+                 */
+                goto bail;
+        }
+
+        cie = dwarf_lookup_cie(fde->cie_pointer);
+
+        frame->pc = fde->initial_location;
+
+        /* CIE initial instructions */
+        dwarf_cfa_execute_insns(cie->initial_instructions,
+                                cie->instructions_end, cie, fde,
+                                frame, pc);
+
+        /* FDE instructions */
+        dwarf_cfa_execute_insns(fde->instructions, fde->end, cie,
+                                fde, frame, pc);
+
+        /* Calculate the CFA */
+        switch (frame->flags) {
+        case DWARF_FRAME_CFA_REG_OFFSET:
+                if (prev) {
+                        reg = dwarf_frame_reg(prev, frame->cfa_register);
+                        UNWINDER_BUG_ON(!reg);
+                        UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET);
+
+                        addr = prev->cfa + reg->addr;
+                        frame->cfa = __raw_readl(addr);
+
+                } else {
+                        /*
+                         * Again, this is the first invocation of this
+                         * recurisve function. We need to physically
+                         * read the contents of a register in order to
+                         * get the Canonical Frame Address for this
+                         * function.
+                         */
+                        frame->cfa = dwarf_read_arch_reg(frame->cfa_register);
+                }
+
+                frame->cfa += frame->cfa_offset;
+                break;
+        default:
+                UNWINDER_BUG();
+        }
+
+        reg = dwarf_frame_reg(frame, DWARF_ARCH_RA_REG);
+
+        /*
+         * If we haven't seen the return address register or the return
+         * address column is undefined then we must assume that this is
+         * the end of the callstack.
+         */
+        if (!reg || reg->flags == DWARF_UNDEFINED)
+                goto bail;
+
+        UNWINDER_BUG_ON(reg->flags != DWARF_REG_OFFSET);
+
+        addr = frame->cfa + reg->addr;
+        frame->return_addr = __raw_readl(addr);
+
+        return frame;
+
+bail:
+        dwarf_frame_free_regs(frame);
+        mempool_free(frame, dwarf_frame_pool);
+        return NULL;
+}
+
+static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
+                           unsigned char *end)
+{
+        struct dwarf_cie *cie;
+        unsigned long flags;
+        int count;
+
+        cie = kzalloc(sizeof(*cie), GFP_KERNEL);
+        if (!cie)
+                return -ENOMEM;
+
+        cie->length = len;
+
+        /*
+         * Record the offset into the .eh_frame section
+         * for this CIE. It allows this CIE to be
+         * quickly and easily looked up from the
+         * corresponding FDE.
+         */
+        cie->cie_pointer = (unsigned long)entry;
+
+        cie->version = *(char *)p++;
+        UNWINDER_BUG_ON(cie->version != 1);
+
+        cie->augmentation = p;
+        p += strlen(cie->augmentation) + 1;
+
+        count = dwarf_read_uleb128(p, &cie->code_alignment_factor);
+        p += count;
+
+        count = dwarf_read_leb128(p, &cie->data_alignment_factor);
+        p += count;
+
+        /*
+         * Which column in the rule table contains the
+         * return address?
+         */
+        if (cie->version == 1) {
+                cie->return_address_reg = __raw_readb(p);
+                p++;
+        } else {
+                count = dwarf_read_uleb128(p, &cie->return_address_reg);
+                p += count;
+        }
+
+        if (cie->augmentation[0] == 'z') {
+                unsigned int length, count;
+                cie->flags |= DWARF_CIE_Z_AUGMENTATION;
+
+                count = dwarf_read_uleb128(p, &length);
+                p += count;
+
+                UNWINDER_BUG_ON((unsigned char *)p > end);
+
+                cie->initial_instructions = p + length;
+                cie->augmentation++;
+        }
+
+        while (*cie->augmentation) {
+                /*
+                 * "L" indicates a byte showing how the
+                 * LSDA pointer is encoded. Skip it.
+                 */
+                if (*cie->augmentation == 'L') {
+                        p++;
+                        cie->augmentation++;
+                } else if (*cie->augmentation == 'R') {
+                        /*
+                         * "R" indicates a byte showing
+                         * how FDE addresses are
+                         * encoded.
+                         */
+                        cie->encoding = *(char *)p++;
+                        cie->augmentation++;
+                } else if (*cie->augmentation == 'P') {
+                        /*
+                         * "R" indicates a personality
+                         * routine in the CIE
+                         * augmentation.
+                         */
+                        UNWINDER_BUG();
+                } else if (*cie->augmentation == 'S') {
+                        UNWINDER_BUG();
+                } else {
+                        /*
+                         * Unknown augmentation. Assume
+                         * 'z' augmentation.
+                         */
+                        p = cie->initial_instructions;
+                        UNWINDER_BUG_ON(!p);
+                        break;
+                }
+        }
+
+        cie->initial_instructions = p;
+        cie->instructions_end = end;
+
+        /* Add to list */
+        spin_lock_irqsave(&dwarf_cie_lock, flags);
+        list_add_tail(&cie->link, &dwarf_cie_list);
+        spin_unlock_irqrestore(&dwarf_cie_lock, flags);
+
+        return 0;
+}
+
+static int dwarf_parse_fde(void *entry, u32 entry_type,
+                           void *start, unsigned long len,
+                           unsigned char *end)
+{
+        struct dwarf_fde *fde;
+        struct dwarf_cie *cie;
+        unsigned long flags;
+        int count;
+        void *p = start;
+
+        fde = kzalloc(sizeof(*fde), GFP_KERNEL);
+        if (!fde)
+                return -ENOMEM;
+
+        fde->length = len;
+
+        /*
+         * In a .eh_frame section the CIE pointer is the
+         * delta between the address within the FDE
+         */
+        fde->cie_pointer = (unsigned long)(p - entry_type - 4);
+
+        cie = dwarf_lookup_cie(fde->cie_pointer);
+        fde->cie = cie;
+
+        if (cie->encoding)
+                count = dwarf_read_encoded_value(p, &fde->initial_location,
+                                                 cie->encoding);
+        else
+                count = dwarf_read_addr(p, &fde->initial_location);
+
+        p += count;
+
+        if (cie->encoding)
+                count = dwarf_read_encoded_value(p, &fde->address_range,
+                                                 cie->encoding & 0x0f);
+        else
+                count = dwarf_read_addr(p, &fde->address_range);
+
+        p += count;
+
+        if (fde->cie->flags & DWARF_CIE_Z_AUGMENTATION) {
+                unsigned int length;
+                count = dwarf_read_uleb128(p, &length);
+                p += count + length;
+        }
+
+        /* Call frame instructions. */
+        fde->instructions = p;
+        fde->end = end;
+
+        /* Add to list. */
+        spin_lock_irqsave(&dwarf_fde_lock, flags);
+        list_add_tail(&fde->link, &dwarf_fde_list);
+        spin_unlock_irqrestore(&dwarf_fde_lock, flags);
+
+        return 0;
+}
+
+static void dwarf_unwinder_dump(struct task_struct *task,
+                                struct pt_regs *regs,
+                                unsigned long *sp,
+                                const struct stacktrace_ops *ops,
+                                void *data)
+{
+        struct dwarf_frame *frame, *_frame;
+        unsigned long return_addr;
+
+        _frame = NULL;
+        return_addr = 0;
+
+        while (1) {
+                frame = dwarf_unwind_stack(return_addr, _frame);
+
+                if (_frame) {
+                        dwarf_frame_free_regs(_frame);
+                        mempool_free(_frame, dwarf_frame_pool);
+                }
+
+                _frame = frame;
+
+                if (!frame || !frame->return_addr)
+                        break;
+
+                return_addr = frame->return_addr;
+                ops->address(data, return_addr, 1);
+        }
+}
+
+static struct unwinder dwarf_unwinder = {
+        .name = "dwarf-unwinder",
+        .dump = dwarf_unwinder_dump,
+        .rating = 150,
+};
+
+static void dwarf_unwinder_cleanup(void)
+{
+        struct dwarf_cie *cie;
+        struct dwarf_fde *fde;
+
+        /*
+         * Deallocate all the memory allocated for the DWARF unwinder.
+         * Traverse all the FDE/CIE lists and remove and free all the
+         * memory associated with those data structures.
+         */
+        list_for_each_entry(cie, &dwarf_cie_list, link)
+                kfree(cie);
+
+        list_for_each_entry(fde, &dwarf_fde_list, link)
+                kfree(fde);
+
+        kmem_cache_destroy(dwarf_reg_cachep);
+        kmem_cache_destroy(dwarf_frame_cachep);
+}
+
+/**
+ *      dwarf_unwinder_init - initialise the dwarf unwinder
+ *
+ *      Build the data structures describing the .dwarf_frame section to
+ *      make it easier to lookup CIE and FDE entries. Because the
+ *      .eh_frame section is packed as tightly as possible it is not
+ *      easy to lookup the FDE for a given PC, so we build a list of FDE
+ *      and CIE entries that make it easier.
+ */
+static int __init dwarf_unwinder_init(void)
+{
+        u32 entry_type;
+        void *p, *entry;
+        int count, err = 0;
+        unsigned long len;
+        unsigned int c_entries, f_entries;
+        unsigned char *end;
+        INIT_LIST_HEAD(&dwarf_cie_list);
+        INIT_LIST_HEAD(&dwarf_fde_list);
+
+        c_entries = 0;
+        f_entries = 0;
+        entry = &__start_eh_frame;
+
+        dwarf_frame_cachep = kmem_cache_create("dwarf_frames",
+                        sizeof(struct dwarf_frame), 0,
+                        SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
+
+        dwarf_reg_cachep = kmem_cache_create("dwarf_regs",
+                        sizeof(struct dwarf_reg), 0,
+                        SLAB_PANIC | SLAB_HWCACHE_ALIGN | SLAB_NOTRACK, NULL);
+
+        dwarf_frame_pool = mempool_create(DWARF_FRAME_MIN_REQ,
+                                          mempool_alloc_slab,
+                                          mempool_free_slab,
+                                          dwarf_frame_cachep);
+
+        dwarf_reg_pool = mempool_create(DWARF_REG_MIN_REQ,
+                                         mempool_alloc_slab,
+                                         mempool_free_slab,
+                                         dwarf_reg_cachep);
+
+        while ((char *)entry < __stop_eh_frame) {
+                p = entry;
+
+                count = dwarf_entry_len(p, &len);
+                if (count == 0) {
+                        /*
+                         * We read a bogus length field value. There is
+                         * nothing we can do here apart from disabling
+                         * the DWARF unwinder. We can't even skip this
+                         * entry and move to the next one because 'len'
+                         * tells us where our next entry is.
+                         */
+                        goto out;
+                } else
+                        p += count;
+
+                /* initial length does not include itself */
+                end = p + len;
+
+                entry_type = get_unaligned((u32 *)p);
+                p += 4;
+
+                if (entry_type == DW_EH_FRAME_CIE) {
+                        err = dwarf_parse_cie(entry, p, len, end);
+                        if (err < 0)
+                                goto out;
+                        else
+                                c_entries++;
+                } else {
+                        err = dwarf_parse_fde(entry, entry_type, p, len, end);
+                        if (err < 0)
+                                goto out;
+                        else
+                                f_entries++;
+                }
+
+                entry = (char *)entry + len + 4;
+        }
+
+        printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n",
+               c_entries, f_entries);
+
+        err = unwinder_register(&dwarf_unwinder);
+        if (err)
+                goto out;
+
+        return 0;
+
+out:
+        printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err);
+        dwarf_unwinder_cleanup();
+        return -EINVAL;
+}
+early_initcall(dwarf_unwinder_init);
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index a952dcf9999d..81a46145ffa5 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -134,7 +134,7 @@ static void scif_sercon_init(char *s)
         sci_out(&scif_port, SCFCR, 0x0030);     /* TTRG=b'11 */
         sci_out(&scif_port, SCSCR, 0x0030);     /* TE, RE */
 }
-#elif defined(CONFIG_CPU_SH4)
+#elif defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
 #define DEFAULT_BAUD 115200
 /*
  * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
@@ -220,8 +220,7 @@ static int __init setup_early_printk(char *buf)
                 early_console = &scif_console;
 
 #if !defined(CONFIG_SH_STANDARD_BIOS)
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
                 scif_sercon_init(buf + 6);
 #endif
 #endif
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index d62359cfbbe2..68d9223b145e 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -43,9 +43,10 @@
  *      syscall #
  *
  */
+#include <asm/dwarf.h>
 
 #if defined(CONFIG_PREEMPT)
-#  define preempt_stop()        cli
+#  define preempt_stop()        cli ; TRACE_IRQS_OFF
 #else
 #  define preempt_stop()
 #  define resume_kernel         __restore_all
@@ -55,11 +56,7 @@
         .align  2
 ENTRY(exception_error)
         !
-#ifdef CONFIG_TRACE_IRQFLAGS
-        mov.l   2f, r0
-        jsr     @r0
-         nop
-#endif
+        TRACE_IRQS_ON
         sti
         mov.l   1f, r0
         jmp     @r0
@@ -67,18 +64,15 @@ ENTRY(exception_error)
 
         .align  2
 1:      .long   do_exception_error
-#ifdef CONFIG_TRACE_IRQFLAGS
-2:      .long   trace_hardirqs_on
-#endif
 
         .align  2
 ret_from_exception:
+        CFI_STARTPROC simple
+        CFI_DEF_CFA r14, 0
+        CFI_REL_OFFSET 17, 64
+        CFI_REL_OFFSET 15, 0
+        CFI_REL_OFFSET 14, 56
         preempt_stop()
-#ifdef CONFIG_TRACE_IRQFLAGS
-        mov.l   4f, r0
-        jsr     @r0
-         nop
-#endif
 ENTRY(ret_from_irq)
         !
         mov     #OFF_SR, r0
@@ -93,6 +87,7 @@ ENTRY(ret_from_irq)
          nop
 ENTRY(resume_kernel)
         cli
+        TRACE_IRQS_OFF
         mov.l   @(TI_PRE_COUNT,r8), r0  ! current_thread_info->preempt_count
         tst     r0, r0
         bf      noresched
@@ -103,8 +98,9 @@ need_resched:
 
         mov     #OFF_SR, r0
         mov.l   @(r0,r15), r0           ! get status register
-        and     #0xf0, r0               ! interrupts off (exception path)?
-        cmp/eq  #0xf0, r0
+        shlr    r0
+        and     #(0xf0>>1), r0          ! interrupts off (exception path)?
+        cmp/eq  #(0xf0>>1), r0
         bt      noresched
         mov.l   3f, r0
         jsr     @r0                     ! call preempt_schedule_irq
@@ -125,13 +121,9 @@ noresched:
 ENTRY(resume_userspace)
         ! r8: current_thread_info
         cli
-#ifdef CONFIG_TRACE_IRQFLAGS
-        mov.l   5f, r0
-        jsr     @r0
-         nop
-#endif
+        TRACE_IRQS_OfF
         mov.l   @(TI_FLAGS,r8), r0              ! current_thread_info->flags
-        tst     #_TIF_WORK_MASK, r0
+        tst     #(_TIF_WORK_MASK & 0xff), r0
         bt/s    __restore_all
          tst    #_TIF_NEED_RESCHED, r0
 
@@ -156,14 +148,10 @@ work_resched:
         jsr     @r1                             ! schedule
          nop
         cli
-#ifdef CONFIG_TRACE_IRQFLAGS
-        mov.l   5f, r0
-        jsr     @r0
-         nop
-#endif
+        TRACE_IRQS_OFF
         !
         mov.l   @(TI_FLAGS,r8), r0              ! current_thread_info->flags
-        tst     #_TIF_WORK_MASK, r0
+        tst     #(_TIF_WORK_MASK & 0xff), r0
         bt      __restore_all
         bra     work_pending
          tst    #_TIF_NEED_RESCHED, r0
@@ -172,23 +160,15 @@ work_resched:
 1:      .long   schedule
 2:      .long   do_notify_resume
 3:      .long   resume_userspace
-#ifdef CONFIG_TRACE_IRQFLAGS
-4:      .long   trace_hardirqs_on
-5:      .long   trace_hardirqs_off
-#endif
 
         .align  2
 syscall_exit_work:
         ! r0: current_thread_info->flags
         ! r8: current_thread_info
-        tst     #_TIF_WORK_SYSCALL_MASK, r0
+        tst     #(_TIF_WORK_SYSCALL_MASK & 0xff), r0
         bt/s    work_pending
          tst    #_TIF_NEED_RESCHED, r0
-#ifdef CONFIG_TRACE_IRQFLAGS
-        mov.l   5f, r0
-        jsr     @r0
-         nop
-#endif
+        TRACE_IRQS_ON
         sti
         mov     r15, r4
         mov.l   8f, r0                  ! do_syscall_trace_leave
@@ -226,12 +206,25 @@ syscall_trace_entry:
          mov.l  r0, @(OFF_R0,r15)       ! Return value
 
 __restore_all:
-        mov.l   1f, r0
+        mov     #OFF_SR, r0
+        mov.l   @(r0,r15), r0   ! get status register
+
+        shlr2   r0
+        and     #0x3c, r0
+        cmp/eq  #0x3c, r0
+        bt      1f
+        TRACE_IRQS_ON
+        bra     2f
+         nop
+1:
+        TRACE_IRQS_OFF
+2:
+        mov.l   3f, r0
         jmp     @r0
          nop
 
         .align  2
-1:      .long   restore_all
+3:      .long   restore_all
 
         .align  2
 syscall_badsys:                 ! Bad syscall number
@@ -259,6 +252,7 @@ debug_trap:
          nop
         bra     __restore_all
          nop
+        CFI_ENDPROC
 
         .align  2
 1:      .long   debug_trap_table
@@ -304,6 +298,7 @@ ret_from_fork:
  * system calls and debug traps through their respective jump tables.
  */
 ENTRY(system_call)
+        setup_frame_reg
 #if !defined(CONFIG_CPU_SH2)
         mov.l   1f, r9
         mov.l   @r9, r8         ! Read from TRA (Trap Address) Register
@@ -321,18 +316,18 @@ ENTRY(system_call)
         bt/s    debug_trap              ! it's a debug trap..
          nop
 
-#ifdef CONFIG_TRACE_IRQFLAGS
-        mov.l   5f, r10
-        jsr     @r10
-         nop
-#endif
+        TRACE_IRQS_ON
         sti
 
         !
         get_current_thread_info r8, r10
         mov.l   @(TI_FLAGS,r8), r8
-        mov     #_TIF_WORK_SYSCALL_MASK, r10
+        mov     #(_TIF_WORK_SYSCALL_MASK & 0xff), r10
+        mov     #(_TIF_WORK_SYSCALL_MASK >> 8), r9
         tst     r10, r8
+        shll8   r9
+        bf      syscall_trace_entry
+        tst     r9, r8
         bf      syscall_trace_entry
         !
         mov.l   2f, r8                  ! Number of syscalls
@@ -351,15 +346,15 @@ syscall_call:
         !
 syscall_exit:
         cli
-#ifdef CONFIG_TRACE_IRQFLAGS
-        mov.l   6f, r0
-        jsr     @r0
-         nop
-#endif
+        TRACE_IRQS_OFF
         !
         get_current_thread_info r8, r0
         mov.l   @(TI_FLAGS,r8), r0              ! current_thread_info->flags
-        tst     #_TIF_ALLWORK_MASK, r0
+        tst     #(_TIF_ALLWORK_MASK & 0xff), r0
+        mov     #(_TIF_ALLWORK_MASK >> 8), r1
+        bf      syscall_exit_work
+        shlr8   r0
+        tst     r0, r1
         bf      syscall_exit_work
         bra     __restore_all
          nop
@@ -369,9 +364,5 @@ syscall_exit:
 #endif
 2:      .long   NR_syscalls
 3:      .long   sys_call_table
-#ifdef CONFIG_TRACE_IRQFLAGS
-5:      .long   trace_hardirqs_on
-6:      .long   trace_hardirqs_off
-#endif
 7:      .long   do_syscall_trace_enter
 8:      .long   do_syscall_trace_leave
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index 066f37dc32a9..a3dcc6d5d253 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -16,9 +16,13 @@
 #include <linux/string.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/kernel.h>
 #include <asm/ftrace.h>
 #include <asm/cacheflush.h>
+#include <asm/unistd.h>
+#include <trace/syscall.h>
 
+#ifdef CONFIG_DYNAMIC_FTRACE
 static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE];
 
 static unsigned char ftrace_nop[4];
@@ -131,3 +135,187 @@ int __init ftrace_dyn_arch_init(void *data)
 
         return 0;
 }
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+#ifdef CONFIG_DYNAMIC_FTRACE
+extern void ftrace_graph_call(void);
+
+static int ftrace_mod(unsigned long ip, unsigned long old_addr,
+                      unsigned long new_addr)
+{
+        unsigned char code[MCOUNT_INSN_SIZE];
+
+        if (probe_kernel_read(code, (void *)ip, MCOUNT_INSN_SIZE))
+                return -EFAULT;
+
+        if (old_addr != __raw_readl((unsigned long *)code))
+                return -EINVAL;
+
+        __raw_writel(new_addr, ip);
+        return 0;
+}
+
+int ftrace_enable_ftrace_graph_caller(void)
+{
+        unsigned long ip, old_addr, new_addr;
+
+        ip = (unsigned long)(&ftrace_graph_call) + GRAPH_INSN_OFFSET;
+        old_addr = (unsigned long)(&skip_trace);
+        new_addr = (unsigned long)(&ftrace_graph_caller);
+
+        return ftrace_mod(ip, old_addr, new_addr);
+}
+
+int ftrace_disable_ftrace_graph_caller(void)
+{
+        unsigned long ip, old_addr, new_addr;
+
+        ip = (unsigned long)(&ftrace_graph_call) + GRAPH_INSN_OFFSET;
+        old_addr = (unsigned long)(&ftrace_graph_caller);
+        new_addr = (unsigned long)(&skip_trace);
+
+        return ftrace_mod(ip, old_addr, new_addr);
+}
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+/*
+ * Hook the return address and push it in the stack of return addrs
+ * in the current thread info.
+ *
+ * This is the main routine for the function graph tracer. The function
+ * graph tracer essentially works like this:
+ *
+ * parent is the stack address containing self_addr's return address.
+ * We pull the real return address out of parent and store it in
+ * current's ret_stack. Then, we replace the return address on the stack
+ * with the address of return_to_handler. self_addr is the function that
+ * called mcount.
+ *
+ * When self_addr returns, it will jump to return_to_handler which calls
+ * ftrace_return_to_handler. ftrace_return_to_handler will pull the real
+ * return address off of current's ret_stack and jump to it.
+ */
+void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
+{
+        unsigned long old;
+        int faulted, err;
+        struct ftrace_graph_ent trace;
+        unsigned long return_hooker = (unsigned long)&return_to_handler;
+
+        if (unlikely(atomic_read(&current->tracing_graph_pause)))
+                return;
+
+        /*
+         * Protect against fault, even if it shouldn't
+         * happen. This tool is too much intrusive to
+         * ignore such a protection.
+         */
+        __asm__ __volatile__(
+                "1:                                             \n\t"
+                "mov.l          @%2, %0                         \n\t"
+                "2:                                             \n\t"
+                "mov.l          %3, @%2                         \n\t"
+                "mov            #0, %1                          \n\t"
+                "3:                                             \n\t"
+                ".section .fixup, \"ax\"                        \n\t"
+                "4:                                             \n\t"
+                "mov.l          5f, %0                          \n\t"
+                "jmp            @%0                             \n\t"
+                " mov           #1, %1                          \n\t"
+                ".balign 4                                      \n\t"
+                "5:     .long 3b                                \n\t"
+                ".previous                                      \n\t"
+                ".section __ex_table,\"a\"                      \n\t"
+                ".long 1b, 4b                                   \n\t"
+                ".long 2b, 4b                                   \n\t"
+                ".previous                                      \n\t"
+                : "=&r" (old), "=r" (faulted)
+                : "r" (parent), "r" (return_hooker)
+        );
+
+        if (unlikely(faulted)) {
+                ftrace_graph_stop();
+                WARN_ON(1);
+                return;
+        }
+
+        err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0);
+        if (err == -EBUSY) {
+                __raw_writel(old, parent);
+                return;
+        }
+
+        trace.func = self_addr;
+
+        /* Only trace if the calling function expects to */
+        if (!ftrace_graph_entry(&trace)) {
+                current->curr_ret_stack--;
+                __raw_writel(old, parent);
+        }
+}
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
+#ifdef CONFIG_FTRACE_SYSCALLS
+
+extern unsigned long __start_syscalls_metadata[];
+extern unsigned long __stop_syscalls_metadata[];
+extern unsigned long *sys_call_table;
+
+static struct syscall_metadata **syscalls_metadata;
+
+static struct syscall_metadata *find_syscall_meta(unsigned long *syscall)
+{
+        struct syscall_metadata *start;
+        struct syscall_metadata *stop;
+        char str[KSYM_SYMBOL_LEN];
+
+
+        start = (struct syscall_metadata *)__start_syscalls_metadata;
+        stop = (struct syscall_metadata *)__stop_syscalls_metadata;
+        kallsyms_lookup((unsigned long) syscall, NULL, NULL, NULL, str);
+
+        for ( ; start < stop; start++) {
+                if (start->name && !strcmp(start->name, str))
+                        return start;
+        }
+
+        return NULL;
+}
+
+struct syscall_metadata *syscall_nr_to_meta(int nr)
+{
+        if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0)
+                return NULL;
+
+        return syscalls_metadata[nr];
+}
+
+void arch_init_ftrace_syscalls(void)
+{
+        int i;
+        struct syscall_metadata *meta;
+        unsigned long **psys_syscall_table = &sys_call_table;
+        static atomic_t refs;
+
+        if (atomic_inc_return(&refs) != 1)
+                goto end;
+
+        syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) *
+                                        FTRACE_SYSCALL_MAX, GFP_KERNEL);
+        if (!syscalls_metadata) {
+                WARN_ON(1);
+                return;
+        }
+
+        for (i = 0; i < FTRACE_SYSCALL_MAX; i++) {
+                meta = find_syscall_meta(psys_syscall_table[i]);
+                syscalls_metadata[i] = meta;
+        }
+        return;
+
+        /* Paranoid: avoid overflow */
+end:
+        atomic_dec(&refs);
+}
+#endif /* CONFIG_FTRACE_SYSCALLS */
diff --git a/arch/sh/kernel/init_task.c b/arch/sh/kernel/init_task.c
index 1719957c0a69..11f2ea556a6b 100644
--- a/arch/sh/kernel/init_task.c
+++ b/arch/sh/kernel/init_task.c
@@ -17,9 +17,8 @@ struct pt_regs fake_swapper_regs;
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c
index 4f85fffaa557..4770c241c679 100644
--- a/arch/sh/kernel/io.c
+++ b/arch/sh/kernel/io.c
@@ -1,12 +1,9 @@
 /*
- * linux/arch/sh/kernel/io.c
+ * arch/sh/kernel/io.c - Machine independent I/O functions.
  *
- * Copyright (C) 2000  Stuart Menefy
+ * Copyright (C) 2000 - 2009  Stuart Menefy
  * Copyright (C) 2005  Paul Mundt
  *
- * Provide real functions which expand to whatever the header file defined.
- * Also definitions of machine independent IO functions.
- *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -18,33 +15,87 @@
 
 /*
  * Copy data from IO memory space to "real" memory space.
- * This needs to be optimized.
  */
 void memcpy_fromio(void *to, const volatile void __iomem *from, unsigned long count)
 {
-        unsigned char *p = to;
-        while (count) {
-                count--;
-                *p = readb(from);
-                p++;
-                from++;
-        }
+        /*
+         * Would it be worthwhile doing byte and long transfers first
+         * to try and get aligned?
+         */
+#ifdef CONFIG_CPU_SH4
+        if ((count >= 0x20) &&
+             (((u32)to & 0x1f) == 0) && (((u32)from & 0x3) == 0)) {
+                int tmp2, tmp3, tmp4, tmp5, tmp6;
+
+                __asm__ __volatile__(
+                        "1:                     \n\t"
+                        "mov.l  @%7+, r0        \n\t"
+                        "mov.l  @%7+, %2        \n\t"
+                        "movca.l r0, @%0        \n\t"
+                        "mov.l  @%7+, %3        \n\t"
+                        "mov.l  @%7+, %4        \n\t"
+                        "mov.l  @%7+, %5        \n\t"
+                        "mov.l  @%7+, %6        \n\t"
+                        "mov.l  @%7+, r7        \n\t"
+                        "mov.l  @%7+, r0        \n\t"
+                        "mov.l  %2, @(0x04,%0)  \n\t"
+                        "mov    #0x20, %2       \n\t"
+                        "mov.l  %3, @(0x08,%0)  \n\t"
+                        "sub    %2, %1          \n\t"
+                        "mov.l  %4, @(0x0c,%0)  \n\t"
+                        "cmp/hi %1, %2          ! T if 32 > count       \n\t"
+                        "mov.l  %5, @(0x10,%0)  \n\t"
+                        "mov.l  %6, @(0x14,%0)  \n\t"
+                        "mov.l  r7, @(0x18,%0)  \n\t"
+                        "mov.l  r0, @(0x1c,%0)  \n\t"
+                        "bf.s   1b              \n\t"
+                        " add   #0x20, %0       \n\t"
+                        : "=&r" (to), "=&r" (count),
+                          "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
+                          "=&r" (tmp5), "=&r" (tmp6), "=&r" (from)
+                        : "7"(from), "0" (to), "1" (count)
+                        : "r0", "r7", "t", "memory");
+        }
+#endif
+
+        if ((((u32)to | (u32)from) & 0x3) == 0) {
+                for (; count > 3; count -= 4) {
+                        *(u32 *)to = *(volatile u32 *)from;
+                        to += 4;
+                        from += 4;
+                }
+        }
+
+        for (; count > 0; count--) {
+                *(u8 *)to = *(volatile u8 *)from;
+                to++;
+                from++;
+        }
+
+        mb();
 }
 EXPORT_SYMBOL(memcpy_fromio);
 
 /*
  * Copy data from "real" memory space to IO memory space.
- * This needs to be optimized.
  */
 void memcpy_toio(volatile void __iomem *to, const void *from, unsigned long count)
 {
-        const unsigned char *p = from;
-        while (count) {
-                count--;
-                writeb(*p, to);
-                p++;
-                to++;
-        }
+        if ((((u32)to | (u32)from) & 0x3) == 0) {
+                for ( ; count > 3; count -= 4) {
+                        *(volatile u32 *)to = *(u32 *)from;
+                        to += 4;
+                        from += 4;
+                }
+        }
+
+        for (; count > 0; count--) {
+                *(volatile u8 *)to = *(u8 *)from;
+                to++;
+                from++;
+        }
+
+        mb();
 }
 EXPORT_SYMBOL(memcpy_toio);
 
@@ -62,6 +113,8 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count)
 }
 EXPORT_SYMBOL(memset_io);
 
+#ifndef CONFIG_GENERIC_IOMAP
+
 void __iomem *ioport_map(unsigned long port, unsigned int nr)
 {
         void __iomem *ret;
@@ -79,3 +132,5 @@ void ioport_unmap(void __iomem *addr)
         sh_mv.mv_ioport_unmap(addr);
 }
 EXPORT_SYMBOL(ioport_unmap);
+
+#endif /* CONFIG_GENERIC_IOMAP */
diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index 5a7f554d9ca1..4ff507239286 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -73,35 +73,19 @@ u32 generic_inl_p(unsigned long port)
 
 void generic_insb(unsigned long port, void *dst, unsigned long count)
 {
-        volatile u8 *port_addr;
-        u8 *buf = dst;
-
-        port_addr = (volatile u8 __force *)__ioport_map(port, 1);
-        while (count--)
-                *buf++ = *port_addr;
+        __raw_readsb(__ioport_map(port, 1), dst, count);
+        dummy_read();
 }
 
 void generic_insw(unsigned long port, void *dst, unsigned long count)
 {
-        volatile u16 *port_addr;
-        u16 *buf = dst;
-
-        port_addr = (volatile u16 __force *)__ioport_map(port, 2);
-        while (count--)
-                *buf++ = *port_addr;
-
+        __raw_readsw(__ioport_map(port, 2), dst, count);
         dummy_read();
 }
 
 void generic_insl(unsigned long port, void *dst, unsigned long count)
 {
-        volatile u32 *port_addr;
-        u32 *buf = dst;
-
-        port_addr = (volatile u32 __force *)__ioport_map(port, 4);
-        while (count--)
-                *buf++ = *port_addr;
-
+        __raw_readsl(__ioport_map(port, 4), dst, count);
         dummy_read();
 }
 
@@ -145,37 +129,19 @@ void generic_outl_p(u32 b, unsigned long port)
  */
 void generic_outsb(unsigned long port, const void *src, unsigned long count)
 {
-        volatile u8 *port_addr;
-        const u8 *buf = src;
-
-        port_addr = (volatile u8 __force *)__ioport_map(port, 1);
-
-        while (count--)
-                *port_addr = *buf++;
+        __raw_writesb(__ioport_map(port, 1), src, count);
+        dummy_read();
 }
 
 void generic_outsw(unsigned long port, const void *src, unsigned long count)
 {
-        volatile u16 *port_addr;
-        const u16 *buf = src;
-
-        port_addr = (volatile u16 __force *)__ioport_map(port, 2);
-
-        while (count--)
-                *port_addr = *buf++;
-
+        __raw_writesw(__ioport_map(port, 2), src, count);
         dummy_read();
 }
 
 void generic_outsl(unsigned long port, const void *src, unsigned long count)
 {
-        volatile u32 *port_addr;
-        const u32 *buf = src;
-
-        port_addr = (volatile u32 __force *)__ioport_map(port, 4);
-        while (count--)
-                *port_addr = *buf++;
-
+        __raw_writesl(__ioport_map(port, 4), src, count);
         dummy_read();
 }
 
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index 77dfecb64373..69be603aa2d7 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -112,14 +112,15 @@ void __iomem *match_trapped_io_handler(struct list_head *list,
         struct trapped_io *tiop;
         struct resource *res;
         int k, len;
+        unsigned long flags;
 
-        spin_lock_irq(&trapped_lock);
+        spin_lock_irqsave(&trapped_lock, flags);
         list_for_each_entry(tiop, list, list) {
                 voffs = 0;
                 for (k = 0; k < tiop->num_resources; k++) {
                         res = tiop->resource + k;
                         if (res->start == offset) {
-                                spin_unlock_irq(&trapped_lock);
+                                spin_unlock_irqrestore(&trapped_lock, flags);
                                 return tiop->virt_base + voffs;
                         }
 
@@ -127,7 +128,7 @@ void __iomem *match_trapped_io_handler(struct list_head *list,
                         voffs += roundup(len, PAGE_SIZE);
                 }
         }
-        spin_unlock_irq(&trapped_lock);
+        spin_unlock_irqrestore(&trapped_lock, flags);
         return NULL;
 }
 EXPORT_SYMBOL_GPL(match_trapped_io_handler);
@@ -283,7 +284,8 @@ int handle_trapped_io(struct pt_regs *regs, unsigned long address)
                 return 0;
         }
 
-        tmp = handle_unaligned_access(instruction, regs, &trapped_io_access);
+        tmp = handle_unaligned_access(instruction, regs,
+                                      &trapped_io_access, 1);
         set_fs(oldfs);
         return tmp == 0;
 }
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 3d09062f4682..7cb933ba4957 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -114,24 +114,7 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs)
 #endif
 
         irq_enter();
-
-#ifdef CONFIG_DEBUG_STACKOVERFLOW
-        /* Debugging check for stack overflow: is there less than 1KB free? */
-        {
-                long sp;
-
-                __asm__ __volatile__ ("and r15, %0" :
-                                        "=r" (sp) : "0" (THREAD_SIZE - 1));
-
-                if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
-                        printk("do_IRQ: stack overflow: %ld\n",
-                               sp - sizeof(struct thread_info));
-                        dump_stack();
-                }
-        }
-#endif
-
-        irq = irq_demux(intc_evt2irq(irq));
+        irq = irq_demux(irq);
 
 #ifdef CONFIG_IRQSTACKS
         curctx = (union irq_ctx *)current_thread_info();
@@ -182,11 +165,9 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs)
 }
 
 #ifdef CONFIG_IRQSTACKS
-static char softirq_stack[NR_CPUS * THREAD_SIZE]
-                __attribute__((__section__(".bss.page_aligned")));
+static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
 
-static char hardirq_stack[NR_CPUS * THREAD_SIZE]
-                __attribute__((__section__(".bss.page_aligned")));
+static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss;
 
 /*
  * allocate per-cpu stacks for hardirq and for softirq processing
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index 305aad742aec..3e532d0d4a5c 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -15,8 +15,6 @@
 #include <linux/io.h>
 #include <asm/cacheflush.h>
 
-char in_nmi = 0;        /* Set during NMI to prevent re-entry */
-
 /* Macros for single step instruction identification */
 #define OPCODE_BT(op)           (((op) & 0xff00) == 0x8900)
 #define OPCODE_BF(op)           (((op) & 0xff00) == 0x8b00)
@@ -195,8 +193,6 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
         regs->gbr = gdb_regs[GDB_GBR];
         regs->mach = gdb_regs[GDB_MACH];
         regs->macl = gdb_regs[GDB_MACL];
-
-        __asm__ __volatile__ ("ldc %0, vbr" : : "r" (gdb_regs[GDB_VBR]));
 }
 
 void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
diff --git a/arch/sh/kernel/localtimer.c b/arch/sh/kernel/localtimer.c
index 96e8eaea1e62..0b04e7d4a9b9 100644
--- a/arch/sh/kernel/localtimer.c
+++ b/arch/sh/kernel/localtimer.c
@@ -22,6 +22,7 @@
 #include <linux/jiffies.h>
 #include <linux/percpu.h>
 #include <linux/clockchips.h>
+#include <linux/hardirq.h>
 #include <linux/irq.h>
 
 static DEFINE_PER_CPU(struct clock_event_device, local_clockevent);
@@ -33,7 +34,9 @@ void local_timer_interrupt(void)
 {
         struct clock_event_device *clk = &__get_cpu_var(local_clockevent);
 
+        irq_enter();
         clk->event_handler(clk);
+        irq_exit();
 }
 
 static void dummy_timer_set_mode(enum clock_event_mode mode,
@@ -46,8 +49,10 @@ void __cpuinit local_timer_setup(unsigned int cpu)
         struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
 
         clk->name               = "dummy_timer";
-        clk->features           = CLOCK_EVT_FEAT_DUMMY;
-        clk->rating             = 200;
+        clk->features           = CLOCK_EVT_FEAT_ONESHOT |
+                                  CLOCK_EVT_FEAT_PERIODIC |
+                                  CLOCK_EVT_FEAT_DUMMY;
+        clk->rating             = 400;
         clk->mult               = 1;
         clk->set_mode           = dummy_timer_set_mode;
         clk->broadcast          = smp_timer_broadcast;
diff --git a/arch/sh/kernel/nmi_debug.c b/arch/sh/kernel/nmi_debug.c
new file mode 100644
index 000000000000..ff0abbd1e652
--- /dev/null
+++ b/arch/sh/kernel/nmi_debug.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/delay.h>
+#include <linux/kdebug.h>
+#include <linux/notifier.h>
+#include <linux/sched.h>
+#include <linux/hardirq.h>
+
+enum nmi_action {
+        NMI_SHOW_STATE  = 1 << 0,
+        NMI_SHOW_REGS   = 1 << 1,
+        NMI_DIE         = 1 << 2,
+        NMI_DEBOUNCE    = 1 << 3,
+};
+
+static unsigned long nmi_actions;
+
+static int nmi_debug_notify(struct notifier_block *self,
+                unsigned long val, void *data)
+{
+        struct die_args *args = data;
+
+        if (likely(val != DIE_NMI))
+                return NOTIFY_DONE;
+
+        if (nmi_actions & NMI_SHOW_STATE)
+                show_state();
+        if (nmi_actions & NMI_SHOW_REGS)
+                show_regs(args->regs);
+        if (nmi_actions & NMI_DEBOUNCE)
+                mdelay(10);
+        if (nmi_actions & NMI_DIE)
+                return NOTIFY_BAD;
+
+        return NOTIFY_OK;
+}
+
+static struct notifier_block nmi_debug_nb = {
+        .notifier_call = nmi_debug_notify,
+};
+
+static int __init nmi_debug_setup(char *str)
+{
+        char *p, *sep;
+
+        register_die_notifier(&nmi_debug_nb);
+
+        if (*str != '=')
+                return 0;
+
+        for (p = str + 1; *p; p = sep + 1) {
+                sep = strchr(p, ',');
+                if (sep)
+                        *sep = 0;
+                if (strcmp(p, "state") == 0)
+                        nmi_actions |= NMI_SHOW_STATE;
+                else if (strcmp(p, "regs") == 0)
+                        nmi_actions |= NMI_SHOW_REGS;
+                else if (strcmp(p, "debounce") == 0)
+                        nmi_actions |= NMI_DEBOUNCE;
+                else if (strcmp(p, "die") == 0)
+                        nmi_actions |= NMI_DIE;
+                else
+                        printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
+                                p);
+                if (!sep)
+                        break;
+        }
+
+        return 0;
+}
+__setup("nmi_debug", nmi_debug_setup);
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 92d7740faab1..0673c4746be3 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -23,6 +23,7 @@
 #include <linux/tick.h>
 #include <linux/reboot.h>
 #include <linux/fs.h>
+#include <linux/ftrace.h>
 #include <linux/preempt.h>
 #include <asm/uaccess.h>
 #include <asm/mmu_context.h>
@@ -31,15 +32,35 @@
 #include <asm/ubc.h>
 #include <asm/fpu.h>
 #include <asm/syscalls.h>
+#include <asm/watchdog.h>
 
 int ubc_usercnt = 0;
 
+#ifdef CONFIG_32BIT
+static void watchdog_trigger_immediate(void)
+{
+        sh_wdt_write_cnt(0xFF);
+        sh_wdt_write_csr(0xC2);
+}
+
+void machine_restart(char * __unused)
+{
+        local_irq_disable();
+
+        /* Use watchdog timer to trigger reset */
+        watchdog_trigger_immediate();
+
+        while (1)
+                cpu_sleep();
+}
+#else
 void machine_restart(char * __unused)
 {
         /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */
         asm volatile("ldc %0, sr\n\t"
                      "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001));
 }
+#endif
 
 void machine_halt(void)
 {
@@ -264,8 +285,8 @@ static void ubc_set_tracing(int asid, unsigned long pc)
  *      switch_to(x,y) should switch tasks from x to y.
  *
  */
-struct task_struct *__switch_to(struct task_struct *prev,
-                                struct task_struct *next)
+__notrace_funcgraph struct task_struct *
+__switch_to(struct task_struct *prev, struct task_struct *next)
 {
 #if defined(CONFIG_SH_FPU)
         unlazy_fpu(prev, task_pt_regs(prev));
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 24de74214940..1192398ef582 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -425,7 +425,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
                 struct task_struct *p, struct pt_regs *regs)
 {
         struct pt_regs *childregs;
-        unsigned long long se;                  /* Sign extension */
 
 #ifdef CONFIG_SH_FPU
         if(last_task_used_math == current) {
@@ -441,11 +440,19 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 
         *childregs = *regs;
 
+        /*
+         * Sign extend the edited stack.
+         * Note that thread.pc and thread.pc will stay
+         * 32-bit wide and context switch must take care
+         * of NEFF sign extension.
+         */
         if (user_mode(regs)) {
-                childregs->regs[15] = usp;
+                childregs->regs[15] = neff_sign_extend(usp);
                 p->thread.uregs = childregs;
         } else {
-                childregs->regs[15] = (unsigned long)task_stack_page(p) + THREAD_SIZE;
+                childregs->regs[15] =
+                        neff_sign_extend((unsigned long)task_stack_page(p) +
+                                         THREAD_SIZE);
         }
 
         childregs->regs[9] = 0; /* Set return value for child */
@@ -454,17 +461,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         p->thread.sp = (unsigned long) childregs;
         p->thread.pc = (unsigned long) ret_from_fork;
 
-        /*
-         * Sign extend the edited stack.
-         * Note that thread.pc and thread.pc will stay
-         * 32-bit wide and context switch must take care
-         * of NEFF sign extension.
-         */
-
-        se = childregs->regs[15];
-        se = (se & NEFF_SIGN) ? (se | NEFF_MASK) : se;
-        childregs->regs[15] = se;
-
         return 0;
 }
 
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 3392e835a374..9be35f348093 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -34,6 +34,9 @@
 #include <asm/syscalls.h>
 #include <asm/fpu.h>
 
+#define CREATE_TRACE_POINTS
+#include <trace/events/syscalls.h>
+
 /*
  * This routine will get a word off of the process kernel stack.
  */
@@ -459,6 +462,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
                  */
                 ret = -1L;
 
+        if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
+                trace_sys_enter(regs, regs->regs[0]);
+
         if (unlikely(current->audit_context))
                 audit_syscall_entry(audit_arch(), regs->regs[3],
                                     regs->regs[4], regs->regs[5],
@@ -475,6 +481,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
                 audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]),
                                    regs->regs[0]);
 
+        if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
+                trace_sys_exit(regs, regs->regs[0]);
+
         step = test_thread_flag(TIF_SINGLESTEP);
         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
                 tracehook_report_syscall_exit(regs, step);
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 695097438f02..952da83903da 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -40,6 +40,9 @@
 #include <asm/syscalls.h>
 #include <asm/fpu.h>
 
+#define CREATE_TRACE_POINTS
+#include <trace/events/syscalls.h>
+
 /* This mask defines the bits of the SR which the user is not allowed to
    change, which are everything except S, Q, M, PR, SZ, FR. */
 #define SR_MASK      (0xffff8cfd)
@@ -438,6 +441,9 @@ asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs)
                  */
                 ret = -1LL;
 
+        if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
+                trace_sys_enter(regs, regs->regs[9]);
+
         if (unlikely(current->audit_context))
                 audit_syscall_entry(audit_arch(), regs->regs[1],
                                     regs->regs[2], regs->regs[3],
@@ -452,6 +458,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
                 audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]),
                                    regs->regs[9]);
 
+        if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
+                trace_sys_exit(regs, regs->regs[9]);
+
         if (test_thread_flag(TIF_SYSCALL_TRACE))
                 tracehook_report_syscall_exit(regs, 0);
 }
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index dd38338553ef..f9d44f8e0df6 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -30,6 +30,7 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
+#include <linux/lmb.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
 #include <asm/page.h>
@@ -48,6 +49,7 @@
 struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
         [0] = {
                 .type                   = CPU_SH_NONE,
+                .family                 = CPU_FAMILY_UNKNOWN,
                 .loops_per_jiffy        = 10000000,
         },
 };
@@ -233,39 +235,45 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
 void __init setup_bootmem_allocator(unsigned long free_pfn)
 {
         unsigned long bootmap_size;
+        unsigned long bootmap_pages, bootmem_paddr;
+        u64 total_pages = (lmb_end_of_DRAM() - __MEMORY_START) >> PAGE_SHIFT;
+        int i;
+
+        bootmap_pages = bootmem_bootmap_pages(total_pages);
+
+        bootmem_paddr = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
 
         /*
          * Find a proper area for the bootmem bitmap. After this
          * bootstrap step all allocations (until the page allocator
          * is intact) must be done via bootmem_alloc().
          */
-        bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn,
+        bootmap_size = init_bootmem_node(NODE_DATA(0),
+                                         bootmem_paddr >> PAGE_SHIFT,
                                          min_low_pfn, max_low_pfn);
 
-        __add_active_range(0, min_low_pfn, max_low_pfn);
-        register_bootmem_low_pages();
-
-        node_set_online(0);
+        /* Add active regions with valid PFNs. */
+        for (i = 0; i < lmb.memory.cnt; i++) {
+                unsigned long start_pfn, end_pfn;
+                start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
+                end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
+                __add_active_range(0, start_pfn, end_pfn);
+        }
 
         /*
-         * Reserve the kernel text and
-         * Reserve the bootmem bitmap. We do this in two steps (first step
-         * was init_bootmem()), because this catches the (definitely buggy)
-         * case of us accidentally initializing the bootmem allocator with
-         * an invalid RAM area.
+         * Add all physical memory to the bootmem map and mark each
+         * area as present.
          */
-        reserve_bootmem(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
-                        (PFN_PHYS(free_pfn) + bootmap_size + PAGE_SIZE - 1) -
-                        (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET),
-                        BOOTMEM_DEFAULT);
+        register_bootmem_low_pages();
 
-        /*
-         * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
-         */
-        if (CONFIG_ZERO_PAGE_OFFSET != 0)
-                reserve_bootmem(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET,
+        /* Reserve the sections we're already using. */
+        for (i = 0; i < lmb.reserved.cnt; i++)
+                reserve_bootmem(lmb.reserved.region[i].base,
+                                lmb_size_bytes(&lmb.reserved, i),
                                 BOOTMEM_DEFAULT);
 
+        node_set_online(0);
+
         sparse_memory_present_with_active_regions(0);
 
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -296,12 +304,37 @@ void __init setup_bootmem_allocator(unsigned long free_pfn)
 static void __init setup_memory(void)
 {
         unsigned long start_pfn;
+        u64 base = min_low_pfn << PAGE_SHIFT;
+        u64 size = (max_low_pfn << PAGE_SHIFT) - base;
 
         /*
          * Partially used pages are not usable - thus
          * we are rounding upwards:
          */
         start_pfn = PFN_UP(__pa(_end));
+
+        lmb_add(base, size);
+
+        /*
+         * Reserve the kernel text and
+         * Reserve the bootmem bitmap. We do this in two steps (first step
+         * was init_bootmem()), because this catches the (definitely buggy)
+         * case of us accidentally initializing the bootmem allocator with
+         * an invalid RAM area.
+         */
+        lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
+                    (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) -
+                    (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
+
+        /*
+         * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
+         */
+        if (CONFIG_ZERO_PAGE_OFFSET != 0)
+                lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET);
+
+        lmb_analyze();
+        lmb_dump_all();
+
         setup_bootmem_allocator(start_pfn);
 }
 #else
@@ -372,10 +405,14 @@ void __init setup_arch(char **cmdline_p)
         if (!memory_end)
                 memory_end = memory_start + __MEMORY_SIZE;
 
-#ifdef CONFIG_CMDLINE_BOOL
+#ifdef CONFIG_CMDLINE_OVERWRITE
         strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
 #else
         strlcpy(command_line, COMMAND_LINE, sizeof(command_line));
+#ifdef CONFIG_CMDLINE_EXTEND
+        strlcat(command_line, " ", sizeof(command_line));
+        strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
+#endif
 #endif
 
         /* Save unparsed command line copy for /proc/cmdline */
@@ -402,6 +439,7 @@ void __init setup_arch(char **cmdline_p)
         nodes_clear(node_online_map);
 
         /* Setup bootmem with available RAM */
+        lmb_init();
         setup_memory();
         sparse_init();
 
@@ -448,7 +486,7 @@ static const char *cpu_name[] = {
         [CPU_SH7763]    = "SH7763",     [CPU_SH7770]    = "SH7770",
         [CPU_SH7780]    = "SH7780",     [CPU_SH7781]    = "SH7781",
         [CPU_SH7343]    = "SH7343",     [CPU_SH7785]    = "SH7785",
-        [CPU_SH7786]    = "SH7786",
+        [CPU_SH7786]    = "SH7786",     [CPU_SH7757]    = "SH7757",
         [CPU_SH7722]    = "SH7722",     [CPU_SHX3]      = "SH-X3",
         [CPU_SH5_101]   = "SH5-101",    [CPU_SH5_103]   = "SH5-103",
         [CPU_MXG]       = "MX-G",       [CPU_SH7723]    = "SH7723",
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index fcc5de31f83b..8dbe26b17c44 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -101,20 +101,14 @@ EXPORT_SYMBOL(flush_cache_range);
 EXPORT_SYMBOL(flush_dcache_page);
 #endif
 
-#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \
-        (defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB))
-EXPORT_SYMBOL(clear_user_page);
-#endif
-
-#ifdef CONFIG_FUNCTION_TRACER
-EXPORT_SYMBOL(mcount);
+#ifdef CONFIG_MCOUNT
+DECLARE_EXPORT(mcount);
 #endif
 EXPORT_SYMBOL(csum_partial);
 EXPORT_SYMBOL(csum_partial_copy_generic);
 #ifdef CONFIG_IPV6
 EXPORT_SYMBOL(csum_ipv6_magic);
 #endif
-EXPORT_SYMBOL(clear_page);
 EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(__clear_user);
 EXPORT_SYMBOL(_ebss);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index f5bd156ea504..d008e17eb257 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -30,14 +30,6 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
 EXPORT_SYMBOL(dump_fpu);
 EXPORT_SYMBOL(kernel_thread);
 
-#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU)
-EXPORT_SYMBOL(clear_user_page);
-#endif
-
-#ifndef CONFIG_CACHE_OFF
-EXPORT_SYMBOL(flush_dcache_page);
-#endif
-
 #ifdef CONFIG_VT
 EXPORT_SYMBOL(screen_info);
 #endif
@@ -52,7 +44,6 @@ EXPORT_SYMBOL(__get_user_asm_l);
 EXPORT_SYMBOL(__get_user_asm_q);
 EXPORT_SYMBOL(__strnlen_user);
 EXPORT_SYMBOL(__strncpy_from_user);
-EXPORT_SYMBOL(clear_page);
 EXPORT_SYMBOL(__clear_user);
 EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(__copy_user);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index 04a21883f327..6729703547a1 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -41,6 +41,16 @@ struct fdpic_func_descriptor {
 };
 
 /*
+ * The following define adds a 64 byte gap between the signal
+ * stack frame and previous contents of the stack.  This allows
+ * frame unwinding in a function epilogue but only if a frame
+ * pointer is used in the function.  This is necessary because
+ * current gcc compilers (<4.3) do not generate unwind info on
+ * SH for function epilogues.
+ */
+#define UNWINDGUARD 64
+
+/*
  * Atomically swap in the new signal mask, and wait for a signal.
  */
 asmlinkage int
@@ -327,7 +337,7 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
                         sp = current->sas_ss_sp + current->sas_ss_size;
         }
 
-        return (void __user *)((sp - frame_size) & -8ul);
+        return (void __user *)((sp - (frame_size+UNWINDGUARD)) & -8ul);
 }
 
 /* These symbols are defined with the addresses in the vsyscall page.
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 9e5c9b1d7e98..74793c80a57a 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -561,13 +561,11 @@ static int setup_frame(int sig, struct k_sigaction *ka,
         /* Set up to return from userspace.  If provided, use a stub
            already in userspace.  */
         if (ka->sa.sa_flags & SA_RESTORER) {
-                DEREF_REG_PR = (unsigned long) ka->sa.sa_restorer | 0x1;
-
                 /*
                  * On SH5 all edited pointers are subject to NEFF
                  */
-                DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ?
-                        (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR;
+                DEREF_REG_PR = neff_sign_extend((unsigned long)
+                        ka->sa.sa_restorer | 0x1);
         } else {
                 /*
                  * Different approach on SH5.
@@ -580,9 +578,8 @@ static int setup_frame(int sig, struct k_sigaction *ka,
                  * . being code, linker turns ShMedia bit on, always
                  *   dereference index -1.
                  */
-                DEREF_REG_PR = (unsigned long) frame->retcode | 0x01;
-                DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ?
-                        (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR;
+                DEREF_REG_PR = neff_sign_extend((unsigned long)
+                        frame->retcode | 0x01);
 
                 if (__copy_to_user(frame->retcode,
                         (void *)((unsigned long)sa_default_restorer & (~1)), 16) != 0)
@@ -596,9 +593,7 @@ static int setup_frame(int sig, struct k_sigaction *ka,
          * Set up registers for signal handler.
          * All edited pointers are subject to NEFF.
          */
-        regs->regs[REG_SP] = (unsigned long) frame;
-        regs->regs[REG_SP] = (regs->regs[REG_SP] & NEFF_SIGN) ?
-                 (regs->regs[REG_SP] | NEFF_MASK) : regs->regs[REG_SP];
+        regs->regs[REG_SP] = neff_sign_extend((unsigned long)frame);
         regs->regs[REG_ARG1] = signal; /* Arg for signal handler */
 
         /* FIXME:
@@ -613,8 +608,7 @@ static int setup_frame(int sig, struct k_sigaction *ka,
         regs->regs[REG_ARG2] = (unsigned long long)(unsigned long)(signed long)&frame->sc;
         regs->regs[REG_ARG3] = (unsigned long long)(unsigned long)(signed long)&frame->sc;
 
-        regs->pc = (unsigned long) ka->sa.sa_handler;
-        regs->pc = (regs->pc & NEFF_SIGN) ? (regs->pc | NEFF_MASK) : regs->pc;
+        regs->pc = neff_sign_extend((unsigned long)ka->sa.sa_handler);
 
         set_fs(USER_DS);
 
@@ -676,13 +670,11 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         /* Set up to return from userspace.  If provided, use a stub
            already in userspace.  */
         if (ka->sa.sa_flags & SA_RESTORER) {
-                DEREF_REG_PR = (unsigned long) ka->sa.sa_restorer | 0x1;
-
                 /*
                  * On SH5 all edited pointers are subject to NEFF
                  */
-                DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ?
-                        (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR;
+                DEREF_REG_PR = neff_sign_extend((unsigned long)
+                        ka->sa.sa_restorer | 0x1);
         } else {
                 /*
                  * Different approach on SH5.
@@ -695,15 +687,14 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                  * . being code, linker turns ShMedia bit on, always
                  *   dereference index -1.
                  */
-
-                DEREF_REG_PR = (unsigned long) frame->retcode | 0x01;
-                DEREF_REG_PR = (DEREF_REG_PR & NEFF_SIGN) ?
-                        (DEREF_REG_PR | NEFF_MASK) : DEREF_REG_PR;
+                DEREF_REG_PR = neff_sign_extend((unsigned long)
+                        frame->retcode | 0x01);
 
                 if (__copy_to_user(frame->retcode,
                         (void *)((unsigned long)sa_default_rt_restorer & (~1)), 16) != 0)
                         goto give_sigsegv;
 
+                /* Cohere the trampoline with the I-cache. */
                 flush_icache_range(DEREF_REG_PR-1, DEREF_REG_PR-1+15);
         }
 
@@ -711,14 +702,11 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
          * Set up registers for signal handler.
          * All edited pointers are subject to NEFF.
          */
-        regs->regs[REG_SP] = (unsigned long) frame;
-        regs->regs[REG_SP] = (regs->regs[REG_SP] & NEFF_SIGN) ?
-                 (regs->regs[REG_SP] | NEFF_MASK) : regs->regs[REG_SP];
+        regs->regs[REG_SP] = neff_sign_extend((unsigned long)frame);
         regs->regs[REG_ARG1] = signal; /* Arg for signal handler */
         regs->regs[REG_ARG2] = (unsigned long long)(unsigned long)(signed long)&frame->info;
         regs->regs[REG_ARG3] = (unsigned long long)(unsigned long)(signed long)&frame->uc.uc_mcontext;
-        regs->pc = (unsigned long) ka->sa.sa_handler;
-        regs->pc = (regs->pc & NEFF_SIGN) ? (regs->pc | NEFF_MASK) : regs->pc;
+        regs->pc = neff_sign_extend((unsigned long)ka->sa.sa_handler);
 
         set_fs(USER_DS);
 
diff --git a/arch/sh/kernel/stacktrace.c b/arch/sh/kernel/stacktrace.c
index 1a2a5eb76e41..c2e45c48409c 100644
--- a/arch/sh/kernel/stacktrace.c
+++ b/arch/sh/kernel/stacktrace.c
@@ -13,47 +13,93 @@
 #include <linux/stacktrace.h>
 #include <linux/thread_info.h>
 #include <linux/module.h>
+#include <asm/unwinder.h>
 #include <asm/ptrace.h>
+#include <asm/stacktrace.h>
+
+static void save_stack_warning(void *data, char *msg)
+{
+}
+
+static void
+save_stack_warning_symbol(void *data, char *msg, unsigned long symbol)
+{
+}
+
+static int save_stack_stack(void *data, char *name)
+{
+        return 0;
+}
 
 /*
  * Save stack-backtrace addresses into a stack_trace buffer.
  */
+static void save_stack_address(void *data, unsigned long addr, int reliable)
+{
+        struct stack_trace *trace = data;
+
+        if (!reliable)
+                return;
+
+        if (trace->skip > 0) {
+                trace->skip--;
+                return;
+        }
+
+        if (trace->nr_entries < trace->max_entries)
+                trace->entries[trace->nr_entries++] = addr;
+}
+
+static const struct stacktrace_ops save_stack_ops = {
+        .warning = save_stack_warning,
+        .warning_symbol = save_stack_warning_symbol,
+        .stack = save_stack_stack,
+        .address = save_stack_address,
+};
+
 void save_stack_trace(struct stack_trace *trace)
 {
         unsigned long *sp = (unsigned long *)current_stack_pointer;
 
-        while (!kstack_end(sp)) {
-                unsigned long addr = *sp++;
-
-                if (__kernel_text_address(addr)) {
-                        if (trace->skip > 0)
-                                trace->skip--;
-                        else
-                                trace->entries[trace->nr_entries++] = addr;
-                        if (trace->nr_entries >= trace->max_entries)
-                                break;
-                }
-        }
+        unwind_stack(current, NULL, sp,  &save_stack_ops, trace);
+        if (trace->nr_entries < trace->max_entries)
+                trace->entries[trace->nr_entries++] = ULONG_MAX;
 }
 EXPORT_SYMBOL_GPL(save_stack_trace);
 
+static void
+save_stack_address_nosched(void *data, unsigned long addr, int reliable)
+{
+        struct stack_trace *trace = (struct stack_trace *)data;
+
+        if (!reliable)
+                return;
+
+        if (in_sched_functions(addr))
+                return;
+
+        if (trace->skip > 0) {
+                trace->skip--;
+                return;
+        }
+
+        if (trace->nr_entries < trace->max_entries)
+                trace->entries[trace->nr_entries++] = addr;
+}
+
+static const struct stacktrace_ops save_stack_ops_nosched = {
+        .warning = save_stack_warning,
+        .warning_symbol = save_stack_warning_symbol,
+        .stack = save_stack_stack,
+        .address = save_stack_address_nosched,
+};
+
 void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
 {
         unsigned long *sp = (unsigned long *)tsk->thread.sp;
 
-        while (!kstack_end(sp)) {
-                unsigned long addr = *sp++;
-
-                if (__kernel_text_address(addr)) {
-                        if (in_sched_functions(addr))
-                                break;
-                        if (trace->skip > 0)
-                                trace->skip--;
-                        else
-                                trace->entries[trace->nr_entries++] = addr;
-                        if (trace->nr_entries >= trace->max_entries)
-                                break;
-                }
-        }
+        unwind_stack(current, NULL, sp,  &save_stack_ops_nosched, trace);
+        if (trace->nr_entries < trace->max_entries)
+                trace->entries[trace->nr_entries++] = ULONG_MAX;
 }
 EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 90d00e47264d..8aa5d1ceaf14 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -25,6 +25,8 @@
 #include <asm/syscalls.h>
 #include <asm/uaccess.h>
 #include <asm/unistd.h>
+#include <asm/cacheflush.h>
+#include <asm/cachectl.h>
 
 static inline long
 do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
@@ -179,6 +181,47 @@ asmlinkage int sys_ipc(uint call, int first, int second,
         return -EINVAL;
 }
 
+/* sys_cacheflush -- flush (part of) the processor cache.  */
+asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
+{
+        struct vm_area_struct *vma;
+
+        if ((op <= 0) || (op > (CACHEFLUSH_D_PURGE|CACHEFLUSH_I)))
+                return -EINVAL;
+
+        /*
+         * Verify that the specified address region actually belongs
+         * to this process.
+         */
+        if (addr + len < addr)
+                return -EFAULT;
+
+        down_read(&current->mm->mmap_sem);
+        vma = find_vma (current->mm, addr);
+        if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end) {
+                up_read(&current->mm->mmap_sem);
+                return -EFAULT;
+        }
+
+        switch (op & CACHEFLUSH_D_PURGE) {
+                case CACHEFLUSH_D_INVAL:
+                        __flush_invalidate_region((void *)addr, len);
+                        break;
+                case CACHEFLUSH_D_WB:
+                        __flush_wback_region((void *)addr, len);
+                        break;
+                case CACHEFLUSH_D_PURGE:
+                        __flush_purge_region((void *)addr, len);
+                        break;
+        }
+
+        if (op & CACHEFLUSH_I)
+                flush_cache_all();
+
+        up_read(&current->mm->mmap_sem);
+        return 0;
+}
+
 asmlinkage int sys_uname(struct old_utsname __user *name)
 {
         int err;
diff --git a/arch/sh/kernel/sys_sh32.c b/arch/sh/kernel/sys_sh32.c
index 63ba12836eae..eb68bfdd86e6 100644
--- a/arch/sh/kernel/sys_sh32.c
+++ b/arch/sh/kernel/sys_sh32.c
@@ -9,7 +9,6 @@
 #include <linux/syscalls.h>
 #include <linux/mman.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/module.h>
 #include <linux/fs.h>
 #include <linux/ipc.h>
diff --git a/arch/sh/kernel/sys_sh64.c b/arch/sh/kernel/sys_sh64.c
index 91fb8445a5a0..287235768bc5 100644
--- a/arch/sh/kernel/sys_sh64.c
+++ b/arch/sh/kernel/sys_sh64.c
@@ -23,7 +23,6 @@
 #include <linux/stat.h>
 #include <linux/mman.h>
 #include <linux/file.h>
-#include <linux/utsname.h>
 #include <linux/syscalls.h>
 #include <linux/ipc.h>
 #include <asm/uaccess.h>
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index f9e21fa2f592..19fd11dd9871 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -139,7 +139,7 @@ ENTRY(sys_call_table)
         .long sys_clone         /* 120 */
         .long sys_setdomainname
         .long sys_newuname
-        .long sys_ni_syscall    /* sys_modify_ldt */
+        .long sys_cacheflush    /* x86: sys_modify_ldt */
         .long sys_adjtimex
         .long sys_mprotect              /* 125 */
         .long sys_sigprocmask
@@ -352,4 +352,4 @@ ENTRY(sys_call_table)
         .long sys_preadv
         .long sys_pwritev
         .long sys_rt_tgsigqueueinfo     /* 335 */
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index bf420b616ae0..5bfde6c77498 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -143,7 +143,7 @@ sys_call_table:
         .long sys_clone                 /* 120 */
         .long sys_setdomainname
         .long sys_newuname
-        .long sys_ni_syscall    /* sys_modify_ldt */
+        .long sys_cacheflush    /* x86: sys_modify_ldt */
         .long sys_adjtimex
         .long sys_mprotect              /* 125 */
         .long sys_sigprocmask
@@ -390,4 +390,4 @@ sys_call_table:
         .long sys_preadv
         .long sys_pwritev
         .long sys_rt_tgsigqueueinfo
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 9b352a1e3fb4..953fa1613312 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -21,6 +21,7 @@
 #include <linux/smp.h>
 #include <linux/rtc.h>
 #include <asm/clock.h>
+#include <asm/hwblk.h>
 #include <asm/rtc.h>
 
 /* Dummy RTC ops */
@@ -39,11 +40,9 @@ void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
 int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
 
 #ifdef CONFIG_GENERIC_CMOS_UPDATE
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
-        struct timespec tv;
-        rtc_sh_get_time(&tv);
-        return tv.tv_sec;
+        rtc_sh_get_time(ts);
 }
 
 int update_persistent_clock(struct timespec now)
@@ -91,21 +90,8 @@ module_init(rtc_generic_init);
 
 void (*board_time_init)(void);
 
-void __init time_init(void)
+static void __init sh_late_time_init(void)
 {
-        if (board_time_init)
-                board_time_init();
-
-        clk_init();
-
-        rtc_sh_get_time(&xtime);
-        set_normalized_timespec(&wall_to_monotonic,
-                                -xtime.tv_sec, -xtime.tv_nsec);
-
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-        local_timer_setup(smp_processor_id());
-#endif
-
         /*
          * Make sure all compiled-in early timers register themselves.
          *
@@ -118,3 +104,18 @@ void __init time_init(void)
         early_platform_driver_register_all("earlytimer");
         early_platform_driver_probe("earlytimer", 2, 0);
 }
+
+void __init time_init(void)
+{
+        if (board_time_init)
+                board_time_init();
+
+        hwblk_init();
+        clk_init();
+
+        rtc_sh_get_time(&xtime);
+        set_normalized_timespec(&wall_to_monotonic,
+                                -xtime.tv_sec, -xtime.tv_nsec);
+
+        late_time_init = sh_late_time_init;
+}
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index b3e0067db358..a8396f36bd14 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -5,18 +5,33 @@
 #include <linux/signal.h>
 #include <linux/sched.h>
 #include <linux/uaccess.h>
+#include <linux/hardirq.h>
+#include <asm/unwinder.h>
 #include <asm/system.h>
 
 #ifdef CONFIG_BUG
-static void handle_BUG(struct pt_regs *regs)
+void handle_BUG(struct pt_regs *regs)
 {
+        const struct bug_entry *bug;
+        unsigned long bugaddr = regs->pc;
         enum bug_trap_type tt;
-        tt = report_bug(regs->pc, regs);
+
+        if (!is_valid_bugaddr(bugaddr))
+                goto invalid;
+
+        bug = find_bug(bugaddr);
+
+        /* Switch unwinders when unwind_stack() is called */
+        if (bug->flags & BUGFLAG_UNWINDER)
+                unwinder_faulted = 1;
+
+        tt = report_bug(bugaddr, regs);
         if (tt == BUG_TRAP_TYPE_WARN) {
-                regs->pc += instruction_size(regs->pc);
+                regs->pc += instruction_size(bugaddr);
                 return;
         }
 
+invalid:
         die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff);
 }
 
@@ -28,8 +43,10 @@ int is_valid_bugaddr(unsigned long addr)
                 return 0;
         if (probe_kernel_address((insn_size_t *)addr, opcode))
                 return 0;
+        if (opcode == TRAPA_BUG_OPCODE)
+                return 1;
 
-        return opcode == TRAPA_BUG_OPCODE;
+        return 0;
 }
 #endif
 
@@ -75,3 +92,23 @@ BUILD_TRAP_HANDLER(bug)
 
         force_sig(SIGTRAP, current);
 }
+
+BUILD_TRAP_HANDLER(nmi)
+{
+        TRAP_HANDLER_DECL;
+
+        nmi_enter();
+
+        switch (notify_die(DIE_NMI, "NMI", regs, 0, vec & 0xff, SIGINT)) {
+        case NOTIFY_OK:
+        case NOTIFY_STOP:
+                break;
+        case NOTIFY_BAD:
+                die("Fatal Non-Maskable Interrupt", regs, SIGINT);
+        default:
+                printk(KERN_ALERT "Got NMI, but nobody cared. Ignoring...\n");
+                break;
+        }
+
+        nmi_exit();
+}
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 2b772776fcda..69bb1652eccd 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -24,6 +24,7 @@
 #include <linux/kdebug.h>
 #include <linux/kexec.h>
 #include <linux/limits.h>
+#include <linux/proc_fs.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/fpu.h>
@@ -44,6 +45,85 @@
 #define TRAP_ILLEGAL_SLOT_INST  13
 #endif
 
+static unsigned long se_user;
+static unsigned long se_sys;
+static unsigned long se_half;
+static unsigned long se_word;
+static unsigned long se_dword;
+static unsigned long se_multi;
+/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
+   valid! */
+static int se_usermode = 3;
+/* 0: no warning 1: print a warning message */
+static int se_kernmode_warn = 1;
+
+#ifdef CONFIG_PROC_FS
+static const char *se_usermode_action[] = {
+        "ignored",
+        "warn",
+        "fixup",
+        "fixup+warn",
+        "signal",
+        "signal+warn"
+};
+
+static int
+proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
+                    void *data)
+{
+        char *p = page;
+        int len;
+
+        p += sprintf(p, "User:\t\t%lu\n", se_user);
+        p += sprintf(p, "System:\t\t%lu\n", se_sys);
+        p += sprintf(p, "Half:\t\t%lu\n", se_half);
+        p += sprintf(p, "Word:\t\t%lu\n", se_word);
+        p += sprintf(p, "DWord:\t\t%lu\n", se_dword);
+        p += sprintf(p, "Multi:\t\t%lu\n", se_multi);
+        p += sprintf(p, "User faults:\t%i (%s)\n", se_usermode,
+                        se_usermode_action[se_usermode]);
+        p += sprintf(p, "Kernel faults:\t%i (fixup%s)\n", se_kernmode_warn,
+                        se_kernmode_warn ? "+warn" : "");
+
+        len = (p - page) - off;
+        if (len < 0)
+                len = 0;
+
+        *eof = (len <= count) ? 1 : 0;
+        *start = page + off;
+
+        return len;
+}
+
+static int proc_alignment_write(struct file *file, const char __user *buffer,
+                                unsigned long count, void *data)
+{
+        char mode;
+
+        if (count > 0) {
+                if (get_user(mode, buffer))
+                        return -EFAULT;
+                if (mode >= '0' && mode <= '5')
+                        se_usermode = mode - '0';
+        }
+        return count;
+}
+
+static int proc_alignment_kern_write(struct file *file, const char __user *buffer,
+                                     unsigned long count, void *data)
+{
+        char mode;
+
+        if (count > 0) {
+                if (get_user(mode, buffer))
+                        return -EFAULT;
+                if (mode >= '0' && mode <= '1')
+                        se_kernmode_warn = mode - '0';
+        }
+        return count;
+}
+#endif
+
 static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
 {
         unsigned long p;
@@ -136,6 +216,7 @@ static void die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
                         regs->pc = fixup->fixup;
                         return;
                 }
+
                 die(str, regs, err);
         }
 }
@@ -193,6 +274,13 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
 
         count = 1<<(instruction&3);
 
+        switch (count) {
+        case 1: se_half  += 1; break;
+        case 2: se_word  += 1; break;
+        case 4: se_dword += 1; break;
+        case 8: se_multi += 1; break; /* ??? */
+        }
+
         ret = -EFAULT;
         switch (instruction>>12) {
         case 0: /* mov.[bwl] to/from memory via r0+rn */
@@ -358,31 +446,28 @@ static inline int handle_delayslot(struct pt_regs *regs,
 #define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
 #define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
 
-/*
- * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
- * opcodes..
- */
-
-static int handle_unaligned_notify_count = 10;
-
 int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
-                            struct mem_access *ma)
+                            struct mem_access *ma, int expected)
 {
         u_int rm;
         int ret, index;
 
+        /*
+         * XXX: We can't handle mixed 16/32-bit instructions yet
+         */
+        if (instruction_size(instruction) != 2)
+                return -EINVAL;
+
         index = (instruction>>8)&15;    /* 0x0F00 */
         rm = regs->regs[index];
 
-        /* shout about the first ten userspace fixups */
-        if (user_mode(regs) && handle_unaligned_notify_count>0) {
-                handle_unaligned_notify_count--;
-
-                printk(KERN_NOTICE "Fixing up unaligned userspace access "
+        /* shout about fixups */
+        if (!expected && printk_ratelimit())
+                printk(KERN_NOTICE "Fixing up unaligned %s access "
                        "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
+                       user_mode(regs) ? "userspace" : "kernel",
                        current->comm, task_pid_nr(current),
                        (void *)regs->pc, instruction);
-        }
 
         ret = -EFAULT;
         switch (instruction&0xF000) {
@@ -538,24 +623,44 @@ asmlinkage void do_address_error(struct pt_regs *regs,
 
                 local_irq_enable();
 
-                /* bad PC is not something we can fix */
-                if (regs->pc & 1) {
-                        si_code = BUS_ADRALN;
-                        goto uspace_segv;
-                }
+                se_user += 1;
 
                 set_fs(USER_DS);
-                if (copy_from_user(&instruction, (void __user *)(regs->pc),
+                if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1),
                                    sizeof(instruction))) {
-                        /* Argh. Fault on the instruction itself.
-                           This should never happen non-SMP
-                        */
                         set_fs(oldfs);
                         goto uspace_segv;
                 }
+                set_fs(oldfs);
+
+                /* shout about userspace fixups */
+                if (se_usermode & 1)
+                        printk(KERN_NOTICE "Unaligned userspace access "
+                               "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
+                               current->comm, current->pid, (void *)regs->pc,
+                               instruction);
+
+                if (se_usermode & 2)
+                        goto fixup;
 
+                if (se_usermode & 4)
+                        goto uspace_segv;
+                else {
+                        /* ignore */
+                        regs->pc += instruction_size(instruction);
+                        return;
+                }
+
+fixup:
+                /* bad PC is not something we can fix */
+                if (regs->pc & 1) {
+                        si_code = BUS_ADRALN;
+                        goto uspace_segv;
+                }
+
+                set_fs(USER_DS);
                 tmp = handle_unaligned_access(instruction, regs,
-                                              &user_mem_access);
+                                              &user_mem_access, 0);
                 set_fs(oldfs);
 
                 if (tmp==0)
@@ -571,6 +676,8 @@ uspace_segv:
                 info.si_addr = (void __user *)address;
                 force_sig_info(SIGBUS, &info, current);
         } else {
+                se_sys += 1;
+
                 if (regs->pc & 1)
                         die("unaligned program counter", regs, error_code);
 
@@ -584,7 +691,14 @@ uspace_segv:
                         die("insn faulting in do_address_error", regs, 0);
                 }
 
-                handle_unaligned_access(instruction, regs, &user_mem_access);
+                if (se_kernmode_warn)
+                        printk(KERN_NOTICE "Unaligned kernel access "
+                               "on behalf of \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
+                               current->comm, current->pid, (void *)regs->pc,
+                               instruction);
+
+                handle_unaligned_access(instruction, regs,
+                                        &user_mem_access, 0);
                 set_fs(oldfs);
         }
 }
@@ -858,30 +972,6 @@ void __init trap_init(void)
         per_cpu_trap_init();
 }
 
-void show_trace(struct task_struct *tsk, unsigned long *sp,
-                struct pt_regs *regs)
-{
-        unsigned long addr;
-
-        if (regs && user_mode(regs))
-                return;
-
-        printk("\nCall trace:\n");
-
-        while (!kstack_end(sp)) {
-                addr = *sp++;
-                if (kernel_text_address(addr))
-                        print_ip_sym(addr);
-        }
-
-        printk("\n");
-
-        if (!tsk)
-                tsk = current;
-
-        debug_show_held_locks(tsk);
-}
-
 void show_stack(struct task_struct *tsk, unsigned long *sp)
 {
         unsigned long stack;
@@ -904,3 +994,38 @@ void dump_stack(void)
         show_stack(NULL, NULL);
 }
 EXPORT_SYMBOL(dump_stack);
+
+#ifdef CONFIG_PROC_FS
+/*
+ * This needs to be done after sysctl_init, otherwise sys/ will be
+ * overwritten.  Actually, this shouldn't be in sys/ at all since
+ * it isn't a sysctl, and it doesn't contain sysctl information.
+ * We now locate it in /proc/cpu/alignment instead.
+ */
+static int __init alignment_init(void)
+{
+        struct proc_dir_entry *dir, *res;
+
+        dir = proc_mkdir("cpu", NULL);
+        if (!dir)
+                return -ENOMEM;
+
+        res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, dir);
+        if (!res)
+                return -ENOMEM;
+
+        res->read_proc = proc_alignment_read;
+        res->write_proc = proc_alignment_write;
+
+        res = create_proc_entry("kernel_alignment", S_IWUSR | S_IRUGO, dir);
+        if (!res)
+                return -ENOMEM;
+
+        res->read_proc = proc_alignment_read;
+        res->write_proc = proc_alignment_kern_write;
+
+        return 0;
+}
+
+fs_initcall(alignment_init);
+#endif
diff --git a/arch/sh/kernel/unwinder.c b/arch/sh/kernel/unwinder.c
new file mode 100644
index 000000000000..468889d958f4
--- /dev/null
+++ b/arch/sh/kernel/unwinder.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2009  Matt Fleming
+ *
+ * Based, in part, on kernel/time/clocksource.c.
+ *
+ * This file provides arbitration code for stack unwinders.
+ *
+ * Multiple stack unwinders can be available on a system, usually with
+ * the most accurate unwinder being the currently active one.
+ */
+#include <linux/errno.h>
+#include <linux/list.h>
+#include <linux/spinlock.h>
+#include <linux/module.h>
+#include <asm/unwinder.h>
+#include <asm/atomic.h>
+
+/*
+ * This is the most basic stack unwinder an architecture can
+ * provide. For architectures without reliable frame pointers, e.g.
+ * RISC CPUs, it can be implemented by looking through the stack for
+ * addresses that lie within the kernel text section.
+ *
+ * Other CPUs, e.g. x86, can use their frame pointer register to
+ * construct more accurate stack traces.
+ */
+static struct list_head unwinder_list;
+static struct unwinder stack_reader = {
+        .name = "stack-reader",
+        .dump = stack_reader_dump,
+        .rating = 50,
+        .list = {
+                .next = &unwinder_list,
+                .prev = &unwinder_list,
+        },
+};
+
+/*
+ * "curr_unwinder" points to the stack unwinder currently in use. This
+ * is the unwinder with the highest rating.
+ *
+ * "unwinder_list" is a linked-list of all available unwinders, sorted
+ * by rating.
+ *
+ * All modifications of "curr_unwinder" and "unwinder_list" must be
+ * performed whilst holding "unwinder_lock".
+ */
+static struct unwinder *curr_unwinder = &stack_reader;
+
+static struct list_head unwinder_list = {
+        .next = &stack_reader.list,
+        .prev = &stack_reader.list,
+};
+
+static DEFINE_SPINLOCK(unwinder_lock);
+
+/**
+ * select_unwinder - Select the best registered stack unwinder.
+ *
+ * Private function. Must hold unwinder_lock when called.
+ *
+ * Select the stack unwinder with the best rating. This is useful for
+ * setting up curr_unwinder.
+ */
+static struct unwinder *select_unwinder(void)
+{
+        struct unwinder *best;
+
+        if (list_empty(&unwinder_list))
+                return NULL;
+
+        best = list_entry(unwinder_list.next, struct unwinder, list);
+        if (best == curr_unwinder)
+                return NULL;
+
+        return best;
+}
+
+/*
+ * Enqueue the stack unwinder sorted by rating.
+ */
+static int unwinder_enqueue(struct unwinder *ops)
+{
+        struct list_head *tmp, *entry = &unwinder_list;
+
+        list_for_each(tmp, &unwinder_list) {
+                struct unwinder *o;
+
+                o = list_entry(tmp, struct unwinder, list);
+                if (o == ops)
+                        return -EBUSY;
+                /* Keep track of the place, where to insert */
+                if (o->rating >= ops->rating)
+                        entry = tmp;
+        }
+        list_add(&ops->list, entry);
+
+        return 0;
+}
+
+/**
+ * unwinder_register - Used to install new stack unwinder
+ * @u: unwinder to be registered
+ *
+ * Install the new stack unwinder on the unwinder list, which is sorted
+ * by rating.
+ *
+ * Returns -EBUSY if registration fails, zero otherwise.
+ */
+int unwinder_register(struct unwinder *u)
+{
+        unsigned long flags;
+        int ret;
+
+        spin_lock_irqsave(&unwinder_lock, flags);
+        ret = unwinder_enqueue(u);
+        if (!ret)
+                curr_unwinder = select_unwinder();
+        spin_unlock_irqrestore(&unwinder_lock, flags);
+
+        return ret;
+}
+
+int unwinder_faulted = 0;
+
+/*
+ * Unwind the call stack and pass information to the stacktrace_ops
+ * functions. Also handle the case where we need to switch to a new
+ * stack dumper because the current one faulted unexpectedly.
+ */
+void unwind_stack(struct task_struct *task, struct pt_regs *regs,
+                  unsigned long *sp, const struct stacktrace_ops *ops,
+                  void *data)
+{
+        unsigned long flags;
+
+        /*
+         * The problem with unwinders with high ratings is that they are
+         * inherently more complicated than the simple ones with lower
+         * ratings. We are therefore more likely to fault in the
+         * complicated ones, e.g. hitting BUG()s. If we fault in the
+         * code for the current stack unwinder we try to downgrade to
+         * one with a lower rating.
+         *
+         * Hopefully this will give us a semi-reliable stacktrace so we
+         * can diagnose why curr_unwinder->dump() faulted.
+         */
+        if (unwinder_faulted) {
+                spin_lock_irqsave(&unwinder_lock, flags);
+
+                /* Make sure no one beat us to changing the unwinder */
+                if (unwinder_faulted && !list_is_singular(&unwinder_list)) {
+                        list_del(&curr_unwinder->list);
+                        curr_unwinder = select_unwinder();
+
+                        unwinder_faulted = 0;
+                }
+
+                spin_unlock_irqrestore(&unwinder_lock, flags);
+        }
+
+        curr_unwinder->dump(task, regs, sp, ops, data);
+}
+EXPORT_SYMBOL_GPL(unwind_stack);
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index 0ce254bca92f..a1e4ec24f1f5 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -12,7 +12,7 @@ OUTPUT_ARCH(sh)
 
 #include <asm/thread_info.h>
 #include <asm/cache.h>
-#include <asm-generic/vmlinux.lds.h>
+#include <asm/vmlinux.lds.h>
 
 ENTRY(_start)
 SECTIONS
@@ -50,12 +50,7 @@ SECTIONS
                 _etext = .;             /* End of text section */
         } = 0x0009
 
-        . = ALIGN(16);          /* Exception table */
-        __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
+        EXCEPTION_TABLE(16)
 
         NOTES
         RO_DATA(PAGE_SIZE)
@@ -71,69 +66,16 @@ SECTIONS
                 __uncached_end = .;
         }
 
-        . = ALIGN(THREAD_SIZE);
-        .data : AT(ADDR(.data) - LOAD_OFFSET) {         /* Data */
-                *(.data.init_task)
-
-                . = ALIGN(L1_CACHE_BYTES);
-                *(.data.cacheline_aligned)
-
-                . = ALIGN(L1_CACHE_BYTES);
-                *(.data.read_mostly)
-
-                . = ALIGN(PAGE_SIZE);
-                *(.data.page_aligned)
-
-                __nosave_begin = .;
-                *(.data.nosave)
-                . = ALIGN(PAGE_SIZE);
-                __nosave_end = .;
-
-                DATA_DATA
-                CONSTRUCTORS
-        }
+        RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
 
         _edata = .;                     /* End of data section */
 
-        . = ALIGN(PAGE_SIZE);           /* Init code and data */
-        .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
-                __init_begin = .;
-                _sinittext = .;
-                INIT_TEXT
-                _einittext = .;
-        }
-
-        .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { INIT_DATA }
-
-        . = ALIGN(16);
-        .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
-        }
-
-        .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
-        }
-
-        .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
-        }
-
-        SECURITY_INIT
+        DWARF_EH_FRAME
 
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
-        .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
-        }
-#endif
+        . = ALIGN(PAGE_SIZE);           /* Init code and data */
+        __init_begin = .;
+        INIT_TEXT_SECTION(PAGE_SIZE)
+        INIT_DATA_SECTION(16)
 
         . = ALIGN(4);
         .machvec.init : AT(ADDR(.machvec.init) - LOAD_OFFSET) {
@@ -152,25 +94,13 @@ SECTIONS
         .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { EXIT_DATA }
 
         . = ALIGN(PAGE_SIZE);
-        .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
-                __init_end = .;
-                __bss_start = .;                /* BSS */
-                *(.bss.page_aligned)
-                *(.bss)
-                *(COMMON)
-                . = ALIGN(4);
-                _ebss = .;                      /* uClinux MTD sucks */
-                _end = . ;
-        }
+        __init_end = .;
+        BSS_SECTION(0, PAGE_SIZE, 4)
+        _ebss = .;                      /* uClinux MTD sucks */
+        _end = . ;
 
         STABS_DEBUG
         DWARF_DEBUG
 
-        /*
-         * When something in the kernel is NOT compiled as a module, the
-         * module cleanup code and data are put into these segments. Both
-         * can then be thrown away, as cleanup code is never called unless
-         * it's a module.
-         */
         DISCARDS
 }
diff --git a/arch/sh/kernel/vsyscall/Makefile b/arch/sh/kernel/vsyscall/Makefile
index 4bbce1cfa359..8f0ea5fc835c 100644
--- a/arch/sh/kernel/vsyscall/Makefile
+++ b/arch/sh/kernel/vsyscall/Makefile
@@ -15,7 +15,7 @@ quiet_cmd_syscall = SYSCALL $@
 export CPPFLAGS_vsyscall.lds += -P -C -Ush
 
 vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \
-                $(call ld-option, -Wl$(comma)--hash-style=sysv)
+                $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 
 SYSCFLAGS_vsyscall-trapa.so     = $(vsyscall-flags)
 
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index aaea580b65bb..a969b47c5463 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -23,8 +23,8 @@ obj-y				+= io.o
 memcpy-y                        := memcpy.o
 memcpy-$(CONFIG_CPU_SH4)        := memcpy-sh4.o
 
-lib-$(CONFIG_MMU)               += copy_page.o clear_page.o
-lib-$(CONFIG_FUNCTION_TRACER)   += mcount.o
+lib-$(CONFIG_MMU)               += copy_page.o __clear_user.o
+lib-$(CONFIG_MCOUNT)            += mcount.o
 lib-y                           += $(memcpy-y) $(udivsi3-y)
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/lib/clear_page.S b/arch/sh/lib/__clear_user.S
index 8342bfbde64c..db1dca7aad14 100644
--- a/arch/sh/lib/clear_page.S
+++ b/arch/sh/lib/__clear_user.S
@@ -8,56 +8,10 @@
 #include <linux/linkage.h>
 #include <asm/page.h>
 
-/*
- * clear_page
- * @to: P1 address
- *
- * void clear_page(void *to)
- */
-
-/*
- * r0 --- scratch
- * r4 --- to
- * r5 --- to + PAGE_SIZE
- */
-ENTRY(clear_page)
-        mov     r4,r5
-        mov.l   .Llimit,r0
-        add     r0,r5
-        mov     #0,r0
-        !
-1:
-#if defined(CONFIG_CPU_SH4)
-        movca.l r0,@r4
-        mov     r4,r1
-#else
-        mov.l   r0,@r4
-#endif
-        add     #32,r4
-        mov.l   r0,@-r4
-        mov.l   r0,@-r4
-        mov.l   r0,@-r4
-        mov.l   r0,@-r4
-        mov.l   r0,@-r4
-        mov.l   r0,@-r4
-        mov.l   r0,@-r4
-#if defined(CONFIG_CPU_SH4)
-        ocbwb   @r1
-#endif
-        cmp/eq  r5,r4
-        bf/s    1b
-         add    #28,r4
-        !
-        rts
-         nop
-
-        .balign 4
-.Llimit:        .long   (PAGE_SIZE-28)
-
 ENTRY(__clear_user)
         !
         mov     #0, r0
-        mov     #0xe0, r1       ! 0xffffffe0
+        mov     #0xffffffe0, r1
         !
         ! r4..(r4+31)&~32          -------- not aligned [ Area 0 ]
         ! (r4+31)&~32..(r4+r5)&~32 -------- aligned     [ Area 1 ]
diff --git a/arch/sh/lib/copy_page.S b/arch/sh/lib/copy_page.S
index 43de7e8e4e17..9d7b8bc51866 100644
--- a/arch/sh/lib/copy_page.S
+++ b/arch/sh/lib/copy_page.S
@@ -30,7 +30,9 @@ ENTRY(copy_page)
         mov     r4,r10
         mov     r5,r11
         mov     r5,r8
-        mov.l   .Lpsz,r0
+        mov     #(PAGE_SIZE >> 10), r0
+        shll8   r0
+        shll2   r0
         add     r0,r8
         !
 1:      mov.l   @r11+,r0
@@ -43,7 +45,6 @@ ENTRY(copy_page)
         mov.l   @r11+,r7
 #if defined(CONFIG_CPU_SH4)
         movca.l r0,@r10
-        mov     r10,r0
 #else
         mov.l   r0,@r10
 #endif
@@ -55,9 +56,6 @@ ENTRY(copy_page)
         mov.l   r3,@-r10
         mov.l   r2,@-r10
         mov.l   r1,@-r10
-#if defined(CONFIG_CPU_SH4)
-        ocbwb   @r0
-#endif
         cmp/eq  r11,r8
         bf/s    1b
          add    #28,r10
@@ -68,9 +66,6 @@ ENTRY(copy_page)
         rts
          nop
 
-        .balign 4
-.Lpsz:  .long   PAGE_SIZE
-
 /*
  * __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
  * Return the number of bytes NOT copied
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c
index f3ddd2133e6f..faa8f86c0db4 100644
--- a/arch/sh/lib/delay.c
+++ b/arch/sh/lib/delay.c
@@ -21,13 +21,14 @@ void __delay(unsigned long loops)
 
 inline void __const_udelay(unsigned long xloops)
 {
+        xloops *= 4;
         __asm__("dmulu.l        %0, %2\n\t"
                 "sts    mach, %0"
                 : "=r" (xloops)
                 : "0" (xloops),
-                  "r" (HZ * cpu_data[raw_smp_processor_id()].loops_per_jiffy)
+                  "r" (cpu_data[raw_smp_processor_id()].loops_per_jiffy * (HZ/4))
                 : "macl", "mach");
-        __delay(xloops);
+        __delay(++xloops);
 }
 
 void __udelay(unsigned long usecs)
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S
index 110fbfe1831f..84a57761f17e 100644
--- a/arch/sh/lib/mcount.S
+++ b/arch/sh/lib/mcount.S
@@ -1,14 +1,16 @@
 /*
  * arch/sh/lib/mcount.S
  *
- *  Copyright (C) 2008  Paul Mundt
- *  Copyright (C) 2008  Matt Fleming
+ *  Copyright (C) 2008, 2009  Paul Mundt
+ *  Copyright (C) 2008, 2009  Matt Fleming
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
 #include <asm/ftrace.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
 
 #define MCOUNT_ENTER()          \
         mov.l   r4, @-r15;      \
@@ -28,6 +30,55 @@
         rts;                    \
          mov.l  @r15+, r4
 
+#ifdef CONFIG_STACK_DEBUG
+/*
+ * Perform diagnostic checks on the state of the kernel stack.
+ *
+ * Check for stack overflow. If there is less than 1KB free
+ * then it has overflowed.
+ *
+ * Make sure the stack pointer contains a valid address. Valid
+ * addresses for kernel stacks are anywhere after the bss
+ * (after _ebss) and anywhere in init_thread_union (init_stack).
+ */
+#define STACK_CHECK()                                   \
+        mov     #(THREAD_SIZE >> 10), r0;               \
+        shll8   r0;                                     \
+        shll2   r0;                                     \
+                                                        \
+        /* r1 = sp & (THREAD_SIZE - 1) */               \
+        mov     #-1, r1;                                \
+        add     r0, r1;                                 \
+        and     r15, r1;                                \
+                                                        \
+        mov     #TI_SIZE, r3;                           \
+        mov     #(STACK_WARN >> 8), r2;                 \
+        shll8   r2;                                     \
+        add     r3, r2;                                 \
+                                                        \
+        /* Is the stack overflowing? */                 \
+        cmp/hi  r2, r1;                                 \
+        bf      stack_panic;                            \
+                                                        \
+        /* If sp > _ebss then we're OK. */              \
+        mov.l   .L_ebss, r1;                            \
+        cmp/hi  r1, r15;                                \
+        bt      1f;                                     \
+                                                        \
+        /* If sp < init_stack, we're not OK. */         \
+        mov.l   .L_init_thread_union, r1;               \
+        cmp/hs  r1, r15;                                \
+        bf      stack_panic;                            \
+                                                        \
+        /* If sp > init_stack && sp < _ebss, not OK. */ \
+        add     r0, r1;                                 \
+        cmp/hs  r1, r15;                                \
+        bt      stack_panic;                            \
+1:
+#else
+#define STACK_CHECK()
+#endif /* CONFIG_STACK_DEBUG */
+
         .align 2
         .globl  _mcount
         .type   _mcount,@function
@@ -35,6 +86,19 @@
         .type   mcount,@function
 _mcount:
 mcount:
+        STACK_CHECK()
+
+#ifndef CONFIG_FUNCTION_TRACER
+        rts
+         nop
+#else
+#ifndef CONFIG_DYNAMIC_FTRACE
+        mov.l   .Lfunction_trace_stop, r0
+        mov.l   @r0, r0
+        tst     r0, r0
+        bf      ftrace_stub
+#endif
+
         MCOUNT_ENTER()
 
 #ifdef CONFIG_DYNAMIC_FTRACE
@@ -52,16 +116,69 @@ mcount_call:
         jsr     @r6
          nop
 
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        mov.l   .Lftrace_graph_return, r6
+        mov.l   .Lftrace_stub, r7
+        cmp/eq  r6, r7
+        bt      1f
+
+        mov.l   .Lftrace_graph_caller, r0
+        jmp     @r0
+         nop
+
+1:
+        mov.l   .Lftrace_graph_entry, r6
+        mov.l   .Lftrace_graph_entry_stub, r7
+        cmp/eq  r6, r7
+        bt      skip_trace
+
+        mov.l   .Lftrace_graph_caller, r0
+        jmp     @r0
+         nop
+
+        .align 2
+.Lftrace_graph_return:
+        .long   ftrace_graph_return
+.Lftrace_graph_entry:
+        .long   ftrace_graph_entry
+.Lftrace_graph_entry_stub:
+        .long   ftrace_graph_entry_stub
+.Lftrace_graph_caller:
+        .long   ftrace_graph_caller
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
+        .globl skip_trace
 skip_trace:
         MCOUNT_LEAVE()
 
         .align 2
 .Lftrace_trace_function:
-        .long   ftrace_trace_function
+        .long   ftrace_trace_function
 
 #ifdef CONFIG_DYNAMIC_FTRACE
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+/*
+ * NOTE: Do not move either ftrace_graph_call or ftrace_caller
+ * as this will affect the calculation of GRAPH_INSN_OFFSET.
+ */
+        .globl ftrace_graph_call
+ftrace_graph_call:
+        mov.l   .Lskip_trace, r0
+        jmp     @r0
+         nop
+
+        .align 2
+.Lskip_trace:
+        .long   skip_trace
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
         .globl ftrace_caller
 ftrace_caller:
+        mov.l   .Lfunction_trace_stop, r0
+        mov.l   @r0, r0
+        tst     r0, r0
+        bf      ftrace_stub
+
         MCOUNT_ENTER()
 
         .globl ftrace_call
@@ -70,9 +187,18 @@ ftrace_call:
         jsr     @r6
          nop
 
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        bra     ftrace_graph_call
+         nop
+#else
         MCOUNT_LEAVE()
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
 #endif /* CONFIG_DYNAMIC_FTRACE */
 
+        .align 2
+.Lfunction_trace_stop:
+        .long   function_trace_stop
+
 /*
  * NOTE: From here on the locations of the .Lftrace_stub label and
  * ftrace_stub itself are fixed. Adding additional data here will skew
@@ -80,7 +206,6 @@ ftrace_call:
  * Place new labels either after the ftrace_stub body, or before
  * ftrace_caller. You have been warned.
  */
-        .align 2
 .Lftrace_stub:
         .long   ftrace_stub
 
@@ -88,3 +213,98 @@ ftrace_call:
 ftrace_stub:
         rts
          nop
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        .globl  ftrace_graph_caller
+ftrace_graph_caller:
+        mov.l   2f, r0
+        mov.l   @r0, r0
+        tst     r0, r0
+        bt      1f
+
+        mov.l   3f, r1
+        jmp     @r1
+         nop
+1:
+        /*
+         * MCOUNT_ENTER() pushed 5 registers onto the stack, so
+         * the stack address containing our return address is
+         * r15 + 20.
+         */
+        mov     #20, r0
+        add     r15, r0
+        mov     r0, r4
+
+        mov.l   .Lprepare_ftrace_return, r0
+        jsr     @r0
+         nop
+
+        MCOUNT_LEAVE()
+
+        .align 2
+2:      .long   function_trace_stop
+3:      .long   skip_trace
+.Lprepare_ftrace_return:
+        .long   prepare_ftrace_return
+
+        .globl  return_to_handler
+return_to_handler:
+        /*
+         * Save the return values.
+         */
+        mov.l   r0, @-r15
+        mov.l   r1, @-r15
+
+        mov     #0, r4
+
+        mov.l   .Lftrace_return_to_handler, r0
+        jsr     @r0
+         nop
+
+        /*
+         * The return value from ftrace_return_handler has the real
+         * address that we should return to.
+         */
+        lds     r0, pr
+        mov.l   @r15+, r1
+        rts
+         mov.l  @r15+, r0
+
+
+        .align 2
+.Lftrace_return_to_handler:
+        .long   ftrace_return_to_handler
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+#endif /* CONFIG_FUNCTION_TRACER */
+
+#ifdef CONFIG_STACK_DEBUG
+        .globl  stack_panic
+stack_panic:
+        mov.l   .Ldump_stack, r0
+        jsr     @r0
+         nop
+
+        mov.l   .Lpanic, r0
+        jsr     @r0
+         mov.l  .Lpanic_s, r4
+
+        rts
+         nop
+
+        .align 2
+.L_ebss:
+        .long   _ebss
+.L_init_thread_union:
+        .long   init_thread_union
+.Lpanic:
+        .long   panic
+.Lpanic_s:
+        .long   .Lpanic_str
+.Ldump_stack:
+        .long   dump_stack
+
+        .section        .rodata
+        .align 2
+.Lpanic_str:
+        .string "Stack error"
+#endif /* CONFIG_STACK_DEBUG */
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile
index 334bb2da36ea..1fee75aa1f98 100644
--- a/arch/sh/lib64/Makefile
+++ b/arch/sh/lib64/Makefile
@@ -11,7 +11,7 @@
 
 # Panic should really be compiled as PIC
 lib-y  := udelay.o dbg.o panic.o memcpy.o memset.o \
-          copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o
+          copy_user_memcpy.o copy_page.o strcpy.o strlen.o
 
 # Extracted from libgcc
 lib-y   += udivsi3.o udivdi3.o sdivsi3.o
diff --git a/arch/sh/lib64/clear_page.S b/arch/sh/lib64/clear_page.S
deleted file mode 100644
index 007ab48ecc1c..000000000000
--- a/arch/sh/lib64/clear_page.S
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
-   Copyright 2003 Richard Curnow, SuperH (UK) Ltd.
-
-   This file is subject to the terms and conditions of the GNU General Public
-   License.  See the file "COPYING" in the main directory of this archive
-   for more details.
-
-   Tight version of memset for the case of just clearing a page.  It turns out
-   that having the alloco's spaced out slightly due to the increment/branch
-   pair causes them to contend less for access to the cache.  Similarly,
-   keeping the stores apart from the allocos causes less contention.  => Do two
-   separate loops.  Do multiple stores per loop to amortise the
-   increment/branch cost a little.
-
-   Parameters:
-   r2 : source effective address (start of page)
-
-   Always clears 4096 bytes.
-
-   Note : alloco guarded by synco to avoid TAKum03020 erratum
-
-*/
-
-        .section .text..SHmedia32,"ax"
-        .little
-
-        .balign 8
-        .global clear_page
-clear_page:
-        pta/l 1f, tr1
-        pta/l 2f, tr2
-        ptabs/l r18, tr0
-
-        movi 4096, r7
-        add  r2, r7, r7
-        add  r2, r63, r6
-1:
-        alloco r6, 0
-        synco   ! TAKum03020
-        addi    r6, 32, r6
-        bgt/l   r7, r6, tr1
-
-        add  r2, r63, r6
-2:
-        st.q  r6,   0, r63
-        st.q  r6,   8, r63
-        st.q  r6,  16, r63
-        st.q  r6,  24, r63
-        addi r6, 32, r6
-        bgt/l r7, r6, tr2
-
-        blink tr0, r63
-
-
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 2795618e4f07..64dc1ad59801 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -82,7 +82,7 @@ config 32BIT
 
 config PMB_ENABLE
         bool "Support 32-bit physical addressing through PMB"
-        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
+        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
         select 32BIT
         default y
         help
@@ -97,7 +97,7 @@ choice
 
 config PMB
         bool "PMB"
-        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
+        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
         select 32BIT
         help
           If you say Y here, physical addressing will be extended to
@@ -106,7 +106,8 @@ config PMB
 
 config PMB_FIXED
         bool "fixed PMB"
-        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || \
+        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7757 || \
+                                           CPU_SUBTYPE_SH7780 || \
                                            CPU_SUBTYPE_SH7785)
         select 32BIT
         help
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 9f4bc3d90b1e..3759bf853293 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -1,5 +1,65 @@
-ifeq ($(CONFIG_SUPERH32),y)
-include ${srctree}/arch/sh/mm/Makefile_32
-else
-include ${srctree}/arch/sh/mm/Makefile_64
+#
+# Makefile for the Linux SuperH-specific parts of the memory manager.
+#
+
+obj-y                   := cache.o init.o consistent.o mmap.o
+
+cacheops-$(CONFIG_CPU_SH2)              := cache-sh2.o
+cacheops-$(CONFIG_CPU_SH2A)             := cache-sh2a.o
+cacheops-$(CONFIG_CPU_SH3)              := cache-sh3.o
+cacheops-$(CONFIG_CPU_SH4)              := cache-sh4.o flush-sh4.o
+cacheops-$(CONFIG_CPU_SH5)              := cache-sh5.o flush-sh4.o
+cacheops-$(CONFIG_SH7705_CACHE_32KB)    += cache-sh7705.o
+
+obj-y                   += $(cacheops-y)
+
+mmu-y                   := nommu.o extable_32.o
+mmu-$(CONFIG_MMU)       := extable_$(BITS).o fault_$(BITS).o \
+                           ioremap_$(BITS).o kmap.o tlbflush_$(BITS).o
+
+obj-y                   += $(mmu-y)
+obj-$(CONFIG_DEBUG_FS)  += asids-debugfs.o
+
+ifdef CONFIG_DEBUG_FS
+obj-$(CONFIG_CPU_SH4)   += cache-debugfs.o
 endif
+
+ifdef CONFIG_MMU
+tlb-$(CONFIG_CPU_SH3)           := tlb-sh3.o
+tlb-$(CONFIG_CPU_SH4)           := tlb-sh4.o
+tlb-$(CONFIG_CPU_SH5)           := tlb-sh5.o
+tlb-$(CONFIG_CPU_HAS_PTEAEX)    := tlb-pteaex.o
+obj-y                           += $(tlb-y)
+endif
+
+obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
+obj-$(CONFIG_PMB)               += pmb.o
+obj-$(CONFIG_PMB_FIXED)         += pmb-fixed.o
+obj-$(CONFIG_NUMA)              += numa.o
+
+# Special flags for fault_64.o.  This puts restrictions on the number of
+# caller-save registers that the compiler can target when building this file.
+# This is required because the code is called from a context in entry.S where
+# very few registers have been saved in the exception handler (for speed
+# reasons).
+# The caller save registers that have been saved and which can be used are
+# r2,r3,r4,r5 : argument passing
+# r15, r18 : SP and LINK
+# tr0-4 : allow all caller-save TR's.  The compiler seems to be able to make
+#         use of them, so it's probably beneficial to performance to save them
+#         and have them available for it.
+#
+# The resources not listed below are callee save, i.e. the compiler is free to
+# use any of them and will spill them to the stack itself.
+
+CFLAGS_fault_64.o += -ffixed-r7 \
+        -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \
+        -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \
+        -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \
+        -ffixed-r24 -ffixed-r25 -ffixed-r26 -ffixed-r27 \
+        -ffixed-r36 -ffixed-r37 -ffixed-r38 -ffixed-r39 -ffixed-r40 \
+        -ffixed-r41 -ffixed-r42 -ffixed-r43  \
+        -ffixed-r60 -ffixed-r61 -ffixed-r62 \
+        -fomit-frame-pointer
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
deleted file mode 100644
index 986a1e055834..000000000000
--- a/arch/sh/mm/Makefile_32
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# Makefile for the Linux SuperH-specific parts of the memory manager.
-#
-
-obj-y                   := init.o extable_32.o consistent.o mmap.o
-
-ifndef CONFIG_CACHE_OFF
-cache-$(CONFIG_CPU_SH2)         := cache-sh2.o
-cache-$(CONFIG_CPU_SH2A)        := cache-sh2a.o
-cache-$(CONFIG_CPU_SH3)         := cache-sh3.o
-cache-$(CONFIG_CPU_SH4)         := cache-sh4.o
-cache-$(CONFIG_SH7705_CACHE_32KB)       += cache-sh7705.o
-endif
-
-obj-y                   += $(cache-y)
-
-mmu-y                   := tlb-nommu.o pg-nommu.o
-mmu-$(CONFIG_MMU)       := fault_32.o tlbflush_32.o ioremap_32.o
-
-obj-y                   += $(mmu-y)
-obj-$(CONFIG_DEBUG_FS)  += asids-debugfs.o
-
-ifdef CONFIG_DEBUG_FS
-obj-$(CONFIG_CPU_SH4)   += cache-debugfs.o
-endif
-
-ifdef CONFIG_MMU
-tlb-$(CONFIG_CPU_SH3)           := tlb-sh3.o
-tlb-$(CONFIG_CPU_SH4)           := tlb-sh4.o
-tlb-$(CONFIG_CPU_HAS_PTEAEX)    := tlb-pteaex.o
-obj-y                           += $(tlb-y)
-ifndef CONFIG_CACHE_OFF
-obj-$(CONFIG_CPU_SH4)           += pg-sh4.o
-obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
-endif
-endif
-
-obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
-obj-$(CONFIG_PMB)               += pmb.o
-obj-$(CONFIG_PMB_FIXED)         += pmb-fixed.o
-obj-$(CONFIG_NUMA)              += numa.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
deleted file mode 100644
index 2863ffb7006d..000000000000
--- a/arch/sh/mm/Makefile_64
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# Makefile for the Linux SuperH-specific parts of the memory manager.
-#
-
-obj-y                   := init.o consistent.o mmap.o
-
-mmu-y                   := tlb-nommu.o pg-nommu.o extable_32.o
-mmu-$(CONFIG_MMU)       := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
-                           extable_64.o
-
-ifndef CONFIG_CACHE_OFF
-obj-y                   += cache-sh5.o
-endif
-
-obj-y                   += $(mmu-y)
-obj-$(CONFIG_DEBUG_FS)  += asids-debugfs.o
-
-obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
-obj-$(CONFIG_NUMA)              += numa.o
-
-EXTRA_CFLAGS += -Werror
-
-# Special flags for fault_64.o.  This puts restrictions on the number of
-# caller-save registers that the compiler can target when building this file.
-# This is required because the code is called from a context in entry.S where
-# very few registers have been saved in the exception handler (for speed
-# reasons).
-# The caller save registers that have been saved and which can be used are
-# r2,r3,r4,r5 : argument passing
-# r15, r18 : SP and LINK
-# tr0-4 : allow all caller-save TR's.  The compiler seems to be able to make
-#         use of them, so it's probably beneficial to performance to save them
-#         and have them available for it.
-#
-# The resources not listed below are callee save, i.e. the compiler is free to
-# use any of them and will spill them to the stack itself.
-
-CFLAGS_fault_64.o += -ffixed-r7 \
-        -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \
-        -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \
-        -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \
-        -ffixed-r24 -ffixed-r25 -ffixed-r26 -ffixed-r27 \
-        -ffixed-r36 -ffixed-r37 -ffixed-r38 -ffixed-r39 -ffixed-r40 \
-        -ffixed-r41 -ffixed-r42 -ffixed-r43  \
-        -ffixed-r60 -ffixed-r61 -ffixed-r62 \
-        -fomit-frame-pointer
diff --git a/arch/sh/mm/cache-sh2.c b/arch/sh/mm/cache-sh2.c
index c4e80d2b764b..699a71f46327 100644
--- a/arch/sh/mm/cache-sh2.c
+++ b/arch/sh/mm/cache-sh2.c
@@ -16,7 +16,7 @@
 #include <asm/cacheflush.h>
 #include <asm/io.h>
 
-void __flush_wback_region(void *start, int size)
+static void sh2__flush_wback_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -37,7 +37,7 @@ void __flush_wback_region(void *start, int size)
         }
 }
 
-void __flush_purge_region(void *start, int size)
+static void sh2__flush_purge_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -51,7 +51,7 @@ void __flush_purge_region(void *start, int size)
                           CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
 }
 
-void __flush_invalidate_region(void *start, int size)
+static void sh2__flush_invalidate_region(void *start, int size)
 {
 #ifdef CONFIG_CACHE_WRITEBACK
         /*
@@ -82,3 +82,10 @@ void __flush_invalidate_region(void *start, int size)
                           CACHE_OC_ADDRESS_ARRAY | (v & 0x00000ff0) | 0x00000008);
 #endif
 }
+
+void __init sh2_cache_init(void)
+{
+        __flush_wback_region            = sh2__flush_wback_region;
+        __flush_purge_region            = sh2__flush_purge_region;
+        __flush_invalidate_region       = sh2__flush_invalidate_region;
+}
diff --git a/arch/sh/mm/cache-sh2a.c b/arch/sh/mm/cache-sh2a.c
index 24d86a794065..975899d83564 100644
--- a/arch/sh/mm/cache-sh2a.c
+++ b/arch/sh/mm/cache-sh2a.c
@@ -15,7 +15,7 @@
 #include <asm/cacheflush.h>
 #include <asm/io.h>
 
-void __flush_wback_region(void *start, int size)
+static void sh2a__flush_wback_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -44,7 +44,7 @@ void __flush_wback_region(void *start, int size)
         local_irq_restore(flags);
 }
 
-void __flush_purge_region(void *start, int size)
+static void sh2a__flush_purge_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -65,7 +65,7 @@ void __flush_purge_region(void *start, int size)
         local_irq_restore(flags);
 }
 
-void __flush_invalidate_region(void *start, int size)
+static void sh2a__flush_invalidate_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -97,13 +97,15 @@ void __flush_invalidate_region(void *start, int size)
 }
 
 /* WBack O-Cache and flush I-Cache */
-void flush_icache_range(unsigned long start, unsigned long end)
+static void sh2a_flush_icache_range(void *args)
 {
+        struct flusher_data *data = args;
+        unsigned long start, end;
         unsigned long v;
         unsigned long flags;
 
-        start = start & ~(L1_CACHE_BYTES-1);
-        end = (end + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1);
+        start = data->addr1 & ~(L1_CACHE_BYTES-1);
+        end = (data->addr2 + L1_CACHE_BYTES-1) & ~(L1_CACHE_BYTES-1);
 
         local_irq_save(flags);
         jump_to_uncached();
@@ -127,3 +129,12 @@ void flush_icache_range(unsigned long start, unsigned long end)
         back_to_cached();
         local_irq_restore(flags);
 }
+
+void __init sh2a_cache_init(void)
+{
+        local_flush_icache_range        = sh2a_flush_icache_range;
+
+        __flush_wback_region            = sh2a__flush_wback_region;
+        __flush_purge_region            = sh2a__flush_purge_region;
+        __flush_invalidate_region       = sh2a__flush_invalidate_region;
+}
diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c
index 6d1dbec08ad4..faef80c98134 100644
--- a/arch/sh/mm/cache-sh3.c
+++ b/arch/sh/mm/cache-sh3.c
@@ -32,7 +32,7 @@
  * SIZE: Size of the region.
  */
 
-void __flush_wback_region(void *start, int size)
+static void sh3__flush_wback_region(void *start, int size)
 {
         unsigned long v, j;
         unsigned long begin, end;
@@ -71,7 +71,7 @@ void __flush_wback_region(void *start, int size)
  * START: Virtual Address (U0, P1, or P3)
  * SIZE: Size of the region.
  */
-void __flush_purge_region(void *start, int size)
+static void sh3__flush_purge_region(void *start, int size)
 {
         unsigned long v;
         unsigned long begin, end;
@@ -90,11 +90,16 @@ void __flush_purge_region(void *start, int size)
         }
 }
 
-/*
- * No write back please
- *
- * Except I don't think there's any way to avoid the writeback. So we
- * just alias it to __flush_purge_region(). dwmw2.
- */
-void __flush_invalidate_region(void *start, int size)
-        __attribute__((alias("__flush_purge_region")));
+void __init sh3_cache_init(void)
+{
+        __flush_wback_region = sh3__flush_wback_region;
+        __flush_purge_region = sh3__flush_purge_region;
+
+        /*
+         * No write back please
+         *
+         * Except I don't think there's any way to avoid the writeback.
+         * So we just alias it to sh3__flush_purge_region(). dwmw2.
+         */
+        __flush_invalidate_region = sh3__flush_purge_region;
+}
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 5cfe08dbb59e..b2453bbef4cd 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -14,6 +14,7 @@
 #include <linux/mm.h>
 #include <linux/io.h>
 #include <linux/mutex.h>
+#include <linux/fs.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
@@ -25,13 +26,6 @@
 #define MAX_DCACHE_PAGES        64      /* XXX: Tune for ways */
 #define MAX_ICACHE_PAGES        32
 
-static void __flush_dcache_segment_1way(unsigned long start,
-                                        unsigned long extent);
-static void __flush_dcache_segment_2way(unsigned long start,
-                                        unsigned long extent);
-static void __flush_dcache_segment_4way(unsigned long start,
-                                        unsigned long extent);
-
 static void __flush_cache_4096(unsigned long addr, unsigned long phys,
                                unsigned long exec_offset);
 
@@ -43,182 +37,56 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys,
 static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) =
         (void (*)(unsigned long, unsigned long))0xdeadbeef;
 
-static void compute_alias(struct cache_info *c)
+/*
+ * Write back the range of D-cache, and purge the I-cache.
+ *
+ * Called from kernel/module.c:sys_init_module and routine for a.out format,
+ * signal handler code and kprobes code
+ */
+static void sh4_flush_icache_range(void *args)
 {
-        c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1);
-        c->n_aliases = c->alias_mask ? (c->alias_mask >> PAGE_SHIFT) + 1 : 0;
-}
+        struct flusher_data *data = args;
+        unsigned long start, end;
+        unsigned long flags, v;
+        int i;
 
-static void __init emit_cache_params(void)
-{
-        printk("PVR=%08x CVR=%08x PRR=%08x\n",
-                ctrl_inl(CCN_PVR),
-                ctrl_inl(CCN_CVR),
-                ctrl_inl(CCN_PRR));
-        printk("I-cache : n_ways=%d n_sets=%d way_incr=%d\n",
-                boot_cpu_data.icache.ways,
-                boot_cpu_data.icache.sets,
-                boot_cpu_data.icache.way_incr);
-        printk("I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
-                boot_cpu_data.icache.entry_mask,
-                boot_cpu_data.icache.alias_mask,
-                boot_cpu_data.icache.n_aliases);
-        printk("D-cache : n_ways=%d n_sets=%d way_incr=%d\n",
-                boot_cpu_data.dcache.ways,
-                boot_cpu_data.dcache.sets,
-                boot_cpu_data.dcache.way_incr);
-        printk("D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
-                boot_cpu_data.dcache.entry_mask,
-                boot_cpu_data.dcache.alias_mask,
-                boot_cpu_data.dcache.n_aliases);
+        start = data->addr1;
+        end = data->addr2;
 
-        /*
-         * Emit Secondary Cache parameters if the CPU has a probed L2.
-         */
-        if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
-                printk("S-cache : n_ways=%d n_sets=%d way_incr=%d\n",
-                        boot_cpu_data.scache.ways,
-                        boot_cpu_data.scache.sets,
-                        boot_cpu_data.scache.way_incr);
-                printk("S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
-                        boot_cpu_data.scache.entry_mask,
-                        boot_cpu_data.scache.alias_mask,
-                        boot_cpu_data.scache.n_aliases);
+        /* If there are too many pages then just blow away the caches */
+        if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
+                local_flush_cache_all(NULL);
+                return;
         }
 
-        if (!__flush_dcache_segment_fn)
-                panic("unknown number of cache ways\n");
-}
+        /*
+         * Selectively flush d-cache then invalidate the i-cache.
+         * This is inefficient, so only use this for small ranges.
+         */
+        start &= ~(L1_CACHE_BYTES-1);
+        end += L1_CACHE_BYTES-1;
+        end &= ~(L1_CACHE_BYTES-1);
 
-/*
- * SH-4 has virtually indexed and physically tagged cache.
- */
-void __init p3_cache_init(void)
-{
-        compute_alias(&boot_cpu_data.icache);
-        compute_alias(&boot_cpu_data.dcache);
-        compute_alias(&boot_cpu_data.scache);
-
-        switch (boot_cpu_data.dcache.ways) {
-        case 1:
-                __flush_dcache_segment_fn = __flush_dcache_segment_1way;
-                break;
-        case 2:
-                __flush_dcache_segment_fn = __flush_dcache_segment_2way;
-                break;
-        case 4:
-                __flush_dcache_segment_fn = __flush_dcache_segment_4way;
-                break;
-        default:
-                __flush_dcache_segment_fn = NULL;
-                break;
-        }
+        local_irq_save(flags);
+        jump_to_uncached();
 
-        emit_cache_params();
-}
+        for (v = start; v < end; v += L1_CACHE_BYTES) {
+                unsigned long icacheaddr;
 
-/*
- * Write back the dirty D-caches, but not invalidate them.
- *
- * START: Virtual Address (U0, P1, or P3)
- * SIZE: Size of the region.
- */
-void __flush_wback_region(void *start, int size)
-{
-        unsigned long v;
-        unsigned long begin, end;
-
-        begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
-        end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
-                & ~(L1_CACHE_BYTES-1);
-        for (v = begin; v < end; v+=L1_CACHE_BYTES) {
-                asm volatile("ocbwb     %0"
-                             : /* no output */
-                             : "m" (__m(v)));
-        }
-}
+                __ocbwb(v);
 
-/*
- * Write back the dirty D-caches and invalidate them.
- *
- * START: Virtual Address (U0, P1, or P3)
- * SIZE: Size of the region.
- */
-void __flush_purge_region(void *start, int size)
-{
-        unsigned long v;
-        unsigned long begin, end;
-
-        begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
-        end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
-                & ~(L1_CACHE_BYTES-1);
-        for (v = begin; v < end; v+=L1_CACHE_BYTES) {
-                asm volatile("ocbp      %0"
-                             : /* no output */
-                             : "m" (__m(v)));
-        }
-}
+                icacheaddr = CACHE_IC_ADDRESS_ARRAY | (v &
+                                cpu_data->icache.entry_mask);
 
-/*
- * No write back please
- */
-void __flush_invalidate_region(void *start, int size)
-{
-        unsigned long v;
-        unsigned long begin, end;
-
-        begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
-        end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
-                & ~(L1_CACHE_BYTES-1);
-        for (v = begin; v < end; v+=L1_CACHE_BYTES) {
-                asm volatile("ocbi      %0"
-                             : /* no output */
-                             : "m" (__m(v)));
+                /* Clear i-cache line valid-bit */
+                for (i = 0; i < cpu_data->icache.ways; i++) {
+                        __raw_writel(0, icacheaddr);
+                        icacheaddr += cpu_data->icache.way_incr;
+                }
         }
-}
-
-/*
- * Write back the range of D-cache, and purge the I-cache.
- *
- * Called from kernel/module.c:sys_init_module and routine for a.out format,
- * signal handler code and kprobes code
- */
-void flush_icache_range(unsigned long start, unsigned long end)
-{
-        int icacheaddr;
-        unsigned long flags, v;
-        int i;
 
-       /* If there are too many pages then just blow the caches */
-        if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
-                flush_cache_all();
-       } else {
-               /* selectively flush d-cache then invalidate the i-cache */
-               /* this is inefficient, so only use for small ranges */
-               start &= ~(L1_CACHE_BYTES-1);
-               end += L1_CACHE_BYTES-1;
-               end &= ~(L1_CACHE_BYTES-1);
-
-               local_irq_save(flags);
-               jump_to_uncached();
-
-               for (v = start; v < end; v+=L1_CACHE_BYTES) {
-                       asm volatile("ocbwb     %0"
-                                    : /* no output */
-                                    : "m" (__m(v)));
-
-                       icacheaddr = CACHE_IC_ADDRESS_ARRAY | (
-                                       v & cpu_data->icache.entry_mask);
-
-                       for (i = 0; i < cpu_data->icache.ways;
-                               i++, icacheaddr += cpu_data->icache.way_incr)
-                                       /* Clear i-cache line valid-bit */
-                                       ctrl_outl(0, icacheaddr);
-               }
-
-                back_to_cached();
-                local_irq_restore(flags);
-        }
+        back_to_cached();
+        local_irq_restore(flags);
 }
 
 static inline void flush_cache_4096(unsigned long start,
@@ -244,9 +112,17 @@ static inline void flush_cache_4096(unsigned long start,
  * Write back & invalidate the D-cache of the page.
  * (To avoid "alias" issues)
  */
-void flush_dcache_page(struct page *page)
+static void sh4_flush_dcache_page(void *arg)
 {
-        if (test_bit(PG_mapped, &page->flags)) {
+        struct page *page = arg;
+#ifndef CONFIG_SMP
+        struct address_space *mapping = page_mapping(page);
+
+        if (mapping && !mapping_mapped(mapping))
+                set_bit(PG_dcache_dirty, &page->flags);
+        else
+#endif
+        {
                 unsigned long phys = PHYSADDR(page_address(page));
                 unsigned long addr = CACHE_OC_ADDRESS_ARRAY;
                 int i, n;
@@ -282,13 +158,13 @@ static void __uses_jump_to_uncached flush_icache_all(void)
         local_irq_restore(flags);
 }
 
-void flush_dcache_all(void)
+static inline void flush_dcache_all(void)
 {
         (*__flush_dcache_segment_fn)(0UL, boot_cpu_data.dcache.way_size);
         wmb();
 }
 
-void flush_cache_all(void)
+static void sh4_flush_cache_all(void *unused)
 {
         flush_dcache_all();
         flush_icache_all();
@@ -380,8 +256,13 @@ loop_exit:
  *
  * Caller takes mm->mmap_sem.
  */
-void flush_cache_mm(struct mm_struct *mm)
+static void sh4_flush_cache_mm(void *arg)
 {
+        struct mm_struct *mm = arg;
+
+        if (cpu_context(smp_processor_id(), mm) == NO_CONTEXT)
+                return;
+
         /*
          * If cache is only 4k-per-way, there are never any 'aliases'.  Since
          * the cache is physically tagged, the data can just be left in there.
@@ -417,12 +298,21 @@ void flush_cache_mm(struct mm_struct *mm)
  * ADDR: Virtual Address (U0 address)
  * PFN: Physical page number
  */
-void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
-                      unsigned long pfn)
+static void sh4_flush_cache_page(void *args)
 {
-        unsigned long phys = pfn << PAGE_SHIFT;
+        struct flusher_data *data = args;
+        struct vm_area_struct *vma;
+        unsigned long address, pfn, phys;
         unsigned int alias_mask;
 
+        vma = data->vma;
+        address = data->addr1;
+        pfn = data->addr2;
+        phys = pfn << PAGE_SHIFT;
+
+        if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
+                return;
+
         alias_mask = boot_cpu_data.dcache.alias_mask;
 
         /* We only need to flush D-cache when we have alias */
@@ -462,9 +352,19 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
  * Flushing the cache lines for U0 only isn't enough.
  * We need to flush for P1 too, which may contain aliases.
  */
-void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
-                       unsigned long end)
+static void sh4_flush_cache_range(void *args)
 {
+        struct flusher_data *data = args;
+        struct vm_area_struct *vma;
+        unsigned long start, end;
+
+        vma = data->vma;
+        start = data->addr1;
+        end = data->addr2;
+
+        if (cpu_context(smp_processor_id(), vma->vm_mm) == NO_CONTEXT)
+                return;
+
         /*
          * If cache is only 4k-per-way, there are never any 'aliases'.  Since
          * the cache is physically tagged, the data can just be left in there.
@@ -492,20 +392,6 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
         }
 }
 
-/*
- * flush_icache_user_range
- * @vma: VMA of the process
- * @page: page
- * @addr: U0 address
- * @len: length of the range (< page size)
- */
-void flush_icache_user_range(struct vm_area_struct *vma,
-                             struct page *page, unsigned long addr, int len)
-{
-        flush_cache_page(vma, addr, page_to_pfn(page));
-        mb();
-}
-
 /**
  * __flush_cache_4096
  *
@@ -581,7 +467,49 @@ static void __flush_cache_4096(unsigned long addr, unsigned long phys,
  * Break the 1, 2 and 4 way variants of this out into separate functions to
  * avoid nearly all the overhead of having the conditional stuff in the function
  * bodies (+ the 1 and 2 way cases avoid saving any registers too).
+ *
+ * We want to eliminate unnecessary bus transactions, so this code uses
+ * a non-obvious technique.
+ *
+ * Loop over a cache way sized block of, one cache line at a time. For each
+ * line, use movca.a to cause the current cache line contents to be written
+ * back, but without reading anything from main memory. However this has the
+ * side effect that the cache is now caching that memory location. So follow
+ * this with a cache invalidate to mark the cache line invalid. And do all
+ * this with interrupts disabled, to avoid the cache line being accidently
+ * evicted while it is holding garbage.
+ *
+ * This also breaks in a number of circumstances:
+ * - if there are modifications to the region of memory just above
+ *   empty_zero_page (for example because a breakpoint has been placed
+ *   there), then these can be lost.
+ *
+ *   This is because the the memory address which the cache temporarily
+ *   caches in the above description is empty_zero_page. So the
+ *   movca.l hits the cache (it is assumed that it misses, or at least
+ *   isn't dirty), modifies the line and then invalidates it, losing the
+ *   required change.
+ *
+ * - If caches are disabled or configured in write-through mode, then
+ *   the movca.l writes garbage directly into memory.
  */
+static void __flush_dcache_segment_writethrough(unsigned long start,
+                                                unsigned long extent_per_way)
+{
+        unsigned long addr;
+        int i;
+
+        addr = CACHE_OC_ADDRESS_ARRAY | (start & cpu_data->dcache.entry_mask);
+
+        while (extent_per_way) {
+                for (i = 0; i < cpu_data->dcache.ways; i++)
+                        __raw_writel(0, addr + cpu_data->dcache.way_incr * i);
+
+                addr += cpu_data->dcache.linesz;
+                extent_per_way -= cpu_data->dcache.linesz;
+        }
+}
+
 static void __flush_dcache_segment_1way(unsigned long start,
                                         unsigned long extent_per_way)
 {
@@ -773,3 +701,47 @@ static void __flush_dcache_segment_4way(unsigned long start,
                 a3 += linesz;
         } while (a0 < a0e);
 }
+
+extern void __weak sh4__flush_region_init(void);
+
+/*
+ * SH-4 has virtually indexed and physically tagged cache.
+ */
+void __init sh4_cache_init(void)
+{
+        unsigned int wt_enabled = !!(__raw_readl(CCR) & CCR_CACHE_WT);
+
+        printk("PVR=%08x CVR=%08x PRR=%08x\n",
+                ctrl_inl(CCN_PVR),
+                ctrl_inl(CCN_CVR),
+                ctrl_inl(CCN_PRR));
+
+        if (wt_enabled)
+                __flush_dcache_segment_fn = __flush_dcache_segment_writethrough;
+        else {
+                switch (boot_cpu_data.dcache.ways) {
+                case 1:
+                        __flush_dcache_segment_fn = __flush_dcache_segment_1way;
+                        break;
+                case 2:
+                        __flush_dcache_segment_fn = __flush_dcache_segment_2way;
+                        break;
+                case 4:
+                        __flush_dcache_segment_fn = __flush_dcache_segment_4way;
+                        break;
+                default:
+                        panic("unknown number of cache ways\n");
+                        break;
+                }
+        }
+
+        local_flush_icache_range        = sh4_flush_icache_range;
+        local_flush_dcache_page         = sh4_flush_dcache_page;
+        local_flush_cache_all           = sh4_flush_cache_all;
+        local_flush_cache_mm            = sh4_flush_cache_mm;
+        local_flush_cache_dup_mm        = sh4_flush_cache_mm;
+        local_flush_cache_page          = sh4_flush_cache_page;
+        local_flush_cache_range         = sh4_flush_cache_range;
+
+        sh4__flush_region_init();
+}
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 86762092508c..467ff8e260f7 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -20,23 +20,11 @@
 #include <asm/uaccess.h>
 #include <asm/mmu_context.h>
 
+extern void __weak sh4__flush_region_init(void);
+
 /* Wired TLB entry for the D-cache */
 static unsigned long long dtlb_cache_slot;
 
-void __init p3_cache_init(void)
-{
-        /* Reserve a slot for dcache colouring in the DTLB */
-        dtlb_cache_slot = sh64_get_wired_dtlb_entry();
-}
-
-#ifdef CONFIG_DCACHE_DISABLED
-#define sh64_dcache_purge_all()                                 do { } while (0)
-#define sh64_dcache_purge_coloured_phy_page(paddr, eaddr)       do { } while (0)
-#define sh64_dcache_purge_user_range(mm, start, end)            do { } while (0)
-#define sh64_dcache_purge_phy_page(paddr)                       do { } while (0)
-#define sh64_dcache_purge_virt_page(mm, eaddr)                  do { } while (0)
-#endif
-
 /*
  * The following group of functions deal with mapping and unmapping a
  * temporary page into a DTLB slot that has been set aside for exclusive
@@ -56,7 +44,6 @@ static inline void sh64_teardown_dtlb_cache_slot(void)
         local_irq_enable();
 }
 
-#ifndef CONFIG_ICACHE_DISABLED
 static inline void sh64_icache_inv_all(void)
 {
         unsigned long long addr, flag, data;
@@ -214,52 +201,6 @@ static void sh64_icache_inv_user_page_range(struct mm_struct *mm,
         }
 }
 
-/*
- * Invalidate a small range of user context I-cache, not necessarily page
- * (or even cache-line) aligned.
- *
- * Since this is used inside ptrace, the ASID in the mm context typically
- * won't match current_asid.  We'll have to switch ASID to do this.  For
- * safety, and given that the range will be small, do all this under cli.
- *
- * Note, there is a hazard that the ASID in mm->context is no longer
- * actually associated with mm, i.e. if the mm->context has started a new
- * cycle since mm was last active.  However, this is just a performance
- * issue: all that happens is that we invalidate lines belonging to
- * another mm, so the owning process has to refill them when that mm goes
- * live again.  mm itself can't have any cache entries because there will
- * have been a flush_cache_all when the new mm->context cycle started.
- */
-static void sh64_icache_inv_user_small_range(struct mm_struct *mm,
-                                                unsigned long start, int len)
-{
-        unsigned long long eaddr = start;
-        unsigned long long eaddr_end = start + len;
-        unsigned long current_asid, mm_asid;
-        unsigned long flags;
-        unsigned long long epage_start;
-
-        /*
-         * Align to start of cache line.  Otherwise, suppose len==8 and
-         * start was at 32N+28 : the last 4 bytes wouldn't get invalidated.
-         */
-        eaddr = L1_CACHE_ALIGN(start);
-        eaddr_end = start + len;
-
-        mm_asid = cpu_asid(smp_processor_id(), mm);
-        local_irq_save(flags);
-        current_asid = switch_and_save_asid(mm_asid);
-
-        epage_start = eaddr & PAGE_MASK;
-
-        while (eaddr < eaddr_end) {
-                __asm__ __volatile__("icbi %0, 0" : : "r" (eaddr));
-                eaddr += L1_CACHE_BYTES;
-        }
-        switch_and_save_asid(current_asid);
-        local_irq_restore(flags);
-}
-
 static void sh64_icache_inv_current_user_range(unsigned long start, unsigned long end)
 {
         /* The icbi instruction never raises ITLBMISS.  i.e. if there's not a
@@ -287,9 +228,7 @@ static void sh64_icache_inv_current_user_range(unsigned long start, unsigned lon
                 addr += L1_CACHE_BYTES;
         }
 }
-#endif /* !CONFIG_ICACHE_DISABLED */
 
-#ifndef CONFIG_DCACHE_DISABLED
 /* Buffer used as the target of alloco instructions to purge data from cache
    sets by natural eviction. -- RPC */
 #define DUMMY_ALLOCO_AREA_SIZE ((L1_CACHE_BYTES << 10) + (1024 * 4))
@@ -541,59 +480,10 @@ static void sh64_dcache_purge_user_range(struct mm_struct *mm,
 }
 
 /*
- * Purge the range of addresses from the D-cache.
- *
- * The addresses lie in the superpage mapping. There's no harm if we
- * overpurge at either end - just a small performance loss.
- */
-void __flush_purge_region(void *start, int size)
-{
-        unsigned long long ullend, addr, aligned_start;
-
-        aligned_start = (unsigned long long)(signed long long)(signed long) start;
-        addr = L1_CACHE_ALIGN(aligned_start);
-        ullend = (unsigned long long) (signed long long) (signed long) start + size;
-
-        while (addr <= ullend) {
-                __asm__ __volatile__ ("ocbp %0, 0" : : "r" (addr));
-                addr += L1_CACHE_BYTES;
-        }
-}
-
-void __flush_wback_region(void *start, int size)
-{
-        unsigned long long ullend, addr, aligned_start;
-
-        aligned_start = (unsigned long long)(signed long long)(signed long) start;
-        addr = L1_CACHE_ALIGN(aligned_start);
-        ullend = (unsigned long long) (signed long long) (signed long) start + size;
-
-        while (addr < ullend) {
-                __asm__ __volatile__ ("ocbwb %0, 0" : : "r" (addr));
-                addr += L1_CACHE_BYTES;
-        }
-}
-
-void __flush_invalidate_region(void *start, int size)
-{
-        unsigned long long ullend, addr, aligned_start;
-
-        aligned_start = (unsigned long long)(signed long long)(signed long) start;
-        addr = L1_CACHE_ALIGN(aligned_start);
-        ullend = (unsigned long long) (signed long long) (signed long) start + size;
-
-        while (addr < ullend) {
-                __asm__ __volatile__ ("ocbi %0, 0" : : "r" (addr));
-                addr += L1_CACHE_BYTES;
-        }
-}
-#endif /* !CONFIG_DCACHE_DISABLED */
-
-/*
  * Invalidate the entire contents of both caches, after writing back to
  * memory any dirty data from the D-cache.
  */
-void flush_cache_all(void)
+static void sh5_flush_cache_all(void *unused)
 {
         sh64_dcache_purge_all();
         sh64_icache_inv_all();
@@ -620,7 +510,7 @@ void flush_cache_all(void)
  * I-cache.  This is similar to the lack of action needed in
  * flush_tlb_mm - see fault.c.
  */
-void flush_cache_mm(struct mm_struct *mm)
+static void sh5_flush_cache_mm(void *unused)
 {
         sh64_dcache_purge_all();
 }
@@ -632,13 +522,18 @@ void flush_cache_mm(struct mm_struct *mm)
  *
  * Note, 'end' is 1 byte beyond the end of the range to flush.
  */
-void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
-                       unsigned long end)
+static void sh5_flush_cache_range(void *args)
 {
-        struct mm_struct *mm = vma->vm_mm;
+        struct flusher_data *data = args;
+        struct vm_area_struct *vma;
+        unsigned long start, end;
+
+        vma = data->vma;
+        start = data->addr1;
+        end = data->addr2;
 
-        sh64_dcache_purge_user_range(mm, start, end);
-        sh64_icache_inv_user_page_range(mm, start, end);
+        sh64_dcache_purge_user_range(vma->vm_mm, start, end);
+        sh64_icache_inv_user_page_range(vma->vm_mm, start, end);
 }
 
 /*
@@ -650,16 +545,23 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
  *
  * Note, this is called with pte lock held.
  */
-void flush_cache_page(struct vm_area_struct *vma, unsigned long eaddr,
-                      unsigned long pfn)
+static void sh5_flush_cache_page(void *args)
 {
+        struct flusher_data *data = args;
+        struct vm_area_struct *vma;
+        unsigned long eaddr, pfn;
+
+        vma = data->vma;
+        eaddr = data->addr1;
+        pfn = data->addr2;
+
         sh64_dcache_purge_phy_page(pfn << PAGE_SHIFT);
 
         if (vma->vm_flags & VM_EXEC)
                 sh64_icache_inv_user_page(vma, eaddr);
 }
 
-void flush_dcache_page(struct page *page)
+static void sh5_flush_dcache_page(void *page)
 {
         sh64_dcache_purge_phy_page(page_to_phys(page));
         wmb();
@@ -673,162 +575,47 @@ void flush_dcache_page(struct page *page)
  * mapping, therefore it's guaranteed that there no cache entries for
  * the range in cache sets of the wrong colour.
  */
-void flush_icache_range(unsigned long start, unsigned long end)
+static void sh5_flush_icache_range(void *args)
 {
+        struct flusher_data *data = args;
+        unsigned long start, end;
+
+        start = data->addr1;
+        end = data->addr2;
+
         __flush_purge_region((void *)start, end);
         wmb();
         sh64_icache_inv_kernel_range(start, end);
 }
 
 /*
- * Flush the range of user (defined by vma->vm_mm) address space starting
- * at 'addr' for 'len' bytes from the cache.  The range does not straddle
- * a page boundary, the unique physical page containing the range is
- * 'page'.  This seems to be used mainly for invalidating an address
- * range following a poke into the program text through the ptrace() call
- * from another process (e.g. for BRK instruction insertion).
- */
-void flush_icache_user_range(struct vm_area_struct *vma,
-                        struct page *page, unsigned long addr, int len)
-{
-
-        sh64_dcache_purge_coloured_phy_page(page_to_phys(page), addr);
-        mb();
-
-        if (vma->vm_flags & VM_EXEC)
-                sh64_icache_inv_user_small_range(vma->vm_mm, addr, len);
-}
-
-/*
  * For the address range [start,end), write back the data from the
  * D-cache and invalidate the corresponding region of the I-cache for the
  * current process.  Used to flush signal trampolines on the stack to
  * make them executable.
  */
-void flush_cache_sigtramp(unsigned long vaddr)
+static void sh5_flush_cache_sigtramp(void *vaddr)
 {
-        unsigned long end = vaddr + L1_CACHE_BYTES;
+        unsigned long end = (unsigned long)vaddr + L1_CACHE_BYTES;
 
-        __flush_wback_region((void *)vaddr, L1_CACHE_BYTES);
+        __flush_wback_region(vaddr, L1_CACHE_BYTES);
         wmb();
-        sh64_icache_inv_current_user_range(vaddr, end);
+        sh64_icache_inv_current_user_range((unsigned long)vaddr, end);
 }
 
-#ifdef CONFIG_MMU
-/*
- * These *MUST* lie in an area of virtual address space that's otherwise
- * unused.
- */
-#define UNIQUE_EADDR_START 0xe0000000UL
-#define UNIQUE_EADDR_END   0xe8000000UL
-
-/*
- * Given a physical address paddr, and a user virtual address user_eaddr
- * which will eventually be mapped to it, create a one-off kernel-private
- * eaddr mapped to the same paddr.  This is used for creating special
- * destination pages for copy_user_page and clear_user_page.
- */
-static unsigned long sh64_make_unique_eaddr(unsigned long user_eaddr,
-                                            unsigned long paddr)
-{
-        static unsigned long current_pointer = UNIQUE_EADDR_START;
-        unsigned long coloured_pointer;
-
-        if (current_pointer == UNIQUE_EADDR_END) {
-                sh64_dcache_purge_all();
-                current_pointer = UNIQUE_EADDR_START;
-        }
-
-        coloured_pointer = (current_pointer & ~CACHE_OC_SYN_MASK) |
-                                (user_eaddr & CACHE_OC_SYN_MASK);
-        sh64_setup_dtlb_cache_slot(coloured_pointer, get_asid(), paddr);
-
-        current_pointer += (PAGE_SIZE << CACHE_OC_N_SYNBITS);
-
-        return coloured_pointer;
-}
-
-static void sh64_copy_user_page_coloured(void *to, void *from,
-                                         unsigned long address)
+void __init sh5_cache_init(void)
 {
-        void *coloured_to;
+        local_flush_cache_all           = sh5_flush_cache_all;
+        local_flush_cache_mm            = sh5_flush_cache_mm;
+        local_flush_cache_dup_mm        = sh5_flush_cache_mm;
+        local_flush_cache_page          = sh5_flush_cache_page;
+        local_flush_cache_range         = sh5_flush_cache_range;
+        local_flush_dcache_page         = sh5_flush_dcache_page;
+        local_flush_icache_range        = sh5_flush_icache_range;
+        local_flush_cache_sigtramp      = sh5_flush_cache_sigtramp;
 
-        /*
-         * Discard any existing cache entries of the wrong colour.  These are
-         * present quite often, if the kernel has recently used the page
-         * internally, then given it up, then it's been allocated to the user.
-         */
-        sh64_dcache_purge_coloured_phy_page(__pa(to), (unsigned long)to);
-
-        coloured_to = (void *)sh64_make_unique_eaddr(address, __pa(to));
-        copy_page(from, coloured_to);
-
-        sh64_teardown_dtlb_cache_slot();
-}
-
-static void sh64_clear_user_page_coloured(void *to, unsigned long address)
-{
-        void *coloured_to;
-
-        /*
-         * Discard any existing kernel-originated lines of the wrong
-         * colour (as above)
-         */
-        sh64_dcache_purge_coloured_phy_page(__pa(to), (unsigned long)to);
-
-        coloured_to = (void *)sh64_make_unique_eaddr(address, __pa(to));
-        clear_page(coloured_to);
-
-        sh64_teardown_dtlb_cache_slot();
-}
-
-/*
- * 'from' and 'to' are kernel virtual addresses (within the superpage
- * mapping of the physical RAM).  'address' is the user virtual address
- * where the copy 'to' will be mapped after.  This allows a custom
- * mapping to be used to ensure that the new copy is placed in the
- * right cache sets for the user to see it without having to bounce it
- * out via memory.  Note however : the call to flush_page_to_ram in
- * (generic)/mm/memory.c:(break_cow) undoes all this good work in that one
- * very important case!
- *
- * TBD : can we guarantee that on every call, any cache entries for
- * 'from' are in the same colour sets as 'address' also?  i.e. is this
- * always used just to deal with COW?  (I suspect not).
- *
- * There are two possibilities here for when the page 'from' was last accessed:
- * - by the kernel : this is OK, no purge required.
- * - by the/a user (e.g. for break_COW) : need to purge.
- *
- * If the potential user mapping at 'address' is the same colour as
- * 'from' there is no need to purge any cache lines from the 'from'
- * page mapped into cache sets of colour 'address'.  (The copy will be
- * accessing the page through 'from').
- */
-void copy_user_page(void *to, void *from, unsigned long address,
-                    struct page *page)
-{
-        if (((address ^ (unsigned long) from) & CACHE_OC_SYN_MASK) != 0)
-                sh64_dcache_purge_coloured_phy_page(__pa(from), address);
-
-        if (((address ^ (unsigned long) to) & CACHE_OC_SYN_MASK) == 0)
-                copy_page(to, from);
-        else
-                sh64_copy_user_page_coloured(to, from, address);
-}
+        /* Reserve a slot for dcache colouring in the DTLB */
+        dtlb_cache_slot = sh64_get_wired_dtlb_entry();
 
-/*
- * 'to' is a kernel virtual address (within the superpage mapping of the
- * physical RAM).  'address' is the user virtual address where the 'to'
- * page will be mapped after.  This allows a custom mapping to be used to
- * ensure that the new copy is placed in the right cache sets for the
- * user to see it without having to bounce it out via memory.
- */
-void clear_user_page(void *to, unsigned long address, struct page *page)
-{
-        if (((address ^ (unsigned long) to) & CACHE_OC_SYN_MASK) == 0)
-                clear_page(to);
-        else
-                sh64_clear_user_page_coloured(to, address);
+        sh4__flush_region_init();
 }
-#endif
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index 22dacc778823..2cadee2037ac 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/mman.h>
 #include <linux/mm.h>
+#include <linux/fs.h>
 #include <linux/threads.h>
 #include <asm/addrspace.h>
 #include <asm/page.h>
@@ -63,15 +64,21 @@ static inline void cache_wback_all(void)
  *
  * Called from kernel/module.c:sys_init_module and routine for a.out format.
  */
-void flush_icache_range(unsigned long start, unsigned long end)
+static void sh7705_flush_icache_range(void *args)
 {
+        struct flusher_data *data = args;
+        unsigned long start, end;
+
+        start = data->addr1;
+        end = data->addr2;
+
         __flush_wback_region((void *)start, end - start);
 }
 
 /*
  * Writeback&Invalidate the D-cache of the page
  */
-static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys)
+static void __flush_dcache_page(unsigned long phys)
 {
         unsigned long ways, waysize, addrstart;
         unsigned long flags;
@@ -126,13 +133,18 @@ static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys)
  * Write back & invalidate the D-cache of the page.
  * (To avoid "alias" issues)
  */
-void flush_dcache_page(struct page *page)
+static void sh7705_flush_dcache_page(void *arg)
 {
-        if (test_bit(PG_mapped, &page->flags))
+        struct page *page = arg;
+        struct address_space *mapping = page_mapping(page);
+
+        if (mapping && !mapping_mapped(mapping))
+                set_bit(PG_dcache_dirty, &page->flags);
+        else
                 __flush_dcache_page(PHYSADDR(page_address(page)));
 }
 
-void __uses_jump_to_uncached flush_cache_all(void)
+static void sh7705_flush_cache_all(void *args)
 {
         unsigned long flags;
 
@@ -144,44 +156,16 @@ void __uses_jump_to_uncached flush_cache_all(void)
         local_irq_restore(flags);
 }
 
-void flush_cache_mm(struct mm_struct *mm)
-{
-        /* Is there any good way? */
-        /* XXX: possibly call flush_cache_range for each vm area */
-        flush_cache_all();
-}
-
-/*
- * Write back and invalidate D-caches.
- *
- * START, END: Virtual Address (U0 address)
- *
- * NOTE: We need to flush the _physical_ page entry.
- * Flushing the cache lines for U0 only isn't enough.
- * We need to flush for P1 too, which may contain aliases.
- */
-void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
-                       unsigned long end)
-{
-
-        /*
-         * We could call flush_cache_page for the pages of these range,
-         * but it's not efficient (scan the caches all the time...).
-         *
-         * We can't use A-bit magic, as there's the case we don't have
-         * valid entry on TLB.
-         */
-        flush_cache_all();
-}
-
 /*
  * Write back and invalidate I/D-caches for the page.
  *
  * ADDRESS: Virtual Address (U0 address)
  */
-void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
-                      unsigned long pfn)
+static void sh7705_flush_cache_page(void *args)
 {
+        struct flusher_data *data = args;
+        unsigned long pfn = data->addr2;
+
         __flush_dcache_page(pfn << PAGE_SHIFT);
 }
 
@@ -193,7 +177,19 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long address,
  * Not entirely sure why this is necessary on SH3 with 32K cache but
  * without it we get occasional "Memory fault" when loading a program.
  */
-void flush_icache_page(struct vm_area_struct *vma, struct page *page)
+static void sh7705_flush_icache_page(void *page)
 {
         __flush_purge_region(page_address(page), PAGE_SIZE);
 }
+
+void __init sh7705_cache_init(void)
+{
+        local_flush_icache_range        = sh7705_flush_icache_range;
+        local_flush_dcache_page         = sh7705_flush_dcache_page;
+        local_flush_cache_all           = sh7705_flush_cache_all;
+        local_flush_cache_mm            = sh7705_flush_cache_all;
+        local_flush_cache_dup_mm        = sh7705_flush_cache_all;
+        local_flush_cache_range         = sh7705_flush_cache_all;
+        local_flush_cache_page          = sh7705_flush_cache_page;
+        local_flush_icache_page         = sh7705_flush_icache_page;
+}
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
new file mode 100644
index 000000000000..35c37b7f717a
--- /dev/null
+++ b/arch/sh/mm/cache.c
@@ -0,0 +1,316 @@
+/*
+ * arch/sh/mm/cache.c
+ *
+ * Copyright (C) 1999, 2000, 2002  Niibe Yutaka
+ * Copyright (C) 2002 - 2009  Paul Mundt
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/mutex.h>
+#include <linux/fs.h>
+#include <linux/smp.h>
+#include <linux/highmem.h>
+#include <linux/module.h>
+#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+
+void (*local_flush_cache_all)(void *args) = cache_noop;
+void (*local_flush_cache_mm)(void *args) = cache_noop;
+void (*local_flush_cache_dup_mm)(void *args) = cache_noop;
+void (*local_flush_cache_page)(void *args) = cache_noop;
+void (*local_flush_cache_range)(void *args) = cache_noop;
+void (*local_flush_dcache_page)(void *args) = cache_noop;
+void (*local_flush_icache_range)(void *args) = cache_noop;
+void (*local_flush_icache_page)(void *args) = cache_noop;
+void (*local_flush_cache_sigtramp)(void *args) = cache_noop;
+
+void (*__flush_wback_region)(void *start, int size);
+void (*__flush_purge_region)(void *start, int size);
+void (*__flush_invalidate_region)(void *start, int size);
+
+static inline void noop__flush_region(void *start, int size)
+{
+}
+
+static inline void cacheop_on_each_cpu(void (*func) (void *info), void *info,
+                                   int wait)
+{
+        preempt_disable();
+        smp_call_function(func, info, wait);
+        func(info);
+        preempt_enable();
+}
+
+void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
+                       unsigned long vaddr, void *dst, const void *src,
+                       unsigned long len)
+{
+        if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
+            !test_bit(PG_dcache_dirty, &page->flags)) {
+                void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
+                memcpy(vto, src, len);
+                kunmap_coherent(vto);
+        } else {
+                memcpy(dst, src, len);
+                if (boot_cpu_data.dcache.n_aliases)
+                        set_bit(PG_dcache_dirty, &page->flags);
+        }
+
+        if (vma->vm_flags & VM_EXEC)
+                flush_cache_page(vma, vaddr, page_to_pfn(page));
+}
+
+void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
+                         unsigned long vaddr, void *dst, const void *src,
+                         unsigned long len)
+{
+        if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
+            !test_bit(PG_dcache_dirty, &page->flags)) {
+                void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
+                memcpy(dst, vfrom, len);
+                kunmap_coherent(vfrom);
+        } else {
+                memcpy(dst, src, len);
+                if (boot_cpu_data.dcache.n_aliases)
+                        set_bit(PG_dcache_dirty, &page->flags);
+        }
+}
+
+void copy_user_highpage(struct page *to, struct page *from,
+                        unsigned long vaddr, struct vm_area_struct *vma)
+{
+        void *vfrom, *vto;
+
+        vto = kmap_atomic(to, KM_USER1);
+
+        if (boot_cpu_data.dcache.n_aliases && page_mapped(from) &&
+            !test_bit(PG_dcache_dirty, &from->flags)) {
+                vfrom = kmap_coherent(from, vaddr);
+                copy_page(vto, vfrom);
+                kunmap_coherent(vfrom);
+        } else {
+                vfrom = kmap_atomic(from, KM_USER0);
+                copy_page(vto, vfrom);
+                kunmap_atomic(vfrom, KM_USER0);
+        }
+
+        if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
+                __flush_purge_region(vto, PAGE_SIZE);
+
+        kunmap_atomic(vto, KM_USER1);
+        /* Make sure this page is cleared on other CPU's too before using it */
+        smp_wmb();
+}
+EXPORT_SYMBOL(copy_user_highpage);
+
+void clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *kaddr = kmap_atomic(page, KM_USER0);
+
+        clear_page(kaddr);
+
+        if (pages_do_alias((unsigned long)kaddr, vaddr & PAGE_MASK))
+                __flush_purge_region(kaddr, PAGE_SIZE);
+
+        kunmap_atomic(kaddr, KM_USER0);
+}
+EXPORT_SYMBOL(clear_user_highpage);
+
+void __update_cache(struct vm_area_struct *vma,
+                    unsigned long address, pte_t pte)
+{
+        struct page *page;
+        unsigned long pfn = pte_pfn(pte);
+
+        if (!boot_cpu_data.dcache.n_aliases)
+                return;
+
+        page = pfn_to_page(pfn);
+        if (pfn_valid(pfn) && page_mapping(page)) {
+                int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
+                if (dirty) {
+                        unsigned long addr = (unsigned long)page_address(page);
+
+                        if (pages_do_alias(addr, address & PAGE_MASK))
+                                __flush_purge_region((void *)addr, PAGE_SIZE);
+                }
+        }
+}
+
+void __flush_anon_page(struct page *page, unsigned long vmaddr)
+{
+        unsigned long addr = (unsigned long) page_address(page);
+
+        if (pages_do_alias(addr, vmaddr)) {
+                if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
+                    !test_bit(PG_dcache_dirty, &page->flags)) {
+                        void *kaddr;
+
+                        kaddr = kmap_coherent(page, vmaddr);
+                        /* XXX.. For now kunmap_coherent() does a purge */
+                        /* __flush_purge_region((void *)kaddr, PAGE_SIZE); */
+                        kunmap_coherent(kaddr);
+                } else
+                        __flush_purge_region((void *)addr, PAGE_SIZE);
+        }
+}
+
+void flush_cache_all(void)
+{
+        cacheop_on_each_cpu(local_flush_cache_all, NULL, 1);
+}
+
+void flush_cache_mm(struct mm_struct *mm)
+{
+        cacheop_on_each_cpu(local_flush_cache_mm, mm, 1);
+}
+
+void flush_cache_dup_mm(struct mm_struct *mm)
+{
+        cacheop_on_each_cpu(local_flush_cache_dup_mm, mm, 1);
+}
+
+void flush_cache_page(struct vm_area_struct *vma, unsigned long addr,
+                      unsigned long pfn)
+{
+        struct flusher_data data;
+
+        data.vma = vma;
+        data.addr1 = addr;
+        data.addr2 = pfn;
+
+        cacheop_on_each_cpu(local_flush_cache_page, (void *)&data, 1);
+}
+
+void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
+                       unsigned long end)
+{
+        struct flusher_data data;
+
+        data.vma = vma;
+        data.addr1 = start;
+        data.addr2 = end;
+
+        cacheop_on_each_cpu(local_flush_cache_range, (void *)&data, 1);
+}
+
+void flush_dcache_page(struct page *page)
+{
+        cacheop_on_each_cpu(local_flush_dcache_page, page, 1);
+}
+
+void flush_icache_range(unsigned long start, unsigned long end)
+{
+        struct flusher_data data;
+
+        data.vma = NULL;
+        data.addr1 = start;
+        data.addr2 = end;
+
+        cacheop_on_each_cpu(local_flush_icache_range, (void *)&data, 1);
+}
+
+void flush_icache_page(struct vm_area_struct *vma, struct page *page)
+{
+        /* Nothing uses the VMA, so just pass the struct page along */
+        cacheop_on_each_cpu(local_flush_icache_page, page, 1);
+}
+
+void flush_cache_sigtramp(unsigned long address)
+{
+        cacheop_on_each_cpu(local_flush_cache_sigtramp, (void *)address, 1);
+}
+
+static void compute_alias(struct cache_info *c)
+{
+        c->alias_mask = ((c->sets - 1) << c->entry_shift) & ~(PAGE_SIZE - 1);
+        c->n_aliases = c->alias_mask ? (c->alias_mask >> PAGE_SHIFT) + 1 : 0;
+}
+
+static void __init emit_cache_params(void)
+{
+        printk(KERN_NOTICE "I-cache : n_ways=%d n_sets=%d way_incr=%d\n",
+                boot_cpu_data.icache.ways,
+                boot_cpu_data.icache.sets,
+                boot_cpu_data.icache.way_incr);
+        printk(KERN_NOTICE "I-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
+                boot_cpu_data.icache.entry_mask,
+                boot_cpu_data.icache.alias_mask,
+                boot_cpu_data.icache.n_aliases);
+        printk(KERN_NOTICE "D-cache : n_ways=%d n_sets=%d way_incr=%d\n",
+                boot_cpu_data.dcache.ways,
+                boot_cpu_data.dcache.sets,
+                boot_cpu_data.dcache.way_incr);
+        printk(KERN_NOTICE "D-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
+                boot_cpu_data.dcache.entry_mask,
+                boot_cpu_data.dcache.alias_mask,
+                boot_cpu_data.dcache.n_aliases);
+
+        /*
+         * Emit Secondary Cache parameters if the CPU has a probed L2.
+         */
+        if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
+                printk(KERN_NOTICE "S-cache : n_ways=%d n_sets=%d way_incr=%d\n",
+                        boot_cpu_data.scache.ways,
+                        boot_cpu_data.scache.sets,
+                        boot_cpu_data.scache.way_incr);
+                printk(KERN_NOTICE "S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
+                        boot_cpu_data.scache.entry_mask,
+                        boot_cpu_data.scache.alias_mask,
+                        boot_cpu_data.scache.n_aliases);
+        }
+}
+
+void __init cpu_cache_init(void)
+{
+        compute_alias(&boot_cpu_data.icache);
+        compute_alias(&boot_cpu_data.dcache);
+        compute_alias(&boot_cpu_data.scache);
+
+        __flush_wback_region            = noop__flush_region;
+        __flush_purge_region            = noop__flush_region;
+        __flush_invalidate_region       = noop__flush_region;
+
+        if (boot_cpu_data.family == CPU_FAMILY_SH2) {
+                extern void __weak sh2_cache_init(void);
+
+                sh2_cache_init();
+        }
+
+        if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
+                extern void __weak sh2a_cache_init(void);
+
+                sh2a_cache_init();
+        }
+
+        if (boot_cpu_data.family == CPU_FAMILY_SH3) {
+                extern void __weak sh3_cache_init(void);
+
+                sh3_cache_init();
+
+                if ((boot_cpu_data.type == CPU_SH7705) &&
+                    (boot_cpu_data.dcache.sets == 512)) {
+                        extern void __weak sh7705_cache_init(void);
+
+                        sh7705_cache_init();
+                }
+        }
+
+        if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
+            (boot_cpu_data.family == CPU_FAMILY_SH4A) ||
+            (boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
+                extern void __weak sh4_cache_init(void);
+
+                sh4_cache_init();
+        }
+
+        if (boot_cpu_data.family == CPU_FAMILY_SH5) {
+                extern void __weak sh5_cache_init(void);
+
+                sh5_cache_init();
+        }
+
+        emit_cache_params();
+}
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 71925946f1e1..47530104e0ad 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -2,7 +2,7 @@
  * Page fault handler for SH with an MMU.
  *
  *  Copyright (C) 1999  Niibe Yutaka
- *  Copyright (C) 2003 - 2008  Paul Mundt
+ *  Copyright (C) 2003 - 2009  Paul Mundt
  *
  *  Based on linux/arch/i386/mm/fault.c:
  *   Copyright (C) 1995  Linus Torvalds
@@ -15,7 +15,7 @@
 #include <linux/mm.h>
 #include <linux/hardirq.h>
 #include <linux/kprobes.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <asm/io_trapped.h>
 #include <asm/system.h>
 #include <asm/mmu_context.h>
@@ -25,18 +25,91 @@ static inline int notify_page_fault(struct pt_regs *regs, int trap)
 {
         int ret = 0;
 
-#ifdef CONFIG_KPROBES
-        if (!user_mode(regs)) {
+        if (kprobes_built_in() && !user_mode(regs)) {
                 preempt_disable();
                 if (kprobe_running() && kprobe_fault_handler(regs, trap))
                         ret = 1;
                 preempt_enable();
         }
-#endif
 
         return ret;
 }
 
+static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
+{
+        unsigned index = pgd_index(address);
+        pgd_t *pgd_k;
+        pud_t *pud, *pud_k;
+        pmd_t *pmd, *pmd_k;
+
+        pgd += index;
+        pgd_k = init_mm.pgd + index;
+
+        if (!pgd_present(*pgd_k))
+                return NULL;
+
+        pud = pud_offset(pgd, address);
+        pud_k = pud_offset(pgd_k, address);
+        if (!pud_present(*pud_k))
+                return NULL;
+
+        pmd = pmd_offset(pud, address);
+        pmd_k = pmd_offset(pud_k, address);
+        if (!pmd_present(*pmd_k))
+                return NULL;
+
+        if (!pmd_present(*pmd))
+                set_pmd(pmd, *pmd_k);
+        else {
+                /*
+                 * The page tables are fully synchronised so there must
+                 * be another reason for the fault. Return NULL here to
+                 * signal that we have not taken care of the fault.
+                 */
+                BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
+                return NULL;
+        }
+
+        return pmd_k;
+}
+
+/*
+ * Handle a fault on the vmalloc or module mapping area
+ */
+static noinline int vmalloc_fault(unsigned long address)
+{
+        pgd_t *pgd_k;
+        pmd_t *pmd_k;
+        pte_t *pte_k;
+
+        /* Make sure we are in vmalloc/module/P3 area: */
+        if (!(address >= VMALLOC_START && address < P3_ADDR_MAX))
+                return -1;
+
+        /*
+         * Synchronize this task's top level page-table
+         * with the 'reference' page table.
+         *
+         * Do _not_ use "current" here. We might be inside
+         * an interrupt in the middle of a task switch..
+         */
+        pgd_k = get_TTB();
+        pmd_k = vmalloc_sync_one(pgd_k, address);
+        if (!pmd_k)
+                return -1;
+
+        pte_k = pte_offset_kernel(pmd_k, address);
+        if (!pte_present(*pte_k))
+                return -1;
+
+        return 0;
+}
+
+static int fault_in_kernel_space(unsigned long address)
+{
+        return address >= TASK_SIZE;
+}
+
 /*
  * This routine handles page faults.  It determines the address,
  * and the problem, and then passes it off to one of the appropriate
@@ -46,6 +119,7 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
                                         unsigned long writeaccess,
                                         unsigned long address)
 {
+        unsigned long vec;
         struct task_struct *tsk;
         struct mm_struct *mm;
         struct vm_area_struct * vma;
@@ -53,70 +127,41 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
         int fault;
         siginfo_t info;
 
-        /*
-         * We don't bother with any notifier callbacks here, as they are
-         * all handled through the __do_page_fault() fast-path.
-         */
-
         tsk = current;
+        mm = tsk->mm;
         si_code = SEGV_MAPERR;
+        vec = lookup_exception_vector();
 
-        if (unlikely(address >= TASK_SIZE)) {
-                /*
-                 * Synchronize this task's top level page-table
-                 * with the 'reference' page table.
-                 *
-                 * Do _not_ use "tsk" here. We might be inside
-                 * an interrupt in the middle of a task switch..
-                 */
-                int offset = pgd_index(address);
-                pgd_t *pgd, *pgd_k;
-                pud_t *pud, *pud_k;
-                pmd_t *pmd, *pmd_k;
-
-                pgd = get_TTB() + offset;
-                pgd_k = swapper_pg_dir + offset;
-
-                if (!pgd_present(*pgd)) {
-                        if (!pgd_present(*pgd_k))
-                                goto bad_area_nosemaphore;
-                        set_pgd(pgd, *pgd_k);
+        /*
+         * We fault-in kernel-space virtual memory on-demand. The
+         * 'reference' page table is init_mm.pgd.
+         *
+         * NOTE! We MUST NOT take any locks for this case. We may
+         * be in an interrupt or a critical region, and should
+         * only copy the information from the master page table,
+         * nothing more.
+         */
+        if (unlikely(fault_in_kernel_space(address))) {
+                if (vmalloc_fault(address) >= 0)
                         return;
-                }
-
-                pud = pud_offset(pgd, address);
-                pud_k = pud_offset(pgd_k, address);
-
-                if (!pud_present(*pud)) {
-                        if (!pud_present(*pud_k))
-                                goto bad_area_nosemaphore;
-                        set_pud(pud, *pud_k);
+                if (notify_page_fault(regs, vec))
                         return;
-                }
 
-                pmd = pmd_offset(pud, address);
-                pmd_k = pmd_offset(pud_k, address);
-                if (pmd_present(*pmd) || !pmd_present(*pmd_k))
-                        goto bad_area_nosemaphore;
-                set_pmd(pmd, *pmd_k);
-
-                return;
+                goto bad_area_nosemaphore;
         }
 
-        mm = tsk->mm;
-
-        if (unlikely(notify_page_fault(regs, lookup_exception_vector())))
+        if (unlikely(notify_page_fault(regs, vec)))
                 return;
 
         /* Only enable interrupts if they were on before the fault */
         if ((regs->sr & SR_IMASK) != SR_IMASK)
                 local_irq_enable();
 
-        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
 
         /*
-         * If we're in an interrupt or have no user
-         * context, we must not take the fault..
+         * If we're in an interrupt, have no user context or are running
+         * in an atomic region then we must not take the fault:
          */
         if (in_atomic() || !mm)
                 goto no_context;
@@ -132,10 +177,11 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
                 goto bad_area;
         if (expand_stack(vma, address))
                 goto bad_area;
-/*
- * Ok, we have a good vm_area for this memory access, so
- * we can handle it..
- */
+
+        /*
+         * Ok, we have a good vm_area for this memory access, so
+         * we can handle it..
+         */
 good_area:
         si_code = SEGV_ACCERR;
         if (writeaccess) {
@@ -162,21 +208,21 @@ survive:
         }
         if (fault & VM_FAULT_MAJOR) {
                 tsk->maj_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
                                      regs, address);
         } else {
                 tsk->min_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
                                      regs, address);
         }
 
         up_read(&mm->mmap_sem);
         return;
 
-/*
- * Something tried to access memory that isn't in our memory map..
- * Fix it, but check if it's kernel or user first..
- */
+        /*
+         * Something tried to access memory that isn't in our memory map..
+         * Fix it, but check if it's kernel or user first..
+         */
 bad_area:
         up_read(&mm->mmap_sem);
 
@@ -272,16 +318,15 @@ do_sigbus:
 /*
  * Called with interrupts disabled.
  */
-asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
-                                         unsigned long writeaccess,
-                                         unsigned long address)
+asmlinkage int __kprobes
+handle_tlbmiss(struct pt_regs *regs, unsigned long writeaccess,
+               unsigned long address)
 {
         pgd_t *pgd;
         pud_t *pud;
         pmd_t *pmd;
         pte_t *pte;
         pte_t entry;
-        int ret = 1;
 
         /*
          * We don't take page faults for P1, P2, and parts of P4, these
@@ -292,40 +337,41 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
                 pgd = pgd_offset_k(address);
         } else {
                 if (unlikely(address >= TASK_SIZE || !current->mm))
-                        goto out;
+                        return 1;
 
                 pgd = pgd_offset(current->mm, address);
         }
 
         pud = pud_offset(pgd, address);
         if (pud_none_or_clear_bad(pud))
-                goto out;
+                return 1;
         pmd = pmd_offset(pud, address);
         if (pmd_none_or_clear_bad(pmd))
-                goto out;
+                return 1;
         pte = pte_offset_kernel(pmd, address);
         entry = *pte;
         if (unlikely(pte_none(entry) || pte_not_present(entry)))
-                goto out;
+                return 1;
         if (unlikely(writeaccess && !pte_write(entry)))
-                goto out;
+                return 1;
 
         if (writeaccess)
                 entry = pte_mkdirty(entry);
         entry = pte_mkyoung(entry);
 
+        set_pte(pte, entry);
+
 #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP)
         /*
-         * ITLB is not affected by "ldtlb" instruction.
-         * So, we need to flush the entry by ourselves.
+         * SH-4 does not set MMUCR.RC to the corresponding TLB entry in
+         * the case of an initial page write exception, so we need to
+         * flush it in order to avoid potential TLB entry duplication.
          */
-        local_flush_tlb_one(get_asid(), address & PAGE_MASK);
+        if (writeaccess == 2)
+                local_flush_tlb_one(get_asid(), address & PAGE_MASK);
 #endif
 
-        set_pte(pte, entry);
         update_mmu_cache(NULL, address, entry);
 
-        ret = 0;
-out:
-        return ret;
+        return 0;
 }
diff --git a/arch/sh/mm/fault_64.c b/arch/sh/mm/fault_64.c
index bd63b961b2a9..2b356cec2489 100644
--- a/arch/sh/mm/fault_64.c
+++ b/arch/sh/mm/fault_64.c
@@ -56,16 +56,7 @@ inline void __do_tlb_refill(unsigned long address,
         /*
          * Set PTEH register
          */
-        pteh = address & MMU_VPN_MASK;
-
-        /* Sign extend based on neff. */
-#if (NEFF == 32)
-        /* Faster sign extension */
-        pteh = (unsigned long long)(signed long long)(signed long)pteh;
-#else
-        /* General case */
-        pteh = (pteh & NEFF_SIGN) ? (pteh | NEFF_MASK) : pteh;
-#endif
+        pteh = neff_sign_extend(address & MMU_VPN_MASK);
 
         /* Set the ASID. */
         pteh |= get_asid() << PTEH_ASID_SHIFT;
diff --git a/arch/sh/mm/flush-sh4.c b/arch/sh/mm/flush-sh4.c
new file mode 100644
index 000000000000..cef402678f42
--- /dev/null
+++ b/arch/sh/mm/flush-sh4.c
@@ -0,0 +1,108 @@
+#include <linux/mm.h>
+#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+
+/*
+ * Write back the dirty D-caches, but not invalidate them.
+ *
+ * START: Virtual Address (U0, P1, or P3)
+ * SIZE: Size of the region.
+ */
+static void sh4__flush_wback_region(void *start, int size)
+{
+        reg_size_t aligned_start, v, cnt, end;
+
+        aligned_start = register_align(start);
+        v = aligned_start & ~(L1_CACHE_BYTES-1);
+        end = (aligned_start + size + L1_CACHE_BYTES-1)
+                & ~(L1_CACHE_BYTES-1);
+        cnt = (end - v) / L1_CACHE_BYTES;
+
+        while (cnt >= 8) {
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                cnt -= 8;
+        }
+
+        while (cnt) {
+                __ocbwb(v); v += L1_CACHE_BYTES;
+                cnt--;
+        }
+}
+
+/*
+ * Write back the dirty D-caches and invalidate them.
+ *
+ * START: Virtual Address (U0, P1, or P3)
+ * SIZE: Size of the region.
+ */
+static void sh4__flush_purge_region(void *start, int size)
+{
+        reg_size_t aligned_start, v, cnt, end;
+
+        aligned_start = register_align(start);
+        v = aligned_start & ~(L1_CACHE_BYTES-1);
+        end = (aligned_start + size + L1_CACHE_BYTES-1)
+                & ~(L1_CACHE_BYTES-1);
+        cnt = (end - v) / L1_CACHE_BYTES;
+
+        while (cnt >= 8) {
+                __ocbp(v); v += L1_CACHE_BYTES;
+                __ocbp(v); v += L1_CACHE_BYTES;
+                __ocbp(v); v += L1_CACHE_BYTES;
+                __ocbp(v); v += L1_CACHE_BYTES;
+                __ocbp(v); v += L1_CACHE_BYTES;
+                __ocbp(v); v += L1_CACHE_BYTES;
+                __ocbp(v); v += L1_CACHE_BYTES;
+                __ocbp(v); v += L1_CACHE_BYTES;
+                cnt -= 8;
+        }
+        while (cnt) {
+                __ocbp(v); v += L1_CACHE_BYTES;
+                cnt--;
+        }
+}
+
+/*
+ * No write back please
+ */
+static void sh4__flush_invalidate_region(void *start, int size)
+{
+        reg_size_t aligned_start, v, cnt, end;
+
+        aligned_start = register_align(start);
+        v = aligned_start & ~(L1_CACHE_BYTES-1);
+        end = (aligned_start + size + L1_CACHE_BYTES-1)
+                & ~(L1_CACHE_BYTES-1);
+        cnt = (end - v) / L1_CACHE_BYTES;
+
+        while (cnt >= 8) {
+                __ocbi(v); v += L1_CACHE_BYTES;
+                __ocbi(v); v += L1_CACHE_BYTES;
+                __ocbi(v); v += L1_CACHE_BYTES;
+                __ocbi(v); v += L1_CACHE_BYTES;
+                __ocbi(v); v += L1_CACHE_BYTES;
+                __ocbi(v); v += L1_CACHE_BYTES;
+                __ocbi(v); v += L1_CACHE_BYTES;
+                __ocbi(v); v += L1_CACHE_BYTES;
+                cnt -= 8;
+        }
+
+        while (cnt) {
+                __ocbi(v); v += L1_CACHE_BYTES;
+                cnt--;
+        }
+}
+
+void __init sh4__flush_region_init(void)
+{
+        __flush_wback_region            = sh4__flush_wback_region;
+        __flush_invalidate_region       = sh4__flush_invalidate_region;
+        __flush_purge_region            = sh4__flush_purge_region;
+}
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index fe532aeaa16d..8173e38afd38 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -106,27 +106,31 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
         pgd_t *pgd;
         pud_t *pud;
         pmd_t *pmd;
-        int pgd_idx;
+        pte_t *pte;
+        int i, j, k;
         unsigned long vaddr;
 
-        vaddr = start & PMD_MASK;
-        end = (end + PMD_SIZE - 1) & PMD_MASK;
-        pgd_idx = pgd_index(vaddr);
-        pgd = pgd_base + pgd_idx;
-
-        for ( ; (pgd_idx < PTRS_PER_PGD) && (vaddr != end); pgd++, pgd_idx++) {
-                BUG_ON(pgd_none(*pgd));
-                pud = pud_offset(pgd, 0);
-                BUG_ON(pud_none(*pud));
-                pmd = pmd_offset(pud, 0);
-
-                if (!pmd_present(*pmd)) {
-                        pte_t *pte_table;
-                        pte_table = (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);
-                        pmd_populate_kernel(&init_mm, pmd, pte_table);
+        vaddr = start;
+        i = __pgd_offset(vaddr);
+        j = __pud_offset(vaddr);
+        k = __pmd_offset(vaddr);
+        pgd = pgd_base + i;
+
+        for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
+                pud = (pud_t *)pgd;
+                for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
+                        pmd = (pmd_t *)pud;
+                        for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
+                                if (pmd_none(*pmd)) {
+                                        pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
+                                        pmd_populate_kernel(&init_mm, pmd, pte);
+                                        BUG_ON(pte != pte_offset_kernel(pmd, 0));
+                                }
+                                vaddr += PMD_SIZE;
+                        }
+                        k = 0;
                 }
-
-                vaddr += PMD_SIZE;
+                j = 0;
         }
 }
 #endif  /* CONFIG_MMU */
@@ -137,7 +141,7 @@ void __init page_table_range_init(unsigned long start, unsigned long end,
 void __init paging_init(void)
 {
         unsigned long max_zone_pfns[MAX_NR_ZONES];
-        unsigned long vaddr;
+        unsigned long vaddr, end;
         int nid;
 
         /* We don't need to map the kernel through the TLB, as
@@ -155,7 +159,8 @@ void __init paging_init(void)
          * pte's will be filled in by __set_fixmap().
          */
         vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
-        page_table_range_init(vaddr, 0, swapper_pg_dir);
+        end = (FIXADDR_TOP + PMD_SIZE - 1) & PMD_MASK;
+        page_table_range_init(vaddr, end, swapper_pg_dir);
 
         kmap_coherent_init();
 
@@ -181,8 +186,6 @@ void __init paging_init(void)
         set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start));
 }
 
-static struct kcore_list kcore_mem, kcore_vmalloc;
-
 void __init mem_init(void)
 {
         int codesize, datasize, initsize;
@@ -210,6 +213,9 @@ void __init mem_init(void)
                         high_memory = node_high_memory;
         }
 
+        /* Set this up early, so we can take care of the zero page */
+        cpu_cache_init();
+
         /* clear the zero-page */
         memset(empty_zero_page, 0, PAGE_SIZE);
         __flush_wback_region(empty_zero_page, PAGE_SIZE);
@@ -218,20 +224,14 @@ void __init mem_init(void)
         datasize =  (unsigned long) &_edata - (unsigned long) &_etext;
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
-        kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
-        kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
-                   VMALLOC_END - VMALLOC_START);
-
         printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, "
                "%dk data, %dk init)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 num_physpages << (PAGE_SHIFT-10),
                 codesize >> 10,
                 datasize >> 10,
                 initsize >> 10);
 
-        p3_cache_init();
-
         /* Initialize the vDSO */
         vsyscall_init();
 }
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index da2f4186f2cd..c3250614e3ae 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -57,14 +57,6 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
         if (is_pci_memory_fixed_range(phys_addr, size))
                 return (void __iomem *)phys_addr;
 
-#if !defined(CONFIG_PMB_FIXED)
-        /*
-         * Don't allow anybody to remap normal RAM that we're using..
-         */
-        if (phys_addr < virt_to_phys(high_memory))
-                return NULL;
-#endif
-
         /*
          * Mappings have to be page-aligned
          */
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index 828c8597219d..b16843d02b76 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -94,7 +94,6 @@ static struct resource *shmedia_find_resource(struct resource *root,
 static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size,
                                       const char *name, unsigned long flags)
 {
-        static int printed_full;
         struct xresource *xres;
         struct resource *res;
         char *tack;
@@ -108,11 +107,8 @@ static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size,
                 tack = xres->xname;
                 res = &xres->xres;
         } else {
-                if (!printed_full) {
-                        printk(KERN_NOTICE "%s: done with statics, "
+                printk_once(KERN_NOTICE "%s: done with statics, "
                                "switching to kmalloc\n", __func__);
-                        printed_full = 1;
-                }
                 tlen = strlen(name);
                 tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL);
                 if (!tack)
diff --git a/arch/sh/mm/kmap.c b/arch/sh/mm/kmap.c
new file mode 100644
index 000000000000..16e01b5fed04
--- /dev/null
+++ b/arch/sh/mm/kmap.c
@@ -0,0 +1,65 @@
+/*
+ * arch/sh/mm/kmap.c
+ *
+ * Copyright (C) 1999, 2000, 2002  Niibe Yutaka
+ * Copyright (C) 2002 - 2009  Paul Mundt
+ *
+ * Released under the terms of the GNU GPL v2.0.
+ */
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/mutex.h>
+#include <linux/fs.h>
+#include <linux/highmem.h>
+#include <linux/module.h>
+#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+
+#define kmap_get_fixmap_pte(vaddr)                                     \
+        pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
+
+static pte_t *kmap_coherent_pte;
+
+void __init kmap_coherent_init(void)
+{
+        unsigned long vaddr;
+
+        /* cache the first coherent kmap pte */
+        vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
+        kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
+}
+
+void *kmap_coherent(struct page *page, unsigned long addr)
+{
+        enum fixed_addresses idx;
+        unsigned long vaddr;
+
+        BUG_ON(test_bit(PG_dcache_dirty, &page->flags));
+
+        pagefault_disable();
+
+        idx = FIX_CMAP_END -
+                ((addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT);
+        vaddr = __fix_to_virt(idx);
+
+        BUG_ON(!pte_none(*(kmap_coherent_pte - idx)));
+        set_pte(kmap_coherent_pte - idx, mk_pte(page, PAGE_KERNEL));
+
+        return (void *)vaddr;
+}
+
+void kunmap_coherent(void *kvaddr)
+{
+        if (kvaddr >= (void *)FIXADDR_START) {
+                unsigned long vaddr = (unsigned long)kvaddr & PAGE_MASK;
+                enum fixed_addresses idx = __virt_to_fix(vaddr);
+
+                /* XXX.. Kill this later, here for sanity at the moment.. */
+                __flush_purge_region((void *)vaddr, PAGE_SIZE);
+
+                pte_clear(&init_mm, vaddr, kmap_coherent_pte - idx);
+                local_flush_tlb_one(get_asid(), vaddr);
+        }
+
+        pagefault_enable();
+}
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index 1b5fdfb4e0c2..d2984fa42d3d 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -14,10 +14,10 @@
 #include <asm/page.h>
 #include <asm/processor.h>
 
-#ifdef CONFIG_MMU
 unsigned long shm_align_mask = PAGE_SIZE - 1;   /* Sane caches */
 EXPORT_SYMBOL(shm_align_mask);
 
+#ifdef CONFIG_MMU
 /*
  * To avoid cache aliases, we map the shared page with same color.
  */
diff --git a/arch/sh/mm/tlb-nommu.c b/arch/sh/mm/nommu.c
index 71c742b5aee3..ac16c05917ef 100644
--- a/arch/sh/mm/tlb-nommu.c
+++ b/arch/sh/mm/nommu.c
@@ -1,20 +1,41 @@
 /*
- * arch/sh/mm/tlb-nommu.c
+ * arch/sh/mm/nommu.c
  *
- * TLB Operations for MMUless SH.
+ * Various helper routines and stubs for MMUless SH.
  *
- * Copyright (C) 2002 Paul Mundt
+ * Copyright (C) 2002 - 2009 Paul Mundt
  *
  * Released under the terms of the GNU GPL v2.0.
  */
 #include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
 #include <linux/mm.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
+#include <asm/page.h>
+#include <asm/uaccess.h>
 
 /*
  * Nothing too terribly exciting here ..
  */
+void copy_page(void *to, void *from)
+{
+        memcpy(to, from, PAGE_SIZE);
+}
+
+__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n)
+{
+        memcpy(to, from, n);
+        return 0;
+}
+
+__kernel_size_t __clear_user(void *to, __kernel_size_t n)
+{
+        memset(to, 0, n);
+        return 0;
+}
+
 void local_flush_tlb_all(void)
 {
         BUG();
@@ -46,8 +67,21 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
         BUG();
 }
 
-void update_mmu_cache(struct vm_area_struct * vma,
-                      unsigned long address, pte_t pte)
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
+{
+}
+
+void __init kmap_coherent_init(void)
+{
+}
+
+void *kmap_coherent(struct page *page, unsigned long addr)
+{
+        BUG();
+        return NULL;
+}
+
+void kunmap_coherent(void *kvaddr)
 {
         BUG();
 }
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 095d93bec7cd..9b784fdb947c 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -9,6 +9,7 @@
  */
 #include <linux/module.h>
 #include <linux/bootmem.h>
+#include <linux/lmb.h>
 #include <linux/mm.h>
 #include <linux/numa.h>
 #include <linux/pfn.h>
@@ -26,6 +27,15 @@ EXPORT_SYMBOL_GPL(node_data);
 void __init setup_memory(void)
 {
         unsigned long free_pfn = PFN_UP(__pa(_end));
+        u64 base = min_low_pfn << PAGE_SHIFT;
+        u64 size = (max_low_pfn << PAGE_SHIFT) - min_low_pfn;
+
+        lmb_add(base, size);
+
+        /* Reserve the LMB regions used by the kernel, initrd, etc.. */
+        lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
+                    (PFN_PHYS(free_pfn) + PAGE_SIZE - 1) -
+                    (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
 
         /*
          * Node 0 sets up its pgdat at the first available pfn,
@@ -45,24 +55,23 @@ void __init setup_memory(void)
 
 void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
 {
-        unsigned long bootmap_pages, bootmap_start, bootmap_size;
-        unsigned long start_pfn, free_pfn, end_pfn;
+        unsigned long bootmap_pages;
+        unsigned long start_pfn, end_pfn;
+        unsigned long bootmem_paddr;
 
         /* Don't allow bogus node assignment */
         BUG_ON(nid > MAX_NUMNODES || nid == 0);
 
-        /*
-         * The free pfn starts at the beginning of the range, and is
-         * advanced as necessary for pgdat and node map allocations.
-         */
-        free_pfn = start_pfn = start >> PAGE_SHIFT;
+        start_pfn = start >> PAGE_SHIFT;
         end_pfn = end >> PAGE_SHIFT;
 
+        lmb_add(start, end - start);
+
         __add_active_range(nid, start_pfn, end_pfn);
 
         /* Node-local pgdat */
-        NODE_DATA(nid) = pfn_to_kaddr(free_pfn);
-        free_pfn += PFN_UP(sizeof(struct pglist_data));
+        NODE_DATA(nid) = __va(lmb_alloc_base(sizeof(struct pglist_data),
+                                             SMP_CACHE_BYTES, end_pfn));
         memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
 
         NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
@@ -71,16 +80,17 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
 
         /* Node-local bootmap */
         bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
-        bootmap_start = (unsigned long)pfn_to_kaddr(free_pfn);
-        bootmap_size = init_bootmem_node(NODE_DATA(nid), free_pfn, start_pfn,
-                                    end_pfn);
+        bootmem_paddr = lmb_alloc_base(bootmap_pages << PAGE_SHIFT,
+                                       PAGE_SIZE, end_pfn);
+        init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT,
+                          start_pfn, end_pfn);
 
         free_bootmem_with_active_regions(nid, end_pfn);
 
         /* Reserve the pgdat and bootmap space with the bootmem allocator */
         reserve_bootmem_node(NODE_DATA(nid), start_pfn << PAGE_SHIFT,
                              sizeof(struct pglist_data), BOOTMEM_DEFAULT);
-        reserve_bootmem_node(NODE_DATA(nid), free_pfn << PAGE_SHIFT,
+        reserve_bootmem_node(NODE_DATA(nid), bootmem_paddr,
                              bootmap_pages << PAGE_SHIFT, BOOTMEM_DEFAULT);
 
         /* It's up */
diff --git a/arch/sh/mm/pg-nommu.c b/arch/sh/mm/pg-nommu.c
deleted file mode 100644
index 91ed4e695ff7..000000000000
--- a/arch/sh/mm/pg-nommu.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * arch/sh/mm/pg-nommu.c
- *
- * clear_page()/copy_page() implementation for MMUless SH.
- *
- * Copyright (C) 2003  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <asm/page.h>
-#include <asm/uaccess.h>
-
-void copy_page(void *to, void *from)
-{
-        memcpy(to, from, PAGE_SIZE);
-}
-
-void clear_page(void *to)
-{
-        memset(to, 0, PAGE_SIZE);
-}
-
-__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n)
-{
-        memcpy(to, from, n);
-        return 0;
-}
-
-__kernel_size_t __clear_user(void *to, __kernel_size_t n)
-{
-        memset(to, 0, n);
-        return 0;
-}
diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c
deleted file mode 100644
index 2fe14da1f839..000000000000
--- a/arch/sh/mm/pg-sh4.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * arch/sh/mm/pg-sh4.c
- *
- * Copyright (C) 1999, 2000, 2002  Niibe Yutaka
- * Copyright (C) 2002 - 2007  Paul Mundt
- *
- * Released under the terms of the GNU GPL v2.0.
- */
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/mutex.h>
-#include <linux/fs.h>
-#include <linux/highmem.h>
-#include <linux/module.h>
-#include <asm/mmu_context.h>
-#include <asm/cacheflush.h>
-
-#define CACHE_ALIAS (current_cpu_data.dcache.alias_mask)
-
-#define kmap_get_fixmap_pte(vaddr)                                     \
-        pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
-
-static pte_t *kmap_coherent_pte;
-
-void __init kmap_coherent_init(void)
-{
-        unsigned long vaddr;
-
-        /* cache the first coherent kmap pte */
-        vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
-        kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
-}
-
-static inline void *kmap_coherent(struct page *page, unsigned long addr)
-{
-        enum fixed_addresses idx;
-        unsigned long vaddr, flags;
-        pte_t pte;
-
-        inc_preempt_count();
-
-        idx = (addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT;
-        vaddr = __fix_to_virt(FIX_CMAP_END - idx);
-        pte = mk_pte(page, PAGE_KERNEL);
-
-        local_irq_save(flags);
-        flush_tlb_one(get_asid(), vaddr);
-        local_irq_restore(flags);
-
-        update_mmu_cache(NULL, vaddr, pte);
-
-        set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte);
-
-        return (void *)vaddr;
-}
-
-static inline void kunmap_coherent(struct page *page)
-{
-        dec_preempt_count();
-        preempt_check_resched();
-}
-
-/*
- * clear_user_page
- * @to: P1 address
- * @address: U0 address to be mapped
- * @page: page (virt_to_page(to))
- */
-void clear_user_page(void *to, unsigned long address, struct page *page)
-{
-        __set_bit(PG_mapped, &page->flags);
-
-        clear_page(to);
-        if ((((address & PAGE_MASK) ^ (unsigned long)to) & CACHE_ALIAS))
-                __flush_wback_region(to, PAGE_SIZE);
-}
-
-void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
-                       unsigned long vaddr, void *dst, const void *src,
-                       unsigned long len)
-{
-        void *vto;
-
-        __set_bit(PG_mapped, &page->flags);
-
-        vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
-        memcpy(vto, src, len);
-        kunmap_coherent(vto);
-
-        if (vma->vm_flags & VM_EXEC)
-                flush_cache_page(vma, vaddr, page_to_pfn(page));
-}
-
-void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
-                         unsigned long vaddr, void *dst, const void *src,
-                         unsigned long len)
-{
-        void *vfrom;
-
-        __set_bit(PG_mapped, &page->flags);
-
-        vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
-        memcpy(dst, vfrom, len);
-        kunmap_coherent(vfrom);
-}
-
-void copy_user_highpage(struct page *to, struct page *from,
-                        unsigned long vaddr, struct vm_area_struct *vma)
-{
-        void *vfrom, *vto;
-
-        __set_bit(PG_mapped, &to->flags);
-
-        vto = kmap_atomic(to, KM_USER1);
-        vfrom = kmap_coherent(from, vaddr);
-        copy_page(vto, vfrom);
-        kunmap_coherent(vfrom);
-
-        if (((vaddr ^ (unsigned long)vto) & CACHE_ALIAS))
-                __flush_wback_region(vto, PAGE_SIZE);
-
-        kunmap_atomic(vto, KM_USER1);
-        /* Make sure this page is cleared on other CPU's too before using it */
-        smp_wmb();
-}
-EXPORT_SYMBOL(copy_user_highpage);
-
-/*
- * For SH-4, we have our own implementation for ptep_get_and_clear
- */
-pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
-{
-        pte_t pte = *ptep;
-
-        pte_clear(mm, addr, ptep);
-        if (!pte_not_present(pte)) {
-                unsigned long pfn = pte_pfn(pte);
-                if (pfn_valid(pfn)) {
-                        struct page *page = pfn_to_page(pfn);
-                        struct address_space *mapping = page_mapping(page);
-                        if (!mapping || !mapping_writably_mapped(mapping))
-                                __clear_bit(PG_mapped, &page->flags);
-                }
-        }
-        return pte;
-}
diff --git a/arch/sh/mm/pg-sh7705.c b/arch/sh/mm/pg-sh7705.c
deleted file mode 100644
index eaf25147194c..000000000000
--- a/arch/sh/mm/pg-sh7705.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * arch/sh/mm/pg-sh7705.c
- *
- * Copyright (C) 1999, 2000  Niibe Yutaka
- * Copyright (C) 2004  Alex Song
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- */
-
-#include <linux/init.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/threads.h>
-#include <linux/fs.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/processor.h>
-#include <asm/cache.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/cacheflush.h>
-
-static inline void __flush_purge_virtual_region(void *p1, void *virt, int size)
-{
-        unsigned long v;
-        unsigned long begin, end;
-        unsigned long p1_begin;
-
-
-        begin = L1_CACHE_ALIGN((unsigned long)virt);
-        end = L1_CACHE_ALIGN((unsigned long)virt + size);
-
-        p1_begin = (unsigned long)p1 & ~(L1_CACHE_BYTES - 1);
-
-        /* do this the slow way as we may not have TLB entries
-         * for virt yet. */
-        for (v = begin; v < end; v += L1_CACHE_BYTES) {
-                unsigned long p;
-                unsigned long ways, addr;
-
-                p = __pa(p1_begin);
-
-                ways = current_cpu_data.dcache.ways;
-                addr = CACHE_OC_ADDRESS_ARRAY;
-
-                do {
-                        unsigned long data;
-
-                        addr |= (v & current_cpu_data.dcache.entry_mask);
-
-                        data = ctrl_inl(addr);
-                        if ((data & CACHE_PHYSADDR_MASK) ==
-                               (p & CACHE_PHYSADDR_MASK)) {
-                                data &= ~(SH_CACHE_UPDATED|SH_CACHE_VALID);
-                                ctrl_outl(data, addr);
-                        }
-
-                        addr += current_cpu_data.dcache.way_incr;
-                } while (--ways);
-
-                p1_begin += L1_CACHE_BYTES;
-        }
-}
-
-/*
- * clear_user_page
- * @to: P1 address
- * @address: U0 address to be mapped
- */
-void clear_user_page(void *to, unsigned long address, struct page *pg)
-{
-        struct page *page = virt_to_page(to);
-
-        __set_bit(PG_mapped, &page->flags);
-        if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) {
-                clear_page(to);
-                __flush_wback_region(to, PAGE_SIZE);
-        } else {
-                __flush_purge_virtual_region(to,
-                                             (void *)(address & 0xfffff000),
-                                             PAGE_SIZE);
-                clear_page(to);
-                __flush_wback_region(to, PAGE_SIZE);
-        }
-}
-
-/*
- * copy_user_page
- * @to: P1 address
- * @from: P1 address
- * @address: U0 address to be mapped
- */
-void copy_user_page(void *to, void *from, unsigned long address, struct page *pg)
-{
-        struct page *page = virt_to_page(to);
-
-
-        __set_bit(PG_mapped, &page->flags);
-        if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0) {
-                copy_page(to, from);
-                __flush_wback_region(to, PAGE_SIZE);
-        } else {
-                __flush_purge_virtual_region(to,
-                                             (void *)(address & 0xfffff000),
-                                             PAGE_SIZE);
-                copy_page(to, from);
-                __flush_wback_region(to, PAGE_SIZE);
-        }
-}
-
-/*
- * For SH7705, we have our own implementation for ptep_get_and_clear
- * Copied from pg-sh4.c
- */
-pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
-{
-        pte_t pte = *ptep;
-
-        pte_clear(mm, addr, ptep);
-        if (!pte_not_present(pte)) {
-                unsigned long pfn = pte_pfn(pte);
-                if (pfn_valid(pfn)) {
-                        struct page *page = pfn_to_page(pfn);
-                        struct address_space *mapping = page_mapping(page);
-                        if (!mapping || !mapping_writably_mapped(mapping))
-                                __clear_bit(PG_mapped, &page->flags);
-                }
-        }
-
-        return pte;
-}
-
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
index 2aab3ea934d7..409b7c2b4b9d 100644
--- a/arch/sh/mm/tlb-pteaex.c
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -16,34 +16,16 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
-void update_mmu_cache(struct vm_area_struct * vma,
-                      unsigned long address, pte_t pte)
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 {
-        unsigned long flags;
-        unsigned long pteval;
-        unsigned long vpn;
+        unsigned long flags, pteval, vpn;
 
-        /* Ptrace may call this routine. */
+        /*
+         * Handle debugger faulting in for debugee.
+         */
         if (vma && current->active_mm != vma->vm_mm)
                 return;
 
-#ifndef CONFIG_CACHE_OFF
-        {
-                unsigned long pfn = pte_pfn(pte);
-
-                if (pfn_valid(pfn)) {
-                        struct page *page = pfn_to_page(pfn);
-
-                        if (!test_bit(PG_mapped, &page->flags)) {
-                                unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
-                                __flush_wback_region((void *)P1SEGADDR(phys),
-                                                     PAGE_SIZE);
-                                __set_bit(PG_mapped, &page->flags);
-                        }
-                }
-        }
-#endif
-
         local_irq_save(flags);
 
         /* Set PTEH register */
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 17cb7c3adf22..ace8e6d2f59d 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -27,32 +27,16 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
-void update_mmu_cache(struct vm_area_struct * vma,
-                      unsigned long address, pte_t pte)
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 {
-        unsigned long flags;
-        unsigned long pteval;
-        unsigned long vpn;
+        unsigned long flags, pteval, vpn;
 
-        /* Ptrace may call this routine. */
+        /*
+         * Handle debugger faulting in for debugee.
+         */
         if (vma && current->active_mm != vma->vm_mm)
                 return;
 
-#if defined(CONFIG_SH7705_CACHE_32KB)
-        {
-                struct page *page = pte_page(pte);
-                unsigned long pfn = pte_pfn(pte);
-
-                if (pfn_valid(pfn) && !test_bit(PG_mapped, &page->flags)) {
-                        unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
-
-                        __flush_wback_region((void *)P1SEGADDR(phys),
-                                             PAGE_SIZE);
-                        __set_bit(PG_mapped, &page->flags);
-                }
-        }
-#endif
-
         local_irq_save(flags);
 
         /* Set PTEH register */
@@ -93,4 +77,3 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
         for (i = 0; i < ways; i++)
                 ctrl_outl(data, addr + (i << 8));
 }
-
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index f0c7b7397fa6..8cf550e2570f 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -15,34 +15,16 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
-void update_mmu_cache(struct vm_area_struct * vma,
-                      unsigned long address, pte_t pte)
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 {
-        unsigned long flags;
-        unsigned long pteval;
-        unsigned long vpn;
+        unsigned long flags, pteval, vpn;
 
-        /* Ptrace may call this routine. */
+        /*
+         * Handle debugger faulting in for debugee.
+         */
         if (vma && current->active_mm != vma->vm_mm)
                 return;
 
-#ifndef CONFIG_CACHE_OFF
-        {
-                unsigned long pfn = pte_pfn(pte);
-
-                if (pfn_valid(pfn)) {
-                        struct page *page = pfn_to_page(pfn);
-
-                        if (!test_bit(PG_mapped, &page->flags)) {
-                                unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
-                                __flush_wback_region((void *)P1SEGADDR(phys),
-                                                     PAGE_SIZE);
-                                __set_bit(PG_mapped, &page->flags);
-                        }
-                }
-        }
-#endif
-
         local_irq_save(flags);
 
         /* Set PTEH register */
@@ -61,9 +43,12 @@ void update_mmu_cache(struct vm_area_struct * vma,
          */
         ctrl_outl(pte.pte_high, MMU_PTEA);
 #else
-        if (cpu_data->flags & CPU_HAS_PTEA)
-                /* TODO: make this look less hacky */
-                ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
+        if (cpu_data->flags & CPU_HAS_PTEA) {
+                /* The last 3 bits and the first one of pteval contains
+                 * the PTEA timing control and space attribute bits
+                 */
+                ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA);
+        }
 #endif
 
         /* Set PTEL register */
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index dae131243bcc..fdb64e41ec50 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -117,26 +117,15 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry)
  * Load up a virtual<->physical translation for @eaddr<->@paddr in the
  * pre-allocated TLB slot @config_addr (see sh64_get_wired_dtlb_entry).
  */
-inline void sh64_setup_tlb_slot(unsigned long long config_addr,
-                                unsigned long eaddr,
-                                unsigned long asid,
-                                unsigned long paddr)
+void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr,
+                         unsigned long asid, unsigned long paddr)
 {
         unsigned long long pteh, ptel;
 
-        /* Sign extension */
-#if (NEFF == 32)
-        pteh = (unsigned long long)(signed long long)(signed long) eaddr;
-#else
-#error "Can't sign extend more than 32 bits yet"
-#endif
+        pteh = neff_sign_extend(eaddr);
         pteh &= PAGE_MASK;
         pteh |= (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
-#if (NEFF == 32)
-        ptel = (unsigned long long)(signed long long)(signed long) paddr;
-#else
-#error "Can't sign extend more than 32 bits yet"
-#endif
+        ptel = neff_sign_extend(paddr);
         ptel &= PAGE_MASK;
         ptel |= (_PAGE_CACHABLE | _PAGE_READ | _PAGE_WRITE);
 
@@ -152,5 +141,5 @@ inline void sh64_setup_tlb_slot(unsigned long long config_addr,
  *
  * Teardown any existing mapping in the TLB slot @config_addr.
  */
-inline void sh64_teardown_tlb_slot(unsigned long long config_addr)
+void sh64_teardown_tlb_slot(unsigned long long config_addr)
         __attribute__ ((alias("__flush_tlb_slot")));
diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c
index 3ce40ea34824..de0b0e881823 100644
--- a/arch/sh/mm/tlbflush_64.c
+++ b/arch/sh/mm/tlbflush_64.c
@@ -20,7 +20,7 @@
 #include <linux/mman.h>
 #include <linux/mm.h>
 #include <linux/smp.h>
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/interrupt.h>
 #include <asm/system.h>
 #include <asm/io.h>
@@ -116,7 +116,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess,
         /* Not an IO address, so reenable interrupts */
         local_irq_enable();
 
-        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
 
         /*
          * If we're in an interrupt or have no user
@@ -201,11 +201,11 @@ survive:
 
         if (fault & VM_FAULT_MAJOR) {
                 tsk->maj_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
                                      regs, address);
         } else {
                 tsk->min_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
                                      regs, address);
         }
 
@@ -329,22 +329,6 @@ do_sigbus:
                 goto no_context;
 }
 
-void update_mmu_cache(struct vm_area_struct * vma,
-                        unsigned long address, pte_t pte)
-{
-        /*
-         * This appears to get called once for every pte entry that gets
-         * established => I don't think it's efficient to try refilling the
-         * TLBs with the pages - some may not get accessed even.  Also, for
-         * executable pages, it is impossible to determine reliably here which
-         * TLB they should be mapped into (or both even).
-         *
-         * So, just do nothing here and handle faults on demand.  In the
-         * TLBMISS handling case, the refill is now done anyway after the pte
-         * has been fixed up, so that deals with most useful cases.
-         */
-}
-
 void local_flush_tlb_one(unsigned long asid, unsigned long page)
 {
         unsigned long long match, pteh=0, lpage;
@@ -353,7 +337,7 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
         /*
          * Sign-extend based on neff.
          */
-        lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page;
+        lpage = neff_sign_extend(page);
         match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
         match |= lpage;
 
@@ -482,3 +466,7 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
         /* FIXME: Optimize this later.. */
         flush_tlb_all();
 }
+
+void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
+{
+}
diff --git a/arch/sh/oprofile/backtrace.c b/arch/sh/oprofile/backtrace.c
index 9499a2914f89..2bc74de23f08 100644
--- a/arch/sh/oprofile/backtrace.c
+++ b/arch/sh/oprofile/backtrace.c
@@ -17,9 +17,43 @@
 #include <linux/sched.h>
 #include <linux/kallsyms.h>
 #include <linux/mm.h>
+#include <asm/unwinder.h>
 #include <asm/ptrace.h>
 #include <asm/uaccess.h>
 #include <asm/sections.h>
+#include <asm/stacktrace.h>
+
+static void backtrace_warning_symbol(void *data, char *msg,
+                                     unsigned long symbol)
+{
+        /* Ignore warnings */
+}
+
+static void backtrace_warning(void *data, char *msg)
+{
+        /* Ignore warnings */
+}
+
+static int backtrace_stack(void *data, char *name)
+{
+        /* Yes, we want all stacks */
+        return 0;
+}
+
+static void backtrace_address(void *data, unsigned long addr, int reliable)
+{
+        unsigned int *depth = data;
+
+        if ((*depth)--)
+                oprofile_add_trace(addr);
+}
+
+static struct stacktrace_ops backtrace_ops = {
+        .warning = backtrace_warning,
+        .warning_symbol = backtrace_warning_symbol,
+        .stack = backtrace_stack,
+        .address = backtrace_address,
+};
 
 /* Limit to stop backtracing too far. */
 static int backtrace_limit = 20;
@@ -47,50 +81,6 @@ user_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
         return stackaddr;
 }
 
-/*
- * |             | /\ Higher addresses
- * |             |
- * --------------- stack base (address of current_thread_info)
- * | thread info |
- * .             .
- * |    stack    |
- * --------------- saved regs->regs[15] value if valid
- * .             .
- * --------------- struct pt_regs stored on stack (struct pt_regs *)
- * |             |
- * .             .
- * |             |
- * --------------- ???
- * |             |
- * |             | \/ Lower addresses
- *
- * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values
- */
-static int valid_kernel_stack(unsigned long *stackaddr, struct pt_regs *regs)
-{
-        unsigned long stack = (unsigned long)regs;
-        unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE;
-
-        return ((unsigned long)stackaddr > stack) && ((unsigned long)stackaddr < stack_base);
-}
-
-static unsigned long *
-kernel_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
-{
-        unsigned long addr;
-
-        /*
-         * If not a valid kernel address, keep going till we find one
-         * or the SP stops being a valid address.
-         */
-        do {
-                addr = *stackaddr++;
-                oprofile_add_trace(addr);
-        } while (valid_kernel_stack(stackaddr, regs));
-
-        return stackaddr;
-}
-
 void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
 {
         unsigned long *stackaddr;
@@ -103,9 +93,9 @@ void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
 
         stackaddr = (unsigned long *)regs->regs[15];
         if (!user_mode(regs)) {
-                while (depth-- && valid_kernel_stack(stackaddr, regs))
-                        stackaddr = kernel_backtrace(stackaddr, regs);
-
+                if (depth)
+                        unwind_stack(NULL, regs, stackaddr,
+                                     &backtrace_ops, &depth);
                 return;
         }
 
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index fec3a53b8650..6639b25d8d57 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -53,6 +53,9 @@ RSK7203			SH_RSK7203
 AP325RXA                SH_AP325RXA
 SH7763RDP               SH_SH7763RDP
 SH7785LCR               SH_SH7785LCR
+SH7785LCR_PT            SH_SH7785LCR_PT
 URQUELL                 SH_URQUELL
 ESPT                    SH_ESPT
 POLARIS                 SH_POLARIS
+KFR2R09                 SH_KFR2R09
+ECOVEC                  SH_ECOVEC
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 86b82348b97c..97fca4695e0b 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -25,7 +25,7 @@ config SPARC
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select RTC_CLASS
         select RTC_DRV_M48T59
-        select HAVE_PERF_COUNTERS
+        select HAVE_PERF_EVENTS
         select HAVE_DMA_ATTRS
         select HAVE_DMA_API_DEBUG
 
@@ -47,7 +47,7 @@ config SPARC64
         select RTC_DRV_BQ4802
         select RTC_DRV_SUN4V
         select RTC_DRV_STARFIRE
-        select HAVE_PERF_COUNTERS
+        select HAVE_PERF_EVENTS
 
 config ARCH_DEFCONFIG
         string
diff --git a/arch/sparc/Makefile b/arch/sparc/Makefile
index 467221dd5702..dfe272d14465 100644
--- a/arch/sparc/Makefile
+++ b/arch/sparc/Makefile
@@ -31,7 +31,6 @@ export BITS    := 32
 #KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7
 KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7
 KBUILD_AFLAGS += -m32
-CPPFLAGS_vmlinux.lds += -m32
 
 #LDFLAGS_vmlinux = -N -Ttext 0xf0004000
 #  Since 2.5.40, the first stage is left not btfix-ed.
@@ -45,9 +44,6 @@ else
 
 CHECKFLAGS      += -D__sparc__ -D__sparc_v9__ -D__arch64__ -m64
 
-# Undefine sparc when processing vmlinux.lds - it is used
-# And teach CPP we are doing 64 bit builds (for this case)
-CPPFLAGS_vmlinux.lds += -m64 -Usparc
 LDFLAGS              := -m elf64_sparc
 export BITS          := 64
 
diff --git a/arch/sparc/include/asm/mman.h b/arch/sparc/include/asm/mman.h
index 988192e8e956..c3029ad6619a 100644
--- a/arch/sparc/include/asm/mman.h
+++ b/arch/sparc/include/asm/mman.h
@@ -20,6 +20,8 @@
 
 #define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x10000         /* do not block on IO */
+#define MAP_STACK       0x20000         /* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB     0x40000         /* create a huge page mapping */
 
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index ac0e8369fd97..e769f668a4b5 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -10,7 +10,6 @@
  * or architectures with incomplete PCI setup by the loader.
  */
 #define pcibios_assign_all_busses()     0
-#define pcibios_scan_all_fns(a, b)      0
 
 #define PCIBIOS_MIN_IO          0UL
 #define PCIBIOS_MIN_MEM         0UL
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 5cc9f6aa5494..b63e51c3c3ee 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -10,7 +10,6 @@
  * or architectures with incomplete PCI setup by the loader.
  */
 #define pcibios_assign_all_busses()     0
-#define pcibios_scan_all_fns(a, b)      0
 
 #define PCIBIOS_MIN_IO          0UL
 #define PCIBIOS_MIN_MEM         0UL
diff --git a/arch/sparc/include/asm/perf_counter.h b/arch/sparc/include/asm/perf_counter.h
deleted file mode 100644
index 5d7a8ca0e491..000000000000
--- a/arch/sparc/include/asm/perf_counter.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __ASM_SPARC_PERF_COUNTER_H
-#define __ASM_SPARC_PERF_COUNTER_H
-
-extern void set_perf_counter_pending(void);
-
-#define PERF_COUNTER_INDEX_OFFSET       0
-
-#ifdef CONFIG_PERF_COUNTERS
-extern void init_hw_perf_counters(void);
-#else
-static inline void init_hw_perf_counters(void)  { }
-#endif
-
-#endif
diff --git a/arch/sparc/include/asm/perf_event.h b/arch/sparc/include/asm/perf_event.h
new file mode 100644
index 000000000000..7e2669894ce8
--- /dev/null
+++ b/arch/sparc/include/asm/perf_event.h
@@ -0,0 +1,14 @@
+#ifndef __ASM_SPARC_PERF_EVENT_H
+#define __ASM_SPARC_PERF_EVENT_H
+
+extern void set_perf_event_pending(void);
+
+#define PERF_EVENT_INDEX_OFFSET 0
+
+#ifdef CONFIG_PERF_EVENTS
+extern void init_hw_perf_events(void);
+#else
+static inline void init_hw_perf_events(void)    { }
+#endif
+
+#endif
diff --git a/arch/sparc/include/asm/smp_64.h b/arch/sparc/include/asm/smp_64.h
index becb6bf353a9..f49e11cd4ded 100644
--- a/arch/sparc/include/asm/smp_64.h
+++ b/arch/sparc/include/asm/smp_64.h
@@ -36,7 +36,6 @@ extern int sparc64_multi_core;
 
 extern void arch_send_call_function_single_ipi(int cpu);
 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
-#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 
 /*
  *      General functions that each host system must provide.
diff --git a/arch/sparc/include/asm/topology_64.h b/arch/sparc/include/asm/topology_64.h
index e5ea8d332421..600a79035fa1 100644
--- a/arch/sparc/include/asm/topology_64.h
+++ b/arch/sparc/include/asm/topology_64.h
@@ -12,22 +12,8 @@ static inline int cpu_to_node(int cpu)
 
 #define parent_node(node)       (node)
 
-static inline cpumask_t node_to_cpumask(int node)
-{
-        return numa_cpumask_lookup_table[node];
-}
 #define cpumask_of_node(node) (&numa_cpumask_lookup_table[node])
 
-/*
- * Returns a pointer to the cpumask of CPUs on Node 'node'.
- * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
- */
-#define node_to_cpumask_ptr(v, node)            \
-                cpumask_t *v = &(numa_cpumask_lookup_table[node])
-
-#define node_to_cpumask_ptr_next(v, node)       \
-                           v = &(numa_cpumask_lookup_table[node])
-
 struct pci_bus;
 #ifdef CONFIG_PCI
 extern int pcibus_to_node(struct pci_bus *pbus);
@@ -52,13 +38,12 @@ static inline int pcibus_to_node(struct pci_bus *pbus)
         .busy_idx               = 3,                    \
         .idle_idx               = 2,                    \
         .newidle_idx            = 0,                    \
-        .wake_idx               = 1,                    \
-        .forkexec_idx           = 1,                    \
+        .wake_idx               = 0,                    \
+        .forkexec_idx           = 0,                    \
         .flags                  = SD_LOAD_BALANCE       \
                                 | SD_BALANCE_FORK       \
                                 | SD_BALANCE_EXEC       \
-                                | SD_SERIALIZE          \
-                                | SD_WAKE_BALANCE,      \
+                                | SD_SERIALIZE,         \
         .last_balance           = jiffies,              \
         .balance_interval       = 1,                    \
 }
@@ -72,8 +57,6 @@ static inline int pcibus_to_node(struct pci_bus *pbus)
 #ifdef CONFIG_SMP
 #define topology_physical_package_id(cpu)       (cpu_data(cpu).proc_id)
 #define topology_core_id(cpu)                   (cpu_data(cpu).core_id)
-#define topology_core_siblings(cpu)             (cpu_core_map[cpu])
-#define topology_thread_siblings(cpu)           (per_cpu(cpu_sibling_map, cpu))
 #define topology_core_cpumask(cpu)              (&cpu_core_map[cpu])
 #define topology_thread_cpumask(cpu)            (&per_cpu(cpu_sibling_map, cpu))
 #define mc_capable()                            (sparc64_multi_core)
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index 706df669f3b8..42f2316c3eaa 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -395,7 +395,7 @@
 #define __NR_preadv             324
 #define __NR_pwritev            325
 #define __NR_rt_tgsigqueueinfo  326
-#define __NR_perf_counter_open  327
+#define __NR_perf_event_open    327
 
 #define NR_SYSCALLS             328
 
diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile
index 247cc620cee5..5b47fab9966e 100644
--- a/arch/sparc/kernel/Makefile
+++ b/arch/sparc/kernel/Makefile
@@ -7,7 +7,11 @@ ccflags-y := -Werror
 
 extra-y     := head_$(BITS).o
 extra-y     += init_task.o
-extra-y     += vmlinux.lds
+
+# Undefine sparc when processing vmlinux.lds - it is used
+# And teach CPP we are doing $(BITS) builds (for this case)
+CPPFLAGS_vmlinux.lds := -Usparc -m$(BITS)
+extra-y              += vmlinux.lds
 
 obj-$(CONFIG_SPARC32)   += entry.o wof.o wuf.o
 obj-$(CONFIG_SPARC32)   += etrap_32.o
@@ -104,5 +108,5 @@ obj-$(CONFIG_AUDIT)     += audit.o
 audit--$(CONFIG_AUDIT)  := compat_audit.o
 obj-$(CONFIG_COMPAT)    += $(audit--y)
 
-pc--$(CONFIG_PERF_COUNTERS) := perf_counter.o
+pc--$(CONFIG_PERF_EVENTS) := perf_event.o
 obj-$(CONFIG_SPARC64)   += $(pc--y)
diff --git a/arch/sparc/kernel/init_task.c b/arch/sparc/kernel/init_task.c
index 28125c5b3d3c..5fe3d65581f7 100644
--- a/arch/sparc/kernel/init_task.c
+++ b/arch/sparc/kernel/init_task.c
@@ -18,6 +18,5 @@ EXPORT_SYMBOL(init_task);
  * If this is not aligned on a 8k boundry, then you should change code
  * in etrap.S which assumes it.
  */
-union thread_union init_thread_union
-        __attribute__((section (".data.init_task")))
-        = { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index 8daab33fc17d..8ab1d4728a4b 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -229,7 +229,7 @@ static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
                                 tid = ((a << IMAP_AID_SHIFT) |
                                        (n << IMAP_NID_SHIFT));
                                 tid &= (IMAP_AID_SAFARI |
-                                        IMAP_NID_SAFARI);;
+                                        IMAP_NID_SAFARI);
                         }
                 } else {
                         tid = cpuid << IMAP_TID_SHIFT;
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index 378eb53e0776..b129611590a4 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -19,7 +19,7 @@
 #include <linux/delay.h>
 #include <linux/smp.h>
 
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
 #include <asm/ptrace.h>
 #include <asm/local.h>
 #include <asm/pcr.h>
@@ -265,7 +265,7 @@ int __init nmi_init(void)
                 }
         }
         if (!err)
-                init_hw_perf_counters();
+                init_hw_perf_events();
 
         return err;
 }
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c
index 68ff00107073..2d94e7a03af5 100644
--- a/arch/sparc/kernel/pcr.c
+++ b/arch/sparc/kernel/pcr.c
@@ -7,7 +7,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 
 #include <asm/pil.h>
 #include <asm/pcr.h>
@@ -15,7 +15,7 @@
 
 /* This code is shared between various users of the performance
  * counters.  Users will be oprofile, pseudo-NMI watchdog, and the
- * perf_counter support layer.
+ * perf_event support layer.
  */
 
 #define PCR_SUN4U_ENABLE        (PCR_PIC_PRIV | PCR_STRACE | PCR_UTRACE)
@@ -42,14 +42,14 @@ void deferred_pcr_work_irq(int irq, struct pt_regs *regs)
 
         old_regs = set_irq_regs(regs);
         irq_enter();
-#ifdef CONFIG_PERF_COUNTERS
-        perf_counter_do_pending();
+#ifdef CONFIG_PERF_EVENTS
+        perf_event_do_pending();
 #endif
         irq_exit();
         set_irq_regs(old_regs);
 }
 
-void set_perf_counter_pending(void)
+void set_perf_event_pending(void)
 {
         set_softint(1 << PIL_DEFERRED_PCR_WORK);
 }
diff --git a/arch/sparc/kernel/perf_counter.c b/arch/sparc/kernel/perf_event.c
index 09de4035eaa9..2d6a1b10c81d 100644
--- a/arch/sparc/kernel/perf_counter.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1,8 +1,8 @@
-/* Performance counter support for sparc64.
+/* Performance event support for sparc64.
  *
  * Copyright (C) 2009 David S. Miller <davem@davemloft.net>
  *
- * This code is based almost entirely upon the x86 perf counter
+ * This code is based almost entirely upon the x86 perf event
  * code, which is:
  *
  *  Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de>
@@ -12,7 +12,7 @@
  *  Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com>
  */
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/kprobes.h>
 #include <linux/kernel.h>
 #include <linux/kdebug.h>
@@ -46,19 +46,19 @@
  * normal code.
  */
 
-#define MAX_HWCOUNTERS                  2
+#define MAX_HWEVENTS                    2
 #define MAX_PERIOD                      ((1UL << 32) - 1)
 
 #define PIC_UPPER_INDEX                 0
 #define PIC_LOWER_INDEX                 1
 
-struct cpu_hw_counters {
-        struct perf_counter     *counters[MAX_HWCOUNTERS];
-        unsigned long           used_mask[BITS_TO_LONGS(MAX_HWCOUNTERS)];
-        unsigned long           active_mask[BITS_TO_LONGS(MAX_HWCOUNTERS)];
+struct cpu_hw_events {
+        struct perf_event       *events[MAX_HWEVENTS];
+        unsigned long           used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
+        unsigned long           active_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
         int enabled;
 };
-DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters) = { .enabled = 1, };
+DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, };
 
 struct perf_event_map {
         u16     encoding;
@@ -87,9 +87,9 @@ static const struct perf_event_map ultra3i_perfmon_event_map[] = {
         [PERF_COUNT_HW_CACHE_MISSES] = { 0x0009, PIC_UPPER },
 };
 
-static const struct perf_event_map *ultra3i_event_map(int event)
+static const struct perf_event_map *ultra3i_event_map(int event_id)
 {
-        return &ultra3i_perfmon_event_map[event];
+        return &ultra3i_perfmon_event_map[event_id];
 }
 
 static const struct sparc_pmu ultra3i_pmu = {
@@ -111,9 +111,9 @@ static const struct perf_event_map niagara2_perfmon_event_map[] = {
         [PERF_COUNT_HW_BRANCH_MISSES] = { 0x0202, PIC_UPPER | PIC_LOWER },
 };
 
-static const struct perf_event_map *niagara2_event_map(int event)
+static const struct perf_event_map *niagara2_event_map(int event_id)
 {
-        return &niagara2_perfmon_event_map[event];
+        return &niagara2_perfmon_event_map[event_id];
 }
 
 static const struct sparc_pmu niagara2_pmu = {
@@ -130,13 +130,13 @@ static const struct sparc_pmu niagara2_pmu = {
 
 static const struct sparc_pmu *sparc_pmu __read_mostly;
 
-static u64 event_encoding(u64 event, int idx)
+static u64 event_encoding(u64 event_id, int idx)
 {
         if (idx == PIC_UPPER_INDEX)
-                event <<= sparc_pmu->upper_shift;
+                event_id <<= sparc_pmu->upper_shift;
         else
-                event <<= sparc_pmu->lower_shift;
-        return event;
+                event_id <<= sparc_pmu->lower_shift;
+        return event_id;
 }
 
 static u64 mask_for_index(int idx)
@@ -151,7 +151,7 @@ static u64 nop_for_index(int idx)
                               sparc_pmu->lower_nop, idx);
 }
 
-static inline void sparc_pmu_enable_counter(struct hw_perf_counter *hwc,
+static inline void sparc_pmu_enable_event(struct hw_perf_event *hwc,
                                             int idx)
 {
         u64 val, mask = mask_for_index(idx);
@@ -160,7 +160,7 @@ static inline void sparc_pmu_enable_counter(struct hw_perf_counter *hwc,
         pcr_ops->write((val & ~mask) | hwc->config);
 }
 
-static inline void sparc_pmu_disable_counter(struct hw_perf_counter *hwc,
+static inline void sparc_pmu_disable_event(struct hw_perf_event *hwc,
                                              int idx)
 {
         u64 mask = mask_for_index(idx);
@@ -172,7 +172,7 @@ static inline void sparc_pmu_disable_counter(struct hw_perf_counter *hwc,
 
 void hw_perf_enable(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         u64 val;
         int i;
 
@@ -184,9 +184,9 @@ void hw_perf_enable(void)
 
         val = pcr_ops->read();
 
-        for (i = 0; i < MAX_HWCOUNTERS; i++) {
-                struct perf_counter *cp = cpuc->counters[i];
-                struct hw_perf_counter *hwc;
+        for (i = 0; i < MAX_HWEVENTS; i++) {
+                struct perf_event *cp = cpuc->events[i];
+                struct hw_perf_event *hwc;
 
                 if (!cp)
                         continue;
@@ -199,7 +199,7 @@ void hw_perf_enable(void)
 
 void hw_perf_disable(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         u64 val;
 
         if (!cpuc->enabled)
@@ -241,8 +241,8 @@ static void write_pmc(int idx, u64 val)
         write_pic(pic);
 }
 
-static int sparc_perf_counter_set_period(struct perf_counter *counter,
-                                         struct hw_perf_counter *hwc, int idx)
+static int sparc_perf_event_set_period(struct perf_event *event,
+                                         struct hw_perf_event *hwc, int idx)
 {
         s64 left = atomic64_read(&hwc->period_left);
         s64 period = hwc->sample_period;
@@ -268,33 +268,33 @@ static int sparc_perf_counter_set_period(struct perf_counter *counter,
 
         write_pmc(idx, (u64)(-left) & 0xffffffff);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 
         return ret;
 }
 
-static int sparc_pmu_enable(struct perf_counter *counter)
+static int sparc_pmu_enable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         int idx = hwc->idx;
 
         if (test_and_set_bit(idx, cpuc->used_mask))
                 return -EAGAIN;
 
-        sparc_pmu_disable_counter(hwc, idx);
+        sparc_pmu_disable_event(hwc, idx);
 
-        cpuc->counters[idx] = counter;
+        cpuc->events[idx] = event;
         set_bit(idx, cpuc->active_mask);
 
-        sparc_perf_counter_set_period(counter, hwc, idx);
-        sparc_pmu_enable_counter(hwc, idx);
-        perf_counter_update_userpage(counter);
+        sparc_perf_event_set_period(event, hwc, idx);
+        sparc_pmu_enable_event(hwc, idx);
+        perf_event_update_userpage(event);
         return 0;
 }
 
-static u64 sparc_perf_counter_update(struct perf_counter *counter,
-                                     struct hw_perf_counter *hwc, int idx)
+static u64 sparc_perf_event_update(struct perf_event *event,
+                                     struct hw_perf_event *hwc, int idx)
 {
         int shift = 64 - 32;
         u64 prev_raw_count, new_raw_count;
@@ -311,79 +311,79 @@ again:
         delta = (new_raw_count << shift) - (prev_raw_count << shift);
         delta >>= shift;
 
-        atomic64_add(delta, &counter->count);
+        atomic64_add(delta, &event->count);
         atomic64_sub(delta, &hwc->period_left);
 
         return new_raw_count;
 }
 
-static void sparc_pmu_disable(struct perf_counter *counter)
+static void sparc_pmu_disable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         int idx = hwc->idx;
 
         clear_bit(idx, cpuc->active_mask);
-        sparc_pmu_disable_counter(hwc, idx);
+        sparc_pmu_disable_event(hwc, idx);
 
         barrier();
 
-        sparc_perf_counter_update(counter, hwc, idx);
-        cpuc->counters[idx] = NULL;
+        sparc_perf_event_update(event, hwc, idx);
+        cpuc->events[idx] = NULL;
         clear_bit(idx, cpuc->used_mask);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 }
 
-static void sparc_pmu_read(struct perf_counter *counter)
+static void sparc_pmu_read(struct perf_event *event)
 {
-        struct hw_perf_counter *hwc = &counter->hw;
-        sparc_perf_counter_update(counter, hwc, hwc->idx);
+        struct hw_perf_event *hwc = &event->hw;
+        sparc_perf_event_update(event, hwc, hwc->idx);
 }
 
-static void sparc_pmu_unthrottle(struct perf_counter *counter)
+static void sparc_pmu_unthrottle(struct perf_event *event)
 {
-        struct hw_perf_counter *hwc = &counter->hw;
-        sparc_pmu_enable_counter(hwc, hwc->idx);
+        struct hw_perf_event *hwc = &event->hw;
+        sparc_pmu_enable_event(hwc, hwc->idx);
 }
 
-static atomic_t active_counters = ATOMIC_INIT(0);
+static atomic_t active_events = ATOMIC_INIT(0);
 static DEFINE_MUTEX(pmc_grab_mutex);
 
-void perf_counter_grab_pmc(void)
+void perf_event_grab_pmc(void)
 {
-        if (atomic_inc_not_zero(&active_counters))
+        if (atomic_inc_not_zero(&active_events))
                 return;
 
         mutex_lock(&pmc_grab_mutex);
-        if (atomic_read(&active_counters) == 0) {
+        if (atomic_read(&active_events) == 0) {
                 if (atomic_read(&nmi_active) > 0) {
                         on_each_cpu(stop_nmi_watchdog, NULL, 1);
                         BUG_ON(atomic_read(&nmi_active) != 0);
                 }
-                atomic_inc(&active_counters);
+                atomic_inc(&active_events);
         }
         mutex_unlock(&pmc_grab_mutex);
 }
 
-void perf_counter_release_pmc(void)
+void perf_event_release_pmc(void)
 {
-        if (atomic_dec_and_mutex_lock(&active_counters, &pmc_grab_mutex)) {
+        if (atomic_dec_and_mutex_lock(&active_events, &pmc_grab_mutex)) {
                 if (atomic_read(&nmi_active) == 0)
                         on_each_cpu(start_nmi_watchdog, NULL, 1);
                 mutex_unlock(&pmc_grab_mutex);
         }
 }
 
-static void hw_perf_counter_destroy(struct perf_counter *counter)
+static void hw_perf_event_destroy(struct perf_event *event)
 {
-        perf_counter_release_pmc();
+        perf_event_release_pmc();
 }
 
-static int __hw_perf_counter_init(struct perf_counter *counter)
+static int __hw_perf_event_init(struct perf_event *event)
 {
-        struct perf_counter_attr *attr = &counter->attr;
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct perf_event_attr *attr = &event->attr;
+        struct hw_perf_event *hwc = &event->hw;
         const struct perf_event_map *pmap;
         u64 enc;
 
@@ -396,8 +396,8 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
         if (attr->config >= sparc_pmu->max_events)
                 return -EINVAL;
 
-        perf_counter_grab_pmc();
-        counter->destroy = hw_perf_counter_destroy;
+        perf_event_grab_pmc();
+        event->destroy = hw_perf_event_destroy;
 
         /* We save the enable bits in the config_base.  So to
          * turn off sampling just write 'config', and to enable
@@ -439,16 +439,16 @@ static const struct pmu pmu = {
         .unthrottle     = sparc_pmu_unthrottle,
 };
 
-const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
+const struct pmu *hw_perf_event_init(struct perf_event *event)
 {
-        int err = __hw_perf_counter_init(counter);
+        int err = __hw_perf_event_init(event);
 
         if (err)
                 return ERR_PTR(err);
         return &pmu;
 }
 
-void perf_counter_print_debug(void)
+void perf_event_print_debug(void)
 {
         unsigned long flags;
         u64 pcr, pic;
@@ -471,16 +471,16 @@ void perf_counter_print_debug(void)
         local_irq_restore(flags);
 }
 
-static int __kprobes perf_counter_nmi_handler(struct notifier_block *self,
+static int __kprobes perf_event_nmi_handler(struct notifier_block *self,
                                               unsigned long cmd, void *__args)
 {
         struct die_args *args = __args;
         struct perf_sample_data data;
-        struct cpu_hw_counters *cpuc;
+        struct cpu_hw_events *cpuc;
         struct pt_regs *regs;
         int idx;
 
-        if (!atomic_read(&active_counters))
+        if (!atomic_read(&active_events))
                 return NOTIFY_DONE;
 
         switch (cmd) {
@@ -493,35 +493,34 @@ static int __kprobes perf_counter_nmi_handler(struct notifier_block *self,
 
         regs = args->regs;
 
-        data.regs = regs;
         data.addr = 0;
 
-        cpuc = &__get_cpu_var(cpu_hw_counters);
-        for (idx = 0; idx < MAX_HWCOUNTERS; idx++) {
-                struct perf_counter *counter = cpuc->counters[idx];
-                struct hw_perf_counter *hwc;
+        cpuc = &__get_cpu_var(cpu_hw_events);
+        for (idx = 0; idx < MAX_HWEVENTS; idx++) {
+                struct perf_event *event = cpuc->events[idx];
+                struct hw_perf_event *hwc;
                 u64 val;
 
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
-                hwc = &counter->hw;
-                val = sparc_perf_counter_update(counter, hwc, idx);
+                hwc = &event->hw;
+                val = sparc_perf_event_update(event, hwc, idx);
                 if (val & (1ULL << 31))
                         continue;
 
-                data.period = counter->hw.last_period;
-                if (!sparc_perf_counter_set_period(counter, hwc, idx))
+                data.period = event->hw.last_period;
+                if (!sparc_perf_event_set_period(event, hwc, idx))
                         continue;
 
-                if (perf_counter_overflow(counter, 1, &data))
-                        sparc_pmu_disable_counter(hwc, idx);
+                if (perf_event_overflow(event, 1, &data, regs))
+                        sparc_pmu_disable_event(hwc, idx);
         }
 
         return NOTIFY_STOP;
 }
 
-static __read_mostly struct notifier_block perf_counter_nmi_notifier = {
-        .notifier_call          = perf_counter_nmi_handler,
+static __read_mostly struct notifier_block perf_event_nmi_notifier = {
+        .notifier_call          = perf_event_nmi_handler,
 };
 
 static bool __init supported_pmu(void)
@@ -537,9 +536,9 @@ static bool __init supported_pmu(void)
         return false;
 }
 
-void __init init_hw_perf_counters(void)
+void __init init_hw_perf_events(void)
 {
-        pr_info("Performance counters: ");
+        pr_info("Performance events: ");
 
         if (!supported_pmu()) {
                 pr_cont("No support for PMU type '%s'\n", sparc_pmu_type);
@@ -548,10 +547,10 @@ void __init init_hw_perf_counters(void)
 
         pr_cont("Supported PMU type is '%s'\n", sparc_pmu_type);
 
-        /* All sparc64 PMUs currently have 2 counters.  But this simple
-         * driver only supports one active counter at a time.
+        /* All sparc64 PMUs currently have 2 events.  But this simple
+         * driver only supports one active event at a time.
          */
-        perf_max_counters = 1;
+        perf_max_events = 1;
 
-        register_die_notifier(&perf_counter_nmi_notifier);
+        register_die_notifier(&perf_event_nmi_notifier);
 }
diff --git a/arch/sparc/kernel/sys_sparc32.c b/arch/sparc/kernel/sys_sparc32.c
index f5000a460c05..04e28b2671c8 100644
--- a/arch/sparc/kernel/sys_sparc32.c
+++ b/arch/sparc/kernel/sys_sparc32.c
@@ -16,7 +16,6 @@
 #include <linux/signal.h>
 #include <linux/resource.h>
 #include <linux/times.h>
-#include <linux/utsname.h>
 #include <linux/smp.h>
 #include <linux/smp_lock.h>
 #include <linux/sem.h>
diff --git a/arch/sparc/kernel/systbls.h b/arch/sparc/kernel/systbls.h
index 15c2d752b2bc..a63c5d2d9849 100644
--- a/arch/sparc/kernel/systbls.h
+++ b/arch/sparc/kernel/systbls.h
@@ -3,10 +3,11 @@
 
 #include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/utsname.h>
 #include <asm/utrap.h>
 #include <asm/signal.h>
 
+struct new_utsname;
+
 extern asmlinkage unsigned long sys_getpagesize(void);
 extern asmlinkage unsigned long sparc_brk(unsigned long brk);
 extern asmlinkage long sparc_pipe(struct pt_regs *regs);
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index 04181577cb65..0f1658d37490 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -82,5 +82,5 @@ sys_call_table:
 /*310*/ .long sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate
 /*315*/ .long sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1
 /*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv
-/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_counter_open
+/*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open
 
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 91b06b7f7acf..009825f6e73c 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -83,7 +83,7 @@ sys_call_table32:
 /*310*/ .word compat_sys_utimensat, compat_sys_signalfd, sys_timerfd_create, sys_eventfd, compat_sys_fallocate
         .word compat_sys_timerfd_settime, compat_sys_timerfd_gettime, compat_sys_signalfd4, sys_eventfd2, sys_epoll_create1
 /*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, compat_sys_preadv
-        .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_counter_open
+        .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open
 
 #endif /* CONFIG_COMPAT */
 
@@ -158,4 +158,4 @@ sys_call_table:
 /*310*/ .word sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate
         .word sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1
 /*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1, sys_accept4, sys_preadv
-        .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_counter_open
+        .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 866390feb683..4e5992593967 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -51,70 +51,27 @@ SECTIONS
         _etext = .;
 
         RO_DATA(PAGE_SIZE)
-        .data : {
-                DATA_DATA
-                CONSTRUCTORS
-        }
         .data1 : {
                 *(.data1)
         }
-        . = ALIGN(SMP_CACHE_BYTES);
-        .data.cacheline_aligned : {
-                *(.data.cacheline_aligned)
-        }
-        . = ALIGN(SMP_CACHE_BYTES);
-        .data.read_mostly : {
-                *(.data.read_mostly)
-        }
+        RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
+
         /* End of data section */
         _edata = .;
 
-        /* init_task */
-        . = ALIGN(THREAD_SIZE);
-        .data.init_task : {
-                *(.data.init_task)
-        }
         .fixup : {
                 __start___fixup = .;
                 *(.fixup)
                 __stop___fixup = .;
         }
-        . = ALIGN(16);
-        __ex_table : {
-                __start___ex_table = .;
-                *(__ex_table)
-                __stop___ex_table = .;
-        }
+        EXCEPTION_TABLE(16)
         NOTES
 
         . = ALIGN(PAGE_SIZE);
-        .init.text : {
-                __init_begin = .;
-                _sinittext = .;
-                INIT_TEXT
-                _einittext = .;
-        }
+        __init_begin = ALIGN(PAGE_SIZE);
+        INIT_TEXT_SECTION(PAGE_SIZE)
         __init_text_end = .;
-        .init.data : {
-                INIT_DATA
-        }
-        . = ALIGN(16);
-        .init.setup : {
-                __setup_start = .;
-                *(.init.setup)
-                __setup_end = .;
-        }
-        .initcall.init : {
-                __initcall_start = .;
-                INITCALLS
-                __initcall_end = .;
-        }
-        .con_initcall.init : {
-                __con_initcall_start = .;
-                *(.con_initcall.init)
-                __con_initcall_end = .;
-        }
-        SECURITY_INIT
+        INIT_DATA_SECTION(16)
 
         . = ALIGN(4);
         .tsb_ldquad_phys_patch : {
@@ -146,29 +103,11 @@ SECTIONS
                 __sun4v_2insn_patch_end = .;
         }
 
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
-        .init.ramfs : {
-                __initramfs_start = .;
-                *(.init.ramfs)
-                __initramfs_end = .;
-        }
-#endif
-
         PERCPU(PAGE_SIZE)
 
         . = ALIGN(PAGE_SIZE);
         __init_end = .;
-        __bss_start = .;
-        .sbss : {
-                *(.sbss)
-                *(.scommon)
-        }
-        .bss : {
-                *(.dynbss)
-                *(.bss)
-                *(COMMON)
-        }
+        BSS_SECTION(0, 0, 0)
         _end = . ;
 
         STABS_DEBUG
diff --git a/arch/sparc/mm/init_32.c b/arch/sparc/mm/init_32.c
index 54114ad0bdee..dc7c3b17a15f 100644
--- a/arch/sparc/mm/init_32.c
+++ b/arch/sparc/mm/init_32.c
@@ -472,7 +472,7 @@ void __init mem_init(void)
                         reservedpages++;
 
         printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init, %ldk highmem)\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                num_physpages << (PAGE_SHIFT - 10),
                codepages << (PAGE_SHIFT-10),
                reservedpages << (PAGE_SHIFT - 10),
diff --git a/arch/um/Makefile b/arch/um/Makefile
index 0728def32234..fc633dbacf84 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -96,11 +96,10 @@ CFLAGS_NO_HARDENING := $(call cc-option, -fno-PIC,) $(call cc-option, -fno-pic,)
         $(call cc-option, -fno-stack-protector,) \
         $(call cc-option, -fno-stack-protector-all,)
 
-CONFIG_KERNEL_STACK_ORDER ?= 2
-STACK_SIZE := $(shell echo $$[ 4096 * (1 << $(CONFIG_KERNEL_STACK_ORDER)) ] )
-
-CPPFLAGS_vmlinux.lds = -U$(SUBARCH) -DSTART=$(START) -DELF_ARCH=$(ELF_ARCH) \
-        -DELF_FORMAT="$(ELF_FORMAT)" -DKERNEL_STACK_SIZE=$(STACK_SIZE)
+# Options used by linker script
+export LDS_START      := $(START)
+export LDS_ELF_ARCH   := $(ELF_ARCH)
+export LDS_ELF_FORMAT := $(ELF_FORMAT)
 
 # The wrappers will select whether using "malloc" or the kernel allocator.
 LINK_WRAPS = -Wl,--wrap,malloc -Wl,--wrap,free -Wl,--wrap,calloc
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index f114813ae258..a74245ae3a84 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -533,7 +533,7 @@ static int eth_parse(char *str, int *index_out, char **str_out,
                      char **error_out)
 {
         char *end;
-        int n, err = -EINVAL;;
+        int n, err = -EINVAL;
 
         n = simple_strtoul(str, &end, 0);
         if (end == str) {
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 8f05d4d9da12..635d16d90a80 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -106,7 +106,7 @@ static int ubd_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 
 #define MAX_DEV (16)
 
-static struct block_device_operations ubd_blops = {
+static const struct block_device_operations ubd_blops = {
         .owner          = THIS_MODULE,
         .open           = ubd_open,
         .release        = ubd_release,
diff --git a/arch/um/include/asm/common.lds.S b/arch/um/include/asm/common.lds.S
index 37ecc5577a9a..ac55b9efa1ce 100644
--- a/arch/um/include/asm/common.lds.S
+++ b/arch/um/include/asm/common.lds.S
@@ -16,11 +16,7 @@
 
   . = ALIGN(4096);
   .note : { *(.note.*) }
-  __ex_table : {
-        __start___ex_table = .;
-        *(__ex_table)
-        __stop___ex_table = .;
-  }
+  EXCEPTION_TABLE(0)
 
   BUG_TABLE
 
@@ -43,28 +39,17 @@
   }
         
   .init.setup : {
-        __setup_start = .;
-        *(.init.setup)
-        __setup_end = .;
+        INIT_SETUP(0)
   }
 
-  . = ALIGN(32);
-  .data.percpu : {
-        __per_cpu_start = . ;
-        *(.data.percpu)
-        __per_cpu_end = . ;
-  }
+  PERCPU(32)
         
   .initcall.init : {
-        __initcall_start = .;
-        INITCALLS
-        __initcall_end = .;
+        INIT_CALLS
   }
 
   .con_initcall.init : {
-        __con_initcall_start = .;
-        *(.con_initcall.init)
-        __con_initcall_end = .;
+        CON_INITCALL
   }
 
   .uml.initcall.init : {
@@ -118,8 +103,6 @@
 
    . = ALIGN(4096);
   .init.ramfs : {
-        __initramfs_start = .;
-        *(.init.ramfs)
-        __initramfs_end = .;
+        INIT_RAM_FS
   }
 
diff --git a/arch/um/include/asm/hardirq.h b/arch/um/include/asm/hardirq.h
index 313ebb8a2566..fb3c05a0cbbf 100644
--- a/arch/um/include/asm/hardirq.h
+++ b/arch/um/include/asm/hardirq.h
@@ -1,25 +1 @@
-/* (c) 2004 cw@f00f.org, GPLv2 blah blah */
-
-#ifndef __ASM_UM_HARDIRQ_H
-#define __ASM_UM_HARDIRQ_H
-
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-/* NOTE: When SMP works again we might want to make this
- * ____cacheline_aligned or maybe use per_cpu state? --cw */
-typedef struct {
-        unsigned int __softirq_pending;
-} irq_cpustat_t;
-
-#include <linux/irq_cpustat.h>
-
-/* As this would be very strange for UML to get we BUG() after the
- * printk. */
-static inline void ack_bad_irq(unsigned int irq)
-{
-        printk(KERN_ERR "unexpected IRQ %02x\n", irq);
-        BUG();
-}
-
-#endif /* __ASM_UM_HARDIRQ_H */
+#include <asm-generic/hardirq.h>
diff --git a/arch/um/include/asm/mmu_context.h b/arch/um/include/asm/mmu_context.h
index 54f42e8b0105..34d813011b7a 100644
--- a/arch/um/include/asm/mmu_context.h
+++ b/arch/um/include/asm/mmu_context.h
@@ -35,8 +35,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
         unsigned cpu = smp_processor_id();
 
         if(prev != next){
-                cpu_clear(cpu, prev->cpu_vm_mask);
-                cpu_set(cpu, next->cpu_vm_mask);
+                cpumask_clear_cpu(cpu, mm_cpumask(prev));
+                cpumask_set_cpu(cpu, mm_cpumask(next));
                 if(next != &init_mm)
                         __switch_mm(&next->context.id);
         }
diff --git a/arch/um/include/asm/pci.h b/arch/um/include/asm/pci.h
index 59923199cdc3..b44cf59ede1e 100644
--- a/arch/um/include/asm/pci.h
+++ b/arch/um/include/asm/pci.h
@@ -2,6 +2,5 @@
 #define __UM_PCI_H
 
 #define PCI_DMA_BUS_IS_PHYS     (1)
-#define pcibios_scan_all_fns(a, b)      0
 
 #endif
diff --git a/arch/um/include/shared/ptrace_user.h b/arch/um/include/shared/ptrace_user.h
index 4bce6e012889..7fd8539bc19a 100644
--- a/arch/um/include/shared/ptrace_user.h
+++ b/arch/um/include/shared/ptrace_user.h
@@ -29,7 +29,7 @@ extern int ptrace_setregs(long pid, unsigned long *regs_in);
  * recompilation. So, we use PTRACE_OLDSETOPTIONS in UML.
  * We also want to be able to build the kernel on 2.4, which doesn't
  * have PTRACE_OLDSETOPTIONS. So, if it is missing, we declare
- * PTRACE_OLDSETOPTIONS to to be the same as PTRACE_SETOPTIONS.
+ * PTRACE_OLDSETOPTIONS to be the same as PTRACE_SETOPTIONS.
  *
  * On architectures, that start to support PTRACE_O_TRACESYSGOOD on
  * linux 2.6, PTRACE_OLDSETOPTIONS never is defined, and also isn't
diff --git a/arch/um/kernel/Makefile b/arch/um/kernel/Makefile
index 388ec0a3ea9b..1119233597a1 100644
--- a/arch/um/kernel/Makefile
+++ b/arch/um/kernel/Makefile
@@ -3,6 +3,9 @@
 # Licensed under the GPL
 #
 
+CPPFLAGS_vmlinux.lds := -U$(SUBARCH) -DSTART=$(LDS_START) \
+                        -DELF_ARCH=$(LDS_ELF_ARCH)        \
+                        -DELF_FORMAT=$(LDS_ELF_FORMAT)
 extra-y := vmlinux.lds
 clean-files :=
 
diff --git a/arch/um/kernel/dyn.lds.S b/arch/um/kernel/dyn.lds.S
index 715a188c0472..7fcad58e216d 100644
--- a/arch/um/kernel/dyn.lds.S
+++ b/arch/um/kernel/dyn.lds.S
@@ -16,11 +16,7 @@ SECTIONS
   _text = .;
   _stext = .;
   __init_begin = .;
-  .init.text : {
-        _sinittext = .;
-        INIT_TEXT
-        _einittext = .;
-  }
+  INIT_TEXT_SECTION(PAGE_SIZE)
 
   . = ALIGN(PAGE_SIZE);
 
@@ -96,8 +92,7 @@ SECTIONS
   .init_array     : { *(.init_array) }
   .fini_array     : { *(.fini_array) }
   .data           : {
-    . = ALIGN(KERNEL_STACK_SIZE);               /* init_task */
-    *(.data.init_task)
+    INIT_TASK_DATA(KERNEL_STACK_SIZE)
     . = ALIGN(KERNEL_STACK_SIZE);
     *(.data.init_irqstack)
     DATA_DATA
diff --git a/arch/um/kernel/init_task.c b/arch/um/kernel/init_task.c
index b25121b537d8..8aa77b61a5ff 100644
--- a/arch/um/kernel/init_task.c
+++ b/arch/um/kernel/init_task.c
@@ -30,9 +30,8 @@ EXPORT_SYMBOL(init_task);
  * "init_task" linker map entry..
  */
 
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 union thread_union cpu0_irqstack
         __attribute__((__section__(".data.init_irqstack"))) =
diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c
index 61d7e6138ff5..a5d5e70cf6f5 100644
--- a/arch/um/kernel/mem.c
+++ b/arch/um/kernel/mem.c
@@ -77,7 +77,7 @@ void __init mem_init(void)
         num_physpages = totalram_pages;
         max_pfn = totalram_pages;
         printk(KERN_INFO "Memory: %luk available\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10));
+               nr_free_pages() << (PAGE_SHIFT-10));
         kmalloc_ok = 1;
 
 #ifdef CONFIG_HIGHMEM
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index 0cd9a7a05e77..8bfd1e905812 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -38,10 +38,10 @@ static int init_stub_pte(struct mm_struct *mm, unsigned long proc,
         *pte = pte_mkread(*pte);
         return 0;
 
- out_pmd:
-        pud_free(mm, pud);
  out_pte:
         pmd_free(mm, pmd);
+ out_pmd:
+        pud_free(mm, pud);
  out:
         return -ENOMEM;
 }
diff --git a/arch/um/kernel/smp.c b/arch/um/kernel/smp.c
index 98351c78bc81..106bf27e2a9a 100644
--- a/arch/um/kernel/smp.c
+++ b/arch/um/kernel/smp.c
@@ -111,7 +111,7 @@ void smp_prepare_cpus(unsigned int maxcpus)
         int i;
 
         for (i = 0; i < ncpus; ++i)
-                cpu_set(i, cpu_possible_map);
+                set_cpu_possible(i, true);
 
         cpu_clear(me, cpu_online_map);
         cpu_set(me, cpu_online_map);
diff --git a/arch/um/kernel/uml.lds.S b/arch/um/kernel/uml.lds.S
index 2ebd39765db8..e7a6cca667aa 100644
--- a/arch/um/kernel/uml.lds.S
+++ b/arch/um/kernel/uml.lds.S
@@ -22,11 +22,7 @@ SECTIONS
   _text = .;
   _stext = .;
   __init_begin = .;
-  .init.text : {
-        _sinittext = .;
-        INIT_TEXT
-        _einittext = .;
-  }
+  INIT_TEXT_SECTION(PAGE_SIZE)
   . = ALIGN(PAGE_SIZE);
 
   .text      :
@@ -52,8 +48,7 @@ SECTIONS
   init.data : { INIT_DATA }
   .data    :
   {
-    . = ALIGN(KERNEL_STACK_SIZE);               /* init_task */
-    *(.data.init_task)
+    INIT_TASK_DATA(KERNEL_STACK_SIZE)
     . = ALIGN(KERNEL_STACK_SIZE);
     *(.data.init_irqstack)
     DATA_DATA
@@ -81,19 +76,10 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
   . = ALIGN(PAGE_SIZE);
-  .sbss      :
-  {
-   __bss_start = .;
-   PROVIDE(_bss_start = .);
-   *(.sbss)
-   *(.scommon)
-  }
-  .bss       :
-  {
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
+  __bss_start = .;
+  PROVIDE(_bss_start = .);
+  SBSS(0)
+  BSS(0)
   _end = .;
   PROVIDE (end = .);
 
diff --git a/arch/um/kernel/vmlinux.lds.S b/arch/um/kernel/vmlinux.lds.S
index f8aeb448aab6..16e49bfa2b42 100644
--- a/arch/um/kernel/vmlinux.lds.S
+++ b/arch/um/kernel/vmlinux.lds.S
@@ -1,3 +1,6 @@
+
+KERNEL_STACK_SIZE = 4096 * (1 << CONFIG_KERNEL_STACK_ORDER);
+
 #ifdef CONFIG_LD_SCRIPT_STATIC
 #include "uml.lds.S"
 #else
diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c
index 30860b89ec58..b6b1096152aa 100644
--- a/arch/um/os-Linux/helper.c
+++ b/arch/um/os-Linux/helper.c
@@ -15,7 +15,6 @@
 #include "os.h"
 #include "um_malloc.h"
 #include "user.h"
-#include <linux/limits.h>
 
 struct helper_data {
         void (*pre_exec)(void*);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e98e81a04971..93698794aa3a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -24,7 +24,7 @@ config X86
         select HAVE_UNSTABLE_SCHED_CLOCK
         select HAVE_IDE
         select HAVE_OPROFILE
-        select HAVE_PERF_COUNTERS if (!M386 && !M486)
+        select HAVE_PERF_EVENTS if (!M386 && !M486)
         select HAVE_IOREMAP_PROT
         select HAVE_KPROBES
         select ARCH_WANT_OPTIONAL_GPIOLIB
@@ -325,6 +325,7 @@ config X86_EXTENDED_PLATFORM
                 SGI 320/540 (Visual Workstation)
                 Summit/EXA (IBM x440)
                 Unisys ES7000 IA32 series
+                Moorestown MID devices
 
           If you have one of these systems, or if you want to build a
           generic distribution kernel, say Y here - otherwise say N.
@@ -384,6 +385,18 @@ config X86_ELAN
 
           If unsure, choose "PC-compatible" instead.
 
+config X86_MRST
+       bool "Moorestown MID platform"
+        depends on X86_32
+        depends on X86_EXTENDED_PLATFORM
+        ---help---
+          Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
+          Internet Device(MID) platform. Moorestown consists of two chips:
+          Lincroft (CPU core, graphics, and memory controller) and Langwell IOH.
+          Unlike standard x86 PCs, Moorestown does not have many legacy devices
+          nor standard legacy replacement devices/features. e.g. Moorestown does
+          not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
+
 config X86_RDC321X
         bool "RDC R-321x SoC"
         depends on X86_32
@@ -783,41 +796,17 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
           increased on these systems.
 
 config X86_MCE
-        bool "Machine Check Exception"
+        bool "Machine Check / overheating reporting"
         ---help---
-          Machine Check Exception support allows the processor to notify the
-          kernel if it detects a problem (e.g. overheating, component failure).
+          Machine Check support allows the processor to notify the
+          kernel if it detects a problem (e.g. overheating, data corruption).
           The action the kernel takes depends on the severity of the problem,
-          ranging from a warning message on the console, to halting the machine.
-          Your processor must be a Pentium or newer to support this - check the
-          flags in /proc/cpuinfo for mce.  Note that some older Pentium systems
-          have a design flaw which leads to false MCE events - hence MCE is
-          disabled on all P5 processors, unless explicitly enabled with "mce"
-          as a boot argument.  Similarly, if MCE is built in and creates a
-          problem on some new non-standard machine, you can boot with "nomce"
-          to disable it.  MCE support simply ignores non-MCE processors like
-          the 386 and 486, so nearly everyone can say Y here.
-
-config X86_OLD_MCE
-        depends on X86_32 && X86_MCE
-        bool "Use legacy machine check code (will go away)"
-        default n
-        select X86_ANCIENT_MCE
-        ---help---
-          Use the old i386 machine check code. This is merely intended for
-          testing in a transition period. Try this if you run into any machine
-          check related software problems, but report the problem to
-          linux-kernel.  When in doubt say no.
-
-config X86_NEW_MCE
-        depends on X86_MCE
-        bool
-        default y if (!X86_OLD_MCE && X86_32) || X86_64
+          ranging from warning messages to halting the machine.
 
 config X86_MCE_INTEL
         def_bool y
         prompt "Intel MCE features"
-        depends on X86_NEW_MCE && X86_LOCAL_APIC
+        depends on X86_MCE && X86_LOCAL_APIC
         ---help---
            Additional support for intel specific MCE features such as
            the thermal monitor.
@@ -825,14 +814,14 @@ config X86_MCE_INTEL
 config X86_MCE_AMD
         def_bool y
         prompt "AMD MCE features"
-        depends on X86_NEW_MCE && X86_LOCAL_APIC
+        depends on X86_MCE && X86_LOCAL_APIC
         ---help---
            Additional support for AMD specific MCE features such as
            the DRAM Error Threshold.
 
 config X86_ANCIENT_MCE
         def_bool n
-        depends on X86_32
+        depends on X86_32 && X86_MCE
         prompt "Support for old Pentium 5 / WinChip machine checks"
         ---help---
           Include support for machine check handling on old Pentium 5 or WinChip
@@ -845,36 +834,16 @@ config X86_MCE_THRESHOLD
         default y
 
 config X86_MCE_INJECT
-        depends on X86_NEW_MCE
+        depends on X86_MCE
         tristate "Machine check injector support"
         ---help---
           Provide support for injecting machine checks for testing purposes.
           If you don't know what a machine check is and you don't do kernel
           QA it is safe to say n.
 
-config X86_MCE_NONFATAL
-        tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
-        depends on X86_OLD_MCE
-        ---help---
-          Enabling this feature starts a timer that triggers every 5 seconds which
-          will look at the machine check registers to see if anything happened.
-          Non-fatal problems automatically get corrected (but still logged).
-          Disable this if you don't want to see these messages.
-          Seeing the messages this option prints out may be indicative of dying
-          or out-of-spec (ie, overclocked) hardware.
-          This option only does something on certain CPUs.
-          (AMD Athlon/Duron and Intel Pentium 4)
-
-config X86_MCE_P4THERMAL
-        bool "check for P4 thermal throttling interrupt."
-        depends on X86_OLD_MCE && X86_MCE && (X86_UP_APIC || SMP)
-        ---help---
-          Enabling this feature will cause a message to be printed when the P4
-          enters thermal throttling.
-
 config X86_THERMAL_VECTOR
         def_bool y
-        depends on X86_MCE_P4THERMAL || X86_MCE_INTEL
+        depends on X86_MCE_INTEL
 
 config VM86
         bool "Enable VM86 support" if EMBEDDED
@@ -1235,6 +1204,10 @@ config ARCH_DISCONTIGMEM_DEFAULT
         def_bool y
         depends on NUMA && X86_32
 
+config ARCH_PROC_KCORE_TEXT
+        def_bool y
+        depends on X86_64 && PROC_KCORE
+
 config ARCH_SPARSEMEM_DEFAULT
         def_bool y
         depends on X86_64
@@ -1693,6 +1666,8 @@ source "kernel/power/Kconfig"
 
 source "drivers/acpi/Kconfig"
 
+source "drivers/sfi/Kconfig"
+
 config X86_APM_BOOT
         bool
         default y
@@ -1888,7 +1863,7 @@ config PCI_DIRECT
 
 config PCI_MMCONFIG
         def_bool y
-        depends on X86_32 && PCI && ACPI && (PCI_GOMMCONFIG || PCI_GOANY)
+        depends on X86_32 && PCI && (ACPI || SFI) && (PCI_GOMMCONFIG || PCI_GOANY)
 
 config PCI_OLPC
         def_bool y
@@ -1926,7 +1901,7 @@ config DMAR_DEFAULT_ON
 config DMAR_BROKEN_GFX_WA
         def_bool n
         prompt "Workaround broken graphics drivers (going away soon)"
-        depends on DMAR
+        depends on DMAR && BROKEN
         ---help---
           Current Graphics drivers tend to use physical address
           for DMA and avoid using DMA APIs. Setting this config
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 7983c420eaf2..a012ee8ef803 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -179,8 +179,8 @@ archclean:
 define archhelp
   echo  '* bzImage      - Compressed kernel image (arch/x86/boot/bzImage)'
   echo  '  install      - Install kernel using'
-  echo  '                  (your) ~/bin/installkernel or'
-  echo  '                  (distribution) /sbin/installkernel or'
+  echo  '                  (your) ~/bin/$(INSTALLKERNEL) or'
+  echo  '                  (distribution) /sbin/$(INSTALLKERNEL) or'
   echo  '                  install to $$(INSTALL_PATH) and run lilo'
   echo  '  fdimage      - Create 1.4MB boot floppy image (arch/x86/boot/fdimage)'
   echo  '  fdimage144   - Create 1.4MB boot floppy image (arch/x86/boot/fdimage)'
diff --git a/arch/x86/boot/install.sh b/arch/x86/boot/install.sh
index 8d60ee15dfd9..d13ec1c38640 100644
--- a/arch/x86/boot/install.sh
+++ b/arch/x86/boot/install.sh
@@ -33,8 +33,8 @@ verify "$3"
 
 # User may have a custom install script
 
-if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
-if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
+if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
 
 # Default install - same as make zlilo
 
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index ba331bfd1112..74619c4f9fda 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -831,5 +831,5 @@ ia32_sys_call_table:
         .quad compat_sys_preadv
         .quad compat_sys_pwritev
         .quad compat_sys_rt_tgsigqueueinfo      /* 335 */
-        .quad sys_perf_counter_open
+        .quad sys_perf_event_open
 ia32_syscall_end:
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 20d1465a2ab0..4518dc500903 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -144,7 +144,6 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
 
 #else /* !CONFIG_ACPI */
 
-#define acpi_disabled 1
 #define acpi_lapic 0
 #define acpi_ioapic 0
 static inline void acpi_noirq_set(void) { }
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 586b7adb8e53..474d80d3e6cc 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -66,13 +66,23 @@ static inline void default_inquire_remote_apic(int apicid)
 }
 
 /*
+ * With 82489DX we can't rely on apic feature bit
+ * retrieved via cpuid but still have to deal with
+ * such an apic chip so we assume that SMP configuration
+ * is found from MP table (64bit case uses ACPI mostly
+ * which set smp presence flag as well so we are safe
+ * to use this helper too).
+ */
+static inline bool apic_from_smp_config(void)
+{
+        return smp_found_config && !disable_apic;
+}
+
+/*
  * Basic functions accessing APICs.
  */
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
-#else
-#define setup_boot_clock setup_boot_APIC_clock
-#define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 
 #ifdef CONFIG_X86_64
@@ -252,6 +262,8 @@ static inline void lapic_shutdown(void) { }
 static inline void init_apic_mappings(void) { }
 static inline void disable_local_APIC(void) { }
 static inline void apic_disable(void) { }
+# define setup_boot_APIC_clock x86_init_noop
+# define setup_secondary_APIC_clock x86_init_noop
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_X86_64
@@ -300,7 +312,7 @@ struct apic {
         int (*cpu_present_to_apicid)(int mps_cpu);
         physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
         void (*setup_portio_remap)(void);
-        int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
+        int (*check_phys_apicid_present)(int phys_apicid);
         void (*enable_apic_mode)(void);
         int (*phys_pkg_id)(int cpuid_apic, int index_msb);
 
@@ -434,7 +446,7 @@ extern struct apic apic_x2apic_uv_x;
 DECLARE_PER_CPU(int, x2apic_extra_bits);
 
 extern int default_cpu_present_to_apicid(int mps_cpu);
-extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+extern int default_check_phys_apicid_present(int phys_apicid);
 #endif
 
 static inline void default_wait_for_init_deassert(atomic_t *deassert)
@@ -550,9 +562,9 @@ static inline int __default_cpu_present_to_apicid(int mps_cpu)
 }
 
 static inline int
-__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+__default_check_phys_apicid_present(int phys_apicid)
 {
-        return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
+        return physid_isset(phys_apicid, phys_cpu_present_map);
 }
 
 #ifdef CONFIG_X86_32
@@ -562,13 +574,13 @@ static inline int default_cpu_present_to_apicid(int mps_cpu)
 }
 
 static inline int
-default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+default_check_phys_apicid_present(int phys_apicid)
 {
-        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+        return __default_check_phys_apicid_present(phys_apicid);
 }
 #else
 extern int default_cpu_present_to_apicid(int mps_cpu);
-extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+extern int default_check_phys_apicid_present(int phys_apicid);
 #endif
 
 static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index 6ca20218dd72..6be33d83c716 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -110,4 +110,14 @@ struct boot_params {
         __u8  _pad9[276];                               /* 0xeec */
 } __attribute__((packed));
 
+enum {
+        X86_SUBARCH_PC = 0,
+        X86_SUBARCH_LGUEST,
+        X86_SUBARCH_XEN,
+        X86_SUBARCH_MRST,
+        X86_NR_SUBARCHS,
+};
+
+
+
 #endif /* _ASM_X86_BOOTPARAM_H */
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h
index 5d367caa0e36..549860d3be8f 100644
--- a/arch/x86/include/asm/cache.h
+++ b/arch/x86/include/asm/cache.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_X86_CACHE_H
 #define _ASM_X86_CACHE_H
 
+#include <linux/linkage.h>
+
 /* L1 cache line size */
 #define L1_CACHE_SHIFT  (CONFIG_X86_L1_CACHE_SHIFT)
 #define L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
@@ -13,7 +15,7 @@
 #ifdef CONFIG_SMP
 #define __cacheline_aligned_in_smp                                      \
         __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))      \
-        __attribute__((__section__(".data.page_aligned")))
+        __page_aligned_data
 #endif
 #endif
 
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 847fee6493a2..9cfc88b97742 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -96,6 +96,7 @@
 #define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */
 #define X86_FEATURE_EXTD_APICID (3*32+26) /* has extended APICID (8 bits) */
 #define X86_FEATURE_AMD_DCM     (3*32+27) /* multi-node processor */
+#define X86_FEATURE_APERFMPERF  (3*32+28) /* APERFMPERF */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3        (4*32+ 0) /* "pni" SSE-3 */
diff --git a/arch/x86/include/asm/do_timer.h b/arch/x86/include/asm/do_timer.h
deleted file mode 100644
index 23ecda0b28a0..000000000000
--- a/arch/x86/include/asm/do_timer.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* defines for inline arch setup functions */
-#include <linux/clockchips.h>
-
-#include <asm/i8259.h>
-#include <asm/i8253.h>
-
-/**
- * do_timer_interrupt_hook - hook into timer tick
- *
- * Call the pit clock event handler. see asm/i8253.h
- **/
-
-static inline void do_timer_interrupt_hook(void)
-{
-        global_clock_event->event_handler(global_clock_event);
-}
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 7ecba4d85089..40b4e614fe71 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -126,8 +126,6 @@ extern void e820_reserve_resources(void);
 extern void e820_reserve_resources_late(void);
 extern void setup_memory_map(void);
 extern char *default_machine_specific_memory_setup(void);
-extern char *machine_specific_memory_setup(void);
-extern char *memory_setup(void);
 #endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
 
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 83c1bc8d2e8a..456a304b8172 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -299,6 +299,8 @@ do {									\
 
 #ifdef CONFIG_X86_32
 
+#define STACK_RND_MASK (0x7ff)
+
 #define VDSO_HIGH_BASE          (__fix_to_virt(FIX_VDSO))
 
 #define ARCH_DLINFO             ARCH_DLINFO_IA32(vdso_enabled)
diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index ff8cbfa07851..f5693c81a1db 100644
--- a/arch/x86/include/asm/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -49,7 +49,7 @@ BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
 BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
 BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
 
-#ifdef CONFIG_PERF_COUNTERS
+#ifdef CONFIG_PERF_EVENTS
 BUILD_INTERRUPT(perf_pending_interrupt, LOCAL_PENDING_VECTOR)
 #endif
 
@@ -61,7 +61,7 @@ BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
 BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)
 #endif
 
-#ifdef CONFIG_X86_NEW_MCE
+#ifdef CONFIG_X86_MCE
 BUILD_INTERRUPT(mce_self_interrupt,MCE_SELF_VECTOR)
 #endif
 
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
index 369f5c5d09a1..b78c0941e422 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -20,7 +20,7 @@
 #ifndef ASM_X86__HYPERVISOR_H
 #define ASM_X86__HYPERVISOR_H
 
-extern unsigned long get_hypervisor_tsc_freq(void);
 extern void init_hypervisor(struct cpuinfo_x86 *c);
+extern void init_hypervisor_platform(void);
 
 #endif
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 85232d32fcb8..7c7c16cde1f8 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -143,6 +143,8 @@ extern int noioapicreroute;
 /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
 extern int timer_through_8259;
 
+extern void io_apic_disable_legacy(void);
+
 /*
  * If we use the IO-APIC for IRQ routing, disable automatic
  * assignment of PCI IRQ's.
@@ -176,6 +178,7 @@ extern int setup_ioapic_entry(int apic, int irq,
                               int polarity, int vector, int pin);
 extern void ioapic_write_entry(int apic, int pin,
                                struct IO_APIC_route_entry e);
+extern void setup_ioapic_ids_from_mpc(void);
 
 struct mp_ioapic_gsi{
         int gsi_base;
@@ -187,12 +190,14 @@ int mp_find_ioapic_pin(int ioapic, int gsi);
 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base);
 
 #else  /* !CONFIG_X86_IO_APIC */
+
 #define io_apic_assign_pci_irqs 0
+#define setup_ioapic_ids_from_mpc x86_init_noop
 static const int timer_through_8259 = 0;
 static inline void ioapic_init_mappings(void)   { }
 static inline void ioapic_insert_resources(void) { }
-
 static inline void probe_nr_irqs_gsi(void)      { }
+
 #endif
 
 #endif /* _ASM_X86_IO_APIC_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index f38481bcd455..ddda6cbed6f4 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -37,7 +37,6 @@ extern void fixup_irqs(void);
 #endif
 
 extern void (*generic_interrupt_extension)(void);
-extern void init_IRQ(void);
 extern void native_init_IRQ(void);
 extern bool handle_irq(unsigned irq, struct pt_regs *regs);
 
@@ -47,4 +46,6 @@ extern unsigned int do_IRQ(struct pt_regs *regs);
 extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
 extern int vector_used_by_percpu_irq(unsigned int vector);
 
+extern void init_ISA_irqs(void);
+
 #endif /* _ASM_X86_IRQ_H */
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 5cdd8d100ec9..b608a64c5814 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -9,7 +9,7 @@
  */
 
 #define MCG_BANKCNT_MASK        0xff         /* Number of Banks */
-#define MCG_CTL_P               (1ULL<<8)    /* MCG_CAP register available */
+#define MCG_CTL_P               (1ULL<<8)    /* MCG_CTL register available */
 #define MCG_EXT_P               (1ULL<<9)    /* Extended registers available */
 #define MCG_CMCI_P              (1ULL<<10)   /* CMCI supported */
 #define MCG_EXT_CNT_MASK        0xff0000     /* Number of Extended registers */
@@ -38,6 +38,14 @@
 #define MCM_ADDR_MEM     3      /* memory address */
 #define MCM_ADDR_GENERIC 7      /* generic */
 
+#define MCJ_CTX_MASK            3
+#define MCJ_CTX(flags)          ((flags) & MCJ_CTX_MASK)
+#define MCJ_CTX_RANDOM          0    /* inject context: random */
+#define MCJ_CTX_PROCESS         1    /* inject context: process */
+#define MCJ_CTX_IRQ             2    /* inject context: IRQ */
+#define MCJ_NMI_BROADCAST       4    /* do NMI broadcasting */
+#define MCJ_EXCEPTION           8    /* raise as exception */
+
 /* Fields are zero when not available */
 struct mce {
         __u64 status;
@@ -48,8 +56,8 @@ struct mce {
         __u64 tsc;      /* cpu time stamp counter */
         __u64 time;     /* wall time_t when error was detected */
         __u8  cpuvendor;        /* cpu vendor as encoded in system.h */
-        __u8  pad1;
-        __u16 pad2;
+        __u8  inject_flags;     /* software inject flags */
+        __u16  pad;
         __u32 cpuid;    /* CPUID 1 EAX */
         __u8  cs;               /* code segment */
         __u8  bank;     /* machine check bank */
@@ -115,13 +123,6 @@ void mcheck_init(struct cpuinfo_x86 *c);
 static inline void mcheck_init(struct cpuinfo_x86 *c) {}
 #endif
 
-#ifdef CONFIG_X86_OLD_MCE
-extern int nr_mce_banks;
-void amd_mcheck_init(struct cpuinfo_x86 *c);
-void intel_p4_mcheck_init(struct cpuinfo_x86 *c);
-void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
-#endif
-
 #ifdef CONFIG_X86_ANCIENT_MCE
 void intel_p5_mcheck_init(struct cpuinfo_x86 *c);
 void winchip_mcheck_init(struct cpuinfo_x86 *c);
@@ -137,10 +138,11 @@ void mce_log(struct mce *m);
 DECLARE_PER_CPU(struct sys_device, mce_dev);
 
 /*
- * To support more than 128 would need to escape the predefined
- * Linux defined extended banks first.
+ * Maximum banks number.
+ * This is the limit of the current register layout on
+ * Intel CPUs.
  */
-#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
+#define MAX_NR_BANKS 32
 
 #ifdef CONFIG_X86_MCE_INTEL
 extern int mce_cmci_disabled;
@@ -208,11 +210,7 @@ extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 
 void intel_init_thermal(struct cpuinfo_x86 *c);
 
-#ifdef CONFIG_X86_NEW_MCE
 void mce_log_therm_throt_event(__u64 status);
-#else
-static inline void mce_log_therm_throt_event(__u64 status) {}
-#endif
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_X86_MCE_H */
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index f923203dc39a..4a2d4e0c18d9 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -37,12 +37,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
 
         if (likely(prev != next)) {
                 /* stop flush ipis for the previous mm */
-                cpu_clear(cpu, prev->cpu_vm_mask);
+                cpumask_clear_cpu(cpu, mm_cpumask(prev));
 #ifdef CONFIG_SMP
                 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
                 percpu_write(cpu_tlbstate.active_mm, next);
 #endif
-                cpu_set(cpu, next->cpu_vm_mask);
+                cpumask_set_cpu(cpu, mm_cpumask(next));
 
                 /* Re-load page tables */
                 load_cr3(next->pgd);
@@ -58,7 +58,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
                 BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next);
 
-                if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
+                if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next))) {
                         /* We were in lazy tlb mode and leave_mm disabled
                          * tlb flush IPI delivery. We must reload CR3
                          * to make sure to use no freed page tables.
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index e2a1bb6d71ea..79c94500c0bb 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -4,6 +4,7 @@
 #include <linux/init.h>
 
 #include <asm/mpspec_def.h>
+#include <asm/x86_init.h>
 
 extern int apic_version[MAX_APICS];
 extern int pic_mode;
@@ -41,9 +42,6 @@ extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
 
 #endif /* CONFIG_X86_64 */
 
-extern void early_find_smp_config(void);
-extern void early_get_smp_config(void);
-
 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
 #endif
@@ -52,20 +50,55 @@ extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
 
 extern unsigned int boot_cpu_physical_apicid;
 extern unsigned int max_physical_apicid;
-extern int smp_found_config;
 extern int mpc_default_type;
 extern unsigned long mp_lapic_addr;
 
-extern void get_smp_config(void);
+#ifdef CONFIG_X86_LOCAL_APIC
+extern int smp_found_config;
+#else
+# define smp_found_config 0
+#endif
+
+static inline void get_smp_config(void)
+{
+        x86_init.mpparse.get_smp_config(0);
+}
+
+static inline void early_get_smp_config(void)
+{
+        x86_init.mpparse.get_smp_config(1);
+}
+
+static inline void find_smp_config(void)
+{
+        x86_init.mpparse.find_smp_config(1);
+}
+
+static inline void early_find_smp_config(void)
+{
+        x86_init.mpparse.find_smp_config(0);
+}
 
 #ifdef CONFIG_X86_MPPARSE
-extern void find_smp_config(void);
 extern void early_reserve_e820_mpc_new(void);
 extern int enable_update_mptable;
+extern int default_mpc_apic_id(struct mpc_cpu *m);
+extern void default_smp_read_mpc_oem(struct mpc_table *mpc);
+# ifdef CONFIG_X86_IO_APIC
+extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
+# else
+#  define default_mpc_oem_bus_info NULL
+# endif
+extern void default_find_smp_config(unsigned int reserve);
+extern void default_get_smp_config(unsigned int early);
 #else
-static inline void find_smp_config(void) { }
 static inline void early_reserve_e820_mpc_new(void) { }
 #define enable_update_mptable 0
+#define default_mpc_apic_id NULL
+#define default_smp_read_mpc_oem NULL
+#define default_mpc_oem_bus_info NULL
+#define default_find_smp_config x86_init_uint_noop
+#define default_get_smp_config x86_init_uint_noop
 #endif
 
 void __cpuinit generic_processor_info(int apicid, int version);
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index bd5549034a95..4ffe09b2ad75 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -81,8 +81,15 @@
 #define MSR_IA32_MC0_ADDR               0x00000402
 #define MSR_IA32_MC0_MISC               0x00000403
 
+#define MSR_IA32_MCx_CTL(x)             (MSR_IA32_MC0_CTL + 4*(x))
+#define MSR_IA32_MCx_STATUS(x)          (MSR_IA32_MC0_STATUS + 4*(x))
+#define MSR_IA32_MCx_ADDR(x)            (MSR_IA32_MC0_ADDR + 4*(x))
+#define MSR_IA32_MCx_MISC(x)            (MSR_IA32_MC0_MISC + 4*(x))
+
 /* These are consecutive and not in the normal 4er MCE bank block */
 #define MSR_IA32_MC0_CTL2               0x00000280
+#define MSR_IA32_MCx_CTL2(x)            (MSR_IA32_MC0_CTL2 + (x))
+
 #define CMCI_EN                 (1ULL << 30)
 #define CMCI_THRESHOLD_MASK             0xffffULL
 
@@ -215,6 +222,10 @@
 
 #define THERM_STATUS_PROCHOT            (1 << 0)
 
+#define MSR_THERM2_CTL                  0x0000019d
+
+#define MSR_THERM2_CTL_TM_SELECT        (1ULL << 16)
+
 #define MSR_IA32_MISC_ENABLE            0x000001a0
 
 /* MISC_ENABLE bits: architectural */
diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h
index e63cf7d441e1..139d4c1a33a7 100644
--- a/arch/x86/include/asm/nmi.h
+++ b/arch/x86/include/asm/nmi.h
@@ -40,8 +40,7 @@ extern unsigned int nmi_watchdog;
 #define NMI_INVALID     3
 
 struct ctl_table;
-struct file;
-extern int proc_nmi_enabled(struct ctl_table *, int , struct file *,
+extern int proc_nmi_enabled(struct ctl_table *, int ,
                         void __user *, size_t *, loff_t *);
 extern int unknown_nmi_panic;
 
diff --git a/arch/x86/include/asm/nops.h b/arch/x86/include/asm/nops.h
index ad2668ee1aa7..6d8723a766cc 100644
--- a/arch/x86/include/asm/nops.h
+++ b/arch/x86/include/asm/nops.h
@@ -65,6 +65,8 @@
    6: osp nopl 0x00(%eax,%eax,1)
    7: nopl 0x00000000(%eax)
    8: nopl 0x00000000(%eax,%eax,1)
+   Note: All the above are assumed to be a single instruction.
+        There is kernel code that depends on this.
 */
 #define P6_NOP1 GENERIC_NOP1
 #define P6_NOP2 ".byte 0x66,0x90\n"
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 40d6586af25b..8aebcc41041d 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -24,22 +24,6 @@ static inline void load_sp0(struct tss_struct *tss,
         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
 }
 
-#define ARCH_SETUP                      pv_init_ops.arch_setup();
-static inline unsigned long get_wallclock(void)
-{
-        return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
-}
-
-static inline int set_wallclock(unsigned long nowtime)
-{
-        return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
-}
-
-static inline void (*choose_time_init(void))(void)
-{
-        return pv_time_ops.time_init;
-}
-
 /* The paravirtualized CPUID instruction. */
 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
                            unsigned int *ecx, unsigned int *edx)
@@ -245,7 +229,6 @@ static inline unsigned long long paravirt_sched_clock(void)
 {
         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 }
-#define calibrate_tsc() (pv_time_ops.get_tsc_khz())
 
 static inline unsigned long long paravirt_read_pmc(int counter)
 {
@@ -363,34 +346,6 @@ static inline void slow_down_io(void)
 #endif
 }
 
-#ifdef CONFIG_X86_LOCAL_APIC
-static inline void setup_boot_clock(void)
-{
-        PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
-}
-
-static inline void setup_secondary_clock(void)
-{
-        PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
-}
-#endif
-
-static inline void paravirt_post_allocator_init(void)
-{
-        if (pv_init_ops.post_allocator_init)
-                (*pv_init_ops.post_allocator_init)();
-}
-
-static inline void paravirt_pagetable_setup_start(pgd_t *base)
-{
-        (*pv_mmu_ops.pagetable_setup_start)(base);
-}
-
-static inline void paravirt_pagetable_setup_done(pgd_t *base)
-{
-        (*pv_mmu_ops.pagetable_setup_done)(base);
-}
-
 #ifdef CONFIG_SMP
 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
                                     unsigned long start_esp)
@@ -948,6 +903,8 @@ static inline unsigned long __raw_local_irq_save(void)
 #undef PVOP_VCALL4
 #undef PVOP_CALL4
 
+extern void default_banner(void);
+
 #else  /* __ASSEMBLY__ */
 
 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
@@ -1088,5 +1045,7 @@ static inline unsigned long __raw_local_irq_save(void)
 #endif  /* CONFIG_X86_32 */
 
 #endif /* __ASSEMBLY__ */
-#endif /* CONFIG_PARAVIRT */
+#else  /* CONFIG_PARAVIRT */
+# define default_banner x86_init_noop
+#endif /* !CONFIG_PARAVIRT */
 #endif /* _ASM_X86_PARAVIRT_H */
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 25402d0006e7..dd0f5b32489d 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -78,14 +78,6 @@ struct pv_init_ops {
          */
         unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
                           unsigned long addr, unsigned len);
-
-        /* Basic arch-specific setup */
-        void (*arch_setup)(void);
-        char *(*memory_setup)(void);
-        void (*post_allocator_init)(void);
-
-        /* Print a banner to identify the environment */
-        void (*banner)(void);
 };
 
 
@@ -96,12 +88,6 @@ struct pv_lazy_ops {
 };
 
 struct pv_time_ops {
-        void (*time_init)(void);
-
-        /* Set and set time of day */
-        unsigned long (*get_wallclock)(void);
-        int (*set_wallclock)(unsigned long);
-
         unsigned long long (*sched_clock)(void);
         unsigned long (*get_tsc_khz)(void);
 };
@@ -203,8 +189,6 @@ struct pv_cpu_ops {
 };
 
 struct pv_irq_ops {
-        void (*init_IRQ)(void);
-
         /*
          * Get/set interrupt state.  save_fl and restore_fl are only
          * expected to use X86_EFLAGS_IF; all other bits
@@ -229,9 +213,6 @@ struct pv_irq_ops {
 
 struct pv_apic_ops {
 #ifdef CONFIG_X86_LOCAL_APIC
-        void (*setup_boot_clock)(void);
-        void (*setup_secondary_clock)(void);
-
         void (*startup_ipi_hook)(int phys_apicid,
                                  unsigned long start_eip,
                                  unsigned long start_esp);
@@ -239,15 +220,6 @@ struct pv_apic_ops {
 };
 
 struct pv_mmu_ops {
-        /*
-         * Called before/after init_mm pagetable setup. setup_start
-         * may reset %cr3, and may pre-install parts of the pagetable;
-         * pagetable setup is expected to preserve any existing
-         * mapping.
-         */
-        void (*pagetable_setup_start)(pgd_t *pgd_base);
-        void (*pagetable_setup_done)(pgd_t *pgd_base);
-
         unsigned long (*read_cr2)(void);
         void (*write_cr2)(unsigned long);
 
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index 1ff685ca221c..ada8c201d513 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -48,7 +48,6 @@ extern unsigned int pcibios_assign_all_busses(void);
 #else
 #define pcibios_assign_all_busses()     0
 #endif
-#define pcibios_scan_all_fns(a, b)      0
 
 extern unsigned long pci_mem_start;
 #define PCIBIOS_MIN_IO          0x1000
@@ -144,7 +143,11 @@ static inline int __pcibus_to_node(const struct pci_bus *bus)
 static inline const struct cpumask *
 cpumask_of_pcibus(const struct pci_bus *bus)
 {
-        return cpumask_of_node(__pcibus_to_node(bus));
+        int node;
+
+        node = __pcibus_to_node(bus);
+        return (node == -1) ? cpu_online_mask :
+                              cpumask_of_node(node);
 }
 #endif
 
diff --git a/arch/x86/include/asm/perf_counter.h b/arch/x86/include/asm/perf_event.h
index e7b7c938ae27..ad7ce3fd5065 100644
--- a/arch/x86/include/asm/perf_counter.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -1,8 +1,8 @@
-#ifndef _ASM_X86_PERF_COUNTER_H
-#define _ASM_X86_PERF_COUNTER_H
+#ifndef _ASM_X86_PERF_EVENT_H
+#define _ASM_X86_PERF_EVENT_H
 
 /*
- * Performance counter hw details:
+ * Performance event hw details:
  */
 
 #define X86_PMC_MAX_GENERIC                                     8
@@ -43,7 +43,7 @@
 union cpuid10_eax {
         struct {
                 unsigned int version_id:8;
-                unsigned int num_counters:8;
+                unsigned int num_events:8;
                 unsigned int bit_width:8;
                 unsigned int mask_length:8;
         } split;
@@ -52,7 +52,7 @@ union cpuid10_eax {
 
 union cpuid10_edx {
         struct {
-                unsigned int num_counters_fixed:4;
+                unsigned int num_events_fixed:4;
                 unsigned int reserved:28;
         } split;
         unsigned int full;
@@ -60,7 +60,7 @@ union cpuid10_edx {
 
 
 /*
- * Fixed-purpose performance counters:
+ * Fixed-purpose performance events:
  */
 
 /*
@@ -87,22 +87,22 @@ union cpuid10_edx {
 /*
  * We model BTS tracing as another fixed-mode PMC.
  *
- * We choose a value in the middle of the fixed counter range, since lower
- * values are used by actual fixed counters and higher values are used
+ * We choose a value in the middle of the fixed event range, since lower
+ * values are used by actual fixed events and higher values are used
  * to indicate other overflow conditions in the PERF_GLOBAL_STATUS msr.
  */
 #define X86_PMC_IDX_FIXED_BTS                           (X86_PMC_IDX_FIXED + 16)
 
 
-#ifdef CONFIG_PERF_COUNTERS
-extern void init_hw_perf_counters(void);
-extern void perf_counters_lapic_init(void);
+#ifdef CONFIG_PERF_EVENTS
+extern void init_hw_perf_events(void);
+extern void perf_events_lapic_init(void);
 
-#define PERF_COUNTER_INDEX_OFFSET                       0
+#define PERF_EVENT_INDEX_OFFSET                 0
 
 #else
-static inline void init_hw_perf_counters(void)          { }
-static inline void perf_counters_lapic_init(void)       { }
+static inline void init_hw_perf_events(void)            { }
+static inline void perf_events_lapic_init(void) { }
 #endif
 
-#endif /* _ASM_X86_PERF_COUNTER_H */
+#endif /* _ASM_X86_PERF_EVENT_H */
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 4c5b51fdc788..af6fd360ab35 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -56,16 +56,6 @@ extern struct list_head pgd_list;
 #define pte_update(mm, addr, ptep)              do { } while (0)
 #define pte_update_defer(mm, addr, ptep)        do { } while (0)
 
-static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
-{
-        native_pagetable_setup_start(base);
-}
-
-static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
-{
-        native_pagetable_setup_done(base);
-}
-
 #define pgd_val(x)      native_pgd_val(x)
 #define __pgd(x)        native_make_pgd(x)
 
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index 54cb697f4900..7b467bf3c680 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -299,8 +299,8 @@ void set_pte_vaddr(unsigned long vaddr, pte_t pte);
 extern void native_pagetable_setup_start(pgd_t *base);
 extern void native_pagetable_setup_done(pgd_t *base);
 #else
-static inline void native_pagetable_setup_start(pgd_t *base) {}
-static inline void native_pagetable_setup_done(pgd_t *base) {}
+#define native_pagetable_setup_start x86_init_pgd_noop
+#define native_pagetable_setup_done  x86_init_pgd_noop
 #endif
 
 struct seq_file;
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index e08ea043e085..c3429e8b2424 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -27,6 +27,7 @@ struct mm_struct;
 #include <linux/cpumask.h>
 #include <linux/cache.h>
 #include <linux/threads.h>
+#include <linux/math64.h>
 #include <linux/init.h>
 
 /*
@@ -1020,4 +1021,35 @@ extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
 extern int get_tsc_mode(unsigned long adr);
 extern int set_tsc_mode(unsigned int val);
 
+extern int amd_get_nb_id(int cpu);
+
+struct aperfmperf {
+        u64 aperf, mperf;
+};
+
+static inline void get_aperfmperf(struct aperfmperf *am)
+{
+        WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_APERFMPERF));
+
+        rdmsrl(MSR_IA32_APERF, am->aperf);
+        rdmsrl(MSR_IA32_MPERF, am->mperf);
+}
+
+#define APERFMPERF_SHIFT 10
+
+static inline
+unsigned long calc_aperfmperf_ratio(struct aperfmperf *old,
+                                    struct aperfmperf *new)
+{
+        u64 aperf = new->aperf - old->aperf;
+        u64 mperf = new->mperf - old->mperf;
+        unsigned long ratio = aperf;
+
+        mperf >>= APERFMPERF_SHIFT;
+        if (mperf)
+                ratio = div64_u64(aperf, mperf);
+
+        return ratio;
+}
+
 #endif /* _ASM_X86_PROCESSOR_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 4093d1ed6db2..18e496c98ff0 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -5,43 +5,6 @@
 
 #define COMMAND_LINE_SIZE 2048
 
-#ifndef __ASSEMBLY__
-
-/*
- * Any setup quirks to be performed?
- */
-struct mpc_cpu;
-struct mpc_bus;
-struct mpc_oemtable;
-
-struct x86_quirks {
-        int (*arch_pre_time_init)(void);
-        int (*arch_time_init)(void);
-        int (*arch_pre_intr_init)(void);
-        int (*arch_intr_init)(void);
-        int (*arch_trap_init)(void);
-        char * (*arch_memory_setup)(void);
-        int (*mach_get_smp_config)(unsigned int early);
-        int (*mach_find_smp_config)(unsigned int reserve);
-
-        int *mpc_record;
-        int (*mpc_apic_id)(struct mpc_cpu *m);
-        void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
-        void (*mpc_oem_pci_bus)(struct mpc_bus *m);
-        void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
-                                unsigned short oemsize);
-        int (*setup_ioapic_ids)(void);
-};
-
-extern void x86_quirk_intr_init(void);
-
-extern void x86_quirk_trap_init(void);
-
-extern void x86_quirk_pre_time_init(void);
-extern void x86_quirk_time_init(void);
-
-#endif /* __ASSEMBLY__ */
-
 #ifdef __i386__
 
 #include <linux/pfn.h>
@@ -61,6 +24,7 @@ extern void x86_quirk_time_init(void);
 
 #ifndef __ASSEMBLY__
 #include <asm/bootparam.h>
+#include <asm/x86_init.h>
 
 /* Interrupt control for vSMPowered x86_64 systems */
 #ifdef CONFIG_X86_64
@@ -79,11 +43,16 @@ static inline void visws_early_detect(void) { }
 static inline int is_visws_box(void) { return 0; }
 #endif
 
-extern struct x86_quirks *x86_quirks;
 extern unsigned long saved_video_mode;
 
-#ifndef CONFIG_PARAVIRT
-#define paravirt_post_allocator_init()  do {} while (0)
+extern void reserve_standard_io_resources(void);
+extern void i386_reserve_resources(void);
+extern void setup_default_timer_irq(void);
+
+#ifdef CONFIG_X86_MRST
+extern void x86_mrst_early_setup(void);
+#else
+static inline void x86_mrst_early_setup(void) { }
 #endif
 
 #ifndef _SETUP
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 6a84ed166aec..1e796782cd7b 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -121,7 +121,6 @@ static inline void arch_send_call_function_single_ipi(int cpu)
         smp_ops.send_call_func_single_ipi(cpu);
 }
 
-#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
         smp_ops.send_call_func_ipi(mask);
diff --git a/arch/x86/include/asm/string_32.h b/arch/x86/include/asm/string_32.h
index c86f452256de..ae907e617181 100644
--- a/arch/x86/include/asm/string_32.h
+++ b/arch/x86/include/asm/string_32.h
@@ -65,7 +65,6 @@ static __always_inline void *__constant_memcpy(void *to, const void *from,
         case 4:
                 *(int *)to = *(int *)from;
                 return to;
-
         case 3:
                 *(short *)to = *(short *)from;
                 *((char *)to + 2) = *((char *)from + 2);
diff --git a/arch/x86/include/asm/syscall.h b/arch/x86/include/asm/syscall.h
index d82f39bb7905..8d33bc5462d1 100644
--- a/arch/x86/include/asm/syscall.h
+++ b/arch/x86/include/asm/syscall.h
@@ -1,7 +1,7 @@
 /*
  * Access to user system call parameters and results
  *
- * Copyright (C) 2008 Red Hat, Inc.  All rights reserved.
+ * Copyright (C) 2008-2009 Red Hat, Inc.  All rights reserved.
  *
  * This copyrighted material is made available to anyone wishing to use,
  * modify, copy, or redistribute it subject to the terms and conditions
@@ -16,13 +16,13 @@
 #include <linux/sched.h>
 #include <linux/err.h>
 
-static inline long syscall_get_nr(struct task_struct *task,
-                                  struct pt_regs *regs)
+/*
+ * Only the low 32 bits of orig_ax are meaningful, so we return int.
+ * This importantly ignores the high bits on 64-bit, so comparisons
+ * sign-extend the low 32 bits.
+ */
+static inline int syscall_get_nr(struct task_struct *task, struct pt_regs *regs)
 {
-        /*
-         * We always sign-extend a -1 value being set here,
-         * so this is always either -1L or a syscall number.
-         */
         return regs->orig_ax;
 }
 
diff --git a/arch/x86/include/asm/time.h b/arch/x86/include/asm/time.h
index 50c733aac421..7bdec4e9b739 100644
--- a/arch/x86/include/asm/time.h
+++ b/arch/x86/include/asm/time.h
@@ -4,60 +4,7 @@
 extern void hpet_time_init(void);
 
 #include <asm/mc146818rtc.h>
-#ifdef CONFIG_X86_32
-#include <linux/efi.h>
-
-static inline unsigned long native_get_wallclock(void)
-{
-        unsigned long retval;
-
-        if (efi_enabled)
-                retval = efi_get_time();
-        else
-                retval = mach_get_cmos_time();
-
-        return retval;
-}
-
-static inline int native_set_wallclock(unsigned long nowtime)
-{
-        int retval;
-
-        if (efi_enabled)
-                retval = efi_set_rtc_mmss(nowtime);
-        else
-                retval = mach_set_rtc_mmss(nowtime);
-
-        return retval;
-}
-
-#else
-extern void native_time_init_hook(void);
-
-static inline unsigned long native_get_wallclock(void)
-{
-        return mach_get_cmos_time();
-}
-
-static inline int native_set_wallclock(unsigned long nowtime)
-{
-        return mach_set_rtc_mmss(nowtime);
-}
-
-#endif
 
 extern void time_init(void);
 
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else /* !CONFIG_PARAVIRT */
-
-#define get_wallclock() native_get_wallclock()
-#define set_wallclock(x) native_set_wallclock(x)
-#define choose_time_init() hpet_time_init
-
-#endif /* CONFIG_PARAVIRT */
-
-extern unsigned long __init calibrate_cpu(void);
-
 #endif /* _ASM_X86_TIME_H */
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index 20ca9c4d4686..5469630b27f5 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -8,20 +8,16 @@
 #define TICK_SIZE (tick_nsec / 1000)
 
 unsigned long long native_sched_clock(void);
-unsigned long native_calibrate_tsc(void);
+extern int recalibrate_cpu_khz(void);
 
-#ifdef CONFIG_X86_32
+#if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC)
 extern int timer_ack;
-extern irqreturn_t timer_interrupt(int irq, void *dev_id);
-#endif /* CONFIG_X86_32 */
-extern int recalibrate_cpu_khz(void);
+#else
+# define timer_ack (0)
+#endif
 
 extern int no_timer_check;
 
-#ifndef CONFIG_PARAVIRT
-#define calibrate_tsc() native_calibrate_tsc()
-#endif
-
 /* Accelerators for sched_clock()
  * convert from cycles(64bits) => nanoseconds (64bits)
  *  basic equation:
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 26d06e052a18..6f0695d744bf 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -116,15 +116,11 @@ extern unsigned long node_remap_size[];
 
 # define SD_CACHE_NICE_TRIES    1
 # define SD_IDLE_IDX            1
-# define SD_NEWIDLE_IDX         2
-# define SD_FORKEXEC_IDX        0
 
 #else
 
 # define SD_CACHE_NICE_TRIES    2
 # define SD_IDLE_IDX            2
-# define SD_NEWIDLE_IDX         2
-# define SD_FORKEXEC_IDX        1
 
 #endif
 
@@ -137,22 +133,20 @@ extern unsigned long node_remap_size[];
         .cache_nice_tries       = SD_CACHE_NICE_TRIES,                  \
         .busy_idx               = 3,                                    \
         .idle_idx               = SD_IDLE_IDX,                          \
-        .newidle_idx            = SD_NEWIDLE_IDX,                       \
-        .wake_idx               = 1,                                    \
-        .forkexec_idx           = SD_FORKEXEC_IDX,                      \
+        .newidle_idx            = 0,                                    \
+        .wake_idx               = 0,                                    \
+        .forkexec_idx           = 0,                                    \
                                                                         \
         .flags                  = 1*SD_LOAD_BALANCE                     \
                                 | 1*SD_BALANCE_NEWIDLE                  \
                                 | 1*SD_BALANCE_EXEC                     \
                                 | 1*SD_BALANCE_FORK                     \
-                                | 0*SD_WAKE_IDLE                        \
+                                | 0*SD_BALANCE_WAKE                     \
                                 | 1*SD_WAKE_AFFINE                      \
-                                | 1*SD_WAKE_BALANCE                     \
                                 | 0*SD_SHARE_CPUPOWER                   \
                                 | 0*SD_POWERSAVINGS_BALANCE             \
                                 | 0*SD_SHARE_PKG_RESOURCES              \
                                 | 1*SD_SERIALIZE                        \
-                                | 1*SD_WAKE_IDLE_FAR                    \
                                 | 0*SD_PREFER_SIBLING                   \
                                 ,                                       \
         .last_balance           = jiffies,                              \
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 38ae163cc91b..c0427295e8f5 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -48,7 +48,8 @@ static __always_inline cycles_t vget_cycles(void)
 extern void tsc_init(void);
 extern void mark_tsc_unstable(char *reason);
 extern int unsynchronized_tsc(void);
-int check_tsc_unstable(void);
+extern int check_tsc_unstable(void);
+extern unsigned long native_calibrate_tsc(void);
 
 /*
  * Boot-time check whether the TSCs are synchronized across
diff --git a/arch/x86/include/asm/uaccess_32.h b/arch/x86/include/asm/uaccess_32.h
index 5e06259e90e5..632fb44b4cb5 100644
--- a/arch/x86/include/asm/uaccess_32.h
+++ b/arch/x86/include/asm/uaccess_32.h
@@ -33,7 +33,7 @@ unsigned long __must_check __copy_from_user_ll_nocache_nozero
  * Copy data from kernel space to user space.  Caller must check
  * the specified block with access_ok() before calling this function.
  * The caller should also make sure he pins the user space address
- * so that the we don't result in page fault and sleep.
+ * so that we don't result in page fault and sleep.
  *
  * Here we special-case 1, 2 and 4-byte copy_*_user invocations.  On a fault
  * we return the initial request size (1, 2 or 4), as copy_*_user should do.
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
index 8deaada61bc8..6fb3c209a7e3 100644
--- a/arch/x86/include/asm/unistd_32.h
+++ b/arch/x86/include/asm/unistd_32.h
@@ -341,7 +341,7 @@
 #define __NR_preadv             333
 #define __NR_pwritev            334
 #define __NR_rt_tgsigqueueinfo  335
-#define __NR_perf_counter_open  336
+#define __NR_perf_event_open    336
 
 #ifdef __KERNEL__
 
diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h
index b9f3c60de5f7..8d3ad0adbc68 100644
--- a/arch/x86/include/asm/unistd_64.h
+++ b/arch/x86/include/asm/unistd_64.h
@@ -659,8 +659,8 @@ __SYSCALL(__NR_preadv, sys_preadv)
 __SYSCALL(__NR_pwritev, sys_pwritev)
 #define __NR_rt_tgsigqueueinfo                  297
 __SYSCALL(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinfo)
-#define __NR_perf_counter_open                  298
-__SYSCALL(__NR_perf_counter_open, sys_perf_counter_open)
+#define __NR_perf_event_open                    298
+__SYSCALL(__NR_perf_event_open, sys_perf_event_open)
 
 #ifndef __NO_STUBS
 #define __ARCH_WANT_OLD_READDIR
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 77a68505419a..04eb6c958b9d 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -15,6 +15,7 @@
 #include <linux/numa.h>
 #include <linux/percpu.h>
 #include <linux/timer.h>
+#include <linux/io.h>
 #include <asm/types.h>
 #include <asm/percpu.h>
 #include <asm/uv/uv_mmrs.h>
@@ -258,13 +259,13 @@ static inline unsigned long *uv_global_mmr32_address(int pnode,
 static inline void uv_write_global_mmr32(int pnode, unsigned long offset,
                                  unsigned long val)
 {
-        *uv_global_mmr32_address(pnode, offset) = val;
+        writeq(val, uv_global_mmr32_address(pnode, offset));
 }
 
 static inline unsigned long uv_read_global_mmr32(int pnode,
                                                  unsigned long offset)
 {
-        return *uv_global_mmr32_address(pnode, offset);
+        return readq(uv_global_mmr32_address(pnode, offset));
 }
 
 /*
@@ -281,13 +282,13 @@ static inline unsigned long *uv_global_mmr64_address(int pnode,
 static inline void uv_write_global_mmr64(int pnode, unsigned long offset,
                                 unsigned long val)
 {
-        *uv_global_mmr64_address(pnode, offset) = val;
+        writeq(val, uv_global_mmr64_address(pnode, offset));
 }
 
 static inline unsigned long uv_read_global_mmr64(int pnode,
                                                  unsigned long offset)
 {
-        return *uv_global_mmr64_address(pnode, offset);
+        return readq(uv_global_mmr64_address(pnode, offset));
 }
 
 /*
@@ -301,22 +302,22 @@ static inline unsigned long *uv_local_mmr_address(unsigned long offset)
 
 static inline unsigned long uv_read_local_mmr(unsigned long offset)
 {
-        return *uv_local_mmr_address(offset);
+        return readq(uv_local_mmr_address(offset));
 }
 
 static inline void uv_write_local_mmr(unsigned long offset, unsigned long val)
 {
-        *uv_local_mmr_address(offset) = val;
+        writeq(val, uv_local_mmr_address(offset));
 }
 
 static inline unsigned char uv_read_local_mmr8(unsigned long offset)
 {
-        return *((unsigned char *)uv_local_mmr_address(offset));
+        return readb(uv_local_mmr_address(offset));
 }
 
 static inline void uv_write_local_mmr8(unsigned long offset, unsigned char val)
 {
-        *((unsigned char *)uv_local_mmr_address(offset)) = val;
+        writeb(val, uv_local_mmr_address(offset));
 }
 
 /*
@@ -422,7 +423,7 @@ static inline void uv_hub_send_ipi(int pnode, int apicid, int vector)
         unsigned long val;
 
         val = (1UL << UVH_IPI_INT_SEND_SHFT) |
-                        ((apicid & 0x3f) << UVH_IPI_INT_APIC_ID_SHFT) |
+                        ((apicid) << UVH_IPI_INT_APIC_ID_SHFT) |
                         (vector << UVH_IPI_INT_VECTOR_SHFT);
         uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
 }
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h
index dc27a69e5d2a..3d61e204826f 100644
--- a/arch/x86/include/asm/vgtod.h
+++ b/arch/x86/include/asm/vgtod.h
@@ -21,6 +21,7 @@ struct vsyscall_gtod_data {
                 u32     shift;
         } clock;
         struct timespec wall_to_monotonic;
+        struct timespec wall_time_coarse;
 };
 extern struct vsyscall_gtod_data __vsyscall_gtod_data
 __section_vsyscall_gtod_data;
diff --git a/arch/x86/include/asm/vmware.h b/arch/x86/include/asm/vmware.h
index c11b7e100d83..e49ed6d2fd4e 100644
--- a/arch/x86/include/asm/vmware.h
+++ b/arch/x86/include/asm/vmware.h
@@ -20,7 +20,7 @@
 #ifndef ASM_X86__VMWARE_H
 #define ASM_X86__VMWARE_H
 
-extern unsigned long vmware_get_tsc_khz(void);
+extern void vmware_platform_setup(void);
 extern int vmware_platform(void);
 extern void vmware_set_feature_bits(struct cpuinfo_x86 *c);
 
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
new file mode 100644
index 000000000000..2c756fd4ab0e
--- /dev/null
+++ b/arch/x86/include/asm/x86_init.h
@@ -0,0 +1,133 @@
+#ifndef _ASM_X86_PLATFORM_H
+#define _ASM_X86_PLATFORM_H
+
+#include <asm/pgtable_types.h>
+#include <asm/bootparam.h>
+
+struct mpc_bus;
+struct mpc_cpu;
+struct mpc_table;
+
+/**
+ * struct x86_init_mpparse - platform specific mpparse ops
+ * @mpc_record:                 platform specific mpc record accounting
+ * @setup_ioapic_ids:           platform specific ioapic id override
+ * @mpc_apic_id:                platform specific mpc apic id assignment
+ * @smp_read_mpc_oem:           platform specific oem mpc table setup
+ * @mpc_oem_pci_bus:            platform specific pci bus setup (default NULL)
+ * @mpc_oem_bus_info:           platform specific mpc bus info
+ * @find_smp_config:            find the smp configuration
+ * @get_smp_config:             get the smp configuration
+ */
+struct x86_init_mpparse {
+        void (*mpc_record)(unsigned int mode);
+        void (*setup_ioapic_ids)(void);
+        int (*mpc_apic_id)(struct mpc_cpu *m);
+        void (*smp_read_mpc_oem)(struct mpc_table *mpc);
+        void (*mpc_oem_pci_bus)(struct mpc_bus *m);
+        void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
+        void (*find_smp_config)(unsigned int reserve);
+        void (*get_smp_config)(unsigned int early);
+};
+
+/**
+ * struct x86_init_resources - platform specific resource related ops
+ * @probe_roms:                 probe BIOS roms
+ * @reserve_resources:          reserve the standard resources for the
+ *                              platform
+ * @memory_setup:               platform specific memory setup
+ *
+ */
+struct x86_init_resources {
+        void (*probe_roms)(void);
+        void (*reserve_resources)(void);
+        char *(*memory_setup)(void);
+};
+
+/**
+ * struct x86_init_irqs - platform specific interrupt setup
+ * @pre_vector_init:            init code to run before interrupt vectors
+ *                              are set up.
+ * @intr_init:                  interrupt init code
+ * @trap_init:                  platform specific trap setup
+ */
+struct x86_init_irqs {
+        void (*pre_vector_init)(void);
+        void (*intr_init)(void);
+        void (*trap_init)(void);
+};
+
+/**
+ * struct x86_init_oem - oem platform specific customizing functions
+ * @arch_setup:                 platform specific architecure setup
+ * @banner:                     print a platform specific banner
+ */
+struct x86_init_oem {
+        void (*arch_setup)(void);
+        void (*banner)(void);
+};
+
+/**
+ * struct x86_init_paging - platform specific paging functions
+ * @pagetable_setup_start:      platform specific pre paging_init() call
+ * @pagetable_setup_done:       platform specific post paging_init() call
+ */
+struct x86_init_paging {
+        void (*pagetable_setup_start)(pgd_t *base);
+        void (*pagetable_setup_done)(pgd_t *base);
+};
+
+/**
+ * struct x86_init_timers - platform specific timer setup
+ * @setup_perpcu_clockev:       set up the per cpu clock event device for the
+ *                              boot cpu
+ * @tsc_pre_init:               platform function called before TSC init
+ * @timer_init:                 initialize the platform timer (default PIT/HPET)
+ */
+struct x86_init_timers {
+        void (*setup_percpu_clockev)(void);
+        void (*tsc_pre_init)(void);
+        void (*timer_init)(void);
+};
+
+/**
+ * struct x86_init_ops - functions for platform specific setup
+ *
+ */
+struct x86_init_ops {
+        struct x86_init_resources       resources;
+        struct x86_init_mpparse         mpparse;
+        struct x86_init_irqs            irqs;
+        struct x86_init_oem             oem;
+        struct x86_init_paging          paging;
+        struct x86_init_timers          timers;
+};
+
+/**
+ * struct x86_cpuinit_ops - platform specific cpu hotplug setups
+ * @setup_percpu_clockev:       set up the per cpu clock event device
+ */
+struct x86_cpuinit_ops {
+        void (*setup_percpu_clockev)(void);
+};
+
+/**
+ * struct x86_platform_ops - platform specific runtime functions
+ * @calibrate_tsc:              calibrate TSC
+ * @get_wallclock:              get time from HW clock like RTC etc.
+ * @set_wallclock:              set time back to HW clock
+ */
+struct x86_platform_ops {
+        unsigned long (*calibrate_tsc)(void);
+        unsigned long (*get_wallclock)(void);
+        int (*set_wallclock)(unsigned long nowtime);
+};
+
+extern struct x86_init_ops x86_init;
+extern struct x86_cpuinit_ops x86_cpuinit;
+extern struct x86_platform_ops x86_platform;
+
+extern void x86_init_noop(void);
+extern void x86_init_uint_noop(unsigned int unused);
+
+#endif
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 832cb838cb48..d8e5d0cdd678 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -31,8 +31,8 @@ GCOV_PROFILE_paravirt.o		:= n
 
 obj-y                   := process_$(BITS).o signal.o entry_$(BITS).o
 obj-y                   += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
-obj-y                   += time_$(BITS).o ioport.o ldt.o dumpstack.o
-obj-y                   += setup.o i8259.o irqinit.o
+obj-y                   += time.o ioport.o ldt.o dumpstack.o
+obj-y                   += setup.o x86_init.o i8259.o irqinit.o
 obj-$(CONFIG_X86_VISWS) += visws_quirks.o
 obj-$(CONFIG_X86_32)    += probe_roms_32.o
 obj-$(CONFIG_X86_32)    += sys_i386_32.o i386_ksyms_32.o
@@ -56,6 +56,7 @@ obj-$(CONFIG_INTEL_TXT)		+= tboot.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-y                           += cpu/
 obj-y                           += acpi/
+obj-$(CONFIG_SFI)               += sfi.o
 obj-y                           += reboot.o
 obj-$(CONFIG_MCA)               += mca_32.o
 obj-$(CONFIG_X86_MSR)           += msr.o
@@ -105,6 +106,7 @@ obj-$(CONFIG_SCx200)		+= scx200.o
 scx200-y                        += scx200_32.o
 
 obj-$(CONFIG_OLPC)              += olpc.o
+obj-$(CONFIG_X86_MRST)          += mrst.o
 
 microcode-y                             := microcode_core.o
 microcode-$(CONFIG_MICROCODE_INTEL)     += microcode_intel.o
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 159740decc41..894aa97f0717 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -14,7 +14,7 @@
  *      Mikael Pettersson       :       PM converted to driver model.
  */
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/kernel_stat.h>
 #include <linux/mc146818rtc.h>
 #include <linux/acpi_pmtmr.h>
@@ -35,7 +35,8 @@
 #include <linux/smp.h>
 #include <linux/mm.h>
 
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
+#include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/atomic.h>
 #include <asm/mpspec.h>
@@ -61,7 +62,7 @@ unsigned int boot_cpu_physical_apicid = -1U;
 /*
  * The highest APIC ID seen during enumeration.
  *
- * This determines the messaging protocol we can use: if all APIC IDs
+ * On AMD, this determines the messaging protocol we can use: if all APIC IDs
  * are in the 0 ... 7 range, then we can use logical addressing which
  * has some performance advantages (better broadcasting).
  *
@@ -978,7 +979,7 @@ void lapic_shutdown(void)
 {
         unsigned long flags;
 
-        if (!cpu_has_apic)
+        if (!cpu_has_apic && !apic_from_smp_config())
                 return;
 
         local_irq_save(flags);
@@ -1188,7 +1189,7 @@ void __cpuinit setup_local_APIC(void)
                 apic_write(APIC_ESR, 0);
         }
 #endif
-        perf_counters_lapic_init();
+        perf_events_lapic_init();
 
         preempt_disable();
 
@@ -1196,8 +1197,7 @@ void __cpuinit setup_local_APIC(void)
          * Double-check whether this APIC is really registered.
          * This is meaningless in clustered apic mode, so we skip it.
          */
-        if (!apic->apic_id_registered())
-                BUG();
+        BUG_ON(!apic->apic_id_registered());
 
         /*
          * Intel recommends to set DFR, LDR and TPR before enabling
@@ -1709,7 +1709,7 @@ int __init APIC_init_uniprocessor(void)
         localise_nmi_watchdog();
 #endif
 
-        setup_boot_clock();
+        x86_init.timers.setup_percpu_clockev();
 #ifdef CONFIG_X86_64
         check_nmi_watchdog();
 #endif
@@ -1916,24 +1916,14 @@ void __cpuinit generic_processor_info(int apicid, int version)
                 max_physical_apicid = apicid;
 
 #ifdef CONFIG_X86_32
-        /*
-         * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y
-         * but we need to work other dependencies like SMP_SUSPEND etc
-         * before this can be done without some confusion.
-         * if (CPU_HOTPLUG_ENABLED || num_processors > 8)
-         *       - Ashok Raj <ashok.raj@intel.com>
-         */
-        if (max_physical_apicid >= 8) {
-                switch (boot_cpu_data.x86_vendor) {
-                case X86_VENDOR_INTEL:
-                        if (!APIC_XAPIC(version)) {
-                                def_to_bigsmp = 0;
-                                break;
-                        }
-                        /* If P4 and above fall through */
-                case X86_VENDOR_AMD:
+        switch (boot_cpu_data.x86_vendor) {
+        case X86_VENDOR_INTEL:
+                if (num_processors > 8)
+                        def_to_bigsmp = 1;
+                break;
+        case X86_VENDOR_AMD:
+                if (max_physical_apicid >= 8)
                         def_to_bigsmp = 1;
-                }
         }
 #endif
 
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c
index 676cdac385c0..77a06413b6b2 100644
--- a/arch/x86/kernel/apic/bigsmp_32.c
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -112,7 +112,7 @@ static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
         return physids_promote(0xFFL);
 }
 
-static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
+static int bigsmp_check_phys_apicid_present(int phys_apicid)
 {
         return 1;
 }
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 3c8f9e75d038..dc69f28489f5 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -96,6 +96,11 @@ struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
 /* # of MP IRQ source entries */
 int mp_irq_entries;
 
+/* Number of legacy interrupts */
+static int nr_legacy_irqs __read_mostly = NR_IRQS_LEGACY;
+/* GSI interrupts */
+static int nr_irqs_gsi = NR_IRQS_LEGACY;
+
 #if defined (CONFIG_MCA) || defined (CONFIG_EISA)
 int mp_bus_id_to_type[MAX_MP_BUSSES];
 #endif
@@ -173,6 +178,12 @@ static struct irq_cfg irq_cfgx[NR_IRQS] = {
         [15] = { .vector = IRQ15_VECTOR, },
 };
 
+void __init io_apic_disable_legacy(void)
+{
+        nr_legacy_irqs = 0;
+        nr_irqs_gsi = 0;
+}
+
 int __init arch_early_irq_init(void)
 {
         struct irq_cfg *cfg;
@@ -190,7 +201,7 @@ int __init arch_early_irq_init(void)
                 desc->chip_data = &cfg[i];
                 zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node);
                 zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node);
-                if (i < NR_IRQS_LEGACY)
+                if (i < nr_legacy_irqs)
                         cpumask_setall(cfg[i].domain);
         }
 
@@ -216,17 +227,14 @@ static struct irq_cfg *get_one_free_irq_cfg(int node)
 
         cfg = kzalloc_node(sizeof(*cfg), GFP_ATOMIC, node);
         if (cfg) {
-                if (!alloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) {
+                if (!zalloc_cpumask_var_node(&cfg->domain, GFP_ATOMIC, node)) {
                         kfree(cfg);
                         cfg = NULL;
-                } else if (!alloc_cpumask_var_node(&cfg->old_domain,
+                } else if (!zalloc_cpumask_var_node(&cfg->old_domain,
                                                           GFP_ATOMIC, node)) {
                         free_cpumask_var(cfg->domain);
                         kfree(cfg);
                         cfg = NULL;
-                } else {
-                        cpumask_clear(cfg->domain);
-                        cpumask_clear(cfg->old_domain);
                 }
         }
 
@@ -867,7 +875,7 @@ static int __init find_isa_irq_apic(int irq, int type)
  */
 static int EISA_ELCR(unsigned int irq)
 {
-        if (irq < NR_IRQS_LEGACY) {
+        if (irq < nr_legacy_irqs) {
                 unsigned int port = 0x4d0 + (irq >> 3);
                 return (inb(port) >> (irq & 7)) & 1;
         }
@@ -1464,7 +1472,7 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
         }
 
         ioapic_register_intr(irq, desc, trigger);
-        if (irq < NR_IRQS_LEGACY)
+        if (irq < nr_legacy_irqs)
                 disable_8259A_irq(irq);
 
         ioapic_write_entry(apic_id, pin, entry);
@@ -1831,7 +1839,7 @@ __apicdebuginit(void) print_PIC(void)
         unsigned int v;
         unsigned long flags;
 
-        if (apic_verbosity == APIC_QUIET)
+        if (apic_verbosity == APIC_QUIET || !nr_legacy_irqs)
                 return;
 
         printk(KERN_DEBUG "\nprinting PIC contents\n");
@@ -1863,7 +1871,7 @@ __apicdebuginit(int) print_all_ICs(void)
         print_PIC();
 
         /* don't print out if apic is not there */
-        if (!cpu_has_apic || disable_apic)
+        if (!cpu_has_apic && !apic_from_smp_config())
                 return 0;
 
         print_all_local_APICs();
@@ -1894,6 +1902,10 @@ void __init enable_IO_APIC(void)
                 spin_unlock_irqrestore(&ioapic_lock, flags);
                 nr_ioapic_registers[apic] = reg_01.bits.entries+1;
         }
+
+        if (!nr_legacy_irqs)
+                return;
+
         for(apic = 0; apic < nr_ioapics; apic++) {
                 int pin;
                 /* See if any of the pins is in ExtINT mode */
@@ -1948,6 +1960,9 @@ void disable_IO_APIC(void)
          */
         clear_IO_APIC();
 
+        if (!nr_legacy_irqs)
+                return;
+
         /*
          * If the i8259 is routed through an IOAPIC
          * Put that IOAPIC in virtual wire mode
@@ -1981,7 +1996,7 @@ void disable_IO_APIC(void)
         /*
          * Use virtual wire A mode when interrupt remapping is enabled.
          */
-        if (cpu_has_apic)
+        if (cpu_has_apic || apic_from_smp_config())
                 disconnect_bsp_APIC(!intr_remapping_enabled &&
                                 ioapic_i8259.pin != -1);
 }
@@ -1994,7 +2009,7 @@ void disable_IO_APIC(void)
  * by Matt Domsch <Matt_Domsch@dell.com>  Tue Dec 21 12:25:05 CST 1999
  */
 
-static void __init setup_ioapic_ids_from_mpc(void)
+void __init setup_ioapic_ids_from_mpc(void)
 {
         union IO_APIC_reg_00 reg_00;
         physid_mask_t phys_id_present_map;
@@ -2003,9 +2018,8 @@ static void __init setup_ioapic_ids_from_mpc(void)
         unsigned char old_id;
         unsigned long flags;
 
-        if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids())
+        if (acpi_ioapic)
                 return;
-
         /*
          * Don't check I/O APIC IDs for xAPIC systems.  They have
          * no meaning without the serial APIC bus.
@@ -2179,7 +2193,7 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
         struct irq_cfg *cfg;
 
         spin_lock_irqsave(&ioapic_lock, flags);
-        if (irq < NR_IRQS_LEGACY) {
+        if (irq < nr_legacy_irqs) {
                 disable_8259A_irq(irq);
                 if (i8259A_irq_pending(irq))
                         was_pending = 1;
@@ -2657,7 +2671,7 @@ static inline void init_IO_APIC_traps(void)
                          * so default to an old-fashioned 8259
                          * interrupt if we can..
                          */
-                        if (irq < NR_IRQS_LEGACY)
+                        if (irq < nr_legacy_irqs)
                                 make_8259A_irq(irq);
                         else
                                 /* Strange. Oh, well.. */
@@ -2993,7 +3007,7 @@ out:
  * the I/O APIC in all cases now.  No actual device should request
  * it anyway.  --macro
  */
-#define PIC_IRQS        (1 << PIC_CASCADE_IR)
+#define PIC_IRQS        (1UL << PIC_CASCADE_IR)
 
 void __init setup_IO_APIC(void)
 {
@@ -3001,21 +3015,19 @@ void __init setup_IO_APIC(void)
         /*
          * calling enable_IO_APIC() is moved to setup_local_APIC for BP
          */
-
-        io_apic_irqs = ~PIC_IRQS;
+        io_apic_irqs = nr_legacy_irqs ? ~PIC_IRQS : ~0UL;
 
         apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n");
         /*
          * Set up IO-APIC IRQ routing.
          */
-#ifdef CONFIG_X86_32
-        if (!acpi_ioapic)
-                setup_ioapic_ids_from_mpc();
-#endif
+        x86_init.mpparse.setup_ioapic_ids();
+
         sync_Arb_IDs();
         setup_IO_APIC_irqs();
         init_IO_APIC_traps();
-        check_timer();
+        if (nr_legacy_irqs)
+                check_timer();
 }
 
 /*
@@ -3116,7 +3128,6 @@ static int __init ioapic_init_sysfs(void)
 
 device_initcall(ioapic_init_sysfs);
 
-static int nr_irqs_gsi = NR_IRQS_LEGACY;
 /*
  * Dynamic irq allocate and deallocation
  */
@@ -3856,7 +3867,7 @@ static int __io_apic_set_pci_routing(struct device *dev, int irq,
         /*
          * IRQs < 16 are already in the irq_2_pin[] map
          */
-        if (irq >= NR_IRQS_LEGACY) {
+        if (irq >= nr_legacy_irqs) {
                 cfg = desc->chip_data;
                 if (add_pin_to_irq_node_nopanic(cfg, node, ioapic, pin)) {
                         printk(KERN_INFO "can not add pin %d for irq %d\n",
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c
index db7220220d09..7ff61d6a188a 100644
--- a/arch/x86/kernel/apic/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -66,7 +66,7 @@ static inline unsigned int get_nmi_count(int cpu)
 
 static inline int mce_in_progress(void)
 {
-#if defined(CONFIG_X86_NEW_MCE)
+#if defined(CONFIG_X86_MCE)
         return atomic_read(&mce_entry) > 0;
 #endif
         return 0;
@@ -508,14 +508,14 @@ static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
 /*
  * proc handler for /proc/sys/kernel/nmi
  */
-int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
+int proc_nmi_enabled(struct ctl_table *table, int write,
                         void __user *buffer, size_t *length, loff_t *ppos)
 {
         int old_state;
 
         nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
         old_state = nmi_watchdog_enabled;
-        proc_dointvec(table, write, file, buffer, length, ppos);
+        proc_dointvec(table, write, buffer, length, ppos);
         if (!!old_state == !!nmi_watchdog_enabled)
                 return 0;
 
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c
index ca96e68f0d23..efa00e2b8505 100644
--- a/arch/x86/kernel/apic/numaq_32.c
+++ b/arch/x86/kernel/apic/numaq_32.c
@@ -66,7 +66,6 @@ struct mpc_trans {
         unsigned short                  trans_reserved;
 };
 
-/* x86_quirks member */
 static int                              mpc_record;
 
 static struct mpc_trans                 *translation_table[MAX_MPC_ENTRY];
@@ -130,10 +129,9 @@ void __cpuinit numaq_tsc_disable(void)
         }
 }
 
-static int __init numaq_pre_time_init(void)
+static void __init numaq_tsc_init(void)
 {
         numaq_tsc_disable();
-        return 0;
 }
 
 static inline int generate_logical_apicid(int quad, int phys_apicid)
@@ -177,6 +175,19 @@ static void mpc_oem_pci_bus(struct mpc_bus *m)
         quad_local_to_mp_bus_id[quad][local] = m->busid;
 }
 
+/*
+ * Called from mpparse code.
+ * mode = 0: prescan
+ * mode = 1: one mpc entry scanned
+ */
+static void numaq_mpc_record(unsigned int mode)
+{
+        if (!mode)
+                mpc_record = 0;
+        else
+                mpc_record++;
+}
+
 static void __init MP_translation_info(struct mpc_trans *m)
 {
         printk(KERN_INFO
@@ -206,9 +217,9 @@ static int __init mpf_checksum(unsigned char *mp, int len)
 /*
  * Read/parse the MPC oem tables
  */
-static void __init
- smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize)
+static void __init smp_read_mpc_oem(struct mpc_table *mpc)
 {
+        struct mpc_oemtable *oemtable = (void *)(long)mpc->oemptr;
         int count = sizeof(*oemtable);  /* the header size */
         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
 
@@ -250,29 +261,6 @@ static void __init
         }
 }
 
-static int __init numaq_setup_ioapic_ids(void)
-{
-        /* so can skip it */
-        return 1;
-}
-
-static struct x86_quirks numaq_x86_quirks __initdata = {
-        .arch_pre_time_init             = numaq_pre_time_init,
-        .arch_time_init                 = NULL,
-        .arch_pre_intr_init             = NULL,
-        .arch_memory_setup              = NULL,
-        .arch_intr_init                 = NULL,
-        .arch_trap_init                 = NULL,
-        .mach_get_smp_config            = NULL,
-        .mach_find_smp_config           = NULL,
-        .mpc_record                     = &mpc_record,
-        .mpc_apic_id                    = mpc_apic_id,
-        .mpc_oem_bus_info               = mpc_oem_bus_info,
-        .mpc_oem_pci_bus                = mpc_oem_pci_bus,
-        .smp_read_mpc_oem               = smp_read_mpc_oem,
-        .setup_ioapic_ids               = numaq_setup_ioapic_ids,
-};
-
 static __init void early_check_numaq(void)
 {
         /*
@@ -286,8 +274,15 @@ static __init void early_check_numaq(void)
         if (smp_found_config)
                 early_get_smp_config();
 
-        if (found_numaq)
-                x86_quirks = &numaq_x86_quirks;
+        if (found_numaq) {
+                x86_init.mpparse.mpc_record = numaq_mpc_record;
+                x86_init.mpparse.setup_ioapic_ids = x86_init_noop;
+                x86_init.mpparse.mpc_apic_id = mpc_apic_id;
+                x86_init.mpparse.smp_read_mpc_oem = smp_read_mpc_oem;
+                x86_init.mpparse.mpc_oem_pci_bus = mpc_oem_pci_bus;
+                x86_init.mpparse.mpc_oem_bus_info = mpc_oem_bus_info;
+                x86_init.timers.tsc_pre_init = numaq_tsc_init;
+        }
 }
 
 int __init get_memcfg_numaq(void)
@@ -418,7 +413,7 @@ static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 void *xquad_portio;
 
-static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
+static inline int numaq_check_phys_apicid_present(int phys_apicid)
 {
         return 1;
 }
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c
index 65edc180fc82..c4cbd3080c1c 100644
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -64,16 +64,23 @@ void __init default_setup_apic_routing(void)
                         apic = &apic_x2apic_phys;
                 else
                         apic = &apic_x2apic_cluster;
-                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
         }
 #endif
 
         if (apic == &apic_flat) {
-                if (max_physical_apicid >= 8)
-                        apic = &apic_physflat;
-                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
+                switch (boot_cpu_data.x86_vendor) {
+                case X86_VENDOR_INTEL:
+                        if (num_processors > 8)
+                                apic = &apic_physflat;
+                        break;
+                case X86_VENDOR_AMD:
+                        if (max_physical_apicid >= 8)
+                                apic = &apic_physflat;
+                }
         }
 
+        printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
+
         if (is_vsmp_box()) {
                 /* need to update phys_pkg_id */
                 apic->phys_pkg_id = apicid_phys_pkg_id;
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c
index eafdfbd1ea95..645ecc4ff0be 100644
--- a/arch/x86/kernel/apic/summit_32.c
+++ b/arch/x86/kernel/apic/summit_32.c
@@ -272,7 +272,7 @@ static physid_mask_t summit_apicid_to_cpu_present(int apicid)
         return physid_mask_of_physid(0);
 }
 
-static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
+static int summit_check_phys_apicid_present(int physical_apicid)
 {
         return 1;
 }
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 601159374e87..f5f5886a6b53 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -389,6 +389,16 @@ static __init void map_gru_high(int max_pnode)
                 map_high("GRU", gru.s.base, shift, max_pnode, map_wb);
 }
 
+static __init void map_mmr_high(int max_pnode)
+{
+        union uvh_rh_gam_mmr_overlay_config_mmr_u mmr;
+        int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT;
+
+        mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR);
+        if (mmr.s.enable)
+                map_high("MMR", mmr.s.base, shift, max_pnode, map_uc);
+}
+
 static __init void map_mmioh_high(int max_pnode)
 {
         union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh;
@@ -643,6 +653,7 @@ void __init uv_system_init(void)
         }
 
         map_gru_high(max_pnode);
+        map_mmr_high(max_pnode);
         map_mmioh_high(max_pnode);
 
         uv_cpu_init();
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index c1f253dac155..68537e957a9b 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -13,7 +13,7 @@ CFLAGS_common.o		:= $(nostackp)
 
 obj-y                   := intel_cacheinfo.o addon_cpuid_features.o
 obj-y                   += proc.o capflags.o powerflags.o common.o
-obj-y                   += vmware.o hypervisor.o
+obj-y                   += vmware.o hypervisor.o sched.o
 
 obj-$(CONFIG_X86_32)    += bugs.o cmpxchg.o
 obj-$(CONFIG_X86_64)    += bugs_64.o
@@ -27,7 +27,7 @@ obj-$(CONFIG_CPU_SUP_CENTAUR)		+= centaur.o
 obj-$(CONFIG_CPU_SUP_TRANSMETA_32)      += transmeta.o
 obj-$(CONFIG_CPU_SUP_UMC_32)            += umc.o
 
-obj-$(CONFIG_PERF_COUNTERS)             += perf_counter.o
+obj-$(CONFIG_PERF_EVENTS)               += perf_event.o
 
 obj-$(CONFIG_X86_MCE)                   += mcheck/
 obj-$(CONFIG_MTRR)                      += mtrr/
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 22a47c82f3c0..c910a716a71c 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -184,7 +184,7 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
          * approved Athlon
          */
         WARN_ONCE(1, "WARNING: This combination of AMD"
-                "processors is not suitable for SMP.\n");
+                " processors is not suitable for SMP.\n");
         if (!test_taint(TAINT_UNSAFE_SMP))
                 add_taint(TAINT_UNSAFE_SMP);
 
@@ -333,6 +333,16 @@ static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
 #endif
 }
 
+int amd_get_nb_id(int cpu)
+{
+        int id = 0;
+#ifdef CONFIG_SMP
+        id = per_cpu(cpu_llc_id, cpu);
+#endif
+        return id;
+}
+EXPORT_SYMBOL_GPL(amd_get_nb_id);
+
 static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
 {
 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_64)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2055fc2b2e6b..cc25c2b4a567 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -13,7 +13,7 @@
 #include <linux/io.h>
 
 #include <asm/stackprotector.h>
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
 #include <asm/mmu_context.h>
 #include <asm/hypervisor.h>
 #include <asm/processor.h>
@@ -34,7 +34,6 @@
 #include <asm/mce.h>
 #include <asm/msr.h>
 #include <asm/pat.h>
-#include <linux/smp.h>
 
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/uv/uv.h>
@@ -870,7 +869,7 @@ void __init identify_boot_cpu(void)
 #else
         vgetcpu_set_mode();
 #endif
-        init_hw_perf_counters();
+        init_hw_perf_events();
 }
 
 void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index ae9b503220ca..7d5c3b0ea8da 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -33,7 +33,7 @@
 #include <linux/cpufreq.h>
 #include <linux/compiler.h>
 #include <linux/dmi.h>
-#include <trace/power.h>
+#include <trace/events/power.h>
 
 #include <linux/acpi.h>
 #include <linux/io.h>
@@ -60,7 +60,6 @@ enum {
 };
 
 #define INTEL_MSR_RANGE         (0xffff)
-#define CPUID_6_ECX_APERFMPERF_CAPABILITY       (0x1)
 
 struct acpi_cpufreq_data {
         struct acpi_processor_performance *acpi_data;
@@ -71,13 +70,7 @@ struct acpi_cpufreq_data {
 
 static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data);
 
-struct acpi_msr_data {
-        u64 saved_aperf, saved_mperf;
-};
-
-static DEFINE_PER_CPU(struct acpi_msr_data, msr_data);
-
-DEFINE_TRACE(power_mark);
+static DEFINE_PER_CPU(struct aperfmperf, old_perf);
 
 /* acpi_perf_data is a pointer to percpu data. */
 static struct acpi_processor_performance *acpi_perf_data;
@@ -244,23 +237,12 @@ static u32 get_cur_val(const struct cpumask *mask)
         return cmd.val;
 }
 
-struct perf_pair {
-        union {
-                struct {
-                        u32 lo;
-                        u32 hi;
-                } split;
-                u64 whole;
-        } aperf, mperf;
-};
-
 /* Called via smp_call_function_single(), on the target CPU */
 static void read_measured_perf_ctrs(void *_cur)
 {
-        struct perf_pair *cur = _cur;
+        struct aperfmperf *am = _cur;
 
-        rdmsr(MSR_IA32_APERF, cur->aperf.split.lo, cur->aperf.split.hi);
-        rdmsr(MSR_IA32_MPERF, cur->mperf.split.lo, cur->mperf.split.hi);
+        get_aperfmperf(am);
 }
 
 /*
@@ -279,63 +261,17 @@ static void read_measured_perf_ctrs(void *_cur)
 static unsigned int get_measured_perf(struct cpufreq_policy *policy,
                                       unsigned int cpu)
 {
-        struct perf_pair readin, cur;
-        unsigned int perf_percent;
+        struct aperfmperf perf;
+        unsigned long ratio;
         unsigned int retval;
 
-        if (smp_call_function_single(cpu, read_measured_perf_ctrs, &readin, 1))
+        if (smp_call_function_single(cpu, read_measured_perf_ctrs, &perf, 1))
                 return 0;
 
-        cur.aperf.whole = readin.aperf.whole -
-                                per_cpu(msr_data, cpu).saved_aperf;
-        cur.mperf.whole = readin.mperf.whole -
-                                per_cpu(msr_data, cpu).saved_mperf;
-        per_cpu(msr_data, cpu).saved_aperf = readin.aperf.whole;
-        per_cpu(msr_data, cpu).saved_mperf = readin.mperf.whole;
-
-#ifdef __i386__
-        /*
-         * We dont want to do 64 bit divide with 32 bit kernel
-         * Get an approximate value. Return failure in case we cannot get
-         * an approximate value.
-         */
-        if (unlikely(cur.aperf.split.hi || cur.mperf.split.hi)) {
-                int shift_count;
-                u32 h;
-
-                h = max_t(u32, cur.aperf.split.hi, cur.mperf.split.hi);
-                shift_count = fls(h);
-
-                cur.aperf.whole >>= shift_count;
-                cur.mperf.whole >>= shift_count;
-        }
-
-        if (((unsigned long)(-1) / 100) < cur.aperf.split.lo) {
-                int shift_count = 7;
-                cur.aperf.split.lo >>= shift_count;
-                cur.mperf.split.lo >>= shift_count;
-        }
-
-        if (cur.aperf.split.lo && cur.mperf.split.lo)
-                perf_percent = (cur.aperf.split.lo * 100) / cur.mperf.split.lo;
-        else
-                perf_percent = 0;
-
-#else
-        if (unlikely(((unsigned long)(-1) / 100) < cur.aperf.whole)) {
-                int shift_count = 7;
-                cur.aperf.whole >>= shift_count;
-                cur.mperf.whole >>= shift_count;
-        }
-
-        if (cur.aperf.whole && cur.mperf.whole)
-                perf_percent = (cur.aperf.whole * 100) / cur.mperf.whole;
-        else
-                perf_percent = 0;
-
-#endif
+        ratio = calc_aperfmperf_ratio(&per_cpu(old_perf, cpu), &perf);
+        per_cpu(old_perf, cpu) = perf;
 
-        retval = (policy->cpuinfo.max_freq * perf_percent) / 100;
+        retval = (policy->cpuinfo.max_freq * ratio) >> APERFMPERF_SHIFT;
 
         return retval;
 }
@@ -394,7 +330,6 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
         unsigned int next_perf_state = 0; /* Index into perf table */
         unsigned int i;
         int result = 0;
-        struct power_trace it;
 
         dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
 
@@ -426,7 +361,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
                 }
         }
 
-        trace_power_mark(&it, POWER_PSTATE, next_perf_state);
+        trace_power_frequency(POWER_PSTATE, data->freq_table[next_state].frequency);
 
         switch (data->cpu_feature) {
         case SYSTEM_INTEL_MSR_CAPABLE:
@@ -588,6 +523,21 @@ static const struct dmi_system_id sw_any_bug_dmi_table[] = {
         },
         { }
 };
+
+static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
+{
+        /* http://www.intel.com/Assets/PDF/specupdate/314554.pdf
+         * AL30: A Machine Check Exception (MCE) Occurring during an
+         * Enhanced Intel SpeedStep Technology Ratio Change May Cause
+         * Both Processor Cores to Lock Up when HT is enabled*/
+        if (c->x86_vendor == X86_VENDOR_INTEL) {
+                if ((c->x86 == 15) &&
+                    (c->x86_model == 6) &&
+                    (c->x86_mask == 8) && smt_capable())
+                        return -ENODEV;
+                }
+        return 0;
+}
 #endif
 
 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
@@ -602,6 +552,12 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         dprintk("acpi_cpufreq_cpu_init\n");
 
+#ifdef CONFIG_SMP
+        result = acpi_cpufreq_blacklist(c);
+        if (result)
+                return result;
+#endif
+
         data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
         if (!data)
                 return -ENOMEM;
@@ -731,12 +687,8 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
         acpi_processor_notify_smm(THIS_MODULE);
 
         /* Check for APERF/MPERF support in hardware */
-        if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
-                unsigned int ecx;
-                ecx = cpuid_ecx(6);
-                if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
-                        acpi_cpufreq_driver.getavg = get_measured_perf;
-        }
+        if (cpu_has(c, X86_FEATURE_APERFMPERF))
+                acpi_cpufreq_driver.getavg = get_measured_perf;
 
         dprintk("CPU%u - ACPI performance management activated.\n", cpu);
         for (i = 0; i < perf->state_count; i++)
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 2a50ef891000..6394aa5c7985 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -605,9 +605,10 @@ static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
         return 0;
 }
 
-static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry)
+static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
+                unsigned int entry)
 {
-        data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
+        powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
 }
 
 static void print_basics(struct powernow_k8_data *data)
@@ -854,6 +855,10 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                 goto err_out;
         }
 
+        /* fill in data */
+        data->numps = data->acpi_data.state_count;
+        powernow_k8_acpi_pst_values(data, 0);
+
         if (cpu_family == CPU_HW_PSTATE)
                 ret_val = fill_powernow_table_pstate(data, powernow_table);
         else
@@ -866,11 +871,8 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         powernow_table[data->acpi_data.state_count].index = 0;
         data->powernow_table = powernow_table;
 
-        /* fill in data */
-        data->numps = data->acpi_data.state_count;
         if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
                 print_basics(data);
-        powernow_k8_acpi_pst_values(data, 0);
 
         /* notify BIOS that we exist */
         acpi_processor_notify_smm(THIS_MODULE);
@@ -914,13 +916,13 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data,
                                         "bad value %d.\n", i, index);
                         printk(KERN_ERR PFX "Please report to BIOS "
                                         "manufacturer\n");
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
                 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
                 if (!(hi & HW_PSTATE_VALID_MASK)) {
                         dprintk("invalid pstate %d, ignoring\n", index);
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
 
@@ -941,7 +943,6 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
                 struct cpufreq_frequency_table *powernow_table)
 {
         int i;
-        int cntlofreq = 0;
 
         for (i = 0; i < data->acpi_data.state_count; i++) {
                 u32 fid;
@@ -970,7 +971,7 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
                 /* verify frequency is OK */
                 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
                         dprintk("invalid freq %u kHz, ignoring\n", freq);
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
 
@@ -978,38 +979,17 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
                  * BIOSs are using "off" to indicate invalid */
                 if (vid == VID_OFF) {
                         dprintk("invalid vid %u, ignoring\n", vid);
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
 
-                /* verify only 1 entry from the lo frequency table */
-                if (fid < HI_FID_TABLE_BOTTOM) {
-                        if (cntlofreq) {
-                                /* if both entries are the same,
-                                 * ignore this one ... */
-                                if ((freq != powernow_table[cntlofreq].frequency) ||
-                                    (index != powernow_table[cntlofreq].index)) {
-                                        printk(KERN_ERR PFX
-                                                "Too many lo freq table "
-                                                "entries\n");
-                                        return 1;
-                                }
-
-                                dprintk("double low frequency table entry, "
-                                                "ignoring it.\n");
-                                invalidate_entry(data, i);
-                                continue;
-                        } else
-                                cntlofreq = i;
-                }
-
                 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
                         printk(KERN_INFO PFX "invalid freq entries "
                                 "%u kHz vs. %u kHz\n", freq,
                                 (unsigned int)
                                 (data->acpi_data.states[i].core_frequency
                                  * 1000));
-                        invalidate_entry(data, i);
+                        invalidate_entry(powernow_table, i);
                         continue;
                 }
         }
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 93ba8eeb100a..08be922de33a 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -34,13 +34,6 @@ detect_hypervisor_vendor(struct cpuinfo_x86 *c)
                 c->x86_hyper_vendor = X86_HYPER_VENDOR_NONE;
 }
 
-unsigned long get_hypervisor_tsc_freq(void)
-{
-        if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE)
-                return vmware_get_tsc_khz();
-        return 0;
-}
-
 static inline void __cpuinit
 hypervisor_set_feature_bits(struct cpuinfo_x86 *c)
 {
@@ -55,3 +48,10 @@ void __cpuinit init_hypervisor(struct cpuinfo_x86 *c)
         detect_hypervisor_vendor(c);
         hypervisor_set_feature_bits(c);
 }
+
+void __init init_hypervisor_platform(void)
+{
+        init_hypervisor(&boot_cpu_data);
+        if (boot_cpu_data.x86_hyper_vendor == X86_HYPER_VENDOR_VMWARE)
+                vmware_platform_setup();
+}
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 80a722a071b5..40e1835b35e8 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -350,6 +350,12 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
                         set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
         }
 
+        if (c->cpuid_level > 6) {
+                unsigned ecx = cpuid_ecx(6);
+                if (ecx & 0x01)
+                        set_cpu_cap(c, X86_FEATURE_APERFMPERF);
+        }
+
         if (cpu_has_xmm2)
                 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
         if (cpu_has_ds) {
diff --git a/arch/x86/kernel/cpu/mcheck/Makefile b/arch/x86/kernel/cpu/mcheck/Makefile
index 188a1ca5ad2b..4ac6d48fe11b 100644
--- a/arch/x86/kernel/cpu/mcheck/Makefile
+++ b/arch/x86/kernel/cpu/mcheck/Makefile
@@ -1,11 +1,8 @@
-obj-y                           =  mce.o
+obj-y                           =  mce.o mce-severity.o
 
-obj-$(CONFIG_X86_NEW_MCE)       += mce-severity.o
-obj-$(CONFIG_X86_OLD_MCE)       += k7.o p4.o p6.o
 obj-$(CONFIG_X86_ANCIENT_MCE)   += winchip.o p5.o
 obj-$(CONFIG_X86_MCE_INTEL)     += mce_intel.o
 obj-$(CONFIG_X86_MCE_AMD)       += mce_amd.o
-obj-$(CONFIG_X86_MCE_NONFATAL)  += non-fatal.o
 obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o
 obj-$(CONFIG_X86_MCE_INJECT)    += mce-inject.o
 
diff --git a/arch/x86/kernel/cpu/mcheck/k7.c b/arch/x86/kernel/cpu/mcheck/k7.c
deleted file mode 100644
index b945d5dbc609..000000000000
--- a/arch/x86/kernel/cpu/mcheck/k7.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Athlon specific Machine Check Exception Reporting
- * (C) Copyright 2002 Dave Jones <davej@redhat.com>
- */
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/mce.h>
-#include <asm/msr.h>
-
-/* Machine Check Handler For AMD Athlon/Duron: */
-static void k7_machine_check(struct pt_regs *regs, long error_code)
-{
-        u32 alow, ahigh, high, low;
-        u32 mcgstl, mcgsth;
-        int recover = 1;
-        int i;
-
-        rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
-        if (mcgstl & (1<<0))    /* Recoverable ? */
-                recover = 0;
-
-        printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
-                smp_processor_id(), mcgsth, mcgstl);
-
-        for (i = 1; i < nr_mce_banks; i++) {
-                rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
-                if (high & (1<<31)) {
-                        char misc[20];
-                        char addr[24];
-
-                        misc[0] = '\0';
-                        addr[0] = '\0';
-
-                        if (high & (1<<29))
-                                recover |= 1;
-                        if (high & (1<<25))
-                                recover |= 2;
-                        high &= ~(1<<31);
-
-                        if (high & (1<<27)) {
-                                rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
-                                snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
-                        }
-                        if (high & (1<<26)) {
-                                rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
-                                snprintf(addr, 24, " at %08x%08x", ahigh, alow);
-                        }
-
-                        printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
-                                smp_processor_id(), i, high, low, misc, addr);
-
-                        /* Clear it: */
-                        wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
-                        /* Serialize: */
-                        wmb();
-                        add_taint(TAINT_MACHINE_CHECK);
-                }
-        }
-
-        if (recover & 2)
-                panic("CPU context corrupt");
-        if (recover & 1)
-                panic("Unable to continue");
-
-        printk(KERN_EMERG "Attempting to continue.\n");
-
-        mcgstl &= ~(1<<2);
-        wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
-}
-
-
-/* AMD K7 machine check is Intel like: */
-void amd_mcheck_init(struct cpuinfo_x86 *c)
-{
-        u32 l, h;
-        int i;
-
-        if (!cpu_has(c, X86_FEATURE_MCE))
-                return;
-
-        machine_check_vector = k7_machine_check;
-        /* Make sure the vector pointer is visible before we enable MCEs: */
-        wmb();
-
-        printk(KERN_INFO "Intel machine check architecture supported.\n");
-
-        rdmsr(MSR_IA32_MCG_CAP, l, h);
-        if (l & (1<<8)) /* Control register present ? */
-                wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
-        nr_mce_banks = l & 0xff;
-
-        /*
-         * Clear status for MC index 0 separately, we don't touch CTL,
-         * as some K7 Athlons cause spurious MCEs when its enabled:
-         */
-        if (boot_cpu_data.x86 == 6) {
-                wrmsr(MSR_IA32_MC0_STATUS, 0x0, 0x0);
-                i = 1;
-        } else
-                i = 0;
-
-        for (; i < nr_mce_banks; i++) {
-                wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
-                wrmsr(MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
-        }
-
-        set_in_cr4(X86_CR4_MCE);
-        printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",
-                smp_processor_id());
-}
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c b/arch/x86/kernel/cpu/mcheck/mce-inject.c
index a3a235a53f09..7029f0e2acad 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-inject.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-inject.c
@@ -18,7 +18,12 @@
 #include <linux/string.h>
 #include <linux/fs.h>
 #include <linux/smp.h>
+#include <linux/notifier.h>
+#include <linux/kdebug.h>
+#include <linux/cpu.h>
+#include <linux/sched.h>
 #include <asm/mce.h>
+#include <asm/apic.h>
 
 /* Update fake mce registers on current CPU. */
 static void inject_mce(struct mce *m)
@@ -39,44 +44,141 @@ static void inject_mce(struct mce *m)
         i->finished = 1;
 }
 
-struct delayed_mce {
-        struct timer_list timer;
-        struct mce m;
-};
+static void raise_poll(struct mce *m)
+{
+        unsigned long flags;
+        mce_banks_t b;
 
-/* Inject mce on current CPU */
-static void raise_mce(unsigned long data)
+        memset(&b, 0xff, sizeof(mce_banks_t));
+        local_irq_save(flags);
+        machine_check_poll(0, &b);
+        local_irq_restore(flags);
+        m->finished = 0;
+}
+
+static void raise_exception(struct mce *m, struct pt_regs *pregs)
 {
-        struct delayed_mce *dm = (struct delayed_mce *)data;
-        struct mce *m = &dm->m;
-        int cpu = m->extcpu;
+        struct pt_regs regs;
+        unsigned long flags;
 
-        inject_mce(m);
-        if (m->status & MCI_STATUS_UC) {
-                struct pt_regs regs;
+        if (!pregs) {
                 memset(&regs, 0, sizeof(struct pt_regs));
                 regs.ip = m->ip;
                 regs.cs = m->cs;
+                pregs = &regs;
+        }
+        /* in mcheck exeception handler, irq will be disabled */
+        local_irq_save(flags);
+        do_machine_check(pregs, 0);
+        local_irq_restore(flags);
+        m->finished = 0;
+}
+
+static cpumask_t mce_inject_cpumask;
+
+static int mce_raise_notify(struct notifier_block *self,
+                            unsigned long val, void *data)
+{
+        struct die_args *args = (struct die_args *)data;
+        int cpu = smp_processor_id();
+        struct mce *m = &__get_cpu_var(injectm);
+        if (val != DIE_NMI_IPI || !cpu_isset(cpu, mce_inject_cpumask))
+                return NOTIFY_DONE;
+        cpu_clear(cpu, mce_inject_cpumask);
+        if (m->inject_flags & MCJ_EXCEPTION)
+                raise_exception(m, args->regs);
+        else if (m->status)
+                raise_poll(m);
+        return NOTIFY_STOP;
+}
+
+static struct notifier_block mce_raise_nb = {
+        .notifier_call = mce_raise_notify,
+        .priority = 1000,
+};
+
+/* Inject mce on current CPU */
+static int raise_local(struct mce *m)
+{
+        int context = MCJ_CTX(m->inject_flags);
+        int ret = 0;
+        int cpu = m->extcpu;
+
+        if (m->inject_flags & MCJ_EXCEPTION) {
                 printk(KERN_INFO "Triggering MCE exception on CPU %d\n", cpu);
-                do_machine_check(&regs, 0);
+                switch (context) {
+                case MCJ_CTX_IRQ:
+                        /*
+                         * Could do more to fake interrupts like
+                         * calling irq_enter, but the necessary
+                         * machinery isn't exported currently.
+                         */
+                        /*FALL THROUGH*/
+                case MCJ_CTX_PROCESS:
+                        raise_exception(m, NULL);
+                        break;
+                default:
+                        printk(KERN_INFO "Invalid MCE context\n");
+                        ret = -EINVAL;
+                }
                 printk(KERN_INFO "MCE exception done on CPU %d\n", cpu);
-        } else {
-                mce_banks_t b;
-                memset(&b, 0xff, sizeof(mce_banks_t));
+        } else if (m->status) {
                 printk(KERN_INFO "Starting machine check poll CPU %d\n", cpu);
-                machine_check_poll(0, &b);
+                raise_poll(m);
                 mce_notify_irq();
-                printk(KERN_INFO "Finished machine check poll on CPU %d\n",
-                       cpu);
-        }
-        kfree(dm);
+                printk(KERN_INFO "Machine check poll done on CPU %d\n", cpu);
+        } else
+                m->finished = 0;
+
+        return ret;
+}
+
+static void raise_mce(struct mce *m)
+{
+        int context = MCJ_CTX(m->inject_flags);
+
+        inject_mce(m);
+
+        if (context == MCJ_CTX_RANDOM)
+                return;
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        if (m->inject_flags & MCJ_NMI_BROADCAST) {
+                unsigned long start;
+                int cpu;
+                get_online_cpus();
+                mce_inject_cpumask = cpu_online_map;
+                cpu_clear(get_cpu(), mce_inject_cpumask);
+                for_each_online_cpu(cpu) {
+                        struct mce *mcpu = &per_cpu(injectm, cpu);
+                        if (!mcpu->finished ||
+                            MCJ_CTX(mcpu->inject_flags) != MCJ_CTX_RANDOM)
+                                cpu_clear(cpu, mce_inject_cpumask);
+                }
+                if (!cpus_empty(mce_inject_cpumask))
+                        apic->send_IPI_mask(&mce_inject_cpumask, NMI_VECTOR);
+                start = jiffies;
+                while (!cpus_empty(mce_inject_cpumask)) {
+                        if (!time_before(jiffies, start + 2*HZ)) {
+                                printk(KERN_ERR
+                                "Timeout waiting for mce inject NMI %lx\n",
+                                        *cpus_addr(mce_inject_cpumask));
+                                break;
+                        }
+                        cpu_relax();
+                }
+                raise_local(m);
+                put_cpu();
+                put_online_cpus();
+        } else
+#endif
+                raise_local(m);
 }
 
 /* Error injection interface */
 static ssize_t mce_write(struct file *filp, const char __user *ubuf,
                          size_t usize, loff_t *off)
 {
-        struct delayed_mce *dm;
         struct mce m;
 
         if (!capable(CAP_SYS_ADMIN))
@@ -96,19 +198,12 @@ static ssize_t mce_write(struct file *filp, const char __user *ubuf,
         if (m.extcpu >= num_possible_cpus() || !cpu_online(m.extcpu))
                 return -EINVAL;
 
-        dm = kmalloc(sizeof(struct delayed_mce), GFP_KERNEL);
-        if (!dm)
-                return -ENOMEM;
-
         /*
          * Need to give user space some time to set everything up,
          * so do it a jiffie or two later everywhere.
-         * Should we use a hrtimer here for better synchronization?
          */
-        memcpy(&dm->m, &m, sizeof(struct mce));
-        setup_timer(&dm->timer, raise_mce, (unsigned long)dm);
-        dm->timer.expires = jiffies + 2;
-        add_timer_on(&dm->timer, m.extcpu);
+        schedule_timeout(2);
+        raise_mce(&m);
         return usize;
 }
 
@@ -116,6 +211,7 @@ static int inject_init(void)
 {
         printk(KERN_INFO "Machine check injector initialized\n");
         mce_chrdev_ops.write = mce_write;
+        register_die_notifier(&mce_raise_nb);
         return 0;
 }
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h
index 54dcb8ff12e5..32996f9fab67 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-internal.h
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -1,3 +1,4 @@
+#include <linux/sysdev.h>
 #include <asm/mce.h>
 
 enum severity_level {
@@ -10,6 +11,20 @@ enum severity_level {
         MCE_PANIC_SEVERITY,
 };
 
+#define ATTR_LEN                16
+
+/* One object for each MCE bank, shared by all CPUs */
+struct mce_bank {
+        u64                     ctl;                    /* subevents to enable */
+        unsigned char init;                             /* initialise bank? */
+        struct sysdev_attribute attr;                   /* sysdev attribute */
+        char                    attrname[ATTR_LEN];     /* attribute name */
+};
+
 int mce_severity(struct mce *a, int tolerant, char **msg);
+struct dentry *mce_get_debugfs_dir(void);
 
 extern int mce_ser;
+
+extern struct mce_bank *mce_banks;
+
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
index ff0807f97056..8a85dd1b1aa1 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -139,6 +139,7 @@ int mce_severity(struct mce *a, int tolerant, char **msg)
         }
 }
 
+#ifdef CONFIG_DEBUG_FS
 static void *s_start(struct seq_file *f, loff_t *pos)
 {
         if (*pos >= ARRAY_SIZE(severities))
@@ -197,7 +198,7 @@ static int __init severities_debugfs_init(void)
 {
         struct dentry *dmce = NULL, *fseverities_coverage = NULL;
 
-        dmce = debugfs_create_dir("mce", NULL);
+        dmce = mce_get_debugfs_dir();
         if (dmce == NULL)
                 goto err_out;
         fseverities_coverage = debugfs_create_file("severities-coverage",
@@ -209,10 +210,7 @@ static int __init severities_debugfs_init(void)
         return 0;
 
 err_out:
-        if (fseverities_coverage)
-                debugfs_remove(fseverities_coverage);
-        if (dmce)
-                debugfs_remove(dmce);
         return -ENOMEM;
 }
 late_initcall(severities_debugfs_init);
+#endif
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index fdd51b554355..2f5aab26320e 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -34,6 +34,7 @@
 #include <linux/smp.h>
 #include <linux/fs.h>
 #include <linux/mm.h>
+#include <linux/debugfs.h>
 
 #include <asm/processor.h>
 #include <asm/hw_irq.h>
@@ -45,21 +46,8 @@
 
 #include "mce-internal.h"
 
-/* Handle unconfigured int18 (should never happen) */
-static void unexpected_machine_check(struct pt_regs *regs, long error_code)
-{
-        printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n",
-               smp_processor_id());
-}
-
-/* Call the installed machine check handler for this CPU setup. */
-void (*machine_check_vector)(struct pt_regs *, long error_code) =
-                                                unexpected_machine_check;
-
 int mce_disabled __read_mostly;
 
-#ifdef CONFIG_X86_NEW_MCE
-
 #define MISC_MCELOG_MINOR       227
 
 #define SPINUNIT 100    /* 100ns */
@@ -77,7 +65,6 @@ DEFINE_PER_CPU(unsigned, mce_exception_count);
  */
 static int                      tolerant                __read_mostly = 1;
 static int                      banks                   __read_mostly;
-static u64                      *bank                   __read_mostly;
 static int                      rip_msr                 __read_mostly;
 static int                      mce_bootlog             __read_mostly = -1;
 static int                      monarch_timeout         __read_mostly = -1;
@@ -87,13 +74,13 @@ int				mce_cmci_disabled	__read_mostly;
 int                             mce_ignore_ce           __read_mostly;
 int                             mce_ser                 __read_mostly;
 
+struct mce_bank                *mce_banks               __read_mostly;
+
 /* User mode helper program triggered by machine check event */
 static unsigned long            mce_need_notify;
 static char                     mce_helper[128];
 static char                     *mce_helper_argv[2] = { mce_helper, NULL };
 
-static unsigned long            dont_init_banks;
-
 static DECLARE_WAIT_QUEUE_HEAD(mce_wait);
 static DEFINE_PER_CPU(struct mce, mces_seen);
 static int                      cpu_missing;
@@ -104,11 +91,6 @@ DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
         [0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
 };
 
-static inline int skip_bank_init(int i)
-{
-        return i < BITS_PER_LONG && test_bit(i, &dont_init_banks);
-}
-
 static DEFINE_PER_CPU(struct work_struct, mce_work);
 
 /* Do initial initialization of a struct mce */
@@ -232,6 +214,9 @@ static void print_mce_tail(void)
 
 static atomic_t mce_paniced;
 
+static int fake_panic;
+static atomic_t mce_fake_paniced;
+
 /* Panic in progress. Enable interrupts and wait for final IPI */
 static void wait_for_panic(void)
 {
@@ -249,15 +234,21 @@ static void mce_panic(char *msg, struct mce *final, char *exp)
 {
         int i;
 
-        /*
-         * Make sure only one CPU runs in machine check panic
-         */
-        if (atomic_add_return(1, &mce_paniced) > 1)
-                wait_for_panic();
-        barrier();
+        if (!fake_panic) {
+                /*
+                 * Make sure only one CPU runs in machine check panic
+                 */
+                if (atomic_inc_return(&mce_paniced) > 1)
+                        wait_for_panic();
+                barrier();
 
-        bust_spinlocks(1);
-        console_verbose();
+                bust_spinlocks(1);
+                console_verbose();
+        } else {
+                /* Don't log too much for fake panic */
+                if (atomic_inc_return(&mce_fake_paniced) > 1)
+                        return;
+        }
         print_mce_head();
         /* First print corrected ones that are still unlogged */
         for (i = 0; i < MCE_LOG_LEN; i++) {
@@ -284,9 +275,12 @@ static void mce_panic(char *msg, struct mce *final, char *exp)
         print_mce_tail();
         if (exp)
                 printk(KERN_EMERG "Machine check: %s\n", exp);
-        if (panic_timeout == 0)
-                panic_timeout = mce_panic_timeout;
-        panic(msg);
+        if (!fake_panic) {
+                if (panic_timeout == 0)
+                        panic_timeout = mce_panic_timeout;
+                panic(msg);
+        } else
+                printk(KERN_EMERG "Fake kernel panic: %s\n", msg);
 }
 
 /* Support code for software error injection */
@@ -296,11 +290,11 @@ static int msr_to_offset(u32 msr)
         unsigned bank = __get_cpu_var(injectm.bank);
         if (msr == rip_msr)
                 return offsetof(struct mce, ip);
-        if (msr == MSR_IA32_MC0_STATUS + bank*4)
+        if (msr == MSR_IA32_MCx_STATUS(bank))
                 return offsetof(struct mce, status);
-        if (msr == MSR_IA32_MC0_ADDR + bank*4)
+        if (msr == MSR_IA32_MCx_ADDR(bank))
                 return offsetof(struct mce, addr);
-        if (msr == MSR_IA32_MC0_MISC + bank*4)
+        if (msr == MSR_IA32_MCx_MISC(bank))
                 return offsetof(struct mce, misc);
         if (msr == MSR_IA32_MCG_STATUS)
                 return offsetof(struct mce, mcgstatus);
@@ -505,7 +499,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
 
         m.mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
         for (i = 0; i < banks; i++) {
-                if (!bank[i] || !test_bit(i, *b))
+                if (!mce_banks[i].ctl || !test_bit(i, *b))
                         continue;
 
                 m.misc = 0;
@@ -514,7 +508,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
                 m.tsc = 0;
 
                 barrier();
-                m.status = mce_rdmsrl(MSR_IA32_MC0_STATUS + i*4);
+                m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
                 if (!(m.status & MCI_STATUS_VAL))
                         continue;
 
@@ -529,9 +523,9 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
                         continue;
 
                 if (m.status & MCI_STATUS_MISCV)
-                        m.misc = mce_rdmsrl(MSR_IA32_MC0_MISC + i*4);
+                        m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
                 if (m.status & MCI_STATUS_ADDRV)
-                        m.addr = mce_rdmsrl(MSR_IA32_MC0_ADDR + i*4);
+                        m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
 
                 if (!(flags & MCP_TIMESTAMP))
                         m.tsc = 0;
@@ -547,7 +541,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
                 /*
                  * Clear state for this bank.
                  */
-                mce_wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+                mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
         }
 
         /*
@@ -568,7 +562,7 @@ static int mce_no_way_out(struct mce *m, char **msg)
         int i;
 
         for (i = 0; i < banks; i++) {
-                m->status = mce_rdmsrl(MSR_IA32_MC0_STATUS + i*4);
+                m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
                 if (mce_severity(m, tolerant, msg) >= MCE_PANIC_SEVERITY)
                         return 1;
         }
@@ -628,7 +622,7 @@ out:
  * This way we prevent any potential data corruption in a unrecoverable case
  * and also makes sure always all CPU's errors are examined.
  *
- * Also this detects the case of an machine check event coming from outer
+ * Also this detects the case of a machine check event coming from outer
  * space (not detected by any CPUs) In this case some external agent wants
  * us to shut down, so panic too.
  *
@@ -681,7 +675,7 @@ static void mce_reign(void)
          * No machine check event found. Must be some external
          * source or one CPU is hung. Panic.
          */
-        if (!m && tolerant < 3)
+        if (global_worst <= MCE_KEEP_SEVERITY && tolerant < 3)
                 mce_panic("Machine check from unknown source", NULL, NULL);
 
         /*
@@ -715,7 +709,7 @@ static int mce_start(int *no_way_out)
          * global_nwo should be updated before mce_callin
          */
         smp_wmb();
-        order = atomic_add_return(1, &mce_callin);
+        order = atomic_inc_return(&mce_callin);
 
         /*
          * Wait for everyone.
@@ -852,7 +846,7 @@ static void mce_clear_state(unsigned long *toclear)
 
         for (i = 0; i < banks; i++) {
                 if (test_bit(i, toclear))
-                        mce_wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+                        mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
         }
 }
 
@@ -905,11 +899,11 @@ void do_machine_check(struct pt_regs *regs, long error_code)
         mce_setup(&m);
 
         m.mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
-        no_way_out = mce_no_way_out(&m, &msg);
-
         final = &__get_cpu_var(mces_seen);
         *final = m;
 
+        no_way_out = mce_no_way_out(&m, &msg);
+
         barrier();
 
         /*
@@ -926,14 +920,14 @@ void do_machine_check(struct pt_regs *regs, long error_code)
         order = mce_start(&no_way_out);
         for (i = 0; i < banks; i++) {
                 __clear_bit(i, toclear);
-                if (!bank[i])
+                if (!mce_banks[i].ctl)
                         continue;
 
                 m.misc = 0;
                 m.addr = 0;
                 m.bank = i;
 
-                m.status = mce_rdmsrl(MSR_IA32_MC0_STATUS + i*4);
+                m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
                 if ((m.status & MCI_STATUS_VAL) == 0)
                         continue;
 
@@ -974,9 +968,9 @@ void do_machine_check(struct pt_regs *regs, long error_code)
                         kill_it = 1;
 
                 if (m.status & MCI_STATUS_MISCV)
-                        m.misc = mce_rdmsrl(MSR_IA32_MC0_MISC + i*4);
+                        m.misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
                 if (m.status & MCI_STATUS_ADDRV)
-                        m.addr = mce_rdmsrl(MSR_IA32_MC0_ADDR + i*4);
+                        m.addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));
 
                 /*
                  * Action optional error. Queue address for later processing.
@@ -1169,10 +1163,25 @@ int mce_notify_irq(void)
 }
 EXPORT_SYMBOL_GPL(mce_notify_irq);
 
+static int mce_banks_init(void)
+{
+        int i;
+
+        mce_banks = kzalloc(banks * sizeof(struct mce_bank), GFP_KERNEL);
+        if (!mce_banks)
+                return -ENOMEM;
+        for (i = 0; i < banks; i++) {
+                struct mce_bank *b = &mce_banks[i];
+                b->ctl = -1ULL;
+                b->init = 1;
+        }
+        return 0;
+}
+
 /*
  * Initialize Machine Checks for a CPU.
  */
-static int mce_cap_init(void)
+static int __cpuinit mce_cap_init(void)
 {
         unsigned b;
         u64 cap;
@@ -1192,11 +1201,10 @@ static int mce_cap_init(void)
         /* Don't support asymmetric configurations today */
         WARN_ON(banks != 0 && b != banks);
         banks = b;
-        if (!bank) {
-                bank = kmalloc(banks * sizeof(u64), GFP_KERNEL);
-                if (!bank)
-                        return -ENOMEM;
-                memset(bank, 0xff, banks * sizeof(u64));
+        if (!mce_banks) {
+                int err = mce_banks_init();
+                if (err)
+                        return err;
         }
 
         /* Use accurate RIP reporting if available. */
@@ -1228,15 +1236,16 @@ static void mce_init(void)
                 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
 
         for (i = 0; i < banks; i++) {
-                if (skip_bank_init(i))
+                struct mce_bank *b = &mce_banks[i];
+                if (!b->init)
                         continue;
-                wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
-                wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+                wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl);
+                wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
         }
 }
 
 /* Add per CPU specific workarounds here */
-static int mce_cpu_quirks(struct cpuinfo_x86 *c)
+static int __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
 {
         if (c->x86_vendor == X86_VENDOR_UNKNOWN) {
                 pr_info("MCE: unknown CPU type - not enabling MCE support.\n");
@@ -1251,7 +1260,7 @@ static int mce_cpu_quirks(struct cpuinfo_x86 *c)
                          * trips off incorrectly with the IOMMU & 3ware
                          * & Cerberus:
                          */
-                        clear_bit(10, (unsigned long *)&bank[4]);
+                        clear_bit(10, (unsigned long *)&mce_banks[4].ctl);
                 }
                 if (c->x86 <= 17 && mce_bootlog < 0) {
                         /*
@@ -1265,7 +1274,7 @@ static int mce_cpu_quirks(struct cpuinfo_x86 *c)
                  * by default.
                  */
                  if (c->x86 == 6 && banks > 0)
-                        bank[0] = 0;
+                        mce_banks[0].ctl = 0;
         }
 
         if (c->x86_vendor == X86_VENDOR_INTEL) {
@@ -1278,8 +1287,8 @@ static int mce_cpu_quirks(struct cpuinfo_x86 *c)
                  * valid event later, merely don't write CTL0.
                  */
 
-                if (c->x86 == 6 && c->x86_model < 0x1A)
-                        __set_bit(0, &dont_init_banks);
+                if (c->x86 == 6 && c->x86_model < 0x1A && banks > 0)
+                        mce_banks[0].init = 0;
 
                 /*
                  * All newer Intel systems support MCE broadcasting. Enable
@@ -1348,6 +1357,17 @@ static void mce_init_timer(void)
         add_timer_on(t, smp_processor_id());
 }
 
+/* Handle unconfigured int18 (should never happen) */
+static void unexpected_machine_check(struct pt_regs *regs, long error_code)
+{
+        printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n",
+               smp_processor_id());
+}
+
+/* Call the installed machine check handler for this CPU setup. */
+void (*machine_check_vector)(struct pt_regs *, long error_code) =
+                                                unexpected_machine_check;
+
 /*
  * Called for each booted CPU to set up machine checks.
  * Must be called with preempt off:
@@ -1561,8 +1581,10 @@ static struct miscdevice mce_log_device = {
  */
 static int __init mcheck_enable(char *str)
 {
-        if (*str == 0)
+        if (*str == 0) {
                 enable_p5_mce();
+                return 1;
+        }
         if (*str == '=')
                 str++;
         if (!strcmp(str, "off"))
@@ -1603,8 +1625,9 @@ static int mce_disable(void)
         int i;
 
         for (i = 0; i < banks; i++) {
-                if (!skip_bank_init(i))
-                        wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
+                struct mce_bank *b = &mce_banks[i];
+                if (b->init)
+                        wrmsrl(MSR_IA32_MCx_CTL(i), 0);
         }
         return 0;
 }
@@ -1679,14 +1702,15 @@ DEFINE_PER_CPU(struct sys_device, mce_dev);
 __cpuinitdata
 void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 
-static struct sysdev_attribute *bank_attrs;
+static inline struct mce_bank *attr_to_bank(struct sysdev_attribute *attr)
+{
+        return container_of(attr, struct mce_bank, attr);
+}
 
 static ssize_t show_bank(struct sys_device *s, struct sysdev_attribute *attr,
                          char *buf)
 {
-        u64 b = bank[attr - bank_attrs];
-
-        return sprintf(buf, "%llx\n", b);
+        return sprintf(buf, "%llx\n", attr_to_bank(attr)->ctl);
 }
 
 static ssize_t set_bank(struct sys_device *s, struct sysdev_attribute *attr,
@@ -1697,7 +1721,7 @@ static ssize_t set_bank(struct sys_device *s, struct sysdev_attribute *attr,
         if (strict_strtoull(buf, 0, &new) < 0)
                 return -EINVAL;
 
-        bank[attr - bank_attrs] = new;
+        attr_to_bank(attr)->ctl = new;
         mce_restart();
 
         return size;
@@ -1839,7 +1863,7 @@ static __cpuinit int mce_create_device(unsigned int cpu)
         }
         for (j = 0; j < banks; j++) {
                 err = sysdev_create_file(&per_cpu(mce_dev, cpu),
-                                        &bank_attrs[j]);
+                                        &mce_banks[j].attr);
                 if (err)
                         goto error2;
         }
@@ -1848,10 +1872,10 @@ static __cpuinit int mce_create_device(unsigned int cpu)
         return 0;
 error2:
         while (--j >= 0)
-                sysdev_remove_file(&per_cpu(mce_dev, cpu), &bank_attrs[j]);
+                sysdev_remove_file(&per_cpu(mce_dev, cpu), &mce_banks[j].attr);
 error:
         while (--i >= 0)
-                sysdev_remove_file(&per_cpu(mce_dev, cpu), mce_attrs[i]);
+                sysdev_remove_file(&per_cpu(mce_dev, cpu), &mce_banks[i].attr);
 
         sysdev_unregister(&per_cpu(mce_dev, cpu));
 
@@ -1869,7 +1893,7 @@ static __cpuinit void mce_remove_device(unsigned int cpu)
                 sysdev_remove_file(&per_cpu(mce_dev, cpu), mce_attrs[i]);
 
         for (i = 0; i < banks; i++)
-                sysdev_remove_file(&per_cpu(mce_dev, cpu), &bank_attrs[i]);
+                sysdev_remove_file(&per_cpu(mce_dev, cpu), &mce_banks[i].attr);
 
         sysdev_unregister(&per_cpu(mce_dev, cpu));
         cpumask_clear_cpu(cpu, mce_dev_initialized);
@@ -1886,8 +1910,9 @@ static void mce_disable_cpu(void *h)
         if (!(action & CPU_TASKS_FROZEN))
                 cmci_clear();
         for (i = 0; i < banks; i++) {
-                if (!skip_bank_init(i))
-                        wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
+                struct mce_bank *b = &mce_banks[i];
+                if (b->init)
+                        wrmsrl(MSR_IA32_MCx_CTL(i), 0);
         }
 }
 
@@ -1902,8 +1927,9 @@ static void mce_reenable_cpu(void *h)
         if (!(action & CPU_TASKS_FROZEN))
                 cmci_reenable();
         for (i = 0; i < banks; i++) {
-                if (!skip_bank_init(i))
-                        wrmsrl(MSR_IA32_MC0_CTL + i*4, bank[i]);
+                struct mce_bank *b = &mce_banks[i];
+                if (b->init)
+                        wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl);
         }
 }
 
@@ -1951,35 +1977,21 @@ static struct notifier_block mce_cpu_notifier __cpuinitdata = {
         .notifier_call = mce_cpu_callback,
 };
 
-static __init int mce_init_banks(void)
+static __init void mce_init_banks(void)
 {
         int i;
 
-        bank_attrs = kzalloc(sizeof(struct sysdev_attribute) * banks,
-                                GFP_KERNEL);
-        if (!bank_attrs)
-                return -ENOMEM;
-
         for (i = 0; i < banks; i++) {
-                struct sysdev_attribute *a = &bank_attrs[i];
+                struct mce_bank *b = &mce_banks[i];
+                struct sysdev_attribute *a = &b->attr;
 
-                a->attr.name    = kasprintf(GFP_KERNEL, "bank%d", i);
-                if (!a->attr.name)
-                        goto nomem;
+                a->attr.name    = b->attrname;
+                snprintf(b->attrname, ATTR_LEN, "bank%d", i);
 
                 a->attr.mode    = 0644;
                 a->show         = show_bank;
                 a->store        = set_bank;
         }
-        return 0;
-
-nomem:
-        while (--i >= 0)
-                kfree(bank_attrs[i].attr.name);
-        kfree(bank_attrs);
-        bank_attrs = NULL;
-
-        return -ENOMEM;
 }
 
 static __init int mce_init_device(void)
@@ -1992,9 +2004,7 @@ static __init int mce_init_device(void)
 
         zalloc_cpumask_var(&mce_dev_initialized, GFP_KERNEL);
 
-        err = mce_init_banks();
-        if (err)
-                return err;
+        mce_init_banks();
 
         err = sysdev_class_register(&mce_sysclass);
         if (err)
@@ -2014,57 +2024,65 @@ static __init int mce_init_device(void)
 
 device_initcall(mce_init_device);
 
-#else /* CONFIG_X86_OLD_MCE: */
-
-int nr_mce_banks;
-EXPORT_SYMBOL_GPL(nr_mce_banks);        /* non-fatal.o */
+/*
+ * Old style boot options parsing. Only for compatibility.
+ */
+static int __init mcheck_disable(char *str)
+{
+        mce_disabled = 1;
+        return 1;
+}
+__setup("nomce", mcheck_disable);
 
-/* This has to be run for each processor */
-void mcheck_init(struct cpuinfo_x86 *c)
+#ifdef CONFIG_DEBUG_FS
+struct dentry *mce_get_debugfs_dir(void)
 {
-        if (mce_disabled)
-                return;
+        static struct dentry *dmce;
 
-        switch (c->x86_vendor) {
-        case X86_VENDOR_AMD:
-                amd_mcheck_init(c);
-                break;
+        if (!dmce)
+                dmce = debugfs_create_dir("mce", NULL);
 
-        case X86_VENDOR_INTEL:
-                if (c->x86 == 5)
-                        intel_p5_mcheck_init(c);
-                if (c->x86 == 6)
-                        intel_p6_mcheck_init(c);
-                if (c->x86 == 15)
-                        intel_p4_mcheck_init(c);
-                break;
+        return dmce;
+}
 
-        case X86_VENDOR_CENTAUR:
-                if (c->x86 == 5)
-                        winchip_mcheck_init(c);
-                break;
+static void mce_reset(void)
+{
+        cpu_missing = 0;
+        atomic_set(&mce_fake_paniced, 0);
+        atomic_set(&mce_executing, 0);
+        atomic_set(&mce_callin, 0);
+        atomic_set(&global_nwo, 0);
+}
 
-        default:
-                break;
-        }
-        printk(KERN_INFO "mce: CPU supports %d MCE banks\n", nr_mce_banks);
+static int fake_panic_get(void *data, u64 *val)
+{
+        *val = fake_panic;
+        return 0;
 }
 
-static int __init mcheck_enable(char *str)
+static int fake_panic_set(void *data, u64 val)
 {
-        mce_p5_enabled = 1;
-        return 1;
+        mce_reset();
+        fake_panic = val;
+        return 0;
 }
-__setup("mce", mcheck_enable);
 
-#endif /* CONFIG_X86_OLD_MCE */
+DEFINE_SIMPLE_ATTRIBUTE(fake_panic_fops, fake_panic_get,
+                        fake_panic_set, "%llu\n");
 
-/*
- * Old style boot options parsing. Only for compatibility.
- */
-static int __init mcheck_disable(char *str)
+static int __init mce_debugfs_init(void)
 {
-        mce_disabled = 1;
-        return 1;
+        struct dentry *dmce, *ffake_panic;
+
+        dmce = mce_get_debugfs_dir();
+        if (!dmce)
+                return -ENOMEM;
+        ffake_panic = debugfs_create_file("fake_panic", 0444, dmce, NULL,
+                                          &fake_panic_fops);
+        if (!ffake_panic)
+                return -ENOMEM;
+
+        return 0;
 }
-__setup("nomce", mcheck_disable);
+late_initcall(mce_debugfs_init);
+#endif
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 8cd5224943b5..83a3d1f4efca 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -489,8 +489,9 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
         int i, err = 0;
         struct threshold_bank *b = NULL;
         char name[32];
+#ifdef CONFIG_SMP
         struct cpuinfo_x86 *c = &cpu_data(cpu);
-
+#endif
 
         sprintf(name, "threshold_bank%i", bank);
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index e1acec0f7a32..889f665fe93d 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -90,7 +90,7 @@ static void cmci_discover(int banks, int boot)
                 if (test_bit(i, owned))
                         continue;
 
-                rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+                rdmsrl(MSR_IA32_MCx_CTL2(i), val);
 
                 /* Already owned by someone else? */
                 if (val & CMCI_EN) {
@@ -101,8 +101,8 @@ static void cmci_discover(int banks, int boot)
                 }
 
                 val |= CMCI_EN | CMCI_THRESHOLD;
-                wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
-                rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+                wrmsrl(MSR_IA32_MCx_CTL2(i), val);
+                rdmsrl(MSR_IA32_MCx_CTL2(i), val);
 
                 /* Did the enable bit stick? -- the bank supports CMCI */
                 if (val & CMCI_EN) {
@@ -152,9 +152,9 @@ void cmci_clear(void)
                 if (!test_bit(i, __get_cpu_var(mce_banks_owned)))
                         continue;
                 /* Disable CMCI */
-                rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+                rdmsrl(MSR_IA32_MCx_CTL2(i), val);
                 val &= ~(CMCI_EN|CMCI_THRESHOLD_MASK);
-                wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
+                wrmsrl(MSR_IA32_MCx_CTL2(i), val);
                 __clear_bit(i, __get_cpu_var(mce_banks_owned));
         }
         spin_unlock_irqrestore(&cmci_discover_lock, flags);
diff --git a/arch/x86/kernel/cpu/mcheck/non-fatal.c b/arch/x86/kernel/cpu/mcheck/non-fatal.c
deleted file mode 100644
index f5f2d6f71fb6..000000000000
--- a/arch/x86/kernel/cpu/mcheck/non-fatal.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Non Fatal Machine Check Exception Reporting
- *
- * (C) Copyright 2002 Dave Jones. <davej@redhat.com>
- *
- * This file contains routines to check for non-fatal MCEs every 15s
- *
- */
-#include <linux/interrupt.h>
-#include <linux/workqueue.h>
-#include <linux/jiffies.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/mce.h>
-#include <asm/msr.h>
-
-static int              firstbank;
-
-#define MCE_RATE        (15*HZ) /* timer rate is 15s */
-
-static void mce_checkregs(void *info)
-{
-        u32 low, high;
-        int i;
-
-        for (i = firstbank; i < nr_mce_banks; i++) {
-                rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
-
-                if (!(high & (1<<31)))
-                        continue;
-
-                printk(KERN_INFO "MCE: The hardware reports a non fatal, "
-                        "correctable incident occurred on CPU %d.\n",
-                                smp_processor_id());
-
-                printk(KERN_INFO "Bank %d: %08x%08x\n", i, high, low);
-
-                /*
-                 * Scrub the error so we don't pick it up in MCE_RATE
-                 * seconds time:
-                 */
-                wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
-
-                /* Serialize: */
-                wmb();
-                add_taint(TAINT_MACHINE_CHECK);
-        }
-}
-
-static void mce_work_fn(struct work_struct *work);
-static DECLARE_DELAYED_WORK(mce_work, mce_work_fn);
-
-static void mce_work_fn(struct work_struct *work)
-{
-        on_each_cpu(mce_checkregs, NULL, 1);
-        schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
-}
-
-static int __init init_nonfatal_mce_checker(void)
-{
-        struct cpuinfo_x86 *c = &boot_cpu_data;
-
-        /* Check for MCE support */
-        if (!cpu_has(c, X86_FEATURE_MCE))
-                return -ENODEV;
-
-        /* Check for PPro style MCA */
-        if (!cpu_has(c, X86_FEATURE_MCA))
-                return -ENODEV;
-
-        /* Some Athlons misbehave when we frob bank 0 */
-        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
-                                                boot_cpu_data.x86 == 6)
-                firstbank = 1;
-        else
-                firstbank = 0;
-
-        /*
-         * Check for non-fatal errors every MCE_RATE s
-         */
-        schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
-        printk(KERN_INFO "Machine check exception polling timer started.\n");
-
-        return 0;
-}
-module_init(init_nonfatal_mce_checker);
-
-MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c
deleted file mode 100644
index 4482aea9aa2e..000000000000
--- a/arch/x86/kernel/cpu/mcheck/p4.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * P4 specific Machine Check Exception Reporting
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm/processor.h>
-#include <asm/mce.h>
-#include <asm/msr.h>
-
-/* as supported by the P4/Xeon family */
-struct intel_mce_extended_msrs {
-        u32 eax;
-        u32 ebx;
-        u32 ecx;
-        u32 edx;
-        u32 esi;
-        u32 edi;
-        u32 ebp;
-        u32 esp;
-        u32 eflags;
-        u32 eip;
-        /* u32 *reserved[]; */
-};
-
-static int mce_num_extended_msrs;
-
-/* P4/Xeon Extended MCE MSR retrieval, return 0 if unsupported */
-static void intel_get_extended_msrs(struct intel_mce_extended_msrs *r)
-{
-        u32 h;
-
-        rdmsr(MSR_IA32_MCG_EAX, r->eax, h);
-        rdmsr(MSR_IA32_MCG_EBX, r->ebx, h);
-        rdmsr(MSR_IA32_MCG_ECX, r->ecx, h);
-        rdmsr(MSR_IA32_MCG_EDX, r->edx, h);
-        rdmsr(MSR_IA32_MCG_ESI, r->esi, h);
-        rdmsr(MSR_IA32_MCG_EDI, r->edi, h);
-        rdmsr(MSR_IA32_MCG_EBP, r->ebp, h);
-        rdmsr(MSR_IA32_MCG_ESP, r->esp, h);
-        rdmsr(MSR_IA32_MCG_EFLAGS, r->eflags, h);
-        rdmsr(MSR_IA32_MCG_EIP, r->eip, h);
-}
-
-static void intel_machine_check(struct pt_regs *regs, long error_code)
-{
-        u32 alow, ahigh, high, low;
-        u32 mcgstl, mcgsth;
-        int recover = 1;
-        int i;
-
-        rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
-        if (mcgstl & (1<<0))    /* Recoverable ? */
-                recover = 0;
-
-        printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
-                smp_processor_id(), mcgsth, mcgstl);
-
-        if (mce_num_extended_msrs > 0) {
-                struct intel_mce_extended_msrs dbg;
-
-                intel_get_extended_msrs(&dbg);
-
-                printk(KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n"
-                        "\teax: %08x ebx: %08x ecx: %08x edx: %08x\n"
-                        "\tesi: %08x edi: %08x ebp: %08x esp: %08x\n",
-                        smp_processor_id(), dbg.eip, dbg.eflags,
-                        dbg.eax, dbg.ebx, dbg.ecx, dbg.edx,
-                        dbg.esi, dbg.edi, dbg.ebp, dbg.esp);
-        }
-
-        for (i = 0; i < nr_mce_banks; i++) {
-                rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
-                if (high & (1<<31)) {
-                        char misc[20];
-                        char addr[24];
-
-                        misc[0] = addr[0] = '\0';
-                        if (high & (1<<29))
-                                recover |= 1;
-                        if (high & (1<<25))
-                                recover |= 2;
-                        high &= ~(1<<31);
-                        if (high & (1<<27)) {
-                                rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
-                                snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
-                        }
-                        if (high & (1<<26)) {
-                                rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
-                                snprintf(addr, 24, " at %08x%08x", ahigh, alow);
-                        }
-                        printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
-                                smp_processor_id(), i, high, low, misc, addr);
-                }
-        }
-
-        if (recover & 2)
-                panic("CPU context corrupt");
-        if (recover & 1)
-                panic("Unable to continue");
-
-        printk(KERN_EMERG "Attempting to continue.\n");
-
-        /*
-         * Do not clear the MSR_IA32_MCi_STATUS if the error is not
-         * recoverable/continuable.This will allow BIOS to look at the MSRs
-         * for errors if the OS could not log the error.
-         */
-        for (i = 0; i < nr_mce_banks; i++) {
-                u32 msr;
-                msr = MSR_IA32_MC0_STATUS+i*4;
-                rdmsr(msr, low, high);
-                if (high&(1<<31)) {
-                        /* Clear it */
-                        wrmsr(msr, 0UL, 0UL);
-                        /* Serialize */
-                        wmb();
-                        add_taint(TAINT_MACHINE_CHECK);
-                }
-        }
-        mcgstl &= ~(1<<2);
-        wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
-}
-
-void intel_p4_mcheck_init(struct cpuinfo_x86 *c)
-{
-        u32 l, h;
-        int i;
-
-        machine_check_vector = intel_machine_check;
-        wmb();
-
-        printk(KERN_INFO "Intel machine check architecture supported.\n");
-        rdmsr(MSR_IA32_MCG_CAP, l, h);
-        if (l & (1<<8)) /* Control register present ? */
-                wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
-        nr_mce_banks = l & 0xff;
-
-        for (i = 0; i < nr_mce_banks; i++) {
-                wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
-                wrmsr(MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
-        }
-
-        set_in_cr4(X86_CR4_MCE);
-        printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",
-                smp_processor_id());
-
-        /* Check for P4/Xeon extended MCE MSRs */
-        rdmsr(MSR_IA32_MCG_CAP, l, h);
-        if (l & (1<<9)) {/* MCG_EXT_P */
-                mce_num_extended_msrs = (l >> 16) & 0xff;
-                printk(KERN_INFO "CPU%d: Intel P4/Xeon Extended MCE MSRs (%d)"
-                                " available\n",
-                        smp_processor_id(), mce_num_extended_msrs);
-
-#ifdef CONFIG_X86_MCE_P4THERMAL
-                /* Check for P4/Xeon Thermal monitor */
-                intel_init_thermal(c);
-#endif
-        }
-}
diff --git a/arch/x86/kernel/cpu/mcheck/p6.c b/arch/x86/kernel/cpu/mcheck/p6.c
deleted file mode 100644
index 01e4f8178183..000000000000
--- a/arch/x86/kernel/cpu/mcheck/p6.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * P6 specific Machine Check Exception Reporting
- * (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
- */
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/mce.h>
-#include <asm/msr.h>
-
-/* Machine Check Handler For PII/PIII */
-static void intel_machine_check(struct pt_regs *regs, long error_code)
-{
-        u32 alow, ahigh, high, low;
-        u32 mcgstl, mcgsth;
-        int recover = 1;
-        int i;
-
-        rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
-        if (mcgstl & (1<<0))    /* Recoverable ? */
-                recover = 0;
-
-        printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
-                smp_processor_id(), mcgsth, mcgstl);
-
-        for (i = 0; i < nr_mce_banks; i++) {
-                rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
-                if (high & (1<<31)) {
-                        char misc[20];
-                        char addr[24];
-
-                        misc[0] = '\0';
-                        addr[0] = '\0';
-
-                        if (high & (1<<29))
-                                recover |= 1;
-                        if (high & (1<<25))
-                                recover |= 2;
-                        high &= ~(1<<31);
-
-                        if (high & (1<<27)) {
-                                rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
-                                snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
-                        }
-                        if (high & (1<<26)) {
-                                rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
-                                snprintf(addr, 24, " at %08x%08x", ahigh, alow);
-                        }
-
-                        printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
-                                smp_processor_id(), i, high, low, misc, addr);
-                }
-        }
-
-        if (recover & 2)
-                panic("CPU context corrupt");
-        if (recover & 1)
-                panic("Unable to continue");
-
-        printk(KERN_EMERG "Attempting to continue.\n");
-        /*
-         * Do not clear the MSR_IA32_MCi_STATUS if the error is not
-         * recoverable/continuable.This will allow BIOS to look at the MSRs
-         * for errors if the OS could not log the error:
-         */
-        for (i = 0; i < nr_mce_banks; i++) {
-                unsigned int msr;
-
-                msr = MSR_IA32_MC0_STATUS+i*4;
-                rdmsr(msr, low, high);
-                if (high & (1<<31)) {
-                        /* Clear it: */
-                        wrmsr(msr, 0UL, 0UL);
-                        /* Serialize: */
-                        wmb();
-                        add_taint(TAINT_MACHINE_CHECK);
-                }
-        }
-        mcgstl &= ~(1<<2);
-        wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
-}
-
-/* Set up machine check reporting for processors with Intel style MCE: */
-void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
-{
-        u32 l, h;
-        int i;
-
-        /* Check for MCE support */
-        if (!cpu_has(c, X86_FEATURE_MCE))
-                return;
-
-        /* Check for PPro style MCA */
-        if (!cpu_has(c, X86_FEATURE_MCA))
-                return;
-
-        /* Ok machine check is available */
-        machine_check_vector = intel_machine_check;
-        /* Make sure the vector pointer is visible before we enable MCEs: */
-        wmb();
-
-        printk(KERN_INFO "Intel machine check architecture supported.\n");
-        rdmsr(MSR_IA32_MCG_CAP, l, h);
-        if (l & (1<<8)) /* Control register present ? */
-                wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
-        nr_mce_banks = l & 0xff;
-
-        /*
-         * Following the example in IA-32 SDM Vol 3:
-         * - MC0_CTL should not be written
-         * - Status registers on all banks should be cleared on reset
-         */
-        for (i = 1; i < nr_mce_banks; i++)
-                wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
-
-        for (i = 0; i < nr_mce_banks; i++)
-                wrmsr(MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
-
-        set_in_cr4(X86_CR4_MCE);
-        printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",
-                smp_processor_id());
-}
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index 5957a93e5173..63a56d147e4a 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -260,9 +260,6 @@ void intel_init_thermal(struct cpuinfo_x86 *c)
                 return;
         }
 
-        if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
-                tm2 = 1;
-
         /* Check whether a vector already exists */
         if (h & APIC_VECTOR_MASK) {
                 printk(KERN_DEBUG
@@ -271,6 +268,16 @@ void intel_init_thermal(struct cpuinfo_x86 *c)
                 return;
         }
 
+        /* early Pentium M models use different method for enabling TM2 */
+        if (cpu_has(c, X86_FEATURE_TM2)) {
+                if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
+                        rdmsr(MSR_THERM2_CTL, l, h);
+                        if (l & MSR_THERM2_CTL_TM_SELECT)
+                                tm2 = 1;
+                } else if (l & MSR_IA32_MISC_ENABLE_TM2)
+                        tm2 = 1;
+        }
+
         /* We'll mask the thermal vector in the lapic till we're ready: */
         h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
         apic_write(APIC_LVTTHMR, h);
diff --git a/arch/x86/kernel/cpu/mtrr/if.c b/arch/x86/kernel/cpu/mtrr/if.c
index 08b6ea4c62b4..f04e72527604 100644
--- a/arch/x86/kernel/cpu/mtrr/if.c
+++ b/arch/x86/kernel/cpu/mtrr/if.c
@@ -126,8 +126,8 @@ mtrr_write(struct file *file, const char __user *buf, size_t len, loff_t * ppos)
                 return -EINVAL;
 
         base = simple_strtoull(line + 5, &ptr, 0);
-        for (; isspace(*ptr); ++ptr)
-                ;
+        while (isspace(*ptr))
+                ptr++;
 
         if (strncmp(ptr, "size=", 5))
                 return -EINVAL;
@@ -135,14 +135,14 @@ mtrr_write(struct file *file, const char __user *buf, size_t len, loff_t * ppos)
         size = simple_strtoull(ptr + 5, &ptr, 0);
         if ((base & 0xfff) || (size & 0xfff))
                 return -EINVAL;
-        for (; isspace(*ptr); ++ptr)
-                ;
+        while (isspace(*ptr))
+                ptr++;
 
         if (strncmp(ptr, "type=", 5))
                 return -EINVAL;
         ptr += 5;
-        for (; isspace(*ptr); ++ptr)
-                ;
+        while (isspace(*ptr))
+                ptr++;
 
         for (i = 0; i < MTRR_NUM_TYPES; ++i) {
                 if (strcmp(ptr, mtrr_strings[i]))
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_event.c
index 2732e2c1e4d3..a3c7adb06b78 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1,5 +1,5 @@
 /*
- * Performance counter x86 architecture code
+ * Performance events x86 architecture code
  *
  *  Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de>
  *  Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar
@@ -11,7 +11,7 @@
  *  For licencing details see kernel-base/COPYING
  */
 
-#include <linux/perf_counter.h>
+#include <linux/perf_event.h>
 #include <linux/capability.h>
 #include <linux/notifier.h>
 #include <linux/hardirq.h>
@@ -27,19 +27,19 @@
 #include <asm/stacktrace.h>
 #include <asm/nmi.h>
 
-static u64 perf_counter_mask __read_mostly;
+static u64 perf_event_mask __read_mostly;
 
-/* The maximal number of PEBS counters: */
-#define MAX_PEBS_COUNTERS       4
+/* The maximal number of PEBS events: */
+#define MAX_PEBS_EVENTS 4
 
 /* The size of a BTS record in bytes: */
 #define BTS_RECORD_SIZE         24
 
 /* The size of a per-cpu BTS buffer in bytes: */
-#define BTS_BUFFER_SIZE         (BTS_RECORD_SIZE * 1024)
+#define BTS_BUFFER_SIZE         (BTS_RECORD_SIZE * 2048)
 
 /* The BTS overflow threshold in bytes from the end of the buffer: */
-#define BTS_OVFL_TH             (BTS_RECORD_SIZE * 64)
+#define BTS_OVFL_TH             (BTS_RECORD_SIZE * 128)
 
 
 /*
@@ -65,11 +65,11 @@ struct debug_store {
         u64     pebs_index;
         u64     pebs_absolute_maximum;
         u64     pebs_interrupt_threshold;
-        u64     pebs_counter_reset[MAX_PEBS_COUNTERS];
+        u64     pebs_event_reset[MAX_PEBS_EVENTS];
 };
 
-struct cpu_hw_counters {
-        struct perf_counter     *counters[X86_PMC_IDX_MAX];
+struct cpu_hw_events {
+        struct perf_event       *events[X86_PMC_IDX_MAX];
         unsigned long           used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
         unsigned long           active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
         unsigned long           interrupts;
@@ -86,17 +86,17 @@ struct x86_pmu {
         int             (*handle_irq)(struct pt_regs *);
         void            (*disable_all)(void);
         void            (*enable_all)(void);
-        void            (*enable)(struct hw_perf_counter *, int);
-        void            (*disable)(struct hw_perf_counter *, int);
+        void            (*enable)(struct hw_perf_event *, int);
+        void            (*disable)(struct hw_perf_event *, int);
         unsigned        eventsel;
         unsigned        perfctr;
         u64             (*event_map)(int);
         u64             (*raw_event)(u64);
         int             max_events;
-        int             num_counters;
-        int             num_counters_fixed;
-        int             counter_bits;
-        u64             counter_mask;
+        int             num_events;
+        int             num_events_fixed;
+        int             event_bits;
+        u64             event_mask;
         int             apic;
         u64             max_period;
         u64             intel_ctrl;
@@ -106,7 +106,7 @@ struct x86_pmu {
 
 static struct x86_pmu x86_pmu __read_mostly;
 
-static DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters) = {
+static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = {
         .enabled = 1,
 };
 
@@ -124,35 +124,35 @@ static const u64 p6_perfmon_event_map[] =
   [PERF_COUNT_HW_BUS_CYCLES]            = 0x0062,
 };
 
-static u64 p6_pmu_event_map(int event)
+static u64 p6_pmu_event_map(int hw_event)
 {
-        return p6_perfmon_event_map[event];
+        return p6_perfmon_event_map[hw_event];
 }
 
 /*
- * Counter setting that is specified not to count anything.
+ * Event setting that is specified not to count anything.
  * We use this to effectively disable a counter.
  *
  * L2_RQSTS with 0 MESI unit mask.
  */
-#define P6_NOP_COUNTER                  0x0000002EULL
+#define P6_NOP_EVENT                    0x0000002EULL
 
-static u64 p6_pmu_raw_event(u64 event)
+static u64 p6_pmu_raw_event(u64 hw_event)
 {
 #define P6_EVNTSEL_EVENT_MASK           0x000000FFULL
 #define P6_EVNTSEL_UNIT_MASK            0x0000FF00ULL
 #define P6_EVNTSEL_EDGE_MASK            0x00040000ULL
 #define P6_EVNTSEL_INV_MASK             0x00800000ULL
-#define P6_EVNTSEL_COUNTER_MASK         0xFF000000ULL
+#define P6_EVNTSEL_REG_MASK             0xFF000000ULL
 
 #define P6_EVNTSEL_MASK                 \
         (P6_EVNTSEL_EVENT_MASK |        \
          P6_EVNTSEL_UNIT_MASK  |        \
          P6_EVNTSEL_EDGE_MASK  |        \
          P6_EVNTSEL_INV_MASK   |        \
-         P6_EVNTSEL_COUNTER_MASK)
+         P6_EVNTSEL_REG_MASK)
 
-        return event & P6_EVNTSEL_MASK;
+        return hw_event & P6_EVNTSEL_MASK;
 }
 
 
@@ -170,16 +170,16 @@ static const u64 intel_perfmon_event_map[] =
   [PERF_COUNT_HW_BUS_CYCLES]            = 0x013c,
 };
 
-static u64 intel_pmu_event_map(int event)
+static u64 intel_pmu_event_map(int hw_event)
 {
-        return intel_perfmon_event_map[event];
+        return intel_perfmon_event_map[hw_event];
 }
 
 /*
- * Generalized hw caching related event table, filled
+ * Generalized hw caching related hw_event table, filled
  * in on a per model basis. A value of 0 means
- * 'not supported', -1 means 'event makes no sense on
- * this CPU', any other value means the raw event
+ * 'not supported', -1 means 'hw_event makes no sense on
+ * this CPU', any other value means the raw hw_event
  * ID.
  */
 
@@ -463,22 +463,22 @@ static const u64 atom_hw_cache_event_ids
  },
 };
 
-static u64 intel_pmu_raw_event(u64 event)
+static u64 intel_pmu_raw_event(u64 hw_event)
 {
 #define CORE_EVNTSEL_EVENT_MASK         0x000000FFULL
 #define CORE_EVNTSEL_UNIT_MASK          0x0000FF00ULL
 #define CORE_EVNTSEL_EDGE_MASK          0x00040000ULL
 #define CORE_EVNTSEL_INV_MASK           0x00800000ULL
-#define CORE_EVNTSEL_COUNTER_MASK       0xFF000000ULL
+#define CORE_EVNTSEL_REG_MASK   0xFF000000ULL
 
 #define CORE_EVNTSEL_MASK               \
         (CORE_EVNTSEL_EVENT_MASK |      \
          CORE_EVNTSEL_UNIT_MASK  |      \
          CORE_EVNTSEL_EDGE_MASK  |      \
          CORE_EVNTSEL_INV_MASK  |       \
-         CORE_EVNTSEL_COUNTER_MASK)
+         CORE_EVNTSEL_REG_MASK)
 
-        return event & CORE_EVNTSEL_MASK;
+        return hw_event & CORE_EVNTSEL_MASK;
 }
 
 static const u64 amd_hw_cache_event_ids
@@ -585,39 +585,39 @@ static const u64 amd_perfmon_event_map[] =
   [PERF_COUNT_HW_BRANCH_MISSES]         = 0x00c5,
 };
 
-static u64 amd_pmu_event_map(int event)
+static u64 amd_pmu_event_map(int hw_event)
 {
-        return amd_perfmon_event_map[event];
+        return amd_perfmon_event_map[hw_event];
 }
 
-static u64 amd_pmu_raw_event(u64 event)
+static u64 amd_pmu_raw_event(u64 hw_event)
 {
 #define K7_EVNTSEL_EVENT_MASK   0x7000000FFULL
 #define K7_EVNTSEL_UNIT_MASK    0x00000FF00ULL
 #define K7_EVNTSEL_EDGE_MASK    0x000040000ULL
 #define K7_EVNTSEL_INV_MASK     0x000800000ULL
-#define K7_EVNTSEL_COUNTER_MASK 0x0FF000000ULL
+#define K7_EVNTSEL_REG_MASK     0x0FF000000ULL
 
 #define K7_EVNTSEL_MASK                 \
         (K7_EVNTSEL_EVENT_MASK |        \
          K7_EVNTSEL_UNIT_MASK  |        \
          K7_EVNTSEL_EDGE_MASK  |        \
          K7_EVNTSEL_INV_MASK   |        \
-         K7_EVNTSEL_COUNTER_MASK)
+         K7_EVNTSEL_REG_MASK)
 
-        return event & K7_EVNTSEL_MASK;
+        return hw_event & K7_EVNTSEL_MASK;
 }
 
 /*
- * Propagate counter elapsed time into the generic counter.
- * Can only be executed on the CPU where the counter is active.
+ * Propagate event elapsed time into the generic event.
+ * Can only be executed on the CPU where the event is active.
  * Returns the delta events processed.
  */
 static u64
-x86_perf_counter_update(struct perf_counter *counter,
-                        struct hw_perf_counter *hwc, int idx)
+x86_perf_event_update(struct perf_event *event,
+                        struct hw_perf_event *hwc, int idx)
 {
-        int shift = 64 - x86_pmu.counter_bits;
+        int shift = 64 - x86_pmu.event_bits;
         u64 prev_raw_count, new_raw_count;
         s64 delta;
 
@@ -625,15 +625,15 @@ x86_perf_counter_update(struct perf_counter *counter,
                 return 0;
 
         /*
-         * Careful: an NMI might modify the previous counter value.
+         * Careful: an NMI might modify the previous event value.
          *
          * Our tactic to handle this is to first atomically read and
          * exchange a new raw count - then add that new-prev delta
-         * count to the generic counter atomically:
+         * count to the generic event atomically:
          */
 again:
         prev_raw_count = atomic64_read(&hwc->prev_count);
-        rdmsrl(hwc->counter_base + idx, new_raw_count);
+        rdmsrl(hwc->event_base + idx, new_raw_count);
 
         if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
                                         new_raw_count) != prev_raw_count)
@@ -642,7 +642,7 @@ again:
         /*
          * Now we have the new raw value and have updated the prev
          * timestamp already. We can now calculate the elapsed delta
-         * (counter-)time and add that to the generic counter.
+         * (event-)time and add that to the generic event.
          *
          * Careful, not all hw sign-extends above the physical width
          * of the count.
@@ -650,13 +650,13 @@ again:
         delta = (new_raw_count << shift) - (prev_raw_count << shift);
         delta >>= shift;
 
-        atomic64_add(delta, &counter->count);
+        atomic64_add(delta, &event->count);
         atomic64_sub(delta, &hwc->period_left);
 
         return new_raw_count;
 }
 
-static atomic_t active_counters;
+static atomic_t active_events;
 static DEFINE_MUTEX(pmc_reserve_mutex);
 
 static bool reserve_pmc_hardware(void)
@@ -667,12 +667,12 @@ static bool reserve_pmc_hardware(void)
         if (nmi_watchdog == NMI_LOCAL_APIC)
                 disable_lapic_nmi_watchdog();
 
-        for (i = 0; i < x86_pmu.num_counters; i++) {
+        for (i = 0; i < x86_pmu.num_events; i++) {
                 if (!reserve_perfctr_nmi(x86_pmu.perfctr + i))
                         goto perfctr_fail;
         }
 
-        for (i = 0; i < x86_pmu.num_counters; i++) {
+        for (i = 0; i < x86_pmu.num_events; i++) {
                 if (!reserve_evntsel_nmi(x86_pmu.eventsel + i))
                         goto eventsel_fail;
         }
@@ -685,7 +685,7 @@ eventsel_fail:
         for (i--; i >= 0; i--)
                 release_evntsel_nmi(x86_pmu.eventsel + i);
 
-        i = x86_pmu.num_counters;
+        i = x86_pmu.num_events;
 
 perfctr_fail:
         for (i--; i >= 0; i--)
@@ -703,7 +703,7 @@ static void release_pmc_hardware(void)
 #ifdef CONFIG_X86_LOCAL_APIC
         int i;
 
-        for (i = 0; i < x86_pmu.num_counters; i++) {
+        for (i = 0; i < x86_pmu.num_events; i++) {
                 release_perfctr_nmi(x86_pmu.perfctr + i);
                 release_evntsel_nmi(x86_pmu.eventsel + i);
         }
@@ -720,7 +720,7 @@ static inline bool bts_available(void)
 
 static inline void init_debug_store_on_cpu(int cpu)
 {
-        struct debug_store *ds = per_cpu(cpu_hw_counters, cpu).ds;
+        struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
 
         if (!ds)
                 return;
@@ -732,7 +732,7 @@ static inline void init_debug_store_on_cpu(int cpu)
 
 static inline void fini_debug_store_on_cpu(int cpu)
 {
-        if (!per_cpu(cpu_hw_counters, cpu).ds)
+        if (!per_cpu(cpu_hw_events, cpu).ds)
                 return;
 
         wrmsr_on_cpu(cpu, MSR_IA32_DS_AREA, 0, 0);
@@ -751,12 +751,12 @@ static void release_bts_hardware(void)
                 fini_debug_store_on_cpu(cpu);
 
         for_each_possible_cpu(cpu) {
-                struct debug_store *ds = per_cpu(cpu_hw_counters, cpu).ds;
+                struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;
 
                 if (!ds)
                         continue;
 
-                per_cpu(cpu_hw_counters, cpu).ds = NULL;
+                per_cpu(cpu_hw_events, cpu).ds = NULL;
 
                 kfree((void *)(unsigned long)ds->bts_buffer_base);
                 kfree(ds);
@@ -796,7 +796,7 @@ static int reserve_bts_hardware(void)
                 ds->bts_interrupt_threshold =
                         ds->bts_absolute_maximum - BTS_OVFL_TH;
 
-                per_cpu(cpu_hw_counters, cpu).ds = ds;
+                per_cpu(cpu_hw_events, cpu).ds = ds;
                 err = 0;
         }
 
@@ -812,9 +812,9 @@ static int reserve_bts_hardware(void)
         return err;
 }
 
-static void hw_perf_counter_destroy(struct perf_counter *counter)
+static void hw_perf_event_destroy(struct perf_event *event)
 {
-        if (atomic_dec_and_mutex_lock(&active_counters, &pmc_reserve_mutex)) {
+        if (atomic_dec_and_mutex_lock(&active_events, &pmc_reserve_mutex)) {
                 release_pmc_hardware();
                 release_bts_hardware();
                 mutex_unlock(&pmc_reserve_mutex);
@@ -827,7 +827,7 @@ static inline int x86_pmu_initialized(void)
 }
 
 static inline int
-set_ext_hw_attr(struct hw_perf_counter *hwc, struct perf_counter_attr *attr)
+set_ext_hw_attr(struct hw_perf_event *hwc, struct perf_event_attr *attr)
 {
         unsigned int cache_type, cache_op, cache_result;
         u64 config, val;
@@ -880,7 +880,7 @@ static void intel_pmu_enable_bts(u64 config)
 
 static void intel_pmu_disable_bts(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         unsigned long debugctlmsr;
 
         if (!cpuc->ds)
@@ -898,10 +898,10 @@ static void intel_pmu_disable_bts(void)
 /*
  * Setup the hardware configuration for a given attr_type
  */
-static int __hw_perf_counter_init(struct perf_counter *counter)
+static int __hw_perf_event_init(struct perf_event *event)
 {
-        struct perf_counter_attr *attr = &counter->attr;
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct perf_event_attr *attr = &event->attr;
+        struct hw_perf_event *hwc = &event->hw;
         u64 config;
         int err;
 
@@ -909,21 +909,23 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
                 return -ENODEV;
 
         err = 0;
-        if (!atomic_inc_not_zero(&active_counters)) {
+        if (!atomic_inc_not_zero(&active_events)) {
                 mutex_lock(&pmc_reserve_mutex);
-                if (atomic_read(&active_counters) == 0) {
+                if (atomic_read(&active_events) == 0) {
                         if (!reserve_pmc_hardware())
                                 err = -EBUSY;
                         else
                                 err = reserve_bts_hardware();
                 }
                 if (!err)
-                        atomic_inc(&active_counters);
+                        atomic_inc(&active_events);
                 mutex_unlock(&pmc_reserve_mutex);
         }
         if (err)
                 return err;
 
+        event->destroy = hw_perf_event_destroy;
+
         /*
          * Generate PMC IRQs:
          * (keep 'enabled' bit clear for now)
@@ -946,17 +948,15 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
                 /*
                  * If we have a PMU initialized but no APIC
                  * interrupts, we cannot sample hardware
-                 * counters (user-space has to fall back and
-                 * sample via a hrtimer based software counter):
+                 * events (user-space has to fall back and
+                 * sample via a hrtimer based software event):
                  */
                 if (!x86_pmu.apic)
                         return -EOPNOTSUPP;
         }
 
-        counter->destroy = hw_perf_counter_destroy;
-
         /*
-         * Raw event type provide the config in the event structure
+         * Raw hw_event type provide the config in the hw_event structure
          */
         if (attr->type == PERF_TYPE_RAW) {
                 hwc->config |= x86_pmu.raw_event(attr->config);
@@ -1001,7 +1001,7 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
 
 static void p6_pmu_disable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         u64 val;
 
         if (!cpuc->enabled)
@@ -1018,7 +1018,7 @@ static void p6_pmu_disable_all(void)
 
 static void intel_pmu_disable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 
         if (!cpuc->enabled)
                 return;
@@ -1034,7 +1034,7 @@ static void intel_pmu_disable_all(void)
 
 static void amd_pmu_disable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         int idx;
 
         if (!cpuc->enabled)
@@ -1043,12 +1043,12 @@ static void amd_pmu_disable_all(void)
         cpuc->enabled = 0;
         /*
          * ensure we write the disable before we start disabling the
-         * counters proper, so that amd_pmu_enable_counter() does the
+         * events proper, so that amd_pmu_enable_event() does the
          * right thing.
          */
         barrier();
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 u64 val;
 
                 if (!test_bit(idx, cpuc->active_mask))
@@ -1070,7 +1070,7 @@ void hw_perf_disable(void)
 
 static void p6_pmu_enable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         unsigned long val;
 
         if (cpuc->enabled)
@@ -1087,7 +1087,7 @@ static void p6_pmu_enable_all(void)
 
 static void intel_pmu_enable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 
         if (cpuc->enabled)
                 return;
@@ -1098,19 +1098,19 @@ static void intel_pmu_enable_all(void)
         wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
 
         if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) {
-                struct perf_counter *counter =
-                        cpuc->counters[X86_PMC_IDX_FIXED_BTS];
+                struct perf_event *event =
+                        cpuc->events[X86_PMC_IDX_FIXED_BTS];
 
-                if (WARN_ON_ONCE(!counter))
+                if (WARN_ON_ONCE(!event))
                         return;
 
-                intel_pmu_enable_bts(counter->hw.config);
+                intel_pmu_enable_bts(event->hw.config);
         }
 }
 
 static void amd_pmu_enable_all(void)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         int idx;
 
         if (cpuc->enabled)
@@ -1119,14 +1119,14 @@ static void amd_pmu_enable_all(void)
         cpuc->enabled = 1;
         barrier();
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
-                struct perf_counter *counter = cpuc->counters[idx];
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
+                struct perf_event *event = cpuc->events[idx];
                 u64 val;
 
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
 
-                val = counter->hw.config;
+                val = event->hw.config;
                 val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
                 wrmsrl(MSR_K7_EVNTSEL0 + idx, val);
         }
@@ -1153,19 +1153,19 @@ static inline void intel_pmu_ack_status(u64 ack)
         wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);
 }
 
-static inline void x86_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static inline void x86_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
         (void)checking_wrmsrl(hwc->config_base + idx,
                               hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE);
 }
 
-static inline void x86_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
         (void)checking_wrmsrl(hwc->config_base + idx, hwc->config);
 }
 
 static inline void
-intel_pmu_disable_fixed(struct hw_perf_counter *hwc, int __idx)
+intel_pmu_disable_fixed(struct hw_perf_event *hwc, int __idx)
 {
         int idx = __idx - X86_PMC_IDX_FIXED;
         u64 ctrl_val, mask;
@@ -1178,10 +1178,10 @@ intel_pmu_disable_fixed(struct hw_perf_counter *hwc, int __idx)
 }
 
 static inline void
-p6_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+p6_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        u64 val = P6_NOP_COUNTER;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        u64 val = P6_NOP_EVENT;
 
         if (cpuc->enabled)
                 val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
@@ -1190,7 +1190,7 @@ p6_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
 }
 
 static inline void
-intel_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+intel_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
         if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
                 intel_pmu_disable_bts();
@@ -1202,24 +1202,24 @@ intel_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
                 return;
         }
 
-        x86_pmu_disable_counter(hwc, idx);
+        x86_pmu_disable_event(hwc, idx);
 }
 
 static inline void
-amd_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+amd_pmu_disable_event(struct hw_perf_event *hwc, int idx)
 {
-        x86_pmu_disable_counter(hwc, idx);
+        x86_pmu_disable_event(hwc, idx);
 }
 
 static DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left);
 
 /*
  * Set the next IRQ period, based on the hwc->period_left value.
- * To be called with the counter disabled in hw:
+ * To be called with the event disabled in hw:
  */
 static int
-x86_perf_counter_set_period(struct perf_counter *counter,
-                             struct hw_perf_counter *hwc, int idx)
+x86_perf_event_set_period(struct perf_event *event,
+                             struct hw_perf_event *hwc, int idx)
 {
         s64 left = atomic64_read(&hwc->period_left);
         s64 period = hwc->sample_period;
@@ -1245,7 +1245,7 @@ x86_perf_counter_set_period(struct perf_counter *counter,
                 ret = 1;
         }
         /*
-         * Quirk: certain CPUs dont like it if just 1 event is left:
+         * Quirk: certain CPUs dont like it if just 1 hw_event is left:
          */
         if (unlikely(left < 2))
                 left = 2;
@@ -1256,21 +1256,21 @@ x86_perf_counter_set_period(struct perf_counter *counter,
         per_cpu(pmc_prev_left[idx], smp_processor_id()) = left;
 
         /*
-         * The hw counter starts counting from this counter offset,
+         * The hw event starts counting from this event offset,
          * mark it to be able to extra future deltas:
          */
         atomic64_set(&hwc->prev_count, (u64)-left);
 
-        err = checking_wrmsrl(hwc->counter_base + idx,
-                             (u64)(-left) & x86_pmu.counter_mask);
+        err = checking_wrmsrl(hwc->event_base + idx,
+                             (u64)(-left) & x86_pmu.event_mask);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 
         return ret;
 }
 
 static inline void
-intel_pmu_enable_fixed(struct hw_perf_counter *hwc, int __idx)
+intel_pmu_enable_fixed(struct hw_perf_event *hwc, int __idx)
 {
         int idx = __idx - X86_PMC_IDX_FIXED;
         u64 ctrl_val, bits, mask;
@@ -1295,9 +1295,9 @@ intel_pmu_enable_fixed(struct hw_perf_counter *hwc, int __idx)
         err = checking_wrmsrl(hwc->config_base, ctrl_val);
 }
 
-static void p6_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static void p6_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
         u64 val;
 
         val = hwc->config;
@@ -1308,10 +1308,10 @@ static void p6_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
 }
 
 
-static void intel_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static void intel_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
         if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
-                if (!__get_cpu_var(cpu_hw_counters).enabled)
+                if (!__get_cpu_var(cpu_hw_events).enabled)
                         return;
 
                 intel_pmu_enable_bts(hwc->config);
@@ -1323,134 +1323,134 @@ static void intel_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
                 return;
         }
 
-        x86_pmu_enable_counter(hwc, idx);
+        x86_pmu_enable_event(hwc, idx);
 }
 
-static void amd_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+static void amd_pmu_enable_event(struct hw_perf_event *hwc, int idx)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
 
         if (cpuc->enabled)
-                x86_pmu_enable_counter(hwc, idx);
+                x86_pmu_enable_event(hwc, idx);
 }
 
 static int
-fixed_mode_idx(struct perf_counter *counter, struct hw_perf_counter *hwc)
+fixed_mode_idx(struct perf_event *event, struct hw_perf_event *hwc)
 {
-        unsigned int event;
+        unsigned int hw_event;
 
-        event = hwc->config & ARCH_PERFMON_EVENT_MASK;
+        hw_event = hwc->config & ARCH_PERFMON_EVENT_MASK;
 
-        if (unlikely((event ==
+        if (unlikely((hw_event ==
                       x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS)) &&
                      (hwc->sample_period == 1)))
                 return X86_PMC_IDX_FIXED_BTS;
 
-        if (!x86_pmu.num_counters_fixed)
+        if (!x86_pmu.num_events_fixed)
                 return -1;
 
-        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS)))
+        if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS)))
                 return X86_PMC_IDX_FIXED_INSTRUCTIONS;
-        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_CPU_CYCLES)))
+        if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_CPU_CYCLES)))
                 return X86_PMC_IDX_FIXED_CPU_CYCLES;
-        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_BUS_CYCLES)))
+        if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_BUS_CYCLES)))
                 return X86_PMC_IDX_FIXED_BUS_CYCLES;
 
         return -1;
 }
 
 /*
- * Find a PMC slot for the freshly enabled / scheduled in counter:
+ * Find a PMC slot for the freshly enabled / scheduled in event:
  */
-static int x86_pmu_enable(struct perf_counter *counter)
+static int x86_pmu_enable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         int idx;
 
-        idx = fixed_mode_idx(counter, hwc);
+        idx = fixed_mode_idx(event, hwc);
         if (idx == X86_PMC_IDX_FIXED_BTS) {
                 /* BTS is already occupied. */
                 if (test_and_set_bit(idx, cpuc->used_mask))
                         return -EAGAIN;
 
                 hwc->config_base        = 0;
-                hwc->counter_base       = 0;
+                hwc->event_base = 0;
                 hwc->idx                = idx;
         } else if (idx >= 0) {
                 /*
-                 * Try to get the fixed counter, if that is already taken
-                 * then try to get a generic counter:
+                 * Try to get the fixed event, if that is already taken
+                 * then try to get a generic event:
                  */
                 if (test_and_set_bit(idx, cpuc->used_mask))
                         goto try_generic;
 
                 hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;
                 /*
-                 * We set it so that counter_base + idx in wrmsr/rdmsr maps to
+                 * We set it so that event_base + idx in wrmsr/rdmsr maps to
                  * MSR_ARCH_PERFMON_FIXED_CTR0 ... CTR2:
                  */
-                hwc->counter_base =
+                hwc->event_base =
                         MSR_ARCH_PERFMON_FIXED_CTR0 - X86_PMC_IDX_FIXED;
                 hwc->idx = idx;
         } else {
                 idx = hwc->idx;
-                /* Try to get the previous generic counter again */
+                /* Try to get the previous generic event again */
                 if (test_and_set_bit(idx, cpuc->used_mask)) {
 try_generic:
                         idx = find_first_zero_bit(cpuc->used_mask,
-                                                  x86_pmu.num_counters);
-                        if (idx == x86_pmu.num_counters)
+                                                  x86_pmu.num_events);
+                        if (idx == x86_pmu.num_events)
                                 return -EAGAIN;
 
                         set_bit(idx, cpuc->used_mask);
                         hwc->idx = idx;
                 }
                 hwc->config_base  = x86_pmu.eventsel;
-                hwc->counter_base = x86_pmu.perfctr;
+                hwc->event_base = x86_pmu.perfctr;
         }
 
-        perf_counters_lapic_init();
+        perf_events_lapic_init();
 
         x86_pmu.disable(hwc, idx);
 
-        cpuc->counters[idx] = counter;
+        cpuc->events[idx] = event;
         set_bit(idx, cpuc->active_mask);
 
-        x86_perf_counter_set_period(counter, hwc, idx);
+        x86_perf_event_set_period(event, hwc, idx);
         x86_pmu.enable(hwc, idx);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 
         return 0;
 }
 
-static void x86_pmu_unthrottle(struct perf_counter *counter)
+static void x86_pmu_unthrottle(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
 
         if (WARN_ON_ONCE(hwc->idx >= X86_PMC_IDX_MAX ||
-                                cpuc->counters[hwc->idx] != counter))
+                                cpuc->events[hwc->idx] != event))
                 return;
 
         x86_pmu.enable(hwc, hwc->idx);
 }
 
-void perf_counter_print_debug(void)
+void perf_event_print_debug(void)
 {
         u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed;
-        struct cpu_hw_counters *cpuc;
+        struct cpu_hw_events *cpuc;
         unsigned long flags;
         int cpu, idx;
 
-        if (!x86_pmu.num_counters)
+        if (!x86_pmu.num_events)
                 return;
 
         local_irq_save(flags);
 
         cpu = smp_processor_id();
-        cpuc = &per_cpu(cpu_hw_counters, cpu);
+        cpuc = &per_cpu(cpu_hw_events, cpu);
 
         if (x86_pmu.version >= 2) {
                 rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);
@@ -1466,7 +1466,7 @@ void perf_counter_print_debug(void)
         }
         pr_info("CPU#%d: used:       %016llx\n", cpu, *(u64 *)cpuc->used_mask);
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 rdmsrl(x86_pmu.eventsel + idx, pmc_ctrl);
                 rdmsrl(x86_pmu.perfctr  + idx, pmc_count);
 
@@ -1479,7 +1479,7 @@ void perf_counter_print_debug(void)
                 pr_info("CPU#%d:   gen-PMC%d left:  %016llx\n",
                         cpu, idx, prev_left);
         }
-        for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events_fixed; idx++) {
                 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count);
 
                 pr_info("CPU#%d: fixed-PMC%d count: %016llx\n",
@@ -1488,8 +1488,7 @@ void perf_counter_print_debug(void)
         local_irq_restore(flags);
 }
 
-static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
-                                       struct perf_sample_data *data)
+static void intel_pmu_drain_bts_buffer(struct cpu_hw_events *cpuc)
 {
         struct debug_store *ds = cpuc->ds;
         struct bts_record {
@@ -1497,11 +1496,14 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
                 u64     to;
                 u64     flags;
         };
-        struct perf_counter *counter = cpuc->counters[X86_PMC_IDX_FIXED_BTS];
-        unsigned long orig_ip = data->regs->ip;
+        struct perf_event *event = cpuc->events[X86_PMC_IDX_FIXED_BTS];
         struct bts_record *at, *top;
+        struct perf_output_handle handle;
+        struct perf_event_header header;
+        struct perf_sample_data data;
+        struct pt_regs regs;
 
-        if (!counter)
+        if (!event)
                 return;
 
         if (!ds)
@@ -1510,26 +1512,45 @@ static void intel_pmu_drain_bts_buffer(struct cpu_hw_counters *cpuc,
         at  = (struct bts_record *)(unsigned long)ds->bts_buffer_base;
         top = (struct bts_record *)(unsigned long)ds->bts_index;
 
+        if (top <= at)
+                return;
+
         ds->bts_index = ds->bts_buffer_base;
 
+
+        data.period     = event->hw.last_period;
+        data.addr       = 0;
+        regs.ip         = 0;
+
+        /*
+         * Prepare a generic sample, i.e. fill in the invariant fields.
+         * We will overwrite the from and to address before we output
+         * the sample.
+         */
+        perf_prepare_sample(&header, &data, event, &regs);
+
+        if (perf_output_begin(&handle, event,
+                              header.size * (top - at), 1, 1))
+                return;
+
         for (; at < top; at++) {
-                data->regs->ip  = at->from;
-                data->addr      = at->to;
+                data.ip         = at->from;
+                data.addr       = at->to;
 
-                perf_counter_output(counter, 1, data);
+                perf_output_sample(&handle, &header, &data, event);
         }
 
-        data->regs->ip  = orig_ip;
-        data->addr      = 0;
+        perf_output_end(&handle);
 
         /* There's new data available. */
-        counter->pending_kill = POLL_IN;
+        event->hw.interrupts++;
+        event->pending_kill = POLL_IN;
 }
 
-static void x86_pmu_disable(struct perf_counter *counter)
+static void x86_pmu_disable(struct perf_event *event)
 {
-        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+        struct hw_perf_event *hwc = &event->hw;
         int idx = hwc->idx;
 
         /*
@@ -1541,67 +1562,63 @@ static void x86_pmu_disable(struct perf_counter *counter)
 
         /*
          * Make sure the cleared pointer becomes visible before we
-         * (potentially) free the counter:
+         * (potentially) free the event:
          */
         barrier();
 
         /*
-         * Drain the remaining delta count out of a counter
+         * Drain the remaining delta count out of a event
          * that we are disabling:
          */
-        x86_perf_counter_update(counter, hwc, idx);
+        x86_perf_event_update(event, hwc, idx);
 
         /* Drain the remaining BTS records. */
-        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS)) {
-                struct perf_sample_data data;
-                struct pt_regs regs;
+        if (unlikely(idx == X86_PMC_IDX_FIXED_BTS))
+                intel_pmu_drain_bts_buffer(cpuc);
 
-                data.regs = &regs;
-                intel_pmu_drain_bts_buffer(cpuc, &data);
-        }
-        cpuc->counters[idx] = NULL;
+        cpuc->events[idx] = NULL;
         clear_bit(idx, cpuc->used_mask);
 
-        perf_counter_update_userpage(counter);
+        perf_event_update_userpage(event);
 }
 
 /*
- * Save and restart an expired counter. Called by NMI contexts,
- * so it has to be careful about preempting normal counter ops:
+ * Save and restart an expired event. Called by NMI contexts,
+ * so it has to be careful about preempting normal event ops:
  */
-static int intel_pmu_save_and_restart(struct perf_counter *counter)
+static int intel_pmu_save_and_restart(struct perf_event *event)
 {
-        struct hw_perf_counter *hwc = &counter->hw;
+        struct hw_perf_event *hwc = &event->hw;
         int idx = hwc->idx;
         int ret;
 
-        x86_perf_counter_update(counter, hwc, idx);
-        ret = x86_perf_counter_set_period(counter, hwc, idx);
+        x86_perf_event_update(event, hwc, idx);
+        ret = x86_perf_event_set_period(event, hwc, idx);
 
-        if (counter->state == PERF_COUNTER_STATE_ACTIVE)
-                intel_pmu_enable_counter(hwc, idx);
+        if (event->state == PERF_EVENT_STATE_ACTIVE)
+                intel_pmu_enable_event(hwc, idx);
 
         return ret;
 }
 
 static void intel_pmu_reset(void)
 {
-        struct debug_store *ds = __get_cpu_var(cpu_hw_counters).ds;
+        struct debug_store *ds = __get_cpu_var(cpu_hw_events).ds;
         unsigned long flags;
         int idx;
 
-        if (!x86_pmu.num_counters)
+        if (!x86_pmu.num_events)
                 return;
 
         local_irq_save(flags);
 
         printk("clearing PMU state on CPU#%d\n", smp_processor_id());
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 checking_wrmsrl(x86_pmu.eventsel + idx, 0ull);
                 checking_wrmsrl(x86_pmu.perfctr  + idx, 0ull);
         }
-        for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events_fixed; idx++) {
                 checking_wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull);
         }
         if (ds)
@@ -1613,39 +1630,38 @@ static void intel_pmu_reset(void)
 static int p6_pmu_handle_irq(struct pt_regs *regs)
 {
         struct perf_sample_data data;
-        struct cpu_hw_counters *cpuc;
-        struct perf_counter *counter;
-        struct hw_perf_counter *hwc;
+        struct cpu_hw_events *cpuc;
+        struct perf_event *event;
+        struct hw_perf_event *hwc;
         int idx, handled = 0;
         u64 val;
 
-        data.regs = regs;
         data.addr = 0;
 
-        cpuc = &__get_cpu_var(cpu_hw_counters);
+        cpuc = &__get_cpu_var(cpu_hw_events);
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
 
-                counter = cpuc->counters[idx];
-                hwc = &counter->hw;
+                event = cpuc->events[idx];
+                hwc = &event->hw;
 
-                val = x86_perf_counter_update(counter, hwc, idx);
-                if (val & (1ULL << (x86_pmu.counter_bits - 1)))
+                val = x86_perf_event_update(event, hwc, idx);
+                if (val & (1ULL << (x86_pmu.event_bits - 1)))
                         continue;
 
                 /*
-                 * counter overflow
+                 * event overflow
                  */
                 handled         = 1;
-                data.period     = counter->hw.last_period;
+                data.period     = event->hw.last_period;
 
-                if (!x86_perf_counter_set_period(counter, hwc, idx))
+                if (!x86_perf_event_set_period(event, hwc, idx))
                         continue;
 
-                if (perf_counter_overflow(counter, 1, &data))
-                        p6_pmu_disable_counter(hwc, idx);
+                if (perf_event_overflow(event, 1, &data, regs))
+                        p6_pmu_disable_event(hwc, idx);
         }
 
         if (handled)
@@ -1661,17 +1677,16 @@ static int p6_pmu_handle_irq(struct pt_regs *regs)
 static int intel_pmu_handle_irq(struct pt_regs *regs)
 {
         struct perf_sample_data data;
-        struct cpu_hw_counters *cpuc;
+        struct cpu_hw_events *cpuc;
         int bit, loops;
         u64 ack, status;
 
-        data.regs = regs;
         data.addr = 0;
 
-        cpuc = &__get_cpu_var(cpu_hw_counters);
+        cpuc = &__get_cpu_var(cpu_hw_events);
 
         perf_disable();
-        intel_pmu_drain_bts_buffer(cpuc, &data);
+        intel_pmu_drain_bts_buffer(cpuc);
         status = intel_pmu_get_status();
         if (!status) {
                 perf_enable();
@@ -1681,8 +1696,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
         loops = 0;
 again:
         if (++loops > 100) {
-                WARN_ONCE(1, "perfcounters: irq loop stuck!\n");
-                perf_counter_print_debug();
+                WARN_ONCE(1, "perfevents: irq loop stuck!\n");
+                perf_event_print_debug();
                 intel_pmu_reset();
                 perf_enable();
                 return 1;
@@ -1691,19 +1706,19 @@ again:
         inc_irq_stat(apic_perf_irqs);
         ack = status;
         for_each_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
-                struct perf_counter *counter = cpuc->counters[bit];
+                struct perf_event *event = cpuc->events[bit];
 
                 clear_bit(bit, (unsigned long *) &status);
                 if (!test_bit(bit, cpuc->active_mask))
                         continue;
 
-                if (!intel_pmu_save_and_restart(counter))
+                if (!intel_pmu_save_and_restart(event))
                         continue;
 
-                data.period = counter->hw.last_period;
+                data.period = event->hw.last_period;
 
-                if (perf_counter_overflow(counter, 1, &data))
-                        intel_pmu_disable_counter(&counter->hw, bit);
+                if (perf_event_overflow(event, 1, &data, regs))
+                        intel_pmu_disable_event(&event->hw, bit);
         }
 
         intel_pmu_ack_status(ack);
@@ -1723,39 +1738,38 @@ again:
 static int amd_pmu_handle_irq(struct pt_regs *regs)
 {
         struct perf_sample_data data;
-        struct cpu_hw_counters *cpuc;
-        struct perf_counter *counter;
-        struct hw_perf_counter *hwc;
+        struct cpu_hw_events *cpuc;
+        struct perf_event *event;
+        struct hw_perf_event *hwc;
         int idx, handled = 0;
         u64 val;
 
-        data.regs = regs;
         data.addr = 0;
 
-        cpuc = &__get_cpu_var(cpu_hw_counters);
+        cpuc = &__get_cpu_var(cpu_hw_events);
 
-        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+        for (idx = 0; idx < x86_pmu.num_events; idx++) {
                 if (!test_bit(idx, cpuc->active_mask))
                         continue;
 
-                counter = cpuc->counters[idx];
-                hwc = &counter->hw;
+                event = cpuc->events[idx];
+                hwc = &event->hw;
 
-                val = x86_perf_counter_update(counter, hwc, idx);
-                if (val & (1ULL << (x86_pmu.counter_bits - 1)))
+                val = x86_perf_event_update(event, hwc, idx);
+                if (val & (1ULL << (x86_pmu.event_bits - 1)))
                         continue;
 
                 /*
-                 * counter overflow
+                 * event overflow
                  */
                 handled         = 1;
-                data.period     = counter->hw.last_period;
+                data.period     = event->hw.last_period;
 
-                if (!x86_perf_counter_set_period(counter, hwc, idx))
+                if (!x86_perf_event_set_period(event, hwc, idx))
                         continue;
 
-                if (perf_counter_overflow(counter, 1, &data))
-                        amd_pmu_disable_counter(hwc, idx);
+                if (perf_event_overflow(event, 1, &data, regs))
+                        amd_pmu_disable_event(hwc, idx);
         }
 
         if (handled)
@@ -1769,18 +1783,18 @@ void smp_perf_pending_interrupt(struct pt_regs *regs)
         irq_enter();
         ack_APIC_irq();
         inc_irq_stat(apic_pending_irqs);
-        perf_counter_do_pending();
+        perf_event_do_pending();
         irq_exit();
 }
 
-void set_perf_counter_pending(void)
+void set_perf_event_pending(void)
 {
 #ifdef CONFIG_X86_LOCAL_APIC
         apic->send_IPI_self(LOCAL_PENDING_VECTOR);
 #endif
 }
 
-void perf_counters_lapic_init(void)
+void perf_events_lapic_init(void)
 {
 #ifdef CONFIG_X86_LOCAL_APIC
         if (!x86_pmu.apic || !x86_pmu_initialized())
@@ -1794,13 +1808,13 @@ void perf_counters_lapic_init(void)
 }
 
 static int __kprobes
-perf_counter_nmi_handler(struct notifier_block *self,
+perf_event_nmi_handler(struct notifier_block *self,
                          unsigned long cmd, void *__args)
 {
         struct die_args *args = __args;
         struct pt_regs *regs;
 
-        if (!atomic_read(&active_counters))
+        if (!atomic_read(&active_events))
                 return NOTIFY_DONE;
 
         switch (cmd) {
@@ -1819,7 +1833,7 @@ perf_counter_nmi_handler(struct notifier_block *self,
 #endif
         /*
          * Can't rely on the handled return value to say it was our NMI, two
-         * counters could trigger 'simultaneously' raising two back-to-back NMIs.
+         * events could trigger 'simultaneously' raising two back-to-back NMIs.
          *
          * If the first NMI handles both, the latter will be empty and daze
          * the CPU.
@@ -1829,8 +1843,8 @@ perf_counter_nmi_handler(struct notifier_block *self,
         return NOTIFY_STOP;
 }
 
-static __read_mostly struct notifier_block perf_counter_nmi_notifier = {
-        .notifier_call          = perf_counter_nmi_handler,
+static __read_mostly struct notifier_block perf_event_nmi_notifier = {
+        .notifier_call          = perf_event_nmi_handler,
         .next                   = NULL,
         .priority               = 1
 };
@@ -1840,8 +1854,8 @@ static struct x86_pmu p6_pmu = {
         .handle_irq             = p6_pmu_handle_irq,
         .disable_all            = p6_pmu_disable_all,
         .enable_all             = p6_pmu_enable_all,
-        .enable                 = p6_pmu_enable_counter,
-        .disable                = p6_pmu_disable_counter,
+        .enable                 = p6_pmu_enable_event,
+        .disable                = p6_pmu_disable_event,
         .eventsel               = MSR_P6_EVNTSEL0,
         .perfctr                = MSR_P6_PERFCTR0,
         .event_map              = p6_pmu_event_map,
@@ -1850,16 +1864,16 @@ static struct x86_pmu p6_pmu = {
         .apic                   = 1,
         .max_period             = (1ULL << 31) - 1,
         .version                = 0,
-        .num_counters           = 2,
+        .num_events             = 2,
         /*
-         * Counters have 40 bits implemented. However they are designed such
+         * Events have 40 bits implemented. However they are designed such
          * that bits [32-39] are sign extensions of bit 31. As such the
-         * effective width of a counter for P6-like PMU is 32 bits only.
+         * effective width of a event for P6-like PMU is 32 bits only.
          *
          * See IA-32 Intel Architecture Software developer manual Vol 3B
          */
-        .counter_bits           = 32,
-        .counter_mask           = (1ULL << 32) - 1,
+        .event_bits             = 32,
+        .event_mask             = (1ULL << 32) - 1,
 };
 
 static struct x86_pmu intel_pmu = {
@@ -1867,8 +1881,8 @@ static struct x86_pmu intel_pmu = {
         .handle_irq             = intel_pmu_handle_irq,
         .disable_all            = intel_pmu_disable_all,
         .enable_all             = intel_pmu_enable_all,
-        .enable                 = intel_pmu_enable_counter,
-        .disable                = intel_pmu_disable_counter,
+        .enable                 = intel_pmu_enable_event,
+        .disable                = intel_pmu_disable_event,
         .eventsel               = MSR_ARCH_PERFMON_EVENTSEL0,
         .perfctr                = MSR_ARCH_PERFMON_PERFCTR0,
         .event_map              = intel_pmu_event_map,
@@ -1878,7 +1892,7 @@ static struct x86_pmu intel_pmu = {
         /*
          * Intel PMCs cannot be accessed sanely above 32 bit width,
          * so we install an artificial 1<<31 period regardless of
-         * the generic counter period:
+         * the generic event period:
          */
         .max_period             = (1ULL << 31) - 1,
         .enable_bts             = intel_pmu_enable_bts,
@@ -1890,16 +1904,16 @@ static struct x86_pmu amd_pmu = {
         .handle_irq             = amd_pmu_handle_irq,
         .disable_all            = amd_pmu_disable_all,
         .enable_all             = amd_pmu_enable_all,
-        .enable                 = amd_pmu_enable_counter,
-        .disable                = amd_pmu_disable_counter,
+        .enable                 = amd_pmu_enable_event,
+        .disable                = amd_pmu_disable_event,
         .eventsel               = MSR_K7_EVNTSEL0,
         .perfctr                = MSR_K7_PERFCTR0,
         .event_map              = amd_pmu_event_map,
         .raw_event              = amd_pmu_raw_event,
         .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
-        .num_counters           = 4,
-        .counter_bits           = 48,
-        .counter_mask           = (1ULL << 48) - 1,
+        .num_events             = 4,
+        .event_bits             = 48,
+        .event_mask             = (1ULL << 48) - 1,
         .apic                   = 1,
         /* use highest bit to detect overflow */
         .max_period             = (1ULL << 47) - 1,
@@ -1956,7 +1970,7 @@ static int intel_pmu_init(void)
 
         /*
          * Check whether the Architectural PerfMon supports
-         * Branch Misses Retired Event or not.
+         * Branch Misses Retired hw_event or not.
          */
         cpuid(10, &eax.full, &ebx, &unused, &edx.full);
         if (eax.split.mask_length <= ARCH_PERFMON_BRANCH_MISSES_RETIRED)
@@ -1968,15 +1982,15 @@ static int intel_pmu_init(void)
 
         x86_pmu                         = intel_pmu;
         x86_pmu.version                 = version;
-        x86_pmu.num_counters            = eax.split.num_counters;
-        x86_pmu.counter_bits            = eax.split.bit_width;
-        x86_pmu.counter_mask            = (1ULL << eax.split.bit_width) - 1;
+        x86_pmu.num_events              = eax.split.num_events;
+        x86_pmu.event_bits              = eax.split.bit_width;
+        x86_pmu.event_mask              = (1ULL << eax.split.bit_width) - 1;
 
         /*
-         * Quirk: v2 perfmon does not report fixed-purpose counters, so
-         * assume at least 3 counters:
+         * Quirk: v2 perfmon does not report fixed-purpose events, so
+         * assume at least 3 events:
          */
-        x86_pmu.num_counters_fixed      = max((int)edx.split.num_counters_fixed, 3);
+        x86_pmu.num_events_fixed        = max((int)edx.split.num_events_fixed, 3);
 
         /*
          * Install the hw-cache-events table:
@@ -2023,11 +2037,11 @@ static int amd_pmu_init(void)
         return 0;
 }
 
-void __init init_hw_perf_counters(void)
+void __init init_hw_perf_events(void)
 {
         int err;
 
-        pr_info("Performance Counters: ");
+        pr_info("Performance Events: ");
 
         switch (boot_cpu_data.x86_vendor) {
         case X86_VENDOR_INTEL:
@@ -2040,45 +2054,45 @@ void __init init_hw_perf_counters(void)
                 return;
         }
         if (err != 0) {
-                pr_cont("no PMU driver, software counters only.\n");
+                pr_cont("no PMU driver, software events only.\n");
                 return;
         }
 
         pr_cont("%s PMU driver.\n", x86_pmu.name);
 
-        if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) {
-                WARN(1, KERN_ERR "hw perf counters %d > max(%d), clipping!",
-                     x86_pmu.num_counters, X86_PMC_MAX_GENERIC);
-                x86_pmu.num_counters = X86_PMC_MAX_GENERIC;
+        if (x86_pmu.num_events > X86_PMC_MAX_GENERIC) {
+                WARN(1, KERN_ERR "hw perf events %d > max(%d), clipping!",
+                     x86_pmu.num_events, X86_PMC_MAX_GENERIC);
+                x86_pmu.num_events = X86_PMC_MAX_GENERIC;
         }
-        perf_counter_mask = (1 << x86_pmu.num_counters) - 1;
-        perf_max_counters = x86_pmu.num_counters;
+        perf_event_mask = (1 << x86_pmu.num_events) - 1;
+        perf_max_events = x86_pmu.num_events;
 
-        if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) {
-                WARN(1, KERN_ERR "hw perf counters fixed %d > max(%d), clipping!",
-                     x86_pmu.num_counters_fixed, X86_PMC_MAX_FIXED);
-                x86_pmu.num_counters_fixed = X86_PMC_MAX_FIXED;
+        if (x86_pmu.num_events_fixed > X86_PMC_MAX_FIXED) {
+                WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",
+                     x86_pmu.num_events_fixed, X86_PMC_MAX_FIXED);
+                x86_pmu.num_events_fixed = X86_PMC_MAX_FIXED;
         }
 
-        perf_counter_mask |=
-                ((1LL << x86_pmu.num_counters_fixed)-1) << X86_PMC_IDX_FIXED;
-        x86_pmu.intel_ctrl = perf_counter_mask;
+        perf_event_mask |=
+                ((1LL << x86_pmu.num_events_fixed)-1) << X86_PMC_IDX_FIXED;
+        x86_pmu.intel_ctrl = perf_event_mask;
 
-        perf_counters_lapic_init();
-        register_die_notifier(&perf_counter_nmi_notifier);
+        perf_events_lapic_init();
+        register_die_notifier(&perf_event_nmi_notifier);
 
-        pr_info("... version:                 %d\n",     x86_pmu.version);
-        pr_info("... bit width:               %d\n",     x86_pmu.counter_bits);
-        pr_info("... generic counters:        %d\n",     x86_pmu.num_counters);
-        pr_info("... value mask:              %016Lx\n", x86_pmu.counter_mask);
-        pr_info("... max period:              %016Lx\n", x86_pmu.max_period);
-        pr_info("... fixed-purpose counters:  %d\n",     x86_pmu.num_counters_fixed);
-        pr_info("... counter mask:            %016Lx\n", perf_counter_mask);
+        pr_info("... version:                %d\n",     x86_pmu.version);
+        pr_info("... bit width:              %d\n",     x86_pmu.event_bits);
+        pr_info("... generic registers:      %d\n",     x86_pmu.num_events);
+        pr_info("... value mask:             %016Lx\n", x86_pmu.event_mask);
+        pr_info("... max period:             %016Lx\n", x86_pmu.max_period);
+        pr_info("... fixed-purpose events:   %d\n",     x86_pmu.num_events_fixed);
+        pr_info("... event mask:             %016Lx\n", perf_event_mask);
 }
 
-static inline void x86_pmu_read(struct perf_counter *counter)
+static inline void x86_pmu_read(struct perf_event *event)
 {
-        x86_perf_counter_update(counter, &counter->hw, counter->hw.idx);
+        x86_perf_event_update(event, &event->hw, event->hw.idx);
 }
 
 static const struct pmu pmu = {
@@ -2088,13 +2102,16 @@ static const struct pmu pmu = {
         .unthrottle     = x86_pmu_unthrottle,
 };
 
-const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
+const struct pmu *hw_perf_event_init(struct perf_event *event)
 {
         int err;
 
-        err = __hw_perf_counter_init(counter);
-        if (err)
+        err = __hw_perf_event_init(event);
+        if (err) {
+                if (event->destroy)
+                        event->destroy(event);
                 return ERR_PTR(err);
+        }
 
         return &pmu;
 }
@@ -2275,7 +2292,7 @@ struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
         return entry;
 }
 
-void hw_perf_counter_setup_online(int cpu)
+void hw_perf_event_setup_online(int cpu)
 {
         init_debug_store_on_cpu(cpu);
 }
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 392bea43b890..fab786f60ed6 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -20,7 +20,7 @@
 #include <linux/kprobes.h>
 
 #include <asm/apic.h>
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
 
 struct nmi_watchdog_ctlblk {
         unsigned int cccr_msr;
diff --git a/arch/x86/kernel/cpu/sched.c b/arch/x86/kernel/cpu/sched.c
new file mode 100644
index 000000000000..a640ae5ad201
--- /dev/null
+++ b/arch/x86/kernel/cpu/sched.c
@@ -0,0 +1,55 @@
+#include <linux/sched.h>
+#include <linux/math64.h>
+#include <linux/percpu.h>
+#include <linux/irqflags.h>
+
+#include <asm/cpufeature.h>
+#include <asm/processor.h>
+
+#ifdef CONFIG_SMP
+
+static DEFINE_PER_CPU(struct aperfmperf, old_perf_sched);
+
+static unsigned long scale_aperfmperf(void)
+{
+        struct aperfmperf val, *old = &__get_cpu_var(old_perf_sched);
+        unsigned long ratio, flags;
+
+        local_irq_save(flags);
+        get_aperfmperf(&val);
+        local_irq_restore(flags);
+
+        ratio = calc_aperfmperf_ratio(old, &val);
+        *old = val;
+
+        return ratio;
+}
+
+unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu)
+{
+        /*
+         * do aperf/mperf on the cpu level because it includes things
+         * like turbo mode, which are relevant to full cores.
+         */
+        if (boot_cpu_has(X86_FEATURE_APERFMPERF))
+                return scale_aperfmperf();
+
+        /*
+         * maybe have something cpufreq here
+         */
+
+        return default_scale_freq_power(sd, cpu);
+}
+
+unsigned long arch_scale_smt_power(struct sched_domain *sd, int cpu)
+{
+        /*
+         * aperf/mperf already includes the smt gain
+         */
+        if (boot_cpu_has(X86_FEATURE_APERFMPERF))
+                return SCHED_LOAD_SCALE;
+
+        return default_scale_smt_power(sd, cpu);
+}
+
+#endif
diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c
index bc24f514ec93..1cbed97b59cf 100644
--- a/arch/x86/kernel/cpu/vmware.c
+++ b/arch/x86/kernel/cpu/vmware.c
@@ -24,6 +24,7 @@
 #include <linux/dmi.h>
 #include <asm/div64.h>
 #include <asm/vmware.h>
+#include <asm/x86_init.h>
 
 #define CPUID_VMWARE_INFO_LEAF  0x40000000
 #define VMWARE_HYPERVISOR_MAGIC 0x564D5868
@@ -47,21 +48,35 @@ static inline int __vmware_platform(void)
         return eax != (uint32_t)-1 && ebx == VMWARE_HYPERVISOR_MAGIC;
 }
 
-static unsigned long __vmware_get_tsc_khz(void)
+static unsigned long vmware_get_tsc_khz(void)
 {
         uint64_t tsc_hz;
         uint32_t eax, ebx, ecx, edx;
 
         VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
 
-        if (ebx == UINT_MAX)
-                return 0;
         tsc_hz = eax | (((uint64_t)ebx) << 32);
         do_div(tsc_hz, 1000);
         BUG_ON(tsc_hz >> 32);
+        printk(KERN_INFO "TSC freq read from hypervisor : %lu.%03lu MHz\n",
+                         (unsigned long) tsc_hz / 1000,
+                         (unsigned long) tsc_hz % 1000);
         return tsc_hz;
 }
 
+void __init vmware_platform_setup(void)
+{
+        uint32_t eax, ebx, ecx, edx;
+
+        VMWARE_PORT(GETHZ, eax, ebx, ecx, edx);
+
+        if (ebx != UINT_MAX)
+                x86_platform.calibrate_tsc = vmware_get_tsc_khz;
+        else
+                printk(KERN_WARNING
+                       "Failed to get TSC freq from the hypervisor\n");
+}
+
 /*
  * While checking the dmi string infomation, just checking the product
  * serial key should be enough, as this will always have a VMware
@@ -87,12 +102,6 @@ int vmware_platform(void)
         return 0;
 }
 
-unsigned long vmware_get_tsc_khz(void)
-{
-        BUG_ON(!vmware_platform());
-        return __vmware_get_tsc_khz();
-}
-
 /*
  * VMware hypervisor takes care of exporting a reliable TSC to the guest.
  * Still, due to timing difference when running on virtual cpus, the TSC can
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c
index b07af8861244..6a52d4b36a30 100644
--- a/arch/x86/kernel/cpuid.c
+++ b/arch/x86/kernel/cpuid.c
@@ -182,7 +182,7 @@ static struct notifier_block __refdata cpuid_class_cpu_notifier =
         .notifier_call = cpuid_class_cpu_callback,
 };
 
-static char *cpuid_nodename(struct device *dev)
+static char *cpuid_devnode(struct device *dev, mode_t *mode)
 {
         return kasprintf(GFP_KERNEL, "cpu/%u/cpuid", MINOR(dev->devt));
 }
@@ -203,7 +203,7 @@ static int __init cpuid_init(void)
                 err = PTR_ERR(cpuid_class);
                 goto out_chrdev;
         }
-        cpuid_class->nodename = cpuid_nodename;
+        cpuid_class->devnode = cpuid_devnode;
         for_each_online_cpu(i) {
                 err = cpuid_device_create(i);
                 if (err != 0)
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index bca5fba91c9e..f7dd2a7c3bf4 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -5,7 +5,6 @@
 #include <linux/kallsyms.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
-#include <linux/utsname.h>
 #include <linux/hardirq.h>
 #include <linux/kdebug.h>
 #include <linux/module.h>
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 54b0a3276766..a071e6be177e 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -5,7 +5,6 @@
 #include <linux/kallsyms.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
-#include <linux/utsname.h>
 #include <linux/hardirq.h>
 #include <linux/kdebug.h>
 #include <linux/module.h>
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 147005a1cc3c..85419bb7d4ab 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1331,7 +1331,7 @@ void __init e820_reserve_resources(void)
         struct resource *res;
         u64 end;
 
-        res = alloc_bootmem_low(sizeof(struct resource) * e820.nr_map);
+        res = alloc_bootmem(sizeof(struct resource) * e820.nr_map);
         e820_res = res;
         for (i = 0; i < e820.nr_map; i++) {
                 end = e820.map[i].addr + e820.map[i].size - 1;
@@ -1455,28 +1455,11 @@ char *__init default_machine_specific_memory_setup(void)
         return who;
 }
 
-char *__init __attribute__((weak)) machine_specific_memory_setup(void)
-{
-        if (x86_quirks->arch_memory_setup) {
-                char *who = x86_quirks->arch_memory_setup();
-
-                if (who)
-                        return who;
-        }
-        return default_machine_specific_memory_setup();
-}
-
-/* Overridden in paravirt.c if CONFIG_PARAVIRT */
-char * __init __attribute__((weak)) memory_setup(void)
-{
-        return machine_specific_memory_setup();
-}
-
 void __init setup_memory_map(void)
 {
         char *who;
 
-        who = memory_setup();
+        who = x86_init.resources.memory_setup();
         memcpy(&e820_saved, &e820, sizeof(struct e820map));
         printk(KERN_INFO "BIOS-provided physical RAM map:\n");
         e820_print_map(who);
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 335f049d110f..2acfd3fdc0cc 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -160,721 +160,6 @@ static struct console early_serial_console = {
         .index =        -1,
 };
 
-#ifdef CONFIG_EARLY_PRINTK_DBGP
-
-static struct ehci_caps __iomem *ehci_caps;
-static struct ehci_regs __iomem *ehci_regs;
-static struct ehci_dbg_port __iomem *ehci_debug;
-static unsigned int dbgp_endpoint_out;
-
-struct ehci_dev {
-        u32 bus;
-        u32 slot;
-        u32 func;
-};
-
-static struct ehci_dev ehci_dev;
-
-#define USB_DEBUG_DEVNUM 127
-
-#define DBGP_DATA_TOGGLE        0x8800
-
-static inline u32 dbgp_pid_update(u32 x, u32 tok)
-{
-        return ((x ^ DBGP_DATA_TOGGLE) & 0xffff00) | (tok & 0xff);
-}
-
-static inline u32 dbgp_len_update(u32 x, u32 len)
-{
-        return (x & ~0x0f) | (len & 0x0f);
-}
-
-/*
- * USB Packet IDs (PIDs)
- */
-
-/* token */
-#define USB_PID_OUT             0xe1
-#define USB_PID_IN              0x69
-#define USB_PID_SOF             0xa5
-#define USB_PID_SETUP           0x2d
-/* handshake */
-#define USB_PID_ACK             0xd2
-#define USB_PID_NAK             0x5a
-#define USB_PID_STALL           0x1e
-#define USB_PID_NYET            0x96
-/* data */
-#define USB_PID_DATA0           0xc3
-#define USB_PID_DATA1           0x4b
-#define USB_PID_DATA2           0x87
-#define USB_PID_MDATA           0x0f
-/* Special */
-#define USB_PID_PREAMBLE        0x3c
-#define USB_PID_ERR             0x3c
-#define USB_PID_SPLIT           0x78
-#define USB_PID_PING            0xb4
-#define USB_PID_UNDEF_0         0xf0
-
-#define USB_PID_DATA_TOGGLE     0x88
-#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
-
-#define PCI_CAP_ID_EHCI_DEBUG   0xa
-
-#define HUB_ROOT_RESET_TIME     50      /* times are in msec */
-#define HUB_SHORT_RESET_TIME    10
-#define HUB_LONG_RESET_TIME     200
-#define HUB_RESET_TIMEOUT       500
-
-#define DBGP_MAX_PACKET         8
-
-static int dbgp_wait_until_complete(void)
-{
-        u32 ctrl;
-        int loop = 0x100000;
-
-        do {
-                ctrl = readl(&ehci_debug->control);
-                /* Stop when the transaction is finished */
-                if (ctrl & DBGP_DONE)
-                        break;
-        } while (--loop > 0);
-
-        if (!loop)
-                return -1;
-
-        /*
-         * Now that we have observed the completed transaction,
-         * clear the done bit.
-         */
-        writel(ctrl | DBGP_DONE, &ehci_debug->control);
-        return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
-}
-
-static void __init dbgp_mdelay(int ms)
-{
-        int i;
-
-        while (ms--) {
-                for (i = 0; i < 1000; i++)
-                        outb(0x1, 0x80);
-        }
-}
-
-static void dbgp_breath(void)
-{
-        /* Sleep to give the debug port a chance to breathe */
-}
-
-static int dbgp_wait_until_done(unsigned ctrl)
-{
-        u32 pids, lpid;
-        int ret;
-        int loop = 3;
-
-retry:
-        writel(ctrl | DBGP_GO, &ehci_debug->control);
-        ret = dbgp_wait_until_complete();
-        pids = readl(&ehci_debug->pids);
-        lpid = DBGP_PID_GET(pids);
-
-        if (ret < 0)
-                return ret;
-
-        /*
-         * If the port is getting full or it has dropped data
-         * start pacing ourselves, not necessary but it's friendly.
-         */
-        if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
-                dbgp_breath();
-
-        /* If I get a NACK reissue the transmission */
-        if (lpid == USB_PID_NAK) {
-                if (--loop > 0)
-                        goto retry;
-        }
-
-        return ret;
-}
-
-static void dbgp_set_data(const void *buf, int size)
-{
-        const unsigned char *bytes = buf;
-        u32 lo, hi;
-        int i;
-
-        lo = hi = 0;
-        for (i = 0; i < 4 && i < size; i++)
-                lo |= bytes[i] << (8*i);
-        for (; i < 8 && i < size; i++)
-                hi |= bytes[i] << (8*(i - 4));
-        writel(lo, &ehci_debug->data03);
-        writel(hi, &ehci_debug->data47);
-}
-
-static void __init dbgp_get_data(void *buf, int size)
-{
-        unsigned char *bytes = buf;
-        u32 lo, hi;
-        int i;
-
-        lo = readl(&ehci_debug->data03);
-        hi = readl(&ehci_debug->data47);
-        for (i = 0; i < 4 && i < size; i++)
-                bytes[i] = (lo >> (8*i)) & 0xff;
-        for (; i < 8 && i < size; i++)
-                bytes[i] = (hi >> (8*(i - 4))) & 0xff;
-}
-
-static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
-                         const char *bytes, int size)
-{
-        u32 pids, addr, ctrl;
-        int ret;
-
-        if (size > DBGP_MAX_PACKET)
-                return -1;
-
-        addr = DBGP_EPADDR(devnum, endpoint);
-
-        pids = readl(&ehci_debug->pids);
-        pids = dbgp_pid_update(pids, USB_PID_OUT);
-
-        ctrl = readl(&ehci_debug->control);
-        ctrl = dbgp_len_update(ctrl, size);
-        ctrl |= DBGP_OUT;
-        ctrl |= DBGP_GO;
-
-        dbgp_set_data(bytes, size);
-        writel(addr, &ehci_debug->address);
-        writel(pids, &ehci_debug->pids);
-
-        ret = dbgp_wait_until_done(ctrl);
-        if (ret < 0)
-                return ret;
-
-        return ret;
-}
-
-static int __init dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
-                                 int size)
-{
-        u32 pids, addr, ctrl;
-        int ret;
-
-        if (size > DBGP_MAX_PACKET)
-                return -1;
-
-        addr = DBGP_EPADDR(devnum, endpoint);
-
-        pids = readl(&ehci_debug->pids);
-        pids = dbgp_pid_update(pids, USB_PID_IN);
-
-        ctrl = readl(&ehci_debug->control);
-        ctrl = dbgp_len_update(ctrl, size);
-        ctrl &= ~DBGP_OUT;
-        ctrl |= DBGP_GO;
-
-        writel(addr, &ehci_debug->address);
-        writel(pids, &ehci_debug->pids);
-        ret = dbgp_wait_until_done(ctrl);
-        if (ret < 0)
-                return ret;
-
-        if (size > ret)
-                size = ret;
-        dbgp_get_data(data, size);
-        return ret;
-}
-
-static int __init dbgp_control_msg(unsigned devnum, int requesttype,
-        int request, int value, int index, void *data, int size)
-{
-        u32 pids, addr, ctrl;
-        struct usb_ctrlrequest req;
-        int read;
-        int ret;
-
-        read = (requesttype & USB_DIR_IN) != 0;
-        if (size > (read ? DBGP_MAX_PACKET:0))
-                return -1;
-
-        /* Compute the control message */
-        req.bRequestType = requesttype;
-        req.bRequest = request;
-        req.wValue = cpu_to_le16(value);
-        req.wIndex = cpu_to_le16(index);
-        req.wLength = cpu_to_le16(size);
-
-        pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
-        addr = DBGP_EPADDR(devnum, 0);
-
-        ctrl = readl(&ehci_debug->control);
-        ctrl = dbgp_len_update(ctrl, sizeof(req));
-        ctrl |= DBGP_OUT;
-        ctrl |= DBGP_GO;
-
-        /* Send the setup message */
-        dbgp_set_data(&req, sizeof(req));
-        writel(addr, &ehci_debug->address);
-        writel(pids, &ehci_debug->pids);
-        ret = dbgp_wait_until_done(ctrl);
-        if (ret < 0)
-                return ret;
-
-        /* Read the result */
-        return dbgp_bulk_read(devnum, 0, data, size);
-}
-
-
-/* Find a PCI capability */
-static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
-{
-        u8 pos;
-        int bytes;
-
-        if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
-                PCI_STATUS_CAP_LIST))
-                return 0;
-
-        pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
-        for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
-                u8 id;
-
-                pos &= ~3;
-                id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
-                if (id == 0xff)
-                        break;
-                if (id == cap)
-                        return pos;
-
-                pos = read_pci_config_byte(num, slot, func,
-                                                 pos+PCI_CAP_LIST_NEXT);
-        }
-        return 0;
-}
-
-static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
-{
-        u32 class;
-
-        class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
-        if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
-                return 0;
-
-        return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
-}
-
-static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
-{
-        u32 bus, slot, func;
-
-        for (bus = 0; bus < 256; bus++) {
-                for (slot = 0; slot < 32; slot++) {
-                        for (func = 0; func < 8; func++) {
-                                unsigned cap;
-
-                                cap = __find_dbgp(bus, slot, func);
-
-                                if (!cap)
-                                        continue;
-                                if (ehci_num-- != 0)
-                                        continue;
-                                *rbus = bus;
-                                *rslot = slot;
-                                *rfunc = func;
-                                return cap;
-                        }
-                }
-        }
-        return 0;
-}
-
-static int __init ehci_reset_port(int port)
-{
-        u32 portsc;
-        u32 delay_time, delay;
-        int loop;
-
-        /* Reset the usb debug port */
-        portsc = readl(&ehci_regs->port_status[port - 1]);
-        portsc &= ~PORT_PE;
-        portsc |= PORT_RESET;
-        writel(portsc, &ehci_regs->port_status[port - 1]);
-
-        delay = HUB_ROOT_RESET_TIME;
-        for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
-             delay_time += delay) {
-                dbgp_mdelay(delay);
-
-                portsc = readl(&ehci_regs->port_status[port - 1]);
-                if (portsc & PORT_RESET) {
-                        /* force reset to complete */
-                        loop = 2;
-                        writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
-                                &ehci_regs->port_status[port - 1]);
-                        do {
-                                portsc = readl(&ehci_regs->port_status[port-1]);
-                        } while ((portsc & PORT_RESET) && (--loop > 0));
-                }
-
-                /* Device went away? */
-                if (!(portsc & PORT_CONNECT))
-                        return -ENOTCONN;
-
-                /* bomb out completely if something weird happend */
-                if ((portsc & PORT_CSC))
-                        return -EINVAL;
-
-                /* If we've finished resetting, then break out of the loop */
-                if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
-                        return 0;
-        }
-        return -EBUSY;
-}
-
-static int __init ehci_wait_for_port(int port)
-{
-        u32 status;
-        int ret, reps;
-
-        for (reps = 0; reps < 3; reps++) {
-                dbgp_mdelay(100);
-                status = readl(&ehci_regs->status);
-                if (status & STS_PCD) {
-                        ret = ehci_reset_port(port);
-                        if (ret == 0)
-                                return 0;
-                }
-        }
-        return -ENOTCONN;
-}
-
-#ifdef DBGP_DEBUG
-# define dbgp_printk early_printk
-#else
-static inline void dbgp_printk(const char *fmt, ...) { }
-#endif
-
-typedef void (*set_debug_port_t)(int port);
-
-static void __init default_set_debug_port(int port)
-{
-}
-
-static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
-
-static void __init nvidia_set_debug_port(int port)
-{
-        u32 dword;
-        dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
-                                 0x74);
-        dword &= ~(0x0f<<12);
-        dword |= ((port & 0x0f)<<12);
-        write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
-                                 dword);
-        dbgp_printk("set debug port to %d\n", port);
-}
-
-static void __init detect_set_debug_port(void)
-{
-        u32 vendorid;
-
-        vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
-                 0x00);
-
-        if ((vendorid & 0xffff) == 0x10de) {
-                dbgp_printk("using nvidia set_debug_port\n");
-                set_debug_port = nvidia_set_debug_port;
-        }
-}
-
-static int __init ehci_setup(void)
-{
-        struct usb_debug_descriptor dbgp_desc;
-        u32 cmd, ctrl, status, portsc, hcs_params;
-        u32 debug_port, new_debug_port = 0, n_ports;
-        u32  devnum;
-        int ret, i;
-        int loop;
-        int port_map_tried;
-        int playtimes = 3;
-
-try_next_time:
-        port_map_tried = 0;
-
-try_next_port:
-
-        hcs_params = readl(&ehci_caps->hcs_params);
-        debug_port = HCS_DEBUG_PORT(hcs_params);
-        n_ports    = HCS_N_PORTS(hcs_params);
-
-        dbgp_printk("debug_port: %d\n", debug_port);
-        dbgp_printk("n_ports:    %d\n", n_ports);
-
-        for (i = 1; i <= n_ports; i++) {
-                portsc = readl(&ehci_regs->port_status[i-1]);
-                dbgp_printk("portstatus%d: %08x\n", i, portsc);
-        }
-
-        if (port_map_tried && (new_debug_port != debug_port)) {
-                if (--playtimes) {
-                        set_debug_port(new_debug_port);
-                        goto try_next_time;
-                }
-                return -1;
-        }
-
-        loop = 10;
-        /* Reset the EHCI controller */
-        cmd = readl(&ehci_regs->command);
-        cmd |= CMD_RESET;
-        writel(cmd, &ehci_regs->command);
-        do {
-                cmd = readl(&ehci_regs->command);
-        } while ((cmd & CMD_RESET) && (--loop > 0));
-
-        if (!loop) {
-                dbgp_printk("can not reset ehci\n");
-                return -1;
-        }
-        dbgp_printk("ehci reset done\n");
-
-        /* Claim ownership, but do not enable yet */
-        ctrl = readl(&ehci_debug->control);
-        ctrl |= DBGP_OWNER;
-        ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
-        writel(ctrl, &ehci_debug->control);
-
-        /* Start the ehci running */
-        cmd = readl(&ehci_regs->command);
-        cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
-        cmd |= CMD_RUN;
-        writel(cmd, &ehci_regs->command);
-
-        /* Ensure everything is routed to the EHCI */
-        writel(FLAG_CF, &ehci_regs->configured_flag);
-
-        /* Wait until the controller is no longer halted */
-        loop = 10;
-        do {
-                status = readl(&ehci_regs->status);
-        } while ((status & STS_HALT) && (--loop > 0));
-
-        if (!loop) {
-                dbgp_printk("ehci can be started\n");
-                return -1;
-        }
-        dbgp_printk("ehci started\n");
-
-        /* Wait for a device to show up in the debug port */
-        ret = ehci_wait_for_port(debug_port);
-        if (ret < 0) {
-                dbgp_printk("No device found in debug port\n");
-                goto next_debug_port;
-        }
-        dbgp_printk("ehci wait for port done\n");
-
-        /* Enable the debug port */
-        ctrl = readl(&ehci_debug->control);
-        ctrl |= DBGP_CLAIM;
-        writel(ctrl, &ehci_debug->control);
-        ctrl = readl(&ehci_debug->control);
-        if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
-                dbgp_printk("No device in debug port\n");
-                writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
-                goto err;
-        }
-        dbgp_printk("debug ported enabled\n");
-
-        /* Completely transfer the debug device to the debug controller */
-        portsc = readl(&ehci_regs->port_status[debug_port - 1]);
-        portsc &= ~PORT_PE;
-        writel(portsc, &ehci_regs->port_status[debug_port - 1]);
-
-        dbgp_mdelay(100);
-
-        /* Find the debug device and make it device number 127 */
-        for (devnum = 0; devnum <= 127; devnum++) {
-                ret = dbgp_control_msg(devnum,
-                        USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
-                        USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
-                        &dbgp_desc, sizeof(dbgp_desc));
-                if (ret > 0)
-                        break;
-        }
-        if (devnum > 127) {
-                dbgp_printk("Could not find attached debug device\n");
-                goto err;
-        }
-        if (ret < 0) {
-                dbgp_printk("Attached device is not a debug device\n");
-                goto err;
-        }
-        dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
-
-        /* Move the device to 127 if it isn't already there */
-        if (devnum != USB_DEBUG_DEVNUM) {
-                ret = dbgp_control_msg(devnum,
-                        USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
-                        USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
-                if (ret < 0) {
-                        dbgp_printk("Could not move attached device to %d\n",
-                                USB_DEBUG_DEVNUM);
-                        goto err;
-                }
-                devnum = USB_DEBUG_DEVNUM;
-                dbgp_printk("debug device renamed to 127\n");
-        }
-
-        /* Enable the debug interface */
-        ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
-                USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
-                USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
-        if (ret < 0) {
-                dbgp_printk(" Could not enable the debug device\n");
-                goto err;
-        }
-        dbgp_printk("debug interface enabled\n");
-
-        /* Perform a small write to get the even/odd data state in sync
-         */
-        ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
-        if (ret < 0) {
-                dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
-                goto err;
-        }
-        dbgp_printk("small write doned\n");
-
-        return 0;
-err:
-        /* Things didn't work so remove my claim */
-        ctrl = readl(&ehci_debug->control);
-        ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
-        writel(ctrl, &ehci_debug->control);
-        return -1;
-
-next_debug_port:
-        port_map_tried |= (1<<(debug_port - 1));
-        new_debug_port = ((debug_port-1+1)%n_ports) + 1;
-        if (port_map_tried != ((1<<n_ports) - 1)) {
-                set_debug_port(new_debug_port);
-                goto try_next_port;
-        }
-        if (--playtimes) {
-                set_debug_port(new_debug_port);
-                goto try_next_time;
-        }
-
-        return -1;
-}
-
-static int __init early_dbgp_init(char *s)
-{
-        u32 debug_port, bar, offset;
-        u32 bus, slot, func, cap;
-        void __iomem *ehci_bar;
-        u32 dbgp_num;
-        u32 bar_val;
-        char *e;
-        int ret;
-        u8 byte;
-
-        if (!early_pci_allowed())
-                return -1;
-
-        dbgp_num = 0;
-        if (*s)
-                dbgp_num = simple_strtoul(s, &e, 10);
-        dbgp_printk("dbgp_num: %d\n", dbgp_num);
-
-        cap = find_dbgp(dbgp_num, &bus, &slot, &func);
-        if (!cap)
-                return -1;
-
-        dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
-                         func);
-
-        debug_port = read_pci_config(bus, slot, func, cap);
-        bar = (debug_port >> 29) & 0x7;
-        bar = (bar * 4) + 0xc;
-        offset = (debug_port >> 16) & 0xfff;
-        dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
-        if (bar != PCI_BASE_ADDRESS_0) {
-                dbgp_printk("only debug ports on bar 1 handled.\n");
-
-                return -1;
-        }
-
-        bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
-        dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
-        if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
-                dbgp_printk("only simple 32bit mmio bars supported\n");
-
-                return -1;
-        }
-
-        /* double check if the mem space is enabled */
-        byte = read_pci_config_byte(bus, slot, func, 0x04);
-        if (!(byte & 0x2)) {
-                byte  |= 0x02;
-                write_pci_config_byte(bus, slot, func, 0x04, byte);
-                dbgp_printk("mmio for ehci enabled\n");
-        }
-
-        /*
-         * FIXME I don't have the bar size so just guess PAGE_SIZE is more
-         * than enough.  1K is the biggest I have seen.
-         */
-        set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
-        ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
-        ehci_bar += bar_val & ~PAGE_MASK;
-        dbgp_printk("ehci_bar: %p\n", ehci_bar);
-
-        ehci_caps  = ehci_bar;
-        ehci_regs  = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));
-        ehci_debug = ehci_bar + offset;
-        ehci_dev.bus = bus;
-        ehci_dev.slot = slot;
-        ehci_dev.func = func;
-
-        detect_set_debug_port();
-
-        ret = ehci_setup();
-        if (ret < 0) {
-                dbgp_printk("ehci_setup failed\n");
-                ehci_debug = NULL;
-
-                return -1;
-        }
-
-        return 0;
-}
-
-static void early_dbgp_write(struct console *con, const char *str, u32 n)
-{
-        int chunk, ret;
-
-        if (!ehci_debug)
-                return;
-        while (n > 0) {
-                chunk = n;
-                if (chunk > DBGP_MAX_PACKET)
-                        chunk = DBGP_MAX_PACKET;
-                ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
-                        dbgp_endpoint_out, str, chunk);
-                str += chunk;
-                n -= chunk;
-        }
-}
-
-static struct console early_dbgp_console = {
-        .name =         "earlydbg",
-        .write =        early_dbgp_write,
-        .flags =        CON_PRINTBUFFER,
-        .index =        -1,
-};
-#endif
-
 /* Direct interface for emergencies */
 static struct console *early_console = &early_vga_console;
 static int __initdata early_console_initialized;
@@ -891,10 +176,19 @@ asmlinkage void early_printk(const char *fmt, ...)
         va_end(ap);
 }
 
+static inline void early_console_register(struct console *con, int keep_early)
+{
+        early_console = con;
+        if (keep_early)
+                early_console->flags &= ~CON_BOOT;
+        else
+                early_console->flags |= CON_BOOT;
+        register_console(early_console);
+}
 
 static int __init setup_early_printk(char *buf)
 {
-        int keep_early;
+        int keep;
 
         if (!buf)
                 return 0;
@@ -903,42 +197,34 @@ static int __init setup_early_printk(char *buf)
                 return 0;
         early_console_initialized = 1;
 
-        keep_early = (strstr(buf, "keep") != NULL);
-
-        if (!strncmp(buf, "serial", 6)) {
-                early_serial_init(buf + 6);
-                early_console = &early_serial_console;
-        } else if (!strncmp(buf, "ttyS", 4)) {
-                early_serial_init(buf);
-                early_console = &early_serial_console;
-        } else if (!strncmp(buf, "vga", 3)
-                && boot_params.screen_info.orig_video_isVGA == 1) {
-                max_xpos = boot_params.screen_info.orig_video_cols;
-                max_ypos = boot_params.screen_info.orig_video_lines;
-                current_ypos = boot_params.screen_info.orig_y;
-                early_console = &early_vga_console;
+        keep = (strstr(buf, "keep") != NULL);
+
+        while (*buf != '\0') {
+                if (!strncmp(buf, "serial", 6)) {
+                        early_serial_init(buf + 6);
+                        early_console_register(&early_serial_console, keep);
+                }
+                if (!strncmp(buf, "ttyS", 4)) {
+                        early_serial_init(buf + 4);
+                        early_console_register(&early_serial_console, keep);
+                }
+                if (!strncmp(buf, "vga", 3) &&
+                    boot_params.screen_info.orig_video_isVGA == 1) {
+                        max_xpos = boot_params.screen_info.orig_video_cols;
+                        max_ypos = boot_params.screen_info.orig_video_lines;
+                        current_ypos = boot_params.screen_info.orig_y;
+                        early_console_register(&early_vga_console, keep);
+                }
 #ifdef CONFIG_EARLY_PRINTK_DBGP
-        } else if (!strncmp(buf, "dbgp", 4)) {
-                if (early_dbgp_init(buf+4) < 0)
-                        return 0;
-                early_console = &early_dbgp_console;
-                /*
-                 * usb subsys will reset ehci controller, so don't keep
-                 * that early console
-                 */
-                keep_early = 0;
+                if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
+                        early_console_register(&early_dbgp_console, keep);
 #endif
 #ifdef CONFIG_HVC_XEN
-        } else if (!strncmp(buf, "xen", 3)) {
-                early_console = &xenboot_console;
+                if (!strncmp(buf, "xen", 3))
+                        early_console_register(&xenboot_console, keep);
 #endif
+                buf++;
         }
-
-        if (keep_early)
-                early_console->flags &= ~CON_BOOT;
-        else
-                early_console->flags |= CON_BOOT;
-        register_console(early_console);
         return 0;
 }
 
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c
index fe26ba3e3451..ad5bd988fb79 100644
--- a/arch/x86/kernel/efi.c
+++ b/arch/x86/kernel/efi.c
@@ -42,6 +42,7 @@
 #include <asm/time.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
+#include <asm/x86_init.h>
 
 #define EFI_DEBUG       1
 #define PFX             "EFI: "
@@ -453,6 +454,9 @@ void __init efi_init(void)
         if (add_efi_memmap)
                 do_add_efi_memmap();
 
+        x86_platform.get_wallclock = efi_get_time;
+        x86_platform.set_wallclock = efi_set_rtc_mmss;
+
         /* Setup for EFI runtime service */
         reboot_type = BOOT_EFI;
 
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index c251be745107..b5c061f8f358 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -146,7 +146,7 @@ ENTRY(ftrace_graph_caller)
 END(ftrace_graph_caller)
 
 GLOBAL(return_to_handler)
-        subq  $80, %rsp
+        subq  $24, %rsp
 
         /* Save the return values */
         movq %rax, (%rsp)
@@ -155,10 +155,10 @@ GLOBAL(return_to_handler)
 
         call ftrace_return_to_handler
 
-        movq %rax, 72(%rsp)
+        movq %rax, 16(%rsp)
         movq 8(%rsp), %rdx
         movq (%rsp), %rax
-        addq $72, %rsp
+        addq $16, %rsp
         retq
 #endif
 
@@ -536,20 +536,13 @@ sysret_signal:
         bt $TIF_SYSCALL_AUDIT,%edx
         jc sysret_audit
 #endif
-        /* edx: work flags (arg3) */
-        leaq -ARGOFFSET(%rsp),%rdi # &pt_regs -> arg1
-        xorl %esi,%esi # oldset -> arg2
-        SAVE_REST
-        FIXUP_TOP_OF_STACK %r11
-        call do_notify_resume
-        RESTORE_TOP_OF_STACK %r11
-        RESTORE_REST
-        movl $_TIF_WORK_MASK,%edi
-        /* Use IRET because user could have changed frame. This
-           works because ptregscall_common has called FIXUP_TOP_OF_STACK. */
-        DISABLE_INTERRUPTS(CLBR_NONE)
-        TRACE_IRQS_OFF
-        jmp int_with_check
+        /*
+         * We have a signal, or exit tracing or single-step.
+         * These all wind up with the iret return path anyway,
+         * so just join that path right now.
+         */
+        FIXUP_TOP_OF_STACK %r11, -ARGOFFSET
+        jmp int_check_syscall_exit_work
 
 badsys:
         movq $-ENOSYS,RAX-ARGOFFSET(%rsp)
@@ -654,6 +647,7 @@ int_careful:
 int_very_careful:
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_NONE)
+int_check_syscall_exit_work:
         SAVE_REST
         /* Check for syscall exit trace */
         testl $_TIF_WORK_SYSCALL_EXIT,%edx
@@ -1021,7 +1015,7 @@ apicinterrupt ERROR_APIC_VECTOR \
 apicinterrupt SPURIOUS_APIC_VECTOR \
         spurious_interrupt smp_spurious_interrupt
 
-#ifdef CONFIG_PERF_COUNTERS
+#ifdef CONFIG_PERF_EVENTS
 apicinterrupt LOCAL_PENDING_VECTOR \
         perf_pending_interrupt smp_perf_pending_interrupt
 #endif
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index 3f8579f8d42c..4f8e2507e8f3 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -11,8 +11,21 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 #include <asm/e820.h>
-#include <asm/bios_ebda.h>
+#include <asm/page.h>
 #include <asm/trampoline.h>
+#include <asm/apic.h>
+#include <asm/io_apic.h>
+#include <asm/bios_ebda.h>
+
+static void __init i386_default_early_setup(void)
+{
+        /* Initilize 32bit specific setup functions */
+        x86_init.resources.probe_roms = probe_roms;
+        x86_init.resources.reserve_resources = i386_reserve_resources;
+        x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc;
+
+        reserve_ebda_region();
+}
 
 void __init i386_start_kernel(void)
 {
@@ -29,7 +42,16 @@ void __init i386_start_kernel(void)
                 reserve_early(ramdisk_image, ramdisk_end, "RAMDISK");
         }
 #endif
-        reserve_ebda_region();
+
+        /* Call the subarch specific early setup function */
+        switch (boot_params.hdr.hardware_subarch) {
+        case X86_SUBARCH_MRST:
+                x86_mrst_early_setup();
+                break;
+        default:
+                i386_default_early_setup();
+                break;
+        }
 
         /*
          * At this point everything still needed from the boot loader
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 70eaa852c732..0b06cd778fd9 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -23,8 +23,8 @@
 #include <asm/sections.h>
 #include <asm/kdebug.h>
 #include <asm/e820.h>
-#include <asm/bios_ebda.h>
 #include <asm/trampoline.h>
+#include <asm/bios_ebda.h>
 
 static void __init zap_identity_mappings(void)
 {
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 7ffec6b3b331..218aad7ee76e 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -157,6 +157,7 @@ subarch_entries:
         .long default_entry             /* normal x86/PC */
         .long lguest_entry              /* lguest hypervisor */
         .long xen_entry                 /* Xen hypervisor */
+        .long default_entry             /* Moorestown MID */
 num_subarch_entries = (. - subarch_entries) / 4
 .previous
 #endif /* CONFIG_PARAVIRT */
@@ -607,7 +608,7 @@ ENTRY(initial_code)
 /*
  * BSS section
  */
-.section ".bss.page_aligned","wa"
+__PAGE_ALIGNED_BSS
         .align PAGE_SIZE_asm
 #ifdef CONFIG_X86_PAE
 swapper_pg_pmd:
@@ -625,7 +626,7 @@ ENTRY(empty_zero_page)
  * This starts the data section.
  */
 #ifdef CONFIG_X86_PAE
-.section ".data.page_aligned","wa"
+__PAGE_ALIGNED_DATA
         /* Page-aligned for the benefit of paravirt? */
         .align PAGE_SIZE_asm
 ENTRY(swapper_pg_dir)
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index fa54f78e2a05..d0bc0a13a437 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -418,7 +418,7 @@ ENTRY(phys_base)
 ENTRY(idt_table)
         .skip IDT_ENTRIES * 16
 
-        .section .bss.page_aligned, "aw", @nobits
+        __PAGE_ALIGNED_BSS
         .align PAGE_SIZE
 ENTRY(empty_zero_page)
         .skip PAGE_SIZE
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c
index 5cf36c053ac4..23c167925a5c 100644
--- a/arch/x86/kernel/i8253.c
+++ b/arch/x86/kernel/i8253.c
@@ -19,12 +19,6 @@
 DEFINE_SPINLOCK(i8253_lock);
 EXPORT_SYMBOL(i8253_lock);
 
-#ifdef CONFIG_X86_32
-static void pit_disable_clocksource(void);
-#else
-static inline void pit_disable_clocksource(void) { }
-#endif
-
 /*
  * HPET replaces the PIT, when enabled. So we need to know, which of
  * the two timers is used
@@ -57,12 +51,10 @@ static void init_pit_timer(enum clock_event_mode mode,
                         outb_pit(0, PIT_CH0);
                         outb_pit(0, PIT_CH0);
                 }
-                pit_disable_clocksource();
                 break;
 
         case CLOCK_EVT_MODE_ONESHOT:
                 /* One shot setup */
-                pit_disable_clocksource();
                 outb_pit(0x38, PIT_MODE);
                 break;
 
@@ -200,17 +192,6 @@ static struct clocksource pit_cs = {
         .shift          = 20,
 };
 
-static void pit_disable_clocksource(void)
-{
-        /*
-         * Use mult to check whether it is registered or not
-         */
-        if (pit_cs.mult) {
-                clocksource_unregister(&pit_cs);
-                pit_cs.mult = 0;
-        }
-}
-
 static int __init init_pit_clocksource(void)
 {
          /*
diff --git a/arch/x86/kernel/init_task.c b/arch/x86/kernel/init_task.c
index 270ff83efc11..3a54dcb9cd0e 100644
--- a/arch/x86/kernel/init_task.c
+++ b/arch/x86/kernel/init_task.c
@@ -20,9 +20,8 @@ static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
  * way process stacks are handled. This is done by having a special
  * "init_task" linker map entry..
  */
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-                { INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 /*
  * Initial task structure.
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index b0cdde6932f5..74656d1d4e30 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -104,7 +104,7 @@ static int show_other_interrupts(struct seq_file *p, int prec)
         seq_printf(p, "  Threshold APIC interrupts\n");
 # endif
 #endif
-#ifdef CONFIG_X86_NEW_MCE
+#ifdef CONFIG_X86_MCE
         seq_printf(p, "%*s: ", prec, "MCE");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
@@ -200,7 +200,7 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
         sum += irq_stats(cpu)->irq_threshold_count;
 # endif
 #endif
-#ifdef CONFIG_X86_NEW_MCE
+#ifdef CONFIG_X86_MCE
         sum += per_cpu(mce_exception_count, cpu);
         sum += per_cpu(mce_poll_count, cpu);
 #endif
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 92b7703d3d58..40f30773fb29 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -116,7 +116,7 @@ int vector_used_by_percpu_irq(unsigned int vector)
         return 0;
 }
 
-static void __init init_ISA_irqs(void)
+void __init init_ISA_irqs(void)
 {
         int i;
 
@@ -140,8 +140,10 @@ static void __init init_ISA_irqs(void)
         }
 }
 
-/* Overridden in paravirt.c */
-void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
+void __init init_IRQ(void)
+{
+        x86_init.irqs.intr_init();
+}
 
 static void __init smp_intr_init(void)
 {
@@ -190,7 +192,7 @@ static void __init apic_intr_init(void)
 #ifdef CONFIG_X86_MCE_THRESHOLD
         alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
 #endif
-#if defined(CONFIG_X86_NEW_MCE) && defined(CONFIG_X86_LOCAL_APIC)
+#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_LOCAL_APIC)
         alloc_intr_gate(MCE_SELF_VECTOR, mce_self_interrupt);
 #endif
 
@@ -206,39 +208,19 @@ static void __init apic_intr_init(void)
         alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
 
         /* Performance monitoring interrupts: */
-# ifdef CONFIG_PERF_COUNTERS
+# ifdef CONFIG_PERF_EVENTS
         alloc_intr_gate(LOCAL_PENDING_VECTOR, perf_pending_interrupt);
 # endif
 
 #endif
 }
 
-/**
- * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
- *
- * Description:
- *      Perform any necessary interrupt initialisation prior to setting up
- *      the "ordinary" interrupt call gates.  For legacy reasons, the ISA
- *      interrupts should be initialised here if the machine emulates a PC
- *      in any way.
- **/
-static void __init x86_quirk_pre_intr_init(void)
-{
-#ifdef CONFIG_X86_32
-        if (x86_quirks->arch_pre_intr_init) {
-                if (x86_quirks->arch_pre_intr_init())
-                        return;
-        }
-#endif
-        init_ISA_irqs();
-}
-
 void __init native_init_IRQ(void)
 {
         int i;
 
         /* Execute any quirks before the call gates are initialised: */
-        x86_quirk_pre_intr_init();
+        x86_init.irqs.pre_vector_init();
 
         apic_intr_init();
 
@@ -258,12 +240,6 @@ void __init native_init_IRQ(void)
 
 #ifdef CONFIG_X86_32
         /*
-         * Call quirks after call gates are initialised (usually add in
-         * the architecture specific gates):
-         */
-        x86_quirk_intr_init();
-
-        /*
          * External FPU? Set up irq13 if so, for
          * original braindamaged IBM FERR coupling.
          */
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index e5efcdcca31b..feaeb0d3aa4f 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -22,6 +22,8 @@
 #include <asm/msr.h>
 #include <asm/apic.h>
 #include <linux/percpu.h>
+
+#include <asm/x86_init.h>
 #include <asm/reboot.h>
 
 #define KVM_SCALE 22
@@ -182,12 +184,13 @@ void __init kvmclock_init(void)
         if (kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE)) {
                 if (kvm_register_clock("boot clock"))
                         return;
-                pv_time_ops.get_wallclock = kvm_get_wallclock;
-                pv_time_ops.set_wallclock = kvm_set_wallclock;
                 pv_time_ops.sched_clock = kvm_clock_read;
-                pv_time_ops.get_tsc_khz = kvm_get_tsc_khz;
+                x86_platform.calibrate_tsc = kvm_get_tsc_khz;
+                x86_platform.get_wallclock = kvm_get_wallclock;
+                x86_platform.set_wallclock = kvm_set_wallclock;
 #ifdef CONFIG_X86_LOCAL_APIC
-                pv_apic_ops.setup_secondary_clock = kvm_setup_secondary_clock;
+                x86_cpuinit.setup_percpu_clockev =
+                        kvm_setup_secondary_clock;
 #endif
 #ifdef CONFIG_SMP
                 smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu;
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index 71f1d99a635d..ec6ef60cbd17 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -67,8 +67,8 @@ static int alloc_ldt(mm_context_t *pc, int mincount, int reload)
 #ifdef CONFIG_SMP
                 preempt_disable();
                 load_LDT(pc);
-                if (!cpus_equal(current->mm->cpu_vm_mask,
-                                cpumask_of_cpu(smp_processor_id())))
+                if (!cpumask_equal(mm_cpumask(current->mm),
+                                   cpumask_of(smp_processor_id())))
                         smp_call_function(flush_ldt, current->mm, 1);
                 preempt_enable();
 #else
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 9371448290ac..378e9a8f1bf8 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -210,8 +210,8 @@ static ssize_t microcode_write(struct file *file, const char __user *buf,
 {
         ssize_t ret = -EINVAL;
 
-        if ((len >> PAGE_SHIFT) > num_physpages) {
-                pr_err("microcode: too much data (max %ld pages)\n", num_physpages);
+        if ((len >> PAGE_SHIFT) > totalram_pages) {
+                pr_err("microcode: too much data (max %ld pages)\n", totalram_pages);
                 return ret;
         }
 
@@ -236,7 +236,7 @@ static const struct file_operations microcode_fops = {
 static struct miscdevice microcode_dev = {
         .minor                  = MICROCODE_MINOR,
         .name                   = "microcode",
-        .devnode                = "cpu/microcode",
+        .nodename               = "cpu/microcode",
         .fops                   = &microcode_fops,
 };
 
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index fcd513bf2846..5be95ef4ffec 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -45,6 +45,11 @@ static int __init mpf_checksum(unsigned char *mp, int len)
         return sum & 0xFF;
 }
 
+int __init default_mpc_apic_id(struct mpc_cpu *m)
+{
+        return m->apicid;
+}
+
 static void __init MP_processor_info(struct mpc_cpu *m)
 {
         int apicid;
@@ -55,10 +60,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
                 return;
         }
 
-        if (x86_quirks->mpc_apic_id)
-                apicid = x86_quirks->mpc_apic_id(m);
-        else
-                apicid = m->apicid;
+        apicid = x86_init.mpparse.mpc_apic_id(m);
 
         if (m->cpuflag & CPU_BOOTPROCESSOR) {
                 bootup_cpu = " (Bootup-CPU)";
@@ -70,16 +72,18 @@ static void __init MP_processor_info(struct mpc_cpu *m)
 }
 
 #ifdef CONFIG_X86_IO_APIC
-static void __init MP_bus_info(struct mpc_bus *m)
+void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
 {
-        char str[7];
         memcpy(str, m->bustype, 6);
         str[6] = 0;
+        apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
+}
 
-        if (x86_quirks->mpc_oem_bus_info)
-                x86_quirks->mpc_oem_bus_info(m, str);
-        else
-                apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
+static void __init MP_bus_info(struct mpc_bus *m)
+{
+        char str[7];
+
+        x86_init.mpparse.mpc_oem_bus_info(m, str);
 
 #if MAX_MP_BUSSES < 256
         if (m->busid >= MAX_MP_BUSSES) {
@@ -96,8 +100,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
                 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
 #endif
         } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
-                if (x86_quirks->mpc_oem_pci_bus)
-                        x86_quirks->mpc_oem_pci_bus(m);
+                if (x86_init.mpparse.mpc_oem_pci_bus)
+                        x86_init.mpparse.mpc_oem_pci_bus(m);
 
                 clear_bit(m->busid, mp_bus_not_pci);
 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
@@ -291,6 +295,8 @@ static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
                         1, mpc, mpc->length, 1);
 }
 
+void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
+
 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
 {
         char str[16];
@@ -312,16 +318,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
         if (early)
                 return 1;
 
-        if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
-                struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
-                x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
-        }
+        if (mpc->oemptr)
+                x86_init.mpparse.smp_read_mpc_oem(mpc);
 
         /*
          *      Now process the configuration blocks.
          */
-        if (x86_quirks->mpc_record)
-                *x86_quirks->mpc_record = 0;
+        x86_init.mpparse.mpc_record(0);
 
         while (count < mpc->length) {
                 switch (*mpt) {
@@ -353,8 +356,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
                         count = mpc->length;
                         break;
                 }
-                if (x86_quirks->mpc_record)
-                        (*x86_quirks->mpc_record)++;
+                x86_init.mpparse.mpc_record(1);
         }
 
 #ifdef CONFIG_X86_BIGSMP
@@ -608,7 +610,7 @@ static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
 /*
  * Scan the memory blocks for an SMP configuration block.
  */
-static void __init __get_smp_config(unsigned int early)
+void __init default_get_smp_config(unsigned int early)
 {
         struct mpf_intel *mpf = mpf_found;
 
@@ -625,11 +627,6 @@ static void __init __get_smp_config(unsigned int early)
         if (acpi_lapic && acpi_ioapic)
                 return;
 
-        if (x86_quirks->mach_get_smp_config) {
-                if (x86_quirks->mach_get_smp_config(early))
-                        return;
-        }
-
         printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
                mpf->specification);
 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
@@ -670,16 +667,6 @@ static void __init __get_smp_config(unsigned int early)
          */
 }
 
-void __init early_get_smp_config(void)
-{
-        __get_smp_config(1);
-}
-
-void __init get_smp_config(void)
-{
-        __get_smp_config(0);
-}
-
 static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
 {
         unsigned long size = get_mpc_size(mpf->physptr);
@@ -745,14 +732,10 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
         return 0;
 }
 
-static void __init __find_smp_config(unsigned int reserve)
+void __init default_find_smp_config(unsigned int reserve)
 {
         unsigned int address;
 
-        if (x86_quirks->mach_find_smp_config) {
-                if (x86_quirks->mach_find_smp_config(reserve))
-                        return;
-        }
         /*
          * FIXME: Linux assumes you have 640K of base ram..
          * this continues the error...
@@ -787,16 +770,6 @@ static void __init __find_smp_config(unsigned int reserve)
                 smp_scan_config(address, 0x400, reserve);
 }
 
-void __init early_find_smp_config(void)
-{
-        __find_smp_config(0);
-}
-
-void __init find_smp_config(void)
-{
-        __find_smp_config(1);
-}
-
 #ifdef CONFIG_X86_IO_APIC
 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
 
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
new file mode 100644
index 000000000000..3b7078abc871
--- /dev/null
+++ b/arch/x86/kernel/mrst.c
@@ -0,0 +1,24 @@
+/*
+ * mrst.c: Intel Moorestown platform specific setup code
+ *
+ * (C) Copyright 2008 Intel Corporation
+ * Author: Jacob Pan (jacob.jun.pan@intel.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+#include <linux/init.h>
+
+#include <asm/setup.h>
+
+/*
+ * Moorestown specific x86_init function overrides and early setup
+ * calls.
+ */
+void __init x86_mrst_early_setup(void)
+{
+        x86_init.resources.probe_roms = x86_init_noop;
+        x86_init.resources.reserve_resources = x86_init_noop;
+}
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 7dd950094178..6a3cefc7dda1 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -241,7 +241,7 @@ static struct notifier_block __refdata msr_class_cpu_notifier = {
         .notifier_call = msr_class_cpu_callback,
 };
 
-static char *msr_nodename(struct device *dev)
+static char *msr_devnode(struct device *dev, mode_t *mode)
 {
         return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
 }
@@ -262,7 +262,7 @@ static int __init msr_init(void)
                 err = PTR_ERR(msr_class);
                 goto out_chrdev;
         }
-        msr_class->nodename = msr_nodename;
+        msr_class->devnode = msr_devnode;
         for_each_online_cpu(i) {
                 err = msr_device_create(i);
                 if (err != 0)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index f5b0b4a01fb2..1b1739d16310 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -54,17 +54,12 @@ u64 _paravirt_ident_64(u64 x)
         return x;
 }
 
-static void __init default_banner(void)
+void __init default_banner(void)
 {
         printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
                pv_info.name);
 }
 
-char *memory_setup(void)
-{
-        return pv_init_ops.memory_setup();
-}
-
 /* Simple instruction patching code. */
 #define DEF_NATIVE(ops, name, code)                                     \
         extern const char start_##ops##_##name[], end_##ops##_##name[]; \
@@ -188,11 +183,6 @@ unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
         return insn_len;
 }
 
-void init_IRQ(void)
-{
-        pv_irq_ops.init_IRQ();
-}
-
 static void native_flush_tlb(void)
 {
         __native_flush_tlb();
@@ -218,13 +208,6 @@ extern void native_irq_enable_sysexit(void);
 extern void native_usergs_sysret32(void);
 extern void native_usergs_sysret64(void);
 
-static int __init print_banner(void)
-{
-        pv_init_ops.banner();
-        return 0;
-}
-core_initcall(print_banner);
-
 static struct resource reserve_ioports = {
         .start = 0,
         .end = IO_SPACE_LIMIT,
@@ -320,21 +303,13 @@ struct pv_info pv_info = {
 
 struct pv_init_ops pv_init_ops = {
         .patch = native_patch,
-        .banner = default_banner,
-        .arch_setup = paravirt_nop,
-        .memory_setup = machine_specific_memory_setup,
 };
 
 struct pv_time_ops pv_time_ops = {
-        .time_init = hpet_time_init,
-        .get_wallclock = native_get_wallclock,
-        .set_wallclock = native_set_wallclock,
         .sched_clock = native_sched_clock,
-        .get_tsc_khz = native_calibrate_tsc,
 };
 
 struct pv_irq_ops pv_irq_ops = {
-        .init_IRQ = native_init_IRQ,
         .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
         .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
         .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
@@ -409,8 +384,6 @@ struct pv_cpu_ops pv_cpu_ops = {
 
 struct pv_apic_ops pv_apic_ops = {
 #ifdef CONFIG_X86_LOCAL_APIC
-        .setup_boot_clock = setup_boot_APIC_clock,
-        .setup_secondary_clock = setup_secondary_APIC_clock,
         .startup_ipi_hook = paravirt_nop,
 #endif
 };
@@ -424,13 +397,6 @@ struct pv_apic_ops pv_apic_ops = {
 #endif
 
 struct pv_mmu_ops pv_mmu_ops = {
-#ifndef CONFIG_X86_64
-        .pagetable_setup_start = native_pagetable_setup_start,
-        .pagetable_setup_done = native_pagetable_setup_done,
-#else
-        .pagetable_setup_start = paravirt_nop,
-        .pagetable_setup_done = paravirt_nop,
-#endif
 
         .read_cr2 = native_read_cr2,
         .write_cr2 = native_write_cr2,
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index d71c8655905b..64b838eac18c 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -225,10 +225,8 @@ static __init int iommu_setup(char *p)
                 if (!strncmp(p, "soft", 4))
                         swiotlb = 1;
 #endif
-                if (!strncmp(p, "pt", 2)) {
+                if (!strncmp(p, "pt", 2))
                         iommu_pass_through = 1;
-                        return 1;
-                }
 
                 gart_parse_options(p);
 
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index e8a35016115f..aaa6b7839f1e 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -46,9 +46,8 @@ void __init pci_swiotlb_init(void)
 {
         /* don't initialize swiotlb if iommu=off (no_iommu=1) */
 #ifdef CONFIG_X86_64
-        if ((!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN) ||
-                iommu_pass_through)
-               swiotlb = 1;
+        if ((!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN))
+                swiotlb = 1;
 #endif
         if (swiotlb_force)
                 swiotlb = 1;
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 071166a4ba83..5284cd2b5776 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -9,7 +9,7 @@
 #include <linux/pm.h>
 #include <linux/clockchips.h>
 #include <linux/random.h>
-#include <trace/power.h>
+#include <trace/events/power.h>
 #include <asm/system.h>
 #include <asm/apic.h>
 #include <asm/syscalls.h>
@@ -25,9 +25,6 @@ EXPORT_SYMBOL(idle_nomwait);
 
 struct kmem_cache *task_xstate_cachep;
 
-DEFINE_TRACE(power_start);
-DEFINE_TRACE(power_end);
-
 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 {
         *dst = *src;
@@ -299,9 +296,7 @@ static inline int hlt_use_halt(void)
 void default_idle(void)
 {
         if (hlt_use_halt()) {
-                struct power_trace it;
-
-                trace_power_start(&it, POWER_CSTATE, 1);
+                trace_power_start(POWER_CSTATE, 1);
                 current_thread_info()->status &= ~TS_POLLING;
                 /*
                  * TS_POLLING-cleared state must be visible before we
@@ -314,7 +309,6 @@ void default_idle(void)
                 else
                         local_irq_enable();
                 current_thread_info()->status |= TS_POLLING;
-                trace_power_end(&it);
         } else {
                 local_irq_enable();
                 /* loop is done by the caller */
@@ -372,9 +366,7 @@ EXPORT_SYMBOL_GPL(cpu_idle_wait);
  */
 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
 {
-        struct power_trace it;
-
-        trace_power_start(&it, POWER_CSTATE, (ax>>4)+1);
+        trace_power_start(POWER_CSTATE, (ax>>4)+1);
         if (!need_resched()) {
                 if (cpu_has(&current_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
                         clflush((void *)&current_thread_info()->flags);
@@ -384,15 +376,13 @@ void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
                 if (!need_resched())
                         __mwait(ax, cx);
         }
-        trace_power_end(&it);
 }
 
 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 static void mwait_idle(void)
 {
-        struct power_trace it;
         if (!need_resched()) {
-                trace_power_start(&it, POWER_CSTATE, 1);
+                trace_power_start(POWER_CSTATE, 1);
                 if (cpu_has(&current_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
                         clflush((void *)&current_thread_info()->flags);
 
@@ -402,7 +392,6 @@ static void mwait_idle(void)
                         __sti_mwait(0, 0);
                 else
                         local_irq_enable();
-                trace_power_end(&it);
         } else
                 local_irq_enable();
 }
@@ -414,13 +403,11 @@ static void mwait_idle(void)
  */
 static void poll_idle(void)
 {
-        struct power_trace it;
-
-        trace_power_start(&it, POWER_CSTATE, 0);
+        trace_power_start(POWER_CSTATE, 0);
         local_irq_enable();
         while (!need_resched())
                 cpu_relax();
-        trace_power_end(&it);
+        trace_power_end(0);
 }
 
 /*
@@ -568,10 +555,8 @@ void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 void __init init_c1e_mask(void)
 {
         /* If we're using c1e_idle, we need to allocate c1e_mask. */
-        if (pm_idle == c1e_idle) {
-                alloc_cpumask_var(&c1e_mask, GFP_KERNEL);
-                cpumask_clear(c1e_mask);
-        }
+        if (pm_idle == c1e_idle)
+                zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
 }
 
 static int __init idle_setup(char *str)
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 8d7d5c9c1be3..7b058a2dc66a 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -325,16 +325,6 @@ static int putreg(struct task_struct *child,
                 return set_flags(child, value);
 
 #ifdef CONFIG_X86_64
-        /*
-         * Orig_ax is really just a flag with small positive and
-         * negative values, so make sure to always sign-extend it
-         * from 32 bits so that it works correctly regardless of
-         * whether we come from a 32-bit environment or not.
-         */
-        case offsetof(struct user_regs_struct, orig_ax):
-                value = (long) (s32) value;
-                break;
-
         case offsetof(struct user_regs_struct,fs_base):
                 if (value >= TASK_SIZE_OF(child))
                         return -EIO;
@@ -1126,10 +1116,15 @@ static int putreg32(struct task_struct *child, unsigned regno, u32 value)
 
         case offsetof(struct user32, regs.orig_eax):
                 /*
-                 * Sign-extend the value so that orig_eax = -1
-                 * causes (long)orig_ax < 0 tests to fire correctly.
+                 * A 32-bit debugger setting orig_eax means to restore
+                 * the state of the task restarting a 32-bit syscall.
+                 * Make sure we interpret the -ERESTART* codes correctly
+                 * in case the task is not actually still sitting at the
+                 * exit from a 32-bit syscall with TS_COMPAT still set.
                  */
-                regs->orig_ax = (long) (s32) value;
+                regs->orig_ax = value;
+                if (syscall_get_nr(child, regs) >= 0)
+                        task_thread_info(child)->status |= TS_COMPAT;
                 break;
 
         case offsetof(struct user32, regs.eflags):
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index af71d06624bf..6c3b2c6fd772 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -508,7 +508,7 @@ static void __init quirk_amd_nb_node(struct pci_dev *dev)
 
         pci_read_config_dword(nb_ht, 0x60, &val);
         set_dev_node(&dev->dev, val & 7);
-        pci_dev_put(dev);
+        pci_dev_put(nb_ht);
 }
 
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 5d465b207e72..1cfbbfc3ae26 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -8,6 +8,7 @@
 #include <linux/pnp.h>
 
 #include <asm/vsyscall.h>
+#include <asm/x86_init.h>
 #include <asm/time.h>
 
 #ifdef CONFIG_X86_32
@@ -165,33 +166,29 @@ void rtc_cmos_write(unsigned char val, unsigned char addr)
 }
 EXPORT_SYMBOL(rtc_cmos_write);
 
-static int set_rtc_mmss(unsigned long nowtime)
+int update_persistent_clock(struct timespec now)
 {
         unsigned long flags;
         int retval;
 
         spin_lock_irqsave(&rtc_lock, flags);
-        retval = set_wallclock(nowtime);
+        retval = x86_platform.set_wallclock(now.tv_sec);
         spin_unlock_irqrestore(&rtc_lock, flags);
 
         return retval;
 }
 
 /* not static: needed by APM */
-unsigned long read_persistent_clock(void)
+void read_persistent_clock(struct timespec *ts)
 {
         unsigned long retval, flags;
 
         spin_lock_irqsave(&rtc_lock, flags);
-        retval = get_wallclock();
+        retval = x86_platform.get_wallclock();
         spin_unlock_irqrestore(&rtc_lock, flags);
 
-        return retval;
-}
-
-int update_persistent_clock(struct timespec now)
-{
-        return set_rtc_mmss(now.tv_sec);
+        ts->tv_sec = retval;
+        ts->tv_nsec = 0;
 }
 
 unsigned long long native_read_tsc(void)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 19f15c4076fb..e09f0e2c14b5 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -27,6 +27,7 @@
 #include <linux/screen_info.h>
 #include <linux/ioport.h>
 #include <linux/acpi.h>
+#include <linux/sfi.h>
 #include <linux/apm_bios.h>
 #include <linux/initrd.h>
 #include <linux/bootmem.h>
@@ -109,10 +110,6 @@
 #include <asm/numa_64.h>
 #endif
 
-#ifndef ARCH_SETUP
-#define ARCH_SETUP
-#endif
-
 /*
  * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
  * The direct mapping extends to max_pfn_mapped, so that we can directly access
@@ -134,9 +131,9 @@ int default_cpu_present_to_apicid(int mps_cpu)
         return __default_cpu_present_to_apicid(mps_cpu);
 }
 
-int default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+int default_check_phys_apicid_present(int phys_apicid)
 {
-        return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+        return __default_check_phys_apicid_present(phys_apicid);
 }
 #endif
 
@@ -172,13 +169,6 @@ static struct resource bss_resource = {
 
 
 #ifdef CONFIG_X86_32
-static struct resource video_ram_resource = {
-        .name   = "Video RAM area",
-        .start  = 0xa0000,
-        .end    = 0xbffff,
-        .flags  = IORESOURCE_BUSY | IORESOURCE_MEM
-};
-
 /* cpu data as detected by the assembly code in head.S */
 struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1};
 /* common cpu data for all cpus */
@@ -606,7 +596,7 @@ static struct resource standard_io_resources[] = {
                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 };
 
-static void __init reserve_standard_io_resources(void)
+void __init reserve_standard_io_resources(void)
 {
         int i;
 
@@ -638,10 +628,6 @@ static int __init setup_elfcorehdr(char *arg)
 early_param("elfcorehdr", setup_elfcorehdr);
 #endif
 
-static struct x86_quirks default_x86_quirks __initdata;
-
-struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
-
 #ifdef CONFIG_X86_RESERVE_LOW_64K
 static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
 {
@@ -712,21 +698,6 @@ void __init setup_arch(char **cmdline_p)
         printk(KERN_INFO "Command line: %s\n", boot_command_line);
 #endif
 
-        strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
-        *cmdline_p = command_line;
-
-#ifdef CONFIG_X86_64
-        /*
-         * Must call this twice: Once just to detect whether hardware doesn't
-         * support NX (so that the early EHCI debug console setup can safely
-         * call set_fixmap(), and then again after parsing early parameters to
-         * honor the respective command line option.
-         */
-        check_efer();
-#endif
-
-        parse_early_param();
-
         /* VMI may relocate the fixmap; do this before touching ioremap area */
         vmi_init();
 
@@ -773,7 +744,7 @@ void __init setup_arch(char **cmdline_p)
         }
 #endif
 
-        ARCH_SETUP
+        x86_init.oem.arch_setup();
 
         setup_memory_map();
         parse_setup_data();
@@ -809,6 +780,21 @@ void __init setup_arch(char **cmdline_p)
 #endif
 #endif
 
+        strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
+        *cmdline_p = command_line;
+
+#ifdef CONFIG_X86_64
+        /*
+         * Must call this twice: Once just to detect whether hardware doesn't
+         * support NX (so that the early EHCI debug console setup can safely
+         * call set_fixmap(), and then again after parsing early parameters to
+         * honor the respective command line option.
+         */
+        check_efer();
+#endif
+
+        parse_early_param();
+
 #ifdef CONFIG_X86_64
         check_efer();
 #endif
@@ -844,11 +830,9 @@ void __init setup_arch(char **cmdline_p)
          * VMware detection requires dmi to be available, so this
          * needs to be done after dmi_scan_machine, for the BP.
          */
-        init_hypervisor(&boot_cpu_data);
+        init_hypervisor_platform();
 
-#ifdef CONFIG_X86_32
-        probe_roms();
-#endif
+        x86_init.resources.probe_roms();
 
         /* after parse_early_param, so could debug it */
         insert_resource(&iomem_resource, &code_resource);
@@ -983,10 +967,9 @@ void __init setup_arch(char **cmdline_p)
         kvmclock_init();
 #endif
 
-        paravirt_pagetable_setup_start(swapper_pg_dir);
+        x86_init.paging.pagetable_setup_start(swapper_pg_dir);
         paging_init();
-        paravirt_pagetable_setup_done(swapper_pg_dir);
-        paravirt_post_allocator_init();
+        x86_init.paging.pagetable_setup_done(swapper_pg_dir);
 
         tboot_probe();
 
@@ -1003,13 +986,13 @@ void __init setup_arch(char **cmdline_p)
          */
         acpi_boot_init();
 
-#if defined(CONFIG_X86_MPPARSE) || defined(CONFIG_X86_VISWS)
+        sfi_init();
+
         /*
          * get boot-time SMP configuration:
          */
         if (smp_found_config)
                 get_smp_config();
-#endif
 
         prefill_possible_map();
 
@@ -1028,10 +1011,7 @@ void __init setup_arch(char **cmdline_p)
         e820_reserve_resources();
         e820_mark_nosave_regions(max_low_pfn);
 
-#ifdef CONFIG_X86_32
-        request_resource(&iomem_resource, &video_ram_resource);
-#endif
-        reserve_standard_io_resources();
+        x86_init.resources.reserve_resources();
 
         e820_setup_gap();
 
@@ -1043,78 +1023,22 @@ void __init setup_arch(char **cmdline_p)
         conswitchp = &dummy_con;
 #endif
 #endif
+        x86_init.oem.banner();
 }
 
 #ifdef CONFIG_X86_32
 
-/**
- * x86_quirk_intr_init - post gate setup interrupt initialisation
- *
- * Description:
- *      Fill in any interrupts that may have been left out by the general
- *      init_IRQ() routine.  interrupts having to do with the machine rather
- *      than the devices on the I/O bus (like APIC interrupts in intel MP
- *      systems) are started here.
- **/
-void __init x86_quirk_intr_init(void)
-{
-        if (x86_quirks->arch_intr_init) {
-                if (x86_quirks->arch_intr_init())
-                        return;
-        }
-}
-
-/**
- * x86_quirk_trap_init - initialise system specific traps
- *
- * Description:
- *      Called as the final act of trap_init().  Used in VISWS to initialise
- *      the various board specific APIC traps.
- **/
-void __init x86_quirk_trap_init(void)
-{
-        if (x86_quirks->arch_trap_init) {
-                if (x86_quirks->arch_trap_init())
-                        return;
-        }
-}
-
-static struct irqaction irq0  = {
-        .handler = timer_interrupt,
-        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
-        .name = "timer"
+static struct resource video_ram_resource = {
+        .name   = "Video RAM area",
+        .start  = 0xa0000,
+        .end    = 0xbffff,
+        .flags  = IORESOURCE_BUSY | IORESOURCE_MEM
 };
 
-/**
- * x86_quirk_pre_time_init - do any specific initialisations before.
- *
- **/
-void __init x86_quirk_pre_time_init(void)
+void __init i386_reserve_resources(void)
 {
-        if (x86_quirks->arch_pre_time_init)
-                x86_quirks->arch_pre_time_init();
+        request_resource(&iomem_resource, &video_ram_resource);
+        reserve_standard_io_resources();
 }
 
-/**
- * x86_quirk_time_init - do any specific initialisations for the system timer.
- *
- * Description:
- *      Must plug the system timer interrupt source at HZ into the IRQ listed
- *      in irq_vectors.h:TIMER_IRQ
- **/
-void __init x86_quirk_time_init(void)
-{
-        if (x86_quirks->arch_time_init) {
-                /*
-                 * A nonzero return code does not mean failure, it means
-                 * that the architecture quirk does not want any
-                 * generic (timer) setup to be performed after this:
-                 */
-                if (x86_quirks->arch_time_init())
-                        return;
-        }
-
-        irq0.mask = cpumask_of_cpu(0);
-        setup_irq(0, &irq0);
-}
 #endif /* CONFIG_X86_32 */
diff --git a/arch/x86/kernel/sfi.c b/arch/x86/kernel/sfi.c
new file mode 100644
index 000000000000..34e099382651
--- /dev/null
+++ b/arch/x86/kernel/sfi.c
@@ -0,0 +1,122 @@
+/*
+ * sfi.c - x86 architecture SFI support.
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#define KMSG_COMPONENT "SFI"
+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
+
+#include <linux/acpi.h>
+#include <linux/init.h>
+#include <linux/sfi.h>
+#include <linux/io.h>
+
+#include <asm/io_apic.h>
+#include <asm/mpspec.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+
+#ifdef CONFIG_X86_LOCAL_APIC
+static unsigned long sfi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
+
+void __init mp_sfi_register_lapic_address(unsigned long address)
+{
+        mp_lapic_addr = address;
+
+        set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
+        if (boot_cpu_physical_apicid == -1U)
+                boot_cpu_physical_apicid = read_apic_id();
+
+        pr_info("Boot CPU = %d\n", boot_cpu_physical_apicid);
+}
+
+/* All CPUs enumerated by SFI must be present and enabled */
+void __cpuinit mp_sfi_register_lapic(u8 id)
+{
+        if (MAX_APICS - id <= 0) {
+                pr_warning("Processor #%d invalid (max %d)\n",
+                        id, MAX_APICS);
+                return;
+        }
+
+        pr_info("registering lapic[%d]\n", id);
+
+        generic_processor_info(id, GET_APIC_VERSION(apic_read(APIC_LVR)));
+}
+
+static int __init sfi_parse_cpus(struct sfi_table_header *table)
+{
+        struct sfi_table_simple *sb;
+        struct sfi_cpu_table_entry *pentry;
+        int i;
+        int cpu_num;
+
+        sb = (struct sfi_table_simple *)table;
+        cpu_num = SFI_GET_NUM_ENTRIES(sb, struct sfi_cpu_table_entry);
+        pentry = (struct sfi_cpu_table_entry *)sb->pentry;
+
+        for (i = 0; i < cpu_num; i++) {
+                mp_sfi_register_lapic(pentry->apic_id);
+                pentry++;
+        }
+
+        smp_found_config = 1;
+        return 0;
+}
+#endif /* CONFIG_X86_LOCAL_APIC */
+
+#ifdef CONFIG_X86_IO_APIC
+static u32 gsi_base;
+
+static int __init sfi_parse_ioapic(struct sfi_table_header *table)
+{
+        struct sfi_table_simple *sb;
+        struct sfi_apic_table_entry *pentry;
+        int i, num;
+
+        sb = (struct sfi_table_simple *)table;
+        num = SFI_GET_NUM_ENTRIES(sb, struct sfi_apic_table_entry);
+        pentry = (struct sfi_apic_table_entry *)sb->pentry;
+
+        for (i = 0; i < num; i++) {
+                mp_register_ioapic(i, pentry->phys_addr, gsi_base);
+                gsi_base += io_apic_get_redir_entries(i);
+                pentry++;
+        }
+
+        WARN(pic_mode, KERN_WARNING
+                "SFI: pic_mod shouldn't be 1 when IOAPIC table is present\n");
+        pic_mode = 0;
+        return 0;
+}
+#endif /* CONFIG_X86_IO_APIC */
+
+/*
+ * sfi_platform_init(): register lapics & io-apics
+ */
+int __init sfi_platform_init(void)
+{
+#ifdef CONFIG_X86_LOCAL_APIC
+        mp_sfi_register_lapic_address(sfi_lapic_addr);
+        sfi_table_parse(SFI_SIG_CPUS, NULL, NULL, sfi_parse_cpus);
+#endif
+#ifdef CONFIG_X86_IO_APIC
+        sfi_table_parse(SFI_SIG_APIC, NULL, NULL, sfi_parse_ioapic);
+#endif
+        return 0;
+}
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index 81e58238c4ce..6a44a76055ad 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -856,7 +856,7 @@ static void do_signal(struct pt_regs *regs)
 void
 do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
 {
-#ifdef CONFIG_X86_NEW_MCE
+#ifdef CONFIG_X86_MCE
         /* notify userspace of pending MCEs */
         if (thread_info_flags & _TIF_MCE_NOTIFY)
                 mce_notify_process();
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index a25eeec00080..565ebc65920e 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -324,7 +324,7 @@ notrace static void __cpuinit start_secondary(void *unused)
         /* enable local interrupts */
         local_irq_enable();
 
-        setup_secondary_clock();
+        x86_cpuinit.setup_percpu_clockev();
 
         wmb();
         cpu_idle();
@@ -1059,12 +1059,9 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 #endif
         current_thread_info()->cpu = 0;  /* needed? */
         for_each_possible_cpu(i) {
-                alloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
-                alloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
-                alloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
-                cpumask_clear(per_cpu(cpu_core_map, i));
-                cpumask_clear(per_cpu(cpu_sibling_map, i));
-                cpumask_clear(cpu_data(i).llc_shared_map);
+                zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
+                zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
+                zalloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
         }
         set_cpu_sibling_map(0);
 
@@ -1114,7 +1111,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 
         printk(KERN_INFO "CPU%d: ", 0);
         print_cpu_info(&cpu_data(0));
-        setup_boot_clock();
+        x86_init.timers.setup_percpu_clockev();
 
         if (is_uv_system())
                 uv_system_init();
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index d51321ddafda..0157cd26d7cc 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -335,4 +335,4 @@ ENTRY(sys_call_table)
         .long sys_preadv
         .long sys_pwritev
         .long sys_rt_tgsigqueueinfo     /* 335 */
-        .long sys_perf_counter_open
+        .long sys_perf_event_open
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c
new file mode 100644
index 000000000000..dcb00d278512
--- /dev/null
+++ b/arch/x86/kernel/time.c
@@ -0,0 +1,120 @@
+/*
+ *  Copyright (c) 1991,1992,1995  Linus Torvalds
+ *  Copyright (c) 1994  Alan Modra
+ *  Copyright (c) 1995  Markus Kuhn
+ *  Copyright (c) 1996  Ingo Molnar
+ *  Copyright (c) 1998  Andrea Arcangeli
+ *  Copyright (c) 2002,2006  Vojtech Pavlik
+ *  Copyright (c) 2003  Andi Kleen
+ *
+ */
+
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/time.h>
+#include <linux/mca.h>
+
+#include <asm/vsyscall.h>
+#include <asm/x86_init.h>
+#include <asm/i8259.h>
+#include <asm/i8253.h>
+#include <asm/timer.h>
+#include <asm/hpet.h>
+#include <asm/time.h>
+
+#if defined(CONFIG_X86_32) && defined(CONFIG_X86_IO_APIC)
+int timer_ack;
+#endif
+
+#ifdef CONFIG_X86_64
+volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
+#endif
+
+unsigned long profile_pc(struct pt_regs *regs)
+{
+        unsigned long pc = instruction_pointer(regs);
+
+        if (!user_mode_vm(regs) && in_lock_functions(pc)) {
+#ifdef CONFIG_FRAME_POINTER
+                return *(unsigned long *)(regs->bp + sizeof(long));
+#else
+                unsigned long *sp = (unsigned long *)regs->sp;
+                /*
+                 * Return address is either directly at stack pointer
+                 * or above a saved flags. Eflags has bits 22-31 zero,
+                 * kernel addresses don't.
+                 */
+                if (sp[0] >> 22)
+                        return sp[0];
+                if (sp[1] >> 22)
+                        return sp[1];
+#endif
+        }
+        return pc;
+}
+EXPORT_SYMBOL(profile_pc);
+
+/*
+ * Default timer interrupt handler for PIT/HPET
+ */
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
+{
+        /* Keep nmi watchdog up to date */
+        inc_irq_stat(irq0_irqs);
+
+        /* Optimized out for !IO_APIC and x86_64 */
+        if (timer_ack) {
+                /*
+                 * Subtle, when I/O APICs are used we have to ack timer IRQ
+                 * manually to deassert NMI lines for the watchdog if run
+                 * on an 82489DX-based system.
+                 */
+                spin_lock(&i8259A_lock);
+                outb(0x0c, PIC_MASTER_OCW3);
+                /* Ack the IRQ; AEOI will end it automatically. */
+                inb(PIC_MASTER_POLL);
+                spin_unlock(&i8259A_lock);
+        }
+
+        global_clock_event->event_handler(global_clock_event);
+
+        /* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */
+        if (MCA_bus)
+                outb_p(inb_p(0x61)| 0x80, 0x61);
+
+        return IRQ_HANDLED;
+}
+
+static struct irqaction irq0  = {
+        .handler = timer_interrupt,
+        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
+        .name = "timer"
+};
+
+void __init setup_default_timer_irq(void)
+{
+        setup_irq(0, &irq0);
+}
+
+/* Default timer init function */
+void __init hpet_time_init(void)
+{
+        if (!hpet_enable())
+                setup_pit_timer();
+        setup_default_timer_irq();
+}
+
+static __init void x86_late_time_init(void)
+{
+        x86_init.timers.timer_init();
+        tsc_init();
+}
+
+/*
+ * Initialize TSC and delay the periodic timer init to
+ * late x86_late_time_init() so ioremap works.
+ */
+void __init time_init(void)
+{
+        late_time_init = x86_late_time_init;
+}
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
deleted file mode 100644
index 5c5d87f0b2e1..000000000000
--- a/arch/x86/kernel/time_32.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
- *
- * This file contains the PC-specific time handling details:
- * reading the RTC at bootup, etc..
- * 1994-07-02    Alan Modra
- *      fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
- * 1995-03-26    Markus Kuhn
- *      fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
- *      precision CMOS clock update
- * 1996-05-03    Ingo Molnar
- *      fixed time warps in do_[slow|fast]_gettimeoffset()
- * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
- *              "A Kernel Model for Precision Timekeeping" by Dave Mills
- * 1998-09-05    (Various)
- *      More robust do_fast_gettimeoffset() algorithm implemented
- *      (works with APM, Cyrix 6x86MX and Centaur C6),
- *      monotonic gettimeofday() with fast_get_timeoffset(),
- *      drift-proof precision TSC calibration on boot
- *      (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
- *      Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
- *      ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
- * 1998-12-16    Andrea Arcangeli
- *      Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
- *      because was not accounting lost_ticks.
- * 1998-12-24 Copyright (C) 1998  Andrea Arcangeli
- *      Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
- *      serialize accesses to xtime/lost_ticks).
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/mca.h>
-
-#include <asm/setup.h>
-#include <asm/hpet.h>
-#include <asm/time.h>
-#include <asm/timer.h>
-
-#include <asm/do_timer.h>
-
-int timer_ack;
-
-unsigned long profile_pc(struct pt_regs *regs)
-{
-        unsigned long pc = instruction_pointer(regs);
-
-#ifdef CONFIG_SMP
-        if (!user_mode_vm(regs) && in_lock_functions(pc)) {
-#ifdef CONFIG_FRAME_POINTER
-                return *(unsigned long *)(regs->bp + sizeof(long));
-#else
-                unsigned long *sp = (unsigned long *)&regs->sp;
-
-                /* Return address is either directly at stack pointer
-                   or above a saved flags. Eflags has bits 22-31 zero,
-                   kernel addresses don't. */
-                if (sp[0] >> 22)
-                        return sp[0];
-                if (sp[1] >> 22)
-                        return sp[1];
-#endif
-        }
-#endif
-        return pc;
-}
-EXPORT_SYMBOL(profile_pc);
-
-/*
- * This is the same as the above, except we _also_ save the current
- * Time Stamp Counter value at the time of the timer interrupt, so that
- * we later on can estimate the time of day more exactly.
- */
-irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
-        /* Keep nmi watchdog up to date */
-        inc_irq_stat(irq0_irqs);
-
-#ifdef CONFIG_X86_IO_APIC
-        if (timer_ack) {
-                /*
-                 * Subtle, when I/O APICs are used we have to ack timer IRQ
-                 * manually to deassert NMI lines for the watchdog if run
-                 * on an 82489DX-based system.
-                 */
-                spin_lock(&i8259A_lock);
-                outb(0x0c, PIC_MASTER_OCW3);
-                /* Ack the IRQ; AEOI will end it automatically. */
-                inb(PIC_MASTER_POLL);
-                spin_unlock(&i8259A_lock);
-        }
-#endif
-
-        do_timer_interrupt_hook();
-
-#ifdef CONFIG_MCA
-        if (MCA_bus) {
-                /* The PS/2 uses level-triggered interrupts.  You can't
-                turn them off, nor would you want to (any attempt to
-                enable edge-triggered interrupts usually gets intercepted by a
-                special hardware circuit).  Hence we have to acknowledge
-                the timer interrupt.  Through some incredibly stupid
-                design idea, the reset for IRQ 0 is done by setting the
-                high bit of the PPI port B (0x61).  Note that some PS/2s,
-                notably the 55SX, work fine if this is removed.  */
-
-                u8 irq_v = inb_p(0x61);         /* read the current state */
-                outb_p(irq_v | 0x80, 0x61);     /* reset the IRQ */
-        }
-#endif
-
-        return IRQ_HANDLED;
-}
-
-/* Duplicate of time_init() below, with hpet_enable part added */
-void __init hpet_time_init(void)
-{
-        if (!hpet_enable())
-                setup_pit_timer();
-        x86_quirk_time_init();
-}
-
-/*
- * This is called directly from init code; we must delay timer setup in the
- * HPET case as we can't make the decision to turn on HPET this early in the
- * boot process.
- *
- * The chosen time_init function will usually be hpet_time_init, above, but
- * in the case of virtual hardware, an alternative function may be substituted.
- */
-void __init time_init(void)
-{
-        x86_quirk_pre_time_init();
-        tsc_init();
-        late_time_init = choose_time_init();
-}
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
deleted file mode 100644
index 5ba343e61844..000000000000
--- a/arch/x86/kernel/time_64.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- *  "High Precision Event Timer" based timekeeping.
- *
- *  Copyright (c) 1991,1992,1995  Linus Torvalds
- *  Copyright (c) 1994  Alan Modra
- *  Copyright (c) 1995  Markus Kuhn
- *  Copyright (c) 1996  Ingo Molnar
- *  Copyright (c) 1998  Andrea Arcangeli
- *  Copyright (c) 2002,2006  Vojtech Pavlik
- *  Copyright (c) 2003  Andi Kleen
- *  RTC support code taken from arch/i386/kernel/timers/time_hpet.c
- */
-
-#include <linux/clockchips.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/time.h>
-#include <linux/mca.h>
-#include <linux/nmi.h>
-
-#include <asm/i8253.h>
-#include <asm/hpet.h>
-#include <asm/vgtod.h>
-#include <asm/time.h>
-#include <asm/timer.h>
-
-volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
-
-unsigned long profile_pc(struct pt_regs *regs)
-{
-        unsigned long pc = instruction_pointer(regs);
-
-        /* Assume the lock function has either no stack frame or a copy
-           of flags from PUSHF
-           Eflags always has bits 22 and up cleared unlike kernel addresses. */
-        if (!user_mode_vm(regs) && in_lock_functions(pc)) {
-#ifdef CONFIG_FRAME_POINTER
-                return *(unsigned long *)(regs->bp + sizeof(long));
-#else
-                unsigned long *sp = (unsigned long *)regs->sp;
-                if (sp[0] >> 22)
-                        return sp[0];
-                if (sp[1] >> 22)
-                        return sp[1];
-#endif
-        }
-        return pc;
-}
-EXPORT_SYMBOL(profile_pc);
-
-static irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
-        inc_irq_stat(irq0_irqs);
-
-        global_clock_event->event_handler(global_clock_event);
-
-#ifdef CONFIG_MCA
-        if (MCA_bus) {
-                u8 irq_v = inb_p(0x61);       /* read the current state */
-                outb_p(irq_v|0x80, 0x61);     /* reset the IRQ */
-        }
-#endif
-
-        return IRQ_HANDLED;
-}
-
-/* calibrate_cpu is used on systems with fixed rate TSCs to determine
- * processor frequency */
-#define TICK_COUNT 100000000
-unsigned long __init calibrate_cpu(void)
-{
-        int tsc_start, tsc_now;
-        int i, no_ctr_free;
-        unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
-        unsigned long flags;
-
-        for (i = 0; i < 4; i++)
-                if (avail_to_resrv_perfctr_nmi_bit(i))
-                        break;
-        no_ctr_free = (i == 4);
-        if (no_ctr_free) {
-                WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... "
-                     "cpu_khz value may be incorrect.\n");
-                i = 3;
-                rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
-                wrmsrl(MSR_K7_EVNTSEL3, 0);
-                rdmsrl(MSR_K7_PERFCTR3, pmc3);
-        } else {
-                reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
-                reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
-        }
-        local_irq_save(flags);
-        /* start measuring cycles, incrementing from 0 */
-        wrmsrl(MSR_K7_PERFCTR0 + i, 0);
-        wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
-        rdtscl(tsc_start);
-        do {
-                rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
-                tsc_now = get_cycles();
-        } while ((tsc_now - tsc_start) < TICK_COUNT);
-
-        local_irq_restore(flags);
-        if (no_ctr_free) {
-                wrmsrl(MSR_K7_EVNTSEL3, 0);
-                wrmsrl(MSR_K7_PERFCTR3, pmc3);
-                wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
-        } else {
-                release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
-                release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
-        }
-
-        return pmc_now * tsc_khz / (tsc_now - tsc_start);
-}
-
-static struct irqaction irq0 = {
-        .handler        = timer_interrupt,
-        .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER,
-        .name           = "timer"
-};
-
-void __init hpet_time_init(void)
-{
-        if (!hpet_enable())
-                setup_pit_timer();
-
-        setup_irq(0, &irq0);
-}
-
-void __init time_init(void)
-{
-        tsc_init();
-
-        late_time_init = choose_time_init();
-}
diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c
index 808031a5ba19..699f7eeb896a 100644
--- a/arch/x86/kernel/trampoline.c
+++ b/arch/x86/kernel/trampoline.c
@@ -4,7 +4,7 @@
 #include <asm/e820.h>
 
 /* ready for x86_64 and x86 */
-unsigned char *trampoline_base = __va(TRAMPOLINE_BASE);
+unsigned char *__cpuinitdata trampoline_base = __va(TRAMPOLINE_BASE);
 
 void __init reserve_trampoline_memory(void)
 {
@@ -26,7 +26,7 @@ void __init reserve_trampoline_memory(void)
  * bootstrap into the page concerned. The caller
  * has made sure it's suitably aligned.
  */
-unsigned long setup_trampoline(void)
+unsigned long __cpuinit setup_trampoline(void)
 {
         memcpy(trampoline_base, trampoline_data, TRAMPOLINE_SIZE);
         return virt_to_phys(trampoline_base);
diff --git a/arch/x86/kernel/trampoline_32.S b/arch/x86/kernel/trampoline_32.S
index 66d874e5404c..8508237e8e43 100644
--- a/arch/x86/kernel/trampoline_32.S
+++ b/arch/x86/kernel/trampoline_32.S
@@ -28,16 +28,12 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/segment.h>
 #include <asm/page_types.h>
 
 /* We can free up trampoline after bootup if cpu hotplug is not supported. */
-#ifndef CONFIG_HOTPLUG_CPU
-.section ".cpuinit.data","aw",@progbits
-#else
-.section .rodata,"a",@progbits
-#endif
-
+__CPUINITRODATA
 .code16
 
 ENTRY(trampoline_data)
diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/kernel/trampoline_64.S
index cddfb8d386b9..596d54c660a5 100644
--- a/arch/x86/kernel/trampoline_64.S
+++ b/arch/x86/kernel/trampoline_64.S
@@ -25,14 +25,15 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/init.h>
 #include <asm/pgtable_types.h>
 #include <asm/page_types.h>
 #include <asm/msr.h>
 #include <asm/segment.h>
 #include <asm/processor-flags.h>
 
-.section .rodata, "a", @progbits
-
+/* We can free up the trampoline after bootup if cpu hotplug is not supported. */
+__CPUINITRODATA
 .code16
 
 ENTRY(trampoline_data)
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 83264922a878..a665c71352b8 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -14,7 +14,6 @@
 #include <linux/spinlock.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
-#include <linux/utsname.h>
 #include <linux/kdebug.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -59,12 +58,12 @@
 #include <asm/mach_traps.h>
 
 #ifdef CONFIG_X86_64
+#include <asm/x86_init.h>
 #include <asm/pgalloc.h>
 #include <asm/proto.h>
 #else
 #include <asm/processor-flags.h>
 #include <asm/setup.h>
-#include <asm/traps.h>
 
 asmlinkage int system_call(void);
 
@@ -972,7 +971,5 @@ void __init trap_init(void)
          */
         cpu_init();
 
-#ifdef CONFIG_X86_32
-        x86_quirk_trap_init();
-#endif
+        x86_init.irqs.trap_init();
 }
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 71f4368b357e..cd982f48e23e 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -17,6 +17,8 @@
 #include <asm/time.h>
 #include <asm/delay.h>
 #include <asm/hypervisor.h>
+#include <asm/nmi.h>
+#include <asm/x86_init.h>
 
 unsigned int __read_mostly cpu_khz;     /* TSC clocks / usec, not used here */
 EXPORT_SYMBOL(cpu_khz);
@@ -400,15 +402,9 @@ unsigned long native_calibrate_tsc(void)
 {
         u64 tsc1, tsc2, delta, ref1, ref2;
         unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
-        unsigned long flags, latch, ms, fast_calibrate, hv_tsc_khz;
+        unsigned long flags, latch, ms, fast_calibrate;
         int hpet = is_hpet_enabled(), i, loopmin;
 
-        hv_tsc_khz = get_hypervisor_tsc_freq();
-        if (hv_tsc_khz) {
-                printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
-                return hv_tsc_khz;
-        }
-
         local_irq_save(flags);
         fast_calibrate = quick_pit_calibrate();
         local_irq_restore(flags);
@@ -566,7 +562,7 @@ int recalibrate_cpu_khz(void)
         unsigned long cpu_khz_old = cpu_khz;
 
         if (cpu_has_tsc) {
-                tsc_khz = calibrate_tsc();
+                tsc_khz = x86_platform.calibrate_tsc();
                 cpu_khz = tsc_khz;
                 cpu_data(0).loops_per_jiffy =
                         cpufreq_scale(cpu_data(0).loops_per_jiffy,
@@ -670,7 +666,7 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
                         (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
                         (val == CPUFREQ_RESUMECHANGE)) {
-                *lpj =  cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
+                *lpj = cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
 
                 tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
                 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
@@ -744,10 +740,16 @@ static cycle_t __vsyscall_fn vread_tsc(void)
 }
 #endif
 
+static void resume_tsc(void)
+{
+        clocksource_tsc.cycle_last = 0;
+}
+
 static struct clocksource clocksource_tsc = {
         .name                   = "tsc",
         .rating                 = 300,
         .read                   = read_tsc,
+        .resume                 = resume_tsc,
         .mask                   = CLOCKSOURCE_MASK(64),
         .shift                  = 22,
         .flags                  = CLOCK_SOURCE_IS_CONTINUOUS |
@@ -761,12 +763,14 @@ void mark_tsc_unstable(char *reason)
 {
         if (!tsc_unstable) {
                 tsc_unstable = 1;
-                printk("Marking TSC unstable due to %s\n", reason);
+                printk(KERN_INFO "Marking TSC unstable due to %s\n", reason);
                 /* Change only the rating, when not registered */
                 if (clocksource_tsc.mult)
-                        clocksource_change_rating(&clocksource_tsc, 0);
-                else
+                        clocksource_mark_unstable(&clocksource_tsc);
+                else {
+                        clocksource_tsc.flags |= CLOCK_SOURCE_UNSTABLE;
                         clocksource_tsc.rating = 0;
+                }
         }
 }
 
@@ -852,15 +856,71 @@ static void __init init_tsc_clocksource(void)
         clocksource_register(&clocksource_tsc);
 }
 
+#ifdef CONFIG_X86_64
+/*
+ * calibrate_cpu is used on systems with fixed rate TSCs to determine
+ * processor frequency
+ */
+#define TICK_COUNT 100000000
+static unsigned long __init calibrate_cpu(void)
+{
+        int tsc_start, tsc_now;
+        int i, no_ctr_free;
+        unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
+        unsigned long flags;
+
+        for (i = 0; i < 4; i++)
+                if (avail_to_resrv_perfctr_nmi_bit(i))
+                        break;
+        no_ctr_free = (i == 4);
+        if (no_ctr_free) {
+                WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... "
+                     "cpu_khz value may be incorrect.\n");
+                i = 3;
+                rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
+                wrmsrl(MSR_K7_EVNTSEL3, 0);
+                rdmsrl(MSR_K7_PERFCTR3, pmc3);
+        } else {
+                reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
+                reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
+        }
+        local_irq_save(flags);
+        /* start measuring cycles, incrementing from 0 */
+        wrmsrl(MSR_K7_PERFCTR0 + i, 0);
+        wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
+        rdtscl(tsc_start);
+        do {
+                rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
+                tsc_now = get_cycles();
+        } while ((tsc_now - tsc_start) < TICK_COUNT);
+
+        local_irq_restore(flags);
+        if (no_ctr_free) {
+                wrmsrl(MSR_K7_EVNTSEL3, 0);
+                wrmsrl(MSR_K7_PERFCTR3, pmc3);
+                wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
+        } else {
+                release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
+                release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
+        }
+
+        return pmc_now * tsc_khz / (tsc_now - tsc_start);
+}
+#else
+static inline unsigned long calibrate_cpu(void) { return cpu_khz; }
+#endif
+
 void __init tsc_init(void)
 {
         u64 lpj;
         int cpu;
 
+        x86_init.timers.tsc_pre_init();
+
         if (!cpu_has_tsc)
                 return;
 
-        tsc_khz = calibrate_tsc();
+        tsc_khz = x86_platform.calibrate_tsc();
         cpu_khz = tsc_khz;
 
         if (!tsc_khz) {
@@ -868,11 +928,9 @@ void __init tsc_init(void)
                 return;
         }
 
-#ifdef CONFIG_X86_64
         if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
                         (boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
                 cpu_khz = calibrate_cpu();
-#endif
 
         printk("Detected %lu.%03lu MHz processor.\n",
                         (unsigned long)cpu_khz / 1000,
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index 31ffc24eec4d..f068553a1b17 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -30,6 +30,7 @@
 #include <asm/setup.h>
 #include <asm/apic.h>
 #include <asm/e820.h>
+#include <asm/time.h>
 #include <asm/io.h>
 
 #include <linux/kernel_stat.h>
@@ -53,7 +54,7 @@ int is_visws_box(void)
         return visws_board_type >= 0;
 }
 
-static int __init visws_time_init(void)
+static void __init visws_time_init(void)
 {
         printk(KERN_INFO "Starting Cobalt Timer system clock\n");
 
@@ -66,21 +67,13 @@ static int __init visws_time_init(void)
         /* Enable (unmask) the timer interrupt */
         co_cpu_write(CO_CPU_CTRL, co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK);
 
-        /*
-         * Zero return means the generic timer setup code will set up
-         * the standard vector:
-         */
-        return 0;
+        setup_default_timer_irq();
 }
 
-static int __init visws_pre_intr_init(void)
+/* Replaces the default init_ISA_irqs in the generic setup */
+static void __init visws_pre_intr_init(void)
 {
         init_VISWS_APIC_irqs();
-
-        /*
-         * We dont want ISA irqs to be set up by the generic code:
-         */
-        return 1;
 }
 
 /* Quirk for machine specific memory setup. */
@@ -156,12 +149,8 @@ static void visws_machine_power_off(void)
         outl(PIIX_SPECIAL_STOP, 0xCFC);
 }
 
-static int __init visws_get_smp_config(unsigned int early)
+static void __init visws_get_smp_config(unsigned int early)
 {
-        /*
-         * Prevent MP-table parsing by the generic code:
-         */
-        return 1;
 }
 
 /*
@@ -208,7 +197,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
         apic_version[m->apicid] = ver;
 }
 
-static int __init visws_find_smp_config(unsigned int reserve)
+static void __init visws_find_smp_config(unsigned int reserve)
 {
         struct mpc_cpu *mp = phys_to_virt(CO_CPU_TAB_PHYS);
         unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
@@ -230,21 +219,9 @@ static int __init visws_find_smp_config(unsigned int reserve)
                 MP_processor_info(mp++);
 
         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
-
-        return 1;
 }
 
-static int visws_trap_init(void);
-
-static struct x86_quirks visws_x86_quirks __initdata = {
-        .arch_time_init         = visws_time_init,
-        .arch_pre_intr_init     = visws_pre_intr_init,
-        .arch_memory_setup      = visws_memory_setup,
-        .arch_intr_init         = NULL,
-        .arch_trap_init         = visws_trap_init,
-        .mach_get_smp_config    = visws_get_smp_config,
-        .mach_find_smp_config   = visws_find_smp_config,
-};
+static void visws_trap_init(void);
 
 void __init visws_early_detect(void)
 {
@@ -257,11 +234,14 @@ void __init visws_early_detect(void)
                 return;
 
         /*
-         * Install special quirks for timer, interrupt and memory setup:
-         * Fall back to generic behavior for traps:
-         * Override generic MP-table parsing:
+         * Override the default platform setup functions
          */
-        x86_quirks = &visws_x86_quirks;
+        x86_init.resources.memory_setup = visws_memory_setup;
+        x86_init.mpparse.get_smp_config = visws_get_smp_config;
+        x86_init.mpparse.find_smp_config = visws_find_smp_config;
+        x86_init.irqs.pre_vector_init = visws_pre_intr_init;
+        x86_init.irqs.trap_init = visws_trap_init;
+        x86_init.timers.timer_init = visws_time_init;
 
         /*
          * Install reboot quirks:
@@ -400,12 +380,10 @@ static __init void cobalt_init(void)
                 co_apic_read(CO_APIC_ID));
 }
 
-static int __init visws_trap_init(void)
+static void __init visws_trap_init(void)
 {
         lithium_init();
         cobalt_init();
-
-        return 1;
 }
 
 /*
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 95a7289e4b0c..31e6f6cfe53e 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -817,15 +817,15 @@ static inline int __init activate_vmi(void)
                 vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm);
                 vmi_timer_ops.cancel_alarm =
                          vmi_get_function(VMI_CALL_CancelAlarm);
-                pv_time_ops.time_init = vmi_time_init;
-                pv_time_ops.get_wallclock = vmi_get_wallclock;
-                pv_time_ops.set_wallclock = vmi_set_wallclock;
+                x86_init.timers.timer_init = vmi_time_init;
 #ifdef CONFIG_X86_LOCAL_APIC
-                pv_apic_ops.setup_boot_clock = vmi_time_bsp_init;
-                pv_apic_ops.setup_secondary_clock = vmi_time_ap_init;
+                x86_init.timers.setup_percpu_clockev = vmi_time_bsp_init;
+                x86_cpuinit.setup_percpu_clockev = vmi_time_ap_init;
 #endif
                 pv_time_ops.sched_clock = vmi_sched_clock;
-                pv_time_ops.get_tsc_khz = vmi_tsc_khz;
+                x86_platform.calibrate_tsc = vmi_tsc_khz;
+                x86_platform.get_wallclock = vmi_get_wallclock;
+                x86_platform.set_wallclock = vmi_set_wallclock;
 
                 /* We have true wallclock functions; disable CMOS clock sync */
                 no_sync_cmos_clock = 1;
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 2b3eb82efeeb..611b9e2360d3 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -68,7 +68,7 @@ unsigned long long vmi_sched_clock(void)
         return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE));
 }
 
-/* paravirt_ops.get_tsc_khz = vmi_tsc_khz */
+/* x86_platform.calibrate_tsc = vmi_tsc_khz */
 unsigned long vmi_tsc_khz(void)
 {
         unsigned long long khz;
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 0ccb57d5ee35..a46acccec38a 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -45,9 +45,9 @@ PHDRS {
         text PT_LOAD FLAGS(5);          /* R_E */
         data PT_LOAD FLAGS(7);          /* RWE */
 #ifdef CONFIG_X86_64
-        user PT_LOAD FLAGS(7);          /* RWE */
+        user PT_LOAD FLAGS(5);          /* R_E */
 #ifdef CONFIG_SMP
-        percpu PT_LOAD FLAGS(7);        /* RWE */
+        percpu PT_LOAD FLAGS(6);        /* RW_ */
 #endif
         init PT_LOAD FLAGS(7);          /* RWE */
 #endif
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 25ee06a80aad..8cb4974ff599 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -87,6 +87,7 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
         vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec;
         vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;
         vsyscall_gtod_data.wall_to_monotonic = wall_to_monotonic;
+        vsyscall_gtod_data.wall_time_coarse = __current_kernel_time();
         write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
 }
 
@@ -227,19 +228,11 @@ static long __vsyscall(3) venosys_1(void)
 }
 
 #ifdef CONFIG_SYSCTL
-
-static int
-vsyscall_sysctl_change(ctl_table *ctl, int write, struct file * filp,
-                       void __user *buffer, size_t *lenp, loff_t *ppos)
-{
-        return proc_dointvec(ctl, write, filp, buffer, lenp, ppos);
-}
-
 static ctl_table kernel_table2[] = {
         { .procname = "vsyscall64",
           .data = &vsyscall_gtod_data.sysctl_enabled, .maxlen = sizeof(int),
           .mode = 0644,
-          .proc_handler = vsyscall_sysctl_change },
+          .proc_handler = proc_dointvec },
         {}
 };
 
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
new file mode 100644
index 000000000000..4449a4a2c2ed
--- /dev/null
+++ b/arch/x86/kernel/x86_init.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
+ *
+ *  For licencing details see kernel-base/COPYING
+ */
+#include <linux/init.h>
+
+#include <asm/bios_ebda.h>
+#include <asm/paravirt.h>
+#include <asm/mpspec.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+#include <asm/e820.h>
+#include <asm/time.h>
+#include <asm/irq.h>
+#include <asm/tsc.h>
+
+void __cpuinit x86_init_noop(void) { }
+void __init x86_init_uint_noop(unsigned int unused) { }
+void __init x86_init_pgd_noop(pgd_t *unused) { }
+
+/*
+ * The platform setup functions are preset with the default functions
+ * for standard PC hardware.
+ */
+struct x86_init_ops x86_init __initdata = {
+
+        .resources = {
+                .probe_roms             = x86_init_noop,
+                .reserve_resources      = reserve_standard_io_resources,
+                .memory_setup           = default_machine_specific_memory_setup,
+        },
+
+        .mpparse = {
+                .mpc_record             = x86_init_uint_noop,
+                .setup_ioapic_ids       = x86_init_noop,
+                .mpc_apic_id            = default_mpc_apic_id,
+                .smp_read_mpc_oem       = default_smp_read_mpc_oem,
+                .mpc_oem_bus_info       = default_mpc_oem_bus_info,
+                .find_smp_config        = default_find_smp_config,
+                .get_smp_config         = default_get_smp_config,
+        },
+
+        .irqs = {
+                .pre_vector_init        = init_ISA_irqs,
+                .intr_init              = native_init_IRQ,
+                .trap_init              = x86_init_noop,
+        },
+
+        .oem = {
+                .arch_setup             = x86_init_noop,
+                .banner                 = default_banner,
+        },
+
+        .paging = {
+                .pagetable_setup_start  = native_pagetable_setup_start,
+                .pagetable_setup_done   = native_pagetable_setup_done,
+        },
+
+        .timers = {
+                .setup_percpu_clockev   = setup_boot_APIC_clock,
+                .tsc_pre_init           = x86_init_noop,
+                .timer_init             = hpet_time_init,
+        },
+};
+
+struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
+        .setup_percpu_clockev           = setup_secondary_APIC_clock,
+};
+
+struct x86_platform_ops x86_platform = {
+        .calibrate_tsc                  = native_calibrate_tsc,
+        .get_wallclock                  = mach_get_cmos_time,
+        .set_wallclock                  = mach_set_rtc_mmss,
+};
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index d677fa9ca650..7e59dc1d3fc2 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -1135,11 +1135,6 @@ static struct notifier_block paniced = {
 /* Setting up memory is fairly easy. */
 static __init char *lguest_memory_setup(void)
 {
-        /* We do this here and not earlier because lockcheck used to barf if we
-         * did it before start_kernel().  I think we fixed that, so it'd be
-         * nice to move it back to lguest_init.  Patch welcome... */
-        atomic_notifier_chain_register(&panic_notifier_list, &paniced);
-
         /*
          *The Linux bootloader header contains an "e820" memory map: the
          * Launcher populated the first entry with our memory limit.
@@ -1262,7 +1257,6 @@ __init void lguest_init(void)
          */
 
         /* Interrupt-related operations */
-        pv_irq_ops.init_IRQ = lguest_init_IRQ;
         pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl);
         pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(lg_restore_fl);
         pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable);
@@ -1270,7 +1264,6 @@ __init void lguest_init(void)
         pv_irq_ops.safe_halt = lguest_safe_halt;
 
         /* Setup operations */
-        pv_init_ops.memory_setup = lguest_memory_setup;
         pv_init_ops.patch = lguest_patch;
 
         /* Intercepts of various CPU instructions */
@@ -1320,10 +1313,11 @@ __init void lguest_init(void)
         set_lguest_basic_apic_ops();
 #endif
 
-        /* Time operations */
-        pv_time_ops.get_wallclock = lguest_get_wallclock;
-        pv_time_ops.time_init = lguest_time_init;
-        pv_time_ops.get_tsc_khz = lguest_tsc_khz;
+        x86_init.resources.memory_setup = lguest_memory_setup;
+        x86_init.irqs.intr_init = lguest_init_IRQ;
+        x86_init.timers.timer_init = lguest_time_init;
+        x86_platform.calibrate_tsc = lguest_tsc_khz;
+        x86_platform.get_wallclock =  lguest_get_wallclock;
 
         /*
          * Now is a good time to look at the implementations of these functions
@@ -1365,10 +1359,13 @@ __init void lguest_init(void)
 
         /*
          * If we don't initialize the lock dependency checker now, it crashes
-         * paravirt_disable_iospace.
+         * atomic_notifier_chain_register, then paravirt_disable_iospace.
          */
         lockdep_init();
 
+        /* Hook in our special panic hypercall code. */
+        atomic_notifier_chain_register(&panic_notifier_list, &paniced);
+
         /*
          * The IDE code spends about 3 seconds probing for disks: if we reserve
          * all the I/O ports up front it can't get them and so doesn't probe.
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 775a020990a5..f4cee9028cf0 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -10,7 +10,7 @@
 #include <linux/bootmem.h>              /* max_low_pfn                  */
 #include <linux/kprobes.h>              /* __kprobes, ...               */
 #include <linux/mmiotrace.h>            /* kmmio_handler, ...           */
-#include <linux/perf_counter.h>         /* perf_swcounter_event         */
+#include <linux/perf_event.h>           /* perf_sw_event                */
 
 #include <asm/traps.h>                  /* dotraplinkage, ...           */
 #include <asm/pgalloc.h>                /* pgd_*(), ...                 */
@@ -167,6 +167,7 @@ force_sig_info_fault(int si_signo, int si_code, unsigned long address,
         info.si_errno   = 0;
         info.si_code    = si_code;
         info.si_addr    = (void __user *)address;
+        info.si_addr_lsb = si_code == BUS_MCEERR_AR ? PAGE_SHIFT : 0;
 
         force_sig_info(si_signo, &info, tsk);
 }
@@ -790,10 +791,12 @@ out_of_memory(struct pt_regs *regs, unsigned long error_code,
 }
 
 static void
-do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
+do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address,
+          unsigned int fault)
 {
         struct task_struct *tsk = current;
         struct mm_struct *mm = tsk->mm;
+        int code = BUS_ADRERR;
 
         up_read(&mm->mmap_sem);
 
@@ -809,7 +812,15 @@ do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
         tsk->thread.error_code  = error_code;
         tsk->thread.trap_no     = 14;
 
-        force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
+#ifdef CONFIG_MEMORY_FAILURE
+        if (fault & VM_FAULT_HWPOISON) {
+                printk(KERN_ERR
+        "MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n",
+                        tsk->comm, tsk->pid, address);
+                code = BUS_MCEERR_AR;
+        }
+#endif
+        force_sig_info_fault(SIGBUS, code, address, tsk);
 }
 
 static noinline void
@@ -819,8 +830,8 @@ mm_fault_error(struct pt_regs *regs, unsigned long error_code,
         if (fault & VM_FAULT_OOM) {
                 out_of_memory(regs, error_code, address);
         } else {
-                if (fault & VM_FAULT_SIGBUS)
-                        do_sigbus(regs, error_code, address);
+                if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON))
+                        do_sigbus(regs, error_code, address, fault);
                 else
                         BUG();
         }
@@ -1017,7 +1028,7 @@ do_page_fault(struct pt_regs *regs, unsigned long error_code)
         if (unlikely(error_code & PF_RSVD))
                 pgtable_bad(regs, error_code, address);
 
-        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
 
         /*
          * If we're in an interrupt, have no user context or are running
@@ -1114,11 +1125,11 @@ good_area:
 
         if (fault & VM_FAULT_MAJOR) {
                 tsk->maj_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
                                      regs, address);
         } else {
                 tsk->min_flt++;
-                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
                                      regs, address);
         }
 
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 3cd7711bb949..30938c1d8d5d 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -84,7 +84,7 @@ static pmd_t * __init one_md_table_init(pgd_t *pgd)
 #ifdef CONFIG_X86_PAE
         if (!(pgd_val(*pgd) & _PAGE_PRESENT)) {
                 if (after_bootmem)
-                        pmd_table = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
+                        pmd_table = (pmd_t *)alloc_bootmem_pages(PAGE_SIZE);
                 else
                         pmd_table = (pmd_t *)alloc_low_page();
                 paravirt_alloc_pmd(&init_mm, __pa(pmd_table) >> PAGE_SHIFT);
@@ -116,7 +116,7 @@ static pte_t * __init one_page_table_init(pmd_t *pmd)
 #endif
                         if (!page_table)
                                 page_table =
-                                (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);
+                                (pte_t *)alloc_bootmem_pages(PAGE_SIZE);
                 } else
                         page_table = (pte_t *)alloc_low_page();
 
@@ -857,8 +857,6 @@ static void __init test_wp_bit(void)
         }
 }
 
-static struct kcore_list kcore_mem, kcore_vmalloc;
-
 void __init mem_init(void)
 {
         int codesize, reservedpages, datasize, initsize;
@@ -886,13 +884,9 @@ void __init mem_init(void)
         datasize =  (unsigned long) &_edata - (unsigned long) &_etext;
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
-        kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
-        kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
-                   VMALLOC_END-VMALLOC_START);
-
         printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, "
                         "%dk reserved, %dk data, %dk init, %ldk highmem)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 num_physpages << (PAGE_SHIFT-10),
                 codesize >> 10,
                 reservedpages << (PAGE_SHIFT-10),
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index ea56b8cbb6a6..5a4398a6006b 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -647,8 +647,7 @@ EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
 
 #endif /* CONFIG_MEMORY_HOTPLUG */
 
-static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel,
-                         kcore_modules, kcore_vsyscall;
+static struct kcore_list kcore_vsyscall;
 
 void __init mem_init(void)
 {
@@ -677,17 +676,12 @@ void __init mem_init(void)
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
         /* Register memory areas for /proc/kcore */
-        kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
-        kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
-                   VMALLOC_END-VMALLOC_START);
-        kclist_add(&kcore_kernel, &_stext, _end - _stext);
-        kclist_add(&kcore_modules, (void *)MODULES_VADDR, MODULES_LEN);
         kclist_add(&kcore_vsyscall, (void *)VSYSCALL_START,
-                                 VSYSCALL_END - VSYSCALL_START);
+                         VSYSCALL_END - VSYSCALL_START, KCORE_OTHER);
 
         printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
                          "%ldk absent, %ldk reserved, %ldk data, %ldk init)\n",
-                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+                nr_free_pages() << (PAGE_SHIFT-10),
                 max_pfn << (PAGE_SHIFT-10),
                 codesize >> 10,
                 absent_pages << (PAGE_SHIFT-10),
diff --git a/arch/x86/mm/kmemcheck/kmemcheck.c b/arch/x86/mm/kmemcheck/kmemcheck.c
index 528bf954eb74..8cc183344140 100644
--- a/arch/x86/mm/kmemcheck/kmemcheck.c
+++ b/arch/x86/mm/kmemcheck/kmemcheck.c
@@ -225,9 +225,6 @@ void kmemcheck_hide(struct pt_regs *regs)
 
         BUG_ON(!irqs_disabled());
 
-        if (data->balance == 0)
-                return;
-
         if (unlikely(data->balance != 1)) {
                 kmemcheck_show_all();
                 kmemcheck_error_save_bug(regs);
diff --git a/arch/x86/mm/kmemcheck/shadow.c b/arch/x86/mm/kmemcheck/shadow.c
index e773b6bd0079..3f66b82076a3 100644
--- a/arch/x86/mm/kmemcheck/shadow.c
+++ b/arch/x86/mm/kmemcheck/shadow.c
@@ -1,7 +1,6 @@
 #include <linux/kmemcheck.h>
 #include <linux/module.h>
 #include <linux/mm.h>
-#include <linux/module.h>
 
 #include <asm/page.h>
 #include <asm/pgtable.h>
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 165829600566..c8191defc38a 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -29,13 +29,26 @@
 #include <linux/random.h>
 #include <linux/limits.h>
 #include <linux/sched.h>
+#include <asm/elf.h>
+
+static unsigned int stack_maxrandom_size(void)
+{
+        unsigned int max = 0;
+        if ((current->flags & PF_RANDOMIZE) &&
+                !(current->personality & ADDR_NO_RANDOMIZE)) {
+                max = ((-1U) & STACK_RND_MASK) << PAGE_SHIFT;
+        }
+
+        return max;
+}
+
 
 /*
  * Top of mmap area (just below the process stack).
  *
- * Leave an at least ~128 MB hole.
+ * Leave an at least ~128 MB hole with possible stack randomization.
  */
-#define MIN_GAP (128*1024*1024)
+#define MIN_GAP (128*1024*1024UL + stack_maxrandom_size())
 #define MAX_GAP (TASK_SIZE/6*5)
 
 /*
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 24952fdc7e40..dd38bfbefd1f 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -144,6 +144,7 @@ void clflush_cache_range(void *vaddr, unsigned int size)
 
         mb();
 }
+EXPORT_SYMBOL_GPL(clflush_cache_range);
 
 static void __cpa_flush_all(void *arg)
 {
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index d7ebc3a10f2f..7257cf3decf9 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -424,17 +424,9 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
 
         spin_lock(&memtype_lock);
 
-        entry = memtype_rb_search(&memtype_rbroot, new->start);
-        if (likely(entry != NULL)) {
-                /* To work correctly with list_for_each_entry_continue */
-                entry = list_entry(entry->nd.prev, struct memtype, nd);
-        } else {
-                entry = list_entry(&memtype_list, struct memtype, nd);
-        }
-
         /* Search for existing mapping that overlaps the current range */
         where = NULL;
-        list_for_each_entry_continue(entry, &memtype_list, nd) {
+        list_for_each_entry(entry, &memtype_list, nd) {
                 if (end <= entry->start) {
                         where = entry->nd.prev;
                         break;
@@ -532,7 +524,7 @@ int free_memtype(u64 start, u64 end)
          * in sorted start address
          */
         saved_entry = entry;
-        list_for_each_entry(entry, &memtype_list, nd) {
+        list_for_each_entry_from(entry, &memtype_list, nd) {
                 if (entry->start == start && entry->end == end) {
                         rb_erase(&entry->rb, &memtype_rbroot);
                         list_del(&entry->nd);
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index c814e144a3f0..36fe08eeb5c3 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -59,7 +59,8 @@ void leave_mm(int cpu)
 {
         if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
                 BUG();
-        cpu_clear(cpu, percpu_read(cpu_tlbstate.active_mm)->cpu_vm_mask);
+        cpumask_clear_cpu(cpu,
+                          mm_cpumask(percpu_read(cpu_tlbstate.active_mm)));
         load_cr3(swapper_pg_dir);
 }
 EXPORT_SYMBOL_GPL(leave_mm);
@@ -234,8 +235,8 @@ void flush_tlb_current_task(void)
         preempt_disable();
 
         local_flush_tlb();
-        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
-                flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
+        if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(mm_cpumask(mm), mm, TLB_FLUSH_ALL);
         preempt_enable();
 }
 
@@ -249,8 +250,8 @@ void flush_tlb_mm(struct mm_struct *mm)
                 else
                         leave_mm(smp_processor_id());
         }
-        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
-                flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
+        if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(mm_cpumask(mm), mm, TLB_FLUSH_ALL);
 
         preempt_enable();
 }
@@ -268,8 +269,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
                         leave_mm(smp_processor_id());
         }
 
-        if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
-                flush_tlb_others(&mm->cpu_vm_mask, mm, va);
+        if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
+                flush_tlb_others(mm_cpumask(mm), mm, va);
 
         preempt_enable();
 }
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 4899215999de..8eb05878554c 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -234,11 +234,11 @@ static void arch_perfmon_setup_counters(void)
         if (eax.split.version_id == 0 && current_cpu_data.x86 == 6 &&
                 current_cpu_data.x86_model == 15) {
                 eax.split.version_id = 2;
-                eax.split.num_counters = 2;
+                eax.split.num_events = 2;
                 eax.split.bit_width = 40;
         }
 
-        num_counters = eax.split.num_counters;
+        num_counters = eax.split.num_events;
 
         op_arch_perfmon_spec.num_counters = num_counters;
         op_arch_perfmon_spec.num_controls = num_counters;
diff --git a/arch/x86/oprofile/op_x86_model.h b/arch/x86/oprofile/op_x86_model.h
index b83776180c7f..7b8e75d16081 100644
--- a/arch/x86/oprofile/op_x86_model.h
+++ b/arch/x86/oprofile/op_x86_model.h
@@ -13,7 +13,7 @@
 #define OP_X86_MODEL_H
 
 #include <asm/types.h>
-#include <asm/perf_counter.h>
+#include <asm/perf_event.h>
 
 struct op_msr {
         unsigned long   addr;
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index 3ffa10df20b9..572ee9782f2a 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -15,63 +15,6 @@
  * also get peer root bus resource for io,mmio
  */
 
-#ifdef CONFIG_NUMA
-
-#define BUS_NR 256
-
-#ifdef CONFIG_X86_64
-
-static int mp_bus_to_node[BUS_NR];
-
-void set_mp_bus_to_node(int busnum, int node)
-{
-        if (busnum >= 0 &&  busnum < BUS_NR)
-                mp_bus_to_node[busnum] = node;
-}
-
-int get_mp_bus_to_node(int busnum)
-{
-        int node = -1;
-
-        if (busnum < 0 || busnum > (BUS_NR - 1))
-                return node;
-
-        node = mp_bus_to_node[busnum];
-
-        /*
-         * let numa_node_id to decide it later in dma_alloc_pages
-         * if there is no ram on that node
-         */
-        if (node != -1 && !node_online(node))
-                node = -1;
-
-        return node;
-}
-
-#else /* CONFIG_X86_32 */
-
-static unsigned char mp_bus_to_node[BUS_NR];
-
-void set_mp_bus_to_node(int busnum, int node)
-{
-        if (busnum >= 0 &&  busnum < BUS_NR)
-        mp_bus_to_node[busnum] = (unsigned char) node;
-}
-
-int get_mp_bus_to_node(int busnum)
-{
-        int node;
-
-        if (busnum < 0 || busnum > (BUS_NR - 1))
-                return 0;
-        node = mp_bus_to_node[busnum];
-        return node;
-}
-
-#endif /* CONFIG_X86_32 */
-
-#endif /* CONFIG_NUMA */
-
 #ifdef CONFIG_X86_64
 
 /*
@@ -301,11 +244,6 @@ static int __init early_fill_mp_bus_info(void)
         u64 val;
         u32 address;
 
-#ifdef CONFIG_NUMA
-        for (i = 0; i < BUS_NR; i++)
-                mp_bus_to_node[i] = -1;
-#endif
-
         if (!early_pci_allowed())
                 return -1;
 
@@ -346,7 +284,7 @@ static int __init early_fill_mp_bus_info(void)
                 node = (reg >> 4) & 0x07;
 #ifdef CONFIG_NUMA
                 for (j = min_bus; j <= max_bus; j++)
-                        mp_bus_to_node[j] = (unsigned char) node;
+                        set_mp_bus_to_node(j, node);
 #endif
                 link = (reg >> 8) & 0x03;
 
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 2202b6257b82..1331fcf26143 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -600,3 +600,72 @@ struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
 {
         return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
 }
+
+/*
+ * NUMA info for PCI busses
+ *
+ * Early arch code is responsible for filling in reasonable values here.
+ * A node id of "-1" means "use current node".  In other words, if a bus
+ * has a -1 node id, it's not tightly coupled to any particular chunk
+ * of memory (as is the case on some Nehalem systems).
+ */
+#ifdef CONFIG_NUMA
+
+#define BUS_NR 256
+
+#ifdef CONFIG_X86_64
+
+static int mp_bus_to_node[BUS_NR] = {
+        [0 ... BUS_NR - 1] = -1
+};
+
+void set_mp_bus_to_node(int busnum, int node)
+{
+        if (busnum >= 0 &&  busnum < BUS_NR)
+                mp_bus_to_node[busnum] = node;
+}
+
+int get_mp_bus_to_node(int busnum)
+{
+        int node = -1;
+
+        if (busnum < 0 || busnum > (BUS_NR - 1))
+                return node;
+
+        node = mp_bus_to_node[busnum];
+
+        /*
+         * let numa_node_id to decide it later in dma_alloc_pages
+         * if there is no ram on that node
+         */
+        if (node != -1 && !node_online(node))
+                node = -1;
+
+        return node;
+}
+
+#else /* CONFIG_X86_32 */
+
+static int mp_bus_to_node[BUS_NR] = {
+        [0 ... BUS_NR - 1] = -1
+};
+
+void set_mp_bus_to_node(int busnum, int node)
+{
+        if (busnum >= 0 &&  busnum < BUS_NR)
+        mp_bus_to_node[busnum] = (unsigned char) node;
+}
+
+int get_mp_bus_to_node(int busnum)
+{
+        int node;
+
+        if (busnum < 0 || busnum > (BUS_NR - 1))
+                return 0;
+        node = mp_bus_to_node[busnum];
+        return node;
+}
+
+#endif /* CONFIG_X86_32 */
+
+#endif /* CONFIG_NUMA */
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 712443ec6d43..602c172d3bd5 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -13,10 +13,14 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
+#include <linux/sfi_acpi.h>
 #include <linux/bitmap.h>
 #include <linux/sort.h>
 #include <asm/e820.h>
 #include <asm/pci_x86.h>
+#include <asm/acpi.h>
+
+#define PREFIX "PCI: "
 
 /* aperture is up to 256MB but BIOS may reserve less */
 #define MMCONFIG_APER_MIN       (2 * 1024*1024)
@@ -491,7 +495,7 @@ static void __init pci_mmcfg_reject_broken(int early)
                        (unsigned int)cfg->start_bus_number,
                        (unsigned int)cfg->end_bus_number);
 
-                if (!early)
+                if (!early && !acpi_disabled)
                         valid = is_mmconf_reserved(is_acpi_reserved, addr, size, i, cfg, 0);
 
                 if (valid)
@@ -606,7 +610,7 @@ static void __init __pci_mmcfg_init(int early)
         }
 
         if (!known_bridge)
-                acpi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg);
+                acpi_sfi_table_parse(ACPI_SIG_MCFG, pci_parse_mcfg);
 
         pci_mmcfg_reject_broken(early);
 
diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c
index 8b2d561046a3..f10a7e94a84c 100644
--- a/arch/x86/pci/mmconfig_32.c
+++ b/arch/x86/pci/mmconfig_32.c
@@ -11,9 +11,9 @@
 
 #include <linux/pci.h>
 #include <linux/init.h>
-#include <linux/acpi.h>
 #include <asm/e820.h>
 #include <asm/pci_x86.h>
+#include <acpi/acpi.h>
 
 /* Assume systems with more busses have correct MCFG */
 #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c
index 417c9f5b4afa..8aa85f17667e 100644
--- a/arch/x86/power/cpu.c
+++ b/arch/x86/power/cpu.c
@@ -243,10 +243,6 @@ static void __restore_processor_state(struct saved_context *ctxt)
 
         do_fpu_end();
         mtrr_bp_restore();
-
-#ifdef CONFIG_X86_OLD_MCE
-        mcheck_init(&boot_cpu_data);
-#endif
 }
 
 /* Needed by apm.c */
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile
index 88112b49f02c..6b4ffedb93c9 100644
--- a/arch/x86/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
@@ -122,7 +122,7 @@ quiet_cmd_vdso = VDSO    $@
                        $(VDSO_LDFLAGS) $(VDSO_LDFLAGS_$(filter %.lds,$(^F))) \
                        -Wl,-T,$(filter %.lds,$^) $(filter %.o,$^)
 
-VDSO_LDFLAGS = -fPIC -shared $(call ld-option, -Wl$(comma)--hash-style=sysv)
+VDSO_LDFLAGS = -fPIC -shared $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
 GCOV_PROFILE := n
 
 #
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 6a40b78b46aa..ee55754cc3c5 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -86,14 +86,47 @@ notrace static noinline int do_monotonic(struct timespec *ts)
         return 0;
 }
 
+notrace static noinline int do_realtime_coarse(struct timespec *ts)
+{
+        unsigned long seq;
+        do {
+                seq = read_seqbegin(&gtod->lock);
+                ts->tv_sec = gtod->wall_time_coarse.tv_sec;
+                ts->tv_nsec = gtod->wall_time_coarse.tv_nsec;
+        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        return 0;
+}
+
+notrace static noinline int do_monotonic_coarse(struct timespec *ts)
+{
+        unsigned long seq, ns, secs;
+        do {
+                seq = read_seqbegin(&gtod->lock);
+                secs = gtod->wall_time_coarse.tv_sec;
+                ns = gtod->wall_time_coarse.tv_nsec;
+                secs += gtod->wall_to_monotonic.tv_sec;
+                ns += gtod->wall_to_monotonic.tv_nsec;
+        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        vset_normalized_timespec(ts, secs, ns);
+        return 0;
+}
+
 notrace int __vdso_clock_gettime(clockid_t clock, struct timespec *ts)
 {
-        if (likely(gtod->sysctl_enabled && gtod->clock.vread))
+        if (likely(gtod->sysctl_enabled))
                 switch (clock) {
                 case CLOCK_REALTIME:
-                        return do_realtime(ts);
+                        if (likely(gtod->clock.vread))
+                                return do_realtime(ts);
+                        break;
                 case CLOCK_MONOTONIC:
-                        return do_monotonic(ts);
+                        if (likely(gtod->clock.vread))
+                                return do_monotonic(ts);
+                        break;
+                case CLOCK_REALTIME_COARSE:
+                        return do_realtime_coarse(ts);
+                case CLOCK_MONOTONIC_COARSE:
+                        return do_monotonic_coarse(ts);
                 }
         return vdso_fallback_gettime(clock, ts);
 }
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 0dd0c2c6cae0..544eb7496531 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -912,19 +912,9 @@ static const struct pv_info xen_info __initdata = {
 
 static const struct pv_init_ops xen_init_ops __initdata = {
         .patch = xen_patch,
-
-        .banner = xen_banner,
-        .memory_setup = xen_memory_setup,
-        .arch_setup = xen_arch_setup,
-        .post_allocator_init = xen_post_allocator_init,
 };
 
 static const struct pv_time_ops xen_time_ops __initdata = {
-        .time_init = xen_time_init,
-
-        .set_wallclock = xen_set_wallclock,
-        .get_wallclock = xen_get_wallclock,
-        .get_tsc_khz = xen_tsc_khz,
         .sched_clock = xen_sched_clock,
 };
 
@@ -990,8 +980,6 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = {
 
 static const struct pv_apic_ops xen_apic_ops __initdata = {
 #ifdef CONFIG_X86_LOCAL_APIC
-        .setup_boot_clock = paravirt_nop,
-        .setup_secondary_clock = paravirt_nop,
         .startup_ipi_hook = paravirt_nop,
 #endif
 };
@@ -1070,7 +1058,18 @@ asmlinkage void __init xen_start_kernel(void)
         pv_time_ops = xen_time_ops;
         pv_cpu_ops = xen_cpu_ops;
         pv_apic_ops = xen_apic_ops;
-        pv_mmu_ops = xen_mmu_ops;
+
+        x86_init.resources.memory_setup = xen_memory_setup;
+        x86_init.oem.arch_setup = xen_arch_setup;
+        x86_init.oem.banner = xen_banner;
+
+        x86_init.timers.timer_init = xen_time_init;
+        x86_init.timers.setup_percpu_clockev = x86_init_noop;
+        x86_cpuinit.setup_percpu_clockev = x86_init_noop;
+
+        x86_platform.calibrate_tsc = xen_tsc_khz;
+        x86_platform.get_wallclock = xen_get_wallclock;
+        x86_platform.set_wallclock = xen_set_wallclock;
 
         /*
          * Set up some pagetable state before starting to set any ptes.
@@ -1095,6 +1094,7 @@ asmlinkage void __init xen_start_kernel(void)
          */
         xen_setup_stackprotector();
 
+        xen_init_mmu_ops();
         xen_init_irq_ops();
         xen_init_cpuid_mask();
 
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index cfd17799bd6d..9d30105a0c4a 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -1,5 +1,7 @@
 #include <linux/hardirq.h>
 
+#include <asm/x86_init.h>
+
 #include <xen/interface/xen.h>
 #include <xen/interface/sched.h>
 #include <xen/interface/vcpu.h>
@@ -112,8 +114,6 @@ static void xen_halt(void)
 }
 
 static const struct pv_irq_ops xen_irq_ops __initdata = {
-        .init_IRQ = xen_init_IRQ,
-
         .save_fl = PV_CALLEE_SAVE(xen_save_fl),
         .restore_fl = PV_CALLEE_SAVE(xen_restore_fl),
         .irq_disable = PV_CALLEE_SAVE(xen_irq_disable),
@@ -129,4 +129,5 @@ static const struct pv_irq_ops xen_irq_ops __initdata = {
 void __init xen_init_irq_ops()
 {
         pv_irq_ops = xen_irq_ops;
+        x86_init.irqs.intr_init = xen_init_IRQ;
 }
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 4ceb28581652..3bf7b1d250ce 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1165,14 +1165,14 @@ static void xen_drop_mm_ref(struct mm_struct *mm)
         /* Get the "official" set of cpus referring to our pagetable. */
         if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
                 for_each_online_cpu(cpu) {
-                        if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
+                        if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
                             && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
                                 continue;
                         smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
                 }
                 return;
         }
-        cpumask_copy(mask, &mm->cpu_vm_mask);
+        cpumask_copy(mask, mm_cpumask(mm));
 
         /* It's possible that a vcpu may have a stale reference to our
            cr3, because its in lazy mode, and it hasn't yet flushed
@@ -1229,9 +1229,12 @@ static __init void xen_pagetable_setup_start(pgd_t *base)
 {
 }
 
+static void xen_post_allocator_init(void);
+
 static __init void xen_pagetable_setup_done(pgd_t *base)
 {
         xen_setup_shared_info();
+        xen_post_allocator_init();
 }
 
 static void xen_write_cr2(unsigned long cr2)
@@ -1841,7 +1844,7 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
 #endif
 }
 
-__init void xen_post_allocator_init(void)
+static __init void xen_post_allocator_init(void)
 {
         pv_mmu_ops.set_pte = xen_set_pte;
         pv_mmu_ops.set_pmd = xen_set_pmd;
@@ -1875,10 +1878,7 @@ static void xen_leave_lazy_mmu(void)
         preempt_enable();
 }
 
-const struct pv_mmu_ops xen_mmu_ops __initdata = {
-        .pagetable_setup_start = xen_pagetable_setup_start,
-        .pagetable_setup_done = xen_pagetable_setup_done,
-
+static const struct pv_mmu_ops xen_mmu_ops __initdata = {
         .read_cr2 = xen_read_cr2,
         .write_cr2 = xen_write_cr2,
 
@@ -1954,6 +1954,12 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = {
         .set_fixmap = xen_set_fixmap,
 };
 
+void __init xen_init_mmu_ops(void)
+{
+        x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
+        x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
+        pv_mmu_ops = xen_mmu_ops;
+}
 
 #ifdef CONFIG_XEN_DEBUG_FS
 
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h
index da7302624897..5fe6bc7f5ecf 100644
--- a/arch/x86/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
@@ -59,5 +59,5 @@ void  xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 
 unsigned long xen_read_cr2_direct(void);
 
-extern const struct pv_mmu_ops xen_mmu_ops;
+extern void xen_init_mmu_ops(void);
 #endif  /* _XEN_MMU_H */
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 22494fd4c9b5..355fa6b99c9c 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -30,8 +30,6 @@ pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
 void xen_ident_map_ISA(void);
 void xen_reserve_top(void);
 
-void xen_post_allocator_init(void);
-
 char * __init xen_memory_setup(void);
 void __init xen_arch_setup(void);
 void __init xen_init_IRQ(void);
diff --git a/arch/xtensa/include/asm/mman.h b/arch/xtensa/include/asm/mman.h
index 9b92620c8a1e..fca4db425f6e 100644
--- a/arch/xtensa/include/asm/mman.h
+++ b/arch/xtensa/include/asm/mman.h
@@ -53,6 +53,8 @@
 #define MAP_LOCKED      0x8000          /* pages are locked */
 #define MAP_POPULATE    0x10000         /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x20000         /* do not block on IO */
+#define MAP_STACK       0x40000         /* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB     0x80000         /* create a huge page mapping */
 
 /*
  * Flags for msync
@@ -78,6 +80,9 @@
 #define MADV_DONTFORK   10              /* don't inherit across fork */
 #define MADV_DOFORK     11              /* do inherit across fork */
 
+#define MADV_MERGEABLE   12             /* KSM may merge identical pages */
+#define MADV_UNMERGEABLE 13             /* KSM may not merge identical pages */
+
 /* compatibility flags */
 #define MAP_FILE        0
 
diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile
index fe3186de6a33..6f56d95f2c1e 100644
--- a/arch/xtensa/kernel/Makefile
+++ b/arch/xtensa/kernel/Makefile
@@ -27,7 +27,8 @@ sed-y = -e 's/(\(\.[a-z]*it\|\.ref\|\)\.text)/(\1.literal \1.text)/g'	\
         -e 's/(\(\.text\.[a-z]*\))/(\1.literal \1)/g'
 
 quiet_cmd__cpp_lds_S = LDS     $@
-      cmd__cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ $< | sed $(sed-y) >$@
+      cmd__cpp_lds_S = $(CPP) $(cpp_flags) -P -C -Uxtensa -D__ASSEMBLY__ $< \
+                       | sed $(sed-y) >$@
 
 $(obj)/vmlinux.lds: $(src)/vmlinux.lds.S FORCE
         $(call if_changed_dep,_cpp_lds_S)
diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S
index d9ddc1ba761c..d215adcfd4ea 100644
--- a/arch/xtensa/kernel/head.S
+++ b/arch/xtensa/kernel/head.S
@@ -235,7 +235,7 @@ should_never_return:
  * BSS section
  */
         
-.section ".bss.page_aligned", "w"
+__PAGE_ALIGNED_BSS
 #ifdef CONFIG_MMU
 ENTRY(swapper_pg_dir)
         .fill   PAGE_SIZE, 1, 0
diff --git a/arch/xtensa/kernel/init_task.c b/arch/xtensa/kernel/init_task.c
index c4302f0e4ba0..cd122fb7e48a 100644
--- a/arch/xtensa/kernel/init_task.c
+++ b/arch/xtensa/kernel/init_task.c
@@ -23,9 +23,8 @@
 
 static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
 static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
-union thread_union init_thread_union
-        __attribute__((__section__(".data.init_task"))) =
-{ INIT_THREAD_INFO(init_task) };
+union thread_union init_thread_union __init_task_data =
+        { INIT_THREAD_INFO(init_task) };
 
 struct task_struct init_task = INIT_TASK(init_task);
 
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 8848120d291b..19085ff0484a 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -59,9 +59,8 @@ static struct irqaction timer_irqaction = {
 
 void __init time_init(void)
 {
-        xtime.tv_nsec = 0;
-        xtime.tv_sec = read_persistent_clock();
-
+        /* FIXME: xtime&wall_to_monotonic are set in timekeeping_init. */
+        read_persistent_clock(&xtime);
         set_normalized_timespec(&wall_to_monotonic,
                 -xtime.tv_sec, -xtime.tv_nsec);
 
diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S
index 921b6ff3b645..9b526154c9ba 100644
--- a/arch/xtensa/kernel/vmlinux.lds.S
+++ b/arch/xtensa/kernel/vmlinux.lds.S
@@ -15,6 +15,8 @@
  */
 
 #include <asm-generic/vmlinux.lds.h>
+#include <asm/page.h>
+#include <asm/thread_info.h>
 
 #include <variant/core.h>
 #include <platform/hardware.h>
@@ -107,41 +109,18 @@ SECTIONS
 
   .fixup   : { *(.fixup) }
 
-  . = ALIGN(16);
-
-  __ex_table : {
-    __start___ex_table = .;
-    *(__ex_table)
-    __stop___ex_table = .;
-  }
-
+  EXCEPTION_TABLE(16)
   /* Data section */
 
-  . = ALIGN(XCHAL_ICACHE_LINESIZE);
   _fdata = .;
-  .data :
-  {
-    DATA_DATA
-    CONSTRUCTORS
-    . = ALIGN(XCHAL_ICACHE_LINESIZE);
-    *(.data.cacheline_aligned)
-  }
-
+  RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
   _edata = .;
 
-  /* The initial task */
-  . = ALIGN(8192);
-  .data.init_task : { *(.data.init_task) }
-
   /* Initialization code and data: */
 
-  . = ALIGN(1 << 12);
+  . = ALIGN(PAGE_SIZE);
   __init_begin = .;
-  .init.text : {
-        _sinittext = .;
-        INIT_TEXT
-        _einittext = .;
-  }
+  INIT_TEXT_SECTION(PAGE_SIZE)
 
   .init.data :
   {
@@ -168,36 +147,15 @@ SECTIONS
                    .DebugInterruptVector.text);
   
     __boot_reloc_table_end = ABSOLUTE(.) ;
-  }
 
-  . = ALIGN(XCHAL_ICACHE_LINESIZE);
-
-  __setup_start = .;
-  .init.setup : { *(.init.setup) }
-  __setup_end = .;
-
-  __initcall_start = .;
-  .initcall.init : {
-        INITCALLS
+    INIT_SETUP(XCHAL_ICACHE_LINESIZE)
+    INIT_CALLS
+    CON_INITCALL
+    SECURITY_INITCALL
+    INIT_RAM_FS
   }
-  __initcall_end = .;
-
-  __con_initcall_start = .;
-  .con_initcall.init : { *(.con_initcall.init) }
-  __con_initcall_end = .;
-
-  SECURITY_INIT
-
-
-#ifdef CONFIG_BLK_DEV_INITRD
-  . = ALIGN(4096);
-  __initramfs_start =.;
-  .init.ramfs : { *(.init.ramfs) }
-  __initramfs_end = .;
-#endif
-
-  PERCPU(4096)
 
+  PERCPU(PAGE_SIZE)
 
   /* We need this dummy segment here */
 
@@ -252,16 +210,11 @@ SECTIONS
                   .DoubleExceptionVector.literal)
 
   . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
-  . = ALIGN(1 << 12);
+  . = ALIGN(PAGE_SIZE);
 
   __init_end = .;
 
-  . = ALIGN(8192);
-
-  /* BSS section */
-  _bss_start = .;
-  .bss : { *(.bss.page_aligned) *(.bss) }
-  _bss_end = .;
+  BSS_SECTION(0, 8192, 0)
 
   _end = .;
 
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index 427e14fa43c5..cdbc27ca9665 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -203,7 +203,7 @@ void __init mem_init(void)
 
         printk("Memory: %luk/%luk available (%ldk kernel code, %ldk reserved, "
                "%ldk data, %ldk init %ldk highmem)\n",
-               (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
+               nr_free_pages() << (PAGE_SHIFT-10),
                ram << (PAGE_SHIFT-10),
                codesize >> 10,
                reservedpages << (PAGE_SHIFT-10),