467 files changed, 27598 insertions, 6555 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 8290b69da202..213c7850d5fb 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -453,7 +453,7 @@ config ALPHA_IRONGATE
 config GENERIC_HWEIGHT
        bool
-        default y if !ALPHA_EV6 && !ALPHA_EV67
+        default y if !ALPHA_EV67
 config ALPHA_AVANTI
        bool
diff --git a/arch/alpha/kernel/alpha_ksyms.c b/arch/alpha/kernel/alpha_ksyms.c
index c645c5e14786..2b245ad731ee 100644
--- a/arch/alpha/kernel/alpha_ksyms.c
+++ b/arch/alpha/kernel/alpha_ksyms.c
@@ -182,7 +182,6 @@ EXPORT_SYMBOL(smp_num_cpus);
 EXPORT_SYMBOL(smp_call_function);
 EXPORT_SYMBOL(smp_call_function_on_cpu);
 EXPORT_SYMBOL(_atomic_dec_and_lock);
-EXPORT_SYMBOL(cpu_present_mask);
 #endif /* CONFIG_SMP */
 /*
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 9924fd07743a..c760a831fd1a 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -94,7 +94,7 @@ common_shutdown_1(void *generic_ptr)
        if (cpuid != boot_cpuid) {
                flags |= 0x00040000UL; /* "remain halted" */
                *pflags = flags;
-                clear_bit(cpuid, &cpu_present_mask);
+                cpu_clear(cpuid, cpu_present_map);
                halt();
        }
 #endif
@@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr)
 #ifdef CONFIG_SMP
        /* Wait for the secondaries to halt. */
-        cpu_clear(boot_cpuid, cpu_possible_map);
+        cpu_clear(boot_cpuid, cpu_present_map);
-        while (cpus_weight(cpu_possible_map))
+        while (cpus_weight(cpu_present_map))
                barrier();
 #endif
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 185255416e85..4dc273e537fd 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -68,7 +68,6 @@ enum ipi_message_type {
 static int smp_secondary_alive __initdata = 0;
 /* Which cpus ids came online.  */
-cpumask_t cpu_present_mask;
 cpumask_t cpu_online_map;
 EXPORT_SYMBOL(cpu_online_map);
@@ -439,7 +438,7 @@ setup_smp(void)
                        if ((cpu->flags & 0x1cc) == 0x1cc) {
                                smp_num_probed++;
                                /* Assume here that "whami" == index */
-                                cpu_set(i, cpu_present_mask);
+                                cpu_set(i, cpu_present_map);
                                cpu->pal_revision = boot_cpu_palrev;
                        }
@@ -450,11 +449,10 @@ setup_smp(void)
                }
        } else {
                smp_num_probed = 1;
-                cpu_set(boot_cpuid, cpu_present_mask);
        }
-        printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
+        printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n",
-               smp_num_probed, cpu_possible_map.bits[0]);
+               smp_num_probed, cpu_present_map.bits[0]);
 }
 /*
@@ -473,7 +471,7 @@ smp_prepare_cpus(unsigned int max_cpus)
        /* Nothing to do on a UP box, or when told not to.  */
        if (smp_num_probed == 1 || max_cpus == 0) {
-                cpu_present_mask = cpumask_of_cpu(boot_cpuid);
+                cpu_present_map = cpumask_of_cpu(boot_cpuid);
                printk(KERN_INFO "SMP mode deactivated.\n");
                return;
        }
@@ -486,10 +484,6 @@ smp_prepare_cpus(unsigned int max_cpus)
 void __devinit
 smp_prepare_boot_cpu(void)
 {
-        /*
-         * Mark the boot cpu (current cpu) as online
-         */ 
-        cpu_set(smp_processor_id(), cpu_online_map);
 }
 int __devinit
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 5f84417eeb7b..2551fb49ae09 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -66,7 +66,7 @@ titan_update_irq_hw(unsigned long mask)
        register int bcpu = boot_cpuid;
 #ifdef CONFIG_SMP
-        cpumask_t cpm = cpu_present_mask;
+        cpumask_t cpm = cpu_present_map;
        volatile unsigned long *dim0, *dim1, *dim2, *dim3;
        unsigned long mask0, mask1, mask2, mask3, dummy;
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 08b7cc900cae..1b7e5c2e90ef 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -93,15 +93,49 @@ choice
        prompt "ARM system type"
        default ARCH_VERSATILE
+config ARCH_AAEC2000
+        bool "Agilent AAEC-2000 based"
+        select ARM_AMBA
+        help
+          This enables support for systems based on the Agilent AAEC-2000
+config ARCH_INTEGRATOR
+        bool "ARM Ltd. Integrator family"
+        select ARM_AMBA
+        select ICST525
+        help
+          Support for ARM's Integrator platform.
+config ARCH_REALVIEW
+        bool "ARM Ltd. RealView family"
+        select ARM_AMBA
+        select ICST307
+        help
+          This enables support for ARM Ltd RealView boards.
+config ARCH_VERSATILE
+        bool "ARM Ltd. Versatile family"
+        select ARM_AMBA
+        select ARM_VIC
+        select ICST307
+        help
+          This enables support for ARM Ltd Versatile board.
+config ARCH_AT91RM9200
+        bool "Atmel AT91RM9200"
+        help
+          Say Y here if you intend to run this kernel on an Atmel
+          AT91RM9200-based board.
 config ARCH_CLPS7500
-        bool "Cirrus-CL-PS7500FE"
+        bool "Cirrus CL-PS7500FE"
        select TIMER_ACORN
        select ISA
        help
          Support for the Cirrus Logic PS7500FE system-on-a-chip.
 config ARCH_CLPS711X
-        bool "CLPS711x/EP721x-based"
+        bool "Cirrus Logic CLPS711x/EP721x-based"
        help
          Support for Cirrus Logic 711x/721x based boards.
@@ -135,12 +169,22 @@ config ARCH_FOOTBRIDGE
          Support for systems based on the DC21285 companion chip
          ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
-config ARCH_INTEGRATOR
+config ARCH_NETX
-        bool "Integrator"
+        bool "Hilscher NetX based"
-        select ARM_AMBA
+        select ARM_VIC
-        select ICST525
        help
-          Support for ARM's Integrator platform.
+          This enables support for systems based on the Hilscher NetX Soc
+config ARCH_H720X
+        bool "Hynix HMS720x-based"
+        select ISA_DMA_API
+        help
+          This enables support for systems based on the Hynix HMS720x
+config ARCH_IMX
+        bool "IMX"
+        help
+          Support for Motorola's i.MX family of processors (MX1, MXL).
 config ARCH_IOP3XX
        bool "IOP3xx-based"
@@ -178,6 +222,11 @@ config ARCH_L7200
          If you have any questions or comments about the Linux kernel port
          to this board, send e-mail to <sjhill@cotw.com>.
+config ARCH_PNX4008
+        bool "Philips Nexperia PNX4008 Mobile"
+        help
+          This enables support for Philips PNX4008 mobile platform.
 config ARCH_PXA
        bool "PXA2xx-based"
        select ARCH_MTD_XIP
@@ -232,44 +281,6 @@ config ARCH_OMAP
        help
          Support for TI's OMAP platform (OMAP1 and OMAP2).
-config ARCH_VERSATILE
-        bool "Versatile"
-        select ARM_AMBA
-        select ARM_VIC
-        select ICST307
-        help
-          This enables support for ARM Ltd Versatile board.
-config ARCH_REALVIEW
-        bool "RealView"
-        select ARM_AMBA
-        select ICST307
-        help
-          This enables support for ARM Ltd RealView boards.
-config ARCH_IMX
-        bool "IMX"
-        help
-          Support for Motorola's i.MX family of processors (MX1, MXL).
-config ARCH_H720X
-        bool "Hynix-HMS720x-based"
-        select ISA_DMA_API
-        help
-          This enables support for systems based on the Hynix HMS720x
-config ARCH_AAEC2000
-        bool "Agilent AAEC-2000 based"
-        select ARM_AMBA
-        help
-          This enables support for systems based on the Agilent AAEC-2000
-config ARCH_AT91RM9200
-        bool "AT91RM9200"
-        help
-          Say Y here if you intend to run this kernel on an Atmel
-          AT91RM9200-based board.
 endchoice
 source "arch/arm/mach-clps711x/Kconfig"
@@ -314,6 +325,8 @@ source "arch/arm/mach-realview/Kconfig"
 source "arch/arm/mach-at91rm9200/Kconfig"
+source "arch/arm/mach-netx/Kconfig"
 # Definitions to make life easier
 config ARCH_ACORN
        bool
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5d3acff8c596..d22f38b957db 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART
        help
          Choice for UART for kernel low-level using S3C2410 UARTS,
          should be between zero and two. The port must have been
-          initalised by the boot-loader before use.
+          initialised by the boot-loader before use.
          The uncompressor code port configuration is now handled
          by CONFIG_S3C2410_LOWLEVEL_UART_PORT.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6f8e84c1c1f2..282b14e2f464 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -116,6 +116,8 @@ endif
 machine-$(CONFIG_ARCH_REALVIEW)   := realview
 machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200
 machine-$(CONFIG_ARCH_EP93XX)     := ep93xx
+ machine-$(CONFIG_ARCH_PNX4008)    := pnx4008
+ machine-$(CONFIG_ARCH_NETX)       := netx
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/compressed/head-at91rm9200.S b/arch/arm/boot/compressed/head-at91rm9200.S
index 2119ea62b547..57a3b163b2cb 100644
--- a/arch/arm/boot/compressed/head-at91rm9200.S
+++ b/arch/arm/boot/compressed/head-at91rm9200.S
@@ -49,6 +49,18 @@
                cmp     r7, r3
                beq     99f
+                @ Embest ATEB9200 : 923
+                mov     r3,     #(MACH_TYPE_ATEB9200 & 0xff)
+                orr     r3, r3, #(MACH_TYPE_ATEB9200 & 0xff00)
+                cmp     r7, r3
+                beq     99f
+                @ Sperry-Sun KAFA : 662
+                mov     r3,     #(MACH_TYPE_KAFA & 0xff)
+                orr     r3, r3, #(MACH_TYPE_KAFA & 0xff00)
+                cmp     r7, r3
+                beq     99f
                @ Unknown board, use the AT91RM9200DK board
                @ mov   r7, #MACH_TYPE_AT91RM9200
                mov     r7,     #(MACH_TYPE_AT91RM9200DK & 0xff)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b56f5e691d65..23016f6aa645 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -605,8 +605,8 @@ proc_types:
                b       __armv4_mmu_cache_off
                b       __armv4_mmu_cache_flush
-                .word   0x00070000              @ ARMv6
+                .word   0x0007b000              @ ARMv6
-                .word   0x000f0000
+                .word   0x0007f000
                b       __armv4_mmu_cache_on
                b       __armv4_mmu_cache_off
                b       __armv6_mmu_cache_flush
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c
index 3cd8c9ee4510..045e37e07330 100644
--- a/arch/arm/common/sharpsl_pm.c
+++ b/arch/arm/common/sharpsl_pm.c
@@ -49,13 +49,6 @@
 #define SHARPSL_CHARGE_CO_CHECK_TIME           5   /* 5 msec */
 #define SHARPSL_CHARGE_RETRY_CNT               1   /* eqv. 10 min */
-#define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
-#define SHARPSL_CHARGE_ON_TEMP         0xe0  /* 2.9V */
-#define SHARPSL_CHARGE_ON_ACIN_HIGH    0x9b  /* 6V */
-#define SHARPSL_CHARGE_ON_ACIN_LOW     0x34  /* 2V */
-#define SHARPSL_FATAL_ACIN_VOLT        182   /* 3.45V */
-#define SHARPSL_FATAL_NOACIN_VOLT      170   /* 3.40V */
 /*
 * Prototypes
 */
@@ -82,12 +75,13 @@ DEFINE_LED_TRIGGER(sharpsl_charge_led_trigger);
 static int get_percentage(int voltage)
 {
        int i = sharpsl_pm.machinfo->bat_levels - 1;
+        int bl_status = sharpsl_pm.machinfo->backlight_get_status ? sharpsl_pm.machinfo->backlight_get_status() : 0;
        struct battery_thresh *thresh;
        if (sharpsl_pm.charge_mode == CHRG_ON)
-                thresh=sharpsl_pm.machinfo->bat_levels_acin;
+                thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_acin_bl : sharpsl_pm.machinfo->bat_levels_acin;
        else
-                thresh=sharpsl_pm.machinfo->bat_levels_noac;
+                thresh = bl_status ? sharpsl_pm.machinfo->bat_levels_noac_bl : sharpsl_pm.machinfo->bat_levels_noac;
        while (i > 0 && (voltage > thresh[i].voltage))
                i--;
@@ -131,7 +125,7 @@ static void sharpsl_battery_thread(void *private_)
        sharpsl_pm.battstat.ac_status = (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN) ? APM_AC_ONLINE : APM_AC_OFFLINE);
        /* Corgi cannot confirm when battery fully charged so periodically kick! */
-        if (machine_is_corgi() && (sharpsl_pm.charge_mode == CHRG_ON)
+        if (!sharpsl_pm.machinfo->batfull_irq && (sharpsl_pm.charge_mode == CHRG_ON)
                        && time_after(jiffies, sharpsl_pm.charge_start_time +  SHARPSL_CHARGE_ON_TIME_INTERVAL))
                schedule_work(&toggle_charger);
@@ -166,11 +160,11 @@ static void sharpsl_battery_thread(void *private_)
                        && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) ||
                        (sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_CRITICAL))) {
                if (!(sharpsl_pm.flags & SHARPSL_BL_LIMIT)) {
-                        corgibl_limit_intensity(1);
+                        sharpsl_pm.machinfo->backlight_limit(1);
                        sharpsl_pm.flags |= SHARPSL_BL_LIMIT;
                }
        } else if (sharpsl_pm.flags & SHARPSL_BL_LIMIT) {
-                corgibl_limit_intensity(0);
+                sharpsl_pm.machinfo->backlight_limit(0);
                sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT;
        }
@@ -418,7 +412,7 @@ static int sharpsl_check_battery_temp(void)
        val = get_select_val(buff);
        dev_dbg(sharpsl_pm.dev, "Temperature: %d\n", val);
-        if (val > SHARPSL_CHARGE_ON_TEMP)
+        if (val > sharpsl_pm.machinfo->charge_on_temp)
                return -1;
        return 0;
@@ -450,7 +444,7 @@ static int sharpsl_check_battery_voltage(void)
        val = get_select_val(buff);
        dev_dbg(sharpsl_pm.dev, "Battery Voltage: %d\n", val);
-        if (val < SHARPSL_CHARGE_ON_VOLT)
+        if (val < sharpsl_pm.machinfo->charge_on_volt)
                return -1;
        return 0;
@@ -468,7 +462,7 @@ static int sharpsl_ac_check(void)
        temp = get_select_val(buff);
        dev_dbg(sharpsl_pm.dev, "AC Voltage: %d\n",temp);
-        if ((temp > SHARPSL_CHARGE_ON_ACIN_HIGH) || (temp < SHARPSL_CHARGE_ON_ACIN_LOW)) {
+        if ((temp > sharpsl_pm.machinfo->charge_acin_high) || (temp < sharpsl_pm.machinfo->charge_acin_low)) {
                dev_err(sharpsl_pm.dev, "Error: AC check failed.\n");
                return -1;
        }
@@ -627,8 +621,8 @@ static int sharpsl_fatal_check(void)
        temp = get_select_val(buff);
        dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %d\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
-        if ((acin && (temp < SHARPSL_FATAL_ACIN_VOLT)) ||
+        if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
-                        (!acin && (temp < SHARPSL_FATAL_NOACIN_VOLT)))
+                        (!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
                return -1;
        return 0;
 }
diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig
new file mode 100644
index 000000000000..69c39e098743
--- /dev/null
+++ b/arch/arm/configs/ateb9200_defconfig
@@ -0,0 +1,1312 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17-rc3
+# Sun May  7 16:53:18 2006
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+#
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+CONFIG_ARCH_AT91RM9200=y
+#
+# AT91RM9200 Implementations
+#
+#
+# AT91RM9200 Board Type
+#
+# CONFIG_ARCH_AT91RM9200DK is not set
+# CONFIG_MACH_AT91RM9200EK is not set
+# CONFIG_MACH_CSB337 is not set
+# CONFIG_MACH_CSB637 is not set
+# CONFIG_MACH_CARMEVA is not set
+# CONFIG_MACH_KB9200 is not set
+CONFIG_MACH_ATEB9200=y
+# CONFIG_MACH_KAFA is not set
+#
+# AT91 Feature Selections
+#
+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM920T=y
+CONFIG_CPU_32v4=y
+CONFIG_CPU_ABRT_EV4T=y
+CONFIG_CPU_CACHE_V4WT=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+#
+# Bus support
+#
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+CONFIG_PCCARD=m
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+#
+# PC-card bridges
+#
+CONFIG_AT91_CF=m
+#
+# Kernel Features
+#
+CONFIG_PREEMPT=y
+CONFIG_NO_IDLE_HZ=y
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+#
+# Floating point emulation
+#
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_PM_LEGACY=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_APM is not set
+#
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETFILTER is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_IEEE80211_SOFTMAC is not set
+CONFIG_WIRELESS_EXT=y
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLOCK is not set
+CONFIG_MTD_BLOCK_RO=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_AT91_DATAFLASH=y
+# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_PROC_FS=y
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_DEBUG is not set
+#
+# PCMCIA SCSI adapter support
+#
+# CONFIG_PCMCIA_AHA152X is not set
+# CONFIG_PCMCIA_FDOMAIN is not set
+# CONFIG_PCMCIA_NINJA_SCSI is not set
+# CONFIG_PCMCIA_QLOGIC is not set
+# CONFIG_PCMCIA_SYM53C500 is not set
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+#
+# IEEE 1394 (FireWire) support
+#
+#
+# I2O device support
+#
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+#
+# PHY device support
+#
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+CONFIG_DAVICOM_PHY=y
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_ARM_AT91_ETHER=y
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+#
+# Ethernet (1000 Mbit)
+#
+#
+# Ethernet (10000 Mbit)
+#
+#
+# Token Ring devices
+#
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+# CONFIG_NET_WIRELESS_RTNETLINK is not set
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+# CONFIG_STRIP is not set
+# CONFIG_PCMCIA_WAVELAN is not set
+# CONFIG_PCMCIA_NETWAVE is not set
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+# CONFIG_PCMCIA_RAYCS is not set
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+# CONFIG_HERMES is not set
+# CONFIG_ATMEL is not set
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+# CONFIG_AIRO_CS is not set
+# CONFIG_PCMCIA_WL3501 is not set
+# CONFIG_HOSTAP is not set
+CONFIG_NET_WIRELESS=y
+#
+# PCMCIA network device support
+#
+# CONFIG_NET_PCMCIA is not set
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AT91=y
+CONFIG_SERIAL_AT91_CONSOLE=y
+# CONFIG_SERIAL_AT91_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+#
+# Ftape, the floppy tape device driver
+#
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+CONFIG_AT91_SPI=y
+CONFIG_AT91_SPIDEV=y
+#
+# I2C support
+#
+CONFIG_I2C=m
+CONFIG_I2C_CHARDEV=m
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_AT91=m
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_PCA_ISA is not set
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Misc devices
+#
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+#
+# LED drivers
+#
+#
+# LED Triggers
+#
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+#
+# Sound
+#
+CONFIG_SOUND=y
+#
+# Advanced Linux Sound Architecture
+#
+# CONFIG_SND is not set
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_DPCM=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_LIBUSUAL is not set
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+CONFIG_HID_FF=y
+CONFIG_HID_PID=y
+CONFIG_LOGITECH_FF=y
+CONFIG_THRUSTMASTER_FF=y
+CONFIG_USB_HIDDEV=y
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_TOUCHSCREEN is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_AX8817X=y
+CONFIG_USB_NET_CDCETHER=y
+CONFIG_USB_NET_GL620A=y
+CONFIG_USB_NET_NET1080=y
+CONFIG_USB_NET_PLUSB=y
+CONFIG_USB_NET_RNDIS_HOST=y
+CONFIG_USB_NET_CDC_SUBSET=y
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+CONFIG_USB_EPSON2888=y
+CONFIG_USB_NET_ZAURUS=y
+# CONFIG_USB_ZD1201 is not set
+CONFIG_USB_MON=y
+#
+# USB port drivers
+#
+#
+# USB Serial Converter support
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRPRIME is not set
+# CONFIG_USB_SERIAL_ANYDATA is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+CONFIG_USB_SERIAL_CP2101=m
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=m
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=m
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TEST is not set
+#
+# USB DSL modem support
+#
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+CONFIG_USB_GADGET_AT91=y
+CONFIG_USB_AT91=m
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+#
+# MMC/SD Card support
+#
+CONFIG_MMC=m
+CONFIG_MMC_DEBUG=y
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_AT91RM9200=m
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_HCTOSYS is not set
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+CONFIG_RTC_DRV_AT91=y
+# CONFIG_RTC_DRV_TEST is not set
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=m
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=m
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_DIRECTIO=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+CONFIG_NFSD_V4=y
+CONFIG_NFSD_TCP=y
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=m
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=m
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+#
+# Profiling support
+#
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_FS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+# CONFIG_DEBUG_USER is not set
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=m
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig
new file mode 100644
index 000000000000..5ccd29a7c1fb
--- /dev/null
+++ b/arch/arm/configs/carmeva_defconfig
@@ -0,0 +1,723 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.12-rc4
+# Tue Jun 14 12:05:24 2005
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_IOMAP=y
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_SYSCTL is not set
+# CONFIG_AUDIT is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+CONFIG_ARCH_AT91RM9200=y
+#
+# AT91RM9200 Implementations
+#
+# CONFIG_ARCH_AT91RM9200DK is not set
+# CONFIG_MACH_AT91RM9200EK is not set
+# CONFIG_MACH_CSB337 is not set
+# CONFIG_MACH_CSB637 is not set
+CONFIG_MACH_CARMEVA=y
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM920T=y
+CONFIG_CPU_32v4=y
+CONFIG_CPU_ABRT_EV4T=y
+CONFIG_CPU_CACHE_V4WT=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+#
+# Bus support
+#
+CONFIG_ISA_DMA_API=y
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+#
+# Kernel Features
+#
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_DISCONTIGMEM is not set
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+#
+# Floating point emulation
+#
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+#
+# Power management options
+#
+# CONFIG_PM is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_AT91_DATAFLASH=y
+# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CDROM_PKTCDVD is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+#
+# Fusion MPT device support
+#
+#
+# IEEE 1394 (FireWire) support
+#
+#
+# I2O device support
+#
+#
+# Networking support
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_ARM_AT91_ETHER=y
+CONFIG_ARM_AT91_ETHER_RMII=y
+# CONFIG_SMC91X is not set
+#
+# Ethernet (1000 Mbit)
+#
+#
+# Ethernet (10000 Mbit)
+#
+#
+# Token Ring devices
+#
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=m
+CONFIG_SERIO_SERPORT=m
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AT91=y
+CONFIG_SERIAL_AT91_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_AT91_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+CONFIG_AT91_SPI=y
+CONFIG_AT91_SPIDEV=y
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+#
+# Misc devices
+#
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB is not set
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+#
+# MMC/SD Card support
+#
+CONFIG_MMC=m
+CONFIG_MMC_DEBUG=y
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_AT91RM9200=m
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_POSIX_ACL is not set
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS_FS=y
+CONFIG_JFFS_FS_VERBOSE=0
+CONFIG_JFFS_PROC_FS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_NAND=y
+# CONFIG_JFFS2_FS_NOR_ECC is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V4=y
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_USER is not set
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig
index c9aa878e610a..074c47a4fb2e 100644
--- a/arch/arm/configs/collie_defconfig
+++ b/arch/arm/configs/collie_defconfig
@@ -1,21 +1,21 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.14-rc3
+# Linux kernel version: 2.6.17-rc1
-# Sun Oct  9 16:55:14 2005
+# Fri Apr 14 19:09:52 2006
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
-CONFIG_UID16=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_VECTORS_BASE=0xffff0000
 #
 # Code maturity level options
 #
 CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
 CONFIG_BROKEN_ON_SMP=y
-CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 #
@@ -23,45 +23,58 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 #
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
+# CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
-CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_BSD_PROCESS_ACCT_V3 is not set
 CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
-CONFIG_HOTPLUG=y
-CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
-CONFIG_BASE_FULL=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
 CONFIG_FUTEX=y
-CONFIG_EPOLL=y
+# CONFIG_EPOLL is not set
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
+# CONFIG_SLAB is not set
-CONFIG_CC_ALIGN_LABELS=0
+CONFIG_DOUBLEFAULT=y
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
 # CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
+CONFIG_BASE_SMALL=1
+CONFIG_SLOB=y
+CONFIG_OBSOLETE_INTERMODULE=y
 #
 # Loadable module support
 #
-CONFIG_MODULES=y
+# CONFIG_MODULES is not set
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
+#
-CONFIG_OBSOLETE_MODPARM=y
+# Block layer
-CONFIG_MODVERSIONS=y
+#
-# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
-CONFIG_KMOD=y
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
 #
 # System Type
@@ -70,11 +83,13 @@ CONFIG_KMOD=y
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_IOP3XX is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
 # CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
@@ -84,9 +99,11 @@ CONFIG_ARCH_SA1100=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_AT91RM9200 is not set
 #
 # SA11x0 Implementations
@@ -128,20 +145,32 @@ CONFIG_SHARP_SCOOP=y
 # Bus support
 #
 CONFIG_ISA=y
-CONFIG_ISA_DMA_API=y
 #
 # PCCARD (PCMCIA/CardBus) support
 #
-# CONFIG_PCCARD is not set
+CONFIG_PCCARD=y
+CONFIG_PCMCIA_DEBUG=y
+CONFIG_PCMCIA=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+#
+# PC-card bridges
+#
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+CONFIG_PCMCIA_SA1100=y
 #
 # Kernel Features
 #
-# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
-CONFIG_PREEMPT=y
 # CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
 CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
+CONFIG_NODES_SHIFT=2
 CONFIG_SELECT_MEMORY_MODEL=y
 # CONFIG_FLATMEM_MANUAL is not set
 CONFIG_DISCONTIGMEM_MANUAL=y
@@ -150,6 +179,7 @@ CONFIG_DISCONTIGMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_NEED_MULTIPLE_NODES=y
 # CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_LEDS is not set
 CONFIG_ALIGNMENT_TRAP=y
@@ -158,7 +188,7 @@ CONFIG_ALIGNMENT_TRAP=y
 #
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200n8 console=tty1 noinitrd root=/dev/mtdblock2 rootfstype=jffs2   debug"
+CONFIG_CMDLINE="noinitrd root=/dev/mtdblock2 rootfstype=jffs2 fbcon=rotate:1"
 # CONFIG_XIP_KERNEL is not set
 #
@@ -181,14 +211,16 @@ CONFIG_FPE_NWFPE=y
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_AOUT=m
+# CONFIG_BINFMT_AOUT is not set
-CONFIG_BINFMT_MISC=m
+# CONFIG_BINFMT_MISC is not set
 # CONFIG_ARTHUR is not set
 #
 # Power management options
 #
 CONFIG_PM=y
+CONFIG_PM_LEGACY=y
+# CONFIG_PM_DEBUG is not set
 CONFIG_APM=y
 #
@@ -199,6 +231,7 @@ CONFIG_NET=y
 #
 # Networking options
 #
+# CONFIG_NETDEBUG is not set
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -211,16 +244,19 @@ CONFIG_IP_FIB_HASH=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETFILTER is not set
 #
@@ -232,6 +268,11 @@ CONFIG_TCP_CONG_BIC=y
 # SCTP Configuration (EXPERIMENTAL)
 #
 # CONFIG_IP_SCTP is not set
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
 # CONFIG_VLAN_8021Q is not set
@@ -244,8 +285,11 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
 #
 # Network testing
@@ -265,10 +309,15 @@ CONFIG_TCP_CONG_BIC=y
 #
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=m
+CONFIG_FW_LOADER=y
 # CONFIG_DEBUG_DRIVER is not set
 #
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
 # Memory Technology Devices (MTD)
 #
 CONFIG_MTD=y
@@ -287,32 +336,49 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
+CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
 # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
 # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
 # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I2 is not set
-# CONFIG_MTD_CFI_I4 is not set
+CONFIG_MTD_CFI_I4=y
 # CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
 CONFIG_MTD_OBSOLETE_CHIPS=y
 CONFIG_MTD_SHARP=y
+# CONFIG_MTD_XIP is not set
 #
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+CONFIG_MTD_SA1100=y
+# CONFIG_MTD_IMPA7 is not set
 # CONFIG_MTD_PLATRAM is not set
 #
@@ -321,7 +387,6 @@ CONFIG_MTD_SHARP=y
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
 # CONFIG_MTD_BLOCK2MTD is not set
 #
@@ -337,6 +402,11 @@ CONFIG_MTD_SHARP=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -349,7 +419,6 @@ CONFIG_MTD_SHARP=y
 #
 # Block devices
 #
-# CONFIG_BLK_DEV_XD is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
@@ -359,20 +428,35 @@ CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=1024
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
 #
-# IO Schedulers
+# ATA/ATAPI/MFM/RLL support
 #
-CONFIG_IOSCHED_NOOP=y
+CONFIG_IDE=y
-CONFIG_IOSCHED_AS=y
+CONFIG_BLK_DEV_IDE=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_ATA_OVER_ETH=m
 #
-# ATA/ATAPI/MFM/RLL support
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+CONFIG_IDEDISK_MULTI_MODE=y
+CONFIG_BLK_DEV_IDECS=y
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+#
+# IDE chipset support/bugfixes
 #
-# CONFIG_IDE is not set
+CONFIG_IDE_GENERIC=y
+# CONFIG_IDE_ARM is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
 #
 # SCSI device support
@@ -402,6 +486,39 @@ CONFIG_ATA_OVER_ETH=m
 # Network device support
 #
 # CONFIG_NETDEVICES is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+#
+# PHY device support
+#
+#
+# Ethernet (10 or 100Mbit)
+#
+# CONFIG_NET_ETHERNET is not set
+#
+# Ethernet (1000 Mbit)
+#
+#
+# Ethernet (10000 Mbit)
+#
+CONFIG_PPP=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=y
+# CONFIG_PPP_SYNC_TTY is not set
+# CONFIG_PPP_DEFLATE is not set
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
@@ -424,7 +541,7 @@ CONFIG_INPUT_TSDEV=y
 CONFIG_INPUT_TSDEV_SCREEN_X=240
 CONFIG_INPUT_TSDEV_SCREEN_Y=320
 CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
+# CONFIG_INPUT_EVBUG is not set
 #
 # Input Device Drivers
@@ -438,7 +555,11 @@ CONFIG_KEYBOARD_LOCOMO=y
 # CONFIG_KEYBOARD_NEWTON is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
 # CONFIG_INPUT_MISC is not set
 #
@@ -461,7 +582,16 @@ CONFIG_HW_CONSOLE=y
 #
 # Serial drivers
 #
-# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_CONSOLE is not set
+CONFIG_SERIAL_8250_CS=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_SHARE_IRQ is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
 #
 # Non-8250 serial port support
@@ -483,94 +613,48 @@ CONFIG_UNIX98_PTYS=y
 #
 # CONFIG_WATCHDOG is not set
 # CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 #
 # Ftape, the floppy tape device driver
 #
-# CONFIG_RAW_DRIVER is not set
 #
-# TPM devices
+# PCMCIA character devices
 #
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_RAW_DRIVER is not set
 #
-# I2C support
+# TPM devices
 #
-CONFIG_I2C=m
+# CONFIG_TCG_TPM is not set
-# CONFIG_I2C_CHARDEV is not set
+# CONFIG_TELCLOCK is not set
 #
-# I2C Algorithms
+# I2C support
 #
-CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
 #
-# I2C Hardware Bus support
+# SPI support
 #
-# CONFIG_I2C_ELEKTOR is not set
+# CONFIG_SPI is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_SPI_MASTER is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_PCA_ISA is not set
 #
-# Miscellaneous I2C Chip support
+# Dallas's 1-wire bus
 #
-# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_W1 is not set
-# CONFIG_SENSORS_DS1374 is not set
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
 #
 # Hardware Monitoring support
 #
-CONFIG_HWMON=y
+# CONFIG_HWMON is not set
 # CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_FSCPOS is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83792D is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
 #
 # Misc devices
@@ -579,42 +663,33 @@ CONFIG_HWMON=y
 #
 # Multimedia Capabilities Port drivers
 #
-# CONFIG_MCP_SA11X0 is not set
+CONFIG_MCP=y
+CONFIG_MCP_SA11X0=y
+CONFIG_MCP_UCB1200=y
+CONFIG_MCP_UCB1200_TS=y
 #
-# Multimedia devices
+# LED devices
 #
-CONFIG_VIDEO_DEV=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
 #
-# Video For Linux
+# LED drivers
 #
+CONFIG_LEDS_LOCOMO=y
 #
-# Video Adapters
+# LED Triggers
 #
-# CONFIG_VIDEO_PMS is not set
+CONFIG_LEDS_TRIGGERS=y
-# CONFIG_VIDEO_CPIA is not set
+CONFIG_LEDS_TRIGGER_TIMER=y
-# CONFIG_VIDEO_SAA5246A is not set
+CONFIG_LEDS_TRIGGER_IDE_DISK=y
-# CONFIG_VIDEO_SAA5249 is not set
-# CONFIG_TUNER_3036 is not set
-# CONFIG_VIDEO_OVCAMCHIP is not set
 #
-# Radio Adapters
+# Multimedia devices
 #
-# CONFIG_RADIO_CADET is not set
+# CONFIG_VIDEO_DEV is not set
-# CONFIG_RADIO_RTRACK is not set
-# CONFIG_RADIO_RTRACK2 is not set
-# CONFIG_RADIO_AZTECH is not set
-# CONFIG_RADIO_GEMTEK is not set
-# CONFIG_RADIO_MAESTRO is not set
-# CONFIG_RADIO_SF16FMI is not set
-# CONFIG_RADIO_SF16FMR2 is not set
-# CONFIG_RADIO_TERRATEC is not set
-# CONFIG_RADIO_TRUST is not set
-# CONFIG_RADIO_TYPHOON is not set
-# CONFIG_RADIO_ZOLTRIX is not set
 #
 # Digital Video Broadcasting Devices
@@ -628,8 +703,8 @@ CONFIG_FB=y
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
-CONFIG_FB_SOFT_CURSOR=y
 # CONFIG_FB_MACMODES is not set
+# CONFIG_FB_FIRMWARE_EDID is not set
 CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_TILEBLITTING is not set
 CONFIG_FB_SA1100=y
@@ -643,14 +718,15 @@ CONFIG_FB_SA1100=y
 # CONFIG_MDA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
 CONFIG_FONTS=y
-CONFIG_FONT_8x8=y
+# CONFIG_FONT_8x8 is not set
 # CONFIG_FONT_8x16 is not set
 # CONFIG_FONT_6x11 is not set
 # CONFIG_FONT_7x14 is not set
 # CONFIG_FONT_PEARL_8x8 is not set
 # CONFIG_FONT_ACORN_8x8 is not set
-# CONFIG_FONT_MINI_4x6 is not set
+CONFIG_FONT_MINI_4x6=y
 # CONFIG_FONT_SUN8x16 is not set
 # CONFIG_FONT_SUN12x22 is not set
 # CONFIG_FONT_10x18 is not set
@@ -659,7 +735,11 @@ CONFIG_FONT_8x8=y
 # Logo configuration
 #
 # CONFIG_LOGO is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_DEVICE=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_DEVICE=y
 #
 # Sound
@@ -671,20 +751,17 @@ CONFIG_FONT_8x8=y
 #
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
-CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET is not set
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-# CONFIG_USB_GADGET_NET2280 is not set
-# CONFIG_USB_GADGET_PXA2XX is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_OMAP is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_GADGET_DUALSPEED is not set
 #
 # MMC/SD Card support
@@ -692,23 +769,24 @@ CONFIG_USB_GADGET=y
 # CONFIG_MMC is not set
 #
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+#
 # File systems
 #
-CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS is not set
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT2_FS_XIP is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
+# CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_ROMFS_FS=y
-CONFIG_INOTIFY=y
+# CONFIG_INOTIFY is not set
 # CONFIG_QUOTA is not set
 # CONFIG_DNOTIFY is not set
 # CONFIG_AUTOFS_FS is not set
@@ -725,7 +803,7 @@ CONFIG_INOTIFY=y
 # DOS/FAT/NT Filesystems
 #
 CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
+# CONFIG_MSDOS_FS is not set
 CONFIG_VFAT_FS=y
 CONFIG_FAT_DEFAULT_CODEPAGE=437
 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
@@ -739,7 +817,7 @@ CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
+# CONFIG_CONFIGFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -755,11 +833,12 @@ CONFIG_RAMFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
-CONFIG_CRAMFS=y
+# CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
@@ -789,7 +868,7 @@ CONFIG_MSDOS_PARTITION=y
 #
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_437=y
 # CONFIG_NLS_CODEPAGE_737 is not set
 # CONFIG_NLS_CODEPAGE_775 is not set
 # CONFIG_NLS_CODEPAGE_850 is not set
@@ -813,7 +892,7 @@ CONFIG_NLS_CODEPAGE_437=m
 # CONFIG_NLS_CODEPAGE_1250 is not set
 # CONFIG_NLS_CODEPAGE_1251 is not set
 # CONFIG_NLS_ASCII is not set
-CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_ISO8859_2 is not set
 # CONFIG_NLS_ISO8859_3 is not set
 # CONFIG_NLS_ISO8859_4 is not set
@@ -826,7 +905,7 @@ CONFIG_NLS_ISO8859_1=m
 # CONFIG_NLS_ISO8859_15 is not set
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
-CONFIG_NLS_UTF8=m
+# CONFIG_NLS_UTF8 is not set
 #
 # Profiling support
@@ -837,20 +916,23 @@ CONFIG_NLS_UTF8=m
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_DETECT_SOFTLOCKUP is not set
 # CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_PREEMPT=y
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_KOBJECT is not set
 # CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_USER is not set
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -874,7 +956,7 @@ CONFIG_DEBUG_ERRORS=y
 #
 # Library routines
 #
-# CONFIG_CRC_CCITT is not set
+CONFIG_CRC_CCITT=y
 # CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig
new file mode 100644
index 000000000000..51ded20e3f64
--- /dev/null
+++ b/arch/arm/configs/kafa_defconfig
@@ -0,0 +1,884 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17-rc3
+# Sun May  7 16:54:53 2006
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+#
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+CONFIG_ARCH_AT91RM9200=y
+#
+# AT91RM9200 Implementations
+#
+#
+# AT91RM9200 Board Type
+#
+# CONFIG_ARCH_AT91RM9200DK is not set
+# CONFIG_MACH_AT91RM9200EK is not set
+# CONFIG_MACH_CSB337 is not set
+# CONFIG_MACH_CSB637 is not set
+# CONFIG_MACH_CARMEVA is not set
+# CONFIG_MACH_KB9200 is not set
+# CONFIG_MACH_ATEB9200 is not set
+CONFIG_MACH_KAFA=y
+#
+# AT91 Feature Selections
+#
+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM920T=y
+CONFIG_CPU_32v4=y
+CONFIG_CPU_ABRT_EV4T=y
+CONFIG_CPU_CACHE_V4WT=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+#
+# Bus support
+#
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+#
+# Kernel Features
+#
+CONFIG_PREEMPT=y
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_LEDS=y
+# CONFIG_LEDS_TIMER is not set
+CONFIG_LEDS_CPU=y
+CONFIG_ALIGNMENT_TRAP=y
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20800000,10M root=/dev/ram0 rw"
+# CONFIG_XIP_KERNEL is not set
+#
+# Floating point emulation
+#
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_MISC=y
+# CONFIG_ARTHUR is not set
+#
+# Power management options
+#
+# CONFIG_PM is not set
+# CONFIG_APM is not set
+#
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETFILTER is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLOCK is not set
+CONFIG_MTD_BLOCK_RO=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_AT91_DATAFLASH=y
+# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+#
+# IEEE 1394 (FireWire) support
+#
+#
+# I2O device support
+#
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+#
+# PHY device support
+#
+CONFIG_PHYLIB=y
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+CONFIG_DAVICOM_PHY=y
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_ARM_AT91_ETHER=y
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+#
+# Ethernet (1000 Mbit)
+#
+#
+# Ethernet (10000 Mbit)
+#
+#
+# Token Ring devices
+#
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AT91=y
+CONFIG_SERIAL_AT91_CONSOLE=y
+# CONFIG_SERIAL_AT91_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=32
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT91_WATCHDOG=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+CONFIG_AT91_SPI=y
+CONFIG_AT91_SPIDEV=y
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_AT91=y
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_PCA_ISA is not set
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+#
+# Misc devices
+#
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+#
+# LED drivers
+#
+#
+# LED Triggers
+#
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_HCTOSYS is not set
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+CONFIG_RTC_DRV_AT91=y
+# CONFIG_RTC_DRV_TEST is not set
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=m
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_FS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+# CONFIG_DEBUG_USER is not set
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig
new file mode 100644
index 000000000000..fee4f566452e
--- /dev/null
+++ b/arch/arm/configs/kb9202_defconfig
@@ -0,0 +1,780 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.13-rc2
+# Sun Aug 14 19:26:59 2005
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+#
+# Code maturity level options
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_HOTPLUG=y
+# CONFIG_KOBJECT_UEVENT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+CONFIG_ARCH_AT91RM9200=y
+#
+# AT91RM9200 Implementations
+#
+# CONFIG_ARCH_AT91RM9200DK is not set
+# CONFIG_MACH_AT91RM9200EK is not set
+# CONFIG_MACH_CSB337 is not set
+# CONFIG_MACH_CSB637 is not set
+# CONFIG_MACH_CARMEVA is not set
+CONFIG_MACH_KB9200=y
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM920T=y
+CONFIG_CPU_32v4=y
+CONFIG_CPU_ABRT_EV4T=y
+CONFIG_CPU_CACHE_V4WT=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+#
+# Bus support
+#
+CONFIG_ISA_DMA_API=y
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+#
+# Kernel Features
+#
+# CONFIG_NO_IDLE_HZ is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x10000000
+CONFIG_ZBOOT_ROM_BSS=0x20040000
+CONFIG_ZBOOT_ROM=y
+CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram rw initrd=0x20210000,654933"
+#
+# Floating point emulation
+#
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_AOUT=y
+CONFIG_BINFMT_MISC=y
+# CONFIG_ARTHUR is not set
+#
+# Power management options
+#
+# CONFIG_PM is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+CONFIG_DEBUG_DRIVER=y
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CDROM_PKTCDVD is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+#
+# SCSI low-level drivers
+#
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_DEBUG is not set
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+#
+# IEEE 1394 (FireWire) support
+#
+#
+# I2O device support
+#
+#
+# Networking support
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_IP_TCPDIAG is not set
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_ARM_AT91_ETHER=y
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+#
+# Ethernet (1000 Mbit)
+#
+#
+# Ethernet (10000 Mbit)
+#
+#
+# Token Ring devices
+#
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AT91=y
+CONFIG_SERIAL_AT91_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_AT91_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+# CONFIG_AT91_SPI is not set
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+#
+# Misc devices
+#
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_BLUETOOTH_TTY is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DEBUG=y
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_ITMTOUCH is not set
+# CONFIG_USB_EGALAX is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MICROTEK is not set
+#
+# USB Multimedia devices
+#
+# CONFIG_USB_DABUSB is not set
+#
+# Video4Linux support is needed for USB Multimedia device support
+#
+#
+# USB Network Adapters
+#
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_MON is not set
+#
+# USB port drivers
+#
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+#
+# USB DSL modem support
+#
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_POSIX_ACL is not set
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+CONFIG_DEVPTS_FS_XATTR=y
+# CONFIG_DEVPTS_FS_SECURITY is not set
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+#
+# Miscellaneous filesystems
+#
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_FS is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_WAITQ is not set
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
diff --git a/arch/arm/configs/lpd7a400_defconfig b/arch/arm/configs/lpd7a400_defconfig
index 67eaa26c2647..bf9cf9c6d2df 100644
--- a/arch/arm/configs/lpd7a400_defconfig
+++ b/arch/arm/configs/lpd7a400_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-rc1-bk2
+# Linux kernel version: 2.6.12
-# Mon Mar 28 00:06:33 2005
+# Thu Nov  3 14:15:32 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -17,6 +17,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_CLEAN_COMPILE=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
 #
 # General setup
@@ -36,6 +37,8 @@ CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 # CONFIG_EPOLL is not set
@@ -71,6 +74,7 @@ CONFIG_BASE_SMALL=0
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7952X is not set
 CONFIG_ARCH_LH7A40X=y
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
@@ -84,6 +88,7 @@ CONFIG_ARCH_LH7A40X=y
 CONFIG_MACH_LPD7A400=y
 # CONFIG_MACH_LPD7A404 is not set
 CONFIG_ARCH_LH7A400=y
+CONFIG_LPD7A40X_CPLD_SSP=y
 # CONFIG_LH7A40X_CONTIGMEM is not set
 # CONFIG_LH7A40X_ONE_BANK_PER_NODE is not set
@@ -110,6 +115,8 @@ CONFIG_ARM_THUMB=y
 #
 # Bus support
 #
+CONFIG_ARM_AMBA=y
+CONFIG_ISA_DMA_API=y
 #
 # PCCARD (PCMCIA/CardBus) support
@@ -119,6 +126,7 @@ CONFIG_ARM_THUMB=y
 #
 # Kernel Features
 #
+# CONFIG_SMP is not set
 CONFIG_PREEMPT=y
 CONFIG_DISCONTIGMEM=y
 CONFIG_ALIGNMENT_TRAP=y
@@ -175,7 +183,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
 #
@@ -217,7 +225,10 @@ CONFIG_MTD_CFI_UTIL=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x00000000
+CONFIG_MTD_PHYSMAP_LEN=0x04000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=4
 # CONFIG_MTD_ARM_INTEGRATOR is not set
 # CONFIG_MTD_EDB7312 is not set
@@ -254,7 +265,6 @@ CONFIG_MTD_CFI_UTIL=y
 #
 # Block devices
 #
-# CONFIG_BLK_DEV_FD is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
@@ -288,13 +298,15 @@ CONFIG_BLK_DEV_IDEDISK=y
 # CONFIG_BLK_DEV_IDECD is not set
 # CONFIG_BLK_DEV_IDETAPE is not set
 # CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
 # CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_POLL=y
 #
 # IDE chipset support/bugfixes
 #
 CONFIG_IDE_GENERIC=y
-# CONFIG_IDE_ARM is not set
+CONFIG_IDE_ARM=y
 # CONFIG_BLK_DEV_IDEDMA is not set
 # CONFIG_IDEDMA_AUTO is not set
 # CONFIG_BLK_DEV_HD is not set
@@ -302,7 +314,37 @@ CONFIG_IDE_GENERIC=y
 #
 # SCSI device support
 #
-# CONFIG_SCSI is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+# CONFIG_BLK_DEV_SD is not set
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+#
+# SCSI low-level drivers
+#
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_DEBUG is not set
 #
 # Multi-device support (RAID and LVM)
@@ -331,7 +373,6 @@ CONFIG_NET=y
 #
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
 CONFIG_UNIX=y
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
@@ -438,13 +479,10 @@ CONFIG_INPUT=y
 #
 # Userland interfaces
 #
-CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
 # CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
+CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_EVBUG is not set
 #
@@ -453,7 +491,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+CONFIG_TOUCHSCREEN_ADS7843_LH7=y
+CONFIG_HAS_TOUCHSCREEN_ADS7843_LH7=y
 # CONFIG_INPUT_MISC is not set
 #
@@ -461,7 +505,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 #
 # CONFIG_SERIO is not set
 # CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
 #
 # Character devices
@@ -479,6 +522,8 @@ CONFIG_HW_CONSOLE=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_LH7A40X=y
@@ -510,7 +555,6 @@ CONFIG_RTC=y
 #
 # TPM devices
 #
-# CONFIG_TCG_TPM is not set
 #
 # I2C support
@@ -534,18 +578,73 @@ CONFIG_RTC=y
 #
 # Graphics support
 #
-# CONFIG_FB is not set
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+CONFIG_FB_ARMCLCD=y
+CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT=y
+# CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02 is not set
+# CONFIG_FB_ARMCLCD_SHARP_LQ64D343 is not set
+# CONFIG_FB_ARMCLCD_SHARP_LQ10D368 is not set
+# CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
 #
 # Console display driver support
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+#
+# Logo configuration
+#
+# CONFIG_LOGO is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 #
 # Sound
 #
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_RTCTIMER is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_AC97_CODEC=y
+#
+# ALSA ARM devices
+#
+CONFIG_SND_LH7A40X_AC97=y
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
 #
 # USB support
diff --git a/arch/arm/configs/lpd7a404_defconfig b/arch/arm/configs/lpd7a404_defconfig
index 208d591ebfce..3a57be32e849 100644
--- a/arch/arm/configs/lpd7a404_defconfig
+++ b/arch/arm/configs/lpd7a404_defconfig
@@ -1,52 +1,58 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-rc1-bk2
+# Linux kernel version: 2.6.16
-# Mon Mar 28 00:14:08 2005
+# Thu Mar 23 17:50:31 2006
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
-CONFIG_UID16=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_IOMAP=y
 #
 # Code maturity level options
 #
 CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
 #
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
 CONFIG_IKCONFIG=y
 # CONFIG_IKCONFIG_PROC is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 # CONFIG_EPOLL is not set
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SHMEM=y
 CONFIG_CC_ALIGN_FUNCTIONS=0
 CONFIG_CC_ALIGN_LABELS=0
 CONFIG_CC_ALIGN_LOOPS=0
 CONFIG_CC_ALIGN_JUMPS=0
+CONFIG_SLAB=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+CONFIG_OBSOLETE_INTERMODULE=y
 #
 # Loadable module support
@@ -54,6 +60,23 @@ CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 #
+# Block layer
+#
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
@@ -71,11 +94,15 @@ CONFIG_BASE_SMALL=0
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7952X is not set
 CONFIG_ARCH_LH7A40X=y
 # CONFIG_ARCH_OMAP is not set
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_AT91RM9200 is not set
 #
 # LH7A40X Implementations
@@ -110,6 +137,7 @@ CONFIG_ARM_THUMB=y
 #
 # Bus support
 #
+CONFIG_ARM_AMBA=y
 #
 # PCCARD (PCMCIA/CardBus) support
@@ -120,7 +148,18 @@ CONFIG_ARM_THUMB=y
 # Kernel Features
 #
 CONFIG_PREEMPT=y
+# CONFIG_NO_IDLE_HZ is not set
+# CONFIG_AEABI is not set
+CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_DISCONTIGMEM_MANUAL=y
+# CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_DISCONTIGMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_NEED_MULTIPLE_NODES=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_ALIGNMENT_TRAP=y
 #
@@ -154,6 +193,84 @@ CONFIG_BINFMT_ELF=y
 # Power management options
 #
 # CONFIG_PM is not set
+# CONFIG_APM is not set
+#
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 #
 # Device Drivers
@@ -168,6 +285,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_DEBUG_DRIVER is not set
 #
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
 # Memory Technology Devices (MTD)
 #
 CONFIG_MTD=y
@@ -175,7 +297,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
 #
@@ -186,6 +308,7 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
@@ -211,15 +334,18 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_XIP is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
 #
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x00000000
+CONFIG_MTD_PHYSMAP_LEN=0x04000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=4
 # CONFIG_MTD_ARM_INTEGRATOR is not set
-# CONFIG_MTD_EDB7312 is not set
+# CONFIG_MTD_PLATRAM is not set
 #
 # Self-contained MTD device drivers
@@ -243,6 +369,11 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -254,7 +385,6 @@ CONFIG_MTD_CFI_UTIL=y
 #
 # Block devices
 #
-# CONFIG_BLK_DEV_FD is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
@@ -262,16 +392,7 @@ CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_UB is not set
 # CONFIG_BLK_DEV_RAM is not set
 CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IOSCHED_CFQ=y
 # CONFIG_ATA_OVER_ETH is not set
 #
@@ -291,12 +412,13 @@ CONFIG_BLK_DEV_IDEDISK=y
 # CONFIG_BLK_DEV_IDEFLOPPY is not set
 # CONFIG_BLK_DEV_IDESCSI is not set
 # CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_POLL=y
 #
 # IDE chipset support/bugfixes
 #
 CONFIG_IDE_GENERIC=y
-# CONFIG_IDE_ARM is not set
+CONFIG_IDE_ARM=y
 # CONFIG_BLK_DEV_IDEDMA is not set
 # CONFIG_IDEDMA_AUTO is not set
 # CONFIG_BLK_DEV_HD is not set
@@ -304,6 +426,7 @@ CONFIG_IDE_GENERIC=y
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 # CONFIG_SCSI_PROC_FS is not set
@@ -315,6 +438,7 @@ CONFIG_SCSI=y
 # CONFIG_CHR_DEV_OSST is not set
 # CONFIG_BLK_DEV_SR is not set
 # CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
 #
 # Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -329,10 +453,12 @@ CONFIG_SCSI=y
 # CONFIG_SCSI_SPI_ATTRS is not set
 # CONFIG_SCSI_FC_ATTRS is not set
 # CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
 #
 # SCSI low-level drivers
 #
+# CONFIG_ISCSI_TCP is not set
 # CONFIG_SCSI_SATA is not set
 # CONFIG_SCSI_DEBUG is not set
@@ -344,6 +470,7 @@ CONFIG_SCSI=y
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 #
 # IEEE 1394 (FireWire) support
@@ -354,70 +481,8 @@ CONFIG_SCSI=y
 #
 #
-# Networking support
+# Network device support
 #
-CONFIG_NET=y
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
@@ -425,11 +490,17 @@ CONFIG_NETDEVICES=y
 # CONFIG_TUN is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
 #
 # Ethernet (1000 Mbit)
@@ -456,6 +527,8 @@ CONFIG_SMC91X=y
 # CONFIG_SLIP is not set
 # CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
 #
 # ISDN subsystem
@@ -470,10 +543,13 @@ CONFIG_INPUT=y
 #
 # Userland interfaces
 #
-# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
 # CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
+CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_EVBUG is not set
 #
@@ -482,7 +558,13 @@ CONFIG_INPUT=y
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+CONFIG_TOUCHSCREEN_ADC_LH7=y
+CONFIG_HAS_TOUCHSCREEN_ADC_LH7=y
 # CONFIG_INPUT_MISC is not set
 #
@@ -490,7 +572,6 @@ CONFIG_INPUT=y
 #
 # CONFIG_SERIO is not set
 # CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
 #
 # Character devices
@@ -508,6 +589,8 @@ CONFIG_HW_CONSOLE=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_SERIAL_LH7A40X=y
@@ -533,13 +616,13 @@ CONFIG_RTC=y
 #
 # Ftape, the floppy tape device driver
 #
-# CONFIG_DRM is not set
 # CONFIG_RAW_DRIVER is not set
 #
 # TPM devices
 #
 # CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
@@ -547,10 +630,33 @@ CONFIG_RTC=y
 # CONFIG_I2C is not set
 #
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+#
 # Misc devices
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -563,18 +669,83 @@ CONFIG_RTC=y
 #
 # Graphics support
 #
-# CONFIG_FB is not set
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+CONFIG_FB_ARMCLCD=y
+CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT=y
+# CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02 is not set
+# CONFIG_FB_ARMCLCD_SHARP_LQ64D343 is not set
+# CONFIG_FB_ARMCLCD_SHARP_LQ10D368 is not set
+# CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41 is not set
+# CONFIG_FB_ARMCLCD_AUO_A070VW01_WIDE is not set
+# CONFIG_FB_ARMCLCD_HITACHI is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
 #
 # Console display driver support
 #
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+#
+# Logo configuration
+#
+# CONFIG_LOGO is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 #
 # Sound
 #
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_RTCTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_AC97_BUS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+#
+# ALSA ARM devices
+#
+# CONFIG_SND_ARMAACI is not set
+CONFIG_SND_LH7A40X_AC97=y
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
 #
 # USB support
@@ -595,6 +766,7 @@ CONFIG_USB_DEVICEFS=y
 #
 # USB Host Controller Drivers
 #
+# CONFIG_USB_ISP116X_HCD is not set
 CONFIG_USB_OHCI_HCD=y
 # CONFIG_USB_OHCI_BIG_ENDIAN is not set
 CONFIG_USB_OHCI_LITTLE_ENDIAN=y
@@ -603,16 +775,19 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 #
 # USB Device Class drivers
 #
-# CONFIG_USB_BLUETOOTH_TTY is not set
+# CONFIG_OBSOLETE_OSS_USB_DRIVER is not set
 # CONFIG_USB_ACM is not set
 # CONFIG_USB_PRINTER is not set
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
+# may also be needed; see USB_STORAGE Help for more information
 #
 CONFIG_USB_STORAGE=y
 CONFIG_USB_STORAGE_DEBUG=y
-# CONFIG_USB_STORAGE_RW_DETECT is not set
 CONFIG_USB_STORAGE_DATAFAB=y
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
@@ -621,22 +796,32 @@ CONFIG_USB_STORAGE_DATAFAB=y
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
 # CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_LIBUSUAL is not set
 #
 # USB Input Devices
 #
 CONFIG_USB_HID=y
 CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
 # CONFIG_HID_FF is not set
 # CONFIG_USB_HIDDEV is not set
 # CONFIG_USB_AIPTEK is not set
 # CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
 # CONFIG_USB_KBTAB is not set
 # CONFIG_USB_POWERMATE is not set
 # CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_ITMTOUCH is not set
 # CONFIG_USB_EGALAX is not set
+# CONFIG_USB_YEALINK is not set
 # CONFIG_USB_XPAD is not set
 # CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
 #
 # USB Imaging devices
@@ -686,16 +871,33 @@ CONFIG_USB_MON=y
 # CONFIG_USB_PHIDGETKIT is not set
 # CONFIG_USB_PHIDGETSERVO is not set
 # CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_LD is not set
 # CONFIG_USB_TEST is not set
 #
-# USB ATM/DSL drivers
+# USB DSL modem support
 #
 #
 # USB Gadget Support
 #
-# CONFIG_USB_GADGET is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+CONFIG_USB_GADGET_LH7=y
+CONFIG_USB_LH7=y
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_ZERO=y
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
 #
 # MMC/SD Card support
@@ -707,6 +909,7 @@ CONFIG_USB_MON=y
 #
 CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
@@ -716,17 +919,17 @@ CONFIG_JBD=y
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
 # CONFIG_QUOTA is not set
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -749,12 +952,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
 CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
+# CONFIG_CONFIGFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -769,8 +971,8 @@ CONFIG_RAMFS=y
 # CONFIG_JFFS_FS is not set
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
+CONFIG_JFFS2_FS_WRITEBUFFER=y
-# CONFIG_JFFS2_FS_NOR_ECC is not set
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
@@ -787,12 +989,14 @@ CONFIG_CRAMFS=y
 #
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
 # CONFIG_NFS_DIRECTIO is not set
 # CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -801,6 +1005,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -820,6 +1025,7 @@ CONFIG_MSDOS_PARTITION=y
 # CONFIG_SGI_PARTITION is not set
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
 #
@@ -875,19 +1081,24 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
-CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_MUTEXES=y
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -912,6 +1123,7 @@ CONFIG_DEBUG_ERRORS=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig
new file mode 100644
index 000000000000..61115a773382
--- /dev/null
+++ b/arch/arm/configs/netx_defconfig
@@ -0,0 +1,926 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17-rc6
+# Tue Jun  6 15:26:53 2006
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_EMBEDDED is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+CONFIG_OBSOLETE_INTERMODULE=y
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+#
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_AT91RM9200 is not set
+CONFIG_ARCH_NETX=y
+#
+# NetX Implementations
+#
+CONFIG_MACH_NXDKN=y
+CONFIG_MACH_NXDB500=y
+CONFIG_MACH_NXEB500HMI=y
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+CONFIG_ARM_VIC=y
+#
+# Bus support
+#
+CONFIG_ARM_AMBA=y
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+#
+# Kernel Features
+#
+CONFIG_PREEMPT=y
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_ALIGNMENT_TRAP=y
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttySMX0,115200"
+# CONFIG_XIP_KERNEL is not set
+#
+# Floating point emulation
+#
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+#
+# Power management options
+#
+# CONFIG_PM is not set
+# CONFIG_APM is not set
+#
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+CONFIG_NET_IPGRE=m
+# CONFIG_NET_IPGRE_BROADCAST is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+# CONFIG_IPV6_TUNNEL is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+# CONFIG_IP_NF_CT_ACCT is not set
+# CONFIG_IP_NF_CONNTRACK_MARK is not set
+# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
+# CONFIG_IP_NF_CT_PROTO_SCTP is not set
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+# CONFIG_IP_NF_NETBIOS_NS is not set
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+# CONFIG_IP_NF_PPTP is not set
+# CONFIG_IP_NF_H323 is not set
+CONFIG_IP_NF_QUEUE=m
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP6_NF_QUEUE is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+CONFIG_MTD_PLATRAM=y
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+#
+# IEEE 1394 (FireWire) support
+#
+#
+# I2O device support
+#
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_SMC91X is not set
+CONFIG_NET_NETX=y
+# CONFIG_DM9000 is not set
+#
+# Ethernet (1000 Mbit)
+#
+#
+# Ethernet (10000 Mbit)
+#
+#
+# Token Ring devices
+#
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_AMBAKMI is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_NETX=y
+CONFIG_SERIAL_NETX_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_NVRAM=m
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+#
+# Misc devices
+#
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+#
+# LED drivers
+#
+#
+# LED Triggers
+#
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+#
+# Graphics support
+#
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_MACMODES is not set
+CONFIG_FB_FIRMWARE_EDID=y
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+CONFIG_FB_ARMCLCD=y
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=m
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=m
+CONFIG_RTC_INTF_PROC=m
+CONFIG_RTC_INTF_DEV=m
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_M48T86 is not set
+CONFIG_RTC_DRV_NETX=m
+# CONFIG_RTC_DRV_TEST is not set
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_NFS_DIRECTIO=y
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_WAITQ is not set
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_LL is not set
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_TEST is not set
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/arm/configs/pnx4008_defconfig b/arch/arm/configs/pnx4008_defconfig
new file mode 100644
index 000000000000..8a078d479d57
--- /dev/null
+++ b/arch/arm/configs/pnx4008_defconfig
@@ -0,0 +1,2072 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17-rc1
+# Thu Apr  6 17:05:58 2006
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+CONFIG_SYSCTL=y
+CONFIG_AUDIT=y
+# CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+CONFIG_OBSOLETE_INTERMODULE=m
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_KMOD=y
+#
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
+# System Type
+#
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_AT91RM9200 is not set
+CONFIG_ARCH_PNX4008=y
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+#
+# Bus support
+#
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+CONFIG_PCCARD=m
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+#
+# PC-card bridges
+#
+#
+# Kernel Features
+#
+CONFIG_PREEMPT=y
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+CONFIG_ALIGNMENT_TRAP=y
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200"
+# CONFIG_XIP_KERNEL is not set
+#
+# Floating point emulation
+#
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_MISC=m
+# CONFIG_ARTHUR is not set
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_PM_LEGACY=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_APM=m
+#
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=m
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=m
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+CONFIG_NET_KEY=m
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_FWMARK=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+CONFIG_IP_ROUTE_VERBOSE=y
+# CONFIG_IP_PNP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+#
+# IP: Virtual Server Configuration
+#
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_FTP=m
+CONFIG_IPV6=m
+CONFIG_IPV6_PRIVACY=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_IPV6_TUNNEL=m
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_CT_ACCT=y
+CONFIG_IP_NF_CONNTRACK_MARK=y
+# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
+CONFIG_IP_NF_CT_PROTO_SCTP=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+# CONFIG_IP_NF_NETBIOS_NS is not set
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+# CONFIG_IP_NF_PPTP is not set
+# CONFIG_IP_NF_H323 is not set
+CONFIG_IP_NF_QUEUE=m
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_IP6_NF_QUEUE=m
+#
+# DECnet: Netfilter Configuration
+#
+CONFIG_DECNET_NF_GRABULATOR=m
+#
+# Bridge: Netfilter Configuration
+#
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+# CONFIG_BRIDGE_EBT_ULOG is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+CONFIG_ATM=y
+CONFIG_ATM_CLIP=y
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+CONFIG_DECNET=m
+# CONFIG_DECNET_ROUTER is not set
+CONFIG_LLC=m
+CONFIG_LLC2=m
+CONFIG_IPX=m
+# CONFIG_IPX_INTERN is not set
+CONFIG_ATALK=m
+CONFIG_DEV_APPLETALK=y
+CONFIG_IPDDP=m
+CONFIG_IPDDP_ENCAP=y
+CONFIG_IPDDP_DECAP=y
+CONFIG_X25=m
+CONFIG_LAPB=m
+# CONFIG_NET_DIVERT is not set
+CONFIG_ECONET=m
+CONFIG_ECONET_AUNUDP=y
+CONFIG_ECONET_NATIVE=y
+CONFIG_WAN_ROUTER=m
+#
+# QoS and/or fair queueing
+#
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CLK_JIFFIES=y
+# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
+# CONFIG_NET_SCH_CLK_CPU is not set
+#
+# Queueing/Scheduling
+#
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_INGRESS=m
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+# CONFIG_NET_CLS_BASIC is not set
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_CLS_U32_MARK is not set
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_CLS_POLICE=y
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_ESTIMATOR=y
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+CONFIG_HAMRADIO=y
+#
+# Packet Radio protocols
+#
+CONFIG_AX25=m
+# CONFIG_AX25_DAMA_SLAVE is not set
+CONFIG_NETROM=m
+CONFIG_ROSE=m
+#
+# AX.25 network device drivers
+#
+CONFIG_MKISS=m
+CONFIG_6PACK=m
+CONFIG_BPQETHER=m
+CONFIG_BAYCOM_SER_FDX=m
+CONFIG_BAYCOM_SER_HDX=m
+CONFIG_BAYCOM_PAR=m
+CONFIG_BAYCOM_EPP=m
+CONFIG_YAM=m
+CONFIG_IRDA=m
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=m
+CONFIG_IRNET=m
+CONFIG_IRCOMM=m
+# CONFIG_IRDA_ULTRA is not set
+#
+# IrDA options
+#
+CONFIG_IRDA_CACHE_LAST_LSAP=y
+CONFIG_IRDA_FAST_RR=y
+CONFIG_IRDA_DEBUG=y
+#
+# Infrared-port device drivers
+#
+#
+# SIR device drivers
+#
+CONFIG_IRTTY_SIR=m
+#
+# Dongle support
+#
+CONFIG_DONGLE=y
+CONFIG_ESI_DONGLE=m
+CONFIG_ACTISYS_DONGLE=m
+CONFIG_TEKRAM_DONGLE=m
+# CONFIG_TOIM3232_DONGLE is not set
+CONFIG_LITELINK_DONGLE=m
+CONFIG_MA600_DONGLE=m
+CONFIG_GIRBIL_DONGLE=m
+CONFIG_MCP2120_DONGLE=m
+CONFIG_OLD_BELKIN_DONGLE=m
+CONFIG_ACT200L_DONGLE=m
+#
+# Old SIR device drivers
+#
+CONFIG_IRPORT_SIR=m
+#
+# Old Serial dongle support
+#
+# CONFIG_DONGLE_OLD is not set
+#
+# FIR device drivers
+#
+CONFIG_USB_IRDA=m
+CONFIG_SIGMATEL_FIR=m
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_CMTP=m
+CONFIG_BT_HIDP=m
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUSB=m
+CONFIG_BT_HCIUSB_SCO=y
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIBCM203X=m
+# CONFIG_BT_HCIBPA10X is not set
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIDTL1=m
+CONFIG_BT_HCIBT3C=m
+CONFIG_BT_HCIBLUECARD=m
+CONFIG_BT_HCIBTUART=m
+CONFIG_BT_HCIVHCI=m
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+# CONFIG_IEEE80211_CRYPT_WEP is not set
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_IEEE80211_SOFTMAC is not set
+CONFIG_WIRELESS_EXT=y
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+# CONFIG_DEBUG_DRIVER is not set
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=m
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_BLOCK_RO=m
+CONFIG_FTL=m
+CONFIG_NFTL=m
+CONFIG_NFTL_RW=y
+CONFIG_INFTL=m
+# CONFIG_RFD_FTL is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=m
+CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_GEN_PROBE=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_CFI_UTIL=m
+CONFIG_MTD_RAM=m
+CONFIG_MTD_ROM=m
+CONFIG_MTD_ABSENT=m
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x4000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_PLATRAM is not set
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
+CONFIG_MTD_MTDRAM=m
+CONFIG_MTDRAM_TOTAL_SIZE=4096
+CONFIG_MTDRAM_ERASE_SIZE=128
+CONFIG_MTD_BLKMTD=m
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+CONFIG_MTD_DOC2000=m
+CONFIG_MTD_DOC2001=m
+CONFIG_MTD_DOC2001PLUS=m
+CONFIG_MTD_DOCPROBE=m
+CONFIG_MTD_DOCECC=m
+# CONFIG_MTD_DOCPROBE_ADVANCED is not set
+CONFIG_MTD_DOCPROBE_ADDRESS=0
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_IDS=m
+CONFIG_MTD_NAND_DISKONCHIP=m
+# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set
+CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0
+# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+CONFIG_PARPORT_PC=m
+CONFIG_PARPORT_PC_FIFO=y
+# CONFIG_PARPORT_PC_SUPERIO is not set
+CONFIG_PARPORT_PC_PCMCIA=m
+CONFIG_PARPORT_NOT_PC=y
+# CONFIG_PARPORT_ARC is not set
+# CONFIG_PARPORT_GSC is not set
+CONFIG_PARPORT_1284=y
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+CONFIG_PARIDE=m
+CONFIG_PARIDE_PARPORT=m
+#
+# Parallel IDE high-level drivers
+#
+CONFIG_PARIDE_PD=m
+CONFIG_PARIDE_PCD=m
+CONFIG_PARIDE_PF=m
+CONFIG_PARIDE_PT=m
+CONFIG_PARIDE_PG=m
+#
+# Parallel IDE protocol modules
+#
+CONFIG_PARIDE_ATEN=m
+CONFIG_PARIDE_BPCK=m
+CONFIG_PARIDE_BPCK6=m
+CONFIG_PARIDE_COMM=m
+CONFIG_PARIDE_DSTR=m
+CONFIG_PARIDE_FIT2=m
+CONFIG_PARIDE_FIT3=m
+CONFIG_PARIDE_EPAT=m
+# CONFIG_PARIDE_EPATC8 is not set
+CONFIG_PARIDE_EPIA=m
+CONFIG_PARIDE_FRIQ=m
+CONFIG_PARIDE_FRPW=m
+CONFIG_PARIDE_KBIC=m
+CONFIG_PARIDE_KTTI=m
+CONFIG_PARIDE_ON20=m
+CONFIG_PARIDE_ON26=m
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+# CONFIG_ATA_OVER_ETH is not set
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=m
+CONFIG_BLK_DEV_IDE=m
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=m
+# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_BLK_DEV_IDECS=m
+CONFIG_BLK_DEV_IDECD=m
+CONFIG_BLK_DEV_IDETAPE=m
+CONFIG_BLK_DEV_IDEFLOPPY=m
+CONFIG_BLK_DEV_IDESCSI=m
+# CONFIG_IDE_TASK_IOCTL is not set
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=m
+# CONFIG_IDE_ARM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_PROC_FS=y
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+CONFIG_CHR_DEV_ST=m
+CONFIG_CHR_DEV_OSST=m
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+CONFIG_CHR_DEV_SCH=m
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+#
+# SCSI Transport Attributes
+#
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=m
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+CONFIG_SCSI_SATA=m
+CONFIG_SCSI_PPA=m
+CONFIG_SCSI_IMM=m
+# CONFIG_SCSI_IZIP_EPP16 is not set
+# CONFIG_SCSI_IZIP_SLOW_CTR is not set
+CONFIG_SCSI_DEBUG=m
+#
+# PCMCIA SCSI adapter support
+#
+CONFIG_PCMCIA_AHA152X=m
+CONFIG_PCMCIA_FDOMAIN=m
+CONFIG_PCMCIA_NINJA_SCSI=m
+CONFIG_PCMCIA_QLOGIC=m
+CONFIG_PCMCIA_SYM53C500=m
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=m
+CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID5=m
+# CONFIG_MD_RAID5_RESHAPE is not set
+CONFIG_MD_RAID6=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
+CONFIG_BLK_DEV_DM=m
+CONFIG_DM_CRYPT=m
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
+# CONFIG_DM_MULTIPATH is not set
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+#
+# IEEE 1394 (FireWire) support
+#
+#
+# I2O device support
+#
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+CONFIG_EQUALIZER=m
+CONFIG_TUN=m
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+CONFIG_NET_POCKET=y
+CONFIG_DE600=m
+CONFIG_DE620=m
+#
+# Ethernet (1000 Mbit)
+#
+#
+# Ethernet (10000 Mbit)
+#
+#
+# Token Ring devices
+#
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+# CONFIG_NET_WIRELESS_RTNETLINK is not set
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+CONFIG_STRIP=m
+CONFIG_PCMCIA_WAVELAN=m
+CONFIG_PCMCIA_NETWAVE=m
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+CONFIG_PCMCIA_RAYCS=m
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+CONFIG_HERMES=m
+CONFIG_ATMEL=m
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+CONFIG_PCMCIA_HERMES=m
+# CONFIG_PCMCIA_SPECTRUM is not set
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_ATMEL=m
+CONFIG_PCMCIA_WL3501=m
+# CONFIG_HOSTAP is not set
+CONFIG_NET_WIRELESS=y
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+#
+# Wan interfaces
+#
+CONFIG_WAN=y
+CONFIG_SYNCLINK_SYNCPPP=m
+CONFIG_HDLC=m
+CONFIG_HDLC_RAW=y
+CONFIG_HDLC_RAW_ETH=y
+CONFIG_HDLC_CISCO=y
+CONFIG_HDLC_FR=y
+CONFIG_HDLC_PPP=y
+CONFIG_HDLC_X25=y
+CONFIG_DLCI=m
+CONFIG_DLCI_COUNT=24
+CONFIG_DLCI_MAX=8
+CONFIG_WAN_ROUTER_DRIVERS=y
+CONFIG_LAPBETHER=m
+CONFIG_X25_ASY=m
+#
+# ATM drivers
+#
+# CONFIG_ATM_DUMMY is not set
+CONFIG_ATM_TCP=m
+CONFIG_PLIP=m
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+CONFIG_PPPOATM=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_SHAPER=m
+CONFIG_NETCONSOLE=m
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_RX is not set
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NET_POLL_CONTROLLER=y
+#
+# ISDN subsystem
+#
+CONFIG_ISDN=m
+#
+# Old ISDN4Linux
+#
+CONFIG_ISDN_I4L=m
+CONFIG_ISDN_PPP=y
+CONFIG_ISDN_PPP_VJ=y
+CONFIG_ISDN_MPP=y
+CONFIG_IPPP_FILTER=y
+CONFIG_ISDN_PPP_BSDCOMP=m
+CONFIG_ISDN_AUDIO=y
+CONFIG_ISDN_TTY_FAX=y
+CONFIG_ISDN_X25=y
+#
+# ISDN feature submodules
+#
+CONFIG_ISDN_DRV_LOOP=m
+CONFIG_ISDN_DIVERSION=m
+#
+# ISDN4Linux hardware drivers
+#
+#
+# Passive cards
+#
+CONFIG_ISDN_DRV_HISAX=m
+#
+# D-channel protocol features
+#
+CONFIG_HISAX_EURO=y
+CONFIG_DE_AOC=y
+# CONFIG_HISAX_NO_SENDCOMPLETE is not set
+# CONFIG_HISAX_NO_LLC is not set
+# CONFIG_HISAX_NO_KEYPAD is not set
+CONFIG_HISAX_1TR6=y
+CONFIG_HISAX_NI1=y
+CONFIG_HISAX_MAX_CARDS=8
+#
+# HiSax supported cards
+#
+CONFIG_HISAX_16_3=y
+CONFIG_HISAX_S0BOX=y
+CONFIG_HISAX_FRITZPCI=y
+CONFIG_HISAX_AVM_A1_PCMCIA=y
+CONFIG_HISAX_ELSA=y
+CONFIG_HISAX_DIEHLDIVA=y
+CONFIG_HISAX_SEDLBAUER=y
+CONFIG_HISAX_NICCY=y
+CONFIG_HISAX_GAZEL=y
+CONFIG_HISAX_HFC_SX=y
+# CONFIG_HISAX_DEBUG is not set
+#
+# HiSax PCMCIA card service modules
+#
+CONFIG_HISAX_SEDLBAUER_CS=m
+CONFIG_HISAX_ELSA_CS=m
+CONFIG_HISAX_AVM_A1_CS=m
+CONFIG_HISAX_TELES_CS=m
+#
+# HiSax sub driver modules
+#
+CONFIG_HISAX_ST5481=m
+CONFIG_HISAX_HFCUSB=m
+# CONFIG_HISAX_HFC4S8S is not set
+CONFIG_HISAX_HDLC=y
+#
+# Active cards
+#
+#
+# Siemens Gigaset
+#
+# CONFIG_ISDN_DRV_GIGASET is not set
+#
+# CAPI subsystem
+#
+CONFIG_ISDN_CAPI=m
+CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
+CONFIG_ISDN_CAPI_MIDDLEWARE=y
+CONFIG_ISDN_CAPI_CAPI20=m
+CONFIG_ISDN_CAPI_CAPIFS_BOOL=y
+CONFIG_ISDN_CAPI_CAPIFS=m
+CONFIG_ISDN_CAPI_CAPIDRV=m
+#
+# CAPI hardware drivers
+#
+#
+# Active AVM cards
+#
+CONFIG_CAPI_AVM=y
+CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m
+CONFIG_ISDN_DRV_AVMB1_AVM_CS=m
+#
+# Active Eicon DIVA Server cards
+#
+CONFIG_CAPI_EICON=y
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+CONFIG_INPUT_JOYDEV=m
+CONFIG_INPUT_TSDEV=m
+CONFIG_INPUT_TSDEV_SCREEN_X=240
+CONFIG_INPUT_TSDEV_SCREEN_Y=320
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVBUG=m
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+CONFIG_KEYBOARD_SUNKBD=m
+CONFIG_KEYBOARD_LKKBD=m
+CONFIG_KEYBOARD_XTKBD=m
+CONFIG_KEYBOARD_NEWTON=m
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_SERIAL=m
+CONFIG_MOUSE_VSXXXAA=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_JOYSTICK_ANALOG=m
+CONFIG_JOYSTICK_A3D=m
+CONFIG_JOYSTICK_ADI=m
+CONFIG_JOYSTICK_COBRA=m
+CONFIG_JOYSTICK_GF2K=m
+CONFIG_JOYSTICK_GRIP=m
+CONFIG_JOYSTICK_GRIP_MP=m
+CONFIG_JOYSTICK_GUILLEMOT=m
+CONFIG_JOYSTICK_INTERACT=m
+CONFIG_JOYSTICK_SIDEWINDER=m
+CONFIG_JOYSTICK_TMDC=m
+CONFIG_JOYSTICK_IFORCE=m
+CONFIG_JOYSTICK_IFORCE_USB=y
+CONFIG_JOYSTICK_IFORCE_232=y
+CONFIG_JOYSTICK_WARRIOR=m
+CONFIG_JOYSTICK_MAGELLAN=m
+CONFIG_JOYSTICK_SPACEORB=m
+CONFIG_JOYSTICK_SPACEBALL=m
+CONFIG_JOYSTICK_STINGER=m
+# CONFIG_JOYSTICK_TWIDJOY is not set
+CONFIG_JOYSTICK_DB9=m
+CONFIG_JOYSTICK_GAMECON=m
+CONFIG_JOYSTICK_TURBOGRAFX=m
+CONFIG_JOYSTICK_JOYDUMP=m
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_GUNZE=m
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=m
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=m
+CONFIG_SERIO_PARKBD=m
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=m
+CONFIG_GAMEPORT=m
+CONFIG_GAMEPORT_NS558=m
+CONFIG_GAMEPORT_L4=m
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_SERIAL_NONSTANDARD=y
+CONFIG_COMPUTONE=m
+CONFIG_ROCKETPORT=m
+CONFIG_CYCLADES=m
+# CONFIG_CYZ_INTR is not set
+CONFIG_DIGIEPCA=m
+CONFIG_MOXA_INTELLIO=m
+CONFIG_MOXA_SMARTIO=m
+# CONFIG_ISI is not set
+CONFIG_SYNCLINKMP=m
+CONFIG_N_HDLC=m
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+CONFIG_SX=m
+CONFIG_RIO=m
+CONFIG_RIO_OLDPCI=y
+CONFIG_STALDRV=y
+CONFIG_STALLION=m
+CONFIG_ISTALLION=m
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_CS=m
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+CONFIG_SERIAL_8250_RSA=y
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_PRINTER=m
+# CONFIG_LP_CONSOLE is not set
+CONFIG_PPDEV=m
+CONFIG_TIPAR=m
+#
+# IPMI
+#
+CONFIG_IPMI_HANDLER=m
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_DEVICE_INTERFACE=m
+CONFIG_IPMI_SI=m
+CONFIG_IPMI_WATCHDOG=m
+CONFIG_IPMI_POWEROFF=m
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+#
+# Watchdog Device Drivers
+#
+CONFIG_SOFT_WATCHDOG=m
+#
+# USB-based Watchdog Cards
+#
+CONFIG_USBPCWATCHDOG=m
+CONFIG_NVRAM=m
+CONFIG_DTLK=m
+CONFIG_R3964=m
+#
+# Ftape, the floppy tape device driver
+#
+#
+# PCMCIA character devices
+#
+CONFIG_SYNCLINK_CS=m
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+CONFIG_RAW_DRIVER=m
+CONFIG_MAX_RAW_DEVS=256
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+#
+# I2C support
+#
+CONFIG_I2C=m
+CONFIG_I2C_CHARDEV=m
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ALGOPCA=m
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_ISA=m
+CONFIG_I2C_PARPORT=m
+CONFIG_I2C_PARPORT_LIGHT=m
+CONFIG_I2C_STUB=m
+CONFIG_I2C_PCA_ISA=m
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+CONFIG_SENSORS_EEPROM=m
+CONFIG_SENSORS_PCF8574=m
+# CONFIG_SENSORS_PCA9539 is not set
+CONFIG_SENSORS_PCF8591=m
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+CONFIG_W1=m
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_DS9490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2433 is not set
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+CONFIG_HWMON_VID=m
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1026=m
+CONFIG_SENSORS_ADM1031=m
+# CONFIG_SENSORS_ADM9240 is not set
+CONFIG_SENSORS_ASB100=m
+# CONFIG_SENSORS_ATXP1 is not set
+CONFIG_SENSORS_DS1621=m
+# CONFIG_SENSORS_F71805F is not set
+CONFIG_SENSORS_FSCHER=m
+# CONFIG_SENSORS_FSCPOS is not set
+CONFIG_SENSORS_GL518SM=m
+# CONFIG_SENSORS_GL520SM is not set
+CONFIG_SENSORS_IT87=m
+CONFIG_SENSORS_LM63=m
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM90=m
+# CONFIG_SENSORS_LM92 is not set
+CONFIG_SENSORS_MAX1619=m
+CONFIG_SENSORS_PC87360=m
+CONFIG_SENSORS_SMSC47M1=m
+# CONFIG_SENSORS_SMSC47B397 is not set
+CONFIG_SENSORS_W83781D=m
+# CONFIG_SENSORS_W83792D is not set
+CONFIG_SENSORS_W83L785TS=m
+CONFIG_SENSORS_W83627HF=m
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Misc devices
+#
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+#
+# Digital Video Broadcasting Devices
+#
+CONFIG_DVB=y
+CONFIG_DVB_CORE=m
+#
+# Supported USB Adapters
+#
+# CONFIG_DVB_USB is not set
+CONFIG_DVB_TTUSB_BUDGET=m
+CONFIG_DVB_TTUSB_DEC=m
+CONFIG_DVB_CINERGYT2=m
+CONFIG_DVB_CINERGYT2_TUNING=y
+CONFIG_DVB_CINERGYT2_STREAM_URB_COUNT=32
+CONFIG_DVB_CINERGYT2_STREAM_BUF_SIZE=512
+CONFIG_DVB_CINERGYT2_QUERY_INTERVAL=250
+CONFIG_DVB_CINERGYT2_ENABLE_RC_INPUT_DEVICE=y
+CONFIG_DVB_CINERGYT2_RC_QUERY_INTERVAL=100
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+# CONFIG_DVB_B2C2_FLEXCOP is not set
+#
+# Supported DVB Frontends
+#
+#
+# Customise DVB Frontends
+#
+#
+# DVB-S (satellite) frontends
+#
+CONFIG_DVB_STV0299=m
+CONFIG_DVB_CX24110=m
+# CONFIG_DVB_CX24123 is not set
+CONFIG_DVB_TDA8083=m
+CONFIG_DVB_MT312=m
+CONFIG_DVB_VES1X93=m
+# CONFIG_DVB_S5H1420 is not set
+#
+# DVB-T (terrestrial) frontends
+#
+CONFIG_DVB_SP8870=m
+CONFIG_DVB_SP887X=m
+CONFIG_DVB_CX22700=m
+CONFIG_DVB_CX22702=m
+CONFIG_DVB_L64781=m
+CONFIG_DVB_TDA1004X=m
+CONFIG_DVB_NXT6000=m
+CONFIG_DVB_MT352=m
+# CONFIG_DVB_ZL10353 is not set
+CONFIG_DVB_DIB3000MB=m
+CONFIG_DVB_DIB3000MC=m
+#
+# DVB-C (cable) frontends
+#
+CONFIG_DVB_VES1820=m
+CONFIG_DVB_TDA10021=m
+CONFIG_DVB_STV0297=m
+#
+# ATSC (North American/Korean Terresterial DTV) frontends
+#
+# CONFIG_DVB_NXT200X is not set
+# CONFIG_DVB_OR51211 is not set
+# CONFIG_DVB_OR51132 is not set
+# CONFIG_DVB_BCM3510 is not set
+# CONFIG_DVB_LGDT330X is not set
+# CONFIG_USB_DABUSB is not set
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+#
+# Sound
+#
+CONFIG_SOUND=m
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_SEQUENCER=m
+CONFIG_SND_SEQ_DUMMY=m
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+#
+# Generic devices
+#
+CONFIG_SND_MPU401_UART=m
+CONFIG_SND_DUMMY=m
+CONFIG_SND_VIRMIDI=m
+CONFIG_SND_MTPAV=m
+CONFIG_SND_SERIAL_U16550=m
+CONFIG_SND_MPU401=m
+#
+# ALSA ARM devices
+#
+#
+# USB devices
+#
+CONFIG_SND_USB_AUDIO=m
+#
+# PCMCIA devices
+#
+#
+# Open Sound System
+#
+CONFIG_SOUND_PRIME=m
+# CONFIG_OBSOLETE_OSS_DRIVER is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+CONFIG_SOUND_TVMIXER=m
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_BANDWIDTH=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_SL811_HCD=m
+# CONFIG_USB_SL811_CS is not set
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_DPCM=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_LIBUSUAL is not set
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+CONFIG_USB_HIDDEV=y
+#
+# USB HID Boot Protocol drivers
+#
+CONFIG_USB_KBD=m
+CONFIG_USB_MOUSE=m
+CONFIG_USB_AIPTEK=m
+CONFIG_USB_WACOM=m
+# CONFIG_USB_ACECAD is not set
+CONFIG_USB_KBTAB=m
+CONFIG_USB_POWERMATE=m
+CONFIG_USB_MTOUCH=m
+# CONFIG_USB_ITMTOUCH is not set
+CONFIG_USB_EGALAX=m
+# CONFIG_USB_YEALINK is not set
+CONFIG_USB_XPAD=m
+CONFIG_USB_ATI_REMOTE=m
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+#
+# USB Imaging devices
+#
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+#
+# USB Network Adapters
+#
+CONFIG_USB_CATC=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+# CONFIG_USB_NET_GL620A is not set
+CONFIG_USB_NET_NET1080=m
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+CONFIG_USB_NET_ZAURUS=m
+# CONFIG_USB_ZD1201 is not set
+CONFIG_USB_MON=y
+#
+# USB port drivers
+#
+CONFIG_USB_USS720=m
+#
+# USB Serial Converter support
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRPRIME is not set
+# CONFIG_USB_SERIAL_ANYDATA is not set
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+# CONFIG_USB_SERIAL_CP2101 is not set
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+# CONFIG_USB_SERIAL_GARMIN is not set
+CONFIG_USB_SERIAL_IPW=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=m
+# CONFIG_USB_SERIAL_HP4X is not set
+CONFIG_USB_SERIAL_SAFE=m
+# CONFIG_USB_SERIAL_SAFE_PADDED is not set
+# CONFIG_USB_SERIAL_TI is not set
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OMNINET=m
+CONFIG_USB_EZUSB=y
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+CONFIG_USB_AUERSWALD=m
+CONFIG_USB_RIO500=m
+CONFIG_USB_LEGOTOWER=m
+CONFIG_USB_LCD=m
+CONFIG_USB_LED=m
+CONFIG_USB_CYTHERM=m
+CONFIG_USB_PHIDGETKIT=m
+CONFIG_USB_PHIDGETSERVO=m
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_LD is not set
+CONFIG_USB_TEST=m
+#
+# USB DSL modem support
+#
+CONFIG_USB_ATM=m
+CONFIG_USB_SPEEDTOUCH=m
+# CONFIG_USB_CXACRU is not set
+# CONFIG_USB_UEAGLEATM is not set
+# CONFIG_USB_XUSBATM is not set
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_AT91 is not set
+CONFIG_USB_GADGET_DUMMY_HCD=y
+CONFIG_USB_DUMMY_HCD=m
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+#
+# MMC/SD Card support
+#
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_BLOCK=m
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_REISERFS_FS_XATTR=y
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+CONFIG_JFS_FS=m
+CONFIG_JFS_POSIX_ACL=y
+# CONFIG_JFS_SECURITY is not set
+# CONFIG_JFS_DEBUG is not set
+CONFIG_JFS_STATISTICS=y
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+CONFIG_XFS_EXPORT=y
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_SECURITY=y
+CONFIG_XFS_POSIX_ACL=y
+CONFIG_XFS_RT=y
+# CONFIG_OCFS2_FS is not set
+CONFIG_MINIX_FS=m
+CONFIG_ROMFS_FS=m
+CONFIG_INOTIFY=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V1=m
+CONFIG_QFMT_V2=m
+CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+# CONFIG_FUSE_FS is not set
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_ZISOFS_FS=m
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_RW is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+#
+# Miscellaneous filesystems
+#
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_AFFS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_JFFS_FS=m
+CONFIG_JFFS_FS_VERBOSE=0
+CONFIG_JFFS_PROC_FS=y
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+CONFIG_VXFS_FS=m
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_NFS_DIRECTIO=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+CONFIG_NFSD_V4=y
+CONFIG_NFSD_TCP=y
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=m
+CONFIG_SUNRPC_GSS=m
+CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+CONFIG_NCP_FS=m
+CONFIG_NCPFS_PACKET_SIGNING=y
+CONFIG_NCPFS_IOCTL_LOCKING=y
+CONFIG_NCPFS_STRONG=y
+CONFIG_NCPFS_NFS_NS=y
+CONFIG_NCPFS_OS2_NS=y
+# CONFIG_NCPFS_SMALLDOS is not set
+CONFIG_NCPFS_NLS=y
+CONFIG_NCPFS_EXTRAS=y
+CONFIG_CODA_FS=m
+# CONFIG_CODA_FS_OLD_API is not set
+CONFIG_AFS_FS=m
+CONFIG_RXRPC=m
+# CONFIG_9P_FS is not set
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_ACORN_PARTITION=y
+# CONFIG_ACORN_PARTITION_CUMANA is not set
+# CONFIG_ACORN_PARTITION_EESOX is not set
+CONFIG_ACORN_PARTITION_ICS=y
+# CONFIG_ACORN_PARTITION_ADFS is not set
+# CONFIG_ACORN_PARTITION_POWERTEC is not set
+CONFIG_ACORN_PARTITION_RISCIX=y
+CONFIG_OSF_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_ATARI_PARTITION=y
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_LDM_PARTITION=y
+# CONFIG_LDM_DEBUG is not set
+CONFIG_SGI_PARTITION=y
+CONFIG_ULTRIX_PARTITION=y
+CONFIG_SUN_PARTITION=y
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="cp437"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+#
+# Profiling support
+#
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_WAITQ is not set
+# CONFIG_DEBUG_ERRORS is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITY_NETWORK is not set
+CONFIG_SECURITY_CAPABILITIES=m
+CONFIG_SECURITY_ROOTPLUG=m
+CONFIG_SECURITY_SECLVL=m
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_WP512=m
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_DEFLATE=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_TEST=m
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=m
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_REED_SOLOMON=m
+CONFIG_REED_SOLOMON_DEC16=y
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
index 3cec29d56c8e..e17661380096 100644
--- a/arch/arm/configs/s3c2410_defconfig
+++ b/arch/arm/configs/s3c2410_defconfig
@@ -1,12 +1,14 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.16
+# Linux kernel version: 2.6.17
-# Mon Mar 20 20:36:02 2006
+# Tue Jun 20 18:57:01 2006
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_VECTORS_BASE=0xffff0000
 #
 # Code maturity level options
@@ -27,6 +29,7 @@ CONFIG_SYSVIPC=y
 CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
 # CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_UID16=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -42,10 +45,6 @@ CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_EPOLL=y
 CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
 CONFIG_SLAB=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
@@ -57,7 +56,6 @@ CONFIG_OBSOLETE_INTERMODULE=y
 #
 CONFIG_MODULES=y
 # CONFIG_MODULE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_KMOD=y
@@ -65,6 +63,7 @@ CONFIG_KMOD=y
 #
 # Block layer
 #
+# CONFIG_BLK_DEV_IO_TRACE is not set
 #
 # IO Schedulers
@@ -92,6 +91,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
 # CONFIG_ARCH_IOP3XX is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
 # CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
@@ -106,6 +106,8 @@ CONFIG_ARCH_S3C2410=y
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
 # CONFIG_ARCH_AT91RM9200 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_NETX is not set
 #
 # S3C24XX Implementations
@@ -116,14 +118,19 @@ CONFIG_ARCH_BAST=y
 CONFIG_BAST_PC104_IRQ=y
 CONFIG_ARCH_H1940=y
 CONFIG_MACH_N30=y
+CONFIG_MACH_SMDK=y
 CONFIG_ARCH_SMDK2410=y
 CONFIG_ARCH_S3C2440=y
+CONFIG_SMDK2440_CPU2440=y
+CONFIG_SMDK2440_CPU2442=y
 CONFIG_MACH_VR1000=y
 CONFIG_MACH_RX3715=y
 CONFIG_MACH_OTOM=y
 CONFIG_MACH_NEXCODER_2440=y
 CONFIG_CPU_S3C2410=y
+CONFIG_CPU_S3C244X=y
 CONFIG_CPU_S3C2440=y
+CONFIG_CPU_S3C2442=y
 #
 # S3C2410 Boot
@@ -251,12 +258,15 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETFILTER is not set
 #
@@ -360,7 +370,6 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I8 is not set
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_AMDSTD_RETRY=0
 # CONFIG_MTD_CFI_STAA is not set
 CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
@@ -385,7 +394,6 @@ CONFIG_MTD_BAST_MAXSIZE=4
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
 # CONFIG_MTD_BLOCK2MTD is not set
 #
@@ -694,7 +702,6 @@ CONFIG_S3C2410_WATCHDOG=y
 #
 # CONFIG_USBPCWATCHDOG is not set
 # CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
 CONFIG_S3C2410_RTC=y
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
@@ -743,9 +750,7 @@ CONFIG_SENSORS_EEPROM=m
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
 # CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_RTC_X1205_I2C is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
@@ -807,18 +812,29 @@ CONFIG_SENSORS_LM85=m
 #
 #
-# Multimedia Capabilities Port drivers
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+#
+# LED drivers
+#
+#
+# LED Triggers
 #
 #
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
 #
 # Digital Video Broadcasting Devices
 #
 # CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
 #
 # Graphics support
@@ -828,6 +844,7 @@ CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
 # CONFIG_FB_MACMODES is not set
+CONFIG_FB_FIRMWARE_EDID=y
 CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_TILEBLITTING is not set
 # CONFIG_FB_S1D13XXX is not set
@@ -863,6 +880,7 @@ CONFIG_FONT_8x16=y
 #
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
 CONFIG_USB=y
 # CONFIG_USB_DEBUG is not set
@@ -915,9 +933,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_ACECAD is not set
 # CONFIG_USB_KBTAB is not set
 # CONFIG_USB_POWERMATE is not set
-# CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_TOUCHSCREEN is not set
-# CONFIG_USB_ITMTOUCH is not set
-# CONFIG_USB_EGALAX is not set
 # CONFIG_USB_YEALINK is not set
 # CONFIG_USB_XPAD is not set
 # CONFIG_USB_ATI_REMOTE is not set
@@ -931,15 +947,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
 # CONFIG_USB_MDC800 is not set
 #
-# USB Multimedia devices
-#
-# CONFIG_USB_DABUSB is not set
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-#
 # USB Network Adapters
 #
 # CONFIG_USB_CATC is not set
@@ -984,17 +991,6 @@ CONFIG_USB_MON=y
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
-# CONFIG_USB_GADGET_NET2280 is not set
-# CONFIG_USB_GADGET_PXA2XX is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_OMAP is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_ZERO is not set
-# CONFIG_USB_ETH is not set
-# CONFIG_USB_GADGETFS is not set
-# CONFIG_USB_FILE_STORAGE is not set
-# CONFIG_USB_G_SERIAL is not set
 #
 # MMC/SD Card support
@@ -1002,6 +998,12 @@ CONFIG_USB_MON=y
 # CONFIG_MMC is not set
 #
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+#
 # File systems
 #
 CONFIG_EXT2_FS=y
@@ -1052,7 +1054,6 @@ CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
 # CONFIG_CONFIGFS_FS is not set
 #
@@ -1193,6 +1194,7 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_FS is not set
 # CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig
index 2687a225aa6a..96b7a7762426 100644
--- a/arch/arm/configs/versatile_defconfig
+++ b/arch/arm/configs/versatile_defconfig
@@ -1,50 +1,55 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-rc1-bk2
+# Linux kernel version: 2.6.17-rc3
-# Mon Mar 28 00:20:50 2005
+# Mon May  8 20:15:57 2006
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
-CONFIG_UID16=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_IOMAP=y
+CONFIG_VECTORS_BASE=0xffff0000
 #
 # Code maturity level options
 #
 CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
 CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
 #
 # General setup
 #
 CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
-CONFIG_HOTPLUG=y
-CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_EMBEDDED is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_EPOLL=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_SLAB=y
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+CONFIG_OBSOLETE_INTERMODULE=y
 #
 # Loadable module support
@@ -52,23 +57,42 @@ CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_KMOD=y
 #
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
 # System Type
 #
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_INTEGRATOR is not set
 # CONFIG_ARCH_IOP3XX is not set
 # CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
 # CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
@@ -78,14 +102,17 @@ CONFIG_KMOD=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_OMAP is not set
 CONFIG_ARCH_VERSATILE=y
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_AT91RM9200 is not set
 #
 # Versatile platform type
 #
 CONFIG_ARCH_VERSATILE_PB=y
-# CONFIG_MACH_VERSATILE_AB is not set
+CONFIG_MACH_VERSATILE_AB=y
 #
 # Processor Type
@@ -106,12 +133,14 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
 # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+CONFIG_ARM_VIC=y
 CONFIG_ICST307=y
 #
 # Bus support
 #
 CONFIG_ARM_AMBA=y
+# CONFIG_PCI is not set
 #
 # PCCARD (PCMCIA/CardBus) support
@@ -122,6 +151,18 @@ CONFIG_ARM_AMBA=y
 # Kernel Features
 #
 # CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 CONFIG_LEDS=y
 CONFIG_LEDS_TIMER=y
 CONFIG_LEDS_CPU=y
@@ -145,7 +186,7 @@ CONFIG_CMDLINE="root=1f03 mem=32M"
 CONFIG_FPE_NWFPE=y
 # CONFIG_FPE_NWFPE_XP is not set
 # CONFIG_FPE_FASTFPE is not set
-# CONFIG_VFP is not set
+CONFIG_VFP=y
 #
 # Userspace binary formats
@@ -159,9 +200,92 @@ CONFIG_BINFMT_ELF=y
 # Power management options
 #
 CONFIG_PM=y
+CONFIG_PM_LEGACY=y
+# CONFIG_PM_DEBUG is not set
 # CONFIG_APM is not set
 #
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETFILTER is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+#
 # Device Drivers
 #
@@ -174,6 +298,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_DEBUG_DRIVER is not set
 #
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
 # Memory Technology Devices (MTD)
 #
 CONFIG_MTD=y
@@ -192,6 +321,7 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
 #
 # RAM/ROM/Flash chip drivers
@@ -214,6 +344,7 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
@@ -221,7 +352,7 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_XIP is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
 #
 # Mapping drivers for chip access
@@ -229,7 +360,7 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 # CONFIG_MTD_PHYSMAP is not set
 CONFIG_MTD_ARM_INTEGRATOR=y
-# CONFIG_MTD_EDB7312 is not set
+# CONFIG_MTD_PLATRAM is not set
 #
 # Self-contained MTD device drivers
@@ -237,7 +368,6 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
 # CONFIG_MTD_BLOCK2MTD is not set
 #
@@ -253,6 +383,11 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_NAND is not set
 #
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
 # Parallel port support
 #
 # CONFIG_PARPORT is not set
@@ -264,7 +399,6 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 #
 # Block devices
 #
-# CONFIG_BLK_DEV_FD is not set
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
@@ -272,21 +406,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 # CONFIG_ATA_OVER_ETH is not set
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
@@ -297,6 +423,7 @@ CONFIG_IOSCHED_CFQ=y
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 #
 # IEEE 1394 (FireWire) support
@@ -307,71 +434,8 @@ CONFIG_IOSCHED_CFQ=y
 #
 #
-# Networking support
+# Network device support
-#
-CONFIG_NET=y
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-#
-# Network testing
 #
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
@@ -379,11 +443,17 @@ CONFIG_NETDEVICES=y
 # CONFIG_TUN is not set
 #
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
 #
 # Ethernet (1000 Mbit)
@@ -410,6 +480,8 @@ CONFIG_SMC91X=y
 # CONFIG_SLIP is not set
 # CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
 #
 # ISDN subsystem
@@ -459,7 +531,6 @@ CONFIG_SERIO_AMBAKMI=y
 CONFIG_SERIO_LIBPS2=y
 # CONFIG_SERIO_RAW is not set
 # CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
 #
 # Character devices
@@ -474,17 +545,16 @@ CONFIG_HW_CONSOLE=y
 #
 CONFIG_SERIAL_8250=m
 CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 # CONFIG_SERIAL_8250_DETECT_IRQ is not set
-CONFIG_SERIAL_8250_MULTIPORT=y
 CONFIG_SERIAL_8250_RSA=y
 #
 # Non-8250 serial port support
 #
-# CONFIG_SERIAL_AMBA_PL010 is not set
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 CONFIG_SERIAL_CORE=y
@@ -503,20 +573,19 @@ CONFIG_LEGACY_PTY_COUNT=16
 #
 # CONFIG_WATCHDOG is not set
 # CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 #
 # Ftape, the floppy tape device driver
 #
-# CONFIG_DRM is not set
 # CONFIG_RAW_DRIVER is not set
 #
 # TPM devices
 #
 # CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
 #
 # I2C support
@@ -534,60 +603,60 @@ CONFIG_I2C_ALGOBIT=y
 #
 # I2C Hardware Bus support
 #
-# CONFIG_I2C_ISA is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
 # CONFIG_I2C_STUB is not set
 # CONFIG_I2C_PCA_ISA is not set
 #
-# Hardware Sensors Chip support
+# Miscellaneous I2C Chip support
-#
-CONFIG_I2C_SENSOR=m
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_FSCPOS is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-#
-# Other I2C Chip support
 #
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
 CONFIG_SENSORS_EEPROM=m
 # CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
 # CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
 # CONFIG_I2C_DEBUG_ALGO is not set
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 #
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+#
 # Misc devices
 #
 #
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+#
+# LED drivers
+#
+#
+# LED Triggers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -604,27 +673,31 @@ CONFIG_FB=y
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
-CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_FIRMWARE_EDID is not set
 # CONFIG_FB_MODE_HELPERS is not set
 # CONFIG_FB_TILEBLITTING is not set
 CONFIG_FB_ARMCLCD=y
+# CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
 #
 # Console display driver support
 #
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 CONFIG_FONTS=y
 # CONFIG_FONT_8x8 is not set
 # CONFIG_FONT_8x16 is not set
 # CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
 # CONFIG_FONT_PEARL_8x8 is not set
 CONFIG_FONT_ACORN_8x8=y
 # CONFIG_FONT_MINI_4x6 is not set
 # CONFIG_FONT_SUN8x16 is not set
 # CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
 #
 # Logo configuration
@@ -647,12 +720,18 @@ CONFIG_SND_PCM=m
 CONFIG_SND_OSSEMUL=y
 CONFIG_SND_MIXER_OSS=m
 CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
 #
 # Generic devices
 #
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_AC97_BUS=m
 # CONFIG_SND_DUMMY is not set
 # CONFIG_SND_MTPAV is not set
 # CONFIG_SND_SERIAL_U16550 is not set
@@ -661,6 +740,7 @@ CONFIG_SND_PCM_OSS=m
 #
 # ALSA ARM devices
 #
+CONFIG_SND_ARMAACI=m
 #
 # Open Sound System
@@ -672,9 +752,14 @@ CONFIG_SND_PCM_OSS=m
 #
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
 # CONFIG_USB is not set
 #
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
 # USB Gadget Support
 #
 # CONFIG_USB_GADGET is not set
@@ -688,25 +773,31 @@ CONFIG_MMC_BLOCK=y
 CONFIG_MMC_ARMMMCI=m
 #
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+#
 # File systems
 #
 CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
 CONFIG_MINIX_FS=y
 CONFIG_ROMFS_FS=y
+# CONFIG_INOTIFY is not set
 # CONFIG_QUOTA is not set
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -729,11 +820,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
 #
 # Miscellaneous filesystems
@@ -748,8 +838,8 @@ CONFIG_RAMFS=y
 # CONFIG_JFFS_FS is not set
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
+CONFIG_JFFS2_FS_WRITEBUFFER=y
-# CONFIG_JFFS2_FS_NOR_ECC is not set
+# CONFIG_JFFS2_SUMMARY is not set
 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
 CONFIG_JFFS2_ZLIB=y
 CONFIG_JFFS2_RTIME=y
@@ -766,16 +856,19 @@ CONFIG_CRAMFS=y
 #
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
 # CONFIG_NFS_DIRECTIO is not set
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
 # CONFIG_NFSD_V4 is not set
 # CONFIG_NFSD_TCP is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -784,6 +877,7 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 #
 # Partition Types
@@ -803,6 +897,7 @@ CONFIG_MSDOS_PARTITION=y
 # CONFIG_SGI_PARTITION is not set
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
 #
@@ -858,18 +953,24 @@ CONFIG_NLS_ISO8859_1=m
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
 CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_WAITQ is not set
 CONFIG_DEBUG_ERRORS=y
@@ -895,6 +996,7 @@ CONFIG_DEBUG_LL=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 45fdf4a51a2a..396efba9bacd 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -99,6 +99,8 @@ int main(void)
  DEFINE(MACHINFO_NAME,         offsetof(struct machine_desc, name));
  DEFINE(MACHINFO_PHYSIO,       offsetof(struct machine_desc, phys_io));
  DEFINE(MACHINFO_PGOFFIO,      offsetof(struct machine_desc, io_pg_offst));
+  BLANK();
+  DEFINE(PROC_INFO_SZ,          sizeof(struct proc_info_list));
  DEFINE(PROCINFO_INITFUNC,     offsetof(struct proc_info_list, __cpu_flush));
  DEFINE(PROCINFO_MMUFLAGS,     offsetof(struct proc_info_list, __cpu_mmu_flags));
  return 0; 
diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c
index 03532769a97f..0a3e9ad297d8 100644
--- a/arch/arm/kernel/dma-isa.c
+++ b/arch/arm/kernel/dma-isa.c
@@ -143,12 +143,23 @@ static struct dma_ops isa_dma_ops = {
        .residue        = isa_get_dma_residue,
 };
-static struct resource dma_resources[] = {
+static struct resource dma_resources[] = { {
-        { "dma1",               0x0000, 0x000f },
+        .name   = "dma1",
-        { "dma low page",       0x0080, 0x008f },
+        .start  = 0x0000,
-        { "dma2",               0x00c0, 0x00df },
+        .end    = 0x000f
-        { "dma high page",      0x0480, 0x048f }
+}, {
-};
+        .name   = "dma low page",
+        .start  = 0x0080,
+        .end    = 0x008f
+}, {
+        .name   = "dma2",
+        .start  = 0x00c0,
+        .end    = 0x00df
+}, {
+        .name   = "dma high page",
+        .start  = 0x0480,
+        .end    = 0x048f
+} };
 void __init isa_init_dma(dma_t *dma)
 {
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index dbcb11a31f78..b5bcebca1cd6 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -271,7 +271,7 @@ ENTRY(sys_call_table)
 @ r8 = syscall table
                .type   sys_syscall, #function
 sys_syscall:
-                eor     scno, r0, #__NR_OABI_SYSCALL_BASE
+                bic     scno, r0, #__NR_OABI_SYSCALL_BASE
                cmp     scno, #__NR_syscall - __NR_SYSCALL_BASE
                cmpne   scno, #NR_syscalls      @ check range
                stmloia sp, {r5, r6}            @ shuffle args
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 2d5896b36181..bcc19fbb32df 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -342,10 +342,10 @@ __do_irq(unsigned int irq, struct irqaction *action, struct pt_regs *regs)
 #ifdef CONFIG_NO_IDLE_HZ
        if (!(action->flags & SA_TIMER) && system_timer->dyn_tick != NULL) {
-                write_seqlock(&xtime_lock);
+                spin_lock(&system_timer->dyn_tick->lock);
                if (system_timer->dyn_tick->state & DYN_TICK_ENABLED)
                        system_timer->dyn_tick->handler(irq, 0, regs);
-                write_sequnlock(&xtime_lock);
+                spin_unlock(&system_timer->dyn_tick->lock);
        }
 #endif
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 1ff75cee4b0d..17c38dbf2f3c 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -28,6 +28,7 @@
 #include <linux/init.h>
 #include <linux/cpu.h>
 #include <linux/elfcore.h>
+#include <linux/pm.h>
 #include <asm/leds.h>
 #include <asm/processor.h>
@@ -71,8 +72,36 @@ static int __init hlt_setup(char *__unused)
 __setup("nohlt", nohlt_setup);
 __setup("hlt", hlt_setup);
+void arm_machine_restart(char mode)
+{
+        /*
+         * Clean and disable cache, and turn off interrupts
+         */
+        cpu_proc_fin();
+        /*
+         * Tell the mm system that we are going to reboot -
+         * we may need it to insert some 1:1 mappings so that
+         * soft boot works.
+         */
+        setup_mm_for_reboot(mode);
+        /*
+         * Now call the architecture specific reboot code.
+         */
+        arch_reset(mode);
+        /*
+         * Whoops - the architecture was unable to reboot.
+         * Tell the user!
+         */
+        mdelay(1000);
+        printk("Reboot failed -- System halted\n");
+        while (1);
+}
 /*
- * The following aren't currently used.
+ * Function pointers to optional machine specific functions
 */
 void (*pm_idle)(void);
 EXPORT_SYMBOL(pm_idle);
@@ -80,6 +109,10 @@ EXPORT_SYMBOL(pm_idle);
 void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
+void (*arm_pm_restart)(char str) = arm_machine_restart;
+EXPORT_SYMBOL_GPL(arm_pm_restart);
 /*
 * This is our default idle handler.  We need to disable
 * interrupts here to ensure we don't miss a wakeup call.
@@ -151,33 +184,9 @@ void machine_power_off(void)
                pm_power_off();
 }
 void machine_restart(char * __unused)
 {
-        /*
+        arm_pm_restart(reboot_mode);
-         * Clean and disable cache, and turn off interrupts
-         */
-        cpu_proc_fin();
-        /*
-         * Tell the mm system that we are going to reboot -
-         * we may need it to insert some 1:1 mappings so that
-         * soft boot works.
-         */
-        setup_mm_for_reboot(reboot_mode);
-        /*
-         * Now call the architecture specific reboot code.
-         */
-        arch_reset(reboot_mode);
-        /*
-         * Whoops - the architecture was unable to reboot.
-         * Tell the user!
-         */
-        mdelay(1000);
-        printk("Reboot failed -- System halted\n");
-        while (1);
 }
 void __show_regs(struct pt_regs *regs)
@@ -264,8 +273,12 @@ void show_fpregs(struct user_fp *regs)
 /*
 * Task structure and kernel stack allocation.
 */
-static unsigned long *thread_info_head;
+struct thread_info_list {
-static unsigned int nr_thread_info;
+        unsigned long *head;
+        unsigned int nr;
+};
+static DEFINE_PER_CPU(struct thread_info_list, thread_info_list) = { NULL, 0 };
 #define EXTRA_TASK_STRUCT       4
@@ -274,12 +287,15 @@ struct thread_info *alloc_thread_info(struct task_struct *task)
        struct thread_info *thread = NULL;
        if (EXTRA_TASK_STRUCT) {
-                unsigned long *p = thread_info_head;
+                struct thread_info_list *th = &get_cpu_var(thread_info_list);
+                unsigned long *p = th->head;
                if (p) {
-                        thread_info_head = (unsigned long *)p[0];
+                        th->head = (unsigned long *)p[0];
-                        nr_thread_info -= 1;
+                        th->nr -= 1;
                }
+                put_cpu_var(thread_info_list);
                thread = (struct thread_info *)p;
        }
@@ -300,13 +316,19 @@ struct thread_info *alloc_thread_info(struct task_struct *task)
 void free_thread_info(struct thread_info *thread)
 {
-        if (EXTRA_TASK_STRUCT && nr_thread_info < EXTRA_TASK_STRUCT) {
+        if (EXTRA_TASK_STRUCT) {
-                unsigned long *p = (unsigned long *)thread;
+                struct thread_info_list *th = &get_cpu_var(thread_info_list);
-                p[0] = (unsigned long)thread_info_head;
+                if (th->nr < EXTRA_TASK_STRUCT) {
-                thread_info_head = p;
+                        unsigned long *p = (unsigned long *)thread;
-                nr_thread_info += 1;
+                        p[0] = (unsigned long)th->head;
-        } else
+                        th->head = p;
-                free_pages((unsigned long)thread, THREAD_SIZE_ORDER);
+                        th->nr += 1;
+                        put_cpu_var(thread_info_list);
+                        return;
+                }
+                put_cpu_var(thread_info_list);
+        }
+        free_pages((unsigned long)thread, THREAD_SIZE_ORDER);
 }
 /*
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index d6bd435a6857..9c12d4fefbd3 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -379,7 +379,7 @@ static int timer_dyn_tick_enable(void)
        int ret = -ENODEV;
        if (dyn_tick) {
-                write_seqlock_irqsave(&xtime_lock, flags);
+                spin_lock_irqsave(&dyn_tick->lock, flags);
                ret = 0;
                if (!(dyn_tick->state & DYN_TICK_ENABLED)) {
                        ret = dyn_tick->enable();
@@ -387,7 +387,7 @@ static int timer_dyn_tick_enable(void)
                        if (ret == 0)
                                dyn_tick->state |= DYN_TICK_ENABLED;
                }
-                write_sequnlock_irqrestore(&xtime_lock, flags);
+                spin_unlock_irqrestore(&dyn_tick->lock, flags);
        }
        return ret;
@@ -400,7 +400,7 @@ static int timer_dyn_tick_disable(void)
        int ret = -ENODEV;
        if (dyn_tick) {
-                write_seqlock_irqsave(&xtime_lock, flags);
+                spin_lock_irqsave(&dyn_tick->lock, flags);
                ret = 0;
                if (dyn_tick->state & DYN_TICK_ENABLED) {
                        ret = dyn_tick->disable();
@@ -408,7 +408,7 @@ static int timer_dyn_tick_disable(void)
                        if (ret == 0)
                                dyn_tick->state &= ~DYN_TICK_ENABLED;
                }
-                write_sequnlock_irqrestore(&xtime_lock, flags);
+                spin_unlock_irqrestore(&dyn_tick->lock, flags);
        }
        return ret;
@@ -422,15 +422,20 @@ static int timer_dyn_tick_disable(void)
 void timer_dyn_reprogram(void)
 {
        struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick;
-        unsigned long next, seq;
+        unsigned long next, seq, flags;
-        if (dyn_tick && (dyn_tick->state & DYN_TICK_ENABLED)) {
+        if (!dyn_tick)
+                return;
+        spin_lock_irqsave(&dyn_tick->lock, flags);
+        if (dyn_tick->state & DYN_TICK_ENABLED) {
                next = next_timer_interrupt();
                do {
                        seq = read_seqbegin(&xtime_lock);
-                        dyn_tick->reprogram(next_timer_interrupt() - jiffies);
+                        dyn_tick->reprogram(next - jiffies);
                } while (read_seqretry(&xtime_lock, seq));
        }
+        spin_unlock_irqrestore(&dyn_tick->lock, flags);
 }
 static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf)
@@ -499,5 +504,10 @@ void __init time_init(void)
        if (system_timer->offset == NULL)
                system_timer->offset = dummy_gettimeoffset;
        system_timer->init();
+#ifdef CONFIG_NO_IDLE_HZ
+        if (system_timer->dyn_tick)
+                system_timer->dyn_tick->lock = SPIN_LOCK_UNLOCKED;
+#endif
 }
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index 3bdc8c6949c5..16153c86c3f8 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -122,7 +122,7 @@ ENTRY(c_backtrace)
 #define reg   r5
 #define stack r6
-.Ldumpstm:      stmfd   sp!, {instr, reg, stack, r7, lr}
+.Ldumpstm:      stmfd   sp!, {instr, reg, stack, r7, r8, lr}
                mov     stack, r0
                mov     instr, r1
                mov     reg, #9
@@ -145,7 +145,7 @@ ENTRY(c_backtrace)
                adrne   r0, .Lcr
                blne    printk
                mov     r0, stack
-                LOADREGS(fd, sp!, {instr, reg, stack, r7, pc})
+                LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc})
 .Lfp:           .asciz  " r%d = %08X%c"
 .Lcr:           .asciz  "\n"
diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S
index ec9a1cd6176f..58eef6607629 100644
--- a/arch/arm/lib/div64.S
+++ b/arch/arm/lib/div64.S
@@ -189,12 +189,12 @@ ENTRY(__do_div64)
        moveq   pc, lr
        @ Division by 0:
-        str     lr, [sp, #-4]!
+        str     lr, [sp, #-8]!
        bl      __div0
        @ as wrong as it could be...
        mov     yl, #0
        mov     yh, #0
        mov     xh, #0
-        ldr     pc, [sp], #4
+        ldr     pc, [sp], #8
diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91rm9200/Kconfig
index 4b7218fc3eb1..1ab5b7828318 100644
--- a/arch/arm/mach-at91rm9200/Kconfig
+++ b/arch/arm/mach-at91rm9200/Kconfig
@@ -40,6 +40,18 @@ config MACH_KB9200
        help
          Select this if you are using KwikByte's KB920x board
+config MACH_ATEB9200
+        bool "Embest's ATEB9200"
+        depends on ARCH_AT91RM9200
+        help
+          Select this if you are using Embest's ATEB9200 board
+config MACH_KAFA
+        bool "Sperry-Sun KAFA board"
+        depends on ARCH_AT91RM9200
+        help
+          Select this if you are using Sperry-Sun's KAFA board
 comment "AT91RM9200 Feature Selections"
diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile
index ef88c4128edc..81ebc6684ad2 100644
--- a/arch/arm/mach-at91rm9200/Makefile
+++ b/arch/arm/mach-at91rm9200/Makefile
@@ -7,22 +7,31 @@ obj-m		:=
 obj-n           :=
 obj-            :=
+obj-$(CONFIG_PM)                += pm.o
 # Board-specific support
 obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
 obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
 obj-$(CONFIG_MACH_CSB337)       += board-csb337.o
 obj-$(CONFIG_MACH_CSB637)       += board-csb637.o
-#obj-$(CONFIG_MACH_CARMEVA)     += board-carmeva.o
+obj-$(CONFIG_MACH_CARMEVA)      += board-carmeva.o
-#obj-$(CONFIG_MACH_KB9200)      += board-kb9202.o
+obj-$(CONFIG_MACH_KB9200)       += board-kb9202.o
+obj-$(CONFIG_MACH_ATEB9200)     += board-eb9200.o
+obj-$(CONFIG_MACH_KAFA)         += board-kafa.o
 # LEDs support
 led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
 led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
 led-$(CONFIG_MACH_CSB337)       += leds.o
 led-$(CONFIG_MACH_CSB637)       += leds.o
-#led-$(CONFIG_MACH_KB9200)      += leds.o
+led-$(CONFIG_MACH_KB9200)       += leds.o
-#led-$(CONFIG_MACH_KAFA)        += leds.o
+led-$(CONFIG_MACH_KAFA)         += leds.o
 obj-$(CONFIG_LEDS) += $(led-y)
 # VGA support
 #obj-$(CONFIG_FB_S1D13XXX)      += ics1523.o
+ifeq ($(CONFIG_PM_DEBUG),y)
+CFLAGS_pm.o += -DDEBUG
+endif
diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91rm9200/board-carmeva.c
new file mode 100644
index 000000000000..2c138b542ebe
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-carmeva.c
@@ -0,0 +1,131 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/board-carmeva.c
+ *
+ *  Copyright (c) 2005 Peer Georgi
+ *                     Conitec Datasystems
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include "generic.h"
+static void __init carmeva_init_irq(void)
+{
+        /* Initialize AIC controller */
+        at91rm9200_init_irq(NULL);
+        /* Set up the GPIO interrupts */
+        at91_gpio_irq_setup(BGA_GPIO_BANKS);
+}
+/*
+ * Serial port configuration.
+ *    0 .. 3 = USART0 .. USART3
+ *    4      = DBGU
+ */
+static struct at91_uart_config __initdata carmeva_uart_config = {
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 2,
+        .tty_map        = { 4, 1, -1, -1, -1 }          /* ttyS0, ..., ttyS4 */
+};
+static void __init carmeva_map_io(void)
+{
+        at91rm9200_map_io();
+        /* Initialize clocks: 20.000 MHz crystal */
+        at91_clock_init(20000000);
+        /* Setup the serial ports and console */
+        at91_init_serial(&carmeva_uart_config);
+}
+static struct at91_eth_data __initdata carmeva_eth_data = {
+        .phy_irq_pin    = AT91_PIN_PC4,
+        .is_rmii        = 1,
+};
+static struct at91_usbh_data __initdata carmeva_usbh_data = {
+        .ports          = 2,
+};
+static struct at91_udc_data __initdata carmeva_udc_data = {
+        .vbus_pin       = AT91_PIN_PD12,
+        .pullup_pin     = AT91_PIN_PD9,
+};
+/* FIXME: user dependend */
+// static struct at91_cf_data __initdata carmeva_cf_data = {
+//      .det_pin        = AT91_PIN_PB0,
+//      .rst_pin        = AT91_PIN_PC5,
+        // .irq_pin     = ... not connected
+        // .vcc_pin     = ... always powered
+// };
+static struct at91_mmc_data __initdata carmeva_mmc_data = {
+        .is_b           = 0,
+        .wire4          = 1,
+};
+static void __init carmeva_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* Ethernet */
+        at91_add_device_eth(&carmeva_eth_data);
+        /* USB Host */
+        at91_add_device_usbh(&carmeva_usbh_data);
+        /* USB Device */
+        at91_add_device_udc(&carmeva_udc_data);
+        /* I2C */
+        at91_add_device_i2c();
+        /* Compact Flash */
+//      at91_add_device_cf(&carmeva_cf_data);
+        /* SPI */
+//      at91_add_device_spi(NULL, 0);
+        /* MMC */
+        at91_add_device_mmc(&carmeva_mmc_data);
+}
+MACHINE_START(CARMEVA, "Carmeva")
+        /* Maintainer: Conitec Datasystems */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91rm9200_timer,
+        .map_io         = carmeva_map_io,
+        .init_irq       = carmeva_init_irq,
+        .init_machine   = carmeva_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91rm9200/board-csb337.c
index f45104ceea8f..e94645d77f7a 100644
--- a/arch/arm/mach-at91rm9200/board-csb337.c
+++ b/arch/arm/mach-at91rm9200/board-csb337.c
@@ -24,6 +24,7 @@
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/spi/spi.h>
 #include <asm/hardware.h>
 #include <asm/setup.h>
@@ -34,9 +35,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
-#include <asm/mach/serial_at91rm9200.h>
 #include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
 #include "generic.h"
@@ -54,32 +55,24 @@ static void __init csb337_init_irq(void)
 *    0 .. 3 = USART0 .. USART3
 *    4      = DBGU
 */
-#define CSB337_UART_MAP         { 4, 1, -1, -1, -1 }    /* ttyS0, ..., ttyS4 */
+static struct at91_uart_config __initdata csb337_uart_config = {
-#define CSB337_SERIAL_CONSOLE   0                       /* ttyS0 */
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 2,
+        .tty_map        = { 4, 1, -1, -1, -1 }          /* ttyS0, ..., ttyS4 */
+};
 static void __init csb337_map_io(void)
 {
-        int serial[AT91_NR_UART] = CSB337_UART_MAP;
-        int i;
        at91rm9200_map_io();
        /* Initialize clocks: 3.6864 MHz crystal */
        at91_clock_init(3686400);
        /* Setup the LEDs */
-        at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
+        at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
-#ifdef CONFIG_SERIAL_AT91
+        /* Setup the serial ports and console */
-        at91_console_port = CSB337_SERIAL_CONSOLE;
+        at91_init_serial(&csb337_uart_config);
-        memcpy(at91_serial_map, serial, sizeof(serial));
-        /* Register UARTs */
-        for (i = 0; i < AT91_NR_UART; i++) {
-                if (serial[i] >= 0)
-                        at91_register_uart(i, serial[i]);
-        }
-#endif
 }
 static struct at91_eth_data __initdata csb337_eth_data = {
@@ -118,17 +111,31 @@ static struct at91_mmc_data __initdata csb337_mmc_data = {
        .wp_pin         = AT91_PIN_PD6,
 };
+static struct spi_board_info csb337_spi_devices[] = {
+        {       /* CAN controller */
+                .modalias       = "sak82c900",
+                .chip_select    = 0,
+                .max_speed_hz   = 6 * 1000 * 1000,
+        },
+};
 static void __init csb337_board_init(void)
 {
+        /* Serial */
+        at91_add_device_serial();
        /* Ethernet */
        at91_add_device_eth(&csb337_eth_data);
        /* USB Host */
        at91_add_device_usbh(&csb337_usbh_data);
        /* USB Device */
        at91_add_device_udc(&csb337_udc_data);
+        /* I2C */
+        at91_add_device_i2c();
        /* Compact Flash */
        at91_set_gpio_input(AT91_PIN_PB22, 1);          /* IOIS16 */
        at91_add_device_cf(&csb337_cf_data);
+        /* SPI */
+        at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
        /* MMC */
        at91_add_device_mmc(&csb337_mmc_data);
 }
diff --git a/arch/arm/mach-at91rm9200/board-csb637.c b/arch/arm/mach-at91rm9200/board-csb637.c
index f2c2d6e79bc6..67d5f7786cdb 100644
--- a/arch/arm/mach-at91rm9200/board-csb637.c
+++ b/arch/arm/mach-at91rm9200/board-csb637.c
@@ -34,9 +34,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
-#include <asm/mach/serial_at91rm9200.h>
 #include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
 #include "generic.h"
@@ -54,14 +54,14 @@ static void __init csb637_init_irq(void)
 *    0 .. 3 = USART0 .. USART3
 *    4      = DBGU
 */
-#define CSB637_UART_MAP         { 4, 1, -1, -1, -1 }    /* ttyS0, ..., ttyS4 */
+static struct at91_uart_config __initdata csb637_uart_config = {
-#define CSB637_SERIAL_CONSOLE   0                       /* ttyS0 */
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 2,
+        .tty_map        = { 4, 1, -1, -1, -1 }          /* ttyS0, ..., ttyS4 */
+};
 static void __init csb637_map_io(void)
 {
-        int serial[AT91_NR_UART] = CSB637_UART_MAP;
-        int i;
        at91rm9200_map_io();
        /* Initialize clocks: 3.6864 MHz crystal */
@@ -70,16 +70,8 @@ static void __init csb637_map_io(void)
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
-#ifdef CONFIG_SERIAL_AT91
+        /* Setup the serial ports and console */
-        at91_console_port = CSB637_SERIAL_CONSOLE;
+        at91_init_serial(&csb637_uart_config);
-        memcpy(at91_serial_map, serial, sizeof(serial));
-        /* Register UARTs */
-        for (i = 0; i < AT91_NR_UART; i++) {
-                if (serial[i] >= 0)
-                        at91_register_uart(i, serial[i]);
-        }
-#endif
 }
 static struct at91_eth_data __initdata csb637_eth_data = {
@@ -98,12 +90,18 @@ static struct at91_udc_data __initdata csb637_udc_data = {
 static void __init csb637_board_init(void)
 {
+        /* Serial */
+        at91_add_device_serial();
        /* Ethernet */
        at91_add_device_eth(&csb637_eth_data);
        /* USB Host */
        at91_add_device_usbh(&csb637_usbh_data);
        /* USB Device */
        at91_add_device_udc(&csb637_udc_data);
+        /* I2C */
+        at91_add_device_i2c();
+        /* SPI */
+        at91_add_device_spi(NULL, 0);
 }
 MACHINE_START(CSB637, "Cogent CSB637")
diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91rm9200/board-dk.c
index 2d7200ed66ed..48d7390fa584 100644
--- a/arch/arm/mach-at91rm9200/board-dk.c
+++ b/arch/arm/mach-at91rm9200/board-dk.c
@@ -27,6 +27,7 @@
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/spi/spi.h>
 #include <asm/hardware.h>
 #include <asm/setup.h>
@@ -37,9 +38,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
-#include <asm/mach/serial_at91rm9200.h>
 #include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
 #include "generic.h"
@@ -57,14 +58,14 @@ static void __init dk_init_irq(void)
 *    0 .. 3 = USART0 .. USART3
 *    4      = DBGU
 */
-#define DK_UART_MAP             { 4, 1, -1, -1, -1 }    /* ttyS0, ..., ttyS4 */
+static struct at91_uart_config __initdata dk_uart_config = {
-#define DK_SERIAL_CONSOLE       0                       /* ttyS0 */
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 2,
+        .tty_map        = { 4, 1, -1, -1, -1 }          /* ttyS0, ..., ttyS4 */
+};
 static void __init dk_map_io(void)
 {
-        int serial[AT91_NR_UART] = DK_UART_MAP;
-        int i;
        at91rm9200_map_io();
        /* Initialize clocks: 18.432 MHz crystal */
@@ -73,16 +74,8 @@ static void __init dk_map_io(void)
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
-#ifdef CONFIG_SERIAL_AT91
+        /* Setup the serial ports and console */
-        at91_console_port = DK_SERIAL_CONSOLE;
+        at91_init_serial(&dk_uart_config);
-        memcpy(at91_serial_map, serial, sizeof(serial));
-        /* Register UARTs */
-        for (i = 0; i < AT91_NR_UART; i++) {
-                if (at91_serial_map[i] >= 0)
-                        at91_register_uart(i, at91_serial_map[i]);
-        }
-#endif
 }
 static struct at91_eth_data __initdata dk_eth_data = {
@@ -111,16 +104,48 @@ static struct at91_mmc_data __initdata dk_mmc_data = {
        .wire4          = 1,
 };
+static struct spi_board_info dk_spi_devices[] = {
+        {       /* DataFlash chip */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+        },
+        {       /* UR6HCPS2-SP40 PS2-to-SPI adapter */
+                .modalias       = "ur6hcps2",
+                .chip_select    = 1,
+                .max_speed_hz   = 250 *  1000,
+        },
+        {       /* TLV1504 ADC, 4 channels, 10 bits; one is a temp sensor */
+                .modalias       = "tlv1504",
+                .chip_select    = 2,
+                .max_speed_hz   = 20 * 1000 * 1000,
+        },
+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+        {       /* DataFlash card */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 3,
+                .max_speed_hz   = 15 * 1000 * 1000,
+        }
+#endif
+};
 static void __init dk_board_init(void)
 {
+        /* Serial */
+        at91_add_device_serial();
        /* Ethernet */
        at91_add_device_eth(&dk_eth_data);
        /* USB Host */
        at91_add_device_usbh(&dk_usbh_data);
        /* USB Device */
        at91_add_device_udc(&dk_udc_data);
+        at91_set_multi_drive(dk_udc_data.pullup_pin, 1);        /* pullup_pin is connected to reset */
        /* Compact Flash */
        at91_add_device_cf(&dk_cf_data);
+        /* I2C */
+        at91_add_device_i2c();
+        /* SPI */
+        at91_add_device_spi(dk_spi_devices, ARRAY_SIZE(dk_spi_devices));
 #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
        /* DataFlash card */
        at91_set_gpio_output(AT91_PIN_PB7, 0);
diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91rm9200/board-eb9200.c
new file mode 100644
index 000000000000..a3e2df968a66
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-eb9200.c
@@ -0,0 +1,130 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/board-eb9200.c
+ *
+ *  Copyright (C) 2005 SAN People, adapted for ATEB9200 from Embest
+ *  by Andrew Patrikalakis
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include "generic.h"
+static void __init eb9200_init_irq(void)
+{
+        /* Initialize AIC controller */
+        at91rm9200_init_irq(NULL);
+        /* Set up the GPIO interrupts */
+        at91_gpio_irq_setup(BGA_GPIO_BANKS);
+}
+/*
+ * Serial port configuration.
+ *    0 .. 3 = USART0 .. USART3
+ *    4      = DBGU
+ */
+static struct at91_uart_config __initdata eb9200_uart_config = {
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 2,
+        .tty_map        = { 4, 1, -1, -1, -1 }          /* ttyS0, ..., ttyS4 */
+};
+static void __init eb9200_map_io(void)
+{
+        at91rm9200_map_io();
+        /* Initialize clocks: 18.432 MHz crystal */
+        at91_clock_init(18432000);
+        /* Setup the serial ports and console */
+        at91_init_serial(&eb9200_uart_config);
+}
+static struct at91_eth_data __initdata eb9200_eth_data = {
+        .phy_irq_pin    = AT91_PIN_PC4,
+        .is_rmii        = 1,
+};
+static struct at91_usbh_data __initdata eb9200_usbh_data = {
+        .ports          = 2,
+};
+static struct at91_udc_data __initdata eb9200_udc_data = {
+        .vbus_pin       = AT91_PIN_PD4,
+        .pullup_pin     = AT91_PIN_PD5,
+};
+static struct at91_cf_data __initdata eb9200_cf_data = {
+        .det_pin        = AT91_PIN_PB0,
+        .rst_pin        = AT91_PIN_PC5,
+        // .irq_pin     = ... not connected
+        // .vcc_pin     = ... always powered
+};
+static struct at91_mmc_data __initdata eb9200_mmc_data = {
+        .is_b           = 0,
+        .wire4          = 1,
+};
+static void __init eb9200_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* Ethernet */
+        at91_add_device_eth(&eb9200_eth_data);
+        /* USB Host */
+        at91_add_device_usbh(&eb9200_usbh_data);
+        /* USB Device */
+        at91_add_device_udc(&eb9200_udc_data);
+        /* I2C */
+        at91_add_device_i2c();
+        /* Compact Flash */
+        at91_add_device_cf(&eb9200_cf_data);
+        /* SPI */
+        at91_add_device_spi(NULL, 0);
+        /* MMC */
+        /* only supports 1 or 4 bit interface, not wired through to SPI */
+        at91_add_device_mmc(&eb9200_mmc_data);
+}
+MACHINE_START(ATEB9200, "Embest ATEB9200")
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91rm9200_timer,
+        .map_io         = eb9200_map_io,
+        .init_irq       = eb9200_init_irq,
+        .init_machine   = eb9200_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91rm9200/board-ek.c
index 80d90f5135a1..72202ed830ad 100644
--- a/arch/arm/mach-at91rm9200/board-ek.c
+++ b/arch/arm/mach-at91rm9200/board-ek.c
@@ -27,6 +27,7 @@
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/spi/spi.h>
 #include <asm/hardware.h>
 #include <asm/setup.h>
@@ -37,9 +38,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
-#include <asm/mach/serial_at91rm9200.h>
 #include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
 #include "generic.h"
@@ -57,14 +58,14 @@ static void __init ek_init_irq(void)
 *    0 .. 3 = USART0 .. USART3
 *    4      = DBGU
 */
-#define EK_UART_MAP             { 4, 1, -1, -1, -1 }    /* ttyS0, ..., ttyS4 */
+static struct at91_uart_config __initdata ek_uart_config = {
-#define EK_SERIAL_CONSOLE       0                       /* ttyS0 */
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 2,
+        .tty_map        = { 4, 1, -1, -1, -1 }          /* ttyS0, ..., ttyS4 */
+};
 static void __init ek_map_io(void)
 {
-        int serial[AT91_NR_UART] = EK_UART_MAP;
-        int i;
        at91rm9200_map_io();
        /* Initialize clocks: 18.432 MHz crystal */
@@ -73,16 +74,8 @@ static void __init ek_map_io(void)
        /* Setup the LEDs */
        at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
-#ifdef CONFIG_SERIAL_AT91
+        /* Setup the serial ports and console */
-        at91_console_port = EK_SERIAL_CONSOLE;
+        at91_init_serial(&ek_uart_config);
-        memcpy(at91_serial_map, serial, sizeof(serial));
-        /* Register UARTs */
-        for (i = 0; i < AT91_NR_UART; i++) {
-                if (serial[i] >= 0)
-                        at91_register_uart(i, serial[i]);
-        }
-#endif
 }
 static struct at91_eth_data __initdata ek_eth_data = {
@@ -106,14 +99,36 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
        .wp_pin         = AT91_PIN_PA17,
 };
+static struct spi_board_info ek_spi_devices[] = {
+        {       /* DataFlash chip */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+        },
+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
+        {       /* DataFlash card */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 3,
+                .max_speed_hz   = 15 * 1000 * 1000,
+        },
+#endif
+};
 static void __init ek_board_init(void)
 {
+        /* Serial */
+        at91_add_device_serial();
        /* Ethernet */
        at91_add_device_eth(&ek_eth_data);
        /* USB Host */
        at91_add_device_usbh(&ek_usbh_data);
        /* USB Device */
        at91_add_device_udc(&ek_udc_data);
+        at91_set_multi_drive(ek_udc_data.pullup_pin, 1);        /* pullup_pin is connected to reset */
+        /* I2C */
+        at91_add_device_i2c();
+        /* SPI */
+        at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
 #ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
        /* DataFlash card */
        at91_set_gpio_output(AT91_PIN_PB22, 0);
diff --git a/arch/arm/mach-at91rm9200/board-kafa.c b/arch/arm/mach-at91rm9200/board-kafa.c
new file mode 100644
index 000000000000..bf760c5e0c46
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-kafa.c
@@ -0,0 +1,116 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/board-kafa.c
+ *
+ *  Copyright (C) 2006 Sperry-Sun
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include "generic.h"
+static void __init kafa_init_irq(void)
+{
+        /* Initialize AIC controller */
+        at91rm9200_init_irq(NULL);
+        /* Set up the GPIO interrupts */
+        at91_gpio_irq_setup(PQFP_GPIO_BANKS);
+}
+/*
+ * Serial port configuration.
+ *    0 .. 3 = USART0 .. USART3
+ *    4      = DBGU
+ */
+static struct at91_uart_config __initdata kafa_uart_config = {
+        .console_tty    = 0,                            /* ttyS0 */
+        .nr_tty         = 2,
+        .tty_map        = { 4, 0, -1, -1, -1 }          /* ttyS0, ..., ttyS4 */
+};
+static void __init kafa_map_io(void)
+{
+        at91rm9200_map_io();
+        /* Initialize clocks: 18.432 MHz crystal */
+        at91_clock_init(18432000);
+        /* Set up the LEDs */
+        at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
+        /* Setup the serial ports and console */
+        at91_init_serial(&kafa_uart_config);
+}
+static struct at91_eth_data __initdata kafa_eth_data = {
+        .phy_irq_pin    = AT91_PIN_PC4,
+        .is_rmii        = 0,
+};
+static struct at91_usbh_data __initdata kafa_usbh_data = {
+        .ports          = 1,
+};
+static struct at91_udc_data __initdata kafa_udc_data = {
+        .vbus_pin       = AT91_PIN_PB6,
+        .pullup_pin     = AT91_PIN_PB7,
+};
+static void __init kafa_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* Ethernet */
+        at91_add_device_eth(&kafa_eth_data);
+        /* USB Host */
+        at91_add_device_usbh(&kafa_usbh_data);
+        /* USB Device */
+        at91_add_device_udc(&kafa_udc_data);
+        /* I2C */
+        at91_add_device_i2c();
+        /* SPI */
+        at91_add_device_spi(NULL, 0);
+}
+MACHINE_START(KAFA, "Sperry-Sun KAFA")
+        /* Maintainer: Sergei Sharonov */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91rm9200_timer,
+        .map_io         = kafa_map_io,
+        .init_irq       = kafa_init_irq,
+        .init_machine   = kafa_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91rm9200/board-kb9202.c
new file mode 100644
index 000000000000..f06d2b54cc9a
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-kb9202.c
@@ -0,0 +1,125 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/board-kb9202.c
+ *
+ *  Copyright (c) 2005 kb_admin
+ *                     KwikByte, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include "generic.h"
+static void __init kb9202_init_irq(void)
+{
+        /* Initialize AIC controller */
+        at91rm9200_init_irq(NULL);
+        /* Set up the GPIO interrupts */
+        at91_gpio_irq_setup(PQFP_GPIO_BANKS);
+}
+/*
+ * Serial port configuration.
+ *    0 .. 3 = USART0 .. USART3
+ *    4      = DBGU
+ */
+static struct at91_uart_config __initdata kb9202_uart_config = {
+        .console_tty    = 0,                                    /* ttyS0 */
+        .nr_tty         = 3,
+        .tty_map        = { 4, 0, 1, -1, -1 }                   /* ttyS0, ..., ttyS4 */
+};
+static void __init kb9202_map_io(void)
+{
+        at91rm9200_map_io();
+        /* Initialize clocks: 10 MHz crystal */
+        at91_clock_init(10000000);
+        /* Set up the LEDs */
+        at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
+        /* Setup the serial ports and console */
+        at91_init_serial(&kb9202_uart_config);
+}
+static struct at91_eth_data __initdata kb9202_eth_data = {
+        .phy_irq_pin    = AT91_PIN_PB29,
+        .is_rmii        = 0,
+};
+static struct at91_usbh_data __initdata kb9202_usbh_data = {
+        .ports          = 1,
+};
+static struct at91_udc_data __initdata kb9202_udc_data = {
+        .vbus_pin       = AT91_PIN_PB24,
+        .pullup_pin     = AT91_PIN_PB22,
+};
+static struct at91_mmc_data __initdata kb9202_mmc_data = {
+        .det_pin        = AT91_PIN_PB2,
+        .is_b           = 0,
+        .wire4          = 1,
+};
+static void __init kb9202_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* Ethernet */
+        at91_add_device_eth(&kb9202_eth_data);
+        /* USB Host */
+        at91_add_device_usbh(&kb9202_usbh_data);
+        /* USB Device */
+        at91_add_device_udc(&kb9202_udc_data);
+        /* MMC */
+        at91_add_device_mmc(&kb9202_mmc_data);
+        /* I2C */
+        at91_add_device_i2c();
+        /* SPI */
+        at91_add_device_spi(NULL, 0);
+}
+MACHINE_START(KB9200, "KB920x")
+        /* Maintainer: KwikByte, Inc. */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91rm9200_timer,
+        .map_io         = kb9202_map_io,
+        .init_irq       = kb9202_init_irq,
+        .init_machine   = kb9202_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c
index 8b95467c6d61..edc2cc837ae6 100644
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91rm9200/clock.c
@@ -27,12 +27,10 @@
 #include <asm/io.h>
 #include <asm/mach-types.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
-#include <asm/arch/board.h>             /* for master clock global */
 #include "generic.h"
-#undef  DEBUG
 /*
 * There's a lot more which can be done with clocks, including cpufreq
@@ -41,7 +39,9 @@
 */
 struct clk {
-        const char      *name;
+        const char      *name;          /* unique clock name */
+        const char      *function;      /* function of the clock */
+        struct device   *dev;           /* device associated with function */
        unsigned long   rate_hz;
        struct clk      *parent;
        u32             pmc_mask;
@@ -71,15 +71,14 @@ static struct clk clk32k = {
 };
 static struct clk main_clk = {
        .name           = "main",
-        .pmc_mask       = 1 << 0,       /* in PMC_SR */
+        .pmc_mask       = AT91_PMC_MOSCS,       /* in PMC_SR */
-        .users          = 1,
        .id             = 1,
        .primary        = 1,
 };
 static struct clk plla = {
        .name           = "plla",
        .parent         = &main_clk,
-        .pmc_mask       = 1 << 1,       /* in PMC_SR */
+        .pmc_mask       = AT91_PMC_LOCKA,       /* in PMC_SR */
        .id             = 2,
        .primary        = 1,
        .pll            = 1,
@@ -105,7 +104,7 @@ static void pllb_mode(struct clk *clk, int is_on)
 static struct clk pllb = {
        .name           = "pllb",
        .parent         = &main_clk,
-        .pmc_mask       = 1 << 2,       /* in PMC_SR */
+        .pmc_mask       = AT91_PMC_LOCKB,       /* in PMC_SR */
        .mode           = pllb_mode,
        .id             = 3,
        .primary        = 1,
@@ -177,8 +176,7 @@ static struct clk pck3 = {
 */
 static struct clk mck = {
        .name           = "mck",
-        .pmc_mask       = 1 << 3,       /* in PMC_SR */
+        .pmc_mask       = AT91_PMC_MCKRDY,      /* in PMC_SR */
-        .users          = 1,            /* (must be) always on */
 };
 static void pmc_periph_mode(struct clk *clk, int is_on)
@@ -249,6 +247,30 @@ static struct clk spi_clk = {
        .pmc_mask       = 1 << AT91_ID_SPI,
        .mode           = pmc_periph_mode,
 };
+static struct clk pioA_clk = {
+        .name           = "pioA_clk",
+        .parent         = &mck,
+        .pmc_mask       = 1 << AT91_ID_PIOA,
+        .mode           = pmc_periph_mode,
+};
+static struct clk pioB_clk = {
+        .name           = "pioB_clk",
+        .parent         = &mck,
+        .pmc_mask       = 1 << AT91_ID_PIOB,
+        .mode           = pmc_periph_mode,
+};
+static struct clk pioC_clk = {
+        .name           = "pioC_clk",
+        .parent         = &mck,
+        .pmc_mask       = 1 << AT91_ID_PIOC,
+        .mode           = pmc_periph_mode,
+};
+static struct clk pioD_clk = {
+        .name           = "pioD_clk",
+        .parent         = &mck,
+        .pmc_mask       = 1 << AT91_ID_PIOD,
+        .mode           = pmc_periph_mode,
+};
 static struct clk *const clock_list[] = {
        /* four primary clocks -- MUST BE FIRST! */
@@ -279,21 +301,46 @@ static struct clk *const clock_list[] = {
        &udc_clk,
        &twi_clk,
        &spi_clk,
+        &pioA_clk,
+        &pioB_clk,
+        &pioC_clk,
+        &pioD_clk,
        // ssc0..ssc2
        // tc0..tc5
+        // irq0..irq6
        &ohci_clk,
        &ether_clk,
 };
+/*
+ * Associate a particular clock with a function (eg, "uart") and device.
+ * The drivers can then request the same 'function' with several different
+ * devices and not care about which clock name to use.
+ */
+void __init at91_clock_associate(const char *id, struct device *dev, const char *func)
+{
+        struct clk *clk = clk_get(NULL, id);
+        if (!dev || !clk || !IS_ERR(clk_get(dev, func)))
+                return;
+        clk->function = func;
+        clk->dev = dev;
+}
 /* clocks are all static for now; no refcounting necessary */
 struct clk *clk_get(struct device *dev, const char *id)
 {
        int i;
        for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
-                if (strcmp(id, clock_list[i]->name) == 0)
+                struct clk *clk = clock_list[i];
-                        return clock_list[i];
+                if (strcmp(id, clk->name) == 0)
+                        return clk;
+                if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
+                        return clk;
        }
        return ERR_PTR(-ENOENT);
@@ -593,6 +640,30 @@ fail:
        return 0;
 }
+/*
+ * Several unused clocks may be active.  Turn them off.
+ */
+static void at91_periphclk_reset(void)
+{
+        unsigned long reg;
+        int i;
+        reg = at91_sys_read(AT91_PMC_PCSR);
+        for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
+                struct clk      *clk = clock_list[i];
+                if (clk->mode != pmc_periph_mode)
+                        continue;
+                if (clk->users > 0)
+                        reg &= ~clk->pmc_mask;
+        }
+        at91_sys_write(AT91_PMC_PCDR, reg);
+}
 int __init at91_clock_init(unsigned long main_clock)
 {
        unsigned tmp, freq, mckr;
@@ -626,7 +697,6 @@ int __init at91_clock_init(unsigned long main_clock)
         */
        at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
        pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
-        at91_sys_write(AT91_PMC_PCDR, (1 << AT91_ID_UHP) | (1 << AT91_ID_UDP));
        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP);
        at91_sys_write(AT91_CKGR_PLLBR, 0);
        at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
@@ -640,19 +710,18 @@ int __init at91_clock_init(unsigned long main_clock)
         */
        mckr = at91_sys_read(AT91_PMC_MCKR);
        mck.parent = clock_list[mckr & AT91_PMC_CSS];
-        mck.parent->users++;
        freq = mck.parent->rate_hz;
        freq /= (1 << ((mckr >> 2) & 3));               /* prescale */
        mck.rate_hz = freq / (1 + ((mckr >> 8) & 3));   /* mdiv */
+        /* MCK and CPU clock are "always on" */
+        clk_enable(&mck);
        printk("Clocks: CPU %u MHz, master %u MHz, main %u.%03u MHz\n",
                freq / 1000000, (unsigned) mck.rate_hz / 1000000,
                (unsigned) main_clock / 1000000,
                ((unsigned) main_clock % 1000000) / 1000);
-        /* FIXME get rid of master_clock global */
-        at91_master_clock = mck.rate_hz;
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
        /* establish PCK0..PCK3 parentage */
        for (tmp = 0; tmp < ARRAY_SIZE(clock_list); tmp++) {
@@ -663,19 +732,28 @@ int __init at91_clock_init(unsigned long main_clock)
                        continue;
                pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
-                parent = clock_list[pckr & 3];
+                parent = clock_list[pckr & AT91_PMC_CSS];
                clk->parent = parent;
                clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
+                if (clk->users == 0) {
+                        /* not being used, so switch it off */
+                        at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
+                }
        }
 #else
-        /* disable unused clocks */
+        /* disable all programmable clocks */
        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3);
-#endif  /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
+#endif
-        /* FIXME several unused clocks may still be active...  provide
+        /* enable the PIO clocks */
-         * a CONFIG option to turn off all unused clocks at some point
+        clk_enable(&pioA_clk);
-         * before driver init starts.
+        clk_enable(&pioB_clk);
-         */
+        clk_enable(&pioC_clk);
+        clk_enable(&pioD_clk);
+        /* disable all other unused peripheral clocks */
+        at91_periphclk_reset();
        return 0;
 }
diff --git a/arch/arm/mach-at91rm9200/common.c b/arch/arm/mach-at91rm9200/common.c
index 3848fd2d5596..e836f8537a1d 100644
--- a/arch/arm/mach-at91rm9200/common.c
+++ b/arch/arm/mach-at91rm9200/common.c
@@ -16,7 +16,8 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
+#include "generic.h"
 static struct map_desc at91rm9200_io_desc[] __initdata = {
        {
@@ -94,6 +95,11 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
                .pfn            = __phys_to_pfn(AT91_BASE_TCB0),
                .length         = SZ_16K,
                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_SRAM_VIRT_BASE,
+                .pfn            = __phys_to_pfn(AT91_SRAM_BASE),
+                .length         = AT91_SRAM_SIZE,
+                .type           = MT_DEVICE,
        },
 };
@@ -102,14 +108,3 @@ void __init at91rm9200_map_io(void)
        iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
 }
-unsigned long at91_master_clock;
-EXPORT_SYMBOL(at91_master_clock);
-int at91_serial_map[AT91_NR_UART];
-int at91_console_port;
-EXPORT_SYMBOL(at91_serial_map);
-EXPORT_SYMBOL(at91_console_port);
diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/devices.c
index bfe47bd6e50c..1cf85d231baa 100644
--- a/arch/arm/mach-at91rm9200/devices.c
+++ b/arch/arm/mach-at91rm9200/devices.c
@@ -16,9 +16,15 @@
 #include <linux/config.h>
 #include <linux/platform_device.h>
+#include <asm/hardware.h>
 #include <asm/arch/board.h>
-#include <asm/arch/pio.h>
+#include <asm/arch/gpio.h>
+#include "generic.h"
+#define SZ_512  0x00000200
+#define SZ_256  0x00000100
+#define SZ_16   0x00000010
 /* --------------------------------------------------------------------
 *  USB Host
@@ -28,7 +34,7 @@
 static u64 ohci_dmamask = 0xffffffffUL;
 static struct at91_usbh_data usbh_data;
-static struct resource at91_usbh_resource[] = {
+static struct resource at91_usbh_resources[] = {
        [0] = {
                .start  = AT91_UHP_BASE,
                .end    = AT91_UHP_BASE + SZ_1M - 1,
@@ -42,15 +48,15 @@ static struct resource at91_usbh_resource[] = {
 };
 static struct platform_device at91rm9200_usbh_device = {
-        .name           = "at91rm9200-ohci",
+        .name           = "at91_ohci",
        .id             = -1,
        .dev            = {
                                .dma_mask               = &ohci_dmamask,
                                .coherent_dma_mask      = 0xffffffff,
                                .platform_data          = &usbh_data,
        },
-        .resource       = at91_usbh_resource,
+        .resource       = at91_usbh_resources,
-        .num_resources  = ARRAY_SIZE(at91_usbh_resource),
+        .num_resources  = ARRAY_SIZE(at91_usbh_resources),
 };
 void __init at91_add_device_usbh(struct at91_usbh_data *data)
@@ -74,11 +80,16 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
 static struct at91_udc_data udc_data;
 static struct resource at91_udc_resources[] = {
-        {
+        [0] = {
                .start  = AT91_BASE_UDP,
                .end    = AT91_BASE_UDP + SZ_16K - 1,
                .flags  = IORESOURCE_MEM,
-        }
+        },
+        [1] = {
+                .start  = AT91_ID_UDP,
+                .end    = AT91_ID_UDP,
+                .flags  = IORESOURCE_IRQ,
+        },
 };
 static struct platform_device at91rm9200_udc_device = {
@@ -100,10 +111,8 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
                at91_set_gpio_input(data->vbus_pin, 0);
                at91_set_deglitch(data->vbus_pin, 1);
        }
-        if (data->pullup_pin) {
+        if (data->pullup_pin)
                at91_set_gpio_output(data->pullup_pin, 0);
-                at91_set_multi_drive(data->pullup_pin, 1);
-        }
        udc_data = *data;
        platform_device_register(&at91rm9200_udc_device);
@@ -197,7 +206,7 @@ static struct at91_cf_data cf_data;
 static struct resource at91_cf_resources[] = {
        [0] = {
                .start  = AT91_CF_BASE,
-                /* ties up CS4, CS5, and CS6 */
+                /* ties up CS4, CS5 and CS6 */
                .end    = AT91_CF_BASE + (0x30000000 - 1),
                .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
        },
@@ -231,6 +240,12 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
                at91_set_gpio_output(data->vcc_pin, 0);
        at91_set_gpio_output(data->rst_pin, 0);
+        /* force poweron defaults for these pins ... */
+        at91_set_A_periph(AT91_PIN_PC9, 0);     /* A25/CFRNW */
+        at91_set_A_periph(AT91_PIN_PC10, 0);    /* NCS4/CFCS */
+        at91_set_A_periph(AT91_PIN_PC11, 0);    /* NCS5/CFCE1 */
+        at91_set_A_periph(AT91_PIN_PC12, 0);    /* NCS6/CFCE2 */
        cf_data = *data;
        platform_device_register(&at91rm9200_cf_device);
 }
@@ -319,6 +334,7 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
 void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
 #endif
 /* --------------------------------------------------------------------
 *  NAND / SmartMedia
 * -------------------------------------------------------------------- */
@@ -400,22 +416,110 @@ void __init at91_add_device_i2c(void) {}
 /* --------------------------------------------------------------------
+ *  SPI
+ * -------------------------------------------------------------------- */
+#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
+static u64 spi_dmamask = 0xffffffffUL;
+static struct resource at91_spi_resources[] = {
+        [0] = {
+                .start  = AT91_BASE_SPI,
+                .end    = AT91_BASE_SPI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_SPI,
+                .end    = AT91_ID_SPI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device at91rm9200_spi_device = {
+        .name           = "at91_spi",
+        .id             = 0,
+        .dev            = {
+                .dma_mask               = &spi_dmamask,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .resource       = at91_spi_resources,
+        .num_resources  = ARRAY_SIZE(at91_spi_resources),
+};
+static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
+{
+        int i;
+        unsigned long cs_pin;
+        at91_set_A_periph(AT91_PIN_PA0, 0);     /* MISO */
+        at91_set_A_periph(AT91_PIN_PA1, 0);     /* MOSI */
+        at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPCK */
+        /* Enable SPI chip-selects */
+        for (i = 0; i < nr_devices; i++) {
+                if (devices[i].controller_data)
+                        cs_pin = (unsigned long) devices[i].controller_data;
+                else
+                        cs_pin = at91_spi_standard_cs[devices[i].chip_select];
+#ifdef CONFIG_SPI_AT91_MANUAL_CS
+                at91_set_gpio_output(cs_pin, 1);
+#else
+                at91_set_A_periph(cs_pin, 0);
+#endif
+                /* pass chip-select pin to driver */
+                devices[i].controller_data = (void *) cs_pin;
+        }
+        spi_register_board_info(devices, nr_devices);
+        at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi");
+        platform_device_register(&at91rm9200_spi_device);
+}
+#else
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
+#endif
+/* --------------------------------------------------------------------
 *  RTC
 * -------------------------------------------------------------------- */
-#if defined(CONFIG_AT91_RTC) || defined(CONFIG_AT91_RTC_MODULE)
+#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE)
 static struct platform_device at91rm9200_rtc_device = {
        .name           = "at91_rtc",
        .id             = -1,
        .num_resources  = 0,
 };
-void __init at91_add_device_rtc(void)
+static void __init at91_add_device_rtc(void)
 {
        platform_device_register(&at91rm9200_rtc_device);
 }
 #else
-void __init at91_add_device_rtc(void) {}
+static void __init at91_add_device_rtc(void) {}
+#endif
+/* --------------------------------------------------------------------
+ *  Watchdog
+ * -------------------------------------------------------------------- */
+#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE)
+static struct platform_device at91rm9200_wdt_device = {
+        .name           = "at91_wdt",
+        .id             = -1,
+        .num_resources  = 0,
+};
+static void __init at91_add_device_watchdog(void)
+{
+        platform_device_register(&at91rm9200_wdt_device);
+}
+#else
+static void __init at91_add_device_watchdog(void) {}
 #endif
@@ -429,13 +533,281 @@ u8 at91_leds_timer;
 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
 {
-        at91_leds_cpu   = cpu_led;
+        at91_leds_cpu   = cpu_led;
-        at91_leds_timer = timer_led;
+        at91_leds_timer = timer_led;
 }
 #else
 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
 #endif
+/* --------------------------------------------------------------------
+ *  UART
+ * -------------------------------------------------------------------- */
+#if defined(CONFIG_SERIAL_AT91)
+static struct resource dbgu_resources[] = {
+        [0] = {
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct at91_uart_data dbgu_data = {
+        .use_dma_tx     = 0,
+        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+};
+static struct platform_device at91rm9200_dbgu_device = {
+        .name           = "at91_usart",
+        .id             = 0,
+        .dev            = {
+                                .platform_data  = &dbgu_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = dbgu_resources,
+        .num_resources  = ARRAY_SIZE(dbgu_resources),
+};
+static inline void configure_dbgu_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PA30, 0);            /* DRXD */
+        at91_set_A_periph(AT91_PIN_PA31, 1);            /* DTXD */
+}
+static struct resource uart0_resources[] = {
+        [0] = {
+                .start  = AT91_BASE_US0,
+                .end    = AT91_BASE_US0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_US0,
+                .end    = AT91_ID_US0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct at91_uart_data uart0_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+static struct platform_device at91rm9200_uart0_device = {
+        .name           = "at91_usart",
+        .id             = 1,
+        .dev            = {
+                                .platform_data  = &uart0_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart0_resources,
+        .num_resources  = ARRAY_SIZE(uart0_resources),
+};
+static inline void configure_usart0_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PA17, 1);            /* TXD0 */
+        at91_set_A_periph(AT91_PIN_PA18, 0);            /* RXD0 */
+        at91_set_A_periph(AT91_PIN_PA20, 0);            /* CTS0 */
+        /*
+         * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
+         *  We need to drive the pin manually.  Default is off (RTS is active low).
+         */
+        at91_set_gpio_output(AT91_PIN_PA21, 1);
+}
+static struct resource uart1_resources[] = {
+        [0] = {
+                .start  = AT91_BASE_US1,
+                .end    = AT91_BASE_US1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_US1,
+                .end    = AT91_ID_US1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct at91_uart_data uart1_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+static struct platform_device at91rm9200_uart1_device = {
+        .name           = "at91_usart",
+        .id             = 2,
+        .dev            = {
+                                .platform_data  = &uart1_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart1_resources,
+        .num_resources  = ARRAY_SIZE(uart1_resources),
+};
+static inline void configure_usart1_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PB18, 0);            /* RI1 */
+        at91_set_A_periph(AT91_PIN_PB19, 0);            /* DTR1 */
+        at91_set_A_periph(AT91_PIN_PB20, 1);            /* TXD1 */
+        at91_set_A_periph(AT91_PIN_PB21, 0);            /* RXD1 */
+        at91_set_A_periph(AT91_PIN_PB23, 0);            /* DCD1 */
+        at91_set_A_periph(AT91_PIN_PB24, 0);            /* CTS1 */
+        at91_set_A_periph(AT91_PIN_PB25, 0);            /* DSR1 */
+        at91_set_A_periph(AT91_PIN_PB26, 0);            /* RTS1 */
+}
+static struct resource uart2_resources[] = {
+        [0] = {
+                .start  = AT91_BASE_US2,
+                .end    = AT91_BASE_US2 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_US2,
+                .end    = AT91_ID_US2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct at91_uart_data uart2_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+static struct platform_device at91rm9200_uart2_device = {
+        .name           = "at91_usart",
+        .id             = 3,
+        .dev            = {
+                                .platform_data  = &uart2_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart2_resources,
+        .num_resources  = ARRAY_SIZE(uart2_resources),
+};
+static inline void configure_usart2_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PA22, 0);            /* RXD2 */
+        at91_set_A_periph(AT91_PIN_PA23, 1);            /* TXD2 */
+}
+static struct resource uart3_resources[] = {
+        [0] = {
+                .start  = AT91_BASE_US3,
+                .end    = AT91_BASE_US3 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_US3,
+                .end    = AT91_ID_US3,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct at91_uart_data uart3_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+static struct platform_device at91rm9200_uart3_device = {
+        .name           = "at91_usart",
+        .id             = 4,
+        .dev            = {
+                                .platform_data  = &uart3_data,
+                                .coherent_dma_mask = 0xffffffff,
+        },
+        .resource       = uart3_resources,
+        .num_resources  = ARRAY_SIZE(uart3_resources),
+};
+static inline void configure_usart3_pins(void)
+{
+        at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
+        at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
+}
+struct platform_device *at91_uarts[AT91_NR_UART];       /* the UARTs to use */
+struct platform_device *at91_default_console_device;    /* the serial console device */
+void __init at91_init_serial(struct at91_uart_config *config)
+{
+        int i;
+        /* Fill in list of supported UARTs */
+        for (i = 0; i < config->nr_tty; i++) {
+                switch (config->tty_map[i]) {
+                        case 0:
+                                configure_usart0_pins();
+                                at91_uarts[i] = &at91rm9200_uart0_device;
+                                at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
+                                break;
+                        case 1:
+                                configure_usart1_pins();
+                                at91_uarts[i] = &at91rm9200_uart1_device;
+                                at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
+                                break;
+                        case 2:
+                                configure_usart2_pins();
+                                at91_uarts[i] = &at91rm9200_uart2_device;
+                                at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
+                                break;
+                        case 3:
+                                configure_usart3_pins();
+                                at91_uarts[i] = &at91rm9200_uart3_device;
+                                at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
+                                break;
+                        case 4:
+                                configure_dbgu_pins();
+                                at91_uarts[i] = &at91rm9200_dbgu_device;
+                                at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
+                                break;
+                        default:
+                                continue;
+                }
+                at91_uarts[i]->id = i;          /* update ID number to mapped ID */
+        }
+        /* Set serial console device */
+        if (config->console_tty < AT91_NR_UART)
+                at91_default_console_device = at91_uarts[config->console_tty];
+        if (!at91_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+void __init at91_add_device_serial(void)
+{
+        int i;
+        for (i = 0; i < AT91_NR_UART; i++) {
+                if (at91_uarts[i])
+                        platform_device_register(at91_uarts[i]);
+        }
+}
+#else
+void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_add_device_serial(void) {}
+#endif
 /* -------------------------------------------------------------------- */
+/*
+ * These devices are always present and don't need any board-specific
+ * setup.
+ */
+static int __init at91_add_standard_devices(void)
+{
+        at91_add_device_rtc();
+        at91_add_device_watchdog();
+        return 0;
+}
+arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index 9bd541eba0a0..f0d969d7d874 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -16,3 +16,10 @@ extern struct sys_timer at91rm9200_timer;
 extern void __init at91rm9200_map_io(void);
 extern int __init at91_clock_init(unsigned long main_clock);
+struct device;
+extern void __init at91_clock_associate(const char *id, struct device *dev, const char *func);
+ /* Power Management */
+extern void at91_irq_suspend(void);
+extern void at91_irq_resume(void);
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index 5ab46274e1a3..83c34747087b 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -16,7 +16,7 @@
 #include <asm/io.h>
 #include <asm/mach/irq.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/arch/gpio.h>
 static const u32 pio_controller_offset[4] = {
@@ -213,6 +213,84 @@ EXPORT_SYMBOL(at91_get_gpio_value);
 /*--------------------------------------------------------------------------*/
+#ifdef CONFIG_PM
+static u32 wakeups[BGA_GPIO_BANKS];
+static u32 backups[BGA_GPIO_BANKS];
+static int gpio_irq_set_wake(unsigned pin, unsigned state)
+{
+        unsigned        mask = pin_to_mask(pin);
+        pin -= PIN_BASE;
+        pin /= 32;
+        if (unlikely(pin >= BGA_GPIO_BANKS))
+                return -EINVAL;
+        if (state)
+                wakeups[pin] |= mask;
+        else
+                wakeups[pin] &= ~mask;
+        return 0;
+}
+void at91_gpio_suspend(void)
+{
+        int i;
+        for (i = 0; i < BGA_GPIO_BANKS; i++) {
+                u32 pio = pio_controller_offset[i];
+                /*
+                 * Note: drivers should have disabled GPIO interrupts that
+                 * aren't supposed to be wakeup sources.
+                 * But that is not much good on ARM.....  disable_irq() does
+                 * not update the hardware immediately, so the hardware mask
+                 * (IMR) has the wrong value (not current, too much is
+                 * permitted).
+                 *
+                 * Our workaround is to disable all non-wakeup IRQs ...
+                 * which is exactly what correct drivers asked for in the
+                 * first place!
+                 */
+                backups[i] = at91_sys_read(pio + PIO_IMR);
+                at91_sys_write(pio_controller_offset[i] + PIO_IDR, backups[i]);
+                at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);
+                if (!wakeups[i]) {
+                        disable_irq_wake(AT91_ID_PIOA + i);
+                        at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i));
+                } else {
+                        enable_irq_wake(AT91_ID_PIOA + i);
+#ifdef CONFIG_PM_DEBUG
+                        printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
+#endif
+                }
+        }
+}
+void at91_gpio_resume(void)
+{
+        int i;
+        for (i = 0; i < BGA_GPIO_BANKS; i++) {
+                at91_sys_write(pio_controller_offset[i] + PIO_IDR, wakeups[i]);
+                at91_sys_write(pio_controller_offset[i] + PIO_IER, backups[i]);
+        }
+        at91_sys_write(AT91_PMC_PCER,
+                          (1 << AT91_ID_PIOA)
+                        | (1 << AT91_ID_PIOB)
+                        | (1 << AT91_ID_PIOC)
+                        | (1 << AT91_ID_PIOD));
+}
+#else
+#define gpio_irq_set_wake       NULL
+#endif
 /* Several AIC controller irqs are dispatched through this GPIO handler.
 * To use any AT91_PIN_* as an externally triggered IRQ, first call
@@ -252,6 +330,7 @@ static struct irqchip gpio_irqchip = {
        .mask           = gpio_irq_mask,
        .unmask         = gpio_irq_unmask,
        .set_type       = gpio_irq_type,
+        .set_wake       = gpio_irq_set_wake,
 };
 static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs *regs)
@@ -266,6 +345,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
        /* temporarily mask (level sensitive) parent IRQ */
        desc->chip->ack(irq);
        for (;;) {
+                /* reading ISR acks the pending (edge triggered) GPIO interrupt */
                isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR);
                if (!isr)
                        break;
@@ -315,15 +395,16 @@ void __init at91_gpio_irq_setup(unsigned banks)
                set_irq_chipdata(id, controller);
                for (i = 0; i < 32; i++, pin++) {
+                        /*
+                         * Can use the "simple" and not "edge" handler since it's
+                         * shorter, and the AIC handles interupts sanely.
+                         */
                        set_irq_chip(pin, &gpio_irqchip);
                        set_irq_handler(pin, do_simple_IRQ);
                        set_irq_flags(pin, IRQF_VALID);
                }
                set_irq_chained_handler(id, gpio_irq_handler);
-                /* enable the PIO peripheral clock */
-                at91_sys_write(AT91_PMC_PCER, 1 << id);
        }
        pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks);
 }
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index cb62bc83a1dd..70f4d7ac1533 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -92,10 +92,6 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type)
 {
        unsigned int smr, srctype;
-        /* change triggering only for FIQ and external IRQ0..IRQ6 */
-        if ((irq < AT91_ID_IRQ0) && (irq != AT91_ID_FIQ))
-                return -EINVAL;
        switch (type) {
        case IRQT_HIGH:
                srctype = AT91_AIC_SRCTYPE_HIGH;
@@ -104,9 +100,13 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type)
                srctype = AT91_AIC_SRCTYPE_RISING;
                break;
        case IRQT_LOW:
+                if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0))        /* only supported on external interrupts */
+                        return -EINVAL;
                srctype = AT91_AIC_SRCTYPE_LOW;
                break;
        case IRQT_FALLING:
+                if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0))        /* only supported on external interrupts */
+                        return -EINVAL;
                srctype = AT91_AIC_SRCTYPE_FALLING;
                break;
        default:
@@ -118,11 +118,47 @@ static int at91rm9200_irq_type(unsigned irq, unsigned type)
        return 0;
 }
+#ifdef CONFIG_PM
+static u32 wakeups;
+static u32 backups;
+static int at91rm9200_irq_set_wake(unsigned irq, unsigned value)
+{
+        if (unlikely(irq >= 32))
+                return -EINVAL;
+        if (value)
+                wakeups |= (1 << irq);
+        else
+                wakeups &= ~(1 << irq);
+        return 0;
+}
+void at91_irq_suspend(void)
+{
+        backups = at91_sys_read(AT91_AIC_IMR);
+        at91_sys_write(AT91_AIC_IDCR, backups);
+        at91_sys_write(AT91_AIC_IECR, wakeups);
+}
+void at91_irq_resume(void)
+{
+        at91_sys_write(AT91_AIC_IDCR, wakeups);
+        at91_sys_write(AT91_AIC_IECR, backups);
+}
+#else
+#define at91rm9200_irq_set_wake NULL
+#endif
 static struct irqchip at91rm9200_irq_chip = {
        .ack            = at91rm9200_mask_irq,
        .mask           = at91rm9200_mask_irq,
        .unmask         = at91rm9200_unmask_irq,
        .set_type       = at91rm9200_irq_type,
+        .set_wake       = at91rm9200_irq_set_wake,
 };
 /*
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
new file mode 100644
index 000000000000..47e5480feb7e
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -0,0 +1,225 @@
+/*
+ * arch/arm/mach-at91rm9200/pm.c
+ * AT91 Power Management
+ *
+ * Copyright (C) 2005 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/pm.h>
+#include <linux/sched.h>
+#include <linux/proc_fs.h>
+#include <linux/pm.h>
+#include <linux/interrupt.h>
+#include <linux/sysfs.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/atomic.h>
+#include <asm/mach/time.h>
+#include <asm/mach/irq.h>
+#include <asm/mach-types.h>
+#include <asm/arch/gpio.h>
+#include "generic.h"
+static int at91_pm_valid_state(suspend_state_t state)
+{
+        switch (state) {
+                case PM_SUSPEND_ON:
+                case PM_SUSPEND_STANDBY:
+                case PM_SUSPEND_MEM:
+                        return 1;
+                default:
+                        return 0;
+        }
+}
+static suspend_state_t target_state;
+/*
+ * Called after processes are frozen, but before we shutdown devices.
+ */
+static int at91_pm_prepare(suspend_state_t state)
+{
+        target_state = state;
+        return 0;
+}
+/*
+ * Verify that all the clocks are correct before entering
+ * slow-clock mode.
+ */
+static int at91_pm_verify_clocks(void)
+{
+        unsigned long scsr;
+        int i;
+        scsr = at91_sys_read(AT91_PMC_SCSR);
+        /* USB must not be using PLLB */
+        if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) {
+                pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
+                return 0;
+        }
+#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
+        /* PCK0..PCK3 must be disabled, or configured to use clk32k */
+        for (i = 0; i < 4; i++) {
+                u32 css;
+                if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
+                        continue;
+                css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
+                if (css != AT91_PMC_CSS_SLOW) {
+                        pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
+                        return 0;
+                }
+        }
+#endif
+        return 1;
+}
+/*
+ * Call this from platform driver suspend() to see how deeply to suspend.
+ * For example, some controllers (like OHCI) need one of the PLL clocks
+ * in order to act as a wakeup source, and those are not available when
+ * going into slow clock mode.
+ *
+ * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
+ * the very same problem (but not using at91 main_clk), and it'd be better
+ * to add one generic API rather than lots of platform-specific ones.
+ */
+int at91_suspend_entering_slow_clock(void)
+{
+        return (target_state == PM_SUSPEND_MEM);
+}
+EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
+static void (*slow_clock)(void);
+static int at91_pm_enter(suspend_state_t state)
+{
+        at91_gpio_suspend();
+        at91_irq_suspend();
+        pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
+                        /* remember all the always-wake irqs */
+                        (at91_sys_read(AT91_PMC_PCSR)
+                                        | (1 << AT91_ID_FIQ)
+                                        | (1 << AT91_ID_SYS)
+                                        | (1 << AT91_ID_IRQ0)
+                                        | (1 << AT91_ID_IRQ1)
+                                        | (1 << AT91_ID_IRQ2)
+                                        | (1 << AT91_ID_IRQ3)
+                                        | (1 << AT91_ID_IRQ4)
+                                        | (1 << AT91_ID_IRQ5)
+                                        | (1 << AT91_ID_IRQ6))
+                                & at91_sys_read(AT91_AIC_IMR),
+                        state);
+        switch (state) {
+                /*
+                 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
+                 * drivers must suspend more deeply:  only the master clock
+                 * controller may be using the main oscillator.
+                 */
+                case PM_SUSPEND_MEM:
+                        /*
+                         * Ensure that clocks are in a valid state.
+                         */
+                        if (!at91_pm_verify_clocks())
+                                goto error;
+                        /*
+                         * Enter slow clock mode by switching over to clk32k and
+                         * turning off the main oscillator; reverse on wakeup.
+                         */
+                        if (slow_clock) {
+                                slow_clock();
+                                break;
+                        } else {
+                                /* DEVELOPMENT ONLY */
+                                pr_info("AT91: PM - no slow clock mode yet ...\n");
+                                /* FALLTHROUGH leaving master clock alone */
+                        }
+                /*
+                 * STANDBY mode has *all* drivers suspended; ignores irqs not
+                 * marked as 'wakeup' event sources; and reduces DRAM power.
+                 * But otherwise it's identical to PM_SUSPEND_ON:  cpu idle, and
+                 * nothing fancy done with main or cpu clocks.
+                 */
+                case PM_SUSPEND_STANDBY:
+                        /*
+                         * NOTE: the Wait-for-Interrupt instruction needs to be
+                         * in icache so the SDRAM stays in self-refresh mode until
+                         * the wakeup IRQ occurs.
+                         */
+                        asm("b 1f; .align 5; 1:");
+                        asm("mcr p15, 0, r0, c7, c10, 4");      /* drain write buffer */
+                        at91_sys_write(AT91_SDRAMC_SRR, 1);     /* self-refresh mode */
+                        /* fall though to next state */
+                case PM_SUSPEND_ON:
+                        asm("mcr p15, 0, r0, c7, c0, 4");       /* wait for interrupt */
+                        break;
+                default:
+                        pr_debug("AT91: PM - bogus suspend state %d\n", state);
+                        goto error;
+        }
+        pr_debug("AT91: PM - wakeup %08x\n",
+                        at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
+error:
+        target_state = PM_SUSPEND_ON;
+        at91_irq_resume();
+        at91_gpio_resume();
+        return 0;
+}
+static struct pm_ops at91_pm_ops ={
+        .pm_disk_mode   = 0,
+        .valid          = at91_pm_valid_state,
+        .prepare        = at91_pm_prepare,
+        .enter          = at91_pm_enter,
+};
+static int __init at91_pm_init(void)
+{
+        printk("AT91: Power Management\n");
+#ifdef CONFIG_AT91_PM_SLOW_CLOCK
+        /* REVISIT allocations of SRAM should be dynamically managed.
+         * FIQ handlers and other components will want SRAM/TCM too...
+         */
+        slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
+        memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
+#endif
+        /* Disable SDRAM low-power mode.  Cannot be used with self-refresh. */
+        at91_sys_write(AT91_SDRAMC_LPR, 0);
+        pm_set_ops(&at91_pm_ops);
+        return 0;
+}
+arch_initcall(at91_pm_init);
diff --git a/arch/arm/mach-at91rm9200/time.c b/arch/arm/mach-at91rm9200/time.c
index 7ffcf443b99f..fc2d7d5e4637 100644
--- a/arch/arm/mach-at91rm9200/time.c
+++ b/arch/arm/mach-at91rm9200/time.c
@@ -31,6 +31,8 @@
 #include <asm/irq.h>
 #include <asm/mach/time.h>
+static unsigned long last_crtr;
 /*
 * The ST_CRTR is updated asynchronously to the master clock.  It is therefore
 *  necessary to read it twice (with the same value) to ensure accuracy.
@@ -56,7 +58,7 @@ static unsigned long at91rm9200_gettimeoffset(void)
 {
        unsigned long elapsed;
-        elapsed = (read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV;
+        elapsed = (read_CRTR() - last_crtr) & AT91_ST_ALMV;
        return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
 }
@@ -66,15 +68,12 @@ static unsigned long at91rm9200_gettimeoffset(void)
 */
 static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 {
-        unsigned long rtar;
        if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */
                write_seqlock(&xtime_lock);
-                while (((read_CRTR() - at91_sys_read(AT91_ST_RTAR)) & AT91_ST_ALMV) >= LATCH) {
+                while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) {
                        timer_tick(regs);
-                        rtar = (at91_sys_read(AT91_ST_RTAR) + LATCH) & AT91_ST_ALMV;
+                        last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV;
-                        at91_sys_write(AT91_ST_RTAR, rtar);
                }
                write_sequnlock(&xtime_lock);
@@ -87,10 +86,24 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_r
 static struct irqaction at91rm9200_timer_irq = {
        .name           = "at91_tick",
-        .flags          = SA_SHIRQ | SA_INTERRUPT,
+        .flags          = SA_SHIRQ | SA_INTERRUPT | SA_TIMER,
        .handler        = at91rm9200_timer_interrupt
 };
+void at91rm9200_timer_reset(void)
+{
+        last_crtr = 0;
+        /* Real time counter incremented every 30.51758 microseconds */
+        at91_sys_write(AT91_ST_RTMR, 1);
+        /* Set Period Interval timer */
+        at91_sys_write(AT91_ST_PIMR, LATCH);
+        /* Enable Period Interval Timer interrupt */
+        at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
+}
 /*
 * Set up timer interrupt.
 */
@@ -100,28 +113,30 @@ void __init at91rm9200_timer_init(void)
        at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
        (void) at91_sys_read(AT91_ST_SR);       /* Clear any pending interrupts */
-        /*
+        /* Make IRQs happen for the system timer */
-         * Make IRQs happen for the system timer.
-         */
        setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
-        /* Set initial alarm to 0 */
-        at91_sys_write(AT91_ST_RTAR, 0);
-        /* Real time counter incremented every 30.51758 microseconds */
-        at91_sys_write(AT91_ST_RTMR, 1);
-        /* Set Period Interval timer */
-        at91_sys_write(AT91_ST_PIMR, LATCH);
        /* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */
        tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE;
-        /* Enable Period Interval Timer interrupt */
+        /* Initialize and enable the timer interrupt */
-        at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
+        at91rm9200_timer_reset();
+}
+#ifdef CONFIG_PM
+static void at91rm9200_timer_suspend(void)
+{
+        /* disable Period Interval Timer interrupt */
+        at91_sys_write(AT91_ST_IDR, AT91_ST_PITS);
 }
+#else
+#define at91rm9200_timer_suspend        NULL
+#endif
 struct sys_timer at91rm9200_timer = {
        .init           = at91rm9200_timer_init,
        .offset         = at91rm9200_gettimeoffset,
+        .suspend        = at91rm9200_timer_suspend,
+        .resume         = at91rm9200_timer_reset,
 };
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 9be01b0c3f48..e24566b88a78 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -111,21 +111,21 @@ static void __init ts72xx_map_io(void)
        }
 }
-static unsigned char ts72xx_rtc_readb(unsigned long addr)
+static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
 {
        __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
        return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE);
 }
-static void ts72xx_rtc_writeb(unsigned char value, unsigned long addr)
+static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
 {
        __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
        __raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE);
 }
 static struct m48t86_ops ts72xx_rtc_ops = {
-        .readb                  = ts72xx_rtc_readb,
+        .readbyte               = ts72xx_rtc_readbyte,
-        .writeb                 = ts72xx_rtc_writeb,
+        .writebyte              = ts72xx_rtc_writebyte,
 };
 static struct platform_device ts72xx_rtc_device = {
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c
index eeb8a6d4a399..a5de5f1da9f2 100644
--- a/arch/arm/mach-imx/irq.c
+++ b/arch/arm/mach-imx/irq.c
@@ -127,7 +127,7 @@ static void
 imx_gpio_ack_irq(unsigned int irq)
 {
        DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq);
-        ISR(IRQ_TO_REG(irq)) |= 1 << ((irq - IRQ_GPIOA(0)) % 32);
+        ISR(IRQ_TO_REG(irq)) = 1 << ((irq - IRQ_GPIOA(0)) % 32);
 }
 static void
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a0724f2b24ce..9f55f5ae1044 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -232,8 +232,6 @@ static void __init intcp_init_irq(void)
        for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) {
                if (i == 11)
                        i = 22;
-                if (i == IRQ_CP_CPPLDINT)
-                        i++;
                if (i == 29)
                        break;
                set_irq_chip(i, &pic_chip);
@@ -259,8 +257,7 @@ static void __init intcp_init_irq(void)
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
-        set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
+        set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
-        pic_unmask_irq(IRQ_CP_CPPLDINT);
 }
 /*
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 092ee12ced42..affd1d5d7440 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -178,8 +178,12 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
 static void ixp23xx_irq_mask(unsigned int irq)
 {
-        volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+        volatile unsigned long *intr_reg;
+        if (irq >= 56)
+                irq += 8;
+        intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg &= ~(1 << (irq % 32));
 }
@@ -199,17 +203,25 @@ static void ixp23xx_irq_ack(unsigned int irq)
 */
 static void ixp23xx_irq_level_unmask(unsigned int irq)
 {
-        volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+        volatile unsigned long *intr_reg;
        ixp23xx_irq_ack(irq);
+        if (irq >= 56)
+                irq += 8;
+        intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg |= (1 << (irq % 32));
 }
 static void ixp23xx_irq_edge_unmask(unsigned int irq)
 {
-        volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+        volatile unsigned long *intr_reg;
+        if (irq >= 56)
+                irq += 8;
+        intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg |= (1 << (irq % 32));
 }
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 2a39f9e481ad..3b23f43cb160 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI
          2) If > 64MB of memory space is required, the IXP4xx can be 
             configured to use indirect registers to access PCI This allows 
             for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. 
-             The disadvantadge of this is that every PCI access requires 
+             The disadvantage of this is that every PCI access requires 
             three local register accesses plus a spinlock, but in some 
             cases the performance hit is acceptable. In addition, you cannot 
             mmap() PCI devices in this case due to the indirect nature
diff --git a/arch/arm/mach-lh7a40x/Kconfig b/arch/arm/mach-lh7a40x/Kconfig
index 8a17867a6a24..558a34f53b1c 100644
--- a/arch/arm/mach-lh7a40x/Kconfig
+++ b/arch/arm/mach-lh7a40x/Kconfig
@@ -14,6 +14,7 @@ config MACH_LPD7A400
        bool "LPD7A400 Card Engine"
        select ARCH_LH7A400
 #       select IDE_POLL
+        select HAS_TOUCHSCREEN_ADS7843_LH7
        help
          Say Y here if you are using Logic Product Development's
          LPD7A400 CardEngine.  For the time being, the LPD7A400 and
@@ -23,6 +24,7 @@ config MACH_LPD7A404
        bool "LPD7A404 Card Engine"
        select ARCH_LH7A404
 #       select IDE_POLL
+        select HAS_TOUCHSCREEN_ADC_LH7
        help
          Say Y here if you are using Logic Product Development's
          LPD7A404 CardEngine. For the time being, the LPD7A400 and
@@ -34,6 +36,9 @@ config ARCH_LH7A400
 config ARCH_LH7A404
        bool
+config LPD7A40X_CPLD_SSP
+        bool
 config LH7A40X_CONTIGMEM
        bool "Disable NUMA Support"
        depends on ARCH_LH7A40X
diff --git a/arch/arm/mach-lh7a40x/Makefile b/arch/arm/mach-lh7a40x/Makefile
index e90512dbc2d6..94b8615fb3c3 100644
--- a/arch/arm/mach-lh7a40x/Makefile
+++ b/arch/arm/mach-lh7a40x/Makefile
@@ -4,11 +4,14 @@
 # Object file lists.
-obj-y                   := time.o
+obj-y                           := time.o clocks.o
-obj-$(CONFIG_MACH_KEV7A400) += arch-kev7a400.o irq-lh7a400.o
+obj-m                           :=
-obj-$(CONFIG_MACH_LPD7A400) += arch-lpd7a40x.o irq-lh7a400.o
+obj-n                           :=
-obj-$(CONFIG_MACH_LPD7A404) += arch-lpd7a40x.o irq-lh7a404.o
+obj-                            :=
-obj-m                   :=
+obj-$(CONFIG_MACH_KEV7A400)     += arch-kev7a400.o irq-lh7a400.o
-obj-n                   :=
+obj-$(CONFIG_MACH_LPD7A400)     += arch-lpd7a40x.o irq-lh7a400.o
-obj-                    :=
+obj-$(CONFIG_MACH_LPD7A404)     += arch-lpd7a40x.o irq-lh7a404.o
+obj-$(CONFIG_LPD7A40X_CPLD_SSP) += ssp-cpld.o
+obj-$(CONFIG_FB_ARMCLCD)        += clcd.o
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index 12e23277c5ea..c0e6854289f1 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -23,6 +23,28 @@
 #include "common.h"
+#define CPLD_INT_NETHERNET      (1<<0)
+#define CPLD_INTMASK_ETHERNET   (1<<2)
+#if defined (CONFIG_MACH_LPD7A400)
+# define CPLD_INT_NTOUCH                (1<<1)
+# define CPLD_INTMASK_TOUCH     (1<<3)
+# define CPLD_INT_PEN           (1<<4)
+# define CPLD_INTMASK_PEN       (1<<4)
+# define CPLD_INT_PIRQ          (1<<4)
+#endif
+#define CPLD_INTMASK_CPLD       (1<<7)
+#define CPLD_INT_CPLD           (1<<6)
+#define CPLD_CONTROL_SWINT              (1<<7) /* Disable all CPLD IRQs */
+#define CPLD_CONTROL_OCMSK              (1<<6) /* Mask USB1 connect IRQ */
+#define CPLD_CONTROL_PDRV               (1<<5) /* PCC_nDRV high */
+#define CPLD_CONTROL_USB1C              (1<<4) /* USB1 connect IRQ active */
+#define CPLD_CONTROL_USB1P              (1<<3) /* USB1 power disable */
+#define CPLD_CONTROL_AWKP               (1<<2) /* Auto-wakeup disabled  */
+#define CPLD_CONTROL_LCD_ENABLE         (1<<1) /* LCD Vee enable */
+#define CPLD_CONTROL_WRLAN_NENABLE      (1<<0) /* SMC91x power disable */
 static struct resource smc91x_resources[] = {
        [0] = {
                .start  = CPLD00_PHYS,
@@ -48,12 +70,12 @@ static struct platform_device smc91x_device = {
 static struct resource lh7a40x_usbclient_resources[] = {
        [0] = {
                .start  = USB_PHYS,
-                .end    = (USB_PHYS + 0xFF),
+                .end    = (USB_PHYS + PAGE_SIZE),
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-                .start  = IRQ_USBINTR,
+                .start  = IRQ_USB,
-                .end    = IRQ_USBINTR,
+                .end    = IRQ_USB,
                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -61,7 +83,8 @@ static struct resource lh7a40x_usbclient_resources[] = {
 static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL;
 static struct platform_device lh7a40x_usbclient_device = {
-        .name           = "lh7a40x_udc",
+//      .name           = "lh7a40x_udc",
+        .name           = "lh7-udc",
        .id             = 0,
        .dev            = {
                .dma_mask = &lh7a40x_usbclient_dma_mask,
@@ -101,7 +124,7 @@ static struct platform_device lh7a404_usbhost_device = {
 #endif
-static struct platform_device *lpd7a40x_devs[] __initdata = {
+static struct platform_device* lpd7a40x_devs[] __initdata = {
        &smc91x_device,
        &lh7a40x_usbclient_device,
 #if defined (CONFIG_ARCH_LH7A404)
@@ -113,29 +136,52 @@ extern void lpd7a400_map_io (void);
 static void __init lpd7a40x_init (void)
 {
-        CPLD_CONTROL |=     (1<<6); /* Mask USB1 connection IRQ */
+#if defined (CONFIG_MACH_LPD7A400)
+        CPLD_CONTROL |= 0
+                | CPLD_CONTROL_SWINT /* Disable software interrupt */
+                | CPLD_CONTROL_OCMSK; /* Mask USB1 connection IRQ */
        CPLD_CONTROL &= ~(0
-                          | (1<<1) /* Disable LCD */
+                          | CPLD_CONTROL_LCD_ENABLE     /* Disable LCD */
-                          | (1<<0) /* Enable WLAN */
+                          | CPLD_CONTROL_WRLAN_NENABLE  /* Enable SMC91x */
                );
+#endif
+#if defined (CONFIG_MACH_LPD7A404)
+        CPLD_CONTROL &= ~(0
+                          | CPLD_CONTROL_WRLAN_NENABLE  /* Enable SMC91x */
+                );
+#endif
        platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs));
+#if defined (CONFIG_FB_ARMCLCD)
+        lh7a40x_clcd_init ();
+#endif
 }
 static void lh7a40x_ack_cpld_irq (u32 irq)
 {
-        /* CPLD doesn't have ack capability */
+        /* CPLD doesn't have ack capability, but some devices may */
+#if defined (CPLD_INTMASK_TOUCH)
+        /* The touch control *must* mask the the interrupt because the
+         * interrupt bit is read by the driver to determine if the pen
+         * is still down. */
+        if (irq == IRQ_TOUCH)
+                CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH;
+#endif
 }
 static void lh7a40x_mask_cpld_irq (u32 irq)
 {
        switch (irq) {
        case IRQ_LPD7A40X_ETH_INT:
-                CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4;
+                CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET;
                break;
-        case IRQ_LPD7A400_TS:
+#if defined (IRQ_TOUCH)
-                CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8;
+        case IRQ_TOUCH:
+                CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH;
                break;
+#endif
        }
 }
@@ -143,11 +189,13 @@ static void lh7a40x_unmask_cpld_irq (u32 irq)
 {
        switch (irq) {
        case IRQ_LPD7A40X_ETH_INT:
-                CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4;
+                CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET;
                break;
-        case IRQ_LPD7A400_TS:
+#if defined (IRQ_TOUCH)
-                CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8;
+        case IRQ_TOUCH:
+                CPLD_INTERRUPTS &= ~CPLD_INTMASK_TOUCH;
                break;
+#endif
        }
 }
@@ -164,11 +212,13 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc,
        desc->chip->ack (irq);
-        if ((mask & 0x1) == 0)  /* WLAN */
+        if ((mask & (1<<0)) == 0)       /* WLAN */
                IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT);
-        if ((mask & 0x2) == 0)  /* Touch */
+#if defined (IRQ_TOUCH)
-                IRQ_DISPATCH (IRQ_LPD7A400_TS);
+        if ((mask & (1<<1)) == 0)       /* Touch */
+                IRQ_DISPATCH (IRQ_TOUCH);
+#endif
        desc->chip->unmask (irq); /* Level-triggered need this */
 }
@@ -204,9 +254,21 @@ void __init lh7a40x_init_board_irq (void)
                /* Then, configure CPLD interrupt */
-        CPLD_INTERRUPTS =   0x9c; /* Disable all CPLD interrupts */
+                        /* Disable all CPLD interrupts */
+#if defined (CONFIG_MACH_LPD7A400)
+        CPLD_INTERRUPTS = CPLD_INTMASK_TOUCH | CPLD_INTMASK_PEN
+                | CPLD_INTMASK_ETHERNET;
+        /* *** FIXME: don't know why we need 7 and 4. 7 is way wrong
+               and 4 is uncefined. */
+        // (1<<7)|(1<<4)|(1<<3)|(1<<2);
+#endif
+#if defined (CONFIG_MACH_LPD7A404)
+        CPLD_INTERRUPTS = CPLD_INTMASK_ETHERNET;
+        /* *** FIXME: don't know why we need 6 and 5, neither is defined. */
+        // (1<<6)|(1<<5)|(1<<3);
+#endif
        GPIO_PFDD       &= ~(1 << pinCPLD); /* Make input */
-        GPIO_INTTYPE1   |=  (1 << pinCPLD); /* Edge triggered */
+        GPIO_INTTYPE1   &= ~(1 << pinCPLD); /* Level triggered */
        GPIO_INTTYPE2   &= ~(1 << pinCPLD); /* Active low */
        barrier ();
        GPIO_GPIOFINTEN |=  (1 << pinCPLD); /* Enable */
@@ -216,7 +278,7 @@ void __init lh7a40x_init_board_irq (void)
        for (irq = IRQ_BOARD_START;
             irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) {
                set_irq_chip (irq, &lpd7a40x_cpld_chip);
-                set_irq_handler (irq, do_edge_IRQ);
+                set_irq_handler (irq, do_level_IRQ);
                set_irq_flags (irq, IRQF_VALID);
        }
@@ -226,91 +288,109 @@ void __init lh7a40x_init_board_irq (void)
                                 lpd7a40x_cpld_handler);
 }
-static struct map_desc lpd7a400_io_desc[] __initdata = {
+static struct map_desc lpd7a40x_io_desc[] __initdata = {
        {
-                .virtual        =     IO_VIRT,
+                .virtual        = IO_VIRT,
                .pfn            = __phys_to_pfn(IO_PHYS),
-                .length         =           IO_SIZE,
+                .length         = IO_SIZE,
                .type           = MT_DEVICE
-        }, {    /* Mapping added to work around chip select problems */
+        },
+        {       /* Mapping added to work around chip select problems */
                .virtual        = IOBARRIER_VIRT,
                .pfn            = __phys_to_pfn(IOBARRIER_PHYS),
                .length         = IOBARRIER_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CF_VIRT,
                .pfn            = __phys_to_pfn(CF_PHYS),
-                .length         =       CF_SIZE,
+                .length         = CF_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD02_VIRT,
                .pfn            = __phys_to_pfn(CPLD02_PHYS),
-                .length         =       CPLD02_SIZE,
+                .length         = CPLD02_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD06_VIRT,
                .pfn            = __phys_to_pfn(CPLD06_PHYS),
-                .length         =       CPLD06_SIZE,
+                .length         = CPLD06_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
+                .virtual        = CPLD08_VIRT,
+                .pfn            = __phys_to_pfn(CPLD08_PHYS),
+                .length         = CPLD08_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD08_VIRT,
                .pfn            = __phys_to_pfn(CPLD08_PHYS),
-                .length         =       CPLD08_SIZE,
+                .length         = CPLD08_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
+                .virtual        = CPLD0A_VIRT,
+                .pfn            = __phys_to_pfn(CPLD0A_PHYS),
+                .length         = CPLD0A_SIZE,
+                .type           = MT_DEVICE
+        },
+        {
                .virtual        = CPLD0C_VIRT,
                .pfn            = __phys_to_pfn(CPLD0C_PHYS),
-                .length         =       CPLD0C_SIZE,
+                .length         = CPLD0C_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD0E_VIRT,
                .pfn            = __phys_to_pfn(CPLD0E_PHYS),
-                .length         =       CPLD0E_SIZE,
+                .length         = CPLD0E_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD10_VIRT,
                .pfn            = __phys_to_pfn(CPLD10_PHYS),
-                .length         =       CPLD10_SIZE,
+                .length         = CPLD10_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD12_VIRT,
                .pfn            = __phys_to_pfn(CPLD12_PHYS),
-                .length         =       CPLD12_SIZE,
+                .length         = CPLD12_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD14_VIRT,
                .pfn            = __phys_to_pfn(CPLD14_PHYS),
-                .length         =       CPLD14_SIZE,
+                .length         = CPLD14_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD16_VIRT,
                .pfn            = __phys_to_pfn(CPLD16_PHYS),
-                .length         =       CPLD16_SIZE,
+                .length         = CPLD16_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD18_VIRT,
                .pfn            = __phys_to_pfn(CPLD18_PHYS),
-                .length         =       CPLD18_SIZE,
+                .length         = CPLD18_SIZE,
                .type           = MT_DEVICE
-        }, {
+        },
+        {
                .virtual        = CPLD1A_VIRT,
                .pfn            = __phys_to_pfn(CPLD1A_PHYS),
-                .length         =       CPLD1A_SIZE,
+                .length         = CPLD1A_SIZE,
                .type           = MT_DEVICE
        },
-        /* This mapping is redundant since the smc driver performs another. */
-/*      { CPLD00_VIRT,  CPLD00_PHYS,    CPLD00_SIZE,    MT_DEVICE }, */
 };
 void __init
-lpd7a400_map_io(void)
+lpd7a40x_map_io(void)
 {
-        iotable_init (lpd7a400_io_desc, ARRAY_SIZE (lpd7a400_io_desc));
+        iotable_init (lpd7a40x_io_desc, ARRAY_SIZE (lpd7a40x_io_desc));
-                /* Fixup (improve) Static Memory Controller settings */
-        SMC_BCR0 = 0x200039af;  /* Boot Flash */
-        SMC_BCR6 = 0x1000fbe0;  /* CPLD */
-        SMC_BCR7 = 0x1000b2c2;  /* Compact Flash */
 }
 #ifdef CONFIG_MACH_LPD7A400
@@ -320,7 +400,7 @@ MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10")
        .phys_io        = 0x80000000,
        .io_pg_offst    = ((io_p2v (0x80000000))>>18) & 0xfffc,
        .boot_params    = 0xc0000100,
-        .map_io         = lpd7a400_map_io,
+        .map_io         = lpd7a40x_map_io,
        .init_irq       = lh7a400_init_irq,
        .timer          = &lh7a40x_timer,
        .init_machine   = lpd7a40x_init,
@@ -335,7 +415,7 @@ MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10")
        .phys_io        = 0x80000000,
        .io_pg_offst    = ((io_p2v (0x80000000))>>18) & 0xfffc,
        .boot_params    = 0xc0000100,
-        .map_io         = lpd7a400_map_io,
+        .map_io         = lpd7a40x_map_io,
        .init_irq       = lh7a404_init_irq,
        .timer          = &lh7a40x_timer,
        .init_machine   = lpd7a40x_init,
diff --git a/arch/arm/mach-lh7a40x/clcd.c b/arch/arm/mach-lh7a40x/clcd.c
new file mode 100644
index 000000000000..93751fee793d
--- /dev/null
+++ b/arch/arm/mach-lh7a40x/clcd.c
@@ -0,0 +1,241 @@
+/*
+ *  arch/arm/mach-lh7a40x/clcd.c
+ *
+ *  Copyright (C) 2004 Marc Singer
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  version 2 as published by the Free Software Foundation.
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+//#include <linux/module.h>
+//#include <linux/time.h>
+//#include <asm/hardware.h>
+//#include <asm/mach/time.h>
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+#include <asm/system.h>
+#include <asm/hardware.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+#define HRTFTC_HRSETUP          __REG(HRTFTC_PHYS + 0x00)
+#define HRTFTC_HRCON            __REG(HRTFTC_PHYS + 0x04)
+#define HRTFTC_HRTIMING1        __REG(HRTFTC_PHYS + 0x08)
+#define HRTFTC_HRTIMING2        __REG(HRTFTC_PHYS + 0x0c)
+#define ALI_SETUP               __REG(ALI_PHYS + 0x00)
+#define ALI_CONTROL             __REG(ALI_PHYS + 0x04)
+#define ALI_TIMING1             __REG(ALI_PHYS + 0x08)
+#define ALI_TIMING2             __REG(ALI_PHYS + 0x0c)
+#include "lcd-panel.h"
+static void lh7a40x_clcd_disable (struct clcd_fb *fb)
+{
+#if defined (CONFIG_MACH_LPD7A400)
+        CPLD_CONTROL &= ~(1<<1);        /* Disable LCD Vee */
+#endif
+#if defined (CONFIG_MACH_LPD7A404)
+        GPIO_PCD  &= ~(1<<3);           /* Disable LCD Vee */
+#endif
+#if defined (CONFIG_ARCH_LH7A400)
+        HRTFTC_HRSETUP &= ~(1<<13);     /* Disable HRTFT controller */
+#endif
+#if defined (CONFIG_ARCH_LH7A404)
+        ALI_SETUP &= ~(1<<13);          /* Disable ALI */
+#endif
+}
+static void lh7a40x_clcd_enable (struct clcd_fb *fb)
+{
+        struct clcd_panel_extra* extra
+                = (struct clcd_panel_extra*) fb->board_data;
+#if defined (CONFIG_MACH_LPD7A400)
+        CPLD_CONTROL |= (1<<1);         /* Enable LCD Vee */
+#endif
+#if defined (CONFIG_MACH_LPD7A404)
+        GPIO_PCDD &= ~(1<<3);           /* Enable LCD Vee */
+        GPIO_PCD  |=  (1<<3);
+#endif
+#if defined (CONFIG_ARCH_LH7A400)
+        if (extra) {
+                HRTFTC_HRSETUP
+                        = (1 << 13)
+                        | ((fb->fb.var.xres - 1) << 4)
+                        | 0xc
+                        | (extra->hrmode ? 1 : 0);
+                HRTFTC_HRCON
+                        = ((extra->clsen ? 1 : 0) << 1)
+                        | ((extra->spsen ? 1 : 0) << 0);
+                HRTFTC_HRTIMING1
+                        = (extra->pcdel << 8)
+                        | (extra->revdel << 4)
+                        | (extra->lpdel << 0);
+                HRTFTC_HRTIMING2
+                        = (extra->spldel << 9)
+                        | (extra->pc2del << 0);
+        }
+        else
+                HRTFTC_HRSETUP
+                        = (1 << 13)
+                        | 0xc;
+#endif
+#if defined (CONFIG_ARCH_LH7A404)
+        if (extra) {
+                ALI_SETUP
+                        = (1 << 13)
+                        | ((fb->fb.var.xres - 1) << 4)
+                        | 0xc
+                        | (extra->hrmode ? 1 : 0);
+                ALI_CONTROL
+                        = ((extra->clsen ? 1 : 0) << 1)
+                        | ((extra->spsen ? 1 : 0) << 0);
+                ALI_TIMING1
+                        = (extra->pcdel << 8)
+                        | (extra->revdel << 4)
+                        | (extra->lpdel << 0);
+                ALI_TIMING2
+                        = (extra->spldel << 9)
+                        | (extra->pc2del << 0);
+        }
+        else
+                ALI_SETUP
+                        = (1 << 13)
+                        | 0xc;
+#endif
+}
+#define FRAMESIZE(s) (((s) + PAGE_SIZE - 1)&PAGE_MASK)
+static int lh7a40x_clcd_setup (struct clcd_fb *fb)
+{
+        dma_addr_t dma;
+        u32 len = FRAMESIZE (lcd_panel.mode.xres*lcd_panel.mode.yres
+                             *(lcd_panel.bpp/8));
+        fb->panel = &lcd_panel;
+                /* Enforce the sync polarity defaults */
+        if (!(fb->panel->tim2 & TIM2_IHS))
+                fb->fb.var.sync |= FB_SYNC_HOR_HIGH_ACT;
+        if (!(fb->panel->tim2 & TIM2_IVS))
+                fb->fb.var.sync |= FB_SYNC_VERT_HIGH_ACT;
+#if defined (HAS_LCD_PANEL_EXTRA)
+        fb->board_data = &lcd_panel_extra;
+#endif
+        fb->fb.screen_base
+                = dma_alloc_writecombine (&fb->dev->dev, len,
+                                          &dma, GFP_KERNEL);
+        printk ("CLCD: LCD setup fb virt 0x%p phys 0x%p l %x io 0x%p \n",
+                fb->fb.screen_base, (void*) dma, len,
+                (void*) io_p2v (CLCDC_PHYS));
+        printk ("CLCD: pixclock %d\n", lcd_panel.mode.pixclock);
+        if (!fb->fb.screen_base) {
+                printk(KERN_ERR "CLCD: unable to map framebuffer\n");
+                return -ENOMEM;
+        }
+#if defined (USE_RGB555)
+        fb->fb.var.green.length = 5; /* Panel uses RGB 5:5:5 */
+#endif
+        fb->fb.fix.smem_start = dma;
+        fb->fb.fix.smem_len = len;
+                /* Drive PE4 high to prevent CPLD crash */
+        GPIO_PEDD |= (1<<4);
+        GPIO_PED  |= (1<<4);
+        GPIO_PINMUX |= (1<<1) | (1<<0); /* LCDVD[15:4] */
+//      fb->fb.fbops->fb_check_var (&fb->fb.var, &fb->fb);
+//      fb->fb.fbops->fb_set_par (&fb->fb);
+        return 0;
+}
+static int lh7a40x_clcd_mmap (struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+        return dma_mmap_writecombine(&fb->dev->dev, vma,
+                                     fb->fb.screen_base,
+                                     fb->fb.fix.smem_start,
+                                     fb->fb.fix.smem_len);
+}
+static void lh7a40x_clcd_remove (struct clcd_fb *fb)
+{
+        dma_free_writecombine (&fb->dev->dev, fb->fb.fix.smem_len,
+                               fb->fb.screen_base, fb->fb.fix.smem_start);
+}
+static struct clcd_board clcd_platform_data = {
+        .name           = "lh7a40x FB",
+        .check          = clcdfb_check,
+        .decode         = clcdfb_decode,
+        .enable         = lh7a40x_clcd_enable,
+        .setup          = lh7a40x_clcd_setup,
+        .mmap           = lh7a40x_clcd_mmap,
+        .remove         = lh7a40x_clcd_remove,
+        .disable        = lh7a40x_clcd_disable,
+};
+#define IRQ_CLCDC (IRQ_LCDINTR)
+#define AMBA_DEVICE(name,busid,base,plat,pid)                   \
+static struct amba_device name##_device = {                     \
+        .dev = {                                                \
+                .coherent_dma_mask = ~0,                        \
+                .bus_id = busid,                                \
+                .platform_data = plat,                          \
+                },                                              \
+        .res = {                                                \
+                .start  = base##_PHYS,                          \
+                .end    = (base##_PHYS) + (4*1024) - 1,         \
+                .flags  = IORESOURCE_MEM,                       \
+                },                                              \
+        .dma_mask       = ~0,                                   \
+        .irq            = { IRQ_##base, },                      \
+        /* .dma         = base##_DMA,*/                         \
+        .periphid = pid,                                        \
+}
+AMBA_DEVICE(clcd,  "cldc-lh7a40x",  CLCDC,     &clcd_platform_data, 0x41110);
+static struct amba_device *amba_devs[] __initdata = {
+        &clcd_device,
+};
+void __init lh7a40x_clcd_init (void)
+{
+        int i;
+        int result;
+        printk ("CLCD: registering amba devices\n");
+        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+                struct amba_device *d = amba_devs[i];
+                result = amba_device_register(d, &iomem_resource);
+                printk ("  %d -> %d\n", i ,result);
+        }
+}
diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c
new file mode 100644
index 000000000000..2291afe9f23e
--- /dev/null
+++ b/arch/arm/mach-lh7a40x/clocks.c
@@ -0,0 +1,199 @@
+/* arch/arm/mach-lh7a40x/clocks.c
+ *
+ *  Copyright (C) 2004 Marc Singer
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  version 2 as published by the Free Software Foundation.
+ *
+ */
+#include <linux/config.h>
+#include <linux/cpufreq.h>
+#include <asm/hardware.h>
+#include <asm/arch/clocks.h>
+#include <linux/err.h>
+struct module;
+struct icst525_params;
+struct clk {
+        struct list_head node;
+        unsigned long rate;
+        struct module *owner;
+        const char *name;
+//      void *data;
+//      const struct icst525_params *params;
+//      void (*setvco)(struct clk *, struct icst525_vco vco);
+};
+int clk_register(struct clk *clk);
+void clk_unregister(struct clk *clk);
+/* ----- */
+#define MAINDIV1(c)     (((c) >>  7) & 0x0f)
+#define MAINDIV2(c)     (((c) >> 11) & 0x1f)
+#define PS(c)           (((c) >> 18) & 0x03)
+#define PREDIV(c)       (((c) >>  2) & 0x1f)
+#define HCLKDIV(c)      (((c) >>  0) & 0x02)
+#define PCLKDIV(c)      (((c) >> 16) & 0x03)
+unsigned int cpufreq_get (unsigned int cpu) /* in kHz */
+{
+        return fclkfreq_get ()/1000;
+}
+EXPORT_SYMBOL(cpufreq_get);
+unsigned int fclkfreq_get (void)
+{
+        unsigned int clkset = CSC_CLKSET;
+        unsigned int gclk
+                = XTAL_IN
+                / (1 << PS(clkset))
+                * (MAINDIV1(clkset) + 2)
+                / (PREDIV(clkset)   + 2)
+                * (MAINDIV2(clkset) + 2)
+                ;
+        return gclk;
+}
+unsigned int hclkfreq_get (void)
+{
+        unsigned int clkset = CSC_CLKSET;
+        unsigned int hclk = fclkfreq_get () / (HCLKDIV(clkset) + 1);
+        return hclk;
+}
+unsigned int pclkfreq_get (void)
+{
+        unsigned int clkset = CSC_CLKSET;
+        int pclkdiv = PCLKDIV(clkset);
+        unsigned int pclk;
+        if (pclkdiv == 0x3)
+                pclkdiv = 0x2;
+        pclk = hclkfreq_get () / (1 << pclkdiv);
+        return pclk;
+}
+/* ----- */
+static LIST_HEAD(clocks);
+static DECLARE_MUTEX(clocks_sem);
+struct clk *clk_get (struct device *dev, const char *id)
+{
+        struct clk *p;
+        struct clk *clk = ERR_PTR(-ENOENT);
+        down (&clocks_sem);
+        list_for_each_entry (p, &clocks, node) {
+                if (strcmp (id, p->name) == 0
+                    && try_module_get(p->owner)) {
+                        clk = p;
+                        break;
+                }
+        }
+        up (&clocks_sem);
+        return clk;
+}
+EXPORT_SYMBOL(clk_get);
+void clk_put (struct clk *clk)
+{
+        module_put(clk->owner);
+}
+EXPORT_SYMBOL(clk_put);
+int clk_enable (struct clk *clk)
+{
+        return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+void clk_disable (struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+int clk_use (struct clk *clk)
+{
+        return 0;
+}
+EXPORT_SYMBOL(clk_use);
+void clk_unuse (struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_unuse);
+unsigned long clk_get_rate (struct clk *clk)
+{
+        return clk->rate;
+}
+EXPORT_SYMBOL(clk_get_rate);
+long clk_round_rate (struct clk *clk, unsigned long rate)
+{
+        return rate;
+}
+EXPORT_SYMBOL(clk_round_rate);
+int clk_set_rate (struct clk *clk, unsigned long rate)
+{
+        int ret = -EIO;
+        return ret;
+}
+EXPORT_SYMBOL(clk_set_rate);
+#if 0
+/*
+ * These are fixed clocks.
+ */
+static struct clk kmi_clk = {
+        .name   = "KMIREFCLK",
+        .rate   = 24000000,
+};
+static struct clk uart_clk = {
+        .name   = "UARTCLK",
+        .rate   = 24000000,
+};
+static struct clk mmci_clk = {
+        .name   = "MCLK",
+        .rate   = 33000000,
+};
+#endif
+static struct clk clcd_clk = {
+        .name   = "CLCDCLK",
+        .rate   = 0,
+};
+int clk_register (struct clk *clk)
+{
+        down (&clocks_sem);
+        list_add (&clk->node, &clocks);
+        up (&clocks_sem);
+        return 0;
+}
+EXPORT_SYMBOL(clk_register);
+void clk_unregister (struct clk *clk)
+{
+        down (&clocks_sem);
+        list_del (&clk->node);
+        up (&clocks_sem);
+}
+EXPORT_SYMBOL(clk_unregister);
+static int __init clk_init (void)
+{
+        clk_register(&clcd_clk);
+        return 0;
+}
+arch_initcall(clk_init);
diff --git a/arch/arm/mach-lh7a40x/common.h b/arch/arm/mach-lh7a40x/common.h
index ea8de7e3ab1b..18e8bb4eb202 100644
--- a/arch/arm/mach-lh7a40x/common.h
+++ b/arch/arm/mach-lh7a40x/common.h
@@ -12,6 +12,7 @@ extern struct sys_timer lh7a40x_timer;
 extern void lh7a400_init_irq (void);
 extern void lh7a404_init_irq (void);
+extern void lh7a40x_clcd_init (void);
 extern void lh7a40x_init_board_irq (void);
 #define IRQ_DISPATCH(irq) desc_handle_irq((irq),(irq_desc + irq), regs)
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c
index e902e3d87da4..2685a81454d2 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a404.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c
@@ -28,13 +28,17 @@
 static unsigned char irq_pri_vic1[] = {
 #if defined (USE_PRIORITIES)
-IRQ_GPIO3INTR,
+        IRQ_GPIO3INTR,                  /* CPLD */
+        IRQ_DMAM2P4, IRQ_DMAM2P5,       /* AC97 */
 #endif
 };
 static unsigned char irq_pri_vic2[] = {
 #if defined (USE_PRIORITIES)
-        IRQ_T3UI, IRQ_GPIO7INTR,
+        IRQ_T3UI,                       /* Timer */
+        IRQ_GPIO7INTR,                  /* CPLD */
        IRQ_UART1INTR, IRQ_UART2INTR, IRQ_UART3INTR,
+        IRQ_LCDINTR,                    /* LCD */
+        IRQ_TSCINTR,                    /* ADC/Touchscreen */
 #endif
 };
@@ -98,10 +102,19 @@ static struct irqchip lh7a404_gpio_vic2_chip = {
  /* IRQ initialization */
+#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404)
+extern void* branch_irq_lh7a400;
+#endif
 void __init lh7a404_init_irq (void)
 {
        int irq;
+#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404)
+#define NOP 0xe1a00000                  /* mov r0, r0 */
+        branch_irq_lh7a400 = NOP;
+#endif
        VIC1_INTENCLR = 0xffffffff;
        VIC2_INTENCLR = 0xffffffff;
        VIC1_INTSEL = 0;                /* All IRQs */
diff --git a/arch/arm/mach-lh7a40x/lcd-panel.h b/arch/arm/mach-lh7a40x/lcd-panel.h
new file mode 100644
index 000000000000..4fb2efc4950f
--- /dev/null
+++ b/arch/arm/mach-lh7a40x/lcd-panel.h
@@ -0,0 +1,346 @@
+/* lcd-panel.h
+     $Id$
+   written by Marc Singer
+   18 Jul 2005
+   Copyright (C) 2005 Marc Singer
+   -----------
+   DESCRIPTION
+   -----------
+   Only one panel may be defined at a time.
+   The pixel clock is calculated to be no greater than the target.
+   Each timing value is accompanied by a specification comment.
+     UNITS/MIN/TYP/MAX
+   Most of the units will be in clocks.
+   USE_RGB555
+     Define this macro to configure the AMBA LCD controller to use an
+     RGB555 encoding for the pels instead of the normal RGB565.
+   LPD9520, LPD79524, LPD7A400, LPD7A404-10, LPD7A404-11
+     These boards are best approximated by 555 for all panels.  Some
+     can use an extra low-order bit of blue in bit 16 of the color
+     value, but we don't have a way to communicate this non-linear
+     mapping to the kernel.
+*/
+#if !defined (__LCD_PANEL_H__)
+#    define   __LCD_PANEL_H__
+#if defined (MACH_LPD79520)\
+ || defined (MACH_LPD79524)\
+ || defined (MACH_LPD7A400)\
+ || defined (MACH_LPD7A404)
+# define USE_RGB555
+#endif
+struct clcd_panel_extra {
+        unsigned int hrmode;
+        unsigned int clsen;
+        unsigned int spsen;
+        unsigned int pcdel;
+        unsigned int revdel;
+        unsigned int lpdel;
+        unsigned int spldel;
+        unsigned int pc2del;
+};
+#define NS_TO_CLOCK(ns,c)       ((((ns)*((c)/1000) + (1000000 - 1))/1000000))
+#define CLOCK_TO_DIV(e,c)       (((c) + (e) - 1)/(e))
+#if defined CONFIG_FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT
+        /* Logic Product Development LCD 3.5" QVGA HRTFT -10 */
+        /* Sharp PN LQ035Q7DB02 w/HRTFT controller chip */
+#define PIX_CLOCK_TARGET        (6800000)
+#define PIX_CLOCK_DIVIDER       CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
+#define PIX_CLOCK               (HCLK/PIX_CLOCK_DIVIDER)
+static struct clcd_panel lcd_panel = {
+        .mode   = {
+                .name           = "3.5in QVGA (LQ035Q7DB02)",
+                .xres           = 240,
+                .yres           = 320,
+                .pixclock       = PIX_CLOCK,
+                .left_margin    = 16,
+                .right_margin   = 21,
+                .upper_margin   = 8,                    // line/8/8/8
+                .lower_margin   = 5,
+                .hsync_len      = 61,
+                .vsync_len      = NS_TO_CLOCK (60, PIX_CLOCK),
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_IPC | (PIX_CLOCK_DIVIDER - 2),
+        .cntl           = CNTL_LCDTFT | CNTL_WATERMARK,
+        .bpp            = 16,
+};
+#define HAS_LCD_PANEL_EXTRA
+static struct clcd_panel_extra lcd_panel_extra = {
+        .hrmode = 1,
+        .clsen = 1,
+        .spsen = 1,
+        .pcdel = 8,
+        .revdel = 7,
+        .lpdel = 13,
+        .spldel = 77,
+        .pc2del = 208,
+};
+#endif
+#if defined CONFIG_FB_ARMCLCD_SHARP_LQ057Q3DC02
+        /* Logic Product Development LCD 5.7" QVGA -10 */
+        /* Sharp PN LQ057Q3DC02 */
+        /* QVGA mode, V/Q=LOW */
+/* From Sharp on 2006.1.3.  I believe some of the values are incorrect
+ * based on the datasheet.
+    Timing0     TIMING1         TIMING2         CONTROL
+    0x140A0C4C  0x080504EF      0x013F380D      0x00000829
+    HBP= 20     VBP=  8         BCD=  0
+    HFP= 10     VFP=  5         CPL=319
+    HSW= 12     VSW=  1         IOE=  0
+    PPL= 19     LPP=239         IPC=  1
+                                IHS=  1
+                                IVS=  1
+                                ACB=  0
+                                CSEL= 0
+                                PCD= 13
+ */
+/* The full horozontal cycle (Th) is clock/360/400/450. */
+/* The full vertical   cycle (Tv) is line/251/262/280. */
+#define PIX_CLOCK_TARGET        (6300000) /* -/6.3/7 MHz */
+#define PIX_CLOCK_DIVIDER       CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
+#define PIX_CLOCK               (HCLK/PIX_CLOCK_DIVIDER)
+static struct clcd_panel lcd_panel = {
+        .mode   = {
+                .name           = "5.7in QVGA (LQ057Q3DC02)",
+                .xres           = 320,
+                .yres           = 240,
+                .pixclock       = PIX_CLOCK,
+                .left_margin    = 11,
+                .right_margin   = 400-11-320-2,
+                .upper_margin   = 7,                    // line/7/7/7
+                .lower_margin   = 262-7-240-2,
+                .hsync_len      = 2,                    // clk/2/96/200
+                .vsync_len      = 2,                    // line/2/-/34
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_IHS | TIM2_IVS
+                        | (PIX_CLOCK_DIVIDER - 2),
+        .cntl           = CNTL_LCDTFT | CNTL_WATERMARK,
+        .bpp            = 16,
+};
+#endif
+#if defined CONFIG_FB_ARMCLCD_SHARP_LQ64D343
+        /* Logic Product Development LCD 6.4" VGA -10 */
+        /* Sharp PN LQ64D343 */
+/* The full horozontal cycle (Th) is clock/750/800/900. */
+/* The full vertical   cycle (Tv) is line/515/525/560. */
+#define PIX_CLOCK_TARGET        (28330000)
+#define PIX_CLOCK_DIVIDER       CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
+#define PIX_CLOCK               (HCLK/PIX_CLOCK_DIVIDER)
+static struct clcd_panel lcd_panel = {
+        .mode   = {
+                .name           = "6.4in QVGA (LQ64D343)",
+                .xres           = 640,
+                .yres           = 480,
+                .pixclock       = PIX_CLOCK,
+                .left_margin    = 32,
+                .right_margin   = 800-32-640-96,
+                .upper_margin   = 32,                   // line/34/34/34
+                .lower_margin   = 540-32-480-2,
+                .hsync_len      = 96,                   // clk/2/96/200
+                .vsync_len      = 2,                    // line/2/-/34
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_IHS | TIM2_IVS
+                        | (PIX_CLOCK_DIVIDER - 2),
+        .cntl           = CNTL_LCDTFT | CNTL_WATERMARK,
+        .bpp            = 16,
+};
+#endif
+#if defined CONFIG_FB_ARMCLCD_SHARP_LQ10D368
+        /* Logic Product Development LCD 10.4" VGA -10 */
+        /* Sharp PN LQ10D368 */
+#define PIX_CLOCK_TARGET        (28330000)
+#define PIX_CLOCK_DIVIDER       CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
+#define PIX_CLOCK               (HCLK/PIX_CLOCK_DIVIDER)
+static struct clcd_panel lcd_panel = {
+        .mode   = {
+                .name           = "10.4in VGA (LQ10D368)",
+                .xres           = 640,
+                .yres           = 480,
+                .pixclock       = PIX_CLOCK,
+                .left_margin    = 21,
+                .right_margin   = 15,
+                .upper_margin   = 34,
+                .lower_margin   = 5,
+                .hsync_len      = 96,
+                .vsync_len      = 16,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_IHS | TIM2_IVS
+                        | (PIX_CLOCK_DIVIDER - 2),
+        .cntl           = CNTL_LCDTFT | CNTL_WATERMARK,
+        .bpp            = 16,
+};
+#endif
+#if defined CONFIG_FB_ARMCLCD_SHARP_LQ121S1DG41
+        /* Logic Product Development LCD 12.1" SVGA -10 */
+        /* Sharp PN LQ121S1DG41, was LQ121S1DG31 */
+/* Note that with a 99993900 Hz HCLK, it is not possible to hit the
+ * target clock frequency range of 35MHz to 42MHz. */
+/* If the target pixel clock is substantially lower than the panel
+ * spec, this is done to prevent the LCD display from glitching when
+ * the CPU is under load.  A pixel clock higher than 25MHz
+ * (empirically determined) will compete with the CPU for bus cycles
+ * for the Ethernet chip.  However, even a pixel clock of 10MHz
+ * competes with Compact Flash interface during some operations
+ * (fdisk, e2fsck).  And, at that speed the display may have a visible
+ * flicker. */
+/* The full horozontal cycle (Th) is clock/832/1056/1395. */
+#define PIX_CLOCK_TARGET        (20000000)
+#define PIX_CLOCK_DIVIDER       CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
+#define PIX_CLOCK               (HCLK/PIX_CLOCK_DIVIDER)
+static struct clcd_panel lcd_panel = {
+        .mode   = {
+                .name           = "12.1in SVGA (LQ121S1DG41)",
+                .xres           = 800,
+                .yres           = 600,
+                .pixclock       = PIX_CLOCK,
+                .left_margin    = 89,           // ns/5/-/(1/PIX_CLOCK)-10
+                .right_margin   = 1056-800-89-128,
+                .upper_margin   = 23,           // line/23/23/23
+                .lower_margin   = 44,
+                .hsync_len      = 128,          // clk/2/128/200
+                .vsync_len      = 4,            // line/2/4/6
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_IHS | TIM2_IVS
+                        | (PIX_CLOCK_DIVIDER - 2),
+        .cntl           = CNTL_LCDTFT | CNTL_WATERMARK,
+        .bpp            = 16,
+};
+#endif
+#if defined CONFIG_FB_ARMCLCD_HITACHI
+        /* Hitachi*/
+        /* Submitted by Michele Da Rold <michele.darold@ecsproject.com> */
+#define PIX_CLOCK_TARGET        (49000000)
+#define PIX_CLOCK_DIVIDER       CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
+#define PIX_CLOCK               (HCLK/PIX_CLOCK_DIVIDER)
+static struct clcd_panel lcd_panel = {
+        .mode   = {
+                .name           = "Hitachi 800x480",
+                .xres           = 800,
+                .yres           = 480,
+                .pixclock       = PIX_CLOCK,
+                .left_margin    = 88,
+                .right_margin   = 40,
+                .upper_margin   = 32,
+                .lower_margin   = 11,
+                .hsync_len      = 128,
+                .vsync_len      = 2,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_IPC | TIM2_IHS | TIM2_IVS
+                        | (PIX_CLOCK_DIVIDER - 2),
+        .cntl           = CNTL_LCDTFT | CNTL_WATERMARK,
+        .bpp            = 16,
+};
+#endif
+#if defined CONFIG_FB_ARMCLCD_AUO_A070VW01_WIDE
+        /* AU Optotronics  A070VW01 7.0 Wide Screen color Display*/
+        /* Submitted by Michele Da Rold <michele.darold@ecsproject.com> */
+#define PIX_CLOCK_TARGET        (10000000)
+#define PIX_CLOCK_DIVIDER       CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
+#define PIX_CLOCK               (HCLK/PIX_CLOCK_DIVIDER)
+static struct clcd_panel lcd_panel = {
+        .mode   = {
+                .name           = "7.0in Wide (A070VW01)",
+                .xres           = 480,
+                .yres           = 234,
+                .pixclock       = PIX_CLOCK,
+                .left_margin    = 30,
+                .right_margin   = 25,
+                .upper_margin   = 14,
+                .lower_margin   = 12,
+                .hsync_len      = 100,
+                .vsync_len      = 1,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_IPC | TIM2_IHS | TIM2_IVS
+                        | (PIX_CLOCK_DIVIDER - 2),
+        .cntl           = CNTL_LCDTFT | CNTL_WATERMARK,
+        .bpp            = 16,
+};
+#endif
+#undef NS_TO_CLOCK
+#undef CLOCK_TO_DIV
+#endif  /* __LCD_PANEL_H__ */
diff --git a/arch/arm/mach-lh7a40x/ssp-cpld.c b/arch/arm/mach-lh7a40x/ssp-cpld.c
new file mode 100644
index 000000000000..a10830186dac
--- /dev/null
+++ b/arch/arm/mach-lh7a40x/ssp-cpld.c
@@ -0,0 +1,343 @@
+/* arch/arm/mach-lh7a40x/ssp-cpld.c
+ *
+ *  Copyright (C) 2004,2005 Marc Singer
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  version 2 as published by the Free Software Foundation.
+ *
+ * SSP/SPI driver for the CardEngine CPLD.
+ *
+ */
+/* NOTES
+   -----
+   o *** This driver is cribbed from the 7952x implementation.
+         Some comments may not apply.
+   o This driver contains sufficient logic to control either the
+     serial EEPROMs or the audio codec.  It is included in the kernel
+     to support the codec.  The EEPROMs are really the responsibility
+     of the boot loader and should probably be left alone.
+   o The code must be augmented to cope with multiple, simultaneous
+     clients.
+     o The audio codec writes to the codec chip whenever playback
+       starts.
+     o The touchscreen driver writes to the ads chip every time it
+       samples.
+     o The audio codec must write 16 bits, but the touch chip writes
+       are 8 bits long.
+     o We need to be able to keep these configurations separate while
+       simultaneously active.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+//#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+//#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/arch/ssp.h>
+//#define TALK
+#if defined (TALK)
+#define PRINTK(f...)            printk (f)
+#else
+#define PRINTK(f...)            do {} while (0)
+#endif
+#if defined (CONFIG_ARCH_LH7A400)
+# define CPLD_SPID              __REGP16(CPLD06_VIRT) /* SPI data */
+# define CPLD_SPIC              __REGP16(CPLD08_VIRT) /* SPI control */
+# define CPLD_SPIC_CS_CODEC     (1<<0)
+# define CPLD_SPIC_CS_TOUCH     (1<<1)
+# define CPLD_SPIC_WRITE        (0<<2)
+# define CPLD_SPIC_READ         (1<<2)
+# define CPLD_SPIC_DONE         (1<<3) /* r/o */
+# define CPLD_SPIC_LOAD         (1<<4)
+# define CPLD_SPIC_START        (1<<4)
+# define CPLD_SPIC_LOADED       (1<<5) /* r/o */
+#endif
+#define CPLD_SPI                __REGP16(CPLD0A_VIRT) /* SPI operation */
+#define CPLD_SPI_CS_EEPROM      (1<<3)
+#define CPLD_SPI_SCLK           (1<<2)
+#define CPLD_SPI_TX_SHIFT       (1)
+#define CPLD_SPI_TX             (1<<CPLD_SPI_TX_SHIFT)
+#define CPLD_SPI_RX_SHIFT       (0)
+#define CPLD_SPI_RX             (1<<CPLD_SPI_RX_SHIFT)
+/* *** FIXME: these timing values are substantially larger than the
+   *** chip requires. We may implement an nsleep () function. */
+#define T_SKH   1               /* Clock time high (us) */
+#define T_SKL   1               /* Clock time low (us) */
+#define T_CS    1               /* Minimum chip select low time (us)  */
+#define T_CSS   1               /* Minimum chip select setup time (us)  */
+#define T_DIS   1               /* Data setup time (us) */
+         /* EEPROM SPI bits */
+#define P_START         (1<<9)
+#define P_WRITE         (1<<7)
+#define P_READ          (2<<7)
+#define P_ERASE         (3<<7)
+#define P_EWDS          (0<<7)
+#define P_WRAL          (0<<7)
+#define P_ERAL          (0<<7)
+#define P_EWEN          (0<<7)
+#define P_A_EWDS        (0<<5)
+#define P_A_WRAL        (1<<5)
+#define P_A_ERAL        (2<<5)
+#define P_A_EWEN        (3<<5)
+struct ssp_configuration {
+        int device;
+        int mode;
+        int speed;
+        int frame_size_write;
+        int frame_size_read;
+};
+static struct ssp_configuration ssp_configuration;
+static spinlock_t ssp_lock;
+static void enable_cs (void)
+{
+        switch (ssp_configuration.device) {
+        case DEVICE_EEPROM:
+                CPLD_SPI |= CPLD_SPI_CS_EEPROM;
+                break;
+        }
+        udelay (T_CSS);
+}
+static void disable_cs (void)
+{
+        switch (ssp_configuration.device) {
+        case DEVICE_EEPROM:
+                CPLD_SPI &= ~CPLD_SPI_CS_EEPROM;
+                break;
+        }
+        udelay (T_CS);
+}
+static void pulse_clock (void)
+{
+        CPLD_SPI |=  CPLD_SPI_SCLK;
+        udelay (T_SKH);
+        CPLD_SPI &= ~CPLD_SPI_SCLK;
+        udelay (T_SKL);
+}
+/* execute_spi_command
+   sends an spi command to a device.  It first sends cwrite bits from
+   v.  If cread is greater than zero it will read cread bits
+   (discarding the leading 0 bit) and return them.  If cread is less
+   than zero it will check for completetion status and return 0 on
+   success or -1 on timeout.  If cread is zero it does nothing other
+   than sending the command.
+   On the LPD7A400, we can only read or write multiples of 8 bits on
+   the codec and the touch screen device.  Here, we round up.
+*/
+static int execute_spi_command (int v, int cwrite, int cread)
+{
+        unsigned long l = 0;
+#if defined (CONFIG_MACH_LPD7A400)
+        /* The codec and touch devices cannot be bit-banged.  Instead,
+         * the CPLD provides an eight-bit shift register and a crude
+         * interface.  */
+        if (   ssp_configuration.device == DEVICE_CODEC
+            || ssp_configuration.device == DEVICE_TOUCH) {
+                int select = 0;
+                PRINTK ("spi(%d %d.%d) 0x%04x",
+                        ssp_configuration.device, cwrite, cread,
+                        v);
+#if defined (TALK)
+                if (ssp_configuration.device == DEVICE_CODEC)
+                        PRINTK (" 0x%03x -> %2d", v & 0x1ff, (v >> 9) & 0x7f);
+#endif
+                PRINTK ("\n");
+                if (ssp_configuration.device == DEVICE_CODEC)
+                        select = CPLD_SPIC_CS_CODEC;
+                if (ssp_configuration.device == DEVICE_TOUCH)
+                        select = CPLD_SPIC_CS_TOUCH;
+                if (cwrite) {
+                        for (cwrite = (cwrite + 7)/8; cwrite-- > 0; ) {
+                                CPLD_SPID = (v >> (8*cwrite)) & 0xff;
+                                CPLD_SPIC = select | CPLD_SPIC_LOAD;
+                                while (!(CPLD_SPIC & CPLD_SPIC_LOADED))
+                                        ;
+                                CPLD_SPIC = select;
+                                while (!(CPLD_SPIC & CPLD_SPIC_DONE))
+                                        ;
+                        }
+                        v = 0;
+                }
+                if (cread) {
+                        mdelay (2);     /* *** FIXME: required by ads7843? */
+                        v = 0;
+                        for (cread = (cread + 7)/8; cread-- > 0;) {
+                                CPLD_SPID = 0;
+                                CPLD_SPIC = select | CPLD_SPIC_READ
+                                        | CPLD_SPIC_START;
+                                while (!(CPLD_SPIC & CPLD_SPIC_LOADED))
+                                        ;
+                                CPLD_SPIC = select | CPLD_SPIC_READ;
+                                while (!(CPLD_SPIC & CPLD_SPIC_DONE))
+                                        ;
+                                v = (v << 8) | CPLD_SPID;
+                        }
+                }
+                return v;
+        }
+#endif
+        PRINTK ("spi(%d) 0x%04x -> 0x%x\r\n", ssp_configuration.device,
+                v & 0x1ff, (v >> 9) & 0x7f);
+        enable_cs ();
+        v <<= CPLD_SPI_TX_SHIFT; /* Correction for position of SPI_TX bit */
+        while (cwrite--) {
+                CPLD_SPI
+                        = (CPLD_SPI & ~CPLD_SPI_TX)
+                        | ((v >> cwrite) & CPLD_SPI_TX);
+                udelay (T_DIS);
+                pulse_clock ();
+        }
+        if (cread < 0) {
+                int delay = 10;
+                disable_cs ();
+                udelay (1);
+                enable_cs ();
+                l = -1;
+                do {
+                        if (CPLD_SPI & CPLD_SPI_RX) {
+                                l = 0;
+                                break;
+                        }
+                } while (udelay (1), --delay);
+        }
+        else
+        /* We pulse the clock before the data to skip the leading zero. */
+                while (cread-- > 0) {
+                        pulse_clock ();
+                        l = (l<<1)
+                                | (((CPLD_SPI & CPLD_SPI_RX)
+                                    >> CPLD_SPI_RX_SHIFT) & 0x1);
+                }
+        disable_cs ();
+        return l;
+}
+static int ssp_init (void)
+{
+        spin_lock_init (&ssp_lock);
+        memset (&ssp_configuration, 0, sizeof (ssp_configuration));
+        return 0;
+}
+/* ssp_chip_select
+   drops the chip select line for the CPLD shift-register controlled
+   devices.  It doesn't enable chip
+*/
+static void ssp_chip_select (int enable)
+{
+#if defined (CONFIG_MACH_LPD7A400)
+        int select;
+        if (ssp_configuration.device == DEVICE_CODEC)
+                select = CPLD_SPIC_CS_CODEC;
+        else if (ssp_configuration.device == DEVICE_TOUCH)
+                select = CPLD_SPIC_CS_TOUCH;
+        else
+                return;
+        if (enable)
+                CPLD_SPIC = select;
+        else
+                CPLD_SPIC = 0;
+#endif
+}
+static void ssp_acquire (void)
+{
+        spin_lock (&ssp_lock);
+}
+static void ssp_release (void)
+{
+        ssp_chip_select (0);    /* just in case */
+        spin_unlock (&ssp_lock);
+}
+static int ssp_configure (int device, int mode, int speed,
+                           int frame_size_write, int frame_size_read)
+{
+        ssp_configuration.device                = device;
+        ssp_configuration.mode                  = mode;
+        ssp_configuration.speed                 = speed;
+        ssp_configuration.frame_size_write      = frame_size_write;
+        ssp_configuration.frame_size_read       = frame_size_read;
+        return 0;
+}
+static int ssp_read (void)
+{
+        return execute_spi_command (0, 0, ssp_configuration.frame_size_read);
+}
+static int ssp_write (u16 data)
+{
+        execute_spi_command (data, ssp_configuration.frame_size_write, 0);
+        return 0;
+}
+static int ssp_write_read (u16 data)
+{
+        return execute_spi_command (data, ssp_configuration.frame_size_write,
+                                    ssp_configuration.frame_size_read);
+}
+struct ssp_driver lh7a40x_cpld_ssp_driver = {
+        .init           = ssp_init,
+        .acquire        = ssp_acquire,
+        .release        = ssp_release,
+        .configure      = ssp_configure,
+        .chip_select    = ssp_chip_select,
+        .read           = ssp_read,
+        .write          = ssp_write,
+        .write_read     = ssp_write_read,
+};
+MODULE_AUTHOR("Marc Singer");
+MODULE_DESCRIPTION("LPD7A40X CPLD SPI driver");
+MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c
index be377e331f25..ef9af375fcc4 100644
--- a/arch/arm/mach-lh7a40x/time.c
+++ b/arch/arm/mach-lh7a40x/time.c
@@ -1,4 +1,4 @@
-/* 
+/*
 *  arch/arm/mach-lh7a40x/time.c
 *
 *  Copyright (C) 2004 Logic Product Development
@@ -57,7 +57,7 @@ static struct irqaction lh7a40x_timer_irq = {
        .handler        = lh7a40x_timer_interrupt,
 };
-static void __init lh7a40x_timer_init(void)
+static void __init lh7a40x_timer_init (void)
 {
                                /* Stop/disable all timers */
        TIMER_CONTROL1 = 0;
diff --git a/arch/arm/mach-netx/Kconfig b/arch/arm/mach-netx/Kconfig
new file mode 100644
index 000000000000..3d90ef19be2b
--- /dev/null
+++ b/arch/arm/mach-netx/Kconfig
@@ -0,0 +1,24 @@
+menu "NetX Implementations"
+        depends on ARCH_NETX
+config MACH_NXDKN
+        bool "Enable Hilscher nxdkn Eval Board support"
+        depends on ARCH_NETX
+        help
+          Board support for the Hilscher NetX Eval Board
+config MACH_NXDB500
+        bool "Enable Hilscher nxdb500 Eval Board support"
+        depends on ARCH_NETX
+        select ARM_AMBA
+        help
+          Board support for the Hilscher nxdb500 Eval Board
+config MACH_NXEB500HMI
+        bool "Enable Hilscher nxeb500hmi Eval Board support"
+        depends on ARCH_NETX
+        select ARM_AMBA
+        help
+          Board support for the Hilscher nxeb500hmi Eval Board
+endmenu
diff --git a/arch/arm/mach-netx/Makefile b/arch/arm/mach-netx/Makefile
new file mode 100644
index 000000000000..18785ff37657
--- /dev/null
+++ b/arch/arm/mach-netx/Makefile
@@ -0,0 +1,15 @@
+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+# Object file lists.
+obj-y                   += time.o generic.o pfifo.o xc.o
+# Specific board support
+obj-$(CONFIG_MACH_NXDKN) += nxdkn.o
+obj-$(CONFIG_MACH_NXDB500) += nxdb500.o fb.o
+obj-$(CONFIG_MACH_NXEB500HMI) += nxeb500hmi.o fb.o
diff --git a/arch/arm/mach-netx/Makefile.boot b/arch/arm/mach-netx/Makefile.boot
new file mode 100644
index 000000000000..b81cf6aff0ac
--- /dev/null
+++ b/arch/arm/mach-netx/Makefile.boot
@@ -0,0 +1,2 @@
+    zreladdr-y                  := 0x80008000
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
new file mode 100644
index 000000000000..ef0ab6115c0b
--- /dev/null
+++ b/arch/arm/mach-netx/fb.c
@@ -0,0 +1,114 @@
+/*
+ * arch/arm/mach-netx/fb.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/dma-mapping.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+#include <asm/arch/netx-regs.h>
+#include <asm/hardware.h>
+struct clk {};
+static struct clk fb_clk;
+static struct clcd_panel *netx_panel;
+void netx_clcd_enable(struct clcd_fb *fb)
+{
+}
+int netx_clcd_setup(struct clcd_fb *fb)
+{
+        dma_addr_t dma;
+        fb->panel = netx_panel;
+        fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, 1024*1024,
+                                                    &dma, GFP_KERNEL);
+        if (!fb->fb.screen_base) {
+                printk(KERN_ERR "CLCD: unable to map framebuffer\n");
+                return -ENOMEM;
+        }
+        fb->fb.fix.smem_start   = dma;
+        fb->fb.fix.smem_len     = 1024*1024;
+        return 0;
+}
+int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+        return dma_mmap_writecombine(&fb->dev->dev, vma,
+                                     fb->fb.screen_base,
+                                     fb->fb.fix.smem_start,
+                                     fb->fb.fix.smem_len);
+}
+void netx_clcd_remove(struct clcd_fb *fb)
+{
+        dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
+                              fb->fb.screen_base, fb->fb.fix.smem_start);
+}
+void clk_disable(struct clk *clk)
+{
+}
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        return 0;
+}
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        return &fb_clk;
+}
+void clk_put(struct clk *clk)
+{
+}
+static struct amba_device fb_device = {
+        .dev            = {
+                .bus_id = "fb",
+                .coherent_dma_mask = ~0,
+        },
+        .res            = {
+                .start  = 0x00104000,
+                .end    = 0x00104fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        .irq            = { NETX_IRQ_LCD, NO_IRQ },
+        .periphid       = 0x10112400,
+};
+int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel)
+{
+        netx_panel = panel;
+        fb_device.dev.platform_data = board;
+        return amba_device_register(&fb_device, &iomem_resource);
+}
diff --git a/arch/arm/mach-netx/fb.h b/arch/arm/mach-netx/fb.h
new file mode 100644
index 000000000000..4919cf33a5f3
--- /dev/null
+++ b/arch/arm/mach-netx/fb.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-netx/fb.h
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+void netx_clcd_enable(struct clcd_fb *fb);
+int netx_clcd_setup(struct clcd_fb *fb);
+int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma);
+void netx_clcd_remove(struct clcd_fb *fb);
+int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel);
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
new file mode 100644
index 000000000000..af0b13534cfd
--- /dev/null
+++ b/arch/arm/mach-netx/generic.c
@@ -0,0 +1,193 @@
+/*
+ * arch/arm/mach-netx/generic.c
+ *
+ * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/device.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <asm/hardware.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/vic.h>
+#include <asm/io.h>
+#include <asm/arch/netx-regs.h>
+#include <asm/mach/irq.h>
+static struct map_desc netx_io_desc[] __initdata = {
+        {
+                .virtual        = NETX_IO_VIRT,
+                .pfn            = __phys_to_pfn(NETX_IO_PHYS),
+                .length         = NETX_IO_SIZE,
+                .type           = MT_DEVICE
+        }
+};
+void __init netx_map_io(void)
+{
+        iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc));
+}
+static struct resource netx_rtc_resources[] = {
+        [0] = {
+                .start  = 0x00101200,
+                .end    = 0x00101220,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+static struct platform_device netx_rtc_device = {
+        .name           = "netx-rtc",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(netx_rtc_resources),
+        .resource       = netx_rtc_resources,
+};
+static struct platform_device *devices[] __initdata = {
+        &netx_rtc_device,
+};
+#if 0
+#define DEBUG_IRQ(fmt...)       printk(fmt)
+#else
+#define DEBUG_IRQ(fmt...)       while (0) {}
+#endif
+static void
+netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc,
+                        struct pt_regs *regs)
+{
+        unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
+        unsigned int stat;
+        stat = ((readl(NETX_DPMAS_INT_EN) &
+                readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
+        desc = irq_desc + NETX_IRQ_HIF_CHAINED(0);
+        while (stat) {
+                if (stat & 1) {
+                        DEBUG_IRQ("handling irq %d\n", irq);
+                        desc_handle_irq(irq, desc, regs);
+                }
+                irq++;
+                desc++;
+                stat >>= 1;
+        }
+}
+static int
+netx_hif_irq_type(unsigned int _irq, unsigned int type)
+{
+        unsigned int val, irq;
+        val = readl(NETX_DPMAS_IF_CONF1);
+        irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+        if (type & __IRQT_RISEDGE) {
+                DEBUG_IRQ("rising edges\n");
+                val |= (1 << 26) << irq;
+        }
+        if (type & __IRQT_FALEDGE) {
+                DEBUG_IRQ("falling edges\n");
+                val &= ~((1 << 26) << irq);
+        }
+        if (type & __IRQT_LOWLVL) {
+                DEBUG_IRQ("low level\n");
+                val &= ~((1 << 26) << irq);
+        }
+        if (type & __IRQT_HIGHLVL) {
+                DEBUG_IRQ("high level\n");
+                val |= (1 << 26) << irq;
+        }
+        writel(val, NETX_DPMAS_IF_CONF1);
+        return 0;
+}
+static void
+netx_hif_ack_irq(unsigned int _irq)
+{
+        unsigned int val, irq;
+        irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+        writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
+        val = readl(NETX_DPMAS_INT_EN);
+        val &= ~((1 << 24) << irq);
+        writel(val, NETX_DPMAS_INT_EN);
+        DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
+}
+static void
+netx_hif_mask_irq(unsigned int _irq)
+{
+        unsigned int val, irq;
+        irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+        val = readl(NETX_DPMAS_INT_EN);
+        val &= ~((1 << 24) << irq);
+        writel(val, NETX_DPMAS_INT_EN);
+        DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
+}
+static void
+netx_hif_unmask_irq(unsigned int _irq)
+{
+        unsigned int val, irq;
+        irq = _irq - NETX_IRQ_HIF_CHAINED(0);
+        val = readl(NETX_DPMAS_INT_EN);
+        val |= (1 << 24) << irq;
+        writel(val, NETX_DPMAS_INT_EN);
+        DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq);
+}
+static struct irqchip netx_hif_chip = {
+        .ack = netx_hif_ack_irq,
+        .mask = netx_hif_mask_irq,
+        .unmask = netx_hif_unmask_irq,
+        .set_type = netx_hif_irq_type,
+};
+void __init netx_init_irq(void)
+{
+        int irq;
+        vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0);
+        for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
+                set_irq_chip(irq, &netx_hif_chip);
+                set_irq_handler(irq, do_level_IRQ);
+                set_irq_flags(irq, IRQF_VALID);
+        }
+        writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
+        set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
+}
+static int __init netx_init(void)
+{
+        return platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+subsys_initcall(netx_init);
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h
new file mode 100644
index 000000000000..ede2d35341c3
--- /dev/null
+++ b/arch/arm/mach-netx/generic.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-netx/generic.h
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+extern void __init netx_map_io(void);
+extern void __init netx_init_irq(void);
+struct sys_timer;
+extern struct sys_timer netx_timer;
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
new file mode 100644
index 000000000000..e4a133d62846
--- /dev/null
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -0,0 +1,210 @@
+/*
+ * arch/arm/mach-netx/nxdb500.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/plat-ram.h>
+#include <linux/platform_device.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/arch/netx-regs.h>
+#include <asm/arch/eth.h>
+#include "generic.h"
+#include "fb.h"
+static struct clcd_panel qvga = {
+        .mode           = {
+                .name           = "QVGA",
+                .refresh        = 60,
+                .xres           = 240,
+                .yres           = 320,
+                .pixclock       = 187617,
+                .left_margin    = 6,
+                .right_margin   = 26,
+                .upper_margin   = 0,
+                .lower_margin   = 6,
+                .hsync_len      = 6,
+                .vsync_len      = 1,
+                .sync           = 0,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           =  16,
+        .cntl           = CNTL_LCDTFT | CNTL_BGR,
+        .bpp            = 16,
+        .grayscale      = 0,
+};
+static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
+{
+        var->green.length = 5;
+        var->green.msb_right = 0;
+        return clcdfb_check(fb, var);
+}
+static int nxdb500_clcd_setup(struct clcd_fb *fb)
+{
+        unsigned int val;
+        fb->fb.var.green.length = 5;
+        fb->fb.var.green.msb_right = 0;
+        /* enable asic control */
+        val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
+        writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
+        writel(3, NETX_SYSTEM_IOC_CR);
+        val = readl(NETX_PIO_OUTPIO);
+        writel(val | 1, NETX_PIO_OUTPIO);
+        val = readl(NETX_PIO_OEPIO);
+        writel(val | 1, NETX_PIO_OEPIO);
+        return netx_clcd_setup(fb);
+}
+static struct clcd_board clcd_data = {
+        .name           = "netX",
+        .check          = nxdb500_check,
+        .decode         = clcdfb_decode,
+        .enable         = netx_clcd_enable,
+        .setup          = nxdb500_clcd_setup,
+        .mmap           = netx_clcd_mmap,
+        .remove         = netx_clcd_remove,
+};
+static struct netxeth_platform_data eth0_platform_data = {
+        .xcno = 0,
+};
+static struct platform_device netx_eth0_device = {
+        .name           = "netx-eth",
+        .id             = 0,
+        .num_resources  = 0,
+        .resource       = NULL,
+        .dev = {
+                .platform_data = &eth0_platform_data,
+        }
+};
+static struct netxeth_platform_data eth1_platform_data = {
+        .xcno = 1,
+};
+static struct platform_device netx_eth1_device = {
+        .name           = "netx-eth",
+        .id             = 1,
+        .num_resources  = 0,
+        .resource       = NULL,
+        .dev = {
+                .platform_data = &eth1_platform_data,
+        }
+};
+static struct resource netx_uart0_resources[] = {
+        [0] = {
+                .start  = 0x00100A00,
+                .end    = 0x00100A3F,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = (NETX_IRQ_UART0),
+                .end    = (NETX_IRQ_UART0),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device netx_uart0_device = {
+        .name           = "netx-uart",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(netx_uart0_resources),
+        .resource       = netx_uart0_resources,
+};
+static struct resource netx_uart1_resources[] = {
+        [0] = {
+                .start  = 0x00100A40,
+                .end    = 0x00100A7F,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = (NETX_IRQ_UART1),
+                .end    = (NETX_IRQ_UART1),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device netx_uart1_device = {
+        .name           = "netx-uart",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(netx_uart1_resources),
+        .resource       = netx_uart1_resources,
+};
+static struct resource netx_uart2_resources[] = {
+        [0] = {
+                .start  = 0x00100A80,
+                .end    = 0x00100ABF,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = (NETX_IRQ_UART2),
+                .end    = (NETX_IRQ_UART2),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device netx_uart2_device = {
+        .name           = "netx-uart",
+        .id             = 2,
+        .num_resources  = ARRAY_SIZE(netx_uart2_resources),
+        .resource       = netx_uart2_resources,
+};
+static struct platform_device *devices[] __initdata = {
+        &netx_eth0_device,
+        &netx_eth1_device,
+        &netx_uart0_device,
+        &netx_uart1_device,
+        &netx_uart2_device,
+};
+static void __init nxdb500_init(void)
+{
+        netx_fb_init(&clcd_data, &qvga);
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+MACHINE_START(NXDB500, "Hilscher nxdb500")
+        .phys_io        = 0x00100000,
+        .io_pg_offst    = (io_p2v(0x00100000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = netx_map_io,
+        .init_irq       = netx_init_irq,
+        .timer          = &netx_timer,
+        .init_machine   = nxdb500_init,
+MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
new file mode 100644
index 000000000000..7e26c42d1ac7
--- /dev/null
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -0,0 +1,103 @@
+/*
+ * arch/arm/mach-netx/nxdkn.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/plat-ram.h>
+#include <linux/platform_device.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/arch/netx-regs.h>
+#include <asm/arch/eth.h>
+#include "generic.h"
+static struct netxeth_platform_data eth0_platform_data = {
+        .xcno = 0,
+};
+static struct platform_device nxdkn_eth0_device = {
+        .name           = "netx-eth",
+        .id             = 0,
+        .num_resources  = 0,
+        .resource       = NULL,
+        .dev = {
+                .platform_data = &eth0_platform_data,
+        }
+};
+static struct netxeth_platform_data eth1_platform_data = {
+        .xcno = 1,
+};
+static struct platform_device nxdkn_eth1_device = {
+        .name           = "netx-eth",
+        .id             = 1,
+        .num_resources  = 0,
+        .resource       = NULL,
+        .dev = {
+                .platform_data = &eth1_platform_data,
+        }
+};
+static struct resource netx_uart0_resources[] = {
+        [0] = {
+                .start  = 0x00100A00,
+                .end    = 0x00100A3F,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = (NETX_IRQ_UART0),
+                .end    = (NETX_IRQ_UART0),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device netx_uart0_device = {
+        .name           = "netx-uart",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(netx_uart0_resources),
+        .resource       = netx_uart0_resources,
+};
+static struct platform_device *devices[] __initdata = {
+        &nxdkn_eth0_device,
+        &nxdkn_eth1_device,
+        &netx_uart0_device,
+};
+static void __init nxdkn_init(void)
+{
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+MACHINE_START(NXDKN, "Hilscher nxdkn")
+        .phys_io        = 0x00100000,
+        .io_pg_offst    = (io_p2v(0x00100000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = netx_map_io,
+        .init_irq       = netx_init_irq,
+        .timer          = &netx_timer,
+        .init_machine   = nxdkn_init,
+MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
new file mode 100644
index 000000000000..53e10a9849f9
--- /dev/null
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -0,0 +1,187 @@
+/*
+ * arch/arm/mach-netx/nxeb500hmi.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/plat-ram.h>
+#include <linux/platform_device.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/clcd.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/arch/netx-regs.h>
+#include <asm/arch/eth.h>
+#include "generic.h"
+#include "fb.h"
+static struct clcd_panel qvga = {
+        .mode           = {
+                .name           = "QVGA",
+                .refresh        = 60,
+                .xres           = 240,
+                .yres           = 320,
+                .pixclock       = 187617,
+                .left_margin    = 6,
+                .right_margin   = 26,
+                .upper_margin   = 0,
+                .lower_margin   = 6,
+                .hsync_len      = 6,
+                .vsync_len      = 1,
+                .sync           = 0,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           =  16,
+        .cntl           = CNTL_LCDTFT | CNTL_BGR,
+        .bpp            = 16,
+        .grayscale      = 0,
+};
+static inline int nxeb500hmi_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
+{
+        var->green.length = 5;
+        var->green.msb_right = 0;
+        return clcdfb_check(fb, var);
+}
+static int nxeb500hmi_clcd_setup(struct clcd_fb *fb)
+{
+        unsigned int val;
+        fb->fb.var.green.length = 5;
+        fb->fb.var.green.msb_right = 0;
+        /* enable asic control */
+        val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
+        writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
+        writel(3, NETX_SYSTEM_IOC_CR);
+        /* GPIO 14 is used for display enable on newer boards */
+        writel(9, NETX_GPIO_CFG(14));
+        val = readl(NETX_PIO_OUTPIO);
+        writel(val | 1, NETX_PIO_OUTPIO);
+        val = readl(NETX_PIO_OEPIO);
+        writel(val | 1, NETX_PIO_OEPIO);
+        return netx_clcd_setup(fb);
+}
+static struct clcd_board clcd_data = {
+        .name           = "netX",
+        .check          = nxeb500hmi_check,
+        .decode         = clcdfb_decode,
+        .enable         = netx_clcd_enable,
+        .setup          = nxeb500hmi_clcd_setup,
+        .mmap           = netx_clcd_mmap,
+        .remove         = netx_clcd_remove,
+};
+static struct netxeth_platform_data eth0_platform_data = {
+        .xcno = 0,
+};
+static struct platform_device netx_eth0_device = {
+        .name           = "netx-eth",
+        .id             = 0,
+        .num_resources  = 0,
+        .resource       = NULL,
+        .dev = {
+                .platform_data = &eth0_platform_data,
+        }
+};
+static struct netxeth_platform_data eth1_platform_data = {
+        .xcno = 1,
+};
+static struct platform_device netx_eth1_device = {
+        .name           = "netx-eth",
+        .id             = 1,
+        .num_resources  = 0,
+        .resource       = NULL,
+        .dev = {
+                .platform_data = &eth1_platform_data,
+        }
+};
+static struct resource netx_cf_resources[] = {
+        [0] = {
+                .start  = 0x20000000,
+                .end    = 0x25ffffff,
+                .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
+        },
+};
+static struct platform_device netx_cf_device = {
+        .name           = "netx-cf",
+        .id             = 0,
+        .resource       = netx_cf_resources,
+        .num_resources  = ARRAY_SIZE(netx_cf_resources),
+};
+static struct resource netx_uart0_resources[] = {
+        [0] = {
+                .start  = 0x00100A00,
+                .end    = 0x00100A3F,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = (NETX_IRQ_UART0),
+                .end    = (NETX_IRQ_UART0),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device netx_uart0_device = {
+        .name           = "netx-uart",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(netx_uart0_resources),
+        .resource       = netx_uart0_resources,
+};
+static struct platform_device *devices[] __initdata = {
+        &netx_eth0_device,
+        &netx_eth1_device,
+        &netx_cf_device,
+        &netx_uart0_device,
+};
+static void __init nxeb500hmi_init(void)
+{
+        netx_fb_init(&clcd_data, &qvga);
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
+        .phys_io        = 0x00100000,
+        .io_pg_offst    = (io_p2v(0x00100000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = netx_map_io,
+        .init_irq       = netx_init_irq,
+        .timer          = &netx_timer,
+        .init_machine   = nxeb500hmi_init,
+MACHINE_END
diff --git a/arch/arm/mach-netx/pfifo.c b/arch/arm/mach-netx/pfifo.c
new file mode 100644
index 000000000000..44dea61a9de4
--- /dev/null
+++ b/arch/arm/mach-netx/pfifo.c
@@ -0,0 +1,68 @@
+/*
+ * arch/arm/mach-netx/pfifo.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/arch/netx-regs.h>
+#include <asm/arch/pfifo.h>
+static DEFINE_MUTEX(pfifo_lock);
+static unsigned int pfifo_used = 0;
+int pfifo_request(unsigned int pfifo_mask)
+{
+        int err = 0;
+        unsigned int val;
+        mutex_lock(&pfifo_lock);
+        if (pfifo_mask & pfifo_used) {
+                err = -EBUSY;
+                goto out;
+        }
+        pfifo_used |= pfifo_mask;
+        val = readl(NETX_PFIFO_RESET);
+        writel(val | pfifo_mask, NETX_PFIFO_RESET);
+        writel(val, NETX_PFIFO_RESET);
+out:
+        mutex_unlock(&pfifo_lock);
+        return err;
+}
+void pfifo_free(unsigned int pfifo_mask)
+{
+        mutex_lock(&pfifo_lock);
+        pfifo_used &= ~pfifo_mask;
+        mutex_unlock(&pfifo_lock);
+}
+EXPORT_SYMBOL(pfifo_push);
+EXPORT_SYMBOL(pfifo_pop);
+EXPORT_SYMBOL(pfifo_fill_level);
+EXPORT_SYMBOL(pfifo_empty);
+EXPORT_SYMBOL(pfifo_request);
+EXPORT_SYMBOL(pfifo_free);
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
new file mode 100644
index 000000000000..edfbdf40c600
--- /dev/null
+++ b/arch/arm/mach-netx/time.c
@@ -0,0 +1,88 @@
+/*
+ * arch/arm/mach-netx/time.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/mach/time.h>
+#include <asm/arch/netx-regs.h>
+/*
+ * Returns number of us since last clock interrupt.  Note that interrupts
+ * will have been disabled by do_gettimeoffset()
+ */
+static unsigned long netx_gettimeoffset(void)
+{
+        return readl(NETX_GPIO_COUNTER_CURRENT(0)) / 100;
+}
+/*
+ * IRQ handler for the timer
+ */
+static irqreturn_t
+netx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+        write_seqlock(&xtime_lock);
+        timer_tick(regs);
+        write_sequnlock(&xtime_lock);
+        /* acknowledge interrupt */
+        writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
+        return IRQ_HANDLED;
+}
+static struct irqaction netx_timer_irq = {
+        .name           = "NetX Timer Tick",
+        .flags          = SA_INTERRUPT | SA_TIMER,
+        .handler        = netx_timer_interrupt,
+};
+/*
+ * Set up timer interrupt
+ */
+static void __init netx_timer_init(void)
+{
+        /* disable timer initially */
+        writel(0, NETX_GPIO_COUNTER_CTRL(0));
+        /* Reset the timer value to zero */
+        writel(0, NETX_GPIO_COUNTER_CURRENT(0));
+        writel(LATCH, NETX_GPIO_COUNTER_MAX(0));
+        /* acknowledge interrupt */
+        writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
+        /* Enable the interrupt in the specific timer register and start timer */
+        writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE);
+        writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN,
+                NETX_GPIO_COUNTER_CTRL(0));
+        setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq);
+}
+struct sys_timer netx_timer = {
+        .init           = netx_timer_init,
+        .offset         = netx_gettimeoffset,
+};
diff --git a/arch/arm/mach-netx/xc.c b/arch/arm/mach-netx/xc.c
new file mode 100644
index 000000000000..172a058ddd66
--- /dev/null
+++ b/arch/arm/mach-netx/xc.c
@@ -0,0 +1,255 @@
+/*
+ * arch/arm/mach-netx/xc.c
+ *
+ * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/firmware.h>
+#include <linux/mutex.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/arch/netx-regs.h>
+#include <asm/arch/xc.h>
+static DEFINE_MUTEX(xc_lock);
+static int xc_in_use = 0;
+struct fw_desc {
+        unsigned int ofs;
+        unsigned int size;
+        unsigned int patch_ofs;
+        unsigned int patch_entries;
+};
+struct fw_header {
+        unsigned int magic;
+        unsigned int type;
+        unsigned int version;
+        unsigned int reserved[5];
+        struct fw_desc fw_desc[3];
+} __attribute__ ((packed));
+int xc_stop(struct xc *x)
+{
+        writel(RPU_HOLD_PC, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS);
+        writel(TPU_HOLD_PC, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS);
+        writel(XPU_HOLD_PC, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS);
+        return 0;
+}
+int xc_start(struct xc *x)
+{
+        writel(0, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS);
+        writel(0, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS);
+        writel(0, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS);
+        return 0;
+}
+int xc_running(struct xc *x)
+{
+        return (readl(x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS) & RPU_HOLD_PC)
+            || (readl(x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS) & TPU_HOLD_PC)
+            || (readl(x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS) & XPU_HOLD_PC) ?
+                0 : 1;
+}
+int xc_reset(struct xc *x)
+{
+        writel(0, x->xpec_base + NETX_XPEC_PC_OFS);
+        return 0;
+}
+static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size)
+{
+        if (adr >= NETX_PA_XMAC(x->no) &&
+            adr + size < NETX_PA_XMAC(x->no) + XMAC_MEM_SIZE)
+                return 0;
+        if (adr >= NETX_PA_XPEC(x->no) &&
+            adr + size < NETX_PA_XPEC(x->no) + XPEC_MEM_SIZE)
+                return 0;
+        dev_err(x->dev, "Illegal pointer in firmware found. aborting\n");
+        return -1;
+}
+static int xc_patch(struct xc *x, void *patch, int count)
+{
+        unsigned int val, adr;
+        unsigned int *data = patch;
+        int i;
+        for (i = 0; i < count; i++) {
+                adr = *data++;
+                val = *data++;
+                if (xc_check_ptr(x, adr, 4) < 0)
+                        return -EINVAL;
+                writel(val, (void __iomem *)io_p2v(adr));
+        }
+        return 0;
+}
+int xc_request_firmware(struct xc *x)
+{
+        int ret;
+        char name[16];
+        const struct firmware *fw;
+        struct fw_header *head;
+        unsigned int size;
+        int i;
+        void *src;
+        unsigned long dst;
+        sprintf(name, "xc%d.bin", x->no);
+        ret = request_firmware(&fw, name, x->dev);
+        if (ret < 0) {
+                dev_err(x->dev, "request_firmware failed\n");
+                return ret;
+        }
+        head = (struct fw_header *)fw->data;
+        if (head->magic != 0x4e657458) {
+                if (head->magic == 0x5874654e) {
+                        dev_err(x->dev,
+                            "firmware magic is 'XteN'. Endianess problems?\n");
+                        ret = -ENODEV;
+                        goto exit_release_firmware;
+                }
+                dev_err(x->dev, "unrecognized firmware magic 0x%08x\n",
+                        head->magic);
+                ret = -ENODEV;
+                goto exit_release_firmware;
+        }
+        x->type = head->type;
+        x->version = head->version;
+        ret = -EINVAL;
+        for (i = 0; i < 3; i++) {
+                src = fw->data + head->fw_desc[i].ofs;
+                dst = *(unsigned int *)src;
+                src += sizeof (unsigned int);
+                size = head->fw_desc[i].size - sizeof (unsigned int);
+                if (xc_check_ptr(x, dst, size))
+                        goto exit_release_firmware;
+                memcpy((void *)io_p2v(dst), src, size);
+                src = fw->data + head->fw_desc[i].patch_ofs;
+                size = head->fw_desc[i].patch_entries;
+                ret = xc_patch(x, src, size);
+                if (ret < 0)
+                        goto exit_release_firmware;
+        }
+        ret = 0;
+      exit_release_firmware:
+        release_firmware(fw);
+        return ret;
+}
+struct xc *request_xc(int xcno, struct device *dev)
+{
+        struct xc *x = NULL;
+        mutex_lock(&xc_lock);
+        if (xcno > 3)
+                goto exit;
+        if (xc_in_use & (1 << xcno))
+                goto exit;
+        x = kmalloc(sizeof (struct xc), GFP_KERNEL);
+        if (!x)
+                goto exit;
+        if (!request_mem_region
+            (NETX_PA_XPEC(xcno), XPEC_MEM_SIZE, dev->kobj.name))
+                goto exit_free;
+        if (!request_mem_region
+            (NETX_PA_XMAC(xcno), XMAC_MEM_SIZE, dev->kobj.name))
+                goto exit_release_1;
+        if (!request_mem_region
+            (SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE, dev->kobj.name))
+                goto exit_release_2;
+        x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno));
+        x->xmac_base = (void * __iomem)io_p2v(NETX_PA_XMAC(xcno));
+        x->sram_base = ioremap(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE);
+        if (!x->sram_base)
+                goto exit_release_3;
+        x->irq = NETX_IRQ_XPEC(xcno);
+        x->no = xcno;
+        x->dev = dev;
+        xc_in_use |= (1 << xcno);
+        goto exit;
+      exit_release_3:
+        release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE);
+      exit_release_2:
+        release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE);
+      exit_release_1:
+        release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE);
+      exit_free:
+        kfree(x);
+        x = NULL;
+      exit:
+        mutex_unlock(&xc_lock);
+        return x;
+}
+void free_xc(struct xc *x)
+{
+        int xcno = x->no;
+        mutex_lock(&xc_lock);
+        iounmap(x->sram_base);
+        release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE);
+        release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE);
+        release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE);
+        xc_in_use &= ~(1 << x->no);
+        kfree(x);
+        mutex_unlock(&xc_lock);
+}
+EXPORT_SYMBOL(free_xc);
+EXPORT_SYMBOL(request_xc);
+EXPORT_SYMBOL(xc_request_firmware);
+EXPORT_SYMBOL(xc_reset);
+EXPORT_SYMBOL(xc_running);
+EXPORT_SYMBOL(xc_start);
+EXPORT_SYMBOL(xc_stop);
diff --git a/arch/arm/mach-pnx4008/Makefile b/arch/arm/mach-pnx4008/Makefile
new file mode 100644
index 000000000000..b457ca0a431a
--- /dev/null
+++ b/arch/arm/mach-pnx4008/Makefile
@@ -0,0 +1,12 @@
+#
+# Makefile for the linux kernel.
+#
+obj-y                   := core.o irq.o time.o clock.o gpio.o serial.o dma.o
+obj-m                   :=
+obj-n                   :=
+obj-                    :=
+# Power Management
+obj-$(CONFIG_PM) += pm.o sleep.o
diff --git a/arch/arm/mach-pnx4008/Makefile.boot b/arch/arm/mach-pnx4008/Makefile.boot
new file mode 100644
index 000000000000..44c7117e20dd
--- /dev/null
+++ b/arch/arm/mach-pnx4008/Makefile.boot
@@ -0,0 +1,4 @@
+   zreladdr-y           := 0x80008000
+params_phys-y           := 0x80000100
+initrd_phys-y           := 0x80800000
diff --git a/arch/arm/mach-pnx4008/clock.c b/arch/arm/mach-pnx4008/clock.c
new file mode 100644
index 000000000000..285b22f631e9
--- /dev/null
+++ b/arch/arm/mach-pnx4008/clock.c
@@ -0,0 +1,1010 @@
+/*
+ * arch/arm/mach-pnx4008/clock.c
+ *
+ * Clock control driver for PNX4008
+ *
+ * Authors: Vitaly Wool, Dmitry Chigirev <source@mvista.com>
+ * Generic clock management functions are partially based on:
+ *  linux/arch/arm/mach-omap/clock.c
+ *
+ * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <asm/semaphore.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include "clock.h"
+/*forward declaration*/
+static struct clk per_ck;
+static struct clk hclk_ck;
+static struct clk ck_1MHz;
+static struct clk ck_13MHz;
+static struct clk ck_pll1;
+static int local_set_rate(struct clk *clk, u32 rate);
+static inline void clock_lock(void)
+{
+        local_irq_disable();
+}
+static inline void clock_unlock(void)
+{
+        local_irq_enable();
+}
+static void propagate_rate(struct clk *clk)
+{
+        struct clk *tmp_clk;
+        tmp_clk = clk;
+        while (tmp_clk->propagate_next) {
+                tmp_clk = tmp_clk->propagate_next;
+                local_set_rate(tmp_clk, tmp_clk->user_rate);
+        }
+}
+static inline void clk_reg_disable(struct clk *clk)
+{
+        if (clk->enable_reg)
+                __raw_writel(__raw_readl(clk->enable_reg) &
+                             ~(1 << clk->enable_shift), clk->enable_reg);
+}
+static inline void clk_reg_enable(struct clk *clk)
+{
+        if (clk->enable_reg)
+                __raw_writel(__raw_readl(clk->enable_reg) |
+                             (1 << clk->enable_shift), clk->enable_reg);
+}
+static inline void clk_reg_disable1(struct clk *clk)
+{
+        if (clk->enable_reg1)
+                __raw_writel(__raw_readl(clk->enable_reg1) &
+                             ~(1 << clk->enable_shift1), clk->enable_reg1);
+}
+static inline void clk_reg_enable1(struct clk *clk)
+{
+        if (clk->enable_reg1)
+                __raw_writel(__raw_readl(clk->enable_reg1) |
+                             (1 << clk->enable_shift1), clk->enable_reg1);
+}
+static int clk_wait_for_pll_lock(struct clk *clk)
+{
+        int i;
+        i = 0;
+        while (i++ < 0xFFF && !(__raw_readl(clk->scale_reg) & 1)) ;     /*wait for PLL to lock */
+        if (!(__raw_readl(clk->scale_reg) & 1)) {
+                printk(KERN_ERR
+                       "%s ERROR: failed to lock, scale reg data: %x\n",
+                       clk->name, __raw_readl(clk->scale_reg));
+                return -1;
+        }
+        return 0;
+}
+static int switch_to_dirty_13mhz(struct clk *clk)
+{
+        int i;
+        int ret;
+        u32 tmp_reg;
+        ret = 0;
+        if (!clk->rate)
+                clk_reg_enable1(clk);
+        tmp_reg = __raw_readl(clk->parent_switch_reg);
+        /*if 13Mhz clock selected, select 13'MHz (dirty) source from OSC */
+        if (!(tmp_reg & 1)) {
+                tmp_reg |= (1 << 1);    /* Trigger switch to 13'MHz (dirty) clock */
+                __raw_writel(tmp_reg, clk->parent_switch_reg);
+                i = 0;
+                while (i++ < 0xFFF && !(__raw_readl(clk->parent_switch_reg) & 1)) ;     /*wait for 13'MHz selection status */
+                if (!(__raw_readl(clk->parent_switch_reg) & 1)) {
+                        printk(KERN_ERR
+                               "%s ERROR: failed to select 13'MHz, parent sw reg data: %x\n",
+                               clk->name, __raw_readl(clk->parent_switch_reg));
+                        ret = -1;
+                }
+        }
+        if (!clk->rate)
+                clk_reg_disable1(clk);
+        return ret;
+}
+static int switch_to_clean_13mhz(struct clk *clk)
+{
+        int i;
+        int ret;
+        u32 tmp_reg;
+        ret = 0;
+        if (!clk->rate)
+                clk_reg_enable1(clk);
+        tmp_reg = __raw_readl(clk->parent_switch_reg);
+        /*if 13'Mhz clock selected, select 13MHz (clean) source from OSC */
+        if (tmp_reg & 1) {
+                tmp_reg &= ~(1 << 1);   /* Trigger switch to 13MHz (clean) clock */
+                __raw_writel(tmp_reg, clk->parent_switch_reg);
+                i = 0;
+                while (i++ < 0xFFF && (__raw_readl(clk->parent_switch_reg) & 1)) ;      /*wait for 13MHz selection status */
+                if (__raw_readl(clk->parent_switch_reg) & 1) {
+                        printk(KERN_ERR
+                               "%s ERROR: failed to select 13MHz, parent sw reg data: %x\n",
+                               clk->name, __raw_readl(clk->parent_switch_reg));
+                        ret = -1;
+                }
+        }
+        if (!clk->rate)
+                clk_reg_disable1(clk);
+        return ret;
+}
+static int set_13MHz_parent(struct clk *clk, struct clk *parent)
+{
+        int ret = -EINVAL;
+        if (parent == &ck_13MHz)
+                ret = switch_to_clean_13mhz(clk);
+        else if (parent == &ck_pll1)
+                ret = switch_to_dirty_13mhz(clk);
+        return ret;
+}
+#define PLL160_MIN_FCCO 156000
+#define PLL160_MAX_FCCO 320000
+/*
+ * Calculate pll160 settings.
+ * Possible input: up to 320MHz with step of clk->parent->rate.
+ * In PNX4008 parent rate for pll160s may be either 1 or 13MHz.
+ * Ignored paths: "feedback" (bit 13 set), "div-by-N".
+ * Setting ARM PLL4 rate to 0 will put CPU into direct run mode.
+ * Setting PLL5 and PLL3 rate to 0 will disable USB and DSP clock input.
+ * Please refer to PNX4008 IC manual for details.
+ */
+static int pll160_set_rate(struct clk *clk, u32 rate)
+{
+        u32 tmp_reg, tmp_m, tmp_2p, i;
+        u32 parent_rate;
+        int ret = -EINVAL;
+        parent_rate = clk->parent->rate;
+        if (!parent_rate)
+                goto out;
+        /* set direct run for ARM or disable output for others  */
+        clk_reg_disable(clk);
+        /* disable source input as well (ignored for ARM) */
+        clk_reg_disable1(clk);
+        tmp_reg = __raw_readl(clk->scale_reg);
+        tmp_reg &= ~0x1ffff;    /*clear all settings, power down */
+        __raw_writel(tmp_reg, clk->scale_reg);
+        rate -= rate % parent_rate;     /*round down the input */
+        if (rate > PLL160_MAX_FCCO)
+                rate = PLL160_MAX_FCCO;
+        if (!rate) {
+                clk->rate = 0;
+                ret = 0;
+                goto out;
+        }
+        clk_reg_enable1(clk);
+        tmp_reg = __raw_readl(clk->scale_reg);
+        if (rate == parent_rate) {
+                /*enter direct bypass mode */
+                tmp_reg |= ((1 << 14) | (1 << 15));
+                __raw_writel(tmp_reg, clk->scale_reg);
+                clk->rate = parent_rate;
+                clk_reg_enable(clk);
+                ret = 0;
+                goto out;
+        }
+        i = 0;
+        for (tmp_2p = 1; tmp_2p < 16; tmp_2p <<= 1) {
+                if (rate * tmp_2p >= PLL160_MIN_FCCO)
+                        break;
+                i++;
+        }
+        if (tmp_2p > 1)
+                tmp_reg |= ((i - 1) << 11);
+        else
+                tmp_reg |= (1 << 14);   /*direct mode, no divide */
+        tmp_m = rate * tmp_2p;
+        tmp_m /= parent_rate;
+        tmp_reg |= (tmp_m - 1) << 1;    /*calculate M */
+        tmp_reg |= (1 << 16);   /*power up PLL */
+        __raw_writel(tmp_reg, clk->scale_reg);
+        if (clk_wait_for_pll_lock(clk) < 0) {
+                clk_reg_disable(clk);
+                clk_reg_disable1(clk);
+                tmp_reg = __raw_readl(clk->scale_reg);
+                tmp_reg &= ~0x1ffff;    /*clear all settings, power down */
+                __raw_writel(tmp_reg, clk->scale_reg);
+                clk->rate = 0;
+                ret = -EFAULT;
+                goto out;
+        }
+        clk->rate = (tmp_m * parent_rate) / tmp_2p;
+        if (clk->flags & RATE_PROPAGATES)
+                propagate_rate(clk);
+        clk_reg_enable(clk);
+        ret = 0;
+out:
+        return ret;
+}
+/*configure PER_CLK*/
+static int per_clk_set_rate(struct clk *clk, u32 rate)
+{
+        u32 tmp;
+        tmp = __raw_readl(clk->scale_reg);
+        tmp &= ~(0x1f << 2);
+        tmp |= ((clk->parent->rate / clk->rate) - 1) << 2;
+        __raw_writel(tmp, clk->scale_reg);
+        clk->rate = rate;
+        return 0;
+}
+/*configure HCLK*/
+static int hclk_set_rate(struct clk *clk, u32 rate)
+{
+        u32 tmp;
+        tmp = __raw_readl(clk->scale_reg);
+        tmp = tmp & ~0x3;
+        switch (rate) {
+        case 1:
+                break;
+        case 2:
+                tmp |= 1;
+                break;
+        case 4:
+                tmp |= 2;
+                break;
+        }
+        __raw_writel(tmp, clk->scale_reg);
+        clk->rate = rate;
+        return 0;
+}
+static u32 hclk_round_rate(struct clk *clk, u32 rate)
+{
+        switch (rate) {
+        case 1:
+        case 4:
+                return rate;
+        }
+        return 2;
+}
+static u32 per_clk_round_rate(struct clk *clk, u32 rate)
+{
+        return CLK_RATE_13MHZ;
+}
+static int on_off_set_rate(struct clk *clk, u32 rate)
+{
+        if (rate) {
+                clk_reg_enable(clk);
+                clk->rate = 1;
+        } else {
+                clk_reg_disable(clk);
+                clk->rate = 0;
+        }
+        return 0;
+}
+static int on_off_inv_set_rate(struct clk *clk, u32 rate)
+{
+        if (rate) {
+                clk_reg_disable(clk);   /*enable bit is inverted */
+                clk->rate = 1;
+        } else {
+                clk_reg_enable(clk);
+                clk->rate = 0;
+        }
+        return 0;
+}
+static u32 on_off_round_rate(struct clk *clk, u32 rate)
+{
+        return (rate ? 1 : 0);
+}
+static u32 pll4_round_rate(struct clk *clk, u32 rate)
+{
+        if (rate > CLK_RATE_208MHZ)
+                rate = CLK_RATE_208MHZ;
+        if (rate == CLK_RATE_208MHZ && hclk_ck.user_rate == 1)
+                rate = CLK_RATE_208MHZ - CLK_RATE_13MHZ;
+        return (rate - (rate % (hclk_ck.user_rate * CLK_RATE_13MHZ)));
+}
+static u32 pll3_round_rate(struct clk *clk, u32 rate)
+{
+        if (rate > CLK_RATE_208MHZ)
+                rate = CLK_RATE_208MHZ;
+        return (rate - rate % CLK_RATE_13MHZ);
+}
+static u32 pll5_round_rate(struct clk *clk, u32 rate)
+{
+        return (rate ? CLK_RATE_48MHZ : 0);
+}
+static u32 ck_13MHz_round_rate(struct clk *clk, u32 rate)
+{
+        return (rate ? CLK_RATE_13MHZ : 0);
+}
+static int ck_13MHz_set_rate(struct clk *clk, u32 rate)
+{
+        if (rate) {
+                clk_reg_disable(clk);   /*enable bit is inverted */
+                udelay(500);
+                clk->rate = CLK_RATE_13MHZ;
+                ck_1MHz.rate = CLK_RATE_1MHZ;
+        } else {
+                clk_reg_enable(clk);
+                clk->rate = 0;
+                ck_1MHz.rate = 0;
+        }
+        return 0;
+}
+static int pll1_set_rate(struct clk *clk, u32 rate)
+{
+#if 0 /* doesn't work on some boards, probably a HW BUG */
+        if (rate) {
+                clk_reg_disable(clk);   /*enable bit is inverted */
+                if (!clk_wait_for_pll_lock(clk)) {
+                        clk->rate = CLK_RATE_13MHZ;
+                } else {
+                        clk_reg_enable(clk);
+                        clk->rate = 0;
+                }
+        } else {
+                clk_reg_enable(clk);
+                clk->rate = 0;
+        }
+#endif
+        return 0;
+}
+/* Clock sources */
+static struct clk osc_13MHz = {
+        .name = "osc_13MHz",
+        .flags = FIXED_RATE,
+        .rate = CLK_RATE_13MHZ,
+};
+static struct clk ck_13MHz = {
+        .name = "ck_13MHz",
+        .parent = &osc_13MHz,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &ck_13MHz_round_rate,
+        .set_rate = &ck_13MHz_set_rate,
+        .enable_reg = OSC13CTRL_REG,
+        .enable_shift = 0,
+        .rate = CLK_RATE_13MHZ,
+};
+static struct clk osc_32KHz = {
+        .name = "osc_32KHz",
+        .flags = FIXED_RATE,
+        .rate = CLK_RATE_32KHZ,
+};
+/*attached to PLL5*/
+static struct clk ck_1MHz = {
+        .name = "ck_1MHz",
+        .flags = FIXED_RATE | PARENT_SET_RATE,
+        .parent = &ck_13MHz,
+};
+/* PLL1 (397) - provides 13' MHz clock */
+static struct clk ck_pll1 = {
+        .name = "ck_pll1",
+        .parent = &osc_32KHz,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &ck_13MHz_round_rate,
+        .set_rate = &pll1_set_rate,
+        .enable_reg = PLLCTRL_REG,
+        .enable_shift = 1,
+        .scale_reg = PLLCTRL_REG,
+        .rate = CLK_RATE_13MHZ,
+};
+/* CPU/Bus PLL */
+static struct clk ck_pll4 = {
+        .name = "ck_pll4",
+        .parent = &ck_pll1,
+        .flags = RATE_PROPAGATES | NEEDS_INITIALIZATION,
+        .propagate_next = &per_ck,
+        .round_rate = &pll4_round_rate,
+        .set_rate = &pll160_set_rate,
+        .rate = CLK_RATE_208MHZ,
+        .scale_reg = HCLKPLLCTRL_REG,
+        .enable_reg = PWRCTRL_REG,
+        .enable_shift = 2,
+        .parent_switch_reg = SYSCLKCTRL_REG,
+        .set_parent = &set_13MHz_parent,
+};
+/* USB PLL */
+static struct clk ck_pll5 = {
+        .name = "ck_pll5",
+        .parent = &ck_1MHz,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &pll5_round_rate,
+        .set_rate = &pll160_set_rate,
+        .scale_reg = USBCTRL_REG,
+        .enable_reg = USBCTRL_REG,
+        .enable_shift = 18,
+        .enable_reg1 = USBCTRL_REG,
+        .enable_shift1 = 17,
+};
+/* XPERTTeak DSP PLL */
+static struct clk ck_pll3 = {
+        .name = "ck_pll3",
+        .parent = &ck_pll1,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &pll3_round_rate,
+        .set_rate = &pll160_set_rate,
+        .scale_reg = DSPPLLCTRL_REG,
+        .enable_reg = DSPCLKCTRL_REG,
+        .enable_shift = 3,
+        .enable_reg1 = DSPCLKCTRL_REG,
+        .enable_shift1 = 2,
+        .parent_switch_reg = DSPCLKCTRL_REG,
+        .set_parent = &set_13MHz_parent,
+};
+static struct clk hclk_ck = {
+        .name = "hclk_ck",
+        .parent = &ck_pll4,
+        .flags = PARENT_SET_RATE,
+        .set_rate = &hclk_set_rate,
+        .round_rate = &hclk_round_rate,
+        .scale_reg = HCLKDIVCTRL_REG,
+        .rate = 2,
+        .user_rate = 2,
+};
+static struct clk per_ck = {
+        .name = "per_ck",
+        .parent = &ck_pll4,
+        .flags = FIXED_RATE,
+        .propagate_next = &hclk_ck,
+        .set_rate = &per_clk_set_rate,
+        .round_rate = &per_clk_round_rate,
+        .scale_reg = HCLKDIVCTRL_REG,
+        .rate = CLK_RATE_13MHZ,
+        .user_rate = CLK_RATE_13MHZ,
+};
+static struct clk m2hclk_ck = {
+        .name = "m2hclk_ck",
+        .parent = &hclk_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_inv_set_rate,
+        .rate = 1,
+        .enable_shift = 6,
+        .enable_reg = PWRCTRL_REG,
+};
+static struct clk vfp9_ck = {
+        .name = "vfp9_ck",
+        .parent = &ck_pll4,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .rate = 1,
+        .enable_shift = 4,
+        .enable_reg = VFP9CLKCTRL_REG,
+};
+static struct clk keyscan_ck = {
+        .name = "keyscan_ck",
+        .parent = &osc_32KHz,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = KEYCLKCTRL_REG,
+};
+static struct clk touch_ck = {
+        .name = "touch_ck",
+        .parent = &osc_32KHz,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = TSCLKCTRL_REG,
+};
+static struct clk pwm1_ck = {
+        .name = "pwm1_ck",
+        .parent = &osc_32KHz,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = PWMCLKCTRL_REG,
+};
+static struct clk pwm2_ck = {
+        .name = "pwm2_ck",
+        .parent = &osc_32KHz,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 2,
+        .enable_reg = PWMCLKCTRL_REG,
+};
+static struct clk jpeg_ck = {
+        .name = "jpeg_ck",
+        .parent = &hclk_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = JPEGCLKCTRL_REG,
+};
+static struct clk ms_ck = {
+        .name = "ms_ck",
+        .parent = &ck_pll4,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 5,
+        .enable_reg = MSCTRL_REG,
+};
+static struct clk dum_ck = {
+        .name = "dum_ck",
+        .parent = &hclk_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = DUMCLKCTRL_REG,
+};
+static struct clk flash_ck = {
+        .name = "flash_ck",
+        .parent = &hclk_ck,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 1,      /* Only MLC clock supported */
+        .enable_reg = FLASHCLKCTRL_REG,
+};
+static struct clk i2c0_ck = {
+        .name = "i2c0_ck",
+        .parent = &per_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = I2CCLKCTRL_REG,
+};
+static struct clk i2c1_ck = {
+        .name = "i2c1_ck",
+        .parent = &per_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 1,
+        .enable_reg = I2CCLKCTRL_REG,
+};
+static struct clk i2c2_ck = {
+        .name = "i2c2_ck",
+        .parent = &per_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 2,
+        .enable_reg = USB_OTG_CLKCTRL_REG,
+};
+static struct clk spi0_ck = {
+        .name = "spi0_ck",
+        .parent = &hclk_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = SPICTRL_REG,
+};
+static struct clk spi1_ck = {
+        .name = "spi1_ck",
+        .parent = &hclk_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 4,
+        .enable_reg = SPICTRL_REG,
+};
+static struct clk dma_ck = {
+        .name = "dma_ck",
+        .parent = &hclk_ck,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 0,
+        .enable_reg = DMACLKCTRL_REG,
+};
+static struct clk uart3_ck = {
+        .name = "uart3_ck",
+        .parent = &per_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .rate = 1,
+        .enable_shift = 0,
+        .enable_reg = UARTCLKCTRL_REG,
+};
+static struct clk uart4_ck = {
+        .name = "uart4_ck",
+        .parent = &per_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 1,
+        .enable_reg = UARTCLKCTRL_REG,
+};
+static struct clk uart5_ck = {
+        .name = "uart5_ck",
+        .parent = &per_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .rate = 1,
+        .enable_shift = 2,
+        .enable_reg = UARTCLKCTRL_REG,
+};
+static struct clk uart6_ck = {
+        .name = "uart6_ck",
+        .parent = &per_ck,
+        .flags = NEEDS_INITIALIZATION,
+        .round_rate = &on_off_round_rate,
+        .set_rate = &on_off_set_rate,
+        .enable_shift = 3,
+        .enable_reg = UARTCLKCTRL_REG,
+};
+/* These clocks are visible outside this module
+ * and can be initialized
+ */
+static struct clk *onchip_clks[] = {
+        &ck_13MHz,
+        &ck_pll1,
+        &ck_pll4,
+        &ck_pll5,
+        &ck_pll3,
+        &vfp9_ck,
+        &m2hclk_ck,
+        &hclk_ck,
+        &dma_ck,
+        &flash_ck,
+        &dum_ck,
+        &keyscan_ck,
+        &pwm1_ck,
+        &pwm2_ck,
+        &jpeg_ck,
+        &ms_ck,
+        &touch_ck,
+        &i2c0_ck,
+        &i2c1_ck,
+        &i2c2_ck,
+        &spi0_ck,
+        &spi1_ck,
+        &uart3_ck,
+        &uart4_ck,
+        &uart5_ck,
+        &uart6_ck,
+};
+static int local_set_rate(struct clk *clk, u32 rate)
+{
+        int ret = -EINVAL;
+        if (clk->set_rate) {
+                if (clk->user_rate == clk->rate && clk->parent->rate) {
+                        /* if clock enabled or rate not set */
+                        clk->user_rate = clk->round_rate(clk, rate);
+                        ret = clk->set_rate(clk, clk->user_rate);
+                } else
+                        clk->user_rate = clk->round_rate(clk, rate);
+                ret = 0;
+        }
+        return ret;
+}
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        int ret = -EINVAL;
+        if (clk->flags & FIXED_RATE)
+                goto out;
+        clock_lock();
+        if ((clk->flags & PARENT_SET_RATE) && clk->parent) {
+                clk->user_rate = clk->round_rate(clk, rate);
+                /* parent clock needs to be refreshed
+                   for the setting to take effect */
+        } else {
+                ret = local_set_rate(clk, rate);
+        }
+        ret = 0;
+        clock_unlock();
+out:
+        return ret;
+}
+EXPORT_SYMBOL(clk_set_rate);
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        struct clk *clk = ERR_PTR(-ENOENT);
+        struct clk **clkp;
+        clock_lock();
+        for (clkp = onchip_clks; clkp < onchip_clks + ARRAY_SIZE(onchip_clks);
+             clkp++) {
+                if (strcmp(id, (*clkp)->name) == 0
+                    && try_module_get((*clkp)->owner)) {
+                        clk = (*clkp);
+                        break;
+                }
+        }
+        clock_unlock();
+        return clk;
+}
+EXPORT_SYMBOL(clk_get);
+void clk_put(struct clk *clk)
+{
+        clock_lock();
+        if (clk && !IS_ERR(clk))
+                module_put(clk->owner);
+        clock_unlock();
+}
+EXPORT_SYMBOL(clk_put);
+unsigned long clk_get_rate(struct clk *clk)
+{
+        unsigned long ret;
+        clock_lock();
+        ret = clk->rate;
+        clock_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(clk_get_rate);
+static int local_clk_enable(struct clk *clk)
+{
+        int ret = 0;
+        if (!(clk->flags & FIXED_RATE) && !clk->rate && clk->set_rate
+            && clk->user_rate)
+                ret = clk->set_rate(clk, clk->user_rate);
+        return ret;
+}
+static void local_clk_disable(struct clk *clk)
+{
+        if (!(clk->flags & FIXED_RATE) && clk->rate && clk->set_rate)
+                clk->set_rate(clk, 0);
+}
+int clk_enable(struct clk *clk)
+{
+        int ret = 0;
+        clock_lock();
+        ret = local_clk_enable(clk);
+        clock_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(clk_enable);
+void clk_disable(struct clk *clk)
+{
+        clock_lock();
+        local_clk_disable(clk);
+        clock_unlock();
+}
+EXPORT_SYMBOL(clk_disable);
+static void local_clk_unuse(struct clk *clk)
+{
+        if (clk->usecount > 0 && !(--clk->usecount)) {
+                local_clk_disable(clk);
+                if (clk->parent)
+                        local_clk_unuse(clk->parent);
+        }
+}
+static int local_clk_use(struct clk *clk)
+{
+        int ret = 0;
+        if (clk->usecount++ == 0) {
+                if (clk->parent)
+                        ret = local_clk_use(clk->parent);
+                if (ret != 0) {
+                        clk->usecount--;
+                        goto out;
+                }
+                ret = local_clk_enable(clk);
+                if (ret != 0 && clk->parent) {
+                        local_clk_unuse(clk->parent);
+                        clk->usecount--;
+                }
+        }
+out:
+        return ret;
+}
+/* The main purpose of clk_use ans clk_unuse functions
+ * is to control switching 13MHz oscillator and PLL1 (13'MHz),
+ * so that they are disabled whenever none of PLL2-5 is using them.
+ * Although in theory these functions should work with any clock,
+ * please use them only on PLL2 - PLL5 to avoid confusion.
+ */
+int clk_use(struct clk *clk)
+{
+        int ret = 0;
+        clock_lock();
+        ret = local_clk_use(clk);
+        clock_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(clk_use);
+void clk_unuse(struct clk *clk)
+{
+        clock_lock();
+        local_clk_unuse(clk);
+        clock_unlock();
+}
+EXPORT_SYMBOL(clk_unuse);
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        long ret;
+        clock_lock();
+        if (clk->round_rate)
+                ret = clk->round_rate(clk, rate);
+        else
+                ret = clk->rate;
+        clock_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(clk_round_rate);
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        int ret = -ENODEV;
+        if (!clk->set_parent)
+                goto out;
+        clock_lock();
+        ret = clk->set_parent(clk, parent);
+        if (!ret)
+                clk->parent = parent;
+        clock_unlock();
+out:
+        return ret;
+}
+EXPORT_SYMBOL(clk_set_parent);
+static int __init clk_init(void)
+{
+        struct clk **clkp;
+        /* Disable autoclocking, as it doesn't seem to work */
+        __raw_writel(0xff, AUTOCLK_CTRL);
+        for (clkp = onchip_clks; clkp < onchip_clks + ARRAY_SIZE(onchip_clks);
+             clkp++) {
+                if (((*clkp)->flags & NEEDS_INITIALIZATION)
+                    && ((*clkp)->set_rate)) {
+                        (*clkp)->user_rate = (*clkp)->rate;
+                        local_set_rate((*clkp), (*clkp)->user_rate);
+                        if ((*clkp)->set_parent)
+                                (*clkp)->set_parent((*clkp), (*clkp)->parent);
+                }
+                pr_debug("%s: clock %s, rate %ld\n",
+                        __FUNCTION__, (*clkp)->name, (*clkp)->rate);
+        }
+        clk_use(&ck_pll4);
+        /* if ck_13MHz is not used, disable it. */
+        if (ck_13MHz.usecount == 0)
+                local_clk_disable(&ck_13MHz);
+        /* Disable autoclocking */
+        __raw_writeb(0xff, AUTOCLK_CTRL);
+        return 0;
+}
+arch_initcall(clk_init);
diff --git a/arch/arm/mach-pnx4008/clock.h b/arch/arm/mach-pnx4008/clock.h
new file mode 100644
index 000000000000..cd58f372cfd0
--- /dev/null
+++ b/arch/arm/mach-pnx4008/clock.h
@@ -0,0 +1,43 @@
+/*
+ * arch/arm/mach-pnx4008/clock.h
+ *
+ * Clock control driver for PNX4008 - internal header file
+ *
+ * Author: Vitaly Wool <source@mvista.com>
+ *
+ * 2006 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#ifndef __ARCH_ARM_PNX4008_CLOCK_H__
+#define __ARCH_ARM_PNX4008_CLOCK_H__
+struct clk {
+        struct list_head node;
+        struct module *owner;
+        const char *name;
+        struct clk *parent;
+        struct clk *propagate_next;
+        u32 rate;
+        u32 user_rate;
+        s8 usecount;
+        u32 flags;
+        u32 scale_reg;
+        u8 enable_shift;
+        u32 enable_reg;
+        u8 enable_shift1;
+        u32 enable_reg1;
+        u32 parent_switch_reg;
+         u32(*round_rate) (struct clk *, u32);
+        int (*set_rate) (struct clk *, u32);
+        int (*set_parent) (struct clk * clk, struct clk * parent);
+};
+/* Flags */
+#define RATE_PROPAGATES      (1<<0)
+#define NEEDS_INITIALIZATION (1<<1)
+#define PARENT_SET_RATE      (1<<2)
+#define FIXED_RATE           (1<<3)
+#endif
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
new file mode 100644
index 000000000000..ba91daad64fb
--- /dev/null
+++ b/arch/arm/mach-pnx4008/core.c
@@ -0,0 +1,207 @@
+/*
+ * arch/arm/mach-pnx4008/core.c
+ *
+ * PNX4008 core startup code
+ *
+ * Authors: Vitaly Wool, Dmitry Chigirev,
+ * Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com>
+ *
+ * Based on reference code received from Philips:
+ * Copyright (C) 2003 Philips Semiconductors
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/serial_8250.h>
+#include <linux/device.h>
+#include <linux/spi/spi.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/system.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/map.h>
+#include <asm/mach/time.h>
+#include <asm/arch/irq.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/dma.h>
+struct resource spipnx_0_resources[] = {
+        {
+                .start = PNX4008_SPI1_BASE,
+                .end = PNX4008_SPI1_BASE + SZ_4K,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = PER_SPI1_REC_XMIT,
+                .flags = IORESOURCE_DMA,
+        }, {
+                .start = SPI1_INT,
+                .flags = IORESOURCE_IRQ,
+        }, {
+                .flags = 0,
+        },
+};
+struct resource spipnx_1_resources[] = {
+        {
+                .start = PNX4008_SPI2_BASE,
+                .end = PNX4008_SPI2_BASE + SZ_4K,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = PER_SPI2_REC_XMIT,
+                .flags = IORESOURCE_DMA,
+        }, {
+                .start = SPI2_INT,
+                .flags = IORESOURCE_IRQ,
+        }, {
+                .flags = 0,
+        }
+};
+static struct spi_board_info spi_board_info[] __initdata = {
+        {
+                .modalias       = "m25p80",
+                .max_speed_hz   = 1000000,
+                .bus_num        = 1,
+                .chip_select    = 0,
+        },
+};
+static struct platform_device spipnx_1 = {
+        .name = "spipnx",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(spipnx_0_resources),
+        .resource = spipnx_0_resources,
+        .dev = {
+                .coherent_dma_mask = 0xFFFFFFFF,
+                },
+};
+static struct platform_device spipnx_2 = {
+        .name = "spipnx",
+        .id = 2,
+        .num_resources = ARRAY_SIZE(spipnx_1_resources),
+        .resource = spipnx_1_resources,
+        .dev = {
+                .coherent_dma_mask = 0xFFFFFFFF,
+                },
+};
+static struct plat_serial8250_port platform_serial_ports[] = {
+        {
+                .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)),
+                .mapbase = (unsigned long)PNX4008_UART5_BASE,
+                .irq = IIR5_INT,
+                .uartclk = PNX4008_UART_CLK,
+                .regshift = 2,
+                .iotype = UPIO_MEM,
+                .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
+        },
+        {
+                .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)),
+                .mapbase = (unsigned long)PNX4008_UART3_BASE,
+                .irq = IIR3_INT,
+                .uartclk = PNX4008_UART_CLK,
+                .regshift = 2,
+                .iotype = UPIO_MEM,
+                .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
+         },
+        {}
+};
+static struct platform_device serial_device = {
+        .name = "serial8250",
+        .id = PLAT8250_DEV_PLATFORM,
+        .dev = {
+                .platform_data = &platform_serial_ports,
+        },
+};
+static struct platform_device *devices[] __initdata = {
+        &spipnx_1,
+        &spipnx_2,
+        &serial_device,
+};
+extern void pnx4008_uart_init(void);
+static void __init pnx4008_init(void)
+{
+        /*disable all START interrupt sources,
+           and clear all START interrupt flags */
+        __raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT));
+        __raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT));
+        __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT));
+        __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT));
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+        /* Switch on the UART clocks */
+        pnx4008_uart_init();
+}
+static struct map_desc pnx4008_io_desc[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(PNX4008_IRAM_BASE),
+                .pfn            = __phys_to_pfn(PNX4008_IRAM_BASE),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(PNX4008_NDF_FLASH_BASE),
+                .pfn            = __phys_to_pfn(PNX4008_NDF_FLASH_BASE),
+                .length         = SZ_1M - SZ_128K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE),
+                .pfn            = __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE),
+                .length         = SZ_128K * 3,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE),
+                .pfn            = __phys_to_pfn(PNX4008_DMA_CONFIG_BASE),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(PNX4008_AHB2FAB_BASE),
+                .pfn            = __phys_to_pfn(PNX4008_AHB2FAB_BASE),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        },
+};
+void __init pnx4008_map_io(void)
+{
+        iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
+}
+extern struct sys_timer pnx4008_timer;
+MACHINE_START(PNX4008, "Philips PNX4008")
+        /* Maintainer: MontaVista Software Inc. */
+        .phys_io                = 0x40090000,
+        .io_pg_offst            = (0xf4090000 >> 18) & 0xfffc,
+        .boot_params            = 0x80000100,
+        .map_io                 = pnx4008_map_io,
+        .init_irq               = pnx4008_init_irq,
+        .init_machine           = pnx4008_init,
+        .timer                  = &pnx4008_timer,
+MACHINE_END
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
new file mode 100644
index 000000000000..981aa9dcdede
--- /dev/null
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -0,0 +1,1109 @@
+/*
+ *  linux/arch/arm/mach-pnx4008/dma.c
+ *
+ *  PNX4008 DMA registration and IRQ dispatching
+ *
+ *  Author:     Vitaly Wool
+ *  Copyright:  MontaVista Software Inc. (c) 2005
+ *
+ *  Based on the code from Nicolas Pitre
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/dma-mapping.h>
+#include <linux/clk.h>
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <asm/hardware.h>
+#include <asm/dma.h>
+#include <asm/dma-mapping.h>
+#include <asm/io.h>
+#include <asm/mach/dma.h>
+#include <asm/arch/clock.h>
+static struct dma_channel {
+        char *name;
+        void (*irq_handler) (int, int, void *, struct pt_regs *);
+        void *data;
+        struct pnx4008_dma_ll *ll;
+        u32 ll_dma;
+        void *target_addr;
+        int target_id;
+} dma_channels[MAX_DMA_CHANNELS];
+static struct ll_pool {
+        void *vaddr;
+        void *cur;
+        dma_addr_t dma_addr;
+        int count;
+} ll_pool;
+static spinlock_t ll_lock = SPIN_LOCK_UNLOCKED;
+struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t * ll_dma)
+{
+        struct pnx4008_dma_ll *ll = NULL;
+        unsigned long flags;
+        spin_lock_irqsave(&ll_lock, flags);
+        if (ll_pool.count > 4) { /* can give one more */
+                ll = *(struct pnx4008_dma_ll **) ll_pool.cur;
+                *ll_dma = ll_pool.dma_addr + ((void *)ll - ll_pool.vaddr);
+                *(void **)ll_pool.cur = **(void ***)ll_pool.cur;
+                memset(ll, 0, sizeof(*ll));
+                ll_pool.count--;
+        }
+        spin_unlock_irqrestore(&ll_lock, flags);
+        return ll;
+}
+EXPORT_SYMBOL_GPL(pnx4008_alloc_ll_entry);
+void pnx4008_free_ll_entry(struct pnx4008_dma_ll * ll, dma_addr_t ll_dma)
+{
+        unsigned long flags;
+        if (ll) {
+                if ((unsigned long)((long)ll - (long)ll_pool.vaddr) > 0x4000) {
+                        printk(KERN_ERR "Trying to free entry not allocated by DMA\n");
+                        BUG();
+                }
+                if (ll->flags & DMA_BUFFER_ALLOCATED)
+                        ll->free(ll->alloc_data);
+                spin_lock_irqsave(&ll_lock, flags);
+                *(long *)ll = *(long *)ll_pool.cur;
+                *(long *)ll_pool.cur = (long)ll;
+                ll_pool.count++;
+                spin_unlock_irqrestore(&ll_lock, flags);
+        }
+}
+EXPORT_SYMBOL_GPL(pnx4008_free_ll_entry);
+void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll * ll)
+{
+        struct pnx4008_dma_ll *ptr;
+        u32 dma;
+        while (ll) {
+                dma = ll->next_dma;
+                ptr = ll->next;
+                pnx4008_free_ll_entry(ll, ll_dma);
+                ll_dma = dma;
+                ll = ptr;
+        }
+}
+EXPORT_SYMBOL_GPL(pnx4008_free_ll);
+static int dma_channels_requested = 0;
+static inline void dma_increment_usage(void)
+{
+        if (!dma_channels_requested++) {
+                struct clk *clk = clk_get(0, "dma_ck");
+                if (!IS_ERR(clk)) {
+                        clk_set_rate(clk, 1);
+                        clk_put(clk);
+                }
+                pnx4008_config_dma(-1, -1, 1);
+        }
+}
+static inline void dma_decrement_usage(void)
+{
+        if (!--dma_channels_requested) {
+                struct clk *clk = clk_get(0, "dma_ck");
+                if (!IS_ERR(clk)) {
+                        clk_set_rate(clk, 0);
+                        clk_put(clk);
+                }
+                pnx4008_config_dma(-1, -1, 0);
+        }
+}
+static spinlock_t dma_lock = SPIN_LOCK_UNLOCKED;
+static inline void pnx4008_dma_lock(void)
+{
+        spin_lock_irq(&dma_lock);
+}
+static inline void pnx4008_dma_unlock(void)
+{
+        spin_unlock_irq(&dma_lock);
+}
+#define VALID_CHANNEL(c)        (((c) >= 0) && ((c) < MAX_DMA_CHANNELS))
+int pnx4008_request_channel(char *name, int ch,
+                            void (*irq_handler) (int, int, void *,
+                                                 struct pt_regs *), void *data)
+{
+        int i, found = 0;
+        /* basic sanity checks */
+        if (!name || (ch != -1 && !VALID_CHANNEL(ch)))
+                return -EINVAL;
+        pnx4008_dma_lock();
+        /* try grabbing a DMA channel with the requested priority */
+        for (i = MAX_DMA_CHANNELS - 1; i >= 0; i--) {
+                if (!dma_channels[i].name && (ch == -1 || ch == i)) {
+                        found = 1;
+                        break;
+                }
+        }
+        if (found) {
+                dma_increment_usage();
+                dma_channels[i].name = name;
+                dma_channels[i].irq_handler = irq_handler;
+                dma_channels[i].data = data;
+                dma_channels[i].ll = NULL;
+                dma_channels[i].ll_dma = 0;
+        } else {
+                printk(KERN_WARNING "No more available DMA channels for %s\n",
+                       name);
+                i = -ENODEV;
+        }
+        pnx4008_dma_unlock();
+        return i;
+}
+EXPORT_SYMBOL_GPL(pnx4008_request_channel);
+void pnx4008_free_channel(int ch)
+{
+        if (!dma_channels[ch].name) {
+                printk(KERN_CRIT
+                       "%s: trying to free channel %d which is already freed\n",
+                       __FUNCTION__, ch);
+                return;
+        }
+        pnx4008_dma_lock();
+        pnx4008_free_ll(dma_channels[ch].ll_dma, dma_channels[ch].ll);
+        dma_channels[ch].ll = NULL;
+        dma_decrement_usage();
+        dma_channels[ch].name = NULL;
+        pnx4008_dma_unlock();
+}
+EXPORT_SYMBOL_GPL(pnx4008_free_channel);
+int pnx4008_config_dma(int ahb_m1_be, int ahb_m2_be, int enable)
+{
+        unsigned long dma_cfg = __raw_readl(DMAC_CONFIG);
+        switch (ahb_m1_be) {
+        case 0:
+                dma_cfg &= ~(1 << 1);
+                break;
+        case 1:
+                dma_cfg |= (1 << 1);
+                break;
+        default:
+                break;
+        }
+        switch (ahb_m2_be) {
+        case 0:
+                dma_cfg &= ~(1 << 2);
+                break;
+        case 1:
+                dma_cfg |= (1 << 2);
+                break;
+        default:
+                break;
+        }
+        switch (enable) {
+        case 0:
+                dma_cfg &= ~(1 << 0);
+                break;
+        case 1:
+                dma_cfg |= (1 << 0);
+                break;
+        default:
+                break;
+        }
+        pnx4008_dma_lock();
+        __raw_writel(dma_cfg, DMAC_CONFIG);
+        pnx4008_dma_unlock();
+        return 0;
+}
+EXPORT_SYMBOL_GPL(pnx4008_config_dma);
+int pnx4008_dma_pack_control(const struct pnx4008_dma_ch_ctrl * ch_ctrl,
+                             unsigned long *ctrl)
+{
+        int i = 0, dbsize, sbsize, err = 0;
+        if (!ctrl || !ch_ctrl) {
+                err = -EINVAL;
+                goto out;
+        }
+        *ctrl = 0;
+        switch (ch_ctrl->tc_mask) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 31);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->cacheable) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 30);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->bufferable) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 29);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->priv_mode) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 28);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->di) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 27);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->si) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 26);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->dest_ahb1) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 25);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->src_ahb1) {
+        case 0:
+                break;
+        case 1:
+                *ctrl |= (1 << 24);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->dwidth) {
+        case WIDTH_BYTE:
+                *ctrl &= ~(7 << 21);
+                break;
+        case WIDTH_HWORD:
+                *ctrl &= ~(7 << 21);
+                *ctrl |= (1 << 21);
+                break;
+        case WIDTH_WORD:
+                *ctrl &= ~(7 << 21);
+                *ctrl |= (2 << 21);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_ctrl->swidth) {
+        case WIDTH_BYTE:
+                *ctrl &= ~(7 << 18);
+                break;
+        case WIDTH_HWORD:
+                *ctrl &= ~(7 << 18);
+                *ctrl |= (1 << 18);
+                break;
+        case WIDTH_WORD:
+                *ctrl &= ~(7 << 18);
+                *ctrl |= (2 << 18);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        dbsize = ch_ctrl->dbsize;
+        while (!(dbsize & 1)) {
+                i++;
+                dbsize >>= 1;
+        }
+        if (ch_ctrl->dbsize != 1 || i > 8 || i == 1) {
+                err = -EINVAL;
+                goto out;
+        } else if (i > 1)
+                i--;
+        *ctrl &= ~(7 << 15);
+        *ctrl |= (i << 15);
+        sbsize = ch_ctrl->sbsize;
+        while (!(sbsize & 1)) {
+                i++;
+                sbsize >>= 1;
+        }
+        if (ch_ctrl->sbsize != 1 || i > 8 || i == 1) {
+                err = -EINVAL;
+                goto out;
+        } else if (i > 1)
+                i--;
+        *ctrl &= ~(7 << 12);
+        *ctrl |= (i << 12);
+        if (ch_ctrl->tr_size > 0x7ff) {
+                err = -E2BIG;
+                goto out;
+        }
+        *ctrl &= ~0x7ff;
+        *ctrl |= ch_ctrl->tr_size & 0x7ff;
+out:
+        return err;
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_pack_control);
+int pnx4008_dma_parse_control(unsigned long ctrl,
+                              struct pnx4008_dma_ch_ctrl * ch_ctrl)
+{
+        int err = 0;
+        if (!ch_ctrl) {
+                err = -EINVAL;
+                goto out;
+        }
+        ch_ctrl->tr_size = ctrl & 0x7ff;
+        ctrl >>= 12;
+        ch_ctrl->sbsize = 1 << (ctrl & 7);
+        if (ch_ctrl->sbsize > 1)
+                ch_ctrl->sbsize <<= 1;
+        ctrl >>= 3;
+        ch_ctrl->dbsize = 1 << (ctrl & 7);
+        if (ch_ctrl->dbsize > 1)
+                ch_ctrl->dbsize <<= 1;
+        ctrl >>= 3;
+        switch (ctrl & 7) {
+        case 0:
+                ch_ctrl->swidth = WIDTH_BYTE;
+                break;
+        case 1:
+                ch_ctrl->swidth = WIDTH_HWORD;
+                break;
+        case 2:
+                ch_ctrl->swidth = WIDTH_WORD;
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        ctrl >>= 3;
+        switch (ctrl & 7) {
+        case 0:
+                ch_ctrl->dwidth = WIDTH_BYTE;
+                break;
+        case 1:
+                ch_ctrl->dwidth = WIDTH_HWORD;
+                break;
+        case 2:
+                ch_ctrl->dwidth = WIDTH_WORD;
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        ctrl >>= 3;
+        ch_ctrl->src_ahb1 = ctrl & 1;
+        ctrl >>= 1;
+        ch_ctrl->dest_ahb1 = ctrl & 1;
+        ctrl >>= 1;
+        ch_ctrl->si = ctrl & 1;
+        ctrl >>= 1;
+        ch_ctrl->di = ctrl & 1;
+        ctrl >>= 1;
+        ch_ctrl->priv_mode = ctrl & 1;
+        ctrl >>= 1;
+        ch_ctrl->bufferable = ctrl & 1;
+        ctrl >>= 1;
+        ch_ctrl->cacheable = ctrl & 1;
+        ctrl >>= 1;
+        ch_ctrl->tc_mask = ctrl & 1;
+out:
+        return err;
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_parse_control);
+int pnx4008_dma_pack_config(const struct pnx4008_dma_ch_config * ch_cfg,
+                            unsigned long *cfg)
+{
+        int err = 0;
+        if (!cfg || !ch_cfg) {
+                err = -EINVAL;
+                goto out;
+        }
+        *cfg = 0;
+        switch (ch_cfg->halt) {
+        case 0:
+                break;
+        case 1:
+                *cfg |= (1 << 18);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_cfg->active) {
+        case 0:
+                break;
+        case 1:
+                *cfg |= (1 << 17);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_cfg->lock) {
+        case 0:
+                break;
+        case 1:
+                *cfg |= (1 << 16);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_cfg->itc) {
+        case 0:
+                break;
+        case 1:
+                *cfg |= (1 << 15);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_cfg->ie) {
+        case 0:
+                break;
+        case 1:
+                *cfg |= (1 << 14);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        switch (ch_cfg->flow_cntrl) {
+        case FC_MEM2MEM_DMA:
+                *cfg &= ~(7 << 11);
+                break;
+        case FC_MEM2PER_DMA:
+                *cfg &= ~(7 << 11);
+                *cfg |= (1 << 11);
+                break;
+        case FC_PER2MEM_DMA:
+                *cfg &= ~(7 << 11);
+                *cfg |= (2 << 11);
+                break;
+        case FC_PER2PER_DMA:
+                *cfg &= ~(7 << 11);
+                *cfg |= (3 << 11);
+                break;
+        case FC_PER2PER_DPER:
+                *cfg &= ~(7 << 11);
+                *cfg |= (4 << 11);
+                break;
+        case FC_MEM2PER_PER:
+                *cfg &= ~(7 << 11);
+                *cfg |= (5 << 11);
+                break;
+        case FC_PER2MEM_PER:
+                *cfg &= ~(7 << 11);
+                *cfg |= (6 << 11);
+                break;
+        case FC_PER2PER_SPER:
+                *cfg |= (7 << 11);
+                break;
+        default:
+                err = -EINVAL;
+                goto out;
+        }
+        *cfg &= ~(0x1f << 6);
+        *cfg |= ((ch_cfg->dest_per & 0x1f) << 6);
+        *cfg &= ~(0x1f << 1);
+        *cfg |= ((ch_cfg->src_per & 0x1f) << 1);
+out:
+        return err;
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_pack_config);
+int pnx4008_dma_parse_config(unsigned long cfg,
+                             struct pnx4008_dma_ch_config * ch_cfg)
+{
+        int err = 0;
+        if (!ch_cfg) {
+                err = -EINVAL;
+                goto out;
+        }
+        cfg >>= 1;
+        ch_cfg->src_per = cfg & 0x1f;
+        cfg >>= 5;
+        ch_cfg->dest_per = cfg & 0x1f;
+        cfg >>= 5;
+        switch (cfg & 7) {
+        case 0:
+                ch_cfg->flow_cntrl = FC_MEM2MEM_DMA;
+                break;
+        case 1:
+                ch_cfg->flow_cntrl = FC_MEM2PER_DMA;
+                break;
+        case 2:
+                ch_cfg->flow_cntrl = FC_PER2MEM_DMA;
+                break;
+        case 3:
+                ch_cfg->flow_cntrl = FC_PER2PER_DMA;
+                break;
+        case 4:
+                ch_cfg->flow_cntrl = FC_PER2PER_DPER;
+                break;
+        case 5:
+                ch_cfg->flow_cntrl = FC_MEM2PER_PER;
+                break;
+        case 6:
+                ch_cfg->flow_cntrl = FC_PER2MEM_PER;
+                break;
+        case 7:
+                ch_cfg->flow_cntrl = FC_PER2PER_SPER;
+        }
+        cfg >>= 3;
+        ch_cfg->ie = cfg & 1;
+        cfg >>= 1;
+        ch_cfg->itc = cfg & 1;
+        cfg >>= 1;
+        ch_cfg->lock = cfg & 1;
+        cfg >>= 1;
+        ch_cfg->active = cfg & 1;
+        cfg >>= 1;
+        ch_cfg->halt = cfg & 1;
+out:
+        return err;
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_parse_config);
+void pnx4008_dma_split_head_entry(struct pnx4008_dma_config * config,
+                                  struct pnx4008_dma_ch_ctrl * ctrl)
+{
+        int new_len = ctrl->tr_size, num_entries = 0;
+        int old_len = new_len;
+        int src_width, dest_width, count = 1;
+        switch (ctrl->swidth) {
+        case WIDTH_BYTE:
+                src_width = 1;
+                break;
+        case WIDTH_HWORD:
+                src_width = 2;
+                break;
+        case WIDTH_WORD:
+                src_width = 4;
+                break;
+        default:
+                return;
+        }
+        switch (ctrl->dwidth) {
+        case WIDTH_BYTE:
+                dest_width = 1;
+                break;
+        case WIDTH_HWORD:
+                dest_width = 2;
+                break;
+        case WIDTH_WORD:
+                dest_width = 4;
+                break;
+        default:
+                return;
+        }
+        while (new_len > 0x7FF) {
+                num_entries++;
+                new_len = (ctrl->tr_size + num_entries) / (num_entries + 1);
+        }
+        if (num_entries != 0) {
+                struct pnx4008_dma_ll *ll = NULL;
+                config->ch_ctrl &= ~0x7ff;
+                config->ch_ctrl |= new_len;
+                if (!config->is_ll) {
+                        config->is_ll = 1;
+                        while (num_entries) {
+                                if (!ll) {
+                                        config->ll =
+                                            pnx4008_alloc_ll_entry(&config->
+                                                                   ll_dma);
+                                        ll = config->ll;
+                                } else {
+                                        ll->next =
+                                            pnx4008_alloc_ll_entry(&ll->
+                                                                   next_dma);
+                                        ll = ll->next;
+                                }
+                                if (ctrl->si)
+                                        ll->src_addr =
+                                            config->src_addr +
+                                            src_width * new_len * count;
+                                else
+                                        ll->src_addr = config->src_addr;
+                                if (ctrl->di)
+                                        ll->dest_addr =
+                                            config->dest_addr +
+                                            dest_width * new_len * count;
+                                else
+                                        ll->dest_addr = config->dest_addr;
+                                ll->ch_ctrl = config->ch_ctrl & 0x7fffffff;
+                                ll->next_dma = 0;
+                                ll->next = NULL;
+                                num_entries--;
+                                count++;
+                        }
+                } else {
+                        struct pnx4008_dma_ll *ll_old = config->ll;
+                        unsigned long ll_dma_old = config->ll_dma;
+                        while (num_entries) {
+                                if (!ll) {
+                                        config->ll =
+                                            pnx4008_alloc_ll_entry(&config->
+                                                                   ll_dma);
+                                        ll = config->ll;
+                                } else {
+                                        ll->next =
+                                            pnx4008_alloc_ll_entry(&ll->
+                                                                   next_dma);
+                                        ll = ll->next;
+                                }
+                                if (ctrl->si)
+                                        ll->src_addr =
+                                            config->src_addr +
+                                            src_width * new_len * count;
+                                else
+                                        ll->src_addr = config->src_addr;
+                                if (ctrl->di)
+                                        ll->dest_addr =
+                                            config->dest_addr +
+                                            dest_width * new_len * count;
+                                else
+                                        ll->dest_addr = config->dest_addr;
+                                ll->ch_ctrl = config->ch_ctrl & 0x7fffffff;
+                                ll->next_dma = 0;
+                                ll->next = NULL;
+                                num_entries--;
+                                count++;
+                        }
+                        ll->next_dma = ll_dma_old;
+                        ll->next = ll_old;
+                }
+                /* adjust last length/tc */
+                ll->ch_ctrl = config->ch_ctrl & (~0x7ff);
+                ll->ch_ctrl |= old_len - new_len * (count - 1);
+                config->ch_ctrl &= 0x7fffffff;
+        }
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_split_head_entry);
+void pnx4008_dma_split_ll_entry(struct pnx4008_dma_ll * cur_ll,
+                                struct pnx4008_dma_ch_ctrl * ctrl)
+{
+        int new_len = ctrl->tr_size, num_entries = 0;
+        int old_len = new_len;
+        int src_width, dest_width, count = 1;
+        switch (ctrl->swidth) {
+        case WIDTH_BYTE:
+                src_width = 1;
+                break;
+        case WIDTH_HWORD:
+                src_width = 2;
+                break;
+        case WIDTH_WORD:
+                src_width = 4;
+                break;
+        default:
+                return;
+        }
+        switch (ctrl->dwidth) {
+        case WIDTH_BYTE:
+                dest_width = 1;
+                break;
+        case WIDTH_HWORD:
+                dest_width = 2;
+                break;
+        case WIDTH_WORD:
+                dest_width = 4;
+                break;
+        default:
+                return;
+        }
+        while (new_len > 0x7FF) {
+                num_entries++;
+                new_len = (ctrl->tr_size + num_entries) / (num_entries + 1);
+        }
+        if (num_entries != 0) {
+                struct pnx4008_dma_ll *ll = NULL;
+                cur_ll->ch_ctrl &= ~0x7ff;
+                cur_ll->ch_ctrl |= new_len;
+                if (!cur_ll->next) {
+                        while (num_entries) {
+                                if (!ll) {
+                                        cur_ll->next =
+                                            pnx4008_alloc_ll_entry(&cur_ll->
+                                                                   next_dma);
+                                        ll = cur_ll->next;
+                                } else {
+                                        ll->next =
+                                            pnx4008_alloc_ll_entry(&ll->
+                                                                   next_dma);
+                                        ll = ll->next;
+                                }
+                                if (ctrl->si)
+                                        ll->src_addr =
+                                            cur_ll->src_addr +
+                                            src_width * new_len * count;
+                                else
+                                        ll->src_addr = cur_ll->src_addr;
+                                if (ctrl->di)
+                                        ll->dest_addr =
+                                            cur_ll->dest_addr +
+                                            dest_width * new_len * count;
+                                else
+                                        ll->dest_addr = cur_ll->dest_addr;
+                                ll->ch_ctrl = cur_ll->ch_ctrl & 0x7fffffff;
+                                ll->next_dma = 0;
+                                ll->next = NULL;
+                                num_entries--;
+                                count++;
+                        }
+                } else {
+                        struct pnx4008_dma_ll *ll_old = cur_ll->next;
+                        unsigned long ll_dma_old = cur_ll->next_dma;
+                        while (num_entries) {
+                                if (!ll) {
+                                        cur_ll->next =
+                                            pnx4008_alloc_ll_entry(&cur_ll->
+                                                                   next_dma);
+                                        ll = cur_ll->next;
+                                } else {
+                                        ll->next =
+                                            pnx4008_alloc_ll_entry(&ll->
+                                                                   next_dma);
+                                        ll = ll->next;
+                                }
+                                if (ctrl->si)
+                                        ll->src_addr =
+                                            cur_ll->src_addr +
+                                            src_width * new_len * count;
+                                else
+                                        ll->src_addr = cur_ll->src_addr;
+                                if (ctrl->di)
+                                        ll->dest_addr =
+                                            cur_ll->dest_addr +
+                                            dest_width * new_len * count;
+                                else
+                                        ll->dest_addr = cur_ll->dest_addr;
+                                ll->ch_ctrl = cur_ll->ch_ctrl & 0x7fffffff;
+                                ll->next_dma = 0;
+                                ll->next = NULL;
+                                num_entries--;
+                                count++;
+                        }
+                        ll->next_dma = ll_dma_old;
+                        ll->next = ll_old;
+                }
+                /* adjust last length/tc */
+                ll->ch_ctrl = cur_ll->ch_ctrl & (~0x7ff);
+                ll->ch_ctrl |= old_len - new_len * (count - 1);
+                cur_ll->ch_ctrl &= 0x7fffffff;
+        }
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_split_ll_entry);
+int pnx4008_config_channel(int ch, struct pnx4008_dma_config * config)
+{
+        if (!VALID_CHANNEL(ch) || !dma_channels[ch].name)
+                return -EINVAL;
+        pnx4008_dma_lock();
+        __raw_writel(config->src_addr, DMAC_Cx_SRC_ADDR(ch));
+        __raw_writel(config->dest_addr, DMAC_Cx_DEST_ADDR(ch));
+        if (config->is_ll)
+                __raw_writel(config->ll_dma, DMAC_Cx_LLI(ch));
+        else
+                __raw_writel(0, DMAC_Cx_LLI(ch));
+        __raw_writel(config->ch_ctrl, DMAC_Cx_CONTROL(ch));
+        __raw_writel(config->ch_cfg, DMAC_Cx_CONFIG(ch));
+        pnx4008_dma_unlock();
+        return 0;
+}
+EXPORT_SYMBOL_GPL(pnx4008_config_channel);
+int pnx4008_channel_get_config(int ch, struct pnx4008_dma_config * config)
+{
+        if (!VALID_CHANNEL(ch) || !dma_channels[ch].name || !config)
+                return -EINVAL;
+        pnx4008_dma_lock();
+        config->ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch));
+        config->ch_ctrl = __raw_readl(DMAC_Cx_CONTROL(ch));
+        config->ll_dma = __raw_readl(DMAC_Cx_LLI(ch));
+        config->is_ll = config->ll_dma ? 1 : 0;
+        config->src_addr = __raw_readl(DMAC_Cx_SRC_ADDR(ch));
+        config->dest_addr = __raw_readl(DMAC_Cx_DEST_ADDR(ch));
+        pnx4008_dma_unlock();
+        return 0;
+}
+EXPORT_SYMBOL_GPL(pnx4008_channel_get_config);
+int pnx4008_dma_ch_enable(int ch)
+{
+        unsigned long ch_cfg;
+        if (!VALID_CHANNEL(ch) || !dma_channels[ch].name)
+                return -EINVAL;
+        pnx4008_dma_lock();
+        ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch));
+        ch_cfg |= 1;
+        __raw_writel(ch_cfg, DMAC_Cx_CONFIG(ch));
+        pnx4008_dma_unlock();
+        return 0;
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enable);
+int pnx4008_dma_ch_disable(int ch)
+{
+        unsigned long ch_cfg;
+        if (!VALID_CHANNEL(ch) || !dma_channels[ch].name)
+                return -EINVAL;
+        pnx4008_dma_lock();
+        ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch));
+        ch_cfg &= ~1;
+        __raw_writel(ch_cfg, DMAC_Cx_CONFIG(ch));
+        pnx4008_dma_unlock();
+        return 0;
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_ch_disable);
+int pnx4008_dma_ch_enabled(int ch)
+{
+        unsigned long ch_cfg;
+        if (!VALID_CHANNEL(ch) || !dma_channels[ch].name)
+                return -EINVAL;
+        pnx4008_dma_lock();
+        ch_cfg = __raw_readl(DMAC_Cx_CONFIG(ch));
+        pnx4008_dma_unlock();
+        return ch_cfg & 1;
+}
+EXPORT_SYMBOL_GPL(pnx4008_dma_ch_enabled);
+static irqreturn_t dma_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+        int i;
+        unsigned long dint = __raw_readl(DMAC_INT_STAT);
+        unsigned long tcint = __raw_readl(DMAC_INT_TC_STAT);
+        unsigned long eint = __raw_readl(DMAC_INT_ERR_STAT);
+        unsigned long i_bit;
+        for (i = MAX_DMA_CHANNELS - 1; i >= 0; i--) {
+                i_bit = 1 << i;
+                if (dint & i_bit) {
+                        struct dma_channel *channel = &dma_channels[i];
+                        if (channel->name && channel->irq_handler) {
+                                int cause = 0;
+                                if (eint & i_bit)
+                                        cause |= DMA_ERR_INT;
+                                if (tcint & i_bit)
+                                        cause |= DMA_TC_INT;
+                                channel->irq_handler(i, cause, channel->data,
+                                                     regs);
+                        } else {
+                                /*
+                                 * IRQ for an unregistered DMA channel
+                                 */
+                                printk(KERN_WARNING
+                                       "spurious IRQ for DMA channel %d\n", i);
+                        }
+                        if (tcint & i_bit)
+                                __raw_writel(i_bit, DMAC_INT_TC_CLEAR);
+                        if (eint & i_bit)
+                                __raw_writel(i_bit, DMAC_INT_ERR_CLEAR);
+                }
+        }
+        return IRQ_HANDLED;
+}
+static int __init pnx4008_dma_init(void)
+{
+        int ret, i;
+        ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL);
+        if (ret) {
+                printk(KERN_CRIT "Wow!  Can't register IRQ for DMA\n");
+                goto out;
+        }
+        ll_pool.count = 0x4000 / sizeof(struct pnx4008_dma_ll);
+        ll_pool.cur = ll_pool.vaddr =
+            dma_alloc_coherent(NULL, ll_pool.count * sizeof(struct pnx4008_dma_ll),
+                               &ll_pool.dma_addr, GFP_KERNEL);
+        if (!ll_pool.vaddr) {
+                ret = -ENOMEM;
+                free_irq(DMA_INT, NULL);
+                goto out;
+        }
+        for (i = 0; i < ll_pool.count - 1; i++) {
+                void **addr = ll_pool.vaddr + i * sizeof(struct pnx4008_dma_ll);
+                *addr = (void *)addr + sizeof(struct pnx4008_dma_ll);
+        }
+        *(long *)(ll_pool.vaddr +
+                  (ll_pool.count - 1) * sizeof(struct pnx4008_dma_ll)) =
+            (long)ll_pool.vaddr;
+        __raw_writel(1, DMAC_CONFIG);
+out:
+        return ret;
+}
+arch_initcall(pnx4008_dma_init);
diff --git a/arch/arm/mach-pnx4008/gpio.c b/arch/arm/mach-pnx4008/gpio.c
new file mode 100644
index 000000000000..e1ce050d8fe0
--- /dev/null
+++ b/arch/arm/mach-pnx4008/gpio.c
@@ -0,0 +1,330 @@
+/*
+ * arch/arm/mach-pnx4008/gpio.c
+ *
+ * PNX4008 GPIO driver
+ *
+ * Author: Dmitry Chigirev <source@mvista.com>
+ *
+ * Based on reference code by Iwo Mergler and Z.Tabaaloute from Philips:
+ * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <asm/semaphore.h>
+#include <asm/io.h>
+#include <asm/arch/platform.h>
+#include <asm/arch/gpio.h>
+/* register definitions */
+#define PIO_VA_BASE     IO_ADDRESS(PNX4008_PIO_BASE)
+#define PIO_INP_STATE   (0x00U)
+#define PIO_OUTP_SET    (0x04U)
+#define PIO_OUTP_CLR    (0x08U)
+#define PIO_OUTP_STATE  (0x0CU)
+#define PIO_DRV_SET     (0x10U)
+#define PIO_DRV_CLR     (0x14U)
+#define PIO_DRV_STATE   (0x18U)
+#define PIO_SDINP_STATE (0x1CU)
+#define PIO_SDOUTP_SET  (0x20U)
+#define PIO_SDOUTP_CLR  (0x24U)
+#define PIO_MUX_SET     (0x28U)
+#define PIO_MUX_CLR     (0x2CU)
+#define PIO_MUX_STATE   (0x30U)
+static inline void gpio_lock(void)
+{
+        local_irq_disable();
+}
+static inline void gpio_unlock(void)
+{
+        local_irq_enable();
+}
+/* Inline functions */
+static inline int gpio_read_bit(u32 reg, int gpio)
+{
+        u32 bit, val;
+        int ret = -EFAULT;
+        if (gpio < 0)
+                goto out;
+        bit = GPIO_BIT(gpio);
+        if (bit) {
+                val = __raw_readl(PIO_VA_BASE + reg);
+                ret = (val & bit) ? 1 : 0;
+        }
+out:
+        return ret;
+}
+static inline int gpio_set_bit(u32 reg, int gpio)
+{
+        u32 bit, val;
+        int ret = -EFAULT;
+        if (gpio < 0)
+                goto out;
+        bit = GPIO_BIT(gpio);
+        if (bit) {
+                val = __raw_readl(PIO_VA_BASE + reg);
+                val |= bit;
+                __raw_writel(val, PIO_VA_BASE + reg);
+                ret = 0;
+        }
+out:
+        return ret;
+}
+/* Very simple access control, bitmap for allocated/free */
+static unsigned long access_map[4];
+#define INP_INDEX       0
+#define OUTP_INDEX      1
+#define GPIO_INDEX      2
+#define MUX_INDEX       3
+/*GPIO to Input Mapping */
+static short gpio_to_inp_map[32] = {
+        -1, -1, -1, -1, -1, -1, -1, -1,
+        -1, -1, -1, -1, -1, -1, -1, -1,
+        -1, -1, -1, -1, -1, -1, -1, -1,
+        -1, 10, 11, 12, 13, 14, 24, -1
+};
+/*GPIO to Mux Mapping */
+static short gpio_to_mux_map[32] = {
+        -1, -1, -1, -1, -1, -1, -1, -1,
+        -1, -1, -1, -1, -1, -1, -1, -1,
+        -1, -1, -1, -1, -1, -1, -1, -1,
+        -1, -1, -1, 0, 1, 4, 5, -1
+};
+/*Output to Mux Mapping */
+static short outp_to_mux_map[32] = {
+        -1, -1, -1, 6, -1, -1, -1, -1,
+        -1, -1, -1, -1, -1, -1, -1, -1,
+        -1, -1, -1, -1, -1, 2, -1, -1,
+        -1, -1, -1, -1, -1, -1, -1, -1
+};
+int pnx4008_gpio_register_pin(unsigned short pin)
+{
+        unsigned long bit = GPIO_BIT(pin);
+        int ret = -EBUSY;       /* Already in use */
+        gpio_lock();
+        if (GPIO_ISBID(pin)) {
+                if (access_map[GPIO_INDEX] & bit)
+                        goto out;
+                access_map[GPIO_INDEX] |= bit;
+        } else if (GPIO_ISRAM(pin)) {
+                if (access_map[GPIO_INDEX] & bit)
+                        goto out;
+                access_map[GPIO_INDEX] |= bit;
+        } else if (GPIO_ISMUX(pin)) {
+                if (access_map[MUX_INDEX] & bit)
+                        goto out;
+                access_map[MUX_INDEX] |= bit;
+        } else if (GPIO_ISOUT(pin)) {
+                if (access_map[OUTP_INDEX] & bit)
+                        goto out;
+                access_map[OUTP_INDEX] |= bit;
+        } else if (GPIO_ISIN(pin)) {
+                if (access_map[INP_INDEX] & bit)
+                        goto out;
+                access_map[INP_INDEX] |= bit;
+        } else
+                goto out;
+        ret = 0;
+out:
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_register_pin);
+int pnx4008_gpio_unregister_pin(unsigned short pin)
+{
+        unsigned long bit = GPIO_BIT(pin);
+        int ret = -EFAULT;      /* Not registered */
+        gpio_lock();
+        if (GPIO_ISBID(pin)) {
+                if (~access_map[GPIO_INDEX] & bit)
+                        goto out;
+                access_map[GPIO_INDEX] &= ~bit;
+        } else if (GPIO_ISRAM(pin)) {
+                if (~access_map[GPIO_INDEX] & bit)
+                        goto out;
+                access_map[GPIO_INDEX] &= ~bit;
+        } else if (GPIO_ISMUX(pin)) {
+                if (~access_map[MUX_INDEX] & bit)
+                        goto out;
+                access_map[MUX_INDEX] &= ~bit;
+        } else if (GPIO_ISOUT(pin)) {
+                if (~access_map[OUTP_INDEX] & bit)
+                        goto out;
+                access_map[OUTP_INDEX] &= ~bit;
+        } else if (GPIO_ISIN(pin)) {
+                if (~access_map[INP_INDEX] & bit)
+                        goto out;
+                access_map[INP_INDEX] &= ~bit;
+        } else
+                goto out;
+        ret = 0;
+out:
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_unregister_pin);
+unsigned long pnx4008_gpio_read_pin(unsigned short pin)
+{
+        unsigned long ret = -EFAULT;
+        int gpio = GPIO_BIT_MASK(pin);
+        gpio_lock();
+        if (GPIO_ISOUT(pin)) {
+                ret = gpio_read_bit(PIO_OUTP_STATE, gpio);
+        } else if (GPIO_ISRAM(pin)) {
+                if (gpio_read_bit(PIO_DRV_STATE, gpio) == 0) {
+                        ret = gpio_read_bit(PIO_SDINP_STATE, gpio);
+                }
+        } else if (GPIO_ISBID(pin)) {
+                ret = gpio_read_bit(PIO_DRV_STATE, gpio);
+                if (ret > 0)
+                        ret = gpio_read_bit(PIO_OUTP_STATE, gpio);
+                else if (ret == 0)
+                        ret =
+                            gpio_read_bit(PIO_INP_STATE, gpio_to_inp_map[gpio]);
+        } else if (GPIO_ISIN(pin)) {
+                ret = gpio_read_bit(PIO_INP_STATE, gpio);
+        }
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_read_pin);
+/* Write Value to output */
+int pnx4008_gpio_write_pin(unsigned short pin, int output)
+{
+        int gpio = GPIO_BIT_MASK(pin);
+        int ret = -EFAULT;
+        gpio_lock();
+        if (GPIO_ISOUT(pin)) {
+                printk( "writing '%x' to '%x'\n",
+                                gpio, output ? PIO_OUTP_SET : PIO_OUTP_CLR );
+                ret = gpio_set_bit(output ? PIO_OUTP_SET : PIO_OUTP_CLR, gpio);
+        } else if (GPIO_ISRAM(pin)) {
+                if (gpio_read_bit(PIO_DRV_STATE, gpio) > 0)
+                        ret = gpio_set_bit(output ? PIO_SDOUTP_SET :
+                                           PIO_SDOUTP_CLR, gpio);
+        } else if (GPIO_ISBID(pin)) {
+                if (gpio_read_bit(PIO_DRV_STATE, gpio) > 0)
+                        ret = gpio_set_bit(output ? PIO_OUTP_SET :
+                                           PIO_OUTP_CLR, gpio);
+        }
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_write_pin);
+/* Value = 1 : Set GPIO pin as output */
+/* Value = 0 : Set GPIO pin as input */
+int pnx4008_gpio_set_pin_direction(unsigned short pin, int output)
+{
+        int gpio = GPIO_BIT_MASK(pin);
+        int ret = -EFAULT;
+        gpio_lock();
+        if (GPIO_ISBID(pin) || GPIO_ISRAM(pin)) {
+                ret = gpio_set_bit(output ? PIO_DRV_SET : PIO_DRV_CLR, gpio);
+        }
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_set_pin_direction);
+/* Read GPIO pin direction: 0= pin used as input, 1= pin used as output*/
+int pnx4008_gpio_read_pin_direction(unsigned short pin)
+{
+        int gpio = GPIO_BIT_MASK(pin);
+        int ret = -EFAULT;
+        gpio_lock();
+        if (GPIO_ISBID(pin) || GPIO_ISRAM(pin)) {
+                ret = gpio_read_bit(PIO_DRV_STATE, gpio);
+        }
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_read_pin_direction);
+/* Value = 1 : Set pin to muxed function  */
+/* Value = 0 : Set pin as GPIO */
+int pnx4008_gpio_set_pin_mux(unsigned short pin, int output)
+{
+        int gpio = GPIO_BIT_MASK(pin);
+        int ret = -EFAULT;
+        gpio_lock();
+        if (GPIO_ISBID(pin)) {
+                ret =
+                    gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR,
+                                 gpio_to_mux_map[gpio]);
+        } else if (GPIO_ISOUT(pin)) {
+                ret =
+                    gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR,
+                                 outp_to_mux_map[gpio]);
+        } else if (GPIO_ISMUX(pin)) {
+                ret = gpio_set_bit(output ? PIO_MUX_SET : PIO_MUX_CLR, gpio);
+        }
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_set_pin_mux);
+/* Read pin mux function: 0= pin used as GPIO, 1= pin used for muxed function*/
+int pnx4008_gpio_read_pin_mux(unsigned short pin)
+{
+        int gpio = GPIO_BIT_MASK(pin);
+        int ret = -EFAULT;
+        gpio_lock();
+        if (GPIO_ISBID(pin)) {
+                ret = gpio_read_bit(PIO_MUX_STATE, gpio_to_mux_map[gpio]);
+        } else if (GPIO_ISOUT(pin)) {
+                ret = gpio_read_bit(PIO_MUX_STATE, outp_to_mux_map[gpio]);
+        } else if (GPIO_ISMUX(pin)) {
+                ret = gpio_read_bit(PIO_MUX_STATE, gpio);
+        }
+        gpio_unlock();
+        return ret;
+}
+EXPORT_SYMBOL(pnx4008_gpio_read_pin_mux);
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
new file mode 100644
index 000000000000..9b0a8e084e99
--- /dev/null
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -0,0 +1,121 @@
+/*
+ * arch/arm/mach-pnx4008/irq.c
+ *
+ * PNX4008 IRQ controller driver
+ *
+ * Author: Dmitry Chigirev <source@mvista.com>
+ *
+ * Based on reference code received from Philips:
+ * Copyright (C) 2003 Philips Semiconductors
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/system.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/map.h>
+#include <asm/arch/irq.h>
+static u8 pnx4008_irq_type[NR_IRQS] = PNX4008_IRQ_TYPES;
+static void pnx4008_mask_irq(unsigned int irq)
+{
+        __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */
+}
+static void pnx4008_unmask_irq(unsigned int irq)
+{
+        __raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq));  /* unmask interrupt */
+}
+static void pnx4008_mask_ack_irq(unsigned int irq)
+{
+        __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */
+        __raw_writel(INTC_BIT(irq), INTC_SR(irq));      /* clear interrupt status */
+}
+static int pnx4008_set_irq_type(unsigned int irq, unsigned int type)
+{
+        switch (type) {
+        case IRQT_RISING:
+                __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));        /*edge sensitive */
+                __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));        /*rising edge */
+                set_irq_handler(irq, do_edge_IRQ);
+                break;
+        case IRQT_FALLING:
+                __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq));        /*edge sensitive */
+                __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));       /*falling edge */
+                set_irq_handler(irq, do_edge_IRQ);
+                break;
+        case IRQT_LOW:
+                __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));       /*level sensitive */
+                __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq));       /*low level */
+                set_irq_handler(irq, do_level_IRQ);
+                break;
+        case IRQT_HIGH:
+                __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq));       /*level sensitive */
+                __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq));        /* high level */
+                set_irq_handler(irq, do_level_IRQ);
+                break;
+        /* IRQT_BOTHEDGE is not supported */
+        default:
+                printk(KERN_ERR "PNX4008 IRQ: Unsupported irq type %d\n", type);
+                return -1;
+        }
+        return 0;
+}
+static struct irqchip pnx4008_irq_chip = {
+        .ack = pnx4008_mask_ack_irq,
+        .mask = pnx4008_mask_irq,
+        .unmask = pnx4008_unmask_irq,
+        .set_type = pnx4008_set_irq_type,
+};
+void __init pnx4008_init_irq(void)
+{
+        unsigned int i;
+        /* configure and enable IRQ 0,1,30,31 (cascade interrupts) mask all others */
+        pnx4008_set_irq_type(SUB1_IRQ_N, pnx4008_irq_type[SUB1_IRQ_N]);
+        pnx4008_set_irq_type(SUB2_IRQ_N, pnx4008_irq_type[SUB2_IRQ_N]);
+        pnx4008_set_irq_type(SUB1_FIQ_N, pnx4008_irq_type[SUB1_FIQ_N]);
+        pnx4008_set_irq_type(SUB2_FIQ_N, pnx4008_irq_type[SUB2_FIQ_N]);
+        __raw_writel((1 << SUB2_FIQ_N) | (1 << SUB1_FIQ_N) |
+                        (1 << SUB2_IRQ_N) | (1 << SUB1_IRQ_N),
+                INTC_ER(MAIN_BASE_INT));
+        __raw_writel(0, INTC_ER(SIC1_BASE_INT));
+        __raw_writel(0, INTC_ER(SIC2_BASE_INT));
+        /* configure all other IRQ's */
+        for (i = 0; i < NR_IRQS; i++) {
+                if (i == SUB2_FIQ_N || i == SUB1_FIQ_N ||
+                        i == SUB2_IRQ_N || i == SUB1_IRQ_N)
+                        continue;
+                set_irq_flags(i, IRQF_VALID);
+                set_irq_chip(i, &pnx4008_irq_chip);
+                pnx4008_set_irq_type(i, pnx4008_irq_type[i]);
+        }
+}
diff --git a/arch/arm/mach-pnx4008/pm.c b/arch/arm/mach-pnx4008/pm.c
new file mode 100644
index 000000000000..3649cd3dfc9a
--- /dev/null
+++ b/arch/arm/mach-pnx4008/pm.c
@@ -0,0 +1,184 @@
+/*
+ * arch/arm/mach-pnx4008/pm.c
+ *
+ * Power Management driver for PNX4008
+ *
+ * Authors: Vitaly Wool, Dmitry Chigirev <source@mvista.com>
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/pm.h>
+#include <linux/rtc.h>
+#include <linux/sched.h>
+#include <linux/proc_fs.h>
+#include <linux/pm.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/cacheflush.h>
+#include <asm/arch/pm.h>
+#include <asm/arch/clock.h>
+#define SRAM_VA IO_ADDRESS(PNX4008_IRAM_BASE)
+static void *saved_sram;
+static struct clk *pll4_clk;
+static inline void pnx4008_standby(void)
+{
+        void (*pnx4008_cpu_standby_ptr) (void);
+        local_irq_disable();
+        local_fiq_disable();
+        clk_disable(pll4_clk);
+        /*saving portion of SRAM to be used by suspend function. */
+        memcpy(saved_sram, (void *)SRAM_VA, pnx4008_cpu_standby_sz);
+        /*make sure SRAM copy gets physically written into SDRAM.
+           SDRAM will be placed into self-refresh during power down */
+        flush_cache_all();
+        /*copy suspend function into SRAM */
+        memcpy((void *)SRAM_VA, pnx4008_cpu_standby, pnx4008_cpu_standby_sz);
+        /*do suspend */
+        pnx4008_cpu_standby_ptr = (void *)SRAM_VA;
+        pnx4008_cpu_standby_ptr();
+        /*restoring portion of SRAM that was used by suspend function */
+        memcpy((void *)SRAM_VA, saved_sram, pnx4008_cpu_standby_sz);
+        clk_enable(pll4_clk);
+        local_fiq_enable();
+        local_irq_enable();
+}
+static inline void pnx4008_suspend(void)
+{
+        void (*pnx4008_cpu_suspend_ptr) (void);
+        local_irq_disable();
+        local_fiq_disable();
+        clk_disable(pll4_clk);
+        __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT));
+        __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT));
+        /*saving portion of SRAM to be used by suspend function. */
+        memcpy(saved_sram, (void *)SRAM_VA, pnx4008_cpu_suspend_sz);
+        /*make sure SRAM copy gets physically written into SDRAM.
+           SDRAM will be placed into self-refresh during power down */
+        flush_cache_all();
+        /*copy suspend function into SRAM */
+        memcpy((void *)SRAM_VA, pnx4008_cpu_suspend, pnx4008_cpu_suspend_sz);
+        /*do suspend */
+        pnx4008_cpu_suspend_ptr = (void *)SRAM_VA;
+        pnx4008_cpu_suspend_ptr();
+        /*restoring portion of SRAM that was used by suspend function */
+        memcpy((void *)SRAM_VA, saved_sram, pnx4008_cpu_suspend_sz);
+        clk_enable(pll4_clk);
+        local_fiq_enable();
+        local_irq_enable();
+}
+static int pnx4008_pm_enter(suspend_state_t state)
+{
+        switch (state) {
+        case PM_SUSPEND_STANDBY:
+                pnx4008_standby();
+                break;
+        case PM_SUSPEND_MEM:
+                pnx4008_suspend();
+                break;
+        case PM_SUSPEND_DISK:
+                return -ENOTSUPP;
+        default:
+                return -EINVAL;
+        }
+        return 0;
+}
+/*
+ * Called after processes are frozen, but before we shut down devices.
+ */
+static int pnx4008_pm_prepare(suspend_state_t state)
+{
+        switch (state) {
+        case PM_SUSPEND_STANDBY:
+        case PM_SUSPEND_MEM:
+                break;
+        case PM_SUSPEND_DISK:
+                return -ENOTSUPP;
+                break;
+        default:
+                return -EINVAL;
+                break;
+        }
+        return 0;
+}
+/*
+ * Called after devices are re-setup, but before processes are thawed.
+ */
+static int pnx4008_pm_finish(suspend_state_t state)
+{
+        return 0;
+}
+/*
+ * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
+ */
+static struct pm_ops pnx4008_pm_ops = {
+        .prepare = pnx4008_pm_prepare,
+        .enter = pnx4008_pm_enter,
+        .finish = pnx4008_pm_finish,
+};
+static int __init pnx4008_pm_init(void)
+{
+        u32 sram_size_to_allocate;
+        pll4_clk = clk_get(0, "ck_pll4");
+        if (IS_ERR(pll4_clk)) {
+                printk(KERN_ERR
+                       "PM Suspend cannot acquire ARM(PLL4) clock control\n");
+                return PTR_ERR(pll4_clk);
+        }
+        if (pnx4008_cpu_standby_sz > pnx4008_cpu_suspend_sz)
+                sram_size_to_allocate = pnx4008_cpu_standby_sz;
+        else
+                sram_size_to_allocate = pnx4008_cpu_suspend_sz;
+        saved_sram = kmalloc(sram_size_to_allocate, GFP_ATOMIC);
+        if (!saved_sram) {
+                printk(KERN_ERR
+                       "PM Suspend: cannot allocate memory to save portion of SRAM\n");
+                clk_put(pll4_clk);
+                return -ENOMEM;
+        }
+        pm_set_ops(&pnx4008_pm_ops);
+        return 0;
+}
+late_initcall(pnx4008_pm_init);
diff --git a/arch/arm/mach-pnx4008/serial.c b/arch/arm/mach-pnx4008/serial.c
new file mode 100644
index 000000000000..10322384e45d
--- /dev/null
+++ b/arch/arm/mach-pnx4008/serial.c
@@ -0,0 +1,69 @@
+/*
+ *  linux/arch/arm/mach-pnx4008/serial.c
+ *
+ *  PNX4008 UART initialization
+ *
+ *  Copyright:  MontaVista Software Inc. (c) 2005
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/arch/platform.h>
+#include <asm/hardware.h>
+#include <linux/serial_core.h>
+#include <linux/serial_reg.h>
+#include <asm/arch/pm.h>
+#include <asm/arch/clock.h>
+#define UART_3          0
+#define UART_4          1
+#define UART_5          2
+#define UART_6          3
+#define UART_UNKNOWN    (-1)
+#define UART3_BASE_VA   IO_ADDRESS(PNX4008_UART3_BASE)
+#define UART4_BASE_VA   IO_ADDRESS(PNX4008_UART4_BASE)
+#define UART5_BASE_VA   IO_ADDRESS(PNX4008_UART5_BASE)
+#define UART6_BASE_VA   IO_ADDRESS(PNX4008_UART6_BASE)
+#define UART_FCR_OFFSET         8
+#define UART_FIFO_SIZE          64
+void pnx4008_uart_init(void)
+{
+        u32 tmp;
+        int i = UART_FIFO_SIZE;
+        __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET);
+        __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET);
+        /* Send a NULL to fix the UART HW bug */
+        __raw_writel(0x00, UART5_BASE_VA);
+        __raw_writel(0x00, UART3_BASE_VA);
+        while (i--) {
+                tmp = __raw_readl(UART5_BASE_VA);
+                tmp = __raw_readl(UART3_BASE_VA);
+        }
+        __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET);
+        __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET);
+        /* setup wakeup interrupt */
+        start_int_set_rising_edge(SE_U3_RX_INT);
+        start_int_ack(SE_U3_RX_INT);
+        start_int_umask(SE_U3_RX_INT);
+        start_int_set_rising_edge(SE_U5_RX_INT);
+        start_int_ack(SE_U5_RX_INT);
+        start_int_umask(SE_U5_RX_INT);
+}
diff --git a/arch/arm/mach-pnx4008/sleep.S b/arch/arm/mach-pnx4008/sleep.S
new file mode 100644
index 000000000000..93c802bac269
--- /dev/null
+++ b/arch/arm/mach-pnx4008/sleep.S
@@ -0,0 +1,196 @@
+/*
+ * linux/arch/arm/mach-pnx4008/sleep.S
+ *
+ * PNX4008 support for STOP mode and SDRAM self-refresh
+ *
+ * Authors: Dmitry Chigirev, Vitaly Wool <source@mvista.com>
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/hardware.h>
+#define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE)
+#define PWR_CTRL_REG_OFFS 0x44
+#define SDRAM_CFG_VA_BASE IO_ADDRESS(PNX4008_SDRAM_CFG_BASE)
+#define MPMC_STATUS_REG_OFFS 0x4
+                .text
+ENTRY(pnx4008_cpu_suspend)
+        @this function should be entered in Direct run mode.
+        @ save registers on stack
+        stmfd   sp!, {r0 - r6, lr}
+        @ setup Power Manager base address in r4
+        @ and put it's value in r5
+        mov     r4, #(PWRMAN_VA_BASE & 0xff000000)
+        orr     r4, r4, #(PWRMAN_VA_BASE & 0x00ff0000)
+        orr     r4, r4, #(PWRMAN_VA_BASE & 0x0000ff00)
+        orr     r4, r4, #(PWRMAN_VA_BASE & 0x000000ff)
+        ldr     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ setup SDRAM controller base address in r2
+        @ and put it's value in r3
+        mov     r2, #(SDRAM_CFG_VA_BASE & 0xff000000)
+        orr     r2, r2, #(SDRAM_CFG_VA_BASE & 0x00ff0000)
+        orr     r2, r2, #(SDRAM_CFG_VA_BASE & 0x0000ff00)
+        orr     r2, r2, #(SDRAM_CFG_VA_BASE & 0x000000ff)
+        ldr     r3, [r2, #MPMC_STATUS_REG_OFFS] @extra read - HW bug workaround
+        @ clear SDRAM self-refresh bit latch
+        and     r5, r5, #(~(1 << 8))
+        @ clear SDRAM self-refresh bit
+        and     r5, r5, #(~(1 << 9))
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ do save current bit settings in r1
+        mov     r1, r5
+        @ set SDRAM self-refresh bit
+        orr     r5, r5, #(1 << 9)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ set SDRAM self-refresh bit latch
+        orr     r5, r5, #(1 << 8)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ clear SDRAM self-refresh bit latch
+        and     r5, r5, #(~(1 << 8))
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ clear SDRAM self-refresh bit
+        and     r5, r5, #(~(1 << 9))
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ wait for SDRAM to get into self-refresh mode
+2:      ldr     r3, [r2, #MPMC_STATUS_REG_OFFS]
+        tst     r3, #(1 << 2)
+        beq     2b
+        @ to prepare SDRAM to get out of self-refresh mode after wakeup
+        orr     r5, r5, #(1 << 7)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ do enter stop mode
+        orr     r5, r5, #(1 << 0)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        @ sleeping now...
+        @ coming out of STOP mode into Direct Run mode
+        @ clear STOP mode and SDRAM self-refresh bits
+        str     r1, [r4, #PWR_CTRL_REG_OFFS]
+        @ wait for SDRAM to get out self-refresh mode
+3:      ldr     r3, [r2, #MPMC_STATUS_REG_OFFS]
+        tst     r3, #5
+        bne     3b
+        @ restore regs and return
+        ldmfd   sp!, {r0 - r6, pc}
+ENTRY(pnx4008_cpu_suspend_sz)
+        .word   . - pnx4008_cpu_suspend
+ENTRY(pnx4008_cpu_standby)
+        @ save registers on stack
+        stmfd   sp!, {r0 - r6, lr}
+        @ setup Power Manager base address in r4
+        @ and put it's value in r5
+        mov     r4, #(PWRMAN_VA_BASE & 0xff000000)
+        orr     r4, r4, #(PWRMAN_VA_BASE & 0x00ff0000)
+        orr     r4, r4, #(PWRMAN_VA_BASE & 0x0000ff00)
+        orr     r4, r4, #(PWRMAN_VA_BASE & 0x000000ff)
+        ldr     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ setup SDRAM controller base address in r2
+        @ and put it's value in r3
+        mov     r2, #(SDRAM_CFG_VA_BASE & 0xff000000)
+        orr     r2, r2, #(SDRAM_CFG_VA_BASE & 0x00ff0000)
+        orr     r2, r2, #(SDRAM_CFG_VA_BASE & 0x0000ff00)
+        orr     r2, r2, #(SDRAM_CFG_VA_BASE & 0x000000ff)
+        ldr     r3, [r2, #MPMC_STATUS_REG_OFFS] @extra read - HW bug workaround
+        @ clear SDRAM self-refresh bit latch
+        and     r5, r5, #(~(1 << 8))
+        @ clear SDRAM self-refresh bit
+        and     r5, r5, #(~(1 << 9))
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ do save current bit settings in r1
+        mov     r1, r5
+        @ set SDRAM self-refresh bit
+        orr     r5, r5, #(1 << 9)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ set SDRAM self-refresh bit latch
+        orr     r5, r5, #(1 << 8)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ clear SDRAM self-refresh bit latch
+        and     r5, r5, #(~(1 << 8))
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ clear SDRAM self-refresh bit
+        and     r5, r5, #(~(1 << 9))
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ wait for SDRAM to get into self-refresh mode
+2:      ldr     r3, [r2, #MPMC_STATUS_REG_OFFS]
+        tst     r3, #(1 << 2)
+        beq     2b
+        @ set 'get out of self-refresh mode after wakeup' bit
+        orr     r5, r5, #(1 << 7)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        mcr     p15, 0, r0, c7, c0, 4   @ kinda sleeping now...
+        @ set SDRAM self-refresh bit latch
+        orr     r5, r5, #(1 << 8)
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ clear SDRAM self-refresh bit latch
+        and     r5, r5, #(~(1 << 8))
+        str     r5, [r4, #PWR_CTRL_REG_OFFS]
+        @ wait for SDRAM to get out self-refresh mode
+3:      ldr     r3, [r2, #MPMC_STATUS_REG_OFFS]
+        tst     r3, #5
+        bne     3b
+        @ restore regs and return
+        ldmfd   sp!, {r0 - r6, pc}
+ENTRY(pnx4008_cpu_standby_sz)
+        .word   . - pnx4008_cpu_standby
+ENTRY(pnx4008_cache_clean_invalidate)
+        stmfd   sp!, {r0 - r6, lr}
+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
+        mcr     p15, 0, ip, c7, c6, 0           @ invalidate D cache
+#else
+1:      mrc     p15, 0, r15, c7, c14, 3         @ test,clean,invalidate
+        bne     1b
+#endif
+        ldmfd   sp!, {r0 - r6, pc}
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c
new file mode 100644
index 000000000000..4ce680698529
--- /dev/null
+++ b/arch/arm/mach-pnx4008/time.c
@@ -0,0 +1,141 @@
+/*
+ * arch/arm/mach-pnx4008/time.c
+ *
+ * PNX4008 Timers
+ *
+ * Authors: Vitaly Wool, Dmitry Chigirev, Grigory Tolstolytkin <source@mvista.com>
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/module.h>
+#include <linux/kallsyms.h>
+#include <asm/system.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/leds.h>
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/time.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+#include <asm/errno.h>
+/*! Note: all timers are UPCOUNTING */
+/*!
+ * Returns number of us since last clock interrupt.  Note that interrupts
+ * will have been disabled by do_gettimeoffset()
+ */
+static unsigned long pnx4008_gettimeoffset(void)
+{
+        u32 ticks_to_match =
+            __raw_readl(HSTIM_MATCH0) - __raw_readl(HSTIM_COUNTER);
+        u32 elapsed = LATCH - ticks_to_match;
+        return (elapsed * (tick_nsec / 1000)) / LATCH;
+}
+/*!
+ * IRQ handler for the timer
+ */
+static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id,
+                                           struct pt_regs *regs)
+{
+        if (__raw_readl(HSTIM_INT) & MATCH0_INT) {
+                write_seqlock(&xtime_lock);
+                do {
+                        timer_tick(regs);
+                        /*
+                         * this algorithm takes care of possible delay
+                         * for this interrupt handling longer than a normal
+                         * timer period
+                         */
+                        __raw_writel(__raw_readl(HSTIM_MATCH0) + LATCH,
+                                     HSTIM_MATCH0);
+                        __raw_writel(MATCH0_INT, HSTIM_INT);    /* clear interrupt */
+                        /*
+                         * The goal is to keep incrementing HSTIM_MATCH0
+                         * register until HSTIM_MATCH0 indicates time after
+                         * what HSTIM_COUNTER indicates.
+                         */
+                } while ((signed)
+                         (__raw_readl(HSTIM_MATCH0) -
+                          __raw_readl(HSTIM_COUNTER)) < 0);
+                write_sequnlock(&xtime_lock);
+        }
+        return IRQ_HANDLED;
+}
+static struct irqaction pnx4008_timer_irq = {
+        .name = "PNX4008 Tick Timer",
+        .flags = SA_INTERRUPT | SA_TIMER,
+        .handler = pnx4008_timer_interrupt
+};
+/*!
+ * Set up timer and timer interrupt.
+ */
+static __init void pnx4008_setup_timer(void)
+{
+        __raw_writel(RESET_COUNT, MSTIM_CTRL);
+        while (__raw_readl(MSTIM_COUNTER)) ;    /* wait for reset to complete. 100% guarantee event */
+        __raw_writel(0, MSTIM_CTRL);    /* stop the timer */
+        __raw_writel(0, MSTIM_MCTRL);
+        __raw_writel(RESET_COUNT, HSTIM_CTRL);
+        while (__raw_readl(HSTIM_COUNTER)) ;    /* wait for reset to complete. 100% guarantee event */
+        __raw_writel(0, HSTIM_CTRL);
+        __raw_writel(0, HSTIM_MCTRL);
+        __raw_writel(0, HSTIM_CCR);
+        __raw_writel(12, HSTIM_PMATCH); /* scale down to 1 MHZ */
+        __raw_writel(LATCH, HSTIM_MATCH0);
+        __raw_writel(MR0_INT, HSTIM_MCTRL);
+        setup_irq(HSTIMER_INT, &pnx4008_timer_irq);
+        __raw_writel(COUNT_ENAB | DEBUG_EN, HSTIM_CTRL);        /*start timer, stop when JTAG active */
+}
+/* Timer Clock Control in PM register */
+#define TIMCLK_CTRL_REG  IO_ADDRESS((PNX4008_PWRMAN_BASE + 0xBC))
+#define WATCHDOG_CLK_EN                   1
+#define TIMER_CLK_EN                      2     /* HS and MS timers? */
+static u32 timclk_ctrl_reg_save;
+void pnx4008_timer_suspend(void)
+{
+        timclk_ctrl_reg_save = __raw_readl(TIMCLK_CTRL_REG);
+        __raw_writel(0, TIMCLK_CTRL_REG);       /* disable timers */
+}
+void pnx4008_timer_resume(void)
+{
+        __raw_writel(timclk_ctrl_reg_save, TIMCLK_CTRL_REG);    /* enable timers */
+}
+struct sys_timer pnx4008_timer = {
+        .init = pnx4008_setup_timer,
+        .offset = pnx4008_gettimeoffset,
+        .suspend = pnx4008_timer_suspend,
+        .resume = pnx4008_timer_resume,
+};
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 0104fd142e70..ea5137f319c4 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -61,6 +61,7 @@ config MACH_POODLE
        bool "Enable Sharp SL-5600 (Poodle) Support"
        depends PXA_SHARPSL_25x
        select SHARP_LOCOMO
+        select PXA_SSP
 config MACH_CORGI
        bool "Enable Sharp SL-C700 (Corgi) Support"
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 4e8a983e2b83..1610690be419 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
 obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
 obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o
 obj-$(CONFIG_MACH_AKITA)        += akita-ioexp.o
-obj-$(CONFIG_MACH_POODLE)       += poodle.o
+obj-$(CONFIG_MACH_POODLE)       += poodle.o corgi_ssp.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
 # Support for blinky lights
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index d6d726036361..bf6648a83901 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -19,6 +19,7 @@
 #include <linux/fs.h>
 #include <linux/interrupt.h>
 #include <linux/mmc/host.h>
+#include <linux/pm.h>
 #include <asm/setup.h>
 #include <asm/memory.h>
@@ -26,6 +27,7 @@
 #include <asm/hardware.h>
 #include <asm/irq.h>
 #include <asm/io.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -310,8 +312,31 @@ static struct platform_device *devices[] __initdata = {
        &corgiled_device,
 };
+static void corgi_poweroff(void)
+{
+        RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+        if (!machine_is_corgi())
+                /* Green LED off tells the bootloader to halt */
+                reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
+        arm_machine_restart('h');
+}
+static void corgi_restart(char mode)
+{
+        RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+        if (!machine_is_corgi())
+                /* Green LED on tells the bootloader to reboot */
+                set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
+        arm_machine_restart('h');
+}
 static void __init corgi_init(void)
 {
+        pm_power_off = corgi_poweroff;
+        arm_pm_restart = corgi_restart;
        /* setup sleep mode values */
        PWER  = 0x00000002;
        PFER  = 0x00000000;
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 7a1ab73e9e10..4c3de4008a43 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -27,6 +27,13 @@
 #include <asm/arch/pxa-regs.h>
 #include "sharpsl.h"
+#define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
+#define SHARPSL_CHARGE_ON_TEMP         0xe0  /* 2.9V */
+#define SHARPSL_CHARGE_ON_ACIN_HIGH    0x9b  /* 6V */
+#define SHARPSL_CHARGE_ON_ACIN_LOW     0x34  /* 2V */
+#define SHARPSL_FATAL_ACIN_VOLT        182   /* 3.45V */
+#define SHARPSL_FATAL_NOACIN_VOLT      170   /* 3.40V */
 static void corgi_charger_init(void)
 {
        pxa_gpio_mode(CORGI_GPIO_ADC_TEMP_ON | GPIO_OUT);
@@ -195,9 +202,16 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
        .read_devdata    = corgipm_read_devdata,
        .charger_wakeup  = corgi_charger_wakeup,
        .should_wakeup   = corgi_should_wakeup,
-        .bat_levels      = 40,
+        .backlight_limit = corgibl_limit_intensity,
-        .bat_levels_noac = spitz_battery_levels_noac,
+        .charge_on_volt   = SHARPSL_CHARGE_ON_VOLT,
-        .bat_levels_acin = spitz_battery_levels_acin,
+        .charge_on_temp   = SHARPSL_CHARGE_ON_TEMP,
+        .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH,
+        .charge_acin_low  = SHARPSL_CHARGE_ON_ACIN_LOW,
+        .fatal_acin_volt  = SHARPSL_FATAL_ACIN_VOLT,
+        .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT,
+        .bat_levels       = 40,
+        .bat_levels_noac  = spitz_battery_levels_noac,
+        .bat_levels_acin  = spitz_battery_levels_acin,
        .status_high_acin = 188,
        .status_low_acin  = 178,
        .status_high_noac = 185,
@@ -214,6 +228,9 @@ static int __devinit corgipm_init(void)
        if (!corgipm_device)
                return -ENOMEM;
+        if (!machine_is_corgi())
+            corgi_pm_machinfo.batfull_irq = 1;
        corgipm_device->dev.platform_data = &corgi_pm_machinfo;
        ret = platform_device_add(corgipm_device);
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c
index 8a25a1c8019f..f9421318cb7a 100644
--- a/arch/arm/mach-pxa/corgi_ssp.c
+++ b/arch/arm/mach-pxa/corgi_ssp.c
@@ -50,12 +50,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data)
        unsigned long ret,flag;
        spin_lock_irqsave(&corgi_ssp_lock, flag);
-        GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
+        if (ssp_machinfo->cs_ads7846 >= 0)
+                GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
        ssp_write_word(&corgi_ssp_dev,data);
        ret = ssp_read_word(&corgi_ssp_dev);
-        GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
+        if (ssp_machinfo->cs_ads7846 >= 0)
+                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
        return ret;
@@ -68,12 +70,14 @@ unsigned long corgi_ssp_ads7846_putget(ulong data)
 void corgi_ssp_ads7846_lock(void)
 {
        spin_lock(&corgi_ssp_lock);
-        GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
+        if (ssp_machinfo->cs_ads7846 >= 0)
+                GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
 }
 void corgi_ssp_ads7846_unlock(void)
 {
-        GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
+        if (ssp_machinfo->cs_ads7846 >= 0)
+                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
        spin_unlock(&corgi_ssp_lock);
 }
@@ -110,11 +114,13 @@ unsigned long corgi_ssp_dac_put(ulong data)
        ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
        ssp_enable(&corgi_ssp_dev);
-        GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
+        if (ssp_machinfo->cs_lcdcon >= 0)
+                GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
        ssp_write_word(&corgi_ssp_dev,data);
        /* Read null data back from device to prevent SSP overflow */
        ssp_read_word(&corgi_ssp_dev);
-        GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
+        if (ssp_machinfo->cs_lcdcon >= 0)
+                GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
        ssp_disable(&corgi_ssp_dev);
        ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
@@ -147,7 +153,8 @@ int corgi_ssp_max1111_get(ulong data)
        int voltage,voltage1,voltage2;
        spin_lock_irqsave(&corgi_ssp_lock, flag);
-        GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
+        if (ssp_machinfo->cs_max1111 >= 0)
+                GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
        ssp_disable(&corgi_ssp_dev);
        ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
        ssp_enable(&corgi_ssp_dev);
@@ -169,7 +176,8 @@ int corgi_ssp_max1111_get(ulong data)
        ssp_disable(&corgi_ssp_dev);
        ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
        ssp_enable(&corgi_ssp_dev);
-        GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
+        if (ssp_machinfo->cs_max1111 >= 0)
+                GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
        spin_unlock_irqrestore(&corgi_ssp_lock, flag);
        if (voltage1 & 0xc0 || voltage2 & 0x3f)
@@ -196,9 +204,12 @@ static int __init corgi_ssp_probe(struct platform_device *dev)
        int ret;
        /* Chip Select - Disable All */
-        pxa_gpio_mode(ssp_machinfo->cs_lcdcon  | GPIO_OUT | GPIO_DFLT_HIGH);
+        if (ssp_machinfo->cs_lcdcon >= 0)
-        pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
+                pxa_gpio_mode(ssp_machinfo->cs_lcdcon  | GPIO_OUT | GPIO_DFLT_HIGH);
-        pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
+        if (ssp_machinfo->cs_max1111 >= 0)
+                pxa_gpio_mode(ssp_machinfo->cs_max1111 | GPIO_OUT | GPIO_DFLT_HIGH);
+        if (ssp_machinfo->cs_ads7846 >= 0)
+                pxa_gpio_mode(ssp_machinfo->cs_ads7846 | GPIO_OUT | GPIO_DFLT_HIGH);
        ret = ssp_init(&corgi_ssp_dev, ssp_machinfo->port, 0);
@@ -229,9 +240,12 @@ static int corgi_ssp_suspend(struct platform_device *dev, pm_message_t state)
 static int corgi_ssp_resume(struct platform_device *dev)
 {
-        GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);  /* High - Disable LCD Control/Timing Gen */
+        if (ssp_machinfo->cs_lcdcon >= 0)
-        GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
+                GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);  /* High - Disable LCD Control/Timing Gen */
-        GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
+        if (ssp_machinfo->cs_max1111 >= 0)
+                GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
+        if (ssp_machinfo->cs_ads7846 >= 0)
+                GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
        ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
        ssp_enable(&corgi_ssp_dev);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 3e26d7ce5bb2..1ab26c6914f2 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -22,6 +22,10 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <asm/arch/pxa2xx_spi.h>
 #include <asm/setup.h>
 #include <asm/memory.h>
 #include <asm/mach-types.h>
@@ -196,6 +200,78 @@ static struct resource smc91x_resources[] = {
        },
 };
+/* ADS7846 is connected through SSP ... and if your board has J5 populated,
+ * you can select it to replace the ucb1400 by switching the touchscreen cable
+ * (to J5) and poking board registers (as done below).  Else it's only useful
+ * for the temperature sensors.
+ */
+static struct resource pxa_ssp_resources[] = {
+        [0] = {
+                .start  = __PREG(SSCR0_P(1)),
+                .end    = __PREG(SSCR0_P(1)) + 0x14,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_SSP,
+                .end    = IRQ_SSP,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct pxa2xx_spi_master pxa_ssp_master_info = {
+        .ssp_type       = PXA25x_SSP,
+        .clock_enable   = CKEN3_SSP,
+        .num_chipselect = 0,
+};
+static struct platform_device pxa_ssp = {
+        .name           = "pxa2xx-spi",
+        .id             = 1,
+        .resource       = pxa_ssp_resources,
+        .num_resources  = ARRAY_SIZE(pxa_ssp_resources),
+        .dev = {
+                .platform_data  = &pxa_ssp_master_info,
+        },
+};
+static int lubbock_ads7846_pendown_state(void)
+{
+        /* TS_BUSY is bit 8 in LUB_MISC_RD, but pendown is irq-only */
+        return 0;
+}
+static struct ads7846_platform_data ads_info = {
+        .model                  = 7846,
+        .vref_delay_usecs       = 100,          /* internal, no cap */
+        .get_pendown_state      = lubbock_ads7846_pendown_state,
+        // .x_plate_ohms                = 500,  /* GUESS! */
+        // .y_plate_ohms                = 500,  /* GUESS! */
+};
+static void ads7846_cs(u32 command)
+{
+        static const unsigned   TS_nCS = 1 << 11;
+        lubbock_set_misc_wr(TS_nCS, (command == PXA2XX_CS_ASSERT) ? 0 : TS_nCS);
+}
+static struct pxa2xx_spi_chip ads_hw = {
+        .tx_threshold           = 1,
+        .rx_threshold           = 2,
+        .cs_control             = ads7846_cs,
+};
+static struct spi_board_info spi_board_info[] __initdata = { {
+        .modalias       = "ads7846",
+        .platform_data  = &ads_info,
+        .controller_data = &ads_hw,
+        .irq            = LUBBOCK_BB_IRQ,
+        .max_speed_hz   = 120000 /* max sample rate at 3V */
+                                * 26 /* command + data + overhead */,
+        .bus_num        = 1,
+        .chip_select    = 0,
+},
+};
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = -1,
@@ -272,6 +348,7 @@ static struct platform_device *devices[] __initdata = {
        &smc91x_device,
        &lubbock_flash_device[0],
        &lubbock_flash_device[1],
+        &pxa_ssp,
 };
 static struct pxafb_mach_info sharp_lm8v31 __initdata = {
@@ -400,6 +477,8 @@ static void __init lubbock_init(void)
        lubbock_flash_data[flashboot^1].name = "application-flash";
        lubbock_flash_data[flashboot].name = "boot-rom";
        (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 }
 static struct map_desc lubbock_io_desc[] __initdata = {
@@ -416,6 +495,11 @@ static void __init lubbock_map_io(void)
        pxa_map_io();
        iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
+        /* SSP data pins */
+        pxa_gpio_mode(GPIO23_SCLK_MD);
+        pxa_gpio_mode(GPIO25_STXD_MD);
+        pxa_gpio_mode(GPIO26_SRXD_MD);
        /* This enables the BTUART */
        pxa_gpio_mode(GPIO42_BTRXD_MD);
        pxa_gpio_mode(GPIO43_BTTXD_MD);
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 98356f810007..b307f11951df 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -95,7 +95,10 @@ static void __init mainstone_init_irq(void)
        for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
                set_irq_chip(irq, &mainstone_irq_chip);
                set_irq_handler(irq, do_level_IRQ);
-                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+                if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
+                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
+                else
+                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        set_irq_flags(MAINSTONE_IRQ(8), 0);
        set_irq_flags(MAINSTONE_IRQ(12), 0);
@@ -490,6 +493,7 @@ static void __init mainstone_map_io(void)
 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
        /* Maintainer: MontaVista Software Inc. */
        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
        .map_io         = mainstone_map_io,
        .init_irq       = mainstone_init_irq,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index a042473deedd..9a9fa87cea9f 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -18,11 +18,14 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/fb.h>
+#include <linux/pm.h>
+#include <linux/delay.h>
 #include <asm/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -34,12 +37,15 @@
 #include <asm/arch/irda.h>
 #include <asm/arch/poodle.h>
 #include <asm/arch/pxafb.h>
+#include <asm/arch/sharpsl.h>
+#include <asm/arch/ssp.h>
 #include <asm/hardware/scoop.h>
 #include <asm/hardware/locomo.h>
 #include <asm/mach/sharpsl_param.h>
 #include "generic.h"
+#include "sharpsl.h"
 static struct resource poodle_scoop_resources[] = {
        [0] = {
@@ -117,13 +123,71 @@ static struct resource locomo_resources[] = {
        },
 };
-static struct platform_device locomo_device = {
+struct platform_device poodle_locomo_device = {
        .name           = "locomo",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(locomo_resources),
        .resource       = locomo_resources,
 };
+EXPORT_SYMBOL(poodle_locomo_device);
+/*
+ * Poodle SSP Device
+ */
+struct platform_device poodle_ssp_device = {
+        .name           = "corgi-ssp",
+        .id             = -1,
+};
+struct corgissp_machinfo poodle_ssp_machinfo = {
+        .port           = 1,
+        .cs_lcdcon      = -1,
+        .cs_ads7846     = -1,
+        .cs_max1111     = -1,
+        .clk_lcdcon     = 2,
+        .clk_ads7846    = 36,
+        .clk_max1111    = 2,
+};
+/*
+ * Poodle Touch Screen Device
+ */
+static struct resource poodlets_resources[] = {
+        [0] = {
+                .start          = POODLE_IRQ_GPIO_TP_INT,
+                .end            = POODLE_IRQ_GPIO_TP_INT,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+static unsigned long poodle_get_hsync_len(void)
+{
+        return 0;
+}
+static void poodle_null_hsync(void)
+{
+}
+static struct corgits_machinfo  poodle_ts_machinfo = {
+        .get_hsync_len   = poodle_get_hsync_len,
+        .put_hsync       = poodle_null_hsync,
+        .wait_hsync      = poodle_null_hsync,
+};
+static struct platform_device poodle_ts_device = {
+        .name           = "corgi-ts",
+        .dev            = {
+                .platform_data  = &poodle_ts_machinfo,
+        },
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(poodlets_resources),
+        .resource       = poodlets_resources,
+};
 /*
 * MMC/SD Device
@@ -141,7 +205,9 @@ static int poodle_mci_init(struct device *dev, irqreturn_t (*poodle_detect_int)(
        pxa_gpio_mode(GPIO6_MMCCLK_MD);
        pxa_gpio_mode(GPIO8_MMCCS0_MD);
        pxa_gpio_mode(POODLE_GPIO_nSD_DETECT | GPIO_IN);
+        pxa_gpio_mode(POODLE_GPIO_nSD_WP | GPIO_IN);
        pxa_gpio_mode(POODLE_GPIO_SD_PWR | GPIO_OUT);
+        pxa_gpio_mode(POODLE_GPIO_SD_PWR1 | GPIO_OUT);
        poodle_mci_platform_data.detect_delay = msecs_to_jiffies(250);
@@ -160,12 +226,22 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
 {
        struct pxamci_platform_data* p_d = dev->platform_data;
-        if (( 1 << vdd) & p_d->ocr_mask)
+        if (( 1 << vdd) & p_d->ocr_mask) {
-                GPSR1 = GPIO_bit(POODLE_GPIO_SD_PWR);
+                GPSR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR);
-        else
+                mdelay(2);
-                GPCR1 = GPIO_bit(POODLE_GPIO_SD_PWR);
+                GPSR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1);
+        } else {
+                GPCR(POODLE_GPIO_SD_PWR1) = GPIO_bit(POODLE_GPIO_SD_PWR1);
+                GPCR(POODLE_GPIO_SD_PWR) = GPIO_bit(POODLE_GPIO_SD_PWR);
+        }
+}
+static int poodle_mci_get_ro(struct device *dev)
+{
+        return GPLR(POODLE_GPIO_nSD_WP) & GPIO_bit(POODLE_GPIO_nSD_WP);
 }
 static void poodle_mci_exit(struct device *dev, void *data)
 {
        free_irq(POODLE_IRQ_GPIO_nSD_DETECT, data);
@@ -174,6 +250,7 @@ static void poodle_mci_exit(struct device *dev, void *data)
 static struct pxamci_platform_data poodle_mci_platform_data = {
        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
        .init           = poodle_mci_init,
+        .get_ro         = poodle_mci_get_ro,
        .setpower       = poodle_mci_setpower,
        .exit           = poodle_mci_exit,
 };
@@ -243,14 +320,31 @@ static struct pxafb_mach_info poodle_fb_info __initdata = {
 };
 static struct platform_device *devices[] __initdata = {
-        &locomo_device,
+        &poodle_locomo_device,
        &poodle_scoop_device,
+        &poodle_ssp_device,
+        &poodle_ts_device,
 };
+static void poodle_poweroff(void)
+{
+        RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+        arm_machine_restart('h');
+}
+static void poodle_restart(char mode)
+{
+        RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+        arm_machine_restart('h');
+}
 static void __init poodle_init(void)
 {
        int ret = 0;
+        pm_power_off = poodle_poweroff;
+        arm_pm_restart = poodle_restart;
        /* setup sleep mode values */
        PWER  = 0x00000002;
        PFER  = 0x00000000;
@@ -288,6 +382,7 @@ static void __init poodle_init(void)
        GPSR1 = 0x00000000;
        GPSR2 = 0x00000000;
+        set_pxa_fb_parent(&poodle_locomo_device.dev);
        set_pxa_fb_info(&poodle_fb_info);
        pxa_gpio_mode(POODLE_GPIO_USB_PULLUP | GPIO_OUT);
        pxa_gpio_mode(POODLE_GPIO_IR_ON | GPIO_OUT);
@@ -301,6 +396,7 @@ static void __init poodle_init(void)
        if (ret) {
                printk(KERN_WARNING "poodle: Unable to register LoCoMo device\n");
        }
+        corgi_ssp_set_machinfo(&poodle_ssp_machinfo);
 }
 static void __init fixup_poodle(struct machine_desc *desc,
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 6d402b262d8a..0f1648780c41 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -128,6 +128,9 @@ struct battery_thresh  spitz_battery_levels_noac[] = {
 */
 int sharpsl_pm_pxa_read_max1111(int channel)
 {
+        if (machine_is_tosa()) // Ugly, better move this function into another module
+            return 0;
        return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1
                        | MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR);
 }
@@ -156,7 +159,7 @@ void sharpsl_pm_pxa_init(void)
                else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQT_FALLING);
        }
-        if (!machine_is_corgi())
+        if (sharpsl_pm.machinfo->batfull_irq)
        {
                /* Register interrupt handler. */
                if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, SA_INTERRUPT, "CO", sharpsl_chrg_full_isr)) {
@@ -174,6 +177,6 @@ void sharpsl_pm_pxa_remove(void)
        if (sharpsl_pm.machinfo->gpio_fatal)
                free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
-        if (!machine_is_corgi())
+        if (sharpsl_pm.machinfo->batfull_irq)
                free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
 }
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 19b372df544a..eb9937f6f5cd 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -20,6 +20,7 @@
 #include <linux/fs.h>
 #include <linux/interrupt.h>
 #include <linux/mmc/host.h>
+#include <linux/pm.h>
 #include <asm/setup.h>
 #include <asm/memory.h>
@@ -27,6 +28,7 @@
 #include <asm/hardware.h>
 #include <asm/irq.h>
 #include <asm/io.h>
+#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -371,6 +373,7 @@ static int spitz_ohci_init(struct device *dev)
 static struct pxaohci_platform_data spitz_ohci_platform_data = {
        .port_mode      = PMM_NPS_MODE,
        .init           = spitz_ohci_init,
+        .power_budget   = 150,
 };
@@ -431,8 +434,31 @@ static struct platform_device *devices[] __initdata = {
        &spitzled_device,
 };
+static void spitz_poweroff(void)
+{
+        RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+        pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
+        GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
+        mdelay(1000);
+        arm_machine_restart('h');
+}
+static void spitz_restart(char mode)
+{
+        /* Bootloader magic for a reboot */
+        if((MSC0 & 0xffff0000) == 0x7ff00000)
+                MSC0 = (MSC0 & 0xffff) | 0x7ee00000;
+        spitz_poweroff();
+}
 static void __init common_init(void)
 {
+        pm_power_off = spitz_poweroff;
+        arm_pm_restart = spitz_restart;
        PMCR = 0x00;
        /* setup sleep mode values */
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 5e5bdc898482..40be833079c7 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -27,6 +27,13 @@
 #include <asm/arch/pxa-regs.h>
 #include "sharpsl.h"
+#define SHARPSL_CHARGE_ON_VOLT         0x99  /* 2.9V */
+#define SHARPSL_CHARGE_ON_TEMP         0xe0  /* 2.9V */
+#define SHARPSL_CHARGE_ON_ACIN_HIGH    0x9b  /* 6V */
+#define SHARPSL_CHARGE_ON_ACIN_LOW     0x34  /* 2V */
+#define SHARPSL_FATAL_ACIN_VOLT        182   /* 3.45V */
+#define SHARPSL_FATAL_NOACIN_VOLT      170   /* 3.40V */
 static int spitz_last_ac_status;
 static void spitz_charger_init(void)
@@ -190,6 +197,7 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
        .gpio_batlock     = SPITZ_GPIO_BAT_COVER,
        .gpio_acin        = SPITZ_GPIO_AC_IN,
        .gpio_batfull     = SPITZ_GPIO_CHRG_FULL,
+        .batfull_irq      = 1,
        .gpio_fatal       = SPITZ_GPIO_FATAL_BAT,
        .discharge        = spitz_discharge,
        .discharge1       = spitz_discharge1,
@@ -200,6 +208,13 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
        .read_devdata     = spitzpm_read_devdata,
        .charger_wakeup   = spitz_charger_wakeup,
        .should_wakeup    = spitz_should_wakeup,
+        .backlight_limit  = corgibl_limit_intensity,
+        .charge_on_volt   = SHARPSL_CHARGE_ON_VOLT,
+        .charge_on_temp   = SHARPSL_CHARGE_ON_TEMP,
+        .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH,
+        .charge_acin_low  = SHARPSL_CHARGE_ON_ACIN_LOW,
+        .fatal_acin_volt  = SHARPSL_FATAL_ACIN_VOLT,
+        .fatal_noacin_volt= SHARPSL_FATAL_NOACIN_VOLT,
        .bat_levels       = 40,
        .bat_levels_noac  = spitz_battery_levels_noac,
        .bat_levels_acin  = spitz_battery_levels_acin,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 76c0e7f0a219..7152bc13680f 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -19,12 +19,15 @@
 #include <linux/fs.h>
 #include <linux/interrupt.h>
 #include <linux/mmc/host.h>
+#include <linux/pm.h>
+#include <linux/delay.h>
 #include <asm/setup.h>
 #include <asm/memory.h>
 #include <asm/mach-types.h>
 #include <asm/hardware.h>
 #include <asm/irq.h>
+#include <asm/system.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
@@ -266,8 +269,31 @@ static struct platform_device *devices[] __initdata = {
        &tosaled_device,
 };
+static void tosa_poweroff(void)
+{
+        RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+        pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT);
+        GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET);
+        mdelay(1000);
+        arm_machine_restart('h');
+}
+static void tosa_restart(char mode)
+{
+        /* Bootloader magic for a reboot */
+        if((MSC0 & 0xffff0000) == 0x7ff00000)
+                MSC0 = (MSC0 & 0xffff) | 0x7ee00000;
+        tosa_poweroff();
+}
 static void __init tosa_init(void)
 {
+        pm_power_off = tosa_poweroff;
+        arm_pm_restart = tosa_restart;
        pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_IN);
        pxa_gpio_mode(TOSA_GPIO_TC6393_INT | GPIO_IN);
        pxa_gpio_mode(TOSA_GPIO_USB_IN | GPIO_IN);
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index d4a586e38d5b..693fb1e396e0 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -137,8 +137,11 @@ static struct amba_device *amba_devs[] __initdata = {
 static void __init gic_init_irq(void)
 {
 #ifdef CONFIG_REALVIEW_MPCORE
+        unsigned int pldctrl;
        writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
-        writel(0x008003c0, __io_address(REALVIEW_SYS_BASE) + 0xd8);
+        pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + 0xd8);
+        pldctrl |= 0x00800000;  /* New irq mode */
+        writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + 0xd8);
        writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 #endif
        gic_dist_init(__io_address(REALVIEW_GIC_DIST_BASE));
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index ce7d81000695..0c334136db7c 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -70,6 +70,18 @@ config ARCH_S3C2440
        help
          Say Y here if you are using the SMDK2440.
+config SMDK2440_CPU2440
+        bool "SMDK2440 with S3C2440 cpu module"
+        depends on ARCH_S3C2440
+        default y if ARCH_S3C2440
+        select CPU_S3C2440
+config SMDK2440_CPU2442
+        bool "SMDM2440 with S3C2442 cpu module"
+        depends on ARCH_S3C2440
+        select CPU_S3C2442
 config MACH_VR1000
        bool "Thorcom VR1000"
        select CPU_S3C2410
@@ -109,12 +121,26 @@ config CPU_S3C2410
          Support for S3C2410 and S3C2410A family from the S3C24XX line
          of Samsung Mobile CPUs.
+config CPU_S3C244X
+        bool
+        depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
+        help
+          Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
 config CPU_S3C2440
        bool
        depends on ARCH_S3C2410
+        select CPU_S3C244X
        help
          Support for S3C2440 Samsung Mobile CPU based systems.
+config CPU_S3C2442
+        bool
+        depends on ARCH_S3C2420
+        select CPU_S3C244X
+        help
+          Support for S3C2442 Samsung Mobile CPU based systems.
 comment "S3C2410 Boot"
 config S3C2410_BOOT_WATCHDOG
@@ -170,7 +196,7 @@ config S3C2410_PM_DEBUG
        depends on ARCH_S3C2410 && PM
        help
          Say Y here if you want verbose debugging from the PM Suspend and
-          Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt`
+          Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
          for more information.
 config S3C2410_PM_CHECK
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 3e5712db6b52..5e09355cd4f4 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -24,6 +24,11 @@ obj-$(CONFIG_S3C2410_DMA)  += dma.o
 obj-$(CONFIG_PM)           += pm.o sleep.o
 obj-$(CONFIG_PM_SIMTEC)    += pm-simtec.o
+# S3C244X support
+obj-$(CONFIG_CPU_S3C244X)  += s3c244x.o
+obj-$(CONFIG_CPU_S3C244X)  += s3c244x-irq.o
 # S3C2440 support
 obj-$(CONFIG_CPU_S3C2440)  += s3c2440.o s3c2440-dsc.o
@@ -31,6 +36,11 @@ obj-$(CONFIG_CPU_S3C2440)  += s3c2440-irq.o
 obj-$(CONFIG_CPU_S3C2440)  += s3c2440-clock.o
 obj-$(CONFIG_CPU_S3C2440)  += s3c2410-gpio.o
+# S3C2442 support
+obj-$(CONFIG_CPU_S3C2442)  += s3c2442.o
+obj-$(CONFIG_CPU_S3C2442)  += s3c2442-clock.o
 # bast extras
 obj-$(CONFIG_BAST_PC104_IRQ)    += bast-irq.o
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index 6de713ad319a..99d174612b53 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -70,7 +70,7 @@ void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable)
                clkcon &= ~clocks;
        /* ensure none of the special function bits set */
-        clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER);
+        clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER | 3);
        __raw_writel(clkcon, S3C2410_CLKCON);
 }
diff --git a/arch/arm/mach-s3c2410/common-smdk.c b/arch/arm/mach-s3c2410/common-smdk.c
index c940890f621f..a40eaa656177 100644
--- a/arch/arm/mach-s3c2410/common-smdk.c
+++ b/arch/arm/mach-s3c2410/common-smdk.c
@@ -34,6 +34,7 @@
 #include <asm/irq.h>
 #include <asm/arch/regs-gpio.h>
+#include <asm/arch/leds-gpio.h>
 #include <asm/arch/nand.h>
@@ -41,6 +42,66 @@
 #include "devs.h"
 #include "pm.h"
+/* LED devices */
+static struct s3c24xx_led_platdata smdk_pdata_led4 = {
+        .gpio           = S3C2410_GPF4,
+        .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+        .name           = "led4",
+        .def_trigger    = "timer",
+};
+static struct s3c24xx_led_platdata smdk_pdata_led5 = {
+        .gpio           = S3C2410_GPF5,
+        .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+        .name           = "led5",
+        .def_trigger    = "nand-disk",
+};
+static struct s3c24xx_led_platdata smdk_pdata_led6 = {
+        .gpio           = S3C2410_GPF6,
+        .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+        .name           = "led6",
+};
+static struct s3c24xx_led_platdata smdk_pdata_led7 = {
+        .gpio           = S3C2410_GPF7,
+        .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+        .name           = "led7",
+};
+static struct platform_device smdk_led4 = {
+        .name           = "s3c24xx_led",
+        .id             = 0,
+        .dev            = {
+                .platform_data = &smdk_pdata_led4,
+        },
+};
+static struct platform_device smdk_led5 = {
+        .name           = "s3c24xx_led",
+        .id             = 1,
+        .dev            = {
+                .platform_data = &smdk_pdata_led5,
+        },
+};
+static struct platform_device smdk_led6 = {
+        .name           = "s3c24xx_led",
+        .id             = 2,
+        .dev            = {
+                .platform_data = &smdk_pdata_led6,
+        },
+};
+static struct platform_device smdk_led7 = {
+        .name           = "s3c24xx_led",
+        .id             = 3,
+        .dev            = {
+                .platform_data = &smdk_pdata_led7,
+        },
+};
 /* NAND parititon from 2.4.18-swl5 */
 static struct mtd_partition smdk_default_nand_part[] = {
@@ -111,6 +172,10 @@ static struct s3c2410_platform_nand smdk_nand_info = {
 static struct platform_device __initdata *smdk_devs[] = {
        &s3c_device_nand,
+        &smdk_led4,
+        &smdk_led5,
+        &smdk_led6,
+        &smdk_led7,
 };
 void __init smdk_machine_init(void)
diff --git a/arch/arm/mach-s3c2410/cpu.c b/arch/arm/mach-s3c2410/cpu.c
index 70c34fcf7858..52842e6e86e6 100644
--- a/arch/arm/mach-s3c2410/cpu.c
+++ b/arch/arm/mach-s3c2410/cpu.c
@@ -37,12 +37,16 @@
 #include <asm/mach/map.h>
 #include <asm/arch/regs-gpio.h>
+#include <asm/arch/regs-serial.h>
 #include "cpu.h"
+#include "devs.h"
 #include "clock.h"
 #include "s3c2400.h"
 #include "s3c2410.h"
+#include "s3c244x.h"
 #include "s3c2440.h"
+#include "s3c2442.h"
 struct cpu_table {
        unsigned long   idcode;
@@ -59,6 +63,7 @@ struct cpu_table {
 static const char name_s3c2400[]  = "S3C2400";
 static const char name_s3c2410[]  = "S3C2410";
 static const char name_s3c2440[]  = "S3C2440";
+static const char name_s3c2442[]  = "S3C2442";
 static const char name_s3c2410a[] = "S3C2410A";
 static const char name_s3c2440a[] = "S3C2440A";
@@ -84,22 +89,31 @@ static struct cpu_table cpu_ids[] __initdata = {
        {
                .idcode         = 0x32440000,
                .idmask         = 0xffffffff,
-                .map_io         = s3c2440_map_io,
+                .map_io         = s3c244x_map_io,
-                .init_clocks    = s3c2440_init_clocks,
+                .init_clocks    = s3c244x_init_clocks,
-                .init_uarts     = s3c2440_init_uarts,
+                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2440_init,
                .name           = name_s3c2440
        },
        {
                .idcode         = 0x32440001,
                .idmask         = 0xffffffff,
-                .map_io         = s3c2440_map_io,
+                .map_io         = s3c244x_map_io,
-                .init_clocks    = s3c2440_init_clocks,
+                .init_clocks    = s3c244x_init_clocks,
-                .init_uarts     = s3c2440_init_uarts,
+                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2440_init,
                .name           = name_s3c2440a
        },
        {
+                .idcode         = 0x32440aaa,
+                .idmask         = 0xffffffff,
+                .map_io         = s3c244x_map_io,
+                .init_clocks    = s3c244x_init_clocks,
+                .init_uarts     = s3c244x_init_uarts,
+                .init           = s3c2442_init,
+                .name           = name_s3c2442
+        },
+        {
                .idcode         = 0x0,   /* S3C2400 doesn't have an idcode */
                .idmask         = 0xffffffff,
                .map_io         = s3c2400_map_io,
@@ -175,13 +189,13 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
                panic("Unknown S3C24XX CPU");
        }
+        printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
        if (cpu->map_io == NULL || cpu->init == NULL) {
                printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
                panic("Unsupported S3C24XX CPU");
        }
-        printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
        (cpu->map_io)(mach_desc, size);
 }
@@ -208,6 +222,49 @@ void __init s3c24xx_init_clocks(int xtal)
                (cpu->init_clocks)(xtal);
 }
+/* uart management */
+static int nr_uarts __initdata = 0;
+static struct s3c2410_uartcfg uart_cfgs[3];
+/* s3c24xx_init_uartdevs
+ *
+ * copy the specified platform data and configuration into our central
+ * set of devices, before the data is thrown away after the init process.
+ *
+ * This also fills in the array passed to the serial driver for the
+ * early initialisation of the console.
+*/
+void __init s3c24xx_init_uartdevs(char *name,
+                                  struct s3c24xx_uart_resources *res,
+                                  struct s3c2410_uartcfg *cfg, int no)
+{
+        struct platform_device *platdev;
+        struct s3c2410_uartcfg *cfgptr = uart_cfgs;
+        struct s3c24xx_uart_resources *resp;
+        int uart;
+        memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no);
+        for (uart = 0; uart < no; uart++, cfg++, cfgptr++) {
+                platdev = s3c24xx_uart_src[cfgptr->hwport];
+                resp = res + cfgptr->hwport;
+                s3c24xx_uart_devs[uart] = platdev;
+                platdev->name = name;
+                platdev->resource = resp->resources;
+                platdev->num_resources = resp->nr_resources;
+                platdev->dev.platform_data = cfgptr;
+        }
+        nr_uarts = no;
+}
 void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
        if (cpu == NULL)
@@ -232,6 +289,10 @@ static int __init s3c_arch_init(void)
        if (ret != 0)
                return ret;
+        ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
+        if (ret != 0)
+                return ret;
        if (board != NULL) {
                struct platform_device **ptr = board->devices;
                int i;
diff --git a/arch/arm/mach-s3c2410/cpu.h b/arch/arm/mach-s3c2410/cpu.h
index fc1067783f6d..40862899b2f1 100644
--- a/arch/arm/mach-s3c2410/cpu.h
+++ b/arch/arm/mach-s3c2410/cpu.h
@@ -31,6 +31,8 @@
 #define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
 /* forward declaration */
+struct s3c24xx_uart_resources;
+struct platform_device;
 struct s3c2410_uartcfg;
 struct map_desc;
@@ -44,6 +46,10 @@ extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c24xx_init_clocks(int xtal);
+extern void s3c24xx_init_uartdevs(char *name,
+                                  struct s3c24xx_uart_resources *res,
+                                  struct s3c2410_uartcfg *cfg, int no);
 /* the board structure is used at first initialsation time
 * to get info such as the devices to register for this
 * board. This is done because platfrom_add_devices() cannot
@@ -68,3 +74,4 @@ extern struct sys_timer s3c24xx_timer;
 /* system device classes */
 extern struct sysdev_class s3c2440_sysclass;
+extern struct sysdev_class s3c2442_sysclass;
diff --git a/arch/arm/mach-s3c2410/devs.c b/arch/arm/mach-s3c2410/devs.c
index ca09ba516e4c..ad3845e329ba 100644
--- a/arch/arm/mach-s3c2410/devs.c
+++ b/arch/arm/mach-s3c2410/devs.c
@@ -38,10 +38,86 @@
 #include <asm/arch/regs-serial.h>
 #include "devs.h"
+#include "cpu.h"
 /* Serial port registrations */
-struct platform_device *s3c24xx_uart_devs[3];
+static struct resource s3c2410_uart0_resource[] = {
+        [0] = {
+                .start = S3C2410_PA_UART0,
+                .end   = S3C2410_PA_UART0 + 0x3fff,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_S3CUART_RX0,
+                .end   = IRQ_S3CUART_ERR0,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+static struct resource s3c2410_uart1_resource[] = {
+        [0] = {
+                .start = S3C2410_PA_UART1,
+                .end   = S3C2410_PA_UART1 + 0x3fff,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_S3CUART_RX1,
+                .end   = IRQ_S3CUART_ERR1,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+static struct resource s3c2410_uart2_resource[] = {
+        [0] = {
+                .start = S3C2410_PA_UART2,
+                .end   = S3C2410_PA_UART2 + 0x3fff,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_S3CUART_RX2,
+                .end   = IRQ_S3CUART_ERR2,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
+        [0] = {
+                .resources      = s3c2410_uart0_resource,
+                .nr_resources   = ARRAY_SIZE(s3c2410_uart0_resource),
+        },
+        [1] = {
+                .resources      = s3c2410_uart1_resource,
+                .nr_resources   = ARRAY_SIZE(s3c2410_uart1_resource),
+        },
+        [2] = {
+                .resources      = s3c2410_uart2_resource,
+                .nr_resources   = ARRAY_SIZE(s3c2410_uart2_resource),
+        },
+};
+/* yart devices */
+static struct platform_device s3c24xx_uart_device0 = {
+        .id             = 0,
+};
+static struct platform_device s3c24xx_uart_device1 = {
+        .id             = 1,
+};
+static struct platform_device s3c24xx_uart_device2 = {
+        .id             = 2,
+};
+struct platform_device *s3c24xx_uart_src[3] = {
+        &s3c24xx_uart_device0,
+        &s3c24xx_uart_device1,
+        &s3c24xx_uart_device2,
+};
+struct platform_device *s3c24xx_uart_devs[3] = {
+};
 /* USB Host Controller */
diff --git a/arch/arm/mach-s3c2410/devs.h b/arch/arm/mach-s3c2410/devs.h
index 52c4bab5c761..fa124ed920e0 100644
--- a/arch/arm/mach-s3c2410/devs.h
+++ b/arch/arm/mach-s3c2410/devs.h
@@ -17,7 +17,15 @@
 #include <linux/config.h>
 #include <linux/platform_device.h>
+struct s3c24xx_uart_resources {
+        struct resource         *resources;
+        unsigned long            nr_resources;
+};
+extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
 extern struct platform_device *s3c24xx_uart_devs[];
+extern struct platform_device *s3c24xx_uart_src[];
 extern struct platform_device s3c_device_usb;
 extern struct platform_device s3c_device_lcd;
diff --git a/arch/arm/mach-s3c2410/mach-anubis.c b/arch/arm/mach-s3c2410/mach-anubis.c
index cc97fbf66291..4a92d6f92d6b 100644
--- a/arch/arm/mach-s3c2410/mach-anubis.c
+++ b/arch/arm/mach-s3c2410/mach-anubis.c
@@ -131,7 +131,7 @@ static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
 };
-static struct s3c2410_uartcfg anubis_uartcfgs[] = {
+static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
@@ -239,6 +239,54 @@ static struct s3c2410_platform_nand anubis_nand_info = {
        .select_chip    = anubis_nand_select,
 };
+/* IDE channels */
+static struct resource anubis_ide0_resource[] = {
+        {
+                .start  = S3C2410_CS3,
+                .end    = S3C2410_CS3 + (8*32) - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = S3C2410_CS3 + (1<<26),
+                .end    = S3C2410_CS3 + (1<<26) + (8*32) - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_IDE0,
+                .end    = IRQ_IDE0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device anubis_device_ide0 = {
+        .name           = "simtec-ide",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(anubis_ide0_resource),
+        .resource       = anubis_ide0_resource,
+};
+static struct resource anubis_ide1_resource[] = {
+        {
+                .start  = S3C2410_CS4,
+                .end    = S3C2410_CS4 + (8*32) - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = S3C2410_CS4 + (1<<26),
+                .end    = S3C2410_CS4 + (1<<26) + (8*32) - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_IDE0,
+                .end    = IRQ_IDE0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device anubis_device_ide1 = {
+        .name           = "simtec-ide",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(anubis_ide1_resource),
+        .resource       = anubis_ide1_resource,
+};
 /* Standard Anubis devices */
@@ -249,6 +297,8 @@ static struct platform_device *anubis_devices[] __initdata = {
        &s3c_device_i2c,
        &s3c_device_rtc,
        &s3c_device_nand,
+        &anubis_device_ide0,
+        &anubis_device_ide1,
 };
 static struct clk *anubis_clocks[] = {
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 995bb8add331..947234df8160 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -208,7 +208,7 @@ static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
 };
-static struct s3c2410_uartcfg bast_uartcfgs[] = {
+static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 646a3a5d33a5..aec431b2830a 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -72,7 +72,7 @@ static struct map_desc h1940_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
-static struct s3c2410_uartcfg h1940_uartcfgs[] = {
+static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
diff --git a/arch/arm/mach-s3c2410/mach-nexcoder.c b/arch/arm/mach-s3c2410/mach-nexcoder.c
index 07d09509a626..065a1d4e860b 100644
--- a/arch/arm/mach-s3c2410/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2410/mach-nexcoder.c
@@ -51,7 +51,7 @@ static struct map_desc nexcoder_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE
-static struct s3c2410_uartcfg nexcoder_uartcfgs[] = {
+static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
diff --git a/arch/arm/mach-s3c2410/mach-osiris.c b/arch/arm/mach-s3c2410/mach-osiris.c
index ae0787557751..858fd03c6bc5 100644
--- a/arch/arm/mach-s3c2410/mach-osiris.c
+++ b/arch/arm/mach-s3c2410/mach-osiris.c
@@ -95,8 +95,7 @@ static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
        }
 };
+static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
-static struct s3c2410_uartcfg osiris_uartcfgs[] = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
@@ -107,7 +106,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] = {
                .clocks_size = ARRAY_SIZE(osiris_serial_clocks)
        },
        [1] = {
-                .hwport      = 2,
+                .hwport      = 1,
                .flags       = 0,
                .ucon        = UCON,
                .ulcon       = ULCON,
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index b39daedf93ca..c71673fd9955 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -45,7 +45,7 @@ static struct map_desc otom11_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE
-static struct s3c2410_uartcfg otom11_uartcfgs[] = {
+static struct s3c2410_uartcfg otom11_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 2db932d72c5a..25f7e9f4dcee 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -65,7 +65,7 @@ static struct map_desc smdk2410_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
-static struct s3c2410_uartcfg smdk2410_uartcfgs[] = {
+static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c
index 5fffd1d51047..d661c6b7ff56 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2440.c
@@ -86,7 +86,7 @@ static struct map_desc smdk2440_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
-static struct s3c2410_uartcfg smdk2440_uartcfgs[] = {
+static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 785fc9cdcf7c..d18efb279d3d 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -166,7 +166,7 @@ static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
        }
 };
-static struct s3c2410_uartcfg vr1000_uartcfgs[] = {
+static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
                .flags       = 0,
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c
index fe57d966a34d..43e9a550a203 100644
--- a/arch/arm/mach-s3c2410/pm.c
+++ b/arch/arm/mach-s3c2410/pm.c
@@ -58,7 +58,11 @@ unsigned long s3c_pm_flags;
 /* cache functions from arch/arm/mm/proc-arm920.S */
+#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
 extern void arm920_flush_kern_cache_all(void);
+#else
+static void arm920_flush_kern_cache_all(void) { }
+#endif
 #define PFX "s3c24xx-pm: "
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 0a2013a76549..0852e87a79c4 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -42,6 +42,7 @@
 #include "s3c2410.h"
 #include "cpu.h"
+#include "devs.h"
 #include "clock.h"
 /* Initial IO mappings */
@@ -55,93 +56,13 @@ static struct map_desc s3c2410_iodesc[] __initdata = {
        IODESC_ENT(WATCHDOG),
 };
-static struct resource s3c_uart0_resource[] = {
-        [0] = {
-                .start = S3C2410_PA_UART0,
-                .end   = S3C2410_PA_UART0 + 0x3fff,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_S3CUART_RX0,
-                .end   = IRQ_S3CUART_ERR0,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-static struct resource s3c_uart1_resource[] = {
-        [0] = {
-                .start = S3C2410_PA_UART1,
-                .end   = S3C2410_PA_UART1 + 0x3fff,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_S3CUART_RX1,
-                .end   = IRQ_S3CUART_ERR1,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-static struct resource s3c_uart2_resource[] = {
-        [0] = {
-                .start = S3C2410_PA_UART2,
-                .end   = S3C2410_PA_UART2 + 0x3fff,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_S3CUART_RX2,
-                .end   = IRQ_S3CUART_ERR2,
-                .flags = IORESOURCE_IRQ,
-        }
-};
 /* our uart devices */
-static struct platform_device s3c_uart0 = {
-        .name             = "s3c2410-uart",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s3c_uart0_resource),
-        .resource         = s3c_uart0_resource,
-};
-static struct platform_device s3c_uart1 = {
-        .name             = "s3c2410-uart",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s3c_uart1_resource),
-        .resource         = s3c_uart1_resource,
-};
-static struct platform_device s3c_uart2 = {
-        .name             = "s3c2410-uart",
-        .id               = 2,
-        .num_resources    = ARRAY_SIZE(s3c_uart2_resource),
-        .resource         = s3c_uart2_resource,
-};
-static struct platform_device *uart_devices[] __initdata = {
-        &s3c_uart0,
-        &s3c_uart1,
-        &s3c_uart2
-};
-static int s3c2410_uart_count = 0;
 /* uart registration process */
 void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
-        struct platform_device *platdev;
+        s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
-        int uart;
-        for (uart = 0; uart < no; uart++, cfg++) {
-                platdev = uart_devices[cfg->hwport];
-                s3c24xx_uart_devs[uart] = platdev;
-                platdev->dev.platform_data = cfg;
-        }
-        s3c2410_uart_count = uart;
 }
 /* s3c2410_map_io
@@ -193,5 +114,5 @@ int __init s3c2410_init(void)
 {
        printk("S3C2410: Initialising architecture\n");
-        return platform_add_devices(s3c24xx_uart_devs, s3c2410_uart_count);
+        return 0;
 }
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
index 278d0044c85d..acfe3870727b 100644
--- a/arch/arm/mach-s3c2410/s3c2440-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -100,73 +100,12 @@ static struct irqchip s3c_irq_wdtac97 = {
        .ack        = s3c_irq_wdtac97_ack,
 };
-/* camera irq */
-static void s3c_irq_demux_cam(unsigned int irq,
-                              struct irqdesc *desc,
-                              struct pt_regs *regs)
-{
-        unsigned int subsrc, submsk;
-        struct irqdesc *mydesc;
-        /* read the current pending interrupts, and the mask
-         * for what it is available */
-        subsrc = __raw_readl(S3C2410_SUBSRCPND);
-        submsk = __raw_readl(S3C2410_INTSUBMSK);
-        subsrc &= ~submsk;
-        subsrc >>= 11;
-        subsrc &= 3;
-        if (subsrc != 0) {
-                if (subsrc & 1) {
-                        mydesc = irq_desc + IRQ_S3C2440_CAM_C;
-                        desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs);
-                }
-                if (subsrc & 2) {
-                        mydesc = irq_desc + IRQ_S3C2440_CAM_P;
-                        desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs);
-                }
-        }
-}
-#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
-static void
-s3c_irq_cam_mask(unsigned int irqno)
-{
-        s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
-}
-static void
-s3c_irq_cam_unmask(unsigned int irqno)
-{
-        s3c_irqsub_unmask(irqno, INTMSK_CAM);
-}
-static void
-s3c_irq_cam_ack(unsigned int irqno)
-{
-        s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
-}
-static struct irqchip s3c_irq_cam = {
-        .mask       = s3c_irq_cam_mask,
-        .unmask     = s3c_irq_cam_unmask,
-        .ack        = s3c_irq_cam_ack,
-};
 static int s3c2440_irq_add(struct sys_device *sysdev)
 {
        unsigned int irqno;
        printk("S3C2440: IRQ Support\n");
-        set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_NFCON, do_level_IRQ);
-        set_irq_flags(IRQ_NFCON, IRQF_VALID);
        /* add new chained handler for wdt, ac7 */
        set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
@@ -179,18 +118,6 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
                set_irq_flags(irqno, IRQF_VALID);
        }
-        /* add chained handler for camera */
-        set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
-        set_irq_handler(IRQ_CAM, do_level_IRQ);
-        set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
-        for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
-                set_irq_chip(irqno, &s3c_irq_cam);
-                set_irq_handler(irqno, do_level_IRQ);
-                set_irq_flags(irqno, IRQF_VALID);
-        }
        return 0;
 }
@@ -198,10 +125,10 @@ static struct sysdev_driver s3c2440_irq_driver = {
        .add    = s3c2440_irq_add,
 };
-static int s3c24xx_irq_driver(void)
+static int s3c2440_irq_init(void)
 {
        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
 }
-arch_initcall(s3c24xx_irq_driver);
+arch_initcall(s3c2440_irq_init);
diff --git a/arch/arm/mach-s3c2410/s3c2440.c b/arch/arm/mach-s3c2410/s3c2440.c
index b7fe6d9453fb..0ab50f44f318 100644
--- a/arch/arm/mach-s3c2410/s3c2440.c
+++ b/arch/arm/mach-s3c2410/s3c2440.c
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s3c2410/s3c2440.c
 *
- * Copyright (c) 2004-2005 Simtec Electronics
+ * Copyright (c) 2004-2006 Simtec Electronics
 *   Ben Dooks <ben@simtec.co.uk>
 *
 * Samsung S3C2440 Mobile CPU support
@@ -8,16 +8,6 @@
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
- *
- * Modifications:
- *      24-Aug-2004 BJD  Start of s3c2440 support
- *      12-Oct-2004 BJD  Moved clock info out to clock.c
- *      01-Nov-2004 BJD  Fixed clock build code
- *      09-Nov-2004 BJD  Added sysdev for power management
- *      04-Nov-2004 BJD  New serial registration
- *      15-Nov-2004 BJD  Rename the i2c device for the s3c2440
- *      14-Jan-2005 BJD  Moved clock init code into seperate function
- *      14-Jan-2005 BJD  Removed un-used clock bits
 */
 #include <linux/kernel.h>
@@ -50,234 +40,20 @@
 #include "cpu.h"
 #include "pm.h"
-static struct map_desc s3c2440_iodesc[] __initdata = {
-        IODESC_ENT(USBHOST),
-        IODESC_ENT(CLKPWR),
-        IODESC_ENT(LCD),
-        IODESC_ENT(TIMER),
-        IODESC_ENT(ADC),
-        IODESC_ENT(WATCHDOG),
-};
-static struct resource s3c_uart0_resource[] = {
-        [0] = {
-                .start = S3C2410_PA_UART0,
-                .end   = S3C2410_PA_UART0 + 0x3fff,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_S3CUART_RX0,
-                .end   = IRQ_S3CUART_ERR0,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-static struct resource s3c_uart1_resource[] = {
-        [0] = {
-                .start = S3C2410_PA_UART1,
-                .end   = S3C2410_PA_UART1 + 0x3fff,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_S3CUART_RX1,
-                .end   = IRQ_S3CUART_ERR1,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-static struct resource s3c_uart2_resource[] = {
-        [0] = {
-                .start = S3C2410_PA_UART2,
-                .end   = S3C2410_PA_UART2 + 0x3fff,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = IRQ_S3CUART_RX2,
-                .end   = IRQ_S3CUART_ERR2,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-/* our uart devices */
-static struct platform_device s3c_uart0 = {
-        .name             = "s3c2440-uart",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s3c_uart0_resource),
-        .resource         = s3c_uart0_resource,
-};
-static struct platform_device s3c_uart1 = {
-        .name             = "s3c2440-uart",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s3c_uart1_resource),
-        .resource         = s3c_uart1_resource,
-};
-static struct platform_device s3c_uart2 = {
-        .name             = "s3c2440-uart",
-        .id               = 2,
-        .num_resources    = ARRAY_SIZE(s3c_uart2_resource),
-        .resource         = s3c_uart2_resource,
-};
-static struct platform_device *uart_devices[] __initdata = {
-        &s3c_uart0,
-        &s3c_uart1,
-        &s3c_uart2
-};
-/* uart initialisation */
-static int __initdata s3c2440_uart_count;
-void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct platform_device *platdev;
-        int uart;
-        for (uart = 0; uart < no; uart++, cfg++) {
-                platdev = uart_devices[cfg->hwport];
-                s3c24xx_uart_devs[uart] = platdev;
-                platdev->dev.platform_data = cfg;
-        }
-        s3c2440_uart_count = uart;
-}
-#ifdef CONFIG_PM
-static struct sleep_save s3c2440_sleep[] = {
-        SAVE_ITEM(S3C2440_DSC0),
-        SAVE_ITEM(S3C2440_DSC1),
-        SAVE_ITEM(S3C2440_GPJDAT),
-        SAVE_ITEM(S3C2440_GPJCON),
-        SAVE_ITEM(S3C2440_GPJUP)
-};
-static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
-{
-        s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
-        return 0;
-}
-static int s3c2440_resume(struct sys_device *dev)
-{
-        s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
-        return 0;
-}
-#else
-#define s3c2440_suspend NULL
-#define s3c2440_resume  NULL
-#endif
-struct sysdev_class s3c2440_sysclass = {
-        set_kset_name("s3c2440-core"),
-        .suspend        = s3c2440_suspend,
-        .resume         = s3c2440_resume
-};
 static struct sys_device s3c2440_sysdev = {
        .cls            = &s3c2440_sysclass,
 };
-void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
+int __init s3c2440_init(void)
 {
-        /* register our io-tables */
+        printk("S3C2440: Initialising architecture\n");
-        iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
-        iotable_init(mach_desc, size);
-        /* rename any peripherals used differing from the s3c2410 */
-        s3c_device_i2c.name  = "s3c2440-i2c";
-        s3c_device_nand.name = "s3c2440-nand";
        /* change irq for watchdog */
        s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
        s3c_device_wdt.resource[1].end   = IRQ_S3C2440_WDT;
-}
-void __init s3c2440_init_clocks(int xtal)
-{
-        unsigned long clkdiv;
-        unsigned long camdiv;
-        unsigned long hclk, fclk, pclk;
-        int hdiv = 1;
-        /* now we've got our machine bits initialised, work out what
-         * clocks we've got */
-        fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
-        clkdiv = __raw_readl(S3C2410_CLKDIVN);
-        camdiv = __raw_readl(S3C2440_CAMDIVN);
-        /* work out clock scalings */
-        switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
-        case S3C2440_CLKDIVN_HDIVN_1:
-                hdiv = 1;
-                break;
-        case S3C2440_CLKDIVN_HDIVN_2:
-                hdiv = 2;
-                break;
-        case S3C2440_CLKDIVN_HDIVN_4_8:
-                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
-                break;
-        case S3C2440_CLKDIVN_HDIVN_3_6:
-                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
-                break;
-        }
-        hclk = fclk / hdiv;
-        pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
-        /* print brief summary of clocks, etc */
-        printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
-               print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
-        /* initialise the clocks here, to allow other things like the
-         * console to use them, and to add new ones after the initialisation
-         */
-        s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
-}
-/* need to register class before we actually register the device, and
- * we also need to ensure that it has been initialised before any of the
- * drivers even try to use it (even if not on an s3c2440 based system)
- * as a driver which may support both 2410 and 2440 may try and use it.
-*/
-static int __init s3c2440_core_init(void)
-{
-        return sysdev_class_register(&s3c2440_sysclass);
-}
-core_initcall(s3c2440_core_init);
-int __init s3c2440_init(void)
-{
-        int ret;
-        printk("S3C2440: Initialising architecture\n");
-        ret = sysdev_register(&s3c2440_sysdev);
+        /* register our system device for everything else */
-        if (ret != 0)
-                printk(KERN_ERR "failed to register sysdev for s3c2440\n");
-        else
-                ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);
-        return ret;
+        return sysdev_register(&s3c2440_sysdev);
 }
diff --git a/arch/arm/mach-s3c2410/s3c2442-clock.c b/arch/arm/mach-s3c2410/s3c2442-clock.c
new file mode 100644
index 000000000000..5b7b301eb522
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2442-clock.c
@@ -0,0 +1,171 @@
+/* linux/arch/arm/mach-s3c2410/s3c2442-clock.c
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2442 Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/device.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mutex.h>
+#include <linux/clk.h>
+#include <asm/hardware.h>
+#include <asm/atomic.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/arch/regs-clock.h>
+#include "clock.h"
+#include "cpu.h"
+/* S3C2442 extended clock support */
+static unsigned long s3c2442_camif_upll_round(struct clk *clk,
+                                              unsigned long rate)
+{
+        unsigned long parent_rate = clk_get_rate(clk->parent);
+        int div;
+        if (rate > parent_rate)
+                return parent_rate;
+        div = parent_rate / rate;
+        if (div == 3)
+                return parent_rate / 3;
+        /* note, we remove the +/- 1 calculations for the divisor */
+        div /= 2;
+        if (div < 1)
+                div = 1;
+        else if (div > 16)
+                div = 16;
+        return parent_rate / (div * 2);
+}
+static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate)
+{
+        unsigned long parent_rate = clk_get_rate(clk->parent);
+        unsigned long camdivn =  __raw_readl(S3C2440_CAMDIVN);
+        rate = s3c2442_camif_upll_round(clk, rate);
+        camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3;
+        if (rate == parent_rate) {
+                camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL;
+        } else if ((parent_rate / rate) == 3) {
+                camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
+                camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3;
+        } else {
+                camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK;
+                camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
+                camdivn |= (((parent_rate / rate) / 2) - 1);
+        }
+        __raw_writel(camdivn, S3C2440_CAMDIVN);
+        return 0;
+}
+/* Extra S3C2442 clocks */
+static struct clk s3c2442_clk_cam = {
+        .name           = "camif",
+        .id             = -1,
+        .enable         = s3c24xx_clkcon_enable,
+        .ctrlbit        = S3C2440_CLKCON_CAMERA,
+};
+static struct clk s3c2442_clk_cam_upll = {
+        .name           = "camif-upll",
+        .id             = -1,
+        .set_rate       = s3c2442_camif_upll_setrate,
+        .round_rate     = s3c2442_camif_upll_round,
+};
+static int s3c2442_clk_add(struct sys_device *sysdev)
+{
+        unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
+        unsigned long clkdivn;
+        struct clk *clk_h;
+        struct clk *clk_p;
+        struct clk *clk_upll;
+        printk("S3C2442: Clock Support, DVS %s\n",
+               (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
+        clk_p = clk_get(NULL, "pclk");
+        clk_h = clk_get(NULL, "hclk");
+        clk_upll = clk_get(NULL, "upll");
+        if (IS_ERR(clk_p) || IS_ERR(clk_h) || IS_ERR(clk_upll)) {
+                printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
+                return -EINVAL;
+        }
+        /* check rate of UPLL, and if it is near 96MHz, then change
+         * to using half the UPLL rate for the system */
+        if (clk_get_rate(clk_upll) > (94 * MHZ)) {
+                clk_usb_bus.rate = clk_get_rate(clk_upll) / 2;
+                mutex_lock(&clocks_mutex);
+                clkdivn = __raw_readl(S3C2410_CLKDIVN);
+                clkdivn |= S3C2440_CLKDIVN_UCLK;
+                __raw_writel(clkdivn, S3C2410_CLKDIVN);
+                mutex_unlock(&clocks_mutex);
+        }
+        s3c2442_clk_cam.parent = clk_h;
+        s3c2442_clk_cam_upll.parent = clk_upll;
+        s3c24xx_register_clock(&s3c2442_clk_cam);
+        s3c24xx_register_clock(&s3c2442_clk_cam_upll);
+        clk_disable(&s3c2442_clk_cam);
+        return 0;
+}
+static struct sysdev_driver s3c2442_clk_driver = {
+        .add    = s3c2442_clk_add,
+};
+static __init int s3c2442_clk_init(void)
+{
+        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
+}
+arch_initcall(s3c2442_clk_init);
diff --git a/arch/arm/mach-s3c2410/s3c2442.c b/arch/arm/mach-s3c2410/s3c2442.c
new file mode 100644
index 000000000000..debae2430557
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2442.c
@@ -0,0 +1,52 @@
+/* linux/arch/arm/mach-s3c2410/s3c2440.c
+ *
+ * Copyright (c) 2006 Simtec Electronics
+ *   Ben Dooks <ben@simtec.co.uk>
+ *
+ * Samsung S3C2442 Mobile CPU support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/clk.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/arch/regs-clock.h>
+#include <asm/arch/regs-serial.h>
+#include <asm/arch/regs-gpio.h>
+#include <asm/arch/regs-gpioj.h>
+#include <asm/arch/regs-dsc.h>
+#include "s3c2442.h"
+#include "clock.h"
+#include "devs.h"
+#include "cpu.h"
+#include "pm.h"
+static struct sys_device s3c2442_sysdev = {
+        .cls            = &s3c2442_sysclass,
+};
+int __init s3c2442_init(void)
+{
+        printk("S3C2442: Initialising architecture\n");
+        return sysdev_register(&s3c2442_sysdev);
+}
diff --git a/arch/arm/mach-s3c2410/s3c2442.h b/arch/arm/mach-s3c2410/s3c2442.h
new file mode 100644
index 000000000000..0ae37d24866c
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2442.h
@@ -0,0 +1,17 @@
+/* arch/arm/mach-s3c2410/s3c2442.h
+ *
+ * Copyright (c) 2006 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for s3c2442 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#ifdef CONFIG_CPU_S3C2442
+extern  int s3c2442_init(void);
+#else
+#define s3c2442_init NULL
+#endif
diff --git a/arch/arm/mach-s3c2410/s3c244x-irq.c b/arch/arm/mach-s3c2410/s3c244x-irq.c
new file mode 100644
index 000000000000..2aadca1ce7eb
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c244x-irq.c
@@ -0,0 +1,142 @@
+/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c
+ *
+ * Copyright (c) 2003,2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Changelog:
+ *      25-Jul-2005 BJD         Split from irq.c
+ *
+*/
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/ptrace.h>
+#include <linux/sysdev.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/mach/irq.h>
+#include <asm/arch/regs-irq.h>
+#include <asm/arch/regs-gpio.h>
+#include "cpu.h"
+#include "pm.h"
+#include "irq.h"
+/* camera irq */
+static void s3c_irq_demux_cam(unsigned int irq,
+                              struct irqdesc *desc,
+                              struct pt_regs *regs)
+{
+        unsigned int subsrc, submsk;
+        struct irqdesc *mydesc;
+        /* read the current pending interrupts, and the mask
+         * for what it is available */
+        subsrc = __raw_readl(S3C2410_SUBSRCPND);
+        submsk = __raw_readl(S3C2410_INTSUBMSK);
+        subsrc &= ~submsk;
+        subsrc >>= 11;
+        subsrc &= 3;
+        if (subsrc != 0) {
+                if (subsrc & 1) {
+                        mydesc = irq_desc + IRQ_S3C2440_CAM_C;
+                        desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc, regs);
+                }
+                if (subsrc & 2) {
+                        mydesc = irq_desc + IRQ_S3C2440_CAM_P;
+                        desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc, regs);
+                }
+        }
+}
+#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
+static void
+s3c_irq_cam_mask(unsigned int irqno)
+{
+        s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
+}
+static void
+s3c_irq_cam_unmask(unsigned int irqno)
+{
+        s3c_irqsub_unmask(irqno, INTMSK_CAM);
+}
+static void
+s3c_irq_cam_ack(unsigned int irqno)
+{
+        s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
+}
+static struct irqchip s3c_irq_cam = {
+        .mask       = s3c_irq_cam_mask,
+        .unmask     = s3c_irq_cam_unmask,
+        .ack        = s3c_irq_cam_ack,
+};
+static int s3c244x_irq_add(struct sys_device *sysdev)
+{
+        unsigned int irqno;
+        set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
+        set_irq_handler(IRQ_NFCON, do_level_IRQ);
+        set_irq_flags(IRQ_NFCON, IRQF_VALID);
+        /* add chained handler for camera */
+        set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
+        set_irq_handler(IRQ_CAM, do_level_IRQ);
+        set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
+        for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
+                set_irq_chip(irqno, &s3c_irq_cam);
+                set_irq_handler(irqno, do_level_IRQ);
+                set_irq_flags(irqno, IRQF_VALID);
+        }
+        return 0;
+}
+static struct sysdev_driver s3c244x_irq_driver = {
+        .add    = s3c244x_irq_add,
+};
+static int s3c2440_irq_init(void)
+{
+        return sysdev_driver_register(&s3c2440_sysclass, &s3c244x_irq_driver);
+}
+arch_initcall(s3c2440_irq_init);
+static int s3c2442_irq_init(void)
+{
+        return sysdev_driver_register(&s3c2442_sysclass, &s3c244x_irq_driver);
+}
+arch_initcall(s3c2442_irq_init);
diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c
new file mode 100644
index 000000000000..96852a7000db
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c244x.c
@@ -0,0 +1,182 @@
+/* linux/arch/arm/mach-s3c2410/s3c244x.c
+ *
+ * Copyright (c) 2004-2006 Simtec Electronics
+ *   Ben Dooks <ben@simtec.co.uk>
+ *
+ * Samsung S3C2440 and S3C2442 Mobile CPU support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/clk.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/arch/regs-clock.h>
+#include <asm/arch/regs-serial.h>
+#include <asm/arch/regs-gpio.h>
+#include <asm/arch/regs-gpioj.h>
+#include <asm/arch/regs-dsc.h>
+#include "s3c2440.h"
+#include "s3c244x.h"
+#include "clock.h"
+#include "devs.h"
+#include "cpu.h"
+#include "pm.h"
+static struct map_desc s3c244x_iodesc[] __initdata = {
+        IODESC_ENT(CLKPWR),
+        IODESC_ENT(TIMER),
+        IODESC_ENT(WATCHDOG),
+        IODESC_ENT(LCD),
+        IODESC_ENT(ADC),
+        IODESC_ENT(USBHOST),
+};
+/* uart initialisation */
+void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
+}
+void __init s3c244x_map_io(struct map_desc *mach_desc, int size)
+{
+        /* register our io-tables */
+        iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
+        iotable_init(mach_desc, size);
+        /* rename any peripherals used differing from the s3c2410 */
+        s3c_device_i2c.name  = "s3c2440-i2c";
+        s3c_device_nand.name = "s3c2440-nand";
+}
+void __init s3c244x_init_clocks(int xtal)
+{
+        unsigned long clkdiv;
+        unsigned long camdiv;
+        unsigned long hclk, fclk, pclk;
+        int hdiv = 1;
+        /* now we've got our machine bits initialised, work out what
+         * clocks we've got */
+        fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
+        clkdiv = __raw_readl(S3C2410_CLKDIVN);
+        camdiv = __raw_readl(S3C2440_CAMDIVN);
+        /* work out clock scalings */
+        switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
+        case S3C2440_CLKDIVN_HDIVN_1:
+                hdiv = 1;
+                break;
+        case S3C2440_CLKDIVN_HDIVN_2:
+                hdiv = 2;
+                break;
+        case S3C2440_CLKDIVN_HDIVN_4_8:
+                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
+                break;
+        case S3C2440_CLKDIVN_HDIVN_3_6:
+                hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
+                break;
+        }
+        hclk = fclk / hdiv;
+        pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
+        /* print brief summary of clocks, etc */
+        printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
+               print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
+        /* initialise the clocks here, to allow other things like the
+         * console to use them, and to add new ones after the initialisation
+         */
+        s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
+}
+#ifdef CONFIG_PM
+static struct sleep_save s3c244x_sleep[] = {
+        SAVE_ITEM(S3C2440_DSC0),
+        SAVE_ITEM(S3C2440_DSC1),
+        SAVE_ITEM(S3C2440_GPJDAT),
+        SAVE_ITEM(S3C2440_GPJCON),
+        SAVE_ITEM(S3C2440_GPJUP)
+};
+static int s3c244x_suspend(struct sys_device *dev, pm_message_t state)
+{
+        s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
+        return 0;
+}
+static int s3c244x_resume(struct sys_device *dev)
+{
+        s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
+        return 0;
+}
+#else
+#define s3c244x_suspend NULL
+#define s3c244x_resume  NULL
+#endif
+/* Since the S3C2442 and S3C2440 share  items, put both sysclasses here */
+struct sysdev_class s3c2440_sysclass = {
+        set_kset_name("s3c2440-core"),
+        .suspend        = s3c244x_suspend,
+        .resume         = s3c244x_resume
+};
+struct sysdev_class s3c2442_sysclass = {
+        set_kset_name("s3c2442-core"),
+        .suspend        = s3c244x_suspend,
+        .resume         = s3c244x_resume
+};
+/* need to register class before we actually register the device, and
+ * we also need to ensure that it has been initialised before any of the
+ * drivers even try to use it (even if not on an s3c2440 based system)
+ * as a driver which may support both 2410 and 2440 may try and use it.
+*/
+static int __init s3c2440_core_init(void)
+{
+        return sysdev_class_register(&s3c2440_sysclass);
+}
+core_initcall(s3c2440_core_init);
+static int __init s3c2442_core_init(void)
+{
+        return sysdev_class_register(&s3c2442_sysclass);
+}
+core_initcall(s3c2442_core_init);
diff --git a/arch/arm/mach-s3c2410/s3c244x.h b/arch/arm/mach-s3c2410/s3c244x.h
new file mode 100644
index 000000000000..3e7f5f75134d
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c244x.h
@@ -0,0 +1,25 @@
+/* arch/arm/mach-s3c2410/s3c2440.h
+ *
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Header file for S3C2440 and S3C2442 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
+extern void s3c244x_map_io(struct map_desc *mach_desc, int size);
+extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+extern void s3c244x_init_clocks(int xtal);
+#else
+#define s3c244x_init_clocks NULL
+#define s3c244x_init_uarts NULL
+#define s3c244x_map_io NULL
+#endif
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S
index 832fb86a03b4..5f6761ed96b2 100644
--- a/arch/arm/mach-s3c2410/sleep.S
+++ b/arch/arm/mach-s3c2410/sleep.S
@@ -59,15 +59,16 @@ ENTRY(s3c2410_cpu_suspend)
        mrc     p15, 0, r5, c13, c0, 0  @ PID
        mrc     p15, 0, r6, c3, c0, 0   @ Domain ID
        mrc     p15, 0, r7, c2, c0, 0   @ translation table base address
-        mrc     p15, 0, r8, c2, c0, 0   @ auxiliary control register
+        mrc     p15, 0, r8, c1, c0, 0   @ control register
-        mrc     p15, 0, r9, c1, c0, 0   @ control register
        stmia   r0, { r4 - r13 }
        @@ flush the caches to ensure everything is back out to
        @@ SDRAM before the core powers down
+#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
        bl      arm920_flush_kern_cache_all
+#endif
        @@ prepare cpu to sleep
@@ -165,7 +166,6 @@ ENTRY(s3c2410_cpu_resume)
        mcr     p15, 0, r5, c13, c0, 0          @ PID
        mcr     p15, 0, r6, c3, c0, 0           @ Domain ID
        mcr     p15, 0, r7, c2, c0, 0           @ translation table base
-        mcr     p15, 0, r8, c1, c1, 0           @ auxilliary control
 #ifdef CONFIG_DEBUG_RESUME
        mov     r3, #'R'
@@ -173,7 +173,7 @@ ENTRY(s3c2410_cpu_resume)
 #endif
        ldr     r2, =resume_with_mmu
-        mcr     p15, 0, r9, c1, c0, 0           @ turn on MMU, etc
+        mcr     p15, 0, r8, c1, c0, 0           @ turn on MMU, etc
        nop                                     @ second-to-last before mmu
        mov     pc, r2                          @ go back to virtual address
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 9e02bc3712a0..af6d2775cf82 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -59,6 +59,14 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
                if (irr & (IRR_ETHERNET | IRR_USAR)) {
                        desc->chip->mask(irq);
+                        /*
+                         * Ack the interrupt now to prevent re-entering
+                         * this neponset handler.  Again, this is safe
+                         * since we'll check the IRR register prior to
+                         * leaving.
+                         */
+                        desc->chip->ack(irq);
                        if (irr & IRR_ETHERNET) {
                                d = irq_desc + IRQ_NEPONSET_SMC9196;
                                desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 799697d32dec..cebd48a3dae4 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -112,10 +112,9 @@ void __init versatile_init_irq(void)
 {
        unsigned int i;
-        vic_init(VA_VIC_BASE, IRQ_VIC_START, ~(1 << 31));
+        vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0);
-        set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq);
+        set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
-        enable_irq(IRQ_VICSOURCE31);
        /* Do second interrupt controller */
        writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c55b739e10ba..4221d054a1e9 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -121,8 +121,8 @@ config CPU_ARM925T
 # ARM926T
 config CPU_ARM926T
        bool "Support ARM926T processor"
-        depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB
+        depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX
-        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX
+        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX
        select CPU_32v5
        select CPU_ABRT_EV5TJ
        select CPU_CACHE_VIVT
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 25e0ca3e598c..c1f7180c7bed 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -141,7 +141,7 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
                return NULL;
        addr = (unsigned long)area->addr;
        if (remap_area_pages(addr, pfn, size, flags)) {
-                vfree((void *)addr);
+                vunmap((void *)addr);
                return NULL;
        }
        return (void __iomem *) (offset + (char *)addr);
@@ -173,7 +173,7 @@ EXPORT_SYMBOL(__ioremap);
 void __iounmap(void __iomem *addr)
 {
-        vfree((void *) (PAGE_MASK & (unsigned long) addr));
+        vunmap((void *)(PAGE_MASK & (unsigned long)addr));
 }
 EXPORT_SYMBOL(__iounmap);
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index f14b2d0f3690..95273de4f772 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -376,7 +376,7 @@ void __init build_mem_type_table(void)
                ecc_mask = 0;
        }
-        if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
+        if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
                for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
                        if (mem_types[i].prot_l1)
                                mem_types[i].prot_l1 |= PMD_BIT4;
@@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode)
                pgd = init_mm.pgd;
        base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
-        if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
+        if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
                base_pmdval |= PMD_BIT4;
        for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 80873b36c3f7..8d32e21fe151 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -427,12 +427,13 @@ __xsc3_setup:
 #endif
        mcr     p15, 0, r0, c1, c0, 1           @ set auxiliary control reg
        mrc     p15, 0, r0, c1, c0, 0           @ get control register
-        bic     r0, r0, #0x0200                 @ .... ..R. .... ....
        bic     r0, r0, #0x0002                 @ .... .... .... ..A.
        orr     r0, r0, #0x0005                 @ .... .... .... .C.M
 #if BTB_ENABLE
+        bic     r0, r0, #0x0200                 @ .... ..R. .... ....
        orr     r0, r0, #0x3900                 @ ..VI Z..S .... ....
 #else
+        bic     r0, r0, #0x0a00                 @ .... Z.R. .... ....
        orr     r0, r0, #0x3100                 @ ..VI ...S .... ....
 #endif
 #if L2_CACHE_ENABLE
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 8ab5300dcb94..6d7de9c0412f 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Mon Feb 20 10:18:02 2006
+# Last update: Mon May 8 20:11:05 2006
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -566,8 +566,8 @@ switchgrass		MACH_SWITCHGRASS	SWITCHGRASS		549
 ens_cmu                 MACH_ENS_CMU            ENS_CMU                 550
 mm6_sdb                 MACH_MM6_SDB            MM6_SDB                 551
 saturn                  MACH_SATURN             SATURN                  552
-argonplusevb            MACH_ARGONPLUSEVB       ARGONPLUSEVB            553
+i30030evb               MACH_ARGONPLUSEVB       ARGONPLUSEVB            553
-scma11evb               MACH_SCMA11EVB          SCMA11EVB               554
+mxc27530evb             MACH_SCMA11EVB          SCMA11EVB               554
 smdk2800                MACH_SMDK2800           SMDK2800                555
 mtwilson                MACH_MTWILSON           MTWILSON                556
 ziti                    MACH_ZITI               ZITI                    557
@@ -647,7 +647,7 @@ sendt			MACH_SENDT		SENDT			630
 mx2jazz                 MACH_MX2JAZZ            MX2JAZZ                 631
 multiio                 MACH_MULTIIO            MULTIIO                 632
 hrdisplay               MACH_HRDISPLAY          HRDISPLAY               633
-scma11bb                MACH_SCMA11BB           SCMA11BB                634
+mxc27530ads             MACH_SCMA11BB           SCMA11BB                634
 trizeps3                MACH_TRIZEPS3           TRIZEPS3                635
 zefeerdza               MACH_ZEFEERDZA          ZEFEERDZA               636
 zefeerdzb               MACH_ZEFEERDZB          ZEFEERDZB               637
@@ -721,7 +721,7 @@ gp32			MACH_GP32		GP32			706
 gem                     MACH_GEM                GEM                     707
 i858                    MACH_I858               I858                    708
 hx2750                  MACH_HX2750             HX2750                  709
-zeusevb                 MACH_ZEUSEVB            ZEUSEVB                 710
+mxc91131evb             MACH_ZEUSEVB            ZEUSEVB                 710
 p700                    MACH_P700               P700                    711
 cpe                     MACH_CPE                CPE                     712
 spitz                   MACH_SPITZ              SPITZ                   713
@@ -802,7 +802,7 @@ cpuat91			MACH_CPUAT91		CPUAT91			787
 rea9200                 MACH_REA9200            REA9200                 788
 acts_pune_sa1110        MACH_ACTS_PUNE_SA1110   ACTS_PUNE_SA1110        789
 ixp425                  MACH_IXP425             IXP425                  790
-argonplusodyssey        MACH_ARGONPLUSODYSSEY   ARGONPLUSODYSSEY        791
+i30030ads               MACH_ARGONPLUSODYSSEY   ARGONPLUSODYSSEY        791
 perch                   MACH_PERCH              PERCH                   792
 eis05r1                 MACH_EIS05R1            EIS05R1                 793
 pepperpad               MACH_PEPPERPAD          PEPPERPAD               794
@@ -827,7 +827,7 @@ micro9l			MACH_MICRO9L		MICRO9L			812
 uc5471dsp               MACH_UC5471DSP          UC5471DSP               813
 sj5471eng               MACH_SJ5471ENG          SJ5471ENG               814
 none                    MACH_CMPXA26X           CMPXA26X                815
-nc                      MACH_NC                 NC                      816
+nc1                     MACH_NC                 NC                      816
 omap_palmte             MACH_OMAP_PALMTE        OMAP_PALMTE             817
 ajax52x                 MACH_AJAX52X            AJAX52X                 818
 siriustar               MACH_SIRIUSTAR          SIRIUSTAR               819
@@ -930,7 +930,7 @@ netclient		MACH_NETCLIENT		NETCLIENT		916
 xscale_palmtt5          MACH_XSCALE_PALMTT5     XSCALE_PALMTT5          917
 xscale_palmtc           MACH_OMAP_PALMTC        OMAP_PALMTC             918
 omap_apollon            MACH_OMAP_APOLLON       OMAP_APOLLON            919
-argonlvevb              MACH_ARGONLVEVB         ARGONLVEVB              920
+mxc30030evb             MACH_ARGONLVEVB         ARGONLVEVB              920
 rea_2d                  MACH_REA_2D             REA_2D                  921
 eti3e524                MACH_TI3E524            TI3E524                 922
 ateb9200                MACH_ATEB9200           ATEB9200                923
@@ -965,7 +965,78 @@ sisteron		MACH_SISTERON		SISTERON		951
 rx1950                  MACH_RX1950             RX1950                  952
 tsc_venus               MACH_TSC_VENUS          TSC_VENUS               953
 ds101j                  MACH_DS101J             DS101J                  954
-mxc300_30ads            MACH_MXC30030ADS        MXC30030ADS             955
+mxc30030ads             MACH_MXC30030ADS        MXC30030ADS             955
 fujitsu_wimaxsoc        MACH_FUJITSU_WIMAXSOC   FUJITSU_WIMAXSOC        956
 dualpcmodem             MACH_DUALPCMODEM        DUALPCMODEM             957
 gesbc9312               MACH_GESBC9312          GESBC9312               958
+htcapache               MACH_HTCAPACHE          HTCAPACHE               959
+ixdp435                 MACH_IXDP435            IXDP435                 960
+catprovt100             MACH_CATPROVT100        CATPROVT100             961
+picotux1xx              MACH_PICOTUX1XX         PICOTUX1XX              962
+picotux2xx              MACH_PICOTUX2XX         PICOTUX2XX              963
+dsmg600                 MACH_DSMG600            DSMG600                 964
+empc2                   MACH_EMPC2              EMPC2                   965
+ventura                 MACH_VENTURA            VENTURA                 966
+phidget_sbc             MACH_PHIDGET_SBC        PHIDGET_SBC             967
+ij3k                    MACH_IJ3K               IJ3K                    968
+pisgah                  MACH_PISGAH             PISGAH                  969
+omap_fsample            MACH_OMAP_FSAMPLE       OMAP_FSAMPLE            970
+sg720                   MACH_SG720              SG720                   971
+redfox                  MACH_REDFOX             REDFOX                  972
+mysh_ep9315_1           MACH_MYSH_EP9315_1      MYSH_EP9315_1           973
+tpf106                  MACH_TPF106             TPF106                  974
+at91rm9200kg            MACH_AT91RM9200KG       AT91RM9200KG            975
+racemt2                 MACH_SLEDB              SLEDB                   976
+ontrack                 MACH_ONTRACK            ONTRACK                 977
+pm1200                  MACH_PM1200             PM1200                  978
+ess24562                MACH_ESS24XXX           ESS24XXX                979
+coremp7                 MACH_COREMP7            COREMP7                 980
+nexcoder_6446           MACH_NEXCODER_6446      NEXCODER_6446           981
+stvc8380                MACH_STVC8380           STVC8380                982
+teklynx                 MACH_TEKLYNX            TEKLYNX                 983
+carbonado               MACH_CARBONADO          CARBONADO               984
+sysmos_mp730            MACH_SYSMOS_MP730       SYSMOS_MP730            985
+snapper_cl15            MACH_SNAPPER_CL15       SNAPPER_CL15            986
+pgigim                  MACH_PGIGIM             PGIGIM                  987
+ptx9160p2               MACH_PTX9160P2          PTX9160P2               988
+dcore1                  MACH_DCORE1             DCORE1                  989
+victorpxa               MACH_VICTORPXA          VICTORPXA               990
+mx2dtb                  MACH_MX2DTB             MX2DTB                  991
+pxa_irex_er0100         MACH_PXA_IREX_ER0100    PXA_IREX_ER0100         992
+omap_palmz71            MACH_OMAP_PALMZ71       OMAP_PALMZ71            993
+bartec_deg              MACH_BARTEC_DEG         BARTEC_DEG              994
+hw50251                 MACH_HW50251            HW50251                 995
+ibox                    MACH_IBOX               IBOX                    996
+atlaslh7a404            MACH_ATLASLH7A404       ATLASLH7A404            997
+pt2026                  MACH_PT2026             PT2026                  998
+htcalpine               MACH_HTCALPINE          HTCALPINE               999
+bartec_vtu              MACH_BARTEC_VTU         BARTEC_VTU              1000
+vcoreii                 MACH_VCOREII            VCOREII                 1001
+pdnb3                   MACH_PDNB3              PDNB3                   1002
+htcbeetles              MACH_HTCBEETLES         HTCBEETLES              1003
+s3c6400                 MACH_S3C6400            S3C6400                 1004
+s3c2443                 MACH_S3C2443            S3C2443                 1005
+omap_ldk                MACH_OMAP_LDK           OMAP_LDK                1006
+smdk2460                MACH_SMDK2460           SMDK2460                1007
+smdk2440                MACH_SMDK2440           SMDK2440                1008
+smdk2412                MACH_SMDK2412           SMDK2412                1009
+webbox                  MACH_WEBBOX             WEBBOX                  1010
+cwwndp                  MACH_CWWNDP             CWWNDP                  1011
+dragon                  MACH_DRAGON             DRAGON                  1012
+opendo_cpu_board        MACH_OPENDO_CPU_BOARD   OPENDO_CPU_BOARD        1013
+ccm2200                 MACH_CCM2200            CCM2200                 1014
+etwarm                  MACH_ETWARM             ETWARM                  1015
+m93030                  MACH_M93030             M93030                  1016
+cc7u                    MACH_CC7U               CC7U                    1017
+mtt_ranger              MACH_MTT_RANGER         MTT_RANGER              1018
+nexus                   MACH_NEXUS              NEXUS                   1019
+desman                  MACH_DESMAN             DESMAN                  1020
+bkde303                 MACH_BKDE303            BKDE303                 1021
+smdk2413                MACH_SMDK2413           SMDK2413                1022
+aml_m7200               MACH_AML_M7200          AML_M7200               1023
+aml_m5900               MACH_AML_M5900          AML_M5900               1024
+sg640                   MACH_SG640              SG640                   1025
+edg79524                MACH_EDG79524           EDG79524                1026
+ai2410                  MACH_AI2410             AI2410                  1027
+ixp465                  MACH_IXP465             IXP465                  1028
+balloon3                MACH_BALLOON3           BALLOON3                1029
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index c6fe99e57a05..8dfa3054f10f 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -758,10 +758,10 @@ config HOTPLUG_CPU
        bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
        depends on SMP && HOTPLUG && EXPERIMENTAL && !X86_VOYAGER
        ---help---
-          Say Y here to experiment with turning CPUs off and on.  CPUs
+          Say Y here to experiment with turning CPUs off and on, and to
-          can be controlled through /sys/devices/system/cpu.
+          enable suspend on SMP systems. CPUs can be controlled through
+          /sys/devices/system/cpu.
-          Say N.
 endmenu
diff --git a/arch/i386/kernel/acpi/earlyquirk.c b/arch/i386/kernel/acpi/earlyquirk.c
index 2e3b643a4dc4..1649a175a206 100644
--- a/arch/i386/kernel/acpi/earlyquirk.c
+++ b/arch/i386/kernel/acpi/earlyquirk.c
@@ -5,17 +5,34 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/acpi.h>
 #include <asm/pci-direct.h>
 #include <asm/acpi.h>
 #include <asm/apic.h>
+#ifdef CONFIG_ACPI
+static int nvidia_hpet_detected __initdata;
+static int __init nvidia_hpet_check(unsigned long phys, unsigned long size)
+{
+        nvidia_hpet_detected = 1;
+        return 0;
+}
+#endif
 static int __init check_bridge(int vendor, int device)
 {
 #ifdef CONFIG_ACPI
-        /* According to Nvidia all timer overrides are bogus. Just ignore
+        /* According to Nvidia all timer overrides are bogus unless HPET
-           them all. */
+           is enabled. */
        if (vendor == PCI_VENDOR_ID_NVIDIA) {
-                acpi_skip_timer_override = 1;
+                nvidia_hpet_detected = 0;
+                acpi_table_parse(ACPI_HPET, nvidia_hpet_check);
+                if (nvidia_hpet_detected == 0) {
+                        acpi_skip_timer_override = 1;
+                }
        }
 #endif
        if (vendor == PCI_VENDOR_ID_ATI && timer_over_8254 == 1) {
diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index 013b85df18c6..3d4b2f3d116a 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -1341,6 +1341,14 @@ int __init APIC_init_uniprocessor (void)
        connect_bsp_APIC();
+        /*
+         * Hack: In case of kdump, after a crash, kernel might be booting
+         * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid
+         * might be zero if read from MP tables. Get it from LAPIC.
+         */
+#ifdef CONFIG_CRASH_DUMP
+        boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
+#endif
        phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid);
        setup_local_APIC();
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
index 3852d0a4c1b5..1a7bdcef1926 100644
--- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -104,7 +104,7 @@ acpi_processor_set_performance (
 {
        u16                     port = 0;
        u8                      bit_width = 0;
-        int                     ret = 0;
+        int                     ret;
        u32                     value = 0;
        int                     i = 0;
        struct cpufreq_freqs    cpufreq_freqs;
@@ -195,7 +195,6 @@ acpi_processor_set_performance (
                        udelay(10);
                }
        } else {
-                i = 0;
                value = (u32) data->acpi_data.states[state].status;
        }
@@ -444,14 +443,15 @@ static struct freq_attr* acpi_cpufreq_attr[] = {
 };
 static struct cpufreq_driver acpi_cpufreq_driver = {
-        .verify         = acpi_cpufreq_verify,
+        .verify = acpi_cpufreq_verify,
-        .target         = acpi_cpufreq_target,
+        .target = acpi_cpufreq_target,
-        .init           = acpi_cpufreq_cpu_init,
+        .init   = acpi_cpufreq_cpu_init,
-        .exit           = acpi_cpufreq_cpu_exit,
+        .exit   = acpi_cpufreq_cpu_exit,
-        .resume         = acpi_cpufreq_resume,
+        .resume = acpi_cpufreq_resume,
-        .name           = "acpi-cpufreq",
+        .name   = "acpi-cpufreq",
-        .owner          = THIS_MODULE,
+        .owner  = THIS_MODULE,
-        .attr           = acpi_cpufreq_attr,
+        .attr   = acpi_cpufreq_attr,
+        .flags  = CPUFREQ_STICKY,
 };
diff --git a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
index f275e0d4aee5..0d49d73d1b71 100644
--- a/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/i386/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -1,5 +1,5 @@
 /*
- * (C) 2004  Sebastian Witt <se.witt@gmx.net>
+ * (C) 2004-2006  Sebastian Witt <se.witt@gmx.net>
 *
 *  Licensed under the terms of the GNU GPL License version 2.
 *  Based upon reverse engineered information
@@ -90,7 +90,7 @@ static int nforce2_calc_pll(unsigned int fsb)
        /* Try to calculate multiplier and divider up to 4 times */
        while (((mul == 0) || (div == 0)) && (tried <= 3)) {
-                for (xdiv = 1; xdiv <= 0x80; xdiv++)
+                for (xdiv = 2; xdiv <= 0x80; xdiv++)
                        for (xmul = 1; xmul <= 0xfe; xmul++)
                                if (nforce2_calc_fsb(NFORCE2_PLL(xmul, xdiv)) ==
                                    fsb + tried) {
@@ -117,8 +117,7 @@ static void nforce2_write_pll(int pll)
        int temp;
        /* Set the pll addr. to 0x00 */
-        temp = 0x00;
+        pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, 0);
-        pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, temp);
        /* Now write the value in all 64 registers */
        for (temp = 0; temp <= 0x3f; temp++)
@@ -266,7 +265,7 @@ static int nforce2_target(struct cpufreq_policy *policy,
        if (freqs.old == freqs.new)
                return 0;
-        dprintk(KERN_INFO "cpufreq: Old CPU frequency %d kHz, new %d kHz\n",
+        dprintk("Old CPU frequency %d kHz, new %d kHz\n",
               freqs.old, freqs.new);
        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
@@ -278,7 +277,7 @@ static int nforce2_target(struct cpufreq_policy *policy,
                printk(KERN_ERR "cpufreq: Changing FSB to %d failed\n",
                       target_fsb);
        else
-                dprintk(KERN_INFO "cpufreq: Changed FSB successfully to %d\n",
+                dprintk("Changed FSB successfully to %d\n",
                       target_fsb);
        /* Enable IRQs */
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
index 8ef38544453c..146f607e9c44 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c
@@ -77,13 +77,17 @@ static char speedbuffer[8];
 static char *print_speed(int speed)
 {
-        if (speed > 1000) {
+        if (speed < 1000) {
-                if (speed%1000 == 0)
+                snprintf(speedbuffer, sizeof(speedbuffer),"%dMHz", speed);
-                        sprintf (speedbuffer, "%dGHz", speed/1000);
+                return speedbuffer;
-                else
+        }
-                        sprintf (speedbuffer, "%d.%dGHz", speed/1000, (speed%1000)/100);
-        } else
+        if (speed%1000 == 0)
-                sprintf (speedbuffer, "%dMHz", speed);
+                snprintf(speedbuffer, sizeof(speedbuffer),
+                        "%dGHz", speed/1000);
+        else
+                snprintf(speedbuffer, sizeof(speedbuffer),
+                        "%d.%dGHz", speed/1000, (speed%1000)/100);
        return speedbuffer;
 }
@@ -675,7 +679,7 @@ static int __init longhaul_init(void)
 static void __exit longhaul_exit(void)
 {
-        int i=0;
+        int i;
        for (i=0; i < numscales; i++) {
                if (clock_ratio[i] == maxmult) {
diff --git a/arch/i386/kernel/cpu/cpufreq/longrun.c b/arch/i386/kernel/cpu/cpufreq/longrun.c
index e3868de4dc2e..b2689514295a 100644
--- a/arch/i386/kernel/cpu/cpufreq/longrun.c
+++ b/arch/i386/kernel/cpu/cpufreq/longrun.c
@@ -223,7 +223,6 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
                /* set to 0 to try_hi perf_pctg */
                msr_lo &= 0xFFFFFF80;
                msr_hi &= 0xFFFFFF80;
-                msr_lo |= 0;
                msr_hi |= try_hi;
                wrmsr(MSR_TMTA_LONGRUN_CTRL, msr_lo, msr_hi);
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
index 2bf4237cb94e..694d4793bf6a 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k7.c
@@ -452,23 +452,23 @@ static int powernow_decode_bios (int maxfid, int startvid)
                        pst = (struct pst_s *) p;
-                        for (i = 0 ; i <psb->numpst; i++) {
+                        for (j=0; j<psb->numpst; j++) {
                                pst = (struct pst_s *) p;
                                number_scales = pst->numpstates;
                                if ((etuple == pst->cpuid) && check_fsb(pst->fsbspeed) &&
                                    (maxfid==pst->maxfid) && (startvid==pst->startvid))
                                {
-                                        dprintk ("PST:%d (@%p)\n", i, pst);
+                                        dprintk ("PST:%d (@%p)\n", j, pst);
                                        dprintk (" cpuid: 0x%x  fsb: %d  maxFID: 0x%x  startvid: 0x%x\n",
                                                 pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid);
                                        ret = get_ranges ((char *) pst + sizeof (struct pst_s));
                                        return ret;
                                } else {
+                                        unsigned int k;
                                        p = (char *) pst + sizeof (struct pst_s);
-                                        for (j=0 ; j < number_scales; j++)
+                                        for (k=0; k<number_scales; k++)
                                                p+=2;
                                }
                        }
@@ -581,10 +581,7 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
        rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
-        /* recalibrate cpu_khz */
+        recalibrate_cpu_khz();
-        result = recalibrate_cpu_khz();
-        if (result)
-                return result;
        fsb = (10 * cpu_khz) / fid_codes[fidvidstatus.bits.CFID];
        if (!fsb) {
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
index 71fffa174425..b4277f58f40c 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
@@ -1,5 +1,5 @@
 /*
- *   (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
+ *   (c) 2003-2006 Advanced Micro Devices, Inc.
 *  Your use of this code is subject to the terms and conditions of the
 *  GNU general public license version 2. See "COPYING" or
 *  http://www.gnu.org/licenses/gpl.html
@@ -14,13 +14,13 @@
 *  Based upon datasheets & sample CPUs kindly provided by AMD.
 *
 *  Valuable input gratefully received from Dave Jones, Pavel Machek,
- *  Dominik Brodowski, and others.
+ *  Dominik Brodowski, Jacob Shin, and others.
 *  Originally developed by Paul Devriendt.
 *  Processor information obtained from Chapter 9 (Power and Thermal Management)
 *  of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
 *  Opteron Processors" available for download from www.amd.com
 *
- *  Tables for specific CPUs can be infrerred from
+ *  Tables for specific CPUs can be inferred from
 *     http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
 */
@@ -46,7 +46,7 @@
 #define PFX "powernow-k8: "
 #define BFX PFX "BIOS error: "
-#define VERSION "version 1.60.2"
+#define VERSION "version 2.00.00"
 #include "powernow-k8.h"
 /* serialize freq changes  */
@@ -54,6 +54,8 @@ static DEFINE_MUTEX(fidvid_mutex);
 static struct powernow_k8_data *powernow_data[NR_CPUS];
+static int cpu_family = CPU_OPTERON;
 #ifndef CONFIG_SMP
 static cpumask_t cpu_core_map[1];
 #endif
@@ -64,16 +66,36 @@ static u32 find_freq_from_fid(u32 fid)
        return 800 + (fid * 100);
 }
 /* Return a frequency in KHz, given an input fid */
 static u32 find_khz_freq_from_fid(u32 fid)
 {
        return 1000 * find_freq_from_fid(fid);
 }
-/* Return a voltage in miliVolts, given an input vid */
+/* Return a frequency in MHz, given an input fid and did */
-static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid)
+static u32 find_freq_from_fiddid(u32 fid, u32 did)
+{
+        return 100 * (fid + 0x10) >> did;
+}
+static u32 find_khz_freq_from_fiddid(u32 fid, u32 did)
 {
-        return 1550-vid*25;
+        return 1000 * find_freq_from_fiddid(fid, did);
+}
+static u32 find_fid_from_pstate(u32 pstate)
+{
+        u32 hi, lo;
+        rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
+        return lo & HW_PSTATE_FID_MASK;
+}
+static u32 find_did_from_pstate(u32 pstate)
+{
+        u32 hi, lo;
+        rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
+        return (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
 }
 /* Return the vco fid for an input fid
@@ -98,6 +120,9 @@ static int pending_bit_stuck(void)
 {
        u32 lo, hi;
+        if (cpu_family)
+                return 0;
        rdmsr(MSR_FIDVID_STATUS, lo, hi);
        return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
 }
@@ -111,6 +136,14 @@ static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
        u32 lo, hi;
        u32 i = 0;
+        if (cpu_family) {
+                rdmsr(MSR_PSTATE_STATUS, lo, hi);
+                i = lo & HW_PSTATE_MASK;
+                rdmsr(MSR_PSTATE_DEF_BASE + i, lo, hi);
+                data->currfid = lo & HW_PSTATE_FID_MASK;
+                data->currdid = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
+                return 0;
+        }
        do {
                if (i++ > 10000) {
                        dprintk("detected change pending stuck\n");
@@ -175,7 +208,7 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
        do {
                wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
                if (i++ > 100) {
-                        printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
+                        printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n");
                        return 1;
                }
        } while (query_current_values_with_pending_wait(data));
@@ -255,7 +288,15 @@ static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid,
        return 0;
 }
-/* Change the fid and vid, by the 3 phases. */
+/* Change hardware pstate by single MSR write */
+static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
+{
+        wrmsr(MSR_PSTATE_CTRL, pstate, 0);
+        data->currfid = find_fid_from_pstate(pstate);
+        return 0;
+}
+/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
 static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
 {
        if (core_voltage_pre_transition(data, reqvid))
@@ -474,26 +515,35 @@ static int check_supported_cpu(unsigned int cpu)
                goto out;
        eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
-        if ((eax & CPUID_XFAM) != CPUID_XFAM_K8)
+        if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
+            ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
                goto out;
-        if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
+        if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
-            ((eax & CPUID_XMOD) > CPUID_XMOD_REV_G)) {
+                if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
-                printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
+                    ((eax & CPUID_XMOD) > CPUID_XMOD_REV_G)) {
-                goto out;
+                        printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
-        }
+                        goto out;
+                }
-        eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
+                eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
-        if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
+                if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
-                printk(KERN_INFO PFX
+                        printk(KERN_INFO PFX
-                       "No frequency change capabilities detected\n");
+                               "No frequency change capabilities detected\n");
-                goto out;
+                        goto out;
-        }
+                }
-        cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
+                cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
-        if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
+                if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
-                printk(KERN_INFO PFX "Power state transitions not supported\n");
+                        printk(KERN_INFO PFX "Power state transitions not supported\n");
-                goto out;
+                        goto out;
+                }
+        } else { /* must be a HW Pstate capable processor */
+                cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
+                if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
+                        cpu_family = CPU_HW_PSTATE;
+                else
+                        goto out;
        }
        rc = 1;
@@ -547,12 +597,18 @@ static void print_basics(struct powernow_k8_data *data)
 {
        int j;
        for (j = 0; j < data->numps; j++) {
-                if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID)
+                if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) {
-                        printk(KERN_INFO PFX "   %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
+                        if (cpu_family) {
+                        printk(KERN_INFO PFX "   %d : fid 0x%x gid 0x%x (%d MHz)\n", j, (data->powernow_table[j].index & 0xff00) >> 8,
+                                (data->powernow_table[j].index & 0xff0000) >> 16,
+                                data->powernow_table[j].frequency/1000);
+                        } else {
+                        printk(KERN_INFO PFX "   %d : fid 0x%x (%d MHz), vid 0x%x\n", j,
                                data->powernow_table[j].index & 0xff,
                                data->powernow_table[j].frequency/1000,
-                                data->powernow_table[j].index >> 8,
+                                data->powernow_table[j].index >> 8);
-                                find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
+                        }
+                }
        }
        if (data->batps)
                printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
@@ -702,7 +758,7 @@ static int find_psb_table(struct powernow_k8_data *data)
 #ifdef CONFIG_X86_POWERNOW_K8_ACPI
 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
 {
-        if (!data->acpi_data.state_count)
+        if (!data->acpi_data.state_count || cpu_family)
                return;
        data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
@@ -715,9 +771,8 @@ static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned
 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
 {
-        int i;
-        int cntlofreq = 0;
        struct cpufreq_frequency_table *powernow_table;
+        int ret_val;
        if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
                dprintk("register performance failed: bad ACPI data\n");
@@ -746,6 +801,85 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                goto err_out;
        }
+        if (cpu_family)
+                ret_val = fill_powernow_table_pstate(data, powernow_table);
+        else
+                ret_val = fill_powernow_table_fidvid(data, powernow_table);
+        if (ret_val)
+                goto err_out_mem;
+        powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
+        powernow_table[data->acpi_data.state_count].index = 0;
+        data->powernow_table = powernow_table;
+        /* fill in data */
+        data->numps = data->acpi_data.state_count;
+        print_basics(data);
+        powernow_k8_acpi_pst_values(data, 0);
+        /* notify BIOS that we exist */
+        acpi_processor_notify_smm(THIS_MODULE);
+        return 0;
+err_out_mem:
+        kfree(powernow_table);
+err_out:
+        acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
+        /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
+        data->acpi_data.state_count = 0;
+        return -ENODEV;
+}
+static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
+{
+        int i;
+        for (i = 0; i < data->acpi_data.state_count; i++) {
+                u32 index;
+                u32 hi = 0, lo = 0;
+                u32 fid;
+                u32 did;
+                index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
+                if (index > MAX_HW_PSTATE) {
+                        printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
+                        printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
+                }
+                rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
+                if (!(hi & HW_PSTATE_VALID_MASK)) {
+                        dprintk("invalid pstate %d, ignoring\n", index);
+                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        continue;
+                }
+                fid = lo & HW_PSTATE_FID_MASK;
+                did = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
+                dprintk("   %d : fid 0x%x, did 0x%x\n", index, fid, did);
+                powernow_table[i].index = index | (fid << HW_FID_INDEX_SHIFT) | (did << HW_DID_INDEX_SHIFT);
+                powernow_table[i].frequency = find_khz_freq_from_fiddid(fid, did);
+                if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
+                        printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
+                                powernow_table[i].frequency,
+                                (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
+                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        continue;
+                }
+        }
+        return 0;
+}
+static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
+{
+        int i;
+        int cntlofreq = 0;
        for (i = 0; i < data->acpi_data.state_count; i++) {
                u32 fid;
                u32 vid;
@@ -786,7 +920,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                                if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
                                    (powernow_table[i].index != powernow_table[cntlofreq].index)) {
                                        printk(KERN_ERR PFX "Too many lo freq table entries\n");
-                                        goto err_out_mem;
+                                        return 1;
                                }
                                dprintk("double low frequency table entry, ignoring it.\n");
@@ -804,31 +938,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                        continue;
                }
        }
-        powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
-        powernow_table[data->acpi_data.state_count].index = 0;
-        data->powernow_table = powernow_table;
-        /* fill in data */
-        data->numps = data->acpi_data.state_count;
-        print_basics(data);
-        powernow_k8_acpi_pst_values(data, 0);
-        /* notify BIOS that we exist */
-        acpi_processor_notify_smm(THIS_MODULE);
        return 0;
-err_out_mem:
-        kfree(powernow_table);
-err_out:
-        acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
-        /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
-        data->acpi_data.state_count = 0;
-        return -ENODEV;
 }
 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
@@ -844,20 +954,20 @@ static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned
 #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
 /* Take a frequency, and issue the fid/vid transition command */
-static int transition_frequency(struct powernow_k8_data *data, unsigned int index)
+static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index)
 {
-        u32 fid;
+        u32 fid = 0;
-        u32 vid;
+        u32 vid = 0;
        int res, i;
        struct cpufreq_freqs freqs;
        dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
+        /* fid/vid correctness check for k8 */
        /* fid are the lower 8 bits of the index we stored into
-         * the cpufreq frequency table in find_psb_table, vid are
+         * the cpufreq frequency table in find_psb_table, vid
-         * the upper 8 bits.
+         * are the upper 8 bits.
         */
        fid = data->powernow_table[index].index & 0xFF;
        vid = (data->powernow_table[index].index & 0xFF00) >> 8;
@@ -881,22 +991,58 @@ static int transition_frequency(struct powernow_k8_data *data, unsigned int inde
        dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
                smp_processor_id(), fid, vid);
-        freqs.cpu = data->cpu;
        freqs.old = find_khz_freq_from_fid(data->currfid);
        freqs.new = find_khz_freq_from_fid(fid);
-        for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
+        for_each_cpu_mask(i, *(data->available_cores)) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
        }
        res = transition_fid_vid(data, fid, vid);
        freqs.new = find_khz_freq_from_fid(data->currfid);
-        for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
+        for_each_cpu_mask(i, *(data->available_cores)) {
                freqs.cpu = i;
                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        }
+        }
+        return res;
+}
+/* Take a frequency, and issue the hardware pstate transition command */
+static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
+{
+        u32 fid = 0;
+        u32 did = 0;
+        u32 pstate = 0;
+        int res, i;
+        struct cpufreq_freqs freqs;
+        dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
+        /* get fid did for hardware pstate transition */
+        pstate = index & HW_PSTATE_MASK;
+        if (pstate > MAX_HW_PSTATE)
+                return 0;
+        fid = (index & HW_FID_INDEX_MASK) >> HW_FID_INDEX_SHIFT;
+        did = (index & HW_DID_INDEX_MASK) >> HW_DID_INDEX_SHIFT;
+        freqs.old = find_khz_freq_from_fiddid(data->currfid, data->currdid);
+        freqs.new = find_khz_freq_from_fiddid(fid, did);
+        for_each_cpu_mask(i, *(data->available_cores)) {
+                freqs.cpu = i;
+                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+        }
+        res = transition_pstate(data, pstate);
+        data->currfid = find_fid_from_pstate(pstate);
+        data->currdid = find_did_from_pstate(pstate);
+        freqs.new = find_khz_freq_from_fiddid(data->currfid, data->currdid);
+        for_each_cpu_mask(i, *(data->available_cores)) {
+                freqs.cpu = i;
+                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+        }
        return res;
 }
@@ -933,18 +1079,21 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
        dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
                pol->cpu, targfreq, pol->min, pol->max, relation);
-        if (query_current_values_with_pending_wait(data)) {
+        if (query_current_values_with_pending_wait(data))
-                ret = -EIO;
                goto err_out;
-        }
-        dprintk("targ: curr fid 0x%x, vid 0x%x\n",
+        if (cpu_family)
+                dprintk("targ: curr fid 0x%x, did 0x%x\n",
+                        data->currfid, data->currvid);
+        else {
+                dprintk("targ: curr fid 0x%x, vid 0x%x\n",
                data->currfid, data->currvid);
-        if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
+                if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
-                printk(KERN_INFO PFX
+                        printk(KERN_INFO PFX
-                        "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
+                                "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
-                        checkfid, data->currfid, checkvid, data->currvid);
+                                checkfid, data->currfid, checkvid, data->currvid);
+                }
        }
        if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
@@ -954,7 +1103,11 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
        powernow_k8_acpi_pst_values(data, newstate);
-        if (transition_frequency(data, newstate)) {
+        if (cpu_family)
+                ret = transition_frequency_pstate(data, newstate);
+        else
+                ret = transition_frequency_fidvid(data, newstate);
+        if (ret) {
                printk(KERN_ERR PFX "transition frequency failed\n");
                ret = 1;
                mutex_unlock(&fidvid_mutex);
@@ -962,7 +1115,10 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
        }
        mutex_unlock(&fidvid_mutex);
-        pol->cur = find_khz_freq_from_fid(data->currfid);
+        if (cpu_family)
+                pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
+        else
+                pol->cur = find_khz_freq_from_fid(data->currfid);
        ret = 0;
 err_out:
@@ -1007,14 +1163,13 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
                 * Use the PSB BIOS structure. This is only availabe on
                 * an UP version, and is deprecated by AMD.
                 */
                if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) {
                        printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
                        kfree(data);
                        return -ENODEV;
                }
                if (pol->cpu != 0) {
-                        printk(KERN_ERR PFX "init not cpu 0\n");
+                        printk(KERN_ERR PFX "No _PSS objects for CPU other than CPU0\n");
                        kfree(data);
                        return -ENODEV;
                }
@@ -1042,20 +1197,28 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
        if (query_current_values_with_pending_wait(data))
                goto err_out;
-        fidvid_msr_init();
+        if (!cpu_family)
+                fidvid_msr_init();
        /* run on any CPU again */
        set_cpus_allowed(current, oldmask);
        pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
-        pol->cpus = cpu_core_map[pol->cpu];
+        if (cpu_family)
+                pol->cpus = cpumask_of_cpu(pol->cpu);
+        else
+                pol->cpus = cpu_core_map[pol->cpu];
+        data->available_cores = &(pol->cpus);
        /* Take a crude guess here.
         * That guess was in microseconds, so multiply with 1000 */
        pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
            + (3 * (1 << data->irt) * 10)) * 1000;
-        pol->cur = find_khz_freq_from_fid(data->currfid);
+        if (cpu_family)
+                pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
+        else
+                pol->cur = find_khz_freq_from_fid(data->currfid);
        dprintk("policy current frequency %d kHz\n", pol->cur);
        /* min/max the cpu is capable of */
@@ -1069,8 +1232,12 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
        cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
-        printk("cpu_init done, current fid 0x%x, vid 0x%x\n",
+        if (cpu_family)
-               data->currfid, data->currvid);
+                dprintk("cpu_init done, current fid 0x%x, did 0x%x\n",
+                        data->currfid, data->currdid);
+        else
+                dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
+                        data->currfid, data->currvid);
        powernow_data[pol->cpu] = data;
@@ -1156,8 +1323,9 @@ static int __cpuinit powernowk8_init(void)
        }
        if (supported_cpus == num_online_cpus()) {
-                printk(KERN_INFO PFX "Found %d AMD Athlon 64 / Opteron "
+                printk(KERN_INFO PFX "Found %d %s "
-                        "processors (" VERSION ")\n", supported_cpus);
+                        "processors (" VERSION ")\n", supported_cpus,
+                        boot_cpu_data.x86_model_id);
                return cpufreq_register_driver(&cpufreq_amd64_driver);
        }
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
index 79a7c5c87edc..bf8ad9e43da3 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
@@ -1,5 +1,5 @@
 /*
- *  (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
+ *  (c) 2003-2006 Advanced Micro Devices, Inc.
 *  Your use of this code is subject to the terms and conditions of the
 *  GNU general public license version 2. See "COPYING" or
 *  http://www.gnu.org/licenses/gpl.html
@@ -21,8 +21,8 @@ struct powernow_k8_data {
        u32 plllock; /* pll lock time, units 1 us */
        u32 exttype; /* extended interface = 1 */
-        /* keep track of the current fid / vid */
+        /* keep track of the current fid / vid or did */
-        u32 currvid, currfid;
+        u32 currvid, currfid, currdid;
        /* the powernow_table includes all frequency and vid/fid pairings:
         * fid are the lower 8 bits of the index, vid are the upper 8 bits.
@@ -34,6 +34,10 @@ struct powernow_k8_data {
         * used to determine valid frequency/vid/fid states */
        struct acpi_processor_performance acpi_data;
 #endif
+        /* we need to keep track of associated cores, but let cpufreq
+         * handle hotplug events - so just point at cpufreq pol->cpus
+         * structure */
+        cpumask_t *available_cores;
 };
@@ -43,6 +47,7 @@ struct powernow_k8_data {
 #define CPUID_XFAM_K8                   0
 #define CPUID_XMOD                      0x000f0000      /* extended model */
 #define CPUID_XMOD_REV_G                0x00060000
+#define CPUID_XFAM_10H                  0x00100000      /* family 0x10 */
 #define CPUID_USE_XFAM_XMOD             0x00000f00
 #define CPUID_GET_MAX_CAPABILITIES      0x80000000
 #define CPUID_FREQ_VOLT_CAPABILITIES    0x80000007
@@ -79,6 +84,32 @@ struct powernow_k8_data {
 #define MSR_S_HI_CURRENT_VID      0x0000003f
 #define MSR_C_HI_STP_GNT_BENIGN   0x00000001
+/* Hardware Pstate _PSS and MSR definitions */
+#define USE_HW_PSTATE           0x00000080
+#define HW_PSTATE_FID_MASK      0x0000003f
+#define HW_PSTATE_DID_MASK      0x000001c0
+#define HW_PSTATE_DID_SHIFT     6
+#define HW_PSTATE_MASK          0x00000007
+#define HW_PSTATE_VALID_MASK    0x80000000
+#define HW_FID_INDEX_SHIFT      8
+#define HW_FID_INDEX_MASK       0x0000ff00
+#define HW_DID_INDEX_SHIFT      16
+#define HW_DID_INDEX_MASK       0x00ff0000
+#define HW_WATTS_MASK           0xff
+#define HW_PWR_DVR_MASK         0x300
+#define HW_PWR_DVR_SHIFT        8
+#define HW_PWR_MAX_MULT         3
+#define MAX_HW_PSTATE           8       /* hw pstate supports up to 8 */
+#define MSR_PSTATE_DEF_BASE     0xc0010064 /* base of Pstate MSRs */
+#define MSR_PSTATE_STATUS       0xc0010063 /* Pstate Status MSR */
+#define MSR_PSTATE_CTRL         0xc0010062 /* Pstate control MSR */
+/* define the two driver architectures */
+#define CPU_OPTERON 0
+#define CPU_HW_PSTATE 1
 /*
 * There are restrictions frequencies have to follow:
 * - only 1 entry in the low fid table ( <=1.4GHz )
@@ -182,6 +213,9 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid);
 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index);
+static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
+static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
 #ifdef CONFIG_SMP
 static inline void define_siblings(int cpu, cpumask_t cpu_sharedcore_mask[])
 {
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
index b0ff9075708c..ce54ff12c15d 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -250,7 +250,7 @@ static int centrino_cpu_init_table(struct cpufreq_policy *policy)
        if (model->cpu_id == NULL) {
                /* No match at all */
-                dprintk(KERN_INFO PFX "no support for CPU model \"%s\": "
+                dprintk("no support for CPU model \"%s\": "
                       "send /proc/cpuinfo to " MAINTAINER "\n",
                       cpu->x86_model_id);
                return -ENOENT;
@@ -258,10 +258,10 @@ static int centrino_cpu_init_table(struct cpufreq_policy *policy)
        if (model->op_points == NULL) {
                /* Matched a non-match */
-                dprintk(KERN_INFO PFX "no table support for CPU model \"%s\"\n",
+                dprintk("no table support for CPU model \"%s\"\n",
                       cpu->x86_model_id);
 #ifndef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
-                dprintk(KERN_INFO PFX "try compiling with CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI enabled\n");
+                dprintk("try compiling with CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI enabled\n");
 #endif
                return -ENOENT;
        }
@@ -368,7 +368,7 @@ static int centrino_cpu_init_acpi(struct cpufreq_policy *policy)
        /* register with ACPI core */
        if (acpi_processor_register_performance(&p, cpu)) {
-                dprintk(KERN_INFO PFX "obtaining ACPI data failed\n");
+                dprintk("obtaining ACPI data failed\n");
                return -EIO;
        }
@@ -465,7 +465,7 @@ static int centrino_cpu_init_acpi(struct cpufreq_policy *policy)
        kfree(centrino_model[cpu]);
 err_unreg:
        acpi_processor_unregister_performance(&p, cpu);
-        dprintk(KERN_INFO PFX "invalid ACPI data\n");
+        dprintk("invalid ACPI data\n");
        return (result);
 }
 #else
@@ -499,7 +499,7 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
                        centrino_cpu[policy->cpu] = &cpu_ids[i];
                if (!centrino_cpu[policy->cpu]) {
-                        dprintk(KERN_INFO PFX "found unsupported CPU with "
+                        dprintk("found unsupported CPU with "
                        "Enhanced SpeedStep: send /proc/cpuinfo to "
                        MAINTAINER "\n");
                        return -ENODEV;
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index d77e89ac0d54..dd6b0e3386ce 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -1320,6 +1320,8 @@ legacy_init_iomem_resources(struct resource *code_resource, struct resource *dat
        probe_roms();
        for (i = 0; i < e820.nr_map; i++) {
                struct resource *res;
+                if (e820.map[i].addr + e820.map[i].size > 0x100000000ULL)
+                        continue;
                res = kzalloc(sizeof(struct resource), GFP_ATOMIC);
                switch (e820.map[i].type) {
                case E820_RAM:  res->name = "System RAM"; break;
@@ -1545,15 +1547,18 @@ void __init setup_arch(char **cmdline_p)
        if (efi_enabled)
                efi_map_memmap();
-#ifdef CONFIG_X86_IO_APIC
-        check_acpi_pci();       /* Checks more than just ACPI actually */
-#endif
 #ifdef CONFIG_ACPI
        /*
         * Parse the ACPI tables for possible boot-time SMP configuration.
         */
        acpi_boot_table_init();
+#endif
+#ifdef CONFIG_X86_IO_APIC
+        check_acpi_pci();       /* Checks more than just ACPI actually */
+#endif
+#ifdef CONFIG_ACPI
        acpi_boot_init();
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_PC)
diff --git a/arch/i386/kernel/syscall_table.S b/arch/i386/kernel/syscall_table.S
index f48bef15b4f0..af56987f69b0 100644
--- a/arch/i386/kernel/syscall_table.S
+++ b/arch/i386/kernel/syscall_table.S
@@ -315,3 +315,4 @@ ENTRY(sys_call_table)
        .long sys_splice
        .long sys_sync_file_range
        .long sys_tee                   /* 315 */
+        .long sys_vmsplice
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
index 2d22f5761b1d..0e498369f35e 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/i386/kernel/traps.c
@@ -130,9 +130,8 @@ static inline int print_addr_and_symbol(unsigned long addr, char *log_lvl,
        print_symbol("%s", addr);
        printed = (printed + 1) % CONFIG_STACK_BACKTRACE_COLS;
        if (printed)
-                printk("  ");
+                printk(" ");
        else
                printk("\n");
@@ -212,7 +211,6 @@ static void show_stack_log_lvl(struct task_struct *task, unsigned long *esp,
        }
        stack = esp;
-        printk(log_lvl);
        for(i = 0; i < kstack_depth_to_print; i++) {
                if (kstack_end(stack))
                        break;
diff --git a/arch/i386/mach-generic/probe.c b/arch/i386/mach-generic/probe.c
index cea5b3ce4b57..d55fa7b187ab 100644
--- a/arch/i386/mach-generic/probe.c
+++ b/arch/i386/mach-generic/probe.c
@@ -93,9 +93,11 @@ int __init mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid
        int i;
        for (i = 0; apic_probe[i]; ++i) { 
                if (apic_probe[i]->mps_oem_check(mpc,oem,productid)) { 
-                        genapic = apic_probe[i];
+                        if (!cmdline_apic) {
-                        printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
+                                genapic = apic_probe[i];
-                               genapic->name);
+                                printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                                       genapic->name);
+                        }
                        return 1;
                } 
        } 
@@ -107,9 +109,11 @@ int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
        int i;
        for (i = 0; apic_probe[i]; ++i) { 
                if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { 
-                        genapic = apic_probe[i];
+                        if (!cmdline_apic) {
-                        printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
+                                genapic = apic_probe[i];
-                               genapic->name);
+                                printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                                       genapic->name);
+                        }
                        return 1;
                } 
        } 
diff --git a/arch/i386/mm/init.c b/arch/i386/mm/init.c
index ae6534ad8161..3df1371d4520 100644
--- a/arch/i386/mm/init.c
+++ b/arch/i386/mm/init.c
@@ -651,7 +651,7 @@ void __init mem_init(void)
 * Specifically, in the case of x86, we will always add
 * memory to the highmem for now.
 */
-#ifdef CONFIG_HOTPLUG_MEMORY
+#ifdef CONFIG_MEMORY_HOTPLUG
 #ifndef CONFIG_NEED_MULTIPLE_NODES
 int add_memory(u64 start, u64 size)
 {
diff --git a/arch/i386/oprofile/nmi_int.c b/arch/i386/oprofile/nmi_int.c
index 1a2076ce6f6a..ec0fd3cfa774 100644
--- a/arch/i386/oprofile/nmi_int.c
+++ b/arch/i386/oprofile/nmi_int.c
@@ -332,10 +332,11 @@ static int __init ppro_init(char ** cpu_type)
 {
        __u8 cpu_model = boot_cpu_data.x86_model;
-        if (cpu_model > 0xd)
+        if (cpu_model == 14)
+                *cpu_type = "i386/core";
+        else if (cpu_model > 0xd)
                return 0;
+        else if (cpu_model == 9) {
-        if (cpu_model == 9) {
                *cpu_type = "i386/p6_mobile";
        } else if (cpu_model > 5) {
                *cpu_type = "i386/piii";
diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index 50a0bef8c85f..79b2370c7fac 100644
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -92,7 +92,7 @@ void __restore_processor_state(struct saved_context *ctxt)
        write_cr4(ctxt->cr4);
        write_cr3(ctxt->cr3);
        write_cr2(ctxt->cr2);
-        write_cr2(ctxt->cr0);
+        write_cr0(ctxt->cr0);
        /*
         * now restore the descriptor tables to their proper values
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 0f3076a820c3..cd2051f5c9ce 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -449,6 +449,8 @@ config PCI_DOMAINS
        bool
        default PCI
+source "drivers/pci/pcie/Kconfig"
 source "drivers/pci/Kconfig"
 source "drivers/pci/hotplug/Kconfig"
diff --git a/arch/ia64/Makefile b/arch/ia64/Makefile
index 80ea7506fa1a..21033ed83307 100644
--- a/arch/ia64/Makefile
+++ b/arch/ia64/Makefile
@@ -71,6 +71,8 @@ all: compressed unwcheck
 compressed: vmlinux.gz
+vmlinuz: vmlinux.gz
 vmlinux.gz: vmlinux
        $(Q)$(MAKE) $(build)=$(boot) $@
diff --git a/arch/ia64/configs/sn2_defconfig b/arch/ia64/configs/sn2_defconfig
index f6a8853cd1b4..9ea35398e10d 100644
--- a/arch/ia64/configs/sn2_defconfig
+++ b/arch/ia64/configs/sn2_defconfig
@@ -134,7 +134,7 @@ CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_DISCONTIGMEM_DEFAULT=y
 CONFIG_NUMA=y
-CONFIG_NODES_SHIFT=8
+CONFIG_NODES_SHIFT=10
 CONFIG_VIRTUAL_MEM_MAP=y
 CONFIG_HOLES_IN_ZONE=y
 CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
@@ -1159,7 +1159,7 @@ CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 CONFIG_DEBUG_PREEMPT=y
-CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_KOBJECT is not set
diff --git a/arch/ia64/kernel/asm-offsets.c b/arch/ia64/kernel/asm-offsets.c
index 77225659e968..16e7b6600ae6 100644
--- a/arch/ia64/kernel/asm-offsets.c
+++ b/arch/ia64/kernel/asm-offsets.c
@@ -217,16 +217,24 @@ void foo(void)
        DEFINE(IA64_MCA_CPU_INIT_STACK_OFFSET,
               offsetof (struct ia64_mca_cpu, init_stack));
        BLANK();
-        DEFINE(IA64_SAL_OS_STATE_COMMON_OFFSET,
-               offsetof (struct ia64_sal_os_state, sal_ra));
        DEFINE(IA64_SAL_OS_STATE_OS_GP_OFFSET,
               offsetof (struct ia64_sal_os_state, os_gp));
-        DEFINE(IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET,
-               offsetof (struct ia64_sal_os_state, pal_min_state));
        DEFINE(IA64_SAL_OS_STATE_PROC_STATE_PARAM_OFFSET,
               offsetof (struct ia64_sal_os_state, proc_state_param));
+        DEFINE(IA64_SAL_OS_STATE_SAL_RA_OFFSET,
+               offsetof (struct ia64_sal_os_state, sal_ra));
+        DEFINE(IA64_SAL_OS_STATE_SAL_GP_OFFSET,
+               offsetof (struct ia64_sal_os_state, sal_gp));
+        DEFINE(IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET,
+               offsetof (struct ia64_sal_os_state, pal_min_state));
+        DEFINE(IA64_SAL_OS_STATE_OS_STATUS_OFFSET,
+               offsetof (struct ia64_sal_os_state, os_status));
+        DEFINE(IA64_SAL_OS_STATE_CONTEXT_OFFSET,
+               offsetof (struct ia64_sal_os_state, context));
        DEFINE(IA64_SAL_OS_STATE_SIZE,
               sizeof (struct ia64_sal_os_state));
+        BLANK();
        DEFINE(IA64_PMSA_GR_OFFSET,
               offsetof (struct pal_min_state_area_s, pmsa_gr));
        DEFINE(IA64_PMSA_BANK1_GR_OFFSET,
diff --git a/arch/ia64/kernel/efi_stub.S b/arch/ia64/kernel/efi_stub.S
index 5a7fe70212a9..a56e161d7515 100644
--- a/arch/ia64/kernel/efi_stub.S
+++ b/arch/ia64/kernel/efi_stub.S
@@ -61,7 +61,7 @@ GLOBAL_ENTRY(efi_call_phys)
        or loc3=loc3,r17
        mov b6=r2
        ;;
-        andcm r16=loc3,r16              // get psr with IT, DT, and RT bits cleared
+        andcm r16=loc3,r16      // get psr with IT, DT, and RT bits cleared
        br.call.sptk.many rp=ia64_switch_mode_phys
 .ret0:  mov out4=in5
        mov out0=in1
diff --git a/arch/ia64/kernel/entry.h b/arch/ia64/kernel/entry.h
index 78eeb0793419..ebc3dfb88826 100644
--- a/arch/ia64/kernel/entry.h
+++ b/arch/ia64/kernel/entry.h
@@ -23,6 +23,7 @@
 #define PT(f)           (IA64_PT_REGS_##f##_OFFSET)
 #define SW(f)           (IA64_SWITCH_STACK_##f##_OFFSET)
+#define SOS(f)          (IA64_SAL_OS_STATE_##f##_OFFSET)
 #define PT_REGS_SAVES(off)                      \
        .unwabi 3, 'i';                         \
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 7956eb9058fc..d58c1c5c903a 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -416,7 +416,7 @@ iosapic_end_level_irq (unsigned int irq)
        ia64_vector vec = irq_to_vector(irq);
        struct iosapic_rte_info *rte;
-        move_irq(irq);
+        move_native_irq(irq);
        list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list)
                iosapic_eoi(rte->addr, vec);
 }
@@ -458,7 +458,7 @@ iosapic_ack_edge_irq (unsigned int irq)
 {
        irq_desc_t *idesc = irq_descp(irq);
-        move_irq(irq);
+        move_native_irq(irq);
        /*
         * Once we have recorded IRQ_PENDING already, we can mask the
         * interrupt for real. This prevents IRQ storms from unhandled
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 5ce908ef9c95..9c72ea3f6432 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -101,7 +101,6 @@ void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
        if (irq < NR_IRQS) {
                irq_affinity[irq] = mask;
-                set_irq_info(irq, mask);
                irq_redir[irq] = (char) (redir & 0xff);
        }
 }
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S
index 6dff024cd62b..c1bd1feffab0 100644
--- a/arch/ia64/kernel/mca_asm.S
+++ b/arch/ia64/kernel/mca_asm.S
@@ -159,7 +159,7 @@ ia64_os_mca_spin:
        GET_IA64_MCA_DATA(r2)
        // Using MCA stack, struct ia64_sal_os_state, variable proc_state_param
        ;;
-        add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+IA64_SAL_OS_STATE_PROC_STATE_PARAM_OFFSET, r2
+        add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+SOS(PROC_STATE_PARAM), r2
        ;;
        ld8 r18=[r3]                            // Get processor state parameter on existing PALE_CHECK.
        ;;
@@ -479,9 +479,11 @@ ia64_state_save:
        st8 [temp2]=r11,16      // rv_rc
        mov r11=cr.iipa
        ;;
-        st8 [temp1]=r18,16      // proc_state_param
+        st8 [temp1]=r18         // proc_state_param
-        st8 [temp2]=r19,16      // monarch
+        st8 [temp2]=r19         // monarch
        mov r6=IA64_KR(CURRENT)
+        add temp1=SOS(SAL_RA), regs
+        add temp2=SOS(SAL_GP), regs
        ;;
        st8 [temp1]=r12,16      // sal_ra
        st8 [temp2]=r10,16      // sal_gp
@@ -503,12 +505,14 @@ ia64_state_save:
        st8 [temp2]=r11,16      // cr.iipa
        mov r12=cr.iim
        ;;
-        st8 [temp1]=r12,16      // cr.iim
+        st8 [temp1]=r12         // cr.iim
 (p1)    mov r12=IA64_MCA_COLD_BOOT
 (p2)    mov r12=IA64_INIT_WARM_BOOT
        mov r6=cr.iha
+        add temp1=SOS(OS_STATUS), regs
        ;;
-        st8 [temp2]=r6,16       // cr.iha
+        st8 [temp2]=r6          // cr.iha
+        add temp2=SOS(CONTEXT), regs
        st8 [temp1]=r12         // os_status, default is cold boot
        mov r6=IA64_MCA_SAME_CONTEXT
        ;;
@@ -820,8 +824,8 @@ ia64_state_restore:
        // Restore the SAL to OS state. The previous code left regs at pt_regs.
        add regs=MCA_SOS_OFFSET-MCA_PT_REGS_OFFSET, regs
        ;;
-        add temp1=IA64_SAL_OS_STATE_COMMON_OFFSET, regs
+        add temp1=SOS(SAL_RA), regs
-        add temp2=IA64_SAL_OS_STATE_COMMON_OFFSET+8, regs
+        add temp2=SOS(SAL_GP), regs
        ;;
        ld8 r12=[temp1],16      // sal_ra
        ld8 r9=[temp2],16       // sal_gp
@@ -842,8 +846,10 @@ ia64_state_restore:
        ;;
        mov cr.itir=temp3
        mov cr.iipa=temp4
-        ld8 temp3=[temp1],16    // cr.iim
+        ld8 temp3=[temp1]       // cr.iim
-        ld8 temp4=[temp2],16    // cr.iha
+        ld8 temp4=[temp2]               // cr.iha
+        add temp1=SOS(OS_STATUS), regs
+        add temp2=SOS(CONTEXT), regs
        ;;
        mov cr.iim=temp3
        mov cr.iha=temp4
@@ -916,7 +922,7 @@ ia64_state_restore:
 ia64_new_stack:
        add regs=MCA_PT_REGS_OFFSET, r3
-        add temp2=MCA_SOS_OFFSET+IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET, r3
+        add temp2=MCA_SOS_OFFSET+SOS(PAL_MIN_STATE), r3
        mov b0=r2                       // save return address
        GET_IA64_MCA_DATA(temp1)
        invala
@@ -1020,7 +1026,7 @@ ia64_old_stack:
 ia64_set_kernel_registers:
        add temp3=MCA_SP_OFFSET, r3
-        add temp4=MCA_SOS_OFFSET+IA64_SAL_OS_STATE_OS_GP_OFFSET, r3
+        add temp4=MCA_SOS_OFFSET+SOS(OS_GP), r3
        mov b0=r2               // save return address
        GET_IA64_MCA_DATA(temp1)
        ;;
diff --git a/arch/ia64/kernel/sal.c b/arch/ia64/kernel/sal.c
index 056f7a6eedc7..77fa65903d94 100644
--- a/arch/ia64/kernel/sal.c
+++ b/arch/ia64/kernel/sal.c
@@ -227,7 +227,7 @@ static int sal_cache_flush_drops_interrupts;
 static void __init
 check_sal_cache_flush (void)
 {
-        unsigned long flags, itv;
+        unsigned long flags;
        int cpu;
        u64 vector;
@@ -238,9 +238,6 @@ check_sal_cache_flush (void)
         * Schedule a timer interrupt, wait until it's reported, and see if
         * SAL_CACHE_FLUSH drops it.
         */
-        itv = ia64_get_itv();
-        BUG_ON((itv & (1 << 16)) == 0);
        ia64_set_itv(IA64_TIMER_VECTOR);
        ia64_set_itm(ia64_get_itc() + 1000);
@@ -260,7 +257,6 @@ check_sal_cache_flush (void)
                ia64_eoi();
        }
-        ia64_set_itv(itv);
        local_irq_restore(flags);
        put_cpu();
 }
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index e4dfda1eb7dd..6dba2d63f24d 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -260,6 +260,7 @@ reserve_memory (void)
        n++;
        num_rsvd_regions = n;
+        BUG_ON(IA64_MAX_RSVD_REGIONS + 1 < n);
        sort_regions(rsvd_region, num_rsvd_regions);
 }
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
index 739c948dc504..9a8a29339d2d 100644
--- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c
+++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
@@ -51,6 +51,8 @@ static nasid_t sn_hwperf_master_nasid = INVALID_NASID;
 static int sn_hwperf_init(void);
 static DECLARE_MUTEX(sn_hwperf_init_mutex);
+#define cnode_possible(n)       ((n) < num_cnodes)
 static int sn_hwperf_enum_objects(int *nobj, struct sn_hwperf_object_info **ret)
 {
        int e;
@@ -127,14 +129,14 @@ static int sn_hwperf_geoid_to_cnode(char *location)
                }
        }
-        return node_possible(cnode) ? cnode : -1;
+        return cnode_possible(cnode) ? cnode : -1;
 }
 static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj)
 {
        if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
                BUG();
-        if (!obj->sn_hwp_this_part)
+        if (SN_HWPERF_FOREIGN(obj))
                return -1;
        return sn_hwperf_geoid_to_cnode(obj->location);
 }
@@ -199,12 +201,12 @@ static void print_pci_topology(struct seq_file *s)
 static inline int sn_hwperf_has_cpus(cnodeid_t node)
 {
-        return node_online(node) && nr_cpus_node(node);
+        return node < MAX_NUMNODES && node_online(node) && nr_cpus_node(node);
 }
 static inline int sn_hwperf_has_mem(cnodeid_t node)
 {
-        return node_online(node) && NODE_DATA(node)->node_present_pages;
+        return node < MAX_NUMNODES && node_online(node) && NODE_DATA(node)->node_present_pages;
 }
 static struct sn_hwperf_object_info *
@@ -237,7 +239,7 @@ static int sn_hwperf_get_nearest_node_objdata(struct sn_hwperf_object_info *objb
        int found_mem = 0;
        int found_cpu = 0;
-        if (!node_possible(node))
+        if (!cnode_possible(node))
                return -EINVAL;
        if (sn_hwperf_has_cpus(node)) {
@@ -442,7 +444,7 @@ static int sn_topology_show(struct seq_file *s, void *d)
        seq_printf(s, "%s %d %s %s asic %s", slabname, ordinal, obj->location,
                obj->sn_hwp_this_part ? "local" : "shared", obj->name);
-        if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
+        if (ordinal < 0 || (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj)))
                seq_putc(s, '\n');
        else {
                cnodeid_t near_mem = -1;
@@ -468,22 +470,24 @@ static int sn_topology_show(struct seq_file *s, void *d)
                /*
                 * CPUs on this node, if any
                 */
-                cpumask = node_to_cpumask(ordinal);
+                if (!SN_HWPERF_IS_IONODE(obj)) {
-                for_each_online_cpu(i) {
+                        cpumask = node_to_cpumask(ordinal);
-                        if (cpu_isset(i, cpumask)) {
+                        for_each_online_cpu(i) {
-                                slice = 'a' + cpuid_to_slice(i);
+                                if (cpu_isset(i, cpumask)) {
-                                c = cpu_data(i);
+                                        slice = 'a' + cpuid_to_slice(i);
-                                seq_printf(s, "cpu %d %s%c local"
+                                        c = cpu_data(i);
-                                        " freq %luMHz, arch ia64",
+                                        seq_printf(s, "cpu %d %s%c local"
-                                        i, obj->location, slice,
+                                                " freq %luMHz, arch ia64",
-                                        c->proc_freq / 1000000);
+                                                i, obj->location, slice,
-                                for_each_online_cpu(j) {
+                                                c->proc_freq / 1000000);
-                                        seq_printf(s, j ? ":%d" : ", dist %d",
+                                        for_each_online_cpu(j) {
-                                                node_distance(
+                                                seq_printf(s, j ? ":%d" : ", dist %d",
-                                                    cpu_to_node(i),
+                                                        node_distance(
-                                                    cpu_to_node(j)));
+                                                        cpu_to_node(i),
+                                                        cpu_to_node(j)));
+                                        }
+                                        seq_putc(s, '\n');
                                }
-                                seq_putc(s, '\n');
                        }
                }
        }
@@ -523,7 +527,7 @@ static int sn_topology_show(struct seq_file *s, void *d)
                        if (obj->sn_hwp_this_part && p->sn_hwp_this_part)
                                /* both ends local to this partition */
                                seq_puts(s, " local");
-                        else if (!obj->sn_hwp_this_part && !p->sn_hwp_this_part)
+                        else if (SN_HWPERF_FOREIGN(p))
                                /* both ends of the link in foreign partiton */
                                seq_puts(s, " foreign");
                        else
@@ -776,7 +780,7 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
        case SN_HWPERF_GET_NODE_NASID:
                if (a.sz != sizeof(u64) ||
-                   (node = a.arg) < 0 || !node_possible(node)) {
+                   (node = a.arg) < 0 || !cnode_possible(node)) {
                        r = -EINVAL;
                        goto error;
                }
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 833295624e5d..85f3b3d4c606 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -3,7 +3,7 @@
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
- * Copyright (C) 2003-2005 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (C) 2003-2006 Silicon Graphics, Inc.  All Rights Reserved.
 */
 #include <linux/types.h>
@@ -1002,7 +1002,7 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
        tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_adm_int_status_alias, ~0ULL);
        tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_adm_error_summary_alias,
                       ~0ULL);
-        tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_dre_comp_err_addr, ~0ULL);
+        tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_dre_comp_err_addr, 0ULL);
        if (request_irq(SGI_PCIASIC_ERROR,
                        tioce_error_intr_handler,
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ee5fbb02b28f..35e038a974c6 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -13,7 +13,7 @@ choice
        default SGI_IP22
 config MIPS_MTX1
-        bool "Support for 4G Systems MTX-1 board"
+        bool "4G Systems MTX-1 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select SOC_AU1500
@@ -119,8 +119,34 @@ config MIPS_MIRAGE
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_LITTLE_ENDIAN
+config BASLER_EXCITE
+        bool "Basler eXcite smart camera support"
+        select DMA_COHERENT
+        select HW_HAS_PCI
+        select IRQ_CPU
+        select IRQ_CPU_RM7K
+        select IRQ_CPU_RM9K
+        select SERIAL_RM9000
+        select SYS_HAS_CPU_RM9000
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_64BIT_KERNEL
+        select SYS_SUPPORTS_BIG_ENDIAN
+        help
+          The eXcite is a smart camera platform manufactured by
+          Basler Vision Technologies AG
+config BASLER_EXCITE_PROTOTYPE
+        bool "Support for pre-release units"
+        depends on BASLER_EXCITE
+        default n
+        help
+          Pre-series (prototype) units are different from later ones in
+          some ways. Select this option if you have one of these. Please
+          note that a kernel built with this option selected will not be
+          able to run on normal units.
 config MIPS_COBALT
-        bool "Support for Cobalt Server"
+        bool "Cobalt Server"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select I8259
@@ -132,7 +158,7 @@ config MIPS_COBALT
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config MACH_DECSTATION
-        bool "Support for DECstations"
+        bool "DECstations"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select EARLY_PRINTK
@@ -142,6 +168,9 @@ config MACH_DECSTATION
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
        select SYS_SUPPORTS_LITTLE_ENDIAN
+        select SYS_SUPPORTS_128HZ
+        select SYS_SUPPORTS_256HZ
+        select SYS_SUPPORTS_1024HZ
        help
          This enables support for DEC's MIPS based workstations.  For details
          see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
@@ -158,7 +187,7 @@ config MACH_DECSTATION
          otherwise choose R3000.
 config MIPS_EV64120
-        bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
+        bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -175,7 +204,7 @@ config MIPS_EV64120
          kernel for this platform.
 config MIPS_EV96100
-        bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
+        bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -195,7 +224,7 @@ config MIPS_EV96100
          here if you wish to build a kernel for this platform.
 config MIPS_IVR
-        bool "Support for Globespan IVR board"
+        bool "Globespan IVR board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select ITE_BOARD_GEN
@@ -211,7 +240,7 @@ config MIPS_IVR
          build a kernel for this platform.
 config MIPS_ITE8172
-        bool "Support for ITE 8172G board"
+        bool "ITE 8172G board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select ITE_BOARD_GEN
@@ -228,7 +257,7 @@ config MIPS_ITE8172
          a kernel for this platform.
 config MACH_JAZZ
-        bool "Support for the Jazz family of machines"
+        bool "Jazz family of machines"
        select ARC
        select ARC32
        select ARCH_MAY_HAVE_PC_FDC
@@ -239,6 +268,7 @@ config MACH_JAZZ
        select SYS_HAS_CPU_R4X00
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
+        select SYS_SUPPORTS_100HZ
        help
         This a family of machines based on the MIPS R4030 chipset which was
         used by several vendors to build RISC/os and Windows NT workstations.
@@ -246,7 +276,7 @@ config MACH_JAZZ
         Olivetti M700-10 workstations.
 config LASAT
-        bool "Support for LASAT Networks platforms"
+        bool "LASAT Networks platforms"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_GT64120
@@ -258,7 +288,7 @@ config LASAT
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config MIPS_ATLAS
-        bool "Support for MIPS Atlas board"
+        bool "MIPS Atlas board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select IRQ_CPU
@@ -283,7 +313,7 @@ config MIPS_ATLAS
          board.
 config MIPS_MALTA
-        bool "Support for MIPS Malta board"
+        bool "MIPS Malta board"
        select ARCH_MAY_HAVE_PC_FDC
        select BOOT_ELF32
        select HAVE_STD_PC_SERIAL_PORT
@@ -311,7 +341,7 @@ config MIPS_MALTA
          board.
 config MIPS_SEAD
-        bool "Support for MIPS SEAD board (EXPERIMENTAL)"
+        bool "MIPS SEAD board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select IRQ_CPU
        select DMA_NONCOHERENT
@@ -327,8 +357,29 @@ config MIPS_SEAD
          This enables support for the MIPS Technologies SEAD evaluation
          board.
+config WR_PPMC
+        bool "Support for Wind River PPMC board"
+        select IRQ_CPU
+        select BOOT_ELF32
+        select DMA_NONCOHERENT
+        select HW_HAS_PCI
+        select MIPS_GT64120
+        select SWAP_IO_SPACE
+        select SYS_HAS_CPU_MIPS32_R1
+        select SYS_HAS_CPU_MIPS32_R2
+        select SYS_HAS_CPU_MIPS64_R1
+        select SYS_HAS_CPU_NEVADA
+        select SYS_HAS_CPU_RM7000
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_64BIT_KERNEL
+        select SYS_SUPPORTS_BIG_ENDIAN
+        select SYS_SUPPORTS_LITTLE_ENDIAN
+        help
+          This enables support for the Wind River MIPS32 4KC PPMC evaluation
+          board, which is based on GT64120 bridge chip.
 config MIPS_SIM
-        bool 'Support for MIPS simulator (MIPSsim)'
+        bool 'MIPS simulator (MIPSsim)'
        select DMA_NONCOHERENT
        select IRQ_CPU
        select SYS_HAS_CPU_MIPS32_R1
@@ -341,7 +392,7 @@ config MIPS_SIM
          emulator.
 config MOMENCO_JAGUAR_ATX
-        bool "Support for Momentum Jaguar board"
+        bool "Momentum Jaguar board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -361,7 +412,7 @@ config MOMENCO_JAGUAR_ATX
          Momentum Computer <http://www.momenco.com/>.
 config MOMENCO_OCELOT
-        bool "Support for Momentum Ocelot board"
+        bool "Momentum Ocelot board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -378,7 +429,7 @@ config MOMENCO_OCELOT
          Momentum Computer <http://www.momenco.com/>.
 config MOMENCO_OCELOT_3
-        bool "Support for Momentum Ocelot-3 board"
+        bool "Momentum Ocelot-3 board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -397,7 +448,7 @@ config MOMENCO_OCELOT_3
          PMC-Sierra Rm79000 core.
 config MOMENCO_OCELOT_C
-        bool "Support for Momentum Ocelot-C board"
+        bool "Momentum Ocelot-C board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -414,7 +465,7 @@ config MOMENCO_OCELOT_C
          Momentum Computer <http://www.momenco.com/>.
 config MOMENCO_OCELOT_G
-        bool "Support for Momentum Ocelot-G board"
+        bool "Momentum Ocelot-G board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -431,62 +482,25 @@ config MOMENCO_OCELOT_G
          Momentum Computer <http://www.momenco.com/>.
 config MIPS_XXS1500
-        bool "Support for MyCable XXS1500 board"
+        bool "MyCable XXS1500 board"
        select DMA_NONCOHERENT
        select SOC_AU1500
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config PNX8550_V2PCI
-        bool "Support for Philips PNX8550 based Viper2-PCI board"
+        bool "Philips PNX8550 based Viper2-PCI board"
+        depends on BROKEN
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config PNX8550_JBS
-        bool "Support for Philips PNX8550 based JBS board"
+        bool "Philips PNX8550 based JBS board"
+        depends on BROKEN
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
-config DDB5074
-        bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
-        select DDB5XXX_COMMON
-        select DMA_NONCOHERENT
-        select HAVE_STD_PC_SERIAL_PORT
-        select HW_HAS_PCI
-        select IRQ_CPU
-        select I8259
-        select ISA
-        select SYS_HAS_CPU_R5000
-        select SYS_SUPPORTS_32BIT_KERNEL
-        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-        select SYS_SUPPORTS_LITTLE_ENDIAN
-        help
-          This enables support for the VR5000-based NEC DDB Vrc-5074
-          evaluation board.
-config DDB5476
-        bool "Support for NEC DDB Vrc-5476"
-        select DDB5XXX_COMMON
-        select DMA_NONCOHERENT
-        select HAVE_STD_PC_SERIAL_PORT
-        select HW_HAS_PCI
-        select IRQ_CPU
-        select I8259
-        select ISA
-        select SYS_HAS_CPU_R5432
-        select SYS_SUPPORTS_32BIT_KERNEL
-        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-        select SYS_SUPPORTS_LITTLE_ENDIAN
-        help
-          This enables support for the R5432-based NEC DDB Vrc-5476
-          evaluation board.
-          Features : kernel debugging, serial terminal, NFS root fs, on-board
-          ether port USB, AC97, PCI, PCI VGA card & framebuffer console,
-          IDE controller, PS2 keyboard, PS2 mouse, etc.
 config DDB5477
-        bool "Support for NEC DDB Vrc-5477"
+        bool "NEC DDB Vrc-5477"
        select DDB5XXX_COMMON
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -504,13 +518,13 @@ config DDB5477
          ether port USB, AC97, PCI, etc.
 config MACH_VR41XX
-        bool "Support for NEC VR4100 series based machines"
+        bool "NEC VR41XX-based machines"
        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 config PMC_YOSEMITE
-        bool "Support for PMC-Sierra Yosemite eval board"
+        bool "PMC-Sierra Yosemite eval board"
        select DMA_COHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -527,7 +541,7 @@ config PMC_YOSEMITE
          manufactured by PMC-Sierra.
 config QEMU
-        bool "Support for Qemu"
+        bool "Qemu"
        select DMA_COHERENT
        select GENERIC_ISA_DMA
        select HAVE_STD_PC_SERIAL_PORT
@@ -546,8 +560,22 @@ config QEMU
          simulate actual MIPS hardware platforms.  More information on Qemu
          can be found at http://www.linux-mips.org/wiki/Qemu.
+config MARKEINS
+        bool "Support for NEC EMMA2RH Mark-eins"
+        select DMA_NONCOHERENT
+        select HW_HAS_PCI
+        select IRQ_CPU
+        select SWAP_IO_SPACE
+        select SYS_SUPPORTS_32BIT_KERNEL
+        select SYS_SUPPORTS_BIG_ENDIAN
+        select SYS_SUPPORTS_LITTLE_ENDIAN
+        select SYS_HAS_CPU_R5000
+        help
+          This enables support for the R5432-based NEC Mark-eins
+          boards with R5500 CPU.
 config SGI_IP22
-        bool "Support for SGI IP22 (Indy/Indigo2)"
+        bool "SGI IP22 (Indy/Indigo2)"
        select ARC
        select ARC32
        select BOOT_ELF32
@@ -555,6 +583,7 @@ config SGI_IP22
        select HW_HAS_EISA
        select IP22_CPU_SCACHE
        select IRQ_CPU
+        select NO_ISA if ISA
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_R4X00
        select SYS_HAS_CPU_R5000
@@ -567,7 +596,7 @@ config SGI_IP22
          that runs on these, say Y here.
 config SGI_IP27
-        bool "Support for SGI IP27 (Origin200/2000)"
+        bool "SGI IP27 (Origin200/2000)"
        select ARC
        select ARC64
        select BOOT_ELF64
@@ -577,13 +606,14 @@ config SGI_IP27
        select SYS_HAS_CPU_R10000
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
+        select SYS_SUPPORTS_NUMA
        help
          This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
          workstations.  To compile a Linux kernel that runs on these, say Y
          here.
 config SGI_IP32
-        bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
+        bool "SGI IP32 (O2) (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select ARC
        select ARC32
@@ -604,7 +634,7 @@ config SGI_IP32
          If you want this kernel to run on SGI O2 workstation, say Y here.
 config SIBYTE_BIGSUR
-        bool "Support for Sibyte BCM91480B-BigSur"
+        bool "Sibyte BCM91480B-BigSur"
        select BOOT_ELF32
        select DMA_COHERENT
        select PCI_DOMAINS
@@ -615,7 +645,7 @@ config SIBYTE_BIGSUR
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_SWARM
-        bool "Support for Sibyte BCM91250A-SWARM"
+        bool "Sibyte BCM91250A-SWARM"
        select BOOT_ELF32
        select DMA_COHERENT
        select SIBYTE_SB1250
@@ -626,7 +656,7 @@ config SIBYTE_SWARM
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_SENTOSA
-        bool "Support for Sibyte BCM91250E-Sentosa"
+        bool "Sibyte BCM91250E-Sentosa"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -637,7 +667,7 @@ config SIBYTE_SENTOSA
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_RHONE
-        bool "Support for Sibyte BCM91125E-Rhone"
+        bool "Sibyte BCM91125E-Rhone"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -648,7 +678,7 @@ config SIBYTE_RHONE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_CARMEL
-        bool "Support for Sibyte BCM91120x-Carmel"
+        bool "Sibyte BCM91120x-Carmel"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -659,7 +689,7 @@ config SIBYTE_CARMEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_PTSWARM
-        bool "Support for Sibyte BCM91250PT-PTSWARM"
+        bool "Sibyte BCM91250PT-PTSWARM"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -671,7 +701,7 @@ config SIBYTE_PTSWARM
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_LITTLESUR
-        bool "Support for Sibyte BCM91250C2-LittleSur"
+        bool "Sibyte BCM91250C2-LittleSur"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -683,7 +713,7 @@ config SIBYTE_LITTLESUR
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_CRHINE
-        bool "Support for Sibyte BCM91120C-CRhine"
+        bool "Sibyte BCM91120C-CRhine"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -694,7 +724,7 @@ config SIBYTE_CRHINE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SIBYTE_CRHONE
-        bool "Support for Sibyte BCM91125C-CRhone"
+        bool "Sibyte BCM91125C-CRhone"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -706,9 +736,9 @@ config SIBYTE_CRHONE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config SNI_RM200_PCI
-        bool "Support for SNI RM200 PCI"
+        bool "SNI RM200 PCI"
-        select ARC
+        select ARC if CPU_LITTLE_ENDIAN
-        select ARC32
+        select ARC32 if CPU_LITTLE_ENDIAN
        select ARCH_MAY_HAVE_PC_FDC
        select BOOT_ELF32
        select DMA_NONCOHERENT
@@ -719,10 +749,13 @@ config SNI_RM200_PCI
        select I8253
        select I8259
        select ISA
+        select SWAP_IO_SPACE if CPU_BIG_ENDIAN
        select SYS_HAS_CPU_R4X00
+        select SYS_HAS_CPU_R5000
+        select R5000_CPU_SCACHE
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
-        select SYS_SUPPORTS_BIG_ENDIAN if EXPERIMENTAL
+        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_HIGHMEM
        select SYS_SUPPORTS_LITTLE_ENDIAN
        help
@@ -732,7 +765,7 @@ config SNI_RM200_PCI
          support this machine type.
 config TOSHIBA_JMR3927
-        bool "Support for Toshiba JMR-TX3927 board"
+        bool "Toshiba JMR-TX3927 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_TX3927
@@ -743,7 +776,7 @@ config TOSHIBA_JMR3927
        select TOSHIBA_BOARDS
 config TOSHIBA_RBTX4927
-        bool "Support for Toshiba TBTX49[23]7 board"
+        bool "Toshiba TBTX49[23]7 board"
        select DMA_NONCOHERENT
        select HAS_TXX9_SERIAL
        select HW_HAS_PCI
@@ -760,7 +793,7 @@ config TOSHIBA_RBTX4927
          support this machine type
 config TOSHIBA_RBTX4938
-        bool "Support for Toshiba RBTX4938 board"
+        bool "Toshiba RBTX4938 board"
        select HAVE_STD_PC_SERIAL_PORT
        select DMA_NONCOHERENT
        select GENERIC_ISA_DMA
@@ -979,6 +1012,11 @@ config SOC_PNX8550
 config SWAP_IO_SPACE
        bool
+config EMMA2RH
+        bool
+        depends on MARKEINS
+        default y
 #
 # Unfortunately not all GT64120 systems run the chip at the same clock.
 # As the user for the clock rate and try to minimize the available options.
@@ -1411,13 +1449,12 @@ config PAGE_SIZE_8KB
 config PAGE_SIZE_16KB
        bool "16kB"
-        depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
+        depends on !CPU_R3000 && !CPU_TX39XX
        help
          Using 16kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available on
-          all non-R3000 family processor.  Not that at the time of this
+          all non-R3000 family processors.  Note that you will need a suitable
-          writing this option is still high experimental; there are also
+          Linux distribution to support this.
-          issues with compatibility of user applications.
 config PAGE_SIZE_64KB
        bool "64kB"
@@ -1426,8 +1463,7 @@ config PAGE_SIZE_64KB
          Using 64kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available on
          all non-R3000 family processor.  Not that at the time of this
-          writing this option is still high experimental; there are also
+          writing this option is still high experimental.
-          issues with compatibility of user applications.
 endchoice
@@ -1609,6 +1645,28 @@ config ARCH_FLATMEM_ENABLE
        def_bool y
        depends on !NUMA
+config ARCH_DISCONTIGMEM_ENABLE
+        bool
+        default y if SGI_IP27
+        help
+          Say Y to upport efficient handling of discontiguous physical memory,
+          for architectures which are either NUMA (Non-Uniform Memory Access)
+          or have huge holes in the physical address space for other reasons.
+          See <file:Documentation/vm/numa> for more.
+config NUMA
+        bool "NUMA Support"
+        depends on SYS_SUPPORTS_NUMA
+        help
+          Say Y to compile the kernel to support NUMA (Non-Uniform Memory
+          Access).  This option improves performance on systems with more
+          than two nodes; on two node systems it is generally better to
+          leave it disabled; on single node systems disable this option
+          disabled.
+config SYS_SUPPORTS_NUMA
+        bool
 config NODES_SHIFT
        int
        default "6"
@@ -1653,6 +1711,77 @@ config NR_CPUS
          This is purely to save memory - each supported CPU adds
          approximately eight kilobytes to the kernel image.
+#
+# Timer Interrupt Frequency Configuration
+#
+choice
+        prompt "Timer frequency"
+        default HZ_250
+        help
+         Allows the configuration of the timer frequency.
+        config HZ_48
+                bool "48 HZ" if SYS_SUPPORTS_48HZ
+        config HZ_100
+                bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
+        config HZ_128
+                bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
+        config HZ_250
+                bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
+        config HZ_256
+                bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
+        config HZ_1000
+                bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
+        config HZ_1024
+                bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
+endchoice
+config SYS_SUPPORTS_48HZ
+        bool
+config SYS_SUPPORTS_100HZ
+        bool
+config SYS_SUPPORTS_128HZ
+        bool
+config SYS_SUPPORTS_250HZ
+        bool
+config SYS_SUPPORTS_256HZ
+        bool
+config SYS_SUPPORTS_1000HZ
+        bool
+config SYS_SUPPORTS_1024HZ
+        bool
+config SYS_SUPPORTS_ARBIT_HZ
+        bool
+        default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
+                     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
+                     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
+                     !SYS_SUPPORTS_1024HZ
+config HZ
+        int
+        default 48 if HZ_48
+        default 100 if HZ_100
+        default 128 if HZ_128
+        default 250 if HZ_250
+        default 256 if HZ_256
+        default 1000 if HZ_1000
+        default 1024 if HZ_1024
 source "kernel/Kconfig.preempt"
 config RTC_DS1742
@@ -1712,6 +1841,9 @@ source "drivers/pci/Kconfig"
 config ISA
        bool
+config NO_ISA
+        bool
 config EISA
        bool "EISA support"
        depends on HW_HAS_EISA
@@ -1842,6 +1974,32 @@ config PM
        bool "Power Management support (EXPERIMENTAL)"
        depends on EXPERIMENTAL && SOC_AU1X00
+config APM
+        tristate "Advanced Power Management Emulation"
+        depends on PM
+        ---help---
+          APM is a BIOS specification for saving power using several different
+          techniques. This is mostly useful for battery powered systems with
+          APM compliant BIOSes. If you say Y here, the system time will be
+          reset after a RESUME operation, the /proc/apm device will provide
+          battery status information, and user-space programs will receive
+          notification of APM "events" (e.g. battery status change).
+          In order to use APM, you will need supporting software. For location
+          and more information, read <file:Documentation/pm.txt> and the
+          Battery Powered Linux mini-HOWTO, available from
+          <http://www.tldp.org/docs.html#howto>.
+          This driver does not spin down disk drives (see the hdparm(8)
+          manpage ("man 8 hdparm") for that), and it doesn't turn off
+          VESA-compliant "green" monitors.
+          Generally, if you don't have a battery in your machine, there isn't
+          much point in using this driver and you should say N. If you get
+          random kernel OOPSes or reboots that don't seem to be related to
+          anything, try disabling/enabling this option (or disabling/enabling
+          APM in your BIOS).
 endmenu
 source "net/Kconfig"
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 133900aca992..d5930148495a 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -83,6 +83,8 @@ cflags-y			+= -msoft-float
 LDFLAGS_vmlinux                 += -G 0 -static -n -nostdlib
 MODFLAGS                        += -mlong-calls
+cflags-y += -ffreestanding
 #
 # We explicitly add the endianness specifier if needed, this allows
 # to compile kernels with a toolchain for the other endianness. We
@@ -285,6 +287,13 @@ cflags-$(CONFIG_MIPS_EV96100)	+= -Iinclude/asm-mips/mach-ev96100
 load-$(CONFIG_MIPS_EV96100)     += 0xffffffff80100000
 #
+# Wind River PPMC Board (4KC + GT64120)
+#
+core-$(CONFIG_WR_PPMC)          += arch/mips/gt64120/wrppmc/
+cflags-$(CONFIG_WR_PPMC)                += -Iinclude/asm-mips/mach-wrppmc
+load-$(CONFIG_WR_PPMC)          += 0xffffffff80100000
+#
 # Globespan IVR eval board with QED 5231 CPU
 #
 core-$(CONFIG_ITE_BOARD_GEN)    += arch/mips/ite-boards/generic/
@@ -379,6 +388,13 @@ cflags-$(CONFIG_MOMENCO_OCELOT_3)	+= -Iinclude/asm-mips/mach-ocelot3
 load-$(CONFIG_MOMENCO_OCELOT_3)         += 0xffffffff80100000
 #
+# Basler eXcite
+#
+core-$(CONFIG_BASLER_EXCITE)    += arch/mips/basler/excite/
+cflags-$(CONFIG_BASLER_EXCITE)  += -Iinclude/asm-mips/mach-excite
+load-$(CONFIG_BASLER_EXCITE)    += 0x80100000
+#
 # Momentum Jaguar ATX
 #
 core-$(CONFIG_MOMENCO_JAGUAR_ATX)       += arch/mips/momentum/jaguar_atx/
@@ -395,18 +411,6 @@ load-$(CONFIG_MOMENCO_JAGUAR_ATX)	+= 0xffffffff80100000
 core-$(CONFIG_DDB5XXX_COMMON)   += arch/mips/ddb5xxx/common/
 #
-# NEC DDB Vrc-5074
-#
-core-$(CONFIG_DDB5074)          += arch/mips/ddb5xxx/ddb5074/
-load-$(CONFIG_DDB5074)          += 0xffffffff80080000
-#
-# NEC DDB Vrc-5476
-#
-core-$(CONFIG_DDB5476)          += arch/mips/ddb5xxx/ddb5476/
-load-$(CONFIG_DDB5476)          += 0xffffffff80080000
-#
 # NEC DDB Vrc-5477
 #
 core-$(CONFIG_DDB5477)          += arch/mips/ddb5xxx/ddb5477/
@@ -468,6 +472,15 @@ libs-$(CONFIG_PNX8550_JBS)	+= arch/mips/philips/pnx8550/jbs/
 #cflags-$(CONFIG_PNX8550_JBS)   += -Iinclude/asm-mips/mach-pnx8550
 load-$(CONFIG_PNX8550_JBS)      += 0xffffffff80060000
+# NEC EMMA2RH boards
+#
+core-$(CONFIG_EMMA2RH)          += arch/mips/emma2rh/common/
+cflags-$(CONFIG_EMMA2RH)        += -Iinclude/asm-mips/mach-emma2rh
+# NEC EMMA2RH Mark-eins
+core-$(CONFIG_MARKEINS)         += arch/mips/emma2rh/markeins/
+load-$(CONFIG_MARKEINS)         += 0xffffffff88100000
 #
 # SGI IP22 (Indy/Indigo2)
 #
diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/au1000/common/au1xxx_irqmap.c
index 0b2c03c52319..5a1e3687cafa 100644
--- a/arch/mips/au1000/common/au1xxx_irqmap.c
+++ b/arch/mips/au1000/common/au1xxx_irqmap.c
@@ -55,7 +55,7 @@
 * Careful if you change match 2 request!
 * The interrupt handler is called directly from the low level dispatch code.
 */
-au1xxx_irq_map_t au1xxx_ic0_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_ic0_map[] = {
 #if defined(CONFIG_SOC_AU1000)
        { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
@@ -220,5 +220,5 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
 };
-int au1xxx_ic0_nr_irqs = sizeof(au1xxx_ic0_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_ic0_nr_irqs = ARRAY_SIZE(au1xxx_ic0_map);
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index da61de776154..afe05ec12c27 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -68,6 +68,7 @@
 extern void set_debug_traps(void);
 extern irq_cpustat_t irq_stat [NR_CPUS];
+extern void mips_timer_interrupt(struct pt_regs *regs);
 static void setup_local_irq(unsigned int irq, int type, int int_req);
 static unsigned int startup_irq(unsigned int irq);
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index 4e5a6e1a9a6e..b1392abac809 100644
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -40,17 +40,17 @@
 /* TBD */
 static struct resource pci_io_resource = {
-        "pci IO space",
+        .start  = PCI_IO_START,
-        (u32)PCI_IO_START,
+        .end    = PCI_IO_END,
-        (u32)PCI_IO_END,
+        .name   = "PCI IO space",
-        IORESOURCE_IO
+        .flags  = IORESOURCE_IO
 };
 static struct resource pci_mem_resource = {
-        "pci memory space",
+        .start  = PCI_MEM_START,
-        (u32)PCI_MEM_START,
+        .end    = PCI_MEM_END,
-        (u32)PCI_MEM_END,
+        .name   = "PCI memory space",
-        IORESOURCE_MEM
+        .flags  = IORESOURCE_MEM
 };
 extern struct pci_ops au1x_pci_ops;
diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c
index 9c171afd9a53..ae7d8c57bf3f 100644
--- a/arch/mips/au1000/common/prom.c
+++ b/arch/mips/au1000/common/prom.c
@@ -1,10 +1,9 @@
 /*
 *
 * BRIEF MODULE DESCRIPTION
- *    PROM library initialisation code, assuming a version of
+ *    PROM library initialisation code, assuming YAMON is the boot loader.
- *    pmon is the boot code.
 *
- * Copyright 2000,2001 MontaVista Software Inc.
+ * Copyright 2000, 2001, 2006 MontaVista Software Inc.
 * Author: MontaVista Software, Inc.
 *              ppopov@mvista.com or source@mvista.com
 *
@@ -49,9 +48,9 @@ extern char **prom_argv, **prom_envp;
 typedef struct
 {
-    char *name;
+        char *name;
-/*    char *val; */
+        char *val;
-}t_env_var;
+} t_env_var;
 char * prom_getcmdline(void)
@@ -85,21 +84,16 @@ char *prom_getenv(char *envname)
 {
        /*
         * Return a pointer to the given environment variable.
-         * Environment variables are stored in the form of "memsize=64".
         */
        t_env_var *env = (t_env_var *)prom_envp;
-        int i;
-        i = strlen(envname);
-        while(env->name) {
+        while (env->name) {
-                if(strncmp(envname, env->name, i) == 0) {
+                if (strcmp(envname, env->name) == 0)
-                        return(env->name + strlen(envname) + 1);
+                        return env->val;
-                }
                env++;
        }
-        return(NULL);
+        return NULL;
 }
 inline unsigned char str2hexnum(unsigned char c)
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 307e98c29ddc..97165b6b3894 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -49,17 +49,13 @@ extern void __init board_setup(void);
 extern void au1000_restart(char *);
 extern void au1000_halt(void);
 extern void au1000_power_off(void);
-extern struct resource ioport_resource;
-extern struct resource iomem_resource;
-extern void (*board_time_init)(void);
 extern void au1x_time_init(void);
-extern void (*board_timer_setup)(struct irqaction *irq);
 extern void au1x_timer_setup(struct irqaction *irq);
 extern void au1xxx_time_init(void);
 extern void au1xxx_timer_setup(struct irqaction *irq);
 extern void set_cpuspec(void);
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        struct  cpu_spec *sp;
        char *argptr;
diff --git a/arch/mips/au1000/common/sleeper.S b/arch/mips/au1000/common/sleeper.S
index 44dac3b0df3b..683d9da84b66 100644
--- a/arch/mips/au1000/common/sleeper.S
+++ b/arch/mips/au1000/common/sleeper.S
@@ -112,6 +112,11 @@ sdsleep:
        mtc0    k0, CP0_PAGEMASK
        lw      k0, 0x14(sp)
        mtc0    k0, CP0_CONFIG
+        /* We need to catch the ealry Alchemy SOCs with
+         * the write-only Config[OD] bit and set it back to one...
+         */
+        jal     au1x00_fixup_config_od
        lw      $1, PT_R1(sp)
        lw      $2, PT_R2(sp)
        lw      $3, PT_R3(sp)
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index f85f1524b366..842e1b5ac4a1 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -50,10 +50,6 @@
 #include <linux/mc146818rtc.h>
 #include <linux/timex.h>
-extern void do_softirq(void);
-extern volatile unsigned long wall_jiffies;
-unsigned long missed_heart_beats = 0;
 static unsigned long r4k_offset; /* Amount to increment compare reg each time */
 static unsigned long r4k_cur;    /* What counter should be at next timer irq */
 int     no_au1xxx_32khz;
@@ -116,6 +112,7 @@ void mips_timer_interrupt(struct pt_regs *regs)
 null:
        ack_r4ktimer(0);
+        irq_exit();
 }
 #ifdef CONFIG_PM
@@ -387,10 +384,9 @@ static unsigned long do_fast_pm_gettimeoffset(void)
 }
 #endif
-void au1xxx_timer_setup(struct irqaction *irq)
+void __init au1xxx_timer_setup(struct irqaction *irq)
 {
-        unsigned int est_freq;
+        unsigned int est_freq;
-        extern unsigned long (*do_gettimeoffset)(void);
        printk("calculating r4koff... ");
        r4k_offset = cal_r4koff();
diff --git a/arch/mips/au1000/csb250/irqmap.c b/arch/mips/au1000/csb250/irqmap.c
index 5cb1166be35c..57d60401905e 100644
--- a/arch/mips/au1000/csb250/irqmap.c
+++ b/arch/mips/au1000/csb250/irqmap.c
@@ -47,7 +47,7 @@
 #include <asm/system.h>
 #include <asm/au1000.h>
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
        { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
@@ -57,4 +57,4 @@ au1xxx_irq_map_t au1xxx_irq_map[] = {
        { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 },
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/au1000/db1x00/irqmap.c
index f63024a9893a..0138c5b7c860 100644
--- a/arch/mips/au1000/db1x00/irqmap.c
+++ b/arch/mips/au1000/db1x00/irqmap.c
@@ -80,7 +80,7 @@ char irq_tab_alchemy[][5] __initdata = {
 #endif
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
 #ifndef CONFIG_MIPS_MIRAGE
 #ifdef CONFIG_MIPS_DB1550
@@ -101,4 +101,4 @@ au1xxx_irq_map_t au1xxx_irq_map[] = {
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/hydrogen3/irqmap.c b/arch/mips/au1000/hydrogen3/irqmap.c
index 6eacaa0daa49..14e1ed37cf6b 100644
--- a/arch/mips/au1000/hydrogen3/irqmap.c
+++ b/arch/mips/au1000/hydrogen3/irqmap.c
@@ -47,10 +47,10 @@
 #include <asm/system.h>
 #include <asm/au1000.h>
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        /* { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, */
        { AU1000_GPIO_21, INTC_INT_LOW_LEVEL, 0 },
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/mtx-1/irqmap.c b/arch/mips/au1000/mtx-1/irqmap.c
index f9a0a8b9def2..4693a4eb2b82 100644
--- a/arch/mips/au1000/mtx-1/irqmap.c
+++ b/arch/mips/au1000/mtx-1/irqmap.c
@@ -58,7 +58,7 @@ char irq_tab_alchemy[][5] __initdata = {
 [7] = { -1, INTD, INTC, INTX, INTX},   /* IDSEL 07 - AdapterD-Slot1 (bottom) */
 };
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
       { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
       { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
       { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
@@ -66,4 +66,4 @@ au1xxx_irq_map_t au1xxx_irq_map[] = {
       { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/pb1000/irqmap.c b/arch/mips/au1000/pb1000/irqmap.c
index a3c460e3c23e..156500ba467f 100644
--- a/arch/mips/au1000/pb1000/irqmap.c
+++ b/arch/mips/au1000/pb1000/irqmap.c
@@ -47,8 +47,8 @@
 #include <asm/system.h>
 #include <asm/mach-au1x00/au1000.h>
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        { AU1000_GPIO_15, INTC_INT_LOW_LEVEL, 0 },
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/pb1100/irqmap.c b/arch/mips/au1000/pb1100/irqmap.c
index 43be7158b9ab..d986916221b7 100644
--- a/arch/mips/au1000/pb1100/irqmap.c
+++ b/arch/mips/au1000/pb1100/irqmap.c
@@ -47,11 +47,11 @@
 #include <asm/system.h>
 #include <asm/mach-au1x00/au1000.h>
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted#
        { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card STSCHG#
        { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card IRQ#
        { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, // DC_IRQ#
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index 59e70e5cf325..bacc0c6bfe67 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -55,11 +55,11 @@
 #define PB1200_INT_END DB1200_INT_END
 #endif
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
 /*
 *      Support for External interrupts on the PbAu1200 Development platform.
diff --git a/arch/mips/au1000/pb1500/irqmap.c b/arch/mips/au1000/pb1500/irqmap.c
index 8cb76c2edb5e..409d1612bb63 100644
--- a/arch/mips/au1000/pb1500/irqmap.c
+++ b/arch/mips/au1000/pb1500/irqmap.c
@@ -52,7 +52,7 @@ char irq_tab_alchemy[][5] __initdata = {
 [13] = { -1, INTA, INTB, INTC, INTD},   /* IDSEL 13 - PCI slot */
 };
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
        { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
        { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
@@ -60,4 +60,4 @@ au1xxx_irq_map_t au1xxx_irq_map[] = {
        { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 },
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/pb1550/irqmap.c b/arch/mips/au1000/pb1550/irqmap.c
index 47c7a1c19f4b..24a9d186cf5a 100644
--- a/arch/mips/au1000/pb1550/irqmap.c
+++ b/arch/mips/au1000/pb1550/irqmap.c
@@ -52,9 +52,9 @@ char irq_tab_alchemy[][5] __initdata = {
 [13] = { -1, INTA, INTB, INTC, INTD},   /* IDSEL 13 - PCI slot 1 (right) */
 };
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
        { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/xxs1500/irqmap.c b/arch/mips/au1000/xxs1500/irqmap.c
index 52f2f7daeb05..3844c6429e27 100644
--- a/arch/mips/au1000/xxs1500/irqmap.c
+++ b/arch/mips/au1000/xxs1500/irqmap.c
@@ -47,7 +47,7 @@
 #include <asm/system.h>
 #include <asm/au1000.h>
-au1xxx_irq_map_t au1xxx_irq_map[] = {
+au1xxx_irq_map_t __initdata au1xxx_irq_map[] = {
        { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0},
        { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
        { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
@@ -63,4 +63,4 @@ au1xxx_irq_map_t au1xxx_irq_map[] = {
        { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 },
 };
-int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
+int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/basler/excite/Makefile b/arch/mips/basler/excite/Makefile
new file mode 100644
index 000000000000..519142c2e4ef
--- /dev/null
+++ b/arch/mips/basler/excite/Makefile
@@ -0,0 +1,9 @@
+#
+# Makefile for Basler eXcite
+#
+obj-$(CONFIG_BASLER_EXCITE)     += excite_irq.o excite_prom.o excite_setup.o \
+                                   excite_device.o excite_procfs.o
+obj-$(CONFIG_KGDB)              += excite_dbg_io.o
+obj-m                           += excite_iodev.o
diff --git a/arch/mips/basler/excite/excite_dbg_io.c b/arch/mips/basler/excite/excite_dbg_io.c
new file mode 100644
index 000000000000..83f6bddf578b
--- /dev/null
+++ b/arch/mips/basler/excite/excite_dbg_io.c
@@ -0,0 +1,122 @@
+/*
+ *  Copyright (C) 2004 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/gdb-stub.h>
+#include <asm/rm9k-ocd.h>
+#include <excite.h>
+#if defined(CONFIG_SERIAL_8250) && CONFIG_SERIAL_8250_NR_UARTS > 1
+#error Debug port used by serial driver
+#endif
+#define UART_CLK                25000000
+#define BASE_BAUD               (UART_CLK / 16)
+#define REGISTER_BASE_0         0x0208UL
+#define REGISTER_BASE_1         0x0238UL
+#define REGISTER_BASE_DBG       REGISTER_BASE_1
+#define CPRR    0x0004
+#define UACFG   0x0200
+#define UAINTS  0x0204
+#define UARBR   (REGISTER_BASE_DBG + 0x0000)
+#define UATHR   (REGISTER_BASE_DBG + 0x0004)
+#define UADLL   (REGISTER_BASE_DBG + 0x0008)
+#define UAIER   (REGISTER_BASE_DBG + 0x000c)
+#define UADLH   (REGISTER_BASE_DBG + 0x0010)
+#define UAIIR   (REGISTER_BASE_DBG + 0x0014)
+#define UAFCR   (REGISTER_BASE_DBG + 0x0018)
+#define UALCR   (REGISTER_BASE_DBG + 0x001c)
+#define UAMCR   (REGISTER_BASE_DBG + 0x0020)
+#define UALSR   (REGISTER_BASE_DBG + 0x0024)
+#define UAMSR   (REGISTER_BASE_DBG + 0x0028)
+#define UASCR   (REGISTER_BASE_DBG + 0x002c)
+#define PARITY_NONE     0
+#define PARITY_ODD      0x08
+#define PARITY_EVEN     0x18
+#define PARITY_MARK     0x28
+#define PARITY_SPACE    0x38
+#define DATA_5BIT       0x0
+#define DATA_6BIT       0x1
+#define DATA_7BIT       0x2
+#define DATA_8BIT       0x3
+#define STOP_1BIT       0x0
+#define STOP_2BIT       0x4
+#define BAUD_DBG        57600
+#define PARITY_DBG      PARITY_NONE
+#define DATA_DBG        DATA_8BIT
+#define STOP_DBG        STOP_1BIT
+/* Initialize the serial port for KGDB debugging */
+void __init excite_kgdb_init(void)
+{
+        const u32 divisor = BASE_BAUD / BAUD_DBG;
+        /* Take the UART out of reset */
+        titan_writel(0x00ff1cff, CPRR);
+        titan_writel(0x00000000, UACFG);
+        titan_writel(0x00000002, UACFG);
+        titan_writel(0x0, UALCR);
+        titan_writel(0x0, UAIER);
+        /* Disable FIFOs */
+        titan_writel(0x00, UAFCR);
+        titan_writel(0x80, UALCR);
+        titan_writel(divisor & 0xff, UADLL);
+        titan_writel((divisor & 0xff00) >> 8, UADLH);
+        titan_writel(0x0, UALCR);
+        titan_writel(DATA_DBG | PARITY_DBG | STOP_DBG, UALCR);
+        /* Enable receiver interrupt */
+        titan_readl(UARBR);
+        titan_writel(0x1, UAIER);
+}
+int getDebugChar(void)
+{
+        while (!(titan_readl(UALSR) & 0x1));
+        return titan_readl(UARBR);
+}
+int putDebugChar(int data)
+{
+        while (!(titan_readl(UALSR) & 0x20));
+        titan_writel(data, UATHR);
+        return 1;
+}
+/* KGDB interrupt handler */
+asmlinkage void excite_kgdb_inthdl(struct pt_regs *regs)
+{
+        if (unlikely(
+                ((titan_readl(UAIIR) & 0x7) == 4)
+                && ((titan_readl(UARBR) & 0xff) == 0x3)))
+                        set_async_breakpoint(&regs->cp0_epc);
+}
diff --git a/arch/mips/basler/excite/excite_device.c b/arch/mips/basler/excite/excite_device.c
new file mode 100644
index 000000000000..34ec76716fa0
--- /dev/null
+++ b/arch/mips/basler/excite/excite_device.c
@@ -0,0 +1,404 @@
+/*
+ *  Copyright (C) 2004 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/ioport.h>
+#include <linux/err.h>
+#include <linux/jiffies.h>
+#include <linux/sched.h>
+#include <asm/types.h>
+#include <asm/rm9k-ocd.h>
+#include <excite.h>
+#include <rm9k_eth.h>
+#include <rm9k_wdt.h>
+#include <rm9k_xicap.h>
+#include <excite_nandflash.h>
+#include "excite_iodev.h"
+#define RM9K_GE_UNIT    0
+#define XICAP_UNIT      0
+#define NAND_UNIT       0
+#define DLL_TIMEOUT     3               /* seconds */
+#define RINIT(__start__, __end__, __name__, __parent__) {       \
+        .name   = __name__ "_0",                                \
+        .start  = (__start__),                                  \
+        .end    = (__end__),                                    \
+        .flags  = 0,                                            \
+        .parent = (__parent__)                                  \
+}
+#define RINIT_IRQ(__irq__, __name__) {  \
+        .name   = __name__ "_0",        \
+        .start  = (__irq__),            \
+        .end    = (__irq__),            \
+        .flags  = IORESOURCE_IRQ,       \
+        .parent = NULL                  \
+}
+enum {
+        slice_xicap,
+        slice_eth
+};
+static struct resource
+        excite_ctr_resource = {
+                .name           = "GPI counters",
+                .start          = 0,
+                .end            = 5,
+                .flags          = 0,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        },
+        excite_gpislice_resource = {
+                .name           = "GPI slices",
+                .start          = 0,
+                .end            = 1,
+                .flags          = 0,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        },
+        excite_mdio_channel_resource = {
+                .name           = "MDIO channels",
+                .start          = 0,
+                .end            = 1,
+                .flags          = 0,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        },
+        excite_fifomem_resource = {
+                .name           = "FIFO memory",
+                .start          = 0,
+                .end            = 767,
+                .flags          = 0,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        },
+        excite_scram_resource = {
+                .name           = "Scratch RAM",
+                .start          = EXCITE_PHYS_SCRAM,
+                .end            = EXCITE_PHYS_SCRAM + EXCITE_SIZE_SCRAM - 1,
+                .flags          = IORESOURCE_MEM,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        },
+        excite_fpga_resource = {
+                .name           = "System FPGA",
+                .start          = EXCITE_PHYS_FPGA,
+                .end            = EXCITE_PHYS_FPGA + EXCITE_SIZE_FPGA - 1,
+                .flags          = IORESOURCE_MEM,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        },
+        excite_nand_resource = {
+                .name           = "NAND flash control",
+                .start          = EXCITE_PHYS_NAND,
+                .end            = EXCITE_PHYS_NAND + EXCITE_SIZE_NAND - 1,
+                .flags          = IORESOURCE_MEM,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        },
+        excite_titan_resource = {
+                .name           = "TITAN registers",
+                .start          = EXCITE_PHYS_TITAN,
+                .end            = EXCITE_PHYS_TITAN + EXCITE_SIZE_TITAN - 1,
+                .flags          = IORESOURCE_MEM,
+                .parent         = NULL,
+                .sibling        = NULL,
+                .child          = NULL
+        };
+static void adjust_resources(struct resource *res, unsigned int n)
+{
+        struct resource *p;
+        const unsigned long mask = IORESOURCE_IO | IORESOURCE_MEM
+                                   | IORESOURCE_IRQ | IORESOURCE_DMA;
+        for (p = res; p < res + n; p++) {
+                const struct resource * const parent = p->parent;
+                if (parent) {
+                        p->start += parent->start;
+                        p->end   += parent->start;
+                        p->flags =  parent->flags & mask;
+                }
+        }
+}
+#if defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE)
+static struct resource xicap_rsrc[] = {
+        RINIT(0x4840, 0x486f, XICAP_RESOURCE_FIFO_RX, &excite_titan_resource),
+        RINIT(0x4940, 0x494b, XICAP_RESOURCE_FIFO_TX, &excite_titan_resource),
+        RINIT(0x5040, 0x5127, XICAP_RESOURCE_XDMA, &excite_titan_resource),
+        RINIT(0x1000, 0x112f, XICAP_RESOURCE_PKTPROC, &excite_titan_resource),
+        RINIT(0x1100, 0x110f, XICAP_RESOURCE_PKT_STREAM, &excite_fpga_resource),
+        RINIT(0x0800, 0x0bff, XICAP_RESOURCE_DMADESC, &excite_scram_resource),
+        RINIT(slice_xicap, slice_xicap, XICAP_RESOURCE_GPI_SLICE, &excite_gpislice_resource),
+        RINIT(0x0100, 0x02ff, XICAP_RESOURCE_FIFO_BLK, &excite_fifomem_resource),
+        RINIT_IRQ(TITAN_IRQ,  XICAP_RESOURCE_IRQ)
+};
+static struct platform_device xicap_pdev = {
+        .name           = XICAP_NAME,
+        .id             = XICAP_UNIT,
+        .num_resources  = ARRAY_SIZE(xicap_rsrc),
+        .resource       = xicap_rsrc
+};
+/*
+ * Create a platform device for the GPI port that receives the
+ * image data from the embedded camera.
+ */
+static int __init xicap_devinit(void)
+{
+        unsigned long tend;
+        u32 reg;
+        int retval;
+        adjust_resources(xicap_rsrc, ARRAY_SIZE(xicap_rsrc));
+        /* Power up the slice and configure it. */
+        reg = titan_readl(CPTC1R);
+        reg &= ~(0x11100 << slice_xicap);
+        titan_writel(reg, CPTC1R);
+        /* Enable slice & DLL. */
+        reg= titan_readl(CPRR);
+        reg &= ~(0x00030003 << (slice_xicap * 2));
+        titan_writel(reg, CPRR);
+        /* Wait for DLLs to lock */
+        tend = jiffies + DLL_TIMEOUT * HZ;
+        while (time_before(jiffies, tend)) {
+                if (!(~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4))))
+                        break;
+                yield();
+        }
+        if (~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4))) {
+                printk(KERN_ERR "%s: DLL not locked after %u seconds\n",
+                       xicap_pdev.name, DLL_TIMEOUT);
+                retval = -ETIME;
+        } else {
+                /* Register platform device */
+                retval = platform_device_register(&xicap_pdev);
+        }
+        return retval;
+}
+device_initcall(xicap_devinit);
+#endif /* defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE) */
+#if defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE)
+static struct resource wdt_rsrc[] = {
+        RINIT(0, 0, WDT_RESOURCE_COUNTER, &excite_ctr_resource),
+        RINIT(0x0084, 0x008f, WDT_RESOURCE_REGS, &excite_titan_resource),
+        RINIT_IRQ(TITAN_IRQ,  WDT_RESOURCE_IRQ)
+};
+static struct platform_device wdt_pdev = {
+        .name           = WDT_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(wdt_rsrc),
+        .resource       = wdt_rsrc
+};
+/*
+ * Create a platform device for the GPI port that receives the
+ * image data from the embedded camera.
+ */
+static int __init wdt_devinit(void)
+{
+        adjust_resources(wdt_rsrc, ARRAY_SIZE(wdt_rsrc));
+        return platform_device_register(&wdt_pdev);
+}
+device_initcall(wdt_devinit);
+#endif /* defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE) */
+static struct resource excite_nandflash_rsrc[] = {
+        RINIT(0x2000, 0x201f, EXCITE_NANDFLASH_RESOURCE_REGS,  &excite_nand_resource)
+};
+static struct platform_device excite_nandflash_pdev = {
+        .name           = "excite_nand",
+        .id             = NAND_UNIT,
+        .num_resources  = ARRAY_SIZE(excite_nandflash_rsrc),
+        .resource       = excite_nandflash_rsrc
+};
+/*
+ * Create a platform device for the access to the nand-flash
+ * port
+ */
+static int __init excite_nandflash_devinit(void)
+{
+        adjust_resources(excite_nandflash_rsrc, ARRAY_SIZE(excite_nandflash_rsrc));
+        /* nothing to be done here */
+        /* Register platform device */
+        return platform_device_register(&excite_nandflash_pdev);
+}
+device_initcall(excite_nandflash_devinit);
+static struct resource iodev_rsrc[] = {
+        RINIT_IRQ(FPGA1_IRQ,  IODEV_RESOURCE_IRQ)
+};
+static struct platform_device io_pdev = {
+        .name           = IODEV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(iodev_rsrc),
+        .resource       = iodev_rsrc
+};
+/*
+ * Create a platform device for the external I/O ports.
+ */
+static int __init io_devinit(void)
+{
+        adjust_resources(iodev_rsrc, ARRAY_SIZE(iodev_rsrc));
+        return platform_device_register(&io_pdev);
+}
+device_initcall(io_devinit);
+#if defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE)
+static struct resource rm9k_ge_rsrc[] = {
+        RINIT(0x2200, 0x27ff, RM9K_GE_RESOURCE_MAC, &excite_titan_resource),
+        RINIT(0x1800, 0x1fff, RM9K_GE_RESOURCE_MSTAT, &excite_titan_resource),
+        RINIT(0x2000, 0x212f, RM9K_GE_RESOURCE_PKTPROC, &excite_titan_resource),
+        RINIT(0x5140, 0x5227, RM9K_GE_RESOURCE_XDMA, &excite_titan_resource),
+        RINIT(0x4870, 0x489f, RM9K_GE_RESOURCE_FIFO_RX, &excite_titan_resource),
+        RINIT(0x494c, 0x4957, RM9K_GE_RESOURCE_FIFO_TX, &excite_titan_resource),
+        RINIT(0x0000, 0x007f, RM9K_GE_RESOURCE_FIFOMEM_RX, &excite_fifomem_resource),
+        RINIT(0x0080, 0x00ff, RM9K_GE_RESOURCE_FIFOMEM_TX, &excite_fifomem_resource),
+        RINIT(0x0180, 0x019f, RM9K_GE_RESOURCE_PHY, &excite_titan_resource),
+        RINIT(0x0000, 0x03ff, RM9K_GE_RESOURCE_DMADESC_RX, &excite_scram_resource),
+        RINIT(0x0400, 0x07ff, RM9K_GE_RESOURCE_DMADESC_TX, &excite_scram_resource),
+        RINIT(slice_eth, slice_eth, RM9K_GE_RESOURCE_GPI_SLICE, &excite_gpislice_resource),
+        RINIT(0, 0, RM9K_GE_RESOURCE_MDIO_CHANNEL, &excite_mdio_channel_resource),
+        RINIT_IRQ(TITAN_IRQ,  RM9K_GE_RESOURCE_IRQ_MAIN),
+        RINIT_IRQ(PHY_IRQ, RM9K_GE_RESOURCE_IRQ_PHY)
+};
+static struct platform_device rm9k_ge_pdev = {
+        .name           = RM9K_GE_NAME,
+        .id             = RM9K_GE_UNIT,
+        .num_resources  = ARRAY_SIZE(rm9k_ge_rsrc),
+        .resource       = rm9k_ge_rsrc
+};
+/*
+ * Create a platform device for the Ethernet port.
+ */
+static int __init rm9k_ge_devinit(void)
+{
+        u32 reg;
+        adjust_resources(rm9k_ge_rsrc, ARRAY_SIZE(rm9k_ge_rsrc));
+        /* Power up the slice and configure it. */
+        reg = titan_readl(CPTC1R);
+        reg &= ~(0x11000 << slice_eth);
+        reg |= 0x100 << slice_eth;
+        titan_writel(reg, CPTC1R);
+        /* Take the MAC out of reset, reset the DLLs. */
+        reg = titan_readl(CPRR);
+        reg &= ~(0x00030000 << (slice_eth * 2));
+        reg |= 0x3 << (slice_eth * 2);
+        titan_writel(reg, CPRR);
+        return platform_device_register(&rm9k_ge_pdev);
+}
+device_initcall(rm9k_ge_devinit);
+#endif /* defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE) */
+static int __init excite_setup_devs(void)
+{
+        int res;
+        u32 reg;
+        /* Enable xdma and fifo interrupts */
+        reg = titan_readl(0x0050);
+        titan_writel(reg | 0x18000000, 0x0050);
+        res = request_resource(&iomem_resource, &excite_titan_resource);
+        if (res)
+                return res;
+        res = request_resource(&iomem_resource, &excite_scram_resource);
+        if (res)
+                return res;
+        res = request_resource(&iomem_resource, &excite_fpga_resource);
+        if (res)
+                return res;
+        res = request_resource(&iomem_resource, &excite_nand_resource);
+        if (res)
+                return res;
+        excite_fpga_resource.flags = excite_fpga_resource.parent->flags &
+                                   ( IORESOURCE_IO | IORESOURCE_MEM
+                                   | IORESOURCE_IRQ | IORESOURCE_DMA);
+        excite_nand_resource.flags = excite_nand_resource.parent->flags &
+                                   ( IORESOURCE_IO | IORESOURCE_MEM
+                                   | IORESOURCE_IRQ | IORESOURCE_DMA);
+        return 0;
+}
+arch_initcall(excite_setup_devs);
diff --git a/arch/mips/basler/excite/excite_flashtest.c b/arch/mips/basler/excite/excite_flashtest.c
new file mode 100644
index 000000000000..f0024a8e3294
--- /dev/null
+++ b/arch/mips/basler/excite/excite_flashtest.c
@@ -0,0 +1,294 @@
+/*
+*  Copyright (C) 2005 by Basler Vision Technologies AG
+*  Author: Thies Moeller <thies.moeller@baslerweb.com>
+*
+*  This program is free software; you can redistribute it and/or modify
+*  it under the terms of the GNU General Public License as published by
+*  the Free Software Foundation; either version 2 of the License, or
+*  (at your option) any later version.
+*
+*  This program is distributed in the hope that it will be useful,
+*  but WITHOUT ANY WARRANTY; without even the implied warranty of
+*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+*  GNU General Public License for more details.
+*
+*  You should have received a copy of the GNU General Public License
+*  along with this program; if not, write to the Free Software
+*  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <excite.h>
+#include <asm/io.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+#include <asm/rm9k-ocd.h> // for ocd_write
+#include <linux/workqueue.h> // for queue
+#include "excite_nandflash.h"
+#include "nandflash.h"
+#define PFX "excite flashtest: "
+typedef void __iomem *io_reg_t;
+#define io_readb(__a__)         __raw_readb((__a__))
+#define io_writeb(__v__, __a__) __raw_writeb((__v__), (__a__))
+static inline const struct resource *excite_nandflash_get_resource(
+        struct platform_device *d, unsigned long flags, const char *basename)
+{
+        const char fmt[] = "%s_%u";
+        char buf[80];
+        if (unlikely(snprintf(buf, sizeof buf, fmt, basename, d->id) >= sizeof buf))
+                return NULL;
+        return platform_get_resource_byname(d, flags, buf);
+}
+static inline io_reg_t
+excite_nandflash_map_regs(struct platform_device *d, const char *basename)
+{
+        void *result = NULL;
+        const struct resource *const r =
+            excite_nandflash_get_resource(d, IORESOURCE_MEM, basename);
+        if (r)
+           result = ioremap_nocache(r->start, r->end + 1 - r->start);
+        return result;
+}
+/* controller and mtd information */
+struct excite_nandflash_drvdata {
+        struct mtd_info board_mtd;
+        struct nand_chip board_chip;
+        io_reg_t regs;
+};
+/* command and control functions */
+static void excite_nandflash_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+        struct nand_chip *this = mtd->priv;
+        io_reg_t regs = container_of(mtd,struct excite_nandflash_drvdata,board_mtd)->regs;
+        switch (cmd) {
+        /* Select the command latch */
+        case NAND_CTL_SETCLE: this->IO_ADDR_W = regs + EXCITE_NANDFLASH_CMD;
+                break;
+        /* Deselect the command latch */
+        case NAND_CTL_CLRCLE: this->IO_ADDR_W = regs + EXCITE_NANDFLASH_DATA;
+                break;
+        /* Select the address latch */
+        case NAND_CTL_SETALE: this->IO_ADDR_W = regs + EXCITE_NANDFLASH_ADDR;
+                break;
+        /* Deselect the address latch */
+        case NAND_CTL_CLRALE: this->IO_ADDR_W = regs  + EXCITE_NANDFLASH_DATA;
+                break;
+        /* Select the chip  -- not used */
+        case NAND_CTL_SETNCE:
+                break;
+        /* Deselect the chip -- not used */
+        case NAND_CTL_CLRNCE:
+                break;
+        }
+        this->IO_ADDR_R = this->IO_ADDR_W;
+}
+/* excite_nandflash_devready()
+ *
+ * returns 0 if the nand is busy, 1 if it is ready
+ */
+static int excite_nandflash_devready(struct mtd_info *mtd)
+{
+        struct excite_nandflash_drvdata *drvdata =
+            container_of(mtd, struct excite_nandflash_drvdata, board_mtd);
+        return io_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS);
+}
+/* device management functions */
+/* excite_nandflash_remove
+ *
+ * called by device layer to remove the driver
+ * the binding to the mtd and all allocated
+ * resources are released
+ */
+static int excite_nandflash_remove(struct device *dev)
+{
+        struct excite_nandflash_drvdata *this = dev_get_drvdata(dev);
+        pr_info(PFX "remove");
+        dev_set_drvdata(dev, NULL);
+        if (this == NULL) {
+                pr_debug(PFX "call remove without private data!!");
+                return 0;
+        }
+        /* free the common resources */
+        if (this->regs != NULL) {
+                iounmap(this->regs);
+                this->regs = NULL;
+        }
+        kfree(this);
+        return 0;
+}
+static int elapsed;
+void my_workqueue_handler(void *arg)
+{
+        elapsed = 1;
+}
+DECLARE_WORK(sigElapsed, my_workqueue_handler, 0);
+/* excite_nandflash_probe
+ *
+ * called by device layer when it finds a device matching
+ * one our driver can handled. This code checks to see if
+ * it can allocate all necessary resources then calls the
+ * nand layer to look for devices
+*/
+static int excite_nandflash_probe(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct excite_nandflash_drvdata *drvdata;           /* private driver data     */
+        struct nand_chip              *board_chip;  /* private flash chip data */
+        struct mtd_info               *board_mtd;   /* mtd info for this board */
+        int err      = 0;
+        int count    = 0;
+        struct timeval tv,endtv;
+        unsigned int dt;
+        pr_info(PFX "probe dev: (%p)\n", dev);
+        pr_info(PFX "adjust LB timing\n");
+        ocd_writel(0x00000330, LDP2);
+        drvdata = kmalloc(sizeof(*drvdata), GFP_KERNEL);
+        if (unlikely(!drvdata)) {
+                printk(KERN_ERR PFX "no memory for drvdata\n");
+                err = -ENOMEM;
+                goto mem_error;
+        }
+        /* Initialize structures */
+        memset(drvdata, 0, sizeof(*drvdata));
+        /* bind private data into driver */
+        dev_set_drvdata(dev, drvdata);
+        /* allocate and map the resource */
+        drvdata->regs =
+            excite_nandflash_map_regs(pdev, EXCITE_NANDFLASH_RESOURCE_REGS);
+        if (unlikely(!drvdata->regs)) {
+                printk(KERN_ERR PFX "cannot reserve register region\n");
+                err = -ENXIO;
+                goto io_error;
+        }
+        /* initialise our chip */
+        board_chip = &drvdata->board_chip;
+        board_chip->IO_ADDR_R = drvdata->regs + EXCITE_NANDFLASH_DATA;
+        board_chip->IO_ADDR_W = drvdata->regs + EXCITE_NANDFLASH_DATA;
+        board_chip->hwcontrol = excite_nandflash_hwcontrol;
+        board_chip->dev_ready = excite_nandflash_devready;
+        board_chip->chip_delay = 25;
+        #if 0
+        /* TODO: speedup the initial scan */
+        board_chip->options = NAND_USE_FLASH_BBT;
+        #endif
+        board_chip->eccmode = NAND_ECC_SOFT;
+        /* link chip to mtd */
+        board_mtd = &drvdata->board_mtd;
+        board_mtd->priv = board_chip;
+        pr_info(PFX "FlashTest\n");
+        elapsed = 0;
+/*      schedule_delayed_work(&sigElapsed, 1*HZ);
+        while (!elapsed) {
+                io_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS);
+                count++;
+        }
+        pr_info(PFX "reads in 1 sec --> %d\n",count);
+*/
+        do_gettimeofday(&tv);
+        for (count = 0 ; count < 1000000; count ++) {
+                io_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS);
+        }
+        do_gettimeofday(&endtv);
+        dt = (endtv.tv_sec - tv.tv_sec) * 1000000 + endtv.tv_usec  - tv.tv_usec;
+        pr_info(PFX "%8d us timeval\n",dt);
+        pr_info(PFX "EndFlashTest\n");
+/*      return with error to unload everything
+*/
+io_error:
+        iounmap(drvdata->regs);
+mem_error:
+        kfree(drvdata);
+        if (err == 0)
+                err = -EINVAL;
+        return err;
+}
+static struct device_driver excite_nandflash_driver = {
+        .name = "excite_nand",
+        .bus = &platform_bus_type,
+        .probe = excite_nandflash_probe,
+        .remove = excite_nandflash_remove,
+};
+static int __init excite_nandflash_init(void)
+{
+        pr_info(PFX "register Driver (Rev: $Revision:$)\n");
+        return driver_register(&excite_nandflash_driver);
+}
+static void __exit excite_nandflash_exit(void)
+{
+        driver_unregister(&excite_nandflash_driver);
+        pr_info(PFX "Driver unregistered");
+}
+module_init(excite_nandflash_init);
+module_exit(excite_nandflash_exit);
+MODULE_AUTHOR("Thies Moeller <thies.moeller@baslerweb.com>");
+MODULE_DESCRIPTION("Basler eXcite NAND-Flash driver");
+MODULE_LICENSE("GPL");
diff --git a/arch/mips/basler/excite/excite_fpga.h b/arch/mips/basler/excite/excite_fpga.h
new file mode 100644
index 000000000000..38fcda703a0b
--- /dev/null
+++ b/arch/mips/basler/excite/excite_fpga.h
@@ -0,0 +1,80 @@
+#ifndef EXCITE_FPGA_H_INCLUDED
+#define EXCITE_FPGA_H_INCLUDED
+/**
+ * Adress alignment of the individual FPGA bytes.
+ * The address arrangement of the individual bytes of the FPGA is two
+ * byte aligned at the embedded MK2 platform.
+ */
+#ifdef EXCITE_CCI_FPGA_MK2
+typedef unsigned char excite_cci_fpga_align_t __attribute__ ((aligned(2)));
+#else
+typedef unsigned char excite_cci_fpga_align_t;
+#endif
+/**
+ * Size of Dual Ported RAM.
+ */
+#define EXCITE_DPR_SIZE 263
+/**
+ * Size of Reserved Status Fields in Dual Ported RAM.
+ */
+#define EXCITE_DPR_STATUS_SIZE 7
+/**
+ * FPGA.
+ * Hardware register layout of the FPGA interface. The FPGA must accessed
+ * byte wise solely.
+ * @see EXCITE_CCI_DPR_MK2
+ */
+typedef struct excite_fpga {
+        /**
+         * Dual Ported RAM.
+         */
+        excite_cci_fpga_align_t dpr[EXCITE_DPR_SIZE];
+        /**
+         * Status.
+         */
+        excite_cci_fpga_align_t status[EXCITE_DPR_STATUS_SIZE];
+#ifdef EXCITE_CCI_FPGA_MK2
+        /**
+         * RM9000 Interrupt.
+         * Write access initiates interrupt at the RM9000 (MIPS) processor of the eXcite.
+         */
+        excite_cci_fpga_align_t rm9k_int;
+#else
+        /**
+         * MK2 Interrupt.
+         * Write access initiates interrupt at the ARM processor of the MK2.
+         */
+        excite_cci_fpga_align_t mk2_int;
+        excite_cci_fpga_align_t gap[0x1000-0x10f];
+        /**
+         * IRQ Source/Acknowledge.
+         */
+        excite_cci_fpga_align_t rm9k_irq_src;
+        /**
+         * IRQ Mask.
+         * Set bits enable the related interrupt.
+         */
+        excite_cci_fpga_align_t rm9k_irq_mask;
+#endif
+} excite_fpga;
+#endif  /* ndef EXCITE_FPGA_H_INCLUDED */
diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c
new file mode 100644
index 000000000000..91121e523043
--- /dev/null
+++ b/arch/mips/basler/excite/excite_iodev.c
@@ -0,0 +1,183 @@
+/*
+ *  Copyright (C) 2005 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/compiler.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/poll.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/miscdevice.h>
+#include "excite_iodev.h"
+static const struct resource *iodev_get_resource(struct platform_device *, const char *, unsigned int);
+static int __init iodev_probe(struct device *);
+static int __exit iodev_remove(struct device *);
+static int iodev_open(struct inode *, struct file *);
+static int iodev_release(struct inode *, struct file *);
+static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *);
+static unsigned int iodev_poll(struct file *, struct poll_table_struct *);
+static irqreturn_t iodev_irqhdl(int, void *, struct pt_regs *);
+static const char iodev_name[] = "iodev";
+static unsigned int iodev_irq;
+static DECLARE_WAIT_QUEUE_HEAD(wq);
+static struct file_operations fops =
+{
+        .owner          = THIS_MODULE,
+        .open           = iodev_open,
+        .release        = iodev_release,
+        .read           = iodev_read,
+        .poll           = iodev_poll
+};
+static struct miscdevice miscdev =
+{
+        .minor          = MISC_DYNAMIC_MINOR,
+        .name           = iodev_name,
+        .fops           = &fops
+};
+static struct device_driver iodev_driver =
+{
+        .name           = (char *) iodev_name,
+        .bus            = &platform_bus_type,
+        .owner          = THIS_MODULE,
+        .probe          = iodev_probe,
+        .remove         = __exit_p(iodev_remove)
+};
+static const struct resource *
+iodev_get_resource(struct platform_device *pdv, const char *name,
+                     unsigned int type)
+{
+        char buf[80];
+        if (snprintf(buf, sizeof buf, "%s_0", name) >= sizeof buf)
+                return NULL;
+        return platform_get_resource_byname(pdv, type, buf);
+}
+/* No hotplugging on the platform bus - use __init */
+static int __init iodev_probe(struct device *dev)
+{
+        struct platform_device * const pdv = to_platform_device(dev);
+        const struct resource * const ri =
+                iodev_get_resource(pdv, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ);
+        if (unlikely(!ri))
+                return -ENXIO;
+        iodev_irq = ri->start;
+        return misc_register(&miscdev);
+}
+static int __exit iodev_remove(struct device *dev)
+{
+        return misc_deregister(&miscdev);
+}
+static int iodev_open(struct inode *i, struct file *f)
+{
+        return request_irq(iodev_irq, iodev_irqhdl, SA_INTERRUPT,
+                           iodev_name, &miscdev);
+}
+static int iodev_release(struct inode *i, struct file *f)
+{
+        free_irq(iodev_irq, &miscdev);
+        return 0;
+}
+static ssize_t
+iodev_read(struct file *f, char __user *d, size_t s, loff_t *o)
+{
+        ssize_t ret;
+        DEFINE_WAIT(w);
+        prepare_to_wait(&wq, &w, TASK_INTERRUPTIBLE);
+        if (!signal_pending(current))
+                schedule();
+        ret = signal_pending(current) ? -ERESTARTSYS : 0;
+        finish_wait(&wq, &w);
+        return ret;
+}
+static unsigned int iodev_poll(struct file *f, struct poll_table_struct *p)
+{
+        poll_wait(f, &wq, p);
+        return POLLOUT | POLLWRNORM;
+}
+static irqreturn_t iodev_irqhdl(int irq, void *ctxt, struct pt_regs *regs)
+{
+        wake_up(&wq);
+        return IRQ_HANDLED;
+}
+static int __init iodev_init_module(void)
+{
+        return driver_register(&iodev_driver);
+}
+static void __exit iodev_cleanup_module(void)
+{
+        driver_unregister(&iodev_driver);
+}
+module_init(iodev_init_module);
+module_exit(iodev_cleanup_module);
+MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>");
+MODULE_DESCRIPTION("Basler eXcite i/o interrupt handler");
+MODULE_VERSION("0.0");
+MODULE_LICENSE("GPL");
diff --git a/arch/mips/basler/excite/excite_iodev.h b/arch/mips/basler/excite/excite_iodev.h
new file mode 100644
index 000000000000..cbfbb5d2ee62
--- /dev/null
+++ b/arch/mips/basler/excite/excite_iodev.h
@@ -0,0 +1,10 @@
+#ifndef __EXCITE_IODEV_H__
+#define __EXCITE_IODEV_H__
+/* Device name */
+#define IODEV_NAME              "iodev"
+/* Resource names */
+#define IODEV_RESOURCE_IRQ      "excite_iodev_irq"
+#endif /* __EXCITE_IODEV_H__ */
diff --git a/arch/mips/basler/excite/excite_irq.c b/arch/mips/basler/excite/excite_irq.c
new file mode 100644
index 000000000000..511ad8730f54
--- /dev/null
+++ b/arch/mips/basler/excite/excite_irq.c
@@ -0,0 +1,129 @@
+/*
+ *  Copyright (C) by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslereb.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/rm9k-ocd.h>
+#include <excite.h>
+extern asmlinkage void excite_handle_int(void);
+/*
+ * Initialize the interrupt handler
+ */
+void __init arch_init_irq(void)
+{
+        mips_cpu_irq_init(0);
+        rm7k_cpu_irq_init(8);
+        rm9k_cpu_irq_init(12);
+#ifdef CONFIG_KGDB
+        excite_kgdb_init();
+#endif
+}
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+        const u32
+                interrupts = read_c0_cause() >> 8,
+                mask = ((read_c0_status() >> 8) & 0x000000ff) |
+                       (read_c0_intcontrol() & 0x0000ff00),
+                pending = interrupts & mask;
+        u32 msgintflags, msgintmask, msgint;
+        /* process timer interrupt */
+        if (pending & (1 << TIMER_IRQ)) {
+                do_IRQ(TIMER_IRQ, regs);
+                return;
+        }
+        /* Process PCI interrupts */
+#if USB_IRQ < 10
+        msgintflags = ocd_readl(INTP0Status0 + (USB_MSGINT / 0x20 * 0x10));
+        msgintmask  = ocd_readl(INTP0Mask0 + (USB_MSGINT / 0x20 * 0x10));
+        msgint      = msgintflags & msgintmask & (0x1 << (USB_MSGINT % 0x20));
+        if ((pending & (1 << USB_IRQ)) && msgint) {
+#else
+        if (pending & (1 << USB_IRQ)) {
+#endif
+                do_IRQ(USB_IRQ, regs);
+                return;
+        }
+        /* Process TITAN interrupts */
+        msgintflags = ocd_readl(INTP0Status0 + (TITAN_MSGINT / 0x20 * 0x10));
+        msgintmask  = ocd_readl(INTP0Mask0 + (TITAN_MSGINT / 0x20 * 0x10));
+        msgint      = msgintflags & msgintmask & (0x1 << (TITAN_MSGINT % 0x20));
+        if ((pending & (1 << TITAN_IRQ)) && msgint) {
+                ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10));
+#if defined(CONFIG_KGDB)
+                excite_kgdb_inthdl(regs);
+#endif
+                do_IRQ(TITAN_IRQ, regs);
+                return;
+        }
+        /* Process FPGA line #0 interrupts */
+        msgintflags = ocd_readl(INTP0Status0 + (FPGA0_MSGINT / 0x20 * 0x10));
+        msgintmask  = ocd_readl(INTP0Mask0 + (FPGA0_MSGINT / 0x20 * 0x10));
+        msgint      = msgintflags & msgintmask & (0x1 << (FPGA0_MSGINT % 0x20));
+        if ((pending & (1 << FPGA0_IRQ)) && msgint) {
+                do_IRQ(FPGA0_IRQ, regs);
+                return;
+        }
+        /* Process FPGA line #1 interrupts */
+        msgintflags = ocd_readl(INTP0Status0 + (FPGA1_MSGINT / 0x20 * 0x10));
+        msgintmask  = ocd_readl(INTP0Mask0 + (FPGA1_MSGINT / 0x20 * 0x10));
+        msgint      = msgintflags & msgintmask & (0x1 << (FPGA1_MSGINT % 0x20));
+        if ((pending & (1 << FPGA1_IRQ)) && msgint) {
+                do_IRQ(FPGA1_IRQ, regs);
+                return;
+        }
+        /* Process PHY interrupts */
+        msgintflags = ocd_readl(INTP0Status0 + (PHY_MSGINT / 0x20 * 0x10));
+        msgintmask  = ocd_readl(INTP0Mask0 + (PHY_MSGINT / 0x20 * 0x10));
+        msgint      = msgintflags & msgintmask & (0x1 << (PHY_MSGINT % 0x20));
+        if ((pending & (1 << PHY_IRQ)) && msgint) {
+                do_IRQ(PHY_IRQ, regs);
+                return;
+        }
+        /* Process spurious interrupts */
+        spurious_interrupt(regs);
+}
diff --git a/arch/mips/basler/excite/excite_procfs.c b/arch/mips/basler/excite/excite_procfs.c
new file mode 100644
index 000000000000..c62be0341fb8
--- /dev/null
+++ b/arch/mips/basler/excite/excite_procfs.c
@@ -0,0 +1,81 @@
+/*
+ *  Copyright (C) 2004, 2005 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *
+ *  Procfs support for Basler eXcite
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/proc_fs.h>
+#include <linux/stat.h>
+#include <asm/page.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/rm9k-ocd.h>
+#include <excite.h>
+static int excite_get_unit_id(char *buf, char **addr, off_t offs, int size)
+{
+        const int len = snprintf(buf, PAGE_SIZE, "%06x", unit_id);
+        const int w = len - offs;
+        *addr = buf + offs;
+        return w < size ? w : size;
+}
+static int
+excite_bootrom_read(char *page, char **start, off_t off, int count,
+                  int *eof, void *data)
+{
+        void __iomem * src;
+        if (off >= EXCITE_SIZE_BOOTROM) {
+                *eof = 1;
+                return 0;
+        }
+        if ((off + count) > EXCITE_SIZE_BOOTROM)
+                count = EXCITE_SIZE_BOOTROM - off;
+        src = ioremap(EXCITE_PHYS_BOOTROM + off, count);
+        if (src) {
+                memcpy_fromio(page, src, count);
+                iounmap(src);
+                *start = page;
+        } else {
+                count = -ENOMEM;
+        }
+        return count;
+}
+void excite_procfs_init(void)
+{
+        /* Create & populate /proc/excite */
+        struct proc_dir_entry * const pdir = proc_mkdir("excite", &proc_root);
+        if (pdir) {
+                struct proc_dir_entry * e;
+                e = create_proc_info_entry("unit_id", S_IRUGO, pdir,
+                                           excite_get_unit_id);
+                if (e) e->size = 6;
+                e = create_proc_read_entry("bootrom", S_IRUGO, pdir,
+                                           excite_bootrom_read, NULL);
+                if (e) e->size = EXCITE_SIZE_BOOTROM;
+        }
+}
diff --git a/arch/mips/basler/excite/excite_prom.c b/arch/mips/basler/excite/excite_prom.c
new file mode 100644
index 000000000000..84724b270753
--- /dev/null
+++ b/arch/mips/basler/excite/excite_prom.c
@@ -0,0 +1,148 @@
+/*
+ *  Copyright (C) 2004, 2005 by Thomas Koeller (thomas.koeller@baslerweb.com)
+ *  Based on the PMC-Sierra Yosemite board support by Ralf Baechle and
+ *  Manish Lachwani.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/smp.h>
+#include <linux/module.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+#include <asm/bootinfo.h>
+#include <asm/string.h>
+#include <excite.h>
+/* This struct is used by Redboot to pass arguments to the kernel */
+typedef struct
+{
+        char *name;
+        char *val;
+} t_env_var;
+struct parmblock {
+        t_env_var memsize;
+        t_env_var modetty0;
+        t_env_var ethaddr;
+        t_env_var env_end;
+        char *argv[2];
+        char text[0];
+};
+static unsigned int prom_argc;
+static const char ** prom_argv;
+static const t_env_var * prom_env;
+static void prom_halt(void) __attribute__((noreturn));
+static void prom_exit(void) __attribute__((noreturn));
+const char *get_system_type(void)
+{
+        return "Basler eXcite";
+}
+/*
+ * Halt the system
+ */
+static void prom_halt(void)
+{
+        printk(KERN_NOTICE "\n** System halted.\n");
+        while (1)
+                asm volatile (
+                        "\t.set\tmips3\n"
+                        "\twait\n"
+                        "\t.set\tmips0\n"
+                );
+}
+/*
+ * Reset the CPU and re-enter Redboot
+ */
+static void prom_exit(void)
+{
+        unsigned int i;
+        volatile unsigned char * const flg =
+                (volatile unsigned char *) (EXCITE_ADDR_FPGA + EXCITE_FPGA_DPR);
+        /* Clear the watchdog reset flag, set the reboot flag */
+        *flg &= ~0x01;
+        *flg |= 0x80;
+        for (i = 0; i < 10; i++) {
+                *(volatile unsigned char *)  (EXCITE_ADDR_FPGA + EXCITE_FPGA_SYSCTL) = 0x02;
+                iob();
+                mdelay(1000);
+        }
+        printk(KERN_NOTICE "Reset failed\n");
+        prom_halt();
+}
+static const char __init *prom_getenv(char *name)
+{
+        const t_env_var * p;
+        for (p = prom_env; p->name != NULL; p++)
+                if(strcmp(name, p->name) == 0)
+                        break;
+        return p->val;
+}
+/*
+ * Init routine which accepts the variables from Redboot
+ */
+void __init prom_init(void)
+{
+        const struct parmblock * const pb = (struct parmblock *) fw_arg2;
+        prom_argc = fw_arg0;
+        prom_argv = (const char **) fw_arg1;
+        prom_env = &pb->memsize;
+        /* Callbacks for halt, restart */
+        _machine_restart = (void (*)(char *)) prom_exit;
+        _machine_halt = prom_halt;
+#ifdef CONFIG_32BIT
+        /* copy command line */
+        strcpy(arcs_cmdline, prom_argv[1]);
+        memsize = simple_strtol(prom_getenv("memsize"), NULL, 16);
+        strcpy(modetty, prom_getenv("modetty0"));
+#endif /* CONFIG_32BIT */
+#ifdef CONFIG_64BIT
+#       error 64 bit support not implemented
+#endif /* CONFIG_64BIT */
+        mips_machgroup = MACH_GROUP_TITAN;
+        mips_machtype = MACH_TITAN_EXCITE;
+}
+/* This is called from free_initmem(), so we need to provide it */
+void __init prom_free_prom_memory(void)
+{
+        /* Nothing to do */
+}
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
new file mode 100644
index 000000000000..005b025605e6
--- /dev/null
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -0,0 +1,307 @@
+/*
+ *  Copyright (C) 2004, 2005 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *  Based on the PMC-Sierra Yosemite board support by Ralf Baechle and
+ *  Manish Lachwani.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/tty.h>
+#include <linux/serial_core.h>
+#include <linux/serial.h>
+#include <linux/ioport.h>
+#include <linux/spinlock.h>
+#include <asm/bootinfo.h>
+#include <asm/mipsregs.h>
+#include <asm/pgtable-32.h>
+#include <asm/io.h>
+#include <asm/time.h>
+#include <asm/rm9k-ocd.h>
+#include <excite.h>
+#define TITAN_UART_CLK  25000000
+#if 1
+/* normal serial port assignment */
+#define REGBASE_SER0    0x0208
+#define REGBASE_SER1    0x0238
+#define MASK_SER0       0x1
+#define MASK_SER1       0x2
+#else
+/* serial ports swapped */
+#define REGBASE_SER0    0x0238
+#define REGBASE_SER1    0x0208
+#define MASK_SER0       0x2
+#define MASK_SER1       0x1
+#endif
+unsigned long memsize;
+char modetty[30];
+unsigned int titan_irq = TITAN_IRQ;
+static void __iomem * ctl_regs;
+u32 unit_id;
+volatile void __iomem * const ocd_base = (void *) (EXCITE_ADDR_OCD);
+volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN);
+/* Protect access to shared GPI registers */
+spinlock_t titan_lock = SPIN_LOCK_UNLOCKED;
+int titan_irqflags;
+static void excite_timer_init(void)
+{
+        const u32 modebit5 = ocd_readl(0x00e4);
+        unsigned int
+                mult = ((modebit5 >> 11) & 0x1f) + 2,
+                div = ((modebit5 >> 16) & 0x1f) + 2;
+        if (div == 33) div = 1;
+        mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2;
+}
+static void excite_timer_setup(struct irqaction *irq)
+{
+        /* The eXcite platform uses the alternate timer interrupt */
+        set_c0_intcontrol(0x80);
+        setup_irq(TIMER_IRQ, irq);
+}
+static int __init excite_init_console(void)
+{
+#if defined(CONFIG_SERIAL_8250)
+        static __initdata char serr[] =
+                KERN_ERR "Serial port #%u setup failed\n";
+        struct uart_port up;
+        /* Take the DUART out of reset */
+        titan_writel(0x00ff1cff, CPRR);
+#if defined(CONFIG_KGDB) || (CONFIG_SERIAL_8250_NR_UARTS > 1)
+        /* Enable both ports */
+        titan_writel(MASK_SER0 | MASK_SER1, UACFG);
+#else
+        /* Enable port #0 only */
+        titan_writel(MASK_SER0, UACFG);
+#endif  /* defined(CONFIG_KGDB) */
+        /*
+         * Set up serial port #0. Do not use autodetection; the result is
+         * not what we want.
+         */
+        memset(&up, 0, sizeof(up));
+        up.membase      = (char *) titan_addr(REGBASE_SER0);
+        up.irq          = TITAN_IRQ;
+        up.uartclk      = TITAN_UART_CLK;
+        up.regshift     = 0;
+        up.iotype       = UPIO_MEM32;
+        up.type         = PORT_RM9000;
+        up.flags        = UPF_SHARE_IRQ;
+        up.line         = 0;
+        if (early_serial_setup(&up))
+                printk(serr, up.line);
+#if CONFIG_SERIAL_8250_NR_UARTS > 1
+        /* And now for port #1. */
+        up.membase      = (char *) titan_addr(REGBASE_SER1);
+        up.line         = 1;
+        if (early_serial_setup(&up))
+                printk(serr, up.line);
+#endif /* CONFIG_SERIAL_8250_NR_UARTS > 1 */
+#else
+        /* Leave the DUART in reset */
+        titan_writel(0x00ff3cff, CPRR);
+#endif  /* defined(CONFIG_SERIAL_8250) */
+        return 0;
+}
+static int __init excite_platform_init(void)
+{
+        unsigned int i;
+        unsigned char buf[3];
+        u8 reg;
+        void __iomem * dpr;
+        /* BIU buffer allocations */
+        ocd_writel(8, CPURSLMT);        /* CPU */
+        titan_writel(4, CPGRWL);        /* GPI / Ethernet */
+        /* Map control registers located in FPGA */
+        ctl_regs = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_SYSCTL, 16);
+        if (!ctl_regs)
+                panic("eXcite: failed to map platform control registers\n");
+        memcpy_fromio(buf, ctl_regs + 2, ARRAY_SIZE(buf));
+        unit_id = buf[0] | (buf[1] << 8) | (buf[2] << 16);
+        /* Clear the reboot flag */
+        dpr = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_DPR, 1);
+        reg = __raw_readb(dpr);
+        __raw_writeb(reg & 0x7f, dpr);
+        iounmap(dpr);
+        /* Interrupt controller setup */
+        for (i = INTP0Status0; i < INTP0Status0 + 0x80; i += 0x10) {
+                ocd_writel(0x00000000, i + 0x04);
+                ocd_writel(0xffffffff, i + 0x0c);
+        }
+        ocd_writel(0x2, NMICONFIG);
+        ocd_writel(0x1 << (TITAN_MSGINT % 0x20),
+                   INTP0Mask0 + (0x10 * (TITAN_MSGINT / 0x20)));
+        ocd_writel((0x1 << (FPGA0_MSGINT % 0x20))
+                   | ocd_readl(INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20))),
+                   INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20)));
+        ocd_writel((0x1 << (FPGA1_MSGINT % 0x20))
+                   | ocd_readl(INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20))),
+                   INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20)));
+        ocd_writel((0x1 << (PHY_MSGINT % 0x20))
+                   | ocd_readl(INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20))),
+                   INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20)));
+#if USB_IRQ < 10
+        ocd_writel((0x1 << (USB_MSGINT % 0x20))
+                   | ocd_readl(INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20))),
+                   INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20)));
+#endif
+        /* Enable the packet FIFO, XDMA and XDMA arbiter */
+        titan_writel(0x00ff18ff, CPRR);
+        /*
+         * Set up the PADMUX. Power down all ethernet slices,
+         * they will be powered up and configured at device startup.
+         */
+        titan_writel(0x00878206, CPTC1R);
+        titan_writel(0x00001100, CPTC0R); /* latch PADMUX, enable WCIMODE */
+        /* Reset and enable the FIFO block */
+        titan_writel(0x00000001, SDRXFCIE);
+        titan_writel(0x00000001, SDTXFCIE);
+        titan_writel(0x00000100, SDRXFCIE);
+        titan_writel(0x00000000, SDTXFCIE);
+        /*
+         * Initialize the common interrupt shared by all components of
+         * the GPI/Ethernet subsystem.
+         */
+        titan_writel((EXCITE_PHYS_OCD >> 12), CPCFG0);
+        titan_writel(TITAN_MSGINT, CPCFG1);
+        /*
+         * XDMA configuration.
+         * In order for the XDMA to be sharable among multiple drivers,
+         * the setup must be done here in the platform. The reason is that
+         * this setup can only be done while the XDMA is in reset. If this
+         * were done in a driver, it would interrupt all other drivers
+         * using the XDMA.
+         */
+        titan_writel(0x80021dff, GXCFG);        /* XDMA reset */
+        titan_writel(0x00000000, CPXCISRA);
+        titan_writel(0x00000000, CPXCISRB);     /* clear pending interrupts */
+#if defined (CONFIG_HIGHMEM)
+#       error change for HIGHMEM support!
+#else
+        titan_writel(0x00000000, GXDMADRPFX);   /* buffer address prefix */
+#endif
+        titan_writel(0, GXDMA_DESCADR);
+        for (i = 0x5040; i <= 0x5300; i += 0x0040)
+                titan_writel(0x80080000, i);    /* reset channel */
+        titan_writel((0x1 << 29)                        /* no sparse tx descr. */
+                     | (0x1 << 28)                      /* no sparse rx descr. */
+                     | (0x1 << 23) | (0x1 << 24)        /* descriptor coherency */
+                     | (0x1 << 21) | (0x1 << 22)        /* data coherency */
+                     | (0x1 << 17)
+                     | 0x1dff,
+                     GXCFG);
+#if defined(CONFIG_SMP)
+#       error No SMP support
+#else
+        /* All interrupts go to core #0 only. */
+        titan_writel(0x1f007fff, CPDST0A);
+        titan_writel(0x00000000, CPDST0B);
+        titan_writel(0x0000ff3f, CPDST1A);
+        titan_writel(0x00000000, CPDST1B);
+        titan_writel(0x00ffffff, CPXDSTA);
+        titan_writel(0x00000000, CPXDSTB);
+#endif
+        /* Enable DUART interrupts, disable everything else. */
+        titan_writel(0x04000000, CPGIG0ER);
+        titan_writel(0x000000c0, CPGIG1ER);
+        excite_procfs_init();
+        return 0;
+}
+void __init plat_setup(void)
+{
+        volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000;
+        /* Announce RAM to system */
+        add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
+        /* Set up timer initialization hooks */
+        board_time_init = excite_timer_init;
+        board_timer_setup = excite_timer_setup;
+        /* Set up the peripheral address map */
+        *(boot_ocd_base + (LKB9 / sizeof (u32))) = 0;
+        *(boot_ocd_base + (LKB10 / sizeof (u32))) = 0;
+        *(boot_ocd_base + (LKB11 / sizeof (u32))) = 0;
+        *(boot_ocd_base + (LKB12 / sizeof (u32))) = 0;
+        wmb();
+        *(boot_ocd_base + (LKB0 / sizeof (u32))) = EXCITE_PHYS_OCD >> 4;
+        wmb();
+        ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5);
+        ocd_writel(((EXCITE_SIZE_TITAN >> 4) & 0x7fffff00) - 0x100, LKM5);
+        ocd_writel((EXCITE_PHYS_SCRAM >> 4) | 0x1UL, LKB13);
+        ocd_writel(((EXCITE_SIZE_SCRAM >> 4) & 0xffffff00) - 0x100, LKM13);
+        /* Local bus slot #0 */
+        ocd_writel(0x00040510, LDP0);
+        ocd_writel((EXCITE_PHYS_BOOTROM >> 4) | 0x1UL, LKB9);
+        ocd_writel(((EXCITE_SIZE_BOOTROM >> 4) & 0x03ffff00) - 0x100, LKM9);
+        /* Local bus slot #2 */
+        ocd_writel(0x00000330, LDP2);
+        ocd_writel((EXCITE_PHYS_FPGA >> 4) | 0x1, LKB11);
+        ocd_writel(((EXCITE_SIZE_FPGA >> 4) - 0x100) & 0x03ffff00, LKM11);
+        /* Local bus slot #3 */
+        ocd_writel(0x00123413, LDP3);
+        ocd_writel((EXCITE_PHYS_NAND >> 4) | 0x1, LKB12);
+        ocd_writel(((EXCITE_SIZE_NAND >> 4) - 0x100) & 0x03ffff00, LKM12);
+}
+console_initcall(excite_init_console);
+arch_initcall(excite_platform_init);
+EXPORT_SYMBOL(titan_lock);
+EXPORT_SYMBOL(titan_irqflags);
+EXPORT_SYMBOL(titan_irq);
+EXPORT_SYMBOL(ocd_base);
+EXPORT_SYMBOL(titan_base);
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index 45c2d27c7564..300797d5f558 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -41,3 +41,8 @@ void __init cobalt_early_console(void)
        printk("Cobalt: early console registered\n");
 }
+void __init disable_early_printk(void)
+{
+        unregister_console(&cons_info);
+}
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 4f9ea1210023..ca719d6398bd 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -68,19 +68,46 @@ static void __init cobalt_timer_setup(struct irqaction *irq)
 extern struct pci_ops gt64111_pci_ops;
 static struct resource cobalt_mem_resource = {
-        "PCI memory", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM
+        .start  = GT64111_MEM_BASE,
+        .end    = GT64111_MEM_END,
+        .name   = "PCI memory",
+        .flags  = IORESOURCE_MEM
 };
 static struct resource cobalt_io_resource = {
-        "PCI I/O", 0x1000, 0xffff, IORESOURCE_IO
+        .start  = 0x1000,
+        .end    = 0xffff,
+        .name   = "PCI I/O",
+        .flags  = IORESOURCE_IO
 };
 static struct resource cobalt_io_resources[] = {
-        { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
+        {
-        { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+                .start  = 0x00,
-        { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
+                .end    = 0x1f,
-        { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
+                .name   = "dma1",
-        { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x40,
+                .end    = 0x5f,
+                .name   = "timer",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x60,
+                .end    = 0x6f,
+                .name   = "keyboard",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x80,
+                .end    = 0x8f,
+                .name   = "dma page reg",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0xc0,
+                .end    = 0xdf,
+                .name   = "dma2",
+                .flags  = IORESOURCE_BUSY
+        },
 };
 #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
@@ -93,7 +120,7 @@ static struct pci_controller cobalt_pci_controller = {
        .io_offset      = 0 - GT64111_IO_BASE
 };
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        static struct uart_port uart;
        unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
index 4b080bcb258f..0cc1b3c51959 100644
--- a/arch/mips/configs/atlas_defconfig
+++ b/arch/mips/configs/atlas_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_ATLAS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -143,6 +141,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+CONFIG_HZ_100=y
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=100
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index d85cda58d650..dabf90a94b21 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -145,6 +143,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_SMP=y
 CONFIG_NR_CPUS=4
 CONFIG_PREEMPT_NONE=y
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index ca0af1683a00..aeb7be804799 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
 # CONFIG_PMC_YOSEMITE is not set
@@ -132,6 +130,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index 7d269e609282..d680d3e17112 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_COBALT=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -129,6 +127,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 579b665e3339..6a7aa401462f 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_DB1000=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index e5eb53867422..5c2da563e528 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_DB1100=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index a43fb2329fd5..85ef90ce0944 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_DB1200=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index ad632d87c4ef..6f757d8a5a6c 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_DB1500=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -132,6 +130,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 8130e23dc255..da4c7e811bef 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_DB1550=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -131,6 +129,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig
index 8c911b671415..c1c6bfee970e 100644
--- a/arch/mips/configs/ddb5477_defconfig
+++ b/arch/mips/configs/ddb5477_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 CONFIG_DDB5477=y
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -129,6 +127,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index d838496e114f..d5d0d3faae94 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -41,8 +41,6 @@ CONFIG_MACH_DECSTATION=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -128,6 +126,17 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_128=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_128HZ=y
+CONFIG_SYS_SUPPORTS_256HZ=y
+CONFIG_SYS_SUPPORTS_1024HZ=y
+CONFIG_HZ=128
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 0760f4318910..439677ba751c 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig
new file mode 100644
index 000000000000..01f29f44f3e8
--- /dev/null
+++ b/arch/mips/configs/emma2rh_defconfig
@@ -0,0 +1,1207 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17
+# Sun Jun 18 13:46:53 2006
+#
+CONFIG_MIPS=y
+#
+# Machine selection
+#
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_PB1550 is not set
+# CONFIG_MIPS_PB1200 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_DB1550 is not set
+# CONFIG_MIPS_DB1200 is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_WR_PPMC is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_PNX8550_V2PCI is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_QEMU is not set
+CONFIG_MARKEINS=y
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_PTSWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_TOSHIBA_RBTX4938 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_EMMA2RH=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+CONFIG_CPU_R5000=y
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_SYS_HAS_CPU_R5000=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMTC is not set
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_VPE_LOADER is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_BKL=y
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+CONFIG_OBSOLETE_INTERMODULE=y
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+#
+# Block layer
+#
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+CONFIG_PCI=y
+CONFIG_MMU=y
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+#
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_FWMARK is not set
+CONFIG_IP_ROUTE_MULTIPATH=y
+# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_IPV6_TUNNEL is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_QUEUE is not set
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP6_NF_QUEUE is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x1e000000
+CONFIG_MTD_PHYSMAP_LEN=0x02000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+# CONFIG_SCSI_PROC_FS is not set
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_DM9000 is not set
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+CONFIG_NATSEMI=y
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_RTC=m
+CONFIG_GEN_RTC=m
+CONFIG_GEN_RTC_X=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+CONFIG_I2C_DEBUG_CORE=y
+# CONFIG_I2C_DEBUG_ALGO is not set
+CONFIG_I2C_DEBUG_BUS=y
+# CONFIG_I2C_DEBUG_CHIP is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+#
+# Misc devices
+#
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+#
+# LED drivers
+#
+#
+# LED Triggers
+#
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+#
+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+#
+#
+# Real Time Clock
+#
+# CONFIG_RTC_CLASS is not set
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+CONFIG_XFS_EXPORT=y
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_SECURITY is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=m
+# CONFIG_FUSE_FS is not set
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_RW is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_NFS_DIRECTIO=y
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT=""
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_FS is not set
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE="console=ttyS0,115200 mem=192m ip=bootp root=/dev/nfs rw"
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig
index 7067f608b22c..5248a1d8131d 100644
--- a/arch/mips/configs/ev64120_defconfig
+++ b/arch/mips/configs/ev64120_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_EV64120=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -131,6 +129,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig
index 00b56ed0e638..4858491ce669 100644
--- a/arch/mips/configs/ev96100_defconfig
+++ b/arch/mips/configs/ev96100_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_EV96100=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -135,6 +133,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig
new file mode 100644
index 000000000000..f2ce64cb41a8
--- /dev/null
+++ b/arch/mips/configs/excite_defconfig
@@ -0,0 +1,1220 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.16-rc4
+# Thu Feb 23 13:15:27 2006
+#
+CONFIG_MIPS=y
+#
+# Machine selection
+#
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_PB1550 is not set
+# CONFIG_MIPS_PB1200 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_DB1550 is not set
+# CONFIG_MIPS_DB1200 is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_PNX8550_V2PCI is not set
+# CONFIG_PNX8550_JBS is not set
+CONFIG_BASLER_EXCITE=y
+# CONFIG_BASLER_EXCITE_PROTOTYPE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_QEMU is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_PTSWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+# CONFIG_TOSHIBA_RBTX4938 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_DMA_COHERENT=y
+CONFIG_SERIAL_RM9000=y
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_CPU_RM7K=y
+CONFIG_IRQ_CPU_RM9K=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+CONFIG_CPU_RM9000=y
+# CONFIG_CPU_SB1 is not set
+CONFIG_SYS_HAS_CPU_RM9000=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_MIPS_MT is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_BKL=y
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+#
+# Block layer
+#
+# CONFIG_LBD is not set
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+CONFIG_PCI=y
+# CONFIG_PCI_LEGACY_PROC is not set
+CONFIG_MMU=y
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+#
+# Networking
+#
+CONFIG_NET=y
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+#
+# Device Drivers
+#
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+CONFIG_MTD_NAND_BASLER_EXCITE=y
+# CONFIG_MTD_NAND_BASLER_EXCITE_RDNBY is not set
+# CONFIG_MTD_NAND_BASLER_EXCITE_PERF is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+#
+# Plug and Play support
+#
+#
+# Block devices
+#
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_BLK_DEV_RAM_COUNT=16
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+#
+# PHY device support
+#
+#
+# Ethernet (10 or 100Mbit)
+#
+# CONFIG_NET_ETHERNET is not set
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_TITAN_GE is not set
+CONFIG_RM9K_GE=m
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+#
+# Input device support
+#
+CONFIG_INPUT=y
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_WDT_RM9K_GPI=m
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+#
+# Misc devices
+#
+#
+# Multimedia Capabilities Port drivers
+#
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+#
+# Graphics support
+#
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON_OLD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_SMIVGX is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_FB_DD=y
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=m
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+#
+# Logo configuration
+#
+# CONFIG_LOGO is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_LIBUSUAL is not set
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_ITMTOUCH is not set
+# CONFIG_USB_EGALAX is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+#
+# USB Multimedia devices
+#
+# CONFIG_USB_DABUSB is not set
+#
+# Video4Linux support is needed for USB Multimedia device support
+#
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_MON is not set
+#
+# USB port drivers
+#
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+CONFIG_USB_ARTTFT=m
+# CONFIG_USB_ARTTOUCH is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TEST is not set
+#
+# USB DSL modem support
+#
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+#
+# SN Devices
+#
+#
+# EDAC - error detection and reporting (RAS)
+#
+#
+# eXcite frame capture support
+#
+CONFIG_EXCITE_FCAP=m
+CONFIG_EXCITE_FCAP_GPI=m
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
+# CONFIG_CONFIGFS_FS is not set
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=m
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+#
+# Hardware crypto devices
+#
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 607e2985ffe3..879ba1ad99ca 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -136,6 +134,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index f724b4b2ecf2..bb1426806430 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -63,7 +61,7 @@ CONFIG_SGI_IP27=y
 # CONFIG_TOSHIBA_JMR3927 is not set
 # CONFIG_TOSHIBA_RBTX4927 is not set
 # CONFIG_TOSHIBA_RBTX4938 is not set
-# CONFIG_SGI_SN0_N_MODE is not set
+# CONFIG_SGI_SN_N_MODE is not set
 CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
 CONFIG_NUMA=y
 # CONFIG_MAPPED_KERNEL is not set
@@ -135,6 +133,15 @@ CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_NEED_MULTIPLE_NODES=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_MIGRATION=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=64
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 8f11d3565b2d..31b3c92a3841 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -136,6 +134,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
index 757adf23853d..809bae9013ac 100644
--- a/arch/mips/configs/it8172_defconfig
+++ b/arch/mips/configs/it8172_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_ITE8172=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
index 021761a8a237..55108fd67844 100644
--- a/arch/mips/configs/ivr_defconfig
+++ b/arch/mips/configs/ivr_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_IVR=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -127,6 +125,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig
index 08f6c30b0abc..ef2843436057 100644
--- a/arch/mips/configs/jaguar-atx_defconfig
+++ b/arch/mips/configs/jaguar-atx_defconfig
@@ -41,8 +41,6 @@ CONFIG_MOMENCO_JAGUAR_ATX=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -136,6 +134,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 # CONFIG_SMP is not set
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 38b1e026e10d..5ef5a08289a5 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -125,6 +123,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig
index 4d25990a0a05..eabcff26fc0e 100644
--- a/arch/mips/configs/lasat200_defconfig
+++ b/arch/mips/configs/lasat200_defconfig
@@ -41,8 +41,6 @@ CONFIG_LASAT=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -134,6 +132,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 977f52be51dc..b73cff0d83ca 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_MALTA=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -154,6 +152,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+CONFIG_HZ_100=y
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=100
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 00560e0143f1..8dd27b55413d 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_SIM=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -138,6 +136,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 286a018375b2..5d6ff3c352c9 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
 # CONFIG_PMC_YOSEMITE is not set
@@ -132,6 +130,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig
index 1ce4310fd92a..fe5e3dd915f5 100644
--- a/arch/mips/configs/ocelot_3_defconfig
+++ b/arch/mips/configs/ocelot_3_defconfig
@@ -41,8 +41,6 @@ CONFIG_MOMENCO_OCELOT_3=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -136,6 +134,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 # CONFIG_SMP is not set
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig
index 8a6aa5012f89..f4a33ce47e50 100644
--- a/arch/mips/configs/ocelot_c_defconfig
+++ b/arch/mips/configs/ocelot_c_defconfig
@@ -41,8 +41,6 @@ CONFIG_MOMENCO_OCELOT_C=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -133,6 +131,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig
index f9ee35eeb762..21dea9549feb 100644
--- a/arch/mips/configs/ocelot_defconfig
+++ b/arch/mips/configs/ocelot_defconfig
@@ -41,8 +41,6 @@ CONFIG_MOMENCO_OCELOT=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -137,6 +135,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig
index b48bdee2411f..c63b1ca8c8b3 100644
--- a/arch/mips/configs/ocelot_g_defconfig
+++ b/arch/mips/configs/ocelot_g_defconfig
@@ -41,8 +41,6 @@ CONFIG_MOMENCO_OCELOT_G=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -136,6 +134,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 01aac40634b4..6f5c7261e9de 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_PB1100=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -132,6 +130,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index 398c3c265b9f..5676f3747fd5 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_PB1500=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -131,6 +129,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index ea282a53bb66..a1c479fa613b 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_PB1550=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -131,6 +129,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 4c57e564db0b..b2d991b80309 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 CONFIG_PNX8550_JBS=y
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
index 3c8f35162fec..fe092ac92e89 100644
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ b/arch/mips/configs/pnx8550-v2pci_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 CONFIG_PNX8550_V2PCI=y
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig
index 4bcc01dea041..db8701344cee 100644
--- a/arch/mips/configs/qemu_defconfig
+++ b/arch/mips/configs/qemu_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -128,6 +126,15 @@ CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_SMP is not set
+# CONFIG_HZ_48 is not set
+CONFIG_HZ_100=y
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=100
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
index 3d441932e43a..b16731f3684b 100644
--- a/arch/mips/configs/rbhma4500_defconfig
+++ b/arch/mips/configs/rbhma4500_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -138,6 +136,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index edfb9679a25a..8b0dd8651264 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -138,6 +136,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index e388a3dae0a9..ff34ed66fe65 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -149,6 +147,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_PREEMPT_NONE=y
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
index 6b8a6a416a25..77edeae7f018 100644
--- a/arch/mips/configs/sead_defconfig
+++ b/arch/mips/configs/sead_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS_SEAD=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -134,6 +132,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index dba0bdcdcf29..6aa229d54851 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
 # CONFIG_PMC_YOSEMITE is not set
@@ -134,6 +132,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig
index 5a924c1a5803..a187b1f0004c 100644
--- a/arch/mips/configs/tb0229_defconfig
+++ b/arch/mips/configs/tb0229_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
 # CONFIG_PMC_YOSEMITE is not set
@@ -134,6 +132,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index 9f215ea350dc..258457fcbe11 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
 # CONFIG_PMC_YOSEMITE is not set
@@ -135,6 +133,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index ac7765eb8da7..68af54f746e1 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 CONFIG_MACH_VR41XX=y
 # CONFIG_PMC_YOSEMITE is not set
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/wrppmc_defconfig
index 8d88ac1bbfeb..40572a3c8cac 100644
--- a/arch/mips/configs/ddb5476_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.17-rc2
+# Linux kernel version: 2.6.16.11
-# Mon Apr 24 14:51:00 2006
+# Fri May  5 17:11:22 2006
 #
 CONFIG_MIPS=y
@@ -32,6 +32,7 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_ATLAS is not set
 # CONFIG_MIPS_MALTA is not set
 # CONFIG_MIPS_SEAD is not set
+CONFIG_WR_PPMC=y
 # CONFIG_MIPS_SIM is not set
 # CONFIG_MOMENCO_JAGUAR_ATX is not set
 # CONFIG_MOMENCO_OCELOT is not set
@@ -41,8 +42,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-CONFIG_DDB5476=y
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -64,24 +63,23 @@ CONFIG_DDB5476=y
 # CONFIG_TOSHIBA_RBTX4927 is not set
 # CONFIG_TOSHIBA_RBTX4938 is not set
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_DMA_NONCOHERENT=y
 CONFIG_DMA_NEED_PCI_MAP_STATE=y
-CONFIG_I8259=y
+CONFIG_CPU_BIG_ENDIAN=y
-# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
 CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
 CONFIG_IRQ_CPU=y
-CONFIG_DDB5XXX_COMMON=y
+CONFIG_MIPS_GT64120=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
 CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_HAVE_STD_PC_SERIAL_PORT=y
 #
 # CPU selection
 #
-# CONFIG_CPU_MIPS32_R1 is not set
+CONFIG_CPU_MIPS32_R1=y
 # CONFIG_CPU_MIPS32_R2 is not set
 # CONFIG_CPU_MIPS64_R1 is not set
 # CONFIG_CPU_MIPS64_R2 is not set
@@ -92,7 +90,7 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y
 # CONFIG_CPU_R4X00 is not set
 # CONFIG_CPU_TX49XX is not set
 # CONFIG_CPU_R5000 is not set
-CONFIG_CPU_R5432=y
+# CONFIG_CPU_R5432 is not set
 # CONFIG_CPU_R6000 is not set
 # CONFIG_CPU_NEVADA is not set
 # CONFIG_CPU_R8000 is not set
@@ -100,11 +98,16 @@ CONFIG_CPU_R5432=y
 # CONFIG_CPU_RM7000 is not set
 # CONFIG_CPU_RM9000 is not set
 # CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_R5432=y
+CONFIG_SYS_HAS_CPU_MIPS32_R1=y
+CONFIG_SYS_HAS_CPU_MIPS32_R2=y
+CONFIG_SYS_HAS_CPU_MIPS64_R1=y
+CONFIG_SYS_HAS_CPU_NEVADA=y
+CONFIG_SYS_HAS_CPU_RM7000=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_MIPSR1=y
 CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
 CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
 #
 # Kernel type
@@ -115,11 +118,15 @@ CONFIG_PAGE_SIZE_4KB=y
 # CONFIG_PAGE_SIZE_8KB is not set
 # CONFIG_PAGE_SIZE_16KB is not set
 # CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
 # CONFIG_MIPS_MT is not set
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
 CONFIG_CPU_HAS_LLSC=y
 CONFIG_CPU_HAS_SYNC=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -129,6 +136,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
@@ -145,27 +161,31 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 #
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
+# CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
 CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
 # CONFIG_IKCONFIG is not set
-CONFIG_RELAY=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_EPOLL=y
+# CONFIG_EPOLL is not set
 CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
 CONFIG_SLAB=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
@@ -174,14 +194,18 @@ CONFIG_BASE_SMALL=0
 #
 # Loadable module support
 #
-# CONFIG_MODULES is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+# CONFIG_KMOD is not set
 #
 # Block layer
 #
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 #
 # IO Schedulers
@@ -201,7 +225,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
 #
 CONFIG_HW_HAS_PCI=y
 CONFIG_PCI=y
-CONFIG_ISA=y
+CONFIG_PCI_LEGACY_PROC=y
 CONFIG_MMU=y
 #
@@ -212,13 +236,16 @@ CONFIG_MMU=y
 #
 # PCI Hotplug Support
 #
-# CONFIG_HOTPLUG_PCI is not set
+CONFIG_HOTPLUG_PCI=y
+# CONFIG_HOTPLUG_PCI_FAKE is not set
+# CONFIG_HOTPLUG_PCI_CPCI is not set
+# CONFIG_HOTPLUG_PCI_SHPC is not set
 #
 # Executable file formats
 #
 CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
+CONFIG_BINFMT_MISC=y
 CONFIG_TRAD_SIGNALS=y
 #
@@ -231,35 +258,33 @@ CONFIG_NET=y
 #
 # CONFIG_NETDEBUG is not set
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
+CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
-CONFIG_XFRM=y
+# CONFIG_NET_KEY is not set
-CONFIG_XFRM_USER=y
-CONFIG_NET_KEY=y
 CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_MULTICAST=y
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
+CONFIG_IP_PNP_RARP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
+CONFIG_IP_MROUTE=y
+# CONFIG_IP_PIMSM_V1 is not set
+# CONFIG_IP_PIMSM_V2 is not set
+CONFIG_ARPD=y
 # CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETFILTER is not set
 #
@@ -301,13 +326,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
-CONFIG_IEEE80211=y
+# CONFIG_IEEE80211 is not set
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=y
-CONFIG_IEEE80211_CRYPT_CCMP=y
-CONFIG_IEEE80211_SOFTMAC=y
-# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
-CONFIG_WIRELESS_EXT=y
 #
 # Device Drivers
@@ -318,13 +337,12 @@ CONFIG_WIRELESS_EXT=y
 #
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
+# CONFIG_FW_LOADER is not set
 #
 # Connector - unified userspace <-> kernelspace linker
 #
-CONFIG_CONNECTOR=y
+# CONFIG_CONNECTOR is not set
-CONFIG_PROC_EVENTS=y
 #
 # Memory Technology Devices (MTD)
@@ -339,7 +357,6 @@ CONFIG_PROC_EVENTS=y
 #
 # Plug and Play support
 #
-# CONFIG_PNP is not set
 #
 # Block devices
@@ -352,53 +369,25 @@ CONFIG_PROC_EVENTS=y
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_RAM is not set
+CONFIG_BLK_DEV_RAM=y
-# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_CDROM_PKTCDVD=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_CDROM_PKTCDVD_BUFFERS=8
+CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+# CONFIG_CDROM_PKTCDVD is not set
-CONFIG_ATA_OVER_ETH=y
+# CONFIG_ATA_OVER_ETH is not set
 #
 # ATA/ATAPI/MFM/RLL support
 #
-CONFIG_IDE=y
+# CONFIG_IDE is not set
-CONFIG_BLK_DEV_IDE=y
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_IDE_ARM is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
 #
 # SCSI device support
 #
-CONFIG_RAID_ATTRS=y
+# CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
 #
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-#
 # Multi-device support (RAID and LVM)
 #
 # CONFIG_MD is not set
@@ -440,34 +429,48 @@ CONFIG_PHYLIB=y
 #
 # MII PHY device drivers
 #
-CONFIG_MARVELL_PHY=y
+# CONFIG_MARVELL_PHY is not set
-CONFIG_DAVICOM_PHY=y
+# CONFIG_DAVICOM_PHY is not set
-CONFIG_QSEMI_PHY=y
+# CONFIG_QSEMI_PHY is not set
-CONFIG_LXT_PHY=y
+# CONFIG_LXT_PHY is not set
-CONFIG_CICADA_PHY=y
+# CONFIG_CICADA_PHY is not set
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
+CONFIG_MII=y
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNGEM is not set
 # CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NET_VENDOR_SMC is not set
 # CONFIG_DM9000 is not set
-# CONFIG_NET_VENDOR_RACAL is not set
 #
 # Tulip family network device support
 #
 # CONFIG_NET_TULIP is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
 # CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
-# CONFIG_NET_PCI is not set
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
 #
 # Ethernet (1000 Mbit)
@@ -483,6 +486,7 @@ CONFIG_NET_ETHERNET=y
 # CONFIG_SKGE is not set
 # CONFIG_SKY2 is not set
 # CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
@@ -529,46 +533,18 @@ CONFIG_NET_ETHERNET=y
 #
 # Input device support
 #
-CONFIG_INPUT=y
+# CONFIG_INPUT is not set
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
 #
 # Hardware I/O ports
 #
-CONFIG_SERIO=y
+# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_LIBPS2 is not set
-CONFIG_SERIO_RAW=y
 # CONFIG_GAMEPORT is not set
 #
 # Character devices
 #
-CONFIG_VT=y
+# CONFIG_VT is not set
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
 # CONFIG_SERIAL_NONSTANDARD is not set
 #
@@ -576,9 +552,8 @@ CONFIG_HW_CONSOLE=y
 #
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=1
-CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
 # CONFIG_SERIAL_8250_EXTENDED is not set
 #
@@ -600,8 +575,7 @@ CONFIG_LEGACY_PTY_COUNT=256
 # Watchdog Cards
 #
 # CONFIG_WATCHDOG is not set
-# CONFIG_RTC is not set
+CONFIG_RTC=y
-# CONFIG_GEN_RTC is not set
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
@@ -637,14 +611,20 @@ CONFIG_LEGACY_PTY_COUNT=256
 #
 # Hardware Monitoring support
 #
-# CONFIG_HWMON is not set
+CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
 #
 # Misc devices
 #
 #
+# Multimedia Capabilities Port drivers
+#
+#
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
@@ -657,49 +637,7 @@ CONFIG_LEGACY_PTY_COUNT=256
 #
 # Graphics support
 #
-CONFIG_FB=y
+# CONFIG_FB is not set
-# CONFIG_FB_CFB_FILLRECT is not set
-# CONFIG_FB_CFB_COPYAREA is not set
-# CONFIG_FB_CFB_IMAGEBLIT is not set
-# CONFIG_FB_MACMODES is not set
-CONFIG_FB_FIRMWARE_EDID=y
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-# CONFIG_FB_CIRRUS is not set
-# CONFIG_FB_PM2 is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_ASILIANT is not set
-# CONFIG_FB_IMSTT is not set
-# CONFIG_FB_S1D13XXX is not set
-# CONFIG_FB_NVIDIA is not set
-# CONFIG_FB_RIVA is not set
-# CONFIG_FB_MATROX is not set
-# CONFIG_FB_RADEON is not set
-# CONFIG_FB_ATY128 is not set
-# CONFIG_FB_ATY is not set
-# CONFIG_FB_SAVAGE is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_KYRO is not set
-# CONFIG_FB_3DFX is not set
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_SMIVGX is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_VIRTUAL is not set
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE is not set
-#
-# Logo configuration
-#
-# CONFIG_LOGO is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 #
 # Sound
@@ -711,7 +649,6 @@ CONFIG_DUMMY_CONSOLE=y
 #
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB_ARCH_HAS_EHCI=y
 # CONFIG_USB is not set
 #
@@ -729,19 +666,6 @@ CONFIG_USB_ARCH_HAS_EHCI=y
 # CONFIG_MMC is not set
 #
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-#
-# LED drivers
-#
-#
-# LED Triggers
-#
-#
 # InfiniBand support
 #
 # CONFIG_INFINIBAND is not set
@@ -751,16 +675,9 @@ CONFIG_USB_ARCH_HAS_EHCI=y
 #
 #
-# Real Time Clock
-#
-# CONFIG_RTC_CLASS is not set
-#
 # File systems
 #
-CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS is not set
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
 # CONFIG_EXT3_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
@@ -774,7 +691,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
-CONFIG_FUSE_FS=y
+# CONFIG_FUSE_FS is not set
 #
 # CD-ROM/DVD Filesystems
@@ -795,9 +712,10 @@ CONFIG_FUSE_FS=y
 CONFIG_PROC_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
+CONFIG_TMPFS=y
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 # CONFIG_CONFIGFS_FS is not set
 #
@@ -821,12 +739,14 @@ CONFIG_RAMFS=y
 # Network File Systems
 #
 CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
 # CONFIG_NFS_DIRECTIO is not set
 # CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 # CONFIG_RPCSEC_GSS_KRB5 is not set
@@ -861,46 +781,19 @@ CONFIG_MSDOS_PARTITION=y
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_DEBUG_KERNEL is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_DEBUG_FS is not set
-# CONFIG_UNWIND_INFO is not set
 CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE="ip=any"
+CONFIG_CMDLINE="console=ttyS0,115200n8"
 #
 # Security options
 #
-CONFIG_KEYS=y
+# CONFIG_KEYS is not set
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
 # CONFIG_SECURITY is not set
 #
 # Cryptographic options
 #
-CONFIG_CRYPTO=y
+# CONFIG_CRYPTO is not set
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_WP512=y
-CONFIG_CRYPTO_TGR192=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_CAST5=y
-CONFIG_CRYPTO_CAST6=y
-CONFIG_CRYPTO_TEA=y
-CONFIG_CRYPTO_ARC4=y
-CONFIG_CRYPTO_KHAZAD=y
-CONFIG_CRYPTO_ANUBIS=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=y
-# CONFIG_CRYPTO_TEST is not set
 #
 # Hardware crypto devices
@@ -909,9 +802,7 @@ CONFIG_CRYPTO_CRC32C=y
 #
 # Library routines
 #
-# CONFIG_CRC_CCITT is not set
+CONFIG_CRC_CCITT=y
 CONFIG_CRC16=y
 CONFIG_CRC32=y
 CONFIG_LIBCRC32C=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index b52d709de962..7ece2c008e9b 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 CONFIG_PMC_YOSEMITE=y
@@ -130,6 +128,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_PREEMPT_NONE=y
diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c
index b8d1f7489f3b..00c62c1c28a3 100644
--- a/arch/mips/ddb5xxx/common/prom.c
+++ b/arch/mips/ddb5xxx/common/prom.c
@@ -56,13 +56,7 @@ void __init prom_init(void)
        mips_machgroup = MACH_GROUP_NEC_DDB;
-#if defined(CONFIG_DDB5074)
+#if defined(CONFIG_DDB5477)
-        mips_machtype = MACH_NEC_DDB5074;
-        add_memory_region(0, DDB_SDRAM_SIZE, BOOT_MEM_RAM);
-#elif defined(CONFIG_DDB5476)
-        mips_machtype = MACH_NEC_DDB5476;
-        add_memory_region(0, DDB_SDRAM_SIZE, BOOT_MEM_RAM);
-#elif defined(CONFIG_DDB5477)
        ddb5477_runtime_detection();
        add_memory_region(0, board_ram_size, BOOT_MEM_RAM);
 #endif
diff --git a/arch/mips/ddb5xxx/ddb5074/Makefile b/arch/mips/ddb5xxx/ddb5074/Makefile
deleted file mode 100644
index 304c02107b46..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the NEC DDB Vrc-5074 specific kernel interface routines
-# under Linux.
-#
-obj-y                   += setup.o irq.o nile4_pic.o
-EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/ddb5xxx/ddb5074/irq.c b/arch/mips/ddb5xxx/ddb5074/irq.c
deleted file mode 100644
index 60c087b7738c..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/irq.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- *  arch/mips/ddb5074/irq.c -- NEC DDB Vrc-5074 interrupt routines
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- */
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <asm/i8259.h>
-#include <asm/io.h>
-#include <asm/irq_cpu.h>
-#include <asm/ptrace.h>
-#include <asm/nile4.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-#include <asm/ddb5xxx/ddb5074.h>
-static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
-#define M1543_PNP_CONFIG        0x03f0  /* PnP Config Port */
-#define M1543_PNP_INDEX         0x03f0  /* PnP Index Port */
-#define M1543_PNP_DATA          0x03f1  /* PnP Data Port */
-#define M1543_PNP_ALT_CONFIG    0x0370  /* Alternative PnP Config Port */
-#define M1543_PNP_ALT_INDEX     0x0370  /* Alternative PnP Index Port */
-#define M1543_PNP_ALT_DATA      0x0371  /* Alternative PnP Data Port */
-#define M1543_INT1_MASTER_CTRL  0x0020  /* INT_1 (master) Control Register */
-#define M1543_INT1_MASTER_MASK  0x0021  /* INT_1 (master) Mask Register */
-#define M1543_INT1_SLAVE_CTRL   0x00a0  /* INT_1 (slave) Control Register */
-#define M1543_INT1_SLAVE_MASK   0x00a1  /* INT_1 (slave) Mask Register */
-#define M1543_INT1_MASTER_ELCR  0x04d0  /* INT_1 (master) Edge/Level Control */
-#define M1543_INT1_SLAVE_ELCR   0x04d1  /* INT_1 (slave) Edge/Level Control */
-static void m1543_irq_setup(void)
-{
-        /*
-         *  The ALI M1543 has 13 interrupt inputs, IRQ1..IRQ13.  Not all
-         *  the possible IO sources in the M1543 are in use by us.  We will
-         *  use the following mapping:
-         *
-         *      IRQ1  - keyboard (default set by M1543)
-         *      IRQ3  - reserved for UART B (default set by M1543) (note that
-         *              the schematics for the DDB Vrc-5074 board seem to
-         *              indicate that IRQ3 is connected to the DS1386
-         *              watchdog timer interrupt output so we might have
-         *              a conflict)
-         *      IRQ4  - reserved for UART A (default set by M1543)
-         *      IRQ5  - parallel (default set by M1543)
-         *      IRQ8  - DS1386 time of day (RTC) interrupt
-         *      IRQ12 - mouse
-         */
-        /*
-         *  Assing mouse interrupt to IRQ12
-         */
-        /* Enter configuration mode */
-        outb(0x51, M1543_PNP_CONFIG);
-        outb(0x23, M1543_PNP_CONFIG);
-        /* Select logical device 7 (Keyboard) */
-        outb(0x07, M1543_PNP_INDEX);
-        outb(0x07, M1543_PNP_DATA);
-        /* Select IRQ12 */
-        outb(0x72, M1543_PNP_INDEX);
-        outb(0x0c, M1543_PNP_DATA);
-        outb(0x30, M1543_PNP_INDEX);
-        printk("device 7, 0x30: %02x\n",inb(M1543_PNP_DATA));
-        outb(0x70, M1543_PNP_INDEX);
-        printk("device 7, 0x70: %02x\n",inb(M1543_PNP_DATA));
-        /* Leave configration mode */
-        outb(0xbb, M1543_PNP_CONFIG);
-}
-static void ddb_local0_irqdispatch(struct pt_regs *regs)
-{
-        u32 mask;
-        int nile4_irq;
-        mask = nile4_get_irq_stat(0);
-        /* Handle the timer interrupt first */
-#if 0
-        if (mask & (1 << NILE4_INT_GPT)) {
-                do_IRQ(nile4_to_irq(NILE4_INT_GPT), regs);
-                mask &= ~(1 << NILE4_INT_GPT);
-        }
-#endif
-        for (nile4_irq = 0; mask; nile4_irq++, mask >>= 1)
-                if (mask & 1) {
-                        if (nile4_irq == NILE4_INT_INTE) {
-                                int i8259_irq;
-                                nile4_clear_irq(NILE4_INT_INTE);
-                                i8259_irq = nile4_i8259_iack();
-                                do_IRQ(i8259_irq, regs);
-                        } else
-                                do_IRQ(nile4_to_irq(nile4_irq), regs);
-                }
-}
-static void ddb_local1_irqdispatch(void)
-{
-        printk("ddb_local1_irqdispatch called\n");
-}
-static void ddb_buserror_irq(void)
-{
-        printk("ddb_buserror_irq called\n");
-}
-static void ddb_8254timer_irq(void)
-{
-        printk("ddb_8254timer_irq called\n");
-}
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
-{
-        unsigned int pending = read_c0_cause() & read_c0_status();
-        if (pending & CAUSEF_IP2)
-                ddb_local0_irqdispatch(regs);
-        else if (pending & CAUSEF_IP3)
-                ddb_local1_irqdispatch();
-        else if (pending & CAUSEF_IP6)
-                ddb_buserror_irq();
-        else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
-                ddb_8254timer_irq();
-}
-void __init arch_init_irq(void)
-{
-        /* setup cascade interrupts */
-        setup_irq(NILE4_IRQ_BASE  + NILE4_INT_INTE, &irq_cascade);
-        setup_irq(CPU_IRQ_BASE + CPU_NILE4_CASCADE, &irq_cascade);
-        nile4_irq_setup(NILE4_IRQ_BASE);
-        m1543_irq_setup();
-        init_i8259_irqs();
-        printk("CPU_IRQ_BASE: %d\n",CPU_IRQ_BASE);
-        mips_cpu_irq_init(CPU_IRQ_BASE);
-        printk("enabling 8259 cascade\n");
-        ddb5074_led_hex(0);
-        /* Enable the interrupt cascade */
-        nile4_enable_irq(NILE4_IRQ_BASE+IRQ_I8259_CASCADE);
-}
diff --git a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c b/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
deleted file mode 100644
index 8743ffce8653..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/nile4_pic.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/*
- *  arch/mips/ddb5476/nile4.c --
- *      low-level PIC code for NEC Vrc-5476 (Nile 4)
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- *
- *  Copyright 2001 MontaVista Software Inc.
- *  Author: jsun@mvista.com or jsun@junsun.net
- *
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <asm/addrspace.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static int irq_base;
-/*
- *  Interrupt Programming
- */
-void nile4_map_irq(int nile4_irq, int cpu_irq)
-{
-        u32 offset, t;
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        t = ddb_in32(offset);
-        t &= ~(7 << (nile4_irq * 4));
-        t |= cpu_irq << (nile4_irq * 4);
-        ddb_out32(offset, t);
-}
-void nile4_map_irq_all(int cpu_irq)
-{
-        u32 all, t;
-        all = cpu_irq;
-        all |= all << 4;
-        all |= all << 8;
-        all |= all << 16;
-        t = ddb_in32(DDB_INTCTRL);
-        t &= 0x88888888;
-        t |= all;
-        ddb_out32(DDB_INTCTRL, t);
-        t = ddb_in32(DDB_INTCTRL + 4);
-        t &= 0x88888888;
-        t |= all;
-        ddb_out32(DDB_INTCTRL + 4, t);
-}
-void nile4_enable_irq(unsigned int nile4_irq)
-{
-        u32 offset, t;
-        nile4_irq-=irq_base;
-        ddb5074_led_hex(8);
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        ddb5074_led_hex(9);
-        t = ddb_in32(offset);
-        ddb5074_led_hex(0xa);
-        t |= 8 << (nile4_irq * 4);
-        ddb_out32(offset, t);
-        ddb5074_led_hex(0xb);
-}
-void nile4_disable_irq(unsigned int nile4_irq)
-{
-        u32 offset, t;
-        nile4_irq-=irq_base;
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        t = ddb_in32(offset);
-        t &= ~(8 << (nile4_irq * 4));
-        ddb_out32(offset, t);
-}
-void nile4_disable_irq_all(void)
-{
-        ddb_out32(DDB_INTCTRL, 0);
-        ddb_out32(DDB_INTCTRL + 4, 0);
-}
-u16 nile4_get_irq_stat(int cpu_irq)
-{
-        return ddb_in16(DDB_INTSTAT0 + cpu_irq * 2);
-}
-void nile4_enable_irq_output(int cpu_irq)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTSTAT1 + 4);
-        t |= 1 << (16 + cpu_irq);
-        ddb_out32(DDB_INTSTAT1, t);
-}
-void nile4_disable_irq_output(int cpu_irq)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTSTAT1 + 4);
-        t &= ~(1 << (16 + cpu_irq));
-        ddb_out32(DDB_INTSTAT1, t);
-}
-void nile4_set_pci_irq_polarity(int pci_irq, int high)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTPPES);
-        if (high)
-                t &= ~(1 << (pci_irq * 2));
-        else
-                t |= 1 << (pci_irq * 2);
-        ddb_out32(DDB_INTPPES, t);
-}
-void nile4_set_pci_irq_level_or_edge(int pci_irq, int level)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTPPES);
-        if (level)
-                t |= 2 << (pci_irq * 2);
-        else
-                t &= ~(2 << (pci_irq * 2));
-        ddb_out32(DDB_INTPPES, t);
-}
-void nile4_clear_irq(int nile4_irq)
-{
-        nile4_irq-=irq_base;
-        ddb_out32(DDB_INTCLR, 1 << nile4_irq);
-}
-void nile4_clear_irq_mask(u32 mask)
-{
-        ddb_out32(DDB_INTCLR, mask);
-}
-u8 nile4_i8259_iack(void)
-{
-        u8 irq;
-        u32 reg;
-        /* Set window 0 for interrupt acknowledge */
-        reg = ddb_in32(DDB_PCIINIT0);
-        ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IACK, 0, DDB_PCI_ACCESS_32);
-        irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE);
-        /* restore window 0 for PCI I/O space */
-        // ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, DDB_PCI_ACCESS_32);
-        ddb_out32(DDB_PCIINIT0, reg);
-        /* i8269.c set the base vector to be 0x0 */
-        return irq ;
-}
-static unsigned int nile4_irq_startup(unsigned int irq) {
-        nile4_enable_irq(irq);
-        return 0;
-}
-static void nile4_ack_irq(unsigned int irq) {
-    ddb5074_led_hex(4);
-        nile4_clear_irq(irq);
-    ddb5074_led_hex(2);
-        nile4_disable_irq(irq);
-    ddb5074_led_hex(0);
-}
-static void nile4_irq_end(unsigned int irq) {
-        ddb5074_led_hex(3);
-        if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-        ddb5074_led_hex(5);
-                nile4_enable_irq(irq);
-        ddb5074_led_hex(7);
-        }
-        ddb5074_led_hex(1);
-}
-#define nile4_irq_shutdown nile4_disable_irq
-static hw_irq_controller nile4_irq_controller = {
-        .typename = "nile4",
-        .startup = nile4_irq_startup,
-        .shutdown = nile4_irq_shutdown,
-        .enable = nile4_enable_irq,
-        .disable = nile4_disable_irq,
-        .ack = nile4_ack_irq,
-        .end = nile4_irq_end,
-};
-void nile4_irq_setup(u32 base) {
-        int i;
-        irq_base=base;
-        /* Map all interrupts to CPU int #0 */
-        nile4_map_irq_all(0);
-        /* PCI INTA#-E# must be level triggered */
-        nile4_set_pci_irq_level_or_edge(0, 1);
-        nile4_set_pci_irq_level_or_edge(1, 1);
-        nile4_set_pci_irq_level_or_edge(2, 1);
-        nile4_set_pci_irq_level_or_edge(3, 1);
-        nile4_set_pci_irq_level_or_edge(4, 1);
-        /* PCI INTA#-D# must be active low, INTE# must be active high */
-        nile4_set_pci_irq_polarity(0, 0);
-        nile4_set_pci_irq_polarity(1, 0);
-        nile4_set_pci_irq_polarity(2, 0);
-        nile4_set_pci_irq_polarity(3, 0);
-        nile4_set_pci_irq_polarity(4, 1);
-        for (i = 0; i < 16; i++) {
-                nile4_clear_irq(i);
-                nile4_disable_irq(i);
-        }
-        /* Enable CPU int #0 */
-        nile4_enable_irq_output(0);
-        for (i= base; i< base + NUM_NILE4_INTERRUPTS; i++) {
-                irq_desc[i].status = IRQ_DISABLED;
-                irq_desc[i].action = NULL;
-                irq_desc[i].depth = 1;
-                irq_desc[i].handler = &nile4_irq_controller;
-        }
-}
-#if defined(CONFIG_RUNTIME_DEBUG)
-void nile4_dump_irq_status(void)
-{
-        printk(KERN_DEBUG "
-               CPUSTAT = %p:%p\n", (void *) ddb_in32(DDB_CPUSTAT + 4),
-               (void *) ddb_in32(DDB_CPUSTAT));
-        printk(KERN_DEBUG "
-               INTCTRL = %p:%p\n", (void *) ddb_in32(DDB_INTCTRL + 4),
-               (void *) ddb_in32(DDB_INTCTRL));
-        printk(KERN_DEBUG
-               "INTSTAT0 = %p:%p\n",
-               (void *) ddb_in32(DDB_INTSTAT0 + 4),
-               (void *) ddb_in32(DDB_INTSTAT0));
-        printk(KERN_DEBUG
-               "INTSTAT1 = %p:%p\n",
-               (void *) ddb_in32(DDB_INTSTAT1 + 4),
-               (void *) ddb_in32(DDB_INTSTAT1));
-        printk(KERN_DEBUG
-               "INTCLR = %p:%p\n", (void *) ddb_in32(DDB_INTCLR + 4),
-               (void *) ddb_in32(DDB_INTCLR));
-        printk(KERN_DEBUG
-               "INTPPES = %p:%p\n", (void *) ddb_in32(DDB_INTPPES + 4),
-               (void *) ddb_in32(DDB_INTPPES));
-}
-#endif
diff --git a/arch/mips/ddb5xxx/ddb5074/setup.c b/arch/mips/ddb5xxx/ddb5074/setup.c
deleted file mode 100644
index 91456b068c2e..000000000000
--- a/arch/mips/ddb5xxx/ddb5074/setup.c
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- *  arch/mips/ddb5074/setup.c -- NEC DDB Vrc-5074 setup routines
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- */
-#include <linux/init.h>
-#include <linux/kbd_ll.h>
-#include <linux/kernel.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/pci.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-#include <linux/irq.h>
-#include <linux/pm.h>
-#include <asm/addrspace.h>
-#include <asm/bcache.h>
-#include <asm/irq.h>
-#include <asm/reboot.h>
-#include <asm/gdb-stub.h>
-#include <asm/time.h>
-#include <asm/nile4.h>
-#include <asm/ddb5xxx/ddb5074.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
-static void ddb_machine_restart(char *command)
-{
-        u32 t;
-        /* PCI cold reset */
-        t = nile4_in32(NILE4_PCICTRL + 4);
-        t |= 0x40000000;
-        nile4_out32(NILE4_PCICTRL + 4, t);
-        /* CPU cold reset */
-        t = nile4_in32(NILE4_CPUSTAT);
-        t |= 1;
-        nile4_out32(NILE4_CPUSTAT, t);
-        /* Call the PROM */
-        back_to_prom();
-}
-static void ddb_machine_halt(void)
-{
-        printk("DDB Vrc-5074 halted.\n");
-        do {
-        } while (1);
-}
-static void ddb_machine_power_off(void)
-{
-        printk("DDB Vrc-5074 halted. Please turn off the power.\n");
-        do {
-        } while (1);
-}
-extern void rtc_ds1386_init(unsigned long base);
-extern void (*board_timer_setup) (struct irqaction * irq);
-static void __init ddb_timer_init(struct irqaction *irq)
-{
-        /* set the clock to 1 Hz */
-        nile4_out32(NILE4_T2CTRL, 1000000);
-        /* enable the General-Purpose Timer */
-        nile4_out32(NILE4_T2CTRL + 4, 0x00000001);
-        /* reset timer */
-        nile4_out32(NILE4_T2CNTR, 0);
-        /* enable interrupt */
-        setup_irq(nile4_to_irq(NILE4_INT_GPT), irq);
-        nile4_enable_irq(nile4_to_irq(NILE4_INT_GPT));
-        change_c0_status(ST0_IM,
-                          IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4);
-}
-static void __init ddb_time_init(void)
-{
-        /* we have ds1396 RTC chip */
-        rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE));
-}
-void __init plat_setup(void)
-{
-        set_io_port_base(NILE4_PCI_IO_BASE);
-        isa_slot_offset = NILE4_PCI_MEM_BASE;
-        board_timer_setup = ddb_timer_init;
-        board_time_init = ddb_time_init;
-        _machine_restart = ddb_machine_restart;
-        _machine_halt = ddb_machine_halt;
-        pm_power_off = ddb_machine_power_off;
-        ddb_out32(DDB_BAR0, 0);
-        ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, 0x10);
-        ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE , 0x10);
-        /* Reboot on panic */
-        panic_timeout = 180;
-}
-#define USE_NILE4_SERIAL        0
-#if USE_NILE4_SERIAL
-#define ns16550_in(reg)         nile4_in8((reg)*8)
-#define ns16550_out(reg, val)   nile4_out8((reg)*8, (val))
-#else
-#define NS16550_BASE            (NILE4_PCI_IO_BASE+0x03f8)
-static inline u8 ns16550_in(u32 reg)
-{
-        return *(volatile u8 *) (NS16550_BASE + reg);
-}
-static inline void ns16550_out(u32 reg, u8 val)
-{
-        *(volatile u8 *) (NS16550_BASE + reg) = val;
-}
-#endif
-#define NS16550_RBR             0
-#define NS16550_THR             0
-#define NS16550_DLL             0
-#define NS16550_IER             1
-#define NS16550_DLM             1
-#define NS16550_FCR             2
-#define NS16550_IIR             2
-#define NS16550_LCR             3
-#define NS16550_MCR             4
-#define NS16550_LSR             5
-#define NS16550_MSR             6
-#define NS16550_SCR             7
-#define NS16550_LSR_DR          0x01    /* Data ready */
-#define NS16550_LSR_OE          0x02    /* Overrun */
-#define NS16550_LSR_PE          0x04    /* Parity error */
-#define NS16550_LSR_FE          0x08    /* Framing error */
-#define NS16550_LSR_BI          0x10    /* Break */
-#define NS16550_LSR_THRE        0x20    /* Xmit holding register empty */
-#define NS16550_LSR_TEMT        0x40    /* Xmitter empty */
-#define NS16550_LSR_ERR         0x80    /* Error */
-void _serinit(void)
-{
-#if USE_NILE4_SERIAL
-        ns16550_out(NS16550_LCR, 0x80);
-        ns16550_out(NS16550_DLM, 0x00);
-        ns16550_out(NS16550_DLL, 0x36); /* 9600 baud */
-        ns16550_out(NS16550_LCR, 0x00);
-        ns16550_out(NS16550_LCR, 0x03);
-        ns16550_out(NS16550_FCR, 0x47);
-#else
-        /* done by PMON */
-#endif
-}
-void _putc(char c)
-{
-        while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
-        ns16550_out(NS16550_THR, c);
-        if (c == '\n') {
-                while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_THRE));
-                ns16550_out(NS16550_THR, '\r');
-        }
-}
-void _puts(const char *s)
-{
-        char c;
-        while ((c = *s++))
-                _putc(c);
-}
-char _getc(void)
-{
-        while (!(ns16550_in(NS16550_LSR) & NS16550_LSR_DR));
-        return ns16550_in(NS16550_RBR);
-}
-int _testc(void)
-{
-        return (ns16550_in(NS16550_LSR) & NS16550_LSR_DR) != 0;
-}
-/*
- *  Hexadecimal 7-segment LED
- */
-void ddb5074_led_hex(int hex)
-{
-        outb(hex, 0x80);
-}
-/*
- *  LEDs D2 and D3, connected to the GPIO pins of the PMU in the ALi M1543
- */
-struct pci_dev *pci_pmu = NULL;
-void ddb5074_led_d2(int on)
-{
-        u8 t;
-        if (pci_pmu) {
-                pci_read_config_byte(pci_pmu, 0x7e, &t);
-                if (on)
-                        t &= 0x7f;
-                else
-                        t |= 0x80;
-                pci_write_config_byte(pci_pmu, 0x7e, t);
-        }
-}
-void ddb5074_led_d3(int on)
-{
-        u8 t;
-        if (pci_pmu) {
-                pci_read_config_byte(pci_pmu, 0x7e, &t);
-                if (on)
-                        t &= 0xbf;
-                else
-                        t |= 0x40;
-                pci_write_config_byte(pci_pmu, 0x7e, t);
-        }
-}
diff --git a/arch/mips/ddb5xxx/ddb5476/Makefile b/arch/mips/ddb5xxx/ddb5476/Makefile
deleted file mode 100644
index ab0312cb47b4..000000000000
--- a/arch/mips/ddb5xxx/ddb5476/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for the NEC DDB Vrc-5476 specific kernel interface routines
-# under Linux.
-#
-obj-y                   += setup.o irq.o nile4_pic.o vrc5476_irq.o
-obj-$(CONFIG_KGDB)      += dbg_io.o
-EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/ddb5xxx/ddb5476/dbg_io.c b/arch/mips/ddb5xxx/ddb5476/dbg_io.c
deleted file mode 100644
index 85e9e5013679..000000000000
--- a/arch/mips/ddb5xxx/ddb5476/dbg_io.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * kgdb io functions for DDB5476.  We use the second serial port.
- *
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-/* ======================= CONFIG ======================== */
-/* [jsun] we use the second serial port for kdb */
-#define         BASE                    0xa60002f8
-#define         MAX_BAUD                115200
-/* distance in bytes between two serial registers */
-#define         REG_OFFSET              1
-/*
- * 0 - kgdb does serial init
- * 1 - kgdb skip serial init
- */
-static int remoteDebugInitialized = 0;
-/*
- * the default baud rate *if* kgdb does serial init
- */
-#define         BAUD_DEFAULT            UART16550_BAUD_38400
-/* ======================= END OF CONFIG ======================== */
-typedef unsigned char uint8;
-typedef unsigned int uint32;
-#define         UART16550_BAUD_2400             2400
-#define         UART16550_BAUD_4800             4800
-#define         UART16550_BAUD_9600             9600
-#define         UART16550_BAUD_19200            19200
-#define         UART16550_BAUD_38400            38400
-#define         UART16550_BAUD_57600            57600
-#define         UART16550_BAUD_115200           115200
-#define         UART16550_PARITY_NONE           0
-#define         UART16550_PARITY_ODD            0x08
-#define         UART16550_PARITY_EVEN           0x18
-#define         UART16550_PARITY_MARK           0x28
-#define         UART16550_PARITY_SPACE          0x38
-#define         UART16550_DATA_5BIT             0x0
-#define         UART16550_DATA_6BIT             0x1
-#define         UART16550_DATA_7BIT             0x2
-#define         UART16550_DATA_8BIT             0x3
-#define         UART16550_STOP_1BIT             0x0
-#define         UART16550_STOP_2BIT             0x4
-/* register offset */
-#define         OFS_RCV_BUFFER          0
-#define         OFS_TRANS_HOLD          0
-#define         OFS_SEND_BUFFER         0
-#define         OFS_INTR_ENABLE         (1*REG_OFFSET)
-#define         OFS_INTR_ID             (2*REG_OFFSET)
-#define         OFS_DATA_FORMAT         (3*REG_OFFSET)
-#define         OFS_LINE_CONTROL        (3*REG_OFFSET)
-#define         OFS_MODEM_CONTROL       (4*REG_OFFSET)
-#define         OFS_RS232_OUTPUT        (4*REG_OFFSET)
-#define         OFS_LINE_STATUS         (5*REG_OFFSET)
-#define         OFS_MODEM_STATUS        (6*REG_OFFSET)
-#define         OFS_RS232_INPUT         (6*REG_OFFSET)
-#define         OFS_SCRATCH_PAD         (7*REG_OFFSET)
-#define         OFS_DIVISOR_LSB         (0*REG_OFFSET)
-#define         OFS_DIVISOR_MSB         (1*REG_OFFSET)
-/* memory-mapped read/write of the port */
-#define         UART16550_READ(y)    (*((volatile uint8*)(BASE + y)))
-#define         UART16550_WRITE(y, z)  ((*((volatile uint8*)(BASE + y))) = z)
-void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
-{
-        /* disable interrupts */
-        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-        /* set up buad rate */
-        {
-                uint32 divisor;
-                /* set DIAB bit */
-                UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
-                /* set divisor */
-                divisor = MAX_BAUD / baud;
-                UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
-                UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
-                /* clear DIAB bit */
-                UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
-        }
-        /* set data format */
-        UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
-}
-uint8 getDebugChar(void)
-{
-        if (!remoteDebugInitialized) {
-                remoteDebugInitialized = 1;
-                debugInit(BAUD_DEFAULT,
-                          UART16550_DATA_8BIT,
-                          UART16550_PARITY_NONE, UART16550_STOP_1BIT);
-        }
-        while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
-        return UART16550_READ(OFS_RCV_BUFFER);
-}
-int putDebugChar(uint8 byte)
-{
-        if (!remoteDebugInitialized) {
-                remoteDebugInitialized = 1;
-                debugInit(BAUD_DEFAULT,
-                          UART16550_DATA_8BIT,
-                          UART16550_PARITY_NONE, UART16550_STOP_1BIT);
-        }
-        while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
-        UART16550_WRITE(OFS_SEND_BUFFER, byte);
-        return 1;
-}
diff --git a/arch/mips/ddb5xxx/ddb5476/irq.c b/arch/mips/ddb5xxx/ddb5476/irq.c
deleted file mode 100644
index 7583a1f30711..000000000000
--- a/arch/mips/ddb5xxx/ddb5476/irq.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/*
- *  arch/mips/ddb5476/irq.c -- NEC DDB Vrc-5476 interrupt routines
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- *
- * Re-write the whole thing to use new irq.c file.
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <asm/i8259.h>
-#include <asm/io.h>
-#include <asm/ptrace.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-#define M1543_PNP_CONFIG        0x03f0  /* PnP Config Port */
-#define M1543_PNP_INDEX         0x03f0  /* PnP Index Port */
-#define M1543_PNP_DATA          0x03f1  /* PnP Data Port */
-#define M1543_PNP_ALT_CONFIG    0x0370  /* Alternative PnP Config Port */
-#define M1543_PNP_ALT_INDEX     0x0370  /* Alternative PnP Index Port */
-#define M1543_PNP_ALT_DATA      0x0371  /* Alternative PnP Data Port */
-#define M1543_INT1_MASTER_CTRL  0x0020  /* INT_1 (master) Control Register */
-#define M1543_INT1_MASTER_MASK  0x0021  /* INT_1 (master) Mask Register */
-#define M1543_INT1_SLAVE_CTRL   0x00a0  /* INT_1 (slave) Control Register */
-#define M1543_INT1_SLAVE_MASK   0x00a1  /* INT_1 (slave) Mask Register */
-#define M1543_INT1_MASTER_ELCR  0x04d0  /* INT_1 (master) Edge/Level Control */
-#define M1543_INT1_SLAVE_ELCR   0x04d1  /* INT_1 (slave) Edge/Level Control */
-static void m1543_irq_setup(void)
-{
-        /*
-         *  The ALI M1543 has 13 interrupt inputs, IRQ1..IRQ13.  Not all
-         *  the possible IO sources in the M1543 are in use by us.  We will
-         *  use the following mapping:
-         *
-         *      IRQ1  - keyboard (default set by M1543)
-         *      IRQ3  - reserved for UART B (default set by M1543) (note that
-         *              the schematics for the DDB Vrc-5476 board seem to
-         *              indicate that IRQ3 is connected to the DS1386
-         *              watchdog timer interrupt output so we might have
-         *              a conflict)
-         *      IRQ4  - reserved for UART A (default set by M1543)
-         *      IRQ5  - parallel (default set by M1543)
-         *      IRQ8  - DS1386 time of day (RTC) interrupt
-         *      IRQ9  - USB (hardwired in ddb_setup)
-         *      IRQ10 - PMU (hardwired in ddb_setup)
-         *      IRQ12 - mouse
-         *      IRQ14,15 - IDE controller (need to be confirmed, jsun)
-         */
-        /*
-         *  Assing mouse interrupt to IRQ12
-         */
-        /* Enter configuration mode */
-        outb(0x51, M1543_PNP_CONFIG);
-        outb(0x23, M1543_PNP_CONFIG);
-        /* Select logical device 7 (Keyboard) */
-        outb(0x07, M1543_PNP_INDEX);
-        outb(0x07, M1543_PNP_DATA);
-        /* Select IRQ12 */
-        outb(0x72, M1543_PNP_INDEX);
-        outb(0x0c, M1543_PNP_DATA);
-        /* Leave configration mode */
-        outb(0xbb, M1543_PNP_CONFIG);
-}
-static void nile4_irq_setup(void)
-{
-        int i;
-        /* Map all interrupts to CPU int #0 (IP2) */
-        nile4_map_irq_all(0);
-        /* PCI INTA#-E# must be level triggered */
-        nile4_set_pci_irq_level_or_edge(0, 1);
-        nile4_set_pci_irq_level_or_edge(1, 1);
-        nile4_set_pci_irq_level_or_edge(2, 1);
-        nile4_set_pci_irq_level_or_edge(3, 1);
-        /* PCI INTA#, B#, D# must be active low, INTC# must be active high */
-        nile4_set_pci_irq_polarity(0, 0);
-        nile4_set_pci_irq_polarity(1, 0);
-        nile4_set_pci_irq_polarity(2, 1);
-        nile4_set_pci_irq_polarity(3, 0);
-        for (i = 0; i < 16; i++)
-                nile4_clear_irq(i);
-        /* Enable CPU int #0 */
-        nile4_enable_irq_output(0);
-        /* memory resource acquire in ddb_setup */
-}
-static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
-static struct irqaction irq_error = { no_action, 0, CPU_MASK_NONE, "error", NULL, NULL };
-extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
-extern void mips_cpu_irq_init(u32 irq_base);
-extern void vrc5476_irq_init(u32 irq_base);
-extern void vrc5476_irq_dispatch(struct pt_regs *regs);
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
-{
-        unsigned int pending = read_c0_cause() & read_c0_status();
-        if (pending & STATUSF_IP7)
-                do_IRQ(CPU_IRQ_BASE + 7, regs);
-        else if (pending & STATUSF_IP2)
-                vrc5476_irq_dispatch(regs);
-        else if (pending & STATUSF_IP3)
-                do_IRQ(CPU_IRQ_BASE + 3, regs);
-        else if (pending & STATUSF_IP4)
-                do_IRQ(CPU_IRQ_BASE + 4, regs);
-        else if (pending & STATUSF_IP5)
-                do_IRQ(CPU_IRQ_BASE + 5, regs);
-        else if (pending & STATUSF_IP6)
-                do_IRQ(CPU_IRQ_BASE + 6, regs);
-        else if (pending & STATUSF_IP0)
-                do_IRQ(CPU_IRQ_BASE, regs);
-        else if (pending & STATUSF_IP1)
-                do_IRQ(CPU_IRQ_BASE + 1, regs);
-        vrc5476_irq_dispatch(regs);
-}
-void __init arch_init_irq(void)
-{
-        /* hardware initialization */
-        nile4_irq_setup();
-        m1543_irq_setup();
-        /* controller setup */
-        init_i8259_irqs();
-        vrc5476_irq_init(VRC5476_IRQ_BASE);
-        mips_cpu_irq_init(CPU_IRQ_BASE);
-        /* setup cascade interrupts */
-        setup_irq(VRC5476_IRQ_BASE + VRC5476_I8259_CASCADE, &irq_cascade);
-        setup_irq(CPU_IRQ_BASE + CPU_VRC5476_CASCADE, &irq_cascade);
-        /* setup error interrupts for debugging */
-        setup_irq(VRC5476_IRQ_BASE + VRC5476_IRQ_CPCE, &irq_error);
-        setup_irq(VRC5476_IRQ_BASE + VRC5476_IRQ_CNTD, &irq_error);
-        setup_irq(VRC5476_IRQ_BASE + VRC5476_IRQ_MCE, &irq_error);
-        setup_irq(VRC5476_IRQ_BASE + VRC5476_IRQ_LBRT, &irq_error);
-        setup_irq(VRC5476_IRQ_BASE + VRC5476_IRQ_PCIS, &irq_error);
-        setup_irq(VRC5476_IRQ_BASE + VRC5476_IRQ_PCI, &irq_error);
-}
diff --git a/arch/mips/ddb5xxx/ddb5476/nile4_pic.c b/arch/mips/ddb5xxx/ddb5476/nile4_pic.c
deleted file mode 100644
index e930cee7944f..000000000000
--- a/arch/mips/ddb5xxx/ddb5476/nile4_pic.c
+++ /dev/null
@@ -1,190 +0,0 @@
-/*
- *  arch/mips/ddb5476/nile4.c --
- *      low-level PIC code for NEC Vrc-5476 (Nile 4)
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- *
- *  Copyright 2001 MontaVista Software Inc.
- *  Author: jsun@mvista.com or jsun@junsun.net
- *
- */
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/addrspace.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-/*
- *  Interrupt Programming
- */
-void nile4_map_irq(int nile4_irq, int cpu_irq)
-{
-        u32 offset, t;
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        t = ddb_in32(offset);
-        t &= ~(7 << (nile4_irq * 4));
-        t |= cpu_irq << (nile4_irq * 4);
-        ddb_out32(offset, t);
-}
-void nile4_map_irq_all(int cpu_irq)
-{
-        u32 all, t;
-        all = cpu_irq;
-        all |= all << 4;
-        all |= all << 8;
-        all |= all << 16;
-        t = ddb_in32(DDB_INTCTRL);
-        t &= 0x88888888;
-        t |= all;
-        ddb_out32(DDB_INTCTRL, t);
-        t = ddb_in32(DDB_INTCTRL + 4);
-        t &= 0x88888888;
-        t |= all;
-        ddb_out32(DDB_INTCTRL + 4, t);
-}
-void nile4_enable_irq(int nile4_irq)
-{
-        u32 offset, t;
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        t = ddb_in32(offset);
-        t |= 8 << (nile4_irq * 4);
-        ddb_out32(offset, t);
-}
-void nile4_disable_irq(int nile4_irq)
-{
-        u32 offset, t;
-        offset = DDB_INTCTRL;
-        if (nile4_irq >= 8) {
-                offset += 4;
-                nile4_irq -= 8;
-        }
-        t = ddb_in32(offset);
-        t &= ~(8 << (nile4_irq * 4));
-        ddb_out32(offset, t);
-}
-void nile4_disable_irq_all(void)
-{
-        ddb_out32(DDB_INTCTRL, 0);
-        ddb_out32(DDB_INTCTRL + 4, 0);
-}
-u16 nile4_get_irq_stat(int cpu_irq)
-{
-        return ddb_in16(DDB_INTSTAT0 + cpu_irq * 2);
-}
-void nile4_enable_irq_output(int cpu_irq)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTSTAT1 + 4);
-        t |= 1 << (16 + cpu_irq);
-        ddb_out32(DDB_INTSTAT1, t);
-}
-void nile4_disable_irq_output(int cpu_irq)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTSTAT1 + 4);
-        t &= ~(1 << (16 + cpu_irq));
-        ddb_out32(DDB_INTSTAT1, t);
-}
-void nile4_set_pci_irq_polarity(int pci_irq, int high)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTPPES);
-        if (high)
-                t &= ~(1 << (pci_irq * 2));
-        else
-                t |= 1 << (pci_irq * 2);
-        ddb_out32(DDB_INTPPES, t);
-}
-void nile4_set_pci_irq_level_or_edge(int pci_irq, int level)
-{
-        u32 t;
-        t = ddb_in32(DDB_INTPPES);
-        if (level)
-                t |= 2 << (pci_irq * 2);
-        else
-                t &= ~(2 << (pci_irq * 2));
-        ddb_out32(DDB_INTPPES, t);
-}
-void nile4_clear_irq(int nile4_irq)
-{
-        ddb_out32(DDB_INTCLR, 1 << nile4_irq);
-}
-void nile4_clear_irq_mask(u32 mask)
-{
-        ddb_out32(DDB_INTCLR, mask);
-}
-u8 nile4_i8259_iack(void)
-{
-        u8 irq;
-        u32 reg;
-        /* Set window 0 for interrupt acknowledge */
-        reg = ddb_in32(DDB_PCIINIT0);
-        ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IACK, 0, DDB_PCI_ACCESS_32);
-        irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE);
-        /* restore window 0 for PCI I/O space */
-        // ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, DDB_PCI_ACCESS_32);
-        ddb_out32(DDB_PCIINIT0, reg);
-        /* i8269.c set the base vector to be 0x0 */
-        return irq + I8259_IRQ_BASE;
-}
-#if defined(CONFIG_RUNTIME_DEBUG)
-void nile4_dump_irq_status(void)
-{
-        printk(KERN_DEBUG "
-               CPUSTAT = %p:%p\n", (void *) ddb_in32(DDB_CPUSTAT + 4),
-               (void *) ddb_in32(DDB_CPUSTAT));
-        printk(KERN_DEBUG "
-               INTCTRL = %p:%p\n", (void *) ddb_in32(DDB_INTCTRL + 4),
-               (void *) ddb_in32(DDB_INTCTRL));
-        printk(KERN_DEBUG
-               "INTSTAT0 = %p:%p\n",
-               (void *) ddb_in32(DDB_INTSTAT0 + 4),
-               (void *) ddb_in32(DDB_INTSTAT0));
-        printk(KERN_DEBUG
-               "INTSTAT1 = %p:%p\n",
-               (void *) ddb_in32(DDB_INTSTAT1 + 4),
-               (void *) ddb_in32(DDB_INTSTAT1));
-        printk(KERN_DEBUG
-               "INTCLR = %p:%p\n", (void *) ddb_in32(DDB_INTCLR + 4),
-               (void *) ddb_in32(DDB_INTCLR));
-        printk(KERN_DEBUG
-               "INTPPES = %p:%p\n", (void *) ddb_in32(DDB_INTPPES + 4),
-               (void *) ddb_in32(DDB_INTPPES));
-}
-#endif
diff --git a/arch/mips/ddb5xxx/ddb5476/setup.c b/arch/mips/ddb5xxx/ddb5476/setup.c
deleted file mode 100644
index c902adef5942..000000000000
--- a/arch/mips/ddb5xxx/ddb5476/setup.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/*
- *  arch/mips/ddb5476/setup.c -- NEC DDB Vrc-5476 setup routines
- *
- *  Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
- *                     Sony Software Development Center Europe (SDCE), Brussels
- */
-#include <linux/init.h>
-#include <linux/kbd_ll.h>
-#include <linux/kernel.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/pci.h>
-#include <linux/pm.h>
-#include <asm/addrspace.h>
-#include <asm/bcache.h>
-#include <asm/irq.h>
-#include <asm/reboot.h>
-#include <asm/gdb-stub.h>
-#include <asm/time.h>
-#include <asm/debug.h>
-#include <asm/traps.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-// #define USE_CPU_COUNTER_TIMER        /* whether we use cpu counter */
-#ifdef USE_CPU_COUNTER_TIMER
-#define CPU_COUNTER_FREQUENCY           83000000
-#else
-/* otherwise we use general purpose timer */
-#define TIMER_FREQUENCY                 83000000
-#define TIMER_BASE                      DDB_T2CTRL
-#define TIMER_IRQ                       (VRC5476_IRQ_BASE + VRC5476_IRQ_GPT)
-#endif
-static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
-static void ddb_machine_restart(char *command)
-{
-        u32 t;
-        /* PCI cold reset */
-        t = ddb_in32(DDB_PCICTRL + 4);
-        t |= 0x40000000;
-        ddb_out32(DDB_PCICTRL + 4, t);
-        /* CPU cold reset */
-        t = ddb_in32(DDB_CPUSTAT);
-        t |= 1;
-        ddb_out32(DDB_CPUSTAT, t);
-        /* Call the PROM */
-        back_to_prom();
-}
-static void ddb_machine_halt(void)
-{
-        printk(KERN_NOTICE "DDB Vrc-5476 halted.\n");
-        while (1);
-}
-static void ddb_machine_power_off(void)
-{
-        printk(KERN_NOTICE "DDB Vrc-5476 halted. Please turn off the power.\n");
-        while (1);
-}
-extern void rtc_ds1386_init(unsigned long base);
-static void __init ddb_time_init(void)
-{
-#if defined(USE_CPU_COUNTER_TIMER)
-        mips_hpt_frequency = CPU_COUNTER_FREQUENCY;
-#endif
-        /* we have ds1396 RTC chip */
-        rtc_ds1386_init(KSEG1ADDR(DDB_PCI_MEM_BASE));
-}
-extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
-static void __init ddb_timer_setup(struct irqaction *irq)
-{
-#if defined(USE_CPU_COUNTER_TIMER)
-        unsigned int count;
-        /* we are using the cpu counter for timer interrupts */
-        setup_irq(CPU_IRQ_BASE + 7, irq);
-        /* to generate the first timer interrupt */
-        count = read_c0_count();
-        write_c0_compare(count + 1000);
-#else
-        ddb_out32(TIMER_BASE, TIMER_FREQUENCY/HZ);
-        ddb_out32(TIMER_BASE+4, 0x1);   /* enable timer */
-        setup_irq(TIMER_IRQ, irq);
-#endif
-}
-static struct {
-        struct resource dma1;
-        struct resource timer;
-        struct resource rtc;
-        struct resource dma_page_reg;
-        struct resource dma2;
-} ddb5476_ioport = {
-        {
-        "dma1", 0x00, 0x1f, IORESOURCE_BUSY}, {
-        "timer", 0x40, 0x5f, IORESOURCE_BUSY}, {
-        "rtc", 0x70, 0x7f, IORESOURCE_BUSY}, {
-        "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY}, {
-        "dma2", 0xc0, 0xdf, IORESOURCE_BUSY}
-};
-static struct {
-        struct resource nile4;
-} ddb5476_iomem = {
-        { "Nile 4", DDB_BASE, DDB_BASE + DDB_SIZE - 1, IORESOURCE_BUSY}
-};
-static void ddb5476_board_init(void);
-void __init plat_setup(void)
-{
-        set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE));
-        board_time_init = ddb_time_init;
-        board_timer_setup = ddb_timer_setup;
-        _machine_restart = ddb_machine_restart;
-        _machine_halt = ddb_machine_halt;
-        pm_power_off = ddb_machine_power_off;
-        /* request io port/mem resources  */
-        if (request_resource(&ioport_resource, &ddb5476_ioport.dma1) ||
-            request_resource(&ioport_resource, &ddb5476_ioport.timer) ||
-            request_resource(&ioport_resource, &ddb5476_ioport.rtc) ||
-            request_resource(&ioport_resource,
-                             &ddb5476_ioport.dma_page_reg)
-            || request_resource(&ioport_resource, &ddb5476_ioport.dma2)
-            || request_resource(&iomem_resource, &ddb5476_iomem.nile4)) {
-                printk
-                    ("ddb_setup - requesting oo port resources failed.\n");
-                for (;;);
-        }
-        /* Reboot on panic */
-        panic_timeout = 180;
-        /* [jsun] we need to set BAR0 so that SDRAM 0 appears at 0x0 in PCI */
-        /* *(long*)0xbfa00218 = 0x8; */
-        /* board initialization stuff */
-        ddb5476_board_init();
-}
-/*
- * We don't trust bios.  We essentially does hardware re-initialization
- * as complete as possible, as far as we know we can safely do.
- */
-static void ddb5476_board_init(void)
-{
-        /* ----------- setup PDARs ------------ */
-        /* check SDRAM0, whether we are on MEM bus does not matter */
-        db_assert((ddb_in32(DDB_SDRAM0) & 0xffffffef) ==
-                  ddb_calc_pdar(DDB_SDRAM_BASE, DDB_SDRAM_SIZE, 32, 0, 1));
-        /* SDRAM1 should be turned off.  What is this for anyway ? */
-        db_assert( (ddb_in32(DDB_SDRAM1) & 0xf) == 0);
-        /* flash 1&2, DDB status, DDB control */
-        ddb_set_pdar(DDB_DCS2, DDB_DCS2_BASE, DDB_DCS2_SIZE, 16, 0, 0);
-        ddb_set_pdar(DDB_DCS3, DDB_DCS3_BASE, DDB_DCS3_SIZE, 16, 0, 0);
-        ddb_set_pdar(DDB_DCS4, DDB_DCS4_BASE, DDB_DCS4_SIZE, 8, 0, 0);
-        ddb_set_pdar(DDB_DCS5, DDB_DCS5_BASE, DDB_DCS5_SIZE, 8, 0, 0);
-        /* shut off other pdar so they don't accidentally get into the way */
-        ddb_set_pdar(DDB_DCS6, 0xffffffff, 0, 32, 0, 0);
-        ddb_set_pdar(DDB_DCS7, 0xffffffff, 0, 32, 0, 0);
-        ddb_set_pdar(DDB_DCS8, 0xffffffff, 0, 32, 0, 0);
-        /* verify VRC5477 base addr */
-        /* don't care about some details */
-        db_assert((ddb_in32(DDB_INTCS) & 0xffffff0f) ==
-                  ddb_calc_pdar(DDB_INTCS_BASE, DDB_INTCS_SIZE, 8, 0, 0));
-        /* verify BOOT ROM addr */
-        /* don't care about some details */
-        db_assert((ddb_in32(DDB_BOOTCS) & 0xffffff0f) ==
-                  ddb_calc_pdar(DDB_BOOTCS_BASE, DDB_BOOTCS_SIZE, 8, 0, 0));
-        /* setup PCI windows - window1 for MEM/config, window0 for IO */
-        ddb_set_pdar(DDB_PCIW0, DDB_PCI_IO_BASE, DDB_PCI_IO_SIZE, 32, 0, 1);
-        ddb_set_pmr(DDB_PCIINIT0, DDB_PCICMD_IO, 0, DDB_PCI_ACCESS_32);
-        ddb_set_pdar(DDB_PCIW1, DDB_PCI_MEM_BASE, DDB_PCI_MEM_SIZE, 32, 0, 1);
-        ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE, DDB_PCI_ACCESS_32);
-        /* ----------- setup PDARs ------------ */
-        /* this is problematic - it will reset Aladin which cause we loose
-         * serial port, and we don't know how to set up Aladin chip again.
-         */
-        // ddb_pci_reset_bus();
-        ddb_out32(DDB_BAR0, 0x00000008);
-        ddb_out32(DDB_BARC, 0xffffffff);
-        ddb_out32(DDB_BARB, 0xffffffff);
-        ddb_out32(DDB_BAR1, 0xffffffff);
-        ddb_out32(DDB_BAR2, 0xffffffff);
-        ddb_out32(DDB_BAR3, 0xffffffff);
-        ddb_out32(DDB_BAR4, 0xffffffff);
-        ddb_out32(DDB_BAR5, 0xffffffff);
-        ddb_out32(DDB_BAR6, 0xffffffff);
-        ddb_out32(DDB_BAR7, 0xffffffff);
-        ddb_out32(DDB_BAR8, 0xffffffff);
-        /* ----------- switch PCI1 to PCI CONFIG space  ------------ */
-        ddb_set_pdar(DDB_PCIW1, DDB_PCI_CONFIG_BASE, DDB_PCI_CONFIG_SIZE, 32, 0, 1);
-        ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_CFG, 0x0, DDB_PCI_ACCESS_32);
-        /* ----- M1543 PCI setup ------ */
-        /* we know M1543 PCI-ISA controller is at addr:18 */
-        /* xxxx1010 makes USB at addr:13 and PMU at addr:14 */
-        *(volatile unsigned char *) 0xa8040072 &= 0xf0;
-        *(volatile unsigned char *) 0xa8040072 |= 0xa;
-        /* setup USB interrupt to IRQ 9, (bit 0:3 - 0001)
-         * no IOCHRDY signal, (bit 7 - 1)
-         * M1543C & M7101 VID and Subsys Device ID are read-only (bit 6 - 1)
-         * Make USB Master INTAJ level to edge conversion (bit 4 - 1)
-         */
-        *(unsigned char *) 0xa8040074 = 0xd1;
-        /* setup PMU(SCI to IRQ 10 (bit 0:3 - 0011)
-         * SCI routing to IRQ 13 disabled (bit 7 - 1)
-         * SCI interrupt level to edge conversion bypassed (bit 4 - 0)
-         */
-        *(unsigned char *) 0xa8040076 = 0x83;
-        /* setup IDE controller
-         * enable IDE controller (bit 6 - 1)
-         * IDE IDSEL to be addr:24 (bit 4:5 - 11)
-         * no IDE ATA Secondary Bus Signal Pad Control (bit 3 - 0)
-         * no IDE ATA Primary Bus Signal Pad Control (bit 2 - 0)
-         * primary IRQ is 14, secondary is 15 (bit 1:0 - 01
-         */
-        // *(unsigned char*)0xa8040058 = 0x71;
-        // *(unsigned char*)0xa8040058 = 0x79;
-        // *(unsigned char*)0xa8040058 = 0x74;              // use SIRQ, primary tri-state
-        *(unsigned char *) 0xa8040058 = 0x75;   // primary tri-state
-#if 0
-        /* this is not necessary if M5229 does not use SIRQ */
-        *(unsigned char *) 0xa8040044 = 0x0d;   // primary to IRQ 14
-        *(unsigned char *) 0xa8040075 = 0x0d;   // secondary to IRQ 14
-#endif
-        /* enable IDE in the M5229 config register 0x50 (bit 0 - 1) */
-        /* M5229 IDSEL is addr:24; see above setting */
-        *(unsigned char *) 0xa9000050 |= 0x1;
-        /* enable bus master (bit 2)  and IO decoding  (bit 0) */
-        *(unsigned char *) 0xa9000004 |= 0x5;
-        /* enable native, copied from arch/ppc/k2boot/head.S */
-        /* TODO - need volatile, need to be portable */
-        *(unsigned char *) 0xa9000009 = 0xff;
-        /* ----- end of M1543 PCI setup ------ */
-        /* ----- reset on-board ether chip  ------ */
-        *((volatile u32 *) 0xa8020004) |= 1;    /* decode I/O */
-        *((volatile u32 *) 0xa8020010) = 0;     /* set BAR address */
-        /* send reset command */
-        *((volatile u32 *) 0xa6000000) = 1;     /* do a soft reset */
-        /* disable ether chip */
-        *((volatile u32 *) 0xa8020004) = 0;     /* disable any decoding */
-        /* put it into sleep */
-        *((volatile u32 *) 0xa8020040) = 0x80000000;
-        /* ----- end of reset on-board ether chip  ------ */
-        /* ----------- switch PCI1 back to PCI MEM space  ------------ */
-        ddb_set_pdar(DDB_PCIW1, DDB_PCI_MEM_BASE, DDB_PCI_MEM_SIZE, 32, 0, 1);
-        ddb_set_pmr(DDB_PCIINIT1, DDB_PCICMD_MEM, DDB_PCI_MEM_BASE, DDB_PCI_ACCESS_32);
-}
diff --git a/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c b/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c
deleted file mode 100644
index a3c5e7b18018..000000000000
--- a/arch/mips/ddb5xxx/ddb5476/vrc5476_irq.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * The irq controller for vrc5476.
- *
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <asm/system.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static int irq_base;
-static void vrc5476_irq_enable(uint irq)
-{
-        nile4_enable_irq(irq - irq_base);
-}
-static void vrc5476_irq_disable(uint irq)
-{
-        nile4_disable_irq(irq - irq_base);
-}
-static unsigned int vrc5476_irq_startup(uint irq)
-{
-        nile4_enable_irq(irq - irq_base);
-        return 0;
-}
-#define vrc5476_irq_shutdown    vrc5476_irq_disable
-static void vrc5476_irq_ack(uint irq)
-{
-        nile4_clear_irq(irq - irq_base);
-        nile4_disable_irq(irq - irq_base);
-}
-static void vrc5476_irq_end(uint irq)
-{
-        if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                vrc5476_irq_enable(irq);
-}
-static hw_irq_controller vrc5476_irq_controller = {
-        .typename = "vrc5476",
-        .startup = vrc5476_irq_startup,
-        .shutdown = vrc5476_irq_shutdown,
-        .enable = vrc5476_irq_enable,
-        .disable = vrc5476_irq_disable,
-        .ack = vrc5476_irq_ack,
-        .end = vrc5476_irq_end
-};
-void __init
-vrc5476_irq_init(u32 base)
-{
-        u32 i;
-        irq_base = base;
-        for (i= base; i< base + NUM_VRC5476_IRQ; i++) {
-                irq_desc[i].status = IRQ_DISABLED;
-                irq_desc[i].action = NULL;
-                irq_desc[i].depth = 1;
-                irq_desc[i].handler = &vrc5476_irq_controller;
-        }
-}
-void
-vrc5476_irq_dispatch(struct pt_regs *regs)
-{
-        u32 mask;
-        int nile4_irq;
-        mask = nile4_get_irq_stat(0);
-        /* quick check for possible time interrupt */
-        if (mask & (1 << VRC5476_IRQ_GPT)) {
-                do_IRQ(VRC5476_IRQ_BASE + VRC5476_IRQ_GPT, regs);
-                return;
-        }
-        /* check for i8259 interrupts */
-        if (mask & (1 << VRC5476_I8259_CASCADE)) {
-                int i8259_irq = nile4_i8259_iack();
-                do_IRQ(I8259_IRQ_BASE + i8259_irq, regs);
-                return;
-        }
-        /* regular nile4 interrupts (we should not really have any */
-        for (nile4_irq = 0; mask; nile4_irq++, mask >>= 1) {
-                if (mask & 1) {
-                        do_IRQ(VRC5476_IRQ_BASE + nile4_irq, regs);
-                        return;
-                }
-        }
-        spurious_interrupt(regs);
-}
diff --git a/arch/mips/ddb5xxx/ddb5477/kgdb_io.c b/arch/mips/ddb5xxx/ddb5477/kgdb_io.c
index 1d18d590495b..385bbdb10170 100644
--- a/arch/mips/ddb5xxx/ddb5477/kgdb_io.c
+++ b/arch/mips/ddb5xxx/ddb5477/kgdb_io.c
@@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-        /* set up buad rate */
+        /* set up baud rate */
        {
                uint32 divisor;
diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c
index 2f566034cc44..93167ecdb424 100644
--- a/arch/mips/ddb5xxx/ddb5477/setup.c
+++ b/arch/mips/ddb5xxx/ddb5477/setup.c
@@ -171,7 +171,7 @@ static void ddb5477_board_init(void);
 extern struct pci_controller ddb5477_ext_controller;
 extern struct pci_controller ddb5477_io_controller;
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        /* initialize board - we don't trust the loader */
        ddb5477_board_init();
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index ad5d436d80c1..9c707b9ceb65 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -147,7 +147,7 @@ static void __init dec_be_init(void)
 extern void dec_time_init(void);
 extern void dec_timer_setup(struct irqaction *);
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        board_be_init = dec_be_init;
        board_time_init = dec_time_init;
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 74cb055d4bf6..76e4d09ff4d2 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -181,7 +181,7 @@ void __init dec_time_init(void)
        }
        /* Set up the rate of periodic DS1287 interrupts.  */
-        CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - LOG_2_HZ), RTC_REG_A);
+        CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);
 }
 EXPORT_SYMBOL(do_settimeofday);
diff --git a/arch/mips/defconfig b/arch/mips/defconfig
index 607e2985ffe3..879ba1ad99ca 100644
--- a/arch/mips/defconfig
+++ b/arch/mips/defconfig
@@ -41,8 +41,6 @@ CONFIG_MIPS=y
 # CONFIG_MIPS_XXS1500 is not set
 # CONFIG_PNX8550_V2PCI is not set
 # CONFIG_PNX8550_JBS is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
 # CONFIG_DDB5477 is not set
 # CONFIG_MACH_VR41XX is not set
 # CONFIG_PMC_YOSEMITE is not set
@@ -136,6 +134,15 @@ CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_256 is not set
+CONFIG_HZ_1000=y
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=1000
 # CONFIG_PREEMPT_NONE is not set
 CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_PREEMPT is not set
diff --git a/arch/mips/emma2rh/common/Makefile b/arch/mips/emma2rh/common/Makefile
new file mode 100644
index 000000000000..859121b3867d
--- /dev/null
+++ b/arch/mips/emma2rh/common/Makefile
@@ -0,0 +1,13 @@
+#
+#  arch/mips/emma2rh/common/Makefile
+#       Makefile for the common code of NEC EMMA2RH based board.
+#
+#  Copyright (C) NEC Electronics Corporation 2005-2006
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 2 of the License, or
+#  (at your option) any later version.
+#
+obj-$(CONFIG_MARKEINS)  += irq.o irq_emma2rh.o prom.o
diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c
new file mode 100644
index 000000000000..b075281e50e9
--- /dev/null
+++ b/arch/mips/emma2rh/common/irq.c
@@ -0,0 +1,108 @@
+/*
+ *  arch/mips/emma2rh/common/irq.c
+ *      This file is common irq dispatcher.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <asm/i8259.h>
+#include <asm/system.h>
+#include <asm/mipsregs.h>
+#include <asm/debug.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/emma2rh/emma2rh.h>
+/*
+ * the first level int-handler will jump here if it is a emma2rh irq
+ */
+asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs)
+{
+        u32 intStatus;
+        u32 bitmask;
+        u32 i;
+        intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
+            & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
+#ifdef EMMA2RH_SW_CASCADE
+        if (intStatus &
+            (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+                u32 swIntStatus;
+                swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
+                    & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+                for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+                        if (swIntStatus & bitmask) {
+                                do_IRQ(EMMA2RH_SW_IRQ_BASE + i, regs);
+                                return;
+                        }
+                }
+        }
+#endif
+        for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+                if (intStatus & bitmask) {
+                        do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
+                        return;
+                }
+        }
+        intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
+            & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
+#ifdef EMMA2RH_GPIO_CASCADE
+        if (intStatus &
+            (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+                u32 gpioIntStatus;
+                gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
+                    & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+                for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+                        if (gpioIntStatus & bitmask) {
+                                do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i, regs);
+                                return;
+                        }
+                }
+        }
+#endif
+        for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
+                if (intStatus & bitmask) {
+                        do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
+                        return;
+                }
+        }
+        intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
+            & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
+        for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
+                if (intStatus & bitmask) {
+                        do_IRQ(EMMA2RH_IRQ_BASE + i, regs);
+                        return;
+                }
+        }
+}
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
new file mode 100644
index 000000000000..b886aa94ca90
--- /dev/null
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -0,0 +1,134 @@
+/*
+ *  arch/mips/emma2rh/common/irq_emma2rh.c
+ *      This file defines the irq handler for EMMA2RH.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+/*
+ * EMMA2RH defines 64 IRQs.
+ *
+ * This file exports one function:
+ *      emma2rh_irq_init(u32 irq_base);
+ */
+#include <linux/interrupt.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+/* number of total irqs supported by EMMA2RH */
+#define NUM_EMMA2RH_IRQ         96
+static int emma2rh_irq_base = -1;
+void ll_emma2rh_irq_enable(int);
+void ll_emma2rh_irq_disable(int);
+static void emma2rh_irq_enable(unsigned int irq)
+{
+        ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
+}
+static void emma2rh_irq_disable(unsigned int irq)
+{
+        ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
+}
+static unsigned int emma2rh_irq_startup(unsigned int irq)
+{
+        emma2rh_irq_enable(irq);
+        return 0;
+}
+#define emma2rh_irq_shutdown    emma2rh_irq_disable
+static void emma2rh_irq_ack(unsigned int irq)
+{
+        /* disable interrupt - some handler will re-enable the irq
+         * and if the interrupt is leveled, we will have infinite loop
+         */
+        ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
+}
+static void emma2rh_irq_end(unsigned int irq)
+{
+        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+                ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
+}
+hw_irq_controller emma2rh_irq_controller = {
+        .typename = "emma2rh_irq",
+        .startup = emma2rh_irq_startup,
+        .shutdown = emma2rh_irq_shutdown,
+        .enable = emma2rh_irq_enable,
+        .disable = emma2rh_irq_disable,
+        .ack = emma2rh_irq_ack,
+        .end = emma2rh_irq_end,
+        .set_affinity = NULL    /* no affinity stuff for UP */
+};
+void emma2rh_irq_init(u32 irq_base)
+{
+        u32 i;
+        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) {
+                irq_desc[i].status = IRQ_DISABLED;
+                irq_desc[i].action = NULL;
+                irq_desc[i].depth = 1;
+                irq_desc[i].handler = &emma2rh_irq_controller;
+        }
+        emma2rh_irq_base = irq_base;
+}
+void ll_emma2rh_irq_enable(int emma2rh_irq)
+{
+        u32 reg_value;
+        u32 reg_bitmask;
+        u32 reg_index;
+        reg_index = EMMA2RH_BHIF_INT_EN_0
+            + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
+            * (emma2rh_irq / 32);
+        reg_value = emma2rh_in32(reg_index);
+        reg_bitmask = 0x1 << (emma2rh_irq % 32);
+        db_assert((reg_value & reg_bitmask) == 0);
+        emma2rh_out32(reg_index, reg_value | reg_bitmask);
+}
+void ll_emma2rh_irq_disable(int emma2rh_irq)
+{
+        u32 reg_value;
+        u32 reg_bitmask;
+        u32 reg_index;
+        reg_index = EMMA2RH_BHIF_INT_EN_0
+            + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
+            * (emma2rh_irq / 32);
+        reg_value = emma2rh_in32(reg_index);
+        reg_bitmask = 0x1 << (emma2rh_irq % 32);
+        db_assert((reg_value & reg_bitmask) != 0);
+        emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
+}
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
new file mode 100644
index 000000000000..8bba0b02a204
--- /dev/null
+++ b/arch/mips/emma2rh/common/prom.c
@@ -0,0 +1,77 @@
+/*
+ *  arch/mips/emma2rh/common/prom.c
+ *      This file is prom file.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/common/prom.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/emma2rh/emma2rh.h>
+#include <asm/debug.h>
+const char *get_system_type(void)
+{
+        switch (mips_machtype) {
+        case MACH_NEC_MARKEINS:
+                return "NEC EMMA2RH Mark-eins";
+        default:
+                return "Unknown NEC board";
+        }
+}
+/* [jsun@junsun.net] PMON passes arguments in C main() style */
+void __init prom_init(void)
+{
+        int argc = fw_arg0;
+        char **arg = (char **)fw_arg1;
+        int i;
+        /* if user passes kernel args, ignore the default one */
+        if (argc > 1)
+                arcs_cmdline[0] = '\0';
+        /* arg[0] is "g", the rest is boot parameters */
+        for (i = 1; i < argc; i++) {
+                if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+                    >= sizeof(arcs_cmdline))
+                        break;
+                strcat(arcs_cmdline, arg[i]);
+                strcat(arcs_cmdline, " ");
+        }
+        mips_machgroup = MACH_GROUP_NEC_EMMA2RH;
+#if defined(CONFIG_MARKEINS)
+        mips_machtype = MACH_NEC_MARKEINS;
+        add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
+#endif
+}
+void __init prom_free_prom_memory(void)
+{
+}
diff --git a/arch/mips/emma2rh/markeins/Makefile b/arch/mips/emma2rh/markeins/Makefile
new file mode 100644
index 000000000000..14fc268b175c
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/Makefile
@@ -0,0 +1,13 @@
+#
+#  arch/mips/emma2rh/markeins/Makefile
+#       Makefile for the common code of NEC EMMA2RH based board.
+#
+#  Copyright (C) NEC Electronics Corporation 2005-2006
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 2 of the License, or
+#  (at your option) any later version.
+#
+obj-$(CONFIG_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c
new file mode 100644
index 000000000000..76dc3faeaf4e
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/irq.c
@@ -0,0 +1,134 @@
+/*
+ *  arch/mips/emma2rh/markeins/irq.c
+ *      This file defines the irq handler for EMMA2RH.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/delay.h>
+#include <asm/i8259.h>
+#include <asm/irq_cpu.h>
+#include <asm/system.h>
+#include <asm/mipsregs.h>
+#include <asm/debug.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/emma2rh/emma2rh.h>
+/*
+ * IRQ mapping
+ *
+ *  0-7: 8 CPU interrupts
+ *      0 -     software interrupt 0
+ *      1 -     software interrupt 1
+ *      2 -     most Vrc5477 interrupts are routed to this pin
+ *      3 -     (optional) some other interrupts routed to this pin for debugg
+ *      4 -     not used
+ *      5 -     not used
+ *      6 -     not used
+ *      7 -     cpu timer (used by default)
+ *
+ */
+extern void emma2rh_sw_irq_init(u32 base);
+extern void emma2rh_gpio_irq_init(u32 base);
+extern void emma2rh_irq_init(u32 base);
+extern asmlinkage void emma2rh_irq_dispatch(struct pt_regs *regs);
+static struct irqaction irq_cascade = {
+           .handler = no_action,
+           .flags = 0,
+           .mask = CPU_MASK_NONE,
+           .name = "cascade",
+           .dev_id = NULL,
+           .next = NULL,
+};
+void __init arch_init_irq(void)
+{
+        u32 reg;
+        db_run(printk("markeins_irq_setup invoked.\n"));
+        /* by default, interrupts are disabled. */
+        emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
+        emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
+        emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
+        emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
+        emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
+        emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
+        emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);
+        clear_c0_status(0xff00);
+        set_c0_status(0x0400);
+#define GPIO_PCI (0xf<<15)
+        /* setup GPIO interrupt for PCI interface */
+        /* direction input */
+        reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
+        emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
+        /* disable interrupt */
+        reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+        emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
+        /* level triggerd */
+        reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
+        emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
+        reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
+        emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
+        /* interrupt clear */
+        emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
+        /* init all controllers */
+        emma2rh_irq_init(EMMA2RH_IRQ_BASE);
+        emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
+        emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
+        mips_cpu_irq_init(CPU_IRQ_BASE);
+        /* setup cascade interrupts */
+        setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
+        setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
+        setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
+}
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+        unsigned int pending = read_c0_status() & read_c0_cause();
+        if (pending & STATUSF_IP7)
+                do_IRQ(CPU_IRQ_BASE + 7, regs);
+        else if (pending & STATUSF_IP2)
+                emma2rh_irq_dispatch(regs);
+        else if (pending & STATUSF_IP1)
+                do_IRQ(CPU_IRQ_BASE + 1, regs);
+        else if (pending & STATUSF_IP0)
+                do_IRQ(CPU_IRQ_BASE + 0, regs);
+        else
+                spurious_interrupt(regs);
+}
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
new file mode 100644
index 000000000000..1783fdab6459
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/irq_markeins.c
@@ -0,0 +1,197 @@
+/*
+ *  arch/mips/emma2rh/markeins/irq_markeins.c
+ *      This file defines the irq handler for Mark-eins.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+static int emma2rh_sw_irq_base = -1;
+static int emma2rh_gpio_irq_base = -1;
+void ll_emma2rh_sw_irq_enable(int reg);
+void ll_emma2rh_sw_irq_disable(int reg);
+void ll_emma2rh_gpio_irq_enable(int reg);
+void ll_emma2rh_gpio_irq_disable(int reg);
+static void emma2rh_sw_irq_enable(unsigned int irq)
+{
+        ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
+}
+static void emma2rh_sw_irq_disable(unsigned int irq)
+{
+        ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
+}
+static unsigned int emma2rh_sw_irq_startup(unsigned int irq)
+{
+        emma2rh_sw_irq_enable(irq);
+        return 0;
+}
+#define emma2rh_sw_irq_shutdown emma2rh_sw_irq_disable
+static void emma2rh_sw_irq_ack(unsigned int irq)
+{
+        ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
+}
+static void emma2rh_sw_irq_end(unsigned int irq)
+{
+        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+                ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
+}
+hw_irq_controller emma2rh_sw_irq_controller = {
+        .typename = "emma2rh_sw_irq",
+        .startup = emma2rh_sw_irq_startup,
+        .shutdown = emma2rh_sw_irq_shutdown,
+        .enable = emma2rh_sw_irq_enable,
+        .disable = emma2rh_sw_irq_disable,
+        .ack = emma2rh_sw_irq_ack,
+        .end = emma2rh_sw_irq_end,
+        .set_affinity = NULL,
+};
+void emma2rh_sw_irq_init(u32 irq_base)
+{
+        u32 i;
+        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++) {
+                irq_desc[i].status = IRQ_DISABLED;
+                irq_desc[i].action = NULL;
+                irq_desc[i].depth = 2;
+                irq_desc[i].handler = &emma2rh_sw_irq_controller;
+        }
+        emma2rh_sw_irq_base = irq_base;
+}
+void ll_emma2rh_sw_irq_enable(int irq)
+{
+        u32 reg;
+        db_assert(irq >= 0);
+        db_assert(irq < NUM_EMMA2RH_IRQ_SW);
+        reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+        reg |= 1 << irq;
+        emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+void ll_emma2rh_sw_irq_disable(int irq)
+{
+        u32 reg;
+        db_assert(irq >= 0);
+        db_assert(irq < 32);
+        reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+        reg &= ~(1 << irq);
+        emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+static void emma2rh_gpio_irq_enable(unsigned int irq)
+{
+        ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
+}
+static void emma2rh_gpio_irq_disable(unsigned int irq)
+{
+        ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
+}
+static unsigned int emma2rh_gpio_irq_startup(unsigned int irq)
+{
+        emma2rh_gpio_irq_enable(irq);
+        return 0;
+}
+#define emma2rh_gpio_irq_shutdown emma2rh_gpio_irq_disable
+static void emma2rh_gpio_irq_ack(unsigned int irq)
+{
+        irq -= emma2rh_gpio_irq_base;
+        emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
+        ll_emma2rh_gpio_irq_disable(irq);
+}
+static void emma2rh_gpio_irq_end(unsigned int irq)
+{
+        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+                ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
+}
+hw_irq_controller emma2rh_gpio_irq_controller = {
+        .typename = "emma2rh_gpio_irq",
+        .startup = emma2rh_gpio_irq_startup,
+        .shutdown = emma2rh_gpio_irq_shutdown,
+        .enable = emma2rh_gpio_irq_enable,
+        .disable = emma2rh_gpio_irq_disable,
+        .ack = emma2rh_gpio_irq_ack,
+        .end = emma2rh_gpio_irq_end,
+        .set_affinity = NULL,
+};
+void emma2rh_gpio_irq_init(u32 irq_base)
+{
+        u32 i;
+        for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) {
+                irq_desc[i].status = IRQ_DISABLED;
+                irq_desc[i].action = NULL;
+                irq_desc[i].depth = 2;
+                irq_desc[i].handler = &emma2rh_gpio_irq_controller;
+        }
+        emma2rh_gpio_irq_base = irq_base;
+}
+void ll_emma2rh_gpio_irq_enable(int irq)
+{
+        u32 reg;
+        db_assert(irq >= 0);
+        db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
+        reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+        reg |= 1 << irq;
+        emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
+void ll_emma2rh_gpio_irq_disable(int irq)
+{
+        u32 reg;
+        db_assert(irq >= 0);
+        db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
+        reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+        reg &= ~(1 << irq);
+        emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
diff --git a/arch/mips/emma2rh/markeins/led.c b/arch/mips/emma2rh/markeins/led.c
new file mode 100644
index 000000000000..b65254c1bfe9
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/led.c
@@ -0,0 +1,60 @@
+/*
+ *  arch/mips/emma2rh/markeins/led.c
+ *      This file defines the led display for Mark-eins.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <asm/emma2rh/emma2rh.h>
+const unsigned long clear = 0x20202020;
+#define LED_BASE 0xb1400038
+void markeins_led_clear(void)
+{
+        emma2rh_out32(LED_BASE, clear);
+        emma2rh_out32(LED_BASE + 4, clear);
+}
+void markeins_led(const char *str)
+{
+        int i;
+        int len = strlen(str);
+        markeins_led_clear();
+        if (len > 8)
+                len = 8;
+        if (emma2rh_in32(0xb0000800) & (0x1 << 18))
+                for (i = 0; i < len; i++)
+                        emma2rh_out8(LED_BASE + i, str[i]);
+        else
+                for (i = 0; i < len; i++)
+                        emma2rh_out8(LED_BASE + (i & 4) + (3 - (i & 3)),
+                                     str[i]);
+}
+void markeins_led_hex(u32 val)
+{
+        char str[10];
+        sprintf(str, "%08x", val);
+        markeins_led(str);
+}
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
new file mode 100644
index 000000000000..6c1eeae1a898
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/platform.c
@@ -0,0 +1,170 @@
+/*
+ *  arch/mips/emma2rh/markeins/platofrm.c
+ *      This file sets up platform devices for EMMA2RH Mark-eins.
+ *
+ *  Copyright(C) MontaVista Software Inc, 2006
+ *
+ *  Author: dmitry pervushin <dpervushin@ru.mvista.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/physmap.h>
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/time.h>
+#include <asm/bcache.h>
+#include <asm/irq.h>
+#include <asm/reboot.h>
+#include <asm/gdb-stub.h>
+#include <asm/traps.h>
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
+static struct resource i2c_emma_resources_0[] = {
+        { NULL, EMMA2RH_IRQ_PIIC0, EMMA2RH_IRQ_PIIC0, IORESOURCE_IRQ },
+        { NULL, KSEG1ADDR(EMMA2RH_PIIC0_BASE), KSEG1ADDR(EMMA2RH_PIIC0_BASE + 0x1000), 0 },
+};
+struct resource i2c_emma_resources_1[] = {
+        { NULL, EMMA2RH_IRQ_PIIC1, EMMA2RH_IRQ_PIIC1, IORESOURCE_IRQ },
+        { NULL, KSEG1ADDR(EMMA2RH_PIIC1_BASE), KSEG1ADDR(EMMA2RH_PIIC1_BASE + 0x1000), 0 },
+};
+struct resource i2c_emma_resources_2[] = {
+        { NULL, EMMA2RH_IRQ_PIIC2, EMMA2RH_IRQ_PIIC2, IORESOURCE_IRQ },
+        { NULL, KSEG1ADDR(EMMA2RH_PIIC2_BASE), KSEG1ADDR(EMMA2RH_PIIC2_BASE + 0x1000), 0 },
+};
+struct platform_device i2c_emma_devices[] = {
+        [0] = {
+                .name = I2C_EMMA2RH,
+                .id = 0,
+                .resource = i2c_emma_resources_0,
+                .num_resources = ARRAY_SIZE(i2c_emma_resources_0),
+        },
+        [1] = {
+                .name = I2C_EMMA2RH,
+                .id = 1,
+                .resource = i2c_emma_resources_1,
+                .num_resources = ARRAY_SIZE(i2c_emma_resources_1),
+        },
+        [2] = {
+                .name = I2C_EMMA2RH,
+                .id = 2,
+                .resource = i2c_emma_resources_2,
+                .num_resources = ARRAY_SIZE(i2c_emma_resources_2),
+        },
+};
+#define EMMA2RH_SERIAL_CLOCK 18544000
+#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
+static struct  plat_serial8250_port platform_serial_ports[] = {
+       [0] = {
+         .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
+         .irq = EMMA2RH_IRQ_PFUR0,
+         .uartclk = EMMA2RH_SERIAL_CLOCK,
+         .regshift = 4,
+         .iotype = UPIO_MEM,
+         .flags = EMMA2RH_SERIAL_FLAGS,
+       },
+       [1] = {
+         .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
+         .irq = EMMA2RH_IRQ_PFUR1,
+         .uartclk = EMMA2RH_SERIAL_CLOCK,
+         .regshift = 4,
+         .iotype = UPIO_MEM,
+         .flags = EMMA2RH_SERIAL_FLAGS,
+       },
+       [2] = {
+         .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
+         .irq = EMMA2RH_IRQ_PFUR2,
+         .uartclk = EMMA2RH_SERIAL_CLOCK,
+         .regshift = 4,
+         .iotype = UPIO_MEM,
+         .flags = EMMA2RH_SERIAL_FLAGS,
+       },
+       [3] = {
+         .flags = 0,
+       },
+};
+static struct  platform_device serial_emma = {
+        .name = "serial8250",
+        .dev = {
+                .platform_data = &platform_serial_ports,
+        },
+};
+static struct platform_device *devices[] = {
+        &i2c_emma_devices[0],
+        &i2c_emma_devices[1],
+        &i2c_emma_devices[2],
+        &serial_emma,
+};
+static struct mtd_partition markeins_parts[] = {
+        [0] = {
+                .name = "RootFS",
+                .offset = 0x00000000,
+                .size = 0x00c00000,
+        },
+        [1] = {
+                .name = "boot code area",
+                .offset = MTDPART_OFS_APPEND,
+                .size = 0x00100000,
+        },
+        [2] = {
+                .name = "kernel image",
+                .offset = MTDPART_OFS_APPEND,
+                .size = 0x00300000,
+        },
+        [3] = {
+                .name = "RootFS2",
+                .offset = MTDPART_OFS_APPEND,
+                .size = 0x00c00000,
+        },
+        [4] = {
+                .name = "boot code area2",
+                .offset = MTDPART_OFS_APPEND,
+                .size = 0x00100000,
+        },
+        [5] = {
+                .name = "kernel image2",
+                .offset = MTDPART_OFS_APPEND,
+                .size = MTDPART_SIZ_FULL,
+        },
+};
+static int __init platform_devices_setup(void)
+{
+        physmap_set_partitions(markeins_parts, ARRAY_SIZE(markeins_parts));
+        return platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+arch_initcall(platform_devices_setup);
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
new file mode 100644
index 000000000000..7d98fdbf8390
--- /dev/null
+++ b/arch/mips/emma2rh/markeins/setup.c
@@ -0,0 +1,182 @@
+/*
+ *  arch/mips/emma2rh/markeins/setup.c
+ *      This file is setup for EMMA2RH Mark-eins.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c.
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/initrd.h>
+#include <linux/irq.h>
+#include <linux/ide.h>
+#include <linux/ioport.h>
+#include <linux/param.h>        /* for HZ */
+#include <linux/root_dev.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/time.h>
+#include <asm/bcache.h>
+#include <asm/irq.h>
+#include <asm/reboot.h>
+#include <asm/gdb-stub.h>
+#include <asm/traps.h>
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+#define USE_CPU_COUNTER_TIMER   /* whether we use cpu counter */
+extern void markeins_led(const char *);
+static int bus_frequency = 0;
+static void markeins_machine_restart(char *command)
+{
+        static void (*back_to_prom) (void) = (void (*)(void))0xbfc00000;
+        printk("cannot EMMA2RH Mark-eins restart.\n");
+        markeins_led("restart.");
+        back_to_prom();
+}
+static void markeins_machine_halt(void)
+{
+        printk("EMMA2RH Mark-eins halted.\n");
+        markeins_led("halted.");
+        while (1) ;
+}
+static void markeins_machine_power_off(void)
+{
+        printk("EMMA2RH Mark-eins halted. Please turn off the power.\n");
+        markeins_led("poweroff.");
+        while (1) ;
+}
+static unsigned long clock[4] = { 166500000, 187312500, 199800000, 210600000 };
+static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
+{
+        u32 reg;
+        /* detect from boot strap */
+        reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
+        reg = (reg >> 4) & 0x3;
+        return clock[reg];
+}
+static void __init emma2rh_time_init(void)
+{
+        u32 reg;
+        if (bus_frequency == 0)
+                bus_frequency = detect_bus_frequency(0);
+        reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
+        if ((reg & 0x3) == 0)
+                reg = (reg >> 6) & 0x3;
+        else {
+                reg = emma2rh_in32(EMMA2RH_BHIF_MAIN_CTRL);
+                reg = (reg >> 4) & 0x3;
+        }
+        mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
+}
+static void __init emma2rh_timer_setup(struct irqaction *irq)
+{
+        /* we are using the cpu counter for timer interrupts */
+        setup_irq(CPU_IRQ_BASE + 7, irq);
+}
+static void markeins_board_init(void);
+extern void markeins_irq_setup(void);
+static void inline __init markeins_sio_setup(void)
+{
+#ifdef CONFIG_KGDB_8250
+        struct uart_port emma_port;
+        memset(&emma_port, 0, sizeof(emma_port));
+        emma_port.flags =
+            UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
+        emma_port.iotype = UPIO_MEM;
+        emma_port.regshift = 4; /* I/O addresses are every 8 bytes */
+        emma_port.uartclk = 18544000;   /* Clock rate of the chip */
+        emma_port.line = 0;
+        emma_port.mapbase = KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3);
+        emma_port.membase = (u8*)emma_port.mapbase;
+        early_serial_setup(&emma_port);
+        emma_port.line = 1;
+        emma_port.mapbase = KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3);
+        emma_port.membase = (u8*)emma_port.mapbase;
+        early_serial_setup(&emma_port);
+        emma_port.irq = EMMA2RH_IRQ_PFUR1;
+        kgdb8250_add_port(1, &emma_port);
+#endif
+}
+void __init plat_mem_setup(void)
+{
+        /* initialize board - we don't trust the loader */
+        markeins_board_init();
+        set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE));
+        board_time_init = emma2rh_time_init;
+        board_timer_setup = emma2rh_timer_setup;
+        _machine_restart = markeins_machine_restart;
+        _machine_halt = markeins_machine_halt;
+        pm_power_off = markeins_machine_power_off;
+        /* setup resource limits */
+        ioport_resource.start = EMMA2RH_PCI_IO_BASE;
+        ioport_resource.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1;
+        iomem_resource.start = EMMA2RH_IO_BASE;
+        iomem_resource.end = EMMA2RH_ROM_BASE - 1;
+        /* Reboot on panic */
+        panic_timeout = 180;
+        markeins_sio_setup();
+}
+static void __init markeins_board_init(void)
+{
+        u32 val;
+        val = emma2rh_in32(EMMA2RH_PBRD_INT_EN);        /* open serial interrupts. */
+        emma2rh_out32(EMMA2RH_PBRD_INT_EN, val | 0xaa);
+        val = emma2rh_in32(EMMA2RH_PBRD_CLKSEL);        /* set serial clocks. */
+        emma2rh_out32(EMMA2RH_PBRD_CLKSEL, val | 0x5);  /* 18MHz */
+        emma2rh_out32(EMMA2RH_PCI_CONTROL, 0);
+        markeins_led("MVL E2RH");
+}
diff --git a/arch/mips/galileo-boards/ev96100/setup.c b/arch/mips/galileo-boards/ev96100/setup.c
index 78dbb18edeb8..a04aea6123da 100644
--- a/arch/mips/galileo-boards/ev96100/setup.c
+++ b/arch/mips/galileo-boards/ev96100/setup.c
@@ -55,7 +55,7 @@ extern void mips_reboot_setup(void);
 unsigned char mac_0_1[12];
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        unsigned int config = read_c0_config();
        unsigned int status = read_c0_status();
diff --git a/arch/mips/gt64120/ev64120/serialGT.c b/arch/mips/gt64120/ev64120/serialGT.c
index 16e34a546e54..8f0d835491ff 100644
--- a/arch/mips/gt64120/ev64120/serialGT.c
+++ b/arch/mips/gt64120/ev64120/serialGT.c
@@ -149,7 +149,7 @@ void serial_set(int channel, unsigned long baud)
 #else
        /*
         * Note: Set baud rate, hardcoded here for rate of 115200
-         * since became unsure of above "buad rate" algorithm (??).
+         * since became unsure of above "baud rate" algorithm (??).
         */
        outreg(channel, LCR, 0x83);
        outreg(channel, DLM, 0x00);     // See note above
diff --git a/arch/mips/gt64120/ev64120/setup.c b/arch/mips/gt64120/ev64120/setup.c
index 6d859d1e7a2d..4236da31ecc6 100644
--- a/arch/mips/gt64120/ev64120/setup.c
+++ b/arch/mips/gt64120/ev64120/setup.c
@@ -71,7 +71,7 @@ unsigned long __init prom_free_prom_memory(void)
 */
 extern void gt64120_time_init(void);
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        _machine_restart = galileo_machine_restart;
        _machine_halt = galileo_machine_halt;
diff --git a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
index 8720bccfdea2..f0a6a38fcf4d 100644
--- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c
+++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-        /* set up buad rate */
+        /* set up baud rate */
        {
                uint32 divisor;
diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c
index 20b65d3d2151..1193a22c4693 100644
--- a/arch/mips/gt64120/momenco_ocelot/setup.c
+++ b/arch/mips/gt64120/momenco_ocelot/setup.c
@@ -152,7 +152,7 @@ void PMON_v2_setup()
        gt64120_base = 0xe0000000;
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
        unsigned int tmpword;
diff --git a/arch/mips/gt64120/wrppmc/Makefile b/arch/mips/gt64120/wrppmc/Makefile
new file mode 100644
index 000000000000..72606b9af12a
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/Makefile
@@ -0,0 +1,14 @@
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright 2006 Wind River System, Inc.
+# Author: Rongkai.Zhan <rongkai.zhan@windriver.com>
+#
+# Makefile for the Wind River MIPS 4KC PPMC Eval Board
+#
+obj-y   += int-handler.o irq.o reset.o setup.o time.o pci.o
+EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/gt64120/wrppmc/int-handler.S b/arch/mips/gt64120/wrppmc/int-handler.S
new file mode 100644
index 000000000000..edee7b394175
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/int-handler.S
@@ -0,0 +1,59 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
+ * Copyright (C) Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
+ */
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+#include <asm/mach-wrppmc/mach-gt64120.h>
+        .align  5
+        .set    noat
+NESTED(handle_IRQ, PT_SIZE, sp)
+        SAVE_ALL
+        CLI                             # Important: mark KERNEL mode !
+        .set    at
+        mfc0    t0, CP0_CAUSE           # get pending interrupts
+        mfc0    t1, CP0_STATUS          # get enabled interrupts
+        and     t0, t0, t1              # get allowed interrupts
+        andi    t0, t0, 0xFF00
+        beqz    t0, 1f
+        move    a1, sp                  # Prepare 'struct pt_regs *regs' pointer
+        andi    t1, t0, CAUSEF_IP7      # CPU Compare/Count internal timer
+        bnez    t1, handle_cputimer_irq
+        andi    t1, t0, CAUSEF_IP6      # UART 16550 port
+        bnez    t1, handle_uart_irq
+        andi    t1, t0, CAUSEF_IP3      # PCI INT_A
+        bnez    t1, handle_pci_intA_irq
+        /* wrong alarm or masked ... */
+1:      j       spurious_interrupt
+        nop
+END(handle_IRQ)
+        .align  5
+handle_cputimer_irq:
+        li      a0, WRPPMC_MIPS_TIMER_IRQ
+        jal     do_IRQ
+        j       ret_from_irq
+        .align  5
+handle_uart_irq:
+        li      a0, WRPPMC_UART16550_IRQ
+        jal     do_IRQ
+        j       ret_from_irq
+        .align  5
+handle_pci_intA_irq:
+        li      a0, WRPPMC_PCI_INTA_IRQ
+        jal     do_IRQ
+        j       ret_from_irq
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
new file mode 100644
index 000000000000..8605687e24ed
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -0,0 +1,63 @@
+/*
+ * irq.c: GT64120 Interrupt Controller
+ *
+ * Copyright (C) 2006, Wind River System Inc.
+ * Author: Rongkai.Zhan, <rongkai.zhan@windriver.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/bitops.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+#include <asm/irq_cpu.h>
+#include <asm/gt64120.h>
+extern asmlinkage void handle_IRQ(void);
+/**
+ * Initialize GT64120 Interrupt Controller
+ */
+void gt64120_init_pic(void)
+{
+        /* clear CPU Interrupt Cause Registers */
+        GT_WRITE(GT_INTRCAUSE_OFS, (0x1F << 21));
+        GT_WRITE(GT_HINTRCAUSE_OFS, 0x00);
+        /* Disable all interrupts from GT64120 bridge chip */
+        GT_WRITE(GT_INTRMASK_OFS, 0x00);
+        GT_WRITE(GT_HINTRMASK_OFS, 0x00);
+        GT_WRITE(GT_PCI0_ICMASK_OFS, 0x00);
+        GT_WRITE(GT_PCI0_HICMASK_OFS, 0x00);
+}
+void __init arch_init_irq(void)
+{
+        /* enable all CPU interrupt bits. */
+        set_c0_status(ST0_IM);  /* IE bit is still 0 */
+        /* Install MIPS Interrupt Trap Vector */
+        set_except_vector(0, handle_IRQ);
+        /* IRQ 0 - 7 are for MIPS common irq_cpu controller */
+        mips_cpu_irq_init(0);
+        gt64120_init_pic();
+}
diff --git a/arch/mips/gt64120/wrppmc/pci.c b/arch/mips/gt64120/wrppmc/pci.c
new file mode 100644
index 000000000000..2fbe93467f78
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/pci.c
@@ -0,0 +1,53 @@
+/*
+ * pci.c: GT64120 PCI support.
+ *
+ * Copyright (C) 2006, Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <asm/gt64120.h>
+extern struct pci_ops gt64120_pci_ops;
+static struct resource pci0_io_resource = {
+        .name  = "pci_0 io",
+        .start = GT_PCI_IO_BASE,
+        .end   = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1,
+        .flags = IORESOURCE_IO,
+};
+static struct resource pci0_mem_resource = {
+        .name  = "pci_0 memory",
+        .start = GT_PCI_MEM_BASE,
+        .end   = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1,
+        .flags = IORESOURCE_MEM,
+};
+static struct pci_controller hose_0 = {
+        .pci_ops        = &gt64120_pci_ops,
+        .io_resource    = &pci0_io_resource,
+        .mem_resource   = &pci0_mem_resource,
+};
+static int __init gt64120_pci_init(void)
+{
+        u32 tmp;
+        tmp = GT_READ(GT_PCI0_CMD_OFS);         /* Huh??? -- Ralf  */
+        tmp = GT_READ(GT_PCI0_BARE_OFS);
+        /* reset the whole PCI I/O space range */
+        ioport_resource.start = GT_PCI_IO_BASE;
+        ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
+        register_pci_controller(&hose_0);
+        return 0;
+}
+arch_initcall(gt64120_pci_init);
diff --git a/arch/mips/gt64120/wrppmc/reset.c b/arch/mips/gt64120/wrppmc/reset.c
new file mode 100644
index 000000000000..b97039c6d3db
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/reset.c
@@ -0,0 +1,50 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1997 Ralf Baechle
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+#include <asm/cacheflush.h>
+void wrppmc_machine_restart(char *command)
+{
+        /*
+         * Ouch, we're still alive ... This time we take the silver bullet ...
+         * ... and find that we leave the hardware in a state in which the
+         * kernel in the flush locks up somewhen during of after the PCI
+         * detection stuff.
+         */
+        local_irq_disable();
+        set_c0_status(ST0_BEV | ST0_ERL);
+        change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+        flush_cache_all();
+        write_c0_wired(0);
+        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
+}
+void wrppmc_machine_halt(void)
+{
+        local_irq_disable();
+        printk(KERN_NOTICE "You can safely turn off the power\n");
+        while (1) {
+                __asm__(
+                        ".set\tmips3\n\t"
+                        "wait\n\t"
+                        ".set\tmips0"
+                );
+        }
+}
+void wrppmc_machine_power_off(void)
+{
+        wrppmc_machine_halt();
+}
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
new file mode 100644
index 000000000000..20c591e49dae
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -0,0 +1,173 @@
+/*
+ * setup.c: Setup pointers to hardware dependent routines.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2006, Wind River System Inc. Rongkai.zhan <rongkai.zhan@windriver.com>
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/pm.h>
+#include <asm/io.h>
+#include <asm/bootinfo.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/gt64120.h>
+unsigned long gt64120_base = KSEG1ADDR(0x14000000);
+#ifdef WRPPMC_EARLY_DEBUG
+static volatile unsigned char * wrppmc_led = \
+        (volatile unsigned char *)KSEG1ADDR(WRPPMC_LED_BASE);
+/*
+ * PPMC LED control register:
+ * -) bit[0] controls DS1 LED (1 - OFF, 0 - ON)
+ * -) bit[1] controls DS2 LED (1 - OFF, 0 - ON)
+ * -) bit[2] controls DS4 LED (1 - OFF, 0 - ON)
+ */
+void wrppmc_led_on(int mask)
+{
+        unsigned char value = *wrppmc_led;
+        value &= (0xF8 | mask);
+        *wrppmc_led = value;
+}
+/* If mask = 0, turn off all LEDs */
+void wrppmc_led_off(int mask)
+{
+        unsigned char value = *wrppmc_led;
+        value |= (0x7 & mask);
+        *wrppmc_led = value;
+}
+/*
+ * We assume that bootloader has initialized UART16550 correctly
+ */
+void __init wrppmc_early_putc(char ch)
+{
+        static volatile unsigned char *wrppmc_uart = \
+                (volatile unsigned char *)KSEG1ADDR(WRPPMC_UART16550_BASE);
+        unsigned char value;
+        /* Wait until Transmit-Holding-Register is empty */
+        while (1) {
+                value = *(wrppmc_uart + 5);
+                if (value & 0x20)
+                        break;
+        }
+        *wrppmc_uart = ch;
+}
+void __init wrppmc_early_printk(const char *fmt, ...)
+{
+        static char pbuf[256] = {'\0', };
+        char *ch = pbuf;
+        va_list args;
+        unsigned int i;
+        memset(pbuf, 0, 256);
+        va_start(args, fmt);
+        i = vsprintf(pbuf, fmt, args);
+        va_end(args);
+        /* Print the string */
+        while (*ch != '\0') {
+                wrppmc_early_putc(*ch);
+                /* if print '\n', also print '\r' */
+                if (*ch++ == '\n')
+                        wrppmc_early_putc('\r');
+        }
+}
+#endif /* WRPPMC_EARLY_DEBUG */
+unsigned long __init prom_free_prom_memory(void)
+{
+        return 0;
+}
+#ifdef CONFIG_SERIAL_8250
+static void wrppmc_setup_serial(void)
+{
+        struct uart_port up;
+        memset(&up, 0x00, sizeof(struct uart_port));
+        /*
+         * A note about mapbase/membase
+         * -) mapbase is the physical address of the IO port.
+         * -) membase is an 'ioremapped' cookie.
+         */
+        up.line = 0;
+        up.type = PORT_16550;
+        up.iotype = UPIO_MEM;
+        up.mapbase = WRPPMC_UART16550_BASE;
+        up.membase = ioremap(up.mapbase, 8);
+        up.irq = WRPPMC_UART16550_IRQ;
+        up.uartclk = WRPPMC_UART16550_CLOCK;
+        up.flags = UPF_SKIP_TEST/* | UPF_BOOT_AUTOCONF */;
+        up.regshift = 0;
+        early_serial_setup(&up);
+}
+#endif
+void __init plat_setup(void)
+{
+        extern void wrppmc_time_init(void);
+        extern void wrppmc_timer_setup(struct irqaction *);
+        extern void wrppmc_machine_restart(char *command);
+        extern void wrppmc_machine_halt(void);
+        extern void wrppmc_machine_power_off(void);
+        _machine_restart = wrppmc_machine_restart;
+        _machine_halt    = wrppmc_machine_halt;
+        pm_power_off     = wrppmc_machine_power_off;
+        /* Use MIPS Count/Compare Timer */
+        board_time_init   = wrppmc_time_init;
+        board_timer_setup = wrppmc_timer_setup;
+        /* This makes the operations of 'in/out[bwl]' to the
+         * physical address ( < KSEG0) can work via KSEG1
+         */
+        set_io_port_base(KSEG1);
+#ifdef CONFIG_SERIAL_8250
+        wrppmc_setup_serial();
+#endif
+}
+const char *get_system_type(void)
+{
+        return "Wind River PPMC (GT64120)";
+}
+/*
+ * Initializes basic routines and structures pointers, memory size (as
+ * given by the bios and saves the command line.
+ */
+void __init prom_init(void)
+{
+        mips_machgroup = MACH_GROUP_GALILEO;
+        mips_machtype = MACH_EV64120A;
+        add_memory_region(WRPPMC_SDRAM_SCS0_BASE, WRPPMC_SDRAM_SCS0_SIZE, BOOT_MEM_RAM);
+        add_memory_region(WRPPMC_BOOTROM_BASE, WRPPMC_BOOTROM_SIZE, BOOT_MEM_ROM_DATA);
+        wrppmc_early_printk("prom_init: GT64120 SDRAM Bank 0: 0x%x - 0x%08lx\n",
+                        WRPPMC_SDRAM_SCS0_BASE, (WRPPMC_SDRAM_SCS0_BASE + WRPPMC_SDRAM_SCS0_SIZE));
+}
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c
new file mode 100644
index 000000000000..175d22adb450
--- /dev/null
+++ b/arch/mips/gt64120/wrppmc/time.c
@@ -0,0 +1,57 @@
+/*
+ * time.c: MIPS CPU Count/Compare timer hookup
+ *
+ * Author: Mark.Zhan, <rongkai.zhan@windriver.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2006, Wind River System Inc.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/param.h>        /* for HZ */
+#include <linux/irq.h>
+#include <linux/timex.h>
+#include <linux/interrupt.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/bootinfo.h>
+#include <asm/gt64120.h>
+#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
+void __init wrppmc_timer_setup(struct irqaction *irq)
+{
+        /* Install ISR for timer interrupt */
+        setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq);
+        /* to generate the first timer interrupt */
+        write_c0_compare(mips_hpt_frequency/HZ);
+        write_c0_count(0);
+}
+/*
+ * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect
+ *
+ * NOTE: We disable all GT64120 timers, and use MIPS processor internal
+ * timer as the source of kernel clock tick.
+ */
+void __init wrppmc_time_init(void)
+{
+        /* Disable GT64120 timers */
+        GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
+        GT_WRITE(GT_TC0_OFS, 0x00);
+        GT_WRITE(GT_TC1_OFS, 0x00);
+        GT_WRITE(GT_TC2_OFS, 0x00);
+        GT_WRITE(GT_TC3_OFS, 0x00);
+        /* Use MIPS compare/count internal timer */
+        mips_hpt_frequency = WRPPMC_CPU_CLK_FREQ;
+}
diff --git a/arch/mips/ite-boards/generic/dbg_io.c b/arch/mips/ite-boards/generic/dbg_io.c
index c4f8530fd07e..6a7ccaf93502 100644
--- a/arch/mips/ite-boards/generic/dbg_io.c
+++ b/arch/mips/ite-boards/generic/dbg_io.c
@@ -72,7 +72,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-        /* set up buad rate */
+        /* set up baud rate */
        {
                uint32 divisor;
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
index fc73c8d69df7..da6ae0991199 100644
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ b/arch/mips/ite-boards/generic/it8172_setup.c
@@ -72,11 +72,29 @@ struct {
    struct resource flash;
    struct resource boot;
 } it8172_resources = {
-    { "RAM",           0,          0,          IORESOURCE_MEM }, /* to be initted */
+        {
-    { "PCI Mem",       0x10000000, 0x13FFFFFF, IORESOURCE_MEM },
+                .start  = 0,                            /* to be initted */
-    { "PCI I/O",       0x14000000, 0x17FFFFFF                 },
+                .end    = 0,
-    { "Flash",         0x08000000, 0x0CFFFFFF                 },
+                .name   = "RAM",
-    { "Boot ROM",      0x1FC00000, 0x1FFFFFFF                 }
+                .flags  = IORESOURCE_MEM
+        }, {
+                .start  = 0x10000000,
+                .end    = 0x13FFFFFF,
+                .name   = "PCI Mem",
+                .flags  = IORESOURCE_MEM
+        }, {
+                .start  = 0x14000000,
+                .end    = 0x17FFFFFF
+                .name   = "PCI I/O",
+        }, {
+                .start  = 0x08000000,
+                .end    = 0x0CFFFFFF
+                .name   = "Flash",
+        }, {
+                .start  = 0x1FC00000,
+                .end    = 0x1FFFFFFF
+                .name   = "Boot ROM",
+        }
 };
 #else
 struct {
@@ -89,14 +107,44 @@ struct {
    struct resource flash;
    struct resource boot;
 } it8172_resources = {
-    { "RAM",           0,          0,          IORESOURCE_MEM }, /* to be initted */
+        {
-    { "PCI Mem0",      0x0C000000, 0x0FFFFFFF, IORESOURCE_MEM },
+                .start  = 0,                            /* to be initted */
-    { "PCI Mem1",      0x10000000, 0x13FFFFFF, IORESOURCE_MEM },
+                .end    = 0,
-    { "PCI I/O",       0x14000000, 0x17FFFFFF                 },
+                .name   = "RAM",
-    { "PCI Mem2",      0x1A000000, 0x1BFFFFFF, IORESOURCE_MEM },
+                .flags  = IORESOURCE_MEM
-    { "PCI Mem3",      0x1C000000, 0x1FBFFFFF, IORESOURCE_MEM },
+        }, {
-    { "Flash",         0x08000000, 0x0CFFFFFF                 },
+                .start  = 0x0C000000,
-    { "Boot ROM",      0x1FC00000, 0x1FFFFFFF                 }
+                .end    = 0x0FFFFFFF,
+                .name   = "PCI Mem0",
+                .flags  = IORESOURCE_MEM
+         }, {
+                .start  = 0x10000000,
+                .end    = 0x13FFFFFF,
+                .name   = "PCI Mem1",
+                .flags  = IORESOURCE_MEM
+         }, {
+                .start  = 0x14000000,
+                .end    = 0x17FFFFFF
+                .name   = "PCI I/O",
+        }, {
+                .start  = 0x1A000000,
+                .end    = 0x1BFFFFFF,
+                .name   = "PCI Mem2",
+                .flags  = IORESOURCE_MEM
+        }, {
+                .start  = 0x1C000000,
+                .end    = 0x1FBFFFFF,
+                .name   = "PCI Mem3",
+                .flags  = IORESOURCE_MEM
+        }, {
+                .start  = 0x08000000,
+                .end    = 0x0CFFFFFF
+                .name   = "Flash",
+        }, {
+                .start  = 0x1FC00000,
+                .end    = 0x1FFFFFFF
+                .name   = "Boot ROM",
+        }
 };
 #endif
@@ -106,7 +154,7 @@ void __init it8172_init_ram_resource(unsigned long memsize)
        it8172_resources.ram.end = memsize;
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        unsigned short dsr;
        char *argptr;
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index 4036dc434551..c8d0df7d0c36 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -52,7 +52,7 @@ static struct resource jazz_io_resources[] = {
        { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
 };
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        int i;
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 9359cc413494..308e6cdcd245 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -82,17 +82,54 @@ struct {
    struct resource sio0;
    struct resource sio1;
 } jmr3927_resources = {
-    { "RAM0",           0,         0x01FFFFFF,  IORESOURCE_MEM },
+        {
-    { "RAM1",          0x02000000, 0x03FFFFFF,  IORESOURCE_MEM },
+                .start  = 0,
-    { "PCIMEM",        0x08000000, 0x07FFFFFF,  IORESOURCE_MEM },
+                .end    = 0x01FFFFFF,
-    { "IOB",           0x10000000, 0x13FFFFFF                  },
+                .name   = "RAM0",
-    { "IOC",           0x14000000, 0x14FFFFFF                  },
+                .flags = IORESOURCE_MEM
-    { "PCIIO",         0x15000000, 0x15FFFFFF                  },
+        }, {
-    { "JMY1394",       0x1D000000, 0x1D3FFFFF                  },
+                .start  = 0x02000000,
-    { "ROM1",          0x1E000000, 0x1E3FFFFF                  },
+                .end    = 0x03FFFFFF,
-    { "ROM0",          0x1FC00000, 0x1FFFFFFF                  },
+                .name   = "RAM1",
-    { "SIO0",          0xFFFEF300, 0xFFFEF3FF                  },
+                .flags = IORESOURCE_MEM
-    { "SIO1",          0xFFFEF400, 0xFFFEF4FF                  },
+        }, {
+                .start  = 0x08000000,
+                .end    = 0x07FFFFFF,
+                .name   = "PCIMEM",
+                .flags = IORESOURCE_MEM
+        }, {
+                .start  = 0x10000000,
+                .end    = 0x13FFFFFF,
+                .name   = "IOB"
+        }, {
+                .start  = 0x14000000,
+                .end    = 0x14FFFFFF,
+                .name   = "IOC"
+        }, {
+                .start  = 0x15000000,
+                .end    = 0x15FFFFFF,
+                .name   = "PCIIO"
+        }, {
+                .start  = 0x1D000000,
+                .end    = 0x1D3FFFFF,
+                .name   = "JMY1394"
+        }, {
+                .start  = 0x1E000000,
+                .end    = 0x1E3FFFFF,
+                .name   = "ROM1"
+        }, {
+                .start  = 0x1FC00000,
+                .end    = 0x1FFFFFFF,
+                .name   = "ROM0"
+        }, {
+                .start  = 0xFFFEF300,
+                .end    = 0xFFFEF3FF,
+                .name   = "SIO0"
+        }, {
+                .start  = 0xFFFEF400,
+                .end    = 0xFFFEF4FF,
+                .name   = "SIO1"
+        },
 };
 /* don't enable - see errata */
@@ -201,7 +238,7 @@ static void jmr3927_board_init(void);
 extern struct resource pci_io_resource;
 extern struct resource pci_mem_resource;
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        char *argptr;
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 34e8a256765c..881c467c6982 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -13,6 +13,8 @@ binfmt_irix-objs	:= irixelf.o irixinv.o irixioctl.o irixsig.o	\
 obj-$(CONFIG_MODULES)           += mips_ksyms.o module.o
+obj-$(CONFIG_APM)               += apm.o
 obj-$(CONFIG_CPU_R3000)         += r2300_fpu.o r2300_switch.o
 obj-$(CONFIG_CPU_TX39XX)        += r2300_fpu.o r2300_switch.o
 obj-$(CONFIG_CPU_TX49XX)        += r4k_fpu.o r4k_switch.o
diff --git a/arch/mips/kernel/apm.c b/arch/mips/kernel/apm.c
new file mode 100644
index 000000000000..15f46b4471fd
--- /dev/null
+++ b/arch/mips/kernel/apm.c
@@ -0,0 +1,605 @@
+/*
+ * bios-less APM driver for MIPS Linux
+ *  Jamey Hicks <jamey@crl.dec.com>
+ *  adapted from the APM BIOS driver for Linux by Stephen Rothwell (sfr@linuxcare.com)
+ *
+ * APM 1.2 Reference:
+ *   Intel Corporation, Microsoft Corporation. Advanced Power Management
+ *   (APM) BIOS Interface Specification, Revision 1.2, February 1996.
+ *
+ * [This document is available from Microsoft at:
+ *    http://www.microsoft.com/hwdev/busbios/amp_12.htm]
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/poll.h>
+#include <linux/timer.h>
+#include <linux/slab.h>
+#include <linux/proc_fs.h>
+#include <linux/miscdevice.h>
+#include <linux/apm_bios.h>
+#include <linux/capability.h>
+#include <linux/sched.h>
+#include <linux/pm.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/init.h>
+#include <linux/completion.h>
+#include <asm/apm.h> /* apm_power_info */
+#include <asm/system.h>
+/*
+ * The apm_bios device is one of the misc char devices.
+ * This is its minor number.
+ */
+#define APM_MINOR_DEV   134
+/*
+ * See Documentation/Config.help for the configuration options.
+ *
+ * Various options can be changed at boot time as follows:
+ * (We allow underscores for compatibility with the modules code)
+ *      apm=on/off                      enable/disable APM
+ */
+/*
+ * Maximum number of events stored
+ */
+#define APM_MAX_EVENTS          16
+struct apm_queue {
+        unsigned int            event_head;
+        unsigned int            event_tail;
+        apm_event_t             events[APM_MAX_EVENTS];
+};
+/*
+ * The per-file APM data
+ */
+struct apm_user {
+        struct list_head        list;
+        unsigned int            suser: 1;
+        unsigned int            writer: 1;
+        unsigned int            reader: 1;
+        int                     suspend_result;
+        unsigned int            suspend_state;
+#define SUSPEND_NONE    0               /* no suspend pending */
+#define SUSPEND_PENDING 1               /* suspend pending read */
+#define SUSPEND_READ    2               /* suspend read, pending ack */
+#define SUSPEND_ACKED   3               /* suspend acked */
+#define SUSPEND_DONE    4               /* suspend completed */
+        struct apm_queue        queue;
+};
+/*
+ * Local variables
+ */
+static int suspends_pending;
+static int apm_disabled;
+static int mips_apm_active;
+static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue);
+static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue);
+/*
+ * This is a list of everyone who has opened /dev/apm_bios
+ */
+static DECLARE_RWSEM(user_list_lock);
+static LIST_HEAD(apm_user_list);
+/*
+ * kapmd info.  kapmd provides us a process context to handle
+ * "APM" events within - specifically necessary if we're going
+ * to be suspending the system.
+ */
+static DECLARE_WAIT_QUEUE_HEAD(kapmd_wait);
+static DECLARE_COMPLETION(kapmd_exit);
+static DEFINE_SPINLOCK(kapmd_queue_lock);
+static struct apm_queue kapmd_queue;
+static const char driver_version[] = "1.13";    /* no spaces */
+/*
+ * Compatibility cruft until the IPAQ people move over to the new
+ * interface.
+ */
+static void __apm_get_power_status(struct apm_power_info *info)
+{
+}
+/*
+ * This allows machines to provide their own "apm get power status" function.
+ */
+void (*apm_get_power_status)(struct apm_power_info *) = __apm_get_power_status;
+EXPORT_SYMBOL(apm_get_power_status);
+/*
+ * APM event queue management.
+ */
+static inline int queue_empty(struct apm_queue *q)
+{
+        return q->event_head == q->event_tail;
+}
+static inline apm_event_t queue_get_event(struct apm_queue *q)
+{
+        q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS;
+        return q->events[q->event_tail];
+}
+static void queue_add_event(struct apm_queue *q, apm_event_t event)
+{
+        q->event_head = (q->event_head + 1) % APM_MAX_EVENTS;
+        if (q->event_head == q->event_tail) {
+                static int notified;
+                if (notified++ == 0)
+                    printk(KERN_ERR "apm: an event queue overflowed\n");
+                q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS;
+        }
+        q->events[q->event_head] = event;
+}
+static void queue_event_one_user(struct apm_user *as, apm_event_t event)
+{
+        if (as->suser && as->writer) {
+                switch (event) {
+                case APM_SYS_SUSPEND:
+                case APM_USER_SUSPEND:
+                        /*
+                         * If this user already has a suspend pending,
+                         * don't queue another one.
+                         */
+                        if (as->suspend_state != SUSPEND_NONE)
+                                return;
+                        as->suspend_state = SUSPEND_PENDING;
+                        suspends_pending++;
+                        break;
+                }
+        }
+        queue_add_event(&as->queue, event);
+}
+static void queue_event(apm_event_t event, struct apm_user *sender)
+{
+        struct apm_user *as;
+        down_read(&user_list_lock);
+        list_for_each_entry(as, &apm_user_list, list) {
+                if (as != sender && as->reader)
+                        queue_event_one_user(as, event);
+        }
+        up_read(&user_list_lock);
+        wake_up_interruptible(&apm_waitqueue);
+}
+static void apm_suspend(void)
+{
+        struct apm_user *as;
+        int err = pm_suspend(PM_SUSPEND_MEM);
+        /*
+         * Anyone on the APM queues will think we're still suspended.
+         * Send a message so everyone knows we're now awake again.
+         */
+        queue_event(APM_NORMAL_RESUME, NULL);
+        /*
+         * Finally, wake up anyone who is sleeping on the suspend.
+         */
+        down_read(&user_list_lock);
+        list_for_each_entry(as, &apm_user_list, list) {
+                as->suspend_result = err;
+                as->suspend_state = SUSPEND_DONE;
+        }
+        up_read(&user_list_lock);
+        wake_up(&apm_suspend_waitqueue);
+}
+static ssize_t apm_read(struct file *fp, char __user *buf, size_t count, loff_t *ppos)
+{
+        struct apm_user *as = fp->private_data;
+        apm_event_t event;
+        int i = count, ret = 0;
+        if (count < sizeof(apm_event_t))
+                return -EINVAL;
+        if (queue_empty(&as->queue) && fp->f_flags & O_NONBLOCK)
+                return -EAGAIN;
+        wait_event_interruptible(apm_waitqueue, !queue_empty(&as->queue));
+        while ((i >= sizeof(event)) && !queue_empty(&as->queue)) {
+                event = queue_get_event(&as->queue);
+                ret = -EFAULT;
+                if (copy_to_user(buf, &event, sizeof(event)))
+                        break;
+                if (event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND)
+                        as->suspend_state = SUSPEND_READ;
+                buf += sizeof(event);
+                i -= sizeof(event);
+        }
+        if (i < count)
+                ret = count - i;
+        return ret;
+}
+static unsigned int apm_poll(struct file *fp, poll_table * wait)
+{
+        struct apm_user *as = fp->private_data;
+        poll_wait(fp, &apm_waitqueue, wait);
+        return queue_empty(&as->queue) ? 0 : POLLIN | POLLRDNORM;
+}
+/*
+ * apm_ioctl - handle APM ioctl
+ *
+ * APM_IOC_SUSPEND
+ *   This IOCTL is overloaded, and performs two functions.  It is used to:
+ *     - initiate a suspend
+ *     - acknowledge a suspend read from /dev/apm_bios.
+ *   Only when everyone who has opened /dev/apm_bios with write permission
+ *   has acknowledge does the actual suspend happen.
+ */
+static int
+apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
+{
+        struct apm_user *as = filp->private_data;
+        unsigned long flags;
+        int err = -EINVAL;
+        if (!as->suser || !as->writer)
+                return -EPERM;
+        switch (cmd) {
+        case APM_IOC_SUSPEND:
+                as->suspend_result = -EINTR;
+                if (as->suspend_state == SUSPEND_READ) {
+                        /*
+                         * If we read a suspend command from /dev/apm_bios,
+                         * then the corresponding APM_IOC_SUSPEND ioctl is
+                         * interpreted as an acknowledge.
+                         */
+                        as->suspend_state = SUSPEND_ACKED;
+                        suspends_pending--;
+                } else {
+                        /*
+                         * Otherwise it is a request to suspend the system.
+                         * Queue an event for all readers, and expect an
+                         * acknowledge from all writers who haven't already
+                         * acknowledged.
+                         */
+                        queue_event(APM_USER_SUSPEND, as);
+                }
+                /*
+                 * If there are no further acknowledges required, suspend
+                 * the system.
+                 */
+                if (suspends_pending == 0)
+                        apm_suspend();
+                /*
+                 * Wait for the suspend/resume to complete.  If there are
+                 * pending acknowledges, we wait here for them.
+                 *
+                 * Note that we need to ensure that the PM subsystem does
+                 * not kick us out of the wait when it suspends the threads.
+                 */
+                flags = current->flags;
+                current->flags |= PF_NOFREEZE;
+                /*
+                 * Note: do not allow a thread which is acking the suspend
+                 * to escape until the resume is complete.
+                 */
+                if (as->suspend_state == SUSPEND_ACKED)
+                        wait_event(apm_suspend_waitqueue,
+                                         as->suspend_state == SUSPEND_DONE);
+                else
+                        wait_event_interruptible(apm_suspend_waitqueue,
+                                         as->suspend_state == SUSPEND_DONE);
+                current->flags = flags;
+                err = as->suspend_result;
+                as->suspend_state = SUSPEND_NONE;
+                break;
+        }
+        return err;
+}
+static int apm_release(struct inode * inode, struct file * filp)
+{
+        struct apm_user *as = filp->private_data;
+        filp->private_data = NULL;
+        down_write(&user_list_lock);
+        list_del(&as->list);
+        up_write(&user_list_lock);
+        /*
+         * We are now unhooked from the chain.  As far as new
+         * events are concerned, we no longer exist.  However, we
+         * need to balance suspends_pending, which means the
+         * possibility of sleeping.
+         */
+        if (as->suspend_state != SUSPEND_NONE) {
+                suspends_pending -= 1;
+                if (suspends_pending == 0)
+                        apm_suspend();
+        }
+        kfree(as);
+        return 0;
+}
+static int apm_open(struct inode * inode, struct file * filp)
+{
+        struct apm_user *as;
+        as = (struct apm_user *)kzalloc(sizeof(*as), GFP_KERNEL);
+        if (as) {
+                /*
+                 * XXX - this is a tiny bit broken, when we consider BSD
+                 * process accounting. If the device is opened by root, we
+                 * instantly flag that we used superuser privs. Who knows,
+                 * we might close the device immediately without doing a
+                 * privileged operation -- cevans
+                 */
+                as->suser = capable(CAP_SYS_ADMIN);
+                as->writer = (filp->f_mode & FMODE_WRITE) == FMODE_WRITE;
+                as->reader = (filp->f_mode & FMODE_READ) == FMODE_READ;
+                down_write(&user_list_lock);
+                list_add(&as->list, &apm_user_list);
+                up_write(&user_list_lock);
+                filp->private_data = as;
+        }
+        return as ? 0 : -ENOMEM;
+}
+static struct file_operations apm_bios_fops = {
+        .owner          = THIS_MODULE,
+        .read           = apm_read,
+        .poll           = apm_poll,
+        .ioctl          = apm_ioctl,
+        .open           = apm_open,
+        .release        = apm_release,
+};
+static struct miscdevice apm_device = {
+        .minor          = APM_MINOR_DEV,
+        .name           = "apm_bios",
+        .fops           = &apm_bios_fops
+};
+#ifdef CONFIG_PROC_FS
+/*
+ * Arguments, with symbols from linux/apm_bios.h.
+ *
+ *   0) Linux driver version (this will change if format changes)
+ *   1) APM BIOS Version.  Usually 1.0, 1.1 or 1.2.
+ *   2) APM flags from APM Installation Check (0x00):
+ *      bit 0: APM_16_BIT_SUPPORT
+ *      bit 1: APM_32_BIT_SUPPORT
+ *      bit 2: APM_IDLE_SLOWS_CLOCK
+ *      bit 3: APM_BIOS_DISABLED
+ *      bit 4: APM_BIOS_DISENGAGED
+ *   3) AC line status
+ *      0x00: Off-line
+ *      0x01: On-line
+ *      0x02: On backup power (BIOS >= 1.1 only)
+ *      0xff: Unknown
+ *   4) Battery status
+ *      0x00: High
+ *      0x01: Low
+ *      0x02: Critical
+ *      0x03: Charging
+ *      0x04: Selected battery not present (BIOS >= 1.2 only)
+ *      0xff: Unknown
+ *   5) Battery flag
+ *      bit 0: High
+ *      bit 1: Low
+ *      bit 2: Critical
+ *      bit 3: Charging
+ *      bit 7: No system battery
+ *      0xff: Unknown
+ *   6) Remaining battery life (percentage of charge):
+ *      0-100: valid
+ *      -1: Unknown
+ *   7) Remaining battery life (time units):
+ *      Number of remaining minutes or seconds
+ *      -1: Unknown
+ *   8) min = minutes; sec = seconds
+ */
+static int apm_get_info(char *buf, char **start, off_t fpos, int length)
+{
+        struct apm_power_info info;
+        char *units;
+        int ret;
+        info.ac_line_status = 0xff;
+        info.battery_status = 0xff;
+        info.battery_flag   = 0xff;
+        info.battery_life   = -1;
+        info.time           = -1;
+        info.units          = -1;
+        if (apm_get_power_status)
+                apm_get_power_status(&info);
+        switch (info.units) {
+        default:        units = "?";    break;
+        case 0:         units = "min";  break;
+        case 1:         units = "sec";  break;
+        }
+        ret = sprintf(buf, "%s 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n",
+                     driver_version, APM_32_BIT_SUPPORT,
+                     info.ac_line_status, info.battery_status,
+                     info.battery_flag, info.battery_life,
+                     info.time, units);
+        return ret;
+}
+#endif
+static int kapmd(void *arg)
+{
+        daemonize("kapmd");
+        current->flags |= PF_NOFREEZE;
+        do {
+                apm_event_t event;
+                wait_event_interruptible(kapmd_wait,
+                                !queue_empty(&kapmd_queue) || !mips_apm_active);
+                if (!mips_apm_active)
+                        break;
+                spin_lock_irq(&kapmd_queue_lock);
+                event = 0;
+                if (!queue_empty(&kapmd_queue))
+                        event = queue_get_event(&kapmd_queue);
+                spin_unlock_irq(&kapmd_queue_lock);
+                switch (event) {
+                case 0:
+                        break;
+                case APM_LOW_BATTERY:
+                case APM_POWER_STATUS_CHANGE:
+                        queue_event(event, NULL);
+                        break;
+                case APM_USER_SUSPEND:
+                case APM_SYS_SUSPEND:
+                        queue_event(event, NULL);
+                        if (suspends_pending == 0)
+                                apm_suspend();
+                        break;
+                case APM_CRITICAL_SUSPEND:
+                        apm_suspend();
+                        break;
+                }
+        } while (1);
+        complete_and_exit(&kapmd_exit, 0);
+}
+static int __init apm_init(void)
+{
+        int ret;
+        if (apm_disabled) {
+                printk(KERN_NOTICE "apm: disabled on user request.\n");
+                return -ENODEV;
+        }
+        mips_apm_active = 1;
+        ret = kernel_thread(kapmd, NULL, CLONE_KERNEL);
+        if (ret < 0) {
+                mips_apm_active = 0;
+                return ret;
+        }
+#ifdef CONFIG_PROC_FS
+        create_proc_info_entry("apm", 0, NULL, apm_get_info);
+#endif
+        ret = misc_register(&apm_device);
+        if (ret != 0) {
+                remove_proc_entry("apm", NULL);
+                mips_apm_active = 0;
+                wake_up(&kapmd_wait);
+                wait_for_completion(&kapmd_exit);
+        }
+        return ret;
+}
+static void __exit apm_exit(void)
+{
+        misc_deregister(&apm_device);
+        remove_proc_entry("apm", NULL);
+        mips_apm_active = 0;
+        wake_up(&kapmd_wait);
+        wait_for_completion(&kapmd_exit);
+}
+module_init(apm_init);
+module_exit(apm_exit);
+MODULE_AUTHOR("Stephen Rothwell");
+MODULE_DESCRIPTION("Advanced Power Management");
+MODULE_LICENSE("GPL");
+#ifndef MODULE
+static int __init apm_setup(char *str)
+{
+        while ((str != NULL) && (*str != '\0')) {
+                if (strncmp(str, "off", 3) == 0)
+                        apm_disabled = 1;
+                if (strncmp(str, "on", 2) == 0)
+                        apm_disabled = 0;
+                str = strchr(str, ',');
+                if (str != NULL)
+                        str += strspn(str, ", \t");
+        }
+        return 1;
+}
+__setup("apm=", apm_setup);
+#endif
+/**
+ * apm_queue_event - queue an APM event for kapmd
+ * @event: APM event
+ *
+ * Queue an APM event for kapmd to process and ultimately take the
+ * appropriate action.  Only a subset of events are handled:
+ *   %APM_LOW_BATTERY
+ *   %APM_POWER_STATUS_CHANGE
+ *   %APM_USER_SUSPEND
+ *   %APM_SYS_SUSPEND
+ *   %APM_CRITICAL_SUSPEND
+ */
+void apm_queue_event(apm_event_t event)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&kapmd_queue_lock, flags);
+        queue_add_event(&kapmd_queue, event);
+        spin_unlock_irqrestore(&kapmd_queue_lock, flags);
+        wake_up_interruptible(&kapmd_wait);
+}
+EXPORT_SYMBOL(apm_queue_event);
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 92b28b674d6f..f1bb6a2dc5fc 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -141,72 +141,72 @@ void output_thread_defines(void)
 void output_thread_fpu_defines(void)
 {
        offset("#define THREAD_FPR0    ",
-               struct task_struct, thread.fpu.hard.fpr[0]);
+               struct task_struct, thread.fpu.fpr[0]);
        offset("#define THREAD_FPR1    ",
-               struct task_struct, thread.fpu.hard.fpr[1]);
+               struct task_struct, thread.fpu.fpr[1]);
        offset("#define THREAD_FPR2    ",
-               struct task_struct, thread.fpu.hard.fpr[2]);
+               struct task_struct, thread.fpu.fpr[2]);
        offset("#define THREAD_FPR3    ",
-               struct task_struct, thread.fpu.hard.fpr[3]);
+               struct task_struct, thread.fpu.fpr[3]);
        offset("#define THREAD_FPR4    ",
-               struct task_struct, thread.fpu.hard.fpr[4]);
+               struct task_struct, thread.fpu.fpr[4]);
        offset("#define THREAD_FPR5    ",
-               struct task_struct, thread.fpu.hard.fpr[5]);
+               struct task_struct, thread.fpu.fpr[5]);
        offset("#define THREAD_FPR6    ",
-               struct task_struct, thread.fpu.hard.fpr[6]);
+               struct task_struct, thread.fpu.fpr[6]);
        offset("#define THREAD_FPR7    ",
-               struct task_struct, thread.fpu.hard.fpr[7]);
+               struct task_struct, thread.fpu.fpr[7]);
        offset("#define THREAD_FPR8    ",
-               struct task_struct, thread.fpu.hard.fpr[8]);
+               struct task_struct, thread.fpu.fpr[8]);
        offset("#define THREAD_FPR9    ",
-               struct task_struct, thread.fpu.hard.fpr[9]);
+               struct task_struct, thread.fpu.fpr[9]);
        offset("#define THREAD_FPR10   ",
-               struct task_struct, thread.fpu.hard.fpr[10]);
+               struct task_struct, thread.fpu.fpr[10]);
        offset("#define THREAD_FPR11   ",
-               struct task_struct, thread.fpu.hard.fpr[11]);
+               struct task_struct, thread.fpu.fpr[11]);
        offset("#define THREAD_FPR12   ",
-               struct task_struct, thread.fpu.hard.fpr[12]);
+               struct task_struct, thread.fpu.fpr[12]);
        offset("#define THREAD_FPR13   ",
-               struct task_struct, thread.fpu.hard.fpr[13]);
+               struct task_struct, thread.fpu.fpr[13]);
        offset("#define THREAD_FPR14   ",
-               struct task_struct, thread.fpu.hard.fpr[14]);
+               struct task_struct, thread.fpu.fpr[14]);
        offset("#define THREAD_FPR15   ",
-               struct task_struct, thread.fpu.hard.fpr[15]);
+               struct task_struct, thread.fpu.fpr[15]);
        offset("#define THREAD_FPR16   ",
-               struct task_struct, thread.fpu.hard.fpr[16]);
+               struct task_struct, thread.fpu.fpr[16]);
        offset("#define THREAD_FPR17   ",
-               struct task_struct, thread.fpu.hard.fpr[17]);
+               struct task_struct, thread.fpu.fpr[17]);
        offset("#define THREAD_FPR18   ",
-               struct task_struct, thread.fpu.hard.fpr[18]);
+               struct task_struct, thread.fpu.fpr[18]);
        offset("#define THREAD_FPR19   ",
-               struct task_struct, thread.fpu.hard.fpr[19]);
+               struct task_struct, thread.fpu.fpr[19]);
        offset("#define THREAD_FPR20   ",
-               struct task_struct, thread.fpu.hard.fpr[20]);
+               struct task_struct, thread.fpu.fpr[20]);
        offset("#define THREAD_FPR21   ",
-               struct task_struct, thread.fpu.hard.fpr[21]);
+               struct task_struct, thread.fpu.fpr[21]);
        offset("#define THREAD_FPR22   ",
-               struct task_struct, thread.fpu.hard.fpr[22]);
+               struct task_struct, thread.fpu.fpr[22]);
        offset("#define THREAD_FPR23   ",
-               struct task_struct, thread.fpu.hard.fpr[23]);
+               struct task_struct, thread.fpu.fpr[23]);
        offset("#define THREAD_FPR24   ",
-               struct task_struct, thread.fpu.hard.fpr[24]);
+               struct task_struct, thread.fpu.fpr[24]);
        offset("#define THREAD_FPR25   ",
-               struct task_struct, thread.fpu.hard.fpr[25]);
+               struct task_struct, thread.fpu.fpr[25]);
        offset("#define THREAD_FPR26   ",
-               struct task_struct, thread.fpu.hard.fpr[26]);
+               struct task_struct, thread.fpu.fpr[26]);
        offset("#define THREAD_FPR27   ",
-               struct task_struct, thread.fpu.hard.fpr[27]);
+               struct task_struct, thread.fpu.fpr[27]);
        offset("#define THREAD_FPR28   ",
-               struct task_struct, thread.fpu.hard.fpr[28]);
+               struct task_struct, thread.fpu.fpr[28]);
        offset("#define THREAD_FPR29   ",
-               struct task_struct, thread.fpu.hard.fpr[29]);
+               struct task_struct, thread.fpu.fpr[29]);
        offset("#define THREAD_FPR30   ",
-               struct task_struct, thread.fpu.hard.fpr[30]);
+               struct task_struct, thread.fpu.fpr[30]);
        offset("#define THREAD_FPR31   ",
-               struct task_struct, thread.fpu.hard.fpr[31]);
+               struct task_struct, thread.fpu.fpr[31]);
        offset("#define THREAD_FCR31   ",
-               struct task_struct, thread.fpu.hard.fcr31);
+               struct task_struct, thread.fpu.fcr31);
        linefeed;
 }
@@ -272,8 +272,8 @@ void output_sc_defines(void)
        text("/* Linux sigcontext offsets. */");
        offset("#define SC_REGS       ", struct sigcontext, sc_regs);
        offset("#define SC_FPREGS     ", struct sigcontext, sc_fpregs);
-        offset("#define SC_MDHI       ", struct sigcontext, sc_hi);
+        offset("#define SC_MDHI       ", struct sigcontext, sc_mdhi);
-        offset("#define SC_MDLO       ", struct sigcontext, sc_lo);
+        offset("#define SC_MDLO       ", struct sigcontext, sc_mdlo);
        offset("#define SC_PC         ", struct sigcontext, sc_pc);
        offset("#define SC_FPC_CSR    ", struct sigcontext, sc_fpc_csr);
        linefeed;
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index b6232d9033cb..76fd3f22c766 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -178,7 +178,7 @@ int __compute_return_epc(struct pt_regs *regs)
                if (is_fpu_owner())
                        asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
                else
-                        fcr31 = current->thread.fpu.hard.fcr31;
+                        fcr31 = current->thread.fpu.fcr31;
                preempt_enable();
                bit = (insn.i_format.rt >> 2);
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index 47a087b6c11b..d268827c62bd 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -206,7 +206,7 @@ static inline void check_daddi(void)
                "daddi  %0, %1, %3\n\t"
                ".set   pop"
                : "=r" (v), "=&r" (tmp)
-                : "I" (0xffffffffffffdb9a), "I" (0x1234));
+                : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        set_except_vector(12, handler);
        local_irq_restore(flags);
@@ -224,7 +224,7 @@ static inline void check_daddi(void)
                "dsrl   %1, %1, 1\n\t"
                "daddi  %0, %1, %3"
                : "=r" (v), "=&r" (tmp)
-                : "I" (0xffffffffffffdb9a), "I" (0x1234));
+                : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        set_except_vector(12, handler);
        local_irq_restore(flags);
@@ -280,7 +280,7 @@ static inline void check_daddiu(void)
                "daddu  %1, %2\n\t"
                ".set   pop"
                : "=&r" (v), "=&r" (w), "=&r" (tmp)
-                : "I" (0xffffffffffffdb9a), "I" (0x1234));
+                : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        if (v == w) {
                printk("no.\n");
@@ -296,7 +296,7 @@ static inline void check_daddiu(void)
                "addiu  %1, $0, %4\n\t"
                "daddu  %1, %2"
                : "=&r" (v), "=&r" (w), "=&r" (tmp)
-                : "I" (0xffffffffffffdb9a), "I" (0x1234));
+                : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        if (v == w) {
                printk("yes.\n");
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 58b3b14873cb..8c2c359a05f4 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -121,6 +121,7 @@ static inline void check_wait(void)
        case CPU_24K:
        case CPU_25KF:
        case CPU_34K:
+        case CPU_74K:
        case CPU_PR4450:
                cpu_wait = r4k_wait;
                printk(" available.\n");
@@ -432,6 +433,15 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
                             MIPS_CPU_LLSC;
                c->tlbsize = 64;
                break;
+        case PRID_IMP_R14000:
+                c->cputype = CPU_R14000;
+                c->isa_level = MIPS_CPU_ISA_IV;
+                c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
+                             MIPS_CPU_FPU | MIPS_CPU_32FPR |
+                             MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
+                             MIPS_CPU_LLSC;
+                c->tlbsize = 64;
+                break;
        }
 }
@@ -593,6 +603,9 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
        case PRID_IMP_34K:
                c->cputype = CPU_34K;
                break;
+        case PRID_IMP_74K:
+                c->cputype = CPU_74K;
+                break;
        }
 }
@@ -642,7 +655,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
        case PRID_IMP_SB1:
                c->cputype = CPU_SB1;
                /* FPU in pass1 is known to have issues. */
-                if ((c->processor_id & 0xff) < 0x20)
+                if ((c->processor_id & 0xff) < 0x02)
                        c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
                break;
        case PRID_IMP_SB1A:
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index d101d2fb24ca..a9c6de1b9542 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -101,7 +101,7 @@ FEXPORT(restore_all)			# restore full frame
        EMT
 1:
        mfc0    v1, CP0_TCSTATUS
-        /* We set IXMT above, XOR should cler it here */
+        /* We set IXMT above, XOR should clear it here */
        xori    v1, v1, TCSTATUS_IXMT
        or      v1, v0, v1
        mtc0    v1, CP0_TCSTATUS
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index 10f28fb9f008..5fd7a8af0c62 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -54,9 +54,11 @@
                 */
                mfc0    k0, CP0_CAUSE
                andi    k0, k0, 0x7c
-                add     k1, k1, k0
+#ifdef CONFIG_64BIT
-                PTR_L   k0, saved_vectors(k1)
+                dsll    k0, k0, 1
-                jr      k0
+#endif
+                PTR_L   k1, saved_vectors(k0)
+                jr      k1
                nop
 1:
                move    k0, sp
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 2125ba5f1d9b..0cb8ed5662f3 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -302,11 +302,11 @@ static struct irqaction irq2 = {
 };
 static struct resource pic1_io_resource = {
-        "pic1", 0x20, 0x3f, IORESOURCE_BUSY
+        .name = "pic1", .start = 0x20, .end = 0x3f, .flags = IORESOURCE_BUSY
 };
 static struct resource pic2_io_resource = {
-        "pic2", 0xa0, 0xbf, IORESOURCE_BUSY
+        .name = "pic2", .start = 0xa0, .end = 0xbf, .flags = IORESOURCE_BUSY
 };
 /*
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
index 8150f071f80a..a9bf6cc3abd1 100644
--- a/arch/mips/kernel/irixsig.c
+++ b/arch/mips/kernel/irixsig.c
@@ -260,7 +260,7 @@ irix_sigreturn(struct pt_regs *regs)
                for(i = 0; i < 32; i++)
                        error |= __get_user(fregs[i], &context->fpregs[i]);
-                error |= __get_user(current->thread.fpu.hard.fcr31, &context->fpcsr);
+                error |= __get_user(current->thread.fpu.fcr31, &context->fpcsr);
        }
        /* XXX do sigstack crapola here... XXX */
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index e54a7f442f8a..d7bf0215bc1d 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -288,6 +288,9 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
                sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                        + ELF_MIPS_R_SYM(rel[i]);
                if (!sym->st_value) {
+                        /* Ignore unresolved weak symbol */
+                        if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
+                                continue;
                        printk(KERN_WARNING "%s: Unknown symbol %s\n",
                               me->name, strtab + sym->st_name);
                        return -ENOENT;
@@ -325,6 +328,9 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
                sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                        + ELF_MIPS_R_SYM(rel[i]);
                if (!sym->st_value) {
+                        /* Ignore unresolved weak symbol */
+                        if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
+                                continue;
                        printk(KERN_WARNING "%s: Unknown symbol %s\n",
                               me->name, strtab + sym->st_name);
                        return -ENOENT;
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 84ab959f924a..9def554f335b 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -42,6 +42,7 @@ static const char *cpu_name[] = {
        [CPU_R8000]     = "R8000",
        [CPU_R10000]    = "R10000",
        [CPU_R12000]    = "R12000",
+        [CPU_R14000]    = "R14000",
        [CPU_R4300]     = "R4300",
        [CPU_R4650]     = "R4650",
        [CPU_R4700]     = "R4700",
@@ -74,6 +75,7 @@ static const char *cpu_name[] = {
        [CPU_24K]       = "MIPS 24K",
        [CPU_25KF]      = "MIPS 25Kf",
        [CPU_34K]       = "MIPS 34K",
+        [CPU_74K]       = "MIPS 74K",
        [CPU_VR4111]    = "NEC VR4111",
        [CPU_VR4121]    = "NEC VR4121",
        [CPU_VR4122]    = "NEC VR4122",
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 9b4733c12395..1d44025188d8 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -120,11 +120,11 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
                        __put_user ((__u64) -1, i + (__u64 __user *) data);
        }
+        __put_user (child->thread.fpu.fcr31, data + 64);
        if (cpu_has_fpu) {
                unsigned int flags, tmp;
-                __put_user (child->thread.fpu.hard.fcr31, data + 64);
                preempt_disable();
                if (cpu_has_mipsmt) {
                        unsigned int vpflags = dvpe();
@@ -142,7 +142,6 @@ int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
                preempt_enable();
                __put_user (tmp, data + 65);
        } else {
-                __put_user (child->thread.fpu.soft.fcr31, data + 64);
                __put_user ((__u32) 0, data + 65);
        }
@@ -162,10 +161,7 @@ int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
        for (i = 0; i < 32; i++)
                __get_user (fregs[i], i + (__u64 __user *) data);
-        if (cpu_has_fpu)
+        __get_user (child->thread.fpu.fcr31, data + 64);
-                __get_user (child->thread.fpu.hard.fcr31, data + 64);
-        else
-                __get_user (child->thread.fpu.soft.fcr31, data + 64);
        /* FIR may not be written.  */
@@ -241,10 +237,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                        tmp = regs->lo;
                        break;
                case FPC_CSR:
-                        if (cpu_has_fpu)
+                        tmp = child->thread.fpu.fcr31;
-                                tmp = child->thread.fpu.hard.fcr31;
-                        else
-                                tmp = child->thread.fpu.soft.fcr31;
                        break;
                case FPC_EIR: { /* implementation / version register */
                        unsigned int flags;
@@ -336,9 +329,9 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                        if (!tsk_used_math(child)) {
                                /* FP not yet used  */
-                                memset(&child->thread.fpu.hard, ~0,
+                                memset(&child->thread.fpu, ~0,
-                                       sizeof(child->thread.fpu.hard));
+                                       sizeof(child->thread.fpu));
-                                child->thread.fpu.hard.fcr31 = 0;
+                                child->thread.fpu.fcr31 = 0;
                        }
 #ifdef CONFIG_32BIT
                        /*
@@ -369,10 +362,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                        regs->lo = data;
                        break;
                case FPC_CSR:
-                        if (cpu_has_fpu)
+                        child->thread.fpu.fcr31 = data;
-                                child->thread.fpu.hard.fcr31 = data;
-                        else
-                                child->thread.fpu.soft.fcr31 = data;
                        break;
                case DSP_BASE ... DSP_BASE + 5: {
                        dspreg_t *dregs;
diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 8704dc0496ea..f40ecd8be05f 100644
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -166,10 +166,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                        tmp = regs->lo;
                        break;
                case FPC_CSR:
-                        if (cpu_has_fpu)
+                        tmp = child->thread.fpu.fcr31;
-                                tmp = child->thread.fpu.hard.fcr31;
-                        else
-                                tmp = child->thread.fpu.soft.fcr31;
                        break;
                case FPC_EIR: { /* implementation / version register */
                        unsigned int flags;
@@ -288,9 +285,9 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                        if (!tsk_used_math(child)) {
                                /* FP not yet used  */
-                                memset(&child->thread.fpu.hard, ~0,
+                                memset(&child->thread.fpu, ~0,
-                                       sizeof(child->thread.fpu.hard));
+                                       sizeof(child->thread.fpu));
-                                child->thread.fpu.hard.fcr31 = 0;
+                                child->thread.fpu.fcr31 = 0;
                        }
                        /*
                         * The odd registers are actually the high order bits
@@ -318,10 +315,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                        regs->lo = data;
                        break;
                case FPC_CSR:
-                        if (cpu_has_fpu)
+                        child->thread.fpu.fcr31 = data;
-                                child->thread.fpu.hard.fcr31 = data;
-                        else
-                                child->thread.fpu.soft.fcr31 = data;
                        break;
                case DSP_BASE ... DSP_BASE + 5: {
                        dspreg_t *dregs;
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 0b1b54acee9f..db94e556fc97 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -75,8 +75,8 @@
        and     t0, t0, t1
        LONG_S  t0, ST_OFF(t3)
-        fpu_save_double a0 t1 t0 t2             # c0_status passed in t1
+        fpu_save_double a0 t0 t1                # c0_status passed in t0
-                                                # clobbers t0 and t2
+                                                # clobbers t1
 1:
        /*
@@ -129,9 +129,9 @@
 */
 LEAF(_save_fp)
 #ifdef CONFIG_64BIT
-        mfc0    t1, CP0_STATUS
+        mfc0    t0, CP0_STATUS
 #endif
-        fpu_save_double a0 t1 t0 t2             # clobbers t1
+        fpu_save_double a0 t0 t1                # clobbers t1
        jr      ra
        END(_save_fp)
@@ -139,7 +139,10 @@ LEAF(_save_fp)
 * Restore a thread's fp context.
 */
 LEAF(_restore_fp)
-        fpu_restore_double a0, t1               # clobbers t1
+#ifdef CONFIG_64BIT
+        mfc0    t0, CP0_STATUS
+#endif
+        fpu_restore_double a0 t0 t1             # clobbers t1
        jr      ra
        END(_restore_fp)
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index b53a9207f530..8efb23a84131 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -209,7 +209,7 @@ sys_call_table:
        PTR     sys_fork
        PTR     sys_read
        PTR     sys_write
-        PTR     sys_open                        /* 4005 */
+        PTR     compat_sys_open                 /* 4005 */
        PTR     sys_close
        PTR     sys_waitpid
        PTR     sys_creat
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index bcf1b10e518f..bfcec8d9bfe4 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -246,7 +246,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en
 #ifdef CONFIG_64BIT
        /* HACK: Guess if the sign extension was forgotten */
        if (start > 0x0000000080000000 && start < 0x00000000ffffffff)
-                start |= 0xffffffff00000000;
+                start |= 0xffffffff00000000UL;
 #endif
        end = start + size;
@@ -355,8 +355,6 @@ static inline void bootmem_init(void)
        }
 #endif
-        memory_present(0, first_usable_pfn, max_low_pfn);
        /* Initialize the boot-time allocator with low memory only.  */
        bootmap_size = init_bootmem(first_usable_pfn, max_low_pfn);
@@ -410,6 +408,7 @@ static inline void bootmem_init(void)
                /* Register lowmem ranges */
                free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
+                memory_present(0, curr_pfn, curr_pfn + size - 1);
        }
        /* Reserve the bootmap memory.  */
@@ -419,17 +418,20 @@ static inline void bootmem_init(void)
 #ifdef CONFIG_BLK_DEV_INITRD
        initrd_below_start_ok = 1;
        if (initrd_start) {
-                unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start);
+                unsigned long initrd_size = ((unsigned char *)initrd_end) -
+                        ((unsigned char *)initrd_start);
+                const int width = sizeof(long) * 2;
                printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
                       (void *)initrd_start, initrd_size);
                if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
                        printk("initrd extends beyond end of memory "
                               "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
-                               sizeof(long) * 2,
+                               width,
-                               (unsigned long long)CPHYSADDR(initrd_end),
+                               (unsigned long long) CPHYSADDR(initrd_end),
-                               sizeof(long) * 2,
+                               width,
-                               (unsigned long long)PFN_PHYS(max_low_pfn));
+                               (unsigned long long) PFN_PHYS(max_low_pfn));
                        initrd_start = initrd_end = 0;
                        initrd_reserve_bootmem = 0;
                }
@@ -440,6 +442,48 @@ static inline void bootmem_init(void)
 #endif /* CONFIG_BLK_DEV_INITRD  */
 }
+/*
+ * arch_mem_init - initialize memory managment subsystem
+ *
+ *  o plat_mem_setup() detects the memory configuration and will record detected
+ *    memory areas using add_memory_region.
+ *  o parse_cmdline_early() parses the command line for mem= options which,
+ *    iff detected, will override the results of the automatic detection.
+ *
+ * At this stage the memory configuration of the system is known to the
+ * kernel but generic memory managment system is still entirely uninitialized.
+ *
+ *  o bootmem_init()
+ *  o sparse_init()
+ *  o paging_init()
+ *
+ * At this stage the bootmem allocator is ready to use.
+ *
+ * NOTE: historically plat_mem_setup did the entire platform initialization.
+ *       This was rather impractical because it meant plat_mem_setup had to
+ * get away without any kind of memory allocator.  To keep old code from
+ * breaking plat_setup was just renamed to plat_setup and a second platform
+ * initialization hook for anything else was introduced.
+ */
+extern void plat_mem_setup(void);
+static void __init arch_mem_init(char **cmdline_p)
+{
+        /* call board setup routine */
+        plat_mem_setup();
+        strlcpy(command_line, arcs_cmdline, sizeof(command_line));
+        strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
+        *cmdline_p = command_line;
+        parse_cmdline_early();
+        bootmem_init();
+        sparse_init();
+        paging_init();
+}
 static inline void resource_init(void)
 {
        int i;
@@ -493,8 +537,6 @@ static inline void resource_init(void)
 #undef MAXMEM
 #undef MAXMEM_PFN
-extern void plat_setup(void);
 void __init setup_arch(char **cmdline_p)
 {
        cpu_probe();
@@ -509,18 +551,8 @@ void __init setup_arch(char **cmdline_p)
 #endif
 #endif
-        /* call board setup routine */
+        arch_mem_init(cmdline_p);
-        plat_setup();
-        strlcpy(command_line, arcs_cmdline, sizeof(command_line));
-        strlcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
-        *cmdline_p = command_line;
-        parse_cmdline_early();
-        bootmem_init();
-        sparse_init();
-        paging_init();
        resource_init();
 #ifdef CONFIG_SMP
        plat_smp_setup();
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index 3ca786215d48..ce6cb915c0a7 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -31,7 +31,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
        save_gp_reg(31);
 #undef save_gp_reg
-#ifdef CONFIG_32BIT
        err |= __put_user(regs->hi, &sc->sc_mdhi);
        err |= __put_user(regs->lo, &sc->sc_mdlo);
        if (cpu_has_dsp) {
@@ -43,20 +42,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
                err |= __put_user(mflo3(), &sc->sc_lo3);
                err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
        }
-#endif
-#ifdef CONFIG_64BIT
-        err |= __put_user(regs->hi, &sc->sc_hi[0]);
-        err |= __put_user(regs->lo, &sc->sc_lo[0]);
-        if (cpu_has_dsp) {
-                err |= __put_user(mfhi1(), &sc->sc_hi[1]);
-                err |= __put_user(mflo1(), &sc->sc_lo[1]);
-                err |= __put_user(mfhi2(), &sc->sc_hi[2]);
-                err |= __put_user(mflo2(), &sc->sc_lo[2]);
-                err |= __put_user(mfhi3(), &sc->sc_hi[3]);
-                err |= __put_user(mflo3(), &sc->sc_lo[3]);
-                err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
-        }
-#endif
        err |= __put_user(!!used_math(), &sc->sc_used_math);
@@ -92,7 +77,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
        current_thread_info()->restart_block.fn = do_no_restart_syscall;
        err |= __get_user(regs->cp0_epc, &sc->sc_pc);
-#ifdef CONFIG_32BIT
        err |= __get_user(regs->hi, &sc->sc_mdhi);
        err |= __get_user(regs->lo, &sc->sc_mdlo);
        if (cpu_has_dsp) {
@@ -104,20 +88,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
                err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
                err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
        }
-#endif
-#ifdef CONFIG_64BIT
-        err |= __get_user(regs->hi, &sc->sc_hi[0]);
-        err |= __get_user(regs->lo, &sc->sc_lo[0]);
-        if (cpu_has_dsp) {
-                err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
-                err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
-                err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
-                err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
-                err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
-                err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
-                err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
-        }
-#endif
 #define restore_gp_reg(i) do {                                          \
        err |= __get_user(regs->regs[i], &sc->sc_regs[i]);              \
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index d42f358754ad..298f82fe8440 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -247,6 +247,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        current_thread_info()->cpu = 0;
        smp_tune_scheduling();
        plat_prepare_cpus(max_cpus);
+#ifndef CONFIG_HOTPLUG_CPU
+        cpu_present_map = cpu_possible_map;
+#endif
 }
 /* preload SMP state for boot cpu */
@@ -442,7 +445,7 @@ static int __init topology_init(void)
        int cpu;
        int ret;
-        for_each_cpu(cpu) {
+        for_each_present_cpu(cpu) {
                ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
                if (ret)
                        printk(KERN_WARNING "topology_init: register_cpu %d "
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 2aeaa2fd4b32..5e8a18a8e2bd 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -276,31 +276,9 @@ void sys_set_thread_area(unsigned long addr)
 asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
 {
-        int     tmp, len;
+        int     tmp;
-        char    __user *name;
        switch(cmd) {
-        case SETNAME: {
-                char nodename[__NEW_UTS_LEN + 1];
-                if (!capable(CAP_SYS_ADMIN))
-                        return -EPERM;
-                name = (char __user *) arg1;
-                len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
-                if (len < 0)
-                        return -EFAULT;
-                down_write(&uts_sem);
-                strncpy(system_utsname.nodename, nodename, len);
-                nodename[__NEW_UTS_LEN] = '\0';
-                strlcpy(system_utsname.nodename, nodename,
-                        sizeof(system_utsname.nodename));
-                up_write(&uts_sem);
-                return 0;
-        }
        case MIPS_ATOMIC_SET:
                printk(KERN_CRIT "How did I get here?\n");
                return -EINVAL;
@@ -313,9 +291,6 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
        case FLUSH_CACHE:
                __flush_cache_all();
                return 0;
-        case MIPS_RDNVRAM:
-                return -EIO;
        }
        return -EINVAL;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 4901f0a37fca..ad16eceb24dd 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -65,7 +65,7 @@ extern asmlinkage void handle_mcheck(void);
 extern asmlinkage void handle_reserved(void);
 extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
-        struct mips_fpu_soft_struct *ctx);
+        struct mips_fpu_struct *ctx);
 void (*board_be_init)(void);
 int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
@@ -600,8 +600,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
                preempt_enable();
                /* Run the emulator */
-                sig = fpu_emulator_cop1Handler (regs,
+                sig = fpu_emulator_cop1Handler (regs, &current->thread.fpu);
-                        &current->thread.fpu.soft);
                preempt_disable();
@@ -610,7 +609,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
                 * We can't allow the emulated instruction to leave any of
                 * the cause bit set in $fcr31.
                 */
-                current->thread.fpu.soft.fcr31 &= ~FPU_CSR_ALL_X;
+                current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
                /* Restore the hardware register state */
                restore_fp(current);
@@ -755,7 +754,7 @@ asmlinkage void do_cpu(struct pt_regs *regs)
                if (!cpu_has_fpu) {
                        int sig = fpu_emulator_cop1Handler(regs,
-                                                &current->thread.fpu.soft);
+                                                &current->thread.fpu);
                        if (sig)
                                force_sig(sig, current);
 #ifdef CONFIG_MIPS_MT_FPAFF
@@ -819,15 +818,30 @@ asmlinkage void do_watch(struct pt_regs *regs)
 asmlinkage void do_mcheck(struct pt_regs *regs)
 {
+        const int field = 2 * sizeof(unsigned long);
+        int multi_match = regs->cp0_status & ST0_TS;
        show_regs(regs);
-        dump_tlb_all();
+        if (multi_match) {
+                printk("Index   : %0x\n", read_c0_index());
+                printk("Pagemask: %0x\n", read_c0_pagemask());
+                printk("EntryHi : %0*lx\n", field, read_c0_entryhi());
+                printk("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
+                printk("EntryLo1: %0*lx\n", field, read_c0_entrylo1());
+                printk("\n");
+                dump_tlb_all();
+        }
+        show_code((unsigned int *) regs->cp0_epc);
        /*
         * Some chips may have other causes of machine check (e.g. SB1
         * graduation timer)
         */
        panic("Caught Machine Check exception - %scaused by multiple "
              "matching entries in the TLB.",
-              (regs->cp0_status & ST0_TS) ? "" : "not ");
+              (multi_match) ? "" : "not ");
 }
 asmlinkage void do_mt(struct pt_regs *regs)
@@ -902,6 +916,7 @@ static inline void parity_protection_init(void)
 {
        switch (current_cpu_data.cputype) {
        case CPU_24K:
+        case CPU_34K:
        case CPU_5KC:
                write_c0_ecc(0x80000000);
                back_to_back_c0_hazard();
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 14fa00e3cdfa..b84d1f9ce28e 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -151,23 +151,13 @@ SECTIONS
  /* This is the MIPS specific mdebug section.  */
  .mdebug : { *(.mdebug) }
-  /* These are needed for ELF backends which have not yet been
-     converted to the new style linker.  */
+  STABS_DEBUG
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
+  DWARF_DEBUG
-  /* DWARF debug sections.
-     Symbols in the .debug DWARF section are relative to the beginning of the
-     section so we begin .debug at 0.  It's not clear yet what needs to happen
-     for the others.   */
-  .debug          0 : { *(.debug) }
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  .line           0 : { *(.line) }
  /* These must appear regardless of  .  */
  .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
  .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
-  .comment : { *(.comment) }
  .note : { *(.note) }
 }
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index bb70a8240e61..3f64277429e4 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -155,7 +155,7 @@ void __init serial_init(void)
 }
 #endif
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        int i;
        lasat_misc  = &lasat_misc_info[mips_machtype];
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index cf12caf80774..b225543f5302 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -7,4 +7,7 @@ lib-y	+= csum_partial_copy.o memcpy.o promlib.o strlen_user.o strncpy_user.o \
 obj-y   += iomap.o
+# libgcc-style stuff needed in the kernel
+lib-y += ashldi3.o ashrdi3.o lshrdi3.o
 EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/lib/ashldi3.c b/arch/mips/lib/ashldi3.c
new file mode 100644
index 000000000000..beb80f316095
--- /dev/null
+++ b/arch/mips/lib/ashldi3.c
@@ -0,0 +1,29 @@
+#include <linux/module.h>
+#include "libgcc.h"
+long long __ashldi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+        if (b == 0)
+                return u;
+        uu.ll = u;
+        bm = 32 - b;
+        if (bm <= 0) {
+                w.s.low = 0;
+                w.s.high = (unsigned int) uu.s.low << -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.low >> bm;
+                w.s.low = (unsigned int) uu.s.low << b;
+                w.s.high = ((unsigned int) uu.s.high << b) | carries;
+        }
+        return w.ll;
+}
+EXPORT_SYMBOL(__ashldi3);
diff --git a/arch/mips/lib/ashrdi3.c b/arch/mips/lib/ashrdi3.c
new file mode 100644
index 000000000000..c884a912b660
--- /dev/null
+++ b/arch/mips/lib/ashrdi3.c
@@ -0,0 +1,31 @@
+#include <linux/module.h>
+#include "libgcc.h"
+long long __ashrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+        if (b == 0)
+                return u;
+        uu.ll = u;
+        bm = 32 - b;
+        if (bm <= 0) {
+                /* w.s.high = 1..1 or 0..0 */
+                w.s.high =
+                    uu.s.high >> 31;
+                w.s.low = uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+                w.s.high = uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+        return w.ll;
+}
+EXPORT_SYMBOL(__ashrdi3);
diff --git a/arch/mips/lib/libgcc.h b/arch/mips/lib/libgcc.h
new file mode 100644
index 000000000000..3f19d1c5d942
--- /dev/null
+++ b/arch/mips/lib/libgcc.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_LIBGCC_H
+#define __ASM_LIBGCC_H
+#include <asm/byteorder.h>
+typedef int word_type __attribute__ ((mode (__word__)));
+#ifdef __BIG_ENDIAN
+struct DWstruct {
+        int high, low;
+};
+#elif defined(__LITTLE_ENDIAN)
+struct DWstruct {
+        int low, high;
+};
+#else
+#error I feel sick.
+#endif
+typedef union
+{
+        struct DWstruct s;
+        long long ll;
+} DWunion;
+#endif /* __ASM_LIBGCC_H */
diff --git a/arch/mips/lib/lshrdi3.c b/arch/mips/lib/lshrdi3.c
new file mode 100644
index 000000000000..dcf8d6810b7c
--- /dev/null
+++ b/arch/mips/lib/lshrdi3.c
@@ -0,0 +1,29 @@
+#include <linux/module.h>
+#include "libgcc.h"
+long long __lshrdi3(long long u, word_type b)
+{
+        DWunion uu, w;
+        word_type bm;
+        if (b == 0)
+                return u;
+        uu.ll = u;
+        bm = 32 - b;
+        if (bm <= 0) {
+                w.s.high = 0;
+                w.s.low = (unsigned int) uu.s.high >> -bm;
+        } else {
+                const unsigned int carries = (unsigned int) uu.s.high << bm;
+                w.s.high = (unsigned int) uu.s.high >> b;
+                w.s.low = ((unsigned int) uu.s.low >> b) | carries;
+        }
+        return w.ll;
+}
+EXPORT_SYMBOL(__lshrdi3);
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index aa5818a0d884..3f0d5d26d506 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -60,15 +60,15 @@
 /* Function which emulates a floating point instruction. */
-static int fpu_emu(struct pt_regs *, struct mips_fpu_soft_struct *,
+static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
        mips_instruction);
 #if __mips >= 4 && __mips != 32
 static int fpux_emu(struct pt_regs *,
-        struct mips_fpu_soft_struct *, mips_instruction);
+        struct mips_fpu_struct *, mips_instruction);
 #endif
-/* Further private data for which no space exists in mips_fpu_soft_struct */
+/* Further private data for which no space exists in mips_fpu_struct */
 struct mips_fpu_emulator_stats fpuemustats;
@@ -203,7 +203,7 @@ static int isBranchInstr(mips_instruction * i)
 * Two instructions if the instruction is in a branch delay slot.
 */
-static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
+static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
 {
        mips_instruction ir;
        void * emulpc, *contpc;
@@ -595,7 +595,7 @@ DEF3OP(msub, dp, ieee754dp_mul, ieee754dp_sub,);
 DEF3OP(nmadd, dp, ieee754dp_mul, ieee754dp_add, ieee754dp_neg);
 DEF3OP(nmsub, dp, ieee754dp_mul, ieee754dp_sub, ieee754dp_neg);
-static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
        mips_instruction ir)
 {
        unsigned rcsr = 0;      /* resulting csr */
@@ -759,7 +759,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
 /*
 * Emulate a single COP1 arithmetic instruction.
 */
-static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
+static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
        mips_instruction ir)
 {
        int rfmt;               /* resulting format */
@@ -1233,8 +1233,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
        return 0;
 }
-int fpu_emulator_cop1Handler(struct pt_regs *xcp,
+int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
-        struct mips_fpu_soft_struct *ctx)
 {
        unsigned long oldepc, prevepc;
        mips_instruction insn;
diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c
index a1962eb460f8..39a71de16f47 100644
--- a/arch/mips/math-emu/dp_fint.c
+++ b/arch/mips/math-emu/dp_fint.c
@@ -29,7 +29,9 @@
 ieee754dp ieee754dp_fint(int x)
 {
-        COMPXDP;
+        u64 xm;
+        int xe;
+        int xs;
        CLEARCX;
diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c
index eae90a866aa1..f08f223e488a 100644
--- a/arch/mips/math-emu/dp_flong.c
+++ b/arch/mips/math-emu/dp_flong.c
@@ -29,7 +29,9 @@
 ieee754dp ieee754dp_flong(s64 x)
 {
-        COMPXDP;
+        u64 xm;
+        int xe;
+        int xs;
        CLEARCX;
diff --git a/arch/mips/math-emu/ieee754.h b/arch/mips/math-emu/ieee754.h
index 171f177c0f88..dd917332792c 100644
--- a/arch/mips/math-emu/ieee754.h
+++ b/arch/mips/math-emu/ieee754.h
@@ -329,7 +329,7 @@ struct _ieee754_csr {
        unsigned pad0:7;
 #endif
 };
-#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.soft.fcr31))
+#define ieee754_csr (*(struct _ieee754_csr *)(&current->thread.fpu.fcr31))
 static inline unsigned ieee754_getrm(void)
 {
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index d187ab71c2ff..56ca0c6a7178 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -39,9 +39,9 @@ void fpu_emulator_init_fpu(void)
                printk("Algorithmics/MIPS FPU Emulator v1.5\n");
        }
-        current->thread.fpu.soft.fcr31 = 0;
+        current->thread.fpu.fcr31 = 0;
        for (i = 0; i < 32; i++) {
-                current->thread.fpu.soft.fpr[i] = SIGNALLING_NAN;
+                current->thread.fpu.fpr[i] = SIGNALLING_NAN;
        }
 }
@@ -59,10 +59,9 @@ int fpu_emulator_save_context(struct sigcontext *sc)
        for (i = 0; i < 32; i++) {
                err |=
-                    __put_user(current->thread.fpu.soft.fpr[i],
+                    __put_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
-                               &sc->sc_fpregs[i]);
        }
-        err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+        err |= __put_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
        return err;
 }
@@ -74,10 +73,9 @@ int fpu_emulator_restore_context(struct sigcontext *sc)
        for (i = 0; i < 32; i++) {
                err |=
-                    __get_user(current->thread.fpu.soft.fpr[i],
+                    __get_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
-                               &sc->sc_fpregs[i]);
        }
-        err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+        err |= __get_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
        return err;
 }
@@ -94,10 +92,9 @@ int fpu_emulator_save_context32(struct sigcontext32 *sc)
        for (i = 0; i < 32; i+=2) {
                err |=
-                    __put_user(current->thread.fpu.soft.fpr[i],
+                    __put_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
-                               &sc->sc_fpregs[i]);
        }
-        err |= __put_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+        err |= __put_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
        return err;
 }
@@ -109,10 +106,9 @@ int fpu_emulator_restore_context32(struct sigcontext32 *sc)
        for (i = 0; i < 32; i+=2) {
                err |=
-                    __get_user(current->thread.fpu.soft.fpr[i],
+                    __get_user(current->thread.fpu.fpr[i], &sc->sc_fpregs[i]);
-                               &sc->sc_fpregs[i]);
        }
-        err |= __get_user(current->thread.fpu.soft.fcr31, &sc->sc_fpc_csr);
+        err |= __get_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
        return err;
 }
diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c
index 7aac13afb09a..e88e125e01c2 100644
--- a/arch/mips/math-emu/sp_fint.c
+++ b/arch/mips/math-emu/sp_fint.c
@@ -29,7 +29,9 @@
 ieee754sp ieee754sp_fint(int x)
 {
-        COMPXSP;
+        unsigned xm;
+        int xe;
+        int xs;
        CLEARCX;
diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c
index 3d6c1d11c178..26d6919a269a 100644
--- a/arch/mips/math-emu/sp_flong.c
+++ b/arch/mips/math-emu/sp_flong.c
@@ -29,7 +29,9 @@
 ieee754sp ieee754sp_flong(s64 x)
 {
-        COMPXDP;                /* <--- need 64-bit mantissa temp */
+        u64 xm;         /* <--- need 64-bit mantissa temp */
+        int xe;
+        int xs;
        CLEARCX;
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index c20d401ecf80..8cc9effcb832 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -50,7 +50,7 @@ const char *get_system_type(void)
        return "MIPS Atlas";
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        mips_pcibios_init();
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index bc4d093685bb..fd492562584a 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -76,6 +76,15 @@ struct prom_pmemblock * __init prom_getmdesc(void)
                        memsize = simple_strtol(memsize_str, NULL, 0);
                }
        }
+#ifdef CONFIG_CPU_BIG_ENDIAN
+        /*
+         * SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
+         * word of physical memory
+         */
+        memsize -= PAGE_SIZE;
+#endif
        memset(mdesc, 0, sizeof(mdesc));
        mdesc[0].type = yamon_dontuse;
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index b8488aab6df1..0766e434b6bd 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -53,11 +53,11 @@ extern void kgdb_config(void);
 #endif
 struct resource standard_io_resources[] = {
-        { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
+        { .name = "dma1", .start = 0x00, .end = 0x1f, .flags = IORESOURCE_BUSY },
-        { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+        { .name = "timer", .start = 0x40, .end = 0x5f, .flags = IORESOURCE_BUSY },
-        { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
+        { .name = "keyboard", .start = 0x60, .end = 0x6f, .flags = IORESOURCE_BUSY },
-        { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
+        { .name = "dma page reg", .start = 0x80, .end = 0x8f, .flags = IORESOURCE_BUSY },
-        { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+        { .name = "dma2", .start = 0xc0, .end = 0xdf, .flags = IORESOURCE_BUSY },
 };
 #ifdef CONFIG_MTD
@@ -111,7 +111,7 @@ void __init fd_activate(void)
 }
 #endif
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        unsigned int i;
diff --git a/arch/mips/mips-boards/malta/malta_smp.c b/arch/mips/mips-boards/malta/malta_smp.c
index 6c6c8eeedbce..cf967170fe29 100644
--- a/arch/mips/mips-boards/malta/malta_smp.c
+++ b/arch/mips/mips-boards/malta/malta_smp.c
@@ -34,25 +34,6 @@ void core_send_ipi(int cpu, unsigned int action)
 }
 /*
- * Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
- */
-void __init prom_build_cpu_map(void)
-{
-        int nextslot;
-        /*
-         * As of November, 2004, MIPSsim only simulates one core
-         * at a time.  However, that core may be a MIPS MT core
-         * with multiple virtual processors and thread contexts.
-         */
-        if (read_c0_config3() & (1<<2)) {
-                nextslot = mipsmt_build_cpu_map(1);
-        }
-}
-/*
 * Platform "CPU" startup hook
 */
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index 4266ce445174..6430f11f3a95 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -45,7 +45,7 @@ const char *get_system_type(void)
        return "MIPS SEAD";
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        ioport_resource.end = 0x7fffffff;
diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c
index a2fd62997ca3..15a5dac4ae19 100644
--- a/arch/mips/mips-boards/sim/sim_setup.c
+++ b/arch/mips/mips-boards/sim/sim_setup.c
@@ -50,7 +50,7 @@ const char *get_system_type(void)
        return "MIPSsim";
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        set_io_port_base(0xbfd00000);
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c
index b7084e7c4bf9..004070956cca 100644
--- a/arch/mips/mips-boards/sim/sim_smp.c
+++ b/arch/mips/mips-boards/sim/sim_smp.c
@@ -51,27 +51,6 @@ void core_send_ipi(int cpu, unsigned int action)
 }
 /*
- * Detect available CPUs/VPEs/TCs and populate phys_cpu_present_map
- */
-void __init prom_build_cpu_map(void)
-{
-#ifdef CONFIG_MIPS_MT_SMTC
-        int nextslot;
-        /*
-         * As of November, 2004, MIPSsim only simulates one core
-         * at a time.  However, that core may be a MIPS MT core
-         * with multiple virtual processors and thread contexts.
-         */
-        if (read_c0_config3() & (1<<2)) {
-                nextslot = mipsmt_build_cpu_map(1);
-        }
-#endif /* CONFIG_MIPS_MT_SMTC */
-}
-/*
 * Platform "CPU" startup hook
 */
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4182e1176fae..4a43924cd4fc 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -29,6 +29,27 @@
 #include <asm/war.h>
 #include <asm/cacheflush.h> /* for run_uncached() */
+/*
+ * Special Variant of smp_call_function for use by cache functions:
+ *
+ *  o No return value
+ *  o collapses to normal function call on UP kernels
+ *  o collapses to normal function call on systems with a single shared
+ *    primary cache.
+ */
+static inline void r4k_on_each_cpu(void (*func) (void *info), void *info,
+                                   int retry, int wait)
+{
+        preempt_disable();
+#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
+        smp_call_function(func, info, retry, wait);
+#endif
+        func(info);
+        preempt_enable();
+}
 /*
 * Must die.
 */
@@ -299,7 +320,7 @@ static void r4k_flush_cache_all(void)
        if (!cpu_has_dc_aliases)
                return;
-        on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
 }
 static inline void local_r4k___flush_cache_all(void * args)
@@ -314,13 +335,14 @@ static inline void local_r4k___flush_cache_all(void * args)
        case CPU_R4400MC:
        case CPU_R10000:
        case CPU_R12000:
+        case CPU_R14000:
                r4k_blast_scache();
        }
 }
 static void r4k___flush_cache_all(void)
 {
-        on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
+        r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
 }
 static inline void local_r4k_flush_cache_range(void * args)
@@ -341,7 +363,7 @@ static inline void local_r4k_flush_cache_range(void * args)
 static void r4k_flush_cache_range(struct vm_area_struct *vma,
        unsigned long start, unsigned long end)
 {
-        on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
 }
 static inline void local_r4k_flush_cache_mm(void * args)
@@ -370,7 +392,7 @@ static void r4k_flush_cache_mm(struct mm_struct *mm)
        if (!cpu_has_dc_aliases)
                return;
-        on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
 }
 struct flush_cache_page_args {
@@ -461,7 +483,7 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
        args.addr = addr;
        args.pfn = pfn;
-        on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
 }
 static inline void local_r4k_flush_data_cache_page(void * addr)
@@ -471,7 +493,7 @@ static inline void local_r4k_flush_data_cache_page(void * addr)
 static void r4k_flush_data_cache_page(unsigned long addr)
 {
-        on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
 }
 struct flush_icache_range_args {
@@ -514,7 +536,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
        args.start = start;
        args.end = end;
-        on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
        instruction_hazard();
 }
@@ -590,7 +612,7 @@ static void r4k_flush_icache_page(struct vm_area_struct *vma,
        args.vma = vma;
        args.page = page;
-        on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
 }
@@ -689,7 +711,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
 static void r4k_flush_cache_sigtramp(unsigned long addr)
 {
-        on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
+        r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
 }
 static void r4k_flush_icache_all(void)
@@ -812,6 +834,7 @@ static void __init probe_pcache(void)
        case CPU_R10000:
        case CPU_R12000:
+        case CPU_R14000:
                icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
                c->icache.linesz = 64;
                c->icache.ways = 2;
@@ -965,9 +988,11 @@ static void __init probe_pcache(void)
                c->dcache.flags |= MIPS_CACHE_PINDEX;
        case CPU_R10000:
        case CPU_R12000:
+        case CPU_R14000:
        case CPU_SB1:
                break;
        case CPU_24K:
+        case CPU_34K:
                if (!(read_c0_config7() & (1 << 16)))
        default:
                        if (c->dcache.waysize > PAGE_SIZE)
@@ -1091,6 +1116,7 @@ static void __init setup_scache(void)
        case CPU_R10000:
        case CPU_R12000:
+        case CPU_R14000:
                scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
                c->scache.linesz = 64 << ((config >> 13) & 1);
                c->scache.ways = 2;
@@ -1135,6 +1161,31 @@ static void __init setup_scache(void)
        c->options |= MIPS_CPU_SUBSET_CACHES;
 }
+void au1x00_fixup_config_od(void)
+{
+        /*
+         * c0_config.od (bit 19) was write only (and read as 0)
+         * on the early revisions of Alchemy SOCs.  It disables the bus
+         * transaction overlapping and needs to be set to fix various errata.
+         */
+        switch (read_c0_prid()) {
+        case 0x00030100: /* Au1000 DA */
+        case 0x00030201: /* Au1000 HA */
+        case 0x00030202: /* Au1000 HB */
+        case 0x01030200: /* Au1500 AB */
+        /*
+         * Au1100 errata actually keeps silence about this bit, so we set it
+         * just in case for those revisions that require it to be set according
+         * to arch/mips/au1000/common/cputable.c
+         */
+        case 0x02030200: /* Au1100 AB */
+        case 0x02030201: /* Au1100 BA */
+        case 0x02030202: /* Au1100 BC */
+                set_c0_config(1 << 19);
+                break;
+        }
+}
 static inline void coherency_setup(void)
 {
        change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
@@ -1155,6 +1206,15 @@ static inline void coherency_setup(void)
        case CPU_R4400MC:
                clear_c0_config(CONF_CU);
                break;
+        /*
+         * We need to catch the ealry Alchemy SOCs with
+         * the write-only co_config.od bit and set it back to one...
+         */
+        case CPU_AU1000: /* rev. DA, HA, HB */
+        case CPU_AU1100: /* rev. AB, BA, BC ?? */
+        case CPU_AU1500: /* rev. AB */
+                au1x00_fixup_config_od();
+                break;
        }
 }
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index c22308b93ff0..33f6e1cdfd5b 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -227,7 +227,7 @@ void __init mem_init(void)
        for (tmp = 0; tmp < max_low_pfn; tmp++)
                if (page_is_ram(tmp)) {
                        ram++;
-                        if (PageReserved(mem_map+tmp))
+                        if (PageReserved(pfn_to_page(tmp)))
                                reservedpages++;
                }
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index e4390dc3eb48..b7c749232ffe 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -357,6 +357,7 @@ void __init build_clear_page(void)
                case CPU_R10000:
                case CPU_R12000:
+                case CPU_R14000:
                        pref_src_mode = Pref_LoadStreamed;
                        pref_dst_mode = Pref_StoreStreamed;
                        break;
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 9dca099ba16b..965cb4c4359d 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -413,7 +413,6 @@ out:
        return ret;
 }
-extern void __init sanitize_tlb_entries(void);
 static void __init probe_tlb(unsigned long config)
 {
        struct cpuinfo_mips *c = &current_cpu_data;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 053dbacac56b..54507be2ab5b 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -875,6 +875,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
        case CPU_R10000:
        case CPU_R12000:
+        case CPU_R14000:
        case CPU_4KC:
        case CPU_SB1:
        case CPU_SB1A:
@@ -906,6 +907,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
        case CPU_4KEC:
        case CPU_24K:
        case CPU_34K:
+        case CPU_74K:
                i_ehb(p);
                tlbw(p);
                break;
diff --git a/arch/mips/momentum/jaguar_atx/dbg_io.c b/arch/mips/momentum/jaguar_atx/dbg_io.c
index 542eac82b63c..d7dea0a136aa 100644
--- a/arch/mips/momentum/jaguar_atx/dbg_io.c
+++ b/arch/mips/momentum/jaguar_atx/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-        /* set up buad rate */
+        /* set up baud rate */
        {
                uint32 divisor;
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c
index 1379c76845dc..df1485501ce6 100644
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@@ -359,7 +359,7 @@ static __init int __init ja_pci_init(void)
 arch_initcall(ja_pci_init);
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        unsigned int tmpword;
diff --git a/arch/mips/momentum/ocelot_3/setup.c b/arch/mips/momentum/ocelot_3/setup.c
index c69195234309..8c53490ba6f1 100644
--- a/arch/mips/momentum/ocelot_3/setup.c
+++ b/arch/mips/momentum/ocelot_3/setup.c
@@ -313,7 +313,7 @@ static __init int __init ja_pci_init(void)
 arch_initcall(ja_pci_init);
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        unsigned int tmpword;
diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c
index 8720bccfdea2..f0a6a38fcf4d 100644
--- a/arch/mips/momentum/ocelot_c/dbg_io.c
+++ b/arch/mips/momentum/ocelot_c/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-        /* set up buad rate */
+        /* set up baud rate */
        {
                uint32 divisor;
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index a3e6f5575592..257e1d1b72dd 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -231,7 +231,7 @@ void momenco_time_init(void)
        rtc_mips_set_time = m48t37y_set_time;
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        unsigned int tmpword;
diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c
index 8720bccfdea2..f0a6a38fcf4d 100644
--- a/arch/mips/momentum/ocelot_g/dbg_io.c
+++ b/arch/mips/momentum/ocelot_g/dbg_io.c
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
-        /* set up buad rate */
+        /* set up baud rate */
        {
                uint32 divisor;
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c
index fed4e8eee116..72143ab1e900 100644
--- a/arch/mips/momentum/ocelot_g/setup.c
+++ b/arch/mips/momentum/ocelot_g/setup.c
@@ -162,7 +162,7 @@ static void __init setup_l3cache(unsigned long size)
        printk("Done\n");
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache);
        unsigned int tmpword;
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index f2b4862aaae5..c31e4cff64e0 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -14,8 +14,8 @@
 #include "op_impl.h"
-extern struct op_mips_model op_model_mipsxx __attribute__((weak));
+extern struct op_mips_model op_model_mipsxx_ops __attribute__((weak));
-extern struct op_mips_model op_model_rm9000 __attribute__((weak));
+extern struct op_mips_model op_model_rm9000_ops __attribute__((weak));
 static struct op_mips_model *model;
@@ -80,13 +80,14 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
        case CPU_24K:
        case CPU_25KF:
        case CPU_34K:
+        case CPU_74K:
        case CPU_SB1:
        case CPU_SB1A:
-                lmodel = &op_model_mipsxx;
+                lmodel = &op_model_mipsxx_ops;
                break;
        case CPU_RM9000:
-                lmodel = &op_model_rm9000;
+                lmodel = &op_model_rm9000_ops;
                break;
        };
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 95d488ca0754..f26a00e13204 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -23,7 +23,7 @@
 #define M_COUNTER_OVERFLOW              (1UL    << 31)
-struct op_mips_model op_model_mipsxx;
+struct op_mips_model op_model_mipsxx_ops;
 static struct mipsxx_register_config {
        unsigned int control[4];
@@ -34,7 +34,7 @@ static struct mipsxx_register_config {
 static void mipsxx_reg_setup(struct op_counter_config *ctr)
 {
-        unsigned int counters = op_model_mipsxx.num_counters;
+        unsigned int counters = op_model_mipsxx_ops.num_counters;
        int i;
        /* Compute the performance counter control word.  */
@@ -62,7 +62,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
 static void mipsxx_cpu_setup (void *args)
 {
-        unsigned int counters = op_model_mipsxx.num_counters;
+        unsigned int counters = op_model_mipsxx_ops.num_counters;
        switch (counters) {
        case 4:
@@ -83,7 +83,7 @@ static void mipsxx_cpu_setup (void *args)
 /* Start all counters on current CPU */
 static void mipsxx_cpu_start(void *args)
 {
-        unsigned int counters = op_model_mipsxx.num_counters;
+        unsigned int counters = op_model_mipsxx_ops.num_counters;
        switch (counters) {
        case 4:
@@ -100,7 +100,7 @@ static void mipsxx_cpu_start(void *args)
 /* Stop all counters on current CPU */
 static void mipsxx_cpu_stop(void *args)
 {
-        unsigned int counters = op_model_mipsxx.num_counters;
+        unsigned int counters = op_model_mipsxx_ops.num_counters;
        switch (counters) {
        case 4:
@@ -116,7 +116,7 @@ static void mipsxx_cpu_stop(void *args)
 static int mipsxx_perfcount_handler(struct pt_regs *regs)
 {
-        unsigned int counters = op_model_mipsxx.num_counters;
+        unsigned int counters = op_model_mipsxx_ops.num_counters;
        unsigned int control;
        unsigned int counter;
        int handled = 0;
@@ -187,33 +187,37 @@ static int __init mipsxx_init(void)
        reset_counters(counters);
-        op_model_mipsxx.num_counters = counters;
+        op_model_mipsxx_ops.num_counters = counters;
        switch (current_cpu_data.cputype) {
        case CPU_20KC:
-                op_model_mipsxx.cpu_type = "mips/20K";
+                op_model_mipsxx_ops.cpu_type = "mips/20K";
                break;
        case CPU_24K:
-                op_model_mipsxx.cpu_type = "mips/24K";
+                op_model_mipsxx_ops.cpu_type = "mips/24K";
                break;
        case CPU_25KF:
-                op_model_mipsxx.cpu_type = "mips/25K";
+                op_model_mipsxx_ops.cpu_type = "mips/25K";
                break;
 #ifndef CONFIG_SMP
        case CPU_34K:
-                op_model_mipsxx.cpu_type = "mips/34K";
+                op_model_mipsxx_ops.cpu_type = "mips/34K";
+                break;
+        case CPU_74K:
+                op_model_mipsxx_ops.cpu_type = "mips/74K";
                break;
 #endif
        case CPU_5KC:
-                op_model_mipsxx.cpu_type = "mips/5K";
+                op_model_mipsxx_ops.cpu_type = "mips/5K";
                break;
        case CPU_SB1:
        case CPU_SB1A:
-                op_model_mipsxx.cpu_type = "mips/sb1";
+                op_model_mipsxx_ops.cpu_type = "mips/sb1";
                break;
        default:
@@ -229,12 +233,12 @@ static int __init mipsxx_init(void)
 static void mipsxx_exit(void)
 {
-        reset_counters(op_model_mipsxx.num_counters);
+        reset_counters(op_model_mipsxx_ops.num_counters);
        perf_irq = null_perf_irq;
 }
-struct op_mips_model op_model_mipsxx = {
+struct op_mips_model op_model_mipsxx_ops = {
        .reg_setup      = mipsxx_reg_setup,
        .cpu_setup      = mipsxx_cpu_setup,
        .init           = mipsxx_init,
diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c
index 9b75e41c78ef..b7063fefa65b 100644
--- a/arch/mips/oprofile/op_model_rm9000.c
+++ b/arch/mips/oprofile/op_model_rm9000.c
@@ -126,7 +126,7 @@ static void rm9000_exit(void)
        free_irq(rm9000_perfcount_irq, NULL);
 }
-struct op_mips_model op_model_rm9000 = {
+struct op_mips_model op_model_rm9000_ops = {
        .reg_setup      = rm9000_reg_setup,
        .cpu_setup      = rm9000_cpu_setup,
        .init           = rm9000_init,
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 16205b587338..465778c5d816 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -18,12 +18,12 @@ obj-$(CONFIG_MIPS_NILE4)	+= ops-nile4.o
 obj-$(CONFIG_MIPS_TX3927)       += ops-tx3927.o
 obj-$(CONFIG_PCI_VR41XX)        += ops-vr41xx.o pci-vr41xx.o
 obj-$(CONFIG_NEC_CMBVR4133)     += fixup-vr4133.o
+obj-$(CONFIG_MARKEINS)          += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
 #
 # These are still pretty much in the old state, watch, go blind.
 #
-obj-$(CONFIG_DDB5074)           += fixup-ddb5074.o pci-ddb5074.o ops-ddb5074.o
+obj-$(CONFIG_BASLER_EXCITE)     = ops-titan.o pci-excite.o fixup-excite.o
-obj-$(CONFIG_DDB5476)           += ops-ddb5476.o pci-ddb5476.o
 obj-$(CONFIG_DDB5477)           += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
 obj-$(CONFIG_LASAT)             += pci-lasat.o
 obj-$(CONFIG_MIPS_ATLAS)        += fixup-atlas.o
@@ -43,7 +43,7 @@ obj-$(CONFIG_MOMENCO_OCELOT_C)	+= fixup-ocelot-c.o pci-ocelot-c.o
 obj-$(CONFIG_MOMENCO_OCELOT_G)  += fixup-ocelot-g.o pci-ocelot-g.o
 obj-$(CONFIG_PMC_YOSEMITE)      += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
                                   pci-yosemite.o
-obj-$(CONFIG_SGI_IP27)          += pci-ip27.o
+obj-$(CONFIG_SGI_IP27)          += ops-bridge.o pci-ip27.o
 obj-$(CONFIG_SGI_IP32)          += fixup-ip32.o ops-mace.o pci-ip32.o
 obj-$(CONFIG_SIBYTE_SB1250)     += fixup-sb1250.o pci-sb1250.o
 obj-$(CONFIG_SIBYTE_BCM112X)    += fixup-sb1250.o pci-sb1250.o
@@ -57,3 +57,4 @@ obj-$(CONFIG_TOSHIBA_RBTX4927)	+= fixup-rbtx4927.o ops-tx4927.o
 obj-$(CONFIG_TOSHIBA_RBTX4938)  += fixup-tx4938.o ops-tx4938.o
 obj-$(CONFIG_VICTOR_MPC30X)     += fixup-mpc30x.o
 obj-$(CONFIG_ZAO_CAPCELLA)      += fixup-capcella.o
+obj-$(CONFIG_WR_PPMC)           += fixup-wrppmc.o
diff --git a/arch/mips/pci/fixup-ddb5074.c b/arch/mips/pci/fixup-ddb5074.c
deleted file mode 100644
index 5a4a7c239c42..000000000000
--- a/arch/mips/pci/fixup-ddb5074.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * It's nice to have the LEDs on the GPIO pins available for debugging
- */
-static void ddb5074_fixup(struct pci_dev *dev)
-{
-        extern struct pci_dev *pci_pmu;
-        u8 t8;
-        pci_pmu = dev;  /* for LEDs D2 and D3 */
-        /* Program the lines for LEDs D2 and D3 to output */
-        pci_read_config_byte(dev, 0x7d, &t8);
-        t8 |= 0xc0;
-        pci_write_config_byte(dev, 0x7d, t8);
-        /* Turn LEDs D2 and D3 off */
-        pci_read_config_byte(dev, 0x7e, &t8);
-        t8 |= 0xc0;
-        pci_write_config_byte(dev, 0x7e, t8);
-}
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
-          ddb5074_fixup);
diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c
new file mode 100644
index 000000000000..3a34cd0efd6b
--- /dev/null
+++ b/arch/mips/pci/fixup-emma2rh.c
@@ -0,0 +1,102 @@
+/*
+ *  arch/mips/pci/fixup-emma2rh.c
+ *      This file defines the PCI configration.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <asm/bootinfo.h>
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+#define EMMA2RH_PCI_HOST_SLOT 0x09
+#define EMMA2RH_USB_SLOT 0x03
+#define PCI_DEVICE_ID_NEC_EMMA2RH      0x014b /* EMMA2RH PCI Host */
+/*
+ * we fix up irqs based on the slot number.
+ * The first entry is at AD:11.
+ * Fortunately this works because, although we have two pci buses,
+ * they all have different slot numbers (except for rockhopper slot 20
+ * which is handled below).
+ *
+ */
+#define MAX_SLOT_NUM 10
+static unsigned char irq_map[][5] __initdata = {
+        [3] = {0, MARKEINS_PCI_IRQ_INTB, MARKEINS_PCI_IRQ_INTC,
+               MARKEINS_PCI_IRQ_INTD, 0,},
+        [4] = {0, MARKEINS_PCI_IRQ_INTA, 0, 0, 0,},
+        [5] = {0, 0, 0, 0, 0,},
+        [6] = {0, MARKEINS_PCI_IRQ_INTC, MARKEINS_PCI_IRQ_INTD,
+               MARKEINS_PCI_IRQ_INTA, MARKEINS_PCI_IRQ_INTB,},
+};
+static void __devinit nec_usb_controller_fixup(struct pci_dev *dev)
+{
+        if (PCI_SLOT(dev->devfn) == EMMA2RH_USB_SLOT)
+                /* on board USB controller configuration */
+                pci_write_config_dword(dev, 0xe4, 1 << 5);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
+                        nec_usb_controller_fixup);
+/*
+ * Prevent the PCI layer from seeing the resources allocated to this device
+ * if it is the host bridge by marking it as such.  These resources are of
+ * no consequence to the PCI layer (they are handled elsewhere).
+ */
+static void __devinit emma2rh_pci_host_fixup(struct pci_dev *dev)
+{
+        int i;
+        if (PCI_SLOT(dev->devfn) == EMMA2RH_PCI_HOST_SLOT) {
+                dev->class &= 0xff;
+                dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
+                for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+                        dev->resource[i].start = 0;
+                        dev->resource[i].end = 0;
+                        dev->resource[i].flags = 0;
+                }
+        }
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_EMMA2RH,
+                         emma2rh_pci_host_fixup);
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+        return irq_map[slot][pin];
+}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        return 0;
+}
diff --git a/arch/mips/pci/fixup-excite.c b/arch/mips/pci/fixup-excite.c
new file mode 100644
index 000000000000..1da696d43f00
--- /dev/null
+++ b/arch/mips/pci/fixup-excite.c
@@ -0,0 +1,36 @@
+/*
+ *  Copyright (C) 2004 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <excite.h>
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+        if (pin == 0)
+                return -1;
+        return USB_IRQ;         /* USB controller is the only PCI device */
+}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        return 0;
+}
diff --git a/arch/mips/pci/fixup-wrppmc.c b/arch/mips/pci/fixup-wrppmc.c
new file mode 100644
index 000000000000..3357c1300bb1
--- /dev/null
+++ b/arch/mips/pci/fixup-wrppmc.c
@@ -0,0 +1,37 @@
+/*
+ * fixup-wrppmc.c: PPMC board specific PCI fixup
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006, Wind River Inc. Rongkai.zhan (rongkai.zhan@windriver.com)
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/gt64120.h>
+/* PCI interrupt pins */
+#define PCI_INTA                1
+#define PCI_INTB                2
+#define PCI_INTC                3
+#define PCI_INTD                4
+#define PCI_SLOT_MAXNR  32 /* Each PCI bus has 32 physical slots */
+static char pci_irq_tab[PCI_SLOT_MAXNR][5] __initdata = {
+        /* 0    INTA   INTB   INTC   INTD */
+        [0] = {0, 0, 0, 0, 0},          /* Slot 0: GT64120 PCI bridge */
+        [6] = {0, WRPPMC_PCI_INTA_IRQ, 0, 0, 0},
+};
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+        return pci_irq_tab[slot][pin];
+}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+        return 0;
+}
diff --git a/arch/mips/pci/ops-bridge.c b/arch/mips/pci/ops-bridge.c
new file mode 100644
index 000000000000..1fa09929cd7a
--- /dev/null
+++ b/arch/mips/pci/ops-bridge.c
@@ -0,0 +1,306 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1999, 2000, 04, 06 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#include <linux/pci.h>
+#include <asm/paccess.h>
+#include <asm/pci/bridge.h>
+#include <asm/sn/arch.h>
+#include <asm/sn/intr.h>
+#include <asm/sn/sn0/hub.h>
+/*
+ * The Bridge ASIC supports both type 0 and type 1 access.  Type 1 is
+ * not really documented, so right now I can't write code which uses it.
+ * Therefore we use type 0 accesses for now even though they won't work
+ * correcly for PCI-to-PCI bridges.
+ *
+ * The function is complicated by the ultimate brokeness of the IOC3 chip
+ * which is used in SGI systems.  The IOC3 can only handle 32-bit PCI
+ * accesses and does only decode parts of it's address space.
+ */
+static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
+                                 int where, int size, u32 * value)
+{
+        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+        bridge_t *bridge = bc->base;
+        int slot = PCI_SLOT(devfn);
+        int fn = PCI_FUNC(devfn);
+        volatile void *addr;
+        u32 cf, shift, mask;
+        int res;
+        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to look at it for real ...
+         */
+        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+                goto oh_my_gawd;
+        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
+        if (size == 1)
+                res = get_dbe(*value, (u8 *) addr);
+        else if (size == 2)
+                res = get_dbe(*value, (u16 *) addr);
+        else
+                res = get_dbe(*value, (u32 *) addr);
+        return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+oh_my_gawd:
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to look at the wrong register.
+         */
+        if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
+                *value = 0;
+                return PCIBIOS_SUCCESSFUL;
+        }
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't try to access
+         * anything but 32-bit words ...
+         */
+        addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        shift = ((where & 3) << 3);
+        mask = (0xffffffffU >> ((4 - size) << 3));
+        *value = (cf >> shift) & mask;
+        return PCIBIOS_SUCCESSFUL;
+}
+static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
+                                 int where, int size, u32 * value)
+{
+        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+        bridge_t *bridge = bc->base;
+        int busno = bus->number;
+        int slot = PCI_SLOT(devfn);
+        int fn = PCI_FUNC(devfn);
+        volatile void *addr;
+        u32 cf, shift, mask;
+        int res;
+        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+        addr = &bridge->b_type1_cfg.c[(fn << 8) | PCI_VENDOR_ID];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to look at it for real ...
+         */
+        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+                goto oh_my_gawd;
+        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+        addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
+        if (size == 1)
+                res = get_dbe(*value, (u8 *) addr);
+        else if (size == 2)
+                res = get_dbe(*value, (u16 *) addr);
+        else
+                res = get_dbe(*value, (u32 *) addr);
+        return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+oh_my_gawd:
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to look at the wrong register.
+         */
+        if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
+                *value = 0;
+                return PCIBIOS_SUCCESSFUL;
+        }
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't try to access
+         * anything but 32-bit words ...
+         */
+        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+        addr = &bridge->b_type1_cfg.c[(fn << 8) | where];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        shift = ((where & 3) << 3);
+        mask = (0xffffffffU >> ((4 - size) << 3));
+        *value = (cf >> shift) & mask;
+        return PCIBIOS_SUCCESSFUL;
+}
+static int pci_read_config(struct pci_bus *bus, unsigned int devfn,
+                           int where, int size, u32 * value)
+{
+        if (bus->number > 0)
+                return pci_conf1_read_config(bus, devfn, where, size, value);
+        return pci_conf0_read_config(bus, devfn, where, size, value);
+}
+static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
+                                  int where, int size, u32 value)
+{
+        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+        bridge_t *bridge = bc->base;
+        int slot = PCI_SLOT(devfn);
+        int fn = PCI_FUNC(devfn);
+        volatile void *addr;
+        u32 cf, shift, mask, smask;
+        int res;
+        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to look at it for real ...
+         */
+        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+                goto oh_my_gawd;
+        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
+        if (size == 1) {
+                res = put_dbe(value, (u8 *) addr);
+        } else if (size == 2) {
+                res = put_dbe(value, (u16 *) addr);
+        } else {
+                res = put_dbe(value, (u32 *) addr);
+        }
+        if (res)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        return PCIBIOS_SUCCESSFUL;
+oh_my_gawd:
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to touch the wrong register.
+         */
+        if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
+                return PCIBIOS_SUCCESSFUL;
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't try to access
+         * anything but 32-bit words ...
+         */
+        addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        shift = ((where & 3) << 3);
+        mask = (0xffffffffU >> ((4 - size) << 3));
+        smask = mask << shift;
+        cf = (cf & ~smask) | ((value & mask) << shift);
+        if (put_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        return PCIBIOS_SUCCESSFUL;
+}
+static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
+                                  int where, int size, u32 value)
+{
+        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+        bridge_t *bridge = bc->base;
+        int slot = PCI_SLOT(devfn);
+        int fn = PCI_FUNC(devfn);
+        int busno = bus->number;
+        volatile void *addr;
+        u32 cf, shift, mask, smask;
+        int res;
+        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+        addr = &bridge->b_type1_cfg.c[(fn << 8) | PCI_VENDOR_ID];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to look at it for real ...
+         */
+        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+                goto oh_my_gawd;
+        addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
+        if (size == 1) {
+                res = put_dbe(value, (u8 *) addr);
+        } else if (size == 2) {
+                res = put_dbe(value, (u16 *) addr);
+        } else {
+                res = put_dbe(value, (u32 *) addr);
+        }
+        if (res)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        return PCIBIOS_SUCCESSFUL;
+oh_my_gawd:
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't even give the
+         * generic PCI code a chance to touch the wrong register.
+         */
+        if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
+                return PCIBIOS_SUCCESSFUL;
+        /*
+         * IOC3 is fucked fucked beyond believe ...  Don't try to access
+         * anything but 32-bit words ...
+         */
+        addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
+        if (get_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        shift = ((where & 3) << 3);
+        mask = (0xffffffffU >> ((4 - size) << 3));
+        smask = mask << shift;
+        cf = (cf & ~smask) | ((value & mask) << shift);
+        if (put_dbe(cf, (u32 *) addr))
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        return PCIBIOS_SUCCESSFUL;
+}
+static int pci_write_config(struct pci_bus *bus, unsigned int devfn,
+        int where, int size, u32 value)
+{
+        if (bus->number > 0)
+                return pci_conf1_write_config(bus, devfn, where, size, value);
+        return pci_conf0_write_config(bus, devfn, where, size, value);
+}
+struct pci_ops bridge_pci_ops = {
+        .read   = pci_read_config,
+        .write  = pci_write_config,
+};
diff --git a/arch/mips/pci/ops-ddb5074.c b/arch/mips/pci/ops-ddb5074.c
deleted file mode 100644
index 89f97bef4fc4..000000000000
--- a/arch/mips/pci/ops-ddb5074.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/ddb5xxx/ddb5476/pci_ops.c
- *     Define the pci_ops for DB5477.
- *
- * Much of the code is derived from the original DDB5074 port by
- * Geert Uytterhoeven <geert@sonycom.com>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/addrspace.h>
-#include <asm/debug.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-/*
- * config_swap structure records what set of pdar/pmr are used
- * to access pci config space.  It also provides a place hold the
- * original values for future restoring.
- */
-struct pci_config_swap {
-        u32 pdar;
-        u32 pmr;
-        u32 config_base;
-        u32 config_size;
-        u32 pdar_backup;
-        u32 pmr_backup;
-};
-/*
- * On DDB5476, we have one set of swap registers
- */
-struct pci_config_swap ext_pci_swap = {
-        DDB_PCIW0,
-        DDB_PCIINIT0,
-        DDB_PCI_CONFIG_BASE,
-        DDB_PCI_CONFIG_SIZE
-};
-static int pci_config_workaround = 1;
-/*
- * access config space
- */
-static inline u32 ddb_access_config_base(struct pci_config_swap *swap, u32 bus, /* 0 means top level bus */
-                                         u32 slot_num)
-{
-        u32 pci_addr = 0;
-        u32 pciinit_offset = 0;
-        u32 virt_addr = swap->config_base;
-        u32 option;
-        if (pci_config_workaround) {
-                if (slot_num == 5)
-                        slot_num = 14;
-        } else {
-                if (slot_num == 5)
-                        return DDB_BASE + DDB_PCI_BASE;
-        }
-        /* minimum pdar (window) size is 2MB */
-        db_assert(swap->config_size >= (2 << 20));
-        db_assert(slot_num < (1 << 5));
-        db_assert(bus < (1 << 8));
-        /* backup registers */
-        swap->pdar_backup = ddb_in32(swap->pdar);
-        swap->pmr_backup = ddb_in32(swap->pmr);
-        /* set the pdar (pci window) register */
-        ddb_set_pdar(swap->pdar, swap->config_base, swap->config_size, 32,      /* 32 bit wide */
-                     0,         /* not on local memory bus */
-                     0);        /* not visible from PCI bus (N/A) */
-        /*
-         * calcuate the absolute pci config addr;
-         * according to the spec, we start scanning from adr:11 (0x800)
-         */
-        if (bus == 0) {
-                /* type 0 config */
-                pci_addr = 0x00040000 << slot_num;
-        } else {
-                /* type 1 config */
-                pci_addr = 0x00040000 << slot_num;
-                panic
-                    ("ddb_access_config_base: we don't support type 1 config Yet");
-        }
-        /*
-         * if pci_addr is less than pci config window size,  we set
-         * pciinit_offset to 0 and adjust the virt_address.
-         * Otherwise we will try to adjust pciinit_offset.
-         */
-        if (pci_addr < swap->config_size) {
-                virt_addr = KSEG1ADDR(swap->config_base + pci_addr);
-                pciinit_offset = 0;
-        } else {
-                db_assert((pci_addr & (swap->config_size - 1)) == 0);
-                virt_addr = KSEG1ADDR(swap->config_base);
-                pciinit_offset = pci_addr;
-        }
-        /* set the pmr register */
-        option = DDB_PCI_ACCESS_32;
-        if (bus != 0)
-                option |= DDB_PCI_CFGTYPE1;
-        ddb_set_pmr(swap->pmr, DDB_PCICMD_CFG, pciinit_offset, option);
-        return virt_addr;
-}
-static inline void ddb_close_config_base(struct pci_config_swap *swap)
-{
-        ddb_out32(swap->pdar, swap->pdar_backup);
-        ddb_out32(swap->pmr, swap->pmr_backup);
-}
-static int read_config_dword(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u32 * val)
-{
-        u32 bus, slot_num, func_num;
-        u32 base;
-        db_assert((where & 3) == 0);
-        db_assert(where < (1 << 8));
-        /* check if the bus is top-level */
-        if (dev->bus->parent != NULL) {
-                bus = dev->bus->number;
-                db_assert(bus != 0);
-        } else {
-                bus = 0;
-        }
-        slot_num = PCI_SLOT(dev->devfn);
-        func_num = PCI_FUNC(dev->devfn);
-        base = ddb_access_config_base(swap, bus, slot_num);
-        *val = *(volatile u32 *) (base + (func_num << 8) + where);
-        ddb_close_config_base(swap);
-        return PCIBIOS_SUCCESSFUL;
-}
-static int read_config_word(struct pci_config_swap *swap,
-                            struct pci_dev *dev, u32 where, u16 * val)
-{
-        int status;
-        u32 result;
-        db_assert((where & 1) == 0);
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (where & 2)
-                result >>= 16;
-        *val = result & 0xffff;
-        return status;
-}
-static int read_config_byte(struct pci_config_swap *swap,
-                            struct pci_dev *dev, u32 where, u8 * val)
-{
-        int status;
-        u32 result;
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (where & 1)
-                result >>= 8;
-        if (where & 2)
-                result >>= 16;
-        *val = result & 0xff;
-        return status;
-}
-static int write_config_dword(struct pci_config_swap *swap,
-                              struct pci_dev *dev, u32 where, u32 val)
-{
-        u32 bus, slot_num, func_num;
-        u32 base;
-        db_assert((where & 3) == 0);
-        db_assert(where < (1 << 8));
-        /* check if the bus is top-level */
-        if (dev->bus->parent != NULL) {
-                bus = dev->bus->number;
-                db_assert(bus != 0);
-        } else {
-                bus = 0;
-        }
-        slot_num = PCI_SLOT(dev->devfn);
-        func_num = PCI_FUNC(dev->devfn);
-        base = ddb_access_config_base(swap, bus, slot_num);
-        *(volatile u32 *) (base + (func_num << 8) + where) = val;
-        ddb_close_config_base(swap);
-        return PCIBIOS_SUCCESSFUL;
-}
-static int write_config_word(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u16 val)
-{
-        int status, shift = 0;
-        u32 result;
-        db_assert((where & 1) == 0);
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (status != PCIBIOS_SUCCESSFUL)
-                return status;
-        if (where & 2)
-                shift += 16;
-        result &= ~(0xffff << shift);
-        result |= val << shift;
-        return write_config_dword(swap, dev, where & ~3, result);
-}
-static int write_config_byte(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u8 val)
-{
-        int status, shift = 0;
-        u32 result;
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (status != PCIBIOS_SUCCESSFUL)
-                return status;
-        if (where & 2)
-                shift += 16;
-        if (where & 1)
-                shift += 8;
-        result &= ~(0xff << shift);
-        result |= val << shift;
-        return write_config_dword(swap, dev, where & ~3, result);
-}
-#define MAKE_PCI_OPS(prefix, rw, unitname, unittype, pciswap) \
-static int prefix##_##rw##_config_##unitname(struct pci_dev *dev, int where, unittype val) \
-{ \
-     return rw##_config_##unitname(pciswap, \
-                                   dev, \
-                                   where, \
-                                   val); \
-}
-MAKE_PCI_OPS(extpci, read, byte, u8 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, read, word, u16 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, read, dword, u32 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, byte, u8, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, word, u16, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, dword, u32, &ext_pci_swap)
-struct pci_ops ddb5476_ext_pci_ops = {
-        extpci_read_config_byte,
-        extpci_read_config_word,
-        extpci_read_config_dword,
-        extpci_write_config_byte,
-        extpci_write_config_word,
-        extpci_write_config_dword
-};
diff --git a/arch/mips/pci/ops-ddb5476.c b/arch/mips/pci/ops-ddb5476.c
deleted file mode 100644
index 12da58e75ec7..000000000000
--- a/arch/mips/pci/ops-ddb5476.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/ddb5xxx/ddb5476/pci_ops.c
- *     Define the pci_ops for DB5477.
- *
- * Much of the code is derived from the original DDB5074 port by
- * Geert Uytterhoeven <geert@sonycom.com>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/addrspace.h>
-#include <asm/debug.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-/*
- * config_swap structure records what set of pdar/pmr are used
- * to access pci config space.  It also provides a place hold the
- * original values for future restoring.
- */
-struct pci_config_swap {
-        u32 pdar;
-        u32 pmr;
-        u32 config_base;
-        u32 config_size;
-        u32 pdar_backup;
-        u32 pmr_backup;
-};
-/*
- * On DDB5476, we have one set of swap registers
- */
-struct pci_config_swap ext_pci_swap = {
-        DDB_PCIW0,
-        DDB_PCIINIT0,
-        DDB_PCI_CONFIG_BASE,
-        DDB_PCI_CONFIG_SIZE
-};
-static int pci_config_workaround = 1;
-/*
- * access config space
- */
-static inline u32 ddb_access_config_base(struct pci_config_swap *swap, u32 bus, /* 0 means top level bus */
-                                         u32 slot_num)
-{
-        u32 pci_addr = 0;
-        u32 pciinit_offset = 0;
-        u32 virt_addr = swap->config_base;
-        u32 option;
-        if (pci_config_workaround) {
-                /* [jsun] work around Vrc5476 controller itself, returnning
-                 * slot 0 essentially makes vrc5476 invisible
-                 */
-                if (slot_num == 12)
-                        slot_num = 0;
-#if 0
-                /* BUG : skip P2P bridge for now */
-                if (slot_num == 5)
-                        slot_num = 0;
-#endif
-        } else {
-                /* now we have to be hornest, returning the true
-                 * PCI config headers for vrc5476
-                 */
-                if (slot_num == 12) {
-                        swap->pdar_backup = ddb_in32(swap->pdar);
-                        swap->pmr_backup = ddb_in32(swap->pmr);
-                        return DDB_BASE + DDB_PCI_BASE;
-                }
-        }
-        /* minimum pdar (window) size is 2MB */
-        db_assert(swap->config_size >= (2 << 20));
-        db_assert(slot_num < (1 << 5));
-        db_assert(bus < (1 << 8));
-        /* backup registers */
-        swap->pdar_backup = ddb_in32(swap->pdar);
-        swap->pmr_backup = ddb_in32(swap->pmr);
-        /* set the pdar (pci window) register */
-        ddb_set_pdar(swap->pdar, swap->config_base, swap->config_size, 32,      /* 32 bit wide */
-                     0,         /* not on local memory bus */
-                     0);        /* not visible from PCI bus (N/A) */
-        /*
-         * calcuate the absolute pci config addr;
-         * according to the spec, we start scanning from adr:11 (0x800)
-         */
-        if (bus == 0) {
-                /* type 0 config */
-                pci_addr = 0x800 << slot_num;
-        } else {
-                /* type 1 config */
-                pci_addr = (bus << 16) | (slot_num << 11);
-                /* panic("ddb_access_config_base: we don't support type 1 config Yet"); */
-        }
-        /*
-         * if pci_addr is less than pci config window size,  we set
-         * pciinit_offset to 0 and adjust the virt_address.
-         * Otherwise we will try to adjust pciinit_offset.
-         */
-        if (pci_addr < swap->config_size) {
-                virt_addr = KSEG1ADDR(swap->config_base + pci_addr);
-                pciinit_offset = 0;
-        } else {
-                db_assert((pci_addr & (swap->config_size - 1)) == 0);
-                virt_addr = KSEG1ADDR(swap->config_base);
-                pciinit_offset = pci_addr;
-        }
-        /* set the pmr register */
-        option = DDB_PCI_ACCESS_32;
-        if (bus != 0)
-                option |= DDB_PCI_CFGTYPE1;
-        ddb_set_pmr(swap->pmr, DDB_PCICMD_CFG, pciinit_offset, option);
-        return virt_addr;
-}
-static inline void ddb_close_config_base(struct pci_config_swap *swap)
-{
-        ddb_out32(swap->pdar, swap->pdar_backup);
-        ddb_out32(swap->pmr, swap->pmr_backup);
-}
-static int read_config_dword(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u32 * val)
-{
-        u32 bus, slot_num, func_num;
-        u32 base;
-        db_assert((where & 3) == 0);
-        db_assert(where < (1 << 8));
-        /* check if the bus is top-level */
-        if (dev->bus->parent != NULL) {
-                bus = dev->bus->number;
-                db_assert(bus != 0);
-        } else {
-                bus = 0;
-        }
-        slot_num = PCI_SLOT(dev->devfn);
-        func_num = PCI_FUNC(dev->devfn);
-        base = ddb_access_config_base(swap, bus, slot_num);
-        *val = *(volatile u32 *) (base + (func_num << 8) + where);
-        ddb_close_config_base(swap);
-        return PCIBIOS_SUCCESSFUL;
-}
-static int read_config_word(struct pci_config_swap *swap,
-                            struct pci_dev *dev, u32 where, u16 * val)
-{
-        int status;
-        u32 result;
-        db_assert((where & 1) == 0);
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (where & 2)
-                result >>= 16;
-        *val = result & 0xffff;
-        return status;
-}
-static int read_config_byte(struct pci_config_swap *swap,
-                            struct pci_dev *dev, u32 where, u8 * val)
-{
-        int status;
-        u32 result;
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (where & 1)
-                result >>= 8;
-        if (where & 2)
-                result >>= 16;
-        *val = result & 0xff;
-        return status;
-}
-static int write_config_dword(struct pci_config_swap *swap,
-                              struct pci_dev *dev, u32 where, u32 val)
-{
-        u32 bus, slot_num, func_num;
-        u32 base;
-        db_assert((where & 3) == 0);
-        db_assert(where < (1 << 8));
-        /* check if the bus is top-level */
-        if (dev->bus->parent != NULL) {
-                bus = dev->bus->number;
-                db_assert(bus != 0);
-        } else {
-                bus = 0;
-        }
-        slot_num = PCI_SLOT(dev->devfn);
-        func_num = PCI_FUNC(dev->devfn);
-        base = ddb_access_config_base(swap, bus, slot_num);
-        *(volatile u32 *) (base + (func_num << 8) + where) = val;
-        ddb_close_config_base(swap);
-        return PCIBIOS_SUCCESSFUL;
-}
-static int write_config_word(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u16 val)
-{
-        int status, shift = 0;
-        u32 result;
-        db_assert((where & 1) == 0);
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (status != PCIBIOS_SUCCESSFUL)
-                return status;
-        if (where & 2)
-                shift += 16;
-        result &= ~(0xffff << shift);
-        result |= val << shift;
-        return write_config_dword(swap, dev, where & ~3, result);
-}
-static int write_config_byte(struct pci_config_swap *swap,
-                             struct pci_dev *dev, u32 where, u8 val)
-{
-        int status, shift = 0;
-        u32 result;
-        status = read_config_dword(swap, dev, where & ~3, &result);
-        if (status != PCIBIOS_SUCCESSFUL)
-                return status;
-        if (where & 2)
-                shift += 16;
-        if (where & 1)
-                shift += 8;
-        result &= ~(0xff << shift);
-        result |= val << shift;
-        return write_config_dword(swap, dev, where & ~3, result);
-}
-#define MAKE_PCI_OPS(prefix, rw, unitname, unittype, pciswap) \
-static int prefix##_##rw##_config_##unitname(struct pci_dev *dev, int where, unittype val) \
-{ \
-     return rw##_config_##unitname(pciswap, \
-                                   dev, \
-                                   where, \
-                                   val); \
-}
-MAKE_PCI_OPS(extpci, read, byte, u8 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, read, word, u16 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, read, dword, u32 *, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, byte, u8, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, word, u16, &ext_pci_swap)
-    MAKE_PCI_OPS(extpci, write, dword, u32, &ext_pci_swap)
-struct pci_ops ddb5476_ext_pci_ops = {
-        extpci_read_config_byte,
-        extpci_read_config_word,
-        extpci_read_config_dword,
-        extpci_write_config_byte,
-        extpci_write_config_word,
-        extpci_write_config_dword
-};
diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c
new file mode 100644
index 000000000000..e21b11bf66bc
--- /dev/null
+++ b/arch/mips/pci/ops-emma2rh.c
@@ -0,0 +1,186 @@
+/*
+ *  arch/mips/pci/ops-emma2rh.c
+ *      This file defines the PCI operation for EMMA2RH.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This file is based on the arch/mips/pci/ops-vr41xx.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/addrspace.h>
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+#define RTABORT (0x1<<9)
+#define RMABORT (0x1<<10)
+#define EMMA2RH_PCI_SLOT_NUM 9  /* 0000:09.0 is final PCI device */
+/*
+ * access config space
+ */
+static int check_args(struct pci_bus *bus, u32 devfn, u32 * bus_num)
+{
+        /* check if the bus is top-level */
+        if (bus->parent != NULL) {
+                *bus_num = bus->number;
+                db_assert(bus_num != 0);
+        } else
+                *bus_num = 0;
+        if (*bus_num == 0) {
+                /* Type 0 */
+                if (PCI_SLOT(devfn) >= 10)
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+        } else {
+                /* Type 1 */
+                if ((*bus_num >= 64) || (PCI_SLOT(devfn) >= 16))
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+        }
+        return 0;
+}
+static inline int set_pci_configuration_address(unsigned char bus_num,
+                                                unsigned int devfn, int where)
+{
+        u32 config_win0;
+        emma2rh_out32(EMMA2RH_PCI_INT, ~RMABORT);
+        if (bus_num == 0)
+                /*
+                 * Type 0 configuration
+                 */
+                config_win0 = (1 << (22 + PCI_SLOT(devfn))) | (5 << 9);
+        else
+                /*
+                 * Type 1 configuration
+                 */
+                config_win0 = (bus_num << 26) | (PCI_SLOT(devfn) << 22) |
+                    (1 << 15) | (5 << 9);
+        emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, config_win0);
+        return 0;
+}
+static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
+                           int size, uint32_t * val)
+{
+        u32 bus_num;
+        u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
+        u32 backup_win0;
+        u32 data;
+        *val = 0xffffffffU;
+        if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
+        if (set_pci_configuration_address(bus_num, devfn, where) < 0)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        data =
+            *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
+                              (where & 0xfffffffc));
+        switch (size) {
+        case 1:
+                *val = (data >> ((where & 3) << 3)) & 0xffU;
+                break;
+        case 2:
+                *val = (data >> ((where & 2) << 3)) & 0xffffU;
+                break;
+        case 4:
+                *val = data;
+                break;
+        default:
+                emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
+                return PCIBIOS_FUNC_NOT_SUPPORTED;
+        }
+        emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
+        if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        return PCIBIOS_SUCCESSFUL;
+}
+static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
+                            int size, u32 val)
+{
+        u32 bus_num;
+        u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
+        u32 backup_win0;
+        u32 data;
+        int shift;
+        if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
+        if (set_pci_configuration_address(bus_num, devfn, where) < 0)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /* read modify write */
+        data =
+            *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
+                              (where & 0xfffffffc));
+        switch (size) {
+        case 1:
+                shift = (where & 3) << 3;
+                data &= ~(0xffU << shift);
+                data |= ((val & 0xffU) << shift);
+                break;
+        case 2:
+                shift = (where & 2) << 3;
+                data &= ~(0xffffU << shift);
+                data |= ((val & 0xffffU) << shift);
+                break;
+        case 4:
+                data = val;
+                break;
+        default:
+                emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
+                return PCIBIOS_FUNC_NOT_SUPPORTED;
+        }
+        *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
+                          (where & 0xfffffffc)) = data;
+        emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
+        if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        return PCIBIOS_SUCCESSFUL;
+}
+struct pci_ops emma2rh_pci_ops = {
+        .read = pci_config_read,
+        .write = pci_config_write,
+};
diff --git a/arch/mips/pci/ops-it8172.c b/arch/mips/pci/ops-it8172.c
index b7a8b9a6f9db..ba8328505a0a 100644
--- a/arch/mips/pci/ops-it8172.c
+++ b/arch/mips/pci/ops-it8172.c
@@ -50,30 +50,28 @@
 static struct resource pci_mem_resource_1;
 static struct resource pci_io_resource = {
-        "io pci IO space",
+        .start  = 0x14018000,
-        0x14018000,
+        .end    = 0x17FFFFFF,
-        0x17FFFFFF,
+        .name   = "io pci IO space",
-        IORESOURCE_IO
+        .flags  = IORESOURCE_IO
 };
 static struct resource pci_mem_resource_0 = {
-        "ext pci memory space 0/1",
+        .start  = 0x10101000,
-        0x10101000,
+        .end    = 0x13FFFFFF,
-        0x13FFFFFF,
+        .name   = "ext pci memory space 0/1",
-        IORESOURCE_MEM,
+        .flags  = IORESOURCE_MEM,
-        &pci_mem_resource_0,
+        .parent = &pci_mem_resource_0,
-        NULL,
+        .sibling = NULL,
-        &pci_mem_resource_1
+        .child  = &pci_mem_resource_1
 };
 static struct resource pci_mem_resource_1 = {
-        "ext pci memory space 2/3",
+        .start  = 0x1A000000,
-        0x1A000000,
+        .end    = 0x1FBFFFFF,
-        0x1FBFFFFF,
+        .name   = "ext pci memory space 2/3",
-        IORESOURCE_MEM,
+        .flags  = IORESOURCE_MEM,
-        &pci_mem_resource_0,
+        .parent = &pci_mem_resource_0
-        NULL,
-        NULL
 };
 extern struct pci_ops it8172_pci_ops;
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c
index 62bdd19c7f8e..2b0ccd6d9dcd 100644
--- a/arch/mips/pci/ops-sni.c
+++ b/arch/mips/pci/ops-sni.c
@@ -47,13 +47,13 @@ static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg,
        switch (size) {
        case 1:
-                *val = *(volatile  u8 *) (PCIMT_CONFIG_DATA + (reg & 3));
+                *val = inb(PCIMT_CONFIG_DATA + (reg & 3));
                break;
        case 2:
-                *val = *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2));
+                *val = inw(PCIMT_CONFIG_DATA + (reg & 2));
                break;
        case 4:
-                *val = *(volatile u32 *) PCIMT_CONFIG_DATA;
+                *val = inl(PCIMT_CONFIG_DATA);
                break;
        }
@@ -70,13 +70,13 @@ static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg,
        switch (size) {
        case 1:
-                *(volatile  u8 *) (PCIMT_CONFIG_DATA + (reg & 3)) = val;
+                outb (val, PCIMT_CONFIG_DATA + (reg & 3));
                break;
        case 2:
-                *(volatile u16 *) (PCIMT_CONFIG_DATA + (reg & 2)) = val;
+                outw (val, PCIMT_CONFIG_DATA + (reg & 2));
                break;
        case 4:
-                *(volatile u32 *) PCIMT_CONFIG_DATA = val;
+                outl (val, PCIMT_CONFIG_DATA);
                break;
        }
diff --git a/arch/mips/pci/ops-titan.c b/arch/mips/pci/ops-titan.c
index 233ec6f2054d..ebf8fc40e9b2 100644
--- a/arch/mips/pci/ops-titan.c
+++ b/arch/mips/pci/ops-titan.c
@@ -26,8 +26,19 @@
 #include <linux/pci.h>
 #include <linux/kernel.h>
-#include <asm/titan_dep.h>
+#include <asm/pci.h>
+#include <asm/io.h>
+#include <asm/rm9k-ocd.h>
+/*
+ * PCI specific defines
+ */
+#define TITAN_PCI_0_CONFIG_ADDRESS      0x780
+#define TITAN_PCI_0_CONFIG_DATA         0x784
+/*
+ * Titan PCI Config Read Byte
+ */
 static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
        int size, u32 * val)
 {
@@ -43,8 +54,8 @@ static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
        /* start the configuration cycle */
-        TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address);
+        ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
-        tmp = TITAN_READ(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);
+        tmp = ocd_readl(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);
        switch (size) {
        case 1:
@@ -71,20 +82,20 @@ static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
                (reg & 0xfc) | 0x80000000;
        /* start the configuration cycle */
-        TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address);
+        ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
        /* write the data */
        switch (size) {
        case 1:
-                TITAN_WRITE_8(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3), val);
+                ocd_writeb(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3));
                break;
        case 2:
-                TITAN_WRITE_16(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2), val);
+                ocd_writew(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2));
                break;
        case 4:
-                TITAN_WRITE(TITAN_PCI_0_CONFIG_DATA, val);
+                ocd_writel(val, TITAN_PCI_0_CONFIG_DATA);
                break;
        }
diff --git a/arch/mips/pci/pci-ddb5074.c b/arch/mips/pci/pci-ddb5074.c
deleted file mode 100644
index 73f9ceeb2f55..000000000000
--- a/arch/mips/pci/pci-ddb5074.c
+++ /dev/null
@@ -1,79 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <asm/debug.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static struct resource extpci_io_resource = {
-        "pci IO space",
-        0x1000,                 /* leave some room for ISA bus */
-        DDB_PCI_IO_SIZE - 1,
-        IORESOURCE_IO
-};
-static struct resource extpci_mem_resource = {
-        "pci memory space",
-        DDB_PCI_MEM_BASE + 0x00100000,  /* leave 1 MB for RTC */
-        DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1,
-        IORESOURCE_MEM
-};
-extern struct pci_ops ddb5476_ext_pci_ops;
-struct pci_controller ddb5476_controller = {
-        .pci_ops        = &ddb5476_ext_pci_ops,
-        .io_resource    = &extpci_io_resource,
-        .mem_resource   = &extpci_mem_resource,
-};
-#define     PCI_EXT_INTA        8
-#define     PCI_EXT_INTB        9
-#define     PCI_EXT_INTC        10
-#define     PCI_EXT_INTD        11
-#define     PCI_EXT_INTE        12
-#define     MAX_SLOT_NUM        14
-static unsigned char irq_map[MAX_SLOT_NUM] = {
-  [ 0] = nile4_to_irq(PCI_EXT_INTE),
-  [ 1] = nile4_to_irq(PCI_EXT_INTA),
-  [ 2] = nile4_to_irq(PCI_EXT_INTA),
-  [ 3] = nile4_to_irq(PCI_EXT_INTB),
-  [ 4] = nile4_to_irq(PCI_EXT_INTC),
-  [ 5] = nile4_to_irq(NILE4_INT_UART),
-  [10] = nile4_to_irq(PCI_EXT_INTE),
-  [13] = nile4_to_irq(PCI_EXT_INTE),
-};
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
-        return irq_map[slot];
-}
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
-        return 0;
-}
-void __init ddb_pci_reset_bus(void)
-{
-        u32 temp;
-        /*
-         * I am not sure about the "official" procedure, the following
-         * steps work as far as I know:
-         * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
-         * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
-         * The same is true for both PCI channels.
-         */
-        temp = ddb_in32(DDB_PCICTRL + 4);
-        temp |= 0x80000000;
-        ddb_out32(DDB_PCICTRL + 4, temp);
-        temp &= ~0xc0000000;
-        ddb_out32(DDB_PCICTRL + 4, temp);
-}
diff --git a/arch/mips/pci/pci-ddb5476.c b/arch/mips/pci/pci-ddb5476.c
deleted file mode 100644
index 90dd49509800..000000000000
--- a/arch/mips/pci/pci-ddb5476.c
+++ /dev/null
@@ -1,93 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <asm/debug.h>
-#include <asm/ddb5xxx/ddb5xxx.h>
-static struct resource extpci_io_resource = {
-        "pci IO space",
-        0x1000,                 /* leave some room for ISA bus */
-        DDB_PCI_IO_SIZE - 1,
-        IORESOURCE_IO
-};
-static struct resource extpci_mem_resource = {
-        "pci memory space",
-        DDB_PCI_MEM_BASE + 0x00100000,  /* leave 1 MB for RTC */
-        DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1,
-        IORESOURCE_MEM
-};
-extern struct pci_ops ddb5476_ext_pci_ops;
-struct pci_controller ddb5476_controller = {
-        .pci_ops        = &ddb5476_ext_pci_ops,
-        .io_resource    = &extpci_io_resource,
-        .mem_resource   = &extpci_mem_resource
-};
-/*
- * we fix up irqs based on the slot number.
- * The first entry is at AD:11.
- *
- * This does not work for devices on sub-buses yet.
- */
-/*
- * temporary
- */
-#define         PCI_EXT_INTA            8
-#define         PCI_EXT_INTB            9
-#define         PCI_EXT_INTC            10
-#define         PCI_EXT_INTD            11
-#define         PCI_EXT_INTE            12
-/*
- * based on ddb5477 manual page 11
- */
-#define         MAX_SLOT_NUM            21
-static unsigned char irq_map[MAX_SLOT_NUM] = {
- [ 2] = 9,                              /* AD:13        USB             */
- [ 3] = 10,                             /* AD:14        PMU             */
- [ 5] = 0,                              /* AD:16        P2P bridge      */
- [ 6] = nile4_to_irq(PCI_EXT_INTB),     /* AD:17                        */
- [ 7] = nile4_to_irq(PCI_EXT_INTC),     /* AD:18                        */
- [ 8] = nile4_to_irq(PCI_EXT_INTD),     /* AD:19                        */
- [ 9] = nile4_to_irq(PCI_EXT_INTA),     /* AD:20                        */
- [13] = 14,                             /* AD:24 HD controller, M5229   */
-};
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
-        return irq_map[slot];
-}
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
-        return 0;
-}
-void __init ddb_pci_reset_bus(void)
-{
-        u32 temp;
-        /*
-         * I am not sure about the "official" procedure, the following
-         * steps work as far as I know:
-         * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
-         * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
-         * The same is true for both PCI channels.
-         */
-        temp = ddb_in32(DDB_PCICTRL + 4);
-        temp |= 0x80000000;
-        ddb_out32(DDB_PCICTRL + 4, temp);
-        temp &= ~0xc0000000;
-        ddb_out32(DDB_PCICTRL + 4, temp);
-}
diff --git a/arch/mips/pci/pci-ddb5477.c b/arch/mips/pci/pci-ddb5477.c
index 826d653184e5..d071bc375b11 100644
--- a/arch/mips/pci/pci-ddb5477.c
+++ b/arch/mips/pci/pci-ddb5477.c
@@ -22,31 +22,31 @@
 #include <asm/ddb5xxx/ddb5xxx.h>
 static struct resource extpci_io_resource = {
-        "ext pci IO space",
+        .start  = DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + 0x4000,
-        DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + 0x4000,
+        .end    = DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI0_IO_SIZE - 1,
-        DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI0_IO_SIZE - 1,
+        .name   = "ext pci IO space",
-        IORESOURCE_IO
+        .flags  = IORESOURCE_IO
 };
 static struct resource extpci_mem_resource = {
-        "ext pci memory space",
+        .start  = DDB_PCI0_MEM_BASE + 0x100000,
-        DDB_PCI0_MEM_BASE + 0x100000,
+        .end    = DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE - 1,
-        DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE - 1,
+        .name   = "ext pci memory space",
-        IORESOURCE_MEM
+        .flags  = IORESOURCE_MEM
 };
 static struct resource iopci_io_resource = {
-        "io pci IO space",
+        .start  = DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE,
-        DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE,
+        .end    = DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI1_IO_SIZE - 1,
-        DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI1_IO_SIZE - 1,
+        .name   = "io pci IO space",
-        IORESOURCE_IO
+        .flags  = IORESOURCE_IO
 };
 static struct resource iopci_mem_resource = {
-        "ext pci memory space",
+        .start  = DDB_PCI1_MEM_BASE,
-        DDB_PCI1_MEM_BASE,
+        .end    = DDB_PCI1_MEM_BASE + DDB_PCI1_MEM_SIZE - 1,
-        DDB_PCI1_MEM_BASE + DDB_PCI1_MEM_SIZE - 1,
+        .name   = "ext pci memory space",
-        IORESOURCE_MEM
+        .flags  = IORESOURCE_MEM
 };
 extern struct pci_ops ddb5477_ext_pci_ops;
diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c
new file mode 100644
index 000000000000..0f8b230057d3
--- /dev/null
+++ b/arch/mips/pci/pci-emma2rh.c
@@ -0,0 +1,90 @@
+/*
+ *  arch/mips/pci/pci-emma2rh.c
+ *      This file defines the PCI configration.
+ *
+ *  Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ *  This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
+ *
+ *      Copyright 2001 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <asm/bootinfo.h>
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+static struct resource pci_io_resource = {
+        .name = "pci IO space",
+        .start = EMMA2RH_PCI_IO_BASE,
+        .end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1,
+        .flags = IORESOURCE_IO,
+};
+static struct resource pci_mem_resource = {
+        .name = "pci memory space",
+        .start = EMMA2RH_PCI_MEM_BASE,
+        .end = EMMA2RH_PCI_MEM_BASE + EMMA2RH_PCI_MEM_SIZE - 1,
+        .flags = IORESOURCE_MEM,
+};
+extern struct pci_ops emma2rh_pci_ops;
+static struct pci_controller emma2rh_pci_controller = {
+        .pci_ops = &emma2rh_pci_ops,
+        .mem_resource = &pci_mem_resource,
+        .io_resource = &pci_io_resource,
+        .mem_offset = -0x04000000,
+        .io_offset = 0,
+};
+static void __init emma2rh_pci_init(void)
+{
+        /* setup PCI interface */
+        emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);
+        emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
+        emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
+                      PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
+                      PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
+        emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
+        emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);
+        emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
+        emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
+        emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);
+        emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
+        emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
+        emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
+        emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
+}
+static int __init emma2rh_pci_setup(void)
+{
+        emma2rh_pci_init();
+        register_pci_controller(&emma2rh_pci_controller);
+        return 0;
+}
+arch_initcall(emma2rh_pci_setup);
diff --git a/arch/mips/pci/pci-excite.c b/arch/mips/pci/pci-excite.c
new file mode 100644
index 000000000000..3c86c77cb74f
--- /dev/null
+++ b/arch/mips/pci/pci-excite.c
@@ -0,0 +1,149 @@
+/*
+ *  Copyright (C) 2004 by Basler Vision Technologies AG
+ *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
+ *  Based on the PMC-Sierra Yosemite board support by Ralf Baechle.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/bitops.h>
+#include <asm/rm9k-ocd.h>
+#include <excite.h>
+extern struct pci_ops titan_pci_ops;
+static struct resource
+        mem_resource =  {
+                .name   = "PCI memory",
+                .start  = EXCITE_PHYS_PCI_MEM,
+                .end    = EXCITE_PHYS_PCI_MEM + EXCITE_SIZE_PCI_MEM - 1,
+                .flags  = IORESOURCE_MEM
+        },
+        io_resource = {
+                .name   = "PCI I/O",
+                .start  = EXCITE_PHYS_PCI_IO,
+                .end    = EXCITE_PHYS_PCI_IO + EXCITE_SIZE_PCI_IO - 1,
+                .flags  = IORESOURCE_IO
+        };
+static struct pci_controller bx_controller = {
+        .pci_ops        = &titan_pci_ops,
+        .mem_resource   = &mem_resource,
+        .mem_offset     = 0x00000000UL,
+        .io_resource    = &io_resource,
+        .io_offset      = 0x00000000UL
+};
+static char
+        iopage_failed[] __initdata   = "Cannot allocate PCI I/O page",
+        modebits_no_pci[] __initdata = "PCI is not configured in mode bits";
+#define RM9000x2_OCD_HTSC       0x0604
+#define RM9000x2_OCD_HTBHL      0x060c
+#define RM9000x2_OCD_PCIHRST    0x078c
+#define RM9K_OCD_MODEBIT1       0x00d4 /* (MODEBIT1) Mode Bit 1 */
+#define RM9K_OCD_CPHDCR         0x00f4 /* CPU-PCI/HT Data Control. */
+#define PCISC_FB2B              0x00000200
+#define PCISC_MWICG             0x00000010
+#define PCISC_EMC               0x00000004
+#define PCISC_ERMA              0x00000002
+static int __init basler_excite_pci_setup(void)
+{
+        const unsigned int fullbars = memsize / (256 << 20);
+        unsigned int i;
+        /* Check modebits to see if PCI is really enabled. */
+        if (!((ocd_readl(RM9K_OCD_MODEBIT1) >> (47-32)) & 0x1))
+                panic(modebits_no_pci);
+        if (NULL == request_mem_region(EXCITE_PHYS_PCI_IO, EXCITE_SIZE_PCI_IO,
+                                       "Memory-mapped PCI I/O page"))
+                panic(iopage_failed);
+        /* Enable PCI 0 as master for config cycles */
+        ocd_writel(PCISC_EMC | PCISC_ERMA, RM9000x2_OCD_HTSC);
+        /* Set up latency timer */
+        ocd_writel(0x8008, RM9000x2_OCD_HTBHL);
+        /*  Setup host IO and Memory space */
+        ocd_writel((EXCITE_PHYS_PCI_IO >> 4) | 1, LKB7);
+        ocd_writel(((EXCITE_SIZE_PCI_IO >> 4) & 0x7fffff00) - 0x100, LKM7);
+        ocd_writel((EXCITE_PHYS_PCI_MEM >> 4) | 1, LKB8);
+        ocd_writel(((EXCITE_SIZE_PCI_MEM >> 4) & 0x7fffff00) - 0x100, LKM8);
+        /* Set up PCI BARs to map all installed memory */
+        for (i = 0; i < 6; i++) {
+                const unsigned int bar = 0x610 + i * 4;
+                if (i < fullbars) {
+                        ocd_writel(0x10000000 * i, bar);
+                        ocd_writel(0x01000000 * i, bar + 0x140);
+                        ocd_writel(0x0ffff029, bar + 0x100);
+                        continue;
+                }
+                if (i == fullbars) {
+                        int o;
+                        u32 mask;
+                        const unsigned long rem = memsize - i * 0x10000000;
+                        if (!rem) {
+                                ocd_writel(0x00000000, bar + 0x100);
+                                continue;
+                        }
+                        o = ffs(rem) - 1;
+                        if (rem & ~(0x1 << o))
+                                o++;
+                        mask = ((0x1 << o) & 0x0ffff000) - 0x1000;
+                        ocd_writel(0x10000000 * i, bar);
+                        ocd_writel(0x01000000 * i, bar + 0x140);
+                        ocd_writel(0x00000029 | mask, bar + 0x100);
+                        continue;
+                }
+                ocd_writel(0x00000000, bar + 0x100);
+        }
+        /* Finally, enable the PCI interupt */
+#if USB_IRQ > 7
+        set_c0_intcontrol(1 << USB_IRQ);
+#else
+        set_c0_status(1 << (USB_IRQ + 8));
+#endif
+        ioport_resource.start = EXCITE_PHYS_PCI_IO;
+        ioport_resource.end = EXCITE_PHYS_PCI_IO + EXCITE_SIZE_PCI_IO - 1;
+        set_io_port_base((unsigned long) ioremap_nocache(EXCITE_PHYS_PCI_IO, EXCITE_SIZE_PCI_IO));
+        register_pci_controller(&bx_controller);
+        return 0;
+}
+arch_initcall(basler_excite_pci_setup);
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 6002d2a6a262..80eb9af9ecdf 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -40,297 +40,7 @@ static struct bridge_controller bridges[MAX_PCI_BUSSES];
 struct bridge_controller *irq_to_bridge[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
 int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
-/*
+extern struct pci_ops bridge_pci_ops;
- * The Bridge ASIC supports both type 0 and type 1 access.  Type 1 is
- * not really documented, so right now I can't write code which uses it.
- * Therefore we use type 0 accesses for now even though they won't work
- * correcly for PCI-to-PCI bridges.
- *
- * The function is complicated by the ultimate brokeness of the IOC3 chip
- * which is used in SGI systems.  The IOC3 can only handle 32-bit PCI
- * accesses and does only decode parts of it's address space.
- */
-static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
-                                 int where, int size, u32 * value)
-{
-        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
-        bridge_t *bridge = bc->base;
-        int slot = PCI_SLOT(devfn);
-        int fn = PCI_FUNC(devfn);
-        volatile void *addr;
-        u32 cf, shift, mask;
-        int res;
-        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to look at it for real ...
-         */
-        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
-                goto oh_my_gawd;
-        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
-        if (size == 1)
-                res = get_dbe(*value, (u8 *) addr);
-        else if (size == 2)
-                res = get_dbe(*value, (u16 *) addr);
-        else
-                res = get_dbe(*value, (u32 *) addr);
-        return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
-oh_my_gawd:
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to look at the wrong register.
-         */
-        if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
-                *value = 0;
-                return PCIBIOS_SUCCESSFUL;
-        }
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't try to access
-         * anything but 32-bit words ...
-         */
-        addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        shift = ((where & 3) << 3);
-        mask = (0xffffffffU >> ((4 - size) << 3));
-        *value = (cf >> shift) & mask;
-        return PCIBIOS_SUCCESSFUL;
-}
-static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
-                                 int where, int size, u32 * value)
-{
-        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
-        bridge_t *bridge = bc->base;
-        int busno = bus->number;
-        int slot = PCI_SLOT(devfn);
-        int fn = PCI_FUNC(devfn);
-        volatile void *addr;
-        u32 cf, shift, mask;
-        int res;
-        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
-        addr = &bridge->b_type1_cfg.c[(fn << 8) | PCI_VENDOR_ID];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to look at it for real ...
-         */
-        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
-                goto oh_my_gawd;
-        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
-        addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
-        if (size == 1)
-                res = get_dbe(*value, (u8 *) addr);
-        else if (size == 2)
-                res = get_dbe(*value, (u16 *) addr);
-        else
-                res = get_dbe(*value, (u32 *) addr);
-        return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
-oh_my_gawd:
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to look at the wrong register.
-         */
-        if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
-                *value = 0;
-                return PCIBIOS_SUCCESSFUL;
-        }
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't try to access
-         * anything but 32-bit words ...
-         */
-        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
-        addr = &bridge->b_type1_cfg.c[(fn << 8) | where];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        shift = ((where & 3) << 3);
-        mask = (0xffffffffU >> ((4 - size) << 3));
-        *value = (cf >> shift) & mask;
-        return PCIBIOS_SUCCESSFUL;
-}
-static int pci_read_config(struct pci_bus *bus, unsigned int devfn,
-                           int where, int size, u32 * value)
-{
-        if (bus->number > 0)
-                return pci_conf1_read_config(bus, devfn, where, size, value);
-        return pci_conf0_read_config(bus, devfn, where, size, value);
-}
-static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
-                                  int where, int size, u32 value)
-{
-        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
-        bridge_t *bridge = bc->base;
-        int slot = PCI_SLOT(devfn);
-        int fn = PCI_FUNC(devfn);
-        volatile void *addr;
-        u32 cf, shift, mask, smask;
-        int res;
-        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[PCI_VENDOR_ID];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to look at it for real ...
-         */
-        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
-                goto oh_my_gawd;
-        addr = &bridge->b_type0_cfg_dev[slot].f[fn].c[where ^ (4 - size)];
-        if (size == 1) {
-                res = put_dbe(value, (u8 *) addr);
-        } else if (size == 2) {
-                res = put_dbe(value, (u16 *) addr);
-        } else {
-                res = put_dbe(value, (u32 *) addr);
-        }
-        if (res)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        return PCIBIOS_SUCCESSFUL;
-oh_my_gawd:
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to touch the wrong register.
-         */
-        if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
-                return PCIBIOS_SUCCESSFUL;
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't try to access
-         * anything but 32-bit words ...
-         */
-        addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        shift = ((where & 3) << 3);
-        mask = (0xffffffffU >> ((4 - size) << 3));
-        smask = mask << shift;
-        cf = (cf & ~smask) | ((value & mask) << shift);
-        if (put_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        return PCIBIOS_SUCCESSFUL;
-}
-static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
-                                  int where, int size, u32 value)
-{
-        struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
-        bridge_t *bridge = bc->base;
-        int slot = PCI_SLOT(devfn);
-        int fn = PCI_FUNC(devfn);
-        int busno = bus->number;
-        volatile void *addr;
-        u32 cf, shift, mask, smask;
-        int res;
-        bridge->b_pci_cfg = (busno << 16) | (slot << 11);
-        addr = &bridge->b_type1_cfg.c[(fn << 8) | PCI_VENDOR_ID];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to look at it for real ...
-         */
-        if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
-                goto oh_my_gawd;
-        addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
-        if (size == 1) {
-                res = put_dbe(value, (u8 *) addr);
-        } else if (size == 2) {
-                res = put_dbe(value, (u16 *) addr);
-        } else {
-                res = put_dbe(value, (u32 *) addr);
-        }
-        if (res)
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        return PCIBIOS_SUCCESSFUL;
-oh_my_gawd:
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't even give the
-         * generic PCI code a chance to touch the wrong register.
-         */
-        if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
-                return PCIBIOS_SUCCESSFUL;
-        /*
-         * IOC3 is fucked fucked beyond believe ...  Don't try to access
-         * anything but 32-bit words ...
-         */
-        addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
-        if (get_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        shift = ((where & 3) << 3);
-        mask = (0xffffffffU >> ((4 - size) << 3));
-        smask = mask << shift;
-        cf = (cf & ~smask) | ((value & mask) << shift);
-        if (put_dbe(cf, (u32 *) addr))
-                return PCIBIOS_DEVICE_NOT_FOUND;
-        return PCIBIOS_SUCCESSFUL;
-}
-static int pci_write_config(struct pci_bus *bus, unsigned int devfn,
-        int where, int size, u32 value)
-{
-        if (bus->number > 0)
-                return pci_conf1_write_config(bus, devfn, where, size, value);
-        return pci_conf0_write_config(bus, devfn, where, size, value);
-}
-static struct pci_ops bridge_pci_ops = {
-        .read = pci_read_config,
-        .write = pci_write_config,
-};
 int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
 {
@@ -370,8 +80,7 @@ int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
        bc->widget_id = widget_id;
        bc->nasid = nasid;
-        bc->baddr = (u64)masterwid << 60;
+        bc->baddr = (u64)masterwid << 60 | PCI64_ATTR_BAR;
-        bc->baddr |= (1UL << 56);       /* Barrier set */
        /*
         * point to this bridge
diff --git a/arch/mips/pci/pci-jmr3927.c b/arch/mips/pci/pci-jmr3927.c
index f02ef6e36b02..cb84f4e8ccae 100644
--- a/arch/mips/pci/pci-jmr3927.c
+++ b/arch/mips/pci/pci-jmr3927.c
@@ -35,17 +35,17 @@
 #include <asm/debug.h>
 struct resource pci_io_resource = {
-        "IO MEM",
+        .name   = "IO MEM",
-        0x1000,                 /* reserve regacy I/O space */
+        .start  = 0x1000,                       /* reserve regacy I/O space */
-        0x1000 + JMR3927_PCIIO_SIZE - 1,
+        .end    = 0x1000 + JMR3927_PCIIO_SIZE - 1,
-        IORESOURCE_IO
+        .flags  = IORESOURCE_IO
 };
 struct resource pci_mem_resource = {
-        "PCI MEM",
+        .name   = "PCI MEM",
-        JMR3927_PCIMEM,
+        .start  = JMR3927_PCIMEM,
-        JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1,
+        .end    = JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1,
-        IORESOURCE_MEM
+        .flags  = IORESOURCE_MEM
 };
 extern struct pci_ops jmr3927_pci_ops;
diff --git a/arch/mips/pci/pci-ocelot.c b/arch/mips/pci/pci-ocelot.c
index 3da8a4ee6baa..2b9495dce6ba 100644
--- a/arch/mips/pci/pci-ocelot.c
+++ b/arch/mips/pci/pci-ocelot.c
@@ -71,13 +71,13 @@ static inline void pci0WriteConfigReg(unsigned int offset, unsigned int data)
 }
 static struct resource ocelot_mem_resource = {
-        iomem_resource.start = GT_PCI_MEM_BASE;
+        start   = GT_PCI_MEM_BASE;
-        iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1;
+        end     = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1;
 };
 static struct resource ocelot_io_resource = {
-        ioport_resource.start = GT_PCI_IO_BASE;
+        start   = GT_PCI_IO_BASE;
-        ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
+        end     = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
 };
 static struct pci_controller ocelot_pci_controller = {
diff --git a/arch/mips/pci/pci-yosemite.c b/arch/mips/pci/pci-yosemite.c
index dac9ed4b0ccf..0357946f30e6 100644
--- a/arch/mips/pci/pci-yosemite.c
+++ b/arch/mips/pci/pci-yosemite.c
@@ -14,7 +14,10 @@
 extern struct pci_ops titan_pci_ops;
 static struct resource py_mem_resource = {
-        "Titan PCI MEM", 0xe0000000UL, 0xe3ffffffUL, IORESOURCE_MEM
+        .start  = 0xe0000000UL,
+        .end    = 0xe3ffffffUL,
+        .name   = "Titan PCI MEM",
+        .flags  = IORESOURCE_MEM
 };
 /*
@@ -26,7 +29,10 @@ static struct resource py_mem_resource = {
 #define TITAN_IO_BASE   0xe8000000UL
 static struct resource py_io_resource = {
-        "Titan IO MEM", 0x00001000UL, TITAN_IO_SIZE - 1, IORESOURCE_IO,
+        .start  = 0x00001000UL,
+        .end    = TITAN_IO_SIZE - 1,
+        .name   = "Titan IO MEM",
+        .flags  = IORESOURCE_IO,
 };
 static struct pci_controller py_controller = {
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 21402ffd7c98..4dfce154d4af 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -76,11 +76,6 @@ pcibios_align_resource(void *data, struct resource *res,
        res->start = start;
 }
-struct pci_controller * __init alloc_pci_controller(void)
-{
-        return alloc_bootmem(sizeof(struct pci_controller));
-}
 void __init register_pci_controller(struct pci_controller *hose)
 {
        *hose_tail = hose;
diff --git a/arch/mips/philips/pnx8550/common/pci.c b/arch/mips/philips/pnx8550/common/pci.c
index baa6905f649f..eee4f3dfc410 100644
--- a/arch/mips/philips/pnx8550/common/pci.c
+++ b/arch/mips/philips/pnx8550/common/pci.c
@@ -27,17 +27,17 @@
 #include <nand.h>
 static struct resource pci_io_resource = {
-        "pci IO space",
+        .start  = PNX8550_PCIIO + 0x1000,       /* reserve regacy I/O space */
-        (u32)(PNX8550_PCIIO + 0x1000),  /* reserve regacy I/O space */
+        .end    = PNX8550_PCIIO + PNX8550_PCIIO_SIZE,
-        (u32)(PNX8550_PCIIO + PNX8550_PCIIO_SIZE),
+        .name   = "pci IO space",
-        IORESOURCE_IO
+        .flags  = IORESOURCE_IO
 };
 static struct resource pci_mem_resource = {
-        "pci memory space",
+        .start  = PNX8550_PCIMEM,
-        (u32)(PNX8550_PCIMEM),
+        .end    = PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1,
-        (u32)(PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1),
+        .name   = "pci memory space",
-        IORESOURCE_MEM
+        .flags  = IORESOURCE_MEM
 };
 extern struct pci_ops pnx8550_pci_ops;
diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c
index 0d8a77619391..0e791f4f6ea3 100644
--- a/arch/mips/philips/pnx8550/common/setup.c
+++ b/arch/mips/philips/pnx8550/common/setup.c
@@ -58,10 +58,27 @@ extern void prom_printf(char *fmt, ...);
 extern char *prom_getcmdline(void);
 struct resource standard_io_resources[] = {
-        {"dma1", 0x00, 0x1f, IORESOURCE_BUSY},
+        {
-        {"timer", 0x40, 0x5f, IORESOURCE_BUSY},
+                .start  = .0x00,
-        {"dma page reg", 0x80, 0x8f, IORESOURCE_BUSY},
+                .end    = 0x1f,
-        {"dma2", 0xc0, 0xdf, IORESOURCE_BUSY},
+                .name   = "dma1",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x40,
+                .end    = 0x5f,
+                .name   = "timer",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x80,
+                .end    = 0x8f,
+                .name   = "dma page reg",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0xc0,
+                .end    = 0xdf,
+                .name   = "dma2",
+                .flags  = IORESOURCE_BUSY
+        },
 };
 #define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource))
@@ -82,7 +99,7 @@ unsigned long get_system_mem_size(void)
 int pnx8550_console_port = -1;
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        int i;
        char* argptr;
diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c
index 3f724d661bdb..aa0d6ff3c6ec 100644
--- a/arch/mips/pmc-sierra/yosemite/setup.c
+++ b/arch/mips/pmc-sierra/yosemite/setup.c
@@ -218,7 +218,7 @@ static void __init py_late_time_init(void)
        py_rtc_setup();
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        board_time_init = yosemite_time_init;
        late_time_init = py_late_time_init;
diff --git a/arch/mips/qemu/Makefile b/arch/mips/qemu/Makefile
index 730f459f3e99..078cd3029c9f 100644
--- a/arch/mips/qemu/Makefile
+++ b/arch/mips/qemu/Makefile
@@ -2,6 +2,6 @@
 # Makefile for Qemu specific kernel interface routines under Linux.
 #
-obj-y           = q-firmware.o q-irq.o q-mem.o q-setup.o
+obj-y           = q-firmware.o q-irq.o q-mem.o q-setup.o q-reset.o
 obj-$(CONFIG_SMP) += q-smp.o
diff --git a/arch/mips/qemu/q-reset.c b/arch/mips/qemu/q-reset.c
new file mode 100644
index 000000000000..c04ebcfc7843
--- /dev/null
+++ b/arch/mips/qemu/q-reset.c
@@ -0,0 +1,34 @@
+#include <linux/config.h>
+#include <asm/io.h>
+#include <asm/reboot.h>
+#include <asm/cacheflush.h>
+#include <asm/qemu.h>
+static void qemu_machine_restart(char *command)
+{
+        volatile unsigned int *reg = (unsigned int *)QEMU_RESTART_REG;
+        set_c0_status(ST0_BEV | ST0_ERL);
+        change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
+        flush_cache_all();
+        write_c0_wired(0);
+        *reg = 42;
+        while (1)
+                cpu_wait();
+}
+static void qemu_machine_halt(void)
+{
+        volatile unsigned int *reg = (unsigned int *)QEMU_HALT_REG;
+        *reg = 42;
+        while (1)
+                cpu_wait();
+}
+void qemu_reboot_setup(void)
+{
+        _machine_restart = qemu_machine_restart;
+        _machine_halt = qemu_machine_halt;
+}
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c
index 022eb1af6db1..e100d6072e31 100644
--- a/arch/mips/qemu/q-setup.c
+++ b/arch/mips/qemu/q-setup.c
@@ -2,6 +2,8 @@
 #include <asm/io.h>
 #include <asm/time.h>
+extern void qemu_reboot_setup(void);
 #define QEMU_PORT_BASE 0xb4000000
 const char *get_system_type(void)
@@ -18,8 +20,10 @@ static void __init qemu_timer_setup(struct irqaction *irq)
        setup_irq(0, irq);
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        set_io_port_base(QEMU_PORT_BASE);
        board_timer_setup = qemu_timer_setup;
+        qemu_reboot_setup();
 }
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index 7018e1833e85..d7138906eb10 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -53,7 +53,7 @@ EXPORT_SYMBOL(ip22_do_break);
 extern void ip22_be_init(void) __init;
 extern void ip22_time_init(void) __init;
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        char *ctype;
        char *cserial;
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig
index 7b0bc4437243..f14ef38646d0 100644
--- a/arch/mips/sgi-ip27/Kconfig
+++ b/arch/mips/sgi-ip27/Kconfig
@@ -4,31 +4,29 @@
 #         This options adds support for userspace processes upto 16TB size.
 #         Normally the limit is just .5TB.
-config SGI_SN0_N_MODE
+choice
-        bool "IP27 N-Mode"
+        prompt "Node addressing mode"
        depends on SGI_IP27
-        help
+        default SGI_SN_M_MODE
-          The nodes of Origin 200, Origin 2000 and Onyx 2 systems can be
-          configured in either N-Modes which allows for more nodes or M-Mode
-          which allows for more memory.  Your system is most probably
-          running in M-Mode, so you should say N here.
-config ARCH_DISCONTIGMEM_ENABLE
+config SGI_SN_M_MODE
-        bool
+        bool "IP27 M-Mode"
-        default y if SGI_IP27
        help
-          Say Y to upport efficient handling of discontiguous physical memory,
+          The nodes of Origin, Onyx, Fuel and Tezro systems can be configured
-          for architectures which are either NUMA (Non-Uniform Memory Access)
+          in either N-Modes which allows for more nodes or M-Mode which allows
-          or have huge holes in the physical address space for other reasons.
+          for more memory.  Your hardware is almost certainly running in
-          See <file:Documentation/vm/numa> for more.
+          M-Mode, so choose M-mode here.
-config NUMA
+config SGI_SN_N_MODE
-        bool "NUMA Support"
+        bool "IP27 N-Mode"
-        depends on SGI_IP27
+        depends on EXPERIMENTAL
        help
-          Say Y to compile the kernel to support NUMA (Non-Uniform Memory
+          The nodes of Origin, Onyx, Fuel and Tezro systems can be configured
-          Access).  This option is for configuring high-end multiprocessor
+          in either N-Modes which allows for more nodes or M-Mode which allows
-          server machines.  If in doubt, say N.
+          for more memory.  Your hardware is almost certainly running in
+          M-Mode, so choose M-mode here.
+endchoice
 config MAPPED_KERNEL
        bool "Mapped kernel support"
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index 8651a0e75404..a6b490e99709 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -196,7 +196,7 @@ extern void ip27_setup_console(void);
 extern void ip27_time_init(void);
 extern void ip27_reboot_setup(void);
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        hubreg_t p, e, n_mode;
        nasid_t nid;
@@ -228,7 +228,7 @@ void __init plat_setup(void)
         */
        n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
        printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
-#ifdef CONFIG_SGI_SN0_N_MODE
+#ifdef CONFIG_SGI_SN_N_MODE
        if (!n_mode)
                panic("Kernel compiled for M mode.");
 #else
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 2e643d2f51cb..0b61a39ce2bb 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -360,7 +360,7 @@ static struct hw_interrupt_type bridge_irq_type = {
 static unsigned long irq_map[NR_IRQS / BITS_PER_LONG];
-static int allocate_irqno(void)
+int allocate_irqno(void)
 {
        int irq;
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 36b662e27b6e..1fb860c7ac6d 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -89,11 +89,13 @@ static int set_rtc_mmss(unsigned long nowtime)
 }
 #endif
+static unsigned int rt_timer_irq;
 void ip27_rt_timer_interrupt(struct pt_regs *regs)
 {
        int cpu = smp_processor_id();
        int cpuA = cputoslice(cpu) == 0;
-        int irq = 9;                            /* XXX Assign number */
+        unsigned int irq = rt_timer_irq;
        irq_enter();
        write_seqlock(&xtime_lock);
@@ -179,13 +181,68 @@ static __init unsigned long get_m48t35_time(void)
        return mktime(year, month, date, hour, min, sec);
 }
+static void startup_rt_irq(unsigned int irq)
+{
+}
+static void shutdown_rt_irq(unsigned int irq)
+{
+}
+static void enable_rt_irq(unsigned int irq)
+{
+}
+static void disable_rt_irq(unsigned int irq)
+{
+}
+static void mask_and_ack_rt(unsigned int irq)
+{
+}
+static void end_rt_irq(unsigned int irq)
+{
+}
+static struct hw_interrupt_type rt_irq_type = {
+        .typename       = "SN HUB RT timer",
+        .startup        = startup_rt_irq,
+        .shutdown       = shutdown_rt_irq,
+        .enable         = enable_rt_irq,
+        .disable        = disable_rt_irq,
+        .ack            = mask_and_ack_rt,
+        .end            = end_rt_irq,
+};
+static struct irqaction rt_irqaction = {
+        .handler        = ip27_rt_timer_interrupt,
+        .flags          = SA_INTERRUPT,
+        .mask           = CPU_MASK_NONE,
+        .name           = "timer"
+};
+extern int allocate_irqno(void);
 static void ip27_timer_setup(struct irqaction *irq)
 {
+        int irqno  = allocate_irqno();
+        if (irqno < 0)
+                panic("Can't allocate interrupt number for timer interrupt");
+        irq_desc[irqno].status = IRQ_DISABLED;
+        irq_desc[irqno].action = NULL;
+        irq_desc[irqno].depth = 1;
+        irq_desc[irqno].handler = &rt_irq_type;
        /* over-write the handler, we use our own way */
        irq->handler = no_action;
        /* setup irqaction */
-//      setup_irq(IP27_TIMER_IRQ, irq);         /* XXX Can't do this yet.  */
+        irq_desc[irqno].status |= IRQ_PER_CPU;
+        rt_timer_irq = irqno;
 }
 void __init ip27_time_init(void)
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index de01c9815bdd..8ba08047d164 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -31,12 +31,12 @@
 /* issue a PIO read to make sure no PIO writes are pending */
 static void inline flush_crime_bus(void)
 {
-        volatile unsigned long junk = crime->control;
+        crime->control;
 }
 static void inline flush_mace_bus(void)
 {
-        volatile unsigned long junk = mace->perif.ctrl.misc;
+        mace->perif.ctrl.misc;
 }
 #undef DEBUG_IRQ
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index a2dd8ae1ea8f..acbdad06fac1 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -87,7 +87,7 @@ void __init ip32_timer_setup(struct irqaction *irq)
        setup_irq(IP32_R4K_TIMER_IRQ, irq);
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        board_be_init = ip32_be_init;
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index e545752695a1..efaf83efd2e4 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -110,17 +110,18 @@ void bcm1480_timer_interrupt(struct pt_regs *regs)
        __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
              IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
-        /*
-         * CPU 0 handles the global timer interrupt job
-         */
        if (cpu == 0) {
+                /*
+                 * CPU 0 handles the global timer interrupt job
+                 */
                ll_timer_interrupt(irq, regs);
        }
+        else {
-        /*
+                /*
-         * every CPU should do profiling and process accouting
+                 * other CPUs should just do profiling and process accounting
-         */
+                 */
-        ll_local_timer_interrupt(irq, regs);
+                ll_local_timer_interrupt(irq, regs);
+        }
 }
 /*
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 0f6e54db4888..f853c32f60a0 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -435,13 +435,17 @@ static inline int dclz(unsigned long long x)
        return lz;
 }
+extern void sb1250_timer_interrupt(struct pt_regs *regs);
+extern void sb1250_mailbox_interrupt(struct pt_regs *regs);
+extern void sb1250_kgdb_interrupt(struct pt_regs *regs);
 asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
 {
        unsigned int pending;
 #ifdef CONFIG_SIBYTE_SB1250_PROF
        /* Set compare to count to silence count/compare timer interrupts */
-        write_c0_count(read_c0_count());
+        write_c0_compare(read_c0_count());
 #endif
        /*
@@ -482,7 +486,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
                 * Default...we've hit an IP[2] interrupt, which means we've
                 * got to check the 1250 interrupt registers to figure out what
                 * to do.  Need to detect which CPU we're on, now that
-                 ~ smp_affinity is supported.
+                 * smp_affinity is supported.
                 */
                mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(),
                                              R_IMR_INTERRUPT_STATUS_BASE)));
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 4b5f74ff3edd..f9e694988cdf 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -72,8 +72,10 @@ const char *get_system_type(void)
 void __init swarm_time_init(void)
 {
+#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
        /* Setup HPT */
        sb1250_hpt_setup();
+#endif
 }
 void __init swarm_timer_setup(struct irqaction *irq)
@@ -103,7 +105,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup)
        return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
 #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
        bcm1480_setup();
diff --git a/arch/mips/sni/Makefile b/arch/mips/sni/Makefile
index 9c7eaa5fb210..a5eb0adb87c7 100644
--- a/arch/mips/sni/Makefile
+++ b/arch/mips/sni/Makefile
@@ -3,5 +3,6 @@
 #
 obj-y           += irq.o pcimt_scache.o reset.o setup.o
+obj-$(CONFIG_CPU_BIG_ENDIAN) += sniprom.o
 EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 01ba6c581e3d..a050bb6ae704 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -21,8 +21,11 @@
 #include <linux/fb.h>
 #include <linux/tty.h>
+#ifdef CONFIG_ARC
 #include <asm/arc/types.h>
 #include <asm/sgialib.h>
+#endif
 #include <asm/bcache.h>
 #include <asm/bootinfo.h>
 #include <asm/io.h>
@@ -72,8 +75,7 @@ static inline void sni_pcimt_detect(void)
 static void __init sni_display_setup(void)
 {
-#ifdef CONFIG_VT
+#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) && defined(CONFIG_ARC)
-#if defined(CONFIG_VGA_CONSOLE)
        struct screen_info *si = &screen_info;
        DISPLAY_STATUS *di;
@@ -88,24 +90,54 @@ static void __init sni_display_setup(void)
                si->orig_video_points   = 16;
        }
 #endif
-#endif
 }
 static struct resource sni_io_resource = {
-        "PCIMT IO MEM", 0x00001000UL, 0x03bfffffUL, IORESOURCE_IO,
+        .start  = 0x00001000UL,
+        .end    = 0x03bfffffUL,
+        .name   = "PCIMT IO MEM",
+        .flags  = IORESOURCE_IO,
 };
 static struct resource pcimt_io_resources[] = {
-        { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
+        {
-        { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
+                .start  = 0x00,
-        { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
+                .end    = 0x1f,
-        { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
+                .name   = "dma1",
-        { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
+                .flags  = IORESOURCE_BUSY
-        { "PCI config data", 0xcfc, 0xcff, IORESOURCE_BUSY }
+        }, {
+                .start  =  0x40,
+                .end    = 0x5f,
+                .name   = "timer",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  =  0x60,
+                .end    = 0x6f,
+                .name   = "keyboard",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  =  0x80,
+                .end    = 0x8f,
+                .name   = "dma page reg",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  =  0xc0,
+                .end    = 0xdf,
+                .name   = "dma2",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  =  0xcfc,
+                .end    = 0xcff,
+                .name   = "PCI config data",
+                .flags  = IORESOURCE_BUSY
+        }
 };
 static struct resource sni_mem_resource = {
-        "PCIMT PCI MEM", 0x10000000UL, 0xffffffffUL, IORESOURCE_MEM
+        .start  = 0x10000000UL,
+        .end    = 0xffffffffUL,
+        .name   = "PCIMT PCI MEM",
+        .flags  = IORESOURCE_MEM
 };
 /*
@@ -122,19 +154,72 @@ static struct resource sni_mem_resource = {
 * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
 */
 static struct resource pcimt_mem_resources[] = {
-        { "Video RAM area", 0x100a0000, 0x100bffff, IORESOURCE_BUSY },
+        {
-        { "ISA Reserved", 0x100c0000, 0x100fffff, IORESOURCE_BUSY },
+                .start  = 0x100a0000,
-        { "PCI IO", 0x14000000, 0x17bfffff, IORESOURCE_BUSY },
+                .end    = 0x100bffff,
-        { "Cache Replacement Area", 0x17c00000, 0x17ffffff, IORESOURCE_BUSY},
+                .name   = "Video RAM area",
-        { "PCI INT Acknowledge", 0x1a000000, 0x1a000003, IORESOURCE_BUSY },
+                .flags  = IORESOURCE_BUSY
-        { "Boot PROM", 0x1fc00000, 0x1fc7ffff, IORESOURCE_BUSY},
+        }, {
-        { "Diag PROM", 0x1fc80000, 0x1fcfffff, IORESOURCE_BUSY},
+                .start  = 0x100c0000,
-        { "X-Bus", 0x1fd00000, 0x1fdfffff, IORESOURCE_BUSY},
+                .end    = 0x100fffff,
-        { "BIOS map", 0x1fe00000, 0x1fefffff, IORESOURCE_BUSY},
+                .name   = "ISA Reserved",
-        { "NVRAM / EEPROM", 0x1ff00000, 0x1ff7ffff, IORESOURCE_BUSY},
+                .flags  = IORESOURCE_BUSY
-        { "ASIC PCI", 0x1fff0000, 0x1fffefff, IORESOURCE_BUSY},
+        }, {
-        { "MP Agent", 0x1ffff000, 0x1fffffff, IORESOURCE_BUSY},
+                .start  = 0x14000000,
-        { "Main Memory", 0x20000000, 0x9fffffff, IORESOURCE_BUSY}
+                .end    = 0x17bfffff,
+                .name   = "PCI IO",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x17c00000,
+                .end    = 0x17ffffff,
+                .name   = "Cache Replacement Area",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1a000000,
+                .end    = 0x1a000003,
+                .name   = "PCI INT Acknowledge",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1fc00000,
+                .end    = 0x1fc7ffff,
+                .name   = "Boot PROM",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1fc80000,
+                .end    = 0x1fcfffff,
+                .name   = "Diag PROM",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1fd00000,
+                .end    = 0x1fdfffff,
+                .name   = "X-Bus",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1fe00000,
+                .end    = 0x1fefffff,
+                .name   = "BIOS map",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1ff00000,
+                .end    = 0x1ff7ffff,
+                .name   = "NVRAM / EEPROM",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1fff0000,
+                .end    = 0x1fffefff,
+                .name   = "ASIC PCI",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x1ffff000,
+                .end    = 0x1fffffff,
+                .name   = "MP Agent",
+                .flags  = IORESOURCE_BUSY
+        }, {
+                .start  = 0x20000000,
+                .end    = 0x9fffffff,
+                .name   = "Main Memory",
+                .flags  = IORESOURCE_BUSY
+        }
 };
 static void __init sni_resource_init(void)
@@ -168,7 +253,7 @@ static inline void sni_pcimt_time_init(void)
        rtc_mips_set_time = mc146818_set_rtc_mmss;
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        sni_pcimt_detect();
        sni_pcimt_sc_init();
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c
new file mode 100644
index 000000000000..d1d0f1f493b4
--- /dev/null
+++ b/arch/mips/sni/sniprom.c
@@ -0,0 +1,158 @@
+/*
+ * Big Endian PROM code for SNI RM machines
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2005-2006 Florian Lohoff (flo@rfc822.org)
+ * Copyright (C) 2005-2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <asm/addrspace.h>
+#include <asm/sni.h>
+#include <asm/mipsprom.h>
+#include <asm/bootinfo.h>
+/* special SNI prom calls */
+/*
+ * This does not exist in all proms - SINIX compares
+ * the prom env variable "version" against "2.0008"
+ * or greater. If lesser it tries to probe interesting
+ * registers
+ */
+#define PROM_GET_MEMCONF        58
+#define PROM_VEC                (u64 *)CKSEG1ADDR(0x1fc00000)
+#define PROM_ENTRY(x)           (PROM_VEC + (x))
+#undef DEBUG
+#ifdef DEBUG
+#define DBG_PRINTF(x...)     prom_printf(x)
+#else
+#define DBG_PRINTF(x...)
+#endif
+static int *(*__prom_putchar)(int)        = (int *(*)(int))PROM_ENTRY(PROM_PUTCHAR);
+static char *(*__prom_getenv)(char *)     = (char *(*)(char *))PROM_ENTRY(PROM_GETENV);
+static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF);
+char *prom_getenv (char *s)
+{
+        return __prom_getenv(s);
+}
+void prom_printf(char *fmt, ...)
+{
+        va_list args;
+        char ppbuf[1024];
+        char *bptr;
+        va_start(args, fmt);
+        vsprintf(ppbuf, fmt, args);
+        bptr = ppbuf;
+        while (*bptr != 0) {
+                if (*bptr == '\n')
+                        __prom_putchar('\r');
+                __prom_putchar(*bptr++);
+        }
+        va_end(args);
+}
+unsigned long prom_free_prom_memory(void)
+{
+        return 0;
+}
+/*
+ * /proc/cpuinfo system type
+ *
+ */
+static const char *systype = "Unknown";
+const char *get_system_type(void)
+{
+        return systype;
+}
+#define SNI_IDPROM_BASE                0xbff00000
+#define SNI_IDPROM_MEMSIZE             (SNI_IDPROM_BASE+0x28)  /* Memsize in 16MB quantities */
+#define SNI_IDPROM_BRDTYPE             (SNI_IDPROM_BASE+0x29)  /* Board Type */
+#define SNI_IDPROM_CPUTYPE             (SNI_IDPROM_BASE+0x30)  /* CPU Type */
+#define SNI_IDPROM_SIZE 0x1000
+#ifdef DEBUG
+static void sni_idprom_dump(void)
+{
+        int     i;
+        prom_printf("SNI IDProm dump (first 128byte):\n");
+        for(i=0;i<128;i++) {
+                if (i%16 == 0)
+                        prom_printf("%04x ", i);
+                prom_printf("%02x ", *(unsigned char *) (SNI_IDPROM_BASE+i));
+                if (i%16 == 15)
+                        prom_printf("\n");
+        }
+}
+#endif
+static void sni_mem_init(void )
+{
+        int i, memsize;
+        struct membank {
+                u32             size;
+                u32             base;
+                u32             size2;
+                u32             pad1;
+                u32             pad2;
+        } memconf[8];
+        /* MemSIZE from prom in 16MByte chunks */
+        memsize=*((unsigned char *) SNI_IDPROM_MEMSIZE) * 16;
+        DBG_PRINTF("IDProm memsize: %lu MByte\n", memsize);
+        /* get memory bank layout from prom */
+        __prom_get_memconf(&memconf);
+        DBG_PRINTF("prom_get_mem_conf memory configuration:\n");
+        for(i=0;i<8 && memconf[i].size;i++) {
+                prom_printf("Bank%d: %08x @ %08x\n", i,
+                        memconf[i].size, memconf[i].base);
+                add_memory_region(memconf[i].base, memconf[i].size, BOOT_MEM_RAM);
+        }
+}
+void __init prom_init(void)
+{
+        int argc = fw_arg0;
+        char **argv = (void *)fw_arg1;
+        unsigned int sni_brd_type = *(unsigned char *) SNI_IDPROM_BRDTYPE;
+        int i;
+        DBG_PRINTF("Found SNI brdtype %02x\n", sni_brd_type);
+#ifdef DEBUG
+        sni_idprom_dump();
+#endif
+        sni_mem_init();
+        /* copy prom cmdline parameters to kernel cmdline */
+        for (i = 1; i < argc; i++) {
+                strcat(arcs_cmdline, argv[i]);
+                if (i < (argc - 1))
+                        strcat(arcs_cmdline, " ");
+        }
+}
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 77c3b66fb959..81a5acfe8c42 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -64,7 +64,7 @@ static void tx4927_write_buffer_flush(void)
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        board_time_init = tx4927_time_init;
        board_timer_setup = tx4927_timer_setup;
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c
index fc992953bf95..ef59a5cffc69 100644
--- a/arch/mips/tx4938/common/setup.c
+++ b/arch/mips/tx4938/common/setup.c
@@ -61,7 +61,7 @@ tx4938_write_buffer_flush(void)
 }
 void __init
-plat_setup(void)
+plat_mem_setup(void)
 {
        board_time_init = tx4938_time_init;
        board_timer_setup = tx4938_timer_setup;
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index 9166cd4557eb..96e833cd4c14 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -664,7 +664,10 @@ static struct resource rbtx4938_fpga_resource;
 static char pcode_str[8];
 static struct resource tx4938_reg_resource = {
-        pcode_str, TX4938_REG_BASE, TX4938_REG_BASE+TX4938_REG_SIZE, IORESOURCE_MEM
+        .start  = TX4938_REG_BASE,
+        .end    = TX4938_REG_BASE + TX4938_REG_SIZE,
+        .name   = pcode_str,
+        .flags  = IORESOURCE_MEM
 };
 void __init tx4938_board_setup(void)
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index 055a2cdfc841..6046ef23b2bf 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -4,7 +4,6 @@ config CASIO_E55
        select DMA_NONCOHERENT
        select IRQ_CPU
        select ISA
-        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -14,18 +13,15 @@ config IBM_WORKPAD
        select DMA_NONCOHERENT
        select IRQ_CPU
        select ISA
-        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
 config NEC_CMBVR4133
        bool "Support for NEC CMB-VR4133"
        depends on MACH_VR41XX
-        select CPU_VR41XX
        select DMA_NONCOHERENT
        select IRQ_CPU
        select HW_HAS_PCI
-        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -41,7 +37,6 @@ config TANBAC_TB022X
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
-        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
        help
@@ -74,7 +69,6 @@ config VICTOR_MPC30X
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
-        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
@@ -84,7 +78,6 @@ config ZAO_CAPCELLA
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
-        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c
index 707bd0933eed..915bfa5c0719 100644
--- a/arch/mips/vr41xx/common/init.c
+++ b/arch/mips/vr41xx/common/init.c
@@ -58,7 +58,7 @@ static void __init timer_init(void)
        board_timer_setup = setup_timer_irq;
 }
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
 {
        vr41xx_calculate_clock_frequency();
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 078fb5533541..f70bd090dacd 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -822,6 +822,7 @@ static void __init prom_send_capabilities(void)
                /* try calling the ibm,client-architecture-support method */
                if (call_prom_ret("call-method", 3, 2, &ret,
                                  ADDR("ibm,client-architecture-support"),
+                                  root,
                                  ADDR(ibm_architecture_vec)) == 0) {
                        /* the call exists... */
                        if (ret)
@@ -1622,6 +1623,15 @@ static int __init prom_find_machine_type(void)
                        if (strstr(p, RELOC("Power Macintosh")) ||
                            strstr(p, RELOC("MacRISC")))
                                return PLATFORM_POWERMAC;
+#ifdef CONFIG_PPC64
+                        /* We must make sure we don't detect the IBM Cell
+                         * blades as pSeries due to some firmware issues,
+                         * so we do it here.
+                         */
+                        if (strstr(p, RELOC("IBM,CBEA")) ||
+                            strstr(p, RELOC("IBM,CPBW-1.0")))
+                                return PLATFORM_GENERIC;
+#endif /* CONFIG_PPC64 */
                        i += sl + 1;
                }
        }
@@ -1636,7 +1646,7 @@ static int __init prom_find_machine_type(void)
                           compat, sizeof(compat)-1);
        if (len <= 0)
                return PLATFORM_GENERIC;
-        if (strncmp(compat, RELOC("chrp"), 4))
+        if (strcmp(compat, RELOC("chrp")))
                return PLATFORM_GENERIC;
        /* Default to pSeries. We need to know if we are running LPAR */
@@ -2057,10 +2067,45 @@ static void __init flatten_device_tree(void)
 }
+#ifdef CONFIG_PPC_MAPLE
-static void __init fixup_device_tree(void)
+/* PIBS Version 1.05.0000 04/26/2005 has an incorrect /ht/isa/ranges property.
+ * The values are bad, and it doesn't even have the right number of cells. */
+static void __init fixup_device_tree_maple(void)
 {
+        phandle isa;
+        u32 isa_ranges[6];
+        isa = call_prom("finddevice", 1, 1, ADDR("/ht@0/isa@4"));
+        if (!PHANDLE_VALID(isa))
+                return;
+        if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges))
+                == PROM_ERROR)
+                return;
+        if (isa_ranges[0] != 0x1 ||
+                isa_ranges[1] != 0xf4000000 ||
+                isa_ranges[2] != 0x00010000)
+                return;
+        prom_printf("fixing up bogus ISA range on Maple...\n");
+        isa_ranges[0] = 0x1;
+        isa_ranges[1] = 0x0;
+        isa_ranges[2] = 0x01002000; /* IO space; PCI device = 4 */
+        isa_ranges[3] = 0x0;
+        isa_ranges[4] = 0x0;
+        isa_ranges[5] = 0x00010000;
+        prom_setprop(isa, "/ht@0/isa@4", "ranges",
+                        isa_ranges, sizeof(isa_ranges));
+}
+#else
+#define fixup_device_tree_maple()
+#endif
 #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)
+static void __init fixup_device_tree_pmac(void)
+{
        phandle u3, i2c, mpic;
        u32 u3_rev;
        u32 interrupts[2];
@@ -2097,9 +2142,16 @@ static void __init fixup_device_tree(void)
        parent = (u32)mpic;
        prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupt-parent",
                     &parent, sizeof(parent));
-#endif
 }
+#else
+#define fixup_device_tree_pmac()
+#endif
+static void __init fixup_device_tree(void)
+{
+        fixup_device_tree_maple();
+        fixup_device_tree_pmac();
+}
 static void __init prom_find_boot_cpu(void)
 {
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 01e3c08cb550..8fdeca2d4597 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -803,10 +803,13 @@ static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int
                if (__get_user(cmcp, &ucp->uc_regs))
                        return -EFAULT;
                mcp = (struct mcontext __user *)(u64)cmcp;
+                /* no need to check access_ok(mcp), since mcp < 4GB */
        }
 #else
        if (__get_user(mcp, &ucp->uc_regs))
                return -EFAULT;
+        if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
+                return -EFAULT;
 #endif
        restore_sigmask(&set);
        if (restore_user_regs(regs, mcp, sig))
@@ -908,13 +911,14 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
 {
        struct sig_dbg_op op;
        int i;
+        unsigned char tmp;
        unsigned long new_msr = regs->msr;
 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
        unsigned long new_dbcr0 = current->thread.dbcr0;
 #endif
        for (i=0; i<ndbg; i++) {
-                if (__copy_from_user(&op, dbg, sizeof(op)))
+                if (copy_from_user(&op, dbg + i, sizeof(op)))
                        return -EFAULT;
                switch (op.dbg_type) {
                case SIG_DBG_SINGLE_STEPPING:
@@ -959,6 +963,11 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
        current->thread.dbcr0 = new_dbcr0;
 #endif
+        if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
+            || __get_user(tmp, (u8 __user *) ctx)
+            || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
+                return -EFAULT;
        /*
         * If we get a fault copying the context into the kernel's
         * image of the user's registers, we can't just return -EFAULT
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 27f65b95184d..c2db642f4cdd 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -182,6 +182,8 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
        err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
        if (err)
                return err;
+        if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
+                return -EFAULT;
        /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
        if (v_regs != 0 && (msr & MSR_VEC) != 0)
                err |= __copy_from_user(current->thread.vr, v_regs,
diff --git a/arch/powerpc/kernel/systbl.S b/arch/powerpc/kernel/systbl.S
index cf56a1d499ff..26ed1f5ef16e 100644
--- a/arch/powerpc/kernel/systbl.S
+++ b/arch/powerpc/kernel/systbl.S
@@ -338,6 +338,8 @@ SYSCALL(symlinkat)
 SYSCALL(readlinkat)
 SYSCALL(fchmodat)
 SYSCALL(faccessat)
+COMPAT_SYS(get_robust_list)
+COMPAT_SYS(set_robust_list)
 /*
 * please add new calls to arch/powerpc/platforms/cell/spu_callbacks.c
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 33654d1b1b43..994856e55b7c 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -52,7 +52,7 @@ static inline void __tlbie(unsigned long va, unsigned int psize)
        default:
                penc = mmu_psize_defs[psize].penc;
                va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
-                va |= (0x7f >> (8 - penc)) << 12;
+                va |= penc << 12;
                asm volatile("tlbie %0,1" : : "r" (va) : "memory");
                break;
        }
@@ -74,7 +74,7 @@ static inline void __tlbiel(unsigned long va, unsigned int psize)
        default:
                penc = mmu_psize_defs[psize].penc;
                va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
-                va |= (0x7f >> (8 - penc)) << 12;
+                va |= penc << 12;
                asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
                             : : "r"(va) : "memory");
                break;
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 6574b22b3cf3..fd3e5609e3e0 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -125,14 +125,13 @@ static void __init cell_init_early(void)
 static int __init cell_probe(void)
 {
-        /* XXX This is temporary, the Cell maintainer will come up with
-         * more appropriate detection logic
-         */
        unsigned long root = of_get_flat_dt_root();
-        if (!of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
-                return 0;
-        return 1;
+        if (of_flat_dt_is_compatible(root, "IBM,CBEA") ||
+            of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+                return 1;
+        return 0;
 }
 /*
diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c
index 95b36430aa0f..b47fcc5ddb78 100644
--- a/arch/powerpc/platforms/cell/spu_callbacks.c
+++ b/arch/powerpc/platforms/cell/spu_callbacks.c
@@ -258,6 +258,7 @@ void *spu_syscall_table[] = {
        [__NR_futex]                    sys_futex,
        [__NR_sched_setaffinity]        sys_sched_setaffinity,
        [__NR_sched_getaffinity]        sys_sched_getaffinity,
+        [224]                           sys_ni_syscall,
        [__NR_tuxcall]                  sys_ni_syscall,
        [226]                           sys_ni_syscall,
        [__NR_io_setup]                 sys_io_setup,
@@ -332,19 +333,21 @@ void *spu_syscall_table[] = {
        [__NR_readlinkat]               sys_readlinkat,
        [__NR_fchmodat]                 sys_fchmodat,
        [__NR_faccessat]                sys_faccessat,
+        [__NR_get_robust_list]          sys_get_robust_list,
+        [__NR_set_robust_list]          sys_set_robust_list,
 };
 long spu_sys_callback(struct spu_syscall_block *s)
 {
        long (*syscall)(u64 a1, u64 a2, u64 a3, u64 a4, u64 a5, u64 a6);
-        syscall = spu_syscall_table[s->nr_ret];
        if (s->nr_ret >= ARRAY_SIZE(spu_syscall_table)) {
                pr_debug("%s: invalid syscall #%ld", __FUNCTION__, s->nr_ret);
                return -ENOSYS;
        }
+        syscall = spu_syscall_table[s->nr_ret];
 #ifdef DEBUG
        print_symbol(KERN_DEBUG "SPU-syscall %s:", (unsigned long)syscall);
        printk("syscall%ld(%lx, %lx, %lx, %lx, %lx, %lx)\n",
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index df2343e1956b..c896ce83d412 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -1157,6 +1157,7 @@ EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
 /* some quirks for platform function decoding */
 enum {
        pmac_i2c_quirk_invmask = 0x00000001u,
+        pmac_i2c_quirk_skip = 0x00000002u,
 };
 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
@@ -1172,6 +1173,15 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
                /* XXX Study device-tree's & apple drivers are get the quirks
                 * right !
                 */
+                /* Workaround: It seems that running the clockspreading
+                 * properties on the eMac will cause lockups during boot.
+                 * The machine seems to work fine without that. So for now,
+                 * let's make sure i2c-hwclock doesn't match about "imic"
+                 * clocks and we'll figure out if we really need to do
+                 * something special about those later.
+                 */
+                { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
+                { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
                { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
                { "i2c-cpu-voltage", NULL, 0},
                {  "temp-monitor", NULL, 0 },
@@ -1198,6 +1208,8 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
                                if (p->compatible &&
                                    !device_is_compatible(np, p->compatible))
                                        continue;
+                                if (p->quirks & pmac_i2c_quirk_skip)
+                                        break;
                                callback(np, p->quirks);
                                break;
                        }
diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c
index 4baa75b1d36f..f08173b0f065 100644
--- a/arch/powerpc/platforms/powermac/pfunc_core.c
+++ b/arch/powerpc/platforms/powermac/pfunc_core.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
 #include <linux/module.h>
+#include <linux/mutex.h>
 #include <asm/semaphore.h>
 #include <asm/prom.h>
@@ -546,6 +547,7 @@ struct pmf_device {
 static LIST_HEAD(pmf_devices);
 static spinlock_t pmf_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_MUTEX(pmf_irq_mutex);
 static void pmf_release_device(struct kref *kref)
 {
@@ -864,15 +866,17 @@ int pmf_register_irq_client(struct device_node *target,
        spin_lock_irqsave(&pmf_lock, flags);
        func = __pmf_find_function(target, name, PMF_FLAGS_INT_GEN);
-        if (func == NULL) {
+        if (func)
-                spin_unlock_irqrestore(&pmf_lock, flags);
+                func = pmf_get_function(func);
+        spin_unlock_irqrestore(&pmf_lock, flags);
+        if (func == NULL)
                return -ENODEV;
-        }
+        mutex_lock(&pmf_irq_mutex);
        if (list_empty(&func->irq_clients))
                func->dev->handlers->irq_enable(func);
        list_add(&client->link, &func->irq_clients);
        client->func = func;
-        spin_unlock_irqrestore(&pmf_lock, flags);
+        mutex_unlock(&pmf_irq_mutex);
        return 0;
 }
@@ -881,16 +885,16 @@ EXPORT_SYMBOL_GPL(pmf_register_irq_client);
 void pmf_unregister_irq_client(struct pmf_irq_client *client)
 {
        struct pmf_function *func = client->func;
-        unsigned long flags;
        BUG_ON(func == NULL);
-        spin_lock_irqsave(&pmf_lock, flags);
+        mutex_lock(&pmf_irq_mutex);
        client->func = NULL;
        list_del(&client->link);
        if (list_empty(&func->irq_clients))
                func->dev->handlers->irq_disable(func);
-        spin_unlock_irqrestore(&pmf_lock, flags);
+        mutex_unlock(&pmf_irq_mutex);
+        pmf_put_function(func);
 }
 EXPORT_SYMBOL_GPL(pmf_unregister_irq_client);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 4d15e396655c..b9200fb07815 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -463,11 +463,23 @@ static int pmac_pm_finish(suspend_state_t state)
        return 0;
 }
+static int pmac_pm_valid(suspend_state_t state)
+{
+        switch (state) {
+        case PM_SUSPEND_DISK:
+                return 1;
+        /* can't do any other states via generic mechanism yet */
+        default:
+                return 0;
+        }
+}
 static struct pm_ops pmac_pm_ops = {
        .pm_disk_mode   = PM_DISK_SHUTDOWN,
        .prepare        = pmac_pm_prepare,
        .enter          = pmac_pm_enter,
        .finish         = pmac_pm_finish,
+        .valid          = pmac_pm_valid,
 };
 #endif /* CONFIG_SOFTWARE_SUSPEND */
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index 5eb55ef1c91c..3ba87835757e 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -255,7 +255,7 @@ static int __init pSeries_init_panel(void)
 {
        /* Manually leave the kernel version on the panel. */
        ppc_md.progress("Linux ppc64\n", 0);
-        ppc_md.progress(system_utsname.version, 0);
+        ppc_md.progress(system_utsname.release, 0);
        return 0;
 }
@@ -389,6 +389,7 @@ static int __init pSeries_probe_hypertas(unsigned long node,
 static int __init pSeries_probe(void)
 {
+        unsigned long root = of_get_flat_dt_root();
        char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
                                          "device_type", NULL);
        if (dtype == NULL)
@@ -396,6 +397,13 @@ static int __init pSeries_probe(void)
        if (strcmp(dtype, "chrp"))
                return 0;
+        /* Cell blades firmware claims to be chrp while it's not. Until this
+         * is fixed, we need to avoid those here.
+         */
+        if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
+            of_flat_dt_is_compatible(root, "IBM,CBEA"))
+                return 0;
        DBG("pSeries detected, looking for LPAR capability...\n");
        /* Now try to figure out if we are running on LPAR */
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
index cc7c4aea9397..2f5c5e157617 100644
--- a/arch/ppc/kernel/asm-offsets.c
+++ b/arch/ppc/kernel/asm-offsets.c
@@ -134,7 +134,7 @@ main(void)
        DEFINE(TI_TASK, offsetof(struct thread_info, task));
        DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
        DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
-        DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, flags));
+        DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
        DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
        DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index ec53c7d65f2b..7a2f20583be4 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -355,9 +355,7 @@ InstructionTLBMiss:
        . = 0x1200
 DataStoreTLBMiss:
-#ifdef CONFIG_8xx_CPU6
        stw     r3, 8(r0)
-#endif
        DO_8xx_CPU6(0x3f80, r3)
        mtspr   SPRN_M_TW, r10  /* Save a couple of working registers */
        mfcr    r10
@@ -417,9 +415,7 @@ DataStoreTLBMiss:
        lwz     r11, 0(r0)
        mtcr    r11
        lwz     r11, 4(r0)
-#ifdef CONFIG_8xx_CPU6
        lwz     r3, 8(r0)
-#endif
        rfi
 /* This is an instruction TLB error on the MPC8xx.  This could be due
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c
index e62b75707f7a..abb7154de2c7 100644
--- a/arch/ppc/platforms/mpc8272ads_setup.c
+++ b/arch/ppc/platforms/mpc8272ads_setup.c
@@ -279,11 +279,11 @@ static int mpc8272ads_platform_notify(struct device *dev)
        static const struct platform_notify_dev_map dev_map[] = {
                {
                        .bus_id = "fsl-cpm-fcc",
-                        .rtn = mpc8272ads_fixup_enet_pdata
+                        .rtn = mpc8272ads_fixup_enet_pdata,
                },
                {
                        .bus_id = "fsl-cpm-scc:uart",
-                        .rtn = mpc
+                        .rtn = mpc8272ads_fixup_uart_pdata,
                },
                {
                        .bus_id = NULL
@@ -335,15 +335,15 @@ struct platform_device* early_uart_get_pdev(int index)
        struct platform_device* pdev = NULL;
        if(index) { /*assume SCC4 here*/
                pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
-                pinfo = &mpc8272<F12>_uart_pdata[1];
+                pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
        } else { /*over SCC1*/
                pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
-                pinfo = &mpc8272_uart_pdata[0];
+                pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
        }
        pinfo->uart_clk = bd->bi_intfreq;
        pdev->dev.platform_data = pinfo;
-        ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+        ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
        return NULL;
 }
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
index 0636aed7b827..8692d00c08c4 100644
--- a/arch/ppc/syslib/pq2_devices.c
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -121,13 +121,13 @@ struct platform_device ppc_sys_platform_devices[] = {
                .num_resources   = 3,
                .resource = (struct resource[]) {
                        {
-                                .name   = "scc_mem",
+                                .name   = "regs",
                                .start  = 0x11A00,
                                .end    = 0x11A1F,
                                .flags  = IORESOURCE_MEM,
                        },
                        {
-                                .name   = "scc_pram",
+                                .name   = "pram",
                                .start  = 0x8000,
                                .end    = 0x80ff,
                                .flags  = IORESOURCE_MEM,
@@ -145,13 +145,13 @@ struct platform_device ppc_sys_platform_devices[] = {
                .num_resources   = 3,
                .resource = (struct resource[]) {
                        {
-                                .name   = "scc_mem",
+                                .name   = "regs",
                                .start  = 0x11A20,
                                .end    = 0x11A3F,
                                .flags  = IORESOURCE_MEM,
                        },
                        {
-                                .name   = "scc_pram",
+                                .name   = "pram",
                                .start  = 0x8100,
                                .end    = 0x81ff,
                                .flags  = IORESOURCE_MEM,
@@ -169,13 +169,13 @@ struct platform_device ppc_sys_platform_devices[] = {
                .num_resources   = 3,
                .resource = (struct resource[]) {
                        {
-                                .name   = "scc_mem",
+                                .name   = "regs",
                                .start  = 0x11A40,
                                .end    = 0x11A5F,
                                .flags  = IORESOURCE_MEM,
                        },
                        {
-                                .name   = "scc_pram",
+                                .name   = "pram",
                                .start  = 0x8200,
                                .end    = 0x82ff,
                                .flags  = IORESOURCE_MEM,
@@ -193,13 +193,13 @@ struct platform_device ppc_sys_platform_devices[] = {
                .num_resources   = 3,
                .resource = (struct resource[]) {
                        {
-                                .name   = "scc_mem",
+                                .name   = "regs",
                                .start  = 0x11A60,
                                .end    = 0x11A7F,
                                .flags  = IORESOURCE_MEM,
                        },
                        {
-                                .name   = "scc_pram",
+                                .name   = "pram",
                                .start  = 0x8300,
                                .end    = 0x83ff,
                                .flags  = IORESOURCE_MEM,
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
index 433b0fa203e1..fee8948162b9 100644
--- a/arch/ppc/syslib/pq2_sys.c
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -139,13 +139,13 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                .ppc_sys_name   = "8272",
                .mask           = 0x0000ff00,
                .value          = 0x00000c00,
-                .num_devices    = 11,
+                .num_devices    = 12,
                .device_list = (enum ppc_sys_devices[])
                {
                        MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
-                        MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
+                        MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
-                        MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
+                        MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
-                        MPC82xx_CPM_USB, MPC82xx_SEC1,
+                        MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
                },
        },
        /* below is a list of the 8280 family of processors */
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index ef5b9c44b86b..4d53b2739357 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1650,3 +1650,11 @@ sys_tee_wrapper:
        llgfr   %r4,%r4                 # size_t
        llgfr   %r5,%r5                 # unsigned int
        jg      sys_tee
+        .globl compat_sys_vmsplice_wrapper
+compat_sys_vmsplice_wrapper:
+        lgfr    %r2,%r2                 # int
+        llgtr   %r3,%r3                 # compat_iovec *
+        llgfr   %r4,%r4                 # unsigned int
+        llgfr   %r5,%r5                 # unsigned int
+        jg      compat_sys_vmsplice
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index fc2c0767202b..93be1d56c036 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -317,3 +317,4 @@ SYSCALL(sys_get_robust_list,sys_get_robust_list,compat_sys_get_robust_list_wrapp
 SYSCALL(sys_splice,sys_splice,sys_splice_wrapper)
 SYSCALL(sys_sync_file_range,sys_sync_file_range,sys_sync_file_range_wrapper)
 SYSCALL(sys_tee,sys_tee,sys_tee_wrapper)
+SYSCALL(sys_vmsplice,sys_vmsplice,compat_sys_vmsplice_wrapper)
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index fea043b69b91..2a6c6efb6865 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -249,18 +249,19 @@ static inline void stop_hz_timer(void)
        unsigned long flags;
        unsigned long seq, next;
        __u64 timer, todval;
+        int cpu = smp_processor_id();
        if (sysctl_hz_timer != 0)
                return;
-        cpu_set(smp_processor_id(), nohz_cpu_mask);
+        cpu_set(cpu, nohz_cpu_mask);
        /*
         * Leave the clock comparator set up for the next timer
         * tick if either rcu or a softirq is pending.
         */
-        if (rcu_pending(smp_processor_id()) || local_softirq_pending()) {
+        if (rcu_needs_cpu(cpu) || local_softirq_pending()) {
-                cpu_clear(smp_processor_id(), nohz_cpu_mask);
+                cpu_clear(cpu, nohz_cpu_mask);
                return;
        }
@@ -271,7 +272,7 @@ static inline void stop_hz_timer(void)
        next = next_timer_interrupt();
        do {
                seq = read_seqbegin_irqsave(&xtime_lock, flags);
-                timer = (__u64)(next - jiffies) + jiffies_64;
+                timer = ((__u64) next) - ((__u64) jiffies) + jiffies_64;
        } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
        todval = -1ULL;
        /* Be careful about overflows. */
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 460f72e640e6..f9ff29734848 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -274,6 +274,11 @@ void *sbus_alloc_consistent(struct sbus_dev *sdev, long len, u32 *dma_addrp)
        if (mmu_map_dma_area(dma_addrp, va, res->start, len_total) != 0)
                goto err_noiommu;
+        /* Set the resource name, if known. */
+        if (sdev) {
+                res->name = sdev->prom_name;
+        }
        return (void *)res->start;
 err_noiommu:
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index 787d5f1347ec..598682f31ebf 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -113,6 +113,7 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
                switch (ELF32_R_TYPE(rel[i].r_info)) {
                case R_SPARC_32:
+                case R_SPARC_UA32:
                        location[0] = v >> 24;
                        location[1] = v >> 16;
                        location[2] = v >>  8;
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c
index 42002b742deb..bcdf5ad0f035 100644
--- a/arch/sparc/kernel/pcic.c
+++ b/arch/sparc/kernel/pcic.c
@@ -896,13 +896,6 @@ static inline unsigned long get_irqmask(int irq_nr)
        return 1 << irq_nr;
 }
-static inline char *pcic_irq_itoa(unsigned int irq)
-{
-        static char buff[16];
-        sprintf(buff, "%d", irq);
-        return buff;
-}
 static void pcic_disable_irq(unsigned int irq_nr)
 {
        unsigned long mask, flags;
@@ -955,7 +948,6 @@ void __init sun4m_pci_init_IRQ(void)
        BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM);
        BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM);
        BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM);
-        BTFIXUPSET_CALL(__irq_itoa, pcic_irq_itoa, BTFIXUPCALL_NORM);
 }
 int pcibios_assign_resource(struct pci_dev *pdev, int resource)
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c
index 3509e4305532..2cbf282f0d00 100644
--- a/arch/sparc/kernel/setup.c
+++ b/arch/sparc/kernel/setup.c
@@ -31,6 +31,7 @@
 #include <linux/console.h>
 #include <linux/spinlock.h>
 #include <linux/root_dev.h>
+#include <linux/cpu.h>
 #include <asm/system.h>
 #include <asm/io.h>
@@ -348,6 +349,8 @@ void __init setup_arch(char **cmdline_p)
        init_mm.context = (unsigned long) NO_CONTEXT;
        init_task.thread.kregs = &fake_swapper_regs;
+        smp_setup_cpu_possible_map();
        paging_init();
 }
@@ -389,6 +392,8 @@ console_initcall(set_preferred_console);
 extern char *sparc_cpu_type;
 extern char *sparc_fpu_type;
+static int ncpus_probed;
 static int show_cpuinfo(struct seq_file *m, void *__unused)
 {
        seq_printf(m,
@@ -411,7 +416,7 @@ static int show_cpuinfo(struct seq_file *m, void *__unused)
                   romvec->pv_printrev >> 16,
                   romvec->pv_printrev & 0xffff,
                   &cputypval,
-                   num_possible_cpus(),
+                   ncpus_probed,
                   num_online_cpus()
 #ifndef CONFIG_SMP
                   , cpu_data(0).udelay_val/(500000/HZ),
@@ -471,3 +476,30 @@ void sun_do_break(void)
 int serial_console = -1;
 int stop_a_enabled = 1;
+static int __init topology_init(void)
+{
+        int i, ncpus, err;
+        /* Count the number of physically present processors in
+         * the machine, even on uniprocessor, so that /proc/cpuinfo
+         * output is consistent with 2.4.x
+         */
+        ncpus = 0;
+        while (!cpu_find_by_instance(ncpus, NULL, NULL))
+                ncpus++;
+        ncpus_probed = ncpus;
+        err = 0;
+        for_each_online_cpu(i) {
+                struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
+                if (!p)
+                        err = -ENOMEM;
+                else
+                        register_cpu(p, i, NULL);
+        }
+        return err;
+}
+subsys_initcall(topology_init);
diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c
index a93f5da6855d..6135d4faeeeb 100644
--- a/arch/sparc/kernel/smp.c
+++ b/arch/sparc/kernel/smp.c
@@ -58,7 +58,7 @@ cpumask_t smp_commenced_mask = CPU_MASK_NONE;
 /* Used to make bitops atomic */
 unsigned char bitops_spinlock = 0;
-void __init smp_store_cpu_info(int id)
+void __cpuinit smp_store_cpu_info(int id)
 {
        int cpu_node;
@@ -69,6 +69,17 @@ void __init smp_store_cpu_info(int id)
                                                     "clock-frequency", 0);
        cpu_data(id).prom_node = cpu_node;
        cpu_data(id).mid = cpu_get_hwmid(cpu_node);
+        /* this is required to tune the scheduler correctly */
+        /* is it possible to have CPUs with different cache sizes? */
+        if (id == boot_cpu_id) {
+                int cache_line,cache_nlines;
+                cache_line = 0x20;
+                cache_line = prom_getintdefault(cpu_node, "ecache-line-size", cache_line);
+                cache_nlines = 0x8000;
+                cache_nlines = prom_getintdefault(cpu_node, "ecache-nlines", cache_nlines);
+                max_cache_size = cache_line * cache_nlines;
+        }
        if (cpu_data(id).mid < 0)
                panic("No MID found for CPU%d at node 0x%08d", id, cpu_node);
 }
@@ -256,22 +267,18 @@ int setup_profiling_timer(unsigned int multiplier)
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
        extern void smp4m_boot_cpus(void);
-        int i, cpuid, ncpus, extra;
+        int i, cpuid, extra;
        BUG_ON(sparc_cpu_model != sun4m);
        printk("Entering SMP Mode...\n");
-        ncpus = 1;
        extra = 0;
        for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
-                if (cpuid == boot_cpu_id)
+                if (cpuid >= NR_CPUS)
-                        continue;
-                if (cpuid < NR_CPUS && ncpus++ < max_cpus)
-                        cpu_set(cpuid, phys_cpu_present_map);
-                else
                        extra++;
        }
-        if (max_cpus >= NR_CPUS && extra)
+        /* i = number of cpus */
+        if (extra && max_cpus > i - extra)
                printk("Warning: NR_CPUS is too low to start all cpus\n");
        smp_store_cpu_info(boot_cpu_id);
@@ -279,7 +286,25 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        smp4m_boot_cpus();
 }
-void __devinit smp_prepare_boot_cpu(void)
+/* Set this up early so that things like the scheduler can init
+ * properly.  We use the same cpu mask for both the present and
+ * possible cpu map.
+ */
+void __init smp_setup_cpu_possible_map(void)
+{
+        int instance, mid;
+        instance = 0;
+        while (!cpu_find_by_instance(instance, NULL, &mid)) {
+                if (mid < NR_CPUS) {
+                        cpu_set(mid, phys_cpu_present_map);
+                        cpu_set(mid, cpu_present_map);
+                }
+                instance++;
+        }
+}
+void __init smp_prepare_boot_cpu(void)
 {
        int cpuid = hard_smp_processor_id();
@@ -295,7 +320,7 @@ void __devinit smp_prepare_boot_cpu(void)
        cpu_set(cpuid, phys_cpu_present_map);
 }
-int __devinit __cpu_up(unsigned int cpu)
+int __cpuinit __cpu_up(unsigned int cpu)
 {
        extern int smp4m_boot_one_cpu(int);
        int ret;
diff --git a/arch/sparc/kernel/sparc_ksyms.c b/arch/sparc/kernel/sparc_ksyms.c
index ec1c9687d679..fd7deabf9982 100644
--- a/arch/sparc/kernel/sparc_ksyms.c
+++ b/arch/sparc/kernel/sparc_ksyms.c
@@ -163,7 +163,6 @@ EXPORT_SYMBOL(BTFIXUP_CALL(__hard_smp_processor_id));
 #endif
 EXPORT_SYMBOL(BTFIXUP_CALL(enable_irq));
 EXPORT_SYMBOL(BTFIXUP_CALL(disable_irq));
-EXPORT_SYMBOL(BTFIXUP_CALL(__irq_itoa));
 EXPORT_SYMBOL(BTFIXUP_CALL(mmu_unlockarea));
 EXPORT_SYMBOL(BTFIXUP_CALL(mmu_lockarea));
 EXPORT_SYMBOL(BTFIXUP_CALL(mmu_get_scsi_sgl));
@@ -251,19 +250,9 @@ EXPORT_SYMBOL(__prom_getchild);
 EXPORT_SYMBOL(__prom_getsibling);
 /* sparc library symbols */
-EXPORT_SYMBOL(memchr);
 EXPORT_SYMBOL(memscan);
 EXPORT_SYMBOL(strlen);
-EXPORT_SYMBOL(strnlen);
-EXPORT_SYMBOL(strcpy);
-EXPORT_SYMBOL(strncpy);
-EXPORT_SYMBOL(strcat);
-EXPORT_SYMBOL(strncat);
-EXPORT_SYMBOL(strcmp);
 EXPORT_SYMBOL(strncmp);
-EXPORT_SYMBOL(strchr);
-EXPORT_SYMBOL(strrchr);
-EXPORT_SYMBOL(strstr);
 EXPORT_SYMBOL(page_kernel);
 /* Special internal versions of library functions. */
@@ -317,6 +306,3 @@ EXPORT_SYMBOL(do_BUG);
 /* Sun Power Management Idle Handler */
 EXPORT_SYMBOL(pm_idle);
-/* Binfmt_misc needs this */
-EXPORT_SYMBOL(sys_close);
diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c
index 3d6a99073c42..0f2d8d9cbdba 100644
--- a/arch/sparc/kernel/sun4c_irq.c
+++ b/arch/sparc/kernel/sun4c_irq.c
@@ -198,8 +198,6 @@ static void __init sun4c_init_timers(irqreturn_t (*counter_fn)(int, void *, stru
 static void sun4c_nop(void) {}
 #endif
-extern char *sun4m_irq_itoa(unsigned int irq);
 void __init sun4c_init_IRQ(void)
 {
        struct linux_prom_registers int_regs[2];
@@ -238,7 +236,6 @@ void __init sun4c_init_IRQ(void)
        BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM);
        BTFIXUPSET_CALL(clear_profile_irq, sun4c_clear_profile_irq, BTFIXUPCALL_NOP);
        BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP);
-        BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM);
        sparc_init_timers = sun4c_init_timers;
 #ifdef CONFIG_SMP
        BTFIXUPSET_CALL(set_cpu_int, sun4c_nop, BTFIXUPCALL_NOP);
diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c
index ca656d9bd6fd..9c30e35c88f7 100644
--- a/arch/sparc/kernel/sun4d_irq.c
+++ b/arch/sparc/kernel/sun4d_irq.c
@@ -560,17 +560,6 @@ void __init sun4d_init_sbi_irq(void)
        }
 }
-static char *sun4d_irq_itoa(unsigned int irq)
-{
-        static char buff[16];
-        
-        if (irq < (1 << 5))
-                sprintf(buff, "%d", irq);
-        else
-                sprintf(buff, "%d,%x", sbus_to_pil[(irq >> 2) & 7], irq);
-        return buff;
-}
 void __init sun4d_init_IRQ(void)
 {
        local_irq_disable();
@@ -581,7 +570,6 @@ void __init sun4d_init_IRQ(void)
        BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
        BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM);
        BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
-        BTFIXUPSET_CALL(__irq_itoa, sun4d_irq_itoa, BTFIXUPCALL_NORM);
        sparc_init_timers = sun4d_init_timers;
 #ifdef CONFIG_SMP
        BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c
index 39d712c3c809..a296c13ac18f 100644
--- a/arch/sparc/kernel/sun4m_irq.c
+++ b/arch/sparc/kernel/sun4m_irq.c
@@ -229,13 +229,6 @@ static void sun4m_load_profile_irq(int cpu, unsigned int limit)
        sun4m_timers->cpu_timers[cpu].l14_timer_limit = limit;
 }
-char *sun4m_irq_itoa(unsigned int irq)
-{
-        static char buff[16];
-        sprintf(buff, "%d", irq);
-        return buff;
-}
 static void __init sun4m_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
 {
        int reg_count, irq, cpu;
@@ -388,7 +381,6 @@ void __init sun4m_init_IRQ(void)
        BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM);
        BTFIXUPSET_CALL(clear_profile_irq, sun4m_clear_profile_irq, BTFIXUPCALL_NORM);
        BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM);
-        BTFIXUPSET_CALL(__irq_itoa, sun4m_irq_itoa, BTFIXUPCALL_NORM);
        sparc_init_timers = sun4m_init_timers;
 #ifdef CONFIG_SMP
        BTFIXUPSET_CALL(set_cpu_int, sun4m_send_ipi, BTFIXUPCALL_NORM);
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c
index 70b375a4c2c2..3b32096134aa 100644
--- a/arch/sparc/kernel/sun4m_smp.c
+++ b/arch/sparc/kernel/sun4m_smp.c
@@ -66,7 +66,7 @@ static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
 static void smp_setup_percpu_timer(void);
 extern void cpu_probe(void);
-void __init smp4m_callin(void)
+void __cpuinit smp4m_callin(void)
 {
        int cpuid = hard_smp_processor_id();
@@ -112,13 +112,8 @@ void __init smp4m_callin(void)
        local_irq_enable();
        cpu_set(cpuid, cpu_online_map);
-        /* last one in gets all the interrupts (for testing) */
-        set_irq_udt(boot_cpu_id);
 }
-extern void init_IRQ(void);
-extern void cpu_panic(void);
 /*
 *      Cycle through the processors asking the PROM to start each one.
 */
@@ -134,7 +129,7 @@ void __init smp4m_boot_cpus(void)
        local_flush_cache_all();
 }
-int smp4m_boot_one_cpu(int i)
+int __cpuinit smp4m_boot_one_cpu(int i)
 {
        extern unsigned long sun4m_cpu_startup;
        unsigned long *entry = &sun4m_cpu_startup;
diff --git a/arch/sparc/kernel/systbls.S b/arch/sparc/kernel/systbls.S
index 6e1135cc03b0..2856551bddf1 100644
--- a/arch/sparc/kernel/systbls.S
+++ b/arch/sparc/kernel/systbls.S
@@ -79,6 +79,7 @@ sys_call_table:
 /*285*/ .long sys_mkdirat, sys_mknodat, sys_fchownat, sys_futimesat, sys_fstatat64
 /*290*/ .long sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
 /*295*/ .long sys_fchmodat, sys_faccessat, sys_pselect6, sys_ppoll, sys_unshare
+/*300*/ .long sys_set_robust_list, sys_get_robust_list
 #ifdef CONFIG_SUNOS_EMUL
        /* Now the SunOS syscall table. */
@@ -190,6 +191,6 @@ sunos_sys_table:
 /*290*/ .long sunos_nosys, sunos_nosys, sunos_nosys
        .long sunos_nosys, sunos_nosys, sunos_nosys
        .long sunos_nosys, sunos_nosys, sunos_nosys
-        .long sunos_nosys
+        .long sunos_nosys, sunos_nosys, sunos_nosys
 #endif
diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c
index 77840c804786..7215849db392 100644
--- a/arch/sparc/mm/iommu.c
+++ b/arch/sparc/mm/iommu.c
@@ -144,8 +144,9 @@ static void iommu_flush_iotlb(iopte_t *iopte, unsigned int niopte)
        unsigned long start;
        unsigned long end;
-        start = (unsigned long)iopte & PAGE_MASK;
+        start = (unsigned long)iopte;
        end = PAGE_ALIGN(start + niopte*sizeof(iopte_t));
+        start &= PAGE_MASK;
        if (viking_mxcc_present) {
                while(start < end) {
                        viking_mxcc_flush_page(start);
diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig
index 43a66f5407f4..a7a111db25b2 100644
--- a/arch/sparc64/Kconfig
+++ b/arch/sparc64/Kconfig
@@ -87,6 +87,10 @@ config SYSVIPC_COMPAT
        depends on COMPAT && SYSVIPC
        default y
+config GENERIC_HARDIRQS
+        bool
+        default y
 menu "General machine setup"
 config SMP
diff --git a/arch/sparc64/defconfig b/arch/sparc64/defconfig
index 1317380fa937..9da75f89fe2c 100644
--- a/arch/sparc64/defconfig
+++ b/arch/sparc64/defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.16
+# Linux kernel version: 2.6.17
-# Sun Apr  2 19:31:04 2006
+# Tue Jun 20 01:26:43 2006
 #
 CONFIG_SPARC=y
 CONFIG_SPARC64=y
@@ -87,6 +87,7 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
 CONFIG_SYSVIPC_COMPAT=y
+CONFIG_GENERIC_HARDIRQS=y
 #
 # General machine setup
@@ -114,6 +115,7 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_HUGETLB_PAGE_SIZE_4MB=y
 # CONFIG_HUGETLB_PAGE_SIZE_512K is not set
 # CONFIG_HUGETLB_PAGE_SIZE_64K is not set
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_DEFAULT=y
 CONFIG_LARGE_ALLOCS=y
@@ -182,6 +184,8 @@ CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
 CONFIG_INET_XFRM_TUNNEL=y
 CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 CONFIG_TCP_CONG_ADVANCED=y
@@ -197,6 +201,9 @@ CONFIG_TCP_CONG_HSTCP=m
 CONFIG_TCP_CONG_HYBLA=m
 CONFIG_TCP_CONG_VEGAS=m
 CONFIG_TCP_CONG_SCALABLE=m
+CONFIG_TCP_CONG_LP=m
+CONFIG_TCP_CONG_VENO=m
+CONFIG_TCP_CONG_COMPOUND=m
 CONFIG_IPV6=m
 CONFIG_IPV6_PRIVACY=y
 CONFIG_IPV6_ROUTER_PREF=y
@@ -206,7 +213,10 @@ CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
 CONFIG_INET6_XFRM_TUNNEL=m
 CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
 CONFIG_IPV6_TUNNEL=m
+# CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
 #
@@ -259,6 +269,7 @@ CONFIG_VLAN_8021Q=m
 # Network testing
 #
 CONFIG_NET_PKTGEN=m
+CONFIG_NET_TCPPROBE=m
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
@@ -430,7 +441,6 @@ CONFIG_ISCSI_TCP=m
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_SYM53C8XX_2 is not set
 # CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
 # CONFIG_SCSI_QLOGIC_1280 is not set
 # CONFIG_SCSI_QLOGICPTI is not set
 # CONFIG_SCSI_QLA_FC is not set
@@ -562,6 +572,7 @@ CONFIG_BNX2=m
 # CONFIG_CHELSIO_T1 is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
 #
 # Token Ring devices
@@ -811,6 +822,7 @@ CONFIG_HWMON=y
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
 #
 # Digital Video Broadcasting Devices
@@ -1042,9 +1054,7 @@ CONFIG_USB_HIDDEV=y
 # CONFIG_USB_ACECAD is not set
 # CONFIG_USB_KBTAB is not set
 # CONFIG_USB_POWERMATE is not set
-# CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_TOUCHSCREEN is not set
-# CONFIG_USB_ITMTOUCH is not set
-# CONFIG_USB_EGALAX is not set
 # CONFIG_USB_YEALINK is not set
 # CONFIG_USB_XPAD is not set
 # CONFIG_USB_ATI_REMOTE is not set
@@ -1115,6 +1125,14 @@ CONFIG_USB_HIDDEV=y
 # CONFIG_NEW_LEDS is not set
 #
+# LED drivers
+#
+#
+# LED Triggers
+#
+#
 # InfiniBand support
 #
 # CONFIG_INFINIBAND is not set
@@ -1129,6 +1147,19 @@ CONFIG_USB_HIDDEV=y
 # CONFIG_RTC_CLASS is not set
 #
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+#
+# DMA Clients
+#
+#
+# DMA Devices
+#
+#
 # Misc Linux/SPARC drivers
 #
 CONFIG_SUN_OPENPROMIO=m
@@ -1303,6 +1334,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_DEBUG_VM is not set
+# CONFIG_UNWIND_INFO is not set
 CONFIG_FORCED_INLINING=y
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
diff --git a/arch/sparc64/kernel/devices.c b/arch/sparc64/kernel/devices.c
index 007e8922cd16..0dd95ae50e12 100644
--- a/arch/sparc64/kernel/devices.c
+++ b/arch/sparc64/kernel/devices.c
@@ -157,7 +157,7 @@ unsigned int sun4v_vdev_device_interrupt(unsigned int dev_node)
                return 0;
        }
-        return sun4v_build_irq(sun4v_vdev_devhandle, irq, 5, 0);
+        return sun4v_build_irq(sun4v_vdev_devhandle, irq);
 }
 static const char *cpu_mid_prop(void)
diff --git a/arch/sparc64/kernel/entry.S b/arch/sparc64/kernel/entry.S
index 6d0b3ed77a02..be85ce2a4ad9 100644
--- a/arch/sparc64/kernel/entry.S
+++ b/arch/sparc64/kernel/entry.S
@@ -22,6 +22,7 @@
 #include <asm/estate.h>
 #include <asm/auxio.h>
 #include <asm/sfafsr.h>
+#include <asm/pil.h>
 #define curptr      g6
@@ -431,20 +432,16 @@ do_ivec:
        membar          #Sync
        sethi           %hi(ivector_table), %g2
-        sllx            %g3, 5, %g3
+        sllx            %g3, 3, %g3
        or              %g2, %lo(ivector_table), %g2
        add             %g2, %g3, %g3
-        ldub            [%g3 + 0x04], %g4       /* pil */
-        mov             1, %g2
-        sllx            %g2, %g4, %g2
-        sllx            %g4, 2, %g4
        TRAP_LOAD_IRQ_WORK(%g6, %g1)
-        lduw            [%g6 + %g4], %g5        /* g5 = irq_work(cpu, pil) */
+        lduw            [%g6], %g5              /* g5 = irq_work(cpu) */
        stw             %g5, [%g3 + 0x00]       /* bucket->irq_chain = g5 */
-        stw             %g3, [%g6 + %g4]        /* irq_work(cpu, pil) = bucket */
+        stw             %g3, [%g6]              /* irq_work(cpu) = bucket */
-        wr              %g2, 0x0, %set_softint
+        wr              %g0, 1 << PIL_DEVICE_IRQ, %set_softint
        retry
 do_ivec_xcall:
        mov             0x50, %g1
diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index 3eadac5e171e..31c5892f5acc 100644
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -10,6 +10,7 @@
 #include <linux/config.h>
 #include <linux/version.h>
 #include <linux/errno.h>
+#include <linux/threads.h>
 #include <asm/thread_info.h>
 #include <asm/asi.h>
 #include <asm/pstate.h>
@@ -493,6 +494,35 @@ tlb_fixup_done:
        call    prom_init
         mov    %l7, %o0                        ! OpenPROM cif handler
+        /* Initialize current_thread_info()->cpu as early as possible.
+         * In order to do that accurately we have to patch up the get_cpuid()
+         * assembler sequences.  And that, in turn, requires that we know
+         * if we are on a Starfire box or not.  While we're here, patch up
+         * the sun4v sequences as well.
+         */
+        call    check_if_starfire
+         nop
+        call    per_cpu_patch
+         nop
+        call    sun4v_patch
+         nop
+#ifdef CONFIG_SMP
+        call    hard_smp_processor_id
+         nop
+        cmp     %o0, NR_CPUS
+        blu,pt  %xcc, 1f
+         nop
+        call    boot_cpu_id_too_large
+         nop
+        /* Not reached... */
+1:
+#else
+        mov     0, %o0
+#endif
+        stb     %o0, [%g6 + TI_CPU]
        /* Off we go.... */
        call    start_kernel
         nop
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index 11e645c9ec50..a8c9dc8d1958 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -22,6 +22,7 @@
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
 #include <linux/bootmem.h>
+#include <linux/irq.h>
 #include <asm/ptrace.h>
 #include <asm/processor.h>
@@ -42,10 +43,6 @@
 #include <asm/auxio.h>
 #include <asm/head.h>
-#ifdef CONFIG_SMP
-static void distribute_irqs(void);
-#endif
 /* UPA nodes send interrupt packet to UltraSparc with first data reg
 * value low 5 (7 on Starfire) bits holding the IRQ identifier being
 * delivered.  We must translate this into a non-vector IRQ so we can
@@ -57,10 +54,29 @@ static void distribute_irqs(void);
 * The IVEC handler does not need to act atomically, the PIL dispatch
 * code uses CAS to get an atomic snapshot of the list and clear it
 * at the same time.
+ *
+ * If you make changes to ino_bucket, please update hand coded assembler
+ * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
 */
+struct ino_bucket {
+        /* Next handler in per-CPU IRQ worklist.  We know that
+         * bucket pointers have the high 32-bits clear, so to
+         * save space we only store the bits we need.
+         */
+/*0x00*/unsigned int irq_chain;
+        /* Virtual interrupt number assigned to this INO.  */
+/*0x04*/unsigned int virt_irq;
+};
+#define NUM_IVECS       (IMAP_INR + 1)
 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
+#define __irq_ino(irq) \
+        (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
+#define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
+#define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
 /* This has to be in the main kernel image, it cannot be
 * turned into per-cpu data.  The reason is that the main
 * kernel image is locked into the TLB and this structure
@@ -68,71 +84,82 @@ struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BY
 * access to this structure takes a TLB miss it could cause
 * the 5-level sparc v9 trap stack to overflow.
 */
-struct irq_work_struct {
+#define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
-        unsigned int    irq_worklists[16];
-};
-struct irq_work_struct __irq_work[NR_CPUS];
-#define irq_work(__cpu, __pil)  &(__irq_work[(__cpu)].irq_worklists[(__pil)])
-static struct irqaction *irq_action[NR_IRQS+1];
+static unsigned int virt_to_real_irq_table[NR_IRQS];
+static unsigned char virt_irq_cur = 1;
-/* This only synchronizes entities which modify IRQ handler
+static unsigned char virt_irq_alloc(unsigned int real_irq)
- * state and some selected user-level spots that want to
+{
- * read things in the table.  IRQ handler processing orders
+        unsigned char ent;
- * its' accesses such that no locking is needed.
- */
+        BUILD_BUG_ON(NR_IRQS >= 256);
-static DEFINE_SPINLOCK(irq_action_lock);
+        ent = virt_irq_cur;
+        if (ent >= NR_IRQS) {
+                printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
+                return 0;
+        }
+        virt_irq_cur = ent + 1;
+        virt_to_real_irq_table[ent] = real_irq;
+        return ent;
+}
+#if 0 /* Currently unused. */
+static unsigned char real_to_virt_irq(unsigned int real_irq)
+{
+        struct ino_bucket *bucket = __bucket(real_irq);
-static void register_irq_proc (unsigned int irq);
+        return bucket->virt_irq;
+}
+#endif
+static unsigned int virt_to_real_irq(unsigned char virt_irq)
+{
+        return virt_to_real_irq_table[virt_irq];
+}
 /*
- * Upper 2b of irqaction->flags holds the ino.
+ * /proc/interrupts printing:
- * irqaction->mask holds the smp affinity information.
 */
-#define put_ino_in_irqaction(action, irq) \
-        action->flags &= 0xffffffffffffUL; \
-        if (__bucket(irq) == &pil0_dummy_bucket) \
-                action->flags |= 0xdeadUL << 48;  \
-        else \
-                action->flags |= __irq_ino(irq) << 48;
-#define get_ino_in_irqaction(action)    (action->flags >> 48)
-#define put_smpaff_in_irqaction(action, smpaff) (action)->mask = (smpaff)
-#define get_smpaff_in_irqaction(action)         ((action)->mask)
 int show_interrupts(struct seq_file *p, void *v)
 {
+        int i = *(loff_t *) v, j;
+        struct irqaction * action;
        unsigned long flags;
-        int i = *(loff_t *) v;
-        struct irqaction *action;
-#ifdef CONFIG_SMP
-        int j;
-#endif
-        spin_lock_irqsave(&irq_action_lock, flags);
+        if (i == 0) {
-        if (i <= NR_IRQS) {
+                seq_printf(p, "           ");
-                if (!(action = *(i + irq_action)))
+                for_each_online_cpu(j)
-                        goto out_unlock;
+                        seq_printf(p, "CPU%d       ",j);
-                seq_printf(p, "%3d: ", i);
+                seq_putc(p, '\n');
+        }
+        if (i < NR_IRQS) {
+                spin_lock_irqsave(&irq_desc[i].lock, flags);
+                action = irq_desc[i].action;
+                if (!action)
+                        goto skip;
+                seq_printf(p, "%3d: ",i);
 #ifndef CONFIG_SMP
                seq_printf(p, "%10u ", kstat_irqs(i));
 #else
-                for_each_online_cpu(j) {
+                for_each_online_cpu(j)
-                        seq_printf(p, "%10u ",
+                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
-                                   kstat_cpu(j).irqs[i]);
-                }
 #endif
-                seq_printf(p, " %s:%lx", action->name,
+                seq_printf(p, " %9s", irq_desc[i].handler->typename);
-                           get_ino_in_irqaction(action));
+                seq_printf(p, "  %s", action->name);
-                for (action = action->next; action; action = action->next) {
-                        seq_printf(p, ", %s:%lx", action->name,
+                for (action=action->next; action; action = action->next)
-                                   get_ino_in_irqaction(action));
+                        seq_printf(p, ", %s", action->name);
-                }
                seq_putc(p, '\n');
+skip:
+                spin_unlock_irqrestore(&irq_desc[i].lock, flags);
        }
-out_unlock:
-        spin_unlock_irqrestore(&irq_action_lock, flags);
        return 0;
 }
@@ -173,556 +200,365 @@ static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
        return tid;
 }
-/* Now these are always passed a true fully specified sun4u INO. */
+struct irq_handler_data {
-void enable_irq(unsigned int irq)
+        unsigned long   iclr;
-{
+        unsigned long   imap;
-        struct ino_bucket *bucket = __bucket(irq);
-        unsigned long imap, cpuid;
-        imap = bucket->imap;
-        if (imap == 0UL)
-                return;
-        preempt_disable();
-        /* This gets the physical processor ID, even on uniprocessor,
-         * so we can always program the interrupt target correctly.
-         */
-        cpuid = real_hard_smp_processor_id();
-        if (tlb_type == hypervisor) {
-                unsigned int ino = __irq_ino(irq);
-                int err;
-                err = sun4v_intr_settarget(ino, cpuid);
+        void            (*pre_handler)(unsigned int, void *, void *);
-                if (err != HV_EOK)
+        void            *pre_handler_arg1;
-                        printk("sun4v_intr_settarget(%x,%lu): err(%d)\n",
+        void            *pre_handler_arg2;
-                               ino, cpuid, err);
+};
-                err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
-                if (err != HV_EOK)
-                        printk("sun4v_intr_setenabled(%x): err(%d)\n",
-                               ino, err);
-        } else {
-                unsigned int tid = sun4u_compute_tid(imap, cpuid);
-                /* NOTE NOTE NOTE, IGN and INO are read-only, IGN is a product
-                 * of this SYSIO's preconfigured IGN in the SYSIO Control
-                 * Register, the hardware just mirrors that value here.
-                 * However for Graphics and UPA Slave devices the full
-                 * IMAP_INR field can be set by the programmer here.
-                 *
-                 * Things like FFB can now be handled via the new IRQ
-                 * mechanism.
-                 */
-                upa_writel(tid | IMAP_VALID, imap);
-        }
-        preempt_enable();
-}
-/* This now gets passed true ino's as well. */
+static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
-void disable_irq(unsigned int irq)
 {
-        struct ino_bucket *bucket = __bucket(irq);
+        unsigned int real_irq = virt_to_real_irq(virt_irq);
-        unsigned long imap;
+        struct ino_bucket *bucket = NULL;
-        imap = bucket->imap;
-        if (imap != 0UL) {
-                if (tlb_type == hypervisor) {
-                        unsigned int ino = __irq_ino(irq);
-                        int err;
-                        err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
-                        if (err != HV_EOK)
-                                printk("sun4v_intr_setenabled(%x): "
-                                       "err(%d)\n", ino, err);
-                } else {
-                        u32 tmp;
-                        /* NOTE: We do not want to futz with the IRQ clear registers
-                         *       and move the state to IDLE, the SCSI code does call
-                         *       disable_irq() to assure atomicity in the queue cmd
-                         *       SCSI adapter driver code.  Thus we'd lose interrupts.
-                         */
-                        tmp = upa_readl(imap);
-                        tmp &= ~IMAP_VALID;
-                        upa_writel(tmp, imap);
-                }
-        }
-}
-/* The timer is the one "weird" interrupt which is generated by
+        if (likely(real_irq))
- * the CPU %tick register and not by some normal vectored interrupt
+                bucket = __bucket(real_irq);
- * source.  To handle this special case, we use this dummy INO bucket.
- */
-static struct irq_desc pil0_dummy_desc;
-static struct ino_bucket pil0_dummy_bucket = {
-        .irq_info       =       &pil0_dummy_desc,
-};
-static void build_irq_error(const char *msg, unsigned int ino, int pil, int inofixup,
+        return bucket;
-                            unsigned long iclr, unsigned long imap,
-                            struct ino_bucket *bucket)
-{
-        prom_printf("IRQ: INO %04x (%d:%016lx:%016lx) --> "
-                    "(%d:%d:%016lx:%016lx), halting...\n",
-                    ino, bucket->pil, bucket->iclr, bucket->imap,
-                    pil, inofixup, iclr, imap);
-        prom_halt();
 }
-unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap)
+#ifdef CONFIG_SMP
+static int irq_choose_cpu(unsigned int virt_irq)
 {
-        struct ino_bucket *bucket;
+        cpumask_t mask = irq_affinity[virt_irq];
-        int ino;
+        int cpuid;
-        if (pil == 0) {
+        if (cpus_equal(mask, CPU_MASK_ALL)) {
-                if (iclr != 0UL || imap != 0UL) {
+                static int irq_rover;
-                        prom_printf("Invalid dummy bucket for PIL0 (%lx:%lx)\n",
+                static DEFINE_SPINLOCK(irq_rover_lock);
-                                    iclr, imap);
+                unsigned long flags;
-                        prom_halt();
-                }
-                return __irq(&pil0_dummy_bucket);
-        }
-        BUG_ON(tlb_type == hypervisor);
+                /* Round-robin distribution... */
+        do_round_robin:
+                spin_lock_irqsave(&irq_rover_lock, flags);
-        /* RULE: Both must be specified in all other cases. */
+                while (!cpu_online(irq_rover)) {
-        if (iclr == 0UL || imap == 0UL) {
+                        if (++irq_rover >= NR_CPUS)
-                prom_printf("Invalid build_irq %d %d %016lx %016lx\n",
+                                irq_rover = 0;
-                            pil, inofixup, iclr, imap);
+                }
-                prom_halt();
+                cpuid = irq_rover;
-        }
+                do {
-        
+                        if (++irq_rover >= NR_CPUS)
-        ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
+                                irq_rover = 0;
-        if (ino > NUM_IVECS) {
+                } while (!cpu_online(irq_rover));
-                prom_printf("Invalid INO %04x (%d:%d:%016lx:%016lx)\n",
-                            ino, pil, inofixup, iclr, imap);
-                prom_halt();
-        }
-        bucket = &ivector_table[ino];
+                spin_unlock_irqrestore(&irq_rover_lock, flags);
-        if (bucket->flags & IBF_ACTIVE)
+        } else {
-                build_irq_error("IRQ: Trying to build active INO bucket.\n",
+                cpumask_t tmp;
-                                ino, pil, inofixup, iclr, imap, bucket);
-        if (bucket->irq_info) {
+                cpus_and(tmp, cpu_online_map, mask);
-                if (bucket->imap != imap || bucket->iclr != iclr)
-                        build_irq_error("IRQ: Trying to reinit INO bucket.\n",
-                                        ino, pil, inofixup, iclr, imap, bucket);
-                goto out;
+                if (cpus_empty(tmp))
-        }
+                        goto do_round_robin;
-        bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC);
+                cpuid = first_cpu(tmp);
-        if (!bucket->irq_info) {
-                prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n");
-                prom_halt();
        }
-        /* Ok, looks good, set it up.  Don't touch the irq_chain or
+        return cpuid;
-         * the pending flag.
-         */
-        bucket->imap  = imap;
-        bucket->iclr  = iclr;
-        bucket->pil   = pil;
-        bucket->flags = 0;
-out:
-        return __irq(bucket);
 }
+#else
-unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, int pil, unsigned char flags)
+static int irq_choose_cpu(unsigned int virt_irq)
 {
-        struct ino_bucket *bucket;
+        return real_hard_smp_processor_id();
-        unsigned long sysino;
+}
+#endif
-        sysino = sun4v_devino_to_sysino(devhandle, devino);
+static void sun4u_irq_enable(unsigned int virt_irq)
+{
+        irq_desc_t *desc = irq_desc + virt_irq;
+        struct irq_handler_data *data = desc->handler_data;
-        bucket = &ivector_table[sysino];
+        if (likely(data)) {
+                unsigned long cpuid, imap;
+                unsigned int tid;
-        /* Catch accidental accesses to these things.  IMAP/ICLR handling
+                cpuid = irq_choose_cpu(virt_irq);
-         * is done by hypervisor calls on sun4v platforms, not by direct
+                imap = data->imap;
-         * register accesses.
-         *
-         * But we need to make them look unique for the disable_irq() logic
-         * in free_irq().
-         */
-        bucket->imap = ~0UL - sysino;
-        bucket->iclr = ~0UL - sysino;
-        bucket->pil = pil;
+                tid = sun4u_compute_tid(imap, cpuid);
-        bucket->flags = flags;
-        bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC);
+                upa_writel(tid | IMAP_VALID, imap);
-        if (!bucket->irq_info) {
-                prom_printf("IRQ: Error, kmalloc(irq_desc) failed.\n");
-                prom_halt();
        }
-        return __irq(bucket);
 }
-static void atomic_bucket_insert(struct ino_bucket *bucket)
+static void sun4u_irq_disable(unsigned int virt_irq)
 {
-        unsigned long pstate;
+        irq_desc_t *desc = irq_desc + virt_irq;
-        unsigned int *ent;
+        struct irq_handler_data *data = desc->handler_data;
-        __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
+        if (likely(data)) {
-        __asm__ __volatile__("wrpr %0, %1, %%pstate"
+                unsigned long imap = data->imap;
-                             : : "r" (pstate), "i" (PSTATE_IE));
+                u32 tmp = upa_readl(imap);
-        ent = irq_work(smp_processor_id(), bucket->pil);
-        bucket->irq_chain = *ent;
-        *ent = __irq(bucket);
-        __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
-}
-static int check_irq_sharing(int pil, unsigned long irqflags)
+                tmp &= ~IMAP_VALID;
-{
+                upa_writel(tmp, imap);
-        struct irqaction *action, *tmp;
-        action = *(irq_action + pil);
-        if (action) {
-                if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) {
-                        for (tmp = action; tmp->next; tmp = tmp->next)
-                                ;
-                } else {
-                        return -EBUSY;
-                }
        }
-        return 0;
 }
-static void append_irq_action(int pil, struct irqaction *action)
+static void sun4u_irq_end(unsigned int virt_irq)
 {
-        struct irqaction **pp = irq_action + pil;
+        irq_desc_t *desc = irq_desc + virt_irq;
+        struct irq_handler_data *data = desc->handler_data;
-        while (*pp)
+        if (likely(data))
-                pp = &((*pp)->next);
+                upa_writel(ICLR_IDLE, data->iclr);
-        *pp = action;
 }
-static struct irqaction *get_action_slot(struct ino_bucket *bucket)
+static void sun4v_irq_enable(unsigned int virt_irq)
 {
-        struct irq_desc *desc = bucket->irq_info;
+        struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
-        int max_irq, i;
+        unsigned int ino = bucket - &ivector_table[0];
-        max_irq = 1;
+        if (likely(bucket)) {
-        if (bucket->flags & IBF_PCI)
+                unsigned long cpuid;
-                max_irq = MAX_IRQ_DESC_ACTION;
+                int err;
-        for (i = 0; i < max_irq; i++) {
-                struct irqaction *p = &desc->action[i];
-                u32 mask = (1 << i);
-                if (desc->action_active_mask & mask)
+                cpuid = irq_choose_cpu(virt_irq);
-                        continue;
-                desc->action_active_mask |= mask;
+                err = sun4v_intr_settarget(ino, cpuid);
-                return p;
+                if (err != HV_EOK)
+                        printk("sun4v_intr_settarget(%x,%lu): err(%d)\n",
+                               ino, cpuid, err);
+                err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
+                if (err != HV_EOK)
+                        printk("sun4v_intr_setenabled(%x): err(%d)\n",
+                               ino, err);
        }
-        return NULL;
 }
-int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *),
+static void sun4v_irq_disable(unsigned int virt_irq)
-                unsigned long irqflags, const char *name, void *dev_id)
 {
-        struct irqaction *action;
+        struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
-        struct ino_bucket *bucket = __bucket(irq);
+        unsigned int ino = bucket - &ivector_table[0];
-        unsigned long flags;
-        int pending = 0;
-        if (unlikely(!handler))
-                return -EINVAL;
-        if (unlikely(!bucket->irq_info))
-                return -ENODEV;
-        if ((bucket != &pil0_dummy_bucket) && (irqflags & SA_SAMPLE_RANDOM)) {
-                /*
-                 * This function might sleep, we want to call it first,
-                 * outside of the atomic block. In SA_STATIC_ALLOC case,
-                 * random driver's kmalloc will fail, but it is safe.
-                 * If already initialized, random driver will not reinit.
-                 * Yes, this might clear the entropy pool if the wrong
-                 * driver is attempted to be loaded, without actually
-                 * installing a new handler, but is this really a problem,
-                 * only the sysadmin is able to do this.
-                 */
-                rand_initialize_irq(irq);
-        }
-        spin_lock_irqsave(&irq_action_lock, flags);
-        if (check_irq_sharing(bucket->pil, irqflags)) {
-                spin_unlock_irqrestore(&irq_action_lock, flags);
-                return -EBUSY;
-        }
-        action = get_action_slot(bucket);
+        if (likely(bucket)) {
-        if (!action) { 
+                int err;
-                spin_unlock_irqrestore(&irq_action_lock, flags);
-                return -ENOMEM;
-        }
-        bucket->flags |= IBF_ACTIVE;
+                err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
-        pending = 0;
+                if (err != HV_EOK)
-        if (bucket != &pil0_dummy_bucket) {
+                        printk("sun4v_intr_setenabled(%x): "
-                pending = bucket->pending;
+                               "err(%d)\n", ino, err);
-                if (pending)
-                        bucket->pending = 0;
        }
+}
-        action->handler = handler;
+static void sun4v_irq_end(unsigned int virt_irq)
-        action->flags = irqflags;
+{
-        action->name = name;
+        struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
-        action->next = NULL;
+        unsigned int ino = bucket - &ivector_table[0];
-        action->dev_id = dev_id;
-        put_ino_in_irqaction(action, irq);
-        put_smpaff_in_irqaction(action, CPU_MASK_NONE);
-        append_irq_action(bucket->pil, action);
-        enable_irq(irq);
+        if (likely(bucket)) {
+                int err;
-        /* We ate the IVEC already, this makes sure it does not get lost. */
+                err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
-        if (pending) {
+                if (err != HV_EOK)
-                atomic_bucket_insert(bucket);
+                        printk("sun4v_intr_setstate(%x): "
-                set_softint(1 << bucket->pil);
+                               "err(%d)\n", ino, err);
        }
+}
-        spin_unlock_irqrestore(&irq_action_lock, flags);
+static void run_pre_handler(unsigned int virt_irq)
+{
-        if (bucket != &pil0_dummy_bucket)
+        struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
-                register_irq_proc(__irq_ino(irq));
+        irq_desc_t *desc = irq_desc + virt_irq;
+        struct irq_handler_data *data = desc->handler_data;
-#ifdef CONFIG_SMP
+        if (likely(data->pre_handler)) {
-        distribute_irqs();
+                data->pre_handler(__irq_ino(__irq(bucket)),
-#endif
+                                  data->pre_handler_arg1,
-        return 0;
+                                  data->pre_handler_arg2);
+        }
 }
-EXPORT_SYMBOL(request_irq);
+static struct hw_interrupt_type sun4u_irq = {
+        .typename       = "sun4u",
+        .enable         = sun4u_irq_enable,
+        .disable        = sun4u_irq_disable,
+        .end            = sun4u_irq_end,
+};
-static struct irqaction *unlink_irq_action(unsigned int irq, void *dev_id)
+static struct hw_interrupt_type sun4u_irq_ack = {
-{
+        .typename       = "sun4u+ack",
-        struct ino_bucket *bucket = __bucket(irq);
+        .enable         = sun4u_irq_enable,
-        struct irqaction *action, **pp;
+        .disable        = sun4u_irq_disable,
+        .ack            = run_pre_handler,
+        .end            = sun4u_irq_end,
+};
-        pp = irq_action + bucket->pil;
+static struct hw_interrupt_type sun4v_irq = {
-        action = *pp;
+        .typename       = "sun4v",
-        if (unlikely(!action))
+        .enable         = sun4v_irq_enable,
-                return NULL;
+        .disable        = sun4v_irq_disable,
+        .end            = sun4v_irq_end,
+};
-        if (unlikely(!action->handler)) {
+static struct hw_interrupt_type sun4v_irq_ack = {
-                printk("Freeing free IRQ %d\n", bucket->pil);
+        .typename       = "sun4v+ack",
-                return NULL;
+        .enable         = sun4v_irq_enable,
-        }
+        .disable        = sun4v_irq_disable,
+        .ack            = run_pre_handler,
+        .end            = sun4v_irq_end,
+};
-        while (action && action->dev_id != dev_id) {
+void irq_install_pre_handler(int virt_irq,
-                pp = &action->next;
+                             void (*func)(unsigned int, void *, void *),
-                action = *pp;
+                             void *arg1, void *arg2)
-        }
+{
+        irq_desc_t *desc = irq_desc + virt_irq;
+        struct irq_handler_data *data = desc->handler_data;
-        if (likely(action))
+        data->pre_handler = func;
-                *pp = action->next;
+        data->pre_handler_arg1 = arg1;
+        data->pre_handler_arg2 = arg2;
-        return action;
+        desc->handler = (desc->handler == &sun4u_irq ?
+                         &sun4u_irq_ack : &sun4v_irq_ack);
 }
-void free_irq(unsigned int irq, void *dev_id)
+unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 {
-        struct irqaction *action;
        struct ino_bucket *bucket;
-        unsigned long flags;
+        struct irq_handler_data *data;
+        irq_desc_t *desc;
+        int ino;
-        spin_lock_irqsave(&irq_action_lock, flags);
+        BUG_ON(tlb_type == hypervisor);
-        action = unlink_irq_action(irq, dev_id);
+        ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
+        bucket = &ivector_table[ino];
+        if (!bucket->virt_irq) {
+                bucket->virt_irq = virt_irq_alloc(__irq(bucket));
+                irq_desc[bucket->virt_irq].handler = &sun4u_irq;
+        }
-        spin_unlock_irqrestore(&irq_action_lock, flags);
+        desc = irq_desc + bucket->virt_irq;
+        if (unlikely(desc->handler_data))
+                goto out;
-        if (unlikely(!action))
+        data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
-                return;
+        if (unlikely(!data)) {
+                prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
+                prom_halt();
+        }
+        desc->handler_data = data;
-        synchronize_irq(irq);
+        data->imap  = imap;
+        data->iclr  = iclr;
-        spin_lock_irqsave(&irq_action_lock, flags);
+out:
+        return bucket->virt_irq;
+}
-        bucket = __bucket(irq);
+unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
-        if (bucket != &pil0_dummy_bucket) {
+{
-                struct irq_desc *desc = bucket->irq_info;
+        struct ino_bucket *bucket;
-                int ent, i;
+        struct irq_handler_data *data;
+        unsigned long sysino;
+        irq_desc_t *desc;
-                for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
+        BUG_ON(tlb_type != hypervisor);
-                        struct irqaction *p = &desc->action[i];
-                        if (p == action) {
+        sysino = sun4v_devino_to_sysino(devhandle, devino);
-                                desc->action_active_mask &= ~(1 << i);
+        bucket = &ivector_table[sysino];
-                                break;
+        if (!bucket->virt_irq) {
-                        }
+                bucket->virt_irq = virt_irq_alloc(__irq(bucket));
-                }
+                irq_desc[bucket->virt_irq].handler = &sun4v_irq;
+        }
-                if (!desc->action_active_mask) {
+        desc = irq_desc + bucket->virt_irq;
-                        unsigned long imap = bucket->imap;
+        if (unlikely(desc->handler_data))
+                goto out;
-                        /* This unique interrupt source is now inactive. */
-                        bucket->flags &= ~IBF_ACTIVE;
-                        /* See if any other buckets share this bucket's IMAP
-                         * and are still active.
-                         */
-                        for (ent = 0; ent < NUM_IVECS; ent++) {
-                                struct ino_bucket *bp = &ivector_table[ent];
-                                if (bp != bucket        &&
-                                    bp->imap == imap    &&
-                                    (bp->flags & IBF_ACTIVE) != 0)
-                                        break;
-                        }
-                        /* Only disable when no other sub-irq levels of
+        data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
-                         * the same IMAP are active.
+        if (unlikely(!data)) {
-                         */
+                prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
-                        if (ent == NUM_IVECS)
+                prom_halt();
-                                disable_irq(irq);
-                }
        }
+        desc->handler_data = data;
-        spin_unlock_irqrestore(&irq_action_lock, flags);
+        /* Catch accidental accesses to these things.  IMAP/ICLR handling
-}
+         * is done by hypervisor calls on sun4v platforms, not by direct
+         * register accesses.
+         */
+        data->imap = ~0UL;
+        data->iclr = ~0UL;
-EXPORT_SYMBOL(free_irq);
+out:
+        return bucket->virt_irq;
+}
-#ifdef CONFIG_SMP
+void hw_resend_irq(struct hw_interrupt_type *handler, unsigned int virt_irq)
-void synchronize_irq(unsigned int irq)
 {
-        struct ino_bucket *bucket = __bucket(irq);
+        struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
+        unsigned long pstate;
-#if 0
+        unsigned int *ent;
-        /* The following is how I wish I could implement this.
-         * Unfortunately the ICLR registers are read-only, you can
+        __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
-         * only write ICLR_foo values to them.  To get the current
+        __asm__ __volatile__("wrpr %0, %1, %%pstate"
-         * IRQ status you would need to get at the IRQ diag registers
+                             : : "r" (pstate), "i" (PSTATE_IE));
-         * in the PCI/SBUS controller and the layout of those vary
+        ent = irq_work(smp_processor_id());
-         * from one controller to the next, sigh... -DaveM
+        bucket->irq_chain = *ent;
-         */
+        *ent = __irq(bucket);
-        unsigned long iclr = bucket->iclr;
+        set_softint(1 << PIL_DEVICE_IRQ);
+        __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
-        while (1) {
-                u32 tmp = upa_readl(iclr);
-                
-                if (tmp == ICLR_TRANSMIT ||
-                    tmp == ICLR_PENDING) {
-                        cpu_relax();
-                        continue;
-                }
-                break;
-        }
-#else
-        /* So we have to do this with a INPROGRESS bit just like x86.  */
-        while (bucket->flags & IBF_INPROGRESS)
-                cpu_relax();
-#endif
 }
-#endif /* CONFIG_SMP */
-static void process_bucket(int irq, struct ino_bucket *bp, struct pt_regs *regs)
+void ack_bad_irq(unsigned int virt_irq)
 {
-        struct irq_desc *desc = bp->irq_info;
+        struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
-        unsigned char flags = bp->flags;
+        unsigned int ino = 0xdeadbeef;
-        u32 action_mask, i;
-        int random;
-        bp->flags |= IBF_INPROGRESS;
+        if (bucket)
+                ino = bucket - &ivector_table[0];
-        if (unlikely(!(flags & IBF_ACTIVE))) {
+        printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
-                bp->pending = 1;
+               ino, virt_irq);
-                goto out;
+}
-        }
-        if (desc->pre_handler)
-                desc->pre_handler(bp,
-                                  desc->pre_handler_arg1,
-                                  desc->pre_handler_arg2);
-        action_mask = desc->action_active_mask;
+#ifndef CONFIG_SMP
-        random = 0;
+extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
-        for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
-                struct irqaction *p = &desc->action[i];
-                u32 mask = (1 << i);
-                if (!(action_mask & mask))
+void timer_irq(int irq, struct pt_regs *regs)
-                        continue;
+{
+        unsigned long clr_mask = 1 << irq;
+        unsigned long tick_mask = tick_ops->softint_mask;
-                action_mask &= ~mask;
+        if (get_softint() & tick_mask) {
+                irq = 0;
+                clr_mask = tick_mask;
+        }
+        clear_softint(clr_mask);
-                if (p->handler(__irq(bp), p->dev_id, regs) == IRQ_HANDLED)
+        irq_enter();
-                        random |= p->flags;
-                if (!action_mask)
+        kstat_this_cpu.irqs[0]++;
-                        break;
+        timer_interrupt(irq, NULL, regs);
-        }
-        if (bp->pil != 0) {
-                if (tlb_type == hypervisor) {
-                        unsigned int ino = __irq_ino(bp);
-                        int err;
-                        err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
-                        if (err != HV_EOK)
-                                printk("sun4v_intr_setstate(%x): "
-                                       "err(%d)\n", ino, err);
-                } else {
-                        upa_writel(ICLR_IDLE, bp->iclr);
-                }
-                /* Test and add entropy */
+        irq_exit();
-                if (random & SA_SAMPLE_RANDOM)
-                        add_interrupt_randomness(irq);
-        }
-out:
-        bp->flags &= ~IBF_INPROGRESS;
 }
+#endif
 void handler_irq(int irq, struct pt_regs *regs)
 {
-        struct ino_bucket *bp;
+        struct ino_bucket *bucket;
-        int cpu = smp_processor_id();
-#ifndef CONFIG_SMP
-        /*
-         * Check for TICK_INT on level 14 softint.
-         */
-        {
-                unsigned long clr_mask = 1 << irq;
-                unsigned long tick_mask = tick_ops->softint_mask;
-                if ((irq == 14) && (get_softint() & tick_mask)) {
-                        irq = 0;
-                        clr_mask = tick_mask;
-                }
-                clear_softint(clr_mask);
-        }
-#else
        clear_softint(1 << irq);
-#endif
        irq_enter();
-        kstat_this_cpu.irqs[irq]++;
        /* Sliiiick... */
-#ifndef CONFIG_SMP
+        bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0));
-        bp = ((irq != 0) ?
+        while (bucket) {
-              __bucket(xchg32(irq_work(cpu, irq), 0)) :
+                struct ino_bucket *next = __bucket(bucket->irq_chain);
-              &pil0_dummy_bucket);
-#else
-        bp = __bucket(xchg32(irq_work(cpu, irq), 0));
-#endif
-        while (bp) {
-                struct ino_bucket *nbp = __bucket(bp->irq_chain);
-                bp->irq_chain = 0;
+                bucket->irq_chain = 0;
-                process_bucket(irq, bp, regs);
+                __do_IRQ(bucket->virt_irq, regs);
-                bp = nbp;
+                bucket = next;
        }
        irq_exit();
 }
@@ -787,81 +623,6 @@ main_interrupt:
 EXPORT_SYMBOL(sparc_floppy_irq);
 #endif
-/* We really don't need these at all on the Sparc.  We only have
- * stubs here because they are exported to modules.
- */
-unsigned long probe_irq_on(void)
-{
-        return 0;
-}
-EXPORT_SYMBOL(probe_irq_on);
-int probe_irq_off(unsigned long mask)
-{
-        return 0;
-}
-EXPORT_SYMBOL(probe_irq_off);
-#ifdef CONFIG_SMP
-static int retarget_one_irq(struct irqaction *p, int goal_cpu)
-{
-        struct ino_bucket *bucket = get_ino_in_irqaction(p) + ivector_table;
-        while (!cpu_online(goal_cpu)) {
-                if (++goal_cpu >= NR_CPUS)
-                        goal_cpu = 0;
-        }
-        if (tlb_type == hypervisor) {
-                unsigned int ino = __irq_ino(bucket);
-                sun4v_intr_settarget(ino, goal_cpu);
-                sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
-        } else {
-                unsigned long imap = bucket->imap;
-                unsigned int tid = sun4u_compute_tid(imap, goal_cpu);
-                upa_writel(tid | IMAP_VALID, imap);
-        }
-        do {
-                if (++goal_cpu >= NR_CPUS)
-                        goal_cpu = 0;
-        } while (!cpu_online(goal_cpu));
-        return goal_cpu;
-}
-/* Called from request_irq. */
-static void distribute_irqs(void)
-{
-        unsigned long flags;
-        int cpu, level;
-        spin_lock_irqsave(&irq_action_lock, flags);
-        cpu = 0;
-        /*
-         * Skip the timer at [0], and very rare error/power intrs at [15].
-         * Also level [12], it causes problems on Ex000 systems.
-         */
-        for (level = 1; level < NR_IRQS; level++) {
-                struct irqaction *p = irq_action[level];
-                if (level == 12)
-                        continue;
-                while(p) {
-                        cpu = retarget_one_irq(p, cpu);
-                        p = p->next;
-                }
-        }
-        spin_unlock_irqrestore(&irq_action_lock, flags);
-}
-#endif
 struct sun5_timer {
        u64     count0;
        u64     limit0;
@@ -929,7 +690,7 @@ void init_irqwork_curcpu(void)
 {
        int cpu = hard_smp_processor_id();
-        memset(__irq_work + cpu, 0, sizeof(struct irq_work_struct));
+        trap_block[cpu].irq_worklist = 0;
 }
 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type)
@@ -1037,6 +798,10 @@ void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int
        }
 }
+static struct irqaction timer_irq_action = {
+        .name = "timer",
+};
 /* Only invoked on boot processor. */
 void __init init_IRQ(void)
 {
@@ -1064,109 +829,6 @@ void __init init_IRQ(void)
                             : /* No outputs */
                             : "i" (PSTATE_IE)
                             : "g1");
-}
-static struct proc_dir_entry * root_irq_dir;
+        irq_desc[0].action = &timer_irq_action;
-static struct proc_dir_entry * irq_dir [NUM_IVECS];
-#ifdef CONFIG_SMP
-static int irq_affinity_read_proc (char *page, char **start, off_t off,
-                        int count, int *eof, void *data)
-{
-        struct ino_bucket *bp = ivector_table + (long)data;
-        struct irq_desc *desc = bp->irq_info;
-        struct irqaction *ap = desc->action;
-        cpumask_t mask;
-        int len;
-        mask = get_smpaff_in_irqaction(ap);
-        if (cpus_empty(mask))
-                mask = cpu_online_map;
-        len = cpumask_scnprintf(page, count, mask);
-        if (count - len < 2)
-                return -EINVAL;
-        len += sprintf(page + len, "\n");
-        return len;
-}
-static inline void set_intr_affinity(int irq, cpumask_t hw_aff)
-{
-        struct ino_bucket *bp = ivector_table + irq;
-        struct irq_desc *desc = bp->irq_info;
-        struct irqaction *ap = desc->action;
-        /* Users specify affinity in terms of hw cpu ids.
-         * As soon as we do this, handler_irq() might see and take action.
-         */
-        put_smpaff_in_irqaction(ap, hw_aff);
-        /* Migration is simply done by the next cpu to service this
-         * interrupt.
-         */
-}
-static int irq_affinity_write_proc (struct file *file, const char __user *buffer,
-                                        unsigned long count, void *data)
-{
-        int irq = (long) data, full_count = count, err;
-        cpumask_t new_value;
-        err = cpumask_parse(buffer, count, new_value);
-        /*
-         * Do not allow disabling IRQs completely - it's a too easy
-         * way to make the system unusable accidentally :-) At least
-         * one online CPU still has to be targeted.
-         */
-        cpus_and(new_value, new_value, cpu_online_map);
-        if (cpus_empty(new_value))
-                return -EINVAL;
-        set_intr_affinity(irq, new_value);
-        return full_count;
 }
-#endif
-#define MAX_NAMELEN 10
-static void register_irq_proc (unsigned int irq)
-{
-        char name [MAX_NAMELEN];
-        if (!root_irq_dir || irq_dir[irq])
-                return;
-        memset(name, 0, MAX_NAMELEN);
-        sprintf(name, "%x", irq);
-        /* create /proc/irq/1234 */
-        irq_dir[irq] = proc_mkdir(name, root_irq_dir);
-#ifdef CONFIG_SMP
-        /* XXX SMP affinity not supported on starfire yet. */
-        if (this_is_starfire == 0) {
-                struct proc_dir_entry *entry;
-                /* create /proc/irq/1234/smp_affinity */
-                entry = create_proc_entry("smp_affinity", 0600, irq_dir[irq]);
-                if (entry) {
-                        entry->nlink = 1;
-                        entry->data = (void *)(long)irq;
-                        entry->read_proc = irq_affinity_read_proc;
-                        entry->write_proc = irq_affinity_write_proc;
-                }
-        }
-#endif
-}
-void init_irq_proc (void)
-{
-        /* create /proc/irq */
-        root_irq_dir = proc_mkdir("irq", NULL);
-}
diff --git a/arch/sparc64/kernel/module.c b/arch/sparc64/kernel/module.c
index 6c83e372f75d..579871527699 100644
--- a/arch/sparc64/kernel/module.c
+++ b/arch/sparc64/kernel/module.c
@@ -143,6 +143,11 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
                        location[3] = v >>  0;
                        break;
+                case R_SPARC_DISP32:
+                        v -= (Elf64_Addr) location;
+                        *loc32 = v;
+                        break;
                case R_SPARC_WDISP30:
                        v -= (Elf64_Addr) location;
                        *loc32 = (*loc32 & ~0x3fffffff) |
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index f97ddeb105ac..9472580a4319 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -47,12 +47,6 @@ struct pci_controller_info *pci_controller_root = NULL;
 /* Each PCI controller found gets a unique index. */
 int pci_num_controllers = 0;
-/* At boot time the user can give the kernel a command
- * line option which controls if and how PCI devices
- * are reordered at PCI bus probing time.
- */
-int pci_device_reorder = 0;
 volatile int pci_poke_in_progress;
 volatile int pci_poke_cpu = -1;
 volatile int pci_poke_faulted;
@@ -316,27 +310,6 @@ static void __init pci_scan_each_controller_bus(void)
                p->scan_bus(p);
 }
-/* Reorder the pci_dev chain, so that onboard devices come first
- * and then come the pluggable cards.
- */
-static void __init pci_reorder_devs(void)
-{
-        struct list_head *pci_onboard = &pci_devices;
-        struct list_head *walk = pci_onboard->next;
-        while (walk != pci_onboard) {
-                struct pci_dev *pdev = pci_dev_g(walk);
-                struct list_head *walk_next = walk->next;
-                if (pdev->irq && (__irq_ino(pdev->irq) & 0x20)) {
-                        list_del(walk);
-                        list_add(walk, pci_onboard);
-                }
-                walk = walk_next;
-        }
-}
 extern void clock_probe(void);
 extern void power_init(void);
@@ -348,9 +321,6 @@ static int __init pcibios_init(void)
        pci_scan_each_controller_bus();
-        if (pci_device_reorder)
-                pci_reorder_devs();
        isa_init();
        ebus_init();
        clock_probe();
@@ -441,14 +411,6 @@ EXPORT_SYMBOL(pcibios_bus_to_resource);
 char * __init pcibios_setup(char *str)
 {
-        if (!strcmp(str, "onboardfirst")) {
-                pci_device_reorder = 1;
-                return NULL;
-        }
-        if (!strcmp(str, "noreorder")) {
-                pci_device_reorder = 0;
-                return NULL;
-        }
        return str;
 }
diff --git a/arch/sparc64/kernel/pci_iommu.c b/arch/sparc64/kernel/pci_iommu.c
index 8efbc139769d..82e5455134c6 100644
--- a/arch/sparc64/kernel/pci_iommu.c
+++ b/arch/sparc64/kernel/pci_iommu.c
@@ -218,7 +218,7 @@ static inline void iommu_free_ctx(struct pci_iommu *iommu, int ctx)
 * DMA for PCI device PDEV.  Return non-NULL cpu-side address if
 * successful and set *DMA_ADDRP to the PCI side dma address.
 */
-static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp)
+static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp)
 {
        struct pcidev_cookie *pcp;
        struct pci_iommu *iommu;
@@ -232,7 +232,7 @@ static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
        if (order >= 10)
                return NULL;
-        first_page = __get_free_pages(GFP_ATOMIC, order);
+        first_page = __get_free_pages(gfp, order);
        if (first_page == 0UL)
                return NULL;
        memset((char *)first_page, 0, PAGE_SIZE << order);
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index d17878b145c2..24db22aa9728 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -276,82 +276,13 @@ static unsigned long __onboard_imap_off[] = {
        ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
                        (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
-/* PCI PSYCHO INO number to Sparc PIL level. */
-static unsigned char psycho_pil_table[] = {
-/*0x00*/0, 0, 0, 0,     /* PCI A slot 0  Int A, B, C, D */
-/*0x04*/0, 0, 0, 0,     /* PCI A slot 1  Int A, B, C, D */
-/*0x08*/0, 0, 0, 0,     /* PCI A slot 2  Int A, B, C, D */
-/*0x0c*/0, 0, 0, 0,     /* PCI A slot 3  Int A, B, C, D */
-/*0x10*/0, 0, 0, 0,     /* PCI B slot 0  Int A, B, C, D */
-/*0x14*/0, 0, 0, 0,     /* PCI B slot 1  Int A, B, C, D */
-/*0x18*/0, 0, 0, 0,     /* PCI B slot 2  Int A, B, C, D */
-/*0x1c*/0, 0, 0, 0,     /* PCI B slot 3  Int A, B, C, D */
-/*0x20*/5,              /* SCSI                         */
-/*0x21*/5,              /* Ethernet                     */
-/*0x22*/8,              /* Parallel Port                */
-/*0x23*/13,             /* Audio Record                 */
-/*0x24*/14,             /* Audio Playback               */
-/*0x25*/15,             /* PowerFail                    */
-/*0x26*/5,              /* second SCSI                  */
-/*0x27*/11,             /* Floppy                       */
-/*0x28*/5,              /* Spare Hardware               */
-/*0x29*/9,              /* Keyboard                     */
-/*0x2a*/5,              /* Mouse                        */
-/*0x2b*/12,             /* Serial                       */
-/*0x2c*/10,             /* Timer 0                      */
-/*0x2d*/11,             /* Timer 1                      */
-/*0x2e*/15,             /* Uncorrectable ECC            */
-/*0x2f*/15,             /* Correctable ECC              */
-/*0x30*/15,             /* PCI Bus A Error              */
-/*0x31*/15,             /* PCI Bus B Error              */
-/*0x32*/15,             /* Power Management             */
-};
-static int psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
-{
-        int ret;
-        ret = psycho_pil_table[ino];
-        if (ret == 0 && pdev == NULL) {
-                ret = 5;
-        } else if (ret == 0) {
-                switch ((pdev->class >> 16) & 0xff) {
-                case PCI_BASE_CLASS_STORAGE:
-                        ret = 5;
-                        break;
-                case PCI_BASE_CLASS_NETWORK:
-                        ret = 6;
-                        break;
-                case PCI_BASE_CLASS_DISPLAY:
-                        ret = 9;
-                        break;
-                case PCI_BASE_CLASS_MULTIMEDIA:
-                case PCI_BASE_CLASS_MEMORY:
-                case PCI_BASE_CLASS_BRIDGE:
-                case PCI_BASE_CLASS_SERIAL:
-                        ret = 10;
-                        break;
-                default:
-                        ret = 5;
-                        break;
-                };
-        }
-        return ret;
-}
 static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
                                     struct pci_dev *pdev,
                                     unsigned int ino)
 {
-        struct ino_bucket *bucket;
        unsigned long imap, iclr;
        unsigned long imap_off, iclr_off;
-        int pil, inofixup = 0;
+        int inofixup = 0;
        ino &= PCI_IRQ_INO;
        if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
@@ -367,11 +298,6 @@ static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
        }
        /* Now build the IRQ bucket. */
-        pil = psycho_ino_to_pil(pdev, ino);
-        if (PIL_RESERVED(pil))
-                BUG();
        imap = pbm->controller_regs + imap_off;
        imap += 4;
@@ -382,10 +308,7 @@ static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
        if ((ino & 0x20) == 0)
                inofixup = ino & 0x03;
-        bucket = __bucket(build_irq(pil, inofixup, iclr, imap));
+        return build_irq(inofixup, iclr, imap);
-        bucket->flags |= IBF_PCI;
-        return __irq(bucket);
 }
 /* PSYCHO error handling support. */
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index f67bb7f078cf..b7d997b55f0a 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -523,78 +523,6 @@ static unsigned long __onboard_imap_off[] = {
        ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
                        (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
-/* PCI SABRE INO number to Sparc PIL level. */
-static unsigned char sabre_pil_table[] = {
-/*0x00*/0, 0, 0, 0,     /* PCI A slot 0  Int A, B, C, D */
-/*0x04*/0, 0, 0, 0,     /* PCI A slot 1  Int A, B, C, D */
-/*0x08*/0, 0, 0, 0,     /* PCI A slot 2  Int A, B, C, D */
-/*0x0c*/0, 0, 0, 0,     /* PCI A slot 3  Int A, B, C, D */
-/*0x10*/0, 0, 0, 0,     /* PCI B slot 0  Int A, B, C, D */
-/*0x14*/0, 0, 0, 0,     /* PCI B slot 1  Int A, B, C, D */
-/*0x18*/0, 0, 0, 0,     /* PCI B slot 2  Int A, B, C, D */
-/*0x1c*/0, 0, 0, 0,     /* PCI B slot 3  Int A, B, C, D */
-/*0x20*/5,              /* SCSI                         */
-/*0x21*/5,              /* Ethernet                     */
-/*0x22*/8,              /* Parallel Port                */
-/*0x23*/13,             /* Audio Record                 */
-/*0x24*/14,             /* Audio Playback               */
-/*0x25*/15,             /* PowerFail                    */
-/*0x26*/5,              /* second SCSI                  */
-/*0x27*/11,             /* Floppy                       */
-/*0x28*/5,              /* Spare Hardware               */
-/*0x29*/9,              /* Keyboard                     */
-/*0x2a*/5,              /* Mouse                        */
-/*0x2b*/12,             /* Serial                       */
-/*0x2c*/10,             /* Timer 0                      */
-/*0x2d*/11,             /* Timer 1                      */
-/*0x2e*/15,             /* Uncorrectable ECC            */
-/*0x2f*/15,             /* Correctable ECC              */
-/*0x30*/15,             /* PCI Bus A Error              */
-/*0x31*/15,             /* PCI Bus B Error              */
-/*0x32*/15,             /* Power Management             */
-};
-static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
-{
-        int ret;
-        if (pdev &&
-            pdev->vendor == PCI_VENDOR_ID_SUN &&
-            pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
-                return 9;
-        ret = sabre_pil_table[ino];
-        if (ret == 0 && pdev == NULL) {
-                ret = 5;
-        } else if (ret == 0) {
-                switch ((pdev->class >> 16) & 0xff) {
-                case PCI_BASE_CLASS_STORAGE:
-                        ret = 5;
-                        break;
-                case PCI_BASE_CLASS_NETWORK:
-                        ret = 6;
-                        break;
-                case PCI_BASE_CLASS_DISPLAY:
-                        ret = 9;
-                        break;
-                case PCI_BASE_CLASS_MULTIMEDIA:
-                case PCI_BASE_CLASS_MEMORY:
-                case PCI_BASE_CLASS_BRIDGE:
-                case PCI_BASE_CLASS_SERIAL:
-                        ret = 10;
-                        break;
-                default:
-                        ret = 5;
-                        break;
-                };
-        }
-        return ret;
-}
 /* When a device lives behind a bridge deeper in the PCI bus topology
 * than APB, a special sequence must run to make sure all pending DMA
 * transfers at the time of IRQ delivery are visible in the coherency
@@ -602,7 +530,7 @@ static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
 * side of the non-APB bridge, then perform a read of Sabre's DMA
 * write-sync register.
 */
-static void sabre_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_arg2)
+static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 {
        struct pci_dev *pdev = _arg1;
        unsigned long sync_reg = (unsigned long) _arg2;
@@ -616,10 +544,10 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
                                    struct pci_dev *pdev,
                                    unsigned int ino)
 {
-        struct ino_bucket *bucket;
        unsigned long imap, iclr;
        unsigned long imap_off, iclr_off;
-        int pil, inofixup = 0;
+        int inofixup = 0;
+        int virt_irq;
        ino &= PCI_IRQ_INO;
        if (ino < SABRE_ONBOARD_IRQ_BASE) {
@@ -635,11 +563,6 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
        }
        /* Now build the IRQ bucket. */
-        pil = sabre_ino_to_pil(pdev, ino);
-        if (PIL_RESERVED(pil))
-                BUG();
        imap = pbm->controller_regs + imap_off;
        imap += 4;
@@ -650,23 +573,23 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
        if ((ino & 0x20) == 0)
                inofixup = ino & 0x03;
-        bucket = __bucket(build_irq(pil, inofixup, iclr, imap));
+        virt_irq = build_irq(inofixup, iclr, imap);
-        bucket->flags |= IBF_PCI;
        if (pdev) {
                struct pcidev_cookie *pcp = pdev->sysdata;
                if (pdev->bus->number != pcp->pbm->pci_first_busno) {
                        struct pci_controller_info *p = pcp->pbm->parent;
-                        struct irq_desc *d = bucket->irq_info;
-                        d->pre_handler = sabre_wsync_handler;
+                        irq_install_pre_handler(virt_irq,
-                        d->pre_handler_arg1 = pdev;
+                                                sabre_wsync_handler,
-                        d->pre_handler_arg2 = (void *)
+                                                pdev,
-                                p->pbm_A.controller_regs + SABRE_WRSYNC;
+                                                (void *)
+                                                p->pbm_A.controller_regs +
+                                                SABRE_WRSYNC);
                }
        }
-        return __irq(bucket);
+        return virt_irq;
 }
 /* SABRE error handling support. */
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 7fe4de03ac2e..cc662e915d32 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -232,105 +232,10 @@ static unsigned long schizo_iclr_offset(unsigned long ino)
        return SCHIZO_ICLR_BASE + (ino * 8UL);
 }
-/* PCI SCHIZO INO number to Sparc PIL level.  This table only matters for
+static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
- * INOs which will not have an associated PCI device struct, ie. onboard
- * EBUS devices and PCI controller internal error interrupts.
- */
-static unsigned char schizo_pil_table[] = {
-/*0x00*/0, 0, 0, 0,     /* PCI slot 0  Int A, B, C, D   */
-/*0x04*/0, 0, 0, 0,     /* PCI slot 1  Int A, B, C, D   */
-/*0x08*/0, 0, 0, 0,     /* PCI slot 2  Int A, B, C, D   */
-/*0x0c*/0, 0, 0, 0,     /* PCI slot 3  Int A, B, C, D   */
-/*0x10*/0, 0, 0, 0,     /* PCI slot 4  Int A, B, C, D   */
-/*0x14*/0, 0, 0, 0,     /* PCI slot 5  Int A, B, C, D   */
-/*0x18*/5,              /* SCSI                         */
-/*0x19*/5,              /* second SCSI                  */
-/*0x1a*/0,              /* UNKNOWN                      */
-/*0x1b*/0,              /* UNKNOWN                      */
-/*0x1c*/8,              /* Parallel                     */
-/*0x1d*/5,              /* Ethernet                     */
-/*0x1e*/8,              /* Firewire-1394                */
-/*0x1f*/9,              /* USB                          */
-/*0x20*/13,             /* Audio Record                 */
-/*0x21*/14,             /* Audio Playback               */
-/*0x22*/12,             /* Serial                       */
-/*0x23*/5,              /* EBUS I2C                     */
-/*0x24*/10,             /* RTC Clock                    */
-/*0x25*/11,             /* Floppy                       */
-/*0x26*/0,              /* UNKNOWN                      */
-/*0x27*/0,              /* UNKNOWN                      */
-/*0x28*/0,              /* UNKNOWN                      */
-/*0x29*/0,              /* UNKNOWN                      */
-/*0x2a*/10,             /* UPA 1                        */
-/*0x2b*/10,             /* UPA 2                        */
-/*0x2c*/0,              /* UNKNOWN                      */
-/*0x2d*/0,              /* UNKNOWN                      */
-/*0x2e*/0,              /* UNKNOWN                      */
-/*0x2f*/0,              /* UNKNOWN                      */
-/*0x30*/15,             /* Uncorrectable ECC            */
-/*0x31*/15,             /* Correctable ECC              */
-/*0x32*/15,             /* PCI Bus A Error              */
-/*0x33*/15,             /* PCI Bus B Error              */
-/*0x34*/15,             /* Safari Bus Error             */
-/*0x35*/0,              /* Reserved                     */
-/*0x36*/0,              /* Reserved                     */
-/*0x37*/0,              /* Reserved                     */
-/*0x38*/0,              /* Reserved for NewLink         */
-/*0x39*/0,              /* Reserved for NewLink         */
-/*0x3a*/0,              /* Reserved for NewLink         */
-/*0x3b*/0,              /* Reserved for NewLink         */
-/*0x3c*/0,              /* Reserved for NewLink         */
-/*0x3d*/0,              /* Reserved for NewLink         */
-/*0x3e*/0,              /* Reserved for NewLink         */
-/*0x3f*/0,              /* Reserved for NewLink         */
-};
-static int schizo_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
-{
-        int ret;
-        if (pdev &&
-            pdev->vendor == PCI_VENDOR_ID_SUN &&
-            pdev->device == PCI_DEVICE_ID_SUN_RIO_USB)
-                return 9;
-        ret = schizo_pil_table[ino];
-        if (ret == 0 && pdev == NULL) {
-                ret = 5;
-        } else if (ret == 0) {
-                switch ((pdev->class >> 16) & 0xff) {
-                case PCI_BASE_CLASS_STORAGE:
-                        ret = 5;
-                        break;
-                case PCI_BASE_CLASS_NETWORK:
-                        ret = 6;
-                        break;
-                case PCI_BASE_CLASS_DISPLAY:
-                        ret = 9;
-                        break;
-                case PCI_BASE_CLASS_MULTIMEDIA:
-                case PCI_BASE_CLASS_MEMORY:
-                case PCI_BASE_CLASS_BRIDGE:
-                case PCI_BASE_CLASS_SERIAL:
-                        ret = 10;
-                        break;
-                default:
-                        ret = 5;
-                        break;
-                };
-        }
-        return ret;
-}
-static void tomatillo_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_arg2)
 {
        unsigned long sync_reg = (unsigned long) _arg2;
-        u64 mask = 1UL << (__irq_ino(__irq(bucket)) & IMAP_INO);
+        u64 mask = 1UL << (ino & IMAP_INO);
        u64 val;
        int limit;
@@ -365,30 +270,33 @@ static void tomatillo_wsync_handler(struct ino_bucket *bucket, void *_arg1, void
        }
 }
+static unsigned long schizo_ino_to_iclr(struct pci_pbm_info *pbm,
+                                        unsigned int ino)
+{
+        ino &= PCI_IRQ_INO;
+        return pbm->pbm_regs + schizo_iclr_offset(ino) + 4;
+}
+static unsigned long schizo_ino_to_imap(struct pci_pbm_info *pbm,
+                                        unsigned int ino)
+{
+        ino &= PCI_IRQ_INO;
+        return pbm->pbm_regs + schizo_imap_offset(ino) + 4;
+}
 static unsigned int schizo_irq_build(struct pci_pbm_info *pbm,
                                     struct pci_dev *pdev,
                                     unsigned int ino)
 {
-        struct ino_bucket *bucket;
        unsigned long imap, iclr;
-        unsigned long imap_off, iclr_off;
+        int ign_fixup;
-        int pil, ign_fixup;
+        int virt_irq;
        ino &= PCI_IRQ_INO;
-        imap_off = schizo_imap_offset(ino);
        /* Now build the IRQ bucket. */
-        pil = schizo_ino_to_pil(pdev, ino);
+        imap = schizo_ino_to_imap(pbm, ino);
+        iclr = schizo_ino_to_iclr(pbm, ino);
-        if (PIL_RESERVED(pil))
-                BUG();
-        imap = pbm->pbm_regs + imap_off;
-        imap += 4;
-        iclr_off = schizo_iclr_offset(ino);
-        iclr = pbm->pbm_regs + iclr_off;
-        iclr += 4;
        /* On Schizo, no inofixup occurs.  This is because each
         * INO has it's own IMAP register.  On Psycho and Sabre
@@ -405,19 +313,17 @@ static unsigned int schizo_irq_build(struct pci_pbm_info *pbm,
                        ign_fixup = (1 << 6);
        }
-        bucket = __bucket(build_irq(pil, ign_fixup, iclr, imap));
+        virt_irq = build_irq(ign_fixup, iclr, imap);
-        bucket->flags |= IBF_PCI;
        if (pdev && pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
-                struct irq_desc *p = bucket->irq_info;
+                irq_install_pre_handler(virt_irq,
+                                        tomatillo_wsync_handler,
-                p->pre_handler = tomatillo_wsync_handler;
+                                        ((pbm->chip_version <= 4) ?
-                p->pre_handler_arg1 = ((pbm->chip_version <= 4) ?
+                                         (void *) 1 : (void *) 0),
-                                       (void *) 1 : (void *) 0);
+                                        (void *) pbm->sync_reg);
-                p->pre_handler_arg2 = (void *) pbm->sync_reg;
        }
-        return __irq(bucket);
+        return virt_irq;
 }
 /* SCHIZO error handling support. */
@@ -458,7 +364,6 @@ struct pci_pbm_info *pbm_for_ino(struct pci_controller_info *p, u32 ino)
 static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq)
 {
        struct pci_pbm_info *pbm;
-        struct ino_bucket *bucket;
        unsigned long iclr;
        /* Do not clear the interrupt for the other PCI bus.
@@ -476,11 +381,11 @@ static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq)
        else
                pbm = &p->pbm_A;
-        irq = schizo_irq_build(pbm, NULL,
+        schizo_irq_build(pbm, NULL,
-                               (pbm->portid << 6) | (irq & IMAP_INO));
+                         (pbm->portid << 6) | (irq & IMAP_INO));
-        bucket = __bucket(irq);
-        iclr = bucket->iclr;
+        iclr = schizo_ino_to_iclr(pbm,
+                                  (pbm->portid << 6) | (irq & IMAP_INO));
        upa_writel(ICLR_IDLE, iclr);
 }
@@ -1225,7 +1130,6 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
 {
        struct pci_pbm_info *pbm;
        unsigned int irq;
-        struct ino_bucket *bucket;
        u64 tmp, err_mask, err_no_mask;
        /* Build IRQs and register handlers. */
@@ -1237,8 +1141,7 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
-        tmp = upa_readl(bucket->imap);
        upa_writel(tmp, (pbm->pbm_regs +
                         schizo_imap_offset(SCHIZO_UE_INO) + 4));
@@ -1250,8 +1153,7 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
-        tmp = upa_readl(bucket->imap);
        upa_writel(tmp, (pbm->pbm_regs +
                         schizo_imap_offset(SCHIZO_CE_INO) + 4));
@@ -1264,8 +1166,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
-        tmp = upa_readl(bucket->imap);
+                                                 SCHIZO_PCIERR_A_INO)));
        upa_writel(tmp, (pbm->pbm_regs +
                         schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
@@ -1278,8 +1180,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
-        tmp = upa_readl(bucket->imap);
+                                                 SCHIZO_PCIERR_B_INO)));
        upa_writel(tmp, (pbm->pbm_regs +
                         schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
@@ -1291,8 +1193,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
-        tmp = upa_readl(bucket->imap);
+                                                 SCHIZO_SERR_INO)));
        upa_writel(tmp, (pbm->pbm_regs +
                         schizo_imap_offset(SCHIZO_SERR_INO) + 4));
@@ -1363,7 +1265,6 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
 {
        struct pci_pbm_info *pbm;
        unsigned int irq;
-        struct ino_bucket *bucket;
        u64 tmp, err_mask, err_no_mask;
        /* Build IRQs and register handlers. */
@@ -1375,8 +1276,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
-        tmp = upa_readl(bucket->imap);
        upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
        pbm = pbm_for_ino(p, SCHIZO_CE_INO);
@@ -1387,8 +1287,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
-        tmp = upa_readl(bucket->imap);
        upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4));
        pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
@@ -1399,8 +1298,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO));
-        tmp = upa_readl(bucket->imap);
        upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
        pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
@@ -1411,8 +1309,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO));
-        tmp = upa_readl(bucket->imap);
        upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
        pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
@@ -1423,8 +1320,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
                            pbm->name);
                prom_halt();
        }
-        bucket = __bucket(irq);
+        tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_SERR_INO));
-        tmp = upa_readl(bucket->imap);
        upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4));
        /* Enable UE and CE interrupts for controller. */
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index 9e94db2573a2..5419480edf41 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -154,7 +154,7 @@ static void pci_arena_free(struct pci_iommu_arena *arena, unsigned long base, un
                __clear_bit(i, arena->map);
 }
-static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp)
+static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp)
 {
        struct pcidev_cookie *pcp;
        struct pci_iommu *iommu;
@@ -169,7 +169,7 @@ static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr
        npages = size >> IO_PAGE_SHIFT;
-        first_page = __get_free_pages(GFP_ATOMIC, order);
+        first_page = __get_free_pages(gfp, order);
        if (unlikely(first_page == 0UL))
                return NULL;
@@ -599,18 +599,128 @@ struct pci_iommu_ops pci_sun4v_iommu_ops = {
 /* SUN4V PCI configuration space accessors. */
-static inline int pci_sun4v_out_of_range(struct pci_pbm_info *pbm, unsigned int bus, unsigned int device, unsigned int func)
+struct pdev_entry {
+        struct pdev_entry       *next;
+        u32                     devhandle;
+        unsigned int            bus;
+        unsigned int            device;
+        unsigned int            func;
+};
+#define PDEV_HTAB_SIZE  16
+#define PDEV_HTAB_MASK  (PDEV_HTAB_SIZE - 1)
+static struct pdev_entry *pdev_htab[PDEV_HTAB_SIZE];
+static inline unsigned int pdev_hashfn(u32 devhandle, unsigned int bus, unsigned int device, unsigned int func)
 {
-        if (bus == pbm->pci_first_busno) {
+        unsigned int val;
-                if (device == 0 && func == 0)
-                        return 0;
+        val = (devhandle ^ (devhandle >> 4));
-                return 1;
+        val ^= bus;
+        val ^= device;
+        val ^= func;
+        return val & PDEV_HTAB_MASK;
+}
+static int pdev_htab_add(u32 devhandle, unsigned int bus, unsigned int device, unsigned int func)
+{
+        struct pdev_entry *p = kmalloc(sizeof(*p), GFP_KERNEL);
+        struct pdev_entry **slot;
+        if (!p)
+                return -ENOMEM;
+        slot = &pdev_htab[pdev_hashfn(devhandle, bus, device, func)];
+        p->next = *slot;
+        *slot = p;
+        p->devhandle = devhandle;
+        p->bus = bus;
+        p->device = device;
+        p->func = func;
+        return 0;
+}
+/* Recursively descend into the OBP device tree, rooted at toplevel_node,
+ * looking for a PCI device matching bus and devfn.
+ */
+static int obp_find(struct linux_prom_pci_registers *pregs, int toplevel_node, unsigned int bus, unsigned int devfn)
+{
+        toplevel_node = prom_getchild(toplevel_node);
+        while (toplevel_node != 0) {
+                int ret = obp_find(pregs, toplevel_node, bus, devfn);
+                if (ret != 0)
+                        return ret;
+                ret = prom_getproperty(toplevel_node, "reg", (char *) pregs,
+                                       sizeof(*pregs) * PROMREG_MAX);
+                if (ret == 0 || ret == -1)
+                        goto next_sibling;
+                if (((pregs[0].phys_hi >> 16) & 0xff) == bus &&
+                    ((pregs[0].phys_hi >> 8) & 0xff) == devfn)
+                        break;
+        next_sibling:
+                toplevel_node = prom_getsibling(toplevel_node);
        }
+        return toplevel_node;
+}
+static int pdev_htab_populate(struct pci_pbm_info *pbm)
+{
+        struct linux_prom_pci_registers pr[PROMREG_MAX];
+        u32 devhandle = pbm->devhandle;
+        unsigned int bus;
+        for (bus = pbm->pci_first_busno; bus <= pbm->pci_last_busno; bus++) {
+                unsigned int devfn;
+                for (devfn = 0; devfn < 256; devfn++) {
+                        unsigned int device = PCI_SLOT(devfn);
+                        unsigned int func = PCI_FUNC(devfn);
+                        if (obp_find(pr, pbm->prom_node, bus, devfn)) {
+                                int err = pdev_htab_add(devhandle, bus,
+                                                        device, func);
+                                if (err)
+                                        return err;
+                        }
+                }
+        }
+        return 0;
+}
+static struct pdev_entry *pdev_find(u32 devhandle, unsigned int bus, unsigned int device, unsigned int func)
+{
+        struct pdev_entry *p;
+        p = pdev_htab[pdev_hashfn(devhandle, bus, device, func)];
+        while (p) {
+                if (p->devhandle == devhandle &&
+                    p->bus == bus &&
+                    p->device == device &&
+                    p->func == func)
+                        break;
+                p = p->next;
+        }
+        return p;
+}
+static inline int pci_sun4v_out_of_range(struct pci_pbm_info *pbm, unsigned int bus, unsigned int device, unsigned int func)
+{
        if (bus < pbm->pci_first_busno ||
            bus > pbm->pci_last_busno)
                return 1;
-        return 0;
+        return pdev_find(pbm->devhandle, bus, device, func) == NULL;
 }
 static int pci_sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -733,38 +843,8 @@ static unsigned int pci_sun4v_irq_build(struct pci_pbm_info *pbm,
                                        unsigned int devino)
 {
        u32 devhandle = pbm->devhandle;
-        int pil;
-        pil = 5;
-        if (pdev) {
-                switch ((pdev->class >> 16) & 0xff) {
-                case PCI_BASE_CLASS_STORAGE:
-                        pil = 5;
-                        break;
-                case PCI_BASE_CLASS_NETWORK:
-                        pil = 6;
-                        break;
-                case PCI_BASE_CLASS_DISPLAY:
-                        pil = 9;
-                        break;
-                case PCI_BASE_CLASS_MULTIMEDIA:
+        return sun4v_build_irq(devhandle, devino);
-                case PCI_BASE_CLASS_MEMORY:
-                case PCI_BASE_CLASS_BRIDGE:
-                case PCI_BASE_CLASS_SERIAL:
-                        pil = 10;
-                        break;
-                default:
-                        pil = 5;
-                        break;
-                };
-        }
-        BUG_ON(PIL_RESERVED(pil));
-        return sun4v_build_irq(devhandle, devino, pil, IBF_PCI);
 }
 static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource)
@@ -1063,6 +1143,8 @@ static void pci_sun4v_pbm_init(struct pci_controller_info *p, int prom_node, u32
        pci_sun4v_get_bus_range(pbm);
        pci_sun4v_iommu_init(pbm);
+        pdev_htab_populate(pbm);
 }
 void sun4v_pci_init(int node, char *model_name)
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c
index 1d6ffdeabd4c..8812417247d4 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc64/kernel/sbus.c
@@ -691,36 +691,6 @@ void sbus_set_sbus64(struct sbus_dev *sdev, int bursts)
        upa_writeq(val, cfg_reg);
 }
-/* SBUS SYSIO INO number to Sparc PIL level. */
-static unsigned char sysio_ino_to_pil[] = {
-        0, 5, 5, 7, 5, 7, 8, 9,         /* SBUS slot 0 */
-        0, 5, 5, 7, 5, 7, 8, 9,         /* SBUS slot 1 */
-        0, 5, 5, 7, 5, 7, 8, 9,         /* SBUS slot 2 */
-        0, 5, 5, 7, 5, 7, 8, 9,         /* SBUS slot 3 */
-        5, /* Onboard SCSI */
-        5, /* Onboard Ethernet */
-/*XXX*/ 8, /* Onboard BPP */
-        0, /* Bogon */
-       13, /* Audio */
-/*XXX*/15, /* PowerFail */
-        0, /* Bogon */
-        0, /* Bogon */
-       12, /* Zilog Serial Channels (incl. Keyboard/Mouse lines) */
-       11, /* Floppy */
-        0, /* Spare Hardware (bogon for now) */
-        0, /* Keyboard (bogon for now) */
-        0, /* Mouse (bogon for now) */
-        0, /* Serial (bogon for now) */
-     0, 0, /* Bogon, Bogon */
-       10, /* Timer 0 */
-       11, /* Timer 1 */
-     0, 0, /* Bogon, Bogon */
-       15, /* Uncorrectable SBUS Error */
-       15, /* Correctable SBUS Error */
-       15, /* SBUS Error */
-/*XXX*/ 0, /* Power Management (bogon for now) */
-};
 /* INO number to IMAP register offset for SYSIO external IRQ's.
 * This should conform to both Sunfire/Wildfire server and Fusion
 * desktop designs.
@@ -812,21 +782,12 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino)
        struct sbus_iommu *iommu = sbus->iommu;
        unsigned long reg_base = iommu->sbus_control_reg - 0x2000UL;
        unsigned long imap, iclr;
-        int pil, sbus_level = 0;
+        int sbus_level = 0;
-        pil = sysio_ino_to_pil[ino];
-        if (!pil) {
-                printk("sbus_irq_build: Bad SYSIO INO[%x]\n", ino);
-                panic("Bad SYSIO IRQ translations...");
-        }
-        if (PIL_RESERVED(pil))
-                BUG();
        imap = sysio_irq_offsets[ino];
        if (imap == ((unsigned long)-1)) {
-                prom_printf("get_irq_translations: Bad SYSIO INO[%x] cpu[%d]\n",
+                prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
-                            ino, pil);
+                            ino);
                prom_halt();
        }
        imap += reg_base;
@@ -860,7 +821,7 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino)
                iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
        }
-        return build_irq(pil, sbus_level, iclr, imap);
+        return build_irq(sbus_level, iclr, imap);
 }
 /* Error interrupt handling. */
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c
index 005167f82419..9cf1c88cd774 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc64/kernel/setup.c
@@ -220,7 +220,7 @@ char reboot_command[COMMAND_LINE_SIZE];
 static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
-static void __init per_cpu_patch(void)
+void __init per_cpu_patch(void)
 {
        struct cpuid_patch_entry *p;
        unsigned long ver;
@@ -280,7 +280,7 @@ static void __init per_cpu_patch(void)
        }
 }
-static void __init sun4v_patch(void)
+void __init sun4v_patch(void)
 {
        struct sun4v_1insn_patch_entry *p1;
        struct sun4v_2insn_patch_entry *p2;
@@ -315,6 +315,15 @@ static void __init sun4v_patch(void)
        }
 }
+#ifdef CONFIG_SMP
+void __init boot_cpu_id_too_large(int cpu)
+{
+        prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
+                    cpu, NR_CPUS);
+        prom_halt();
+}
+#endif
 void __init setup_arch(char **cmdline_p)
 {
        /* Initialize PROM console and command line. */
@@ -332,16 +341,6 @@ void __init setup_arch(char **cmdline_p)
        conswitchp = &prom_con;
 #endif
-        /* Work out if we are starfire early on */
-        check_if_starfire();
-        /* Now we know enough to patch the get_cpuid sequences
-         * used by trap code.
-         */
-        per_cpu_patch();
-        sun4v_patch();
        boot_flags_init(*cmdline_p);
        idprom_init();
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 90eaca3ec9a6..f03d52d0b88d 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -1264,7 +1264,6 @@ void __init smp_tick_init(void)
        boot_cpu_id = hard_smp_processor_id();
        current_tick_offset = timer_tick_offset;
-        cpu_set(boot_cpu_id, cpu_online_map);
        prof_counter(boot_cpu_id) = prof_multiplier(boot_cpu_id) = 1;
 }
@@ -1288,6 +1287,40 @@ int setup_profiling_timer(unsigned int multiplier)
        return 0;
 }
+static void __init smp_tune_scheduling(void)
+{
+        int instance, node;
+        unsigned int def, smallest = ~0U;
+        def = ((tlb_type == hypervisor) ?
+               (3 * 1024 * 1024) :
+               (4 * 1024 * 1024));
+        instance = 0;
+        while (!cpu_find_by_instance(instance, &node, NULL)) {
+                unsigned int val;
+                val = prom_getintdefault(node, "ecache-size", def);
+                if (val < smallest)
+                        smallest = val;
+                instance++;
+        }
+        /* Any value less than 256K is nonsense.  */
+        if (smallest < (256U * 1024U))
+                smallest = 256 * 1024;
+        max_cache_size = smallest;
+        if (smallest < 1U * 1024U * 1024U)
+                printk(KERN_INFO "Using max_cache_size of %uKB\n",
+                       smallest / 1024U);
+        else
+                printk(KERN_INFO "Using max_cache_size of %uMB\n",
+                       smallest / 1024U / 1024U);
+}
 /* Constrain the number of cpus to max_cpus.  */
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
@@ -1323,6 +1356,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        }
        smp_store_cpu_info(boot_cpu_id);
+        smp_tune_scheduling();
 }
 /* Set this up early so that things like the scheduler can init
@@ -1345,18 +1379,6 @@ void __init smp_setup_cpu_possible_map(void)
 void __devinit smp_prepare_boot_cpu(void)
 {
-        int cpu = hard_smp_processor_id();
-        if (cpu >= NR_CPUS) {
-                prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
-                prom_halt();
-        }
-        current_thread_info()->cpu = cpu;
-        __local_per_cpu_offset = __per_cpu_offset(cpu);
-        cpu_set(smp_processor_id(), cpu_online_map);
-        cpu_set(smp_processor_id(), phys_cpu_present_map);
 }
 int __devinit __cpu_up(unsigned int cpu)
@@ -1433,4 +1455,7 @@ void __init setup_per_cpu_areas(void)
        for (i = 0; i < NR_CPUS; i++, ptr += size)
                memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
+        /* Setup %g5 for the boot cpu.  */
+        __local_per_cpu_offset = __per_cpu_offset(smp_processor_id());
 }
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index 62d8a99271ea..4ac35dd2088b 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -125,9 +125,6 @@ EXPORT_SYMBOL(__write_lock);
 EXPORT_SYMBOL(__write_unlock);
 EXPORT_SYMBOL(__write_trylock);
-/* Hard IRQ locking */
-EXPORT_SYMBOL(synchronize_irq);
 #if defined(CONFIG_MCOUNT)
 extern void _mcount(void);
 EXPORT_SYMBOL(_mcount);
@@ -175,10 +172,6 @@ EXPORT_SYMBOL(set_bit);
 EXPORT_SYMBOL(clear_bit);
 EXPORT_SYMBOL(change_bit);
-EXPORT_SYMBOL(ivector_table);
-EXPORT_SYMBOL(enable_irq);
-EXPORT_SYMBOL(disable_irq);
 EXPORT_SYMBOL(__flushw_user);
 EXPORT_SYMBOL(tlb_type);
@@ -297,7 +290,6 @@ EXPORT_SYMBOL(svr4_getcontext);
 EXPORT_SYMBOL(svr4_setcontext);
 EXPORT_SYMBOL(compat_sys_ioctl);
 EXPORT_SYMBOL(sparc32_open);
-EXPORT_SYMBOL(sys_close);
 #endif
 /* Special internal versions of library functions. */
diff --git a/arch/sparc64/kernel/sun4v_ivec.S b/arch/sparc64/kernel/sun4v_ivec.S
index b49a68bdda43..49703c3c5769 100644
--- a/arch/sparc64/kernel/sun4v_ivec.S
+++ b/arch/sparc64/kernel/sun4v_ivec.S
@@ -5,6 +5,7 @@
 #include <asm/cpudata.h>
 #include <asm/intr_queue.h>
+#include <asm/pil.h>
        .text
        .align  32
@@ -102,23 +103,17 @@ sun4v_dev_mondo:
        /* Get &ivector_table[IVEC] into %g4.  */
        sethi   %hi(ivector_table), %g4
-        sllx    %g3, 5, %g3
+        sllx    %g3, 3, %g3
        or      %g4, %lo(ivector_table), %g4
        add     %g4, %g3, %g4
-        /* Load IRQ %pil into %g5.  */
-        ldub    [%g4 + 0x04], %g5
        /* Insert ivector_table[] entry into __irq_work[] queue.  */
-        sllx    %g5, 2, %g3
+        lduw    [%g1], %g2              /* g2 = irq_work(cpu) */
-        lduw    [%g1 + %g3], %g2        /* g2 = irq_work(cpu, pil) */
        stw     %g2, [%g4 + 0x00]       /* bucket->irq_chain = g2 */
-        stw     %g4, [%g1 + %g3]        /* irq_work(cpu, pil) = bucket */
+        stw     %g4, [%g1]              /* irq_work(cpu) = bucket */
        /* Signal the interrupt by setting (1 << pil) in %softint.  */
-        mov     1, %g2
+        wr      %g0, 1 << PIL_DEVICE_IRQ, %set_softint
-        sllx    %g2, %g5, %g2
-        wr      %g2, 0x0, %set_softint
 sun4v_dev_mondo_queue_empty:
        retry
diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S
index d4b39cd30310..1136fc465e37 100644
--- a/arch/sparc64/kernel/systbls.S
+++ b/arch/sparc64/kernel/systbls.S
@@ -78,8 +78,9 @@ sys_call_table32:
        .word compat_sys_mq_timedsend, compat_sys_mq_timedreceive, compat_sys_mq_notify, compat_sys_mq_getsetattr, compat_sys_waitid
 /*280*/ .word sys32_tee, sys_add_key, sys_request_key, sys_keyctl, compat_sys_openat
        .word sys_mkdirat, sys_mknodat, sys_fchownat, compat_sys_futimesat, compat_sys_fstatat64
-/*285*/ .word sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
+/*290*/ .word sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
        .word sys_fchmodat, sys_faccessat, compat_sys_pselect6, compat_sys_ppoll, sys_unshare
+/*300*/ .word compat_sys_set_robust_list, compat_sys_get_robust_list
 #endif /* CONFIG_COMPAT */
@@ -147,8 +148,9 @@ sys_call_table:
        .word sys_mq_timedsend, sys_mq_timedreceive, sys_mq_notify, sys_mq_getsetattr, sys_waitid
 /*280*/ .word sys_tee, sys_add_key, sys_request_key, sys_keyctl, sys_openat
        .word sys_mkdirat, sys_mknodat, sys_fchownat, sys_futimesat, sys_fstatat64
-/*285*/ .word sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
+/*290*/ .word sys_unlinkat, sys_renameat, sys_linkat, sys_symlinkat, sys_readlinkat
        .word sys_fchmodat, sys_faccessat, sys_pselect6, sys_ppoll, sys_unshare
+/*300*/ .word sys_set_robust_list, sys_get_robust_list
 #if defined(CONFIG_SUNOS_EMUL) || defined(CONFIG_SOLARIS_EMUL) || \
    defined(CONFIG_SOLARIS_EMUL_MODULE)
@@ -261,5 +263,5 @@ sunos_sys_table:
 /*290*/ .word sunos_nosys, sunos_nosys, sunos_nosys
        .word sunos_nosys, sunos_nosys, sunos_nosys
        .word sunos_nosys, sunos_nosys, sunos_nosys
-        .word sunos_nosys
+        .word sunos_nosys, sunos_nosys, sunos_nosys
 #endif
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index e55b5c6ece02..0f00a99927e9 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -457,7 +457,7 @@ static inline void timer_check_rtc(void)
        }
 }
-static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
+irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 {
        unsigned long ticks, compare, pstate;
@@ -1020,19 +1020,9 @@ static unsigned long sparc64_init_timers(void)
        return clock;
 }
-static void sparc64_start_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *))
+static void sparc64_start_timers(void)
 {
        unsigned long pstate;
-        int err;
-        /* Register IRQ handler. */
-        err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, 0,
-                          "timer", NULL);
-        if (err) {
-                prom_printf("Serious problem, cannot register TICK_INT\n");
-                prom_halt();
-        }
        /* Guarantee that the following sequences execute
         * uninterrupted.
@@ -1116,7 +1106,7 @@ void __init time_init(void)
        /* Now that the interpolator is registered, it is
         * safe to start the timer ticking.
         */
-        sparc64_start_timers(timer_interrupt);
+        sparc64_start_timers();
        timer_ticks_per_nsec_quotient =
                (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index 2793a5d82380..5059cbd4feee 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -1797,7 +1797,9 @@ static const char *sun4v_err_type_to_str(u32 type)
        };
 }
-static void sun4v_log_error(struct sun4v_error_entry *ent, int cpu, const char *pfx, atomic_t *ocnt)
+extern void __show_regs(struct pt_regs * regs);
+static void sun4v_log_error(struct pt_regs *regs, struct sun4v_error_entry *ent, int cpu, const char *pfx, atomic_t *ocnt)
 {
        int cnt;
@@ -1830,6 +1832,8 @@ static void sun4v_log_error(struct sun4v_error_entry *ent, int cpu, const char *
               pfx,
               ent->err_raddr, ent->err_size, ent->err_cpu);
+        __show_regs(regs);
        if ((cnt = atomic_read(ocnt)) != 0) {
                atomic_set(ocnt, 0);
                wmb();
@@ -1862,7 +1866,7 @@ void sun4v_resum_error(struct pt_regs *regs, unsigned long offset)
        put_cpu();
-        sun4v_log_error(&local_copy, cpu,
+        sun4v_log_error(regs, &local_copy, cpu,
                        KERN_ERR "RESUMABLE ERROR",
                        &sun4v_resum_oflow_cnt);
 }
@@ -1910,7 +1914,7 @@ void sun4v_nonresum_error(struct pt_regs *regs, unsigned long offset)
        }
 #endif
-        sun4v_log_error(&local_copy, cpu,
+        sun4v_log_error(regs, &local_copy, cpu,
                        KERN_EMERG "NON-RESUMABLE ERROR",
                        &sun4v_nonresum_oflow_cnt);
@@ -2200,7 +2204,6 @@ static inline struct reg_window *kernel_stack_up(struct reg_window *rw)
 void die_if_kernel(char *str, struct pt_regs *regs)
 {
        static int die_counter;
-        extern void __show_regs(struct pt_regs * regs);
        extern void smp_report_regs(void);
        int count = 0;
        
@@ -2541,7 +2544,9 @@ void __init trap_init(void)
            (TRAP_PER_CPU_TSB_HUGE !=
             offsetof(struct trap_per_cpu, tsb_huge)) ||
            (TRAP_PER_CPU_TSB_HUGE_TEMP !=
-             offsetof(struct trap_per_cpu, tsb_huge_temp)))
+             offsetof(struct trap_per_cpu, tsb_huge_temp)) ||
+            (TRAP_PER_CPU_IRQ_WORKLIST !=
+             offsetof(struct trap_per_cpu, irq_worklist)))
                trap_per_cpu_offsets_are_bolixed_dave();
        if ((TSB_CONFIG_TSB !=
diff --git a/arch/sparc64/kernel/ttable.S b/arch/sparc64/kernel/ttable.S
index 5d901519db55..ee45ca2d7a04 100644
--- a/arch/sparc64/kernel/ttable.S
+++ b/arch/sparc64/kernel/ttable.S
@@ -58,13 +58,11 @@ tl0_irq2:	BTRAP(0x42)
 tl0_irq3:       BTRAP(0x43)
 tl0_irq4:       BTRAP(0x44)
 #endif
-tl0_irq5:       TRAP_IRQ(handler_irq, 5)  TRAP_IRQ(handler_irq, 6)
+tl0_irq5:       TRAP_IRQ(handler_irq, 5)
-tl0_irq7:       TRAP_IRQ(handler_irq, 7)  TRAP_IRQ(handler_irq, 8)
+tl0_irq6:       BTRAP(0x46) BTRAP(0x47) BTRAP(0x48) BTRAP(0x49)
-tl0_irq9:       TRAP_IRQ(handler_irq, 9)  TRAP_IRQ(handler_irq, 10)
+tl0_irq10:      BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d)
-tl0_irq11:      TRAP_IRQ(handler_irq, 11) TRAP_IRQ(handler_irq, 12)
-tl0_irq13:      TRAP_IRQ(handler_irq, 13)
 #ifndef CONFIG_SMP
-tl0_irq14:      TRAP_IRQ(handler_irq, 14)
+tl0_irq14:      TRAP_IRQ(timer_irq, 14)
 #else
 tl0_irq14:      TICK_SMP_IRQ
 #endif
diff --git a/arch/sparc64/lib/checksum.S b/arch/sparc64/lib/checksum.S
index ba9cd3ccc2b2..1d230f693dc4 100644
--- a/arch/sparc64/lib/checksum.S
+++ b/arch/sparc64/lib/checksum.S
@@ -165,8 +165,9 @@ csum_partial_end_cruft:
        sll             %g1, 8, %g1
        or              %o5, %g1, %o4
-1:      add             %o2, %o4, %o2
+1:      addcc           %o2, %o4, %o2
+        addc            %g0, %o2, %o2
 csum_partial_finish:
        retl
-         mov            %o2, %o0
+         srl            %o2, 0, %o0
diff --git a/arch/sparc64/lib/csum_copy.S b/arch/sparc64/lib/csum_copy.S
index 71af48839064..e566c770a0f6 100644
--- a/arch/sparc64/lib/csum_copy.S
+++ b/arch/sparc64/lib/csum_copy.S
@@ -221,11 +221,12 @@ FUNC_NAME:		/* %o0=src, %o1=dst, %o2=len, %o3=sum */
        sll             %g1, 8, %g1
        or              %o5, %g1, %o4
-1:      add             %o3, %o4, %o3
+1:      addcc           %o3, %o4, %o3
+        addc            %g0, %o3, %o3
 70:
        retl
-         mov            %o3, %o0
+         srl            %o3, 0, %o0
 95:     mov             0, GLOBAL_SPARE
        brlez,pn        %o2, 4f
diff --git a/arch/um/Makefile-i386 b/arch/um/Makefile-i386
index 7a0e04e34bf9..b65ca115ef77 100644
--- a/arch/um/Makefile-i386
+++ b/arch/um/Makefile-i386
@@ -33,5 +33,9 @@ include $(srctree)/arch/i386/Makefile.cpu
 # prevent gcc from keeping the stack 16 byte aligned. Taken from i386.
 cflags-y += $(call cc-option,-mpreferred-stack-boundary=2)
+# Prevent sprintf in nfsd from being converted to strcpy and resulting in
+# an unresolved reference.
+cflags-y += -ffreestanding
 CFLAGS += $(cflags-y)
 USER_CFLAGS += $(cflags-y)
diff --git a/arch/um/include/kern_util.h b/arch/um/include/kern_util.h
index efa3d33c0be6..310980b32173 100644
--- a/arch/um/include/kern_util.h
+++ b/arch/um/include/kern_util.h
@@ -120,20 +120,11 @@ extern int is_syscall(unsigned long addr);
 extern void free_irq(unsigned int, void *);
 extern int cpu(void);
+extern void time_init_kern(void);
 /* Are we disallowed to sleep? Used to choose between GFP_KERNEL and GFP_ATOMIC. */
 extern int __cant_sleep(void);
 extern void segv_handler(int sig, union uml_pt_regs *regs);
 extern void sigio_handler(int sig, union uml_pt_regs *regs);
 #endif
-/*
- * Overrides for Emacs so that we follow Linus's tabbing style.
- * Emacs will notice this stuff at the end of the file and automatically
- * adjust the settings for this buffer only.  This must remain at the end
- * of the file.
- * ---------------------------------------------------------------------------
- * Local variables:
- * c-file-style: "linux"
- * End:
- */
diff --git a/arch/um/kernel/physmem.c b/arch/um/kernel/physmem.c
index fc0f0b085ca7..166cb09cae4c 100644
--- a/arch/um/kernel/physmem.c
+++ b/arch/um/kernel/physmem.c
@@ -69,7 +69,7 @@ static void insert_phys_mapping(struct phys_desc *desc)
                panic("Physical remapping for %p already present",
                      desc->virt);
-        rb_link_node(&desc->rb, (*n)->rb_parent, n);
+        rb_link_node(&desc->rb, rb_parent(*n), n);
        rb_insert_color(&desc->rb, &phys_mappings);
 }
diff --git a/arch/um/kernel/time_kern.c b/arch/um/kernel/time_kern.c
index 528cf623f8b4..86f51d04c98d 100644
--- a/arch/um/kernel/time_kern.c
+++ b/arch/um/kernel/time_kern.c
@@ -84,6 +84,16 @@ void timer_irq(union uml_pt_regs *regs)
        }
 }
+void time_init_kern(void)
+{
+        unsigned long long nsecs;
+        nsecs = os_nsecs();
+        set_normalized_timespec(&wall_to_monotonic, -nsecs / BILLION,
+                                -nsecs % BILLION);
+}
 void do_boot_timer_handler(struct sigcontext * sc)
 {
        struct pt_regs regs;
diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c
index 3a0ac38e978b..90912aaca7aa 100644
--- a/arch/um/os-Linux/main.c
+++ b/arch/um/os-Linux/main.c
@@ -59,7 +59,7 @@ static __init void do_uml_initcalls(void)
        initcall_t *call;
        call = &__uml_initcall_start;
-        while (call < &__uml_initcall_end){;
+        while (call < &__uml_initcall_end){
                (*call)();
                call++;
        }
diff --git a/arch/um/os-Linux/time.c b/arch/um/os-Linux/time.c
index 6f7626775acb..280c4fb9b585 100644
--- a/arch/um/os-Linux/time.c
+++ b/arch/um/os-Linux/time.c
@@ -81,20 +81,12 @@ void uml_idle_timer(void)
        set_interval(ITIMER_REAL);
 }
-extern void ktime_get_ts(struct timespec *ts);
-#define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts)
 void time_init(void)
 {
-        struct timespec now;
        if(signal(SIGVTALRM, boot_timer_handler) == SIG_ERR)
                panic("Couldn't set SIGVTALRM handler");
        set_interval(ITIMER_VIRTUAL);
+        time_init_kern();
-        do_posix_clock_monotonic_gettime(&now);
-        wall_to_monotonic.tv_sec = -now.tv_sec;
-        wall_to_monotonic.tv_nsec = -now.tv_nsec;
 }
 unsigned long long os_nsecs(void)
diff --git a/arch/um/sys-i386/syscalls.c b/arch/um/sys-i386/syscalls.c
index 749dd1bfe60f..710d5fb807e1 100644
--- a/arch/um/sys-i386/syscalls.c
+++ b/arch/um/sys-i386/syscalls.c
@@ -99,11 +99,12 @@ long sys_ipc (uint call, int first, int second,
        switch (call) {
        case SEMOP:
-                return sys_semtimedop(first, (struct sembuf *) ptr, second,
+                return sys_semtimedop(first, (struct sembuf __user *) ptr,
-                                      NULL);
+                                      second, NULL);
        case SEMTIMEDOP:
-                return sys_semtimedop(first, (struct sembuf *) ptr, second,
+                return sys_semtimedop(first, (struct sembuf __user *) ptr,
-                                      (const struct timespec *) fifth);
+                                      second,
+                                      (const struct timespec __user *) fifth);
        case SEMGET:
                return sys_semget (first, second, third);
        case SEMCTL: {
diff --git a/arch/um/sys-x86_64/signal.c b/arch/um/sys-x86_64/signal.c
index a4c46a8af008..9edf114faf79 100644
--- a/arch/um/sys-x86_64/signal.c
+++ b/arch/um/sys-x86_64/signal.c
@@ -21,7 +21,7 @@
 #include "skas.h"
 static int copy_sc_from_user_skas(struct pt_regs *regs,
-                                 struct sigcontext *from)
+                                 struct sigcontext __user *from)
 {
       int err = 0;
@@ -54,7 +54,8 @@ static int copy_sc_from_user_skas(struct pt_regs *regs,
       return(err);
 }
-int copy_sc_to_user_skas(struct sigcontext *to, struct _fpstate *to_fp,
+int copy_sc_to_user_skas(struct sigcontext __user *to,
+                         struct _fpstate __user *to_fp,
                         struct pt_regs *regs, unsigned long mask,
                         unsigned long sp)
 {
@@ -106,10 +107,11 @@ int copy_sc_to_user_skas(struct sigcontext *to, struct _fpstate *to_fp,
 #endif
 #ifdef CONFIG_MODE_TT
-int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from,
+int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext __user *from,
                         int fpsize)
 {
-        struct _fpstate *to_fp, *from_fp;
+        struct _fpstate *to_fp;
+        struct _fpstate __user *from_fp;
        unsigned long sigs;
        int err;
@@ -124,13 +126,14 @@ int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from,
        return(err);
 }
-int copy_sc_to_user_tt(struct sigcontext *to, struct _fpstate *fp,
+int copy_sc_to_user_tt(struct sigcontext __user *to, struct _fpstate __user *fp,
                       struct sigcontext *from, int fpsize, unsigned long sp)
 {
-        struct _fpstate *to_fp, *from_fp;
+        struct _fpstate __user *to_fp;
+        struct _fpstate *from_fp;
        int err;
-        to_fp = (fp ? fp : (struct _fpstate *) (to + 1));
+        to_fp = (fp ? fp : (struct _fpstate __user *) (to + 1));
        from_fp = from->fpstate;
        err = copy_to_user(to, from, sizeof(*to));
        /* The SP in the sigcontext is the updated one for the signal
@@ -158,7 +161,8 @@ static int copy_sc_from_user(struct pt_regs *to, void __user *from)
       return(ret);
 }
-static int copy_sc_to_user(struct sigcontext *to, struct _fpstate *fp,
+static int copy_sc_to_user(struct sigcontext __user *to,
+                           struct _fpstate __user *fp,
                           struct pt_regs *from, unsigned long mask,
                           unsigned long sp)
 {
@@ -169,7 +173,7 @@ static int copy_sc_to_user(struct sigcontext *to, struct _fpstate *fp,
 struct rt_sigframe
 {
-       char *pretcode;
+       char __user *pretcode;
       struct ucontext uc;
       struct siginfo info;
 };
@@ -188,7 +192,7 @@ int setup_signal_stack_si(unsigned long stack_top, int sig,
        frame = (struct rt_sigframe __user *)
                round_down(stack_top - sizeof(struct rt_sigframe), 16) - 8;
-        frame = (struct rt_sigframe *) ((unsigned long) frame - 128);
+        frame = (struct rt_sigframe __user *) ((unsigned long) frame - 128);
        if (!access_ok(VERIFY_WRITE, fp, sizeof(struct _fpstate)))
                goto out;
diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/um/sys-x86_64/syscalls.c
index 6acee5c4ada6..6fce9f45dfdc 100644
--- a/arch/um/sys-x86_64/syscalls.c
+++ b/arch/um/sys-x86_64/syscalls.c
@@ -45,7 +45,7 @@ static long arch_prctl_tt(int code, unsigned long addr)
        case ARCH_GET_GS:
                ret = arch_prctl(code, (unsigned long) &tmp);
                if(!ret)
-                        ret = put_user(tmp, &addr);
+                        ret = put_user(tmp, (long __user *)addr);
                break;
        default:
                ret = -EINVAL;
diff --git a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86_64/ia32/ia32_binfmt.c
index e776139afb20..926c4743d13b 100644
--- a/arch/x86_64/ia32/ia32_binfmt.c
+++ b/arch/x86_64/ia32/ia32_binfmt.c
@@ -339,7 +339,7 @@ int ia32_setup_arg_pages(struct linux_binprm *bprm, unsigned long stack_top,
        struct mm_struct *mm = current->mm;
        int i, ret;
-        stack_base = IA32_STACK_TOP - MAX_ARG_PAGES * PAGE_SIZE;
+        stack_base = stack_top - MAX_ARG_PAGES * PAGE_SIZE;
        mm->arg_start = bprm->p + stack_base;
        bprm->p += stack_base;
@@ -357,7 +357,7 @@ int ia32_setup_arg_pages(struct linux_binprm *bprm, unsigned long stack_top,
        {
                mpnt->vm_mm = mm;
                mpnt->vm_start = PAGE_MASK & (unsigned long) bprm->p;
-                mpnt->vm_end = IA32_STACK_TOP;
+                mpnt->vm_end = stack_top;
                if (executable_stack == EXSTACK_ENABLE_X)
                        mpnt->vm_flags = VM_STACK_FLAGS |  VM_EXEC;
                else if (executable_stack == EXSTACK_DISABLE_X)
diff --git a/arch/x86_64/kernel/e820.c b/arch/x86_64/kernel/e820.c
index 222b5b46d2b2..1ef6028f721e 100644
--- a/arch/x86_64/kernel/e820.c
+++ b/arch/x86_64/kernel/e820.c
@@ -149,7 +149,7 @@ unsigned long __init find_e820_area(unsigned long start, unsigned long end, unsi
                        addr = start;
                if (addr > ei->addr + ei->size) 
                        continue; 
-                while (bad_addr(&addr, size) && addr+size < ei->addr + ei->size)
+                while (bad_addr(&addr, size) && addr+size <= ei->addr+ei->size)
                        ;
                last = addr + size;
                if (last > ei->addr + ei->size)
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S
index c946e4fe67a7..586b34c00c48 100644
--- a/arch/x86_64/kernel/entry.S
+++ b/arch/x86_64/kernel/entry.S
@@ -281,12 +281,7 @@ tracesys:
        ja  1f
        movq %r10,%rcx  /* fixup for C */
        call *sys_call_table(,%rax,8)
-        movq %rax,RAX-ARGOFFSET(%rsp)
+1:      movq %rax,RAX-ARGOFFSET(%rsp)
-1:      SAVE_REST
-        movq %rsp,%rdi
-        call syscall_trace_leave
-        RESTORE_TOP_OF_STACK %rbx
-        RESTORE_REST
        /* Use IRET because user could have changed frame */
        jmp int_ret_from_sys_call
        CFI_ENDPROC
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 0de3ea938830..9cc7031b7151 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -271,6 +271,18 @@ __setup("enable_8254_timer", setup_enable_8254_timer);
 #include <linux/pci_ids.h>
 #include <linux/pci.h>
+#ifdef CONFIG_ACPI
+static int nvidia_hpet_detected __initdata;
+static int __init nvidia_hpet_check(unsigned long phys, unsigned long size)
+{
+        nvidia_hpet_detected = 1;
+        return 0;
+}
+#endif
 /* Temporary Hack. Nvidia and VIA boards currently only work with IO-APIC
   off. Check for an Nvidia or VIA PCI bridge and turn it off.
   Use pci direct infrastructure because this runs before the PCI subsystem. 
@@ -317,11 +329,19 @@ void __init check_ioapic(void)
                                        return;
                                case PCI_VENDOR_ID_NVIDIA:
 #ifdef CONFIG_ACPI
-                                        /* All timer overrides on Nvidia
+                                        /*
-                                           seem to be wrong. Skip them. */
+                                         * All timer overrides on Nvidia are
-                                        acpi_skip_timer_override = 1;
+                                         * wrong unless HPET is enabled.
-                                        printk(KERN_INFO 
+                                         */
-             "Nvidia board detected. Ignoring ACPI timer override.\n");
+                                        nvidia_hpet_detected = 0;
+                                        acpi_table_parse(ACPI_HPET,
+                                                        nvidia_hpet_check);
+                                        if (nvidia_hpet_detected == 0) {
+                                                acpi_skip_timer_override = 1;
+                                                printk(KERN_INFO "Nvidia board "
+                                                    "detected. Ignoring ACPI "
+                                                    "timer override.\n");
+                                        }
 #endif
                                        /* RED-PEN skip them on mptables too? */
                                        return;
diff --git a/arch/x86_64/kernel/kprobes.c b/arch/x86_64/kernel/kprobes.c
index 1eaa5dae6174..fa1d19ca700a 100644
--- a/arch/x86_64/kernel/kprobes.c
+++ b/arch/x86_64/kernel/kprobes.c
@@ -514,13 +514,13 @@ static void __kprobes resume_execution(struct kprobe *p,
                *tos = orig_rip + (*tos - copy_rip);
                break;
        case 0xff:
-                if ((*insn & 0x30) == 0x10) {
+                if ((insn[1] & 0x30) == 0x10) {
                        /* call absolute, indirect */
                        /* Fix return addr; rip is correct. */
                        next_rip = regs->rip;
                        *tos = orig_rip + (*tos - copy_rip);
-                } else if (((*insn & 0x31) == 0x20) ||  /* jmp near, absolute indirect */
+                } else if (((insn[1] & 0x31) == 0x20) ||        /* jmp near, absolute indirect */
-                           ((*insn & 0x31) == 0x21)) {  /* jmp far, absolute indirect */
+                           ((insn[1] & 0x31) == 0x21)) {        /* jmp far, absolute indirect */
                        /* rip is correct. */
                        next_rip = regs->rip;
                }
diff --git a/arch/x86_64/kernel/pci-dma.c b/arch/x86_64/kernel/pci-dma.c
index af035ede70cd..a9275c9557cf 100644
--- a/arch/x86_64/kernel/pci-dma.c
+++ b/arch/x86_64/kernel/pci-dma.c
@@ -54,6 +54,10 @@ dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
        else
 #endif
                node = numa_node_id();
+        if (node < first_node(node_online_map))
+                node = first_node(node_online_map);
        page = alloc_pages_node(node, gfp, order);
        return page ? page_address(page) : NULL;
 }
diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c
index 2480d3f08a47..82a7c9bfdfa0 100644
--- a/arch/x86_64/kernel/pci-gart.c
+++ b/arch/x86_64/kernel/pci-gart.c
@@ -631,10 +631,8 @@ static int __init pci_iommu_init(void)
                printk(KERN_INFO "PCI-DMA: Disabling IOMMU.\n");
                if (end_pfn > MAX_DMA32_PFN) {
                        printk(KERN_ERR "WARNING more than 4GB of memory "
-                                        "but IOMMU not compiled in.\n"
+                                        "but IOMMU not available.\n"
-                               KERN_ERR "WARNING 32bit PCI may malfunction.\n"
+                               KERN_ERR "WARNING 32bit PCI may malfunction.\n");
-                               KERN_ERR "You might want to enable "
-                                        "CONFIG_GART_IOMMU\n");
                }
                return -1;
        }
diff --git a/arch/x86_64/kernel/pci-nommu.c b/arch/x86_64/kernel/pci-nommu.c
index 44adcc2d5e5b..1f6ecc62061d 100644
--- a/arch/x86_64/kernel/pci-nommu.c
+++ b/arch/x86_64/kernel/pci-nommu.c
@@ -12,9 +12,10 @@ static int
 check_addr(char *name, struct device *hwdev, dma_addr_t bus, size_t size)
 {
        if (hwdev && bus + size > *hwdev->dma_mask) {
-                printk(KERN_ERR
+                if (*hwdev->dma_mask >= 0xffffffffULL)
-                    "nommu_%s: overflow %Lx+%lu of device mask %Lx\n",
+                        printk(KERN_ERR
-               name, (long long)bus, size, (long long)*hwdev->dma_mask);
+                            "nommu_%s: overflow %Lx+%lu of device mask %Lx\n",
+                                name, (long long)bus, size, (long long)*hwdev->dma_mask);
                return 0;
        }
        return 1;
diff --git a/arch/x86_64/kernel/pmtimer.c b/arch/x86_64/kernel/pmtimer.c
index b0444a415bd6..bf421ed26808 100644
--- a/arch/x86_64/kernel/pmtimer.c
+++ b/arch/x86_64/kernel/pmtimer.c
@@ -68,7 +68,7 @@ int pmtimer_mark_offset(void)
        offset_delay = delta % (USEC_PER_SEC / HZ);
        rdtscll(tsc);
-        vxtime.last_tsc = tsc - offset_delay * cpu_khz;
+        vxtime.last_tsc = tsc - offset_delay * (u64)cpu_khz / 1000;
        /* don't calculate delay for first run,
           or if we've got less then a tick */
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index f0870bef24d1..655b9192eeb3 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -1051,7 +1051,7 @@ static void srat_detect_node(void)
           for now. */
        node = apicid_to_node[hard_smp_processor_id()];
        if (node == NUMA_NO_NODE)
-                node = 0;
+                node = first_node(node_online_map);
        numa_set_node(cpu, node);
        if (acpi_numa > 0)
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c
index 6b87268c5c2e..cea335e8746c 100644
--- a/arch/x86_64/kernel/traps.c
+++ b/arch/x86_64/kernel/traps.c
@@ -102,6 +102,8 @@ static inline void preempt_conditional_cli(struct pt_regs *regs)
 {
        if (regs->eflags & X86_EFLAGS_IF)
                local_irq_disable();
+        /* Make sure to not schedule here because we could be running
+           on an exception stack. */
        preempt_enable_no_resched();
 }
@@ -483,8 +485,6 @@ static void __kprobes do_trap(int trapnr, int signr, char *str,
 {
        struct task_struct *tsk = current;
-        conditional_sti(regs);
        tsk->thread.error_code = error_code;
        tsk->thread.trap_no = trapnr;
@@ -521,6 +521,7 @@ asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
        if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
                                                        == NOTIFY_STOP) \
                return; \
+        conditional_sti(regs);                                          \
        do_trap(trapnr, signr, str, regs, error_code, NULL); \
 }
@@ -535,6 +536,7 @@ asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
        if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
                                                        == NOTIFY_STOP) \
                return; \
+        conditional_sti(regs);                                          \
        do_trap(trapnr, signr, str, regs, error_code, &info); \
 }
@@ -548,7 +550,17 @@ DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
 DO_ERROR(11, SIGBUS,  "segment not present", segment_not_present)
 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
 DO_ERROR(18, SIGSEGV, "reserved", reserved)
-DO_ERROR(12, SIGBUS,  "stack segment", stack_segment)
+/* Runs on IST stack */
+asmlinkage void do_stack_segment(struct pt_regs *regs, long error_code)
+{
+        if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
+                        12, SIGBUS) == NOTIFY_STOP)
+                return;
+        preempt_conditional_sti(regs);
+        do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
+        preempt_conditional_cli(regs);
+}
 asmlinkage void do_double_fault(struct pt_regs * regs, long error_code)
 {
@@ -682,8 +694,9 @@ asmlinkage void __kprobes do_int3(struct pt_regs * regs, long error_code)
        if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP) == NOTIFY_STOP) {
                return;
        }
+        preempt_conditional_sti(regs);
        do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
-        return;
+        preempt_conditional_cli(regs);
 }
 /* Help handler running on IST stack to switch back to user stack
diff --git a/arch/x86_64/mm/srat.c b/arch/x86_64/mm/srat.c
index 15ae9fcd65a7..474df22c6ed2 100644
--- a/arch/x86_64/mm/srat.c
+++ b/arch/x86_64/mm/srat.c
@@ -34,7 +34,10 @@ static nodemask_t nodes_found __initdata;
 static struct bootnode nodes[MAX_NUMNODES] __initdata;
 static struct bootnode nodes_add[MAX_NUMNODES] __initdata;
 static int found_add_area __initdata;
-int hotadd_percent __initdata = 10;
+int hotadd_percent __initdata = 0;
+#ifndef RESERVE_HOTADD
+#define hotadd_percent 0        /* Ignore all settings */
+#endif
 static u8 pxm2node[256] = { [0 ... 255] = 0xff };
 /* Too small nodes confuse the VM badly. Usually they result
@@ -103,6 +106,7 @@ static __init void bad_srat(void)
        int i;
        printk(KERN_ERR "SRAT: SRAT not used.\n");
        acpi_numa = -1;
+        found_add_area = 0;
        for (i = 0; i < MAX_LOCAL_APIC; i++)
                apicid_to_node[i] = NUMA_NO_NODE;
        for (i = 0; i < MAX_NUMNODES; i++)
@@ -154,7 +158,8 @@ acpi_numa_processor_affinity_init(struct acpi_table_processor_affinity *pa)
        int pxm, node;
        if (srat_disabled())
                return;
-        if (pa->header.length != sizeof(struct acpi_table_processor_affinity)) {                bad_srat();
+        if (pa->header.length != sizeof(struct acpi_table_processor_affinity)) {
+                bad_srat();
                return;
        }
        if (pa->flags.enabled == 0)
@@ -191,15 +196,17 @@ static int hotadd_enough_memory(struct bootnode *nd)
        allowed = (end_pfn - e820_hole_size(0, end_pfn)) * PAGE_SIZE;
        allowed = (allowed / 100) * hotadd_percent;
        if (allocated + mem > allowed) {
+                unsigned long range;
                /* Give them at least part of their hotadd memory upto hotadd_percent
                   It would be better to spread the limit out
                   over multiple hotplug areas, but that is too complicated
                   right now */
                if (allocated >= allowed)
                        return 0;
-                pages = (allowed - allocated + mem) / sizeof(struct page);
+                range = allowed - allocated;
+                pages = (range / PAGE_SIZE);
                mem = pages * sizeof(struct page);
-                nd->end = nd->start + pages*PAGE_SIZE;
+                nd->end = nd->start + range;
        }
        /* Not completely fool proof, but a good sanity check */
        addr = find_e820_area(last_area_end, end_pfn<<PAGE_SHIFT, mem);
@@ -392,8 +399,10 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
        /* First clean up the node list */
        for (i = 0; i < MAX_NUMNODES; i++) {
                cutoff_node(i, start, end);
-                if ((nodes[i].end - nodes[i].start) < NODE_MIN_SIZE)
+                if ((nodes[i].end - nodes[i].start) < NODE_MIN_SIZE) {
                        unparse_node(i);
+                        node_set_offline(i);
+                }
        }
        if (acpi_numa <= 0)