diff options
Diffstat (limited to 'arch/xtensa')
-rw-r--r-- | arch/xtensa/Kconfig | 1 | ||||
-rw-r--r-- | arch/xtensa/configs/s6105_defconfig | 1 | ||||
-rw-r--r-- | arch/xtensa/include/asm/dma.h | 2 | ||||
-rw-r--r-- | arch/xtensa/kernel/entry.S | 2 | ||||
-rw-r--r-- | arch/xtensa/kernel/irq.c | 18 |
5 files changed, 8 insertions, 16 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 1d730b5579a0..7c275f5d0df0 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig | |||
@@ -9,7 +9,6 @@ config XTENSA | |||
9 | select HAVE_IDE | 9 | select HAVE_IDE |
10 | select HAVE_GENERIC_HARDIRQS | 10 | select HAVE_GENERIC_HARDIRQS |
11 | select GENERIC_IRQ_SHOW | 11 | select GENERIC_IRQ_SHOW |
12 | select GENERIC_HARDIRQS_NO_DEPRECATED | ||
13 | help | 12 | help |
14 | Xtensa processors are 32-bit RISC machines designed by Tensilica | 13 | Xtensa processors are 32-bit RISC machines designed by Tensilica |
15 | primarily for embedded systems. These processors are both | 14 | primarily for embedded systems. These processors are both |
diff --git a/arch/xtensa/configs/s6105_defconfig b/arch/xtensa/configs/s6105_defconfig index 42b7feba71b7..4891abbf16bc 100644 --- a/arch/xtensa/configs/s6105_defconfig +++ b/arch/xtensa/configs/s6105_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | |||
23 | # | 23 | # |
24 | CONFIG_EXPERIMENTAL=y | 24 | CONFIG_EXPERIMENTAL=y |
25 | CONFIG_BROKEN_ON_SMP=y | 25 | CONFIG_BROKEN_ON_SMP=y |
26 | CONFIG_LOCK_KERNEL=y | ||
27 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 26 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
28 | CONFIG_LOCALVERSION="" | 27 | CONFIG_LOCALVERSION="" |
29 | CONFIG_LOCALVERSION_AUTO=y | 28 | CONFIG_LOCALVERSION_AUTO=y |
diff --git a/arch/xtensa/include/asm/dma.h b/arch/xtensa/include/asm/dma.h index 137ca3945b07..bb099a373b5a 100644 --- a/arch/xtensa/include/asm/dma.h +++ b/arch/xtensa/include/asm/dma.h | |||
@@ -37,7 +37,7 @@ | |||
37 | * the size of the statically mapped kernel segment | 37 | * the size of the statically mapped kernel segment |
38 | * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB. | 38 | * (XCHAL_KSEG_{CACHED,BYPASS}_SIZE), ie. 128 MB. |
39 | * | 39 | * |
40 | * NOTE: When the entire KSEG area is DMA capable, we substract | 40 | * NOTE: When the entire KSEG area is DMA capable, we subtract |
41 | * one from the max address so that the virt_to_phys() macro | 41 | * one from the max address so that the virt_to_phys() macro |
42 | * works correctly on the address (otherwise the address | 42 | * works correctly on the address (otherwise the address |
43 | * enters another area, and virt_to_phys() may not return | 43 | * enters another area, and virt_to_phys() may not return |
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 5fd01f6aaf37..6223f3346b5c 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S | |||
@@ -1026,7 +1026,7 @@ ENTRY(fast_syscall_unrecoverable) | |||
1026 | * TRY adds an entry to the __ex_table fixup table for the immediately | 1026 | * TRY adds an entry to the __ex_table fixup table for the immediately |
1027 | * following instruction. | 1027 | * following instruction. |
1028 | * | 1028 | * |
1029 | * CATCH catches any exception that occurred at one of the preceeding TRY | 1029 | * CATCH catches any exception that occurred at one of the preceding TRY |
1030 | * statements and continues from there | 1030 | * statements and continues from there |
1031 | * | 1031 | * |
1032 | * Usage TRY l32i a0, a1, 0 | 1032 | * Usage TRY l32i a0, a1, 0 |
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index d77089df412e..4340ee076bd5 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c | |||
@@ -64,47 +64,41 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs) | |||
64 | 64 | ||
65 | int arch_show_interrupts(struct seq_file *p, int prec) | 65 | int arch_show_interrupts(struct seq_file *p, int prec) |
66 | { | 66 | { |
67 | int j; | ||
68 | |||
69 | seq_printf(p, "%*s: ", prec, "NMI"); | ||
70 | for_each_online_cpu(j) | ||
71 | seq_printf(p, "%10u ", nmi_count(j)); | ||
72 | seq_putc(p, '\n'); | ||
73 | seq_printf(p, "%*s: ", prec, "ERR"); | 67 | seq_printf(p, "%*s: ", prec, "ERR"); |
74 | seq_printf(p, "%10u\n", atomic_read(&irq_err_count)); | 68 | seq_printf(p, "%10u\n", atomic_read(&irq_err_count)); |
75 | return 0; | 69 | return 0; |
76 | } | 70 | } |
77 | 71 | ||
78 | static void xtensa_irq_mask(struct irq_chip *d) | 72 | static void xtensa_irq_mask(struct irq_data *d) |
79 | { | 73 | { |
80 | cached_irq_mask &= ~(1 << d->irq); | 74 | cached_irq_mask &= ~(1 << d->irq); |
81 | set_sr (cached_irq_mask, INTENABLE); | 75 | set_sr (cached_irq_mask, INTENABLE); |
82 | } | 76 | } |
83 | 77 | ||
84 | static void xtensa_irq_unmask(struct irq_chip *d) | 78 | static void xtensa_irq_unmask(struct irq_data *d) |
85 | { | 79 | { |
86 | cached_irq_mask |= 1 << d->irq; | 80 | cached_irq_mask |= 1 << d->irq; |
87 | set_sr (cached_irq_mask, INTENABLE); | 81 | set_sr (cached_irq_mask, INTENABLE); |
88 | } | 82 | } |
89 | 83 | ||
90 | static void xtensa_irq_enable(struct irq_chip *d) | 84 | static void xtensa_irq_enable(struct irq_data *d) |
91 | { | 85 | { |
92 | variant_irq_enable(d->irq); | 86 | variant_irq_enable(d->irq); |
93 | xtensa_irq_unmask(d->irq); | 87 | xtensa_irq_unmask(d->irq); |
94 | } | 88 | } |
95 | 89 | ||
96 | static void xtensa_irq_disable(struct irq_chip *d) | 90 | static void xtensa_irq_disable(struct irq_data *d) |
97 | { | 91 | { |
98 | xtensa_irq_mask(d->irq); | 92 | xtensa_irq_mask(d->irq); |
99 | variant_irq_disable(d->irq); | 93 | variant_irq_disable(d->irq); |
100 | } | 94 | } |
101 | 95 | ||
102 | static void xtensa_irq_ack(struct irq_chip *d) | 96 | static void xtensa_irq_ack(struct irq_data *d) |
103 | { | 97 | { |
104 | set_sr(1 << d->irq, INTCLEAR); | 98 | set_sr(1 << d->irq, INTCLEAR); |
105 | } | 99 | } |
106 | 100 | ||
107 | static int xtensa_irq_retrigger(struct irq_chip *d) | 101 | static int xtensa_irq_retrigger(struct irq_data *d) |
108 | { | 102 | { |
109 | set_sr (1 << d->irq, INTSET); | 103 | set_sr (1 << d->irq, INTSET); |
110 | return 1; | 104 | return 1; |