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-rw-r--r--arch/xtensa/kernel/entry.S22
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index b4b14a579a3c..b51ddb0dcf28 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -28,7 +28,6 @@
28 28
29/* Unimplemented features. */ 29/* Unimplemented features. */
30 30
31#undef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
32#undef KERNEL_STACK_OVERFLOW_CHECK 31#undef KERNEL_STACK_OVERFLOW_CHECK
33#undef PREEMPTIBLE_KERNEL 32#undef PREEMPTIBLE_KERNEL
34#undef ALLOCA_EXCEPTION_IN_IRAM 33#undef ALLOCA_EXCEPTION_IN_IRAM
@@ -431,11 +430,8 @@ common_exception_return:
431 _bbsi.l a4, TIF_NEED_RESCHED, 3f 430 _bbsi.l a4, TIF_NEED_RESCHED, 3f
432 _bbci.l a4, TIF_SIGPENDING, 4f 431 _bbci.l a4, TIF_SIGPENDING, 4f
433 432
434#ifndef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
435 l32i a4, a1, PT_DEPC 433 l32i a4, a1, PT_DEPC
436 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f 434 bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f
437#endif
438
439 /* Reenable interrupts and call do_signal() */ 435 /* Reenable interrupts and call do_signal() */
440 436
441 wsr a3, PS 437 wsr a3, PS
@@ -1247,16 +1243,6 @@ fast_syscall_spill_registers_fixup:
1247 * Note: This frame might be the same as above. 1243 * Note: This frame might be the same as above.
1248 */ 1244 */
1249 1245
1250#ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
1251 /* Restore registers we precautiously saved.
1252 * We have the value of the 'right' a3
1253 */
1254
1255 l32i a7, a2, PT_AREG5
1256 l32i a11, a2, PT_AREG6
1257 l32i a15, a2, PT_AREG7
1258#endif
1259
1260 /* Setup stack pointer. */ 1246 /* Setup stack pointer. */
1261 1247
1262 addi a2, a2, -PT_USER_SIZE 1248 addi a2, a2, -PT_USER_SIZE
@@ -1290,14 +1276,6 @@ fast_syscall_spill_registers_fixup_return:
1290 s32i a2, a3, EXC_TABLE_PARAM 1276 s32i a2, a3, EXC_TABLE_PARAM
1291 l32i a2, a3, EXC_TABLE_KSTK 1277 l32i a2, a3, EXC_TABLE_KSTK
1292 1278
1293#ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION
1294 /* Save registers again that might be clobbered. */
1295
1296 s32i a7, a2, PT_AREG5
1297 s32i a11, a2, PT_AREG6
1298 s32i a15, a2, PT_AREG7
1299#endif
1300
1301 /* Load WB at the time the exception occurred. */ 1279 /* Load WB at the time the exception occurred. */
1302 1280
1303 rsr a3, SAR # WB is still in SAR 1281 rsr a3, SAR # WB is still in SAR