diff options
Diffstat (limited to 'arch/xtensa/variants/fsf')
| -rw-r--r-- | arch/xtensa/variants/fsf/include/variant/tie.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/xtensa/variants/fsf/include/variant/tie.h b/arch/xtensa/variants/fsf/include/variant/tie.h index bf4020116df5..244cdea4dee5 100644 --- a/arch/xtensa/variants/fsf/include/variant/tie.h +++ b/arch/xtensa/variants/fsf/include/variant/tie.h | |||
| @@ -18,13 +18,6 @@ | |||
| 18 | #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */ | 18 | #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */ |
| 19 | #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ | 19 | #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ |
| 20 | 20 | ||
| 21 | /* Basic parameters of each coprocessor: */ | ||
| 22 | #define XCHAL_CP7_NAME "XTIOP" | ||
| 23 | #define XCHAL_CP7_IDENT XTIOP | ||
| 24 | #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */ | ||
| 25 | #define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */ | ||
| 26 | #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */ | ||
| 27 | |||
| 28 | /* Filler info for unassigned coprocessors, to simplify arrays etc: */ | 21 | /* Filler info for unassigned coprocessors, to simplify arrays etc: */ |
| 29 | #define XCHAL_NCP_SA_SIZE 0 | 22 | #define XCHAL_NCP_SA_SIZE 0 |
| 30 | #define XCHAL_NCP_SA_ALIGN 1 | 23 | #define XCHAL_NCP_SA_ALIGN 1 |
| @@ -42,6 +35,8 @@ | |||
| 42 | #define XCHAL_CP5_SA_ALIGN 1 | 35 | #define XCHAL_CP5_SA_ALIGN 1 |
| 43 | #define XCHAL_CP6_SA_SIZE 0 | 36 | #define XCHAL_CP6_SA_SIZE 0 |
| 44 | #define XCHAL_CP6_SA_ALIGN 1 | 37 | #define XCHAL_CP6_SA_ALIGN 1 |
| 38 | #define XCHAL_CP7_SA_SIZE 0 | ||
| 39 | #define XCHAL_CP7_SA_ALIGN 1 | ||
| 45 | 40 | ||
| 46 | /* Save area for non-coprocessor optional and custom (TIE) state: */ | 41 | /* Save area for non-coprocessor optional and custom (TIE) state: */ |
| 47 | #define XCHAL_NCP_SA_SIZE 0 | 42 | #define XCHAL_NCP_SA_SIZE 0 |