diff options
Diffstat (limited to 'arch/xtensa/kernel/entry.S')
-rw-r--r-- | arch/xtensa/kernel/entry.S | 36 |
1 files changed, 14 insertions, 22 deletions
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index 9e271ba009bf..8dc7a2c26ff9 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S | |||
@@ -125,8 +125,9 @@ _user_exception: | |||
125 | 125 | ||
126 | movi a2, 0 | 126 | movi a2, 0 |
127 | rsr a3, SAR | 127 | rsr a3, SAR |
128 | wsr a2, ICOUNTLEVEL | 128 | xsr a2, ICOUNTLEVEL |
129 | s32i a3, a1, PT_SAR | 129 | s32i a3, a1, PT_SAR |
130 | s32i a2, a1, PT_ICOUNTLEVEL | ||
130 | 131 | ||
131 | /* Rotate ws so that the current windowbase is at bit0. */ | 132 | /* Rotate ws so that the current windowbase is at bit0. */ |
132 | /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ | 133 | /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ |
@@ -276,8 +277,9 @@ _kernel_exception: | |||
276 | 277 | ||
277 | movi a2, 0 | 278 | movi a2, 0 |
278 | rsr a3, SAR | 279 | rsr a3, SAR |
279 | wsr a2, ICOUNTLEVEL | 280 | xsr a2, ICOUNTLEVEL |
280 | s32i a3, a1, PT_SAR | 281 | s32i a3, a1, PT_SAR |
282 | s32i a2, a1, PT_ICOUNTLEVEL | ||
281 | 283 | ||
282 | /* Rotate ws so that the current windowbase is at bit0. */ | 284 | /* Rotate ws so that the current windowbase is at bit0. */ |
283 | /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ | 285 | /* Assume ws = xxwww1yyyy. Rotate ws right, so that a2 = yyyyxxwww1 */ |
@@ -330,14 +332,16 @@ _kernel_exception: | |||
330 | 332 | ||
331 | common_exception: | 333 | common_exception: |
332 | 334 | ||
333 | /* Save EXCVADDR, DEBUGCAUSE, and PC, and clear LCOUNT */ | 335 | /* Save some registers, disable loops and clear the syscall flag. */ |
334 | 336 | ||
335 | rsr a2, DEBUGCAUSE | 337 | rsr a2, DEBUGCAUSE |
336 | rsr a3, EPC_1 | 338 | rsr a3, EPC_1 |
337 | s32i a2, a1, PT_DEBUGCAUSE | 339 | s32i a2, a1, PT_DEBUGCAUSE |
338 | s32i a3, a1, PT_PC | 340 | s32i a3, a1, PT_PC |
339 | 341 | ||
342 | movi a2, -1 | ||
340 | rsr a3, EXCVADDR | 343 | rsr a3, EXCVADDR |
344 | s32i a2, a1, PT_SYSCALL | ||
341 | movi a2, 0 | 345 | movi a2, 0 |
342 | s32i a3, a1, PT_EXCVADDR | 346 | s32i a3, a1, PT_EXCVADDR |
343 | xsr a2, LCOUNT | 347 | xsr a2, LCOUNT |
@@ -450,27 +454,8 @@ common_exception_return: | |||
450 | 454 | ||
451 | /* Restore the state of the task and return from the exception. */ | 455 | /* Restore the state of the task and return from the exception. */ |
452 | 456 | ||
453 | |||
454 | /* If we are returning from a user exception, and the process | ||
455 | * to run next has PT_SINGLESTEP set, we want to setup | ||
456 | * ICOUNT and ICOUNTLEVEL to step one instruction. | ||
457 | * PT_SINGLESTEP is set by sys_ptrace (ptrace.c) | ||
458 | */ | ||
459 | |||
460 | 4: /* a2 holds GET_CURRENT(a2,a1) */ | 457 | 4: /* a2 holds GET_CURRENT(a2,a1) */ |
461 | 458 | ||
462 | l32i a3, a2, TI_TASK | ||
463 | l32i a3, a3, TASK_PTRACE | ||
464 | bbci.l a3, PT_SINGLESTEP_BIT, 1f # jump if single-step flag is not set | ||
465 | |||
466 | movi a3, -2 # PT_SINGLESTEP flag is set, | ||
467 | movi a4, 1 # icountlevel of 1 means it won't | ||
468 | wsr a3, ICOUNT # start counting until after rfe | ||
469 | wsr a4, ICOUNTLEVEL # so setup icount & icountlevel. | ||
470 | isync | ||
471 | |||
472 | 1: | ||
473 | |||
474 | #if XCHAL_EXTRA_SA_SIZE | 459 | #if XCHAL_EXTRA_SA_SIZE |
475 | 460 | ||
476 | /* For user exceptions, restore the extra state from the user's TCB. */ | 461 | /* For user exceptions, restore the extra state from the user's TCB. */ |
@@ -665,6 +650,13 @@ common_exception_exit: | |||
665 | wsr a3, LEND | 650 | wsr a3, LEND |
666 | wsr a2, LCOUNT | 651 | wsr a2, LCOUNT |
667 | 652 | ||
653 | /* We control single stepping through the ICOUNTLEVEL register. */ | ||
654 | |||
655 | l32i a2, a1, PT_ICOUNTLEVEL | ||
656 | movi a3, -2 | ||
657 | wsr a2, ICOUNTLEVEL | ||
658 | wsr a3, ICOUNT | ||
659 | |||
668 | /* Check if it was double exception. */ | 660 | /* Check if it was double exception. */ |
669 | 661 | ||
670 | l32i a0, a1, PT_DEPC | 662 | l32i a0, a1, PT_DEPC |