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-rw-r--r--arch/xtensa/kernel/align.S42
1 files changed, 19 insertions, 23 deletions
diff --git a/arch/xtensa/kernel/align.S b/arch/xtensa/kernel/align.S
index a4956578a24d..33d6e9d2e83c 100644
--- a/arch/xtensa/kernel/align.S
+++ b/arch/xtensa/kernel/align.S
@@ -16,14 +16,9 @@
16 */ 16 */
17 17
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19#include <asm/ptrace.h>
20#include <asm/ptrace.h>
21#include <asm/current.h> 19#include <asm/current.h>
22#include <asm/asm-offsets.h> 20#include <asm/asm-offsets.h>
23#include <asm/pgtable.h>
24#include <asm/processor.h> 21#include <asm/processor.h>
25#include <asm/page.h>
26#include <asm/thread_info.h>
27 22
28#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION 23#if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
29 24
@@ -216,7 +211,7 @@ ENTRY(fast_unaligned)
216 211
217 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble 212 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble
218 213
219#if XCHAL_HAVE_NARROW 214#if XCHAL_HAVE_DENSITY
220 _beqi a5, OP0_L32I_N, .Lload # L32I.N, jump 215 _beqi a5, OP0_L32I_N, .Lload # L32I.N, jump
221 addi a6, a5, -OP0_S32I_N 216 addi a6, a5, -OP0_S32I_N
222 _beqz a6, .Lstore # S32I.N, do a store 217 _beqz a6, .Lstore # S32I.N, do a store
@@ -251,7 +246,7 @@ ENTRY(fast_unaligned)
251#endif 246#endif
252 __src_b a3, a5, a6 # a3 has the data word 247 __src_b a3, a5, a6 # a3 has the data word
253 248
254#if XCHAL_HAVE_NARROW 249#if XCHAL_HAVE_DENSITY
255 addi a7, a7, 2 # increment PC (assume 16-bit insn) 250 addi a7, a7, 2 # increment PC (assume 16-bit insn)
256 251
257 extui a5, a4, INSN_OP0, 4 252 extui a5, a4, INSN_OP0, 4
@@ -279,14 +274,14 @@ ENTRY(fast_unaligned)
279 274
2801: 2751:
281 276
282#if XCHAL_HAVE_LOOP 277#if XCHAL_HAVE_LOOPS
283 rsr a3, LEND # check if we reached LEND 278 rsr a5, LEND # check if we reached LEND
284 bne a7, a3, 1f 279 bne a7, a5, 1f
285 rsr a3, LCOUNT # and LCOUNT != 0 280 rsr a5, LCOUNT # and LCOUNT != 0
286 beqz a3, 1f 281 beqz a5, 1f
287 addi a3, a3, -1 # decrement LCOUNT and set 282 addi a5, a5, -1 # decrement LCOUNT and set
288 rsr a7, LBEG # set PC to LBEGIN 283 rsr a7, LBEG # set PC to LBEGIN
289 wsr a3, LCOUNT 284 wsr a5, LCOUNT
290#endif 285#endif
291 286
2921: wsr a7, EPC_1 # skip load instruction 2871: wsr a7, EPC_1 # skip load instruction
@@ -336,7 +331,7 @@ ENTRY(fast_unaligned)
336 331
337 movi a6, 0 # mask: ffffffff:00000000 332 movi a6, 0 # mask: ffffffff:00000000
338 333
339#if XCHAL_HAVE_NARROW 334#if XCHAL_HAVE_DENSITY
340 addi a7, a7, 2 # incr. PC,assume 16-bit instruction 335 addi a7, a7, 2 # incr. PC,assume 16-bit instruction
341 336
342 extui a5, a4, INSN_OP0, 4 # extract OP0 337 extui a5, a4, INSN_OP0, 4 # extract OP0
@@ -359,14 +354,14 @@ ENTRY(fast_unaligned)
359 /* Get memory address */ 354 /* Get memory address */
360 355
3611: 3561:
362#if XCHAL_HAVE_LOOP 357#if XCHAL_HAVE_LOOPS
363 rsr a3, LEND # check if we reached LEND 358 rsr a4, LEND # check if we reached LEND
364 bne a7, a3, 1f 359 bne a7, a4, 1f
365 rsr a3, LCOUNT # and LCOUNT != 0 360 rsr a4, LCOUNT # and LCOUNT != 0
366 beqz a3, 1f 361 beqz a4, 1f
367 addi a3, a3, -1 # decrement LCOUNT and set 362 addi a4, a4, -1 # decrement LCOUNT and set
368 rsr a7, LBEG # set PC to LBEGIN 363 rsr a7, LBEG # set PC to LBEGIN
369 wsr a3, LCOUNT 364 wsr a4, LCOUNT
370#endif 365#endif
371 366
3721: wsr a7, EPC_1 # skip store instruction 3671: wsr a7, EPC_1 # skip store instruction
@@ -416,6 +411,7 @@ ENTRY(fast_unaligned)
416 411
417 /* Restore working register */ 412 /* Restore working register */
418 413
414 l32i a8, a2, PT_AREG8
419 l32i a7, a2, PT_AREG7 415 l32i a7, a2, PT_AREG7
420 l32i a6, a2, PT_AREG6 416 l32i a6, a2, PT_AREG6
421 l32i a5, a2, PT_AREG5 417 l32i a5, a2, PT_AREG5
@@ -446,7 +442,7 @@ ENTRY(fast_unaligned)
446 mov a1, a2 442 mov a1, a2
447 443
448 rsr a0, PS 444 rsr a0, PS
449 bbsi.l a2, PS_UM_SHIFT, 1f # jump if user mode 445 bbsi.l a2, PS_UM_BIT, 1f # jump if user mode
450 446
451 movi a0, _kernel_exception 447 movi a0, _kernel_exception
452 jx a0 448 jx a0