diff options
Diffstat (limited to 'arch/xtensa/include/asm/atomic.h')
-rw-r--r-- | arch/xtensa/include/asm/atomic.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h index c3f289174c10..e7fb447bce8e 100644 --- a/arch/xtensa/include/asm/atomic.h +++ b/arch/xtensa/include/asm/atomic.h | |||
@@ -7,7 +7,7 @@ | |||
7 | * License. See the file "COPYING" in the main directory of this archive | 7 | * License. See the file "COPYING" in the main directory of this archive |
8 | * for more details. | 8 | * for more details. |
9 | * | 9 | * |
10 | * Copyright (C) 2001 - 2005 Tensilica Inc. | 10 | * Copyright (C) 2001 - 2008 Tensilica Inc. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #ifndef _XTENSA_ATOMIC_H | 13 | #ifndef _XTENSA_ATOMIC_H |
@@ -24,11 +24,11 @@ | |||
24 | 24 | ||
25 | /* | 25 | /* |
26 | * This Xtensa implementation assumes that the right mechanism | 26 | * This Xtensa implementation assumes that the right mechanism |
27 | * for exclusion is for locking interrupts to level 1. | 27 | * for exclusion is for locking interrupts to level EXCM_LEVEL. |
28 | * | 28 | * |
29 | * Locking interrupts looks like this: | 29 | * Locking interrupts looks like this: |
30 | * | 30 | * |
31 | * rsil a15, 1 | 31 | * rsil a15, LOCKLEVEL |
32 | * <code> | 32 | * <code> |
33 | * wsr a15, PS | 33 | * wsr a15, PS |
34 | * rsync | 34 | * rsync |