diff options
Diffstat (limited to 'arch/x86_64')
-rw-r--r-- | arch/x86_64/kernel/io_apic.c | 5 | ||||
-rw-r--r-- | arch/x86_64/kernel/mpparse.c | 12 |
2 files changed, 16 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index 77b4c608cca0..0de3ea938830 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -1777,6 +1777,8 @@ static inline void unlock_ExtINT_logic(void) | |||
1777 | spin_unlock_irqrestore(&ioapic_lock, flags); | 1777 | spin_unlock_irqrestore(&ioapic_lock, flags); |
1778 | } | 1778 | } |
1779 | 1779 | ||
1780 | int timer_uses_ioapic_pin_0; | ||
1781 | |||
1780 | /* | 1782 | /* |
1781 | * This code may look a bit paranoid, but it's supposed to cooperate with | 1783 | * This code may look a bit paranoid, but it's supposed to cooperate with |
1782 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ | 1784 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ |
@@ -1814,6 +1816,9 @@ static inline void check_timer(void) | |||
1814 | pin2 = ioapic_i8259.pin; | 1816 | pin2 = ioapic_i8259.pin; |
1815 | apic2 = ioapic_i8259.apic; | 1817 | apic2 = ioapic_i8259.apic; |
1816 | 1818 | ||
1819 | if (pin1 == 0) | ||
1820 | timer_uses_ioapic_pin_0 = 1; | ||
1821 | |||
1817 | apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", | 1822 | apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", |
1818 | vector, apic1, pin1, apic2, pin2); | 1823 | vector, apic1, pin1, apic2, pin2); |
1819 | 1824 | ||
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c index b17cf3eba359..083da7e606b1 100644 --- a/arch/x86_64/kernel/mpparse.c +++ b/arch/x86_64/kernel/mpparse.c | |||
@@ -968,7 +968,17 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) | |||
968 | */ | 968 | */ |
969 | int irq = gsi; | 969 | int irq = gsi; |
970 | if (gsi < MAX_GSI_NUM) { | 970 | if (gsi < MAX_GSI_NUM) { |
971 | if (gsi > 15) | 971 | /* |
972 | * Retain the VIA chipset work-around (gsi > 15), but | ||
973 | * avoid a problem where the 8254 timer (IRQ0) is setup | ||
974 | * via an override (so it's not on pin 0 of the ioapic), | ||
975 | * and at the same time, the pin 0 interrupt is a PCI | ||
976 | * type. The gsi > 15 test could cause these two pins | ||
977 | * to be shared as IRQ0, and they are not shareable. | ||
978 | * So test for this condition, and if necessary, avoid | ||
979 | * the pin collision. | ||
980 | */ | ||
981 | if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0)) | ||
972 | gsi = pci_irq++; | 982 | gsi = pci_irq++; |
973 | /* | 983 | /* |
974 | * Don't assign IRQ used by ACPI SCI | 984 | * Don't assign IRQ used by ACPI SCI |