31 files changed, 647 insertions, 356 deletions

diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index 010d2265f1cf..bfbb9bcae123 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -122,7 +122,7 @@ endchoice
 
 choice
         prompt "Processor family"
-        default MK8
+        default GENERIC_CPU
 
 config MK8
         bool "AMD-Opteron/Athlon64"
@@ -130,16 +130,31 @@ config MK8
           Optimize for AMD Opteron/Athlon64/Hammer/K8 CPUs.
 
 config MPSC
-       bool "Intel EM64T"
+       bool "Intel P4 / older Netburst based Xeon"
        help
-          Optimize for Intel Pentium 4 and Xeon CPUs with Intel
-          Extended Memory 64 Technology(EM64T). For details see
+          Optimize for Intel Pentium 4 and older Nocona/Dempsey Xeon CPUs
+          with Intel Extended Memory 64 Technology(EM64T). For details see
           <http://www.intel.com/technology/64bitextensions/>.
+          Note the the latest Xeons (Xeon 51xx and 53xx) are not based on the
+          Netburst core and shouldn't use this option. You can distingush them
+          using the cpu family field
+          in /proc/cpuinfo. Family 15 is a older Xeon, Family 6 a newer one
+          (this rule only applies to system that support EM64T)
+
+config MCORE2
+        bool "Intel Core2 / newer Xeon"
+        help
+          Optimize for Intel Core2 and newer Xeons (51xx)
+          You can distingush the newer Xeons from the older ones using
+          the cpu family field in /proc/cpuinfo. 15 is a older Xeon
+          (use CONFIG_MPSC then), 6 is a newer one. This rule only
+          applies to CPUs that support EM64T.
 
 config GENERIC_CPU
         bool "Generic-x86-64"
         help
           Generic x86-64 CPU.
+          Run equally well on all x86-64 CPUs.
 
 endchoice
 
@@ -149,12 +164,12 @@ endchoice
 config X86_L1_CACHE_BYTES
         int
         default "128" if GENERIC_CPU || MPSC
-        default "64" if MK8
+        default "64" if MK8 || MCORE2
 
 config X86_L1_CACHE_SHIFT
         int
         default "7" if GENERIC_CPU || MPSC
-        default "6" if MK8
+        default "6" if MK8 || MCORE2
 
 config X86_INTERNODE_CACHE_BYTES
         int
@@ -344,11 +359,6 @@ config ARCH_DISCONTIGMEM_ENABLE
        depends on NUMA
        default y
 
-
-config ARCH_DISCONTIGMEM_ENABLE
-        def_bool y
-        depends on NUMA
-
 config ARCH_DISCONTIGMEM_DEFAULT
         def_bool y
         depends on NUMA
@@ -455,6 +465,17 @@ config CALGARY_IOMMU
           Normally the kernel will make the right choice by itself.
           If unsure, say Y.
 
+config CALGARY_IOMMU_ENABLED_BY_DEFAULT
+        bool "Should Calgary be enabled by default?"
+        default y
+        depends on CALGARY_IOMMU
+        help
+          Should Calgary be enabled by default? if you choose 'y', Calgary
+          will be used (if it exists). If you choose 'n', Calgary will not be
+          used even if it exists. If you choose 'n' and would like to use
+          Calgary anyway, pass 'iommu=calgary' on the kernel command line.
+          If unsure, say Y.
+
 # need this always selected by IOMMU for the VIA workaround
 config SWIOTLB
         bool
diff --git a/arch/x86_64/Makefile b/arch/x86_64/Makefile
index 6e38d4daeed7..b471b8550d03 100644
--- a/arch/x86_64/Makefile
+++ b/arch/x86_64/Makefile
@@ -30,6 +30,10 @@ cflags-y	:=
 cflags-kernel-y :=
 cflags-$(CONFIG_MK8) += $(call cc-option,-march=k8)
 cflags-$(CONFIG_MPSC) += $(call cc-option,-march=nocona)
+# gcc doesn't support -march=core2 yet as of gcc 4.3, but I hope it
+# will eventually. Use -mtune=generic as fallback
+cflags-$(CONFIG_MCORE2) += \
+        $(call cc-option,-march=core2,$(call cc-option,-mtune=generic))
 cflags-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=generic)
 
 cflags-y += -m64
diff --git a/arch/x86_64/defconfig b/arch/x86_64/defconfig
index 0f5d44e86be5..96f226cfb339 100644
--- a/arch/x86_64/defconfig
+++ b/arch/x86_64/defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.19-rc2-git4
-# Sat Oct 21 03:38:52 2006
+# Linux kernel version: 2.6.19-git7
+# Wed Dec  6 23:50:47 2006
 #
 CONFIG_X86_64=y
 CONFIG_64BIT=y
@@ -47,13 +47,14 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 # CONFIG_CPUSETS is not set
+CONFIG_SYSFS_DEPRECATED=y
 # CONFIG_RELAY is not set
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
-# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -87,9 +88,7 @@ CONFIG_STOP_MACHINE=y
 # Block layer
 #
 CONFIG_BLOCK=y
-CONFIG_LBD=y
 # CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 
 #
 # IO Schedulers
@@ -111,10 +110,11 @@ CONFIG_X86_PC=y
 # CONFIG_X86_VSMP is not set
 # CONFIG_MK8 is not set
 # CONFIG_MPSC is not set
-CONFIG_GENERIC_CPU=y
-CONFIG_X86_L1_CACHE_BYTES=128
-CONFIG_X86_L1_CACHE_SHIFT=7
-CONFIG_X86_INTERNODE_CACHE_BYTES=128
+CONFIG_MCORE2=y
+# CONFIG_GENERIC_CPU is not set
+CONFIG_X86_L1_CACHE_BYTES=64
+CONFIG_X86_L1_CACHE_SHIFT=6
+CONFIG_X86_INTERNODE_CACHE_BYTES=64
 CONFIG_X86_TSC=y
 CONFIG_X86_GOOD_APIC=y
 # CONFIG_MICROCODE is not set
@@ -322,6 +322,7 @@ CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
 CONFIG_IPV6=y
 # CONFIG_IPV6_PRIVACY is not set
 # CONFIG_IPV6_ROUTER_PREF is not set
@@ -624,6 +625,7 @@ CONFIG_SATA_INTEL_COMBINED=y
 # CONFIG_PATA_IT821X is not set
 # CONFIG_PATA_JMICRON is not set
 # CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
 # CONFIG_PATA_MPIIX is not set
 # CONFIG_PATA_OLDPIIX is not set
 # CONFIG_PATA_NETCELL is not set
@@ -795,6 +797,7 @@ CONFIG_BNX2=y
 CONFIG_S2IO=m
 # CONFIG_S2IO_NAPI is not set
 # CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
 
 #
 # Token Ring devices
@@ -927,10 +930,6 @@ CONFIG_RTC=y
 # CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
 CONFIG_AGP=y
 CONFIG_AGP_AMD64=y
 CONFIG_AGP_INTEL=y
@@ -1135,6 +1134,7 @@ CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_BANDWIDTH is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_MULTITHREAD_PROBE is not set
 # CONFIG_USB_OTG is not set
 
 #
@@ -1212,6 +1212,7 @@ CONFIG_USB_HIDINPUT=y
 # CONFIG_USB_KAWETH is not set
 # CONFIG_USB_PEGASUS is not set
 # CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET_MII is not set
 # CONFIG_USB_USBNET is not set
 CONFIG_USB_MON=y
 
diff --git a/arch/x86_64/ia32/ia32_signal.c b/arch/x86_64/ia32/ia32_signal.c
index 0e0a266d976f..ff499ef2a1ba 100644
--- a/arch/x86_64/ia32/ia32_signal.c
+++ b/arch/x86_64/ia32/ia32_signal.c
@@ -584,6 +584,11 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
         regs->rdx = (unsigned long) &frame->info;
         regs->rcx = (unsigned long) &frame->uc;
 
+        /* Make -mregparm=3 work */
+        regs->rax = sig;
+        regs->rdx = (unsigned long) &frame->info;
+        regs->rcx = (unsigned long) &frame->uc;
+
         asm volatile("movl %0,%%ds" :: "r" (__USER32_DS)); 
         asm volatile("movl %0,%%es" :: "r" (__USER32_DS)); 
         
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index 4d9d5ed942b2..124b2d27b4ac 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -25,6 +25,7 @@
 #include <linux/kernel_stat.h>
 #include <linux/sysdev.h>
 #include <linux/module.h>
+#include <linux/ioport.h>
 
 #include <asm/atomic.h>
 #include <asm/smp.h>
@@ -45,6 +46,12 @@ int apic_calibrate_pmtmr __initdata;
 
 int disable_apic_timer __initdata;
 
+static struct resource *ioapic_resources;
+static struct resource lapic_resource = {
+        .name = "Local APIC",
+        .flags = IORESOURCE_MEM | IORESOURCE_BUSY,
+};
+
 /*
  * cpu_mask that denotes the CPUs that needs timer interrupt coming in as
  * IPIs in place of local APIC timers
@@ -133,7 +140,6 @@ void clear_local_APIC(void)
                 apic_write(APIC_LVTERR, APIC_LVT_MASKED);
         if (maxlvt >= 4)
                 apic_write(APIC_LVTPC, APIC_LVT_MASKED);
-        v = GET_APIC_VERSION(apic_read(APIC_LVR));
         apic_write(APIC_ESR, 0);
         apic_read(APIC_ESR);
 }
@@ -452,23 +458,30 @@ static struct {
 static int lapic_suspend(struct sys_device *dev, pm_message_t state)
 {
         unsigned long flags;
+        int maxlvt;
 
         if (!apic_pm_state.active)
                 return 0;
 
+        maxlvt = get_maxlvt();
+
         apic_pm_state.apic_id = apic_read(APIC_ID);
         apic_pm_state.apic_taskpri = apic_read(APIC_TASKPRI);
         apic_pm_state.apic_ldr = apic_read(APIC_LDR);
         apic_pm_state.apic_dfr = apic_read(APIC_DFR);
         apic_pm_state.apic_spiv = apic_read(APIC_SPIV);
         apic_pm_state.apic_lvtt = apic_read(APIC_LVTT);
-        apic_pm_state.apic_lvtpc = apic_read(APIC_LVTPC);
+        if (maxlvt >= 4)
+                apic_pm_state.apic_lvtpc = apic_read(APIC_LVTPC);
         apic_pm_state.apic_lvt0 = apic_read(APIC_LVT0);
         apic_pm_state.apic_lvt1 = apic_read(APIC_LVT1);
         apic_pm_state.apic_lvterr = apic_read(APIC_LVTERR);
         apic_pm_state.apic_tmict = apic_read(APIC_TMICT);
         apic_pm_state.apic_tdcr = apic_read(APIC_TDCR);
-        apic_pm_state.apic_thmr = apic_read(APIC_LVTTHMR);
+#ifdef CONFIG_X86_MCE_INTEL
+        if (maxlvt >= 5)
+                apic_pm_state.apic_thmr = apic_read(APIC_LVTTHMR);
+#endif
         local_irq_save(flags);
         disable_local_APIC();
         local_irq_restore(flags);
@@ -479,10 +492,13 @@ static int lapic_resume(struct sys_device *dev)
 {
         unsigned int l, h;
         unsigned long flags;
+        int maxlvt;
 
         if (!apic_pm_state.active)
                 return 0;
 
+        maxlvt = get_maxlvt();
+
         local_irq_save(flags);
         rdmsr(MSR_IA32_APICBASE, l, h);
         l &= ~MSR_IA32_APICBASE_BASE;
@@ -496,8 +512,12 @@ static int lapic_resume(struct sys_device *dev)
         apic_write(APIC_SPIV, apic_pm_state.apic_spiv);
         apic_write(APIC_LVT0, apic_pm_state.apic_lvt0);
         apic_write(APIC_LVT1, apic_pm_state.apic_lvt1);
-        apic_write(APIC_LVTTHMR, apic_pm_state.apic_thmr);
-        apic_write(APIC_LVTPC, apic_pm_state.apic_lvtpc);
+#ifdef CONFIG_X86_MCE_INTEL
+        if (maxlvt >= 5)
+                apic_write(APIC_LVTTHMR, apic_pm_state.apic_thmr);
+#endif
+        if (maxlvt >= 4)
+                apic_write(APIC_LVTPC, apic_pm_state.apic_lvtpc);
         apic_write(APIC_LVTT, apic_pm_state.apic_lvtt);
         apic_write(APIC_TDCR, apic_pm_state.apic_tdcr);
         apic_write(APIC_TMICT, apic_pm_state.apic_tmict);
@@ -585,6 +605,64 @@ static int __init detect_init_APIC (void)
         return 0;
 }
 
+#ifdef CONFIG_X86_IO_APIC
+static struct resource * __init ioapic_setup_resources(void)
+{
+#define IOAPIC_RESOURCE_NAME_SIZE 11
+        unsigned long n;
+        struct resource *res;
+        char *mem;
+        int i;
+
+        if (nr_ioapics <= 0)
+                return NULL;
+
+        n = IOAPIC_RESOURCE_NAME_SIZE + sizeof(struct resource);
+        n *= nr_ioapics;
+
+        mem = alloc_bootmem(n);
+        res = (void *)mem;
+
+        if (mem != NULL) {
+                memset(mem, 0, n);
+                mem += sizeof(struct resource) * nr_ioapics;
+
+                for (i = 0; i < nr_ioapics; i++) {
+                        res[i].name = mem;
+                        res[i].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+                        sprintf(mem,  "IOAPIC %u", i);
+                        mem += IOAPIC_RESOURCE_NAME_SIZE;
+                }
+        }
+
+        ioapic_resources = res;
+
+        return res;
+}
+
+static int __init ioapic_insert_resources(void)
+{
+        int i;
+        struct resource *r = ioapic_resources;
+
+        if (!r) {
+                printk("IO APIC resources could be not be allocated.\n");
+                return -1;
+        }
+
+        for (i = 0; i < nr_ioapics; i++) {
+                insert_resource(&iomem_resource, r);
+                r++;
+        }
+
+        return 0;
+}
+
+/* Insert the IO APIC resources after PCI initialization has occured to handle
+ * IO APICS that are mapped in on a BAR in PCI space. */
+late_initcall(ioapic_insert_resources);
+#endif
+
 void __init init_apic_mappings(void)
 {
         unsigned long apic_phys;
@@ -604,6 +682,11 @@ void __init init_apic_mappings(void)
         apic_mapped = 1;
         apic_printk(APIC_VERBOSE,"mapped APIC to %16lx (%16lx)\n", APIC_BASE, apic_phys);
 
+        /* Put local APIC into the resource map. */
+        lapic_resource.start = apic_phys;
+        lapic_resource.end = lapic_resource.start + PAGE_SIZE - 1;
+        insert_resource(&iomem_resource, &lapic_resource);
+
         /*
          * Fetch the APIC ID of the BSP in case we have a
          * default configuration (or the MP table is broken).
@@ -613,7 +696,9 @@ void __init init_apic_mappings(void)
         {
                 unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0;
                 int i;
+                struct resource *ioapic_res;
 
+                ioapic_res = ioapic_setup_resources();
                 for (i = 0; i < nr_ioapics; i++) {
                         if (smp_found_config) {
                                 ioapic_phys = mp_ioapics[i].mpc_apicaddr;
@@ -625,6 +710,12 @@ void __init init_apic_mappings(void)
                         apic_printk(APIC_VERBOSE,"mapped IOAPIC to %016lx (%016lx)\n",
                                         __fix_to_virt(idx), ioapic_phys);
                         idx++;
+
+                        if (ioapic_res != NULL) {
+                                ioapic_res->start = ioapic_phys;
+                                ioapic_res->end = ioapic_phys + (4 * 1024) - 1;
+                                ioapic_res++;
+                        }
                 }
         }
 }
@@ -644,10 +735,9 @@ void __init init_apic_mappings(void)
 
 static void __setup_APIC_LVTT(unsigned int clocks)
 {
-        unsigned int lvtt_value, tmp_value, ver;
+        unsigned int lvtt_value, tmp_value;
         int cpu = smp_processor_id();
 
-        ver = GET_APIC_VERSION(apic_read(APIC_LVR));
         lvtt_value = APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR;
 
         if (cpu_isset(cpu, timer_interrupt_broadcast_ipi_mask))
diff --git a/arch/x86_64/kernel/early-quirks.c b/arch/x86_64/kernel/early-quirks.c
index 68273bff58cc..829698f6d049 100644
--- a/arch/x86_64/kernel/early-quirks.c
+++ b/arch/x86_64/kernel/early-quirks.c
@@ -69,11 +69,18 @@ static void nvidia_bugs(void)
 
 static void ati_bugs(void)
 {
-        if (timer_over_8254 == 1) {
-                timer_over_8254 = 0;
-                printk(KERN_INFO
-                "ATI board detected. Disabling timer routing over 8254.\n");
-        }
+}
+
+static void intel_bugs(void)
+{
+        u16 device = read_pci_config_16(0, 0, 0, PCI_DEVICE_ID);
+
+#ifdef CONFIG_SMP
+        if (device == PCI_DEVICE_ID_INTEL_E7320_MCH ||
+            device == PCI_DEVICE_ID_INTEL_E7520_MCH ||
+            device == PCI_DEVICE_ID_INTEL_E7525_MCH)
+                quirk_intel_irqbalance();
+#endif
 }
 
 struct chipset {
@@ -85,6 +92,7 @@ static struct chipset early_qrk[] = {
         { PCI_VENDOR_ID_NVIDIA, nvidia_bugs },
         { PCI_VENDOR_ID_VIA, via_bugs },
         { PCI_VENDOR_ID_ATI, ati_bugs },
+        { PCI_VENDOR_ID_INTEL, intel_bugs},
         {}
 };
 
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S
index 7d401b00d822..601d332c4b79 100644
--- a/arch/x86_64/kernel/entry.S
+++ b/arch/x86_64/kernel/entry.S
@@ -230,7 +230,6 @@ ENTRY(system_call)
         CFI_REL_OFFSET rip,RIP-ARGOFFSET
         GET_THREAD_INFO(%rcx)
         testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP),threadinfo_flags(%rcx)
-        CFI_REMEMBER_STATE
         jnz tracesys
         cmpq $__NR_syscall_max,%rax
         ja badsys
@@ -241,7 +240,6 @@ ENTRY(system_call)
  * Syscall return path ending with SYSRET (fast path)
  * Has incomplete stack frame and undefined top of stack. 
  */             
-        .globl ret_from_sys_call
 ret_from_sys_call:
         movl $_TIF_ALLWORK_MASK,%edi
         /* edi: flagmask */
@@ -251,8 +249,8 @@ sysret_check:
         TRACE_IRQS_OFF
         movl threadinfo_flags(%rcx),%edx
         andl %edi,%edx
-        CFI_REMEMBER_STATE
         jnz  sysret_careful 
+        CFI_REMEMBER_STATE
         /*
          * sysretq will re-enable interrupts:
          */
@@ -265,10 +263,10 @@ sysret_check:
         swapgs
         sysretq
 
+        CFI_RESTORE_STATE
         /* Handle reschedules */
         /* edx: work, edi: workmask */  
 sysret_careful:
-        CFI_RESTORE_STATE
         bt $TIF_NEED_RESCHED,%edx
         jnc sysret_signal
         TRACE_IRQS_ON
@@ -306,7 +304,6 @@ badsys:
 
         /* Do syscall tracing */
 tracesys:                        
-        CFI_RESTORE_STATE
         SAVE_REST
         movq $-ENOSYS,RAX(%rsp)
         FIXUP_TOP_OF_STACK %rdi
@@ -322,32 +319,13 @@ tracesys:
         call *sys_call_table(,%rax,8)
 1:      movq %rax,RAX-ARGOFFSET(%rsp)
         /* Use IRET because user could have changed frame */
-        jmp int_ret_from_sys_call
-        CFI_ENDPROC
-END(system_call)
                 
 /* 
  * Syscall return path ending with IRET.
  * Has correct top of stack, but partial stack frame.
- */     
-ENTRY(int_ret_from_sys_call)
-        CFI_STARTPROC   simple
-        CFI_SIGNAL_FRAME
-        CFI_DEF_CFA     rsp,SS+8-ARGOFFSET
-        /*CFI_REL_OFFSET        ss,SS-ARGOFFSET*/
-        CFI_REL_OFFSET  rsp,RSP-ARGOFFSET
-        /*CFI_REL_OFFSET        rflags,EFLAGS-ARGOFFSET*/
-        /*CFI_REL_OFFSET        cs,CS-ARGOFFSET*/
-        CFI_REL_OFFSET  rip,RIP-ARGOFFSET
-        CFI_REL_OFFSET  rdx,RDX-ARGOFFSET
-        CFI_REL_OFFSET  rcx,RCX-ARGOFFSET
-        CFI_REL_OFFSET  rax,RAX-ARGOFFSET
-        CFI_REL_OFFSET  rdi,RDI-ARGOFFSET
-        CFI_REL_OFFSET  rsi,RSI-ARGOFFSET
-        CFI_REL_OFFSET  r8,R8-ARGOFFSET
-        CFI_REL_OFFSET  r9,R9-ARGOFFSET
-        CFI_REL_OFFSET  r10,R10-ARGOFFSET
-        CFI_REL_OFFSET  r11,R11-ARGOFFSET
+ */
+        .globl int_ret_from_sys_call
+int_ret_from_sys_call:
         cli
         TRACE_IRQS_OFF
         testl $3,CS-ARGOFFSET(%rsp)
@@ -394,8 +372,6 @@ int_very_careful:
         popq %rdi
         CFI_ADJUST_CFA_OFFSET -8
         andl $~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP),%edi
-        cli
-        TRACE_IRQS_OFF
         jmp int_restore_rest
         
 int_signal:
@@ -411,7 +387,7 @@ int_restore_rest:
         TRACE_IRQS_OFF
         jmp int_with_check
         CFI_ENDPROC
-END(int_ret_from_sys_call)
+END(system_call)
                 
 /* 
  * Certain special system calls that need to save a complete full stack frame.
diff --git a/arch/x86_64/kernel/genapic.c b/arch/x86_64/kernel/genapic.c
index 8e78a75d1866..b007433f96bb 100644
--- a/arch/x86_64/kernel/genapic.c
+++ b/arch/x86_64/kernel/genapic.c
@@ -33,7 +33,7 @@ extern struct genapic apic_flat;
 extern struct genapic apic_physflat;
 
 struct genapic *genapic = &apic_flat;
-
+struct genapic *genapic_force;
 
 /*
  * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode.
@@ -46,6 +46,13 @@ void __init clustered_apic_check(void)
         u8 cluster_cnt[NUM_APIC_CLUSTERS];
         int max_apic = 0;
 
+        /* genapic selection can be forced because of certain quirks.
+         */
+        if (genapic_force) {
+                genapic = genapic_force;
+                goto print;
+        }
+
 #if defined(CONFIG_ACPI)
         /*
          * Some x86_64 machines use physical APIC mode regardless of how many
diff --git a/arch/x86_64/kernel/head64.c b/arch/x86_64/kernel/head64.c
index 9561eb3c5b5c..cc230b93cd1c 100644
--- a/arch/x86_64/kernel/head64.c
+++ b/arch/x86_64/kernel/head64.c
@@ -57,10 +57,12 @@ void __init x86_64_start_kernel(char * real_mode_data)
 {
         int i;
 
-        for (i = 0; i < 256; i++)
+        /* clear bss before set_intr_gate with early_idt_handler */
+        clear_bss();
+
+        for (i = 0; i < IDT_ENTRIES; i++)
                 set_intr_gate(i, early_idt_handler);
         asm volatile("lidt %0" :: "m" (idt_descr));
-        clear_bss();
 
         early_printk("Kernel alive\n");
 
diff --git a/arch/x86_64/kernel/i387.c b/arch/x86_64/kernel/i387.c
index 3aa1e9bb781d..1d58c13bc6bc 100644
--- a/arch/x86_64/kernel/i387.c
+++ b/arch/x86_64/kernel/i387.c
@@ -82,11 +82,8 @@ int save_i387(struct _fpstate __user *buf)
         struct task_struct *tsk = current;
         int err = 0;
 
-        { 
-                extern void bad_user_i387_struct(void); 
-                if (sizeof(struct user_i387_struct) != sizeof(tsk->thread.i387.fxsave))
-                        bad_user_i387_struct();
-        } 
+        BUILD_BUG_ON(sizeof(struct user_i387_struct) !=
+                        sizeof(tsk->thread.i387.fxsave));
 
         if ((unsigned long)buf % 16) 
                 printk("save_i387: bad fpstate %p\n",buf); 
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c
index c4ef801b765b..d73c79e821f1 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86_64/kernel/i8259.c
@@ -76,7 +76,8 @@ BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf)
         IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
         IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
 
-void (*interrupt[NR_IRQS])(void) = {
+/* for the irq vectors */
+static void (*interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = {
                                           IRQLIST_16(0x2), IRQLIST_16(0x3),
         IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
         IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index c80081a6ba41..2a1dcd5f69c2 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -55,10 +55,6 @@ int sis_apic_bug; /* not actually supported, dummy for compile */
 
 static int no_timer_check;
 
-static int disable_timer_pin_1 __initdata;
-
-int timer_over_8254 __initdata = 1;
-
 /* Where if anywhere is the i8259 connect in external int mode */
 static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
 
@@ -178,14 +174,20 @@ static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin)
  * the interrupt, and we need to make sure the entry is fully populated
  * before that happens.
  */
-static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
+static void
+__ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
 {
-        unsigned long flags;
         union entry_union eu;
         eu.entry = e;
-        spin_lock_irqsave(&ioapic_lock, flags);
         io_apic_write(apic, 0x11 + 2*pin, eu.w2);
         io_apic_write(apic, 0x10 + 2*pin, eu.w1);
+}
+
+static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&ioapic_lock, flags);
+        __ioapic_write_entry(apic, pin, e);
         spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 
@@ -348,29 +350,6 @@ static int __init disable_ioapic_setup(char *str)
 }
 early_param("noapic", disable_ioapic_setup);
 
-/* Actually the next is obsolete, but keep it for paranoid reasons -AK */
-static int __init disable_timer_pin_setup(char *arg)
-{
-        disable_timer_pin_1 = 1;
-        return 1;
-}
-__setup("disable_timer_pin_1", disable_timer_pin_setup);
-
-static int __init setup_disable_8254_timer(char *s)
-{
-        timer_over_8254 = -1;
-        return 1;
-}
-static int __init setup_enable_8254_timer(char *s)
-{
-        timer_over_8254 = 2;
-        return 1;
-}
-
-__setup("disable_8254_timer", setup_disable_8254_timer);
-__setup("enable_8254_timer", setup_enable_8254_timer);
-
-
 /*
  * Find the IRQ entry number of a certain pin.
  */
@@ -750,6 +729,22 @@ static int assign_irq_vector(int irq, cpumask_t mask, cpumask_t *result)
         return vector;
 }
 
+static void __clear_irq_vector(int irq)
+{
+        cpumask_t mask;
+        int cpu, vector;
+
+        BUG_ON(!irq_vector[irq]);
+
+        vector = irq_vector[irq];
+        cpus_and(mask, irq_domain[irq], cpu_online_map);
+        for_each_cpu_mask(cpu, mask)
+                per_cpu(vector_irq, cpu)[vector] = -1;
+
+        irq_vector[irq] = 0;
+        irq_domain[irq] = CPU_MASK_NONE;
+}
+
 void __setup_vector_irq(int cpu)
 {
         /* Initialize vector_irq on a new cpu */
@@ -794,27 +789,65 @@ static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
                                               handle_edge_irq, "edge");
         }
 }
-
-static void __init setup_IO_APIC_irqs(void)
+static void __init setup_IO_APIC_irq(int apic, int pin, int idx, int irq)
 {
         struct IO_APIC_route_entry entry;
-        int apic, pin, idx, irq, first_notcon = 1, vector;
+        int vector;
         unsigned long flags;
 
-        apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
 
-        for (apic = 0; apic < nr_ioapics; apic++) {
-        for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
+        /*
+         * add it to the IO-APIC irq-routing table:
+         */
+        memset(&entry,0,sizeof(entry));
 
-                /*
-                 * add it to the IO-APIC irq-routing table:
-                 */
-                memset(&entry,0,sizeof(entry));
+        entry.delivery_mode = INT_DELIVERY_MODE;
+        entry.dest_mode = INT_DEST_MODE;
+        entry.mask = 0;                         /* enable IRQ */
+        entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
+
+        entry.trigger = irq_trigger(idx);
+        entry.polarity = irq_polarity(idx);
 
-                entry.delivery_mode = INT_DELIVERY_MODE;
-                entry.dest_mode = INT_DEST_MODE;
-                entry.mask = 0;                         /* enable IRQ */
+        if (irq_trigger(idx)) {
+                entry.trigger = 1;
+                entry.mask = 1;
                 entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
+        }
+
+        if (!apic && !IO_APIC_IRQ(irq))
+                return;
+
+        if (IO_APIC_IRQ(irq)) {
+                cpumask_t mask;
+                vector = assign_irq_vector(irq, TARGET_CPUS, &mask);
+                if (vector < 0)
+                        return;
+
+                entry.dest.logical.logical_dest = cpu_mask_to_apicid(mask);
+                entry.vector = vector;
+
+                ioapic_register_intr(irq, vector, IOAPIC_AUTO);
+                if (!apic && (irq < 16))
+                        disable_8259A_irq(irq);
+        }
+
+        ioapic_write_entry(apic, pin, entry);
+
+        spin_lock_irqsave(&ioapic_lock, flags);
+        set_native_irq_info(irq, TARGET_CPUS);
+        spin_unlock_irqrestore(&ioapic_lock, flags);
+
+}
+
+static void __init setup_IO_APIC_irqs(void)
+{
+        int apic, pin, idx, irq, first_notcon = 1;
+
+        apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
+
+        for (apic = 0; apic < nr_ioapics; apic++) {
+        for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
 
                 idx = find_irq_entry(apic,pin,mp_INT);
                 if (idx == -1) {
@@ -826,39 +859,11 @@ static void __init setup_IO_APIC_irqs(void)
                         continue;
                 }
 
-                entry.trigger = irq_trigger(idx);
-                entry.polarity = irq_polarity(idx);
-
-                if (irq_trigger(idx)) {
-                        entry.trigger = 1;
-                        entry.mask = 1;
-                        entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
-                }
-
                 irq = pin_2_irq(idx, apic, pin);
                 add_pin_to_irq(irq, apic, pin);
 
-                if (!apic && !IO_APIC_IRQ(irq))
-                        continue;
-
-                if (IO_APIC_IRQ(irq)) {
-                        cpumask_t mask;
-                        vector = assign_irq_vector(irq, TARGET_CPUS, &mask);
-                        if (vector < 0)
-                                continue;
-
-                        entry.dest.logical.logical_dest = cpu_mask_to_apicid(mask);
-                        entry.vector = vector;
-
-                        ioapic_register_intr(irq, vector, IOAPIC_AUTO);
-                        if (!apic && (irq < 16))
-                                disable_8259A_irq(irq);
-                }
-                ioapic_write_entry(apic, pin, entry);
+                setup_IO_APIC_irq(apic, pin, idx, irq);
 
-                spin_lock_irqsave(&ioapic_lock, flags);
-                set_native_irq_info(irq, TARGET_CPUS);
-                spin_unlock_irqrestore(&ioapic_lock, flags);
         }
         }
 
@@ -1563,10 +1568,33 @@ static inline void unlock_ExtINT_logic(void)
  * a wide range of boards and BIOS bugs.  Fortunately only the timer IRQ
  * is so screwy.  Thanks to Brian Perkins for testing/hacking this beast
  * fanatically on his truly buggy board.
- *
- * FIXME: really need to revamp this for modern platforms only.
  */
-static inline void check_timer(void)
+
+static int try_apic_pin(int apic, int pin, char *msg)
+{
+        apic_printk(APIC_VERBOSE, KERN_INFO
+                    "..TIMER: trying IO-APIC=%d PIN=%d %s",
+                    apic, pin, msg);
+
+        /*
+         * Ok, does IRQ0 through the IOAPIC work?
+         */
+        if (!no_timer_check && timer_irq_works()) {
+                nmi_watchdog_default();
+                if (nmi_watchdog == NMI_IO_APIC) {
+                        disable_8259A_irq(0);
+                        setup_nmi();
+                        enable_8259A_irq(0);
+                }
+                return 1;
+        }
+        clear_IO_APIC_pin(apic, pin);
+        apic_printk(APIC_QUIET, KERN_ERR " .. failed\n");
+        return 0;
+}
+
+/* The function from hell */
+static void check_timer(void)
 {
         int apic1, pin1, apic2, pin2;
         int vector;
@@ -1587,61 +1615,43 @@ static inline void check_timer(void)
          */
         apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
         init_8259A(1);
-        if (timer_over_8254 > 0)
-                enable_8259A_irq(0);
 
         pin1  = find_isa_irq_pin(0, mp_INT);
         apic1 = find_isa_irq_apic(0, mp_INT);
         pin2  = ioapic_i8259.pin;
         apic2 = ioapic_i8259.apic;
 
-        apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
-                vector, apic1, pin1, apic2, pin2);
+        /* Do this first, otherwise we get double interrupts on ATI boards */
+        if ((pin1 != -1) && try_apic_pin(apic1, pin1,"with 8259 IRQ0 disabled"))
+                return;
 
-        if (pin1 != -1) {
-                /*
-                 * Ok, does IRQ0 through the IOAPIC work?
-                 */
-                unmask_IO_APIC_irq(0);
-                if (!no_timer_check && timer_irq_works()) {
-                        nmi_watchdog_default();
-                        if (nmi_watchdog == NMI_IO_APIC) {
-                                disable_8259A_irq(0);
-                                setup_nmi();
-                                enable_8259A_irq(0);
-                        }
-                        if (disable_timer_pin_1 > 0)
-                                clear_IO_APIC_pin(0, pin1);
-                        return;
-                }
-                clear_IO_APIC_pin(apic1, pin1);
-                apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not "
-                                "connected to IO-APIC\n");
-        }
+        /* Now try again with IRQ0 8259A enabled.
+           Assumes timer is on IO-APIC 0 ?!? */
+        enable_8259A_irq(0);
+        unmask_IO_APIC_irq(0);
+        if (try_apic_pin(apic1, pin1, "with 8259 IRQ0 enabled"))
+                return;
+        disable_8259A_irq(0);
+
+        /* Always try pin0 and pin2 on APIC 0 to handle buggy timer overrides
+           on Nvidia boards */
+        if (!(apic1 == 0 && pin1 == 0) &&
+            try_apic_pin(0, 0, "fallback with 8259 IRQ0 disabled"))
+                return;
+        if (!(apic1 == 0 && pin1 == 2) &&
+            try_apic_pin(0, 2, "fallback with 8259 IRQ0 disabled"))
+                return;
 
-        apic_printk(APIC_VERBOSE,KERN_INFO "...trying to set up timer (IRQ0) "
-                                "through the 8259A ... ");
+        /* Then try pure 8259A routing on the 8259 as reported by BIOS*/
+        enable_8259A_irq(0);
         if (pin2 != -1) {
-                apic_printk(APIC_VERBOSE,"\n..... (found apic %d pin %d) ...",
-                        apic2, pin2);
-                /*
-                 * legacy devices should be connected to IO APIC #0
-                 */
                 setup_ExtINT_IRQ0_pin(apic2, pin2, vector);
-                if (timer_irq_works()) {
-                        apic_printk(APIC_VERBOSE," works.\n");
-                        nmi_watchdog_default();
-                        if (nmi_watchdog == NMI_IO_APIC) {
-                                setup_nmi();
-                        }
+                if (try_apic_pin(apic2,pin2,"8259A broadcast ExtINT from BIOS"))
                         return;
-                }
-                /*
-                 * Cleanup, just in case ...
-                 */
-                clear_IO_APIC_pin(apic2, pin2);
         }
-        apic_printk(APIC_VERBOSE," failed.\n");
+
+        /* Tried all possibilities to go through the IO-APIC. Now come the
+           really cheesy fallbacks. */
 
         if (nmi_watchdog == NMI_IO_APIC) {
                 printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n");
@@ -1837,7 +1847,7 @@ void destroy_irq(unsigned int irq)
         dynamic_irq_cleanup(irq);
 
         spin_lock_irqsave(&vector_lock, flags);
-        irq_vector[irq] = 0;
+        __clear_irq_vector(irq);
         spin_unlock_irqrestore(&vector_lock, flags);
 }
 
@@ -2139,7 +2149,15 @@ void __init setup_ioapic_dest(void)
                         if (irq_entry == -1)
                                 continue;
                         irq = pin_2_irq(irq_entry, ioapic, pin);
-                        set_ioapic_affinity_irq(irq, TARGET_CPUS);
+
+                        /* setup_IO_APIC_irqs could fail to get vector for some device
+                         * when you have too many devices, because at that time only boot
+                         * cpu is online.
+                         */
+                        if(!irq_vector[irq])
+                                setup_IO_APIC_irq(ioapic, pin, irq_entry, irq);
+                        else
+                                set_ioapic_affinity_irq(irq, TARGET_CPUS);
                 }
 
         }
diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c
index e46c55856d40..0c06af6c13bc 100644
--- a/arch/x86_64/kernel/irq.c
+++ b/arch/x86_64/kernel/irq.c
@@ -120,7 +120,7 @@ asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
 
         if (likely(irq < NR_IRQS))
                 generic_handle_irq(irq);
-        else
+        else if (printk_ratelimit())
                 printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
                         __func__, smp_processor_id(), vector);
 
diff --git a/arch/x86_64/kernel/mce.c b/arch/x86_64/kernel/mce.c
index bc863c464a1f..ac085038af29 100644
--- a/arch/x86_64/kernel/mce.c
+++ b/arch/x86_64/kernel/mce.c
@@ -651,6 +651,7 @@ static void mce_remove_device(unsigned int cpu)
         sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_tolerant);
         sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_check_interval);
         sysdev_unregister(&per_cpu(device_mce,cpu));
+        memset(&per_cpu(device_mce, cpu).kobj, 0, sizeof(struct kobject));
 }
 
 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index b147ab19fbd4..08072568847d 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -35,8 +35,6 @@
 int smp_found_config;
 unsigned int __initdata maxcpus = NR_CPUS;
 
-int acpi_found_madt;
-
 /*
  * Various Linux-internal data structures created from the
  * MP-table.
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c
index 7af9cb3e2d99..27e95e7922c1 100644
--- a/arch/x86_64/kernel/nmi.c
+++ b/arch/x86_64/kernel/nmi.c
@@ -12,14 +12,15 @@
  *  Mikael Pettersson   : PM converted to driver model. Disable/enable API.
  */
 
+#include <linux/nmi.h>
 #include <linux/mm.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/sysdev.h>
-#include <linux/nmi.h>
 #include <linux/sysctl.h>
 #include <linux/kprobes.h>
+#include <linux/cpumask.h>
 
 #include <asm/smp.h>
 #include <asm/nmi.h>
@@ -41,6 +42,8 @@ int panic_on_unrecovered_nmi;
 static DEFINE_PER_CPU(unsigned, perfctr_nmi_owner);
 static DEFINE_PER_CPU(unsigned, evntsel_nmi_owner[2]);
 
+static cpumask_t backtrace_mask = CPU_MASK_NONE;
+
 /* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
  * offset from MSR_P4_BSU_ESCR0.  It will be the max for all platforms (for now)
  */
@@ -782,6 +785,7 @@ int __kprobes nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
 {
         int sum;
         int touched = 0;
+        int cpu = smp_processor_id();
         struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk);
         u64 dummy;
         int rc=0;
@@ -799,6 +803,16 @@ int __kprobes nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
                 touched = 1;
         }
 
+        if (cpu_isset(cpu, backtrace_mask)) {
+                static DEFINE_SPINLOCK(lock);   /* Serialise the printks */
+
+                spin_lock(&lock);
+                printk("NMI backtrace for cpu %d\n", cpu);
+                dump_stack();
+                spin_unlock(&lock);
+                cpu_clear(cpu, backtrace_mask);
+        }
+
 #ifdef CONFIG_X86_MCE
         /* Could check oops_in_progress here too, but it's safer
            not too */
@@ -931,6 +945,19 @@ int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
 
 #endif
 
+void __trigger_all_cpu_backtrace(void)
+{
+        int i;
+
+        backtrace_mask = cpu_online_map;
+        /* Wait for up to 10 seconds for all CPUs to do the backtrace */
+        for (i = 0; i < 10 * 1000; i++) {
+                if (cpus_empty(backtrace_mask))
+                        break;
+                mdelay(1);
+        }
+}
+
 EXPORT_SYMBOL(nmi_active);
 EXPORT_SYMBOL(nmi_watchdog);
 EXPORT_SYMBOL(avail_to_resrv_perfctr_nmi);
diff --git a/arch/x86_64/kernel/pci-calgary.c b/arch/x86_64/kernel/pci-calgary.c
index 37a770859e71..3215675ab128 100644
--- a/arch/x86_64/kernel/pci-calgary.c
+++ b/arch/x86_64/kernel/pci-calgary.c
@@ -41,6 +41,13 @@
 #include <asm/pci-direct.h>
 #include <asm/system.h>
 #include <asm/dma.h>
+#include <asm/rio.h>
+
+#ifdef CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT
+int use_calgary __read_mostly = 1;
+#else
+int use_calgary __read_mostly = 0;
+#endif /* CONFIG_CALGARY_DEFAULT_ENABLED */
 
 #define PCI_DEVICE_ID_IBM_CALGARY 0x02a1
 #define PCI_VENDOR_DEVICE_ID_CALGARY \
@@ -115,14 +122,35 @@ static const unsigned long phb_offsets[] = {
         0xB000 /* PHB3 */
 };
 
+/* PHB debug registers */
+
+static const unsigned long phb_debug_offsets[] = {
+        0x4000  /* PHB 0 DEBUG */,
+        0x5000  /* PHB 1 DEBUG */,
+        0x6000  /* PHB 2 DEBUG */,
+        0x7000  /* PHB 3 DEBUG */
+};
+
+/*
+ * STUFF register for each debug PHB,
+ * byte 1 = start bus number, byte 2 = end bus number
+ */
+
+#define PHB_DEBUG_STUFF_OFFSET  0x0020
+
 unsigned int specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED;
 static int translate_empty_slots __read_mostly = 0;
 static int calgary_detected __read_mostly = 0;
 
+static struct rio_table_hdr     *rio_table_hdr __initdata;
+static struct scal_detail       *scal_devs[MAX_NUMNODES] __initdata;
+static struct rio_detail        *rio_devs[MAX_NUMNODES * 4] __initdata;
+
 struct calgary_bus_info {
         void *tce_space;
         unsigned char translation_disabled;
         signed char phbid;
+        void __iomem *bbar;
 };
 
 static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, };
@@ -475,6 +503,11 @@ static struct dma_mapping_ops calgary_dma_ops = {
         .unmap_sg = calgary_unmap_sg,
 };
 
+static inline void __iomem * busno_to_bbar(unsigned char num)
+{
+        return bus_info[num].bbar;
+}
+
 static inline int busno_to_phbid(unsigned char num)
 {
         return bus_info[num].phbid;
@@ -620,14 +653,9 @@ static void __init calgary_reserve_peripheral_mem_2(struct pci_dev *dev)
 static void __init calgary_reserve_regions(struct pci_dev *dev)
 {
         unsigned int npages;
-        void __iomem *bbar;
-        unsigned char busnum;
         u64 start;
         struct iommu_table *tbl = dev->sysdata;
 
-        bbar = tbl->bbar;
-        busnum = dev->bus->number;
-
         /* reserve bad_dma_address in case it's a legal address */
         iommu_range_reserve(tbl, bad_dma_address, 1);
 
@@ -740,7 +768,7 @@ static void __init calgary_increase_split_completion_timeout(void __iomem *bbar,
 {
         u64 val64;
         void __iomem *target;
-        unsigned long phb_shift = -1;
+        unsigned int phb_shift = ~0; /* silence gcc */
         u64 mask;
 
         switch (busno_to_phbid(busnum)) {
@@ -828,33 +856,6 @@ static void __init calgary_disable_translation(struct pci_dev *dev)
         del_timer_sync(&tbl->watchdog_timer);
 }
 
-static inline unsigned int __init locate_register_space(struct pci_dev *dev)
-{
-        int rionodeid;
-        u32 address;
-
-        /*
-         * Each Calgary has four busses. The first four busses (first Calgary)
-         * have RIO node ID 2, then the next four (second Calgary) have RIO
-         * node ID 3, the next four (third Calgary) have node ID 2 again, etc.
-         * We use a gross hack - relying on the dev->bus->number ordering,
-         * modulo 14 - to decide which Calgary a given bus is on. Busses 0, 1,
-         * 2 and 4 are on the first Calgary (id 2), 6, 8, a and c are on the
-         * second (id 3), and then it repeats modulo 14.
-         */
-        rionodeid = (dev->bus->number % 14 > 4) ? 3 : 2;
-        /*
-         * register space address calculation as follows:
-         * FE0MB-8MB*OneBasedChassisNumber+1MB*(RioNodeId-ChassisBase)
-         * ChassisBase is always zero for x366/x260/x460
-         * RioNodeId is 2 for first Calgary, 3 for second Calgary
-         */
-        address = START_ADDRESS -
-                (0x800000 * (ONE_BASED_CHASSIS_NUM + dev->bus->number / 14)) +
-                (0x100000) * (rionodeid - CHASSIS_BASE);
-        return address;
-}
-
 static void __init calgary_init_one_nontraslated(struct pci_dev *dev)
 {
         pci_dev_get(dev);
@@ -864,23 +865,15 @@ static void __init calgary_init_one_nontraslated(struct pci_dev *dev)
 
 static int __init calgary_init_one(struct pci_dev *dev)
 {
-        u32 address;
         void __iomem *bbar;
         int ret;
 
         BUG_ON(dev->bus->number >= MAX_PHB_BUS_NUM);
 
-        address = locate_register_space(dev);
-        /* map entire 1MB of Calgary config space */
-        bbar = ioremap_nocache(address, 1024 * 1024);
-        if (!bbar) {
-                ret = -ENODATA;
-                goto done;
-        }
-
+        bbar = busno_to_bbar(dev->bus->number);
         ret = calgary_setup_tar(dev, bbar);
         if (ret)
-                goto iounmap;
+                goto done;
 
         pci_dev_get(dev);
         dev->bus->self = dev;
@@ -888,17 +881,66 @@ static int __init calgary_init_one(struct pci_dev *dev)
 
         return 0;
 
-iounmap:
-        iounmap(bbar);
 done:
         return ret;
 }
 
+static int __init calgary_locate_bbars(void)
+{
+        int ret;
+        int rioidx, phb, bus;
+        void __iomem *bbar;
+        void __iomem *target;
+        unsigned long offset;
+        u8 start_bus, end_bus;
+        u32 val;
+
+        ret = -ENODATA;
+        for (rioidx = 0; rioidx < rio_table_hdr->num_rio_dev; rioidx++) {
+                struct rio_detail *rio = rio_devs[rioidx];
+
+                if ((rio->type != COMPAT_CALGARY) && (rio->type != ALT_CALGARY))
+                        continue;
+
+                /* map entire 1MB of Calgary config space */
+                bbar = ioremap_nocache(rio->BBAR, 1024 * 1024);
+                if (!bbar)
+                        goto error;
+
+                for (phb = 0; phb < PHBS_PER_CALGARY; phb++) {
+                        offset = phb_debug_offsets[phb] | PHB_DEBUG_STUFF_OFFSET;
+                        target = calgary_reg(bbar, offset);
+
+                        val = be32_to_cpu(readl(target));
+                        start_bus = (u8)((val & 0x00FF0000) >> 16);
+                        end_bus = (u8)((val & 0x0000FF00) >> 8);
+                        for (bus = start_bus; bus <= end_bus; bus++) {
+                                bus_info[bus].bbar = bbar;
+                                bus_info[bus].phbid = phb;
+                        }
+                }
+        }
+
+        return 0;
+
+error:
+        /* scan bus_info and iounmap any bbars we previously ioremap'd */
+        for (bus = 0; bus < ARRAY_SIZE(bus_info); bus++)
+                if (bus_info[bus].bbar)
+                        iounmap(bus_info[bus].bbar);
+
+        return ret;
+}
+
 static int __init calgary_init(void)
 {
-        int ret = -ENODEV;
+        int ret;
         struct pci_dev *dev = NULL;
 
+        ret = calgary_locate_bbars();
+        if (ret)
+                return ret;
+
         do {
                 dev = pci_get_device(PCI_VENDOR_ID_IBM,
                                      PCI_DEVICE_ID_IBM_CALGARY,
@@ -921,7 +963,7 @@ static int __init calgary_init(void)
 
 error:
         do {
-                dev = pci_find_device_reverse(PCI_VENDOR_ID_IBM,
+                dev = pci_get_device_reverse(PCI_VENDOR_ID_IBM,
                                               PCI_DEVICE_ID_IBM_CALGARY,
                                               dev);
                 if (!dev)
@@ -962,13 +1004,56 @@ static inline int __init determine_tce_table_size(u64 ram)
         return ret;
 }
 
+static int __init build_detail_arrays(void)
+{
+        unsigned long ptr;
+        int i, scal_detail_size, rio_detail_size;
+
+        if (rio_table_hdr->num_scal_dev > MAX_NUMNODES){
+                printk(KERN_WARNING
+                        "Calgary: MAX_NUMNODES too low! Defined as %d, "
+                        "but system has %d nodes.\n",
+                        MAX_NUMNODES, rio_table_hdr->num_scal_dev);
+                return -ENODEV;
+        }
+
+        switch (rio_table_hdr->version){
+        case 2:
+                scal_detail_size = 11;
+                rio_detail_size = 13;
+                break;
+        case 3:
+                scal_detail_size = 12;
+                rio_detail_size = 15;
+                break;
+        default:
+                printk(KERN_WARNING
+                       "Calgary: Invalid Rio Grande Table Version: %d\n",
+                       rio_table_hdr->version);
+                return -EPROTO;
+        }
+
+        ptr = ((unsigned long)rio_table_hdr) + 3;
+        for (i = 0; i < rio_table_hdr->num_scal_dev;
+                    i++, ptr += scal_detail_size)
+                scal_devs[i] = (struct scal_detail *)ptr;
+
+        for (i = 0; i < rio_table_hdr->num_rio_dev;
+                    i++, ptr += rio_detail_size)
+                rio_devs[i] = (struct rio_detail *)ptr;
+
+        return 0;
+}
+
 void __init detect_calgary(void)
 {
         u32 val;
         int bus;
         void *tbl;
         int calgary_found = 0;
-        int phb = -1;
+        unsigned long ptr;
+        int offset;
+        int ret;
 
         /*
          * if the user specified iommu=off or iommu=soft or we found
@@ -977,25 +1062,47 @@ void __init detect_calgary(void)
         if (swiotlb || no_iommu || iommu_detected)
                 return;
 
+        if (!use_calgary)
+                return;
+
         if (!early_pci_allowed())
                 return;
 
+        ptr = (unsigned long)phys_to_virt(get_bios_ebda());
+
+        rio_table_hdr = NULL;
+        offset = 0x180;
+        while (offset) {
+                /* The block id is stored in the 2nd word */
+                if (*((unsigned short *)(ptr + offset + 2)) == 0x4752){
+                        /* set the pointer past the offset & block id */
+                        rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4);
+                        break;
+                }
+                /* The next offset is stored in the 1st word. 0 means no more */
+                offset = *((unsigned short *)(ptr + offset));
+        }
+        if (!rio_table_hdr) {
+                printk(KERN_ERR "Calgary: Unable to locate "
+                                "Rio Grande Table in EBDA - bailing!\n");
+                return;
+        }
+
+        ret = build_detail_arrays();
+        if (ret) {
+                printk(KERN_ERR "Calgary: build_detail_arrays ret %d\n", ret);
+                return;
+        }
+
         specified_table_size = determine_tce_table_size(end_pfn * PAGE_SIZE);
 
         for (bus = 0; bus < MAX_PHB_BUS_NUM; bus++) {
                 int dev;
                 struct calgary_bus_info *info = &bus_info[bus];
-                info->phbid = -1;
 
                 if (read_pci_config(bus, 0, 0, 0) != PCI_VENDOR_DEVICE_ID_CALGARY)
                         continue;
 
-                /*
-                 * There are 4 PHBs per Calgary chip.  Set phb to which phb (0-3)
-                 * it is connected to releative to the clagary chip.
-                 */
-                phb = (phb + 1) % PHBS_PER_CALGARY;
-
                 if (info->translation_disabled)
                         continue;
 
@@ -1010,7 +1117,6 @@ void __init detect_calgary(void)
                                 if (!tbl)
                                         goto cleanup;
                                 info->tce_space = tbl;
-                                info->phbid = phb;
                                 calgary_found = 1;
                                 break;
                         }
diff --git a/arch/x86_64/kernel/pci-dma.c b/arch/x86_64/kernel/pci-dma.c
index f8d857453f8a..683b7a5c1ab3 100644
--- a/arch/x86_64/kernel/pci-dma.c
+++ b/arch/x86_64/kernel/pci-dma.c
@@ -296,6 +296,11 @@ __init int iommu_setup(char *p)
                 gart_parse_options(p);
 #endif
 
+#ifdef CONFIG_CALGARY_IOMMU
+                if (!strncmp(p, "calgary", 7))
+                        use_calgary = 1;
+#endif /* CONFIG_CALGARY_IOMMU */
+
                 p += strcspn(p, ",");
                 if (*p == ',')
                         ++p;
diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c
index 16261a8a3303..fc1960f1f243 100644
--- a/arch/x86_64/kernel/pci-gart.c
+++ b/arch/x86_64/kernel/pci-gart.c
@@ -601,10 +601,9 @@ void __init gart_iommu_init(void)
             (!force_iommu && end_pfn <= MAX_DMA32_PFN) ||
             !iommu_aperture ||
             (no_agp && init_k8_gatt(&info) < 0)) {
-                printk(KERN_INFO "PCI-DMA: Disabling IOMMU.\n");
                 if (end_pfn > MAX_DMA32_PFN) {
                         printk(KERN_ERR "WARNING more than 4GB of memory "
-                                        "but IOMMU not available.\n"
+                                        "but GART IOMMU not available.\n"
                                KERN_ERR "WARNING 32bit PCI may malfunction.\n");
                 }
                 return;
diff --git a/arch/x86_64/kernel/process.c b/arch/x86_64/kernel/process.c
index 7451a4c43c16..a418ee4c8c62 100644
--- a/arch/x86_64/kernel/process.c
+++ b/arch/x86_64/kernel/process.c
@@ -108,17 +108,15 @@ void exit_idle(void)
  */
 static void default_idle(void)
 {
-        local_irq_enable();
-
         current_thread_info()->status &= ~TS_POLLING;
         smp_mb__after_clear_bit();
-        while (!need_resched()) {
-                local_irq_disable();
-                if (!need_resched())
-                        safe_halt();
-                else
-                        local_irq_enable();
-        }
+        local_irq_disable();
+        if (!need_resched()) {
+                /* Enables interrupts one instruction before HLT.
+                   x86 special cases this so there is no race. */
+                safe_halt();
+        } else
+                local_irq_enable();
         current_thread_info()->status |= TS_POLLING;
 }
 
@@ -130,15 +128,7 @@ static void default_idle(void)
 static void poll_idle (void)
 {
         local_irq_enable();
-
-        asm volatile(
-                "2:"
-                "testl %0,%1;"
-                "rep; nop;"
-                "je 2b;"
-                : :
-                "i" (_TIF_NEED_RESCHED),
-                "m" (current_thread_info()->flags));
+        cpu_relax();
 }
 
 void cpu_idle_wait(void)
@@ -219,6 +209,12 @@ void cpu_idle (void)
                                 idle = default_idle;
                         if (cpu_is_offline(smp_processor_id()))
                                 play_dead();
+                        /*
+                         * Idle routines should keep interrupts disabled
+                         * from here on, until they go to idle.
+                         * Otherwise, idle callbacks can misfire.
+                         */
+                        local_irq_disable();
                         enter_idle();
                         idle();
                         /* In many cases the interrupt that ended idle
@@ -256,9 +252,16 @@ void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)
 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 static void mwait_idle(void)
 {
-        local_irq_enable();
-        while (!need_resched())
-                mwait_idle_with_hints(0,0);
+        if (!need_resched()) {
+                __monitor((void *)&current_thread_info()->flags, 0, 0);
+                smp_mb();
+                if (!need_resched())
+                        __sti_mwait(0, 0);
+                else
+                        local_irq_enable();
+        } else {
+                local_irq_enable();
+        }
 }
 
 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index f12f266f3e98..af425a8049fb 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -731,11 +731,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
         /* Fix cpuid4 emulation for more */
         num_cache_leaves = 3;
 
-        /* When there is only one core no need to synchronize RDTSC */
-        if (num_possible_cpus() == 1)
-                set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
-        else
-                clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
+        /* RDTSC can be speculated around */
+        clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
 }
 
 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
@@ -834,6 +831,15 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
                         set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
         }
 
+        if (cpu_has_ds) {
+                unsigned int l1, l2;
+                rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
+                if (!(l1 & (1<<11)))
+                        set_bit(X86_FEATURE_BTS, c->x86_capability);
+                if (!(l1 & (1<<12)))
+                        set_bit(X86_FEATURE_PEBS, c->x86_capability);
+        }
+
         n = c->extended_cpuid_level;
         if (n >= 0x80000008) {
                 unsigned eax = cpuid_eax(0x80000008);
@@ -853,7 +859,10 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
         if (c->x86 == 6)
                 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
-        set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
+        if (c->x86 == 15)
+                set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
+        else
+                clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
         c->x86_max_cores = intel_num_cpu_cores(c);
 
         srat_detect_node();
diff --git a/arch/x86_64/kernel/smp.c b/arch/x86_64/kernel/smp.c
index 32f4d7e2a060..af1ec4d23cf8 100644
--- a/arch/x86_64/kernel/smp.c
+++ b/arch/x86_64/kernel/smp.c
@@ -389,6 +389,7 @@ int smp_call_function_single (int cpu, void (*func) (void *info), void *info,
         put_cpu();
         return 0;
 }
+EXPORT_SYMBOL(smp_call_function_single);
 
 /*
  * this function sends a 'generic call function' IPI to all other CPUs
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c
index 9800147c4c68..daf19332f0dd 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86_64/kernel/smpboot.c
@@ -60,6 +60,7 @@
 #include <asm/irq.h>
 #include <asm/hw_irq.h>
 #include <asm/numa.h>
+#include <asm/genapic.h>
 
 /* Number of siblings per CPU package */
 int smp_num_siblings = 1;
@@ -1169,6 +1170,13 @@ int __cpuinit __cpu_up(unsigned int cpu)
 
         while (!cpu_isset(cpu, cpu_online_map))
                 cpu_relax();
+
+        if (num_online_cpus() > 8 && genapic == &apic_flat) {
+                printk(KERN_WARNING
+                       "flat APIC routing can't be used with > 8 cpus\n");
+                BUG();
+        }
+
         err = 0;
 
         return err;
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c
index 0d65b22f229c..a1641ffdffcf 100644
--- a/arch/x86_64/kernel/traps.c
+++ b/arch/x86_64/kernel/traps.c
@@ -30,9 +30,9 @@
 #include <linux/kprobes.h>
 #include <linux/kexec.h>
 #include <linux/unwind.h>
+#include <linux/uaccess.h>
 
 #include <asm/system.h>
-#include <asm/uaccess.h>
 #include <asm/io.h>
 #include <asm/atomic.h>
 #include <asm/debugreg.h>
@@ -108,7 +108,7 @@ static inline void preempt_conditional_cli(struct pt_regs *regs)
         preempt_enable_no_resched();
 }
 
-static int kstack_depth_to_print = 12;
+int kstack_depth_to_print = 12;
 #ifdef CONFIG_STACK_UNWIND
 static int call_trace = 1;
 #else
@@ -225,16 +225,25 @@ static int dump_trace_unwind(struct unwind_frame_info *info, void *context)
 {
         struct ops_and_data *oad = (struct ops_and_data *)context;
         int n = 0;
+        unsigned long sp = UNW_SP(info);
 
+        if (arch_unw_user_mode(info))
+                return -1;
         while (unwind(info) == 0 && UNW_PC(info)) {
                 n++;
                 oad->ops->address(oad->data, UNW_PC(info));
                 if (arch_unw_user_mode(info))
                         break;
+                if ((sp & ~(PAGE_SIZE - 1)) == (UNW_SP(info) & ~(PAGE_SIZE - 1))
+                    && sp > UNW_SP(info))
+                        break;
+                sp = UNW_SP(info);
         }
         return n;
 }
 
+#define MSG(txt) ops->warning(data, txt)
+
 /*
  * x86-64 can have upto three kernel stacks: 
  * process stack
@@ -248,11 +257,12 @@ static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
         return p > t && p < t + THREAD_SIZE - 3;
 }
 
-void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * stack,
+void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
+                unsigned long *stack,
                 struct stacktrace_ops *ops, void *data)
 {
-        const unsigned cpu = smp_processor_id();
-        unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr;
+        const unsigned cpu = get_cpu();
+        unsigned long *irqstack_end = (unsigned long*)cpu_pda(cpu)->irqstackptr;
         unsigned used = 0;
         struct thread_info *tinfo;
 
@@ -268,28 +278,30 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
                         if (unwind_init_frame_info(&info, tsk, regs) == 0)
                                 unw_ret = dump_trace_unwind(&info, &oad);
                 } else if (tsk == current)
-                        unw_ret = unwind_init_running(&info, dump_trace_unwind, &oad);
+                        unw_ret = unwind_init_running(&info, dump_trace_unwind,
+                                                      &oad);
                 else {
                         if (unwind_init_blocked(&info, tsk) == 0)
                                 unw_ret = dump_trace_unwind(&info, &oad);
                 }
                 if (unw_ret > 0) {
                         if (call_trace == 1 && !arch_unw_user_mode(&info)) {
-                                ops->warning_symbol(data, "DWARF2 unwinder stuck at %s\n",
+                                ops->warning_symbol(data,
+                                             "DWARF2 unwinder stuck at %s",
                                              UNW_PC(&info));
                                 if ((long)UNW_SP(&info) < 0) {
-                                        ops->warning(data, "Leftover inexact backtrace:\n");
+                                        MSG("Leftover inexact backtrace:");
                                         stack = (unsigned long *)UNW_SP(&info);
                                         if (!stack)
-                                                return;
+                                                goto out;
                                 } else
-                                        ops->warning(data, "Full inexact backtrace again:\n");
+                                        MSG("Full inexact backtrace again:");
                         } else if (call_trace >= 1)
-                                return;
+                                goto out;
                         else
-                                ops->warning(data, "Full inexact backtrace again:\n");
+                                MSG("Full inexact backtrace again:");
                 } else
-                        ops->warning(data, "Inexact backtrace:\n");
+                        MSG("Inexact backtrace:");
         }
         if (!stack) {
                 unsigned long dummy;
@@ -297,12 +309,6 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
                 if (tsk && tsk != current)
                         stack = (unsigned long *)tsk->thread.rsp;
         }
-        /*
-         * Align the stack pointer on word boundary, later loops
-         * rely on that (and corruption / debug info bugs can cause
-         * unaligned values here):
-         */
-        stack = (unsigned long *)((unsigned long)stack & ~(sizeof(long)-1));
 
         /*
          * Print function call entries within a stack. 'cond' is the
@@ -312,9 +318,9 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
 #define HANDLE_STACK(cond) \
         do while (cond) { \
                 unsigned long addr = *stack++; \
-                if (oops_in_progress ?          \
-                        __kernel_text_address(addr) : \
-                        kernel_text_address(addr)) { \
+                /* Use unlocked access here because except for NMIs     \
+                   we should be already protected against module unloads */ \
+                if (__kernel_text_address(addr)) { \
                         /* \
                          * If the address is either in the text segment of the \
                          * kernel, or in the region which contains vmalloc'ed \
@@ -380,6 +386,8 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s
         tinfo = current_thread_info();
         HANDLE_STACK (valid_stack_ptr(tinfo, stack));
 #undef HANDLE_STACK
+out:
+        put_cpu();
 }
 EXPORT_SYMBOL(dump_trace);
 
@@ -786,8 +794,7 @@ mem_parity_error(unsigned char reason, struct pt_regs * regs)
 {
         printk(KERN_EMERG "Uhhuh. NMI received for unknown reason %02x.\n",
                 reason);
-        printk(KERN_EMERG "You probably have a hardware problem with your "
-                "RAM chips\n");
+        printk(KERN_EMERG "You have some hardware problem, likely on the PCI bus.\n");
 
         if (panic_on_unrecovered_nmi)
                 panic("NMI: Not continuing");
diff --git a/arch/x86_64/kernel/vmlinux.lds.S b/arch/x86_64/kernel/vmlinux.lds.S
index d9534e750d4f..6a1f8f491e5d 100644
--- a/arch/x86_64/kernel/vmlinux.lds.S
+++ b/arch/x86_64/kernel/vmlinux.lds.S
@@ -51,15 +51,6 @@ SECTIONS
 
   RODATA
 
-#ifdef CONFIG_STACK_UNWIND
-  . = ALIGN(8);
-  .eh_frame : AT(ADDR(.eh_frame) - LOAD_OFFSET) {
-        __start_unwind = .;
-        *(.eh_frame)
-        __end_unwind = .;
-  }
-#endif
-
   . = ALIGN(PAGE_SIZE);        /* Align data segment to page size boundary */
                                 /* Data */
   .data : AT(ADDR(.data) - LOAD_OFFSET) {
diff --git a/arch/x86_64/kernel/vsyscall.c b/arch/x86_64/kernel/vsyscall.c
index 3785e4954734..4a673f5397a0 100644
--- a/arch/x86_64/kernel/vsyscall.c
+++ b/arch/x86_64/kernel/vsyscall.c
@@ -289,6 +289,7 @@ static void __init map_vsyscall(void)
         extern char __vsyscall_0;
         unsigned long physaddr_page0 = __pa_symbol(&__vsyscall_0);
 
+        /* Note that VSYSCALL_MAPPED_PAGES must agree with the code below. */
         __set_fixmap(VSYSCALL_FIRST_PAGE, physaddr_page0, PAGE_KERNEL_VSYSCALL);
 }
 
diff --git a/arch/x86_64/lib/csum-partial.c b/arch/x86_64/lib/csum-partial.c
index 06ae630de82b..bc503f506903 100644
--- a/arch/x86_64/lib/csum-partial.c
+++ b/arch/x86_64/lib/csum-partial.c
@@ -9,8 +9,6 @@
 #include <linux/module.h>
 #include <asm/checksum.h>
 
-#define __force_inline inline __attribute__((always_inline))
-
 static inline unsigned short from32to16(unsigned a) 
 {
         unsigned short b = a >> 16; 
@@ -33,7 +31,7 @@ static inline unsigned short from32to16(unsigned a)
  * Unrolling to an 128 bytes inner loop.
  * Using interleaving with more registers to break the carry chains.
  */
-static __force_inline unsigned do_csum(const unsigned char *buff, unsigned len)
+static unsigned do_csum(const unsigned char *buff, unsigned len)
 {
         unsigned odd, count;
         unsigned long result = 0;
diff --git a/arch/x86_64/lib/delay.c b/arch/x86_64/lib/delay.c
index 50be90975d04..2dbebd308347 100644
--- a/arch/x86_64/lib/delay.c
+++ b/arch/x86_64/lib/delay.c
@@ -40,13 +40,13 @@ EXPORT_SYMBOL(__delay);
 
 inline void __const_udelay(unsigned long xloops)
 {
-        __delay((xloops * HZ * cpu_data[raw_smp_processor_id()].loops_per_jiffy) >> 32);
+        __delay(((xloops * HZ * cpu_data[raw_smp_processor_id()].loops_per_jiffy) >> 32) + 1);
 }
 EXPORT_SYMBOL(__const_udelay);
 
 void __udelay(unsigned long usecs)
 {
-        __const_udelay(usecs * 0x000010c6);  /* 2**32 / 1000000 */
+        __const_udelay(usecs * 0x000010c7);  /* 2**32 / 1000000 (rounded up) */
 }
 EXPORT_SYMBOL(__udelay);
 
diff --git a/arch/x86_64/mm/fault.c b/arch/x86_64/mm/fault.c
index 3751b4788e28..a65fc6f1dcaf 100644
--- a/arch/x86_64/mm/fault.c
+++ b/arch/x86_64/mm/fault.c
@@ -23,9 +23,9 @@
 #include <linux/compiler.h>
 #include <linux/module.h>
 #include <linux/kprobes.h>
+#include <linux/uaccess.h>
 
 #include <asm/system.h>
-#include <asm/uaccess.h>
 #include <asm/pgalloc.h>
 #include <asm/smp.h>
 #include <asm/tlbflush.h>
@@ -96,7 +96,7 @@ void bust_spinlocks(int yes)
 static noinline int is_prefetch(struct pt_regs *regs, unsigned long addr,
                                 unsigned long error_code)
 { 
-        unsigned char __user *instr;
+        unsigned char *instr;
         int scan_more = 1;
         int prefetch = 0; 
         unsigned char *max_instr;
@@ -116,7 +116,7 @@ static noinline int is_prefetch(struct pt_regs *regs, unsigned long addr,
                 unsigned char instr_hi;
                 unsigned char instr_lo;
 
-                if (__get_user(opcode, (char __user *)instr))
+                if (probe_kernel_address(instr, opcode))
                         break; 
 
                 instr_hi = opcode & 0xf0; 
@@ -154,7 +154,7 @@ static noinline int is_prefetch(struct pt_regs *regs, unsigned long addr,
                 case 0x00:
                         /* Prefetch instruction is 0x0F0D or 0x0F18 */
                         scan_more = 0;
-                        if (__get_user(opcode, (char __user *)instr))
+                        if (probe_kernel_address(instr, opcode))
                                 break;
                         prefetch = (instr_lo == 0xF) &&
                                 (opcode == 0x0D || opcode == 0x18);
@@ -170,7 +170,7 @@ static noinline int is_prefetch(struct pt_regs *regs, unsigned long addr,
 static int bad_address(void *p) 
 { 
         unsigned long dummy;
-        return __get_user(dummy, (unsigned long __user *)p);
+        return probe_kernel_address((unsigned long *)p, dummy);
 } 
 
 void dump_pagetable(unsigned long address)
diff --git a/arch/x86_64/mm/init.c b/arch/x86_64/mm/init.c
index 4c0c00ef3ca7..2968b90ef8ad 100644
--- a/arch/x86_64/mm/init.c
+++ b/arch/x86_64/mm/init.c
@@ -730,14 +730,15 @@ static __init int x8664_sysctl_init(void)
 __initcall(x8664_sysctl_init);
 #endif
 
-/* A pseudo VMAs to allow ptrace access for the vsyscall page.   This only
+/* A pseudo VMA to allow ptrace access for the vsyscall page.  This only
    covers the 64bit vsyscall page now. 32bit has a real VMA now and does
    not need special handling anymore. */
 
 static struct vm_area_struct gate_vma = {
         .vm_start = VSYSCALL_START,
-        .vm_end = VSYSCALL_END,
-        .vm_page_prot = PAGE_READONLY
+        .vm_end = VSYSCALL_START + (VSYSCALL_MAPPED_PAGES << PAGE_SHIFT),
+        .vm_page_prot = PAGE_READONLY_EXEC,
+        .vm_flags = VM_READ | VM_EXEC
 };
 
 struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
diff --git a/arch/x86_64/mm/pageattr.c b/arch/x86_64/mm/pageattr.c
index 3e231d762aaa..ccb91dd996a9 100644
--- a/arch/x86_64/mm/pageattr.c
+++ b/arch/x86_64/mm/pageattr.c
@@ -61,34 +61,40 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot,
         return base;
 } 
 
-
-static void flush_kernel_map(void *address) 
+static void cache_flush_page(void *adr)
 {
-        if (0 && address && cpu_has_clflush) {
-                /* is this worth it? */ 
-                int i;
-                for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) 
-                        asm volatile("clflush (%0)" :: "r" (address + i)); 
-        } else
-                asm volatile("wbinvd":::"memory"); 
-        if (address)
-                __flush_tlb_one(address);
-        else
-                __flush_tlb_all();
+        int i;
+        for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
+                asm volatile("clflush (%0)" :: "r" (adr + i));
 }
 
+static void flush_kernel_map(void *arg)
+{
+        struct list_head *l = (struct list_head *)arg;
+        struct page *pg;
+
+        /* When clflush is available always use it because it is
+           much cheaper than WBINVD */
+        if (!cpu_has_clflush)
+                asm volatile("wbinvd" ::: "memory");
+        list_for_each_entry(pg, l, lru) {
+                void *adr = page_address(pg);
+                if (cpu_has_clflush)
+                        cache_flush_page(adr);
+                __flush_tlb_one(adr);
+        }
+}
 
-static inline void flush_map(unsigned long address)
+static inline void flush_map(struct list_head *l)
 {       
-        on_each_cpu(flush_kernel_map, (void *)address, 1, 1);
+        on_each_cpu(flush_kernel_map, l, 1, 1);
 }
 
-static struct page *deferred_pages; /* protected by init_mm.mmap_sem */
+static LIST_HEAD(deferred_pages); /* protected by init_mm.mmap_sem */
 
 static inline void save_page(struct page *fpage)
 {
-        fpage->lru.next = (struct list_head *)deferred_pages;
-        deferred_pages = fpage;
+        list_add(&fpage->lru, &deferred_pages);
 }
 
 /* 
@@ -207,18 +213,18 @@ int change_page_attr(struct page *page, int numpages, pgprot_t prot)
 
 void global_flush_tlb(void)
 { 
-        struct page *dpage;
+        struct page *pg, *next;
+        struct list_head l;
 
         down_read(&init_mm.mmap_sem);
-        dpage = xchg(&deferred_pages, NULL);
+        list_replace_init(&deferred_pages, &l);
         up_read(&init_mm.mmap_sem);
 
-        flush_map((dpage && !dpage->lru.next) ? (unsigned long)page_address(dpage) : 0);
-        while (dpage) {
-                struct page *tmp = dpage;
-                dpage = (struct page *)dpage->lru.next;
-                ClearPagePrivate(tmp);
-                __free_page(tmp);
+        flush_map(&l);
+
+        list_for_each_entry_safe(pg, next, &l, lru) {
+                ClearPagePrivate(pg);
+                __free_page(pg);
         } 
 }