diff options
Diffstat (limited to 'arch/x86_64/kernel')
-rw-r--r-- | arch/x86_64/kernel/io_apic.c | 11 | ||||
-rw-r--r-- | arch/x86_64/kernel/ptrace.c | 4 | ||||
-rw-r--r-- | arch/x86_64/kernel/setup.c | 25 | ||||
-rw-r--r-- | arch/x86_64/kernel/signal.c | 4 | ||||
-rw-r--r-- | arch/x86_64/kernel/smpboot.c | 1 |
5 files changed, 28 insertions, 17 deletions
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index ac7684324954..80e9b498c443 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -42,6 +42,8 @@ | |||
42 | 42 | ||
43 | int sis_apic_bug; /* not actually supported, dummy for compile */ | 43 | int sis_apic_bug; /* not actually supported, dummy for compile */ |
44 | 44 | ||
45 | static int no_timer_check; | ||
46 | |||
45 | static DEFINE_SPINLOCK(ioapic_lock); | 47 | static DEFINE_SPINLOCK(ioapic_lock); |
46 | 48 | ||
47 | /* | 49 | /* |
@@ -1601,7 +1603,7 @@ static inline void check_timer(void) | |||
1601 | * Ok, does IRQ0 through the IOAPIC work? | 1603 | * Ok, does IRQ0 through the IOAPIC work? |
1602 | */ | 1604 | */ |
1603 | unmask_IO_APIC_irq(0); | 1605 | unmask_IO_APIC_irq(0); |
1604 | if (timer_irq_works()) { | 1606 | if (!no_timer_check && timer_irq_works()) { |
1605 | nmi_watchdog_default(); | 1607 | nmi_watchdog_default(); |
1606 | if (nmi_watchdog == NMI_IO_APIC) { | 1608 | if (nmi_watchdog == NMI_IO_APIC) { |
1607 | disable_8259A_irq(0); | 1609 | disable_8259A_irq(0); |
@@ -1671,6 +1673,13 @@ static inline void check_timer(void) | |||
1671 | panic("IO-APIC + timer doesn't work! Try using the 'noapic' kernel parameter\n"); | 1673 | panic("IO-APIC + timer doesn't work! Try using the 'noapic' kernel parameter\n"); |
1672 | } | 1674 | } |
1673 | 1675 | ||
1676 | static int __init notimercheck(char *s) | ||
1677 | { | ||
1678 | no_timer_check = 1; | ||
1679 | return 1; | ||
1680 | } | ||
1681 | __setup("no_timer_check", notimercheck); | ||
1682 | |||
1674 | /* | 1683 | /* |
1675 | * | 1684 | * |
1676 | * IRQ's that are handled by the PIC in the MPS IOAPIC case. | 1685 | * IRQ's that are handled by the PIC in the MPS IOAPIC case. |
diff --git a/arch/x86_64/kernel/ptrace.c b/arch/x86_64/kernel/ptrace.c index 60dc9b98951d..525f6a128a27 100644 --- a/arch/x86_64/kernel/ptrace.c +++ b/arch/x86_64/kernel/ptrace.c | |||
@@ -380,7 +380,7 @@ asmlinkage long sys_ptrace(long request, long pid, unsigned long addr, long data | |||
380 | break; | 380 | break; |
381 | 381 | ||
382 | switch (addr) { | 382 | switch (addr) { |
383 | case 0 ... sizeof(struct user_regs_struct): | 383 | case 0 ... sizeof(struct user_regs_struct) - sizeof(long): |
384 | tmp = getreg(child, addr); | 384 | tmp = getreg(child, addr); |
385 | break; | 385 | break; |
386 | case offsetof(struct user, u_debugreg[0]): | 386 | case offsetof(struct user, u_debugreg[0]): |
@@ -425,7 +425,7 @@ asmlinkage long sys_ptrace(long request, long pid, unsigned long addr, long data | |||
425 | break; | 425 | break; |
426 | 426 | ||
427 | switch (addr) { | 427 | switch (addr) { |
428 | case 0 ... sizeof(struct user_regs_struct): | 428 | case 0 ... sizeof(struct user_regs_struct) - sizeof(long): |
429 | ret = putreg(child, addr, data); | 429 | ret = putreg(child, addr, data); |
430 | break; | 430 | break; |
431 | /* Disallows to set a breakpoint into the vsyscall */ | 431 | /* Disallows to set a breakpoint into the vsyscall */ |
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index b9fd0252c279..99f038ede23c 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c | |||
@@ -719,7 +719,6 @@ static void __init display_cacheinfo(struct cpuinfo_x86 *c) | |||
719 | } | 719 | } |
720 | } | 720 | } |
721 | 721 | ||
722 | #ifdef CONFIG_SMP | ||
723 | /* | 722 | /* |
724 | * On a AMD dual core setup the lower bits of the APIC id distingush the cores. | 723 | * On a AMD dual core setup the lower bits of the APIC id distingush the cores. |
725 | * Assumes number of cores is a power of two. | 724 | * Assumes number of cores is a power of two. |
@@ -729,16 +728,24 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) | |||
729 | #ifdef CONFIG_SMP | 728 | #ifdef CONFIG_SMP |
730 | int cpu = smp_processor_id(); | 729 | int cpu = smp_processor_id(); |
731 | int node = 0; | 730 | int node = 0; |
731 | unsigned bits; | ||
732 | if (c->x86_num_cores == 1) | 732 | if (c->x86_num_cores == 1) |
733 | return; | 733 | return; |
734 | /* Fix up the APIC ID following the AMD specification. */ | 734 | |
735 | cpu_core_id[cpu] >>= hweight32(c->x86_num_cores - 1); | 735 | bits = 0; |
736 | while ((1 << bits) < c->x86_num_cores) | ||
737 | bits++; | ||
738 | |||
739 | /* Low order bits define the core id (index of core in socket) */ | ||
740 | cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1); | ||
741 | /* Convert the APIC ID into the socket ID */ | ||
742 | phys_proc_id[cpu] >>= bits; | ||
736 | 743 | ||
737 | #ifdef CONFIG_NUMA | 744 | #ifdef CONFIG_NUMA |
738 | /* When an ACPI SRAT table is available use the mappings from SRAT | 745 | /* When an ACPI SRAT table is available use the mappings from SRAT |
739 | instead. */ | 746 | instead. */ |
740 | if (acpi_numa <= 0) { | 747 | if (acpi_numa <= 0) { |
741 | node = cpu_core_id[cpu]; | 748 | node = phys_proc_id[cpu]; |
742 | if (!node_online(node)) | 749 | if (!node_online(node)) |
743 | node = first_node(node_online_map); | 750 | node = first_node(node_online_map); |
744 | cpu_to_node[cpu] = node; | 751 | cpu_to_node[cpu] = node; |
@@ -746,18 +753,11 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) | |||
746 | node = cpu_to_node[cpu]; | 753 | node = cpu_to_node[cpu]; |
747 | } | 754 | } |
748 | #endif | 755 | #endif |
749 | /* For now: - better than BAD_APIC_ID at least*/ | ||
750 | phys_proc_id[cpu] = cpu_core_id[cpu]; | ||
751 | 756 | ||
752 | printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n", | 757 | printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n", |
753 | cpu, c->x86_num_cores, node, cpu_core_id[cpu]); | 758 | cpu, c->x86_num_cores, node, cpu_core_id[cpu]); |
754 | #endif | 759 | #endif |
755 | } | 760 | } |
756 | #else | ||
757 | static void __init amd_detect_cmp(struct cpuinfo_x86 *c) | ||
758 | { | ||
759 | } | ||
760 | #endif | ||
761 | 761 | ||
762 | static int __init init_amd(struct cpuinfo_x86 *c) | 762 | static int __init init_amd(struct cpuinfo_x86 *c) |
763 | { | 763 | { |
@@ -963,8 +963,7 @@ void __init early_identify_cpu(struct cpuinfo_x86 *c) | |||
963 | } | 963 | } |
964 | 964 | ||
965 | #ifdef CONFIG_SMP | 965 | #ifdef CONFIG_SMP |
966 | phys_proc_id[smp_processor_id()] = | 966 | phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff; |
967 | cpu_core_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff; | ||
968 | #endif | 967 | #endif |
969 | } | 968 | } |
970 | 969 | ||
diff --git a/arch/x86_64/kernel/signal.c b/arch/x86_64/kernel/signal.c index d439ced150c6..3fdcdba0fec5 100644 --- a/arch/x86_64/kernel/signal.c +++ b/arch/x86_64/kernel/signal.c | |||
@@ -452,7 +452,9 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset) | |||
452 | regs->rip -= 2; | 452 | regs->rip -= 2; |
453 | } | 453 | } |
454 | if (regs->rax == (unsigned long)-ERESTART_RESTARTBLOCK) { | 454 | if (regs->rax == (unsigned long)-ERESTART_RESTARTBLOCK) { |
455 | regs->rax = __NR_restart_syscall; | 455 | regs->rax = test_thread_flag(TIF_IA32) ? |
456 | __NR_ia32_restart_syscall : | ||
457 | __NR_restart_syscall; | ||
456 | regs->rip -= 2; | 458 | regs->rip -= 2; |
457 | } | 459 | } |
458 | } | 460 | } |
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c index 5abdee1e16a5..f1ec0f345941 100644 --- a/arch/x86_64/kernel/smpboot.c +++ b/arch/x86_64/kernel/smpboot.c | |||
@@ -94,6 +94,7 @@ int smp_threads_ready; | |||
94 | 94 | ||
95 | cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned; | 95 | cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned; |
96 | cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; | 96 | cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; |
97 | EXPORT_SYMBOL(cpu_core_map); | ||
97 | 98 | ||
98 | /* | 99 | /* |
99 | * Trampoline 80x86 program as an array. | 100 | * Trampoline 80x86 program as an array. |