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-rw-r--r--arch/x86_64/kernel/time.c32
1 files changed, 15 insertions, 17 deletions
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 703acde2a1a5..fdaddc4e5284 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -42,10 +42,6 @@
42#include <asm/apic.h> 42#include <asm/apic.h>
43#endif 43#endif
44 44
45u64 jiffies_64 = INITIAL_JIFFIES;
46
47EXPORT_SYMBOL(jiffies_64);
48
49#ifdef CONFIG_CPU_FREQ 45#ifdef CONFIG_CPU_FREQ
50static void cpufreq_delayed_get(void); 46static void cpufreq_delayed_get(void);
51#endif 47#endif
@@ -481,9 +477,9 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
481static unsigned int cyc2ns_scale; 477static unsigned int cyc2ns_scale;
482#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */ 478#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
483 479
484static inline void set_cyc2ns_scale(unsigned long cpu_mhz) 480static inline void set_cyc2ns_scale(unsigned long cpu_khz)
485{ 481{
486 cyc2ns_scale = (1000 << CYC2NS_SCALE_FACTOR)/cpu_mhz; 482 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
487} 483}
488 484
489static inline unsigned long long cycles_2_ns(unsigned long long cyc) 485static inline unsigned long long cycles_2_ns(unsigned long long cyc)
@@ -655,7 +651,7 @@ static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
655 vxtime.tsc_quot = (1000L << 32) / cpu_khz; 651 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
656 } 652 }
657 653
658 set_cyc2ns_scale(cpu_khz_ref / 1000); 654 set_cyc2ns_scale(cpu_khz_ref);
659 655
660 return 0; 656 return 0;
661} 657}
@@ -939,7 +935,7 @@ void __init time_init(void)
939 rdtscll_sync(&vxtime.last_tsc); 935 rdtscll_sync(&vxtime.last_tsc);
940 setup_irq(0, &irq0); 936 setup_irq(0, &irq0);
941 937
942 set_cyc2ns_scale(cpu_khz / 1000); 938 set_cyc2ns_scale(cpu_khz);
943 939
944#ifndef CONFIG_SMP 940#ifndef CONFIG_SMP
945 time_init_gtod(); 941 time_init_gtod();
@@ -1093,6 +1089,7 @@ static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1093static unsigned long PIE_count; 1089static unsigned long PIE_count;
1094 1090
1095static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */ 1091static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1092static unsigned int hpet_t1_cmp; /* cached comparator register */
1096 1093
1097int is_hpet_enabled(void) 1094int is_hpet_enabled(void)
1098{ 1095{
@@ -1129,10 +1126,12 @@ int hpet_rtc_timer_init(void)
1129 cnt = hpet_readl(HPET_COUNTER); 1126 cnt = hpet_readl(HPET_COUNTER);
1130 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq); 1127 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1131 hpet_writel(cnt, HPET_T1_CMP); 1128 hpet_writel(cnt, HPET_T1_CMP);
1129 hpet_t1_cmp = cnt;
1132 local_irq_restore(flags); 1130 local_irq_restore(flags);
1133 1131
1134 cfg = hpet_readl(HPET_T1_CFG); 1132 cfg = hpet_readl(HPET_T1_CFG);
1135 cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT; 1133 cfg &= ~HPET_TN_PERIODIC;
1134 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1136 hpet_writel(cfg, HPET_T1_CFG); 1135 hpet_writel(cfg, HPET_T1_CFG);
1137 1136
1138 return 1; 1137 return 1;
@@ -1142,8 +1141,12 @@ static void hpet_rtc_timer_reinit(void)
1142{ 1141{
1143 unsigned int cfg, cnt; 1142 unsigned int cfg, cnt;
1144 1143
1145 if (!(PIE_on | AIE_on | UIE_on)) 1144 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1145 cfg = hpet_readl(HPET_T1_CFG);
1146 cfg &= ~HPET_TN_ENABLE;
1147 hpet_writel(cfg, HPET_T1_CFG);
1146 return; 1148 return;
1149 }
1147 1150
1148 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) 1151 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1149 hpet_rtc_int_freq = PIE_freq; 1152 hpet_rtc_int_freq = PIE_freq;
@@ -1151,15 +1154,10 @@ static void hpet_rtc_timer_reinit(void)
1151 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; 1154 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1152 1155
1153 /* It is more accurate to use the comparator value than current count.*/ 1156 /* It is more accurate to use the comparator value than current count.*/
1154 cnt = hpet_readl(HPET_T1_CMP); 1157 cnt = hpet_t1_cmp;
1155 cnt += hpet_tick*HZ/hpet_rtc_int_freq; 1158 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1156 hpet_writel(cnt, HPET_T1_CMP); 1159 hpet_writel(cnt, HPET_T1_CMP);
1157 1160 hpet_t1_cmp = cnt;
1158 cfg = hpet_readl(HPET_T1_CFG);
1159 cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
1160 hpet_writel(cfg, HPET_T1_CFG);
1161
1162 return;
1163} 1161}
1164 1162
1165/* 1163/*