1 files changed, 56 insertions, 62 deletions

diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c
index 238f73e1a834..750e01dcbdf4 100644
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -60,6 +60,7 @@
 #include <asm/setup.h>
 #include <asm/mach_apic.h>
 #include <asm/numa.h>
+#include <asm/sections.h>
 
 /*
  * Machine setup..
@@ -103,7 +104,6 @@ struct edid_info edid_info;
 struct e820map e820;
 
 extern int root_mountflags;
-extern char _text, _etext, _edata, _end;
 
 char command_line[COMMAND_LINE_SIZE];
 
@@ -412,7 +412,6 @@ contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 {
         unsigned long bootmap_size, bootmap;
 
-        memory_present(0, start_pfn, end_pfn);
         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
         if (bootmap == -1L)
@@ -571,6 +570,8 @@ void __init setup_arch(char **cmdline_p)
 
         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 
+        zap_low_mappings(0);
+
 #ifdef CONFIG_ACPI
         /*
          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
@@ -657,8 +658,6 @@ void __init setup_arch(char **cmdline_p)
         }
 #endif
 
-        sparse_init();
-
         paging_init();
 
         check_ioapic();
@@ -793,7 +792,7 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 #endif
 
         bits = 0;
-        while ((1 << bits) < c->x86_num_cores)
+        while ((1 << bits) < c->x86_max_cores)
                 bits++;
 
         /* Low order bits define the core id (index of core in socket) */
@@ -823,16 +822,14 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
                 if (!node_online(node))
                         node = nearby_node(apicid);
         }
-        cpu_to_node[cpu] = node;
+        numa_set_node(cpu, node);
 
         printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
-                        cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
+                        cpu, c->x86_max_cores, node, cpu_core_id[cpu]);
 #endif
 #endif
 }
 
-#define HWCR 0xc0010015
-
 static int __init init_amd(struct cpuinfo_x86 *c)
 {
         int r;
@@ -841,14 +838,18 @@ static int __init init_amd(struct cpuinfo_x86 *c)
 #ifdef CONFIG_SMP
         unsigned long value;
 
-        // Disable TLB flush filter by setting HWCR.FFDIS:
-        // bit 6 of msr C001_0015
-        //
-        // Errata 63 for SH-B3 steppings
-        // Errata 122 for all(?) steppings
-        rdmsrl(HWCR, value);
-        value |= 1 << 6;
-        wrmsrl(HWCR, value);
+        /*
+         * Disable TLB flush filter by setting HWCR.FFDIS on K8
+         * bit 6 of msr C001_0015
+         *
+         * Errata 63 for SH-B3 steppings
+         * Errata 122 for all steppings (F+ have it disabled by default)
+         */
+        if (c->x86 == 15) {
+                rdmsrl(MSR_K8_HWCR, value);
+                value |= 1 << 6;
+                wrmsrl(MSR_K8_HWCR, value);
+        }
 #endif
 
         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
@@ -873,9 +874,9 @@ static int __init init_amd(struct cpuinfo_x86 *c)
         display_cacheinfo(c);
 
         if (c->extended_cpuid_level >= 0x80000008) {
-                c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
-                if (c->x86_num_cores & (c->x86_num_cores - 1))
-                        c->x86_num_cores = 1;
+                c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
+                if (c->x86_max_cores & (c->x86_max_cores - 1))
+                        c->x86_max_cores = 1;
 
                 amd_detect_cmp(c);
         }
@@ -887,54 +888,44 @@ static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_SMP
         u32     eax, ebx, ecx, edx;
-        int     index_msb, tmp;
+        int     index_msb, core_bits;
         int     cpu = smp_processor_id();
-        
+
+        cpuid(1, &eax, &ebx, &ecx, &edx);
+
+        c->apicid = phys_pkg_id(0);
+
         if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
                 return;
 
-        cpuid(1, &eax, &ebx, &ecx, &edx);
         smp_num_siblings = (ebx & 0xff0000) >> 16;
-        
+
         if (smp_num_siblings == 1) {
                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
-        } else if (smp_num_siblings > 1) {
-                index_msb = 31;
-                /*
-                 * At this point we only support two siblings per
-                 * processor package.
-                 */
+        } else if (smp_num_siblings > 1 ) {
+
                 if (smp_num_siblings > NR_CPUS) {
                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
                         smp_num_siblings = 1;
                         return;
                 }
-                tmp = smp_num_siblings;
-                while ((tmp & 0x80000000 ) == 0) {
-                        tmp <<=1 ;
-                        index_msb--;
-                }
-                if (smp_num_siblings & (smp_num_siblings - 1))
-                        index_msb++;
+
+                index_msb = get_count_order(smp_num_siblings);
                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
-                
+
                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
                        phys_proc_id[cpu]);
 
-                smp_num_siblings = smp_num_siblings / c->x86_num_cores;
+                smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 
-                tmp = smp_num_siblings;
-                index_msb = 31;
-                while ((tmp & 0x80000000) == 0) {
-                        tmp <<=1 ;
-                        index_msb--;
-                }
-                if (smp_num_siblings & (smp_num_siblings - 1))
-                        index_msb++;
+                index_msb = get_count_order(smp_num_siblings) ;
+
+                core_bits = get_count_order(c->x86_max_cores);
 
-                cpu_core_id[cpu] = phys_pkg_id(index_msb);
+                cpu_core_id[cpu] = phys_pkg_id(index_msb) &
+                                               ((1 << core_bits) - 1);
 
-                if (c->x86_num_cores > 1)
+                if (c->x86_max_cores > 1)
                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
                                cpu_core_id[cpu]);
         }
@@ -965,16 +956,15 @@ static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
 static void srat_detect_node(void)
 {
 #ifdef CONFIG_NUMA
-        unsigned apicid, node;
+        unsigned node;
         int cpu = smp_processor_id();
 
         /* Don't do the funky fallback heuristics the AMD version employs
            for now. */
-        apicid = phys_proc_id[cpu];
-        node = apicid_to_node[apicid];
+        node = apicid_to_node[hard_smp_processor_id()];
         if (node == NUMA_NO_NODE)
                 node = 0;
-        cpu_to_node[cpu] = node;
+        numa_set_node(cpu, node);
 
         if (acpi_numa > 0)
                 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
@@ -992,13 +982,18 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
                 unsigned eax = cpuid_eax(0x80000008);
                 c->x86_virt_bits = (eax >> 8) & 0xff;
                 c->x86_phys_bits = eax & 0xff;
+                /* CPUID workaround for Intel 0F34 CPU */
+                if (c->x86_vendor == X86_VENDOR_INTEL &&
+                    c->x86 == 0xF && c->x86_model == 0x3 &&
+                    c->x86_mask == 0x4)
+                        c->x86_phys_bits = 36;
         }
 
         if (c->x86 == 15)
                 c->x86_cache_alignment = c->x86_clflush_size * 2;
         if (c->x86 >= 15)
                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
-        c->x86_num_cores = intel_num_cpu_cores(c);
+        c->x86_max_cores = intel_num_cpu_cores(c);
 
         srat_detect_node();
 }
@@ -1036,7 +1031,7 @@ void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
         c->x86_model_id[0] = '\0';  /* Unset */
         c->x86_clflush_size = 64;
         c->x86_cache_alignment = c->x86_clflush_size;
-        c->x86_num_cores = 1;
+        c->x86_max_cores = 1;
         c->extended_cpuid_level = 0;
         memset(&c->x86_capability, 0, sizeof c->x86_capability);
 
@@ -1059,10 +1054,10 @@ void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
                 c->x86 = (tfms >> 8) & 0xf;
                 c->x86_model = (tfms >> 4) & 0xf;
                 c->x86_mask = tfms & 0xf;
-                if (c->x86 == 0xf) {
+                if (c->x86 == 0xf)
                         c->x86 += (tfms >> 20) & 0xff;
+                if (c->x86 >= 0x6)
                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
-                } 
                 if (c->x86_capability[0] & (1<<19)) 
                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
         } else {
@@ -1212,7 +1207,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 
                 /* Intel-defined (#2) */
-                "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
+                "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -1270,13 +1265,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
         
 #ifdef CONFIG_SMP
-        if (smp_num_siblings * c->x86_num_cores > 1) {
+        if (smp_num_siblings * c->x86_max_cores > 1) {
                 int cpu = c - cpu_data;
                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
-                seq_printf(m, "siblings\t: %d\n",
-                                c->x86_num_cores * smp_num_siblings);
+                seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
                 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
-                seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
+                seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
         }
 #endif