diff options
Diffstat (limited to 'arch/x86_64/kernel/setup.c')
-rw-r--r-- | arch/x86_64/kernel/setup.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index fc944b5e8f4a..af425a8049fb 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c | |||
@@ -471,8 +471,7 @@ void __init setup_arch(char **cmdline_p) | |||
471 | if (LOADER_TYPE && INITRD_START) { | 471 | if (LOADER_TYPE && INITRD_START) { |
472 | if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) { | 472 | if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) { |
473 | reserve_bootmem_generic(INITRD_START, INITRD_SIZE); | 473 | reserve_bootmem_generic(INITRD_START, INITRD_SIZE); |
474 | initrd_start = | 474 | initrd_start = INITRD_START + PAGE_OFFSET; |
475 | INITRD_START ? INITRD_START + PAGE_OFFSET : 0; | ||
476 | initrd_end = initrd_start+INITRD_SIZE; | 475 | initrd_end = initrd_start+INITRD_SIZE; |
477 | } | 476 | } |
478 | else { | 477 | else { |
@@ -732,11 +731,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
732 | /* Fix cpuid4 emulation for more */ | 731 | /* Fix cpuid4 emulation for more */ |
733 | num_cache_leaves = 3; | 732 | num_cache_leaves = 3; |
734 | 733 | ||
735 | /* When there is only one core no need to synchronize RDTSC */ | 734 | /* RDTSC can be speculated around */ |
736 | if (num_possible_cpus() == 1) | 735 | clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); |
737 | set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); | ||
738 | else | ||
739 | clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); | ||
740 | } | 736 | } |
741 | 737 | ||
742 | static void __cpuinit detect_ht(struct cpuinfo_x86 *c) | 738 | static void __cpuinit detect_ht(struct cpuinfo_x86 *c) |
@@ -835,6 +831,15 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
835 | set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability); | 831 | set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability); |
836 | } | 832 | } |
837 | 833 | ||
834 | if (cpu_has_ds) { | ||
835 | unsigned int l1, l2; | ||
836 | rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); | ||
837 | if (!(l1 & (1<<11))) | ||
838 | set_bit(X86_FEATURE_BTS, c->x86_capability); | ||
839 | if (!(l1 & (1<<12))) | ||
840 | set_bit(X86_FEATURE_PEBS, c->x86_capability); | ||
841 | } | ||
842 | |||
838 | n = c->extended_cpuid_level; | 843 | n = c->extended_cpuid_level; |
839 | if (n >= 0x80000008) { | 844 | if (n >= 0x80000008) { |
840 | unsigned eax = cpuid_eax(0x80000008); | 845 | unsigned eax = cpuid_eax(0x80000008); |
@@ -854,7 +859,10 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
854 | set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); | 859 | set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); |
855 | if (c->x86 == 6) | 860 | if (c->x86 == 6) |
856 | set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); | 861 | set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability); |
857 | set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); | 862 | if (c->x86 == 15) |
863 | set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); | ||
864 | else | ||
865 | clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability); | ||
858 | c->x86_max_cores = intel_num_cpu_cores(c); | 866 | c->x86_max_cores = intel_num_cpu_cores(c); |
859 | 867 | ||
860 | srat_detect_node(); | 868 | srat_detect_node(); |