diff options
Diffstat (limited to 'arch/x86_64/kernel/hpet.c')
-rw-r--r-- | arch/x86_64/kernel/hpet.c | 453 |
1 files changed, 453 insertions, 0 deletions
diff --git a/arch/x86_64/kernel/hpet.c b/arch/x86_64/kernel/hpet.c new file mode 100644 index 000000000000..08ab37c966c2 --- /dev/null +++ b/arch/x86_64/kernel/hpet.c | |||
@@ -0,0 +1,453 @@ | |||
1 | #include <linux/kernel.h> | ||
2 | #include <linux/sched.h> | ||
3 | #include <linux/init.h> | ||
4 | #include <linux/mc146818rtc.h> | ||
5 | #include <linux/time.h> | ||
6 | #include <linux/clocksource.h> | ||
7 | #include <linux/ioport.h> | ||
8 | #include <linux/acpi.h> | ||
9 | #include <linux/hpet.h> | ||
10 | #include <asm/pgtable.h> | ||
11 | #include <asm/vsyscall.h> | ||
12 | #include <asm/timex.h> | ||
13 | #include <asm/hpet.h> | ||
14 | |||
15 | int nohpet __initdata; | ||
16 | |||
17 | unsigned long hpet_address; | ||
18 | unsigned long hpet_period; /* fsecs / HPET clock */ | ||
19 | unsigned long hpet_tick; /* HPET clocks / interrupt */ | ||
20 | |||
21 | int hpet_use_timer; /* Use counter of hpet for time keeping, | ||
22 | * otherwise PIT | ||
23 | */ | ||
24 | unsigned int do_gettimeoffset_hpet(void) | ||
25 | { | ||
26 | /* cap counter read to one tick to avoid inconsistencies */ | ||
27 | unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last; | ||
28 | return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE; | ||
29 | } | ||
30 | |||
31 | #ifdef CONFIG_HPET | ||
32 | static __init int late_hpet_init(void) | ||
33 | { | ||
34 | struct hpet_data hd; | ||
35 | unsigned int ntimer; | ||
36 | |||
37 | if (!hpet_address) | ||
38 | return 0; | ||
39 | |||
40 | memset(&hd, 0, sizeof(hd)); | ||
41 | |||
42 | ntimer = hpet_readl(HPET_ID); | ||
43 | ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT; | ||
44 | ntimer++; | ||
45 | |||
46 | /* | ||
47 | * Register with driver. | ||
48 | * Timer0 and Timer1 is used by platform. | ||
49 | */ | ||
50 | hd.hd_phys_address = hpet_address; | ||
51 | hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE); | ||
52 | hd.hd_nirqs = ntimer; | ||
53 | hd.hd_flags = HPET_DATA_PLATFORM; | ||
54 | hpet_reserve_timer(&hd, 0); | ||
55 | #ifdef CONFIG_HPET_EMULATE_RTC | ||
56 | hpet_reserve_timer(&hd, 1); | ||
57 | #endif | ||
58 | hd.hd_irq[0] = HPET_LEGACY_8254; | ||
59 | hd.hd_irq[1] = HPET_LEGACY_RTC; | ||
60 | if (ntimer > 2) { | ||
61 | struct hpet *hpet; | ||
62 | struct hpet_timer *timer; | ||
63 | int i; | ||
64 | |||
65 | hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE); | ||
66 | timer = &hpet->hpet_timers[2]; | ||
67 | for (i = 2; i < ntimer; timer++, i++) | ||
68 | hd.hd_irq[i] = (timer->hpet_config & | ||
69 | Tn_INT_ROUTE_CNF_MASK) >> | ||
70 | Tn_INT_ROUTE_CNF_SHIFT; | ||
71 | |||
72 | } | ||
73 | |||
74 | hpet_alloc(&hd); | ||
75 | return 0; | ||
76 | } | ||
77 | fs_initcall(late_hpet_init); | ||
78 | #endif | ||
79 | |||
80 | int hpet_timer_stop_set_go(unsigned long tick) | ||
81 | { | ||
82 | unsigned int cfg; | ||
83 | |||
84 | /* | ||
85 | * Stop the timers and reset the main counter. | ||
86 | */ | ||
87 | |||
88 | cfg = hpet_readl(HPET_CFG); | ||
89 | cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY); | ||
90 | hpet_writel(cfg, HPET_CFG); | ||
91 | hpet_writel(0, HPET_COUNTER); | ||
92 | hpet_writel(0, HPET_COUNTER + 4); | ||
93 | |||
94 | /* | ||
95 | * Set up timer 0, as periodic with first interrupt to happen at hpet_tick, | ||
96 | * and period also hpet_tick. | ||
97 | */ | ||
98 | if (hpet_use_timer) { | ||
99 | hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL | | ||
100 | HPET_TN_32BIT, HPET_T0_CFG); | ||
101 | hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */ | ||
102 | hpet_writel(hpet_tick, HPET_T0_CMP); /* period */ | ||
103 | cfg |= HPET_CFG_LEGACY; | ||
104 | } | ||
105 | /* | ||
106 | * Go! | ||
107 | */ | ||
108 | |||
109 | cfg |= HPET_CFG_ENABLE; | ||
110 | hpet_writel(cfg, HPET_CFG); | ||
111 | |||
112 | return 0; | ||
113 | } | ||
114 | |||
115 | int hpet_arch_init(void) | ||
116 | { | ||
117 | unsigned int id; | ||
118 | |||
119 | if (!hpet_address) | ||
120 | return -1; | ||
121 | set_fixmap_nocache(FIX_HPET_BASE, hpet_address); | ||
122 | __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE); | ||
123 | |||
124 | /* | ||
125 | * Read the period, compute tick and quotient. | ||
126 | */ | ||
127 | |||
128 | id = hpet_readl(HPET_ID); | ||
129 | |||
130 | if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER)) | ||
131 | return -1; | ||
132 | |||
133 | hpet_period = hpet_readl(HPET_PERIOD); | ||
134 | if (hpet_period < 100000 || hpet_period > 100000000) | ||
135 | return -1; | ||
136 | |||
137 | hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period; | ||
138 | |||
139 | hpet_use_timer = (id & HPET_ID_LEGSUP); | ||
140 | |||
141 | return hpet_timer_stop_set_go(hpet_tick); | ||
142 | } | ||
143 | |||
144 | int hpet_reenable(void) | ||
145 | { | ||
146 | return hpet_timer_stop_set_go(hpet_tick); | ||
147 | } | ||
148 | |||
149 | /* | ||
150 | * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing | ||
151 | * it to the HPET timer of known frequency. | ||
152 | */ | ||
153 | |||
154 | #define TICK_COUNT 100000000 | ||
155 | #define TICK_MIN 5000 | ||
156 | |||
157 | /* | ||
158 | * Some platforms take periodic SMI interrupts with 5ms duration. Make sure none | ||
159 | * occurs between the reads of the hpet & TSC. | ||
160 | */ | ||
161 | static void __init read_hpet_tsc(int *hpet, int *tsc) | ||
162 | { | ||
163 | int tsc1, tsc2, hpet1; | ||
164 | |||
165 | do { | ||
166 | tsc1 = get_cycles_sync(); | ||
167 | hpet1 = hpet_readl(HPET_COUNTER); | ||
168 | tsc2 = get_cycles_sync(); | ||
169 | } while (tsc2 - tsc1 > TICK_MIN); | ||
170 | *hpet = hpet1; | ||
171 | *tsc = tsc2; | ||
172 | } | ||
173 | |||
174 | unsigned int __init hpet_calibrate_tsc(void) | ||
175 | { | ||
176 | int tsc_start, hpet_start; | ||
177 | int tsc_now, hpet_now; | ||
178 | unsigned long flags; | ||
179 | |||
180 | local_irq_save(flags); | ||
181 | |||
182 | read_hpet_tsc(&hpet_start, &tsc_start); | ||
183 | |||
184 | do { | ||
185 | local_irq_disable(); | ||
186 | read_hpet_tsc(&hpet_now, &tsc_now); | ||
187 | local_irq_restore(flags); | ||
188 | } while ((tsc_now - tsc_start) < TICK_COUNT && | ||
189 | (hpet_now - hpet_start) < TICK_COUNT); | ||
190 | |||
191 | return (tsc_now - tsc_start) * 1000000000L | ||
192 | / ((hpet_now - hpet_start) * hpet_period / 1000); | ||
193 | } | ||
194 | |||
195 | #ifdef CONFIG_HPET_EMULATE_RTC | ||
196 | /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET | ||
197 | * is enabled, we support RTC interrupt functionality in software. | ||
198 | * RTC has 3 kinds of interrupts: | ||
199 | * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock | ||
200 | * is updated | ||
201 | * 2) Alarm Interrupt - generate an interrupt at a specific time of day | ||
202 | * 3) Periodic Interrupt - generate periodic interrupt, with frequencies | ||
203 | * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2) | ||
204 | * (1) and (2) above are implemented using polling at a frequency of | ||
205 | * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt | ||
206 | * overhead. (DEFAULT_RTC_INT_FREQ) | ||
207 | * For (3), we use interrupts at 64Hz or user specified periodic | ||
208 | * frequency, whichever is higher. | ||
209 | */ | ||
210 | #include <linux/rtc.h> | ||
211 | |||
212 | #define DEFAULT_RTC_INT_FREQ 64 | ||
213 | #define RTC_NUM_INTS 1 | ||
214 | |||
215 | static unsigned long UIE_on; | ||
216 | static unsigned long prev_update_sec; | ||
217 | |||
218 | static unsigned long AIE_on; | ||
219 | static struct rtc_time alarm_time; | ||
220 | |||
221 | static unsigned long PIE_on; | ||
222 | static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ; | ||
223 | static unsigned long PIE_count; | ||
224 | |||
225 | static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */ | ||
226 | static unsigned int hpet_t1_cmp; /* cached comparator register */ | ||
227 | |||
228 | int is_hpet_enabled(void) | ||
229 | { | ||
230 | return hpet_address != 0; | ||
231 | } | ||
232 | |||
233 | /* | ||
234 | * Timer 1 for RTC, we do not use periodic interrupt feature, | ||
235 | * even if HPET supports periodic interrupts on Timer 1. | ||
236 | * The reason being, to set up a periodic interrupt in HPET, we need to | ||
237 | * stop the main counter. And if we do that everytime someone diables/enables | ||
238 | * RTC, we will have adverse effect on main kernel timer running on Timer 0. | ||
239 | * So, for the time being, simulate the periodic interrupt in software. | ||
240 | * | ||
241 | * hpet_rtc_timer_init() is called for the first time and during subsequent | ||
242 | * interuppts reinit happens through hpet_rtc_timer_reinit(). | ||
243 | */ | ||
244 | int hpet_rtc_timer_init(void) | ||
245 | { | ||
246 | unsigned int cfg, cnt; | ||
247 | unsigned long flags; | ||
248 | |||
249 | if (!is_hpet_enabled()) | ||
250 | return 0; | ||
251 | /* | ||
252 | * Set the counter 1 and enable the interrupts. | ||
253 | */ | ||
254 | if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) | ||
255 | hpet_rtc_int_freq = PIE_freq; | ||
256 | else | ||
257 | hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; | ||
258 | |||
259 | local_irq_save(flags); | ||
260 | |||
261 | cnt = hpet_readl(HPET_COUNTER); | ||
262 | cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq); | ||
263 | hpet_writel(cnt, HPET_T1_CMP); | ||
264 | hpet_t1_cmp = cnt; | ||
265 | |||
266 | cfg = hpet_readl(HPET_T1_CFG); | ||
267 | cfg &= ~HPET_TN_PERIODIC; | ||
268 | cfg |= HPET_TN_ENABLE | HPET_TN_32BIT; | ||
269 | hpet_writel(cfg, HPET_T1_CFG); | ||
270 | |||
271 | local_irq_restore(flags); | ||
272 | |||
273 | return 1; | ||
274 | } | ||
275 | |||
276 | static void hpet_rtc_timer_reinit(void) | ||
277 | { | ||
278 | unsigned int cfg, cnt, ticks_per_int, lost_ints; | ||
279 | |||
280 | if (unlikely(!(PIE_on | AIE_on | UIE_on))) { | ||
281 | cfg = hpet_readl(HPET_T1_CFG); | ||
282 | cfg &= ~HPET_TN_ENABLE; | ||
283 | hpet_writel(cfg, HPET_T1_CFG); | ||
284 | return; | ||
285 | } | ||
286 | |||
287 | if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) | ||
288 | hpet_rtc_int_freq = PIE_freq; | ||
289 | else | ||
290 | hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; | ||
291 | |||
292 | /* It is more accurate to use the comparator value than current count.*/ | ||
293 | ticks_per_int = hpet_tick * HZ / hpet_rtc_int_freq; | ||
294 | hpet_t1_cmp += ticks_per_int; | ||
295 | hpet_writel(hpet_t1_cmp, HPET_T1_CMP); | ||
296 | |||
297 | /* | ||
298 | * If the interrupt handler was delayed too long, the write above tries | ||
299 | * to schedule the next interrupt in the past and the hardware would | ||
300 | * not interrupt until the counter had wrapped around. | ||
301 | * So we have to check that the comparator wasn't set to a past time. | ||
302 | */ | ||
303 | cnt = hpet_readl(HPET_COUNTER); | ||
304 | if (unlikely((int)(cnt - hpet_t1_cmp) > 0)) { | ||
305 | lost_ints = (cnt - hpet_t1_cmp) / ticks_per_int + 1; | ||
306 | /* Make sure that, even with the time needed to execute | ||
307 | * this code, the next scheduled interrupt has been moved | ||
308 | * back to the future: */ | ||
309 | lost_ints++; | ||
310 | |||
311 | hpet_t1_cmp += lost_ints * ticks_per_int; | ||
312 | hpet_writel(hpet_t1_cmp, HPET_T1_CMP); | ||
313 | |||
314 | if (PIE_on) | ||
315 | PIE_count += lost_ints; | ||
316 | |||
317 | if (printk_ratelimit()) | ||
318 | printk(KERN_WARNING "rtc: lost some interrupts at %ldHz.\n", | ||
319 | hpet_rtc_int_freq); | ||
320 | } | ||
321 | } | ||
322 | |||
323 | /* | ||
324 | * The functions below are called from rtc driver. | ||
325 | * Return 0 if HPET is not being used. | ||
326 | * Otherwise do the necessary changes and return 1. | ||
327 | */ | ||
328 | int hpet_mask_rtc_irq_bit(unsigned long bit_mask) | ||
329 | { | ||
330 | if (!is_hpet_enabled()) | ||
331 | return 0; | ||
332 | |||
333 | if (bit_mask & RTC_UIE) | ||
334 | UIE_on = 0; | ||
335 | if (bit_mask & RTC_PIE) | ||
336 | PIE_on = 0; | ||
337 | if (bit_mask & RTC_AIE) | ||
338 | AIE_on = 0; | ||
339 | |||
340 | return 1; | ||
341 | } | ||
342 | |||
343 | int hpet_set_rtc_irq_bit(unsigned long bit_mask) | ||
344 | { | ||
345 | int timer_init_reqd = 0; | ||
346 | |||
347 | if (!is_hpet_enabled()) | ||
348 | return 0; | ||
349 | |||
350 | if (!(PIE_on | AIE_on | UIE_on)) | ||
351 | timer_init_reqd = 1; | ||
352 | |||
353 | if (bit_mask & RTC_UIE) { | ||
354 | UIE_on = 1; | ||
355 | } | ||
356 | if (bit_mask & RTC_PIE) { | ||
357 | PIE_on = 1; | ||
358 | PIE_count = 0; | ||
359 | } | ||
360 | if (bit_mask & RTC_AIE) { | ||
361 | AIE_on = 1; | ||
362 | } | ||
363 | |||
364 | if (timer_init_reqd) | ||
365 | hpet_rtc_timer_init(); | ||
366 | |||
367 | return 1; | ||
368 | } | ||
369 | |||
370 | int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) | ||
371 | { | ||
372 | if (!is_hpet_enabled()) | ||
373 | return 0; | ||
374 | |||
375 | alarm_time.tm_hour = hrs; | ||
376 | alarm_time.tm_min = min; | ||
377 | alarm_time.tm_sec = sec; | ||
378 | |||
379 | return 1; | ||
380 | } | ||
381 | |||
382 | int hpet_set_periodic_freq(unsigned long freq) | ||
383 | { | ||
384 | if (!is_hpet_enabled()) | ||
385 | return 0; | ||
386 | |||
387 | PIE_freq = freq; | ||
388 | PIE_count = 0; | ||
389 | |||
390 | return 1; | ||
391 | } | ||
392 | |||
393 | int hpet_rtc_dropped_irq(void) | ||
394 | { | ||
395 | if (!is_hpet_enabled()) | ||
396 | return 0; | ||
397 | |||
398 | return 1; | ||
399 | } | ||
400 | |||
401 | irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
402 | { | ||
403 | struct rtc_time curr_time; | ||
404 | unsigned long rtc_int_flag = 0; | ||
405 | int call_rtc_interrupt = 0; | ||
406 | |||
407 | hpet_rtc_timer_reinit(); | ||
408 | |||
409 | if (UIE_on | AIE_on) { | ||
410 | rtc_get_rtc_time(&curr_time); | ||
411 | } | ||
412 | if (UIE_on) { | ||
413 | if (curr_time.tm_sec != prev_update_sec) { | ||
414 | /* Set update int info, call real rtc int routine */ | ||
415 | call_rtc_interrupt = 1; | ||
416 | rtc_int_flag = RTC_UF; | ||
417 | prev_update_sec = curr_time.tm_sec; | ||
418 | } | ||
419 | } | ||
420 | if (PIE_on) { | ||
421 | PIE_count++; | ||
422 | if (PIE_count >= hpet_rtc_int_freq/PIE_freq) { | ||
423 | /* Set periodic int info, call real rtc int routine */ | ||
424 | call_rtc_interrupt = 1; | ||
425 | rtc_int_flag |= RTC_PF; | ||
426 | PIE_count = 0; | ||
427 | } | ||
428 | } | ||
429 | if (AIE_on) { | ||
430 | if ((curr_time.tm_sec == alarm_time.tm_sec) && | ||
431 | (curr_time.tm_min == alarm_time.tm_min) && | ||
432 | (curr_time.tm_hour == alarm_time.tm_hour)) { | ||
433 | /* Set alarm int info, call real rtc int routine */ | ||
434 | call_rtc_interrupt = 1; | ||
435 | rtc_int_flag |= RTC_AF; | ||
436 | } | ||
437 | } | ||
438 | if (call_rtc_interrupt) { | ||
439 | rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8)); | ||
440 | rtc_interrupt(rtc_int_flag, dev_id); | ||
441 | } | ||
442 | return IRQ_HANDLED; | ||
443 | } | ||
444 | #endif | ||
445 | |||
446 | static int __init nohpet_setup(char *s) | ||
447 | { | ||
448 | nohpet = 1; | ||
449 | return 1; | ||
450 | } | ||
451 | |||
452 | __setup("nohpet", nohpet_setup); | ||
453 | |||