65 files changed, 656 insertions, 325 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ddb52b8d38a7..b6cc9c9dc919 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -124,10 +124,18 @@ config ARCH_MAY_HAVE_PC_FDC
        def_bool y
 config RWSEM_GENERIC_SPINLOCK
-        def_bool !X86_XADD
+        bool
+        depends on !X86_XADD || PREEMPT_RT
+        default y
+config ASM_SEMAPHORES
+        bool
+        default y
 config RWSEM_XCHGADD_ALGORITHM
-        def_bool X86_XADD
+        bool
+        depends on X86_XADD && !RWSEM_GENERIC_SPINLOCK && !PREEMPT_RT
+        default y
 config ARCH_HAS_CPU_IDLE_WAIT
        def_bool y
@@ -281,6 +289,7 @@ config X86_X2APIC
 config SPARSE_IRQ
        bool "Support sparse irq numbering"
        depends on PCI_MSI || HT_IRQ
+        depends on !PREEMPT_RT
        ---help---
          This enables support for sparse irqs. This is useful for distro
          kernels that want to define a high CONFIG_NR_CPUS value but still
@@ -712,7 +721,7 @@ config IOMMU_API
 config MAXSMP
        bool "Configure Maximum number of SMP Processors and NUMA Nodes"
-        depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
+        depends on 0 && X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
        select CPUMASK_OFFSTACK
        default n
        ---help---
@@ -1898,7 +1907,7 @@ config PCI_MMCONFIG
 config DMAR
        bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
-        depends on PCI_MSI && ACPI && EXPERIMENTAL
+        depends on PCI_MSI && ACPI && EXPERIMENTAL && !PREEMPT_RT
        help
          DMA remapping (DMAR) devices support enables independent address
          translations for Direct Memory Access (DMA) from devices.
@@ -1941,6 +1950,7 @@ config DMAR_FLOPPY_WA
 config INTR_REMAP
        bool "Support for Interrupt Remapping (EXPERIMENTAL)"
        depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
+        depends on !PREEMPT_RT
        ---help---
          Supports Interrupt remapping for IO-APIC and MSI devices.
          To use x2apic mode in the CPU's which support x2APIC enhancements or
@@ -2071,7 +2081,7 @@ endmenu
 config HAVE_ATOMIC_IOMAP
        def_bool y
-        depends on X86_32
+        depends on X86_32 && (!PREEMPT_RT || HIGHMEM)
 source "net/Kconfig"
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index bc01e3ebfeb2..93dc8cc1e91f 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -76,6 +76,7 @@ config DEBUG_PER_CPU_MAPS
        bool "Debug access to per_cpu maps"
        depends on DEBUG_KERNEL
        depends on SMP
+        depends on !PREEMPT_RT
        default n
        ---help---
          Say Y to verify that the per_cpu map being accessed has
@@ -126,6 +127,7 @@ config DEBUG_NX_TEST
 config 4KSTACKS
        bool "Use 4Kb for kernel stacks instead of 8Kb"
        depends on X86_32
+        default y
        ---help---
          If you say Y here the kernel will use a 4Kb stacksize for the
          kernel stack attached to each process/thread. This facilitates
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 56f462cf22d2..ead7e0b3522d 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -50,8 +50,8 @@
 #define ACPI_ASM_MACROS
 #define BREAKPOINT3
-#define ACPI_DISABLE_IRQS() local_irq_disable()
+#define ACPI_DISABLE_IRQS() local_irq_disable_nort()
-#define ACPI_ENABLE_IRQS()  local_irq_enable()
+#define ACPI_ENABLE_IRQS()  local_irq_enable_nort()
 #define ACPI_FLUSH_CPU_CACHE()  wbinvd()
 int __acpi_acquire_global_lock(unsigned int *lock);
diff --git a/arch/x86/include/asm/atomic_32.h b/arch/x86/include/asm/atomic_32.h
index dc5a667ff791..166704f52c84 100644
--- a/arch/x86/include/asm/atomic_32.h
+++ b/arch/x86/include/asm/atomic_32.h
@@ -186,10 +186,10 @@ static inline int atomic_add_return(int i, atomic_t *v)
 #ifdef CONFIG_M386
 no_xadd: /* Legacy 386 processor */
-        local_irq_save(flags);
+        raw_local_irq_save(flags);
        __i = atomic_read(v);
        atomic_set(v, i + __i);
-        local_irq_restore(flags);
+        raw_local_irq_restore(flags);
        return i + __i;
 #endif
 }
diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h
index 014c2b85ae45..c21ba64f2fa0 100644
--- a/arch/x86/include/asm/highmem.h
+++ b/arch/x86/include/asm/highmem.h
@@ -55,19 +55,26 @@ extern unsigned long highstart_pfn, highend_pfn;
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 extern void *kmap_high(struct page *page);
+extern void *kmap_pfn_prot(unsigned long pfn, pgprot_t prot);
 extern void kunmap_high(struct page *page);
 void *kmap(struct page *page);
+void *kmap_page_prot(struct page *page, pgprot_t prot);
+extern void kunmap_virt(void *ptr);
+extern struct page *kmap_to_page(void *ptr);
 void kunmap(struct page *page);
-void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot);
-void *kmap_atomic(struct page *page, enum km_type type);
+void *__kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot);
-void kunmap_atomic(void *kvaddr, enum km_type type);
+void *__kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
-void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
+void *__kmap_atomic(struct page *page, enum km_type type);
-void *kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
+void *__kmap_atomic_direct(struct page *page, enum km_type type);
-struct page *kmap_atomic_to_page(void *ptr);
+void __kunmap_atomic(void *kvaddr, enum km_type type);
+void *__kmap_atomic_pfn(unsigned long pfn, enum km_type type);
+struct page *__kmap_atomic_to_page(void *ptr);
 #ifndef CONFIG_PARAVIRT
-#define kmap_atomic_pte(page, type)     kmap_atomic(page, type)
+#define kmap_atomic_pte(page, type)             kmap_atomic(page, type)
+#define kmap_atomic_pte_direct(page, type)      kmap_atomic_direct(page, type)
 #endif
 #define flush_cache_kmaps()     do { } while (0)
@@ -75,6 +82,29 @@ struct page *kmap_atomic_to_page(void *ptr);
 extern void add_highpages_with_active_regions(int nid, unsigned long start_pfn,
                                        unsigned long end_pfn);
+/*
+ * on PREEMPT_RT kmap_atomic() is a wrapper that uses kmap():
+ */
+#ifdef CONFIG_PREEMPT_RT
+# define kmap_atomic_prot(page, type, prot)     ({ pagefault_disable(); kmap_pfn_prot(page_to_pfn(page), prot); })
+# define kmap_atomic_prot_pfn(pfn, type, prot)  ({ pagefault_disable(); kmap_pfn_prot(pfn, prot); })
+# define kmap_atomic(page, type)        ({ pagefault_disable(); kmap(page); })
+# define kmap_atomic_pfn(pfn, type)     kmap(pfn_to_page(pfn))
+# define kunmap_atomic(kvaddr, type)    do { kunmap_virt(kvaddr); pagefault_enable(); } while(0)
+# define kmap_atomic_to_page(kvaddr)    kmap_to_page(kvaddr)
+# define kmap_atomic_direct(page, type) __kmap_atomic_direct(page, type)
+# define kunmap_atomic_direct(kvaddr, type)     __kunmap_atomic(kvaddr, type)
+#else
+# define kmap_atomic_prot(page, type, prot)     __kmap_atomic_prot(page, type, prot)
+# define kmap_atomic_prot_pfn(pfn, type, prot)  __kmap_atomic_prot_pfn(pfn, type, prot)
+# define kmap_atomic(page, type)        __kmap_atomic(page, type)
+# define kmap_atomic_pfn(pfn, type)     __kmap_atomic_pfn(pfn, type)
+# define kunmap_atomic(kvaddr, type)    __kunmap_atomic(kvaddr, type)
+# define kmap_atomic_to_page(kvaddr)    __kmap_atomic_to_page(kvaddr)
+# define kmap_atomic_direct(page, type) __kmap_atomic(page, type)
+# define kunmap_atomic_direct(kvaddr, type)     __kunmap_atomic(kvaddr, type)
+#endif
 #endif /* __KERNEL__ */
 #endif /* _ASM_X86_HIGHMEM_H */
diff --git a/arch/x86/include/asm/i8253.h b/arch/x86/include/asm/i8253.h
index 1edbf89680fd..fc1f579fb965 100644
--- a/arch/x86/include/asm/i8253.h
+++ b/arch/x86/include/asm/i8253.h
@@ -6,7 +6,7 @@
 #define PIT_CH0                 0x40
 #define PIT_CH2                 0x42
-extern spinlock_t i8253_lock;
+extern raw_spinlock_t i8253_lock;
 extern struct clock_event_device *global_clock_event;
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h
index 58d7091eeb1f..7ec65b18085d 100644
--- a/arch/x86/include/asm/i8259.h
+++ b/arch/x86/include/asm/i8259.h
@@ -24,7 +24,7 @@ extern unsigned int cached_irq_mask;
 #define SLAVE_ICW4_DEFAULT      0x01
 #define PIC_ICW4_AEOI           2
-extern spinlock_t i8259A_lock;
+extern raw_spinlock_t i8259A_lock;
 extern void init_8259A(int auto_eoi);
 extern void enable_8259A_irq(unsigned int irq);
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
index 7639dbf5d223..0ec050a154be 100644
--- a/arch/x86/include/asm/page_64_types.h
+++ b/arch/x86/include/asm/page_64_types.h
@@ -14,12 +14,21 @@
 #define IRQ_STACK_ORDER 2
 #define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
-#define STACKFAULT_STACK 1
+#ifdef CONFIG_PREEMPT_RT
-#define DOUBLEFAULT_STACK 2
+# define STACKFAULT_STACK 0
-#define NMI_STACK 3
+# define DOUBLEFAULT_STACK 1
-#define DEBUG_STACK 4
+# define NMI_STACK 2
-#define MCE_STACK 5
+# define DEBUG_STACK 0
-#define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
+# define MCE_STACK 3
+# define N_EXCEPTION_STACKS 3  /* hw limit: 7 */
+#else
+# define STACKFAULT_STACK 1
+# define DOUBLEFAULT_STACK 2
+# define NMI_STACK 3
+# define DEBUG_STACK 4
+# define MCE_STACK 5
+# define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
+#endif
 #define PUD_PAGE_SIZE           (_AC(1, UL) << PUD_SHIFT)
 #define PUD_PAGE_MASK           (~(PUD_PAGE_SIZE-1))
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index dd59a85a918f..fffef519b1f9 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -442,6 +442,14 @@ static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
        ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
        return (void *)ret;
 }
+static inline void *kmap_atomic_pte_direct(struct page *page, enum km_type type)
+{
+        unsigned long ret;
+        ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte_direct,
+                         page, type);
+        return (void *)ret;
+}
 #endif
 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index b1e70d51e40c..ca14f6c0720b 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -306,6 +306,7 @@ struct pv_mmu_ops {
 #ifdef CONFIG_HIGHPTE
        void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
+        void *(*kmap_atomic_pte_direct)(struct page *page, enum km_type type);
 #endif
        struct pv_lazy_ops lazy_mode;
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index b4bf9a942ed0..567d00974b22 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -83,7 +83,7 @@ struct irq_routing_table {
 extern unsigned int pcibios_irq_mask;
 extern int pcibios_scanned;
-extern spinlock_t pci_config_lock;
+extern raw_spinlock_t pci_config_lock;
 extern int (*pcibios_enable_irq)(struct pci_dev *dev);
 extern void (*pcibios_disable_irq)(struct pci_dev *dev);
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 177b0165ea01..0e989a1df2fb 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -71,6 +71,7 @@ static inline void pud_clear(pud_t *pudp)
 {
        unsigned long pgd;
+        preempt_disable();
        set_pud(pudp, __pud(0));
        /*
@@ -86,6 +87,7 @@ static inline void pud_clear(pud_t *pudp)
        if (__pa(pudp) >= pgd && __pa(pudp) <
            (pgd + sizeof(pgd_t)*PTRS_PER_PGD))
                write_cr3(pgd);
+        preempt_enable();
 }
 #ifdef CONFIG_SMP
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index 01fd9461d323..b323c3df7d36 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -59,14 +59,20 @@ extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
 #define pte_offset_map_nested(dir, address)                             \
        ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) +          \
         pte_index((address)))
+#define pte_offset_map_direct(dir, address)                             \
+        ((pte_t *)kmap_atomic_pte_direct(pmd_page(*(dir)), __KM_PTE) +  \
+         pte_index((address)))
 #define pte_unmap(pte) kunmap_atomic((pte), __KM_PTE)
 #define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
+#define pte_unmap_direct(pte) kunmap_atomic_direct((pte), __KM_PTE)
 #else
 #define pte_offset_map(dir, address)                                    \
        ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
 #define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
+#define pte_offset_map_direct(dir, address) pte_offset_map((dir), (address))
 #define pte_unmap(pte) do { } while (0)
 #define pte_unmap_nested(pte) do { } while (0)
+#define pte_unmap_direct(pte) do { } while (0)
 #endif
 /* Clear a kernel PTE and flush it from the TLB */
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index c57a30117149..efc01aef51c5 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -126,8 +126,10 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 /* x86-64 always has all page tables mapped. */
 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
 #define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address))
-#define pte_unmap(pte) /* NOP */
+#define pte_offset_map_direct(dir, address) pte_offset_kernel((dir), (address))
-#define pte_unmap_nested(pte) /* NOP */
+#define pte_unmap(pte) do { } while (0)
+#define pte_unmap_nested(pte) do { }  while (0)
+#define pte_unmap_direct(pte) do { }  while (0)
 #define update_mmu_cache(vma, address, pte) do { } while (0)
diff --git a/arch/x86/include/asm/rwsem.h b/arch/x86/include/asm/rwsem.h
index 606ede126972..42f8a37db6fb 100644
--- a/arch/x86/include/asm/rwsem.h
+++ b/arch/x86/include/asm/rwsem.h
@@ -45,14 +45,14 @@
 struct rwsem_waiter;
-extern asmregparm struct rw_semaphore *
+extern asmregparm struct rw_anon_semaphore *
- rwsem_down_read_failed(struct rw_semaphore *sem);
+ rwsem_down_read_failed(struct rw_anon_semaphore *sem);
-extern asmregparm struct rw_semaphore *
+extern asmregparm struct rw_anon_semaphore *
- rwsem_down_write_failed(struct rw_semaphore *sem);
+ rwsem_down_write_failed(struct rw_anon_semaphore *sem);
-extern asmregparm struct rw_semaphore *
+extern asmregparm struct rw_anon_semaphore *
- rwsem_wake(struct rw_semaphore *);
+ rwsem_wake(struct rw_anon_semaphore *);
-extern asmregparm struct rw_semaphore *
+extern asmregparm struct rw_anon_semaphore *
- rwsem_downgrade_wake(struct rw_semaphore *sem);
+ rwsem_downgrade_wake(struct rw_anon_semaphore *sem);
 /*
 * the semaphore definition
@@ -76,9 +76,9 @@ extern asmregparm struct rw_semaphore *
 typedef signed long rwsem_count_t;
-struct rw_semaphore {
+struct rw_anon_semaphore {
        rwsem_count_t           count;
-        spinlock_t              wait_lock;
+        raw_spinlock_t          wait_lock;
        struct list_head        wait_list;
 #ifdef CONFIG_DEBUG_LOCK_ALLOC
        struct lockdep_map dep_map;
@@ -86,35 +86,34 @@ struct rw_semaphore {
 };
 #ifdef CONFIG_DEBUG_LOCK_ALLOC
-# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
+# define __RWSEM_ANON_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
 #else
-# define __RWSEM_DEP_MAP_INIT(lockname)
+# define __RWSEM_ANON_DEP_MAP_INIT(lockname)
 #endif
+#define __RWSEM_ANON_INITIALIZER(name)                          \
-#define __RWSEM_INITIALIZER(name)                               \
 {                                                               \
-        RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \
+        RWSEM_UNLOCKED_VALUE, __RAW_SPIN_LOCK_UNLOCKED((name).wait_lock), \
        LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) \
 }
-#define DECLARE_RWSEM(name)                                     \
+#define DECLARE_ANON_RWSEM(name)                                        \
-        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
+        struct rw_anon_semaphore name = __RWSEM_ANON_INITIALIZER(name)
-extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
+extern void __init_anon_rwsem(struct rw_anon_semaphore *sem, const char *name,
-                         struct lock_class_key *key);
+                              struct lock_class_key *key);
-#define init_rwsem(sem)                                         \
+#define init_anon_rwsem(sem)                                            \
 do {                                                            \
        static struct lock_class_key __key;                     \
                                                                \
-        __init_rwsem((sem), #sem, &__key);                      \
+        __init_anon_rwsem((sem), #sem, &__key);                 \
 } while (0)
 /*
 * lock for reading
 */
-static inline void __down_read(struct rw_semaphore *sem)
+static inline void __down_read(struct rw_anon_semaphore *sem)
 {
        asm volatile("# beginning down_read\n\t"
                     LOCK_PREFIX _ASM_INC "(%1)\n\t"
@@ -131,7 +130,7 @@ static inline void __down_read(struct rw_semaphore *sem)
 /*
 * trylock for reading -- returns 1 if successful, 0 if contention
 */
-static inline int __down_read_trylock(struct rw_semaphore *sem)
+static inline int __down_read_trylock(struct rw_anon_semaphore *sem)
 {
        rwsem_count_t result, tmp;
        asm volatile("# beginning __down_read_trylock\n\t"
@@ -153,7 +152,8 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)
 /*
 * lock for writing
 */
-static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
+static inline void
+__down_write_nested(struct rw_anon_semaphore *sem, int subclass)
 {
        rwsem_count_t tmp;
@@ -172,7 +172,7 @@ static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
                     : "memory", "cc");
 }
-static inline void __down_write(struct rw_semaphore *sem)
+static inline void __down_write(struct rw_anon_semaphore *sem)
 {
        __down_write_nested(sem, 0);
 }
@@ -180,7 +180,7 @@ static inline void __down_write(struct rw_semaphore *sem)
 /*
 * trylock for writing -- returns 1 if successful, 0 if contention
 */
-static inline int __down_write_trylock(struct rw_semaphore *sem)
+static inline int __down_write_trylock(struct rw_anon_semaphore *sem)
 {
        rwsem_count_t ret = cmpxchg(&sem->count,
                                    RWSEM_UNLOCKED_VALUE,
@@ -193,7 +193,7 @@ static inline int __down_write_trylock(struct rw_semaphore *sem)
 /*
 * unlock after reading
 */
-static inline void __up_read(struct rw_semaphore *sem)
+static inline void __up_read(struct rw_anon_semaphore *sem)
 {
        rwsem_count_t tmp = -RWSEM_ACTIVE_READ_BIAS;
        asm volatile("# beginning __up_read\n\t"
@@ -211,7 +211,7 @@ static inline void __up_read(struct rw_semaphore *sem)
 /*
 * unlock after writing
 */
-static inline void __up_write(struct rw_semaphore *sem)
+static inline void __up_write(struct rw_anon_semaphore *sem)
 {
        rwsem_count_t tmp;
        asm volatile("# beginning __up_write\n\t"
@@ -230,7 +230,7 @@ static inline void __up_write(struct rw_semaphore *sem)
 /*
 * downgrade write lock to read lock
 */
-static inline void __downgrade_write(struct rw_semaphore *sem)
+static inline void __downgrade_write(struct rw_anon_semaphore *sem)
 {
        asm volatile("# beginning __downgrade_write\n\t"
                     LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t"
@@ -251,7 +251,7 @@ static inline void __downgrade_write(struct rw_semaphore *sem)
 * implement atomic add functionality
 */
 static inline void rwsem_atomic_add(rwsem_count_t delta,
-                                    struct rw_semaphore *sem)
+                                    struct rw_anon_semaphore *sem)
 {
        asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0"
                     : "+m" (sem->count)
@@ -262,7 +262,7 @@ static inline void rwsem_atomic_add(rwsem_count_t delta,
 * implement exchange and add functionality
 */
 static inline rwsem_count_t rwsem_atomic_update(rwsem_count_t delta,
-                                                struct rw_semaphore *sem)
+                                                struct rw_anon_semaphore *sem)
 {
        rwsem_count_t tmp = delta;
@@ -273,10 +273,54 @@ static inline rwsem_count_t rwsem_atomic_update(rwsem_count_t delta,
        return tmp + delta;
 }
+static inline int anon_rwsem_is_locked(struct rw_anon_semaphore *sem)
+{
+        return (sem->count != 0);
+}
+#ifndef CONFIG_PREEMPT_RT
+struct rw_semaphore {
+        signed long             count;
+        raw_spinlock_t          wait_lock;
+        struct list_head        wait_list;
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+        struct lockdep_map dep_map;
+#endif
+};
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
+#else
+# define __RWSEM_DEP_MAP_INIT(lockname)
+#endif
+#define __RWSEM_INITIALIZER(name) \
+{ 0, __RAW_SPIN_LOCK_UNLOCKED(name.wait_lock), LIST_HEAD_INIT((name).wait_list) \
+  __RWSEM_DEP_MAP_INIT(name) }
+#define DECLARE_RWSEM(name) \
+        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
+static inline void __init_rwsem(struct rw_semaphore *sem, const char *name,
+                                struct lock_class_key *key)
+{
+        __init_anon_rwsem((struct rw_anon_semaphore *)sem, name, key);
+}
+#define init_rwsem(sem)                                         \
+do {                                                            \
+        static struct lock_class_key __key;                     \
+                                                                \
+        __init_rwsem((sem), #sem, &__key);                      \
+} while (0)
 static inline int rwsem_is_locked(struct rw_semaphore *sem)
 {
        return (sem->count != 0);
 }
+#endif
 #endif /* __KERNEL__ */
 #endif /* _ASM_X86_RWSEM_H */
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index 5469630b27f5..3d201174ac0a 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -58,9 +58,9 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc)
        unsigned long long ns;
        unsigned long flags;
-        local_irq_save(flags);
+        raw_local_irq_save(flags);
        ns = __cycles_2_ns(cyc);
-        local_irq_restore(flags);
+        raw_local_irq_restore(flags);
        return ns;
 }
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 7f3eba08e7de..1c77e8192f62 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -7,6 +7,21 @@
 #include <asm/processor.h>
 #include <asm/system.h>
+/*
+ * TLB-flush needs to be nonpreemptible on PREEMPT_RT due to the
+ * following complex race scenario:
+ *
+ * if the current task is lazy-TLB and does a TLB flush and
+ * gets preempted after the movl %%r3, %0 but before the
+ * movl %0, %%cr3 then its ->active_mm might change and it will
+ * install the wrong cr3 when it switches back. This is not a
+ * problem for the lazy-TLB task itself, but if the next task it
+ * switches to has an ->mm that is also the lazy-TLB task's
+ * new ->active_mm, then the scheduler will assume that cr3 is
+ * the new one, while we overwrote it with the old one. The result
+ * is the wrong cr3 in the new (non-lazy-TLB) task, which typically
+ * causes an infinite pagefault upon the next userspace access.
+ */
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else
@@ -17,7 +32,9 @@
 static inline void __native_flush_tlb(void)
 {
+        preempt_disable();
        native_write_cr3(native_read_cr3());
+        preempt_enable();
 }
 static inline void __native_flush_tlb_global(void)
@@ -95,6 +112,13 @@ static inline void __flush_tlb_one(unsigned long addr)
 static inline void flush_tlb_mm(struct mm_struct *mm)
 {
+        /*
+         * This is safe on PREEMPT_RT because if we preempt
+         * right after the check but before the __flush_tlb(),
+         * and if ->active_mm changes, then we might miss a
+         * TLB flush, but that TLB flush happened already when
+         * ->active_mm was changed:
+         */
        if (mm == current->active_mm)
                __flush_tlb();
 }
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h
index 3d61e204826f..81ccfb3bff66 100644
--- a/arch/x86/include/asm/vgtod.h
+++ b/arch/x86/include/asm/vgtod.h
@@ -5,7 +5,7 @@
 #include <linux/clocksource.h>
 struct vsyscall_gtod_data {
-        seqlock_t       lock;
+        raw_seqlock_t lock;
        /* open coded 'struct timespec' */
        time_t          wall_time_sec;
diff --git a/arch/x86/include/asm/xor_32.h b/arch/x86/include/asm/xor_32.h
index 133b40a0f495..7a6aa6852678 100644
--- a/arch/x86/include/asm/xor_32.h
+++ b/arch/x86/include/asm/xor_32.h
@@ -865,7 +865,21 @@ static struct xor_block_template xor_block_pIII_sse = {
 #include <asm-generic/xor.h>
 #undef XOR_TRY_TEMPLATES
-#define XOR_TRY_TEMPLATES                               \
+/*
+ * MMX/SSE ops disable preemption for long periods of time,
+ * so on PREEMPT_RT use the register-based ops only:
+ */
+#ifdef CONFIG_PREEMPT_RT
+# define XOR_TRY_TEMPLATES                              \
+        do {                                            \
+                xor_speed(&xor_block_8regs);            \
+                xor_speed(&xor_block_8regs_p);          \
+                xor_speed(&xor_block_32regs);           \
+                xor_speed(&xor_block_32regs_p);         \
+        } while (0)
+# define XOR_SELECT_TEMPLATE(FASTEST) (FASTEST)
+#else
+# define XOR_TRY_TEMPLATES                              \
 do {                                                    \
        xor_speed(&xor_block_8regs);                    \
        xor_speed(&xor_block_8regs_p);                  \
@@ -882,7 +896,8 @@ do {							\
 /* We force the use of the SSE xor block because it can write around L2.
   We may also be able to load into the L1 only depending on how the cpu
   deals with a load to a line that is being prefetched.  */
-#define XOR_SELECT_TEMPLATE(FASTEST)                    \
+# define XOR_SELECT_TEMPLATE(FASTEST)                   \
        (cpu_has_xmm ? &xor_block_pIII_sse : FASTEST)
+#endif /* CONFIG_PREEMPT_RT */
 #endif /* _ASM_X86_XOR_32_H */
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index b35c160a4c3b..adcb4bfbaae4 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -73,8 +73,8 @@
 */
 int sis_apic_bug = -1;
-static DEFINE_SPINLOCK(ioapic_lock);
+static DEFINE_RAW_SPINLOCK(ioapic_lock);
-static DEFINE_SPINLOCK(vector_lock);
+static DEFINE_RAW_SPINLOCK(vector_lock);
 /*
 * # of IRQ routing registers
@@ -406,7 +406,7 @@ static bool io_apic_level_ack_pending(struct irq_cfg *cfg)
        struct irq_pin_list *entry;
        unsigned long flags;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        for_each_irq_pin(entry, cfg->irq_2_pin) {
                unsigned int reg;
                int pin;
@@ -415,11 +415,11 @@ static bool io_apic_level_ack_pending(struct irq_cfg *cfg)
                reg = io_apic_read(entry->apic, 0x10 + pin*2);
                /* Is the remote IRR bit set? */
                if (reg & IO_APIC_REDIR_REMOTE_IRR) {
-                        spin_unlock_irqrestore(&ioapic_lock, flags);
+                        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
                        return true;
                }
        }
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        return false;
 }
@@ -433,10 +433,10 @@ static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin)
 {
        union entry_union eu;
        unsigned long flags;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        eu.w1 = io_apic_read(apic, 0x10 + 2 * pin);
        eu.w2 = io_apic_read(apic, 0x11 + 2 * pin);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        return eu.entry;
 }
@@ -459,9 +459,9 @@ __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
 void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
 {
        unsigned long flags;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        __ioapic_write_entry(apic, pin, e);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 /*
@@ -474,10 +474,10 @@ static void ioapic_mask_entry(int apic, int pin)
        unsigned long flags;
        union entry_union eu = { .entry.mask = 1 };
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        io_apic_write(apic, 0x10 + 2*pin, eu.w1);
        io_apic_write(apic, 0x11 + 2*pin, eu.w2);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 /*
@@ -604,9 +604,9 @@ static void mask_IO_APIC_irq_desc(struct irq_desc *desc)
        BUG_ON(!cfg);
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        __mask_IO_APIC_irq(cfg);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 static void unmask_IO_APIC_irq_desc(struct irq_desc *desc)
@@ -614,9 +614,9 @@ static void unmask_IO_APIC_irq_desc(struct irq_desc *desc)
        struct irq_cfg *cfg = desc->chip_data;
        unsigned long flags;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        __unmask_IO_APIC_irq(cfg);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 static void mask_IO_APIC_irq(unsigned int irq)
@@ -1140,12 +1140,12 @@ void lock_vector_lock(void)
        /* Used to the online set of cpus does not change
         * during assign_irq_vector.
         */
-        spin_lock(&vector_lock);
+        raw_spin_lock(&vector_lock);
 }
 void unlock_vector_lock(void)
 {
-        spin_unlock(&vector_lock);
+        raw_spin_unlock(&vector_lock);
 }
 static int
@@ -1232,9 +1232,9 @@ int assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
        int err;
        unsigned long flags;
-        spin_lock_irqsave(&vector_lock, flags);
+        raw_spin_lock_irqsave(&vector_lock, flags);
        err = __assign_irq_vector(irq, cfg, mask);
-        spin_unlock_irqrestore(&vector_lock, flags);
+        raw_spin_unlock_irqrestore(&vector_lock, flags);
        return err;
 }
@@ -1651,14 +1651,14 @@ __apicdebuginit(void) print_IO_APIC(void)
        for (apic = 0; apic < nr_ioapics; apic++) {
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        reg_00.raw = io_apic_read(apic, 0);
        reg_01.raw = io_apic_read(apic, 1);
        if (reg_01.bits.version >= 0x10)
                reg_02.raw = io_apic_read(apic, 2);
        if (reg_01.bits.version >= 0x20)
                reg_03.raw = io_apic_read(apic, 3);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        printk("\n");
        printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid);
@@ -1880,7 +1880,7 @@ __apicdebuginit(void) print_PIC(void)
        printk(KERN_DEBUG "\nprinting PIC contents\n");
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        v = inb(0xa1) << 8 | inb(0x21);
        printk(KERN_DEBUG "... PIC  IMR: %04x\n", v);
@@ -1894,7 +1894,7 @@ __apicdebuginit(void) print_PIC(void)
        outb(0x0a,0xa0);
        outb(0x0a,0x20);
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
        printk(KERN_DEBUG "... PIC  ISR: %04x\n", v);
@@ -1953,9 +1953,9 @@ void __init enable_IO_APIC(void)
         * The number of IO-APIC IRQ registers (== #pins):
         */
        for (apic = 0; apic < nr_ioapics; apic++) {
-                spin_lock_irqsave(&ioapic_lock, flags);
+                raw_spin_lock_irqsave(&ioapic_lock, flags);
                reg_01.raw = io_apic_read(apic, 1);
-                spin_unlock_irqrestore(&ioapic_lock, flags);
+                raw_spin_unlock_irqrestore(&ioapic_lock, flags);
                nr_ioapic_registers[apic] = reg_01.bits.entries+1;
        }
@@ -2095,9 +2095,9 @@ void __init setup_ioapic_ids_from_mpc(void)
        for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
                /* Read the register 0 value */
-                spin_lock_irqsave(&ioapic_lock, flags);
+                raw_spin_lock_irqsave(&ioapic_lock, flags);
                reg_00.raw = io_apic_read(apic_id, 0);
-                spin_unlock_irqrestore(&ioapic_lock, flags);
+                raw_spin_unlock_irqrestore(&ioapic_lock, flags);
                old_id = mp_ioapics[apic_id].apicid;
@@ -2156,16 +2156,16 @@ void __init setup_ioapic_ids_from_mpc(void)
                        mp_ioapics[apic_id].apicid);
                reg_00.bits.ID = mp_ioapics[apic_id].apicid;
-                spin_lock_irqsave(&ioapic_lock, flags);
+                raw_spin_lock_irqsave(&ioapic_lock, flags);
                io_apic_write(apic_id, 0, reg_00.raw);
-                spin_unlock_irqrestore(&ioapic_lock, flags);
+                raw_spin_unlock_irqrestore(&ioapic_lock, flags);
                /*
                 * Sanity check
                 */
-                spin_lock_irqsave(&ioapic_lock, flags);
+                raw_spin_lock_irqsave(&ioapic_lock, flags);
                reg_00.raw = io_apic_read(apic_id, 0);
-                spin_unlock_irqrestore(&ioapic_lock, flags);
+                raw_spin_unlock_irqrestore(&ioapic_lock, flags);
                if (reg_00.bits.ID != mp_ioapics[apic_id].apicid)
                        printk("could not set ID!\n");
                else
@@ -2248,7 +2248,7 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
        unsigned long flags;
        struct irq_cfg *cfg;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        if (irq < nr_legacy_irqs) {
                disable_8259A_irq(irq);
                if (i8259A_irq_pending(irq))
@@ -2256,7 +2256,7 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
        }
        cfg = irq_cfg(irq);
        __unmask_IO_APIC_irq(cfg);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        return was_pending;
 }
@@ -2267,9 +2267,9 @@ static int ioapic_retrigger_irq(unsigned int irq)
        struct irq_cfg *cfg = irq_cfg(irq);
        unsigned long flags;
-        spin_lock_irqsave(&vector_lock, flags);
+        raw_spin_lock_irqsave(&vector_lock, flags);
        apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
-        spin_unlock_irqrestore(&vector_lock, flags);
+        raw_spin_unlock_irqrestore(&vector_lock, flags);
        return 1;
 }
@@ -2362,14 +2362,14 @@ set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
        irq = desc->irq;
        cfg = desc->chip_data;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        ret = set_desc_affinity(desc, mask, &dest);
        if (!ret) {
                /* Only the high 8 bits are valid. */
                dest = SET_APIC_LOGICAL_ID(dest);
                __target_IO_APIC_irq(irq, dest, cfg);
        }
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        return ret;
 }
@@ -2607,9 +2607,9 @@ static void eoi_ioapic_irq(struct irq_desc *desc)
        irq = desc->irq;
        cfg = desc->chip_data;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        __eoi_ioapic_irq(irq, cfg);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 static void ack_apic_level(unsigned int irq)
@@ -2623,7 +2623,8 @@ static void ack_apic_level(unsigned int irq)
        irq_complete_move(&desc);
 #ifdef CONFIG_GENERIC_PENDING_IRQ
        /* If we are moving the irq we need to mask it */
-        if (unlikely(desc->status & IRQ_MOVE_PENDING)) {
+        if (unlikely(desc->status & IRQ_MOVE_PENDING) &&
+            !(desc->status & IRQ_INPROGRESS)) {
                do_unmask_irq = 1;
                mask_IO_APIC_irq_desc(desc);
        }
@@ -2717,6 +2718,16 @@ static void ack_apic_level(unsigned int irq)
                        move_masked_irq(irq);
                unmask_IO_APIC_irq_desc(desc);
        }
+#if (defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)) && \
+        defined(CONFIG_PREEMPT_HARDIRQS)
+        /*
+         * With threaded interrupts, we always have IRQ_INPROGRESS
+         * when acking. CHECKME !!!!!
+         */
+        else if (unlikely(desc->status & IRQ_MOVE_PENDING))
+                move_masked_irq(irq);
+#endif
 }
 #ifdef CONFIG_INTR_REMAP
@@ -3191,13 +3202,13 @@ static int ioapic_resume(struct sys_device *dev)
        data = container_of(dev, struct sysfs_ioapic_data, dev);
        entry = data->entry;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        reg_00.raw = io_apic_read(dev->id, 0);
        if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) {
                reg_00.bits.ID = mp_ioapics[dev->id].apicid;
                io_apic_write(dev->id, 0, reg_00.raw);
        }
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        for (i = 0; i < nr_ioapic_registers[dev->id]; i++)
                ioapic_write_entry(dev->id, i, entry[i]);
@@ -3260,7 +3271,6 @@ unsigned int create_irq_nr(unsigned int irq_want, int node)
        if (irq_want < nr_irqs_gsi)
                irq_want = nr_irqs_gsi;
-        spin_lock_irqsave(&vector_lock, flags);
        for (new = irq_want; new < nr_irqs; new++) {
                desc_new = irq_to_desc_alloc_node(new, node);
                if (!desc_new) {
@@ -3272,14 +3282,15 @@ unsigned int create_irq_nr(unsigned int irq_want, int node)
                if (cfg_new->vector != 0)
                        continue;
+                raw_spin_lock_irqsave(&vector_lock, flags);
                desc_new = move_irq_desc(desc_new, node);
                cfg_new = desc_new->chip_data;
                if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
                        irq = new;
+                raw_spin_unlock_irqrestore(&vector_lock, flags);
                break;
        }
-        spin_unlock_irqrestore(&vector_lock, flags);
        if (irq > 0)
                dynamic_irq_init_keep_chip_data(irq);
@@ -3310,10 +3321,10 @@ void destroy_irq(unsigned int irq)
        dynamic_irq_cleanup_keep_chip_data(irq);
        free_irte(irq);
-        spin_lock_irqsave(&vector_lock, flags);
+        raw_spin_lock_irqsave(&vector_lock, flags);
        cfg = irq_to_desc(irq)->chip_data;
        __clear_irq_vector(irq, cfg);
-        spin_unlock_irqrestore(&vector_lock, flags);
+        raw_spin_unlock_irqrestore(&vector_lock, flags);
 }
 /*
@@ -3850,9 +3861,9 @@ int __init io_apic_get_redir_entries (int ioapic)
        union IO_APIC_reg_01    reg_01;
        unsigned long flags;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        reg_01.raw = io_apic_read(ioapic, 1);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        return reg_01.bits.entries;
 }
@@ -4014,9 +4025,9 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
        if (physids_empty(apic_id_map))
                apic->ioapic_phys_id_map(&phys_cpu_present_map, &apic_id_map);
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        reg_00.raw = io_apic_read(ioapic, 0);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        if (apic_id >= get_physical_broadcast()) {
                printk(KERN_WARNING "IOAPIC[%d]: Invalid apic_id %d, trying "
@@ -4050,10 +4061,10 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
        if (reg_00.bits.ID != apic_id) {
                reg_00.bits.ID = apic_id;
-                spin_lock_irqsave(&ioapic_lock, flags);
+                raw_spin_lock_irqsave(&ioapic_lock, flags);
                io_apic_write(ioapic, 0, reg_00.raw);
                reg_00.raw = io_apic_read(ioapic, 0);
-                spin_unlock_irqrestore(&ioapic_lock, flags);
+                raw_spin_unlock_irqrestore(&ioapic_lock, flags);
                /* Sanity check */
                if (reg_00.bits.ID != apic_id) {
@@ -4074,9 +4085,9 @@ int __init io_apic_get_version(int ioapic)
        union IO_APIC_reg_01    reg_01;
        unsigned long flags;
-        spin_lock_irqsave(&ioapic_lock, flags);
+        raw_spin_lock_irqsave(&ioapic_lock, flags);
        reg_01.raw = io_apic_read(ioapic, 1);
-        spin_unlock_irqrestore(&ioapic_lock, flags);
+        raw_spin_unlock_irqrestore(&ioapic_lock, flags);
        return reg_01.bits.version;
 }
diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
index 08385e090a6f..54e774dec0a6 100644
--- a/arch/x86/kernel/apic/ipi.c
+++ b/arch/x86/kernel/apic/ipi.c
@@ -106,7 +106,7 @@ void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector)
        unsigned long mask = cpumask_bits(cpumask)[0];
        unsigned long flags;
-        if (WARN_ONCE(!mask, "empty IPI mask"))
+        if (!mask)
                return;
        local_irq_save(flags);
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c
index 0159a69396cb..1aaf2935e222 100644
--- a/arch/x86/kernel/apic/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -91,7 +91,9 @@ static inline unsigned int get_timer_irqs(int cpu)
 */
 static __init void nmi_cpu_busy(void *data)
 {
+#ifndef CONFIG_PREEMPT_RT
        local_irq_enable_in_hardirq();
+#endif
        /*
         * Intentionally don't use cpu_relax here. This is
         * to make sure that the performance counter really ticks,
@@ -416,13 +418,13 @@ nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
        /* We can be called before check_nmi_watchdog, hence NULL check. */
        if (cpumask_test_cpu(cpu, to_cpumask(backtrace_mask))) {
-                static DEFINE_SPINLOCK(lock);   /* Serialise the printks */
+                static DEFINE_RAW_SPINLOCK(lock); /* Serialise the printks */
-                spin_lock(&lock);
+                raw_spin_lock(&lock);
                printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu);
                show_regs(regs);
                dump_stack();
-                spin_unlock(&lock);
+                raw_spin_unlock(&lock);
                cpumask_clear_cpu(cpu, to_cpumask(backtrace_mask));
                rc = 1;
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index b5b6b23bce53..a920e00f321b 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -1224,7 +1224,7 @@ static void reinit_timer(void)
 #ifdef INIT_TIMER_AFTER_SUSPEND
        unsigned long flags;
-        spin_lock_irqsave(&i8253_lock, flags);
+        raw_spin_lock_irqsave(&i8253_lock, flags);
        /* set the clock to HZ */
        outb_pit(0x34, PIT_MODE);               /* binary, mode 2, LSB/MSB, ch 0 */
        udelay(10);
@@ -1232,7 +1232,7 @@ static void reinit_timer(void)
        udelay(10);
        outb_pit(LATCH >> 8, PIT_CH0);  /* MSB */
        udelay(10);
-        spin_unlock_irqrestore(&i8253_lock, flags);
+        raw_spin_unlock_irqrestore(&i8253_lock, flags);
 #endif
 }
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 4868e4a951ee..fae7a32cb040 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1013,7 +1013,9 @@ DEFINE_PER_CPU(unsigned int, irq_count) = -1;
 */
 static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = {
          [0 ... N_EXCEPTION_STACKS - 1]        = EXCEPTION_STKSZ,
+#if DEBUG_STACK > 0
          [DEBUG_STACK - 1]                     = DEBUG_STKSZ
+#endif
 };
 static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 55da0c5f68dd..46f40f07631a 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -570,7 +570,7 @@ static unsigned long set_mtrr_state(void)
 static unsigned long cr4;
-static DEFINE_SPINLOCK(set_atomicity_lock);
+static DEFINE_RAW_SPINLOCK(set_atomicity_lock);
 /*
 * Since we are disabling the cache don't allow any interrupts,
@@ -590,7 +590,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
         * changes to the way the kernel boots
         */
-        spin_lock(&set_atomicity_lock);
+        raw_spin_lock(&set_atomicity_lock);
        /* Enter the no-fill (CD=1, NW=0) cache mode and flush caches. */
        cr0 = read_cr0() | X86_CR0_CD;
@@ -627,7 +627,7 @@ static void post_set(void) __releases(set_atomicity_lock)
        /* Restore value of CR4 */
        if (cpu_has_pge)
                write_cr4(cr4);
-        spin_unlock(&set_atomicity_lock);
+        raw_spin_unlock(&set_atomicity_lock);
 }
 static void generic_set_all(void)
diff --git a/arch/x86/kernel/dumpstack_32.c b/arch/x86/kernel/dumpstack_32.c
index ae775ca47b25..04078f1896e6 100644
--- a/arch/x86/kernel/dumpstack_32.c
+++ b/arch/x86/kernel/dumpstack_32.c
@@ -98,6 +98,12 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
 }
+#if defined(CONFIG_DEBUG_STACKOVERFLOW) && defined(CONFIG_EVENT_TRACE)
+extern unsigned long worst_stack_left;
+#else
+# define worst_stack_left -1L
+#endif
 void show_registers(struct pt_regs *regs)
 {
        int i;
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index a6c906c9b193..9c0393ad255a 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -22,10 +22,14 @@
                (N_EXCEPTION_STACKS + DEBUG_STKSZ/EXCEPTION_STKSZ - 2)
 static char x86_stack_ids[][8] = {
+#if DEBUG_STACK > 0
                [ DEBUG_STACK-1                 ]       = "#DB",
+#endif
                [ NMI_STACK-1                   ]       = "NMI",
                [ DOUBLEFAULT_STACK-1           ]       = "#DF",
+#if STACKFAULT_STACK > 0
                [ STACKFAULT_STACK-1            ]       = "#SS",
+#endif
                [ MCE_STACK-1                   ]       = "#MC",
 #if DEBUG_STKSZ > EXCEPTION_STKSZ
                [ N_EXCEPTION_STACKS ...
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index b9c830c12b4a..02aaf8f65c8e 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -59,7 +59,7 @@ static void early_vga_write(struct console *con, const char *str, unsigned n)
 static struct console early_vga_console = {
        .name =         "earlyvga",
        .write =        early_vga_write,
-        .flags =        CON_PRINTBUFFER,
+        .flags =        CON_PRINTBUFFER | CON_ATOMIC,
        .index =        -1,
 };
@@ -156,7 +156,7 @@ static __init void early_serial_init(char *s)
 static struct console early_serial_console = {
        .name =         "earlyser",
        .write =        early_serial_write,
-        .flags =        CON_PRINTBUFFER,
+        .flags =        CON_PRINTBUFFER | CON_ATOMIC,
        .index =        -1,
 };
@@ -166,7 +166,7 @@ static int __initdata early_console_initialized;
 asmlinkage void early_printk(const char *fmt, ...)
 {
-        char buf[512];
+        static char buf[512];
        int n;
        va_list ap;
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 44a8e0dc6737..3dc8593dd2aa 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -375,15 +375,18 @@ END(ret_from_exception)
 ENTRY(resume_kernel)
        DISABLE_INTERRUPTS(CLBR_ANY)
        cmpl $0,TI_preempt_count(%ebp)  # non-zero preempt_count ?
-        jnz restore_all
+        jnz restore_nocheck_trace
 need_resched:
        movl TI_flags(%ebp), %ecx       # need_resched set ?
        testb $_TIF_NEED_RESCHED, %cl
-        jz restore_all
+        jz restore_nocheck_trace
        testl $X86_EFLAGS_IF,PT_EFLAGS(%esp)    # interrupts off (exception path) ?
-        jz restore_all
+        jz restore_nocheck_trace
        call preempt_schedule_irq
        jmp need_resched
+restore_nocheck_trace:
+        TRACE_IRQS_IRET
+        jmp restore_nocheck
 END(resume_kernel)
 #endif
        CFI_ENDPROC
@@ -639,12 +642,9 @@ work_pending:
        testb $_TIF_NEED_RESCHED, %cl
        jz work_notifysig
 work_resched:
-        call schedule
+        call __schedule
        LOCKDEP_SYS_EXIT
-        DISABLE_INTERRUPTS(CLBR_ANY)    # make sure we don't miss an interrupt
-                                        # setting need_resched or sigpending
-                                        # between sampling and the iret
-        TRACE_IRQS_OFF
        movl TI_flags(%ebp), %ecx
        andl $_TIF_WORK_MASK, %ecx      # is there any work to be done other
                                        # than syscall tracing?
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index b5a9896ca1e7..8e77347df3e1 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -30,7 +30,11 @@ static void __init zap_identity_mappings(void)
 {
        pgd_t *pgd = pgd_offset_k(0UL);
        pgd_clear(pgd);
-        __flush_tlb_all();
+        /*
+         * preempt_disable/enable does not work this early in the
+         * bootup yet:
+         */
+        write_cr3(read_cr3());
 }
 /* Don't add a printk in there. printk relies on the PDA which is not initialized 
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 7fd318bac59c..4fabb366f82e 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -596,6 +596,7 @@ ignore_int:
        call dump_stack
        addl $(5*4),%esp
+        call dump_stack
        popl %ds
        popl %es
        popl %edx
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c
index 23c167925a5c..2dfd31597443 100644
--- a/arch/x86/kernel/i8253.c
+++ b/arch/x86/kernel/i8253.c
@@ -16,7 +16,7 @@
 #include <asm/hpet.h>
 #include <asm/smp.h>
-DEFINE_SPINLOCK(i8253_lock);
+DEFINE_RAW_SPINLOCK(i8253_lock);
 EXPORT_SYMBOL(i8253_lock);
 /*
@@ -33,7 +33,7 @@ struct clock_event_device *global_clock_event;
 static void init_pit_timer(enum clock_event_mode mode,
                           struct clock_event_device *evt)
 {
-        spin_lock(&i8253_lock);
+        raw_spin_lock(&i8253_lock);
        switch (mode) {
        case CLOCK_EVT_MODE_PERIODIC:
@@ -62,7 +62,7 @@ static void init_pit_timer(enum clock_event_mode mode,
                /* Nothing to do here */
                break;
        }
-        spin_unlock(&i8253_lock);
+        raw_spin_unlock(&i8253_lock);
 }
 /*
@@ -72,10 +72,10 @@ static void init_pit_timer(enum clock_event_mode mode,
 */
 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
 {
-        spin_lock(&i8253_lock);
+        raw_spin_lock(&i8253_lock);
        outb_pit(delta & 0xff , PIT_CH0);       /* LSB */
        outb_pit(delta >> 8 , PIT_CH0);         /* MSB */
-        spin_unlock(&i8253_lock);
+        raw_spin_unlock(&i8253_lock);
        return 0;
 }
@@ -130,7 +130,7 @@ static cycle_t pit_read(struct clocksource *cs)
        int count;
        u32 jifs;
-        spin_lock_irqsave(&i8253_lock, flags);
+        raw_spin_lock_irqsave(&i8253_lock, flags);
        /*
         * Although our caller may have the read side of xtime_lock,
         * this is now a seqlock, and we are cheating in this routine
@@ -176,7 +176,7 @@ static cycle_t pit_read(struct clocksource *cs)
        old_count = count;
        old_jifs = jifs;
-        spin_unlock_irqrestore(&i8253_lock, flags);
+        raw_spin_unlock_irqrestore(&i8253_lock, flags);
        count = (LATCH - 1) - count;
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index df89102bef80..96400fe7909f 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -32,7 +32,7 @@
 */
 static int i8259A_auto_eoi;
-DEFINE_SPINLOCK(i8259A_lock);
+DEFINE_RAW_SPINLOCK(i8259A_lock);
 static void mask_and_ack_8259A(unsigned int);
 struct irq_chip i8259A_chip = {
@@ -68,13 +68,13 @@ void disable_8259A_irq(unsigned int irq)
        unsigned int mask = 1 << irq;
        unsigned long flags;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        cached_irq_mask |= mask;
        if (irq & 8)
                outb(cached_slave_mask, PIC_SLAVE_IMR);
        else
                outb(cached_master_mask, PIC_MASTER_IMR);
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 void enable_8259A_irq(unsigned int irq)
@@ -82,13 +82,13 @@ void enable_8259A_irq(unsigned int irq)
        unsigned int mask = ~(1 << irq);
        unsigned long flags;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        cached_irq_mask &= mask;
        if (irq & 8)
                outb(cached_slave_mask, PIC_SLAVE_IMR);
        else
                outb(cached_master_mask, PIC_MASTER_IMR);
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 int i8259A_irq_pending(unsigned int irq)
@@ -97,12 +97,12 @@ int i8259A_irq_pending(unsigned int irq)
        unsigned long flags;
        int ret;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        if (irq < 8)
                ret = inb(PIC_MASTER_CMD) & mask;
        else
                ret = inb(PIC_SLAVE_CMD) & (mask >> 8);
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
        return ret;
 }
@@ -150,7 +150,7 @@ static void mask_and_ack_8259A(unsigned int irq)
        unsigned int irqmask = 1 << irq;
        unsigned long flags;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        /*
         * Lightweight spurious IRQ detection. We do not want
         * to overdo spurious IRQ handling - it's usually a sign
@@ -168,6 +168,8 @@ static void mask_and_ack_8259A(unsigned int irq)
         */
        if (cached_irq_mask & irqmask)
                goto spurious_8259A_irq;
+        if (irq & 8)
+                outb(0x60+(irq&7), PIC_SLAVE_CMD); /* 'Specific EOI' to slave */
        cached_irq_mask |= irqmask;
 handle_real_irq:
@@ -183,7 +185,7 @@ handle_real_irq:
                outb(cached_master_mask, PIC_MASTER_IMR);
                outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
        }
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
        return;
 spurious_8259A_irq:
@@ -285,24 +287,24 @@ void mask_8259A(void)
 {
        unsigned long flags;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        outb(0xff, PIC_MASTER_IMR);     /* mask all of 8259A-1 */
        outb(0xff, PIC_SLAVE_IMR);      /* mask all of 8259A-2 */
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 void unmask_8259A(void)
 {
        unsigned long flags;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
        outb(cached_slave_mask, PIC_SLAVE_IMR);   /* restore slave IRQ mask */
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 void init_8259A(int auto_eoi)
@@ -311,7 +313,7 @@ void init_8259A(int auto_eoi)
        i8259A_auto_eoi = auto_eoi;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        outb(0xff, PIC_MASTER_IMR);     /* mask all of 8259A-1 */
        outb(0xff, PIC_SLAVE_IMR);      /* mask all of 8259A-2 */
@@ -328,10 +330,10 @@ void init_8259A(int auto_eoi)
        /* 8259A-1 (the master) has a slave on IR2 */
        outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR);
-        if (auto_eoi)   /* master does Auto EOI */
+        if (!auto_eoi)  /* master expects normal EOI */
-                outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
+                outb_p(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
-        else            /* master expects normal EOI */
+        else            /* master does Auto EOI */
-                outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
+                outb_p(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
        outb_pic(0x11, PIC_SLAVE_CMD);  /* ICW1: select 8259A-2 init */
@@ -356,5 +358,5 @@ void init_8259A(int auto_eoi)
        outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
        outb(cached_slave_mask, PIC_SLAVE_IMR);   /* restore slave IRQ mask */
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index d5932226614f..7cdd31ca342d 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -72,6 +72,7 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id)
 static struct irqaction fpu_irq = {
        .handler = math_error_irq,
        .name = "fpu",
+        .flags = IRQF_NODELAY,
 };
 #endif
@@ -81,6 +82,7 @@ static struct irqaction fpu_irq = {
 static struct irqaction irq2 = {
        .handler = no_action,
        .name = "cascade",
+        .flags = IRQF_NODELAY,
 };
 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 5b8c7505b3bc..04bc8c9c43f9 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -434,7 +434,7 @@ static void __kprobes setup_singlestep(struct kprobe *p, struct pt_regs *regs,
                /* Boost up -- we can execute copied instructions directly */
                reset_current_kprobe();
                regs->ip = (unsigned long)p->ainsn.insn;
-                preempt_enable_no_resched();
+                preempt_enable();
                return;
        }
 #endif
@@ -543,7 +543,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
                }
        } /* else: not a kprobe fault; let the kernel handle it */
-        preempt_enable_no_resched();
+        preempt_enable();
        return 0;
 }
@@ -843,7 +843,7 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs)
        }
        reset_current_kprobe();
 out:
-        preempt_enable_no_resched();
+        preempt_enable();
        /*
         * if somebody else is singlestepping across a probe point, flags
@@ -877,7 +877,7 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
                        restore_previous_kprobe(kcb);
                else
                        reset_current_kprobe();
-                preempt_enable_no_resched();
+                preempt_enable();
                break;
        case KPROBE_HIT_ACTIVE:
        case KPROBE_HIT_SSDONE:
@@ -1024,7 +1024,7 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
                memcpy((kprobe_opcode_t *)(kcb->jprobe_saved_sp),
                       kcb->jprobes_stack,
                       MIN_STACK_SIZE(kcb->jprobe_saved_sp));
-                preempt_enable_no_resched();
+                preempt_enable();
                return 1;
        }
        return 0;
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 1b1739d16310..024d2c1b751e 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -396,6 +396,20 @@ struct pv_apic_ops pv_apic_ops = {
 #define PTE_IDENT       __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
 #endif
+#ifdef CONFIG_HIGHPTE
+/*
+ * kmap_atomic() might be an inline or a macro:
+ */
+static void *kmap_atomic_func(struct page *page, enum km_type idx)
+{
+        return kmap_atomic(page, idx);
+}
+static void *kmap_atomic_direct_func(struct page *page, enum km_type idx)
+{
+        return kmap_atomic_direct(page, idx);
+}
+#endif
 struct pv_mmu_ops pv_mmu_ops = {
        .read_cr2 = native_read_cr2,
@@ -429,7 +443,8 @@ struct pv_mmu_ops pv_mmu_ops = {
        .ptep_modify_prot_commit = __ptep_modify_prot_commit,
 #ifdef CONFIG_HIGHPTE
-        .kmap_atomic_pte = kmap_atomic,
+        .kmap_atomic_pte = kmap_atomic_func,
+        .kmap_atomic_pte_direct = kmap_atomic_direct_func,
 #endif
 #if PAGETABLE_LEVELS >= 3
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 37ad1e046aae..46f588151d92 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -101,7 +101,6 @@ void cpu_idle(void)
                tick_nohz_stop_sched_tick(1);
                while (!need_resched()) {
-                        check_pgt_cache();
                        rmb();
                        if (cpu_is_offline(cpu))
@@ -113,10 +112,12 @@ void cpu_idle(void)
                        pm_idle();
                        start_critical_timings();
                }
+                local_irq_disable();
                tick_nohz_restart_sched_tick();
-                preempt_enable_no_resched();
+                __preempt_enable_no_resched();
-                schedule();
+                __schedule();
                preempt_disable();
+                local_irq_enable();
        }
 }
@@ -148,8 +149,10 @@ void __show_regs(struct pt_regs *regs, int all)
                regs->ax, regs->bx, regs->cx, regs->dx);
        printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
                regs->si, regs->di, regs->bp, sp);
-        printk(KERN_DEFAULT " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
+        printk(KERN_DEFAULT
-               (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss);
+               " DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x preempt:%08x\n",
+               (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss,
+               preempt_count());
        if (!all)
                return;
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 11d0702f0e0d..259f8ce8c0fe 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -146,9 +146,11 @@ void cpu_idle(void)
                }
                tick_nohz_restart_sched_tick();
-                preempt_enable_no_resched();
+                local_irq_disable();
-                schedule();
+                __preempt_enable_no_resched();
+                __schedule();
                preempt_disable();
+                local_irq_enable();
        }
 }
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index 4fd173cd8e57..fccd2c885ba2 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -773,6 +773,13 @@ static void do_signal(struct pt_regs *regs)
        int signr;
        sigset_t *oldset;
+#ifdef CONFIG_PREEMPT_RT
+        /*
+         * Fully-preemptible kernel does not need interrupts disabled:
+         */
+        local_irq_enable();
+        preempt_check_resched();
+#endif
        /*
         * We want the common case to go fast, which is why we may in certain
         * cases get here from kernel mode. Just return without doing anything
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index ec1de97600e7..a83e38d464f2 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -120,6 +120,16 @@ static void native_smp_send_reschedule(int cpu)
        apic->send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
 }
+/*
+ * this function sends a 'reschedule' IPI to all other CPUs.
+ * This is used when RT tasks are starving and other CPUs
+ * might be able to run them:
+ */
+void smp_send_reschedule_allbutself(void)
+{
+        apic->send_IPI_allbutself(RESCHEDULE_VECTOR);
+}
 void native_send_call_func_single_ipi(int cpu)
 {
        apic->send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c
index be2573448ed9..fb5cc5e14cfa 100644
--- a/arch/x86/kernel/time.c
+++ b/arch/x86/kernel/time.c
@@ -70,11 +70,11 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
                 * manually to deassert NMI lines for the watchdog if run
                 * on an 82489DX-based system.
                 */
-                spin_lock(&i8259A_lock);
+                raw_spin_lock(&i8259A_lock);
                outb(0x0c, PIC_MASTER_OCW3);
                /* Ack the IRQ; AEOI will end it automatically. */
                inb(PIC_MASTER_POLL);
-                spin_unlock(&i8259A_lock);
+                raw_spin_unlock(&i8259A_lock);
        }
        global_clock_event->event_handler(global_clock_event);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 33399176512a..9288ccfcf6db 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -88,9 +88,10 @@ static inline void conditional_sti(struct pt_regs *regs)
                local_irq_enable();
 }
-static inline void preempt_conditional_sti(struct pt_regs *regs)
+static inline void preempt_conditional_sti(struct pt_regs *regs, int stack)
 {
-        inc_preempt_count();
+        if (stack)
+                inc_preempt_count();
        if (regs->flags & X86_EFLAGS_IF)
                local_irq_enable();
 }
@@ -101,11 +102,12 @@ static inline void conditional_cli(struct pt_regs *regs)
                local_irq_disable();
 }
-static inline void preempt_conditional_cli(struct pt_regs *regs)
+static inline void preempt_conditional_cli(struct pt_regs *regs, int stack)
 {
        if (regs->flags & X86_EFLAGS_IF)
                local_irq_disable();
-        dec_preempt_count();
+        if (stack)
+                dec_preempt_count();
 }
 #ifdef CONFIG_X86_32
@@ -232,9 +234,9 @@ dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
        if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
                        12, SIGBUS) == NOTIFY_STOP)
                return;
-        preempt_conditional_sti(regs);
+        preempt_conditional_sti(regs, STACKFAULT_STACK);
        do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
-        preempt_conditional_cli(regs);
+        preempt_conditional_cli(regs, STACKFAULT_STACK);
 }
 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
@@ -470,9 +472,9 @@ dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
                return;
 #endif
-        preempt_conditional_sti(regs);
+        preempt_conditional_sti(regs, DEBUG_STACK);
        do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
-        preempt_conditional_cli(regs);
+        preempt_conditional_cli(regs, DEBUG_STACK);
 }
 #ifdef CONFIG_X86_64
@@ -554,7 +556,7 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
                return;
        /* It's safe to allow irq's after DR6 has been saved */
-        preempt_conditional_sti(regs);
+        preempt_conditional_sti(regs, DEBUG_STACK);
        if (regs->flags & X86_VM_MASK) {
                handle_vm86_trap((struct kernel_vm86_regs *) regs,
@@ -577,7 +579,7 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
        si_code = get_si_code(tsk->thread.debugreg6);
        if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS))
                send_sigtrap(tsk, regs, error_code, si_code);
-        preempt_conditional_cli(regs);
+        preempt_conditional_cli(regs, DEBUG_STACK);
        return;
 }
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index 34a279a7471d..ccbea12baef7 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -559,7 +559,7 @@ static irqreturn_t piix4_master_intr(int irq, void *dev_id)
        struct irq_desc *desc;
        unsigned long flags;
-        spin_lock_irqsave(&i8259A_lock, flags);
+        raw_spin_lock_irqsave(&i8259A_lock, flags);
        /* Find out what's interrupting in the PIIX4 master 8259 */
        outb(0x0c, 0x20);               /* OCW3 Poll command */
@@ -596,7 +596,7 @@ static irqreturn_t piix4_master_intr(int irq, void *dev_id)
                outb(0x60 + realirq, 0x20);
        }
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
        desc = irq_to_desc(realirq);
@@ -614,18 +614,20 @@ static irqreturn_t piix4_master_intr(int irq, void *dev_id)
        return IRQ_HANDLED;
 out_unlock:
-        spin_unlock_irqrestore(&i8259A_lock, flags);
+        raw_spin_unlock_irqrestore(&i8259A_lock, flags);
        return IRQ_NONE;
 }
 static struct irqaction master_action = {
        .handler =      piix4_master_intr,
        .name =         "PIIX4-8259",
+        .flags =        IRQF_NODELAY,
 };
 static struct irqaction cascade_action = {
        .handler =      no_action,
        .name =         "cascade",
+        .flags =        IRQF_NODELAY,
 };
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index 5ffb5622f793..8ea7e4869fc3 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -137,6 +137,7 @@ struct pt_regs *save_v86_state(struct kernel_vm86_regs *regs)
        local_irq_enable();
        if (!current->thread.vm86_info) {
+                local_irq_disable();
                printk("no vm86_info: BAD\n");
                do_exit(SIGSEGV);
        }
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 9055e5872ff0..1bd8ff302193 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -59,7 +59,7 @@ int __vgetcpu_mode __section_vgetcpu_mode;
 struct vsyscall_gtod_data __vsyscall_gtod_data __section_vsyscall_gtod_data =
 {
-        .lock = SEQLOCK_UNLOCKED,
+        .lock = __RAW_SEQLOCK_UNLOCKED(__vsyscall_gtod_data.lock),
        .sysctl_enabled = 1,
 };
@@ -67,10 +67,10 @@ void update_vsyscall_tz(void)
 {
        unsigned long flags;
-        write_seqlock_irqsave(&vsyscall_gtod_data.lock, flags);
+        write_raw_seqlock_irqsave(&vsyscall_gtod_data.lock, flags);
        /* sys_tz has changed */
        vsyscall_gtod_data.sys_tz = sys_tz;
-        write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
+        write_raw_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
 }
 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
@@ -78,18 +78,45 @@ void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
 {
        unsigned long flags;
-        write_seqlock_irqsave(&vsyscall_gtod_data.lock, flags);
+        write_raw_seqlock_irqsave(&vsyscall_gtod_data.lock, flags);
+        if (likely(vsyscall_gtod_data.sysctl_enabled == 2)) {
+                struct timespec tmp = *(wall_time);
+                cycle_t (*vread)(void);
+                cycle_t now;
+                vread = vsyscall_gtod_data.clock.vread;
+                if (likely(vread))
+                        now = vread();
+                else
+                        now = clock->read(clock);
+                /* calculate interval: */
+                now = (now - clock->cycle_last) & clock->mask;
+                /* convert to nsecs: */
+                tmp.tv_nsec += ( now * clock->mult) >> clock->shift;
+                while (tmp.tv_nsec >= NSEC_PER_SEC) {
+                        tmp.tv_sec += 1;
+                        tmp.tv_nsec -= NSEC_PER_SEC;
+                }
+                vsyscall_gtod_data.wall_time_sec = tmp.tv_sec;
+                vsyscall_gtod_data.wall_time_nsec = tmp.tv_nsec;
+        } else {
+                vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec;
+                vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;
+        }
        /* copy vsyscall data */
        vsyscall_gtod_data.clock.vread = clock->vread;
        vsyscall_gtod_data.clock.cycle_last = clock->cycle_last;
        vsyscall_gtod_data.clock.mask = clock->mask;
        vsyscall_gtod_data.clock.mult = mult;
        vsyscall_gtod_data.clock.shift = clock->shift;
-        vsyscall_gtod_data.wall_time_sec = wall_time->tv_sec;
-        vsyscall_gtod_data.wall_time_nsec = wall_time->tv_nsec;
        vsyscall_gtod_data.wall_to_monotonic = wall_to_monotonic;
        vsyscall_gtod_data.wall_time_coarse = __current_kernel_time();
-        write_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
+        write_raw_sequnlock_irqrestore(&vsyscall_gtod_data.lock, flags);
 }
 /* RED-PEN may want to readd seq locking, but then the variable should be
@@ -125,8 +152,28 @@ static __always_inline void do_vgettimeofday(struct timeval * tv)
        unsigned seq;
        unsigned long mult, shift, nsec;
        cycle_t (*vread)(void);
+        if (likely(__vsyscall_gtod_data.sysctl_enabled == 2)) {
+                struct timeval tmp;
+                do {
+                        barrier();
+                        tv->tv_sec = __vsyscall_gtod_data.wall_time_sec;
+                        tv->tv_usec = __vsyscall_gtod_data.wall_time_nsec;
+                        barrier();
+                        tmp.tv_sec = __vsyscall_gtod_data.wall_time_sec;
+                        tmp.tv_usec = __vsyscall_gtod_data.wall_time_nsec;
+                } while (tmp.tv_usec != tv->tv_usec ||
+                                        tmp.tv_sec != tv->tv_sec);
+                tv->tv_usec /= NSEC_PER_MSEC;
+                tv->tv_usec *= USEC_PER_MSEC;
+                return;
+        }
        do {
-                seq = read_seqbegin(&__vsyscall_gtod_data.lock);
+                seq = read_raw_seqbegin(&__vsyscall_gtod_data.lock);
                vread = __vsyscall_gtod_data.clock.vread;
                if (unlikely(!__vsyscall_gtod_data.sysctl_enabled || !vread)) {
@@ -135,6 +182,7 @@ static __always_inline void do_vgettimeofday(struct timeval * tv)
                }
                now = vread();
                base = __vsyscall_gtod_data.clock.cycle_last;
                mask = __vsyscall_gtod_data.clock.mask;
                mult = __vsyscall_gtod_data.clock.mult;
@@ -142,7 +190,7 @@ static __always_inline void do_vgettimeofday(struct timeval * tv)
                tv->tv_sec = __vsyscall_gtod_data.wall_time_sec;
                nsec = __vsyscall_gtod_data.wall_time_nsec;
-        } while (read_seqretry(&__vsyscall_gtod_data.lock, seq));
+        } while (read_raw_seqretry(&__vsyscall_gtod_data.lock, seq));
        /* calculate interval: */
        cycle_delta = (now - base) & mask;
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 15578f180e59..6a9bee02ee54 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -242,11 +242,11 @@ static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
 {
        struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
                                                 irq_ack_notifier);
-        spin_lock(&ps->inject_lock);
+        raw_spin_lock(&ps->inject_lock);
        if (atomic_dec_return(&ps->pit_timer.pending) < 0)
                atomic_inc(&ps->pit_timer.pending);
        ps->irq_ack = 1;
-        spin_unlock(&ps->inject_lock);
+        raw_spin_unlock(&ps->inject_lock);
 }
 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
@@ -624,7 +624,7 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
        mutex_init(&pit->pit_state.lock);
        mutex_lock(&pit->pit_state.lock);
-        spin_lock_init(&pit->pit_state.inject_lock);
+        raw_spin_lock_init(&pit->pit_state.inject_lock);
        kvm->arch.vpit = pit;
        pit->kvm = kvm;
@@ -723,12 +723,12 @@ void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
                /* Try to inject pending interrupts when
                 * last one has been acked.
                 */
-                spin_lock(&ps->inject_lock);
+                raw_spin_lock(&ps->inject_lock);
                if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) {
                        ps->irq_ack = 0;
                        inject = 1;
                }
-                spin_unlock(&ps->inject_lock);
+                raw_spin_unlock(&ps->inject_lock);
                if (inject)
                        __inject_pit_timer_intr(kvm);
        }
diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h
index d4c1c7ffdc09..900d6b0ba7c2 100644
--- a/arch/x86/kvm/i8254.h
+++ b/arch/x86/kvm/i8254.h
@@ -27,7 +27,7 @@ struct kvm_kpit_state {
        u32    speaker_data_on;
        struct mutex lock;
        struct kvm_pit *pit;
-        spinlock_t inject_lock;
+        raw_spinlock_t inject_lock;
        unsigned long irq_ack;
        struct kvm_irq_ack_notifier irq_ack_notifier;
 };
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index d057c0cbd245..a6a877e4ab4d 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -32,6 +32,29 @@
 #include <linux/kvm_host.h>
 #include "trace.h"
+static void pic_lock(struct kvm_pic *s)
+        __acquires(&s->lock)
+{
+        raw_spin_lock(&s->lock);
+}
+static void pic_unlock(struct kvm_pic *s)
+        __releases(&s->lock)
+{
+        bool wakeup = s->wakeup_needed;
+        struct kvm_vcpu *vcpu;
+        s->wakeup_needed = false;
+        raw_spin_unlock(&s->lock);
+        if (wakeup) {
+                vcpu = s->kvm->bsp_vcpu;
+                if (vcpu)
+                        kvm_vcpu_kick(vcpu);
+        }
+}
 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
 {
        s->isr &= ~(1 << irq);
@@ -44,18 +67,19 @@ static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
         * Other interrupt may be delivered to PIC while lock is dropped but
         * it should be safe since PIC state is already updated at this stage.
         */
-        spin_unlock(&s->pics_state->lock);
+        pic_unlock(s->pics_state);
        kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
-        spin_lock(&s->pics_state->lock);
+        pic_lock(s->pics_state);
 }
 void kvm_pic_clear_isr_ack(struct kvm *kvm)
 {
        struct kvm_pic *s = pic_irqchip(kvm);
-        spin_lock(&s->lock);
+        pic_lock(s);
        s->pics[0].isr_ack = 0xff;
        s->pics[1].isr_ack = 0xff;
-        spin_unlock(&s->lock);
+        pic_unlock(s);
 }
 /*
@@ -156,9 +180,9 @@ static void pic_update_irq(struct kvm_pic *s)
 void kvm_pic_update_irq(struct kvm_pic *s)
 {
-        spin_lock(&s->lock);
+        pic_lock(s);
        pic_update_irq(s);
-        spin_unlock(&s->lock);
+        pic_unlock(s);
 }
 int kvm_pic_set_irq(void *opaque, int irq, int level)
@@ -166,14 +190,14 @@ int kvm_pic_set_irq(void *opaque, int irq, int level)
        struct kvm_pic *s = opaque;
        int ret = -1;
-        spin_lock(&s->lock);
+        pic_lock(s);
        if (irq >= 0 && irq < PIC_NUM_PINS) {
                ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
                pic_update_irq(s);
                trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
                                      s->pics[irq >> 3].imr, ret == 0);
        }
-        spin_unlock(&s->lock);
+        pic_unlock(s);
        return ret;
 }
@@ -203,7 +227,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
        int irq, irq2, intno;
        struct kvm_pic *s = pic_irqchip(kvm);
-        spin_lock(&s->lock);
+        pic_lock(s);
        irq = pic_get_irq(&s->pics[0]);
        if (irq >= 0) {
                pic_intack(&s->pics[0], irq);
@@ -228,7 +252,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
                intno = s->pics[0].irq_base + irq;
        }
        pic_update_irq(s);
-        spin_unlock(&s->lock);
+        pic_unlock(s);
        return intno;
 }
@@ -442,7 +466,7 @@ static int picdev_write(struct kvm_io_device *this,
                        printk(KERN_ERR "PIC: non byte write\n");
                return 0;
        }
-        spin_lock(&s->lock);
+        pic_lock(s);
        switch (addr) {
        case 0x20:
        case 0x21:
@@ -455,7 +479,7 @@ static int picdev_write(struct kvm_io_device *this,
                elcr_ioport_write(&s->pics[addr & 1], addr, data);
                break;
        }
-        spin_unlock(&s->lock);
+        pic_unlock(s);
        return 0;
 }
@@ -472,7 +496,7 @@ static int picdev_read(struct kvm_io_device *this,
                        printk(KERN_ERR "PIC: non byte read\n");
                return 0;
        }
-        spin_lock(&s->lock);
+        pic_lock(s);
        switch (addr) {
        case 0x20:
        case 0x21:
@@ -486,7 +510,7 @@ static int picdev_read(struct kvm_io_device *this,
                break;
        }
        *(unsigned char *)val = data;
-        spin_unlock(&s->lock);
+        pic_unlock(s);
        return 0;
 }
@@ -503,7 +527,7 @@ static void pic_irq_request(void *opaque, int level)
        s->output = level;
        if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) {
                s->pics[0].isr_ack &= ~(1 << irq);
-                kvm_vcpu_kick(vcpu);
+                s->wakeup_needed = true;
        }
 }
@@ -520,7 +544,7 @@ struct kvm_pic *kvm_create_pic(struct kvm *kvm)
        s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
        if (!s)
                return NULL;
-        spin_lock_init(&s->lock);
+        raw_spin_lock_init(&s->lock);
        s->kvm = kvm;
        s->pics[0].elcr_mask = 0xf8;
        s->pics[1].elcr_mask = 0xde;
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h
index be399e207d57..4ba8ce287d6c 100644
--- a/arch/x86/kvm/irq.h
+++ b/arch/x86/kvm/irq.h
@@ -62,7 +62,8 @@ struct kvm_kpic_state {
 };
 struct kvm_pic {
-        spinlock_t lock;
+        raw_spinlock_t lock;
+        bool wakeup_needed;
        unsigned pending_acks;
        struct kvm *kvm;
        struct kvm_kpic_state pics[2]; /* 0 is master pic, 1 is slave pic */
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index dd7892740314..55e20f8c518f 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2251,18 +2251,18 @@ static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
        r = 0;
        switch (chip->chip_id) {
        case KVM_IRQCHIP_PIC_MASTER:
-                spin_lock(&pic_irqchip(kvm)->lock);
+                raw_spin_lock(&pic_irqchip(kvm)->lock);
                memcpy(&pic_irqchip(kvm)->pics[0],
                        &chip->chip.pic,
                        sizeof(struct kvm_pic_state));
-                spin_unlock(&pic_irqchip(kvm)->lock);
+                raw_spin_unlock(&pic_irqchip(kvm)->lock);
                break;
        case KVM_IRQCHIP_PIC_SLAVE:
-                spin_lock(&pic_irqchip(kvm)->lock);
+                raw_spin_lock(&pic_irqchip(kvm)->lock);
                memcpy(&pic_irqchip(kvm)->pics[1],
                        &chip->chip.pic,
                        sizeof(struct kvm_pic_state));
-                spin_unlock(&pic_irqchip(kvm)->lock);
+                raw_spin_unlock(&pic_irqchip(kvm)->lock);
                break;
        case KVM_IRQCHIP_IOAPIC:
                r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index f62777940dfb..60a0aa574dc6 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -554,6 +554,7 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
                nr = (address - idt_descr.address) >> 3;
                if (nr == 6) {
+                        zap_rt_locks();
                        do_invalid_op(regs, 0);
                        return 1;
                }
@@ -1035,7 +1036,7 @@ do_page_fault(struct pt_regs *regs, unsigned long error_code)
         * If we're in an interrupt, have no user context or are running
         * in an atomic region then we must not take the fault:
         */
-        if (unlikely(in_atomic() || !mm)) {
+        if (unlikely(in_atomic() || !mm || current->pagefault_disabled)) {
                bad_area_nosemaphore(regs, error_code, address);
                return;
        }
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c
index 738e6593799d..5aeae530a01b 100644
--- a/arch/x86/mm/gup.c
+++ b/arch/x86/mm/gup.c
@@ -77,13 +77,13 @@ static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
        if (write)
                mask |= _PAGE_RW;
-        ptep = pte_offset_map(&pmd, addr);
+        ptep = pte_offset_map_direct(&pmd, addr);
        do {
                pte_t pte = gup_get_pte(ptep);
                struct page *page;
                if ((pte_flags(pte) & (mask | _PAGE_SPECIAL)) != mask) {
-                        pte_unmap(ptep);
+                        pte_unmap_direct(ptep);
                        return 0;
                }
                VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
@@ -93,7 +93,7 @@ static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
                (*nr)++;
        } while (ptep++, addr += PAGE_SIZE, addr != end);
-        pte_unmap(ptep - 1);
+        pte_unmap_direct(ptep - 1);
        return 1;
 }
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index 63a6ba66cbe0..83b4efc9e8e7 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -4,9 +4,9 @@
 void *kmap(struct page *page)
 {
-        might_sleep();
        if (!PageHighMem(page))
                return page_address(page);
+        might_sleep();
        return kmap_high(page);
 }
@@ -19,6 +19,17 @@ void kunmap(struct page *page)
        kunmap_high(page);
 }
+struct page *kmap_to_page(void *ptr)
+{
+        struct page *page;
+        if ((unsigned long)ptr < PKMAP_ADDR(0))
+                return virt_to_page(ptr);
+        page = pte_page(pkmap_page_table[PKMAP_NR((unsigned long)ptr)]);
+        return page;
+}
+EXPORT_SYMBOL_GPL(kmap_to_page); /* PREEMPT_RT converts some modules to use this */
 /*
 * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because
 * no global lock is needed and because the kmap code must perform a global TLB
@@ -27,12 +38,13 @@ void kunmap(struct page *page)
 * However when holding an atomic kmap it is not legal to sleep, so atomic
 * kmaps are appropriate for short, tight code paths only.
 */
-void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
+void *__kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
 {
        enum fixed_addresses idx;
        unsigned long vaddr;
        /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */
+        preempt_disable();
        pagefault_disable();
        if (!PageHighMem(page))
@@ -42,51 +54,34 @@ void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
        idx = type + KM_TYPE_NR*smp_processor_id();
        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
-        BUG_ON(!pte_none(*(kmap_pte-idx)));
+        WARN_ON(!pte_none(*(kmap_pte-idx)));
        set_pte(kmap_pte-idx, mk_pte(page, prot));
        return (void *)vaddr;
 }
-void *kmap_atomic(struct page *page, enum km_type type)
+void *__kmap_atomic_direct(struct page *page, enum km_type type)
 {
-        return kmap_atomic_prot(page, type, kmap_prot);
+        return __kmap_atomic_prot(page, type, kmap_prot);
 }
-void kunmap_atomic(void *kvaddr, enum km_type type)
+void *__kmap_atomic(struct page *page, enum km_type type)
 {
-        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
+        return kmap_atomic_prot(page, type, kmap_prot);
-        enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
-        /*
-         * Force other mappings to Oops if they'll try to access this pte
-         * without first remap it.  Keeping stale mappings around is a bad idea
-         * also, in case the page changes cacheability attributes or becomes
-         * a protected page in a hypervisor.
-         */
-        if (vaddr == __fix_to_virt(FIX_KMAP_BEGIN+idx))
-                kpte_clear_flush(kmap_pte-idx, vaddr);
-        else {
-#ifdef CONFIG_DEBUG_HIGHMEM
-                BUG_ON(vaddr < PAGE_OFFSET);
-                BUG_ON(vaddr >= (unsigned long)high_memory);
-#endif
-        }
-        pagefault_enable();
 }
 /*
 * This is the same as kmap_atomic() but can map memory that doesn't
 * have a struct page associated with it.
 */
-void *kmap_atomic_pfn(unsigned long pfn, enum km_type type)
+void *__kmap_atomic_pfn(unsigned long pfn, enum km_type type)
 {
+        preempt_disable();
        return kmap_atomic_prot_pfn(pfn, type, kmap_prot);
 }
-EXPORT_SYMBOL_GPL(kmap_atomic_pfn); /* temporarily in use by i915 GEM until vmap */
+EXPORT_SYMBOL_GPL(__kmap_atomic_pfn); /* temporarily in use by i915 GEM until vmap */
-struct page *kmap_atomic_to_page(void *ptr)
+struct page *__kmap_atomic_to_page(void *ptr)
 {
        unsigned long idx, vaddr = (unsigned long)ptr;
        pte_t *pte;
@@ -101,10 +96,10 @@ struct page *kmap_atomic_to_page(void *ptr)
 EXPORT_SYMBOL(kmap);
 EXPORT_SYMBOL(kunmap);
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kunmap_virt);
-EXPORT_SYMBOL(kunmap_atomic);
+EXPORT_SYMBOL(__kmap_atomic);
-EXPORT_SYMBOL(kmap_atomic_prot);
+EXPORT_SYMBOL(__kmap_atomic_prot);
-EXPORT_SYMBOL(kmap_atomic_to_page);
+EXPORT_SYMBOL(__kmap_atomic_to_page);
 void __init set_highmem_pages_init(void)
 {
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index d406c5239019..9a69721bbb39 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -14,8 +14,6 @@
 #include <asm/tlb.h>
 #include <asm/proto.h>
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 unsigned long __initdata e820_table_start;
 unsigned long __meminitdata e820_table_end;
 unsigned long __meminitdata e820_table_top;
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c
index 84e236ce76ba..d4fe51ac86f2 100644
--- a/arch/x86/mm/iomap_32.c
+++ b/arch/x86/mm/iomap_32.c
@@ -55,11 +55,12 @@ iomap_free(resource_size_t base, unsigned long size)
 }
 EXPORT_SYMBOL_GPL(iomap_free);
-void *kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
+void *__kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
 {
        enum fixed_addresses idx;
        unsigned long vaddr;
+        preempt_disable();
        pagefault_disable();
        debug_kmap_atomic(type);
@@ -71,6 +72,38 @@ void *kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
        return (void *)vaddr;
 }
+void __kunmap_atomic(void *kvaddr, enum km_type type)
+{
+        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
+        enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
+        /*
+         * Force other mappings to Oops if they'll try to access this pte
+         * without first remap it.  Keeping stale mappings around is a bad idea
+         * also, in case the page changes cacheability attributes or becomes
+         * a protected page in a hypervisor.
+         */
+        if (vaddr == __fix_to_virt(FIX_KMAP_BEGIN+idx))
+                kpte_clear_flush(kmap_pte-idx, vaddr);
+        else {
+#ifdef CONFIG_DEBUG_HIGHMEM
+                BUG_ON(vaddr < PAGE_OFFSET);
+                BUG_ON(vaddr >= (unsigned long)high_memory);
+#endif
+        }
+        pagefault_enable();
+        preempt_enable();
+}
+EXPORT_SYMBOL(__kunmap_atomic);
+#if !defined(CONFIG_PREEMPT_RT) || defined(CONFIG_HIGHMEM)
+# ifndef CONFIG_HIGHMEM
+#  define kmap_atomic_prot_pfn(pfn, type, prot) \
+        __kmap_atomic_prot_pfn(pfn, type, prot)
+#  define kunmap_atomic(kvaddr, type)   __kunmap_atomic(kvaddr, type)
+# endif
 /*
 * Map 'pfn' using fixed map 'type' and protections 'prot'
 */
@@ -93,18 +126,7 @@ EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn);
 void
 iounmap_atomic(void *kvaddr, enum km_type type)
 {
-        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
+        kunmap_atomic(kvaddr, type);
-        enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
-        /*
-         * Force other mappings to Oops if they'll try to access this pte
-         * without first remap it.  Keeping stale mappings around is a bad idea
-         * also, in case the page changes cacheability attributes or becomes
-         * a protected page in a hypervisor.
-         */
-        if (vaddr == __fix_to_virt(FIX_KMAP_BEGIN+idx))
-                kpte_clear_flush(kmap_pte-idx, vaddr);
-        pagefault_enable();
 }
 EXPORT_SYMBOL_GPL(iounmap_atomic);
+#endif
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index cf07c26d9a4a..02e58e54cb83 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -882,8 +882,10 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
                baddr = *addr;
        }
+#if 0
        /* Must avoid aliasing mappings in the highmem code */
        kmap_flush_unused();
+#endif
        vm_unmap_aliases();
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index c9ba9deafe83..7dfc1ea4b279 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -153,6 +153,7 @@ void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
           reserved at the pmd (PDPT) level. */
        set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
+        preempt_disable();
        /*
         * According to Intel App note "TLBs, Paging-Structure Caches,
         * and Their Invalidation", April 2007, document 317080-001,
@@ -161,6 +162,7 @@ void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
         */
        if (mm == current->active_mm)
                write_cr3(read_cr3());
+        preempt_enable();
 }
 #else  /* !CONFIG_X86_PAE */
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 65b58e4b0b8b..426f3a1a64d3 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -41,7 +41,7 @@ union smp_flush_state {
        struct {
                struct mm_struct *flush_mm;
                unsigned long flush_va;
-                spinlock_t tlbstate_lock;
+                raw_spinlock_t tlbstate_lock;
                DECLARE_BITMAP(flush_cpumask, NR_CPUS);
        };
        char pad[INTERNODE_CACHE_BYTES];
@@ -181,7 +181,7 @@ static void flush_tlb_others_ipi(const struct cpumask *cpumask,
         * num_online_cpus() <= NUM_INVALIDATE_TLB_VECTORS, but it is
         * probably not worth checking this for a cache-hot lock.
         */
-        spin_lock(&f->tlbstate_lock);
+        raw_spin_lock(&f->tlbstate_lock);
        f->flush_mm = mm;
        f->flush_va = va;
@@ -199,7 +199,7 @@ static void flush_tlb_others_ipi(const struct cpumask *cpumask,
        f->flush_mm = NULL;
        f->flush_va = 0;
-        spin_unlock(&f->tlbstate_lock);
+        raw_spin_unlock(&f->tlbstate_lock);
 }
 void native_flush_tlb_others(const struct cpumask *cpumask,
@@ -223,7 +223,7 @@ static int __cpuinit init_smp_flush(void)
        int i;
        for (i = 0; i < ARRAY_SIZE(flush_state); i++)
-                spin_lock_init(&flush_state[i].tlbstate_lock);
+                raw_spin_lock_init(&flush_state[i].tlbstate_lock);
        return 0;
 }
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 2c505ee71014..18929a869dd3 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -322,10 +322,10 @@ static void nmi_cpu_setup(void *dummy)
        int cpu = smp_processor_id();
        struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
        nmi_cpu_save_registers(msrs);
-        spin_lock(&oprofilefs_lock);
+        raw_spin_lock(&oprofilefs_lock);
        model->setup_ctrs(model, msrs);
        nmi_cpu_setup_mux(cpu, msrs);
-        spin_unlock(&oprofilefs_lock);
+        raw_spin_unlock(&oprofilefs_lock);
        per_cpu(saved_lvtpc, cpu) = apic_read(APIC_LVTPC);
        apic_write(APIC_LVTPC, APIC_DM_NMI);
 }
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index d2552c68e94d..b79d322ba1c3 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -81,7 +81,7 @@ int pcibios_scanned;
 * This interrupt-safe spinlock protects all accesses to PCI
 * configuration space.
 */
-DEFINE_SPINLOCK(pci_config_lock);
+DEFINE_RAW_SPINLOCK(pci_config_lock);
 static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
 {
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c
index 347d882b3bb3..2cc41159f03c 100644
--- a/arch/x86/pci/direct.c
+++ b/arch/x86/pci/direct.c
@@ -27,7 +27,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
                return -EINVAL;
        }
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
@@ -43,7 +43,7 @@ static int pci_conf1_read(unsigned int seg, unsigned int bus,
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
@@ -56,7 +56,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus,
        if ((bus > 255) || (devfn > 255) || (reg > 4095))
                return -EINVAL;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8);
@@ -72,7 +72,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus,
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
@@ -108,7 +108,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus,
        if (dev & 0x10) 
                return PCIBIOS_DEVICE_NOT_FOUND;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        outb((u8)(0xF0 | (fn << 1)), 0xCF8);
        outb((u8)bus, 0xCFA);
@@ -127,7 +127,7 @@ static int pci_conf2_read(unsigned int seg, unsigned int bus,
        outb(0, 0xCF8);
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
@@ -147,7 +147,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus,
        if (dev & 0x10) 
                return PCIBIOS_DEVICE_NOT_FOUND;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        outb((u8)(0xF0 | (fn << 1)), 0xCF8);
        outb((u8)bus, 0xCFA);
@@ -166,7 +166,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus,
        outb(0, 0xCF8);    
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
@@ -224,16 +224,23 @@ static int __init pci_check_type1(void)
        unsigned int tmp;
        int works = 0;
-        local_irq_save(flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        outb(0x01, 0xCFB);
        tmp = inl(0xCF8);
        outl(0x80000000, 0xCF8);
-        if (inl(0xCF8) == 0x80000000 && pci_sanity_check(&pci_direct_conf1)) {
-                works = 1;
+        if (inl(0xCF8) == 0x80000000) {
+                raw_spin_unlock_irqrestore(&pci_config_lock, flags);
+                if (pci_sanity_check(&pci_direct_conf1))
+                        works = 1;
+                raw_spin_lock_irqsave(&pci_config_lock, flags);
        }
        outl(tmp, 0xCF8);
-        local_irq_restore(flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return works;
 }
@@ -243,17 +250,19 @@ static int __init pci_check_type2(void)
        unsigned long flags;
        int works = 0;
-        local_irq_save(flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        outb(0x00, 0xCFB);
        outb(0x00, 0xCF8);
        outb(0x00, 0xCFA);
-        if (inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00 &&
-            pci_sanity_check(&pci_direct_conf2)) {
-                works = 1;
-        }
-        local_irq_restore(flags);
+        if (inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00) {
+                raw_spin_unlock_irqrestore(&pci_config_lock, flags);
+                if (pci_sanity_check(&pci_direct_conf2))
+                        works = 1;
+        } else
+                raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return works;
 }
diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c
index 90d5fd476ed4..a3d9c54792ae 100644
--- a/arch/x86/pci/mmconfig_32.c
+++ b/arch/x86/pci/mmconfig_32.c
@@ -64,7 +64,7 @@ err:		*value = -1;
        if (!base)
                goto err;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        pci_exp_set_dev_base(base, bus, devfn);
@@ -79,7 +79,7 @@ err:		*value = -1;
                *value = mmio_config_readl(mmcfg_virt_addr + reg);
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
@@ -97,7 +97,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
        if (!base)
                return -EINVAL;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        pci_exp_set_dev_base(base, bus, devfn);
@@ -112,7 +112,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
                mmio_config_writel(mmcfg_virt_addr + reg, value);
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 8eb295e116f6..2dad4dc34d88 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -41,7 +41,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
        if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
                return -EINVAL;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        write_cf8(bus, devfn, reg);
@@ -66,7 +66,7 @@ static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
@@ -80,7 +80,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
        if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) 
                return -EINVAL;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        write_cf8(bus, devfn, reg);
@@ -105,7 +105,7 @@ static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return 0;
 }
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index 1c975cc9839e..2daa521f26b3 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -161,7 +161,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus,
        if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
                return -EINVAL;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        switch (len) {
        case 1:
@@ -212,7 +212,7 @@ static int pci_bios_read(unsigned int seg, unsigned int bus,
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return (int)((result & 0xff00) >> 8);
 }
@@ -227,7 +227,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus,
        if ((bus > 255) || (devfn > 255) || (reg > 255)) 
                return -EINVAL;
-        spin_lock_irqsave(&pci_config_lock, flags);
+        raw_spin_lock_irqsave(&pci_config_lock, flags);
        switch (len) {
        case 1:
@@ -268,7 +268,7 @@ static int pci_bios_write(unsigned int seg, unsigned int bus,
                break;
        }
-        spin_unlock_irqrestore(&pci_config_lock, flags);
+        raw_spin_unlock_irqrestore(&pci_config_lock, flags);
        return (int)((result & 0xff00) >> 8);
 }
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index ee55754cc3c5..e1b68a559338 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -47,11 +47,11 @@ notrace static noinline int do_realtime(struct timespec *ts)
 {
        unsigned long seq, ns;
        do {
-                seq = read_seqbegin(&gtod->lock);
+                seq = read_raw_seqbegin(&gtod->lock);
                ts->tv_sec = gtod->wall_time_sec;
                ts->tv_nsec = gtod->wall_time_nsec;
                ns = vgetns();
-        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        } while (unlikely(read_raw_seqretry(&gtod->lock, seq)));
        timespec_add_ns(ts, ns);
        return 0;
 }
@@ -76,12 +76,12 @@ notrace static noinline int do_monotonic(struct timespec *ts)
 {
        unsigned long seq, ns, secs;
        do {
-                seq = read_seqbegin(&gtod->lock);
+                seq = read_raw_seqbegin(&gtod->lock);
                secs = gtod->wall_time_sec;
                ns = gtod->wall_time_nsec + vgetns();
                secs += gtod->wall_to_monotonic.tv_sec;
                ns += gtod->wall_to_monotonic.tv_nsec;
-        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        } while (unlikely(read_raw_seqretry(&gtod->lock, seq)));
        vset_normalized_timespec(ts, secs, ns);
        return 0;
 }
@@ -90,10 +90,10 @@ notrace static noinline int do_realtime_coarse(struct timespec *ts)
 {
        unsigned long seq;
        do {
-                seq = read_seqbegin(&gtod->lock);
+                seq = read_raw_seqbegin(&gtod->lock);
                ts->tv_sec = gtod->wall_time_coarse.tv_sec;
                ts->tv_nsec = gtod->wall_time_coarse.tv_nsec;
-        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        } while (unlikely(read_raw_seqretry(&gtod->lock, seq)));
        return 0;
 }
@@ -101,12 +101,12 @@ notrace static noinline int do_monotonic_coarse(struct timespec *ts)
 {
        unsigned long seq, ns, secs;
        do {
-                seq = read_seqbegin(&gtod->lock);
+                seq = read_raw_seqbegin(&gtod->lock);
                secs = gtod->wall_time_coarse.tv_sec;
                ns = gtod->wall_time_coarse.tv_nsec;
                secs += gtod->wall_to_monotonic.tv_sec;
                ns += gtod->wall_to_monotonic.tv_nsec;
-        } while (unlikely(read_seqretry(&gtod->lock, seq)));
+        } while (unlikely(read_raw_seqretry(&gtod->lock, seq)));
        vset_normalized_timespec(ts, secs, ns);
        return 0;
 }