diff options
Diffstat (limited to 'arch/x86')
320 files changed, 12817 insertions, 16970 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 3a330a437c6f..06c02c00d7d9 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -5,7 +5,7 @@ mainmenu "Linux Kernel Configuration for x86" | |||
5 | config 64BIT | 5 | config 64BIT |
6 | bool "64-bit kernel" if ARCH = "x86" | 6 | bool "64-bit kernel" if ARCH = "x86" |
7 | default ARCH = "x86_64" | 7 | default ARCH = "x86_64" |
8 | help | 8 | ---help--- |
9 | Say yes to build a 64-bit kernel - formerly known as x86_64 | 9 | Say yes to build a 64-bit kernel - formerly known as x86_64 |
10 | Say no to build a 32-bit kernel - formerly known as i386 | 10 | Say no to build a 32-bit kernel - formerly known as i386 |
11 | 11 | ||
@@ -34,12 +34,15 @@ config X86 | |||
34 | select HAVE_FUNCTION_TRACER | 34 | select HAVE_FUNCTION_TRACER |
35 | select HAVE_FUNCTION_GRAPH_TRACER | 35 | select HAVE_FUNCTION_GRAPH_TRACER |
36 | select HAVE_FUNCTION_TRACE_MCOUNT_TEST | 36 | select HAVE_FUNCTION_TRACE_MCOUNT_TEST |
37 | select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64) | 37 | select HAVE_KVM |
38 | select HAVE_ARCH_KGDB if !X86_VOYAGER | 38 | select HAVE_ARCH_KGDB |
39 | select HAVE_ARCH_TRACEHOOK | 39 | select HAVE_ARCH_TRACEHOOK |
40 | select HAVE_GENERIC_DMA_COHERENT if X86_32 | 40 | select HAVE_GENERIC_DMA_COHERENT if X86_32 |
41 | select HAVE_EFFICIENT_UNALIGNED_ACCESS | 41 | select HAVE_EFFICIENT_UNALIGNED_ACCESS |
42 | select USER_STACKTRACE_SUPPORT | 42 | select USER_STACKTRACE_SUPPORT |
43 | select HAVE_KERNEL_GZIP | ||
44 | select HAVE_KERNEL_BZIP2 | ||
45 | select HAVE_KERNEL_LZMA | ||
43 | 46 | ||
44 | config ARCH_DEFCONFIG | 47 | config ARCH_DEFCONFIG |
45 | string | 48 | string |
@@ -133,18 +136,19 @@ config ARCH_HAS_CACHE_LINE_SIZE | |||
133 | def_bool y | 136 | def_bool y |
134 | 137 | ||
135 | config HAVE_SETUP_PER_CPU_AREA | 138 | config HAVE_SETUP_PER_CPU_AREA |
136 | def_bool X86_64_SMP || (X86_SMP && !X86_VOYAGER) | 139 | def_bool y |
140 | |||
141 | config HAVE_DYNAMIC_PER_CPU_AREA | ||
142 | def_bool y | ||
137 | 143 | ||
138 | config HAVE_CPUMASK_OF_CPU_MAP | 144 | config HAVE_CPUMASK_OF_CPU_MAP |
139 | def_bool X86_64_SMP | 145 | def_bool X86_64_SMP |
140 | 146 | ||
141 | config ARCH_HIBERNATION_POSSIBLE | 147 | config ARCH_HIBERNATION_POSSIBLE |
142 | def_bool y | 148 | def_bool y |
143 | depends on !SMP || !X86_VOYAGER | ||
144 | 149 | ||
145 | config ARCH_SUSPEND_POSSIBLE | 150 | config ARCH_SUSPEND_POSSIBLE |
146 | def_bool y | 151 | def_bool y |
147 | depends on !X86_VOYAGER | ||
148 | 152 | ||
149 | config ZONE_DMA32 | 153 | config ZONE_DMA32 |
150 | bool | 154 | bool |
@@ -177,11 +181,6 @@ config GENERIC_PENDING_IRQ | |||
177 | depends on GENERIC_HARDIRQS && SMP | 181 | depends on GENERIC_HARDIRQS && SMP |
178 | default y | 182 | default y |
179 | 183 | ||
180 | config X86_SMP | ||
181 | bool | ||
182 | depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64) | ||
183 | default y | ||
184 | |||
185 | config USE_GENERIC_SMP_HELPERS | 184 | config USE_GENERIC_SMP_HELPERS |
186 | def_bool y | 185 | def_bool y |
187 | depends on SMP | 186 | depends on SMP |
@@ -197,19 +196,17 @@ config X86_64_SMP | |||
197 | config X86_HT | 196 | config X86_HT |
198 | bool | 197 | bool |
199 | depends on SMP | 198 | depends on SMP |
200 | depends on (X86_32 && !X86_VOYAGER) || X86_64 | ||
201 | default y | ||
202 | |||
203 | config X86_BIOS_REBOOT | ||
204 | bool | ||
205 | depends on !X86_VOYAGER | ||
206 | default y | 199 | default y |
207 | 200 | ||
208 | config X86_TRAMPOLINE | 201 | config X86_TRAMPOLINE |
209 | bool | 202 | bool |
210 | depends on X86_SMP || (X86_VOYAGER && SMP) || (64BIT && ACPI_SLEEP) | 203 | depends on SMP || (64BIT && ACPI_SLEEP) |
211 | default y | 204 | default y |
212 | 205 | ||
206 | config X86_32_LAZY_GS | ||
207 | def_bool y | ||
208 | depends on X86_32 && !CC_STACKPROTECTOR | ||
209 | |||
213 | config KTIME_SCALAR | 210 | config KTIME_SCALAR |
214 | def_bool X86_32 | 211 | def_bool X86_32 |
215 | source "init/Kconfig" | 212 | source "init/Kconfig" |
@@ -247,14 +244,24 @@ config SMP | |||
247 | 244 | ||
248 | If you don't know what to do here, say N. | 245 | If you don't know what to do here, say N. |
249 | 246 | ||
250 | config X86_HAS_BOOT_CPU_ID | 247 | config X86_X2APIC |
251 | def_bool y | 248 | bool "Support x2apic" |
252 | depends on X86_VOYAGER | 249 | depends on X86_LOCAL_APIC && X86_64 |
250 | ---help--- | ||
251 | This enables x2apic support on CPUs that have this feature. | ||
252 | |||
253 | This allows 32-bit apic IDs (so it can support very large systems), | ||
254 | and accesses the local apic via MSRs not via mmio. | ||
255 | |||
256 | ( On certain CPU models you may need to enable INTR_REMAP too, | ||
257 | to get functional x2apic mode. ) | ||
258 | |||
259 | If you don't know what to do here, say N. | ||
253 | 260 | ||
254 | config SPARSE_IRQ | 261 | config SPARSE_IRQ |
255 | bool "Support sparse irq numbering" | 262 | bool "Support sparse irq numbering" |
256 | depends on PCI_MSI || HT_IRQ | 263 | depends on PCI_MSI || HT_IRQ |
257 | help | 264 | ---help--- |
258 | This enables support for sparse irqs. This is useful for distro | 265 | This enables support for sparse irqs. This is useful for distro |
259 | kernels that want to define a high CONFIG_NR_CPUS value but still | 266 | kernels that want to define a high CONFIG_NR_CPUS value but still |
260 | want to have low kernel memory footprint on smaller machines. | 267 | want to have low kernel memory footprint on smaller machines. |
@@ -268,114 +275,140 @@ config NUMA_MIGRATE_IRQ_DESC | |||
268 | bool "Move irq desc when changing irq smp_affinity" | 275 | bool "Move irq desc when changing irq smp_affinity" |
269 | depends on SPARSE_IRQ && NUMA | 276 | depends on SPARSE_IRQ && NUMA |
270 | default n | 277 | default n |
271 | help | 278 | ---help--- |
272 | This enables moving irq_desc to cpu/node that irq will use handled. | 279 | This enables moving irq_desc to cpu/node that irq will use handled. |
273 | 280 | ||
274 | If you don't know what to do here, say N. | 281 | If you don't know what to do here, say N. |
275 | 282 | ||
276 | config X86_FIND_SMP_CONFIG | ||
277 | def_bool y | ||
278 | depends on X86_MPPARSE || X86_VOYAGER | ||
279 | |||
280 | config X86_MPPARSE | 283 | config X86_MPPARSE |
281 | bool "Enable MPS table" if ACPI | 284 | bool "Enable MPS table" if ACPI |
282 | default y | 285 | default y |
283 | depends on X86_LOCAL_APIC | 286 | depends on X86_LOCAL_APIC |
284 | help | 287 | ---help--- |
285 | For old smp systems that do not have proper acpi support. Newer systems | 288 | For old smp systems that do not have proper acpi support. Newer systems |
286 | (esp with 64bit cpus) with acpi support, MADT and DSDT will override it | 289 | (esp with 64bit cpus) with acpi support, MADT and DSDT will override it |
287 | 290 | ||
288 | choice | 291 | config X86_BIGSMP |
289 | prompt "Subarchitecture Type" | 292 | bool "Support for big SMP systems with more than 8 CPUs" |
290 | default X86_PC | 293 | depends on X86_32 && SMP |
294 | ---help--- | ||
295 | This option is needed for the systems that have more than 8 CPUs | ||
291 | 296 | ||
292 | config X86_PC | 297 | if X86_32 |
293 | bool "PC-compatible" | 298 | config X86_EXTENDED_PLATFORM |
294 | help | 299 | bool "Support for extended (non-PC) x86 platforms" |
295 | Choose this option if your computer is a standard PC or compatible. | 300 | default y |
301 | ---help--- | ||
302 | If you disable this option then the kernel will only support | ||
303 | standard PC platforms. (which covers the vast majority of | ||
304 | systems out there.) | ||
305 | |||
306 | If you enable this option then you'll be able to select support | ||
307 | for the following (non-PC) 32 bit x86 platforms: | ||
308 | AMD Elan | ||
309 | NUMAQ (IBM/Sequent) | ||
310 | RDC R-321x SoC | ||
311 | SGI 320/540 (Visual Workstation) | ||
312 | Summit/EXA (IBM x440) | ||
313 | Unisys ES7000 IA32 series | ||
314 | |||
315 | If you have one of these systems, or if you want to build a | ||
316 | generic distribution kernel, say Y here - otherwise say N. | ||
317 | endif | ||
318 | |||
319 | if X86_64 | ||
320 | config X86_EXTENDED_PLATFORM | ||
321 | bool "Support for extended (non-PC) x86 platforms" | ||
322 | default y | ||
323 | ---help--- | ||
324 | If you disable this option then the kernel will only support | ||
325 | standard PC platforms. (which covers the vast majority of | ||
326 | systems out there.) | ||
327 | |||
328 | If you enable this option then you'll be able to select support | ||
329 | for the following (non-PC) 64 bit x86 platforms: | ||
330 | ScaleMP vSMP | ||
331 | SGI Ultraviolet | ||
332 | |||
333 | If you have one of these systems, or if you want to build a | ||
334 | generic distribution kernel, say Y here - otherwise say N. | ||
335 | endif | ||
336 | # This is an alphabetically sorted list of 64 bit extended platforms | ||
337 | # Please maintain the alphabetic order if and when there are additions | ||
338 | |||
339 | config X86_VSMP | ||
340 | bool "ScaleMP vSMP" | ||
341 | select PARAVIRT | ||
342 | depends on X86_64 && PCI | ||
343 | depends on X86_EXTENDED_PLATFORM | ||
344 | ---help--- | ||
345 | Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is | ||
346 | supposed to run on these EM64T-based machines. Only choose this option | ||
347 | if you have one of these machines. | ||
348 | |||
349 | config X86_UV | ||
350 | bool "SGI Ultraviolet" | ||
351 | depends on X86_64 | ||
352 | depends on X86_EXTENDED_PLATFORM | ||
353 | select X86_X2APIC | ||
354 | ---help--- | ||
355 | This option is needed in order to support SGI Ultraviolet systems. | ||
356 | If you don't have one of these, you should say N here. | ||
357 | |||
358 | # Following is an alphabetically sorted list of 32 bit extended platforms | ||
359 | # Please maintain the alphabetic order if and when there are additions | ||
296 | 360 | ||
297 | config X86_ELAN | 361 | config X86_ELAN |
298 | bool "AMD Elan" | 362 | bool "AMD Elan" |
299 | depends on X86_32 | 363 | depends on X86_32 |
300 | help | 364 | depends on X86_EXTENDED_PLATFORM |
365 | ---help--- | ||
301 | Select this for an AMD Elan processor. | 366 | Select this for an AMD Elan processor. |
302 | 367 | ||
303 | Do not use this option for K6/Athlon/Opteron processors! | 368 | Do not use this option for K6/Athlon/Opteron processors! |
304 | 369 | ||
305 | If unsure, choose "PC-compatible" instead. | 370 | If unsure, choose "PC-compatible" instead. |
306 | 371 | ||
307 | config X86_VOYAGER | 372 | config X86_RDC321X |
308 | bool "Voyager (NCR)" | 373 | bool "RDC R-321x SoC" |
309 | depends on X86_32 && (SMP || BROKEN) && !PCI | ||
310 | help | ||
311 | Voyager is an MCA-based 32-way capable SMP architecture proprietary | ||
312 | to NCR Corp. Machine classes 345x/35xx/4100/51xx are Voyager-based. | ||
313 | |||
314 | *** WARNING *** | ||
315 | |||
316 | If you do not specifically know you have a Voyager based machine, | ||
317 | say N here, otherwise the kernel you build will not be bootable. | ||
318 | |||
319 | config X86_GENERICARCH | ||
320 | bool "Generic architecture" | ||
321 | depends on X86_32 | 374 | depends on X86_32 |
322 | help | 375 | depends on X86_EXTENDED_PLATFORM |
323 | This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default | 376 | select M486 |
377 | select X86_REBOOTFIXUPS | ||
378 | ---help--- | ||
379 | This option is needed for RDC R-321x system-on-chip, also known | ||
380 | as R-8610-(G). | ||
381 | If you don't have one of these chips, you should say N here. | ||
382 | |||
383 | config X86_32_NON_STANDARD | ||
384 | bool "Support non-standard 32-bit SMP architectures" | ||
385 | depends on X86_32 && SMP | ||
386 | depends on X86_EXTENDED_PLATFORM | ||
387 | ---help--- | ||
388 | This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default | ||
324 | subarchitectures. It is intended for a generic binary kernel. | 389 | subarchitectures. It is intended for a generic binary kernel. |
325 | if you select them all, kernel will probe it one by one. and will | 390 | if you select them all, kernel will probe it one by one. and will |
326 | fallback to default. | 391 | fallback to default. |
327 | 392 | ||
328 | if X86_GENERICARCH | 393 | # Alphabetically sorted list of Non standard 32 bit platforms |
329 | 394 | ||
330 | config X86_NUMAQ | 395 | config X86_NUMAQ |
331 | bool "NUMAQ (IBM/Sequent)" | 396 | bool "NUMAQ (IBM/Sequent)" |
332 | depends on SMP && X86_32 && PCI && X86_MPPARSE | 397 | depends on X86_32_NON_STANDARD |
333 | select NUMA | 398 | select NUMA |
334 | help | 399 | select X86_MPPARSE |
400 | ---help--- | ||
335 | This option is used for getting Linux to run on a NUMAQ (IBM/Sequent) | 401 | This option is used for getting Linux to run on a NUMAQ (IBM/Sequent) |
336 | NUMA multiquad box. This changes the way that processors are | 402 | NUMA multiquad box. This changes the way that processors are |
337 | bootstrapped, and uses Clustered Logical APIC addressing mode instead | 403 | bootstrapped, and uses Clustered Logical APIC addressing mode instead |
338 | of Flat Logical. You will need a new lynxer.elf file to flash your | 404 | of Flat Logical. You will need a new lynxer.elf file to flash your |
339 | firmware with - send email to <Martin.Bligh@us.ibm.com>. | 405 | firmware with - send email to <Martin.Bligh@us.ibm.com>. |
340 | 406 | ||
341 | config X86_SUMMIT | ||
342 | bool "Summit/EXA (IBM x440)" | ||
343 | depends on X86_32 && SMP | ||
344 | help | ||
345 | This option is needed for IBM systems that use the Summit/EXA chipset. | ||
346 | In particular, it is needed for the x440. | ||
347 | |||
348 | config X86_ES7000 | ||
349 | bool "Support for Unisys ES7000 IA32 series" | ||
350 | depends on X86_32 && SMP | ||
351 | help | ||
352 | Support for Unisys ES7000 systems. Say 'Y' here if this kernel is | ||
353 | supposed to run on an IA32-based Unisys ES7000 system. | ||
354 | |||
355 | config X86_BIGSMP | ||
356 | bool "Support for big SMP systems with more than 8 CPUs" | ||
357 | depends on X86_32 && SMP | ||
358 | help | ||
359 | This option is needed for the systems that have more than 8 CPUs | ||
360 | and if the system is not of any sub-arch type above. | ||
361 | |||
362 | endif | ||
363 | |||
364 | config X86_VSMP | ||
365 | bool "Support for ScaleMP vSMP" | ||
366 | select PARAVIRT | ||
367 | depends on X86_64 && PCI | ||
368 | help | ||
369 | Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is | ||
370 | supposed to run on these EM64T-based machines. Only choose this option | ||
371 | if you have one of these machines. | ||
372 | |||
373 | endchoice | ||
374 | |||
375 | config X86_VISWS | 407 | config X86_VISWS |
376 | bool "SGI 320/540 (Visual Workstation)" | 408 | bool "SGI 320/540 (Visual Workstation)" |
377 | depends on X86_32 && PCI && !X86_VOYAGER && X86_MPPARSE && PCI_GODIRECT | 409 | depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT |
378 | help | 410 | depends on X86_32_NON_STANDARD |
411 | ---help--- | ||
379 | The SGI Visual Workstation series is an IA32-based workstation | 412 | The SGI Visual Workstation series is an IA32-based workstation |
380 | based on SGI systems chips with some legacy PC hardware attached. | 413 | based on SGI systems chips with some legacy PC hardware attached. |
381 | 414 | ||
@@ -384,21 +417,25 @@ config X86_VISWS | |||
384 | A kernel compiled for the Visual Workstation will run on general | 417 | A kernel compiled for the Visual Workstation will run on general |
385 | PCs as well. See <file:Documentation/sgi-visws.txt> for details. | 418 | PCs as well. See <file:Documentation/sgi-visws.txt> for details. |
386 | 419 | ||
387 | config X86_RDC321X | 420 | config X86_SUMMIT |
388 | bool "RDC R-321x SoC" | 421 | bool "Summit/EXA (IBM x440)" |
389 | depends on X86_32 | 422 | depends on X86_32_NON_STANDARD |
390 | select M486 | 423 | ---help--- |
391 | select X86_REBOOTFIXUPS | 424 | This option is needed for IBM systems that use the Summit/EXA chipset. |
392 | help | 425 | In particular, it is needed for the x440. |
393 | This option is needed for RDC R-321x system-on-chip, also known | 426 | |
394 | as R-8610-(G). | 427 | config X86_ES7000 |
395 | If you don't have one of these chips, you should say N here. | 428 | bool "Unisys ES7000 IA32 series" |
429 | depends on X86_32_NON_STANDARD && X86_BIGSMP | ||
430 | ---help--- | ||
431 | Support for Unisys ES7000 systems. Say 'Y' here if this kernel is | ||
432 | supposed to run on an IA32-based Unisys ES7000 system. | ||
396 | 433 | ||
397 | config SCHED_OMIT_FRAME_POINTER | 434 | config SCHED_OMIT_FRAME_POINTER |
398 | def_bool y | 435 | def_bool y |
399 | prompt "Single-depth WCHAN output" | 436 | prompt "Single-depth WCHAN output" |
400 | depends on X86 | 437 | depends on X86 |
401 | help | 438 | ---help--- |
402 | Calculate simpler /proc/<PID>/wchan values. If this option | 439 | Calculate simpler /proc/<PID>/wchan values. If this option |
403 | is disabled then wchan values will recurse back to the | 440 | is disabled then wchan values will recurse back to the |
404 | caller function. This provides more accurate wchan values, | 441 | caller function. This provides more accurate wchan values, |
@@ -408,7 +445,7 @@ config SCHED_OMIT_FRAME_POINTER | |||
408 | 445 | ||
409 | menuconfig PARAVIRT_GUEST | 446 | menuconfig PARAVIRT_GUEST |
410 | bool "Paravirtualized guest support" | 447 | bool "Paravirtualized guest support" |
411 | help | 448 | ---help--- |
412 | Say Y here to get to see options related to running Linux under | 449 | Say Y here to get to see options related to running Linux under |
413 | various hypervisors. This option alone does not add any kernel code. | 450 | various hypervisors. This option alone does not add any kernel code. |
414 | 451 | ||
@@ -422,8 +459,7 @@ config VMI | |||
422 | bool "VMI Guest support" | 459 | bool "VMI Guest support" |
423 | select PARAVIRT | 460 | select PARAVIRT |
424 | depends on X86_32 | 461 | depends on X86_32 |
425 | depends on !X86_VOYAGER | 462 | ---help--- |
426 | help | ||
427 | VMI provides a paravirtualized interface to the VMware ESX server | 463 | VMI provides a paravirtualized interface to the VMware ESX server |
428 | (it could be used by other hypervisors in theory too, but is not | 464 | (it could be used by other hypervisors in theory too, but is not |
429 | at the moment), by linking the kernel to a GPL-ed ROM module | 465 | at the moment), by linking the kernel to a GPL-ed ROM module |
@@ -433,8 +469,7 @@ config KVM_CLOCK | |||
433 | bool "KVM paravirtualized clock" | 469 | bool "KVM paravirtualized clock" |
434 | select PARAVIRT | 470 | select PARAVIRT |
435 | select PARAVIRT_CLOCK | 471 | select PARAVIRT_CLOCK |
436 | depends on !X86_VOYAGER | 472 | ---help--- |
437 | help | ||
438 | Turning on this option will allow you to run a paravirtualized clock | 473 | Turning on this option will allow you to run a paravirtualized clock |
439 | when running over the KVM hypervisor. Instead of relying on a PIT | 474 | when running over the KVM hypervisor. Instead of relying on a PIT |
440 | (or probably other) emulation by the underlying device model, the host | 475 | (or probably other) emulation by the underlying device model, the host |
@@ -444,17 +479,15 @@ config KVM_CLOCK | |||
444 | config KVM_GUEST | 479 | config KVM_GUEST |
445 | bool "KVM Guest support" | 480 | bool "KVM Guest support" |
446 | select PARAVIRT | 481 | select PARAVIRT |
447 | depends on !X86_VOYAGER | 482 | ---help--- |
448 | help | 483 | This option enables various optimizations for running under the KVM |
449 | This option enables various optimizations for running under the KVM | 484 | hypervisor. |
450 | hypervisor. | ||
451 | 485 | ||
452 | source "arch/x86/lguest/Kconfig" | 486 | source "arch/x86/lguest/Kconfig" |
453 | 487 | ||
454 | config PARAVIRT | 488 | config PARAVIRT |
455 | bool "Enable paravirtualization code" | 489 | bool "Enable paravirtualization code" |
456 | depends on !X86_VOYAGER | 490 | ---help--- |
457 | help | ||
458 | This changes the kernel so it can modify itself when it is run | 491 | This changes the kernel so it can modify itself when it is run |
459 | under a hypervisor, potentially improving performance significantly | 492 | under a hypervisor, potentially improving performance significantly |
460 | over full virtualization. However, when run without a hypervisor | 493 | over full virtualization. However, when run without a hypervisor |
@@ -467,51 +500,51 @@ config PARAVIRT_CLOCK | |||
467 | endif | 500 | endif |
468 | 501 | ||
469 | config PARAVIRT_DEBUG | 502 | config PARAVIRT_DEBUG |
470 | bool "paravirt-ops debugging" | 503 | bool "paravirt-ops debugging" |
471 | depends on PARAVIRT && DEBUG_KERNEL | 504 | depends on PARAVIRT && DEBUG_KERNEL |
472 | help | 505 | ---help--- |
473 | Enable to debug paravirt_ops internals. Specifically, BUG if | 506 | Enable to debug paravirt_ops internals. Specifically, BUG if |
474 | a paravirt_op is missing when it is called. | 507 | a paravirt_op is missing when it is called. |
475 | 508 | ||
476 | config MEMTEST | 509 | config MEMTEST |
477 | bool "Memtest" | 510 | bool "Memtest" |
478 | help | 511 | ---help--- |
479 | This option adds a kernel parameter 'memtest', which allows memtest | 512 | This option adds a kernel parameter 'memtest', which allows memtest |
480 | to be set. | 513 | to be set. |
481 | memtest=0, mean disabled; -- default | 514 | memtest=0, mean disabled; -- default |
482 | memtest=1, mean do 1 test pattern; | 515 | memtest=1, mean do 1 test pattern; |
483 | ... | 516 | ... |
484 | memtest=4, mean do 4 test patterns. | 517 | memtest=4, mean do 4 test patterns. |
485 | If you are unsure how to answer this question, answer N. | 518 | If you are unsure how to answer this question, answer N. |
486 | 519 | ||
487 | config X86_SUMMIT_NUMA | 520 | config X86_SUMMIT_NUMA |
488 | def_bool y | 521 | def_bool y |
489 | depends on X86_32 && NUMA && X86_GENERICARCH | 522 | depends on X86_32 && NUMA && X86_32_NON_STANDARD |
490 | 523 | ||
491 | config X86_CYCLONE_TIMER | 524 | config X86_CYCLONE_TIMER |
492 | def_bool y | 525 | def_bool y |
493 | depends on X86_GENERICARCH | 526 | depends on X86_32_NON_STANDARD |
494 | 527 | ||
495 | source "arch/x86/Kconfig.cpu" | 528 | source "arch/x86/Kconfig.cpu" |
496 | 529 | ||
497 | config HPET_TIMER | 530 | config HPET_TIMER |
498 | def_bool X86_64 | 531 | def_bool X86_64 |
499 | prompt "HPET Timer Support" if X86_32 | 532 | prompt "HPET Timer Support" if X86_32 |
500 | help | 533 | ---help--- |
501 | Use the IA-PC HPET (High Precision Event Timer) to manage | 534 | Use the IA-PC HPET (High Precision Event Timer) to manage |
502 | time in preference to the PIT and RTC, if a HPET is | 535 | time in preference to the PIT and RTC, if a HPET is |
503 | present. | 536 | present. |
504 | HPET is the next generation timer replacing legacy 8254s. | 537 | HPET is the next generation timer replacing legacy 8254s. |
505 | The HPET provides a stable time base on SMP | 538 | The HPET provides a stable time base on SMP |
506 | systems, unlike the TSC, but it is more expensive to access, | 539 | systems, unlike the TSC, but it is more expensive to access, |
507 | as it is off-chip. You can find the HPET spec at | 540 | as it is off-chip. You can find the HPET spec at |
508 | <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>. | 541 | <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>. |
509 | 542 | ||
510 | You can safely choose Y here. However, HPET will only be | 543 | You can safely choose Y here. However, HPET will only be |
511 | activated if the platform and the BIOS support this feature. | 544 | activated if the platform and the BIOS support this feature. |
512 | Otherwise the 8254 will be used for timing services. | 545 | Otherwise the 8254 will be used for timing services. |
513 | 546 | ||
514 | Choose N to continue using the legacy 8254 timer. | 547 | Choose N to continue using the legacy 8254 timer. |
515 | 548 | ||
516 | config HPET_EMULATE_RTC | 549 | config HPET_EMULATE_RTC |
517 | def_bool y | 550 | def_bool y |
@@ -522,7 +555,7 @@ config HPET_EMULATE_RTC | |||
522 | config DMI | 555 | config DMI |
523 | default y | 556 | default y |
524 | bool "Enable DMI scanning" if EMBEDDED | 557 | bool "Enable DMI scanning" if EMBEDDED |
525 | help | 558 | ---help--- |
526 | Enabled scanning of DMI to identify machine quirks. Say Y | 559 | Enabled scanning of DMI to identify machine quirks. Say Y |
527 | here unless you have verified that your setup is not | 560 | here unless you have verified that your setup is not |
528 | affected by entries in the DMI blacklist. Required by PNP | 561 | affected by entries in the DMI blacklist. Required by PNP |
@@ -534,7 +567,7 @@ config GART_IOMMU | |||
534 | select SWIOTLB | 567 | select SWIOTLB |
535 | select AGP | 568 | select AGP |
536 | depends on X86_64 && PCI | 569 | depends on X86_64 && PCI |
537 | help | 570 | ---help--- |
538 | Support for full DMA access of devices with 32bit memory access only | 571 | Support for full DMA access of devices with 32bit memory access only |
539 | on systems with more than 3GB. This is usually needed for USB, | 572 | on systems with more than 3GB. This is usually needed for USB, |
540 | sound, many IDE/SATA chipsets and some other devices. | 573 | sound, many IDE/SATA chipsets and some other devices. |
@@ -549,7 +582,7 @@ config CALGARY_IOMMU | |||
549 | bool "IBM Calgary IOMMU support" | 582 | bool "IBM Calgary IOMMU support" |
550 | select SWIOTLB | 583 | select SWIOTLB |
551 | depends on X86_64 && PCI && EXPERIMENTAL | 584 | depends on X86_64 && PCI && EXPERIMENTAL |
552 | help | 585 | ---help--- |
553 | Support for hardware IOMMUs in IBM's xSeries x366 and x460 | 586 | Support for hardware IOMMUs in IBM's xSeries x366 and x460 |
554 | systems. Needed to run systems with more than 3GB of memory | 587 | systems. Needed to run systems with more than 3GB of memory |
555 | properly with 32-bit PCI devices that do not support DAC | 588 | properly with 32-bit PCI devices that do not support DAC |
@@ -567,7 +600,7 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT | |||
567 | def_bool y | 600 | def_bool y |
568 | prompt "Should Calgary be enabled by default?" | 601 | prompt "Should Calgary be enabled by default?" |
569 | depends on CALGARY_IOMMU | 602 | depends on CALGARY_IOMMU |
570 | help | 603 | ---help--- |
571 | Should Calgary be enabled by default? if you choose 'y', Calgary | 604 | Should Calgary be enabled by default? if you choose 'y', Calgary |
572 | will be used (if it exists). If you choose 'n', Calgary will not be | 605 | will be used (if it exists). If you choose 'n', Calgary will not be |
573 | used even if it exists. If you choose 'n' and would like to use | 606 | used even if it exists. If you choose 'n' and would like to use |
@@ -579,7 +612,7 @@ config AMD_IOMMU | |||
579 | select SWIOTLB | 612 | select SWIOTLB |
580 | select PCI_MSI | 613 | select PCI_MSI |
581 | depends on X86_64 && PCI && ACPI | 614 | depends on X86_64 && PCI && ACPI |
582 | help | 615 | ---help--- |
583 | With this option you can enable support for AMD IOMMU hardware in | 616 | With this option you can enable support for AMD IOMMU hardware in |
584 | your system. An IOMMU is a hardware component which provides | 617 | your system. An IOMMU is a hardware component which provides |
585 | remapping of DMA memory accesses from devices. With an AMD IOMMU you | 618 | remapping of DMA memory accesses from devices. With an AMD IOMMU you |
@@ -594,7 +627,7 @@ config AMD_IOMMU_STATS | |||
594 | bool "Export AMD IOMMU statistics to debugfs" | 627 | bool "Export AMD IOMMU statistics to debugfs" |
595 | depends on AMD_IOMMU | 628 | depends on AMD_IOMMU |
596 | select DEBUG_FS | 629 | select DEBUG_FS |
597 | help | 630 | ---help--- |
598 | This option enables code in the AMD IOMMU driver to collect various | 631 | This option enables code in the AMD IOMMU driver to collect various |
599 | statistics about whats happening in the driver and exports that | 632 | statistics about whats happening in the driver and exports that |
600 | information to userspace via debugfs. | 633 | information to userspace via debugfs. |
@@ -603,7 +636,7 @@ config AMD_IOMMU_STATS | |||
603 | # need this always selected by IOMMU for the VIA workaround | 636 | # need this always selected by IOMMU for the VIA workaround |
604 | config SWIOTLB | 637 | config SWIOTLB |
605 | def_bool y if X86_64 | 638 | def_bool y if X86_64 |
606 | help | 639 | ---help--- |
607 | Support for software bounce buffers used on x86-64 systems | 640 | Support for software bounce buffers used on x86-64 systems |
608 | which don't have a hardware IOMMU (e.g. the current generation | 641 | which don't have a hardware IOMMU (e.g. the current generation |
609 | of Intel's x86-64 CPUs). Using this PCI devices which can only | 642 | of Intel's x86-64 CPUs). Using this PCI devices which can only |
@@ -621,7 +654,7 @@ config MAXSMP | |||
621 | depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL | 654 | depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL |
622 | select CPUMASK_OFFSTACK | 655 | select CPUMASK_OFFSTACK |
623 | default n | 656 | default n |
624 | help | 657 | ---help--- |
625 | Configure maximum number of CPUS and NUMA Nodes for this architecture. | 658 | Configure maximum number of CPUS and NUMA Nodes for this architecture. |
626 | If unsure, say N. | 659 | If unsure, say N. |
627 | 660 | ||
@@ -632,7 +665,7 @@ config NR_CPUS | |||
632 | default "4096" if MAXSMP | 665 | default "4096" if MAXSMP |
633 | default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000) | 666 | default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000) |
634 | default "8" if SMP | 667 | default "8" if SMP |
635 | help | 668 | ---help--- |
636 | This allows you to specify the maximum number of CPUs which this | 669 | This allows you to specify the maximum number of CPUs which this |
637 | kernel will support. The maximum supported value is 512 and the | 670 | kernel will support. The maximum supported value is 512 and the |
638 | minimum value which makes sense is 2. | 671 | minimum value which makes sense is 2. |
@@ -643,7 +676,7 @@ config NR_CPUS | |||
643 | config SCHED_SMT | 676 | config SCHED_SMT |
644 | bool "SMT (Hyperthreading) scheduler support" | 677 | bool "SMT (Hyperthreading) scheduler support" |
645 | depends on X86_HT | 678 | depends on X86_HT |
646 | help | 679 | ---help--- |
647 | SMT scheduler support improves the CPU scheduler's decision making | 680 | SMT scheduler support improves the CPU scheduler's decision making |
648 | when dealing with Intel Pentium 4 chips with HyperThreading at a | 681 | when dealing with Intel Pentium 4 chips with HyperThreading at a |
649 | cost of slightly increased overhead in some places. If unsure say | 682 | cost of slightly increased overhead in some places. If unsure say |
@@ -653,7 +686,7 @@ config SCHED_MC | |||
653 | def_bool y | 686 | def_bool y |
654 | prompt "Multi-core scheduler support" | 687 | prompt "Multi-core scheduler support" |
655 | depends on X86_HT | 688 | depends on X86_HT |
656 | help | 689 | ---help--- |
657 | Multi-core scheduler support improves the CPU scheduler's decision | 690 | Multi-core scheduler support improves the CPU scheduler's decision |
658 | making when dealing with multi-core CPU chips at a cost of slightly | 691 | making when dealing with multi-core CPU chips at a cost of slightly |
659 | increased overhead in some places. If unsure say N here. | 692 | increased overhead in some places. If unsure say N here. |
@@ -662,8 +695,8 @@ source "kernel/Kconfig.preempt" | |||
662 | 695 | ||
663 | config X86_UP_APIC | 696 | config X86_UP_APIC |
664 | bool "Local APIC support on uniprocessors" | 697 | bool "Local APIC support on uniprocessors" |
665 | depends on X86_32 && !SMP && !(X86_VOYAGER || X86_GENERICARCH) | 698 | depends on X86_32 && !SMP && !X86_32_NON_STANDARD |
666 | help | 699 | ---help--- |
667 | A local APIC (Advanced Programmable Interrupt Controller) is an | 700 | A local APIC (Advanced Programmable Interrupt Controller) is an |
668 | integrated interrupt controller in the CPU. If you have a single-CPU | 701 | integrated interrupt controller in the CPU. If you have a single-CPU |
669 | system which has a processor with a local APIC, you can say Y here to | 702 | system which has a processor with a local APIC, you can say Y here to |
@@ -676,7 +709,7 @@ config X86_UP_APIC | |||
676 | config X86_UP_IOAPIC | 709 | config X86_UP_IOAPIC |
677 | bool "IO-APIC support on uniprocessors" | 710 | bool "IO-APIC support on uniprocessors" |
678 | depends on X86_UP_APIC | 711 | depends on X86_UP_APIC |
679 | help | 712 | ---help--- |
680 | An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an | 713 | An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an |
681 | SMP-capable replacement for PC-style interrupt controllers. Most | 714 | SMP-capable replacement for PC-style interrupt controllers. Most |
682 | SMP systems and many recent uniprocessor systems have one. | 715 | SMP systems and many recent uniprocessor systems have one. |
@@ -687,11 +720,11 @@ config X86_UP_IOAPIC | |||
687 | 720 | ||
688 | config X86_LOCAL_APIC | 721 | config X86_LOCAL_APIC |
689 | def_bool y | 722 | def_bool y |
690 | depends on X86_64 || (X86_32 && (X86_UP_APIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH)) | 723 | depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC |
691 | 724 | ||
692 | config X86_IO_APIC | 725 | config X86_IO_APIC |
693 | def_bool y | 726 | def_bool y |
694 | depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH)) | 727 | depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC |
695 | 728 | ||
696 | config X86_VISWS_APIC | 729 | config X86_VISWS_APIC |
697 | def_bool y | 730 | def_bool y |
@@ -701,7 +734,7 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS | |||
701 | bool "Reroute for broken boot IRQs" | 734 | bool "Reroute for broken boot IRQs" |
702 | default n | 735 | default n |
703 | depends on X86_IO_APIC | 736 | depends on X86_IO_APIC |
704 | help | 737 | ---help--- |
705 | This option enables a workaround that fixes a source of | 738 | This option enables a workaround that fixes a source of |
706 | spurious interrupts. This is recommended when threaded | 739 | spurious interrupts. This is recommended when threaded |
707 | interrupt handling is used on systems where the generation of | 740 | interrupt handling is used on systems where the generation of |
@@ -723,7 +756,6 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS | |||
723 | 756 | ||
724 | config X86_MCE | 757 | config X86_MCE |
725 | bool "Machine Check Exception" | 758 | bool "Machine Check Exception" |
726 | depends on !X86_VOYAGER | ||
727 | ---help--- | 759 | ---help--- |
728 | Machine Check Exception support allows the processor to notify the | 760 | Machine Check Exception support allows the processor to notify the |
729 | kernel if it detects a problem (e.g. overheating, component failure). | 761 | kernel if it detects a problem (e.g. overheating, component failure). |
@@ -742,7 +774,7 @@ config X86_MCE_INTEL | |||
742 | def_bool y | 774 | def_bool y |
743 | prompt "Intel MCE features" | 775 | prompt "Intel MCE features" |
744 | depends on X86_64 && X86_MCE && X86_LOCAL_APIC | 776 | depends on X86_64 && X86_MCE && X86_LOCAL_APIC |
745 | help | 777 | ---help--- |
746 | Additional support for intel specific MCE features such as | 778 | Additional support for intel specific MCE features such as |
747 | the thermal monitor. | 779 | the thermal monitor. |
748 | 780 | ||
@@ -750,14 +782,14 @@ config X86_MCE_AMD | |||
750 | def_bool y | 782 | def_bool y |
751 | prompt "AMD MCE features" | 783 | prompt "AMD MCE features" |
752 | depends on X86_64 && X86_MCE && X86_LOCAL_APIC | 784 | depends on X86_64 && X86_MCE && X86_LOCAL_APIC |
753 | help | 785 | ---help--- |
754 | Additional support for AMD specific MCE features such as | 786 | Additional support for AMD specific MCE features such as |
755 | the DRAM Error Threshold. | 787 | the DRAM Error Threshold. |
756 | 788 | ||
757 | config X86_MCE_NONFATAL | 789 | config X86_MCE_NONFATAL |
758 | tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4" | 790 | tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4" |
759 | depends on X86_32 && X86_MCE | 791 | depends on X86_32 && X86_MCE |
760 | help | 792 | ---help--- |
761 | Enabling this feature starts a timer that triggers every 5 seconds which | 793 | Enabling this feature starts a timer that triggers every 5 seconds which |
762 | will look at the machine check registers to see if anything happened. | 794 | will look at the machine check registers to see if anything happened. |
763 | Non-fatal problems automatically get corrected (but still logged). | 795 | Non-fatal problems automatically get corrected (but still logged). |
@@ -770,7 +802,7 @@ config X86_MCE_NONFATAL | |||
770 | config X86_MCE_P4THERMAL | 802 | config X86_MCE_P4THERMAL |
771 | bool "check for P4 thermal throttling interrupt." | 803 | bool "check for P4 thermal throttling interrupt." |
772 | depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP) | 804 | depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP) |
773 | help | 805 | ---help--- |
774 | Enabling this feature will cause a message to be printed when the P4 | 806 | Enabling this feature will cause a message to be printed when the P4 |
775 | enters thermal throttling. | 807 | enters thermal throttling. |
776 | 808 | ||
@@ -778,11 +810,11 @@ config VM86 | |||
778 | bool "Enable VM86 support" if EMBEDDED | 810 | bool "Enable VM86 support" if EMBEDDED |
779 | default y | 811 | default y |
780 | depends on X86_32 | 812 | depends on X86_32 |
781 | help | 813 | ---help--- |
782 | This option is required by programs like DOSEMU to run 16-bit legacy | 814 | This option is required by programs like DOSEMU to run 16-bit legacy |
783 | code on X86 processors. It also may be needed by software like | 815 | code on X86 processors. It also may be needed by software like |
784 | XFree86 to initialize some video cards via BIOS. Disabling this | 816 | XFree86 to initialize some video cards via BIOS. Disabling this |
785 | option saves about 6k. | 817 | option saves about 6k. |
786 | 818 | ||
787 | config TOSHIBA | 819 | config TOSHIBA |
788 | tristate "Toshiba Laptop support" | 820 | tristate "Toshiba Laptop support" |
@@ -856,33 +888,33 @@ config MICROCODE | |||
856 | module will be called microcode. | 888 | module will be called microcode. |
857 | 889 | ||
858 | config MICROCODE_INTEL | 890 | config MICROCODE_INTEL |
859 | bool "Intel microcode patch loading support" | 891 | bool "Intel microcode patch loading support" |
860 | depends on MICROCODE | 892 | depends on MICROCODE |
861 | default MICROCODE | 893 | default MICROCODE |
862 | select FW_LOADER | 894 | select FW_LOADER |
863 | --help--- | 895 | ---help--- |
864 | This options enables microcode patch loading support for Intel | 896 | This options enables microcode patch loading support for Intel |
865 | processors. | 897 | processors. |
866 | 898 | ||
867 | For latest news and information on obtaining all the required | 899 | For latest news and information on obtaining all the required |
868 | Intel ingredients for this driver, check: | 900 | Intel ingredients for this driver, check: |
869 | <http://www.urbanmyth.org/microcode/>. | 901 | <http://www.urbanmyth.org/microcode/>. |
870 | 902 | ||
871 | config MICROCODE_AMD | 903 | config MICROCODE_AMD |
872 | bool "AMD microcode patch loading support" | 904 | bool "AMD microcode patch loading support" |
873 | depends on MICROCODE | 905 | depends on MICROCODE |
874 | select FW_LOADER | 906 | select FW_LOADER |
875 | --help--- | 907 | ---help--- |
876 | If you select this option, microcode patch loading support for AMD | 908 | If you select this option, microcode patch loading support for AMD |
877 | processors will be enabled. | 909 | processors will be enabled. |
878 | 910 | ||
879 | config MICROCODE_OLD_INTERFACE | 911 | config MICROCODE_OLD_INTERFACE |
880 | def_bool y | 912 | def_bool y |
881 | depends on MICROCODE | 913 | depends on MICROCODE |
882 | 914 | ||
883 | config X86_MSR | 915 | config X86_MSR |
884 | tristate "/dev/cpu/*/msr - Model-specific register support" | 916 | tristate "/dev/cpu/*/msr - Model-specific register support" |
885 | help | 917 | ---help--- |
886 | This device gives privileged processes access to the x86 | 918 | This device gives privileged processes access to the x86 |
887 | Model-Specific Registers (MSRs). It is a character device with | 919 | Model-Specific Registers (MSRs). It is a character device with |
888 | major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. | 920 | major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. |
@@ -891,7 +923,7 @@ config X86_MSR | |||
891 | 923 | ||
892 | config X86_CPUID | 924 | config X86_CPUID |
893 | tristate "/dev/cpu/*/cpuid - CPU information support" | 925 | tristate "/dev/cpu/*/cpuid - CPU information support" |
894 | help | 926 | ---help--- |
895 | This device gives processes access to the x86 CPUID instruction to | 927 | This device gives processes access to the x86 CPUID instruction to |
896 | be executed on a specific processor. It is a character device | 928 | be executed on a specific processor. It is a character device |
897 | with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to | 929 | with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to |
@@ -943,7 +975,7 @@ config NOHIGHMEM | |||
943 | config HIGHMEM4G | 975 | config HIGHMEM4G |
944 | bool "4GB" | 976 | bool "4GB" |
945 | depends on !X86_NUMAQ | 977 | depends on !X86_NUMAQ |
946 | help | 978 | ---help--- |
947 | Select this if you have a 32-bit processor and between 1 and 4 | 979 | Select this if you have a 32-bit processor and between 1 and 4 |
948 | gigabytes of physical RAM. | 980 | gigabytes of physical RAM. |
949 | 981 | ||
@@ -951,7 +983,7 @@ config HIGHMEM64G | |||
951 | bool "64GB" | 983 | bool "64GB" |
952 | depends on !M386 && !M486 | 984 | depends on !M386 && !M486 |
953 | select X86_PAE | 985 | select X86_PAE |
954 | help | 986 | ---help--- |
955 | Select this if you have a 32-bit processor and more than 4 | 987 | Select this if you have a 32-bit processor and more than 4 |
956 | gigabytes of physical RAM. | 988 | gigabytes of physical RAM. |
957 | 989 | ||
@@ -962,7 +994,7 @@ choice | |||
962 | prompt "Memory split" if EMBEDDED | 994 | prompt "Memory split" if EMBEDDED |
963 | default VMSPLIT_3G | 995 | default VMSPLIT_3G |
964 | depends on X86_32 | 996 | depends on X86_32 |
965 | help | 997 | ---help--- |
966 | Select the desired split between kernel and user memory. | 998 | Select the desired split between kernel and user memory. |
967 | 999 | ||
968 | If the address range available to the kernel is less than the | 1000 | If the address range available to the kernel is less than the |
@@ -1008,20 +1040,20 @@ config HIGHMEM | |||
1008 | config X86_PAE | 1040 | config X86_PAE |
1009 | bool "PAE (Physical Address Extension) Support" | 1041 | bool "PAE (Physical Address Extension) Support" |
1010 | depends on X86_32 && !HIGHMEM4G | 1042 | depends on X86_32 && !HIGHMEM4G |
1011 | help | 1043 | ---help--- |
1012 | PAE is required for NX support, and furthermore enables | 1044 | PAE is required for NX support, and furthermore enables |
1013 | larger swapspace support for non-overcommit purposes. It | 1045 | larger swapspace support for non-overcommit purposes. It |
1014 | has the cost of more pagetable lookup overhead, and also | 1046 | has the cost of more pagetable lookup overhead, and also |
1015 | consumes more pagetable space per process. | 1047 | consumes more pagetable space per process. |
1016 | 1048 | ||
1017 | config ARCH_PHYS_ADDR_T_64BIT | 1049 | config ARCH_PHYS_ADDR_T_64BIT |
1018 | def_bool X86_64 || X86_PAE | 1050 | def_bool X86_64 || X86_PAE |
1019 | 1051 | ||
1020 | config DIRECT_GBPAGES | 1052 | config DIRECT_GBPAGES |
1021 | bool "Enable 1GB pages for kernel pagetables" if EMBEDDED | 1053 | bool "Enable 1GB pages for kernel pagetables" if EMBEDDED |
1022 | default y | 1054 | default y |
1023 | depends on X86_64 | 1055 | depends on X86_64 |
1024 | help | 1056 | ---help--- |
1025 | Allow the kernel linear mapping to use 1GB pages on CPUs that | 1057 | Allow the kernel linear mapping to use 1GB pages on CPUs that |
1026 | support it. This can improve the kernel's performance a tiny bit by | 1058 | support it. This can improve the kernel's performance a tiny bit by |
1027 | reducing TLB pressure. If in doubt, say "Y". | 1059 | reducing TLB pressure. If in doubt, say "Y". |
@@ -1031,9 +1063,8 @@ config NUMA | |||
1031 | bool "Numa Memory Allocation and Scheduler Support" | 1063 | bool "Numa Memory Allocation and Scheduler Support" |
1032 | depends on SMP | 1064 | depends on SMP |
1033 | depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL) | 1065 | depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL) |
1034 | default n if X86_PC | ||
1035 | default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP) | 1066 | default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP) |
1036 | help | 1067 | ---help--- |
1037 | Enable NUMA (Non Uniform Memory Access) support. | 1068 | Enable NUMA (Non Uniform Memory Access) support. |
1038 | 1069 | ||
1039 | The kernel will try to allocate memory used by a CPU on the | 1070 | The kernel will try to allocate memory used by a CPU on the |
@@ -1056,19 +1087,19 @@ config K8_NUMA | |||
1056 | def_bool y | 1087 | def_bool y |
1057 | prompt "Old style AMD Opteron NUMA detection" | 1088 | prompt "Old style AMD Opteron NUMA detection" |
1058 | depends on X86_64 && NUMA && PCI | 1089 | depends on X86_64 && NUMA && PCI |
1059 | help | 1090 | ---help--- |
1060 | Enable K8 NUMA node topology detection. You should say Y here if | 1091 | Enable K8 NUMA node topology detection. You should say Y here if |
1061 | you have a multi processor AMD K8 system. This uses an old | 1092 | you have a multi processor AMD K8 system. This uses an old |
1062 | method to read the NUMA configuration directly from the builtin | 1093 | method to read the NUMA configuration directly from the builtin |
1063 | Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA | 1094 | Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA |
1064 | instead, which also takes priority if both are compiled in. | 1095 | instead, which also takes priority if both are compiled in. |
1065 | 1096 | ||
1066 | config X86_64_ACPI_NUMA | 1097 | config X86_64_ACPI_NUMA |
1067 | def_bool y | 1098 | def_bool y |
1068 | prompt "ACPI NUMA detection" | 1099 | prompt "ACPI NUMA detection" |
1069 | depends on X86_64 && NUMA && ACPI && PCI | 1100 | depends on X86_64 && NUMA && ACPI && PCI |
1070 | select ACPI_NUMA | 1101 | select ACPI_NUMA |
1071 | help | 1102 | ---help--- |
1072 | Enable ACPI SRAT based node topology detection. | 1103 | Enable ACPI SRAT based node topology detection. |
1073 | 1104 | ||
1074 | # Some NUMA nodes have memory ranges that span | 1105 | # Some NUMA nodes have memory ranges that span |
@@ -1083,7 +1114,7 @@ config NODES_SPAN_OTHER_NODES | |||
1083 | config NUMA_EMU | 1114 | config NUMA_EMU |
1084 | bool "NUMA emulation" | 1115 | bool "NUMA emulation" |
1085 | depends on X86_64 && NUMA | 1116 | depends on X86_64 && NUMA |
1086 | help | 1117 | ---help--- |
1087 | Enable NUMA emulation. A flat machine will be split | 1118 | Enable NUMA emulation. A flat machine will be split |
1088 | into virtual nodes when booted with "numa=fake=N", where N is the | 1119 | into virtual nodes when booted with "numa=fake=N", where N is the |
1089 | number of nodes. This is only useful for debugging. | 1120 | number of nodes. This is only useful for debugging. |
@@ -1096,11 +1127,11 @@ config NODES_SHIFT | |||
1096 | default "4" if X86_NUMAQ | 1127 | default "4" if X86_NUMAQ |
1097 | default "3" | 1128 | default "3" |
1098 | depends on NEED_MULTIPLE_NODES | 1129 | depends on NEED_MULTIPLE_NODES |
1099 | help | 1130 | ---help--- |
1100 | Specify the maximum number of NUMA Nodes available on the target | 1131 | Specify the maximum number of NUMA Nodes available on the target |
1101 | system. Increases memory reserved to accomodate various tables. | 1132 | system. Increases memory reserved to accomodate various tables. |
1102 | 1133 | ||
1103 | config HAVE_ARCH_BOOTMEM_NODE | 1134 | config HAVE_ARCH_BOOTMEM |
1104 | def_bool y | 1135 | def_bool y |
1105 | depends on X86_32 && NUMA | 1136 | depends on X86_32 && NUMA |
1106 | 1137 | ||
@@ -1134,7 +1165,7 @@ config ARCH_SPARSEMEM_DEFAULT | |||
1134 | 1165 | ||
1135 | config ARCH_SPARSEMEM_ENABLE | 1166 | config ARCH_SPARSEMEM_ENABLE |
1136 | def_bool y | 1167 | def_bool y |
1137 | depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_GENERICARCH | 1168 | depends on X86_64 || NUMA || (EXPERIMENTAL && X86_32) || X86_32_NON_STANDARD |
1138 | select SPARSEMEM_STATIC if X86_32 | 1169 | select SPARSEMEM_STATIC if X86_32 |
1139 | select SPARSEMEM_VMEMMAP_ENABLE if X86_64 | 1170 | select SPARSEMEM_VMEMMAP_ENABLE if X86_64 |
1140 | 1171 | ||
@@ -1151,61 +1182,61 @@ source "mm/Kconfig" | |||
1151 | config HIGHPTE | 1182 | config HIGHPTE |
1152 | bool "Allocate 3rd-level pagetables from highmem" | 1183 | bool "Allocate 3rd-level pagetables from highmem" |
1153 | depends on X86_32 && (HIGHMEM4G || HIGHMEM64G) | 1184 | depends on X86_32 && (HIGHMEM4G || HIGHMEM64G) |
1154 | help | 1185 | ---help--- |
1155 | The VM uses one page table entry for each page of physical memory. | 1186 | The VM uses one page table entry for each page of physical memory. |
1156 | For systems with a lot of RAM, this can be wasteful of precious | 1187 | For systems with a lot of RAM, this can be wasteful of precious |
1157 | low memory. Setting this option will put user-space page table | 1188 | low memory. Setting this option will put user-space page table |
1158 | entries in high memory. | 1189 | entries in high memory. |
1159 | 1190 | ||
1160 | config X86_CHECK_BIOS_CORRUPTION | 1191 | config X86_CHECK_BIOS_CORRUPTION |
1161 | bool "Check for low memory corruption" | 1192 | bool "Check for low memory corruption" |
1162 | help | 1193 | ---help--- |
1163 | Periodically check for memory corruption in low memory, which | 1194 | Periodically check for memory corruption in low memory, which |
1164 | is suspected to be caused by BIOS. Even when enabled in the | 1195 | is suspected to be caused by BIOS. Even when enabled in the |
1165 | configuration, it is disabled at runtime. Enable it by | 1196 | configuration, it is disabled at runtime. Enable it by |
1166 | setting "memory_corruption_check=1" on the kernel command | 1197 | setting "memory_corruption_check=1" on the kernel command |
1167 | line. By default it scans the low 64k of memory every 60 | 1198 | line. By default it scans the low 64k of memory every 60 |
1168 | seconds; see the memory_corruption_check_size and | 1199 | seconds; see the memory_corruption_check_size and |
1169 | memory_corruption_check_period parameters in | 1200 | memory_corruption_check_period parameters in |
1170 | Documentation/kernel-parameters.txt to adjust this. | 1201 | Documentation/kernel-parameters.txt to adjust this. |
1171 | 1202 | ||
1172 | When enabled with the default parameters, this option has | 1203 | When enabled with the default parameters, this option has |
1173 | almost no overhead, as it reserves a relatively small amount | 1204 | almost no overhead, as it reserves a relatively small amount |
1174 | of memory and scans it infrequently. It both detects corruption | 1205 | of memory and scans it infrequently. It both detects corruption |
1175 | and prevents it from affecting the running system. | 1206 | and prevents it from affecting the running system. |
1176 | 1207 | ||
1177 | It is, however, intended as a diagnostic tool; if repeatable | 1208 | It is, however, intended as a diagnostic tool; if repeatable |
1178 | BIOS-originated corruption always affects the same memory, | 1209 | BIOS-originated corruption always affects the same memory, |
1179 | you can use memmap= to prevent the kernel from using that | 1210 | you can use memmap= to prevent the kernel from using that |
1180 | memory. | 1211 | memory. |
1181 | 1212 | ||
1182 | config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK | 1213 | config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK |
1183 | bool "Set the default setting of memory_corruption_check" | 1214 | bool "Set the default setting of memory_corruption_check" |
1184 | depends on X86_CHECK_BIOS_CORRUPTION | 1215 | depends on X86_CHECK_BIOS_CORRUPTION |
1185 | default y | 1216 | default y |
1186 | help | 1217 | ---help--- |
1187 | Set whether the default state of memory_corruption_check is | 1218 | Set whether the default state of memory_corruption_check is |
1188 | on or off. | 1219 | on or off. |
1189 | 1220 | ||
1190 | config X86_RESERVE_LOW_64K | 1221 | config X86_RESERVE_LOW_64K |
1191 | bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen" | 1222 | bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen" |
1192 | default y | 1223 | default y |
1193 | help | 1224 | ---help--- |
1194 | Reserve the first 64K of physical RAM on BIOSes that are known | 1225 | Reserve the first 64K of physical RAM on BIOSes that are known |
1195 | to potentially corrupt that memory range. A numbers of BIOSes are | 1226 | to potentially corrupt that memory range. A numbers of BIOSes are |
1196 | known to utilize this area during suspend/resume, so it must not | 1227 | known to utilize this area during suspend/resume, so it must not |
1197 | be used by the kernel. | 1228 | be used by the kernel. |
1198 | 1229 | ||
1199 | Set this to N if you are absolutely sure that you trust the BIOS | 1230 | Set this to N if you are absolutely sure that you trust the BIOS |
1200 | to get all its memory reservations and usages right. | 1231 | to get all its memory reservations and usages right. |
1201 | 1232 | ||
1202 | If you have doubts about the BIOS (e.g. suspend/resume does not | 1233 | If you have doubts about the BIOS (e.g. suspend/resume does not |
1203 | work or there's kernel crashes after certain hardware hotplug | 1234 | work or there's kernel crashes after certain hardware hotplug |
1204 | events) and it's not AMI or Phoenix, then you might want to enable | 1235 | events) and it's not AMI or Phoenix, then you might want to enable |
1205 | X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical | 1236 | X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical |
1206 | corruption patterns. | 1237 | corruption patterns. |
1207 | 1238 | ||
1208 | Say Y if unsure. | 1239 | Say Y if unsure. |
1209 | 1240 | ||
1210 | config MATH_EMULATION | 1241 | config MATH_EMULATION |
1211 | bool | 1242 | bool |
@@ -1271,7 +1302,7 @@ config MTRR_SANITIZER | |||
1271 | def_bool y | 1302 | def_bool y |
1272 | prompt "MTRR cleanup support" | 1303 | prompt "MTRR cleanup support" |
1273 | depends on MTRR | 1304 | depends on MTRR |
1274 | help | 1305 | ---help--- |
1275 | Convert MTRR layout from continuous to discrete, so X drivers can | 1306 | Convert MTRR layout from continuous to discrete, so X drivers can |
1276 | add writeback entries. | 1307 | add writeback entries. |
1277 | 1308 | ||
@@ -1286,7 +1317,7 @@ config MTRR_SANITIZER_ENABLE_DEFAULT | |||
1286 | range 0 1 | 1317 | range 0 1 |
1287 | default "0" | 1318 | default "0" |
1288 | depends on MTRR_SANITIZER | 1319 | depends on MTRR_SANITIZER |
1289 | help | 1320 | ---help--- |
1290 | Enable mtrr cleanup default value | 1321 | Enable mtrr cleanup default value |
1291 | 1322 | ||
1292 | config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT | 1323 | config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT |
@@ -1294,7 +1325,7 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT | |||
1294 | range 0 7 | 1325 | range 0 7 |
1295 | default "1" | 1326 | default "1" |
1296 | depends on MTRR_SANITIZER | 1327 | depends on MTRR_SANITIZER |
1297 | help | 1328 | ---help--- |
1298 | mtrr cleanup spare entries default, it can be changed via | 1329 | mtrr cleanup spare entries default, it can be changed via |
1299 | mtrr_spare_reg_nr=N on the kernel command line. | 1330 | mtrr_spare_reg_nr=N on the kernel command line. |
1300 | 1331 | ||
@@ -1302,7 +1333,7 @@ config X86_PAT | |||
1302 | bool | 1333 | bool |
1303 | prompt "x86 PAT support" | 1334 | prompt "x86 PAT support" |
1304 | depends on MTRR | 1335 | depends on MTRR |
1305 | help | 1336 | ---help--- |
1306 | Use PAT attributes to setup page level cache control. | 1337 | Use PAT attributes to setup page level cache control. |
1307 | 1338 | ||
1308 | PATs are the modern equivalents of MTRRs and are much more | 1339 | PATs are the modern equivalents of MTRRs and are much more |
@@ -1317,20 +1348,20 @@ config EFI | |||
1317 | bool "EFI runtime service support" | 1348 | bool "EFI runtime service support" |
1318 | depends on ACPI | 1349 | depends on ACPI |
1319 | ---help--- | 1350 | ---help--- |
1320 | This enables the kernel to use EFI runtime services that are | 1351 | This enables the kernel to use EFI runtime services that are |
1321 | available (such as the EFI variable services). | 1352 | available (such as the EFI variable services). |
1322 | 1353 | ||
1323 | This option is only useful on systems that have EFI firmware. | 1354 | This option is only useful on systems that have EFI firmware. |
1324 | In addition, you should use the latest ELILO loader available | 1355 | In addition, you should use the latest ELILO loader available |
1325 | at <http://elilo.sourceforge.net> in order to take advantage | 1356 | at <http://elilo.sourceforge.net> in order to take advantage |
1326 | of EFI runtime services. However, even with this option, the | 1357 | of EFI runtime services. However, even with this option, the |
1327 | resultant kernel should continue to boot on existing non-EFI | 1358 | resultant kernel should continue to boot on existing non-EFI |
1328 | platforms. | 1359 | platforms. |
1329 | 1360 | ||
1330 | config SECCOMP | 1361 | config SECCOMP |
1331 | def_bool y | 1362 | def_bool y |
1332 | prompt "Enable seccomp to safely compute untrusted bytecode" | 1363 | prompt "Enable seccomp to safely compute untrusted bytecode" |
1333 | help | 1364 | ---help--- |
1334 | This kernel feature is useful for number crunching applications | 1365 | This kernel feature is useful for number crunching applications |
1335 | that may need to compute untrusted bytecode during their | 1366 | that may need to compute untrusted bytecode during their |
1336 | execution. By using pipes or other transports made available to | 1367 | execution. By using pipes or other transports made available to |
@@ -1343,13 +1374,16 @@ config SECCOMP | |||
1343 | 1374 | ||
1344 | If unsure, say Y. Only embedded should say N here. | 1375 | If unsure, say Y. Only embedded should say N here. |
1345 | 1376 | ||
1377 | config CC_STACKPROTECTOR_ALL | ||
1378 | bool | ||
1379 | |||
1346 | config CC_STACKPROTECTOR | 1380 | config CC_STACKPROTECTOR |
1347 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | 1381 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" |
1348 | depends on X86_64 && EXPERIMENTAL && BROKEN | 1382 | select CC_STACKPROTECTOR_ALL |
1349 | help | 1383 | ---help--- |
1350 | This option turns on the -fstack-protector GCC feature. This | 1384 | This option turns on the -fstack-protector GCC feature. This |
1351 | feature puts, at the beginning of critical functions, a canary | 1385 | feature puts, at the beginning of functions, a canary value on |
1352 | value on the stack just before the return address, and validates | 1386 | the stack just before the return address, and validates |
1353 | the value just before actually returning. Stack based buffer | 1387 | the value just before actually returning. Stack based buffer |
1354 | overflows (that need to overwrite this return address) now also | 1388 | overflows (that need to overwrite this return address) now also |
1355 | overwrite the canary, which gets detected and the attack is then | 1389 | overwrite the canary, which gets detected and the attack is then |
@@ -1357,22 +1391,14 @@ config CC_STACKPROTECTOR | |||
1357 | 1391 | ||
1358 | This feature requires gcc version 4.2 or above, or a distribution | 1392 | This feature requires gcc version 4.2 or above, or a distribution |
1359 | gcc with the feature backported. Older versions are automatically | 1393 | gcc with the feature backported. Older versions are automatically |
1360 | detected and for those versions, this configuration option is ignored. | 1394 | detected and for those versions, this configuration option is |
1361 | 1395 | ignored. (and a warning is printed during bootup) | |
1362 | config CC_STACKPROTECTOR_ALL | ||
1363 | bool "Use stack-protector for all functions" | ||
1364 | depends on CC_STACKPROTECTOR | ||
1365 | help | ||
1366 | Normally, GCC only inserts the canary value protection for | ||
1367 | functions that use large-ish on-stack buffers. By enabling | ||
1368 | this option, GCC will be asked to do this for ALL functions. | ||
1369 | 1396 | ||
1370 | source kernel/Kconfig.hz | 1397 | source kernel/Kconfig.hz |
1371 | 1398 | ||
1372 | config KEXEC | 1399 | config KEXEC |
1373 | bool "kexec system call" | 1400 | bool "kexec system call" |
1374 | depends on X86_BIOS_REBOOT | 1401 | ---help--- |
1375 | help | ||
1376 | kexec is a system call that implements the ability to shutdown your | 1402 | kexec is a system call that implements the ability to shutdown your |
1377 | current kernel, and to start another kernel. It is like a reboot | 1403 | current kernel, and to start another kernel. It is like a reboot |
1378 | but it is independent of the system firmware. And like a reboot | 1404 | but it is independent of the system firmware. And like a reboot |
@@ -1389,7 +1415,7 @@ config KEXEC | |||
1389 | config CRASH_DUMP | 1415 | config CRASH_DUMP |
1390 | bool "kernel crash dumps" | 1416 | bool "kernel crash dumps" |
1391 | depends on X86_64 || (X86_32 && HIGHMEM) | 1417 | depends on X86_64 || (X86_32 && HIGHMEM) |
1392 | help | 1418 | ---help--- |
1393 | Generate crash dump after being started by kexec. | 1419 | Generate crash dump after being started by kexec. |
1394 | This should be normally only set in special crash dump kernels | 1420 | This should be normally only set in special crash dump kernels |
1395 | which are loaded in the main kernel with kexec-tools into | 1421 | which are loaded in the main kernel with kexec-tools into |
@@ -1404,7 +1430,7 @@ config KEXEC_JUMP | |||
1404 | bool "kexec jump (EXPERIMENTAL)" | 1430 | bool "kexec jump (EXPERIMENTAL)" |
1405 | depends on EXPERIMENTAL | 1431 | depends on EXPERIMENTAL |
1406 | depends on KEXEC && HIBERNATION && X86_32 | 1432 | depends on KEXEC && HIBERNATION && X86_32 |
1407 | help | 1433 | ---help--- |
1408 | Jump between original kernel and kexeced kernel and invoke | 1434 | Jump between original kernel and kexeced kernel and invoke |
1409 | code in physical address mode via KEXEC | 1435 | code in physical address mode via KEXEC |
1410 | 1436 | ||
@@ -1413,7 +1439,7 @@ config PHYSICAL_START | |||
1413 | default "0x1000000" if X86_NUMAQ | 1439 | default "0x1000000" if X86_NUMAQ |
1414 | default "0x200000" if X86_64 | 1440 | default "0x200000" if X86_64 |
1415 | default "0x100000" | 1441 | default "0x100000" |
1416 | help | 1442 | ---help--- |
1417 | This gives the physical address where the kernel is loaded. | 1443 | This gives the physical address where the kernel is loaded. |
1418 | 1444 | ||
1419 | If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then | 1445 | If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then |
@@ -1454,7 +1480,7 @@ config PHYSICAL_START | |||
1454 | config RELOCATABLE | 1480 | config RELOCATABLE |
1455 | bool "Build a relocatable kernel (EXPERIMENTAL)" | 1481 | bool "Build a relocatable kernel (EXPERIMENTAL)" |
1456 | depends on EXPERIMENTAL | 1482 | depends on EXPERIMENTAL |
1457 | help | 1483 | ---help--- |
1458 | This builds a kernel image that retains relocation information | 1484 | This builds a kernel image that retains relocation information |
1459 | so it can be loaded someplace besides the default 1MB. | 1485 | so it can be loaded someplace besides the default 1MB. |
1460 | The relocations tend to make the kernel binary about 10% larger, | 1486 | The relocations tend to make the kernel binary about 10% larger, |
@@ -1474,7 +1500,7 @@ config PHYSICAL_ALIGN | |||
1474 | default "0x100000" if X86_32 | 1500 | default "0x100000" if X86_32 |
1475 | default "0x200000" if X86_64 | 1501 | default "0x200000" if X86_64 |
1476 | range 0x2000 0x400000 | 1502 | range 0x2000 0x400000 |
1477 | help | 1503 | ---help--- |
1478 | This value puts the alignment restrictions on physical address | 1504 | This value puts the alignment restrictions on physical address |
1479 | where kernel is loaded and run from. Kernel is compiled for an | 1505 | where kernel is loaded and run from. Kernel is compiled for an |
1480 | address which meets above alignment restriction. | 1506 | address which meets above alignment restriction. |
@@ -1495,7 +1521,7 @@ config PHYSICAL_ALIGN | |||
1495 | 1521 | ||
1496 | config HOTPLUG_CPU | 1522 | config HOTPLUG_CPU |
1497 | bool "Support for hot-pluggable CPUs" | 1523 | bool "Support for hot-pluggable CPUs" |
1498 | depends on SMP && HOTPLUG && !X86_VOYAGER | 1524 | depends on SMP && HOTPLUG |
1499 | ---help--- | 1525 | ---help--- |
1500 | Say Y here to allow turning CPUs off and on. CPUs can be | 1526 | Say Y here to allow turning CPUs off and on. CPUs can be |
1501 | controlled through /sys/devices/system/cpu. | 1527 | controlled through /sys/devices/system/cpu. |
@@ -1507,7 +1533,7 @@ config COMPAT_VDSO | |||
1507 | def_bool y | 1533 | def_bool y |
1508 | prompt "Compat VDSO support" | 1534 | prompt "Compat VDSO support" |
1509 | depends on X86_32 || IA32_EMULATION | 1535 | depends on X86_32 || IA32_EMULATION |
1510 | help | 1536 | ---help--- |
1511 | Map the 32-bit VDSO to the predictable old-style address too. | 1537 | Map the 32-bit VDSO to the predictable old-style address too. |
1512 | ---help--- | 1538 | ---help--- |
1513 | Say N here if you are running a sufficiently recent glibc | 1539 | Say N here if you are running a sufficiently recent glibc |
@@ -1519,7 +1545,7 @@ config COMPAT_VDSO | |||
1519 | config CMDLINE_BOOL | 1545 | config CMDLINE_BOOL |
1520 | bool "Built-in kernel command line" | 1546 | bool "Built-in kernel command line" |
1521 | default n | 1547 | default n |
1522 | help | 1548 | ---help--- |
1523 | Allow for specifying boot arguments to the kernel at | 1549 | Allow for specifying boot arguments to the kernel at |
1524 | build time. On some systems (e.g. embedded ones), it is | 1550 | build time. On some systems (e.g. embedded ones), it is |
1525 | necessary or convenient to provide some or all of the | 1551 | necessary or convenient to provide some or all of the |
@@ -1537,7 +1563,7 @@ config CMDLINE | |||
1537 | string "Built-in kernel command string" | 1563 | string "Built-in kernel command string" |
1538 | depends on CMDLINE_BOOL | 1564 | depends on CMDLINE_BOOL |
1539 | default "" | 1565 | default "" |
1540 | help | 1566 | ---help--- |
1541 | Enter arguments here that should be compiled into the kernel | 1567 | Enter arguments here that should be compiled into the kernel |
1542 | image and used at boot time. If the boot loader provides a | 1568 | image and used at boot time. If the boot loader provides a |
1543 | command line at boot time, it is appended to this string to | 1569 | command line at boot time, it is appended to this string to |
@@ -1554,7 +1580,7 @@ config CMDLINE_OVERRIDE | |||
1554 | bool "Built-in command line overrides boot loader arguments" | 1580 | bool "Built-in command line overrides boot loader arguments" |
1555 | default n | 1581 | default n |
1556 | depends on CMDLINE_BOOL | 1582 | depends on CMDLINE_BOOL |
1557 | help | 1583 | ---help--- |
1558 | Set this option to 'Y' to have the kernel ignore the boot loader | 1584 | Set this option to 'Y' to have the kernel ignore the boot loader |
1559 | command line, and use ONLY the built-in command line. | 1585 | command line, and use ONLY the built-in command line. |
1560 | 1586 | ||
@@ -1576,7 +1602,6 @@ config HAVE_ARCH_EARLY_PFN_TO_NID | |||
1576 | depends on NUMA | 1602 | depends on NUMA |
1577 | 1603 | ||
1578 | menu "Power management and ACPI options" | 1604 | menu "Power management and ACPI options" |
1579 | depends on !X86_VOYAGER | ||
1580 | 1605 | ||
1581 | config ARCH_HIBERNATION_HEADER | 1606 | config ARCH_HIBERNATION_HEADER |
1582 | def_bool y | 1607 | def_bool y |
@@ -1654,7 +1679,7 @@ if APM | |||
1654 | 1679 | ||
1655 | config APM_IGNORE_USER_SUSPEND | 1680 | config APM_IGNORE_USER_SUSPEND |
1656 | bool "Ignore USER SUSPEND" | 1681 | bool "Ignore USER SUSPEND" |
1657 | help | 1682 | ---help--- |
1658 | This option will ignore USER SUSPEND requests. On machines with a | 1683 | This option will ignore USER SUSPEND requests. On machines with a |
1659 | compliant APM BIOS, you want to say N. However, on the NEC Versa M | 1684 | compliant APM BIOS, you want to say N. However, on the NEC Versa M |
1660 | series notebooks, it is necessary to say Y because of a BIOS bug. | 1685 | series notebooks, it is necessary to say Y because of a BIOS bug. |
@@ -1678,7 +1703,7 @@ config APM_DO_ENABLE | |||
1678 | 1703 | ||
1679 | config APM_CPU_IDLE | 1704 | config APM_CPU_IDLE |
1680 | bool "Make CPU Idle calls when idle" | 1705 | bool "Make CPU Idle calls when idle" |
1681 | help | 1706 | ---help--- |
1682 | Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. | 1707 | Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. |
1683 | On some machines, this can activate improved power savings, such as | 1708 | On some machines, this can activate improved power savings, such as |
1684 | a slowed CPU clock rate, when the machine is idle. These idle calls | 1709 | a slowed CPU clock rate, when the machine is idle. These idle calls |
@@ -1689,7 +1714,7 @@ config APM_CPU_IDLE | |||
1689 | 1714 | ||
1690 | config APM_DISPLAY_BLANK | 1715 | config APM_DISPLAY_BLANK |
1691 | bool "Enable console blanking using APM" | 1716 | bool "Enable console blanking using APM" |
1692 | help | 1717 | ---help--- |
1693 | Enable console blanking using the APM. Some laptops can use this to | 1718 | Enable console blanking using the APM. Some laptops can use this to |
1694 | turn off the LCD backlight when the screen blanker of the Linux | 1719 | turn off the LCD backlight when the screen blanker of the Linux |
1695 | virtual console blanks the screen. Note that this is only used by | 1720 | virtual console blanks the screen. Note that this is only used by |
@@ -1702,7 +1727,7 @@ config APM_DISPLAY_BLANK | |||
1702 | 1727 | ||
1703 | config APM_ALLOW_INTS | 1728 | config APM_ALLOW_INTS |
1704 | bool "Allow interrupts during APM BIOS calls" | 1729 | bool "Allow interrupts during APM BIOS calls" |
1705 | help | 1730 | ---help--- |
1706 | Normally we disable external interrupts while we are making calls to | 1731 | Normally we disable external interrupts while we are making calls to |
1707 | the APM BIOS as a measure to lessen the effects of a badly behaving | 1732 | the APM BIOS as a measure to lessen the effects of a badly behaving |
1708 | BIOS implementation. The BIOS should reenable interrupts if it | 1733 | BIOS implementation. The BIOS should reenable interrupts if it |
@@ -1727,7 +1752,7 @@ config PCI | |||
1727 | bool "PCI support" | 1752 | bool "PCI support" |
1728 | default y | 1753 | default y |
1729 | select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC) | 1754 | select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC) |
1730 | help | 1755 | ---help--- |
1731 | Find out whether you have a PCI motherboard. PCI is the name of a | 1756 | Find out whether you have a PCI motherboard. PCI is the name of a |
1732 | bus system, i.e. the way the CPU talks to the other stuff inside | 1757 | bus system, i.e. the way the CPU talks to the other stuff inside |
1733 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | 1758 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or |
@@ -1798,7 +1823,7 @@ config PCI_MMCONFIG | |||
1798 | config DMAR | 1823 | config DMAR |
1799 | bool "Support for DMA Remapping Devices (EXPERIMENTAL)" | 1824 | bool "Support for DMA Remapping Devices (EXPERIMENTAL)" |
1800 | depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL | 1825 | depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL |
1801 | help | 1826 | ---help--- |
1802 | DMA remapping (DMAR) devices support enables independent address | 1827 | DMA remapping (DMAR) devices support enables independent address |
1803 | translations for Direct Memory Access (DMA) from devices. | 1828 | translations for Direct Memory Access (DMA) from devices. |
1804 | These DMA remapping devices are reported via ACPI tables | 1829 | These DMA remapping devices are reported via ACPI tables |
@@ -1820,29 +1845,30 @@ config DMAR_GFX_WA | |||
1820 | def_bool y | 1845 | def_bool y |
1821 | prompt "Support for Graphics workaround" | 1846 | prompt "Support for Graphics workaround" |
1822 | depends on DMAR | 1847 | depends on DMAR |
1823 | help | 1848 | ---help--- |
1824 | Current Graphics drivers tend to use physical address | 1849 | Current Graphics drivers tend to use physical address |
1825 | for DMA and avoid using DMA APIs. Setting this config | 1850 | for DMA and avoid using DMA APIs. Setting this config |
1826 | option permits the IOMMU driver to set a unity map for | 1851 | option permits the IOMMU driver to set a unity map for |
1827 | all the OS-visible memory. Hence the driver can continue | 1852 | all the OS-visible memory. Hence the driver can continue |
1828 | to use physical addresses for DMA. | 1853 | to use physical addresses for DMA. |
1829 | 1854 | ||
1830 | config DMAR_FLOPPY_WA | 1855 | config DMAR_FLOPPY_WA |
1831 | def_bool y | 1856 | def_bool y |
1832 | depends on DMAR | 1857 | depends on DMAR |
1833 | help | 1858 | ---help--- |
1834 | Floppy disk drivers are know to bypass DMA API calls | 1859 | Floppy disk drivers are know to bypass DMA API calls |
1835 | thereby failing to work when IOMMU is enabled. This | 1860 | thereby failing to work when IOMMU is enabled. This |
1836 | workaround will setup a 1:1 mapping for the first | 1861 | workaround will setup a 1:1 mapping for the first |
1837 | 16M to make floppy (an ISA device) work. | 1862 | 16M to make floppy (an ISA device) work. |
1838 | 1863 | ||
1839 | config INTR_REMAP | 1864 | config INTR_REMAP |
1840 | bool "Support for Interrupt Remapping (EXPERIMENTAL)" | 1865 | bool "Support for Interrupt Remapping (EXPERIMENTAL)" |
1841 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL | 1866 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL |
1842 | help | 1867 | select X86_X2APIC |
1843 | Supports Interrupt remapping for IO-APIC and MSI devices. | 1868 | ---help--- |
1844 | To use x2apic mode in the CPU's which support x2APIC enhancements or | 1869 | Supports Interrupt remapping for IO-APIC and MSI devices. |
1845 | to support platforms with CPU's having > 8 bit APIC ID, say Y. | 1870 | To use x2apic mode in the CPU's which support x2APIC enhancements or |
1871 | to support platforms with CPU's having > 8 bit APIC ID, say Y. | ||
1846 | 1872 | ||
1847 | source "drivers/pci/pcie/Kconfig" | 1873 | source "drivers/pci/pcie/Kconfig" |
1848 | 1874 | ||
@@ -1856,8 +1882,7 @@ if X86_32 | |||
1856 | 1882 | ||
1857 | config ISA | 1883 | config ISA |
1858 | bool "ISA support" | 1884 | bool "ISA support" |
1859 | depends on !X86_VOYAGER | 1885 | ---help--- |
1860 | help | ||
1861 | Find out whether you have ISA slots on your motherboard. ISA is the | 1886 | Find out whether you have ISA slots on your motherboard. ISA is the |
1862 | name of a bus system, i.e. the way the CPU talks to the other stuff | 1887 | name of a bus system, i.e. the way the CPU talks to the other stuff |
1863 | inside your box. Other bus systems are PCI, EISA, MicroChannel | 1888 | inside your box. Other bus systems are PCI, EISA, MicroChannel |
@@ -1883,9 +1908,8 @@ config EISA | |||
1883 | source "drivers/eisa/Kconfig" | 1908 | source "drivers/eisa/Kconfig" |
1884 | 1909 | ||
1885 | config MCA | 1910 | config MCA |
1886 | bool "MCA support" if !X86_VOYAGER | 1911 | bool "MCA support" |
1887 | default y if X86_VOYAGER | 1912 | ---help--- |
1888 | help | ||
1889 | MicroChannel Architecture is found in some IBM PS/2 machines and | 1913 | MicroChannel Architecture is found in some IBM PS/2 machines and |
1890 | laptops. It is a bus system similar to PCI or ISA. See | 1914 | laptops. It is a bus system similar to PCI or ISA. See |
1891 | <file:Documentation/mca.txt> (and especially the web page given | 1915 | <file:Documentation/mca.txt> (and especially the web page given |
@@ -1895,8 +1919,7 @@ source "drivers/mca/Kconfig" | |||
1895 | 1919 | ||
1896 | config SCx200 | 1920 | config SCx200 |
1897 | tristate "NatSemi SCx200 support" | 1921 | tristate "NatSemi SCx200 support" |
1898 | depends on !X86_VOYAGER | 1922 | ---help--- |
1899 | help | ||
1900 | This provides basic support for National Semiconductor's | 1923 | This provides basic support for National Semiconductor's |
1901 | (now AMD's) Geode processors. The driver probes for the | 1924 | (now AMD's) Geode processors. The driver probes for the |
1902 | PCI-IDs of several on-chip devices, so its a good dependency | 1925 | PCI-IDs of several on-chip devices, so its a good dependency |
@@ -1908,7 +1931,7 @@ config SCx200HR_TIMER | |||
1908 | tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" | 1931 | tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" |
1909 | depends on SCx200 && GENERIC_TIME | 1932 | depends on SCx200 && GENERIC_TIME |
1910 | default y | 1933 | default y |
1911 | help | 1934 | ---help--- |
1912 | This driver provides a clocksource built upon the on-chip | 1935 | This driver provides a clocksource built upon the on-chip |
1913 | 27MHz high-resolution timer. Its also a workaround for | 1936 | 27MHz high-resolution timer. Its also a workaround for |
1914 | NSC Geode SC-1100's buggy TSC, which loses time when the | 1937 | NSC Geode SC-1100's buggy TSC, which loses time when the |
@@ -1919,7 +1942,7 @@ config GEODE_MFGPT_TIMER | |||
1919 | def_bool y | 1942 | def_bool y |
1920 | prompt "Geode Multi-Function General Purpose Timer (MFGPT) events" | 1943 | prompt "Geode Multi-Function General Purpose Timer (MFGPT) events" |
1921 | depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS | 1944 | depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS |
1922 | help | 1945 | ---help--- |
1923 | This driver provides a clock event source based on the MFGPT | 1946 | This driver provides a clock event source based on the MFGPT |
1924 | timer(s) in the CS5535 and CS5536 companion chip for the geode. | 1947 | timer(s) in the CS5535 and CS5536 companion chip for the geode. |
1925 | MFGPTs have a better resolution and max interval than the | 1948 | MFGPTs have a better resolution and max interval than the |
@@ -1928,7 +1951,7 @@ config GEODE_MFGPT_TIMER | |||
1928 | config OLPC | 1951 | config OLPC |
1929 | bool "One Laptop Per Child support" | 1952 | bool "One Laptop Per Child support" |
1930 | default n | 1953 | default n |
1931 | help | 1954 | ---help--- |
1932 | Add support for detecting the unique features of the OLPC | 1955 | Add support for detecting the unique features of the OLPC |
1933 | XO hardware. | 1956 | XO hardware. |
1934 | 1957 | ||
@@ -1953,16 +1976,16 @@ config IA32_EMULATION | |||
1953 | bool "IA32 Emulation" | 1976 | bool "IA32 Emulation" |
1954 | depends on X86_64 | 1977 | depends on X86_64 |
1955 | select COMPAT_BINFMT_ELF | 1978 | select COMPAT_BINFMT_ELF |
1956 | help | 1979 | ---help--- |
1957 | Include code to run 32-bit programs under a 64-bit kernel. You should | 1980 | Include code to run 32-bit programs under a 64-bit kernel. You should |
1958 | likely turn this on, unless you're 100% sure that you don't have any | 1981 | likely turn this on, unless you're 100% sure that you don't have any |
1959 | 32-bit programs left. | 1982 | 32-bit programs left. |
1960 | 1983 | ||
1961 | config IA32_AOUT | 1984 | config IA32_AOUT |
1962 | tristate "IA32 a.out support" | 1985 | tristate "IA32 a.out support" |
1963 | depends on IA32_EMULATION | 1986 | depends on IA32_EMULATION |
1964 | help | 1987 | ---help--- |
1965 | Support old a.out binaries in the 32bit emulation. | 1988 | Support old a.out binaries in the 32bit emulation. |
1966 | 1989 | ||
1967 | config COMPAT | 1990 | config COMPAT |
1968 | def_bool y | 1991 | def_bool y |
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index c98d52e82966..a95eaf0e582a 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu | |||
@@ -50,7 +50,7 @@ config M386 | |||
50 | config M486 | 50 | config M486 |
51 | bool "486" | 51 | bool "486" |
52 | depends on X86_32 | 52 | depends on X86_32 |
53 | help | 53 | ---help--- |
54 | Select this for a 486 series processor, either Intel or one of the | 54 | Select this for a 486 series processor, either Intel or one of the |
55 | compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX, | 55 | compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX, |
56 | DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or | 56 | DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or |
@@ -59,7 +59,7 @@ config M486 | |||
59 | config M586 | 59 | config M586 |
60 | bool "586/K5/5x86/6x86/6x86MX" | 60 | bool "586/K5/5x86/6x86/6x86MX" |
61 | depends on X86_32 | 61 | depends on X86_32 |
62 | help | 62 | ---help--- |
63 | Select this for an 586 or 686 series processor such as the AMD K5, | 63 | Select this for an 586 or 686 series processor such as the AMD K5, |
64 | the Cyrix 5x86, 6x86 and 6x86MX. This choice does not | 64 | the Cyrix 5x86, 6x86 and 6x86MX. This choice does not |
65 | assume the RDTSC (Read Time Stamp Counter) instruction. | 65 | assume the RDTSC (Read Time Stamp Counter) instruction. |
@@ -67,21 +67,21 @@ config M586 | |||
67 | config M586TSC | 67 | config M586TSC |
68 | bool "Pentium-Classic" | 68 | bool "Pentium-Classic" |
69 | depends on X86_32 | 69 | depends on X86_32 |
70 | help | 70 | ---help--- |
71 | Select this for a Pentium Classic processor with the RDTSC (Read | 71 | Select this for a Pentium Classic processor with the RDTSC (Read |
72 | Time Stamp Counter) instruction for benchmarking. | 72 | Time Stamp Counter) instruction for benchmarking. |
73 | 73 | ||
74 | config M586MMX | 74 | config M586MMX |
75 | bool "Pentium-MMX" | 75 | bool "Pentium-MMX" |
76 | depends on X86_32 | 76 | depends on X86_32 |
77 | help | 77 | ---help--- |
78 | Select this for a Pentium with the MMX graphics/multimedia | 78 | Select this for a Pentium with the MMX graphics/multimedia |
79 | extended instructions. | 79 | extended instructions. |
80 | 80 | ||
81 | config M686 | 81 | config M686 |
82 | bool "Pentium-Pro" | 82 | bool "Pentium-Pro" |
83 | depends on X86_32 | 83 | depends on X86_32 |
84 | help | 84 | ---help--- |
85 | Select this for Intel Pentium Pro chips. This enables the use of | 85 | Select this for Intel Pentium Pro chips. This enables the use of |
86 | Pentium Pro extended instructions, and disables the init-time guard | 86 | Pentium Pro extended instructions, and disables the init-time guard |
87 | against the f00f bug found in earlier Pentiums. | 87 | against the f00f bug found in earlier Pentiums. |
@@ -89,7 +89,7 @@ config M686 | |||
89 | config MPENTIUMII | 89 | config MPENTIUMII |
90 | bool "Pentium-II/Celeron(pre-Coppermine)" | 90 | bool "Pentium-II/Celeron(pre-Coppermine)" |
91 | depends on X86_32 | 91 | depends on X86_32 |
92 | help | 92 | ---help--- |
93 | Select this for Intel chips based on the Pentium-II and | 93 | Select this for Intel chips based on the Pentium-II and |
94 | pre-Coppermine Celeron core. This option enables an unaligned | 94 | pre-Coppermine Celeron core. This option enables an unaligned |
95 | copy optimization, compiles the kernel with optimization flags | 95 | copy optimization, compiles the kernel with optimization flags |
@@ -99,7 +99,7 @@ config MPENTIUMII | |||
99 | config MPENTIUMIII | 99 | config MPENTIUMIII |
100 | bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" | 100 | bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" |
101 | depends on X86_32 | 101 | depends on X86_32 |
102 | help | 102 | ---help--- |
103 | Select this for Intel chips based on the Pentium-III and | 103 | Select this for Intel chips based on the Pentium-III and |
104 | Celeron-Coppermine core. This option enables use of some | 104 | Celeron-Coppermine core. This option enables use of some |
105 | extended prefetch instructions in addition to the Pentium II | 105 | extended prefetch instructions in addition to the Pentium II |
@@ -108,14 +108,14 @@ config MPENTIUMIII | |||
108 | config MPENTIUMM | 108 | config MPENTIUMM |
109 | bool "Pentium M" | 109 | bool "Pentium M" |
110 | depends on X86_32 | 110 | depends on X86_32 |
111 | help | 111 | ---help--- |
112 | Select this for Intel Pentium M (not Pentium-4 M) | 112 | Select this for Intel Pentium M (not Pentium-4 M) |
113 | notebook chips. | 113 | notebook chips. |
114 | 114 | ||
115 | config MPENTIUM4 | 115 | config MPENTIUM4 |
116 | bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" | 116 | bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" |
117 | depends on X86_32 | 117 | depends on X86_32 |
118 | help | 118 | ---help--- |
119 | Select this for Intel Pentium 4 chips. This includes the | 119 | Select this for Intel Pentium 4 chips. This includes the |
120 | Pentium 4, Pentium D, P4-based Celeron and Xeon, and | 120 | Pentium 4, Pentium D, P4-based Celeron and Xeon, and |
121 | Pentium-4 M (not Pentium M) chips. This option enables compile | 121 | Pentium-4 M (not Pentium M) chips. This option enables compile |
@@ -151,7 +151,7 @@ config MPENTIUM4 | |||
151 | config MK6 | 151 | config MK6 |
152 | bool "K6/K6-II/K6-III" | 152 | bool "K6/K6-II/K6-III" |
153 | depends on X86_32 | 153 | depends on X86_32 |
154 | help | 154 | ---help--- |
155 | Select this for an AMD K6-family processor. Enables use of | 155 | Select this for an AMD K6-family processor. Enables use of |
156 | some extended instructions, and passes appropriate optimization | 156 | some extended instructions, and passes appropriate optimization |
157 | flags to GCC. | 157 | flags to GCC. |
@@ -159,14 +159,14 @@ config MK6 | |||
159 | config MK7 | 159 | config MK7 |
160 | bool "Athlon/Duron/K7" | 160 | bool "Athlon/Duron/K7" |
161 | depends on X86_32 | 161 | depends on X86_32 |
162 | help | 162 | ---help--- |
163 | Select this for an AMD Athlon K7-family processor. Enables use of | 163 | Select this for an AMD Athlon K7-family processor. Enables use of |
164 | some extended instructions, and passes appropriate optimization | 164 | some extended instructions, and passes appropriate optimization |
165 | flags to GCC. | 165 | flags to GCC. |
166 | 166 | ||
167 | config MK8 | 167 | config MK8 |
168 | bool "Opteron/Athlon64/Hammer/K8" | 168 | bool "Opteron/Athlon64/Hammer/K8" |
169 | help | 169 | ---help--- |
170 | Select this for an AMD Opteron or Athlon64 Hammer-family processor. | 170 | Select this for an AMD Opteron or Athlon64 Hammer-family processor. |
171 | Enables use of some extended instructions, and passes appropriate | 171 | Enables use of some extended instructions, and passes appropriate |
172 | optimization flags to GCC. | 172 | optimization flags to GCC. |
@@ -174,7 +174,7 @@ config MK8 | |||
174 | config MCRUSOE | 174 | config MCRUSOE |
175 | bool "Crusoe" | 175 | bool "Crusoe" |
176 | depends on X86_32 | 176 | depends on X86_32 |
177 | help | 177 | ---help--- |
178 | Select this for a Transmeta Crusoe processor. Treats the processor | 178 | Select this for a Transmeta Crusoe processor. Treats the processor |
179 | like a 586 with TSC, and sets some GCC optimization flags (like a | 179 | like a 586 with TSC, and sets some GCC optimization flags (like a |
180 | Pentium Pro with no alignment requirements). | 180 | Pentium Pro with no alignment requirements). |
@@ -182,13 +182,13 @@ config MCRUSOE | |||
182 | config MEFFICEON | 182 | config MEFFICEON |
183 | bool "Efficeon" | 183 | bool "Efficeon" |
184 | depends on X86_32 | 184 | depends on X86_32 |
185 | help | 185 | ---help--- |
186 | Select this for a Transmeta Efficeon processor. | 186 | Select this for a Transmeta Efficeon processor. |
187 | 187 | ||
188 | config MWINCHIPC6 | 188 | config MWINCHIPC6 |
189 | bool "Winchip-C6" | 189 | bool "Winchip-C6" |
190 | depends on X86_32 | 190 | depends on X86_32 |
191 | help | 191 | ---help--- |
192 | Select this for an IDT Winchip C6 chip. Linux and GCC | 192 | Select this for an IDT Winchip C6 chip. Linux and GCC |
193 | treat this chip as a 586TSC with some extended instructions | 193 | treat this chip as a 586TSC with some extended instructions |
194 | and alignment requirements. | 194 | and alignment requirements. |
@@ -196,7 +196,7 @@ config MWINCHIPC6 | |||
196 | config MWINCHIP3D | 196 | config MWINCHIP3D |
197 | bool "Winchip-2/Winchip-2A/Winchip-3" | 197 | bool "Winchip-2/Winchip-2A/Winchip-3" |
198 | depends on X86_32 | 198 | depends on X86_32 |
199 | help | 199 | ---help--- |
200 | Select this for an IDT Winchip-2, 2A or 3. Linux and GCC | 200 | Select this for an IDT Winchip-2, 2A or 3. Linux and GCC |
201 | treat this chip as a 586TSC with some extended instructions | 201 | treat this chip as a 586TSC with some extended instructions |
202 | and alignment requirements. Also enable out of order memory | 202 | and alignment requirements. Also enable out of order memory |
@@ -206,19 +206,19 @@ config MWINCHIP3D | |||
206 | config MGEODEGX1 | 206 | config MGEODEGX1 |
207 | bool "GeodeGX1" | 207 | bool "GeodeGX1" |
208 | depends on X86_32 | 208 | depends on X86_32 |
209 | help | 209 | ---help--- |
210 | Select this for a Geode GX1 (Cyrix MediaGX) chip. | 210 | Select this for a Geode GX1 (Cyrix MediaGX) chip. |
211 | 211 | ||
212 | config MGEODE_LX | 212 | config MGEODE_LX |
213 | bool "Geode GX/LX" | 213 | bool "Geode GX/LX" |
214 | depends on X86_32 | 214 | depends on X86_32 |
215 | help | 215 | ---help--- |
216 | Select this for AMD Geode GX and LX processors. | 216 | Select this for AMD Geode GX and LX processors. |
217 | 217 | ||
218 | config MCYRIXIII | 218 | config MCYRIXIII |
219 | bool "CyrixIII/VIA-C3" | 219 | bool "CyrixIII/VIA-C3" |
220 | depends on X86_32 | 220 | depends on X86_32 |
221 | help | 221 | ---help--- |
222 | Select this for a Cyrix III or C3 chip. Presently Linux and GCC | 222 | Select this for a Cyrix III or C3 chip. Presently Linux and GCC |
223 | treat this chip as a generic 586. Whilst the CPU is 686 class, | 223 | treat this chip as a generic 586. Whilst the CPU is 686 class, |
224 | it lacks the cmov extension which gcc assumes is present when | 224 | it lacks the cmov extension which gcc assumes is present when |
@@ -230,7 +230,7 @@ config MCYRIXIII | |||
230 | config MVIAC3_2 | 230 | config MVIAC3_2 |
231 | bool "VIA C3-2 (Nehemiah)" | 231 | bool "VIA C3-2 (Nehemiah)" |
232 | depends on X86_32 | 232 | depends on X86_32 |
233 | help | 233 | ---help--- |
234 | Select this for a VIA C3 "Nehemiah". Selecting this enables usage | 234 | Select this for a VIA C3 "Nehemiah". Selecting this enables usage |
235 | of SSE and tells gcc to treat the CPU as a 686. | 235 | of SSE and tells gcc to treat the CPU as a 686. |
236 | Note, this kernel will not boot on older (pre model 9) C3s. | 236 | Note, this kernel will not boot on older (pre model 9) C3s. |
@@ -238,14 +238,14 @@ config MVIAC3_2 | |||
238 | config MVIAC7 | 238 | config MVIAC7 |
239 | bool "VIA C7" | 239 | bool "VIA C7" |
240 | depends on X86_32 | 240 | depends on X86_32 |
241 | help | 241 | ---help--- |
242 | Select this for a VIA C7. Selecting this uses the correct cache | 242 | Select this for a VIA C7. Selecting this uses the correct cache |
243 | shift and tells gcc to treat the CPU as a 686. | 243 | shift and tells gcc to treat the CPU as a 686. |
244 | 244 | ||
245 | config MPSC | 245 | config MPSC |
246 | bool "Intel P4 / older Netburst based Xeon" | 246 | bool "Intel P4 / older Netburst based Xeon" |
247 | depends on X86_64 | 247 | depends on X86_64 |
248 | help | 248 | ---help--- |
249 | Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey | 249 | Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey |
250 | Xeon CPUs with Intel 64bit which is compatible with x86-64. | 250 | Xeon CPUs with Intel 64bit which is compatible with x86-64. |
251 | Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the | 251 | Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the |
@@ -255,7 +255,7 @@ config MPSC | |||
255 | 255 | ||
256 | config MCORE2 | 256 | config MCORE2 |
257 | bool "Core 2/newer Xeon" | 257 | bool "Core 2/newer Xeon" |
258 | help | 258 | ---help--- |
259 | 259 | ||
260 | Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and | 260 | Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and |
261 | 53xx) CPUs. You can distinguish newer from older Xeons by the CPU | 261 | 53xx) CPUs. You can distinguish newer from older Xeons by the CPU |
@@ -265,7 +265,7 @@ config MCORE2 | |||
265 | config GENERIC_CPU | 265 | config GENERIC_CPU |
266 | bool "Generic-x86-64" | 266 | bool "Generic-x86-64" |
267 | depends on X86_64 | 267 | depends on X86_64 |
268 | help | 268 | ---help--- |
269 | Generic x86-64 CPU. | 269 | Generic x86-64 CPU. |
270 | Run equally well on all x86-64 CPUs. | 270 | Run equally well on all x86-64 CPUs. |
271 | 271 | ||
@@ -274,7 +274,7 @@ endchoice | |||
274 | config X86_GENERIC | 274 | config X86_GENERIC |
275 | bool "Generic x86 support" | 275 | bool "Generic x86 support" |
276 | depends on X86_32 | 276 | depends on X86_32 |
277 | help | 277 | ---help--- |
278 | Instead of just including optimizations for the selected | 278 | Instead of just including optimizations for the selected |
279 | x86 variant (e.g. PII, Crusoe or Athlon), include some more | 279 | x86 variant (e.g. PII, Crusoe or Athlon), include some more |
280 | generic optimizations as well. This will make the kernel | 280 | generic optimizations as well. This will make the kernel |
@@ -294,25 +294,23 @@ config X86_CPU | |||
294 | # Define implied options from the CPU selection here | 294 | # Define implied options from the CPU selection here |
295 | config X86_L1_CACHE_BYTES | 295 | config X86_L1_CACHE_BYTES |
296 | int | 296 | int |
297 | default "128" if GENERIC_CPU || MPSC | 297 | default "128" if MPSC |
298 | default "64" if MK8 || MCORE2 | 298 | default "64" if GENERIC_CPU || MK8 || MCORE2 || X86_32 |
299 | depends on X86_64 | ||
300 | 299 | ||
301 | config X86_INTERNODE_CACHE_BYTES | 300 | config X86_INTERNODE_CACHE_BYTES |
302 | int | 301 | int |
303 | default "4096" if X86_VSMP | 302 | default "4096" if X86_VSMP |
304 | default X86_L1_CACHE_BYTES if !X86_VSMP | 303 | default X86_L1_CACHE_BYTES if !X86_VSMP |
305 | depends on X86_64 | ||
306 | 304 | ||
307 | config X86_CMPXCHG | 305 | config X86_CMPXCHG |
308 | def_bool X86_64 || (X86_32 && !M386) | 306 | def_bool X86_64 || (X86_32 && !M386) |
309 | 307 | ||
310 | config X86_L1_CACHE_SHIFT | 308 | config X86_L1_CACHE_SHIFT |
311 | int | 309 | int |
312 | default "7" if MPENTIUM4 || X86_GENERIC || GENERIC_CPU || MPSC | 310 | default "7" if MPENTIUM4 || MPSC |
313 | default "4" if X86_ELAN || M486 || M386 || MGEODEGX1 | 311 | default "4" if X86_ELAN || M486 || M386 || MGEODEGX1 |
314 | default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX | 312 | default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX |
315 | default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 | 313 | default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 || X86_GENERIC || GENERIC_CPU |
316 | 314 | ||
317 | config X86_XADD | 315 | config X86_XADD |
318 | def_bool y | 316 | def_bool y |
@@ -321,7 +319,7 @@ config X86_XADD | |||
321 | config X86_PPRO_FENCE | 319 | config X86_PPRO_FENCE |
322 | bool "PentiumPro memory ordering errata workaround" | 320 | bool "PentiumPro memory ordering errata workaround" |
323 | depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 | 321 | depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 |
324 | help | 322 | ---help--- |
325 | Old PentiumPro multiprocessor systems had errata that could cause | 323 | Old PentiumPro multiprocessor systems had errata that could cause |
326 | memory operations to violate the x86 ordering standard in rare cases. | 324 | memory operations to violate the x86 ordering standard in rare cases. |
327 | Enabling this option will attempt to work around some (but not all) | 325 | Enabling this option will attempt to work around some (but not all) |
@@ -414,14 +412,14 @@ config X86_DEBUGCTLMSR | |||
414 | 412 | ||
415 | menuconfig PROCESSOR_SELECT | 413 | menuconfig PROCESSOR_SELECT |
416 | bool "Supported processor vendors" if EMBEDDED | 414 | bool "Supported processor vendors" if EMBEDDED |
417 | help | 415 | ---help--- |
418 | This lets you choose what x86 vendor support code your kernel | 416 | This lets you choose what x86 vendor support code your kernel |
419 | will include. | 417 | will include. |
420 | 418 | ||
421 | config CPU_SUP_INTEL | 419 | config CPU_SUP_INTEL |
422 | default y | 420 | default y |
423 | bool "Support Intel processors" if PROCESSOR_SELECT | 421 | bool "Support Intel processors" if PROCESSOR_SELECT |
424 | help | 422 | ---help--- |
425 | This enables detection, tunings and quirks for Intel processors | 423 | This enables detection, tunings and quirks for Intel processors |
426 | 424 | ||
427 | You need this enabled if you want your kernel to run on an | 425 | You need this enabled if you want your kernel to run on an |
@@ -435,7 +433,7 @@ config CPU_SUP_CYRIX_32 | |||
435 | default y | 433 | default y |
436 | bool "Support Cyrix processors" if PROCESSOR_SELECT | 434 | bool "Support Cyrix processors" if PROCESSOR_SELECT |
437 | depends on !64BIT | 435 | depends on !64BIT |
438 | help | 436 | ---help--- |
439 | This enables detection, tunings and quirks for Cyrix processors | 437 | This enables detection, tunings and quirks for Cyrix processors |
440 | 438 | ||
441 | You need this enabled if you want your kernel to run on a | 439 | You need this enabled if you want your kernel to run on a |
@@ -448,7 +446,7 @@ config CPU_SUP_CYRIX_32 | |||
448 | config CPU_SUP_AMD | 446 | config CPU_SUP_AMD |
449 | default y | 447 | default y |
450 | bool "Support AMD processors" if PROCESSOR_SELECT | 448 | bool "Support AMD processors" if PROCESSOR_SELECT |
451 | help | 449 | ---help--- |
452 | This enables detection, tunings and quirks for AMD processors | 450 | This enables detection, tunings and quirks for AMD processors |
453 | 451 | ||
454 | You need this enabled if you want your kernel to run on an | 452 | You need this enabled if you want your kernel to run on an |
@@ -462,7 +460,7 @@ config CPU_SUP_CENTAUR_32 | |||
462 | default y | 460 | default y |
463 | bool "Support Centaur processors" if PROCESSOR_SELECT | 461 | bool "Support Centaur processors" if PROCESSOR_SELECT |
464 | depends on !64BIT | 462 | depends on !64BIT |
465 | help | 463 | ---help--- |
466 | This enables detection, tunings and quirks for Centaur processors | 464 | This enables detection, tunings and quirks for Centaur processors |
467 | 465 | ||
468 | You need this enabled if you want your kernel to run on a | 466 | You need this enabled if you want your kernel to run on a |
@@ -476,7 +474,7 @@ config CPU_SUP_CENTAUR_64 | |||
476 | default y | 474 | default y |
477 | bool "Support Centaur processors" if PROCESSOR_SELECT | 475 | bool "Support Centaur processors" if PROCESSOR_SELECT |
478 | depends on 64BIT | 476 | depends on 64BIT |
479 | help | 477 | ---help--- |
480 | This enables detection, tunings and quirks for Centaur processors | 478 | This enables detection, tunings and quirks for Centaur processors |
481 | 479 | ||
482 | You need this enabled if you want your kernel to run on a | 480 | You need this enabled if you want your kernel to run on a |
@@ -490,7 +488,7 @@ config CPU_SUP_TRANSMETA_32 | |||
490 | default y | 488 | default y |
491 | bool "Support Transmeta processors" if PROCESSOR_SELECT | 489 | bool "Support Transmeta processors" if PROCESSOR_SELECT |
492 | depends on !64BIT | 490 | depends on !64BIT |
493 | help | 491 | ---help--- |
494 | This enables detection, tunings and quirks for Transmeta processors | 492 | This enables detection, tunings and quirks for Transmeta processors |
495 | 493 | ||
496 | You need this enabled if you want your kernel to run on a | 494 | You need this enabled if you want your kernel to run on a |
@@ -504,7 +502,7 @@ config CPU_SUP_UMC_32 | |||
504 | default y | 502 | default y |
505 | bool "Support UMC processors" if PROCESSOR_SELECT | 503 | bool "Support UMC processors" if PROCESSOR_SELECT |
506 | depends on !64BIT | 504 | depends on !64BIT |
507 | help | 505 | ---help--- |
508 | This enables detection, tunings and quirks for UMC processors | 506 | This enables detection, tunings and quirks for UMC processors |
509 | 507 | ||
510 | You need this enabled if you want your kernel to run on a | 508 | You need this enabled if you want your kernel to run on a |
@@ -523,7 +521,7 @@ config X86_PTRACE_BTS | |||
523 | bool "Branch Trace Store" | 521 | bool "Branch Trace Store" |
524 | default y | 522 | default y |
525 | depends on X86_DEBUGCTLMSR | 523 | depends on X86_DEBUGCTLMSR |
526 | help | 524 | ---help--- |
527 | This adds a ptrace interface to the hardware's branch trace store. | 525 | This adds a ptrace interface to the hardware's branch trace store. |
528 | 526 | ||
529 | Debuggers may use it to collect an execution trace of the debugged | 527 | Debuggers may use it to collect an execution trace of the debugged |
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug index e1983fa025d2..fdb45df608b6 100644 --- a/arch/x86/Kconfig.debug +++ b/arch/x86/Kconfig.debug | |||
@@ -7,7 +7,7 @@ source "lib/Kconfig.debug" | |||
7 | 7 | ||
8 | config STRICT_DEVMEM | 8 | config STRICT_DEVMEM |
9 | bool "Filter access to /dev/mem" | 9 | bool "Filter access to /dev/mem" |
10 | help | 10 | ---help--- |
11 | If this option is disabled, you allow userspace (root) access to all | 11 | If this option is disabled, you allow userspace (root) access to all |
12 | of memory, including kernel and userspace memory. Accidental | 12 | of memory, including kernel and userspace memory. Accidental |
13 | access to this is obviously disastrous, but specific access can | 13 | access to this is obviously disastrous, but specific access can |
@@ -25,7 +25,7 @@ config STRICT_DEVMEM | |||
25 | config X86_VERBOSE_BOOTUP | 25 | config X86_VERBOSE_BOOTUP |
26 | bool "Enable verbose x86 bootup info messages" | 26 | bool "Enable verbose x86 bootup info messages" |
27 | default y | 27 | default y |
28 | help | 28 | ---help--- |
29 | Enables the informational output from the decompression stage | 29 | Enables the informational output from the decompression stage |
30 | (e.g. bzImage) of the boot. If you disable this you will still | 30 | (e.g. bzImage) of the boot. If you disable this you will still |
31 | see errors. Disable this if you want silent bootup. | 31 | see errors. Disable this if you want silent bootup. |
@@ -33,7 +33,7 @@ config X86_VERBOSE_BOOTUP | |||
33 | config EARLY_PRINTK | 33 | config EARLY_PRINTK |
34 | bool "Early printk" if EMBEDDED | 34 | bool "Early printk" if EMBEDDED |
35 | default y | 35 | default y |
36 | help | 36 | ---help--- |
37 | Write kernel log output directly into the VGA buffer or to a serial | 37 | Write kernel log output directly into the VGA buffer or to a serial |
38 | port. | 38 | port. |
39 | 39 | ||
@@ -47,7 +47,7 @@ config EARLY_PRINTK_DBGP | |||
47 | bool "Early printk via EHCI debug port" | 47 | bool "Early printk via EHCI debug port" |
48 | default n | 48 | default n |
49 | depends on EARLY_PRINTK && PCI | 49 | depends on EARLY_PRINTK && PCI |
50 | help | 50 | ---help--- |
51 | Write kernel log output directly into the EHCI debug port. | 51 | Write kernel log output directly into the EHCI debug port. |
52 | 52 | ||
53 | This is useful for kernel debugging when your machine crashes very | 53 | This is useful for kernel debugging when your machine crashes very |
@@ -59,14 +59,14 @@ config EARLY_PRINTK_DBGP | |||
59 | config DEBUG_STACKOVERFLOW | 59 | config DEBUG_STACKOVERFLOW |
60 | bool "Check for stack overflows" | 60 | bool "Check for stack overflows" |
61 | depends on DEBUG_KERNEL | 61 | depends on DEBUG_KERNEL |
62 | help | 62 | ---help--- |
63 | This option will cause messages to be printed if free stack space | 63 | This option will cause messages to be printed if free stack space |
64 | drops below a certain limit. | 64 | drops below a certain limit. |
65 | 65 | ||
66 | config DEBUG_STACK_USAGE | 66 | config DEBUG_STACK_USAGE |
67 | bool "Stack utilization instrumentation" | 67 | bool "Stack utilization instrumentation" |
68 | depends on DEBUG_KERNEL | 68 | depends on DEBUG_KERNEL |
69 | help | 69 | ---help--- |
70 | Enables the display of the minimum amount of free stack which each | 70 | Enables the display of the minimum amount of free stack which each |
71 | task has ever had available in the sysrq-T and sysrq-P debug output. | 71 | task has ever had available in the sysrq-T and sysrq-P debug output. |
72 | 72 | ||
@@ -75,7 +75,7 @@ config DEBUG_STACK_USAGE | |||
75 | config DEBUG_PAGEALLOC | 75 | config DEBUG_PAGEALLOC |
76 | bool "Debug page memory allocations" | 76 | bool "Debug page memory allocations" |
77 | depends on DEBUG_KERNEL | 77 | depends on DEBUG_KERNEL |
78 | help | 78 | ---help--- |
79 | Unmap pages from the kernel linear mapping after free_pages(). | 79 | Unmap pages from the kernel linear mapping after free_pages(). |
80 | This results in a large slowdown, but helps to find certain types | 80 | This results in a large slowdown, but helps to find certain types |
81 | of memory corruptions. | 81 | of memory corruptions. |
@@ -83,9 +83,9 @@ config DEBUG_PAGEALLOC | |||
83 | config DEBUG_PER_CPU_MAPS | 83 | config DEBUG_PER_CPU_MAPS |
84 | bool "Debug access to per_cpu maps" | 84 | bool "Debug access to per_cpu maps" |
85 | depends on DEBUG_KERNEL | 85 | depends on DEBUG_KERNEL |
86 | depends on X86_SMP | 86 | depends on SMP |
87 | default n | 87 | default n |
88 | help | 88 | ---help--- |
89 | Say Y to verify that the per_cpu map being accessed has | 89 | Say Y to verify that the per_cpu map being accessed has |
90 | been setup. Adds a fair amount of code to kernel memory | 90 | been setup. Adds a fair amount of code to kernel memory |
91 | and decreases performance. | 91 | and decreases performance. |
@@ -96,7 +96,7 @@ config X86_PTDUMP | |||
96 | bool "Export kernel pagetable layout to userspace via debugfs" | 96 | bool "Export kernel pagetable layout to userspace via debugfs" |
97 | depends on DEBUG_KERNEL | 97 | depends on DEBUG_KERNEL |
98 | select DEBUG_FS | 98 | select DEBUG_FS |
99 | help | 99 | ---help--- |
100 | Say Y here if you want to show the kernel pagetable layout in a | 100 | Say Y here if you want to show the kernel pagetable layout in a |
101 | debugfs file. This information is only useful for kernel developers | 101 | debugfs file. This information is only useful for kernel developers |
102 | who are working in architecture specific areas of the kernel. | 102 | who are working in architecture specific areas of the kernel. |
@@ -108,7 +108,7 @@ config DEBUG_RODATA | |||
108 | bool "Write protect kernel read-only data structures" | 108 | bool "Write protect kernel read-only data structures" |
109 | default y | 109 | default y |
110 | depends on DEBUG_KERNEL | 110 | depends on DEBUG_KERNEL |
111 | help | 111 | ---help--- |
112 | Mark the kernel read-only data as write-protected in the pagetables, | 112 | Mark the kernel read-only data as write-protected in the pagetables, |
113 | in order to catch accidental (and incorrect) writes to such const | 113 | in order to catch accidental (and incorrect) writes to such const |
114 | data. This is recommended so that we can catch kernel bugs sooner. | 114 | data. This is recommended so that we can catch kernel bugs sooner. |
@@ -117,7 +117,8 @@ config DEBUG_RODATA | |||
117 | config DEBUG_RODATA_TEST | 117 | config DEBUG_RODATA_TEST |
118 | bool "Testcase for the DEBUG_RODATA feature" | 118 | bool "Testcase for the DEBUG_RODATA feature" |
119 | depends on DEBUG_RODATA | 119 | depends on DEBUG_RODATA |
120 | help | 120 | default y |
121 | ---help--- | ||
121 | This option enables a testcase for the DEBUG_RODATA | 122 | This option enables a testcase for the DEBUG_RODATA |
122 | feature as well as for the change_page_attr() infrastructure. | 123 | feature as well as for the change_page_attr() infrastructure. |
123 | If in doubt, say "N" | 124 | If in doubt, say "N" |
@@ -125,7 +126,7 @@ config DEBUG_RODATA_TEST | |||
125 | config DEBUG_NX_TEST | 126 | config DEBUG_NX_TEST |
126 | tristate "Testcase for the NX non-executable stack feature" | 127 | tristate "Testcase for the NX non-executable stack feature" |
127 | depends on DEBUG_KERNEL && m | 128 | depends on DEBUG_KERNEL && m |
128 | help | 129 | ---help--- |
129 | This option enables a testcase for the CPU NX capability | 130 | This option enables a testcase for the CPU NX capability |
130 | and the software setup of this feature. | 131 | and the software setup of this feature. |
131 | If in doubt, say "N" | 132 | If in doubt, say "N" |
@@ -133,7 +134,7 @@ config DEBUG_NX_TEST | |||
133 | config 4KSTACKS | 134 | config 4KSTACKS |
134 | bool "Use 4Kb for kernel stacks instead of 8Kb" | 135 | bool "Use 4Kb for kernel stacks instead of 8Kb" |
135 | depends on X86_32 | 136 | depends on X86_32 |
136 | help | 137 | ---help--- |
137 | If you say Y here the kernel will use a 4Kb stacksize for the | 138 | If you say Y here the kernel will use a 4Kb stacksize for the |
138 | kernel stack attached to each process/thread. This facilitates | 139 | kernel stack attached to each process/thread. This facilitates |
139 | running more threads on a system and also reduces the pressure | 140 | running more threads on a system and also reduces the pressure |
@@ -144,7 +145,7 @@ config DOUBLEFAULT | |||
144 | default y | 145 | default y |
145 | bool "Enable doublefault exception handler" if EMBEDDED | 146 | bool "Enable doublefault exception handler" if EMBEDDED |
146 | depends on X86_32 | 147 | depends on X86_32 |
147 | help | 148 | ---help--- |
148 | This option allows trapping of rare doublefault exceptions that | 149 | This option allows trapping of rare doublefault exceptions that |
149 | would otherwise cause a system to silently reboot. Disabling this | 150 | would otherwise cause a system to silently reboot. Disabling this |
150 | option saves about 4k and might cause you much additional grey | 151 | option saves about 4k and might cause you much additional grey |
@@ -154,7 +155,7 @@ config IOMMU_DEBUG | |||
154 | bool "Enable IOMMU debugging" | 155 | bool "Enable IOMMU debugging" |
155 | depends on GART_IOMMU && DEBUG_KERNEL | 156 | depends on GART_IOMMU && DEBUG_KERNEL |
156 | depends on X86_64 | 157 | depends on X86_64 |
157 | help | 158 | ---help--- |
158 | Force the IOMMU to on even when you have less than 4GB of | 159 | Force the IOMMU to on even when you have less than 4GB of |
159 | memory and add debugging code. On overflow always panic. And | 160 | memory and add debugging code. On overflow always panic. And |
160 | allow to enable IOMMU leak tracing. Can be disabled at boot | 161 | allow to enable IOMMU leak tracing. Can be disabled at boot |
@@ -170,7 +171,7 @@ config IOMMU_LEAK | |||
170 | bool "IOMMU leak tracing" | 171 | bool "IOMMU leak tracing" |
171 | depends on DEBUG_KERNEL | 172 | depends on DEBUG_KERNEL |
172 | depends on IOMMU_DEBUG | 173 | depends on IOMMU_DEBUG |
173 | help | 174 | ---help--- |
174 | Add a simple leak tracer to the IOMMU code. This is useful when you | 175 | Add a simple leak tracer to the IOMMU code. This is useful when you |
175 | are debugging a buggy device driver that leaks IOMMU mappings. | 176 | are debugging a buggy device driver that leaks IOMMU mappings. |
176 | 177 | ||
@@ -203,25 +204,25 @@ choice | |||
203 | 204 | ||
204 | config IO_DELAY_0X80 | 205 | config IO_DELAY_0X80 |
205 | bool "port 0x80 based port-IO delay [recommended]" | 206 | bool "port 0x80 based port-IO delay [recommended]" |
206 | help | 207 | ---help--- |
207 | This is the traditional Linux IO delay used for in/out_p. | 208 | This is the traditional Linux IO delay used for in/out_p. |
208 | It is the most tested hence safest selection here. | 209 | It is the most tested hence safest selection here. |
209 | 210 | ||
210 | config IO_DELAY_0XED | 211 | config IO_DELAY_0XED |
211 | bool "port 0xed based port-IO delay" | 212 | bool "port 0xed based port-IO delay" |
212 | help | 213 | ---help--- |
213 | Use port 0xed as the IO delay. This frees up port 0x80 which is | 214 | Use port 0xed as the IO delay. This frees up port 0x80 which is |
214 | often used as a hardware-debug port. | 215 | often used as a hardware-debug port. |
215 | 216 | ||
216 | config IO_DELAY_UDELAY | 217 | config IO_DELAY_UDELAY |
217 | bool "udelay based port-IO delay" | 218 | bool "udelay based port-IO delay" |
218 | help | 219 | ---help--- |
219 | Use udelay(2) as the IO delay method. This provides the delay | 220 | Use udelay(2) as the IO delay method. This provides the delay |
220 | while not having any side-effect on the IO port space. | 221 | while not having any side-effect on the IO port space. |
221 | 222 | ||
222 | config IO_DELAY_NONE | 223 | config IO_DELAY_NONE |
223 | bool "no port-IO delay" | 224 | bool "no port-IO delay" |
224 | help | 225 | ---help--- |
225 | No port-IO delay. Will break on old boxes that require port-IO | 226 | No port-IO delay. Will break on old boxes that require port-IO |
226 | delay for certain operations. Should work on most new machines. | 227 | delay for certain operations. Should work on most new machines. |
227 | 228 | ||
@@ -255,18 +256,18 @@ config DEBUG_BOOT_PARAMS | |||
255 | bool "Debug boot parameters" | 256 | bool "Debug boot parameters" |
256 | depends on DEBUG_KERNEL | 257 | depends on DEBUG_KERNEL |
257 | depends on DEBUG_FS | 258 | depends on DEBUG_FS |
258 | help | 259 | ---help--- |
259 | This option will cause struct boot_params to be exported via debugfs. | 260 | This option will cause struct boot_params to be exported via debugfs. |
260 | 261 | ||
261 | config CPA_DEBUG | 262 | config CPA_DEBUG |
262 | bool "CPA self-test code" | 263 | bool "CPA self-test code" |
263 | depends on DEBUG_KERNEL | 264 | depends on DEBUG_KERNEL |
264 | help | 265 | ---help--- |
265 | Do change_page_attr() self-tests every 30 seconds. | 266 | Do change_page_attr() self-tests every 30 seconds. |
266 | 267 | ||
267 | config OPTIMIZE_INLINING | 268 | config OPTIMIZE_INLINING |
268 | bool "Allow gcc to uninline functions marked 'inline'" | 269 | bool "Allow gcc to uninline functions marked 'inline'" |
269 | help | 270 | ---help--- |
270 | This option determines if the kernel forces gcc to inline the functions | 271 | This option determines if the kernel forces gcc to inline the functions |
271 | developers have marked 'inline'. Doing so takes away freedom from gcc to | 272 | developers have marked 'inline'. Doing so takes away freedom from gcc to |
272 | do what it thinks is best, which is desirable for the gcc 3.x series of | 273 | do what it thinks is best, which is desirable for the gcc 3.x series of |
@@ -279,4 +280,3 @@ config OPTIMIZE_INLINING | |||
279 | If unsure, say N. | 280 | If unsure, say N. |
280 | 281 | ||
281 | endmenu | 282 | endmenu |
282 | |||
diff --git a/arch/x86/Makefile b/arch/x86/Makefile index d1a47adb5aec..1836191839ee 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile | |||
@@ -70,14 +70,17 @@ else | |||
70 | # this works around some issues with generating unwind tables in older gccs | 70 | # this works around some issues with generating unwind tables in older gccs |
71 | # newer gccs do it by default | 71 | # newer gccs do it by default |
72 | KBUILD_CFLAGS += -maccumulate-outgoing-args | 72 | KBUILD_CFLAGS += -maccumulate-outgoing-args |
73 | endif | ||
73 | 74 | ||
74 | stackp := $(CONFIG_SHELL) $(srctree)/scripts/gcc-x86_64-has-stack-protector.sh | 75 | ifdef CONFIG_CC_STACKPROTECTOR |
75 | stackp-$(CONFIG_CC_STACKPROTECTOR) := $(shell $(stackp) \ | 76 | cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh |
76 | "$(CC)" -fstack-protector ) | 77 | ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC)),y) |
77 | stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += $(shell $(stackp) \ | 78 | stackp-y := -fstack-protector |
78 | "$(CC)" -fstack-protector-all ) | 79 | stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += -fstack-protector-all |
79 | 80 | KBUILD_CFLAGS += $(stackp-y) | |
80 | KBUILD_CFLAGS += $(stackp-y) | 81 | else |
82 | $(warning stack protector enabled but no compiler support) | ||
83 | endif | ||
81 | endif | 84 | endif |
82 | 85 | ||
83 | # Stackpointer is addressed different for 32 bit and 64 bit x86 | 86 | # Stackpointer is addressed different for 32 bit and 64 bit x86 |
@@ -102,29 +105,6 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables | |||
102 | # prevent gcc from generating any FP code by mistake | 105 | # prevent gcc from generating any FP code by mistake |
103 | KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,) | 106 | KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,) |
104 | 107 | ||
105 | ### | ||
106 | # Sub architecture support | ||
107 | # fcore-y is linked before mcore-y files. | ||
108 | |||
109 | # Default subarch .c files | ||
110 | mcore-y := arch/x86/mach-default/ | ||
111 | |||
112 | # Voyager subarch support | ||
113 | mflags-$(CONFIG_X86_VOYAGER) := -Iarch/x86/include/asm/mach-voyager | ||
114 | mcore-$(CONFIG_X86_VOYAGER) := arch/x86/mach-voyager/ | ||
115 | |||
116 | # generic subarchitecture | ||
117 | mflags-$(CONFIG_X86_GENERICARCH):= -Iarch/x86/include/asm/mach-generic | ||
118 | fcore-$(CONFIG_X86_GENERICARCH) += arch/x86/mach-generic/ | ||
119 | mcore-$(CONFIG_X86_GENERICARCH) := arch/x86/mach-default/ | ||
120 | |||
121 | # default subarch .h files | ||
122 | mflags-y += -Iarch/x86/include/asm/mach-default | ||
123 | |||
124 | # 64 bit does not support subarch support - clear sub arch variables | ||
125 | fcore-$(CONFIG_X86_64) := | ||
126 | mcore-$(CONFIG_X86_64) := | ||
127 | |||
128 | KBUILD_CFLAGS += $(mflags-y) | 108 | KBUILD_CFLAGS += $(mflags-y) |
129 | KBUILD_AFLAGS += $(mflags-y) | 109 | KBUILD_AFLAGS += $(mflags-y) |
130 | 110 | ||
@@ -150,9 +130,6 @@ core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/ | |||
150 | core-y += arch/x86/kernel/ | 130 | core-y += arch/x86/kernel/ |
151 | core-y += arch/x86/mm/ | 131 | core-y += arch/x86/mm/ |
152 | 132 | ||
153 | # Remaining sub architecture files | ||
154 | core-y += $(mcore-y) | ||
155 | |||
156 | core-y += arch/x86/crypto/ | 133 | core-y += arch/x86/crypto/ |
157 | core-y += arch/x86/vdso/ | 134 | core-y += arch/x86/vdso/ |
158 | core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/ | 135 | core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/ |
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile index cd48c7210016..c70eff69a1fb 100644 --- a/arch/x86/boot/Makefile +++ b/arch/x86/boot/Makefile | |||
@@ -32,7 +32,6 @@ setup-y += a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o | |||
32 | setup-y += header.o main.o mca.o memory.o pm.o pmjump.o | 32 | setup-y += header.o main.o mca.o memory.o pm.o pmjump.o |
33 | setup-y += printf.o string.o tty.o video.o video-mode.o version.o | 33 | setup-y += printf.o string.o tty.o video.o video-mode.o version.o |
34 | setup-$(CONFIG_X86_APM_BOOT) += apm.o | 34 | setup-$(CONFIG_X86_APM_BOOT) += apm.o |
35 | setup-$(CONFIG_X86_VOYAGER) += voyager.o | ||
36 | 35 | ||
37 | # The link order of the video-*.o modules can matter. In particular, | 36 | # The link order of the video-*.o modules can matter. In particular, |
38 | # video-vga.o *must* be listed first, followed by video-vesa.o. | 37 | # video-vga.o *must* be listed first, followed by video-vesa.o. |
diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c index 4063d630deff..7c19ce8c2442 100644 --- a/arch/x86/boot/a20.c +++ b/arch/x86/boot/a20.c | |||
@@ -2,6 +2,7 @@ | |||
2 | * | 2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | 3 | * Copyright (C) 1991, 1992 Linus Torvalds |
4 | * Copyright 2007-2008 rPath, Inc. - All Rights Reserved | 4 | * Copyright 2007-2008 rPath, Inc. - All Rights Reserved |
5 | * Copyright 2009 Intel Corporation | ||
5 | * | 6 | * |
6 | * This file is part of the Linux kernel, and is made available under | 7 | * This file is part of the Linux kernel, and is made available under |
7 | * the terms of the GNU General Public License version 2. | 8 | * the terms of the GNU General Public License version 2. |
@@ -15,16 +16,23 @@ | |||
15 | #include "boot.h" | 16 | #include "boot.h" |
16 | 17 | ||
17 | #define MAX_8042_LOOPS 100000 | 18 | #define MAX_8042_LOOPS 100000 |
19 | #define MAX_8042_FF 32 | ||
18 | 20 | ||
19 | static int empty_8042(void) | 21 | static int empty_8042(void) |
20 | { | 22 | { |
21 | u8 status; | 23 | u8 status; |
22 | int loops = MAX_8042_LOOPS; | 24 | int loops = MAX_8042_LOOPS; |
25 | int ffs = MAX_8042_FF; | ||
23 | 26 | ||
24 | while (loops--) { | 27 | while (loops--) { |
25 | io_delay(); | 28 | io_delay(); |
26 | 29 | ||
27 | status = inb(0x64); | 30 | status = inb(0x64); |
31 | if (status == 0xff) { | ||
32 | /* FF is a plausible, but very unlikely status */ | ||
33 | if (!--ffs) | ||
34 | return -1; /* Assume no KBC present */ | ||
35 | } | ||
28 | if (status & 1) { | 36 | if (status & 1) { |
29 | /* Read and discard input data */ | 37 | /* Read and discard input data */ |
30 | io_delay(); | 38 | io_delay(); |
@@ -118,44 +126,37 @@ static void enable_a20_fast(void) | |||
118 | 126 | ||
119 | int enable_a20(void) | 127 | int enable_a20(void) |
120 | { | 128 | { |
121 | #if defined(CONFIG_X86_ELAN) | ||
122 | /* Elan croaks if we try to touch the KBC */ | ||
123 | enable_a20_fast(); | ||
124 | while (!a20_test_long()) | ||
125 | ; | ||
126 | return 0; | ||
127 | #elif defined(CONFIG_X86_VOYAGER) | ||
128 | /* On Voyager, a20_test() is unsafe? */ | ||
129 | enable_a20_kbc(); | ||
130 | return 0; | ||
131 | #else | ||
132 | int loops = A20_ENABLE_LOOPS; | 129 | int loops = A20_ENABLE_LOOPS; |
133 | while (loops--) { | 130 | int kbc_err; |
134 | /* First, check to see if A20 is already enabled | 131 | |
135 | (legacy free, etc.) */ | 132 | while (loops--) { |
136 | if (a20_test_short()) | 133 | /* First, check to see if A20 is already enabled |
137 | return 0; | 134 | (legacy free, etc.) */ |
138 | 135 | if (a20_test_short()) | |
139 | /* Next, try the BIOS (INT 0x15, AX=0x2401) */ | 136 | return 0; |
140 | enable_a20_bios(); | 137 | |
141 | if (a20_test_short()) | 138 | /* Next, try the BIOS (INT 0x15, AX=0x2401) */ |
142 | return 0; | 139 | enable_a20_bios(); |
143 | 140 | if (a20_test_short()) | |
144 | /* Try enabling A20 through the keyboard controller */ | 141 | return 0; |
145 | empty_8042(); | 142 | |
146 | if (a20_test_short()) | 143 | /* Try enabling A20 through the keyboard controller */ |
147 | return 0; /* BIOS worked, but with delayed reaction */ | 144 | kbc_err = empty_8042(); |
148 | 145 | ||
149 | enable_a20_kbc(); | 146 | if (a20_test_short()) |
150 | if (a20_test_long()) | 147 | return 0; /* BIOS worked, but with delayed reaction */ |
151 | return 0; | 148 | |
152 | 149 | if (!kbc_err) { | |
153 | /* Finally, try enabling the "fast A20 gate" */ | 150 | enable_a20_kbc(); |
154 | enable_a20_fast(); | 151 | if (a20_test_long()) |
155 | if (a20_test_long()) | 152 | return 0; |
156 | return 0; | 153 | } |
157 | } | 154 | |
158 | 155 | /* Finally, try enabling the "fast A20 gate" */ | |
159 | return -1; | 156 | enable_a20_fast(); |
160 | #endif | 157 | if (a20_test_long()) |
158 | return 0; | ||
159 | } | ||
160 | |||
161 | return -1; | ||
161 | } | 162 | } |
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h index cc0ef13fba7a..7b2692e897e5 100644 --- a/arch/x86/boot/boot.h +++ b/arch/x86/boot/boot.h | |||
@@ -302,9 +302,6 @@ void probe_cards(int unsafe); | |||
302 | /* video-vesa.c */ | 302 | /* video-vesa.c */ |
303 | void vesa_store_edid(void); | 303 | void vesa_store_edid(void); |
304 | 304 | ||
305 | /* voyager.c */ | ||
306 | int query_voyager(void); | ||
307 | |||
308 | #endif /* __ASSEMBLY__ */ | 305 | #endif /* __ASSEMBLY__ */ |
309 | 306 | ||
310 | #endif /* BOOT_BOOT_H */ | 307 | #endif /* BOOT_BOOT_H */ |
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile index 1771c804e02f..3ca4c194b8e5 100644 --- a/arch/x86/boot/compressed/Makefile +++ b/arch/x86/boot/compressed/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | # create a compressed vmlinux image from the original vmlinux | 4 | # create a compressed vmlinux image from the original vmlinux |
5 | # | 5 | # |
6 | 6 | ||
7 | targets := vmlinux vmlinux.bin vmlinux.bin.gz head_$(BITS).o misc.o piggy.o | 7 | targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o |
8 | 8 | ||
9 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 | 9 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 |
10 | KBUILD_CFLAGS += -fno-strict-aliasing -fPIC | 10 | KBUILD_CFLAGS += -fno-strict-aliasing -fPIC |
@@ -47,18 +47,35 @@ ifeq ($(CONFIG_X86_32),y) | |||
47 | ifdef CONFIG_RELOCATABLE | 47 | ifdef CONFIG_RELOCATABLE |
48 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE | 48 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE |
49 | $(call if_changed,gzip) | 49 | $(call if_changed,gzip) |
50 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin.all FORCE | ||
51 | $(call if_changed,bzip2) | ||
52 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin.all FORCE | ||
53 | $(call if_changed,lzma) | ||
50 | else | 54 | else |
51 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE | 55 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE |
52 | $(call if_changed,gzip) | 56 | $(call if_changed,gzip) |
57 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE | ||
58 | $(call if_changed,bzip2) | ||
59 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE | ||
60 | $(call if_changed,lzma) | ||
53 | endif | 61 | endif |
54 | LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T | 62 | LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T |
55 | 63 | ||
56 | else | 64 | else |
65 | |||
57 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE | 66 | $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE |
58 | $(call if_changed,gzip) | 67 | $(call if_changed,gzip) |
68 | $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE | ||
69 | $(call if_changed,bzip2) | ||
70 | $(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE | ||
71 | $(call if_changed,lzma) | ||
59 | 72 | ||
60 | LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T | 73 | LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T |
61 | endif | 74 | endif |
62 | 75 | ||
63 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE | 76 | suffix_$(CONFIG_KERNEL_GZIP) = gz |
77 | suffix_$(CONFIG_KERNEL_BZIP2) = bz2 | ||
78 | suffix_$(CONFIG_KERNEL_LZMA) = lzma | ||
79 | |||
80 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE | ||
64 | $(call if_changed,ld) | 81 | $(call if_changed,ld) |
diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S index 29c5fbf08392..3a8a866fb2e2 100644 --- a/arch/x86/boot/compressed/head_32.S +++ b/arch/x86/boot/compressed/head_32.S | |||
@@ -25,14 +25,12 @@ | |||
25 | 25 | ||
26 | #include <linux/linkage.h> | 26 | #include <linux/linkage.h> |
27 | #include <asm/segment.h> | 27 | #include <asm/segment.h> |
28 | #include <asm/page.h> | 28 | #include <asm/page_types.h> |
29 | #include <asm/boot.h> | 29 | #include <asm/boot.h> |
30 | #include <asm/asm-offsets.h> | 30 | #include <asm/asm-offsets.h> |
31 | 31 | ||
32 | .section ".text.head","ax",@progbits | 32 | .section ".text.head","ax",@progbits |
33 | .globl startup_32 | 33 | ENTRY(startup_32) |
34 | |||
35 | startup_32: | ||
36 | cld | 34 | cld |
37 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking | 35 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking |
38 | * us to not reload segments */ | 36 | * us to not reload segments */ |
@@ -113,6 +111,8 @@ startup_32: | |||
113 | */ | 111 | */ |
114 | leal relocated(%ebx), %eax | 112 | leal relocated(%ebx), %eax |
115 | jmp *%eax | 113 | jmp *%eax |
114 | ENDPROC(startup_32) | ||
115 | |||
116 | .section ".text" | 116 | .section ".text" |
117 | relocated: | 117 | relocated: |
118 | 118 | ||
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S index 1d5dff4123e1..ed4a82948002 100644 --- a/arch/x86/boot/compressed/head_64.S +++ b/arch/x86/boot/compressed/head_64.S | |||
@@ -26,8 +26,8 @@ | |||
26 | 26 | ||
27 | #include <linux/linkage.h> | 27 | #include <linux/linkage.h> |
28 | #include <asm/segment.h> | 28 | #include <asm/segment.h> |
29 | #include <asm/pgtable.h> | 29 | #include <asm/pgtable_types.h> |
30 | #include <asm/page.h> | 30 | #include <asm/page_types.h> |
31 | #include <asm/boot.h> | 31 | #include <asm/boot.h> |
32 | #include <asm/msr.h> | 32 | #include <asm/msr.h> |
33 | #include <asm/processor-flags.h> | 33 | #include <asm/processor-flags.h> |
@@ -35,9 +35,7 @@ | |||
35 | 35 | ||
36 | .section ".text.head" | 36 | .section ".text.head" |
37 | .code32 | 37 | .code32 |
38 | .globl startup_32 | 38 | ENTRY(startup_32) |
39 | |||
40 | startup_32: | ||
41 | cld | 39 | cld |
42 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking | 40 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking |
43 | * us to not reload segments */ | 41 | * us to not reload segments */ |
@@ -176,6 +174,7 @@ startup_32: | |||
176 | 174 | ||
177 | /* Jump from 32bit compatibility mode into 64bit mode. */ | 175 | /* Jump from 32bit compatibility mode into 64bit mode. */ |
178 | lret | 176 | lret |
177 | ENDPROC(startup_32) | ||
179 | 178 | ||
180 | no_longmode: | 179 | no_longmode: |
181 | /* This isn't an x86-64 CPU so hang */ | 180 | /* This isn't an x86-64 CPU so hang */ |
@@ -295,7 +294,6 @@ relocated: | |||
295 | call decompress_kernel | 294 | call decompress_kernel |
296 | popq %rsi | 295 | popq %rsi |
297 | 296 | ||
298 | |||
299 | /* | 297 | /* |
300 | * Jump to the decompressed kernel. | 298 | * Jump to the decompressed kernel. |
301 | */ | 299 | */ |
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c index da062216948a..e45be73684ff 100644 --- a/arch/x86/boot/compressed/misc.c +++ b/arch/x86/boot/compressed/misc.c | |||
@@ -116,71 +116,13 @@ | |||
116 | /* | 116 | /* |
117 | * gzip declarations | 117 | * gzip declarations |
118 | */ | 118 | */ |
119 | |||
120 | #define OF(args) args | ||
121 | #define STATIC static | 119 | #define STATIC static |
122 | 120 | ||
123 | #undef memset | 121 | #undef memset |
124 | #undef memcpy | 122 | #undef memcpy |
125 | #define memzero(s, n) memset((s), 0, (n)) | 123 | #define memzero(s, n) memset((s), 0, (n)) |
126 | 124 | ||
127 | typedef unsigned char uch; | ||
128 | typedef unsigned short ush; | ||
129 | typedef unsigned long ulg; | ||
130 | |||
131 | /* | ||
132 | * Window size must be at least 32k, and a power of two. | ||
133 | * We don't actually have a window just a huge output buffer, | ||
134 | * so we report a 2G window size, as that should always be | ||
135 | * larger than our output buffer: | ||
136 | */ | ||
137 | #define WSIZE 0x80000000 | ||
138 | |||
139 | /* Input buffer: */ | ||
140 | static unsigned char *inbuf; | ||
141 | |||
142 | /* Sliding window buffer (and final output buffer): */ | ||
143 | static unsigned char *window; | ||
144 | |||
145 | /* Valid bytes in inbuf: */ | ||
146 | static unsigned insize; | ||
147 | |||
148 | /* Index of next byte to be processed in inbuf: */ | ||
149 | static unsigned inptr; | ||
150 | |||
151 | /* Bytes in output buffer: */ | ||
152 | static unsigned outcnt; | ||
153 | |||
154 | /* gzip flag byte */ | ||
155 | #define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */ | ||
156 | #define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gz file */ | ||
157 | #define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */ | ||
158 | #define ORIG_NAM 0x08 /* bit 3 set: original file name present */ | ||
159 | #define COMMENT 0x10 /* bit 4 set: file comment present */ | ||
160 | #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */ | ||
161 | #define RESERVED 0xC0 /* bit 6, 7: reserved */ | ||
162 | |||
163 | #define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) | ||
164 | |||
165 | /* Diagnostic functions */ | ||
166 | #ifdef DEBUG | ||
167 | # define Assert(cond, msg) do { if (!(cond)) error(msg); } while (0) | ||
168 | # define Trace(x) do { fprintf x; } while (0) | ||
169 | # define Tracev(x) do { if (verbose) fprintf x ; } while (0) | ||
170 | # define Tracevv(x) do { if (verbose > 1) fprintf x ; } while (0) | ||
171 | # define Tracec(c, x) do { if (verbose && (c)) fprintf x ; } while (0) | ||
172 | # define Tracecv(c, x) do { if (verbose > 1 && (c)) fprintf x ; } while (0) | ||
173 | #else | ||
174 | # define Assert(cond, msg) | ||
175 | # define Trace(x) | ||
176 | # define Tracev(x) | ||
177 | # define Tracevv(x) | ||
178 | # define Tracec(c, x) | ||
179 | # define Tracecv(c, x) | ||
180 | #endif | ||
181 | 125 | ||
182 | static int fill_inbuf(void); | ||
183 | static void flush_window(void); | ||
184 | static void error(char *m); | 126 | static void error(char *m); |
185 | 127 | ||
186 | /* | 128 | /* |
@@ -189,13 +131,8 @@ static void error(char *m); | |||
189 | static struct boot_params *real_mode; /* Pointer to real-mode data */ | 131 | static struct boot_params *real_mode; /* Pointer to real-mode data */ |
190 | static int quiet; | 132 | static int quiet; |
191 | 133 | ||
192 | extern unsigned char input_data[]; | ||
193 | extern int input_len; | ||
194 | |||
195 | static long bytes_out; | ||
196 | |||
197 | static void *memset(void *s, int c, unsigned n); | 134 | static void *memset(void *s, int c, unsigned n); |
198 | static void *memcpy(void *dest, const void *src, unsigned n); | 135 | void *memcpy(void *dest, const void *src, unsigned n); |
199 | 136 | ||
200 | static void __putstr(int, const char *); | 137 | static void __putstr(int, const char *); |
201 | #define putstr(__x) __putstr(0, __x) | 138 | #define putstr(__x) __putstr(0, __x) |
@@ -213,7 +150,17 @@ static char *vidmem; | |||
213 | static int vidport; | 150 | static int vidport; |
214 | static int lines, cols; | 151 | static int lines, cols; |
215 | 152 | ||
216 | #include "../../../../lib/inflate.c" | 153 | #ifdef CONFIG_KERNEL_GZIP |
154 | #include "../../../../lib/decompress_inflate.c" | ||
155 | #endif | ||
156 | |||
157 | #ifdef CONFIG_KERNEL_BZIP2 | ||
158 | #include "../../../../lib/decompress_bunzip2.c" | ||
159 | #endif | ||
160 | |||
161 | #ifdef CONFIG_KERNEL_LZMA | ||
162 | #include "../../../../lib/decompress_unlzma.c" | ||
163 | #endif | ||
217 | 164 | ||
218 | static void scroll(void) | 165 | static void scroll(void) |
219 | { | 166 | { |
@@ -282,7 +229,7 @@ static void *memset(void *s, int c, unsigned n) | |||
282 | return s; | 229 | return s; |
283 | } | 230 | } |
284 | 231 | ||
285 | static void *memcpy(void *dest, const void *src, unsigned n) | 232 | void *memcpy(void *dest, const void *src, unsigned n) |
286 | { | 233 | { |
287 | int i; | 234 | int i; |
288 | const char *s = src; | 235 | const char *s = src; |
@@ -293,38 +240,6 @@ static void *memcpy(void *dest, const void *src, unsigned n) | |||
293 | return dest; | 240 | return dest; |
294 | } | 241 | } |
295 | 242 | ||
296 | /* =========================================================================== | ||
297 | * Fill the input buffer. This is called only when the buffer is empty | ||
298 | * and at least one byte is really needed. | ||
299 | */ | ||
300 | static int fill_inbuf(void) | ||
301 | { | ||
302 | error("ran out of input data"); | ||
303 | return 0; | ||
304 | } | ||
305 | |||
306 | /* =========================================================================== | ||
307 | * Write the output window window[0..outcnt-1] and update crc and bytes_out. | ||
308 | * (Used for the decompressed data only.) | ||
309 | */ | ||
310 | static void flush_window(void) | ||
311 | { | ||
312 | /* With my window equal to my output buffer | ||
313 | * I only need to compute the crc here. | ||
314 | */ | ||
315 | unsigned long c = crc; /* temporary variable */ | ||
316 | unsigned n; | ||
317 | unsigned char *in, ch; | ||
318 | |||
319 | in = window; | ||
320 | for (n = 0; n < outcnt; n++) { | ||
321 | ch = *in++; | ||
322 | c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); | ||
323 | } | ||
324 | crc = c; | ||
325 | bytes_out += (unsigned long)outcnt; | ||
326 | outcnt = 0; | ||
327 | } | ||
328 | 243 | ||
329 | static void error(char *x) | 244 | static void error(char *x) |
330 | { | 245 | { |
@@ -407,12 +322,8 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, | |||
407 | lines = real_mode->screen_info.orig_video_lines; | 322 | lines = real_mode->screen_info.orig_video_lines; |
408 | cols = real_mode->screen_info.orig_video_cols; | 323 | cols = real_mode->screen_info.orig_video_cols; |
409 | 324 | ||
410 | window = output; /* Output buffer (Normally at 1M) */ | ||
411 | free_mem_ptr = heap; /* Heap */ | 325 | free_mem_ptr = heap; /* Heap */ |
412 | free_mem_end_ptr = heap + BOOT_HEAP_SIZE; | 326 | free_mem_end_ptr = heap + BOOT_HEAP_SIZE; |
413 | inbuf = input_data; /* Input buffer */ | ||
414 | insize = input_len; | ||
415 | inptr = 0; | ||
416 | 327 | ||
417 | #ifdef CONFIG_X86_64 | 328 | #ifdef CONFIG_X86_64 |
418 | if ((unsigned long)output & (__KERNEL_ALIGN - 1)) | 329 | if ((unsigned long)output & (__KERNEL_ALIGN - 1)) |
@@ -430,10 +341,9 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, | |||
430 | #endif | 341 | #endif |
431 | #endif | 342 | #endif |
432 | 343 | ||
433 | makecrc(); | ||
434 | if (!quiet) | 344 | if (!quiet) |
435 | putstr("\nDecompressing Linux... "); | 345 | putstr("\nDecompressing Linux... "); |
436 | gunzip(); | 346 | decompress(input_data, input_len, NULL, NULL, output, NULL, error); |
437 | parse_elf(output); | 347 | parse_elf(output); |
438 | if (!quiet) | 348 | if (!quiet) |
439 | putstr("done.\nBooting the kernel.\n"); | 349 | putstr("done.\nBooting the kernel.\n"); |
diff --git a/arch/x86/boot/copy.S b/arch/x86/boot/copy.S index ef50c84e8b4b..11f272c6f5e9 100644 --- a/arch/x86/boot/copy.S +++ b/arch/x86/boot/copy.S | |||
@@ -8,6 +8,8 @@ | |||
8 | * | 8 | * |
9 | * ----------------------------------------------------------------------- */ | 9 | * ----------------------------------------------------------------------- */ |
10 | 10 | ||
11 | #include <linux/linkage.h> | ||
12 | |||
11 | /* | 13 | /* |
12 | * Memory copy routines | 14 | * Memory copy routines |
13 | */ | 15 | */ |
@@ -15,9 +17,7 @@ | |||
15 | .code16gcc | 17 | .code16gcc |
16 | .text | 18 | .text |
17 | 19 | ||
18 | .globl memcpy | 20 | GLOBAL(memcpy) |
19 | .type memcpy, @function | ||
20 | memcpy: | ||
21 | pushw %si | 21 | pushw %si |
22 | pushw %di | 22 | pushw %di |
23 | movw %ax, %di | 23 | movw %ax, %di |
@@ -31,11 +31,9 @@ memcpy: | |||
31 | popw %di | 31 | popw %di |
32 | popw %si | 32 | popw %si |
33 | ret | 33 | ret |
34 | .size memcpy, .-memcpy | 34 | ENDPROC(memcpy) |
35 | 35 | ||
36 | .globl memset | 36 | GLOBAL(memset) |
37 | .type memset, @function | ||
38 | memset: | ||
39 | pushw %di | 37 | pushw %di |
40 | movw %ax, %di | 38 | movw %ax, %di |
41 | movzbl %dl, %eax | 39 | movzbl %dl, %eax |
@@ -48,52 +46,42 @@ memset: | |||
48 | rep; stosb | 46 | rep; stosb |
49 | popw %di | 47 | popw %di |
50 | ret | 48 | ret |
51 | .size memset, .-memset | 49 | ENDPROC(memset) |
52 | 50 | ||
53 | .globl copy_from_fs | 51 | GLOBAL(copy_from_fs) |
54 | .type copy_from_fs, @function | ||
55 | copy_from_fs: | ||
56 | pushw %ds | 52 | pushw %ds |
57 | pushw %fs | 53 | pushw %fs |
58 | popw %ds | 54 | popw %ds |
59 | call memcpy | 55 | call memcpy |
60 | popw %ds | 56 | popw %ds |
61 | ret | 57 | ret |
62 | .size copy_from_fs, .-copy_from_fs | 58 | ENDPROC(copy_from_fs) |
63 | 59 | ||
64 | .globl copy_to_fs | 60 | GLOBAL(copy_to_fs) |
65 | .type copy_to_fs, @function | ||
66 | copy_to_fs: | ||
67 | pushw %es | 61 | pushw %es |
68 | pushw %fs | 62 | pushw %fs |
69 | popw %es | 63 | popw %es |
70 | call memcpy | 64 | call memcpy |
71 | popw %es | 65 | popw %es |
72 | ret | 66 | ret |
73 | .size copy_to_fs, .-copy_to_fs | 67 | ENDPROC(copy_to_fs) |
74 | 68 | ||
75 | #if 0 /* Not currently used, but can be enabled as needed */ | 69 | #if 0 /* Not currently used, but can be enabled as needed */ |
76 | 70 | GLOBAL(copy_from_gs) | |
77 | .globl copy_from_gs | ||
78 | .type copy_from_gs, @function | ||
79 | copy_from_gs: | ||
80 | pushw %ds | 71 | pushw %ds |
81 | pushw %gs | 72 | pushw %gs |
82 | popw %ds | 73 | popw %ds |
83 | call memcpy | 74 | call memcpy |
84 | popw %ds | 75 | popw %ds |
85 | ret | 76 | ret |
86 | .size copy_from_gs, .-copy_from_gs | 77 | ENDPROC(copy_from_gs) |
87 | .globl copy_to_gs | ||
88 | 78 | ||
89 | .type copy_to_gs, @function | 79 | GLOBAL(copy_to_gs) |
90 | copy_to_gs: | ||
91 | pushw %es | 80 | pushw %es |
92 | pushw %gs | 81 | pushw %gs |
93 | popw %es | 82 | popw %es |
94 | call memcpy | 83 | call memcpy |
95 | popw %es | 84 | popw %es |
96 | ret | 85 | ret |
97 | .size copy_to_gs, .-copy_to_gs | 86 | ENDPROC(copy_to_gs) |
98 | |||
99 | #endif | 87 | #endif |
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S index b993062e9a5f..7ccff4884a23 100644 --- a/arch/x86/boot/header.S +++ b/arch/x86/boot/header.S | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/utsrelease.h> | 19 | #include <linux/utsrelease.h> |
20 | #include <asm/boot.h> | 20 | #include <asm/boot.h> |
21 | #include <asm/e820.h> | 21 | #include <asm/e820.h> |
22 | #include <asm/page.h> | 22 | #include <asm/page_types.h> |
23 | #include <asm/setup.h> | 23 | #include <asm/setup.h> |
24 | #include "boot.h" | 24 | #include "boot.h" |
25 | #include "offsets.h" | 25 | #include "offsets.h" |
diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c index 197421db1af1..58f0415d3ae0 100644 --- a/arch/x86/boot/main.c +++ b/arch/x86/boot/main.c | |||
@@ -149,11 +149,6 @@ void main(void) | |||
149 | /* Query MCA information */ | 149 | /* Query MCA information */ |
150 | query_mca(); | 150 | query_mca(); |
151 | 151 | ||
152 | /* Voyager */ | ||
153 | #ifdef CONFIG_X86_VOYAGER | ||
154 | query_voyager(); | ||
155 | #endif | ||
156 | |||
157 | /* Query Intel SpeedStep (IST) information */ | 152 | /* Query Intel SpeedStep (IST) information */ |
158 | query_ist(); | 153 | query_ist(); |
159 | 154 | ||
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S index 141b6e20ed31..019c17a75851 100644 --- a/arch/x86/boot/pmjump.S +++ b/arch/x86/boot/pmjump.S | |||
@@ -15,18 +15,15 @@ | |||
15 | #include <asm/boot.h> | 15 | #include <asm/boot.h> |
16 | #include <asm/processor-flags.h> | 16 | #include <asm/processor-flags.h> |
17 | #include <asm/segment.h> | 17 | #include <asm/segment.h> |
18 | #include <linux/linkage.h> | ||
18 | 19 | ||
19 | .text | 20 | .text |
20 | |||
21 | .globl protected_mode_jump | ||
22 | .type protected_mode_jump, @function | ||
23 | |||
24 | .code16 | 21 | .code16 |
25 | 22 | ||
26 | /* | 23 | /* |
27 | * void protected_mode_jump(u32 entrypoint, u32 bootparams); | 24 | * void protected_mode_jump(u32 entrypoint, u32 bootparams); |
28 | */ | 25 | */ |
29 | protected_mode_jump: | 26 | GLOBAL(protected_mode_jump) |
30 | movl %edx, %esi # Pointer to boot_params table | 27 | movl %edx, %esi # Pointer to boot_params table |
31 | 28 | ||
32 | xorl %ebx, %ebx | 29 | xorl %ebx, %ebx |
@@ -47,12 +44,10 @@ protected_mode_jump: | |||
47 | .byte 0x66, 0xea # ljmpl opcode | 44 | .byte 0x66, 0xea # ljmpl opcode |
48 | 2: .long in_pm32 # offset | 45 | 2: .long in_pm32 # offset |
49 | .word __BOOT_CS # segment | 46 | .word __BOOT_CS # segment |
50 | 47 | ENDPROC(protected_mode_jump) | |
51 | .size protected_mode_jump, .-protected_mode_jump | ||
52 | 48 | ||
53 | .code32 | 49 | .code32 |
54 | .type in_pm32, @function | 50 | GLOBAL(in_pm32) |
55 | in_pm32: | ||
56 | # Set up data segments for flat 32-bit mode | 51 | # Set up data segments for flat 32-bit mode |
57 | movl %ecx, %ds | 52 | movl %ecx, %ds |
58 | movl %ecx, %es | 53 | movl %ecx, %es |
@@ -78,5 +73,4 @@ in_pm32: | |||
78 | lldt %cx | 73 | lldt %cx |
79 | 74 | ||
80 | jmpl *%eax # Jump to the 32-bit entrypoint | 75 | jmpl *%eax # Jump to the 32-bit entrypoint |
81 | 76 | ENDPROC(in_pm32) | |
82 | .size in_pm32, .-in_pm32 | ||
diff --git a/arch/x86/boot/voyager.c b/arch/x86/boot/voyager.c deleted file mode 100644 index 433909d61e5c..000000000000 --- a/arch/x86/boot/voyager.c +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* -*- linux-c -*- ------------------------------------------------------- * | ||
2 | * | ||
3 | * Copyright (C) 1991, 1992 Linus Torvalds | ||
4 | * Copyright 2007 rPath, Inc. - All Rights Reserved | ||
5 | * | ||
6 | * This file is part of the Linux kernel, and is made available under | ||
7 | * the terms of the GNU General Public License version 2. | ||
8 | * | ||
9 | * ----------------------------------------------------------------------- */ | ||
10 | |||
11 | /* | ||
12 | * Get the Voyager config information | ||
13 | */ | ||
14 | |||
15 | #include "boot.h" | ||
16 | |||
17 | int query_voyager(void) | ||
18 | { | ||
19 | u8 err; | ||
20 | u16 es, di; | ||
21 | /* Abuse the apm_bios_info area for this */ | ||
22 | u8 *data_ptr = (u8 *)&boot_params.apm_bios_info; | ||
23 | |||
24 | data_ptr[0] = 0xff; /* Flag on config not found(?) */ | ||
25 | |||
26 | asm("pushw %%es ; " | ||
27 | "int $0x15 ; " | ||
28 | "setc %0 ; " | ||
29 | "movw %%es, %1 ; " | ||
30 | "popw %%es" | ||
31 | : "=q" (err), "=r" (es), "=D" (di) | ||
32 | : "a" (0xffc0)); | ||
33 | |||
34 | if (err) | ||
35 | return -1; /* Not Voyager */ | ||
36 | |||
37 | set_fs(es); | ||
38 | copy_from_fs(data_ptr, di, 7); /* Table is 7 bytes apparently */ | ||
39 | return 0; | ||
40 | } | ||
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig index edba00d98ac3..235b81d0f6f2 100644 --- a/arch/x86/configs/i386_defconfig +++ b/arch/x86/configs/i386_defconfig | |||
@@ -1,14 +1,13 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.27-rc5 | 3 | # Linux kernel version: 2.6.29-rc4 |
4 | # Wed Sep 3 17:23:09 2008 | 4 | # Tue Feb 24 15:50:58 2009 |
5 | # | 5 | # |
6 | # CONFIG_64BIT is not set | 6 | # CONFIG_64BIT is not set |
7 | CONFIG_X86_32=y | 7 | CONFIG_X86_32=y |
8 | # CONFIG_X86_64 is not set | 8 | # CONFIG_X86_64 is not set |
9 | CONFIG_X86=y | 9 | CONFIG_X86=y |
10 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" | 10 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" |
11 | # CONFIG_GENERIC_LOCKBREAK is not set | ||
12 | CONFIG_GENERIC_TIME=y | 11 | CONFIG_GENERIC_TIME=y |
13 | CONFIG_GENERIC_CMOS_UPDATE=y | 12 | CONFIG_GENERIC_CMOS_UPDATE=y |
14 | CONFIG_CLOCKSOURCE_WATCHDOG=y | 13 | CONFIG_CLOCKSOURCE_WATCHDOG=y |
@@ -24,16 +23,14 @@ CONFIG_GENERIC_ISA_DMA=y | |||
24 | CONFIG_GENERIC_IOMAP=y | 23 | CONFIG_GENERIC_IOMAP=y |
25 | CONFIG_GENERIC_BUG=y | 24 | CONFIG_GENERIC_BUG=y |
26 | CONFIG_GENERIC_HWEIGHT=y | 25 | CONFIG_GENERIC_HWEIGHT=y |
27 | # CONFIG_GENERIC_GPIO is not set | ||
28 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | 26 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y |
29 | # CONFIG_RWSEM_GENERIC_SPINLOCK is not set | 27 | # CONFIG_RWSEM_GENERIC_SPINLOCK is not set |
30 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 28 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
31 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
32 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
33 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | 29 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y |
34 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 30 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
35 | # CONFIG_GENERIC_TIME_VSYSCALL is not set | 31 | # CONFIG_GENERIC_TIME_VSYSCALL is not set |
36 | CONFIG_ARCH_HAS_CPU_RELAX=y | 32 | CONFIG_ARCH_HAS_CPU_RELAX=y |
33 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | ||
37 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y | 34 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y |
38 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y | 35 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y |
39 | # CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set | 36 | # CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set |
@@ -42,12 +39,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y | |||
42 | # CONFIG_ZONE_DMA32 is not set | 39 | # CONFIG_ZONE_DMA32 is not set |
43 | CONFIG_ARCH_POPULATES_NODE_MAP=y | 40 | CONFIG_ARCH_POPULATES_NODE_MAP=y |
44 | # CONFIG_AUDIT_ARCH is not set | 41 | # CONFIG_AUDIT_ARCH is not set |
45 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
46 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y | 42 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y |
47 | CONFIG_GENERIC_HARDIRQS=y | 43 | CONFIG_GENERIC_HARDIRQS=y |
48 | CONFIG_GENERIC_IRQ_PROBE=y | 44 | CONFIG_GENERIC_IRQ_PROBE=y |
49 | CONFIG_GENERIC_PENDING_IRQ=y | 45 | CONFIG_GENERIC_PENDING_IRQ=y |
50 | CONFIG_X86_SMP=y | 46 | CONFIG_X86_SMP=y |
47 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
51 | CONFIG_X86_32_SMP=y | 48 | CONFIG_X86_32_SMP=y |
52 | CONFIG_X86_HT=y | 49 | CONFIG_X86_HT=y |
53 | CONFIG_X86_BIOS_REBOOT=y | 50 | CONFIG_X86_BIOS_REBOOT=y |
@@ -76,30 +73,44 @@ CONFIG_TASK_IO_ACCOUNTING=y | |||
76 | CONFIG_AUDIT=y | 73 | CONFIG_AUDIT=y |
77 | CONFIG_AUDITSYSCALL=y | 74 | CONFIG_AUDITSYSCALL=y |
78 | CONFIG_AUDIT_TREE=y | 75 | CONFIG_AUDIT_TREE=y |
76 | |||
77 | # | ||
78 | # RCU Subsystem | ||
79 | # | ||
80 | # CONFIG_CLASSIC_RCU is not set | ||
81 | CONFIG_TREE_RCU=y | ||
82 | # CONFIG_PREEMPT_RCU is not set | ||
83 | # CONFIG_RCU_TRACE is not set | ||
84 | CONFIG_RCU_FANOUT=32 | ||
85 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
86 | # CONFIG_TREE_RCU_TRACE is not set | ||
87 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
79 | # CONFIG_IKCONFIG is not set | 88 | # CONFIG_IKCONFIG is not set |
80 | CONFIG_LOG_BUF_SHIFT=18 | 89 | CONFIG_LOG_BUF_SHIFT=18 |
81 | CONFIG_CGROUPS=y | ||
82 | # CONFIG_CGROUP_DEBUG is not set | ||
83 | CONFIG_CGROUP_NS=y | ||
84 | # CONFIG_CGROUP_DEVICE is not set | ||
85 | CONFIG_CPUSETS=y | ||
86 | CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y | 90 | CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y |
87 | CONFIG_GROUP_SCHED=y | 91 | CONFIG_GROUP_SCHED=y |
88 | CONFIG_FAIR_GROUP_SCHED=y | 92 | CONFIG_FAIR_GROUP_SCHED=y |
89 | # CONFIG_RT_GROUP_SCHED is not set | 93 | # CONFIG_RT_GROUP_SCHED is not set |
90 | # CONFIG_USER_SCHED is not set | 94 | # CONFIG_USER_SCHED is not set |
91 | CONFIG_CGROUP_SCHED=y | 95 | CONFIG_CGROUP_SCHED=y |
96 | CONFIG_CGROUPS=y | ||
97 | # CONFIG_CGROUP_DEBUG is not set | ||
98 | CONFIG_CGROUP_NS=y | ||
99 | CONFIG_CGROUP_FREEZER=y | ||
100 | # CONFIG_CGROUP_DEVICE is not set | ||
101 | CONFIG_CPUSETS=y | ||
102 | CONFIG_PROC_PID_CPUSET=y | ||
92 | CONFIG_CGROUP_CPUACCT=y | 103 | CONFIG_CGROUP_CPUACCT=y |
93 | CONFIG_RESOURCE_COUNTERS=y | 104 | CONFIG_RESOURCE_COUNTERS=y |
94 | # CONFIG_CGROUP_MEM_RES_CTLR is not set | 105 | # CONFIG_CGROUP_MEM_RES_CTLR is not set |
95 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | 106 | # CONFIG_SYSFS_DEPRECATED_V2 is not set |
96 | CONFIG_PROC_PID_CPUSET=y | ||
97 | CONFIG_RELAY=y | 107 | CONFIG_RELAY=y |
98 | CONFIG_NAMESPACES=y | 108 | CONFIG_NAMESPACES=y |
99 | CONFIG_UTS_NS=y | 109 | CONFIG_UTS_NS=y |
100 | CONFIG_IPC_NS=y | 110 | CONFIG_IPC_NS=y |
101 | CONFIG_USER_NS=y | 111 | CONFIG_USER_NS=y |
102 | CONFIG_PID_NS=y | 112 | CONFIG_PID_NS=y |
113 | CONFIG_NET_NS=y | ||
103 | CONFIG_BLK_DEV_INITRD=y | 114 | CONFIG_BLK_DEV_INITRD=y |
104 | CONFIG_INITRAMFS_SOURCE="" | 115 | CONFIG_INITRAMFS_SOURCE="" |
105 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 116 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
@@ -124,12 +135,15 @@ CONFIG_SIGNALFD=y | |||
124 | CONFIG_TIMERFD=y | 135 | CONFIG_TIMERFD=y |
125 | CONFIG_EVENTFD=y | 136 | CONFIG_EVENTFD=y |
126 | CONFIG_SHMEM=y | 137 | CONFIG_SHMEM=y |
138 | CONFIG_AIO=y | ||
127 | CONFIG_VM_EVENT_COUNTERS=y | 139 | CONFIG_VM_EVENT_COUNTERS=y |
140 | CONFIG_PCI_QUIRKS=y | ||
128 | CONFIG_SLUB_DEBUG=y | 141 | CONFIG_SLUB_DEBUG=y |
129 | # CONFIG_SLAB is not set | 142 | # CONFIG_SLAB is not set |
130 | CONFIG_SLUB=y | 143 | CONFIG_SLUB=y |
131 | # CONFIG_SLOB is not set | 144 | # CONFIG_SLOB is not set |
132 | CONFIG_PROFILING=y | 145 | CONFIG_PROFILING=y |
146 | CONFIG_TRACEPOINTS=y | ||
133 | CONFIG_MARKERS=y | 147 | CONFIG_MARKERS=y |
134 | # CONFIG_OPROFILE is not set | 148 | # CONFIG_OPROFILE is not set |
135 | CONFIG_HAVE_OPROFILE=y | 149 | CONFIG_HAVE_OPROFILE=y |
@@ -139,15 +153,10 @@ CONFIG_KRETPROBES=y | |||
139 | CONFIG_HAVE_IOREMAP_PROT=y | 153 | CONFIG_HAVE_IOREMAP_PROT=y |
140 | CONFIG_HAVE_KPROBES=y | 154 | CONFIG_HAVE_KPROBES=y |
141 | CONFIG_HAVE_KRETPROBES=y | 155 | CONFIG_HAVE_KRETPROBES=y |
142 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | 156 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
143 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
144 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
145 | # CONFIG_HAVE_CLK is not set | ||
146 | CONFIG_PROC_PAGE_MONITOR=y | ||
147 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 157 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
148 | CONFIG_SLABINFO=y | 158 | CONFIG_SLABINFO=y |
149 | CONFIG_RT_MUTEXES=y | 159 | CONFIG_RT_MUTEXES=y |
150 | # CONFIG_TINY_SHMEM is not set | ||
151 | CONFIG_BASE_SMALL=0 | 160 | CONFIG_BASE_SMALL=0 |
152 | CONFIG_MODULES=y | 161 | CONFIG_MODULES=y |
153 | # CONFIG_MODULE_FORCE_LOAD is not set | 162 | # CONFIG_MODULE_FORCE_LOAD is not set |
@@ -155,12 +164,10 @@ CONFIG_MODULE_UNLOAD=y | |||
155 | CONFIG_MODULE_FORCE_UNLOAD=y | 164 | CONFIG_MODULE_FORCE_UNLOAD=y |
156 | # CONFIG_MODVERSIONS is not set | 165 | # CONFIG_MODVERSIONS is not set |
157 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 166 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
158 | CONFIG_KMOD=y | ||
159 | CONFIG_STOP_MACHINE=y | 167 | CONFIG_STOP_MACHINE=y |
160 | CONFIG_BLOCK=y | 168 | CONFIG_BLOCK=y |
161 | # CONFIG_LBD is not set | 169 | # CONFIG_LBD is not set |
162 | CONFIG_BLK_DEV_IO_TRACE=y | 170 | CONFIG_BLK_DEV_IO_TRACE=y |
163 | # CONFIG_LSF is not set | ||
164 | CONFIG_BLK_DEV_BSG=y | 171 | CONFIG_BLK_DEV_BSG=y |
165 | # CONFIG_BLK_DEV_INTEGRITY is not set | 172 | # CONFIG_BLK_DEV_INTEGRITY is not set |
166 | 173 | ||
@@ -176,7 +183,7 @@ CONFIG_IOSCHED_CFQ=y | |||
176 | CONFIG_DEFAULT_CFQ=y | 183 | CONFIG_DEFAULT_CFQ=y |
177 | # CONFIG_DEFAULT_NOOP is not set | 184 | # CONFIG_DEFAULT_NOOP is not set |
178 | CONFIG_DEFAULT_IOSCHED="cfq" | 185 | CONFIG_DEFAULT_IOSCHED="cfq" |
179 | CONFIG_CLASSIC_RCU=y | 186 | CONFIG_FREEZER=y |
180 | 187 | ||
181 | # | 188 | # |
182 | # Processor type and features | 189 | # Processor type and features |
@@ -186,15 +193,14 @@ CONFIG_NO_HZ=y | |||
186 | CONFIG_HIGH_RES_TIMERS=y | 193 | CONFIG_HIGH_RES_TIMERS=y |
187 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 194 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
188 | CONFIG_SMP=y | 195 | CONFIG_SMP=y |
196 | CONFIG_SPARSE_IRQ=y | ||
189 | CONFIG_X86_FIND_SMP_CONFIG=y | 197 | CONFIG_X86_FIND_SMP_CONFIG=y |
190 | CONFIG_X86_MPPARSE=y | 198 | CONFIG_X86_MPPARSE=y |
191 | CONFIG_X86_PC=y | ||
192 | # CONFIG_X86_ELAN is not set | 199 | # CONFIG_X86_ELAN is not set |
193 | # CONFIG_X86_VOYAGER is not set | ||
194 | # CONFIG_X86_GENERICARCH is not set | 200 | # CONFIG_X86_GENERICARCH is not set |
195 | # CONFIG_X86_VSMP is not set | 201 | # CONFIG_X86_VSMP is not set |
196 | # CONFIG_X86_RDC321X is not set | 202 | # CONFIG_X86_RDC321X is not set |
197 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | 203 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
198 | # CONFIG_PARAVIRT_GUEST is not set | 204 | # CONFIG_PARAVIRT_GUEST is not set |
199 | # CONFIG_MEMTEST is not set | 205 | # CONFIG_MEMTEST is not set |
200 | # CONFIG_M386 is not set | 206 | # CONFIG_M386 is not set |
@@ -238,10 +244,19 @@ CONFIG_X86_TSC=y | |||
238 | CONFIG_X86_CMOV=y | 244 | CONFIG_X86_CMOV=y |
239 | CONFIG_X86_MINIMUM_CPU_FAMILY=4 | 245 | CONFIG_X86_MINIMUM_CPU_FAMILY=4 |
240 | CONFIG_X86_DEBUGCTLMSR=y | 246 | CONFIG_X86_DEBUGCTLMSR=y |
247 | CONFIG_CPU_SUP_INTEL=y | ||
248 | CONFIG_CPU_SUP_CYRIX_32=y | ||
249 | CONFIG_CPU_SUP_AMD=y | ||
250 | CONFIG_CPU_SUP_CENTAUR_32=y | ||
251 | CONFIG_CPU_SUP_TRANSMETA_32=y | ||
252 | CONFIG_CPU_SUP_UMC_32=y | ||
253 | CONFIG_X86_DS=y | ||
254 | CONFIG_X86_PTRACE_BTS=y | ||
241 | CONFIG_HPET_TIMER=y | 255 | CONFIG_HPET_TIMER=y |
242 | CONFIG_HPET_EMULATE_RTC=y | 256 | CONFIG_HPET_EMULATE_RTC=y |
243 | CONFIG_DMI=y | 257 | CONFIG_DMI=y |
244 | # CONFIG_IOMMU_HELPER is not set | 258 | # CONFIG_IOMMU_HELPER is not set |
259 | # CONFIG_IOMMU_API is not set | ||
245 | CONFIG_NR_CPUS=64 | 260 | CONFIG_NR_CPUS=64 |
246 | CONFIG_SCHED_SMT=y | 261 | CONFIG_SCHED_SMT=y |
247 | CONFIG_SCHED_MC=y | 262 | CONFIG_SCHED_MC=y |
@@ -250,12 +265,17 @@ CONFIG_PREEMPT_VOLUNTARY=y | |||
250 | # CONFIG_PREEMPT is not set | 265 | # CONFIG_PREEMPT is not set |
251 | CONFIG_X86_LOCAL_APIC=y | 266 | CONFIG_X86_LOCAL_APIC=y |
252 | CONFIG_X86_IO_APIC=y | 267 | CONFIG_X86_IO_APIC=y |
253 | # CONFIG_X86_MCE is not set | 268 | CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y |
269 | CONFIG_X86_MCE=y | ||
270 | CONFIG_X86_MCE_NONFATAL=y | ||
271 | CONFIG_X86_MCE_P4THERMAL=y | ||
254 | CONFIG_VM86=y | 272 | CONFIG_VM86=y |
255 | # CONFIG_TOSHIBA is not set | 273 | # CONFIG_TOSHIBA is not set |
256 | # CONFIG_I8K is not set | 274 | # CONFIG_I8K is not set |
257 | CONFIG_X86_REBOOTFIXUPS=y | 275 | CONFIG_X86_REBOOTFIXUPS=y |
258 | CONFIG_MICROCODE=y | 276 | CONFIG_MICROCODE=y |
277 | CONFIG_MICROCODE_INTEL=y | ||
278 | CONFIG_MICROCODE_AMD=y | ||
259 | CONFIG_MICROCODE_OLD_INTERFACE=y | 279 | CONFIG_MICROCODE_OLD_INTERFACE=y |
260 | CONFIG_X86_MSR=y | 280 | CONFIG_X86_MSR=y |
261 | CONFIG_X86_CPUID=y | 281 | CONFIG_X86_CPUID=y |
@@ -264,6 +284,7 @@ CONFIG_HIGHMEM4G=y | |||
264 | # CONFIG_HIGHMEM64G is not set | 284 | # CONFIG_HIGHMEM64G is not set |
265 | CONFIG_PAGE_OFFSET=0xC0000000 | 285 | CONFIG_PAGE_OFFSET=0xC0000000 |
266 | CONFIG_HIGHMEM=y | 286 | CONFIG_HIGHMEM=y |
287 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
267 | CONFIG_ARCH_FLATMEM_ENABLE=y | 288 | CONFIG_ARCH_FLATMEM_ENABLE=y |
268 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | 289 | CONFIG_ARCH_SPARSEMEM_ENABLE=y |
269 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | 290 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y |
@@ -274,14 +295,17 @@ CONFIG_FLATMEM_MANUAL=y | |||
274 | CONFIG_FLATMEM=y | 295 | CONFIG_FLATMEM=y |
275 | CONFIG_FLAT_NODE_MEM_MAP=y | 296 | CONFIG_FLAT_NODE_MEM_MAP=y |
276 | CONFIG_SPARSEMEM_STATIC=y | 297 | CONFIG_SPARSEMEM_STATIC=y |
277 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
278 | CONFIG_PAGEFLAGS_EXTENDED=y | 298 | CONFIG_PAGEFLAGS_EXTENDED=y |
279 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 299 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
280 | CONFIG_RESOURCES_64BIT=y | 300 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
281 | CONFIG_ZONE_DMA_FLAG=1 | 301 | CONFIG_ZONE_DMA_FLAG=1 |
282 | CONFIG_BOUNCE=y | 302 | CONFIG_BOUNCE=y |
283 | CONFIG_VIRT_TO_BUS=y | 303 | CONFIG_VIRT_TO_BUS=y |
304 | CONFIG_UNEVICTABLE_LRU=y | ||
284 | CONFIG_HIGHPTE=y | 305 | CONFIG_HIGHPTE=y |
306 | CONFIG_X86_CHECK_BIOS_CORRUPTION=y | ||
307 | CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y | ||
308 | CONFIG_X86_RESERVE_LOW_64K=y | ||
285 | # CONFIG_MATH_EMULATION is not set | 309 | # CONFIG_MATH_EMULATION is not set |
286 | CONFIG_MTRR=y | 310 | CONFIG_MTRR=y |
287 | # CONFIG_MTRR_SANITIZER is not set | 311 | # CONFIG_MTRR_SANITIZER is not set |
@@ -302,10 +326,11 @@ CONFIG_PHYSICAL_START=0x1000000 | |||
302 | CONFIG_PHYSICAL_ALIGN=0x200000 | 326 | CONFIG_PHYSICAL_ALIGN=0x200000 |
303 | CONFIG_HOTPLUG_CPU=y | 327 | CONFIG_HOTPLUG_CPU=y |
304 | # CONFIG_COMPAT_VDSO is not set | 328 | # CONFIG_COMPAT_VDSO is not set |
329 | # CONFIG_CMDLINE_BOOL is not set | ||
305 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | 330 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y |
306 | 331 | ||
307 | # | 332 | # |
308 | # Power management options | 333 | # Power management and ACPI options |
309 | # | 334 | # |
310 | CONFIG_PM=y | 335 | CONFIG_PM=y |
311 | CONFIG_PM_DEBUG=y | 336 | CONFIG_PM_DEBUG=y |
@@ -331,19 +356,13 @@ CONFIG_ACPI_BATTERY=y | |||
331 | CONFIG_ACPI_BUTTON=y | 356 | CONFIG_ACPI_BUTTON=y |
332 | CONFIG_ACPI_FAN=y | 357 | CONFIG_ACPI_FAN=y |
333 | CONFIG_ACPI_DOCK=y | 358 | CONFIG_ACPI_DOCK=y |
334 | # CONFIG_ACPI_BAY is not set | ||
335 | CONFIG_ACPI_PROCESSOR=y | 359 | CONFIG_ACPI_PROCESSOR=y |
336 | CONFIG_ACPI_HOTPLUG_CPU=y | 360 | CONFIG_ACPI_HOTPLUG_CPU=y |
337 | CONFIG_ACPI_THERMAL=y | 361 | CONFIG_ACPI_THERMAL=y |
338 | # CONFIG_ACPI_WMI is not set | ||
339 | # CONFIG_ACPI_ASUS is not set | ||
340 | # CONFIG_ACPI_TOSHIBA is not set | ||
341 | # CONFIG_ACPI_CUSTOM_DSDT is not set | 362 | # CONFIG_ACPI_CUSTOM_DSDT is not set |
342 | CONFIG_ACPI_BLACKLIST_YEAR=0 | 363 | CONFIG_ACPI_BLACKLIST_YEAR=0 |
343 | # CONFIG_ACPI_DEBUG is not set | 364 | # CONFIG_ACPI_DEBUG is not set |
344 | CONFIG_ACPI_EC=y | ||
345 | # CONFIG_ACPI_PCI_SLOT is not set | 365 | # CONFIG_ACPI_PCI_SLOT is not set |
346 | CONFIG_ACPI_POWER=y | ||
347 | CONFIG_ACPI_SYSTEM=y | 366 | CONFIG_ACPI_SYSTEM=y |
348 | CONFIG_X86_PM_TIMER=y | 367 | CONFIG_X86_PM_TIMER=y |
349 | CONFIG_ACPI_CONTAINER=y | 368 | CONFIG_ACPI_CONTAINER=y |
@@ -388,7 +407,6 @@ CONFIG_X86_ACPI_CPUFREQ=y | |||
388 | # | 407 | # |
389 | # shared options | 408 | # shared options |
390 | # | 409 | # |
391 | # CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set | ||
392 | # CONFIG_X86_SPEEDSTEP_LIB is not set | 410 | # CONFIG_X86_SPEEDSTEP_LIB is not set |
393 | CONFIG_CPU_IDLE=y | 411 | CONFIG_CPU_IDLE=y |
394 | CONFIG_CPU_IDLE_GOV_LADDER=y | 412 | CONFIG_CPU_IDLE_GOV_LADDER=y |
@@ -415,6 +433,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y | |||
415 | CONFIG_PCI_MSI=y | 433 | CONFIG_PCI_MSI=y |
416 | # CONFIG_PCI_LEGACY is not set | 434 | # CONFIG_PCI_LEGACY is not set |
417 | # CONFIG_PCI_DEBUG is not set | 435 | # CONFIG_PCI_DEBUG is not set |
436 | # CONFIG_PCI_STUB is not set | ||
418 | CONFIG_HT_IRQ=y | 437 | CONFIG_HT_IRQ=y |
419 | CONFIG_ISA_DMA_API=y | 438 | CONFIG_ISA_DMA_API=y |
420 | # CONFIG_ISA is not set | 439 | # CONFIG_ISA is not set |
@@ -452,13 +471,17 @@ CONFIG_HOTPLUG_PCI=y | |||
452 | # Executable file formats / Emulations | 471 | # Executable file formats / Emulations |
453 | # | 472 | # |
454 | CONFIG_BINFMT_ELF=y | 473 | CONFIG_BINFMT_ELF=y |
474 | CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y | ||
475 | CONFIG_HAVE_AOUT=y | ||
455 | # CONFIG_BINFMT_AOUT is not set | 476 | # CONFIG_BINFMT_AOUT is not set |
456 | CONFIG_BINFMT_MISC=y | 477 | CONFIG_BINFMT_MISC=y |
478 | CONFIG_HAVE_ATOMIC_IOMAP=y | ||
457 | CONFIG_NET=y | 479 | CONFIG_NET=y |
458 | 480 | ||
459 | # | 481 | # |
460 | # Networking options | 482 | # Networking options |
461 | # | 483 | # |
484 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
462 | CONFIG_PACKET=y | 485 | CONFIG_PACKET=y |
463 | CONFIG_PACKET_MMAP=y | 486 | CONFIG_PACKET_MMAP=y |
464 | CONFIG_UNIX=y | 487 | CONFIG_UNIX=y |
@@ -519,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y | |||
519 | # CONFIG_DEFAULT_RENO is not set | 542 | # CONFIG_DEFAULT_RENO is not set |
520 | CONFIG_DEFAULT_TCP_CONG="cubic" | 543 | CONFIG_DEFAULT_TCP_CONG="cubic" |
521 | CONFIG_TCP_MD5SIG=y | 544 | CONFIG_TCP_MD5SIG=y |
522 | # CONFIG_IP_VS is not set | ||
523 | CONFIG_IPV6=y | 545 | CONFIG_IPV6=y |
524 | # CONFIG_IPV6_PRIVACY is not set | 546 | # CONFIG_IPV6_PRIVACY is not set |
525 | # CONFIG_IPV6_ROUTER_PREF is not set | 547 | # CONFIG_IPV6_ROUTER_PREF is not set |
@@ -557,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y | |||
557 | CONFIG_NF_CONNTRACK_SIP=y | 579 | CONFIG_NF_CONNTRACK_SIP=y |
558 | CONFIG_NF_CT_NETLINK=y | 580 | CONFIG_NF_CT_NETLINK=y |
559 | CONFIG_NETFILTER_XTABLES=y | 581 | CONFIG_NETFILTER_XTABLES=y |
582 | CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y | ||
560 | CONFIG_NETFILTER_XT_TARGET_MARK=y | 583 | CONFIG_NETFILTER_XT_TARGET_MARK=y |
561 | CONFIG_NETFILTER_XT_TARGET_NFLOG=y | 584 | CONFIG_NETFILTER_XT_TARGET_NFLOG=y |
562 | CONFIG_NETFILTER_XT_TARGET_SECMARK=y | 585 | CONFIG_NETFILTER_XT_TARGET_SECMARK=y |
563 | CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y | ||
564 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=y | 586 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=y |
565 | CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y | 587 | CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y |
566 | CONFIG_NETFILTER_XT_MATCH_MARK=y | 588 | CONFIG_NETFILTER_XT_MATCH_MARK=y |
567 | CONFIG_NETFILTER_XT_MATCH_POLICY=y | 589 | CONFIG_NETFILTER_XT_MATCH_POLICY=y |
568 | CONFIG_NETFILTER_XT_MATCH_STATE=y | 590 | CONFIG_NETFILTER_XT_MATCH_STATE=y |
591 | # CONFIG_IP_VS is not set | ||
569 | 592 | ||
570 | # | 593 | # |
571 | # IP: Netfilter Configuration | 594 | # IP: Netfilter Configuration |
572 | # | 595 | # |
596 | CONFIG_NF_DEFRAG_IPV4=y | ||
573 | CONFIG_NF_CONNTRACK_IPV4=y | 597 | CONFIG_NF_CONNTRACK_IPV4=y |
574 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | 598 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y |
575 | CONFIG_IP_NF_IPTABLES=y | 599 | CONFIG_IP_NF_IPTABLES=y |
@@ -595,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y | |||
595 | CONFIG_NF_CONNTRACK_IPV6=y | 619 | CONFIG_NF_CONNTRACK_IPV6=y |
596 | CONFIG_IP6_NF_IPTABLES=y | 620 | CONFIG_IP6_NF_IPTABLES=y |
597 | CONFIG_IP6_NF_MATCH_IPV6HEADER=y | 621 | CONFIG_IP6_NF_MATCH_IPV6HEADER=y |
598 | CONFIG_IP6_NF_FILTER=y | ||
599 | CONFIG_IP6_NF_TARGET_LOG=y | 622 | CONFIG_IP6_NF_TARGET_LOG=y |
623 | CONFIG_IP6_NF_FILTER=y | ||
600 | CONFIG_IP6_NF_TARGET_REJECT=y | 624 | CONFIG_IP6_NF_TARGET_REJECT=y |
601 | CONFIG_IP6_NF_MANGLE=y | 625 | CONFIG_IP6_NF_MANGLE=y |
602 | # CONFIG_IP_DCCP is not set | 626 | # CONFIG_IP_DCCP is not set |
@@ -604,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y | |||
604 | # CONFIG_TIPC is not set | 628 | # CONFIG_TIPC is not set |
605 | # CONFIG_ATM is not set | 629 | # CONFIG_ATM is not set |
606 | # CONFIG_BRIDGE is not set | 630 | # CONFIG_BRIDGE is not set |
631 | # CONFIG_NET_DSA is not set | ||
607 | # CONFIG_VLAN_8021Q is not set | 632 | # CONFIG_VLAN_8021Q is not set |
608 | # CONFIG_DECNET is not set | 633 | # CONFIG_DECNET is not set |
609 | CONFIG_LLC=y | 634 | CONFIG_LLC=y |
@@ -623,6 +648,7 @@ CONFIG_NET_SCHED=y | |||
623 | # CONFIG_NET_SCH_HTB is not set | 648 | # CONFIG_NET_SCH_HTB is not set |
624 | # CONFIG_NET_SCH_HFSC is not set | 649 | # CONFIG_NET_SCH_HFSC is not set |
625 | # CONFIG_NET_SCH_PRIO is not set | 650 | # CONFIG_NET_SCH_PRIO is not set |
651 | # CONFIG_NET_SCH_MULTIQ is not set | ||
626 | # CONFIG_NET_SCH_RED is not set | 652 | # CONFIG_NET_SCH_RED is not set |
627 | # CONFIG_NET_SCH_SFQ is not set | 653 | # CONFIG_NET_SCH_SFQ is not set |
628 | # CONFIG_NET_SCH_TEQL is not set | 654 | # CONFIG_NET_SCH_TEQL is not set |
@@ -630,6 +656,7 @@ CONFIG_NET_SCHED=y | |||
630 | # CONFIG_NET_SCH_GRED is not set | 656 | # CONFIG_NET_SCH_GRED is not set |
631 | # CONFIG_NET_SCH_DSMARK is not set | 657 | # CONFIG_NET_SCH_DSMARK is not set |
632 | # CONFIG_NET_SCH_NETEM is not set | 658 | # CONFIG_NET_SCH_NETEM is not set |
659 | # CONFIG_NET_SCH_DRR is not set | ||
633 | # CONFIG_NET_SCH_INGRESS is not set | 660 | # CONFIG_NET_SCH_INGRESS is not set |
634 | 661 | ||
635 | # | 662 | # |
@@ -644,6 +671,7 @@ CONFIG_NET_CLS=y | |||
644 | # CONFIG_NET_CLS_RSVP is not set | 671 | # CONFIG_NET_CLS_RSVP is not set |
645 | # CONFIG_NET_CLS_RSVP6 is not set | 672 | # CONFIG_NET_CLS_RSVP6 is not set |
646 | # CONFIG_NET_CLS_FLOW is not set | 673 | # CONFIG_NET_CLS_FLOW is not set |
674 | # CONFIG_NET_CLS_CGROUP is not set | ||
647 | CONFIG_NET_EMATCH=y | 675 | CONFIG_NET_EMATCH=y |
648 | CONFIG_NET_EMATCH_STACK=32 | 676 | CONFIG_NET_EMATCH_STACK=32 |
649 | # CONFIG_NET_EMATCH_CMP is not set | 677 | # CONFIG_NET_EMATCH_CMP is not set |
@@ -659,7 +687,9 @@ CONFIG_NET_CLS_ACT=y | |||
659 | # CONFIG_NET_ACT_NAT is not set | 687 | # CONFIG_NET_ACT_NAT is not set |
660 | # CONFIG_NET_ACT_PEDIT is not set | 688 | # CONFIG_NET_ACT_PEDIT is not set |
661 | # CONFIG_NET_ACT_SIMP is not set | 689 | # CONFIG_NET_ACT_SIMP is not set |
690 | # CONFIG_NET_ACT_SKBEDIT is not set | ||
662 | CONFIG_NET_SCH_FIFO=y | 691 | CONFIG_NET_SCH_FIFO=y |
692 | # CONFIG_DCB is not set | ||
663 | 693 | ||
664 | # | 694 | # |
665 | # Network testing | 695 | # Network testing |
@@ -676,29 +706,33 @@ CONFIG_HAMRADIO=y | |||
676 | # CONFIG_IRDA is not set | 706 | # CONFIG_IRDA is not set |
677 | # CONFIG_BT is not set | 707 | # CONFIG_BT is not set |
678 | # CONFIG_AF_RXRPC is not set | 708 | # CONFIG_AF_RXRPC is not set |
709 | # CONFIG_PHONET is not set | ||
679 | CONFIG_FIB_RULES=y | 710 | CONFIG_FIB_RULES=y |
680 | 711 | CONFIG_WIRELESS=y | |
681 | # | ||
682 | # Wireless | ||
683 | # | ||
684 | CONFIG_CFG80211=y | 712 | CONFIG_CFG80211=y |
713 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
685 | CONFIG_NL80211=y | 714 | CONFIG_NL80211=y |
715 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
686 | CONFIG_WIRELESS_EXT=y | 716 | CONFIG_WIRELESS_EXT=y |
687 | CONFIG_WIRELESS_EXT_SYSFS=y | 717 | CONFIG_WIRELESS_EXT_SYSFS=y |
718 | # CONFIG_LIB80211 is not set | ||
688 | CONFIG_MAC80211=y | 719 | CONFIG_MAC80211=y |
689 | 720 | ||
690 | # | 721 | # |
691 | # Rate control algorithm selection | 722 | # Rate control algorithm selection |
692 | # | 723 | # |
693 | CONFIG_MAC80211_RC_PID=y | 724 | CONFIG_MAC80211_RC_MINSTREL=y |
694 | CONFIG_MAC80211_RC_DEFAULT_PID=y | 725 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set |
695 | CONFIG_MAC80211_RC_DEFAULT="pid" | 726 | CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y |
727 | CONFIG_MAC80211_RC_DEFAULT="minstrel" | ||
696 | # CONFIG_MAC80211_MESH is not set | 728 | # CONFIG_MAC80211_MESH is not set |
697 | CONFIG_MAC80211_LEDS=y | 729 | CONFIG_MAC80211_LEDS=y |
698 | # CONFIG_MAC80211_DEBUGFS is not set | 730 | # CONFIG_MAC80211_DEBUGFS is not set |
699 | # CONFIG_MAC80211_DEBUG_MENU is not set | 731 | # CONFIG_MAC80211_DEBUG_MENU is not set |
700 | # CONFIG_IEEE80211 is not set | 732 | # CONFIG_WIMAX is not set |
701 | # CONFIG_RFKILL is not set | 733 | CONFIG_RFKILL=y |
734 | # CONFIG_RFKILL_INPUT is not set | ||
735 | CONFIG_RFKILL_LEDS=y | ||
702 | # CONFIG_NET_9P is not set | 736 | # CONFIG_NET_9P is not set |
703 | 737 | ||
704 | # | 738 | # |
@@ -722,7 +756,7 @@ CONFIG_PROC_EVENTS=y | |||
722 | # CONFIG_MTD is not set | 756 | # CONFIG_MTD is not set |
723 | # CONFIG_PARPORT is not set | 757 | # CONFIG_PARPORT is not set |
724 | CONFIG_PNP=y | 758 | CONFIG_PNP=y |
725 | # CONFIG_PNP_DEBUG is not set | 759 | CONFIG_PNP_DEBUG_MESSAGES=y |
726 | 760 | ||
727 | # | 761 | # |
728 | # Protocols | 762 | # Protocols |
@@ -750,20 +784,19 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 | |||
750 | CONFIG_MISC_DEVICES=y | 784 | CONFIG_MISC_DEVICES=y |
751 | # CONFIG_IBM_ASM is not set | 785 | # CONFIG_IBM_ASM is not set |
752 | # CONFIG_PHANTOM is not set | 786 | # CONFIG_PHANTOM is not set |
753 | # CONFIG_EEPROM_93CX6 is not set | ||
754 | # CONFIG_SGI_IOC4 is not set | 787 | # CONFIG_SGI_IOC4 is not set |
755 | # CONFIG_TIFM_CORE is not set | 788 | # CONFIG_TIFM_CORE is not set |
756 | # CONFIG_ACER_WMI is not set | 789 | # CONFIG_ICS932S401 is not set |
757 | # CONFIG_ASUS_LAPTOP is not set | ||
758 | # CONFIG_FUJITSU_LAPTOP is not set | ||
759 | # CONFIG_TC1100_WMI is not set | ||
760 | # CONFIG_MSI_LAPTOP is not set | ||
761 | # CONFIG_COMPAL_LAPTOP is not set | ||
762 | # CONFIG_SONY_LAPTOP is not set | ||
763 | # CONFIG_THINKPAD_ACPI is not set | ||
764 | # CONFIG_INTEL_MENLOW is not set | ||
765 | # CONFIG_ENCLOSURE_SERVICES is not set | 790 | # CONFIG_ENCLOSURE_SERVICES is not set |
766 | # CONFIG_HP_ILO is not set | 791 | # CONFIG_HP_ILO is not set |
792 | # CONFIG_C2PORT is not set | ||
793 | |||
794 | # | ||
795 | # EEPROM support | ||
796 | # | ||
797 | # CONFIG_EEPROM_AT24 is not set | ||
798 | # CONFIG_EEPROM_LEGACY is not set | ||
799 | # CONFIG_EEPROM_93CX6 is not set | ||
767 | CONFIG_HAVE_IDE=y | 800 | CONFIG_HAVE_IDE=y |
768 | # CONFIG_IDE is not set | 801 | # CONFIG_IDE is not set |
769 | 802 | ||
@@ -802,7 +835,7 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
802 | # | 835 | # |
803 | CONFIG_SCSI_SPI_ATTRS=y | 836 | CONFIG_SCSI_SPI_ATTRS=y |
804 | # CONFIG_SCSI_FC_ATTRS is not set | 837 | # CONFIG_SCSI_FC_ATTRS is not set |
805 | CONFIG_SCSI_ISCSI_ATTRS=y | 838 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
806 | # CONFIG_SCSI_SAS_ATTRS is not set | 839 | # CONFIG_SCSI_SAS_ATTRS is not set |
807 | # CONFIG_SCSI_SAS_LIBSAS is not set | 840 | # CONFIG_SCSI_SAS_LIBSAS is not set |
808 | # CONFIG_SCSI_SRP_ATTRS is not set | 841 | # CONFIG_SCSI_SRP_ATTRS is not set |
@@ -875,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y | |||
875 | CONFIG_PATA_SCH=y | 908 | CONFIG_PATA_SCH=y |
876 | CONFIG_MD=y | 909 | CONFIG_MD=y |
877 | CONFIG_BLK_DEV_MD=y | 910 | CONFIG_BLK_DEV_MD=y |
911 | CONFIG_MD_AUTODETECT=y | ||
878 | # CONFIG_MD_LINEAR is not set | 912 | # CONFIG_MD_LINEAR is not set |
879 | # CONFIG_MD_RAID0 is not set | 913 | # CONFIG_MD_RAID0 is not set |
880 | # CONFIG_MD_RAID1 is not set | 914 | # CONFIG_MD_RAID1 is not set |
@@ -930,6 +964,9 @@ CONFIG_PHYLIB=y | |||
930 | # CONFIG_BROADCOM_PHY is not set | 964 | # CONFIG_BROADCOM_PHY is not set |
931 | # CONFIG_ICPLUS_PHY is not set | 965 | # CONFIG_ICPLUS_PHY is not set |
932 | # CONFIG_REALTEK_PHY is not set | 966 | # CONFIG_REALTEK_PHY is not set |
967 | # CONFIG_NATIONAL_PHY is not set | ||
968 | # CONFIG_STE10XP is not set | ||
969 | # CONFIG_LSI_ET1011C_PHY is not set | ||
933 | # CONFIG_FIXED_PHY is not set | 970 | # CONFIG_FIXED_PHY is not set |
934 | # CONFIG_MDIO_BITBANG is not set | 971 | # CONFIG_MDIO_BITBANG is not set |
935 | CONFIG_NET_ETHERNET=y | 972 | CONFIG_NET_ETHERNET=y |
@@ -953,6 +990,9 @@ CONFIG_NET_TULIP=y | |||
953 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 990 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
954 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 991 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
955 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 992 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
993 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
994 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
995 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
956 | CONFIG_NET_PCI=y | 996 | CONFIG_NET_PCI=y |
957 | # CONFIG_PCNET32 is not set | 997 | # CONFIG_PCNET32 is not set |
958 | # CONFIG_AMD8111_ETH is not set | 998 | # CONFIG_AMD8111_ETH is not set |
@@ -960,7 +1000,6 @@ CONFIG_NET_PCI=y | |||
960 | # CONFIG_B44 is not set | 1000 | # CONFIG_B44 is not set |
961 | CONFIG_FORCEDETH=y | 1001 | CONFIG_FORCEDETH=y |
962 | # CONFIG_FORCEDETH_NAPI is not set | 1002 | # CONFIG_FORCEDETH_NAPI is not set |
963 | # CONFIG_EEPRO100 is not set | ||
964 | CONFIG_E100=y | 1003 | CONFIG_E100=y |
965 | # CONFIG_FEALNX is not set | 1004 | # CONFIG_FEALNX is not set |
966 | # CONFIG_NATSEMI is not set | 1005 | # CONFIG_NATSEMI is not set |
@@ -974,15 +1013,16 @@ CONFIG_8139TOO=y | |||
974 | # CONFIG_R6040 is not set | 1013 | # CONFIG_R6040 is not set |
975 | # CONFIG_SIS900 is not set | 1014 | # CONFIG_SIS900 is not set |
976 | # CONFIG_EPIC100 is not set | 1015 | # CONFIG_EPIC100 is not set |
1016 | # CONFIG_SMSC9420 is not set | ||
977 | # CONFIG_SUNDANCE is not set | 1017 | # CONFIG_SUNDANCE is not set |
978 | # CONFIG_TLAN is not set | 1018 | # CONFIG_TLAN is not set |
979 | # CONFIG_VIA_RHINE is not set | 1019 | # CONFIG_VIA_RHINE is not set |
980 | # CONFIG_SC92031 is not set | 1020 | # CONFIG_SC92031 is not set |
1021 | # CONFIG_ATL2 is not set | ||
981 | CONFIG_NETDEV_1000=y | 1022 | CONFIG_NETDEV_1000=y |
982 | # CONFIG_ACENIC is not set | 1023 | # CONFIG_ACENIC is not set |
983 | # CONFIG_DL2K is not set | 1024 | # CONFIG_DL2K is not set |
984 | CONFIG_E1000=y | 1025 | CONFIG_E1000=y |
985 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | ||
986 | CONFIG_E1000E=y | 1026 | CONFIG_E1000E=y |
987 | # CONFIG_IP1000 is not set | 1027 | # CONFIG_IP1000 is not set |
988 | # CONFIG_IGB is not set | 1028 | # CONFIG_IGB is not set |
@@ -1000,18 +1040,23 @@ CONFIG_BNX2=y | |||
1000 | # CONFIG_QLA3XXX is not set | 1040 | # CONFIG_QLA3XXX is not set |
1001 | # CONFIG_ATL1 is not set | 1041 | # CONFIG_ATL1 is not set |
1002 | # CONFIG_ATL1E is not set | 1042 | # CONFIG_ATL1E is not set |
1043 | # CONFIG_JME is not set | ||
1003 | CONFIG_NETDEV_10000=y | 1044 | CONFIG_NETDEV_10000=y |
1004 | # CONFIG_CHELSIO_T1 is not set | 1045 | # CONFIG_CHELSIO_T1 is not set |
1046 | CONFIG_CHELSIO_T3_DEPENDS=y | ||
1005 | # CONFIG_CHELSIO_T3 is not set | 1047 | # CONFIG_CHELSIO_T3 is not set |
1048 | # CONFIG_ENIC is not set | ||
1006 | # CONFIG_IXGBE is not set | 1049 | # CONFIG_IXGBE is not set |
1007 | # CONFIG_IXGB is not set | 1050 | # CONFIG_IXGB is not set |
1008 | # CONFIG_S2IO is not set | 1051 | # CONFIG_S2IO is not set |
1009 | # CONFIG_MYRI10GE is not set | 1052 | # CONFIG_MYRI10GE is not set |
1010 | # CONFIG_NETXEN_NIC is not set | 1053 | # CONFIG_NETXEN_NIC is not set |
1011 | # CONFIG_NIU is not set | 1054 | # CONFIG_NIU is not set |
1055 | # CONFIG_MLX4_EN is not set | ||
1012 | # CONFIG_MLX4_CORE is not set | 1056 | # CONFIG_MLX4_CORE is not set |
1013 | # CONFIG_TEHUTI is not set | 1057 | # CONFIG_TEHUTI is not set |
1014 | # CONFIG_BNX2X is not set | 1058 | # CONFIG_BNX2X is not set |
1059 | # CONFIG_QLGE is not set | ||
1015 | # CONFIG_SFC is not set | 1060 | # CONFIG_SFC is not set |
1016 | CONFIG_TR=y | 1061 | CONFIG_TR=y |
1017 | # CONFIG_IBMOL is not set | 1062 | # CONFIG_IBMOL is not set |
@@ -1025,9 +1070,8 @@ CONFIG_TR=y | |||
1025 | # CONFIG_WLAN_PRE80211 is not set | 1070 | # CONFIG_WLAN_PRE80211 is not set |
1026 | CONFIG_WLAN_80211=y | 1071 | CONFIG_WLAN_80211=y |
1027 | # CONFIG_PCMCIA_RAYCS is not set | 1072 | # CONFIG_PCMCIA_RAYCS is not set |
1028 | # CONFIG_IPW2100 is not set | ||
1029 | # CONFIG_IPW2200 is not set | ||
1030 | # CONFIG_LIBERTAS is not set | 1073 | # CONFIG_LIBERTAS is not set |
1074 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
1031 | # CONFIG_AIRO is not set | 1075 | # CONFIG_AIRO is not set |
1032 | # CONFIG_HERMES is not set | 1076 | # CONFIG_HERMES is not set |
1033 | # CONFIG_ATMEL is not set | 1077 | # CONFIG_ATMEL is not set |
@@ -1044,6 +1088,8 @@ CONFIG_WLAN_80211=y | |||
1044 | CONFIG_ATH5K=y | 1088 | CONFIG_ATH5K=y |
1045 | # CONFIG_ATH5K_DEBUG is not set | 1089 | # CONFIG_ATH5K_DEBUG is not set |
1046 | # CONFIG_ATH9K is not set | 1090 | # CONFIG_ATH9K is not set |
1091 | # CONFIG_IPW2100 is not set | ||
1092 | # CONFIG_IPW2200 is not set | ||
1047 | # CONFIG_IWLCORE is not set | 1093 | # CONFIG_IWLCORE is not set |
1048 | # CONFIG_IWLWIFI_LEDS is not set | 1094 | # CONFIG_IWLWIFI_LEDS is not set |
1049 | # CONFIG_IWLAGN is not set | 1095 | # CONFIG_IWLAGN is not set |
@@ -1055,6 +1101,10 @@ CONFIG_ATH5K=y | |||
1055 | # CONFIG_RT2X00 is not set | 1101 | # CONFIG_RT2X00 is not set |
1056 | 1102 | ||
1057 | # | 1103 | # |
1104 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
1105 | # | ||
1106 | |||
1107 | # | ||
1058 | # USB Network Adapters | 1108 | # USB Network Adapters |
1059 | # | 1109 | # |
1060 | # CONFIG_USB_CATC is not set | 1110 | # CONFIG_USB_CATC is not set |
@@ -1062,6 +1112,7 @@ CONFIG_ATH5K=y | |||
1062 | # CONFIG_USB_PEGASUS is not set | 1112 | # CONFIG_USB_PEGASUS is not set |
1063 | # CONFIG_USB_RTL8150 is not set | 1113 | # CONFIG_USB_RTL8150 is not set |
1064 | # CONFIG_USB_USBNET is not set | 1114 | # CONFIG_USB_USBNET is not set |
1115 | # CONFIG_USB_HSO is not set | ||
1065 | CONFIG_NET_PCMCIA=y | 1116 | CONFIG_NET_PCMCIA=y |
1066 | # CONFIG_PCMCIA_3C589 is not set | 1117 | # CONFIG_PCMCIA_3C589 is not set |
1067 | # CONFIG_PCMCIA_3C574 is not set | 1118 | # CONFIG_PCMCIA_3C574 is not set |
@@ -1123,6 +1174,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y | |||
1123 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 1174 | CONFIG_MOUSE_PS2_SYNAPTICS=y |
1124 | CONFIG_MOUSE_PS2_LIFEBOOK=y | 1175 | CONFIG_MOUSE_PS2_LIFEBOOK=y |
1125 | CONFIG_MOUSE_PS2_TRACKPOINT=y | 1176 | CONFIG_MOUSE_PS2_TRACKPOINT=y |
1177 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
1126 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | 1178 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set |
1127 | # CONFIG_MOUSE_SERIAL is not set | 1179 | # CONFIG_MOUSE_SERIAL is not set |
1128 | # CONFIG_MOUSE_APPLETOUCH is not set | 1180 | # CONFIG_MOUSE_APPLETOUCH is not set |
@@ -1160,15 +1212,16 @@ CONFIG_INPUT_TOUCHSCREEN=y | |||
1160 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 1212 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
1161 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 1213 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
1162 | # CONFIG_TOUCHSCREEN_ELO is not set | 1214 | # CONFIG_TOUCHSCREEN_ELO is not set |
1215 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
1163 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 1216 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
1164 | # CONFIG_TOUCHSCREEN_INEXIO is not set | 1217 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
1165 | # CONFIG_TOUCHSCREEN_MK712 is not set | 1218 | # CONFIG_TOUCHSCREEN_MK712 is not set |
1166 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | 1219 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set |
1167 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 1220 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
1168 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 1221 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
1169 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
1170 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 1222 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
1171 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 1223 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
1224 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
1172 | CONFIG_INPUT_MISC=y | 1225 | CONFIG_INPUT_MISC=y |
1173 | # CONFIG_INPUT_PCSPKR is not set | 1226 | # CONFIG_INPUT_PCSPKR is not set |
1174 | # CONFIG_INPUT_APANEL is not set | 1227 | # CONFIG_INPUT_APANEL is not set |
@@ -1179,6 +1232,7 @@ CONFIG_INPUT_MISC=y | |||
1179 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | 1232 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set |
1180 | # CONFIG_INPUT_POWERMATE is not set | 1233 | # CONFIG_INPUT_POWERMATE is not set |
1181 | # CONFIG_INPUT_YEALINK is not set | 1234 | # CONFIG_INPUT_YEALINK is not set |
1235 | # CONFIG_INPUT_CM109 is not set | ||
1182 | # CONFIG_INPUT_UINPUT is not set | 1236 | # CONFIG_INPUT_UINPUT is not set |
1183 | 1237 | ||
1184 | # | 1238 | # |
@@ -1245,6 +1299,7 @@ CONFIG_SERIAL_CORE=y | |||
1245 | CONFIG_SERIAL_CORE_CONSOLE=y | 1299 | CONFIG_SERIAL_CORE_CONSOLE=y |
1246 | # CONFIG_SERIAL_JSM is not set | 1300 | # CONFIG_SERIAL_JSM is not set |
1247 | CONFIG_UNIX98_PTYS=y | 1301 | CONFIG_UNIX98_PTYS=y |
1302 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
1248 | # CONFIG_LEGACY_PTYS is not set | 1303 | # CONFIG_LEGACY_PTYS is not set |
1249 | # CONFIG_IPMI_HANDLER is not set | 1304 | # CONFIG_IPMI_HANDLER is not set |
1250 | CONFIG_HW_RANDOM=y | 1305 | CONFIG_HW_RANDOM=y |
@@ -1279,6 +1334,7 @@ CONFIG_I2C=y | |||
1279 | CONFIG_I2C_BOARDINFO=y | 1334 | CONFIG_I2C_BOARDINFO=y |
1280 | # CONFIG_I2C_CHARDEV is not set | 1335 | # CONFIG_I2C_CHARDEV is not set |
1281 | CONFIG_I2C_HELPER_AUTO=y | 1336 | CONFIG_I2C_HELPER_AUTO=y |
1337 | CONFIG_I2C_ALGOBIT=y | ||
1282 | 1338 | ||
1283 | # | 1339 | # |
1284 | # I2C Hardware Bus support | 1340 | # I2C Hardware Bus support |
@@ -1331,8 +1387,6 @@ CONFIG_I2C_I801=y | |||
1331 | # Miscellaneous I2C Chip support | 1387 | # Miscellaneous I2C Chip support |
1332 | # | 1388 | # |
1333 | # CONFIG_DS1682 is not set | 1389 | # CONFIG_DS1682 is not set |
1334 | # CONFIG_EEPROM_AT24 is not set | ||
1335 | # CONFIG_EEPROM_LEGACY is not set | ||
1336 | # CONFIG_SENSORS_PCF8574 is not set | 1390 | # CONFIG_SENSORS_PCF8574 is not set |
1337 | # CONFIG_PCF8575 is not set | 1391 | # CONFIG_PCF8575 is not set |
1338 | # CONFIG_SENSORS_PCA9539 is not set | 1392 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -1351,8 +1405,78 @@ CONFIG_POWER_SUPPLY=y | |||
1351 | # CONFIG_POWER_SUPPLY_DEBUG is not set | 1405 | # CONFIG_POWER_SUPPLY_DEBUG is not set |
1352 | # CONFIG_PDA_POWER is not set | 1406 | # CONFIG_PDA_POWER is not set |
1353 | # CONFIG_BATTERY_DS2760 is not set | 1407 | # CONFIG_BATTERY_DS2760 is not set |
1354 | # CONFIG_HWMON is not set | 1408 | # CONFIG_BATTERY_BQ27x00 is not set |
1409 | CONFIG_HWMON=y | ||
1410 | # CONFIG_HWMON_VID is not set | ||
1411 | # CONFIG_SENSORS_ABITUGURU is not set | ||
1412 | # CONFIG_SENSORS_ABITUGURU3 is not set | ||
1413 | # CONFIG_SENSORS_AD7414 is not set | ||
1414 | # CONFIG_SENSORS_AD7418 is not set | ||
1415 | # CONFIG_SENSORS_ADM1021 is not set | ||
1416 | # CONFIG_SENSORS_ADM1025 is not set | ||
1417 | # CONFIG_SENSORS_ADM1026 is not set | ||
1418 | # CONFIG_SENSORS_ADM1029 is not set | ||
1419 | # CONFIG_SENSORS_ADM1031 is not set | ||
1420 | # CONFIG_SENSORS_ADM9240 is not set | ||
1421 | # CONFIG_SENSORS_ADT7462 is not set | ||
1422 | # CONFIG_SENSORS_ADT7470 is not set | ||
1423 | # CONFIG_SENSORS_ADT7473 is not set | ||
1424 | # CONFIG_SENSORS_ADT7475 is not set | ||
1425 | # CONFIG_SENSORS_K8TEMP is not set | ||
1426 | # CONFIG_SENSORS_ASB100 is not set | ||
1427 | # CONFIG_SENSORS_ATXP1 is not set | ||
1428 | # CONFIG_SENSORS_DS1621 is not set | ||
1429 | # CONFIG_SENSORS_I5K_AMB is not set | ||
1430 | # CONFIG_SENSORS_F71805F is not set | ||
1431 | # CONFIG_SENSORS_F71882FG is not set | ||
1432 | # CONFIG_SENSORS_F75375S is not set | ||
1433 | # CONFIG_SENSORS_FSCHER is not set | ||
1434 | # CONFIG_SENSORS_FSCPOS is not set | ||
1435 | # CONFIG_SENSORS_FSCHMD is not set | ||
1436 | # CONFIG_SENSORS_GL518SM is not set | ||
1437 | # CONFIG_SENSORS_GL520SM is not set | ||
1438 | # CONFIG_SENSORS_CORETEMP is not set | ||
1439 | # CONFIG_SENSORS_IT87 is not set | ||
1440 | # CONFIG_SENSORS_LM63 is not set | ||
1441 | # CONFIG_SENSORS_LM75 is not set | ||
1442 | # CONFIG_SENSORS_LM77 is not set | ||
1443 | # CONFIG_SENSORS_LM78 is not set | ||
1444 | # CONFIG_SENSORS_LM80 is not set | ||
1445 | # CONFIG_SENSORS_LM83 is not set | ||
1446 | # CONFIG_SENSORS_LM85 is not set | ||
1447 | # CONFIG_SENSORS_LM87 is not set | ||
1448 | # CONFIG_SENSORS_LM90 is not set | ||
1449 | # CONFIG_SENSORS_LM92 is not set | ||
1450 | # CONFIG_SENSORS_LM93 is not set | ||
1451 | # CONFIG_SENSORS_LTC4245 is not set | ||
1452 | # CONFIG_SENSORS_MAX1619 is not set | ||
1453 | # CONFIG_SENSORS_MAX6650 is not set | ||
1454 | # CONFIG_SENSORS_PC87360 is not set | ||
1455 | # CONFIG_SENSORS_PC87427 is not set | ||
1456 | # CONFIG_SENSORS_SIS5595 is not set | ||
1457 | # CONFIG_SENSORS_DME1737 is not set | ||
1458 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
1459 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
1460 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
1461 | # CONFIG_SENSORS_ADS7828 is not set | ||
1462 | # CONFIG_SENSORS_THMC50 is not set | ||
1463 | # CONFIG_SENSORS_VIA686A is not set | ||
1464 | # CONFIG_SENSORS_VT1211 is not set | ||
1465 | # CONFIG_SENSORS_VT8231 is not set | ||
1466 | # CONFIG_SENSORS_W83781D is not set | ||
1467 | # CONFIG_SENSORS_W83791D is not set | ||
1468 | # CONFIG_SENSORS_W83792D is not set | ||
1469 | # CONFIG_SENSORS_W83793 is not set | ||
1470 | # CONFIG_SENSORS_W83L785TS is not set | ||
1471 | # CONFIG_SENSORS_W83L786NG is not set | ||
1472 | # CONFIG_SENSORS_W83627HF is not set | ||
1473 | # CONFIG_SENSORS_W83627EHF is not set | ||
1474 | # CONFIG_SENSORS_HDAPS is not set | ||
1475 | # CONFIG_SENSORS_LIS3LV02D is not set | ||
1476 | # CONFIG_SENSORS_APPLESMC is not set | ||
1477 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
1355 | CONFIG_THERMAL=y | 1478 | CONFIG_THERMAL=y |
1479 | # CONFIG_THERMAL_HWMON is not set | ||
1356 | CONFIG_WATCHDOG=y | 1480 | CONFIG_WATCHDOG=y |
1357 | # CONFIG_WATCHDOG_NOWAYOUT is not set | 1481 | # CONFIG_WATCHDOG_NOWAYOUT is not set |
1358 | 1482 | ||
@@ -1372,6 +1496,7 @@ CONFIG_WATCHDOG=y | |||
1372 | # CONFIG_I6300ESB_WDT is not set | 1496 | # CONFIG_I6300ESB_WDT is not set |
1373 | # CONFIG_ITCO_WDT is not set | 1497 | # CONFIG_ITCO_WDT is not set |
1374 | # CONFIG_IT8712F_WDT is not set | 1498 | # CONFIG_IT8712F_WDT is not set |
1499 | # CONFIG_IT87_WDT is not set | ||
1375 | # CONFIG_HP_WATCHDOG is not set | 1500 | # CONFIG_HP_WATCHDOG is not set |
1376 | # CONFIG_SC1200_WDT is not set | 1501 | # CONFIG_SC1200_WDT is not set |
1377 | # CONFIG_PC87413_WDT is not set | 1502 | # CONFIG_PC87413_WDT is not set |
@@ -1379,9 +1504,11 @@ CONFIG_WATCHDOG=y | |||
1379 | # CONFIG_SBC8360_WDT is not set | 1504 | # CONFIG_SBC8360_WDT is not set |
1380 | # CONFIG_SBC7240_WDT is not set | 1505 | # CONFIG_SBC7240_WDT is not set |
1381 | # CONFIG_CPU5_WDT is not set | 1506 | # CONFIG_CPU5_WDT is not set |
1507 | # CONFIG_SMSC_SCH311X_WDT is not set | ||
1382 | # CONFIG_SMSC37B787_WDT is not set | 1508 | # CONFIG_SMSC37B787_WDT is not set |
1383 | # CONFIG_W83627HF_WDT is not set | 1509 | # CONFIG_W83627HF_WDT is not set |
1384 | # CONFIG_W83697HF_WDT is not set | 1510 | # CONFIG_W83697HF_WDT is not set |
1511 | # CONFIG_W83697UG_WDT is not set | ||
1385 | # CONFIG_W83877F_WDT is not set | 1512 | # CONFIG_W83877F_WDT is not set |
1386 | # CONFIG_W83977F_WDT is not set | 1513 | # CONFIG_W83977F_WDT is not set |
1387 | # CONFIG_MACHZ_WDT is not set | 1514 | # CONFIG_MACHZ_WDT is not set |
@@ -1397,11 +1524,11 @@ CONFIG_WATCHDOG=y | |||
1397 | # USB-based Watchdog Cards | 1524 | # USB-based Watchdog Cards |
1398 | # | 1525 | # |
1399 | # CONFIG_USBPCWATCHDOG is not set | 1526 | # CONFIG_USBPCWATCHDOG is not set |
1527 | CONFIG_SSB_POSSIBLE=y | ||
1400 | 1528 | ||
1401 | # | 1529 | # |
1402 | # Sonics Silicon Backplane | 1530 | # Sonics Silicon Backplane |
1403 | # | 1531 | # |
1404 | CONFIG_SSB_POSSIBLE=y | ||
1405 | # CONFIG_SSB is not set | 1532 | # CONFIG_SSB is not set |
1406 | 1533 | ||
1407 | # | 1534 | # |
@@ -1410,7 +1537,13 @@ CONFIG_SSB_POSSIBLE=y | |||
1410 | # CONFIG_MFD_CORE is not set | 1537 | # CONFIG_MFD_CORE is not set |
1411 | # CONFIG_MFD_SM501 is not set | 1538 | # CONFIG_MFD_SM501 is not set |
1412 | # CONFIG_HTC_PASIC3 is not set | 1539 | # CONFIG_HTC_PASIC3 is not set |
1540 | # CONFIG_TWL4030_CORE is not set | ||
1413 | # CONFIG_MFD_TMIO is not set | 1541 | # CONFIG_MFD_TMIO is not set |
1542 | # CONFIG_PMIC_DA903X is not set | ||
1543 | # CONFIG_MFD_WM8400 is not set | ||
1544 | # CONFIG_MFD_WM8350_I2C is not set | ||
1545 | # CONFIG_MFD_PCF50633 is not set | ||
1546 | # CONFIG_REGULATOR is not set | ||
1414 | 1547 | ||
1415 | # | 1548 | # |
1416 | # Multimedia devices | 1549 | # Multimedia devices |
@@ -1450,6 +1583,7 @@ CONFIG_DRM=y | |||
1450 | # CONFIG_DRM_I810 is not set | 1583 | # CONFIG_DRM_I810 is not set |
1451 | # CONFIG_DRM_I830 is not set | 1584 | # CONFIG_DRM_I830 is not set |
1452 | CONFIG_DRM_I915=y | 1585 | CONFIG_DRM_I915=y |
1586 | # CONFIG_DRM_I915_KMS is not set | ||
1453 | # CONFIG_DRM_MGA is not set | 1587 | # CONFIG_DRM_MGA is not set |
1454 | # CONFIG_DRM_SIS is not set | 1588 | # CONFIG_DRM_SIS is not set |
1455 | # CONFIG_DRM_VIA is not set | 1589 | # CONFIG_DRM_VIA is not set |
@@ -1459,6 +1593,7 @@ CONFIG_DRM_I915=y | |||
1459 | CONFIG_FB=y | 1593 | CONFIG_FB=y |
1460 | # CONFIG_FIRMWARE_EDID is not set | 1594 | # CONFIG_FIRMWARE_EDID is not set |
1461 | # CONFIG_FB_DDC is not set | 1595 | # CONFIG_FB_DDC is not set |
1596 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
1462 | CONFIG_FB_CFB_FILLRECT=y | 1597 | CONFIG_FB_CFB_FILLRECT=y |
1463 | CONFIG_FB_CFB_COPYAREA=y | 1598 | CONFIG_FB_CFB_COPYAREA=y |
1464 | CONFIG_FB_CFB_IMAGEBLIT=y | 1599 | CONFIG_FB_CFB_IMAGEBLIT=y |
@@ -1487,7 +1622,6 @@ CONFIG_FB_TILEBLITTING=y | |||
1487 | # CONFIG_FB_UVESA is not set | 1622 | # CONFIG_FB_UVESA is not set |
1488 | # CONFIG_FB_VESA is not set | 1623 | # CONFIG_FB_VESA is not set |
1489 | CONFIG_FB_EFI=y | 1624 | CONFIG_FB_EFI=y |
1490 | # CONFIG_FB_IMAC is not set | ||
1491 | # CONFIG_FB_N411 is not set | 1625 | # CONFIG_FB_N411 is not set |
1492 | # CONFIG_FB_HGA is not set | 1626 | # CONFIG_FB_HGA is not set |
1493 | # CONFIG_FB_S1D13XXX is not set | 1627 | # CONFIG_FB_S1D13XXX is not set |
@@ -1503,6 +1637,7 @@ CONFIG_FB_EFI=y | |||
1503 | # CONFIG_FB_S3 is not set | 1637 | # CONFIG_FB_S3 is not set |
1504 | # CONFIG_FB_SAVAGE is not set | 1638 | # CONFIG_FB_SAVAGE is not set |
1505 | # CONFIG_FB_SIS is not set | 1639 | # CONFIG_FB_SIS is not set |
1640 | # CONFIG_FB_VIA is not set | ||
1506 | # CONFIG_FB_NEOMAGIC is not set | 1641 | # CONFIG_FB_NEOMAGIC is not set |
1507 | # CONFIG_FB_KYRO is not set | 1642 | # CONFIG_FB_KYRO is not set |
1508 | # CONFIG_FB_3DFX is not set | 1643 | # CONFIG_FB_3DFX is not set |
@@ -1515,12 +1650,15 @@ CONFIG_FB_EFI=y | |||
1515 | # CONFIG_FB_CARMINE is not set | 1650 | # CONFIG_FB_CARMINE is not set |
1516 | # CONFIG_FB_GEODE is not set | 1651 | # CONFIG_FB_GEODE is not set |
1517 | # CONFIG_FB_VIRTUAL is not set | 1652 | # CONFIG_FB_VIRTUAL is not set |
1653 | # CONFIG_FB_METRONOME is not set | ||
1654 | # CONFIG_FB_MB862XX is not set | ||
1518 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1655 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
1519 | # CONFIG_LCD_CLASS_DEVICE is not set | 1656 | # CONFIG_LCD_CLASS_DEVICE is not set |
1520 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | 1657 | CONFIG_BACKLIGHT_CLASS_DEVICE=y |
1521 | # CONFIG_BACKLIGHT_CORGI is not set | 1658 | CONFIG_BACKLIGHT_GENERIC=y |
1522 | # CONFIG_BACKLIGHT_PROGEAR is not set | 1659 | # CONFIG_BACKLIGHT_PROGEAR is not set |
1523 | # CONFIG_BACKLIGHT_MBP_NVIDIA is not set | 1660 | # CONFIG_BACKLIGHT_MBP_NVIDIA is not set |
1661 | # CONFIG_BACKLIGHT_SAHARA is not set | ||
1524 | 1662 | ||
1525 | # | 1663 | # |
1526 | # Display device support | 1664 | # Display device support |
@@ -1540,10 +1678,12 @@ CONFIG_LOGO=y | |||
1540 | # CONFIG_LOGO_LINUX_VGA16 is not set | 1678 | # CONFIG_LOGO_LINUX_VGA16 is not set |
1541 | CONFIG_LOGO_LINUX_CLUT224=y | 1679 | CONFIG_LOGO_LINUX_CLUT224=y |
1542 | CONFIG_SOUND=y | 1680 | CONFIG_SOUND=y |
1681 | CONFIG_SOUND_OSS_CORE=y | ||
1543 | CONFIG_SND=y | 1682 | CONFIG_SND=y |
1544 | CONFIG_SND_TIMER=y | 1683 | CONFIG_SND_TIMER=y |
1545 | CONFIG_SND_PCM=y | 1684 | CONFIG_SND_PCM=y |
1546 | CONFIG_SND_HWDEP=y | 1685 | CONFIG_SND_HWDEP=y |
1686 | CONFIG_SND_JACK=y | ||
1547 | CONFIG_SND_SEQUENCER=y | 1687 | CONFIG_SND_SEQUENCER=y |
1548 | CONFIG_SND_SEQ_DUMMY=y | 1688 | CONFIG_SND_SEQ_DUMMY=y |
1549 | CONFIG_SND_OSSEMUL=y | 1689 | CONFIG_SND_OSSEMUL=y |
@@ -1551,6 +1691,8 @@ CONFIG_SND_MIXER_OSS=y | |||
1551 | CONFIG_SND_PCM_OSS=y | 1691 | CONFIG_SND_PCM_OSS=y |
1552 | CONFIG_SND_PCM_OSS_PLUGINS=y | 1692 | CONFIG_SND_PCM_OSS_PLUGINS=y |
1553 | CONFIG_SND_SEQUENCER_OSS=y | 1693 | CONFIG_SND_SEQUENCER_OSS=y |
1694 | CONFIG_SND_HRTIMER=y | ||
1695 | CONFIG_SND_SEQ_HRTIMER_DEFAULT=y | ||
1554 | CONFIG_SND_DYNAMIC_MINORS=y | 1696 | CONFIG_SND_DYNAMIC_MINORS=y |
1555 | CONFIG_SND_SUPPORT_OLD_API=y | 1697 | CONFIG_SND_SUPPORT_OLD_API=y |
1556 | CONFIG_SND_VERBOSE_PROCFS=y | 1698 | CONFIG_SND_VERBOSE_PROCFS=y |
@@ -1605,11 +1747,16 @@ CONFIG_SND_PCI=y | |||
1605 | # CONFIG_SND_FM801 is not set | 1747 | # CONFIG_SND_FM801 is not set |
1606 | CONFIG_SND_HDA_INTEL=y | 1748 | CONFIG_SND_HDA_INTEL=y |
1607 | CONFIG_SND_HDA_HWDEP=y | 1749 | CONFIG_SND_HDA_HWDEP=y |
1750 | # CONFIG_SND_HDA_RECONFIG is not set | ||
1751 | # CONFIG_SND_HDA_INPUT_BEEP is not set | ||
1608 | CONFIG_SND_HDA_CODEC_REALTEK=y | 1752 | CONFIG_SND_HDA_CODEC_REALTEK=y |
1609 | CONFIG_SND_HDA_CODEC_ANALOG=y | 1753 | CONFIG_SND_HDA_CODEC_ANALOG=y |
1610 | CONFIG_SND_HDA_CODEC_SIGMATEL=y | 1754 | CONFIG_SND_HDA_CODEC_SIGMATEL=y |
1611 | CONFIG_SND_HDA_CODEC_VIA=y | 1755 | CONFIG_SND_HDA_CODEC_VIA=y |
1612 | CONFIG_SND_HDA_CODEC_ATIHDMI=y | 1756 | CONFIG_SND_HDA_CODEC_ATIHDMI=y |
1757 | CONFIG_SND_HDA_CODEC_NVHDMI=y | ||
1758 | CONFIG_SND_HDA_CODEC_INTELHDMI=y | ||
1759 | CONFIG_SND_HDA_ELD=y | ||
1613 | CONFIG_SND_HDA_CODEC_CONEXANT=y | 1760 | CONFIG_SND_HDA_CODEC_CONEXANT=y |
1614 | CONFIG_SND_HDA_CODEC_CMEDIA=y | 1761 | CONFIG_SND_HDA_CODEC_CMEDIA=y |
1615 | CONFIG_SND_HDA_CODEC_SI3054=y | 1762 | CONFIG_SND_HDA_CODEC_SI3054=y |
@@ -1643,6 +1790,7 @@ CONFIG_SND_USB=y | |||
1643 | # CONFIG_SND_USB_AUDIO is not set | 1790 | # CONFIG_SND_USB_AUDIO is not set |
1644 | # CONFIG_SND_USB_USX2Y is not set | 1791 | # CONFIG_SND_USB_USX2Y is not set |
1645 | # CONFIG_SND_USB_CAIAQ is not set | 1792 | # CONFIG_SND_USB_CAIAQ is not set |
1793 | # CONFIG_SND_USB_US122L is not set | ||
1646 | CONFIG_SND_PCMCIA=y | 1794 | CONFIG_SND_PCMCIA=y |
1647 | # CONFIG_SND_VXPOCKET is not set | 1795 | # CONFIG_SND_VXPOCKET is not set |
1648 | # CONFIG_SND_PDAUDIOCF is not set | 1796 | # CONFIG_SND_PDAUDIOCF is not set |
@@ -1657,15 +1805,37 @@ CONFIG_HIDRAW=y | |||
1657 | # USB Input Devices | 1805 | # USB Input Devices |
1658 | # | 1806 | # |
1659 | CONFIG_USB_HID=y | 1807 | CONFIG_USB_HID=y |
1660 | CONFIG_USB_HIDINPUT_POWERBOOK=y | ||
1661 | CONFIG_HID_FF=y | ||
1662 | CONFIG_HID_PID=y | 1808 | CONFIG_HID_PID=y |
1809 | CONFIG_USB_HIDDEV=y | ||
1810 | |||
1811 | # | ||
1812 | # Special HID drivers | ||
1813 | # | ||
1814 | CONFIG_HID_COMPAT=y | ||
1815 | CONFIG_HID_A4TECH=y | ||
1816 | CONFIG_HID_APPLE=y | ||
1817 | CONFIG_HID_BELKIN=y | ||
1818 | CONFIG_HID_CHERRY=y | ||
1819 | CONFIG_HID_CHICONY=y | ||
1820 | CONFIG_HID_CYPRESS=y | ||
1821 | CONFIG_HID_EZKEY=y | ||
1822 | CONFIG_HID_GYRATION=y | ||
1823 | CONFIG_HID_LOGITECH=y | ||
1663 | CONFIG_LOGITECH_FF=y | 1824 | CONFIG_LOGITECH_FF=y |
1664 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | 1825 | # CONFIG_LOGIRUMBLEPAD2_FF is not set |
1826 | CONFIG_HID_MICROSOFT=y | ||
1827 | CONFIG_HID_MONTEREY=y | ||
1828 | CONFIG_HID_NTRIG=y | ||
1829 | CONFIG_HID_PANTHERLORD=y | ||
1665 | CONFIG_PANTHERLORD_FF=y | 1830 | CONFIG_PANTHERLORD_FF=y |
1831 | CONFIG_HID_PETALYNX=y | ||
1832 | CONFIG_HID_SAMSUNG=y | ||
1833 | CONFIG_HID_SONY=y | ||
1834 | CONFIG_HID_SUNPLUS=y | ||
1835 | # CONFIG_GREENASIA_FF is not set | ||
1836 | CONFIG_HID_TOPSEED=y | ||
1666 | CONFIG_THRUSTMASTER_FF=y | 1837 | CONFIG_THRUSTMASTER_FF=y |
1667 | CONFIG_ZEROPLUS_FF=y | 1838 | CONFIG_ZEROPLUS_FF=y |
1668 | CONFIG_USB_HIDDEV=y | ||
1669 | CONFIG_USB_SUPPORT=y | 1839 | CONFIG_USB_SUPPORT=y |
1670 | CONFIG_USB_ARCH_HAS_HCD=y | 1840 | CONFIG_USB_ARCH_HAS_HCD=y |
1671 | CONFIG_USB_ARCH_HAS_OHCI=y | 1841 | CONFIG_USB_ARCH_HAS_OHCI=y |
@@ -1683,6 +1853,8 @@ CONFIG_USB_DEVICEFS=y | |||
1683 | CONFIG_USB_SUSPEND=y | 1853 | CONFIG_USB_SUSPEND=y |
1684 | # CONFIG_USB_OTG is not set | 1854 | # CONFIG_USB_OTG is not set |
1685 | CONFIG_USB_MON=y | 1855 | CONFIG_USB_MON=y |
1856 | # CONFIG_USB_WUSB is not set | ||
1857 | # CONFIG_USB_WUSB_CBAF is not set | ||
1686 | 1858 | ||
1687 | # | 1859 | # |
1688 | # USB Host Controller Drivers | 1860 | # USB Host Controller Drivers |
@@ -1691,6 +1863,7 @@ CONFIG_USB_MON=y | |||
1691 | CONFIG_USB_EHCI_HCD=y | 1863 | CONFIG_USB_EHCI_HCD=y |
1692 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 1864 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1693 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | 1865 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set |
1866 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1694 | # CONFIG_USB_ISP116X_HCD is not set | 1867 | # CONFIG_USB_ISP116X_HCD is not set |
1695 | # CONFIG_USB_ISP1760_HCD is not set | 1868 | # CONFIG_USB_ISP1760_HCD is not set |
1696 | CONFIG_USB_OHCI_HCD=y | 1869 | CONFIG_USB_OHCI_HCD=y |
@@ -1700,6 +1873,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
1700 | CONFIG_USB_UHCI_HCD=y | 1873 | CONFIG_USB_UHCI_HCD=y |
1701 | # CONFIG_USB_SL811_HCD is not set | 1874 | # CONFIG_USB_SL811_HCD is not set |
1702 | # CONFIG_USB_R8A66597_HCD is not set | 1875 | # CONFIG_USB_R8A66597_HCD is not set |
1876 | # CONFIG_USB_WHCI_HCD is not set | ||
1877 | # CONFIG_USB_HWA_HCD is not set | ||
1703 | 1878 | ||
1704 | # | 1879 | # |
1705 | # USB Device Class drivers | 1880 | # USB Device Class drivers |
@@ -1707,20 +1882,20 @@ CONFIG_USB_UHCI_HCD=y | |||
1707 | # CONFIG_USB_ACM is not set | 1882 | # CONFIG_USB_ACM is not set |
1708 | CONFIG_USB_PRINTER=y | 1883 | CONFIG_USB_PRINTER=y |
1709 | # CONFIG_USB_WDM is not set | 1884 | # CONFIG_USB_WDM is not set |
1885 | # CONFIG_USB_TMC is not set | ||
1710 | 1886 | ||
1711 | # | 1887 | # |
1712 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1888 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
1713 | # | 1889 | # |
1714 | 1890 | ||
1715 | # | 1891 | # |
1716 | # may also be needed; see USB_STORAGE Help for more information | 1892 | # see USB_STORAGE Help for more information |
1717 | # | 1893 | # |
1718 | CONFIG_USB_STORAGE=y | 1894 | CONFIG_USB_STORAGE=y |
1719 | # CONFIG_USB_STORAGE_DEBUG is not set | 1895 | # CONFIG_USB_STORAGE_DEBUG is not set |
1720 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1896 | # CONFIG_USB_STORAGE_DATAFAB is not set |
1721 | # CONFIG_USB_STORAGE_FREECOM is not set | 1897 | # CONFIG_USB_STORAGE_FREECOM is not set |
1722 | # CONFIG_USB_STORAGE_ISD200 is not set | 1898 | # CONFIG_USB_STORAGE_ISD200 is not set |
1723 | # CONFIG_USB_STORAGE_DPCM is not set | ||
1724 | # CONFIG_USB_STORAGE_USBAT is not set | 1899 | # CONFIG_USB_STORAGE_USBAT is not set |
1725 | # CONFIG_USB_STORAGE_SDDR09 is not set | 1900 | # CONFIG_USB_STORAGE_SDDR09 is not set |
1726 | # CONFIG_USB_STORAGE_SDDR55 is not set | 1901 | # CONFIG_USB_STORAGE_SDDR55 is not set |
@@ -1728,7 +1903,6 @@ CONFIG_USB_STORAGE=y | |||
1728 | # CONFIG_USB_STORAGE_ALAUDA is not set | 1903 | # CONFIG_USB_STORAGE_ALAUDA is not set |
1729 | # CONFIG_USB_STORAGE_ONETOUCH is not set | 1904 | # CONFIG_USB_STORAGE_ONETOUCH is not set |
1730 | # CONFIG_USB_STORAGE_KARMA is not set | 1905 | # CONFIG_USB_STORAGE_KARMA is not set |
1731 | # CONFIG_USB_STORAGE_SIERRA is not set | ||
1732 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | 1906 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set |
1733 | CONFIG_USB_LIBUSUAL=y | 1907 | CONFIG_USB_LIBUSUAL=y |
1734 | 1908 | ||
@@ -1749,6 +1923,7 @@ CONFIG_USB_LIBUSUAL=y | |||
1749 | # CONFIG_USB_EMI62 is not set | 1923 | # CONFIG_USB_EMI62 is not set |
1750 | # CONFIG_USB_EMI26 is not set | 1924 | # CONFIG_USB_EMI26 is not set |
1751 | # CONFIG_USB_ADUTUX is not set | 1925 | # CONFIG_USB_ADUTUX is not set |
1926 | # CONFIG_USB_SEVSEG is not set | ||
1752 | # CONFIG_USB_RIO500 is not set | 1927 | # CONFIG_USB_RIO500 is not set |
1753 | # CONFIG_USB_LEGOTOWER is not set | 1928 | # CONFIG_USB_LEGOTOWER is not set |
1754 | # CONFIG_USB_LCD is not set | 1929 | # CONFIG_USB_LCD is not set |
@@ -1766,7 +1941,13 @@ CONFIG_USB_LIBUSUAL=y | |||
1766 | # CONFIG_USB_IOWARRIOR is not set | 1941 | # CONFIG_USB_IOWARRIOR is not set |
1767 | # CONFIG_USB_TEST is not set | 1942 | # CONFIG_USB_TEST is not set |
1768 | # CONFIG_USB_ISIGHTFW is not set | 1943 | # CONFIG_USB_ISIGHTFW is not set |
1944 | # CONFIG_USB_VST is not set | ||
1769 | # CONFIG_USB_GADGET is not set | 1945 | # CONFIG_USB_GADGET is not set |
1946 | |||
1947 | # | ||
1948 | # OTG and related infrastructure | ||
1949 | # | ||
1950 | # CONFIG_UWB is not set | ||
1770 | # CONFIG_MMC is not set | 1951 | # CONFIG_MMC is not set |
1771 | # CONFIG_MEMSTICK is not set | 1952 | # CONFIG_MEMSTICK is not set |
1772 | CONFIG_NEW_LEDS=y | 1953 | CONFIG_NEW_LEDS=y |
@@ -1775,6 +1956,7 @@ CONFIG_LEDS_CLASS=y | |||
1775 | # | 1956 | # |
1776 | # LED drivers | 1957 | # LED drivers |
1777 | # | 1958 | # |
1959 | # CONFIG_LEDS_ALIX2 is not set | ||
1778 | # CONFIG_LEDS_PCA9532 is not set | 1960 | # CONFIG_LEDS_PCA9532 is not set |
1779 | # CONFIG_LEDS_CLEVO_MAIL is not set | 1961 | # CONFIG_LEDS_CLEVO_MAIL is not set |
1780 | # CONFIG_LEDS_PCA955X is not set | 1962 | # CONFIG_LEDS_PCA955X is not set |
@@ -1785,6 +1967,7 @@ CONFIG_LEDS_CLASS=y | |||
1785 | CONFIG_LEDS_TRIGGERS=y | 1967 | CONFIG_LEDS_TRIGGERS=y |
1786 | # CONFIG_LEDS_TRIGGER_TIMER is not set | 1968 | # CONFIG_LEDS_TRIGGER_TIMER is not set |
1787 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set | 1969 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set |
1970 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
1788 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 1971 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set |
1789 | # CONFIG_ACCESSIBILITY is not set | 1972 | # CONFIG_ACCESSIBILITY is not set |
1790 | # CONFIG_INFINIBAND is not set | 1973 | # CONFIG_INFINIBAND is not set |
@@ -1824,6 +2007,7 @@ CONFIG_RTC_INTF_DEV=y | |||
1824 | # CONFIG_RTC_DRV_M41T80 is not set | 2007 | # CONFIG_RTC_DRV_M41T80 is not set |
1825 | # CONFIG_RTC_DRV_S35390A is not set | 2008 | # CONFIG_RTC_DRV_S35390A is not set |
1826 | # CONFIG_RTC_DRV_FM3130 is not set | 2009 | # CONFIG_RTC_DRV_FM3130 is not set |
2010 | # CONFIG_RTC_DRV_RX8581 is not set | ||
1827 | 2011 | ||
1828 | # | 2012 | # |
1829 | # SPI RTC drivers | 2013 | # SPI RTC drivers |
@@ -1833,12 +2017,15 @@ CONFIG_RTC_INTF_DEV=y | |||
1833 | # Platform RTC drivers | 2017 | # Platform RTC drivers |
1834 | # | 2018 | # |
1835 | CONFIG_RTC_DRV_CMOS=y | 2019 | CONFIG_RTC_DRV_CMOS=y |
2020 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1836 | # CONFIG_RTC_DRV_DS1511 is not set | 2021 | # CONFIG_RTC_DRV_DS1511 is not set |
1837 | # CONFIG_RTC_DRV_DS1553 is not set | 2022 | # CONFIG_RTC_DRV_DS1553 is not set |
1838 | # CONFIG_RTC_DRV_DS1742 is not set | 2023 | # CONFIG_RTC_DRV_DS1742 is not set |
1839 | # CONFIG_RTC_DRV_STK17TA8 is not set | 2024 | # CONFIG_RTC_DRV_STK17TA8 is not set |
1840 | # CONFIG_RTC_DRV_M48T86 is not set | 2025 | # CONFIG_RTC_DRV_M48T86 is not set |
2026 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1841 | # CONFIG_RTC_DRV_M48T59 is not set | 2027 | # CONFIG_RTC_DRV_M48T59 is not set |
2028 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1842 | # CONFIG_RTC_DRV_V3020 is not set | 2029 | # CONFIG_RTC_DRV_V3020 is not set |
1843 | 2030 | ||
1844 | # | 2031 | # |
@@ -1851,6 +2038,22 @@ CONFIG_DMADEVICES=y | |||
1851 | # | 2038 | # |
1852 | # CONFIG_INTEL_IOATDMA is not set | 2039 | # CONFIG_INTEL_IOATDMA is not set |
1853 | # CONFIG_UIO is not set | 2040 | # CONFIG_UIO is not set |
2041 | # CONFIG_STAGING is not set | ||
2042 | CONFIG_X86_PLATFORM_DEVICES=y | ||
2043 | # CONFIG_ACER_WMI is not set | ||
2044 | # CONFIG_ASUS_LAPTOP is not set | ||
2045 | # CONFIG_FUJITSU_LAPTOP is not set | ||
2046 | # CONFIG_TC1100_WMI is not set | ||
2047 | # CONFIG_MSI_LAPTOP is not set | ||
2048 | # CONFIG_PANASONIC_LAPTOP is not set | ||
2049 | # CONFIG_COMPAL_LAPTOP is not set | ||
2050 | # CONFIG_SONY_LAPTOP is not set | ||
2051 | # CONFIG_THINKPAD_ACPI is not set | ||
2052 | # CONFIG_INTEL_MENLOW is not set | ||
2053 | CONFIG_EEEPC_LAPTOP=y | ||
2054 | # CONFIG_ACPI_WMI is not set | ||
2055 | # CONFIG_ACPI_ASUS is not set | ||
2056 | # CONFIG_ACPI_TOSHIBA is not set | ||
1854 | 2057 | ||
1855 | # | 2058 | # |
1856 | # Firmware Drivers | 2059 | # Firmware Drivers |
@@ -1861,8 +2064,7 @@ CONFIG_EFI_VARS=y | |||
1861 | # CONFIG_DELL_RBU is not set | 2064 | # CONFIG_DELL_RBU is not set |
1862 | # CONFIG_DCDBAS is not set | 2065 | # CONFIG_DCDBAS is not set |
1863 | CONFIG_DMIID=y | 2066 | CONFIG_DMIID=y |
1864 | CONFIG_ISCSI_IBFT_FIND=y | 2067 | # CONFIG_ISCSI_IBFT_FIND is not set |
1865 | CONFIG_ISCSI_IBFT=y | ||
1866 | 2068 | ||
1867 | # | 2069 | # |
1868 | # File systems | 2070 | # File systems |
@@ -1872,21 +2074,24 @@ CONFIG_EXT3_FS=y | |||
1872 | CONFIG_EXT3_FS_XATTR=y | 2074 | CONFIG_EXT3_FS_XATTR=y |
1873 | CONFIG_EXT3_FS_POSIX_ACL=y | 2075 | CONFIG_EXT3_FS_POSIX_ACL=y |
1874 | CONFIG_EXT3_FS_SECURITY=y | 2076 | CONFIG_EXT3_FS_SECURITY=y |
1875 | # CONFIG_EXT4DEV_FS is not set | 2077 | # CONFIG_EXT4_FS is not set |
1876 | CONFIG_JBD=y | 2078 | CONFIG_JBD=y |
1877 | # CONFIG_JBD_DEBUG is not set | 2079 | # CONFIG_JBD_DEBUG is not set |
1878 | CONFIG_FS_MBCACHE=y | 2080 | CONFIG_FS_MBCACHE=y |
1879 | # CONFIG_REISERFS_FS is not set | 2081 | # CONFIG_REISERFS_FS is not set |
1880 | # CONFIG_JFS_FS is not set | 2082 | # CONFIG_JFS_FS is not set |
1881 | CONFIG_FS_POSIX_ACL=y | 2083 | CONFIG_FS_POSIX_ACL=y |
2084 | CONFIG_FILE_LOCKING=y | ||
1882 | # CONFIG_XFS_FS is not set | 2085 | # CONFIG_XFS_FS is not set |
1883 | # CONFIG_OCFS2_FS is not set | 2086 | # CONFIG_OCFS2_FS is not set |
2087 | # CONFIG_BTRFS_FS is not set | ||
1884 | CONFIG_DNOTIFY=y | 2088 | CONFIG_DNOTIFY=y |
1885 | CONFIG_INOTIFY=y | 2089 | CONFIG_INOTIFY=y |
1886 | CONFIG_INOTIFY_USER=y | 2090 | CONFIG_INOTIFY_USER=y |
1887 | CONFIG_QUOTA=y | 2091 | CONFIG_QUOTA=y |
1888 | CONFIG_QUOTA_NETLINK_INTERFACE=y | 2092 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
1889 | # CONFIG_PRINT_QUOTA_WARNING is not set | 2093 | # CONFIG_PRINT_QUOTA_WARNING is not set |
2094 | CONFIG_QUOTA_TREE=y | ||
1890 | # CONFIG_QFMT_V1 is not set | 2095 | # CONFIG_QFMT_V1 is not set |
1891 | CONFIG_QFMT_V2=y | 2096 | CONFIG_QFMT_V2=y |
1892 | CONFIG_QUOTACTL=y | 2097 | CONFIG_QUOTACTL=y |
@@ -1920,16 +2125,14 @@ CONFIG_PROC_FS=y | |||
1920 | CONFIG_PROC_KCORE=y | 2125 | CONFIG_PROC_KCORE=y |
1921 | CONFIG_PROC_VMCORE=y | 2126 | CONFIG_PROC_VMCORE=y |
1922 | CONFIG_PROC_SYSCTL=y | 2127 | CONFIG_PROC_SYSCTL=y |
2128 | CONFIG_PROC_PAGE_MONITOR=y | ||
1923 | CONFIG_SYSFS=y | 2129 | CONFIG_SYSFS=y |
1924 | CONFIG_TMPFS=y | 2130 | CONFIG_TMPFS=y |
1925 | CONFIG_TMPFS_POSIX_ACL=y | 2131 | CONFIG_TMPFS_POSIX_ACL=y |
1926 | CONFIG_HUGETLBFS=y | 2132 | CONFIG_HUGETLBFS=y |
1927 | CONFIG_HUGETLB_PAGE=y | 2133 | CONFIG_HUGETLB_PAGE=y |
1928 | # CONFIG_CONFIGFS_FS is not set | 2134 | # CONFIG_CONFIGFS_FS is not set |
1929 | 2135 | CONFIG_MISC_FILESYSTEMS=y | |
1930 | # | ||
1931 | # Miscellaneous filesystems | ||
1932 | # | ||
1933 | # CONFIG_ADFS_FS is not set | 2136 | # CONFIG_ADFS_FS is not set |
1934 | # CONFIG_AFFS_FS is not set | 2137 | # CONFIG_AFFS_FS is not set |
1935 | # CONFIG_ECRYPT_FS is not set | 2138 | # CONFIG_ECRYPT_FS is not set |
@@ -1939,6 +2142,7 @@ CONFIG_HUGETLB_PAGE=y | |||
1939 | # CONFIG_BFS_FS is not set | 2142 | # CONFIG_BFS_FS is not set |
1940 | # CONFIG_EFS_FS is not set | 2143 | # CONFIG_EFS_FS is not set |
1941 | # CONFIG_CRAMFS is not set | 2144 | # CONFIG_CRAMFS is not set |
2145 | # CONFIG_SQUASHFS is not set | ||
1942 | # CONFIG_VXFS_FS is not set | 2146 | # CONFIG_VXFS_FS is not set |
1943 | # CONFIG_MINIX_FS is not set | 2147 | # CONFIG_MINIX_FS is not set |
1944 | # CONFIG_OMFS_FS is not set | 2148 | # CONFIG_OMFS_FS is not set |
@@ -1960,6 +2164,7 @@ CONFIG_NFS_ACL_SUPPORT=y | |||
1960 | CONFIG_NFS_COMMON=y | 2164 | CONFIG_NFS_COMMON=y |
1961 | CONFIG_SUNRPC=y | 2165 | CONFIG_SUNRPC=y |
1962 | CONFIG_SUNRPC_GSS=y | 2166 | CONFIG_SUNRPC_GSS=y |
2167 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
1963 | CONFIG_RPCSEC_GSS_KRB5=y | 2168 | CONFIG_RPCSEC_GSS_KRB5=y |
1964 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 2169 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1965 | # CONFIG_SMB_FS is not set | 2170 | # CONFIG_SMB_FS is not set |
@@ -2036,7 +2241,7 @@ CONFIG_NLS_UTF8=y | |||
2036 | # | 2241 | # |
2037 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | 2242 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y |
2038 | CONFIG_PRINTK_TIME=y | 2243 | CONFIG_PRINTK_TIME=y |
2039 | CONFIG_ENABLE_WARN_DEPRECATED=y | 2244 | # CONFIG_ENABLE_WARN_DEPRECATED is not set |
2040 | CONFIG_ENABLE_MUST_CHECK=y | 2245 | CONFIG_ENABLE_MUST_CHECK=y |
2041 | CONFIG_FRAME_WARN=2048 | 2246 | CONFIG_FRAME_WARN=2048 |
2042 | CONFIG_MAGIC_SYSRQ=y | 2247 | CONFIG_MAGIC_SYSRQ=y |
@@ -2066,33 +2271,54 @@ CONFIG_TIMER_STATS=y | |||
2066 | CONFIG_DEBUG_BUGVERBOSE=y | 2271 | CONFIG_DEBUG_BUGVERBOSE=y |
2067 | # CONFIG_DEBUG_INFO is not set | 2272 | # CONFIG_DEBUG_INFO is not set |
2068 | # CONFIG_DEBUG_VM is not set | 2273 | # CONFIG_DEBUG_VM is not set |
2274 | # CONFIG_DEBUG_VIRTUAL is not set | ||
2069 | # CONFIG_DEBUG_WRITECOUNT is not set | 2275 | # CONFIG_DEBUG_WRITECOUNT is not set |
2070 | CONFIG_DEBUG_MEMORY_INIT=y | 2276 | CONFIG_DEBUG_MEMORY_INIT=y |
2071 | # CONFIG_DEBUG_LIST is not set | 2277 | # CONFIG_DEBUG_LIST is not set |
2072 | # CONFIG_DEBUG_SG is not set | 2278 | # CONFIG_DEBUG_SG is not set |
2279 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
2280 | CONFIG_ARCH_WANT_FRAME_POINTERS=y | ||
2073 | CONFIG_FRAME_POINTER=y | 2281 | CONFIG_FRAME_POINTER=y |
2074 | # CONFIG_BOOT_PRINTK_DELAY is not set | 2282 | # CONFIG_BOOT_PRINTK_DELAY is not set |
2075 | # CONFIG_RCU_TORTURE_TEST is not set | 2283 | # CONFIG_RCU_TORTURE_TEST is not set |
2284 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
2076 | # CONFIG_KPROBES_SANITY_TEST is not set | 2285 | # CONFIG_KPROBES_SANITY_TEST is not set |
2077 | # CONFIG_BACKTRACE_SELF_TEST is not set | 2286 | # CONFIG_BACKTRACE_SELF_TEST is not set |
2287 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
2078 | # CONFIG_LKDTM is not set | 2288 | # CONFIG_LKDTM is not set |
2079 | # CONFIG_FAULT_INJECTION is not set | 2289 | # CONFIG_FAULT_INJECTION is not set |
2080 | # CONFIG_LATENCYTOP is not set | 2290 | # CONFIG_LATENCYTOP is not set |
2081 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 2291 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
2082 | CONFIG_HAVE_FTRACE=y | 2292 | CONFIG_USER_STACKTRACE_SUPPORT=y |
2293 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
2294 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
2295 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
2083 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 2296 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
2084 | # CONFIG_FTRACE is not set | 2297 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
2298 | CONFIG_HAVE_HW_BRANCH_TRACER=y | ||
2299 | |||
2300 | # | ||
2301 | # Tracers | ||
2302 | # | ||
2303 | # CONFIG_FUNCTION_TRACER is not set | ||
2085 | # CONFIG_IRQSOFF_TRACER is not set | 2304 | # CONFIG_IRQSOFF_TRACER is not set |
2086 | # CONFIG_SYSPROF_TRACER is not set | 2305 | # CONFIG_SYSPROF_TRACER is not set |
2087 | # CONFIG_SCHED_TRACER is not set | 2306 | # CONFIG_SCHED_TRACER is not set |
2088 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 2307 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
2308 | # CONFIG_BOOT_TRACER is not set | ||
2309 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
2310 | # CONFIG_POWER_TRACER is not set | ||
2311 | # CONFIG_STACK_TRACER is not set | ||
2312 | # CONFIG_HW_BRANCH_TRACER is not set | ||
2089 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y | 2313 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y |
2314 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
2090 | # CONFIG_SAMPLES is not set | 2315 | # CONFIG_SAMPLES is not set |
2091 | CONFIG_HAVE_ARCH_KGDB=y | 2316 | CONFIG_HAVE_ARCH_KGDB=y |
2092 | # CONFIG_KGDB is not set | 2317 | # CONFIG_KGDB is not set |
2093 | # CONFIG_STRICT_DEVMEM is not set | 2318 | # CONFIG_STRICT_DEVMEM is not set |
2094 | CONFIG_X86_VERBOSE_BOOTUP=y | 2319 | CONFIG_X86_VERBOSE_BOOTUP=y |
2095 | CONFIG_EARLY_PRINTK=y | 2320 | CONFIG_EARLY_PRINTK=y |
2321 | CONFIG_EARLY_PRINTK_DBGP=y | ||
2096 | CONFIG_DEBUG_STACKOVERFLOW=y | 2322 | CONFIG_DEBUG_STACKOVERFLOW=y |
2097 | CONFIG_DEBUG_STACK_USAGE=y | 2323 | CONFIG_DEBUG_STACK_USAGE=y |
2098 | # CONFIG_DEBUG_PAGEALLOC is not set | 2324 | # CONFIG_DEBUG_PAGEALLOC is not set |
@@ -2123,8 +2349,10 @@ CONFIG_OPTIMIZE_INLINING=y | |||
2123 | CONFIG_KEYS=y | 2349 | CONFIG_KEYS=y |
2124 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | 2350 | CONFIG_KEYS_DEBUG_PROC_KEYS=y |
2125 | CONFIG_SECURITY=y | 2351 | CONFIG_SECURITY=y |
2352 | # CONFIG_SECURITYFS is not set | ||
2126 | CONFIG_SECURITY_NETWORK=y | 2353 | CONFIG_SECURITY_NETWORK=y |
2127 | # CONFIG_SECURITY_NETWORK_XFRM is not set | 2354 | # CONFIG_SECURITY_NETWORK_XFRM is not set |
2355 | # CONFIG_SECURITY_PATH is not set | ||
2128 | CONFIG_SECURITY_FILE_CAPABILITIES=y | 2356 | CONFIG_SECURITY_FILE_CAPABILITIES=y |
2129 | # CONFIG_SECURITY_ROOTPLUG is not set | 2357 | # CONFIG_SECURITY_ROOTPLUG is not set |
2130 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 | 2358 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 |
@@ -2135,7 +2363,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y | |||
2135 | CONFIG_SECURITY_SELINUX_DEVELOP=y | 2363 | CONFIG_SECURITY_SELINUX_DEVELOP=y |
2136 | CONFIG_SECURITY_SELINUX_AVC_STATS=y | 2364 | CONFIG_SECURITY_SELINUX_AVC_STATS=y |
2137 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 | 2365 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 |
2138 | # CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set | ||
2139 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set | 2366 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set |
2140 | # CONFIG_SECURITY_SMACK is not set | 2367 | # CONFIG_SECURITY_SMACK is not set |
2141 | CONFIG_CRYPTO=y | 2368 | CONFIG_CRYPTO=y |
@@ -2143,11 +2370,18 @@ CONFIG_CRYPTO=y | |||
2143 | # | 2370 | # |
2144 | # Crypto core or helper | 2371 | # Crypto core or helper |
2145 | # | 2372 | # |
2373 | # CONFIG_CRYPTO_FIPS is not set | ||
2146 | CONFIG_CRYPTO_ALGAPI=y | 2374 | CONFIG_CRYPTO_ALGAPI=y |
2375 | CONFIG_CRYPTO_ALGAPI2=y | ||
2147 | CONFIG_CRYPTO_AEAD=y | 2376 | CONFIG_CRYPTO_AEAD=y |
2377 | CONFIG_CRYPTO_AEAD2=y | ||
2148 | CONFIG_CRYPTO_BLKCIPHER=y | 2378 | CONFIG_CRYPTO_BLKCIPHER=y |
2379 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
2149 | CONFIG_CRYPTO_HASH=y | 2380 | CONFIG_CRYPTO_HASH=y |
2381 | CONFIG_CRYPTO_HASH2=y | ||
2382 | CONFIG_CRYPTO_RNG2=y | ||
2150 | CONFIG_CRYPTO_MANAGER=y | 2383 | CONFIG_CRYPTO_MANAGER=y |
2384 | CONFIG_CRYPTO_MANAGER2=y | ||
2151 | # CONFIG_CRYPTO_GF128MUL is not set | 2385 | # CONFIG_CRYPTO_GF128MUL is not set |
2152 | # CONFIG_CRYPTO_NULL is not set | 2386 | # CONFIG_CRYPTO_NULL is not set |
2153 | # CONFIG_CRYPTO_CRYPTD is not set | 2387 | # CONFIG_CRYPTO_CRYPTD is not set |
@@ -2182,6 +2416,7 @@ CONFIG_CRYPTO_HMAC=y | |||
2182 | # Digest | 2416 | # Digest |
2183 | # | 2417 | # |
2184 | # CONFIG_CRYPTO_CRC32C is not set | 2418 | # CONFIG_CRYPTO_CRC32C is not set |
2419 | # CONFIG_CRYPTO_CRC32C_INTEL is not set | ||
2185 | # CONFIG_CRYPTO_MD4 is not set | 2420 | # CONFIG_CRYPTO_MD4 is not set |
2186 | CONFIG_CRYPTO_MD5=y | 2421 | CONFIG_CRYPTO_MD5=y |
2187 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 2422 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
@@ -2222,6 +2457,11 @@ CONFIG_CRYPTO_DES=y | |||
2222 | # | 2457 | # |
2223 | # CONFIG_CRYPTO_DEFLATE is not set | 2458 | # CONFIG_CRYPTO_DEFLATE is not set |
2224 | # CONFIG_CRYPTO_LZO is not set | 2459 | # CONFIG_CRYPTO_LZO is not set |
2460 | |||
2461 | # | ||
2462 | # Random Number Generation | ||
2463 | # | ||
2464 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
2225 | CONFIG_CRYPTO_HW=y | 2465 | CONFIG_CRYPTO_HW=y |
2226 | # CONFIG_CRYPTO_DEV_PADLOCK is not set | 2466 | # CONFIG_CRYPTO_DEV_PADLOCK is not set |
2227 | # CONFIG_CRYPTO_DEV_GEODE is not set | 2467 | # CONFIG_CRYPTO_DEV_GEODE is not set |
@@ -2239,6 +2479,7 @@ CONFIG_VIRTUALIZATION=y | |||
2239 | CONFIG_BITREVERSE=y | 2479 | CONFIG_BITREVERSE=y |
2240 | CONFIG_GENERIC_FIND_FIRST_BIT=y | 2480 | CONFIG_GENERIC_FIND_FIRST_BIT=y |
2241 | CONFIG_GENERIC_FIND_NEXT_BIT=y | 2481 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
2482 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
2242 | # CONFIG_CRC_CCITT is not set | 2483 | # CONFIG_CRC_CCITT is not set |
2243 | # CONFIG_CRC16 is not set | 2484 | # CONFIG_CRC16 is not set |
2244 | CONFIG_CRC_T10DIF=y | 2485 | CONFIG_CRC_T10DIF=y |
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig index 322dd2748fc9..9fe5d212ab4c 100644 --- a/arch/x86/configs/x86_64_defconfig +++ b/arch/x86/configs/x86_64_defconfig | |||
@@ -1,14 +1,13 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.27-rc5 | 3 | # Linux kernel version: 2.6.29-rc4 |
4 | # Wed Sep 3 17:13:39 2008 | 4 | # Tue Feb 24 15:44:16 2009 |
5 | # | 5 | # |
6 | CONFIG_64BIT=y | 6 | CONFIG_64BIT=y |
7 | # CONFIG_X86_32 is not set | 7 | # CONFIG_X86_32 is not set |
8 | CONFIG_X86_64=y | 8 | CONFIG_X86_64=y |
9 | CONFIG_X86=y | 9 | CONFIG_X86=y |
10 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" | 10 | CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" |
11 | # CONFIG_GENERIC_LOCKBREAK is not set | ||
12 | CONFIG_GENERIC_TIME=y | 11 | CONFIG_GENERIC_TIME=y |
13 | CONFIG_GENERIC_CMOS_UPDATE=y | 12 | CONFIG_GENERIC_CMOS_UPDATE=y |
14 | CONFIG_CLOCKSOURCE_WATCHDOG=y | 13 | CONFIG_CLOCKSOURCE_WATCHDOG=y |
@@ -23,17 +22,16 @@ CONFIG_ZONE_DMA=y | |||
23 | CONFIG_GENERIC_ISA_DMA=y | 22 | CONFIG_GENERIC_ISA_DMA=y |
24 | CONFIG_GENERIC_IOMAP=y | 23 | CONFIG_GENERIC_IOMAP=y |
25 | CONFIG_GENERIC_BUG=y | 24 | CONFIG_GENERIC_BUG=y |
25 | CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y | ||
26 | CONFIG_GENERIC_HWEIGHT=y | 26 | CONFIG_GENERIC_HWEIGHT=y |
27 | # CONFIG_GENERIC_GPIO is not set | ||
28 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | 27 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y |
29 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 28 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
30 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | 29 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set |
31 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
32 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
33 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | 30 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y |
34 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 31 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
35 | CONFIG_GENERIC_TIME_VSYSCALL=y | 32 | CONFIG_GENERIC_TIME_VSYSCALL=y |
36 | CONFIG_ARCH_HAS_CPU_RELAX=y | 33 | CONFIG_ARCH_HAS_CPU_RELAX=y |
34 | CONFIG_ARCH_HAS_DEFAULT_IDLE=y | ||
37 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y | 35 | CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y |
38 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y | 36 | CONFIG_HAVE_SETUP_PER_CPU_AREA=y |
39 | CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y | 37 | CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y |
@@ -42,12 +40,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y | |||
42 | CONFIG_ZONE_DMA32=y | 40 | CONFIG_ZONE_DMA32=y |
43 | CONFIG_ARCH_POPULATES_NODE_MAP=y | 41 | CONFIG_ARCH_POPULATES_NODE_MAP=y |
44 | CONFIG_AUDIT_ARCH=y | 42 | CONFIG_AUDIT_ARCH=y |
45 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
46 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y | 43 | CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y |
47 | CONFIG_GENERIC_HARDIRQS=y | 44 | CONFIG_GENERIC_HARDIRQS=y |
48 | CONFIG_GENERIC_IRQ_PROBE=y | 45 | CONFIG_GENERIC_IRQ_PROBE=y |
49 | CONFIG_GENERIC_PENDING_IRQ=y | 46 | CONFIG_GENERIC_PENDING_IRQ=y |
50 | CONFIG_X86_SMP=y | 47 | CONFIG_X86_SMP=y |
48 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
51 | CONFIG_X86_64_SMP=y | 49 | CONFIG_X86_64_SMP=y |
52 | CONFIG_X86_HT=y | 50 | CONFIG_X86_HT=y |
53 | CONFIG_X86_BIOS_REBOOT=y | 51 | CONFIG_X86_BIOS_REBOOT=y |
@@ -76,30 +74,44 @@ CONFIG_TASK_IO_ACCOUNTING=y | |||
76 | CONFIG_AUDIT=y | 74 | CONFIG_AUDIT=y |
77 | CONFIG_AUDITSYSCALL=y | 75 | CONFIG_AUDITSYSCALL=y |
78 | CONFIG_AUDIT_TREE=y | 76 | CONFIG_AUDIT_TREE=y |
77 | |||
78 | # | ||
79 | # RCU Subsystem | ||
80 | # | ||
81 | # CONFIG_CLASSIC_RCU is not set | ||
82 | CONFIG_TREE_RCU=y | ||
83 | # CONFIG_PREEMPT_RCU is not set | ||
84 | # CONFIG_RCU_TRACE is not set | ||
85 | CONFIG_RCU_FANOUT=64 | ||
86 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
87 | # CONFIG_TREE_RCU_TRACE is not set | ||
88 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
79 | # CONFIG_IKCONFIG is not set | 89 | # CONFIG_IKCONFIG is not set |
80 | CONFIG_LOG_BUF_SHIFT=18 | 90 | CONFIG_LOG_BUF_SHIFT=18 |
81 | CONFIG_CGROUPS=y | ||
82 | # CONFIG_CGROUP_DEBUG is not set | ||
83 | CONFIG_CGROUP_NS=y | ||
84 | # CONFIG_CGROUP_DEVICE is not set | ||
85 | CONFIG_CPUSETS=y | ||
86 | CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y | 91 | CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y |
87 | CONFIG_GROUP_SCHED=y | 92 | CONFIG_GROUP_SCHED=y |
88 | CONFIG_FAIR_GROUP_SCHED=y | 93 | CONFIG_FAIR_GROUP_SCHED=y |
89 | # CONFIG_RT_GROUP_SCHED is not set | 94 | # CONFIG_RT_GROUP_SCHED is not set |
90 | # CONFIG_USER_SCHED is not set | 95 | # CONFIG_USER_SCHED is not set |
91 | CONFIG_CGROUP_SCHED=y | 96 | CONFIG_CGROUP_SCHED=y |
97 | CONFIG_CGROUPS=y | ||
98 | # CONFIG_CGROUP_DEBUG is not set | ||
99 | CONFIG_CGROUP_NS=y | ||
100 | CONFIG_CGROUP_FREEZER=y | ||
101 | # CONFIG_CGROUP_DEVICE is not set | ||
102 | CONFIG_CPUSETS=y | ||
103 | CONFIG_PROC_PID_CPUSET=y | ||
92 | CONFIG_CGROUP_CPUACCT=y | 104 | CONFIG_CGROUP_CPUACCT=y |
93 | CONFIG_RESOURCE_COUNTERS=y | 105 | CONFIG_RESOURCE_COUNTERS=y |
94 | # CONFIG_CGROUP_MEM_RES_CTLR is not set | 106 | # CONFIG_CGROUP_MEM_RES_CTLR is not set |
95 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | 107 | # CONFIG_SYSFS_DEPRECATED_V2 is not set |
96 | CONFIG_PROC_PID_CPUSET=y | ||
97 | CONFIG_RELAY=y | 108 | CONFIG_RELAY=y |
98 | CONFIG_NAMESPACES=y | 109 | CONFIG_NAMESPACES=y |
99 | CONFIG_UTS_NS=y | 110 | CONFIG_UTS_NS=y |
100 | CONFIG_IPC_NS=y | 111 | CONFIG_IPC_NS=y |
101 | CONFIG_USER_NS=y | 112 | CONFIG_USER_NS=y |
102 | CONFIG_PID_NS=y | 113 | CONFIG_PID_NS=y |
114 | CONFIG_NET_NS=y | ||
103 | CONFIG_BLK_DEV_INITRD=y | 115 | CONFIG_BLK_DEV_INITRD=y |
104 | CONFIG_INITRAMFS_SOURCE="" | 116 | CONFIG_INITRAMFS_SOURCE="" |
105 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 117 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
@@ -124,12 +136,15 @@ CONFIG_SIGNALFD=y | |||
124 | CONFIG_TIMERFD=y | 136 | CONFIG_TIMERFD=y |
125 | CONFIG_EVENTFD=y | 137 | CONFIG_EVENTFD=y |
126 | CONFIG_SHMEM=y | 138 | CONFIG_SHMEM=y |
139 | CONFIG_AIO=y | ||
127 | CONFIG_VM_EVENT_COUNTERS=y | 140 | CONFIG_VM_EVENT_COUNTERS=y |
141 | CONFIG_PCI_QUIRKS=y | ||
128 | CONFIG_SLUB_DEBUG=y | 142 | CONFIG_SLUB_DEBUG=y |
129 | # CONFIG_SLAB is not set | 143 | # CONFIG_SLAB is not set |
130 | CONFIG_SLUB=y | 144 | CONFIG_SLUB=y |
131 | # CONFIG_SLOB is not set | 145 | # CONFIG_SLOB is not set |
132 | CONFIG_PROFILING=y | 146 | CONFIG_PROFILING=y |
147 | CONFIG_TRACEPOINTS=y | ||
133 | CONFIG_MARKERS=y | 148 | CONFIG_MARKERS=y |
134 | # CONFIG_OPROFILE is not set | 149 | # CONFIG_OPROFILE is not set |
135 | CONFIG_HAVE_OPROFILE=y | 150 | CONFIG_HAVE_OPROFILE=y |
@@ -139,15 +154,10 @@ CONFIG_KRETPROBES=y | |||
139 | CONFIG_HAVE_IOREMAP_PROT=y | 154 | CONFIG_HAVE_IOREMAP_PROT=y |
140 | CONFIG_HAVE_KPROBES=y | 155 | CONFIG_HAVE_KPROBES=y |
141 | CONFIG_HAVE_KRETPROBES=y | 156 | CONFIG_HAVE_KRETPROBES=y |
142 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | 157 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
143 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
144 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
145 | # CONFIG_HAVE_CLK is not set | ||
146 | CONFIG_PROC_PAGE_MONITOR=y | ||
147 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 158 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
148 | CONFIG_SLABINFO=y | 159 | CONFIG_SLABINFO=y |
149 | CONFIG_RT_MUTEXES=y | 160 | CONFIG_RT_MUTEXES=y |
150 | # CONFIG_TINY_SHMEM is not set | ||
151 | CONFIG_BASE_SMALL=0 | 161 | CONFIG_BASE_SMALL=0 |
152 | CONFIG_MODULES=y | 162 | CONFIG_MODULES=y |
153 | # CONFIG_MODULE_FORCE_LOAD is not set | 163 | # CONFIG_MODULE_FORCE_LOAD is not set |
@@ -155,7 +165,6 @@ CONFIG_MODULE_UNLOAD=y | |||
155 | CONFIG_MODULE_FORCE_UNLOAD=y | 165 | CONFIG_MODULE_FORCE_UNLOAD=y |
156 | # CONFIG_MODVERSIONS is not set | 166 | # CONFIG_MODVERSIONS is not set |
157 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 167 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
158 | CONFIG_KMOD=y | ||
159 | CONFIG_STOP_MACHINE=y | 168 | CONFIG_STOP_MACHINE=y |
160 | CONFIG_BLOCK=y | 169 | CONFIG_BLOCK=y |
161 | CONFIG_BLK_DEV_IO_TRACE=y | 170 | CONFIG_BLK_DEV_IO_TRACE=y |
@@ -175,7 +184,7 @@ CONFIG_IOSCHED_CFQ=y | |||
175 | CONFIG_DEFAULT_CFQ=y | 184 | CONFIG_DEFAULT_CFQ=y |
176 | # CONFIG_DEFAULT_NOOP is not set | 185 | # CONFIG_DEFAULT_NOOP is not set |
177 | CONFIG_DEFAULT_IOSCHED="cfq" | 186 | CONFIG_DEFAULT_IOSCHED="cfq" |
178 | CONFIG_CLASSIC_RCU=y | 187 | CONFIG_FREEZER=y |
179 | 188 | ||
180 | # | 189 | # |
181 | # Processor type and features | 190 | # Processor type and features |
@@ -185,13 +194,14 @@ CONFIG_NO_HZ=y | |||
185 | CONFIG_HIGH_RES_TIMERS=y | 194 | CONFIG_HIGH_RES_TIMERS=y |
186 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 195 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
187 | CONFIG_SMP=y | 196 | CONFIG_SMP=y |
197 | CONFIG_SPARSE_IRQ=y | ||
198 | # CONFIG_NUMA_MIGRATE_IRQ_DESC is not set | ||
188 | CONFIG_X86_FIND_SMP_CONFIG=y | 199 | CONFIG_X86_FIND_SMP_CONFIG=y |
189 | CONFIG_X86_MPPARSE=y | 200 | CONFIG_X86_MPPARSE=y |
190 | CONFIG_X86_PC=y | ||
191 | # CONFIG_X86_ELAN is not set | 201 | # CONFIG_X86_ELAN is not set |
192 | # CONFIG_X86_VOYAGER is not set | ||
193 | # CONFIG_X86_GENERICARCH is not set | 202 | # CONFIG_X86_GENERICARCH is not set |
194 | # CONFIG_X86_VSMP is not set | 203 | # CONFIG_X86_VSMP is not set |
204 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
195 | # CONFIG_PARAVIRT_GUEST is not set | 205 | # CONFIG_PARAVIRT_GUEST is not set |
196 | # CONFIG_MEMTEST is not set | 206 | # CONFIG_MEMTEST is not set |
197 | # CONFIG_M386 is not set | 207 | # CONFIG_M386 is not set |
@@ -230,6 +240,11 @@ CONFIG_X86_CMPXCHG64=y | |||
230 | CONFIG_X86_CMOV=y | 240 | CONFIG_X86_CMOV=y |
231 | CONFIG_X86_MINIMUM_CPU_FAMILY=64 | 241 | CONFIG_X86_MINIMUM_CPU_FAMILY=64 |
232 | CONFIG_X86_DEBUGCTLMSR=y | 242 | CONFIG_X86_DEBUGCTLMSR=y |
243 | CONFIG_CPU_SUP_INTEL=y | ||
244 | CONFIG_CPU_SUP_AMD=y | ||
245 | CONFIG_CPU_SUP_CENTAUR_64=y | ||
246 | CONFIG_X86_DS=y | ||
247 | CONFIG_X86_PTRACE_BTS=y | ||
233 | CONFIG_HPET_TIMER=y | 248 | CONFIG_HPET_TIMER=y |
234 | CONFIG_HPET_EMULATE_RTC=y | 249 | CONFIG_HPET_EMULATE_RTC=y |
235 | CONFIG_DMI=y | 250 | CONFIG_DMI=y |
@@ -237,8 +252,11 @@ CONFIG_GART_IOMMU=y | |||
237 | CONFIG_CALGARY_IOMMU=y | 252 | CONFIG_CALGARY_IOMMU=y |
238 | CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y | 253 | CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y |
239 | CONFIG_AMD_IOMMU=y | 254 | CONFIG_AMD_IOMMU=y |
255 | CONFIG_AMD_IOMMU_STATS=y | ||
240 | CONFIG_SWIOTLB=y | 256 | CONFIG_SWIOTLB=y |
241 | CONFIG_IOMMU_HELPER=y | 257 | CONFIG_IOMMU_HELPER=y |
258 | CONFIG_IOMMU_API=y | ||
259 | # CONFIG_MAXSMP is not set | ||
242 | CONFIG_NR_CPUS=64 | 260 | CONFIG_NR_CPUS=64 |
243 | CONFIG_SCHED_SMT=y | 261 | CONFIG_SCHED_SMT=y |
244 | CONFIG_SCHED_MC=y | 262 | CONFIG_SCHED_MC=y |
@@ -247,12 +265,19 @@ CONFIG_PREEMPT_VOLUNTARY=y | |||
247 | # CONFIG_PREEMPT is not set | 265 | # CONFIG_PREEMPT is not set |
248 | CONFIG_X86_LOCAL_APIC=y | 266 | CONFIG_X86_LOCAL_APIC=y |
249 | CONFIG_X86_IO_APIC=y | 267 | CONFIG_X86_IO_APIC=y |
250 | # CONFIG_X86_MCE is not set | 268 | CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y |
269 | CONFIG_X86_MCE=y | ||
270 | CONFIG_X86_MCE_INTEL=y | ||
271 | CONFIG_X86_MCE_AMD=y | ||
251 | # CONFIG_I8K is not set | 272 | # CONFIG_I8K is not set |
252 | CONFIG_MICROCODE=y | 273 | CONFIG_MICROCODE=y |
274 | CONFIG_MICROCODE_INTEL=y | ||
275 | CONFIG_MICROCODE_AMD=y | ||
253 | CONFIG_MICROCODE_OLD_INTERFACE=y | 276 | CONFIG_MICROCODE_OLD_INTERFACE=y |
254 | CONFIG_X86_MSR=y | 277 | CONFIG_X86_MSR=y |
255 | CONFIG_X86_CPUID=y | 278 | CONFIG_X86_CPUID=y |
279 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y | ||
280 | CONFIG_DIRECT_GBPAGES=y | ||
256 | CONFIG_NUMA=y | 281 | CONFIG_NUMA=y |
257 | CONFIG_K8_NUMA=y | 282 | CONFIG_K8_NUMA=y |
258 | CONFIG_X86_64_ACPI_NUMA=y | 283 | CONFIG_X86_64_ACPI_NUMA=y |
@@ -269,7 +294,6 @@ CONFIG_SPARSEMEM_MANUAL=y | |||
269 | CONFIG_SPARSEMEM=y | 294 | CONFIG_SPARSEMEM=y |
270 | CONFIG_NEED_MULTIPLE_NODES=y | 295 | CONFIG_NEED_MULTIPLE_NODES=y |
271 | CONFIG_HAVE_MEMORY_PRESENT=y | 296 | CONFIG_HAVE_MEMORY_PRESENT=y |
272 | # CONFIG_SPARSEMEM_STATIC is not set | ||
273 | CONFIG_SPARSEMEM_EXTREME=y | 297 | CONFIG_SPARSEMEM_EXTREME=y |
274 | CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y | 298 | CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y |
275 | CONFIG_SPARSEMEM_VMEMMAP=y | 299 | CONFIG_SPARSEMEM_VMEMMAP=y |
@@ -280,10 +304,14 @@ CONFIG_SPARSEMEM_VMEMMAP=y | |||
280 | CONFIG_PAGEFLAGS_EXTENDED=y | 304 | CONFIG_PAGEFLAGS_EXTENDED=y |
281 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 305 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
282 | CONFIG_MIGRATION=y | 306 | CONFIG_MIGRATION=y |
283 | CONFIG_RESOURCES_64BIT=y | 307 | CONFIG_PHYS_ADDR_T_64BIT=y |
284 | CONFIG_ZONE_DMA_FLAG=1 | 308 | CONFIG_ZONE_DMA_FLAG=1 |
285 | CONFIG_BOUNCE=y | 309 | CONFIG_BOUNCE=y |
286 | CONFIG_VIRT_TO_BUS=y | 310 | CONFIG_VIRT_TO_BUS=y |
311 | CONFIG_UNEVICTABLE_LRU=y | ||
312 | CONFIG_X86_CHECK_BIOS_CORRUPTION=y | ||
313 | CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y | ||
314 | CONFIG_X86_RESERVE_LOW_64K=y | ||
287 | CONFIG_MTRR=y | 315 | CONFIG_MTRR=y |
288 | # CONFIG_MTRR_SANITIZER is not set | 316 | # CONFIG_MTRR_SANITIZER is not set |
289 | CONFIG_X86_PAT=y | 317 | CONFIG_X86_PAT=y |
@@ -302,11 +330,12 @@ CONFIG_PHYSICAL_START=0x1000000 | |||
302 | CONFIG_PHYSICAL_ALIGN=0x200000 | 330 | CONFIG_PHYSICAL_ALIGN=0x200000 |
303 | CONFIG_HOTPLUG_CPU=y | 331 | CONFIG_HOTPLUG_CPU=y |
304 | # CONFIG_COMPAT_VDSO is not set | 332 | # CONFIG_COMPAT_VDSO is not set |
333 | # CONFIG_CMDLINE_BOOL is not set | ||
305 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | 334 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y |
306 | CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y | 335 | CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y |
307 | 336 | ||
308 | # | 337 | # |
309 | # Power management options | 338 | # Power management and ACPI options |
310 | # | 339 | # |
311 | CONFIG_ARCH_HIBERNATION_HEADER=y | 340 | CONFIG_ARCH_HIBERNATION_HEADER=y |
312 | CONFIG_PM=y | 341 | CONFIG_PM=y |
@@ -333,20 +362,14 @@ CONFIG_ACPI_BATTERY=y | |||
333 | CONFIG_ACPI_BUTTON=y | 362 | CONFIG_ACPI_BUTTON=y |
334 | CONFIG_ACPI_FAN=y | 363 | CONFIG_ACPI_FAN=y |
335 | CONFIG_ACPI_DOCK=y | 364 | CONFIG_ACPI_DOCK=y |
336 | # CONFIG_ACPI_BAY is not set | ||
337 | CONFIG_ACPI_PROCESSOR=y | 365 | CONFIG_ACPI_PROCESSOR=y |
338 | CONFIG_ACPI_HOTPLUG_CPU=y | 366 | CONFIG_ACPI_HOTPLUG_CPU=y |
339 | CONFIG_ACPI_THERMAL=y | 367 | CONFIG_ACPI_THERMAL=y |
340 | CONFIG_ACPI_NUMA=y | 368 | CONFIG_ACPI_NUMA=y |
341 | # CONFIG_ACPI_WMI is not set | ||
342 | # CONFIG_ACPI_ASUS is not set | ||
343 | # CONFIG_ACPI_TOSHIBA is not set | ||
344 | # CONFIG_ACPI_CUSTOM_DSDT is not set | 369 | # CONFIG_ACPI_CUSTOM_DSDT is not set |
345 | CONFIG_ACPI_BLACKLIST_YEAR=0 | 370 | CONFIG_ACPI_BLACKLIST_YEAR=0 |
346 | # CONFIG_ACPI_DEBUG is not set | 371 | # CONFIG_ACPI_DEBUG is not set |
347 | CONFIG_ACPI_EC=y | ||
348 | # CONFIG_ACPI_PCI_SLOT is not set | 372 | # CONFIG_ACPI_PCI_SLOT is not set |
349 | CONFIG_ACPI_POWER=y | ||
350 | CONFIG_ACPI_SYSTEM=y | 373 | CONFIG_ACPI_SYSTEM=y |
351 | CONFIG_X86_PM_TIMER=y | 374 | CONFIG_X86_PM_TIMER=y |
352 | CONFIG_ACPI_CONTAINER=y | 375 | CONFIG_ACPI_CONTAINER=y |
@@ -381,13 +404,17 @@ CONFIG_X86_ACPI_CPUFREQ=y | |||
381 | # | 404 | # |
382 | # shared options | 405 | # shared options |
383 | # | 406 | # |
384 | # CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set | ||
385 | # CONFIG_X86_SPEEDSTEP_LIB is not set | 407 | # CONFIG_X86_SPEEDSTEP_LIB is not set |
386 | CONFIG_CPU_IDLE=y | 408 | CONFIG_CPU_IDLE=y |
387 | CONFIG_CPU_IDLE_GOV_LADDER=y | 409 | CONFIG_CPU_IDLE_GOV_LADDER=y |
388 | CONFIG_CPU_IDLE_GOV_MENU=y | 410 | CONFIG_CPU_IDLE_GOV_MENU=y |
389 | 411 | ||
390 | # | 412 | # |
413 | # Memory power savings | ||
414 | # | ||
415 | # CONFIG_I7300_IDLE is not set | ||
416 | |||
417 | # | ||
391 | # Bus options (PCI etc.) | 418 | # Bus options (PCI etc.) |
392 | # | 419 | # |
393 | CONFIG_PCI=y | 420 | CONFIG_PCI=y |
@@ -395,8 +422,10 @@ CONFIG_PCI_DIRECT=y | |||
395 | CONFIG_PCI_MMCONFIG=y | 422 | CONFIG_PCI_MMCONFIG=y |
396 | CONFIG_PCI_DOMAINS=y | 423 | CONFIG_PCI_DOMAINS=y |
397 | CONFIG_DMAR=y | 424 | CONFIG_DMAR=y |
425 | # CONFIG_DMAR_DEFAULT_ON is not set | ||
398 | CONFIG_DMAR_GFX_WA=y | 426 | CONFIG_DMAR_GFX_WA=y |
399 | CONFIG_DMAR_FLOPPY_WA=y | 427 | CONFIG_DMAR_FLOPPY_WA=y |
428 | # CONFIG_INTR_REMAP is not set | ||
400 | CONFIG_PCIEPORTBUS=y | 429 | CONFIG_PCIEPORTBUS=y |
401 | # CONFIG_HOTPLUG_PCI_PCIE is not set | 430 | # CONFIG_HOTPLUG_PCI_PCIE is not set |
402 | CONFIG_PCIEAER=y | 431 | CONFIG_PCIEAER=y |
@@ -405,6 +434,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y | |||
405 | CONFIG_PCI_MSI=y | 434 | CONFIG_PCI_MSI=y |
406 | # CONFIG_PCI_LEGACY is not set | 435 | # CONFIG_PCI_LEGACY is not set |
407 | # CONFIG_PCI_DEBUG is not set | 436 | # CONFIG_PCI_DEBUG is not set |
437 | # CONFIG_PCI_STUB is not set | ||
408 | CONFIG_HT_IRQ=y | 438 | CONFIG_HT_IRQ=y |
409 | CONFIG_ISA_DMA_API=y | 439 | CONFIG_ISA_DMA_API=y |
410 | CONFIG_K8_NB=y | 440 | CONFIG_K8_NB=y |
@@ -438,6 +468,8 @@ CONFIG_HOTPLUG_PCI=y | |||
438 | # | 468 | # |
439 | CONFIG_BINFMT_ELF=y | 469 | CONFIG_BINFMT_ELF=y |
440 | CONFIG_COMPAT_BINFMT_ELF=y | 470 | CONFIG_COMPAT_BINFMT_ELF=y |
471 | CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y | ||
472 | # CONFIG_HAVE_AOUT is not set | ||
441 | CONFIG_BINFMT_MISC=y | 473 | CONFIG_BINFMT_MISC=y |
442 | CONFIG_IA32_EMULATION=y | 474 | CONFIG_IA32_EMULATION=y |
443 | # CONFIG_IA32_AOUT is not set | 475 | # CONFIG_IA32_AOUT is not set |
@@ -449,6 +481,7 @@ CONFIG_NET=y | |||
449 | # | 481 | # |
450 | # Networking options | 482 | # Networking options |
451 | # | 483 | # |
484 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
452 | CONFIG_PACKET=y | 485 | CONFIG_PACKET=y |
453 | CONFIG_PACKET_MMAP=y | 486 | CONFIG_PACKET_MMAP=y |
454 | CONFIG_UNIX=y | 487 | CONFIG_UNIX=y |
@@ -509,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y | |||
509 | # CONFIG_DEFAULT_RENO is not set | 542 | # CONFIG_DEFAULT_RENO is not set |
510 | CONFIG_DEFAULT_TCP_CONG="cubic" | 543 | CONFIG_DEFAULT_TCP_CONG="cubic" |
511 | CONFIG_TCP_MD5SIG=y | 544 | CONFIG_TCP_MD5SIG=y |
512 | # CONFIG_IP_VS is not set | ||
513 | CONFIG_IPV6=y | 545 | CONFIG_IPV6=y |
514 | # CONFIG_IPV6_PRIVACY is not set | 546 | # CONFIG_IPV6_PRIVACY is not set |
515 | # CONFIG_IPV6_ROUTER_PREF is not set | 547 | # CONFIG_IPV6_ROUTER_PREF is not set |
@@ -547,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y | |||
547 | CONFIG_NF_CONNTRACK_SIP=y | 579 | CONFIG_NF_CONNTRACK_SIP=y |
548 | CONFIG_NF_CT_NETLINK=y | 580 | CONFIG_NF_CT_NETLINK=y |
549 | CONFIG_NETFILTER_XTABLES=y | 581 | CONFIG_NETFILTER_XTABLES=y |
582 | CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y | ||
550 | CONFIG_NETFILTER_XT_TARGET_MARK=y | 583 | CONFIG_NETFILTER_XT_TARGET_MARK=y |
551 | CONFIG_NETFILTER_XT_TARGET_NFLOG=y | 584 | CONFIG_NETFILTER_XT_TARGET_NFLOG=y |
552 | CONFIG_NETFILTER_XT_TARGET_SECMARK=y | 585 | CONFIG_NETFILTER_XT_TARGET_SECMARK=y |
553 | CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y | ||
554 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=y | 586 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=y |
555 | CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y | 587 | CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y |
556 | CONFIG_NETFILTER_XT_MATCH_MARK=y | 588 | CONFIG_NETFILTER_XT_MATCH_MARK=y |
557 | CONFIG_NETFILTER_XT_MATCH_POLICY=y | 589 | CONFIG_NETFILTER_XT_MATCH_POLICY=y |
558 | CONFIG_NETFILTER_XT_MATCH_STATE=y | 590 | CONFIG_NETFILTER_XT_MATCH_STATE=y |
591 | # CONFIG_IP_VS is not set | ||
559 | 592 | ||
560 | # | 593 | # |
561 | # IP: Netfilter Configuration | 594 | # IP: Netfilter Configuration |
562 | # | 595 | # |
596 | CONFIG_NF_DEFRAG_IPV4=y | ||
563 | CONFIG_NF_CONNTRACK_IPV4=y | 597 | CONFIG_NF_CONNTRACK_IPV4=y |
564 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | 598 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y |
565 | CONFIG_IP_NF_IPTABLES=y | 599 | CONFIG_IP_NF_IPTABLES=y |
@@ -585,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y | |||
585 | CONFIG_NF_CONNTRACK_IPV6=y | 619 | CONFIG_NF_CONNTRACK_IPV6=y |
586 | CONFIG_IP6_NF_IPTABLES=y | 620 | CONFIG_IP6_NF_IPTABLES=y |
587 | CONFIG_IP6_NF_MATCH_IPV6HEADER=y | 621 | CONFIG_IP6_NF_MATCH_IPV6HEADER=y |
588 | CONFIG_IP6_NF_FILTER=y | ||
589 | CONFIG_IP6_NF_TARGET_LOG=y | 622 | CONFIG_IP6_NF_TARGET_LOG=y |
623 | CONFIG_IP6_NF_FILTER=y | ||
590 | CONFIG_IP6_NF_TARGET_REJECT=y | 624 | CONFIG_IP6_NF_TARGET_REJECT=y |
591 | CONFIG_IP6_NF_MANGLE=y | 625 | CONFIG_IP6_NF_MANGLE=y |
592 | # CONFIG_IP_DCCP is not set | 626 | # CONFIG_IP_DCCP is not set |
@@ -594,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y | |||
594 | # CONFIG_TIPC is not set | 628 | # CONFIG_TIPC is not set |
595 | # CONFIG_ATM is not set | 629 | # CONFIG_ATM is not set |
596 | # CONFIG_BRIDGE is not set | 630 | # CONFIG_BRIDGE is not set |
631 | # CONFIG_NET_DSA is not set | ||
597 | # CONFIG_VLAN_8021Q is not set | 632 | # CONFIG_VLAN_8021Q is not set |
598 | # CONFIG_DECNET is not set | 633 | # CONFIG_DECNET is not set |
599 | CONFIG_LLC=y | 634 | CONFIG_LLC=y |
@@ -613,6 +648,7 @@ CONFIG_NET_SCHED=y | |||
613 | # CONFIG_NET_SCH_HTB is not set | 648 | # CONFIG_NET_SCH_HTB is not set |
614 | # CONFIG_NET_SCH_HFSC is not set | 649 | # CONFIG_NET_SCH_HFSC is not set |
615 | # CONFIG_NET_SCH_PRIO is not set | 650 | # CONFIG_NET_SCH_PRIO is not set |
651 | # CONFIG_NET_SCH_MULTIQ is not set | ||
616 | # CONFIG_NET_SCH_RED is not set | 652 | # CONFIG_NET_SCH_RED is not set |
617 | # CONFIG_NET_SCH_SFQ is not set | 653 | # CONFIG_NET_SCH_SFQ is not set |
618 | # CONFIG_NET_SCH_TEQL is not set | 654 | # CONFIG_NET_SCH_TEQL is not set |
@@ -620,6 +656,7 @@ CONFIG_NET_SCHED=y | |||
620 | # CONFIG_NET_SCH_GRED is not set | 656 | # CONFIG_NET_SCH_GRED is not set |
621 | # CONFIG_NET_SCH_DSMARK is not set | 657 | # CONFIG_NET_SCH_DSMARK is not set |
622 | # CONFIG_NET_SCH_NETEM is not set | 658 | # CONFIG_NET_SCH_NETEM is not set |
659 | # CONFIG_NET_SCH_DRR is not set | ||
623 | # CONFIG_NET_SCH_INGRESS is not set | 660 | # CONFIG_NET_SCH_INGRESS is not set |
624 | 661 | ||
625 | # | 662 | # |
@@ -634,6 +671,7 @@ CONFIG_NET_CLS=y | |||
634 | # CONFIG_NET_CLS_RSVP is not set | 671 | # CONFIG_NET_CLS_RSVP is not set |
635 | # CONFIG_NET_CLS_RSVP6 is not set | 672 | # CONFIG_NET_CLS_RSVP6 is not set |
636 | # CONFIG_NET_CLS_FLOW is not set | 673 | # CONFIG_NET_CLS_FLOW is not set |
674 | # CONFIG_NET_CLS_CGROUP is not set | ||
637 | CONFIG_NET_EMATCH=y | 675 | CONFIG_NET_EMATCH=y |
638 | CONFIG_NET_EMATCH_STACK=32 | 676 | CONFIG_NET_EMATCH_STACK=32 |
639 | # CONFIG_NET_EMATCH_CMP is not set | 677 | # CONFIG_NET_EMATCH_CMP is not set |
@@ -649,7 +687,9 @@ CONFIG_NET_CLS_ACT=y | |||
649 | # CONFIG_NET_ACT_NAT is not set | 687 | # CONFIG_NET_ACT_NAT is not set |
650 | # CONFIG_NET_ACT_PEDIT is not set | 688 | # CONFIG_NET_ACT_PEDIT is not set |
651 | # CONFIG_NET_ACT_SIMP is not set | 689 | # CONFIG_NET_ACT_SIMP is not set |
690 | # CONFIG_NET_ACT_SKBEDIT is not set | ||
652 | CONFIG_NET_SCH_FIFO=y | 691 | CONFIG_NET_SCH_FIFO=y |
692 | # CONFIG_DCB is not set | ||
653 | 693 | ||
654 | # | 694 | # |
655 | # Network testing | 695 | # Network testing |
@@ -666,29 +706,33 @@ CONFIG_HAMRADIO=y | |||
666 | # CONFIG_IRDA is not set | 706 | # CONFIG_IRDA is not set |
667 | # CONFIG_BT is not set | 707 | # CONFIG_BT is not set |
668 | # CONFIG_AF_RXRPC is not set | 708 | # CONFIG_AF_RXRPC is not set |
709 | # CONFIG_PHONET is not set | ||
669 | CONFIG_FIB_RULES=y | 710 | CONFIG_FIB_RULES=y |
670 | 711 | CONFIG_WIRELESS=y | |
671 | # | ||
672 | # Wireless | ||
673 | # | ||
674 | CONFIG_CFG80211=y | 712 | CONFIG_CFG80211=y |
713 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
675 | CONFIG_NL80211=y | 714 | CONFIG_NL80211=y |
715 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
676 | CONFIG_WIRELESS_EXT=y | 716 | CONFIG_WIRELESS_EXT=y |
677 | CONFIG_WIRELESS_EXT_SYSFS=y | 717 | CONFIG_WIRELESS_EXT_SYSFS=y |
718 | # CONFIG_LIB80211 is not set | ||
678 | CONFIG_MAC80211=y | 719 | CONFIG_MAC80211=y |
679 | 720 | ||
680 | # | 721 | # |
681 | # Rate control algorithm selection | 722 | # Rate control algorithm selection |
682 | # | 723 | # |
683 | CONFIG_MAC80211_RC_PID=y | 724 | CONFIG_MAC80211_RC_MINSTREL=y |
684 | CONFIG_MAC80211_RC_DEFAULT_PID=y | 725 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set |
685 | CONFIG_MAC80211_RC_DEFAULT="pid" | 726 | CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y |
727 | CONFIG_MAC80211_RC_DEFAULT="minstrel" | ||
686 | # CONFIG_MAC80211_MESH is not set | 728 | # CONFIG_MAC80211_MESH is not set |
687 | CONFIG_MAC80211_LEDS=y | 729 | CONFIG_MAC80211_LEDS=y |
688 | # CONFIG_MAC80211_DEBUGFS is not set | 730 | # CONFIG_MAC80211_DEBUGFS is not set |
689 | # CONFIG_MAC80211_DEBUG_MENU is not set | 731 | # CONFIG_MAC80211_DEBUG_MENU is not set |
690 | # CONFIG_IEEE80211 is not set | 732 | # CONFIG_WIMAX is not set |
691 | # CONFIG_RFKILL is not set | 733 | CONFIG_RFKILL=y |
734 | # CONFIG_RFKILL_INPUT is not set | ||
735 | CONFIG_RFKILL_LEDS=y | ||
692 | # CONFIG_NET_9P is not set | 736 | # CONFIG_NET_9P is not set |
693 | 737 | ||
694 | # | 738 | # |
@@ -712,7 +756,7 @@ CONFIG_PROC_EVENTS=y | |||
712 | # CONFIG_MTD is not set | 756 | # CONFIG_MTD is not set |
713 | # CONFIG_PARPORT is not set | 757 | # CONFIG_PARPORT is not set |
714 | CONFIG_PNP=y | 758 | CONFIG_PNP=y |
715 | # CONFIG_PNP_DEBUG is not set | 759 | CONFIG_PNP_DEBUG_MESSAGES=y |
716 | 760 | ||
717 | # | 761 | # |
718 | # Protocols | 762 | # Protocols |
@@ -740,21 +784,21 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 | |||
740 | CONFIG_MISC_DEVICES=y | 784 | CONFIG_MISC_DEVICES=y |
741 | # CONFIG_IBM_ASM is not set | 785 | # CONFIG_IBM_ASM is not set |
742 | # CONFIG_PHANTOM is not set | 786 | # CONFIG_PHANTOM is not set |
743 | # CONFIG_EEPROM_93CX6 is not set | ||
744 | # CONFIG_SGI_IOC4 is not set | 787 | # CONFIG_SGI_IOC4 is not set |
745 | # CONFIG_TIFM_CORE is not set | 788 | # CONFIG_TIFM_CORE is not set |
746 | # CONFIG_ACER_WMI is not set | 789 | # CONFIG_ICS932S401 is not set |
747 | # CONFIG_ASUS_LAPTOP is not set | ||
748 | # CONFIG_FUJITSU_LAPTOP is not set | ||
749 | # CONFIG_MSI_LAPTOP is not set | ||
750 | # CONFIG_COMPAL_LAPTOP is not set | ||
751 | # CONFIG_SONY_LAPTOP is not set | ||
752 | # CONFIG_THINKPAD_ACPI is not set | ||
753 | # CONFIG_INTEL_MENLOW is not set | ||
754 | # CONFIG_ENCLOSURE_SERVICES is not set | 790 | # CONFIG_ENCLOSURE_SERVICES is not set |
755 | # CONFIG_SGI_XP is not set | 791 | # CONFIG_SGI_XP is not set |
756 | # CONFIG_HP_ILO is not set | 792 | # CONFIG_HP_ILO is not set |
757 | # CONFIG_SGI_GRU is not set | 793 | # CONFIG_SGI_GRU is not set |
794 | # CONFIG_C2PORT is not set | ||
795 | |||
796 | # | ||
797 | # EEPROM support | ||
798 | # | ||
799 | # CONFIG_EEPROM_AT24 is not set | ||
800 | # CONFIG_EEPROM_LEGACY is not set | ||
801 | # CONFIG_EEPROM_93CX6 is not set | ||
758 | CONFIG_HAVE_IDE=y | 802 | CONFIG_HAVE_IDE=y |
759 | # CONFIG_IDE is not set | 803 | # CONFIG_IDE is not set |
760 | 804 | ||
@@ -793,7 +837,7 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
793 | # | 837 | # |
794 | CONFIG_SCSI_SPI_ATTRS=y | 838 | CONFIG_SCSI_SPI_ATTRS=y |
795 | # CONFIG_SCSI_FC_ATTRS is not set | 839 | # CONFIG_SCSI_FC_ATTRS is not set |
796 | CONFIG_SCSI_ISCSI_ATTRS=y | 840 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
797 | # CONFIG_SCSI_SAS_ATTRS is not set | 841 | # CONFIG_SCSI_SAS_ATTRS is not set |
798 | # CONFIG_SCSI_SAS_LIBSAS is not set | 842 | # CONFIG_SCSI_SAS_LIBSAS is not set |
799 | # CONFIG_SCSI_SRP_ATTRS is not set | 843 | # CONFIG_SCSI_SRP_ATTRS is not set |
@@ -864,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y | |||
864 | CONFIG_PATA_SCH=y | 908 | CONFIG_PATA_SCH=y |
865 | CONFIG_MD=y | 909 | CONFIG_MD=y |
866 | CONFIG_BLK_DEV_MD=y | 910 | CONFIG_BLK_DEV_MD=y |
911 | CONFIG_MD_AUTODETECT=y | ||
867 | # CONFIG_MD_LINEAR is not set | 912 | # CONFIG_MD_LINEAR is not set |
868 | # CONFIG_MD_RAID0 is not set | 913 | # CONFIG_MD_RAID0 is not set |
869 | # CONFIG_MD_RAID1 is not set | 914 | # CONFIG_MD_RAID1 is not set |
@@ -919,6 +964,9 @@ CONFIG_PHYLIB=y | |||
919 | # CONFIG_BROADCOM_PHY is not set | 964 | # CONFIG_BROADCOM_PHY is not set |
920 | # CONFIG_ICPLUS_PHY is not set | 965 | # CONFIG_ICPLUS_PHY is not set |
921 | # CONFIG_REALTEK_PHY is not set | 966 | # CONFIG_REALTEK_PHY is not set |
967 | # CONFIG_NATIONAL_PHY is not set | ||
968 | # CONFIG_STE10XP is not set | ||
969 | # CONFIG_LSI_ET1011C_PHY is not set | ||
922 | # CONFIG_FIXED_PHY is not set | 970 | # CONFIG_FIXED_PHY is not set |
923 | # CONFIG_MDIO_BITBANG is not set | 971 | # CONFIG_MDIO_BITBANG is not set |
924 | CONFIG_NET_ETHERNET=y | 972 | CONFIG_NET_ETHERNET=y |
@@ -942,6 +990,9 @@ CONFIG_NET_TULIP=y | |||
942 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 990 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
943 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 991 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
944 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 992 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
993 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
994 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
995 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
945 | CONFIG_NET_PCI=y | 996 | CONFIG_NET_PCI=y |
946 | # CONFIG_PCNET32 is not set | 997 | # CONFIG_PCNET32 is not set |
947 | # CONFIG_AMD8111_ETH is not set | 998 | # CONFIG_AMD8111_ETH is not set |
@@ -949,7 +1000,6 @@ CONFIG_NET_PCI=y | |||
949 | # CONFIG_B44 is not set | 1000 | # CONFIG_B44 is not set |
950 | CONFIG_FORCEDETH=y | 1001 | CONFIG_FORCEDETH=y |
951 | # CONFIG_FORCEDETH_NAPI is not set | 1002 | # CONFIG_FORCEDETH_NAPI is not set |
952 | # CONFIG_EEPRO100 is not set | ||
953 | CONFIG_E100=y | 1003 | CONFIG_E100=y |
954 | # CONFIG_FEALNX is not set | 1004 | # CONFIG_FEALNX is not set |
955 | # CONFIG_NATSEMI is not set | 1005 | # CONFIG_NATSEMI is not set |
@@ -963,15 +1013,16 @@ CONFIG_8139TOO_PIO=y | |||
963 | # CONFIG_R6040 is not set | 1013 | # CONFIG_R6040 is not set |
964 | # CONFIG_SIS900 is not set | 1014 | # CONFIG_SIS900 is not set |
965 | # CONFIG_EPIC100 is not set | 1015 | # CONFIG_EPIC100 is not set |
1016 | # CONFIG_SMSC9420 is not set | ||
966 | # CONFIG_SUNDANCE is not set | 1017 | # CONFIG_SUNDANCE is not set |
967 | # CONFIG_TLAN is not set | 1018 | # CONFIG_TLAN is not set |
968 | # CONFIG_VIA_RHINE is not set | 1019 | # CONFIG_VIA_RHINE is not set |
969 | # CONFIG_SC92031 is not set | 1020 | # CONFIG_SC92031 is not set |
1021 | # CONFIG_ATL2 is not set | ||
970 | CONFIG_NETDEV_1000=y | 1022 | CONFIG_NETDEV_1000=y |
971 | # CONFIG_ACENIC is not set | 1023 | # CONFIG_ACENIC is not set |
972 | # CONFIG_DL2K is not set | 1024 | # CONFIG_DL2K is not set |
973 | CONFIG_E1000=y | 1025 | CONFIG_E1000=y |
974 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | ||
975 | # CONFIG_E1000E is not set | 1026 | # CONFIG_E1000E is not set |
976 | # CONFIG_IP1000 is not set | 1027 | # CONFIG_IP1000 is not set |
977 | # CONFIG_IGB is not set | 1028 | # CONFIG_IGB is not set |
@@ -989,18 +1040,23 @@ CONFIG_TIGON3=y | |||
989 | # CONFIG_QLA3XXX is not set | 1040 | # CONFIG_QLA3XXX is not set |
990 | # CONFIG_ATL1 is not set | 1041 | # CONFIG_ATL1 is not set |
991 | # CONFIG_ATL1E is not set | 1042 | # CONFIG_ATL1E is not set |
1043 | # CONFIG_JME is not set | ||
992 | CONFIG_NETDEV_10000=y | 1044 | CONFIG_NETDEV_10000=y |
993 | # CONFIG_CHELSIO_T1 is not set | 1045 | # CONFIG_CHELSIO_T1 is not set |
1046 | CONFIG_CHELSIO_T3_DEPENDS=y | ||
994 | # CONFIG_CHELSIO_T3 is not set | 1047 | # CONFIG_CHELSIO_T3 is not set |
1048 | # CONFIG_ENIC is not set | ||
995 | # CONFIG_IXGBE is not set | 1049 | # CONFIG_IXGBE is not set |
996 | # CONFIG_IXGB is not set | 1050 | # CONFIG_IXGB is not set |
997 | # CONFIG_S2IO is not set | 1051 | # CONFIG_S2IO is not set |
998 | # CONFIG_MYRI10GE is not set | 1052 | # CONFIG_MYRI10GE is not set |
999 | # CONFIG_NETXEN_NIC is not set | 1053 | # CONFIG_NETXEN_NIC is not set |
1000 | # CONFIG_NIU is not set | 1054 | # CONFIG_NIU is not set |
1055 | # CONFIG_MLX4_EN is not set | ||
1001 | # CONFIG_MLX4_CORE is not set | 1056 | # CONFIG_MLX4_CORE is not set |
1002 | # CONFIG_TEHUTI is not set | 1057 | # CONFIG_TEHUTI is not set |
1003 | # CONFIG_BNX2X is not set | 1058 | # CONFIG_BNX2X is not set |
1059 | # CONFIG_QLGE is not set | ||
1004 | # CONFIG_SFC is not set | 1060 | # CONFIG_SFC is not set |
1005 | CONFIG_TR=y | 1061 | CONFIG_TR=y |
1006 | # CONFIG_IBMOL is not set | 1062 | # CONFIG_IBMOL is not set |
@@ -1013,9 +1069,8 @@ CONFIG_TR=y | |||
1013 | # CONFIG_WLAN_PRE80211 is not set | 1069 | # CONFIG_WLAN_PRE80211 is not set |
1014 | CONFIG_WLAN_80211=y | 1070 | CONFIG_WLAN_80211=y |
1015 | # CONFIG_PCMCIA_RAYCS is not set | 1071 | # CONFIG_PCMCIA_RAYCS is not set |
1016 | # CONFIG_IPW2100 is not set | ||
1017 | # CONFIG_IPW2200 is not set | ||
1018 | # CONFIG_LIBERTAS is not set | 1072 | # CONFIG_LIBERTAS is not set |
1073 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
1019 | # CONFIG_AIRO is not set | 1074 | # CONFIG_AIRO is not set |
1020 | # CONFIG_HERMES is not set | 1075 | # CONFIG_HERMES is not set |
1021 | # CONFIG_ATMEL is not set | 1076 | # CONFIG_ATMEL is not set |
@@ -1032,6 +1087,8 @@ CONFIG_WLAN_80211=y | |||
1032 | CONFIG_ATH5K=y | 1087 | CONFIG_ATH5K=y |
1033 | # CONFIG_ATH5K_DEBUG is not set | 1088 | # CONFIG_ATH5K_DEBUG is not set |
1034 | # CONFIG_ATH9K is not set | 1089 | # CONFIG_ATH9K is not set |
1090 | # CONFIG_IPW2100 is not set | ||
1091 | # CONFIG_IPW2200 is not set | ||
1035 | # CONFIG_IWLCORE is not set | 1092 | # CONFIG_IWLCORE is not set |
1036 | # CONFIG_IWLWIFI_LEDS is not set | 1093 | # CONFIG_IWLWIFI_LEDS is not set |
1037 | # CONFIG_IWLAGN is not set | 1094 | # CONFIG_IWLAGN is not set |
@@ -1043,6 +1100,10 @@ CONFIG_ATH5K=y | |||
1043 | # CONFIG_RT2X00 is not set | 1100 | # CONFIG_RT2X00 is not set |
1044 | 1101 | ||
1045 | # | 1102 | # |
1103 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
1104 | # | ||
1105 | |||
1106 | # | ||
1046 | # USB Network Adapters | 1107 | # USB Network Adapters |
1047 | # | 1108 | # |
1048 | # CONFIG_USB_CATC is not set | 1109 | # CONFIG_USB_CATC is not set |
@@ -1050,6 +1111,7 @@ CONFIG_ATH5K=y | |||
1050 | # CONFIG_USB_PEGASUS is not set | 1111 | # CONFIG_USB_PEGASUS is not set |
1051 | # CONFIG_USB_RTL8150 is not set | 1112 | # CONFIG_USB_RTL8150 is not set |
1052 | # CONFIG_USB_USBNET is not set | 1113 | # CONFIG_USB_USBNET is not set |
1114 | # CONFIG_USB_HSO is not set | ||
1053 | CONFIG_NET_PCMCIA=y | 1115 | CONFIG_NET_PCMCIA=y |
1054 | # CONFIG_PCMCIA_3C589 is not set | 1116 | # CONFIG_PCMCIA_3C589 is not set |
1055 | # CONFIG_PCMCIA_3C574 is not set | 1117 | # CONFIG_PCMCIA_3C574 is not set |
@@ -1059,6 +1121,7 @@ CONFIG_NET_PCMCIA=y | |||
1059 | # CONFIG_PCMCIA_SMC91C92 is not set | 1121 | # CONFIG_PCMCIA_SMC91C92 is not set |
1060 | # CONFIG_PCMCIA_XIRC2PS is not set | 1122 | # CONFIG_PCMCIA_XIRC2PS is not set |
1061 | # CONFIG_PCMCIA_AXNET is not set | 1123 | # CONFIG_PCMCIA_AXNET is not set |
1124 | # CONFIG_PCMCIA_IBMTR is not set | ||
1062 | # CONFIG_WAN is not set | 1125 | # CONFIG_WAN is not set |
1063 | CONFIG_FDDI=y | 1126 | CONFIG_FDDI=y |
1064 | # CONFIG_DEFXX is not set | 1127 | # CONFIG_DEFXX is not set |
@@ -1110,6 +1173,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y | |||
1110 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 1173 | CONFIG_MOUSE_PS2_SYNAPTICS=y |
1111 | CONFIG_MOUSE_PS2_LIFEBOOK=y | 1174 | CONFIG_MOUSE_PS2_LIFEBOOK=y |
1112 | CONFIG_MOUSE_PS2_TRACKPOINT=y | 1175 | CONFIG_MOUSE_PS2_TRACKPOINT=y |
1176 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
1113 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | 1177 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set |
1114 | # CONFIG_MOUSE_SERIAL is not set | 1178 | # CONFIG_MOUSE_SERIAL is not set |
1115 | # CONFIG_MOUSE_APPLETOUCH is not set | 1179 | # CONFIG_MOUSE_APPLETOUCH is not set |
@@ -1147,15 +1211,16 @@ CONFIG_INPUT_TOUCHSCREEN=y | |||
1147 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 1211 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
1148 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 1212 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
1149 | # CONFIG_TOUCHSCREEN_ELO is not set | 1213 | # CONFIG_TOUCHSCREEN_ELO is not set |
1214 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
1150 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 1215 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
1151 | # CONFIG_TOUCHSCREEN_INEXIO is not set | 1216 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
1152 | # CONFIG_TOUCHSCREEN_MK712 is not set | 1217 | # CONFIG_TOUCHSCREEN_MK712 is not set |
1153 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | 1218 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set |
1154 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 1219 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
1155 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 1220 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
1156 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
1157 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 1221 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
1158 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 1222 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
1223 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
1159 | CONFIG_INPUT_MISC=y | 1224 | CONFIG_INPUT_MISC=y |
1160 | # CONFIG_INPUT_PCSPKR is not set | 1225 | # CONFIG_INPUT_PCSPKR is not set |
1161 | # CONFIG_INPUT_APANEL is not set | 1226 | # CONFIG_INPUT_APANEL is not set |
@@ -1165,6 +1230,7 @@ CONFIG_INPUT_MISC=y | |||
1165 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | 1230 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set |
1166 | # CONFIG_INPUT_POWERMATE is not set | 1231 | # CONFIG_INPUT_POWERMATE is not set |
1167 | # CONFIG_INPUT_YEALINK is not set | 1232 | # CONFIG_INPUT_YEALINK is not set |
1233 | # CONFIG_INPUT_CM109 is not set | ||
1168 | # CONFIG_INPUT_UINPUT is not set | 1234 | # CONFIG_INPUT_UINPUT is not set |
1169 | 1235 | ||
1170 | # | 1236 | # |
@@ -1231,6 +1297,7 @@ CONFIG_SERIAL_CORE=y | |||
1231 | CONFIG_SERIAL_CORE_CONSOLE=y | 1297 | CONFIG_SERIAL_CORE_CONSOLE=y |
1232 | # CONFIG_SERIAL_JSM is not set | 1298 | # CONFIG_SERIAL_JSM is not set |
1233 | CONFIG_UNIX98_PTYS=y | 1299 | CONFIG_UNIX98_PTYS=y |
1300 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
1234 | # CONFIG_LEGACY_PTYS is not set | 1301 | # CONFIG_LEGACY_PTYS is not set |
1235 | # CONFIG_IPMI_HANDLER is not set | 1302 | # CONFIG_IPMI_HANDLER is not set |
1236 | CONFIG_HW_RANDOM=y | 1303 | CONFIG_HW_RANDOM=y |
@@ -1260,6 +1327,7 @@ CONFIG_I2C=y | |||
1260 | CONFIG_I2C_BOARDINFO=y | 1327 | CONFIG_I2C_BOARDINFO=y |
1261 | # CONFIG_I2C_CHARDEV is not set | 1328 | # CONFIG_I2C_CHARDEV is not set |
1262 | CONFIG_I2C_HELPER_AUTO=y | 1329 | CONFIG_I2C_HELPER_AUTO=y |
1330 | CONFIG_I2C_ALGOBIT=y | ||
1263 | 1331 | ||
1264 | # | 1332 | # |
1265 | # I2C Hardware Bus support | 1333 | # I2C Hardware Bus support |
@@ -1311,8 +1379,6 @@ CONFIG_I2C_I801=y | |||
1311 | # Miscellaneous I2C Chip support | 1379 | # Miscellaneous I2C Chip support |
1312 | # | 1380 | # |
1313 | # CONFIG_DS1682 is not set | 1381 | # CONFIG_DS1682 is not set |
1314 | # CONFIG_EEPROM_AT24 is not set | ||
1315 | # CONFIG_EEPROM_LEGACY is not set | ||
1316 | # CONFIG_SENSORS_PCF8574 is not set | 1382 | # CONFIG_SENSORS_PCF8574 is not set |
1317 | # CONFIG_PCF8575 is not set | 1383 | # CONFIG_PCF8575 is not set |
1318 | # CONFIG_SENSORS_PCA9539 is not set | 1384 | # CONFIG_SENSORS_PCA9539 is not set |
@@ -1331,8 +1397,78 @@ CONFIG_POWER_SUPPLY=y | |||
1331 | # CONFIG_POWER_SUPPLY_DEBUG is not set | 1397 | # CONFIG_POWER_SUPPLY_DEBUG is not set |
1332 | # CONFIG_PDA_POWER is not set | 1398 | # CONFIG_PDA_POWER is not set |
1333 | # CONFIG_BATTERY_DS2760 is not set | 1399 | # CONFIG_BATTERY_DS2760 is not set |
1334 | # CONFIG_HWMON is not set | 1400 | # CONFIG_BATTERY_BQ27x00 is not set |
1401 | CONFIG_HWMON=y | ||
1402 | # CONFIG_HWMON_VID is not set | ||
1403 | # CONFIG_SENSORS_ABITUGURU is not set | ||
1404 | # CONFIG_SENSORS_ABITUGURU3 is not set | ||
1405 | # CONFIG_SENSORS_AD7414 is not set | ||
1406 | # CONFIG_SENSORS_AD7418 is not set | ||
1407 | # CONFIG_SENSORS_ADM1021 is not set | ||
1408 | # CONFIG_SENSORS_ADM1025 is not set | ||
1409 | # CONFIG_SENSORS_ADM1026 is not set | ||
1410 | # CONFIG_SENSORS_ADM1029 is not set | ||
1411 | # CONFIG_SENSORS_ADM1031 is not set | ||
1412 | # CONFIG_SENSORS_ADM9240 is not set | ||
1413 | # CONFIG_SENSORS_ADT7462 is not set | ||
1414 | # CONFIG_SENSORS_ADT7470 is not set | ||
1415 | # CONFIG_SENSORS_ADT7473 is not set | ||
1416 | # CONFIG_SENSORS_ADT7475 is not set | ||
1417 | # CONFIG_SENSORS_K8TEMP is not set | ||
1418 | # CONFIG_SENSORS_ASB100 is not set | ||
1419 | # CONFIG_SENSORS_ATXP1 is not set | ||
1420 | # CONFIG_SENSORS_DS1621 is not set | ||
1421 | # CONFIG_SENSORS_I5K_AMB is not set | ||
1422 | # CONFIG_SENSORS_F71805F is not set | ||
1423 | # CONFIG_SENSORS_F71882FG is not set | ||
1424 | # CONFIG_SENSORS_F75375S is not set | ||
1425 | # CONFIG_SENSORS_FSCHER is not set | ||
1426 | # CONFIG_SENSORS_FSCPOS is not set | ||
1427 | # CONFIG_SENSORS_FSCHMD is not set | ||
1428 | # CONFIG_SENSORS_GL518SM is not set | ||
1429 | # CONFIG_SENSORS_GL520SM is not set | ||
1430 | # CONFIG_SENSORS_CORETEMP is not set | ||
1431 | # CONFIG_SENSORS_IT87 is not set | ||
1432 | # CONFIG_SENSORS_LM63 is not set | ||
1433 | # CONFIG_SENSORS_LM75 is not set | ||
1434 | # CONFIG_SENSORS_LM77 is not set | ||
1435 | # CONFIG_SENSORS_LM78 is not set | ||
1436 | # CONFIG_SENSORS_LM80 is not set | ||
1437 | # CONFIG_SENSORS_LM83 is not set | ||
1438 | # CONFIG_SENSORS_LM85 is not set | ||
1439 | # CONFIG_SENSORS_LM87 is not set | ||
1440 | # CONFIG_SENSORS_LM90 is not set | ||
1441 | # CONFIG_SENSORS_LM92 is not set | ||
1442 | # CONFIG_SENSORS_LM93 is not set | ||
1443 | # CONFIG_SENSORS_LTC4245 is not set | ||
1444 | # CONFIG_SENSORS_MAX1619 is not set | ||
1445 | # CONFIG_SENSORS_MAX6650 is not set | ||
1446 | # CONFIG_SENSORS_PC87360 is not set | ||
1447 | # CONFIG_SENSORS_PC87427 is not set | ||
1448 | # CONFIG_SENSORS_SIS5595 is not set | ||
1449 | # CONFIG_SENSORS_DME1737 is not set | ||
1450 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
1451 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
1452 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
1453 | # CONFIG_SENSORS_ADS7828 is not set | ||
1454 | # CONFIG_SENSORS_THMC50 is not set | ||
1455 | # CONFIG_SENSORS_VIA686A is not set | ||
1456 | # CONFIG_SENSORS_VT1211 is not set | ||
1457 | # CONFIG_SENSORS_VT8231 is not set | ||
1458 | # CONFIG_SENSORS_W83781D is not set | ||
1459 | # CONFIG_SENSORS_W83791D is not set | ||
1460 | # CONFIG_SENSORS_W83792D is not set | ||
1461 | # CONFIG_SENSORS_W83793 is not set | ||
1462 | # CONFIG_SENSORS_W83L785TS is not set | ||
1463 | # CONFIG_SENSORS_W83L786NG is not set | ||
1464 | # CONFIG_SENSORS_W83627HF is not set | ||
1465 | # CONFIG_SENSORS_W83627EHF is not set | ||
1466 | # CONFIG_SENSORS_HDAPS is not set | ||
1467 | # CONFIG_SENSORS_LIS3LV02D is not set | ||
1468 | # CONFIG_SENSORS_APPLESMC is not set | ||
1469 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
1335 | CONFIG_THERMAL=y | 1470 | CONFIG_THERMAL=y |
1471 | # CONFIG_THERMAL_HWMON is not set | ||
1336 | CONFIG_WATCHDOG=y | 1472 | CONFIG_WATCHDOG=y |
1337 | # CONFIG_WATCHDOG_NOWAYOUT is not set | 1473 | # CONFIG_WATCHDOG_NOWAYOUT is not set |
1338 | 1474 | ||
@@ -1352,15 +1488,18 @@ CONFIG_WATCHDOG=y | |||
1352 | # CONFIG_I6300ESB_WDT is not set | 1488 | # CONFIG_I6300ESB_WDT is not set |
1353 | # CONFIG_ITCO_WDT is not set | 1489 | # CONFIG_ITCO_WDT is not set |
1354 | # CONFIG_IT8712F_WDT is not set | 1490 | # CONFIG_IT8712F_WDT is not set |
1491 | # CONFIG_IT87_WDT is not set | ||
1355 | # CONFIG_HP_WATCHDOG is not set | 1492 | # CONFIG_HP_WATCHDOG is not set |
1356 | # CONFIG_SC1200_WDT is not set | 1493 | # CONFIG_SC1200_WDT is not set |
1357 | # CONFIG_PC87413_WDT is not set | 1494 | # CONFIG_PC87413_WDT is not set |
1358 | # CONFIG_60XX_WDT is not set | 1495 | # CONFIG_60XX_WDT is not set |
1359 | # CONFIG_SBC8360_WDT is not set | 1496 | # CONFIG_SBC8360_WDT is not set |
1360 | # CONFIG_CPU5_WDT is not set | 1497 | # CONFIG_CPU5_WDT is not set |
1498 | # CONFIG_SMSC_SCH311X_WDT is not set | ||
1361 | # CONFIG_SMSC37B787_WDT is not set | 1499 | # CONFIG_SMSC37B787_WDT is not set |
1362 | # CONFIG_W83627HF_WDT is not set | 1500 | # CONFIG_W83627HF_WDT is not set |
1363 | # CONFIG_W83697HF_WDT is not set | 1501 | # CONFIG_W83697HF_WDT is not set |
1502 | # CONFIG_W83697UG_WDT is not set | ||
1364 | # CONFIG_W83877F_WDT is not set | 1503 | # CONFIG_W83877F_WDT is not set |
1365 | # CONFIG_W83977F_WDT is not set | 1504 | # CONFIG_W83977F_WDT is not set |
1366 | # CONFIG_MACHZ_WDT is not set | 1505 | # CONFIG_MACHZ_WDT is not set |
@@ -1376,11 +1515,11 @@ CONFIG_WATCHDOG=y | |||
1376 | # USB-based Watchdog Cards | 1515 | # USB-based Watchdog Cards |
1377 | # | 1516 | # |
1378 | # CONFIG_USBPCWATCHDOG is not set | 1517 | # CONFIG_USBPCWATCHDOG is not set |
1518 | CONFIG_SSB_POSSIBLE=y | ||
1379 | 1519 | ||
1380 | # | 1520 | # |
1381 | # Sonics Silicon Backplane | 1521 | # Sonics Silicon Backplane |
1382 | # | 1522 | # |
1383 | CONFIG_SSB_POSSIBLE=y | ||
1384 | # CONFIG_SSB is not set | 1523 | # CONFIG_SSB is not set |
1385 | 1524 | ||
1386 | # | 1525 | # |
@@ -1389,7 +1528,13 @@ CONFIG_SSB_POSSIBLE=y | |||
1389 | # CONFIG_MFD_CORE is not set | 1528 | # CONFIG_MFD_CORE is not set |
1390 | # CONFIG_MFD_SM501 is not set | 1529 | # CONFIG_MFD_SM501 is not set |
1391 | # CONFIG_HTC_PASIC3 is not set | 1530 | # CONFIG_HTC_PASIC3 is not set |
1531 | # CONFIG_TWL4030_CORE is not set | ||
1392 | # CONFIG_MFD_TMIO is not set | 1532 | # CONFIG_MFD_TMIO is not set |
1533 | # CONFIG_PMIC_DA903X is not set | ||
1534 | # CONFIG_MFD_WM8400 is not set | ||
1535 | # CONFIG_MFD_WM8350_I2C is not set | ||
1536 | # CONFIG_MFD_PCF50633 is not set | ||
1537 | # CONFIG_REGULATOR is not set | ||
1393 | 1538 | ||
1394 | # | 1539 | # |
1395 | # Multimedia devices | 1540 | # Multimedia devices |
@@ -1423,6 +1568,7 @@ CONFIG_DRM=y | |||
1423 | # CONFIG_DRM_I810 is not set | 1568 | # CONFIG_DRM_I810 is not set |
1424 | # CONFIG_DRM_I830 is not set | 1569 | # CONFIG_DRM_I830 is not set |
1425 | CONFIG_DRM_I915=y | 1570 | CONFIG_DRM_I915=y |
1571 | CONFIG_DRM_I915_KMS=y | ||
1426 | # CONFIG_DRM_MGA is not set | 1572 | # CONFIG_DRM_MGA is not set |
1427 | # CONFIG_DRM_SIS is not set | 1573 | # CONFIG_DRM_SIS is not set |
1428 | # CONFIG_DRM_VIA is not set | 1574 | # CONFIG_DRM_VIA is not set |
@@ -1432,6 +1578,7 @@ CONFIG_DRM_I915=y | |||
1432 | CONFIG_FB=y | 1578 | CONFIG_FB=y |
1433 | # CONFIG_FIRMWARE_EDID is not set | 1579 | # CONFIG_FIRMWARE_EDID is not set |
1434 | # CONFIG_FB_DDC is not set | 1580 | # CONFIG_FB_DDC is not set |
1581 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
1435 | CONFIG_FB_CFB_FILLRECT=y | 1582 | CONFIG_FB_CFB_FILLRECT=y |
1436 | CONFIG_FB_CFB_COPYAREA=y | 1583 | CONFIG_FB_CFB_COPYAREA=y |
1437 | CONFIG_FB_CFB_IMAGEBLIT=y | 1584 | CONFIG_FB_CFB_IMAGEBLIT=y |
@@ -1460,7 +1607,6 @@ CONFIG_FB_TILEBLITTING=y | |||
1460 | # CONFIG_FB_UVESA is not set | 1607 | # CONFIG_FB_UVESA is not set |
1461 | # CONFIG_FB_VESA is not set | 1608 | # CONFIG_FB_VESA is not set |
1462 | CONFIG_FB_EFI=y | 1609 | CONFIG_FB_EFI=y |
1463 | # CONFIG_FB_IMAC is not set | ||
1464 | # CONFIG_FB_N411 is not set | 1610 | # CONFIG_FB_N411 is not set |
1465 | # CONFIG_FB_HGA is not set | 1611 | # CONFIG_FB_HGA is not set |
1466 | # CONFIG_FB_S1D13XXX is not set | 1612 | # CONFIG_FB_S1D13XXX is not set |
@@ -1475,6 +1621,7 @@ CONFIG_FB_EFI=y | |||
1475 | # CONFIG_FB_S3 is not set | 1621 | # CONFIG_FB_S3 is not set |
1476 | # CONFIG_FB_SAVAGE is not set | 1622 | # CONFIG_FB_SAVAGE is not set |
1477 | # CONFIG_FB_SIS is not set | 1623 | # CONFIG_FB_SIS is not set |
1624 | # CONFIG_FB_VIA is not set | ||
1478 | # CONFIG_FB_NEOMAGIC is not set | 1625 | # CONFIG_FB_NEOMAGIC is not set |
1479 | # CONFIG_FB_KYRO is not set | 1626 | # CONFIG_FB_KYRO is not set |
1480 | # CONFIG_FB_3DFX is not set | 1627 | # CONFIG_FB_3DFX is not set |
@@ -1486,12 +1633,15 @@ CONFIG_FB_EFI=y | |||
1486 | # CONFIG_FB_CARMINE is not set | 1633 | # CONFIG_FB_CARMINE is not set |
1487 | # CONFIG_FB_GEODE is not set | 1634 | # CONFIG_FB_GEODE is not set |
1488 | # CONFIG_FB_VIRTUAL is not set | 1635 | # CONFIG_FB_VIRTUAL is not set |
1636 | # CONFIG_FB_METRONOME is not set | ||
1637 | # CONFIG_FB_MB862XX is not set | ||
1489 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1638 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
1490 | # CONFIG_LCD_CLASS_DEVICE is not set | 1639 | # CONFIG_LCD_CLASS_DEVICE is not set |
1491 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | 1640 | CONFIG_BACKLIGHT_CLASS_DEVICE=y |
1492 | # CONFIG_BACKLIGHT_CORGI is not set | 1641 | CONFIG_BACKLIGHT_GENERIC=y |
1493 | # CONFIG_BACKLIGHT_PROGEAR is not set | 1642 | # CONFIG_BACKLIGHT_PROGEAR is not set |
1494 | # CONFIG_BACKLIGHT_MBP_NVIDIA is not set | 1643 | # CONFIG_BACKLIGHT_MBP_NVIDIA is not set |
1644 | # CONFIG_BACKLIGHT_SAHARA is not set | ||
1495 | 1645 | ||
1496 | # | 1646 | # |
1497 | # Display device support | 1647 | # Display device support |
@@ -1511,10 +1661,12 @@ CONFIG_LOGO=y | |||
1511 | # CONFIG_LOGO_LINUX_VGA16 is not set | 1661 | # CONFIG_LOGO_LINUX_VGA16 is not set |
1512 | CONFIG_LOGO_LINUX_CLUT224=y | 1662 | CONFIG_LOGO_LINUX_CLUT224=y |
1513 | CONFIG_SOUND=y | 1663 | CONFIG_SOUND=y |
1664 | CONFIG_SOUND_OSS_CORE=y | ||
1514 | CONFIG_SND=y | 1665 | CONFIG_SND=y |
1515 | CONFIG_SND_TIMER=y | 1666 | CONFIG_SND_TIMER=y |
1516 | CONFIG_SND_PCM=y | 1667 | CONFIG_SND_PCM=y |
1517 | CONFIG_SND_HWDEP=y | 1668 | CONFIG_SND_HWDEP=y |
1669 | CONFIG_SND_JACK=y | ||
1518 | CONFIG_SND_SEQUENCER=y | 1670 | CONFIG_SND_SEQUENCER=y |
1519 | CONFIG_SND_SEQ_DUMMY=y | 1671 | CONFIG_SND_SEQ_DUMMY=y |
1520 | CONFIG_SND_OSSEMUL=y | 1672 | CONFIG_SND_OSSEMUL=y |
@@ -1522,6 +1674,8 @@ CONFIG_SND_MIXER_OSS=y | |||
1522 | CONFIG_SND_PCM_OSS=y | 1674 | CONFIG_SND_PCM_OSS=y |
1523 | CONFIG_SND_PCM_OSS_PLUGINS=y | 1675 | CONFIG_SND_PCM_OSS_PLUGINS=y |
1524 | CONFIG_SND_SEQUENCER_OSS=y | 1676 | CONFIG_SND_SEQUENCER_OSS=y |
1677 | CONFIG_SND_HRTIMER=y | ||
1678 | CONFIG_SND_SEQ_HRTIMER_DEFAULT=y | ||
1525 | CONFIG_SND_DYNAMIC_MINORS=y | 1679 | CONFIG_SND_DYNAMIC_MINORS=y |
1526 | CONFIG_SND_SUPPORT_OLD_API=y | 1680 | CONFIG_SND_SUPPORT_OLD_API=y |
1527 | CONFIG_SND_VERBOSE_PROCFS=y | 1681 | CONFIG_SND_VERBOSE_PROCFS=y |
@@ -1575,11 +1729,16 @@ CONFIG_SND_PCI=y | |||
1575 | # CONFIG_SND_FM801 is not set | 1729 | # CONFIG_SND_FM801 is not set |
1576 | CONFIG_SND_HDA_INTEL=y | 1730 | CONFIG_SND_HDA_INTEL=y |
1577 | CONFIG_SND_HDA_HWDEP=y | 1731 | CONFIG_SND_HDA_HWDEP=y |
1732 | # CONFIG_SND_HDA_RECONFIG is not set | ||
1733 | # CONFIG_SND_HDA_INPUT_BEEP is not set | ||
1578 | CONFIG_SND_HDA_CODEC_REALTEK=y | 1734 | CONFIG_SND_HDA_CODEC_REALTEK=y |
1579 | CONFIG_SND_HDA_CODEC_ANALOG=y | 1735 | CONFIG_SND_HDA_CODEC_ANALOG=y |
1580 | CONFIG_SND_HDA_CODEC_SIGMATEL=y | 1736 | CONFIG_SND_HDA_CODEC_SIGMATEL=y |
1581 | CONFIG_SND_HDA_CODEC_VIA=y | 1737 | CONFIG_SND_HDA_CODEC_VIA=y |
1582 | CONFIG_SND_HDA_CODEC_ATIHDMI=y | 1738 | CONFIG_SND_HDA_CODEC_ATIHDMI=y |
1739 | CONFIG_SND_HDA_CODEC_NVHDMI=y | ||
1740 | CONFIG_SND_HDA_CODEC_INTELHDMI=y | ||
1741 | CONFIG_SND_HDA_ELD=y | ||
1583 | CONFIG_SND_HDA_CODEC_CONEXANT=y | 1742 | CONFIG_SND_HDA_CODEC_CONEXANT=y |
1584 | CONFIG_SND_HDA_CODEC_CMEDIA=y | 1743 | CONFIG_SND_HDA_CODEC_CMEDIA=y |
1585 | CONFIG_SND_HDA_CODEC_SI3054=y | 1744 | CONFIG_SND_HDA_CODEC_SI3054=y |
@@ -1612,6 +1771,7 @@ CONFIG_SND_USB=y | |||
1612 | # CONFIG_SND_USB_AUDIO is not set | 1771 | # CONFIG_SND_USB_AUDIO is not set |
1613 | # CONFIG_SND_USB_USX2Y is not set | 1772 | # CONFIG_SND_USB_USX2Y is not set |
1614 | # CONFIG_SND_USB_CAIAQ is not set | 1773 | # CONFIG_SND_USB_CAIAQ is not set |
1774 | # CONFIG_SND_USB_US122L is not set | ||
1615 | CONFIG_SND_PCMCIA=y | 1775 | CONFIG_SND_PCMCIA=y |
1616 | # CONFIG_SND_VXPOCKET is not set | 1776 | # CONFIG_SND_VXPOCKET is not set |
1617 | # CONFIG_SND_PDAUDIOCF is not set | 1777 | # CONFIG_SND_PDAUDIOCF is not set |
@@ -1626,15 +1786,37 @@ CONFIG_HIDRAW=y | |||
1626 | # USB Input Devices | 1786 | # USB Input Devices |
1627 | # | 1787 | # |
1628 | CONFIG_USB_HID=y | 1788 | CONFIG_USB_HID=y |
1629 | CONFIG_USB_HIDINPUT_POWERBOOK=y | ||
1630 | CONFIG_HID_FF=y | ||
1631 | CONFIG_HID_PID=y | 1789 | CONFIG_HID_PID=y |
1790 | CONFIG_USB_HIDDEV=y | ||
1791 | |||
1792 | # | ||
1793 | # Special HID drivers | ||
1794 | # | ||
1795 | CONFIG_HID_COMPAT=y | ||
1796 | CONFIG_HID_A4TECH=y | ||
1797 | CONFIG_HID_APPLE=y | ||
1798 | CONFIG_HID_BELKIN=y | ||
1799 | CONFIG_HID_CHERRY=y | ||
1800 | CONFIG_HID_CHICONY=y | ||
1801 | CONFIG_HID_CYPRESS=y | ||
1802 | CONFIG_HID_EZKEY=y | ||
1803 | CONFIG_HID_GYRATION=y | ||
1804 | CONFIG_HID_LOGITECH=y | ||
1632 | CONFIG_LOGITECH_FF=y | 1805 | CONFIG_LOGITECH_FF=y |
1633 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | 1806 | # CONFIG_LOGIRUMBLEPAD2_FF is not set |
1807 | CONFIG_HID_MICROSOFT=y | ||
1808 | CONFIG_HID_MONTEREY=y | ||
1809 | CONFIG_HID_NTRIG=y | ||
1810 | CONFIG_HID_PANTHERLORD=y | ||
1634 | CONFIG_PANTHERLORD_FF=y | 1811 | CONFIG_PANTHERLORD_FF=y |
1812 | CONFIG_HID_PETALYNX=y | ||
1813 | CONFIG_HID_SAMSUNG=y | ||
1814 | CONFIG_HID_SONY=y | ||
1815 | CONFIG_HID_SUNPLUS=y | ||
1816 | # CONFIG_GREENASIA_FF is not set | ||
1817 | CONFIG_HID_TOPSEED=y | ||
1635 | CONFIG_THRUSTMASTER_FF=y | 1818 | CONFIG_THRUSTMASTER_FF=y |
1636 | CONFIG_ZEROPLUS_FF=y | 1819 | CONFIG_ZEROPLUS_FF=y |
1637 | CONFIG_USB_HIDDEV=y | ||
1638 | CONFIG_USB_SUPPORT=y | 1820 | CONFIG_USB_SUPPORT=y |
1639 | CONFIG_USB_ARCH_HAS_HCD=y | 1821 | CONFIG_USB_ARCH_HAS_HCD=y |
1640 | CONFIG_USB_ARCH_HAS_OHCI=y | 1822 | CONFIG_USB_ARCH_HAS_OHCI=y |
@@ -1652,6 +1834,8 @@ CONFIG_USB_DEVICEFS=y | |||
1652 | CONFIG_USB_SUSPEND=y | 1834 | CONFIG_USB_SUSPEND=y |
1653 | # CONFIG_USB_OTG is not set | 1835 | # CONFIG_USB_OTG is not set |
1654 | CONFIG_USB_MON=y | 1836 | CONFIG_USB_MON=y |
1837 | # CONFIG_USB_WUSB is not set | ||
1838 | # CONFIG_USB_WUSB_CBAF is not set | ||
1655 | 1839 | ||
1656 | # | 1840 | # |
1657 | # USB Host Controller Drivers | 1841 | # USB Host Controller Drivers |
@@ -1660,6 +1844,7 @@ CONFIG_USB_MON=y | |||
1660 | CONFIG_USB_EHCI_HCD=y | 1844 | CONFIG_USB_EHCI_HCD=y |
1661 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 1845 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1662 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | 1846 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set |
1847 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1663 | # CONFIG_USB_ISP116X_HCD is not set | 1848 | # CONFIG_USB_ISP116X_HCD is not set |
1664 | # CONFIG_USB_ISP1760_HCD is not set | 1849 | # CONFIG_USB_ISP1760_HCD is not set |
1665 | CONFIG_USB_OHCI_HCD=y | 1850 | CONFIG_USB_OHCI_HCD=y |
@@ -1669,6 +1854,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
1669 | CONFIG_USB_UHCI_HCD=y | 1854 | CONFIG_USB_UHCI_HCD=y |
1670 | # CONFIG_USB_SL811_HCD is not set | 1855 | # CONFIG_USB_SL811_HCD is not set |
1671 | # CONFIG_USB_R8A66597_HCD is not set | 1856 | # CONFIG_USB_R8A66597_HCD is not set |
1857 | # CONFIG_USB_WHCI_HCD is not set | ||
1858 | # CONFIG_USB_HWA_HCD is not set | ||
1672 | 1859 | ||
1673 | # | 1860 | # |
1674 | # USB Device Class drivers | 1861 | # USB Device Class drivers |
@@ -1676,20 +1863,20 @@ CONFIG_USB_UHCI_HCD=y | |||
1676 | # CONFIG_USB_ACM is not set | 1863 | # CONFIG_USB_ACM is not set |
1677 | CONFIG_USB_PRINTER=y | 1864 | CONFIG_USB_PRINTER=y |
1678 | # CONFIG_USB_WDM is not set | 1865 | # CONFIG_USB_WDM is not set |
1866 | # CONFIG_USB_TMC is not set | ||
1679 | 1867 | ||
1680 | # | 1868 | # |
1681 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1869 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
1682 | # | 1870 | # |
1683 | 1871 | ||
1684 | # | 1872 | # |
1685 | # may also be needed; see USB_STORAGE Help for more information | 1873 | # see USB_STORAGE Help for more information |
1686 | # | 1874 | # |
1687 | CONFIG_USB_STORAGE=y | 1875 | CONFIG_USB_STORAGE=y |
1688 | # CONFIG_USB_STORAGE_DEBUG is not set | 1876 | # CONFIG_USB_STORAGE_DEBUG is not set |
1689 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1877 | # CONFIG_USB_STORAGE_DATAFAB is not set |
1690 | # CONFIG_USB_STORAGE_FREECOM is not set | 1878 | # CONFIG_USB_STORAGE_FREECOM is not set |
1691 | # CONFIG_USB_STORAGE_ISD200 is not set | 1879 | # CONFIG_USB_STORAGE_ISD200 is not set |
1692 | # CONFIG_USB_STORAGE_DPCM is not set | ||
1693 | # CONFIG_USB_STORAGE_USBAT is not set | 1880 | # CONFIG_USB_STORAGE_USBAT is not set |
1694 | # CONFIG_USB_STORAGE_SDDR09 is not set | 1881 | # CONFIG_USB_STORAGE_SDDR09 is not set |
1695 | # CONFIG_USB_STORAGE_SDDR55 is not set | 1882 | # CONFIG_USB_STORAGE_SDDR55 is not set |
@@ -1697,7 +1884,6 @@ CONFIG_USB_STORAGE=y | |||
1697 | # CONFIG_USB_STORAGE_ALAUDA is not set | 1884 | # CONFIG_USB_STORAGE_ALAUDA is not set |
1698 | # CONFIG_USB_STORAGE_ONETOUCH is not set | 1885 | # CONFIG_USB_STORAGE_ONETOUCH is not set |
1699 | # CONFIG_USB_STORAGE_KARMA is not set | 1886 | # CONFIG_USB_STORAGE_KARMA is not set |
1700 | # CONFIG_USB_STORAGE_SIERRA is not set | ||
1701 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | 1887 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set |
1702 | CONFIG_USB_LIBUSUAL=y | 1888 | CONFIG_USB_LIBUSUAL=y |
1703 | 1889 | ||
@@ -1718,6 +1904,7 @@ CONFIG_USB_LIBUSUAL=y | |||
1718 | # CONFIG_USB_EMI62 is not set | 1904 | # CONFIG_USB_EMI62 is not set |
1719 | # CONFIG_USB_EMI26 is not set | 1905 | # CONFIG_USB_EMI26 is not set |
1720 | # CONFIG_USB_ADUTUX is not set | 1906 | # CONFIG_USB_ADUTUX is not set |
1907 | # CONFIG_USB_SEVSEG is not set | ||
1721 | # CONFIG_USB_RIO500 is not set | 1908 | # CONFIG_USB_RIO500 is not set |
1722 | # CONFIG_USB_LEGOTOWER is not set | 1909 | # CONFIG_USB_LEGOTOWER is not set |
1723 | # CONFIG_USB_LCD is not set | 1910 | # CONFIG_USB_LCD is not set |
@@ -1735,7 +1922,13 @@ CONFIG_USB_LIBUSUAL=y | |||
1735 | # CONFIG_USB_IOWARRIOR is not set | 1922 | # CONFIG_USB_IOWARRIOR is not set |
1736 | # CONFIG_USB_TEST is not set | 1923 | # CONFIG_USB_TEST is not set |
1737 | # CONFIG_USB_ISIGHTFW is not set | 1924 | # CONFIG_USB_ISIGHTFW is not set |
1925 | # CONFIG_USB_VST is not set | ||
1738 | # CONFIG_USB_GADGET is not set | 1926 | # CONFIG_USB_GADGET is not set |
1927 | |||
1928 | # | ||
1929 | # OTG and related infrastructure | ||
1930 | # | ||
1931 | # CONFIG_UWB is not set | ||
1739 | # CONFIG_MMC is not set | 1932 | # CONFIG_MMC is not set |
1740 | # CONFIG_MEMSTICK is not set | 1933 | # CONFIG_MEMSTICK is not set |
1741 | CONFIG_NEW_LEDS=y | 1934 | CONFIG_NEW_LEDS=y |
@@ -1744,6 +1937,7 @@ CONFIG_LEDS_CLASS=y | |||
1744 | # | 1937 | # |
1745 | # LED drivers | 1938 | # LED drivers |
1746 | # | 1939 | # |
1940 | # CONFIG_LEDS_ALIX2 is not set | ||
1747 | # CONFIG_LEDS_PCA9532 is not set | 1941 | # CONFIG_LEDS_PCA9532 is not set |
1748 | # CONFIG_LEDS_CLEVO_MAIL is not set | 1942 | # CONFIG_LEDS_CLEVO_MAIL is not set |
1749 | # CONFIG_LEDS_PCA955X is not set | 1943 | # CONFIG_LEDS_PCA955X is not set |
@@ -1754,6 +1948,7 @@ CONFIG_LEDS_CLASS=y | |||
1754 | CONFIG_LEDS_TRIGGERS=y | 1948 | CONFIG_LEDS_TRIGGERS=y |
1755 | # CONFIG_LEDS_TRIGGER_TIMER is not set | 1949 | # CONFIG_LEDS_TRIGGER_TIMER is not set |
1756 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set | 1950 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set |
1951 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
1757 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | 1952 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set |
1758 | # CONFIG_ACCESSIBILITY is not set | 1953 | # CONFIG_ACCESSIBILITY is not set |
1759 | # CONFIG_INFINIBAND is not set | 1954 | # CONFIG_INFINIBAND is not set |
@@ -1793,6 +1988,7 @@ CONFIG_RTC_INTF_DEV=y | |||
1793 | # CONFIG_RTC_DRV_M41T80 is not set | 1988 | # CONFIG_RTC_DRV_M41T80 is not set |
1794 | # CONFIG_RTC_DRV_S35390A is not set | 1989 | # CONFIG_RTC_DRV_S35390A is not set |
1795 | # CONFIG_RTC_DRV_FM3130 is not set | 1990 | # CONFIG_RTC_DRV_FM3130 is not set |
1991 | # CONFIG_RTC_DRV_RX8581 is not set | ||
1796 | 1992 | ||
1797 | # | 1993 | # |
1798 | # SPI RTC drivers | 1994 | # SPI RTC drivers |
@@ -1802,12 +1998,15 @@ CONFIG_RTC_INTF_DEV=y | |||
1802 | # Platform RTC drivers | 1998 | # Platform RTC drivers |
1803 | # | 1999 | # |
1804 | CONFIG_RTC_DRV_CMOS=y | 2000 | CONFIG_RTC_DRV_CMOS=y |
2001 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1805 | # CONFIG_RTC_DRV_DS1511 is not set | 2002 | # CONFIG_RTC_DRV_DS1511 is not set |
1806 | # CONFIG_RTC_DRV_DS1553 is not set | 2003 | # CONFIG_RTC_DRV_DS1553 is not set |
1807 | # CONFIG_RTC_DRV_DS1742 is not set | 2004 | # CONFIG_RTC_DRV_DS1742 is not set |
1808 | # CONFIG_RTC_DRV_STK17TA8 is not set | 2005 | # CONFIG_RTC_DRV_STK17TA8 is not set |
1809 | # CONFIG_RTC_DRV_M48T86 is not set | 2006 | # CONFIG_RTC_DRV_M48T86 is not set |
2007 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1810 | # CONFIG_RTC_DRV_M48T59 is not set | 2008 | # CONFIG_RTC_DRV_M48T59 is not set |
2009 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1811 | # CONFIG_RTC_DRV_V3020 is not set | 2010 | # CONFIG_RTC_DRV_V3020 is not set |
1812 | 2011 | ||
1813 | # | 2012 | # |
@@ -1820,6 +2019,21 @@ CONFIG_DMADEVICES=y | |||
1820 | # | 2019 | # |
1821 | # CONFIG_INTEL_IOATDMA is not set | 2020 | # CONFIG_INTEL_IOATDMA is not set |
1822 | # CONFIG_UIO is not set | 2021 | # CONFIG_UIO is not set |
2022 | # CONFIG_STAGING is not set | ||
2023 | CONFIG_X86_PLATFORM_DEVICES=y | ||
2024 | # CONFIG_ACER_WMI is not set | ||
2025 | # CONFIG_ASUS_LAPTOP is not set | ||
2026 | # CONFIG_FUJITSU_LAPTOP is not set | ||
2027 | # CONFIG_MSI_LAPTOP is not set | ||
2028 | # CONFIG_PANASONIC_LAPTOP is not set | ||
2029 | # CONFIG_COMPAL_LAPTOP is not set | ||
2030 | # CONFIG_SONY_LAPTOP is not set | ||
2031 | # CONFIG_THINKPAD_ACPI is not set | ||
2032 | # CONFIG_INTEL_MENLOW is not set | ||
2033 | CONFIG_EEEPC_LAPTOP=y | ||
2034 | # CONFIG_ACPI_WMI is not set | ||
2035 | # CONFIG_ACPI_ASUS is not set | ||
2036 | # CONFIG_ACPI_TOSHIBA is not set | ||
1823 | 2037 | ||
1824 | # | 2038 | # |
1825 | # Firmware Drivers | 2039 | # Firmware Drivers |
@@ -1830,8 +2044,7 @@ CONFIG_EFI_VARS=y | |||
1830 | # CONFIG_DELL_RBU is not set | 2044 | # CONFIG_DELL_RBU is not set |
1831 | # CONFIG_DCDBAS is not set | 2045 | # CONFIG_DCDBAS is not set |
1832 | CONFIG_DMIID=y | 2046 | CONFIG_DMIID=y |
1833 | CONFIG_ISCSI_IBFT_FIND=y | 2047 | # CONFIG_ISCSI_IBFT_FIND is not set |
1834 | CONFIG_ISCSI_IBFT=y | ||
1835 | 2048 | ||
1836 | # | 2049 | # |
1837 | # File systems | 2050 | # File systems |
@@ -1841,22 +2054,25 @@ CONFIG_EXT3_FS=y | |||
1841 | CONFIG_EXT3_FS_XATTR=y | 2054 | CONFIG_EXT3_FS_XATTR=y |
1842 | CONFIG_EXT3_FS_POSIX_ACL=y | 2055 | CONFIG_EXT3_FS_POSIX_ACL=y |
1843 | CONFIG_EXT3_FS_SECURITY=y | 2056 | CONFIG_EXT3_FS_SECURITY=y |
1844 | # CONFIG_EXT4DEV_FS is not set | 2057 | # CONFIG_EXT4_FS is not set |
1845 | CONFIG_JBD=y | 2058 | CONFIG_JBD=y |
1846 | # CONFIG_JBD_DEBUG is not set | 2059 | # CONFIG_JBD_DEBUG is not set |
1847 | CONFIG_FS_MBCACHE=y | 2060 | CONFIG_FS_MBCACHE=y |
1848 | # CONFIG_REISERFS_FS is not set | 2061 | # CONFIG_REISERFS_FS is not set |
1849 | # CONFIG_JFS_FS is not set | 2062 | # CONFIG_JFS_FS is not set |
1850 | CONFIG_FS_POSIX_ACL=y | 2063 | CONFIG_FS_POSIX_ACL=y |
2064 | CONFIG_FILE_LOCKING=y | ||
1851 | # CONFIG_XFS_FS is not set | 2065 | # CONFIG_XFS_FS is not set |
1852 | # CONFIG_GFS2_FS is not set | 2066 | # CONFIG_GFS2_FS is not set |
1853 | # CONFIG_OCFS2_FS is not set | 2067 | # CONFIG_OCFS2_FS is not set |
2068 | # CONFIG_BTRFS_FS is not set | ||
1854 | CONFIG_DNOTIFY=y | 2069 | CONFIG_DNOTIFY=y |
1855 | CONFIG_INOTIFY=y | 2070 | CONFIG_INOTIFY=y |
1856 | CONFIG_INOTIFY_USER=y | 2071 | CONFIG_INOTIFY_USER=y |
1857 | CONFIG_QUOTA=y | 2072 | CONFIG_QUOTA=y |
1858 | CONFIG_QUOTA_NETLINK_INTERFACE=y | 2073 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
1859 | # CONFIG_PRINT_QUOTA_WARNING is not set | 2074 | # CONFIG_PRINT_QUOTA_WARNING is not set |
2075 | CONFIG_QUOTA_TREE=y | ||
1860 | # CONFIG_QFMT_V1 is not set | 2076 | # CONFIG_QFMT_V1 is not set |
1861 | CONFIG_QFMT_V2=y | 2077 | CONFIG_QFMT_V2=y |
1862 | CONFIG_QUOTACTL=y | 2078 | CONFIG_QUOTACTL=y |
@@ -1890,16 +2106,14 @@ CONFIG_PROC_FS=y | |||
1890 | CONFIG_PROC_KCORE=y | 2106 | CONFIG_PROC_KCORE=y |
1891 | CONFIG_PROC_VMCORE=y | 2107 | CONFIG_PROC_VMCORE=y |
1892 | CONFIG_PROC_SYSCTL=y | 2108 | CONFIG_PROC_SYSCTL=y |
2109 | CONFIG_PROC_PAGE_MONITOR=y | ||
1893 | CONFIG_SYSFS=y | 2110 | CONFIG_SYSFS=y |
1894 | CONFIG_TMPFS=y | 2111 | CONFIG_TMPFS=y |
1895 | CONFIG_TMPFS_POSIX_ACL=y | 2112 | CONFIG_TMPFS_POSIX_ACL=y |
1896 | CONFIG_HUGETLBFS=y | 2113 | CONFIG_HUGETLBFS=y |
1897 | CONFIG_HUGETLB_PAGE=y | 2114 | CONFIG_HUGETLB_PAGE=y |
1898 | # CONFIG_CONFIGFS_FS is not set | 2115 | # CONFIG_CONFIGFS_FS is not set |
1899 | 2116 | CONFIG_MISC_FILESYSTEMS=y | |
1900 | # | ||
1901 | # Miscellaneous filesystems | ||
1902 | # | ||
1903 | # CONFIG_ADFS_FS is not set | 2117 | # CONFIG_ADFS_FS is not set |
1904 | # CONFIG_AFFS_FS is not set | 2118 | # CONFIG_AFFS_FS is not set |
1905 | # CONFIG_ECRYPT_FS is not set | 2119 | # CONFIG_ECRYPT_FS is not set |
@@ -1909,6 +2123,7 @@ CONFIG_HUGETLB_PAGE=y | |||
1909 | # CONFIG_BFS_FS is not set | 2123 | # CONFIG_BFS_FS is not set |
1910 | # CONFIG_EFS_FS is not set | 2124 | # CONFIG_EFS_FS is not set |
1911 | # CONFIG_CRAMFS is not set | 2125 | # CONFIG_CRAMFS is not set |
2126 | # CONFIG_SQUASHFS is not set | ||
1912 | # CONFIG_VXFS_FS is not set | 2127 | # CONFIG_VXFS_FS is not set |
1913 | # CONFIG_MINIX_FS is not set | 2128 | # CONFIG_MINIX_FS is not set |
1914 | # CONFIG_OMFS_FS is not set | 2129 | # CONFIG_OMFS_FS is not set |
@@ -1930,6 +2145,7 @@ CONFIG_NFS_ACL_SUPPORT=y | |||
1930 | CONFIG_NFS_COMMON=y | 2145 | CONFIG_NFS_COMMON=y |
1931 | CONFIG_SUNRPC=y | 2146 | CONFIG_SUNRPC=y |
1932 | CONFIG_SUNRPC_GSS=y | 2147 | CONFIG_SUNRPC_GSS=y |
2148 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
1933 | CONFIG_RPCSEC_GSS_KRB5=y | 2149 | CONFIG_RPCSEC_GSS_KRB5=y |
1934 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 2150 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1935 | # CONFIG_SMB_FS is not set | 2151 | # CONFIG_SMB_FS is not set |
@@ -2006,7 +2222,7 @@ CONFIG_NLS_UTF8=y | |||
2006 | # | 2222 | # |
2007 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | 2223 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y |
2008 | CONFIG_PRINTK_TIME=y | 2224 | CONFIG_PRINTK_TIME=y |
2009 | CONFIG_ENABLE_WARN_DEPRECATED=y | 2225 | # CONFIG_ENABLE_WARN_DEPRECATED is not set |
2010 | CONFIG_ENABLE_MUST_CHECK=y | 2226 | CONFIG_ENABLE_MUST_CHECK=y |
2011 | CONFIG_FRAME_WARN=2048 | 2227 | CONFIG_FRAME_WARN=2048 |
2012 | CONFIG_MAGIC_SYSRQ=y | 2228 | CONFIG_MAGIC_SYSRQ=y |
@@ -2035,40 +2251,60 @@ CONFIG_TIMER_STATS=y | |||
2035 | CONFIG_DEBUG_BUGVERBOSE=y | 2251 | CONFIG_DEBUG_BUGVERBOSE=y |
2036 | # CONFIG_DEBUG_INFO is not set | 2252 | # CONFIG_DEBUG_INFO is not set |
2037 | # CONFIG_DEBUG_VM is not set | 2253 | # CONFIG_DEBUG_VM is not set |
2254 | # CONFIG_DEBUG_VIRTUAL is not set | ||
2038 | # CONFIG_DEBUG_WRITECOUNT is not set | 2255 | # CONFIG_DEBUG_WRITECOUNT is not set |
2039 | CONFIG_DEBUG_MEMORY_INIT=y | 2256 | CONFIG_DEBUG_MEMORY_INIT=y |
2040 | # CONFIG_DEBUG_LIST is not set | 2257 | # CONFIG_DEBUG_LIST is not set |
2041 | # CONFIG_DEBUG_SG is not set | 2258 | # CONFIG_DEBUG_SG is not set |
2259 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
2260 | CONFIG_ARCH_WANT_FRAME_POINTERS=y | ||
2042 | CONFIG_FRAME_POINTER=y | 2261 | CONFIG_FRAME_POINTER=y |
2043 | # CONFIG_BOOT_PRINTK_DELAY is not set | 2262 | # CONFIG_BOOT_PRINTK_DELAY is not set |
2044 | # CONFIG_RCU_TORTURE_TEST is not set | 2263 | # CONFIG_RCU_TORTURE_TEST is not set |
2264 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
2045 | # CONFIG_KPROBES_SANITY_TEST is not set | 2265 | # CONFIG_KPROBES_SANITY_TEST is not set |
2046 | # CONFIG_BACKTRACE_SELF_TEST is not set | 2266 | # CONFIG_BACKTRACE_SELF_TEST is not set |
2267 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
2047 | # CONFIG_LKDTM is not set | 2268 | # CONFIG_LKDTM is not set |
2048 | # CONFIG_FAULT_INJECTION is not set | 2269 | # CONFIG_FAULT_INJECTION is not set |
2049 | # CONFIG_LATENCYTOP is not set | 2270 | # CONFIG_LATENCYTOP is not set |
2050 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 2271 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
2051 | CONFIG_HAVE_FTRACE=y | 2272 | CONFIG_USER_STACKTRACE_SUPPORT=y |
2273 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
2274 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
2275 | CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y | ||
2052 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 2276 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
2053 | # CONFIG_FTRACE is not set | 2277 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
2278 | CONFIG_HAVE_HW_BRANCH_TRACER=y | ||
2279 | |||
2280 | # | ||
2281 | # Tracers | ||
2282 | # | ||
2283 | # CONFIG_FUNCTION_TRACER is not set | ||
2054 | # CONFIG_IRQSOFF_TRACER is not set | 2284 | # CONFIG_IRQSOFF_TRACER is not set |
2055 | # CONFIG_SYSPROF_TRACER is not set | 2285 | # CONFIG_SYSPROF_TRACER is not set |
2056 | # CONFIG_SCHED_TRACER is not set | 2286 | # CONFIG_SCHED_TRACER is not set |
2057 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 2287 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
2288 | # CONFIG_BOOT_TRACER is not set | ||
2289 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
2290 | # CONFIG_POWER_TRACER is not set | ||
2291 | # CONFIG_STACK_TRACER is not set | ||
2292 | # CONFIG_HW_BRANCH_TRACER is not set | ||
2058 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y | 2293 | CONFIG_PROVIDE_OHCI1394_DMA_INIT=y |
2294 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
2059 | # CONFIG_SAMPLES is not set | 2295 | # CONFIG_SAMPLES is not set |
2060 | CONFIG_HAVE_ARCH_KGDB=y | 2296 | CONFIG_HAVE_ARCH_KGDB=y |
2061 | # CONFIG_KGDB is not set | 2297 | # CONFIG_KGDB is not set |
2062 | # CONFIG_STRICT_DEVMEM is not set | 2298 | # CONFIG_STRICT_DEVMEM is not set |
2063 | CONFIG_X86_VERBOSE_BOOTUP=y | 2299 | CONFIG_X86_VERBOSE_BOOTUP=y |
2064 | CONFIG_EARLY_PRINTK=y | 2300 | CONFIG_EARLY_PRINTK=y |
2301 | CONFIG_EARLY_PRINTK_DBGP=y | ||
2065 | CONFIG_DEBUG_STACKOVERFLOW=y | 2302 | CONFIG_DEBUG_STACKOVERFLOW=y |
2066 | CONFIG_DEBUG_STACK_USAGE=y | 2303 | CONFIG_DEBUG_STACK_USAGE=y |
2067 | # CONFIG_DEBUG_PAGEALLOC is not set | 2304 | # CONFIG_DEBUG_PAGEALLOC is not set |
2068 | # CONFIG_DEBUG_PER_CPU_MAPS is not set | 2305 | # CONFIG_DEBUG_PER_CPU_MAPS is not set |
2069 | # CONFIG_X86_PTDUMP is not set | 2306 | # CONFIG_X86_PTDUMP is not set |
2070 | CONFIG_DEBUG_RODATA=y | 2307 | CONFIG_DEBUG_RODATA=y |
2071 | # CONFIG_DIRECT_GBPAGES is not set | ||
2072 | # CONFIG_DEBUG_RODATA_TEST is not set | 2308 | # CONFIG_DEBUG_RODATA_TEST is not set |
2073 | CONFIG_DEBUG_NX_TEST=m | 2309 | CONFIG_DEBUG_NX_TEST=m |
2074 | # CONFIG_IOMMU_DEBUG is not set | 2310 | # CONFIG_IOMMU_DEBUG is not set |
@@ -2092,8 +2328,10 @@ CONFIG_OPTIMIZE_INLINING=y | |||
2092 | CONFIG_KEYS=y | 2328 | CONFIG_KEYS=y |
2093 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | 2329 | CONFIG_KEYS_DEBUG_PROC_KEYS=y |
2094 | CONFIG_SECURITY=y | 2330 | CONFIG_SECURITY=y |
2331 | # CONFIG_SECURITYFS is not set | ||
2095 | CONFIG_SECURITY_NETWORK=y | 2332 | CONFIG_SECURITY_NETWORK=y |
2096 | # CONFIG_SECURITY_NETWORK_XFRM is not set | 2333 | # CONFIG_SECURITY_NETWORK_XFRM is not set |
2334 | # CONFIG_SECURITY_PATH is not set | ||
2097 | CONFIG_SECURITY_FILE_CAPABILITIES=y | 2335 | CONFIG_SECURITY_FILE_CAPABILITIES=y |
2098 | # CONFIG_SECURITY_ROOTPLUG is not set | 2336 | # CONFIG_SECURITY_ROOTPLUG is not set |
2099 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 | 2337 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 |
@@ -2104,7 +2342,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y | |||
2104 | CONFIG_SECURITY_SELINUX_DEVELOP=y | 2342 | CONFIG_SECURITY_SELINUX_DEVELOP=y |
2105 | CONFIG_SECURITY_SELINUX_AVC_STATS=y | 2343 | CONFIG_SECURITY_SELINUX_AVC_STATS=y |
2106 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 | 2344 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 |
2107 | # CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set | ||
2108 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set | 2345 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set |
2109 | # CONFIG_SECURITY_SMACK is not set | 2346 | # CONFIG_SECURITY_SMACK is not set |
2110 | CONFIG_CRYPTO=y | 2347 | CONFIG_CRYPTO=y |
@@ -2112,11 +2349,18 @@ CONFIG_CRYPTO=y | |||
2112 | # | 2349 | # |
2113 | # Crypto core or helper | 2350 | # Crypto core or helper |
2114 | # | 2351 | # |
2352 | # CONFIG_CRYPTO_FIPS is not set | ||
2115 | CONFIG_CRYPTO_ALGAPI=y | 2353 | CONFIG_CRYPTO_ALGAPI=y |
2354 | CONFIG_CRYPTO_ALGAPI2=y | ||
2116 | CONFIG_CRYPTO_AEAD=y | 2355 | CONFIG_CRYPTO_AEAD=y |
2356 | CONFIG_CRYPTO_AEAD2=y | ||
2117 | CONFIG_CRYPTO_BLKCIPHER=y | 2357 | CONFIG_CRYPTO_BLKCIPHER=y |
2358 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
2118 | CONFIG_CRYPTO_HASH=y | 2359 | CONFIG_CRYPTO_HASH=y |
2360 | CONFIG_CRYPTO_HASH2=y | ||
2361 | CONFIG_CRYPTO_RNG2=y | ||
2119 | CONFIG_CRYPTO_MANAGER=y | 2362 | CONFIG_CRYPTO_MANAGER=y |
2363 | CONFIG_CRYPTO_MANAGER2=y | ||
2120 | # CONFIG_CRYPTO_GF128MUL is not set | 2364 | # CONFIG_CRYPTO_GF128MUL is not set |
2121 | # CONFIG_CRYPTO_NULL is not set | 2365 | # CONFIG_CRYPTO_NULL is not set |
2122 | # CONFIG_CRYPTO_CRYPTD is not set | 2366 | # CONFIG_CRYPTO_CRYPTD is not set |
@@ -2151,6 +2395,7 @@ CONFIG_CRYPTO_HMAC=y | |||
2151 | # Digest | 2395 | # Digest |
2152 | # | 2396 | # |
2153 | # CONFIG_CRYPTO_CRC32C is not set | 2397 | # CONFIG_CRYPTO_CRC32C is not set |
2398 | # CONFIG_CRYPTO_CRC32C_INTEL is not set | ||
2154 | # CONFIG_CRYPTO_MD4 is not set | 2399 | # CONFIG_CRYPTO_MD4 is not set |
2155 | CONFIG_CRYPTO_MD5=y | 2400 | CONFIG_CRYPTO_MD5=y |
2156 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 2401 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
@@ -2191,6 +2436,11 @@ CONFIG_CRYPTO_DES=y | |||
2191 | # | 2436 | # |
2192 | # CONFIG_CRYPTO_DEFLATE is not set | 2437 | # CONFIG_CRYPTO_DEFLATE is not set |
2193 | # CONFIG_CRYPTO_LZO is not set | 2438 | # CONFIG_CRYPTO_LZO is not set |
2439 | |||
2440 | # | ||
2441 | # Random Number Generation | ||
2442 | # | ||
2443 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
2194 | CONFIG_CRYPTO_HW=y | 2444 | CONFIG_CRYPTO_HW=y |
2195 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | 2445 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set |
2196 | CONFIG_HAVE_KVM=y | 2446 | CONFIG_HAVE_KVM=y |
@@ -2205,6 +2455,7 @@ CONFIG_VIRTUALIZATION=y | |||
2205 | CONFIG_BITREVERSE=y | 2455 | CONFIG_BITREVERSE=y |
2206 | CONFIG_GENERIC_FIND_FIRST_BIT=y | 2456 | CONFIG_GENERIC_FIND_FIRST_BIT=y |
2207 | CONFIG_GENERIC_FIND_NEXT_BIT=y | 2457 | CONFIG_GENERIC_FIND_NEXT_BIT=y |
2458 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
2208 | # CONFIG_CRC_CCITT is not set | 2459 | # CONFIG_CRC_CCITT is not set |
2209 | # CONFIG_CRC16 is not set | 2460 | # CONFIG_CRC16 is not set |
2210 | CONFIG_CRC_T10DIF=y | 2461 | CONFIG_CRC_T10DIF=y |
diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c index 9dabd00e9805..588a7aa937e1 100644 --- a/arch/x86/ia32/ia32_signal.c +++ b/arch/x86/ia32/ia32_signal.c | |||
@@ -33,8 +33,6 @@ | |||
33 | #include <asm/sigframe.h> | 33 | #include <asm/sigframe.h> |
34 | #include <asm/sys_ia32.h> | 34 | #include <asm/sys_ia32.h> |
35 | 35 | ||
36 | #define DEBUG_SIG 0 | ||
37 | |||
38 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | 36 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) |
39 | 37 | ||
40 | #define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \ | 38 | #define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \ |
@@ -46,78 +44,83 @@ void signal_fault(struct pt_regs *regs, void __user *frame, char *where); | |||
46 | 44 | ||
47 | int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) | 45 | int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) |
48 | { | 46 | { |
49 | int err; | 47 | int err = 0; |
50 | 48 | ||
51 | if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t))) | 49 | if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t))) |
52 | return -EFAULT; | 50 | return -EFAULT; |
53 | 51 | ||
54 | /* If you change siginfo_t structure, please make sure that | 52 | put_user_try { |
55 | this code is fixed accordingly. | 53 | /* If you change siginfo_t structure, please make sure that |
56 | It should never copy any pad contained in the structure | 54 | this code is fixed accordingly. |
57 | to avoid security leaks, but must copy the generic | 55 | It should never copy any pad contained in the structure |
58 | 3 ints plus the relevant union member. */ | 56 | to avoid security leaks, but must copy the generic |
59 | err = __put_user(from->si_signo, &to->si_signo); | 57 | 3 ints plus the relevant union member. */ |
60 | err |= __put_user(from->si_errno, &to->si_errno); | 58 | put_user_ex(from->si_signo, &to->si_signo); |
61 | err |= __put_user((short)from->si_code, &to->si_code); | 59 | put_user_ex(from->si_errno, &to->si_errno); |
62 | 60 | put_user_ex((short)from->si_code, &to->si_code); | |
63 | if (from->si_code < 0) { | 61 | |
64 | err |= __put_user(from->si_pid, &to->si_pid); | 62 | if (from->si_code < 0) { |
65 | err |= __put_user(from->si_uid, &to->si_uid); | 63 | put_user_ex(from->si_pid, &to->si_pid); |
66 | err |= __put_user(ptr_to_compat(from->si_ptr), &to->si_ptr); | 64 | put_user_ex(from->si_uid, &to->si_uid); |
67 | } else { | 65 | put_user_ex(ptr_to_compat(from->si_ptr), &to->si_ptr); |
68 | /* | 66 | } else { |
69 | * First 32bits of unions are always present: | 67 | /* |
70 | * si_pid === si_band === si_tid === si_addr(LS half) | 68 | * First 32bits of unions are always present: |
71 | */ | 69 | * si_pid === si_band === si_tid === si_addr(LS half) |
72 | err |= __put_user(from->_sifields._pad[0], | 70 | */ |
73 | &to->_sifields._pad[0]); | 71 | put_user_ex(from->_sifields._pad[0], |
74 | switch (from->si_code >> 16) { | 72 | &to->_sifields._pad[0]); |
75 | case __SI_FAULT >> 16: | 73 | switch (from->si_code >> 16) { |
76 | break; | 74 | case __SI_FAULT >> 16: |
77 | case __SI_CHLD >> 16: | 75 | break; |
78 | err |= __put_user(from->si_utime, &to->si_utime); | 76 | case __SI_CHLD >> 16: |
79 | err |= __put_user(from->si_stime, &to->si_stime); | 77 | put_user_ex(from->si_utime, &to->si_utime); |
80 | err |= __put_user(from->si_status, &to->si_status); | 78 | put_user_ex(from->si_stime, &to->si_stime); |
81 | /* FALL THROUGH */ | 79 | put_user_ex(from->si_status, &to->si_status); |
82 | default: | 80 | /* FALL THROUGH */ |
83 | case __SI_KILL >> 16: | 81 | default: |
84 | err |= __put_user(from->si_uid, &to->si_uid); | 82 | case __SI_KILL >> 16: |
85 | break; | 83 | put_user_ex(from->si_uid, &to->si_uid); |
86 | case __SI_POLL >> 16: | 84 | break; |
87 | err |= __put_user(from->si_fd, &to->si_fd); | 85 | case __SI_POLL >> 16: |
88 | break; | 86 | put_user_ex(from->si_fd, &to->si_fd); |
89 | case __SI_TIMER >> 16: | 87 | break; |
90 | err |= __put_user(from->si_overrun, &to->si_overrun); | 88 | case __SI_TIMER >> 16: |
91 | err |= __put_user(ptr_to_compat(from->si_ptr), | 89 | put_user_ex(from->si_overrun, &to->si_overrun); |
92 | &to->si_ptr); | 90 | put_user_ex(ptr_to_compat(from->si_ptr), |
93 | break; | 91 | &to->si_ptr); |
94 | /* This is not generated by the kernel as of now. */ | 92 | break; |
95 | case __SI_RT >> 16: | 93 | /* This is not generated by the kernel as of now. */ |
96 | case __SI_MESGQ >> 16: | 94 | case __SI_RT >> 16: |
97 | err |= __put_user(from->si_uid, &to->si_uid); | 95 | case __SI_MESGQ >> 16: |
98 | err |= __put_user(from->si_int, &to->si_int); | 96 | put_user_ex(from->si_uid, &to->si_uid); |
99 | break; | 97 | put_user_ex(from->si_int, &to->si_int); |
98 | break; | ||
99 | } | ||
100 | } | 100 | } |
101 | } | 101 | } put_user_catch(err); |
102 | |||
102 | return err; | 103 | return err; |
103 | } | 104 | } |
104 | 105 | ||
105 | int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from) | 106 | int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from) |
106 | { | 107 | { |
107 | int err; | 108 | int err = 0; |
108 | u32 ptr32; | 109 | u32 ptr32; |
109 | 110 | ||
110 | if (!access_ok(VERIFY_READ, from, sizeof(compat_siginfo_t))) | 111 | if (!access_ok(VERIFY_READ, from, sizeof(compat_siginfo_t))) |
111 | return -EFAULT; | 112 | return -EFAULT; |
112 | 113 | ||
113 | err = __get_user(to->si_signo, &from->si_signo); | 114 | get_user_try { |
114 | err |= __get_user(to->si_errno, &from->si_errno); | 115 | get_user_ex(to->si_signo, &from->si_signo); |
115 | err |= __get_user(to->si_code, &from->si_code); | 116 | get_user_ex(to->si_errno, &from->si_errno); |
117 | get_user_ex(to->si_code, &from->si_code); | ||
116 | 118 | ||
117 | err |= __get_user(to->si_pid, &from->si_pid); | 119 | get_user_ex(to->si_pid, &from->si_pid); |
118 | err |= __get_user(to->si_uid, &from->si_uid); | 120 | get_user_ex(to->si_uid, &from->si_uid); |
119 | err |= __get_user(ptr32, &from->si_ptr); | 121 | get_user_ex(ptr32, &from->si_ptr); |
120 | to->si_ptr = compat_ptr(ptr32); | 122 | to->si_ptr = compat_ptr(ptr32); |
123 | } get_user_catch(err); | ||
121 | 124 | ||
122 | return err; | 125 | return err; |
123 | } | 126 | } |
@@ -142,17 +145,23 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr, | |||
142 | struct pt_regs *regs) | 145 | struct pt_regs *regs) |
143 | { | 146 | { |
144 | stack_t uss, uoss; | 147 | stack_t uss, uoss; |
145 | int ret; | 148 | int ret, err = 0; |
146 | mm_segment_t seg; | 149 | mm_segment_t seg; |
147 | 150 | ||
148 | if (uss_ptr) { | 151 | if (uss_ptr) { |
149 | u32 ptr; | 152 | u32 ptr; |
150 | 153 | ||
151 | memset(&uss, 0, sizeof(stack_t)); | 154 | memset(&uss, 0, sizeof(stack_t)); |
152 | if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t)) || | 155 | if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t))) |
153 | __get_user(ptr, &uss_ptr->ss_sp) || | 156 | return -EFAULT; |
154 | __get_user(uss.ss_flags, &uss_ptr->ss_flags) || | 157 | |
155 | __get_user(uss.ss_size, &uss_ptr->ss_size)) | 158 | get_user_try { |
159 | get_user_ex(ptr, &uss_ptr->ss_sp); | ||
160 | get_user_ex(uss.ss_flags, &uss_ptr->ss_flags); | ||
161 | get_user_ex(uss.ss_size, &uss_ptr->ss_size); | ||
162 | } get_user_catch(err); | ||
163 | |||
164 | if (err) | ||
156 | return -EFAULT; | 165 | return -EFAULT; |
157 | uss.ss_sp = compat_ptr(ptr); | 166 | uss.ss_sp = compat_ptr(ptr); |
158 | } | 167 | } |
@@ -161,10 +170,16 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr, | |||
161 | ret = do_sigaltstack(uss_ptr ? &uss : NULL, &uoss, regs->sp); | 170 | ret = do_sigaltstack(uss_ptr ? &uss : NULL, &uoss, regs->sp); |
162 | set_fs(seg); | 171 | set_fs(seg); |
163 | if (ret >= 0 && uoss_ptr) { | 172 | if (ret >= 0 && uoss_ptr) { |
164 | if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t)) || | 173 | if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t))) |
165 | __put_user(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp) || | 174 | return -EFAULT; |
166 | __put_user(uoss.ss_flags, &uoss_ptr->ss_flags) || | 175 | |
167 | __put_user(uoss.ss_size, &uoss_ptr->ss_size)) | 176 | put_user_try { |
177 | put_user_ex(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp); | ||
178 | put_user_ex(uoss.ss_flags, &uoss_ptr->ss_flags); | ||
179 | put_user_ex(uoss.ss_size, &uoss_ptr->ss_size); | ||
180 | } put_user_catch(err); | ||
181 | |||
182 | if (err) | ||
168 | ret = -EFAULT; | 183 | ret = -EFAULT; |
169 | } | 184 | } |
170 | return ret; | 185 | return ret; |
@@ -173,75 +188,78 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr, | |||
173 | /* | 188 | /* |
174 | * Do a signal return; undo the signal stack. | 189 | * Do a signal return; undo the signal stack. |
175 | */ | 190 | */ |
191 | #define loadsegment_gs(v) load_gs_index(v) | ||
192 | #define loadsegment_fs(v) loadsegment(fs, v) | ||
193 | #define loadsegment_ds(v) loadsegment(ds, v) | ||
194 | #define loadsegment_es(v) loadsegment(es, v) | ||
195 | |||
196 | #define get_user_seg(seg) ({ unsigned int v; savesegment(seg, v); v; }) | ||
197 | #define set_user_seg(seg, v) loadsegment_##seg(v) | ||
198 | |||
176 | #define COPY(x) { \ | 199 | #define COPY(x) { \ |
177 | err |= __get_user(regs->x, &sc->x); \ | 200 | get_user_ex(regs->x, &sc->x); \ |
178 | } | 201 | } |
179 | 202 | ||
180 | #define COPY_SEG_CPL3(seg) { \ | 203 | #define GET_SEG(seg) ({ \ |
181 | unsigned short tmp; \ | 204 | unsigned short tmp; \ |
182 | err |= __get_user(tmp, &sc->seg); \ | 205 | get_user_ex(tmp, &sc->seg); \ |
183 | regs->seg = tmp | 3; \ | 206 | tmp; \ |
184 | } | 207 | }) |
208 | |||
209 | #define COPY_SEG_CPL3(seg) do { \ | ||
210 | regs->seg = GET_SEG(seg) | 3; \ | ||
211 | } while (0) | ||
185 | 212 | ||
186 | #define RELOAD_SEG(seg) { \ | 213 | #define RELOAD_SEG(seg) { \ |
187 | unsigned int cur, pre; \ | 214 | unsigned int pre = GET_SEG(seg); \ |
188 | err |= __get_user(pre, &sc->seg); \ | 215 | unsigned int cur = get_user_seg(seg); \ |
189 | savesegment(seg, cur); \ | ||
190 | pre |= 3; \ | 216 | pre |= 3; \ |
191 | if (pre != cur) \ | 217 | if (pre != cur) \ |
192 | loadsegment(seg, pre); \ | 218 | set_user_seg(seg, pre); \ |
193 | } | 219 | } |
194 | 220 | ||
195 | static int ia32_restore_sigcontext(struct pt_regs *regs, | 221 | static int ia32_restore_sigcontext(struct pt_regs *regs, |
196 | struct sigcontext_ia32 __user *sc, | 222 | struct sigcontext_ia32 __user *sc, |
197 | unsigned int *pax) | 223 | unsigned int *pax) |
198 | { | 224 | { |
199 | unsigned int tmpflags, gs, oldgs, err = 0; | 225 | unsigned int tmpflags, err = 0; |
200 | void __user *buf; | 226 | void __user *buf; |
201 | u32 tmp; | 227 | u32 tmp; |
202 | 228 | ||
203 | /* Always make any pending restarted system calls return -EINTR */ | 229 | /* Always make any pending restarted system calls return -EINTR */ |
204 | current_thread_info()->restart_block.fn = do_no_restart_syscall; | 230 | current_thread_info()->restart_block.fn = do_no_restart_syscall; |
205 | 231 | ||
206 | #if DEBUG_SIG | 232 | get_user_try { |
207 | printk(KERN_DEBUG "SIG restore_sigcontext: " | 233 | /* |
208 | "sc=%p err(%x) eip(%x) cs(%x) flg(%x)\n", | 234 | * Reload fs and gs if they have changed in the signal |
209 | sc, sc->err, sc->ip, sc->cs, sc->flags); | 235 | * handler. This does not handle long fs/gs base changes in |
210 | #endif | 236 | * the handler, but does not clobber them at least in the |
211 | 237 | * normal case. | |
212 | /* | 238 | */ |
213 | * Reload fs and gs if they have changed in the signal | 239 | RELOAD_SEG(gs); |
214 | * handler. This does not handle long fs/gs base changes in | 240 | RELOAD_SEG(fs); |
215 | * the handler, but does not clobber them at least in the | 241 | RELOAD_SEG(ds); |
216 | * normal case. | 242 | RELOAD_SEG(es); |
217 | */ | 243 | |
218 | err |= __get_user(gs, &sc->gs); | 244 | COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); |
219 | gs |= 3; | 245 | COPY(dx); COPY(cx); COPY(ip); |
220 | savesegment(gs, oldgs); | 246 | /* Don't touch extended registers */ |
221 | if (gs != oldgs) | 247 | |
222 | load_gs_index(gs); | 248 | COPY_SEG_CPL3(cs); |
223 | 249 | COPY_SEG_CPL3(ss); | |
224 | RELOAD_SEG(fs); | 250 | |
225 | RELOAD_SEG(ds); | 251 | get_user_ex(tmpflags, &sc->flags); |
226 | RELOAD_SEG(es); | 252 | regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); |
227 | 253 | /* disable syscall checks */ | |
228 | COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); | 254 | regs->orig_ax = -1; |
229 | COPY(dx); COPY(cx); COPY(ip); | 255 | |
230 | /* Don't touch extended registers */ | 256 | get_user_ex(tmp, &sc->fpstate); |
231 | 257 | buf = compat_ptr(tmp); | |
232 | COPY_SEG_CPL3(cs); | 258 | err |= restore_i387_xstate_ia32(buf); |
233 | COPY_SEG_CPL3(ss); | 259 | |
234 | 260 | get_user_ex(*pax, &sc->ax); | |
235 | err |= __get_user(tmpflags, &sc->flags); | 261 | } get_user_catch(err); |
236 | regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); | 262 | |
237 | /* disable syscall checks */ | ||
238 | regs->orig_ax = -1; | ||
239 | |||
240 | err |= __get_user(tmp, &sc->fpstate); | ||
241 | buf = compat_ptr(tmp); | ||
242 | err |= restore_i387_xstate_ia32(buf); | ||
243 | |||
244 | err |= __get_user(*pax, &sc->ax); | ||
245 | return err; | 263 | return err; |
246 | } | 264 | } |
247 | 265 | ||
@@ -317,38 +335,36 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc, | |||
317 | void __user *fpstate, | 335 | void __user *fpstate, |
318 | struct pt_regs *regs, unsigned int mask) | 336 | struct pt_regs *regs, unsigned int mask) |
319 | { | 337 | { |
320 | int tmp, err = 0; | 338 | int err = 0; |
321 | 339 | ||
322 | savesegment(gs, tmp); | 340 | put_user_try { |
323 | err |= __put_user(tmp, (unsigned int __user *)&sc->gs); | 341 | put_user_ex(get_user_seg(gs), (unsigned int __user *)&sc->gs); |
324 | savesegment(fs, tmp); | 342 | put_user_ex(get_user_seg(fs), (unsigned int __user *)&sc->fs); |
325 | err |= __put_user(tmp, (unsigned int __user *)&sc->fs); | 343 | put_user_ex(get_user_seg(ds), (unsigned int __user *)&sc->ds); |
326 | savesegment(ds, tmp); | 344 | put_user_ex(get_user_seg(es), (unsigned int __user *)&sc->es); |
327 | err |= __put_user(tmp, (unsigned int __user *)&sc->ds); | 345 | |
328 | savesegment(es, tmp); | 346 | put_user_ex(regs->di, &sc->di); |
329 | err |= __put_user(tmp, (unsigned int __user *)&sc->es); | 347 | put_user_ex(regs->si, &sc->si); |
330 | 348 | put_user_ex(regs->bp, &sc->bp); | |
331 | err |= __put_user(regs->di, &sc->di); | 349 | put_user_ex(regs->sp, &sc->sp); |
332 | err |= __put_user(regs->si, &sc->si); | 350 | put_user_ex(regs->bx, &sc->bx); |
333 | err |= __put_user(regs->bp, &sc->bp); | 351 | put_user_ex(regs->dx, &sc->dx); |
334 | err |= __put_user(regs->sp, &sc->sp); | 352 | put_user_ex(regs->cx, &sc->cx); |
335 | err |= __put_user(regs->bx, &sc->bx); | 353 | put_user_ex(regs->ax, &sc->ax); |
336 | err |= __put_user(regs->dx, &sc->dx); | 354 | put_user_ex(current->thread.trap_no, &sc->trapno); |
337 | err |= __put_user(regs->cx, &sc->cx); | 355 | put_user_ex(current->thread.error_code, &sc->err); |
338 | err |= __put_user(regs->ax, &sc->ax); | 356 | put_user_ex(regs->ip, &sc->ip); |
339 | err |= __put_user(current->thread.trap_no, &sc->trapno); | 357 | put_user_ex(regs->cs, (unsigned int __user *)&sc->cs); |
340 | err |= __put_user(current->thread.error_code, &sc->err); | 358 | put_user_ex(regs->flags, &sc->flags); |
341 | err |= __put_user(regs->ip, &sc->ip); | 359 | put_user_ex(regs->sp, &sc->sp_at_signal); |
342 | err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs); | 360 | put_user_ex(regs->ss, (unsigned int __user *)&sc->ss); |
343 | err |= __put_user(regs->flags, &sc->flags); | 361 | |
344 | err |= __put_user(regs->sp, &sc->sp_at_signal); | 362 | put_user_ex(ptr_to_compat(fpstate), &sc->fpstate); |
345 | err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss); | 363 | |
346 | 364 | /* non-iBCS2 extensions.. */ | |
347 | err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate); | 365 | put_user_ex(mask, &sc->oldmask); |
348 | 366 | put_user_ex(current->thread.cr2, &sc->cr2); | |
349 | /* non-iBCS2 extensions.. */ | 367 | } put_user_catch(err); |
350 | err |= __put_user(mask, &sc->oldmask); | ||
351 | err |= __put_user(current->thread.cr2, &sc->cr2); | ||
352 | 368 | ||
353 | return err; | 369 | return err; |
354 | } | 370 | } |
@@ -437,13 +453,17 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka, | |||
437 | else | 453 | else |
438 | restorer = &frame->retcode; | 454 | restorer = &frame->retcode; |
439 | } | 455 | } |
440 | err |= __put_user(ptr_to_compat(restorer), &frame->pretcode); | ||
441 | 456 | ||
442 | /* | 457 | put_user_try { |
443 | * These are actually not used anymore, but left because some | 458 | put_user_ex(ptr_to_compat(restorer), &frame->pretcode); |
444 | * gdb versions depend on them as a marker. | 459 | |
445 | */ | 460 | /* |
446 | err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode); | 461 | * These are actually not used anymore, but left because some |
462 | * gdb versions depend on them as a marker. | ||
463 | */ | ||
464 | put_user_ex(*((u64 *)&code), (u64 *)frame->retcode); | ||
465 | } put_user_catch(err); | ||
466 | |||
447 | if (err) | 467 | if (err) |
448 | return -EFAULT; | 468 | return -EFAULT; |
449 | 469 | ||
@@ -462,11 +482,6 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka, | |||
462 | regs->cs = __USER32_CS; | 482 | regs->cs = __USER32_CS; |
463 | regs->ss = __USER32_DS; | 483 | regs->ss = __USER32_DS; |
464 | 484 | ||
465 | #if DEBUG_SIG | ||
466 | printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n", | ||
467 | current->comm, current->pid, frame, regs->ip, frame->pretcode); | ||
468 | #endif | ||
469 | |||
470 | return 0; | 485 | return 0; |
471 | } | 486 | } |
472 | 487 | ||
@@ -496,41 +511,40 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
496 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | 511 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) |
497 | return -EFAULT; | 512 | return -EFAULT; |
498 | 513 | ||
499 | err |= __put_user(sig, &frame->sig); | 514 | put_user_try { |
500 | err |= __put_user(ptr_to_compat(&frame->info), &frame->pinfo); | 515 | put_user_ex(sig, &frame->sig); |
501 | err |= __put_user(ptr_to_compat(&frame->uc), &frame->puc); | 516 | put_user_ex(ptr_to_compat(&frame->info), &frame->pinfo); |
502 | err |= copy_siginfo_to_user32(&frame->info, info); | 517 | put_user_ex(ptr_to_compat(&frame->uc), &frame->puc); |
503 | if (err) | 518 | err |= copy_siginfo_to_user32(&frame->info, info); |
504 | return -EFAULT; | ||
505 | 519 | ||
506 | /* Create the ucontext. */ | 520 | /* Create the ucontext. */ |
507 | if (cpu_has_xsave) | 521 | if (cpu_has_xsave) |
508 | err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags); | 522 | put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags); |
509 | else | 523 | else |
510 | err |= __put_user(0, &frame->uc.uc_flags); | 524 | put_user_ex(0, &frame->uc.uc_flags); |
511 | err |= __put_user(0, &frame->uc.uc_link); | 525 | put_user_ex(0, &frame->uc.uc_link); |
512 | err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); | 526 | put_user_ex(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); |
513 | err |= __put_user(sas_ss_flags(regs->sp), | 527 | put_user_ex(sas_ss_flags(regs->sp), |
514 | &frame->uc.uc_stack.ss_flags); | 528 | &frame->uc.uc_stack.ss_flags); |
515 | err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); | 529 | put_user_ex(current->sas_ss_size, &frame->uc.uc_stack.ss_size); |
516 | err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate, | 530 | err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate, |
517 | regs, set->sig[0]); | 531 | regs, set->sig[0]); |
518 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | 532 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); |
519 | if (err) | 533 | |
520 | return -EFAULT; | 534 | if (ka->sa.sa_flags & SA_RESTORER) |
535 | restorer = ka->sa.sa_restorer; | ||
536 | else | ||
537 | restorer = VDSO32_SYMBOL(current->mm->context.vdso, | ||
538 | rt_sigreturn); | ||
539 | put_user_ex(ptr_to_compat(restorer), &frame->pretcode); | ||
540 | |||
541 | /* | ||
542 | * Not actually used anymore, but left because some gdb | ||
543 | * versions need it. | ||
544 | */ | ||
545 | put_user_ex(*((u64 *)&code), (u64 *)frame->retcode); | ||
546 | } put_user_catch(err); | ||
521 | 547 | ||
522 | if (ka->sa.sa_flags & SA_RESTORER) | ||
523 | restorer = ka->sa.sa_restorer; | ||
524 | else | ||
525 | restorer = VDSO32_SYMBOL(current->mm->context.vdso, | ||
526 | rt_sigreturn); | ||
527 | err |= __put_user(ptr_to_compat(restorer), &frame->pretcode); | ||
528 | |||
529 | /* | ||
530 | * Not actually used anymore, but left because some gdb | ||
531 | * versions need it. | ||
532 | */ | ||
533 | err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode); | ||
534 | if (err) | 548 | if (err) |
535 | return -EFAULT; | 549 | return -EFAULT; |
536 | 550 | ||
@@ -549,10 +563,5 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
549 | regs->cs = __USER32_CS; | 563 | regs->cs = __USER32_CS; |
550 | regs->ss = __USER32_DS; | 564 | regs->ss = __USER32_DS; |
551 | 565 | ||
552 | #if DEBUG_SIG | ||
553 | printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n", | ||
554 | current->comm, current->pid, frame, regs->ip, frame->pretcode); | ||
555 | #endif | ||
556 | |||
557 | return 0; | 566 | return 0; |
558 | } | 567 | } |
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index 8ef8876666b2..db0c803170ab 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S | |||
@@ -112,8 +112,8 @@ ENTRY(ia32_sysenter_target) | |||
112 | CFI_DEF_CFA rsp,0 | 112 | CFI_DEF_CFA rsp,0 |
113 | CFI_REGISTER rsp,rbp | 113 | CFI_REGISTER rsp,rbp |
114 | SWAPGS_UNSAFE_STACK | 114 | SWAPGS_UNSAFE_STACK |
115 | movq %gs:pda_kernelstack, %rsp | 115 | movq PER_CPU_VAR(kernel_stack), %rsp |
116 | addq $(PDA_STACKOFFSET),%rsp | 116 | addq $(KERNEL_STACK_OFFSET),%rsp |
117 | /* | 117 | /* |
118 | * No need to follow this irqs on/off section: the syscall | 118 | * No need to follow this irqs on/off section: the syscall |
119 | * disabled irqs, here we enable it straight after entry: | 119 | * disabled irqs, here we enable it straight after entry: |
@@ -273,13 +273,13 @@ ENDPROC(ia32_sysenter_target) | |||
273 | ENTRY(ia32_cstar_target) | 273 | ENTRY(ia32_cstar_target) |
274 | CFI_STARTPROC32 simple | 274 | CFI_STARTPROC32 simple |
275 | CFI_SIGNAL_FRAME | 275 | CFI_SIGNAL_FRAME |
276 | CFI_DEF_CFA rsp,PDA_STACKOFFSET | 276 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
277 | CFI_REGISTER rip,rcx | 277 | CFI_REGISTER rip,rcx |
278 | /*CFI_REGISTER rflags,r11*/ | 278 | /*CFI_REGISTER rflags,r11*/ |
279 | SWAPGS_UNSAFE_STACK | 279 | SWAPGS_UNSAFE_STACK |
280 | movl %esp,%r8d | 280 | movl %esp,%r8d |
281 | CFI_REGISTER rsp,r8 | 281 | CFI_REGISTER rsp,r8 |
282 | movq %gs:pda_kernelstack,%rsp | 282 | movq PER_CPU_VAR(kernel_stack),%rsp |
283 | /* | 283 | /* |
284 | * No need to follow this irqs on/off section: the syscall | 284 | * No need to follow this irqs on/off section: the syscall |
285 | * disabled irqs and here we enable it straight after entry: | 285 | * disabled irqs and here we enable it straight after entry: |
diff --git a/arch/x86/include/asm/a.out-core.h b/arch/x86/include/asm/a.out-core.h index 3c601f8224be..bb70e397aa84 100644 --- a/arch/x86/include/asm/a.out-core.h +++ b/arch/x86/include/asm/a.out-core.h | |||
@@ -55,7 +55,7 @@ static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump) | |||
55 | dump->regs.ds = (u16)regs->ds; | 55 | dump->regs.ds = (u16)regs->ds; |
56 | dump->regs.es = (u16)regs->es; | 56 | dump->regs.es = (u16)regs->es; |
57 | dump->regs.fs = (u16)regs->fs; | 57 | dump->regs.fs = (u16)regs->fs; |
58 | savesegment(gs, dump->regs.gs); | 58 | dump->regs.gs = get_user_gs(regs); |
59 | dump->regs.orig_ax = regs->orig_ax; | 59 | dump->regs.orig_ax = regs->orig_ax; |
60 | dump->regs.ip = regs->ip; | 60 | dump->regs.ip = regs->ip; |
61 | dump->regs.cs = (u16)regs->cs; | 61 | dump->regs.cs = (u16)regs->cs; |
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index 9830681446ad..4518dc500903 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h | |||
@@ -102,9 +102,6 @@ static inline void disable_acpi(void) | |||
102 | acpi_noirq = 1; | 102 | acpi_noirq = 1; |
103 | } | 103 | } |
104 | 104 | ||
105 | /* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */ | ||
106 | #define FIX_ACPI_PAGES 4 | ||
107 | |||
108 | extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq); | 105 | extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq); |
109 | 106 | ||
110 | static inline void acpi_noirq_set(void) { acpi_noirq = 1; } | 107 | static inline void acpi_noirq_set(void) { acpi_noirq = 1; } |
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index ab1d51a8855e..4ef949c1972e 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h | |||
@@ -1,15 +1,18 @@ | |||
1 | #ifndef _ASM_X86_APIC_H | 1 | #ifndef _ASM_X86_APIC_H |
2 | #define _ASM_X86_APIC_H | 2 | #define _ASM_X86_APIC_H |
3 | 3 | ||
4 | #include <linux/pm.h> | 4 | #include <linux/cpumask.h> |
5 | #include <linux/delay.h> | 5 | #include <linux/delay.h> |
6 | #include <linux/pm.h> | ||
6 | 7 | ||
7 | #include <asm/alternative.h> | 8 | #include <asm/alternative.h> |
8 | #include <asm/fixmap.h> | 9 | #include <asm/cpufeature.h> |
9 | #include <asm/apicdef.h> | ||
10 | #include <asm/processor.h> | 10 | #include <asm/processor.h> |
11 | #include <asm/apicdef.h> | ||
12 | #include <asm/atomic.h> | ||
13 | #include <asm/fixmap.h> | ||
14 | #include <asm/mpspec.h> | ||
11 | #include <asm/system.h> | 15 | #include <asm/system.h> |
12 | #include <asm/cpufeature.h> | ||
13 | #include <asm/msr.h> | 16 | #include <asm/msr.h> |
14 | 17 | ||
15 | #define ARCH_APICTIMER_STOPS_ON_C3 1 | 18 | #define ARCH_APICTIMER_STOPS_ON_C3 1 |
@@ -33,7 +36,13 @@ | |||
33 | } while (0) | 36 | } while (0) |
34 | 37 | ||
35 | 38 | ||
39 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) | ||
36 | extern void generic_apic_probe(void); | 40 | extern void generic_apic_probe(void); |
41 | #else | ||
42 | static inline void generic_apic_probe(void) | ||
43 | { | ||
44 | } | ||
45 | #endif | ||
37 | 46 | ||
38 | #ifdef CONFIG_X86_LOCAL_APIC | 47 | #ifdef CONFIG_X86_LOCAL_APIC |
39 | 48 | ||
@@ -41,6 +50,21 @@ extern unsigned int apic_verbosity; | |||
41 | extern int local_apic_timer_c2_ok; | 50 | extern int local_apic_timer_c2_ok; |
42 | 51 | ||
43 | extern int disable_apic; | 52 | extern int disable_apic; |
53 | |||
54 | #ifdef CONFIG_SMP | ||
55 | extern void __inquire_remote_apic(int apicid); | ||
56 | #else /* CONFIG_SMP */ | ||
57 | static inline void __inquire_remote_apic(int apicid) | ||
58 | { | ||
59 | } | ||
60 | #endif /* CONFIG_SMP */ | ||
61 | |||
62 | static inline void default_inquire_remote_apic(int apicid) | ||
63 | { | ||
64 | if (apic_verbosity >= APIC_DEBUG) | ||
65 | __inquire_remote_apic(apicid); | ||
66 | } | ||
67 | |||
44 | /* | 68 | /* |
45 | * Basic functions accessing APICs. | 69 | * Basic functions accessing APICs. |
46 | */ | 70 | */ |
@@ -51,7 +75,14 @@ extern int disable_apic; | |||
51 | #define setup_secondary_clock setup_secondary_APIC_clock | 75 | #define setup_secondary_clock setup_secondary_APIC_clock |
52 | #endif | 76 | #endif |
53 | 77 | ||
78 | #ifdef CONFIG_X86_VSMP | ||
54 | extern int is_vsmp_box(void); | 79 | extern int is_vsmp_box(void); |
80 | #else | ||
81 | static inline int is_vsmp_box(void) | ||
82 | { | ||
83 | return 0; | ||
84 | } | ||
85 | #endif | ||
55 | extern void xapic_wait_icr_idle(void); | 86 | extern void xapic_wait_icr_idle(void); |
56 | extern u32 safe_xapic_wait_icr_idle(void); | 87 | extern u32 safe_xapic_wait_icr_idle(void); |
57 | extern void xapic_icr_write(u32, u32); | 88 | extern void xapic_icr_write(u32, u32); |
@@ -71,6 +102,12 @@ static inline u32 native_apic_mem_read(u32 reg) | |||
71 | return *((volatile u32 *)(APIC_BASE + reg)); | 102 | return *((volatile u32 *)(APIC_BASE + reg)); |
72 | } | 103 | } |
73 | 104 | ||
105 | extern void native_apic_wait_icr_idle(void); | ||
106 | extern u32 native_safe_apic_wait_icr_idle(void); | ||
107 | extern void native_apic_icr_write(u32 low, u32 id); | ||
108 | extern u64 native_apic_icr_read(void); | ||
109 | |||
110 | #ifdef CONFIG_X86_X2APIC | ||
74 | static inline void native_apic_msr_write(u32 reg, u32 v) | 111 | static inline void native_apic_msr_write(u32 reg, u32 v) |
75 | { | 112 | { |
76 | if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || | 113 | if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || |
@@ -91,8 +128,32 @@ static inline u32 native_apic_msr_read(u32 reg) | |||
91 | return low; | 128 | return low; |
92 | } | 129 | } |
93 | 130 | ||
94 | #ifndef CONFIG_X86_32 | 131 | static inline void native_x2apic_wait_icr_idle(void) |
95 | extern int x2apic; | 132 | { |
133 | /* no need to wait for icr idle in x2apic */ | ||
134 | return; | ||
135 | } | ||
136 | |||
137 | static inline u32 native_safe_x2apic_wait_icr_idle(void) | ||
138 | { | ||
139 | /* no need to wait for icr idle in x2apic */ | ||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | static inline void native_x2apic_icr_write(u32 low, u32 id) | ||
144 | { | ||
145 | wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); | ||
146 | } | ||
147 | |||
148 | static inline u64 native_x2apic_icr_read(void) | ||
149 | { | ||
150 | unsigned long val; | ||
151 | |||
152 | rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); | ||
153 | return val; | ||
154 | } | ||
155 | |||
156 | extern int x2apic, x2apic_phys; | ||
96 | extern void check_x2apic(void); | 157 | extern void check_x2apic(void); |
97 | extern void enable_x2apic(void); | 158 | extern void enable_x2apic(void); |
98 | extern void enable_IR_x2apic(void); | 159 | extern void enable_IR_x2apic(void); |
@@ -110,30 +171,24 @@ static inline int x2apic_enabled(void) | |||
110 | return 0; | 171 | return 0; |
111 | } | 172 | } |
112 | #else | 173 | #else |
113 | #define x2apic_enabled() 0 | 174 | static inline void check_x2apic(void) |
175 | { | ||
176 | } | ||
177 | static inline void enable_x2apic(void) | ||
178 | { | ||
179 | } | ||
180 | static inline void enable_IR_x2apic(void) | ||
181 | { | ||
182 | } | ||
183 | static inline int x2apic_enabled(void) | ||
184 | { | ||
185 | return 0; | ||
186 | } | ||
114 | #endif | 187 | #endif |
115 | 188 | ||
116 | struct apic_ops { | ||
117 | u32 (*read)(u32 reg); | ||
118 | void (*write)(u32 reg, u32 v); | ||
119 | u64 (*icr_read)(void); | ||
120 | void (*icr_write)(u32 low, u32 high); | ||
121 | void (*wait_icr_idle)(void); | ||
122 | u32 (*safe_wait_icr_idle)(void); | ||
123 | }; | ||
124 | |||
125 | extern struct apic_ops *apic_ops; | ||
126 | |||
127 | #define apic_read (apic_ops->read) | ||
128 | #define apic_write (apic_ops->write) | ||
129 | #define apic_icr_read (apic_ops->icr_read) | ||
130 | #define apic_icr_write (apic_ops->icr_write) | ||
131 | #define apic_wait_icr_idle (apic_ops->wait_icr_idle) | ||
132 | #define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle) | ||
133 | |||
134 | extern int get_physical_broadcast(void); | 189 | extern int get_physical_broadcast(void); |
135 | 190 | ||
136 | #ifdef CONFIG_X86_64 | 191 | #ifdef CONFIG_X86_X2APIC |
137 | static inline void ack_x2APIC_irq(void) | 192 | static inline void ack_x2APIC_irq(void) |
138 | { | 193 | { |
139 | /* Docs say use 0 for future compatibility */ | 194 | /* Docs say use 0 for future compatibility */ |
@@ -141,18 +196,6 @@ static inline void ack_x2APIC_irq(void) | |||
141 | } | 196 | } |
142 | #endif | 197 | #endif |
143 | 198 | ||
144 | |||
145 | static inline void ack_APIC_irq(void) | ||
146 | { | ||
147 | /* | ||
148 | * ack_APIC_irq() actually gets compiled as a single instruction | ||
149 | * ... yummie. | ||
150 | */ | ||
151 | |||
152 | /* Docs say use 0 for future compatibility */ | ||
153 | apic_write(APIC_EOI, 0); | ||
154 | } | ||
155 | |||
156 | extern int lapic_get_maxlvt(void); | 199 | extern int lapic_get_maxlvt(void); |
157 | extern void clear_local_APIC(void); | 200 | extern void clear_local_APIC(void); |
158 | extern void connect_bsp_APIC(void); | 201 | extern void connect_bsp_APIC(void); |
@@ -196,4 +239,327 @@ static inline void disable_local_APIC(void) { } | |||
196 | 239 | ||
197 | #endif /* !CONFIG_X86_LOCAL_APIC */ | 240 | #endif /* !CONFIG_X86_LOCAL_APIC */ |
198 | 241 | ||
242 | #ifdef CONFIG_X86_64 | ||
243 | #define SET_APIC_ID(x) (apic->set_apic_id(x)) | ||
244 | #else | ||
245 | |||
246 | #endif | ||
247 | |||
248 | /* | ||
249 | * Copyright 2004 James Cleverdon, IBM. | ||
250 | * Subject to the GNU Public License, v.2 | ||
251 | * | ||
252 | * Generic APIC sub-arch data struct. | ||
253 | * | ||
254 | * Hacked for x86-64 by James Cleverdon from i386 architecture code by | ||
255 | * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and | ||
256 | * James Cleverdon. | ||
257 | */ | ||
258 | struct apic { | ||
259 | char *name; | ||
260 | |||
261 | int (*probe)(void); | ||
262 | int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); | ||
263 | int (*apic_id_registered)(void); | ||
264 | |||
265 | u32 irq_delivery_mode; | ||
266 | u32 irq_dest_mode; | ||
267 | |||
268 | const struct cpumask *(*target_cpus)(void); | ||
269 | |||
270 | int disable_esr; | ||
271 | |||
272 | int dest_logical; | ||
273 | unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid); | ||
274 | unsigned long (*check_apicid_present)(int apicid); | ||
275 | |||
276 | void (*vector_allocation_domain)(int cpu, struct cpumask *retmask); | ||
277 | void (*init_apic_ldr)(void); | ||
278 | |||
279 | physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map); | ||
280 | |||
281 | void (*setup_apic_routing)(void); | ||
282 | int (*multi_timer_check)(int apic, int irq); | ||
283 | int (*apicid_to_node)(int logical_apicid); | ||
284 | int (*cpu_to_logical_apicid)(int cpu); | ||
285 | int (*cpu_present_to_apicid)(int mps_cpu); | ||
286 | physid_mask_t (*apicid_to_cpu_present)(int phys_apicid); | ||
287 | void (*setup_portio_remap)(void); | ||
288 | int (*check_phys_apicid_present)(int boot_cpu_physical_apicid); | ||
289 | void (*enable_apic_mode)(void); | ||
290 | int (*phys_pkg_id)(int cpuid_apic, int index_msb); | ||
291 | |||
292 | /* | ||
293 | * When one of the next two hooks returns 1 the apic | ||
294 | * is switched to this. Essentially they are additional | ||
295 | * probe functions: | ||
296 | */ | ||
297 | int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid); | ||
298 | |||
299 | unsigned int (*get_apic_id)(unsigned long x); | ||
300 | unsigned long (*set_apic_id)(unsigned int id); | ||
301 | unsigned long apic_id_mask; | ||
302 | |||
303 | unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask); | ||
304 | unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, | ||
305 | const struct cpumask *andmask); | ||
306 | |||
307 | /* ipi */ | ||
308 | void (*send_IPI_mask)(const struct cpumask *mask, int vector); | ||
309 | void (*send_IPI_mask_allbutself)(const struct cpumask *mask, | ||
310 | int vector); | ||
311 | void (*send_IPI_allbutself)(int vector); | ||
312 | void (*send_IPI_all)(int vector); | ||
313 | void (*send_IPI_self)(int vector); | ||
314 | |||
315 | /* wakeup_secondary_cpu */ | ||
316 | int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); | ||
317 | |||
318 | int trampoline_phys_low; | ||
319 | int trampoline_phys_high; | ||
320 | |||
321 | void (*wait_for_init_deassert)(atomic_t *deassert); | ||
322 | void (*smp_callin_clear_local_apic)(void); | ||
323 | void (*inquire_remote_apic)(int apicid); | ||
324 | |||
325 | /* apic ops */ | ||
326 | u32 (*read)(u32 reg); | ||
327 | void (*write)(u32 reg, u32 v); | ||
328 | u64 (*icr_read)(void); | ||
329 | void (*icr_write)(u32 low, u32 high); | ||
330 | void (*wait_icr_idle)(void); | ||
331 | u32 (*safe_wait_icr_idle)(void); | ||
332 | }; | ||
333 | |||
334 | /* | ||
335 | * Pointer to the local APIC driver in use on this system (there's | ||
336 | * always just one such driver in use - the kernel decides via an | ||
337 | * early probing process which one it picks - and then sticks to it): | ||
338 | */ | ||
339 | extern struct apic *apic; | ||
340 | |||
341 | /* | ||
342 | * APIC functionality to boot other CPUs - only used on SMP: | ||
343 | */ | ||
344 | #ifdef CONFIG_SMP | ||
345 | extern atomic_t init_deasserted; | ||
346 | extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); | ||
347 | #endif | ||
348 | |||
349 | static inline u32 apic_read(u32 reg) | ||
350 | { | ||
351 | return apic->read(reg); | ||
352 | } | ||
353 | |||
354 | static inline void apic_write(u32 reg, u32 val) | ||
355 | { | ||
356 | apic->write(reg, val); | ||
357 | } | ||
358 | |||
359 | static inline u64 apic_icr_read(void) | ||
360 | { | ||
361 | return apic->icr_read(); | ||
362 | } | ||
363 | |||
364 | static inline void apic_icr_write(u32 low, u32 high) | ||
365 | { | ||
366 | apic->icr_write(low, high); | ||
367 | } | ||
368 | |||
369 | static inline void apic_wait_icr_idle(void) | ||
370 | { | ||
371 | apic->wait_icr_idle(); | ||
372 | } | ||
373 | |||
374 | static inline u32 safe_apic_wait_icr_idle(void) | ||
375 | { | ||
376 | return apic->safe_wait_icr_idle(); | ||
377 | } | ||
378 | |||
379 | |||
380 | static inline void ack_APIC_irq(void) | ||
381 | { | ||
382 | /* | ||
383 | * ack_APIC_irq() actually gets compiled as a single instruction | ||
384 | * ... yummie. | ||
385 | */ | ||
386 | |||
387 | /* Docs say use 0 for future compatibility */ | ||
388 | apic_write(APIC_EOI, 0); | ||
389 | } | ||
390 | |||
391 | static inline unsigned default_get_apic_id(unsigned long x) | ||
392 | { | ||
393 | unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); | ||
394 | |||
395 | if (APIC_XAPIC(ver)) | ||
396 | return (x >> 24) & 0xFF; | ||
397 | else | ||
398 | return (x >> 24) & 0x0F; | ||
399 | } | ||
400 | |||
401 | /* | ||
402 | * Warm reset vector default position: | ||
403 | */ | ||
404 | #define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467 | ||
405 | #define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469 | ||
406 | |||
407 | #ifdef CONFIG_X86_64 | ||
408 | extern struct apic apic_flat; | ||
409 | extern struct apic apic_physflat; | ||
410 | extern struct apic apic_x2apic_cluster; | ||
411 | extern struct apic apic_x2apic_phys; | ||
412 | extern int default_acpi_madt_oem_check(char *, char *); | ||
413 | |||
414 | extern void apic_send_IPI_self(int vector); | ||
415 | |||
416 | extern struct apic apic_x2apic_uv_x; | ||
417 | DECLARE_PER_CPU(int, x2apic_extra_bits); | ||
418 | |||
419 | extern int default_cpu_present_to_apicid(int mps_cpu); | ||
420 | extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid); | ||
421 | #endif | ||
422 | |||
423 | static inline void default_wait_for_init_deassert(atomic_t *deassert) | ||
424 | { | ||
425 | while (!atomic_read(deassert)) | ||
426 | cpu_relax(); | ||
427 | return; | ||
428 | } | ||
429 | |||
430 | extern void generic_bigsmp_probe(void); | ||
431 | |||
432 | |||
433 | #ifdef CONFIG_X86_LOCAL_APIC | ||
434 | |||
435 | #include <asm/smp.h> | ||
436 | |||
437 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
438 | |||
439 | static inline const struct cpumask *default_target_cpus(void) | ||
440 | { | ||
441 | #ifdef CONFIG_SMP | ||
442 | return cpu_online_mask; | ||
443 | #else | ||
444 | return cpumask_of(0); | ||
445 | #endif | ||
446 | } | ||
447 | |||
448 | DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); | ||
449 | |||
450 | |||
451 | static inline unsigned int read_apic_id(void) | ||
452 | { | ||
453 | unsigned int reg; | ||
454 | |||
455 | reg = apic_read(APIC_ID); | ||
456 | |||
457 | return apic->get_apic_id(reg); | ||
458 | } | ||
459 | |||
460 | extern void default_setup_apic_routing(void); | ||
461 | |||
462 | #ifdef CONFIG_X86_32 | ||
463 | /* | ||
464 | * Set up the logical destination ID. | ||
465 | * | ||
466 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
467 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
468 | * document number 292116). So here it goes... | ||
469 | */ | ||
470 | extern void default_init_apic_ldr(void); | ||
471 | |||
472 | static inline int default_apic_id_registered(void) | ||
473 | { | ||
474 | return physid_isset(read_apic_id(), phys_cpu_present_map); | ||
475 | } | ||
476 | |||
477 | static inline unsigned int | ||
478 | default_cpu_mask_to_apicid(const struct cpumask *cpumask) | ||
479 | { | ||
480 | return cpumask_bits(cpumask)[0]; | ||
481 | } | ||
482 | |||
483 | static inline unsigned int | ||
484 | default_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
485 | const struct cpumask *andmask) | ||
486 | { | ||
487 | unsigned long mask1 = cpumask_bits(cpumask)[0]; | ||
488 | unsigned long mask2 = cpumask_bits(andmask)[0]; | ||
489 | unsigned long mask3 = cpumask_bits(cpu_online_mask)[0]; | ||
490 | |||
491 | return (unsigned int)(mask1 & mask2 & mask3); | ||
492 | } | ||
493 | |||
494 | static inline int default_phys_pkg_id(int cpuid_apic, int index_msb) | ||
495 | { | ||
496 | return cpuid_apic >> index_msb; | ||
497 | } | ||
498 | |||
499 | extern int default_apicid_to_node(int logical_apicid); | ||
500 | |||
501 | #endif | ||
502 | |||
503 | static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid) | ||
504 | { | ||
505 | return physid_isset(apicid, bitmap); | ||
506 | } | ||
507 | |||
508 | static inline unsigned long default_check_apicid_present(int bit) | ||
509 | { | ||
510 | return physid_isset(bit, phys_cpu_present_map); | ||
511 | } | ||
512 | |||
513 | static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map) | ||
514 | { | ||
515 | return phys_map; | ||
516 | } | ||
517 | |||
518 | /* Mapping from cpu number to logical apicid */ | ||
519 | static inline int default_cpu_to_logical_apicid(int cpu) | ||
520 | { | ||
521 | return 1 << cpu; | ||
522 | } | ||
523 | |||
524 | static inline int __default_cpu_present_to_apicid(int mps_cpu) | ||
525 | { | ||
526 | if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) | ||
527 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
528 | else | ||
529 | return BAD_APICID; | ||
530 | } | ||
531 | |||
532 | static inline int | ||
533 | __default_check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
534 | { | ||
535 | return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); | ||
536 | } | ||
537 | |||
538 | #ifdef CONFIG_X86_32 | ||
539 | static inline int default_cpu_present_to_apicid(int mps_cpu) | ||
540 | { | ||
541 | return __default_cpu_present_to_apicid(mps_cpu); | ||
542 | } | ||
543 | |||
544 | static inline int | ||
545 | default_check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
546 | { | ||
547 | return __default_check_phys_apicid_present(boot_cpu_physical_apicid); | ||
548 | } | ||
549 | #else | ||
550 | extern int default_cpu_present_to_apicid(int mps_cpu); | ||
551 | extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid); | ||
552 | #endif | ||
553 | |||
554 | static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid) | ||
555 | { | ||
556 | return physid_mask_of_physid(phys_apicid); | ||
557 | } | ||
558 | |||
559 | #endif /* CONFIG_X86_LOCAL_APIC */ | ||
560 | |||
561 | #ifdef CONFIG_X86_32 | ||
562 | extern u8 cpu_2_logical_apicid[NR_CPUS]; | ||
563 | #endif | ||
564 | |||
199 | #endif /* _ASM_X86_APIC_H */ | 565 | #endif /* _ASM_X86_APIC_H */ |
diff --git a/arch/x86/include/asm/apicnum.h b/arch/x86/include/asm/apicnum.h new file mode 100644 index 000000000000..82f613c607ce --- /dev/null +++ b/arch/x86/include/asm/apicnum.h | |||
@@ -0,0 +1,12 @@ | |||
1 | #ifndef _ASM_X86_APICNUM_H | ||
2 | #define _ASM_X86_APICNUM_H | ||
3 | |||
4 | /* define MAX_IO_APICS */ | ||
5 | #ifdef CONFIG_X86_32 | ||
6 | # define MAX_IO_APICS 64 | ||
7 | #else | ||
8 | # define MAX_IO_APICS 128 | ||
9 | # define MAX_LOCAL_APIC 32768 | ||
10 | #endif | ||
11 | |||
12 | #endif /* _ASM_X86_APICNUM_H */ | ||
diff --git a/arch/x86/include/asm/mach-default/apm.h b/arch/x86/include/asm/apm.h index 20370c6db74b..20370c6db74b 100644 --- a/arch/x86/include/asm/mach-default/apm.h +++ b/arch/x86/include/asm/apm.h | |||
diff --git a/arch/x86/include/asm/arch_hooks.h b/arch/x86/include/asm/arch_hooks.h deleted file mode 100644 index cbd4957838a6..000000000000 --- a/arch/x86/include/asm/arch_hooks.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | #ifndef _ASM_X86_ARCH_HOOKS_H | ||
2 | #define _ASM_X86_ARCH_HOOKS_H | ||
3 | |||
4 | #include <linux/interrupt.h> | ||
5 | |||
6 | /* | ||
7 | * linux/include/asm/arch_hooks.h | ||
8 | * | ||
9 | * define the architecture specific hooks | ||
10 | */ | ||
11 | |||
12 | /* these aren't arch hooks, they are generic routines | ||
13 | * that can be used by the hooks */ | ||
14 | extern void init_ISA_irqs(void); | ||
15 | extern irqreturn_t timer_interrupt(int irq, void *dev_id); | ||
16 | |||
17 | /* these are the defined hooks */ | ||
18 | extern void intr_init_hook(void); | ||
19 | extern void pre_intr_init_hook(void); | ||
20 | extern void pre_setup_arch_hook(void); | ||
21 | extern void trap_init_hook(void); | ||
22 | extern void pre_time_init_hook(void); | ||
23 | extern void time_init_hook(void); | ||
24 | extern void mca_nmi_hook(void); | ||
25 | |||
26 | #endif /* _ASM_X86_ARCH_HOOKS_H */ | ||
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h deleted file mode 100644 index d8dd9f537911..000000000000 --- a/arch/x86/include/asm/bigsmp/apic.h +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_APIC_H | ||
2 | #define __ASM_MACH_APIC_H | ||
3 | |||
4 | #define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu)) | ||
5 | #define esr_disable (1) | ||
6 | |||
7 | static inline int apic_id_registered(void) | ||
8 | { | ||
9 | return (1); | ||
10 | } | ||
11 | |||
12 | static inline const cpumask_t *target_cpus(void) | ||
13 | { | ||
14 | #ifdef CONFIG_SMP | ||
15 | return &cpu_online_map; | ||
16 | #else | ||
17 | return &cpumask_of_cpu(0); | ||
18 | #endif | ||
19 | } | ||
20 | |||
21 | #undef APIC_DEST_LOGICAL | ||
22 | #define APIC_DEST_LOGICAL 0 | ||
23 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
24 | #define INT_DELIVERY_MODE (dest_Fixed) | ||
25 | #define INT_DEST_MODE (0) /* phys delivery to target proc */ | ||
26 | #define NO_BALANCE_IRQ (0) | ||
27 | |||
28 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
29 | { | ||
30 | return (0); | ||
31 | } | ||
32 | |||
33 | static inline unsigned long check_apicid_present(int bit) | ||
34 | { | ||
35 | return (1); | ||
36 | } | ||
37 | |||
38 | static inline unsigned long calculate_ldr(int cpu) | ||
39 | { | ||
40 | unsigned long val, id; | ||
41 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
42 | id = xapic_phys_to_log_apicid(cpu); | ||
43 | val |= SET_APIC_LOGICAL_ID(id); | ||
44 | return val; | ||
45 | } | ||
46 | |||
47 | /* | ||
48 | * Set up the logical destination ID. | ||
49 | * | ||
50 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
51 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
52 | * document number 292116). So here it goes... | ||
53 | */ | ||
54 | static inline void init_apic_ldr(void) | ||
55 | { | ||
56 | unsigned long val; | ||
57 | int cpu = smp_processor_id(); | ||
58 | |||
59 | apic_write(APIC_DFR, APIC_DFR_VALUE); | ||
60 | val = calculate_ldr(cpu); | ||
61 | apic_write(APIC_LDR, val); | ||
62 | } | ||
63 | |||
64 | static inline void setup_apic_routing(void) | ||
65 | { | ||
66 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | ||
67 | "Physflat", nr_ioapics); | ||
68 | } | ||
69 | |||
70 | static inline int multi_timer_check(int apic, int irq) | ||
71 | { | ||
72 | return (0); | ||
73 | } | ||
74 | |||
75 | static inline int apicid_to_node(int logical_apicid) | ||
76 | { | ||
77 | return apicid_2_node[hard_smp_processor_id()]; | ||
78 | } | ||
79 | |||
80 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
81 | { | ||
82 | if (mps_cpu < nr_cpu_ids) | ||
83 | return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
84 | |||
85 | return BAD_APICID; | ||
86 | } | ||
87 | |||
88 | static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) | ||
89 | { | ||
90 | return physid_mask_of_physid(phys_apicid); | ||
91 | } | ||
92 | |||
93 | extern u8 cpu_2_logical_apicid[]; | ||
94 | /* Mapping from cpu number to logical apicid */ | ||
95 | static inline int cpu_to_logical_apicid(int cpu) | ||
96 | { | ||
97 | if (cpu >= nr_cpu_ids) | ||
98 | return BAD_APICID; | ||
99 | return cpu_physical_id(cpu); | ||
100 | } | ||
101 | |||
102 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
103 | { | ||
104 | /* For clustered we don't have a good way to do this yet - hack */ | ||
105 | return physids_promote(0xFFL); | ||
106 | } | ||
107 | |||
108 | static inline void setup_portio_remap(void) | ||
109 | { | ||
110 | } | ||
111 | |||
112 | static inline void enable_apic_mode(void) | ||
113 | { | ||
114 | } | ||
115 | |||
116 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
117 | { | ||
118 | return (1); | ||
119 | } | ||
120 | |||
121 | /* As we are using single CPU as destination, pick only one CPU here */ | ||
122 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
123 | { | ||
124 | int cpu; | ||
125 | int apicid; | ||
126 | |||
127 | cpu = first_cpu(*cpumask); | ||
128 | apicid = cpu_to_logical_apicid(cpu); | ||
129 | return apicid; | ||
130 | } | ||
131 | |||
132 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
133 | const struct cpumask *andmask) | ||
134 | { | ||
135 | int cpu; | ||
136 | |||
137 | /* | ||
138 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
139 | * May as well be the first. | ||
140 | */ | ||
141 | for_each_cpu_and(cpu, cpumask, andmask) | ||
142 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | ||
143 | break; | ||
144 | if (cpu < nr_cpu_ids) | ||
145 | return cpu_to_logical_apicid(cpu); | ||
146 | |||
147 | return BAD_APICID; | ||
148 | } | ||
149 | |||
150 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
151 | { | ||
152 | return cpuid_apic >> index_msb; | ||
153 | } | ||
154 | |||
155 | #endif /* __ASM_MACH_APIC_H */ | ||
diff --git a/arch/x86/include/asm/bigsmp/apicdef.h b/arch/x86/include/asm/bigsmp/apicdef.h deleted file mode 100644 index 392c3f5ef2fe..000000000000 --- a/arch/x86/include/asm/bigsmp/apicdef.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_APICDEF_H | ||
2 | #define __ASM_MACH_APICDEF_H | ||
3 | |||
4 | #define APIC_ID_MASK (0xFF<<24) | ||
5 | |||
6 | static inline unsigned get_apic_id(unsigned long x) | ||
7 | { | ||
8 | return (((x)>>24)&0xFF); | ||
9 | } | ||
10 | |||
11 | #define GET_APIC_ID(x) get_apic_id(x) | ||
12 | |||
13 | #endif | ||
diff --git a/arch/x86/include/asm/bigsmp/ipi.h b/arch/x86/include/asm/bigsmp/ipi.h deleted file mode 100644 index 27fcd01b3ae6..000000000000 --- a/arch/x86/include/asm/bigsmp/ipi.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_IPI_H | ||
2 | #define __ASM_MACH_IPI_H | ||
3 | |||
4 | void send_IPI_mask_sequence(const struct cpumask *mask, int vector); | ||
5 | void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); | ||
6 | |||
7 | static inline void send_IPI_mask(const struct cpumask *mask, int vector) | ||
8 | { | ||
9 | send_IPI_mask_sequence(mask, vector); | ||
10 | } | ||
11 | |||
12 | static inline void send_IPI_allbutself(int vector) | ||
13 | { | ||
14 | send_IPI_mask_allbutself(cpu_online_mask, vector); | ||
15 | } | ||
16 | |||
17 | static inline void send_IPI_all(int vector) | ||
18 | { | ||
19 | send_IPI_mask(cpu_online_mask, vector); | ||
20 | } | ||
21 | |||
22 | #endif /* __ASM_MACH_IPI_H */ | ||
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h index dd61616cb73d..6526cf08b0e4 100644 --- a/arch/x86/include/asm/boot.h +++ b/arch/x86/include/asm/boot.h | |||
@@ -10,17 +10,31 @@ | |||
10 | #define EXTENDED_VGA 0xfffe /* 80x50 mode */ | 10 | #define EXTENDED_VGA 0xfffe /* 80x50 mode */ |
11 | #define ASK_VGA 0xfffd /* ask for it at bootup */ | 11 | #define ASK_VGA 0xfffd /* ask for it at bootup */ |
12 | 12 | ||
13 | #ifdef __KERNEL__ | ||
14 | |||
13 | /* Physical address where kernel should be loaded. */ | 15 | /* Physical address where kernel should be loaded. */ |
14 | #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ | 16 | #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ |
15 | + (CONFIG_PHYSICAL_ALIGN - 1)) \ | 17 | + (CONFIG_PHYSICAL_ALIGN - 1)) \ |
16 | & ~(CONFIG_PHYSICAL_ALIGN - 1)) | 18 | & ~(CONFIG_PHYSICAL_ALIGN - 1)) |
17 | 19 | ||
20 | #ifdef CONFIG_KERNEL_BZIP2 | ||
21 | #define BOOT_HEAP_SIZE 0x400000 | ||
22 | #else /* !CONFIG_KERNEL_BZIP2 */ | ||
23 | |||
18 | #ifdef CONFIG_X86_64 | 24 | #ifdef CONFIG_X86_64 |
19 | #define BOOT_HEAP_SIZE 0x7000 | 25 | #define BOOT_HEAP_SIZE 0x7000 |
20 | #define BOOT_STACK_SIZE 0x4000 | ||
21 | #else | 26 | #else |
22 | #define BOOT_HEAP_SIZE 0x4000 | 27 | #define BOOT_HEAP_SIZE 0x4000 |
28 | #endif | ||
29 | |||
30 | #endif /* !CONFIG_KERNEL_BZIP2 */ | ||
31 | |||
32 | #ifdef CONFIG_X86_64 | ||
33 | #define BOOT_STACK_SIZE 0x4000 | ||
34 | #else | ||
23 | #define BOOT_STACK_SIZE 0x1000 | 35 | #define BOOT_STACK_SIZE 0x1000 |
24 | #endif | 36 | #endif |
25 | 37 | ||
38 | #endif /* __KERNEL__ */ | ||
39 | |||
26 | #endif /* _ASM_X86_BOOT_H */ | 40 | #endif /* _ASM_X86_BOOT_H */ |
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h index 2f8466540fb5..5b301b7ff5f4 100644 --- a/arch/x86/include/asm/cacheflush.h +++ b/arch/x86/include/asm/cacheflush.h | |||
@@ -5,24 +5,43 @@ | |||
5 | #include <linux/mm.h> | 5 | #include <linux/mm.h> |
6 | 6 | ||
7 | /* Caches aren't brain-dead on the intel. */ | 7 | /* Caches aren't brain-dead on the intel. */ |
8 | #define flush_cache_all() do { } while (0) | 8 | static inline void flush_cache_all(void) { } |
9 | #define flush_cache_mm(mm) do { } while (0) | 9 | static inline void flush_cache_mm(struct mm_struct *mm) { } |
10 | #define flush_cache_dup_mm(mm) do { } while (0) | 10 | static inline void flush_cache_dup_mm(struct mm_struct *mm) { } |
11 | #define flush_cache_range(vma, start, end) do { } while (0) | 11 | static inline void flush_cache_range(struct vm_area_struct *vma, |
12 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | 12 | unsigned long start, unsigned long end) { } |
13 | #define flush_dcache_page(page) do { } while (0) | 13 | static inline void flush_cache_page(struct vm_area_struct *vma, |
14 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | 14 | unsigned long vmaddr, unsigned long pfn) { } |
15 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | 15 | static inline void flush_dcache_page(struct page *page) { } |
16 | #define flush_icache_range(start, end) do { } while (0) | 16 | static inline void flush_dcache_mmap_lock(struct address_space *mapping) { } |
17 | #define flush_icache_page(vma, pg) do { } while (0) | 17 | static inline void flush_dcache_mmap_unlock(struct address_space *mapping) { } |
18 | #define flush_icache_user_range(vma, pg, adr, len) do { } while (0) | 18 | static inline void flush_icache_range(unsigned long start, |
19 | #define flush_cache_vmap(start, end) do { } while (0) | 19 | unsigned long end) { } |
20 | #define flush_cache_vunmap(start, end) do { } while (0) | 20 | static inline void flush_icache_page(struct vm_area_struct *vma, |
21 | struct page *page) { } | ||
22 | static inline void flush_icache_user_range(struct vm_area_struct *vma, | ||
23 | struct page *page, | ||
24 | unsigned long addr, | ||
25 | unsigned long len) { } | ||
26 | static inline void flush_cache_vmap(unsigned long start, unsigned long end) { } | ||
27 | static inline void flush_cache_vunmap(unsigned long start, | ||
28 | unsigned long end) { } | ||
21 | 29 | ||
22 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | 30 | static inline void copy_to_user_page(struct vm_area_struct *vma, |
23 | memcpy((dst), (src), (len)) | 31 | struct page *page, unsigned long vaddr, |
24 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | 32 | void *dst, const void *src, |
25 | memcpy((dst), (src), (len)) | 33 | unsigned long len) |
34 | { | ||
35 | memcpy(dst, src, len); | ||
36 | } | ||
37 | |||
38 | static inline void copy_from_user_page(struct vm_area_struct *vma, | ||
39 | struct page *page, unsigned long vaddr, | ||
40 | void *dst, const void *src, | ||
41 | unsigned long len) | ||
42 | { | ||
43 | memcpy(dst, src, len); | ||
44 | } | ||
26 | 45 | ||
27 | #define PG_non_WB PG_arch_1 | 46 | #define PG_non_WB PG_arch_1 |
28 | PAGEFLAG(NonWB, non_WB) | 47 | PAGEFLAG(NonWB, non_WB) |
diff --git a/arch/x86/include/asm/calling.h b/arch/x86/include/asm/calling.h index 2bc162e0ec6e..0e63c9a2a8d0 100644 --- a/arch/x86/include/asm/calling.h +++ b/arch/x86/include/asm/calling.h | |||
@@ -1,5 +1,55 @@ | |||
1 | /* | 1 | /* |
2 | * Some macros to handle stack frames in assembly. | 2 | |
3 | x86 function call convention, 64-bit: | ||
4 | ------------------------------------- | ||
5 | arguments | callee-saved | extra caller-saved | return | ||
6 | [callee-clobbered] | | [callee-clobbered] | | ||
7 | --------------------------------------------------------------------------- | ||
8 | rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx [**] | ||
9 | |||
10 | ( rsp is obviously invariant across normal function calls. (gcc can 'merge' | ||
11 | functions when it sees tail-call optimization possibilities) rflags is | ||
12 | clobbered. Leftover arguments are passed over the stack frame.) | ||
13 | |||
14 | [*] In the frame-pointers case rbp is fixed to the stack frame. | ||
15 | |||
16 | [**] for struct return values wider than 64 bits the return convention is a | ||
17 | bit more complex: up to 128 bits width we return small structures | ||
18 | straight in rax, rdx. For structures larger than that (3 words or | ||
19 | larger) the caller puts a pointer to an on-stack return struct | ||
20 | [allocated in the caller's stack frame] into the first argument - i.e. | ||
21 | into rdi. All other arguments shift up by one in this case. | ||
22 | Fortunately this case is rare in the kernel. | ||
23 | |||
24 | For 32-bit we have the following conventions - kernel is built with | ||
25 | -mregparm=3 and -freg-struct-return: | ||
26 | |||
27 | x86 function calling convention, 32-bit: | ||
28 | ---------------------------------------- | ||
29 | arguments | callee-saved | extra caller-saved | return | ||
30 | [callee-clobbered] | | [callee-clobbered] | | ||
31 | ------------------------------------------------------------------------- | ||
32 | eax edx ecx | ebx edi esi ebp [*] | <none> | eax, edx [**] | ||
33 | |||
34 | ( here too esp is obviously invariant across normal function calls. eflags | ||
35 | is clobbered. Leftover arguments are passed over the stack frame. ) | ||
36 | |||
37 | [*] In the frame-pointers case ebp is fixed to the stack frame. | ||
38 | |||
39 | [**] We build with -freg-struct-return, which on 32-bit means similar | ||
40 | semantics as on 64-bit: edx can be used for a second return value | ||
41 | (i.e. covering integer and structure sizes up to 64 bits) - after that | ||
42 | it gets more complex and more expensive: 3-word or larger struct returns | ||
43 | get done in the caller's frame and the pointer to the return struct goes | ||
44 | into regparm0, i.e. eax - the other arguments shift up and the | ||
45 | function's register parameters degenerate to regparm=2 in essence. | ||
46 | |||
47 | */ | ||
48 | |||
49 | |||
50 | /* | ||
51 | * 64-bit system call stack frame layout defines and helpers, | ||
52 | * for assembly code: | ||
3 | */ | 53 | */ |
4 | 54 | ||
5 | #define R15 0 | 55 | #define R15 0 |
@@ -9,7 +59,7 @@ | |||
9 | #define RBP 32 | 59 | #define RBP 32 |
10 | #define RBX 40 | 60 | #define RBX 40 |
11 | 61 | ||
12 | /* arguments: interrupts/non tracing syscalls only save upto here*/ | 62 | /* arguments: interrupts/non tracing syscalls only save up to here: */ |
13 | #define R11 48 | 63 | #define R11 48 |
14 | #define R10 56 | 64 | #define R10 56 |
15 | #define R9 64 | 65 | #define R9 64 |
@@ -22,7 +72,7 @@ | |||
22 | #define ORIG_RAX 120 /* + error_code */ | 72 | #define ORIG_RAX 120 /* + error_code */ |
23 | /* end of arguments */ | 73 | /* end of arguments */ |
24 | 74 | ||
25 | /* cpu exception frame or undefined in case of fast syscall. */ | 75 | /* cpu exception frame or undefined in case of fast syscall: */ |
26 | #define RIP 128 | 76 | #define RIP 128 |
27 | #define CS 136 | 77 | #define CS 136 |
28 | #define EFLAGS 144 | 78 | #define EFLAGS 144 |
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index bae482df6039..b185091bf19c 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h | |||
@@ -7,6 +7,20 @@ | |||
7 | #include <linux/nodemask.h> | 7 | #include <linux/nodemask.h> |
8 | #include <linux/percpu.h> | 8 | #include <linux/percpu.h> |
9 | 9 | ||
10 | #ifdef CONFIG_SMP | ||
11 | |||
12 | extern void prefill_possible_map(void); | ||
13 | |||
14 | #else /* CONFIG_SMP */ | ||
15 | |||
16 | static inline void prefill_possible_map(void) {} | ||
17 | |||
18 | #define cpu_physical_id(cpu) boot_cpu_physical_apicid | ||
19 | #define safe_smp_processor_id() 0 | ||
20 | #define stack_smp_processor_id() 0 | ||
21 | |||
22 | #endif /* CONFIG_SMP */ | ||
23 | |||
10 | struct x86_cpu { | 24 | struct x86_cpu { |
11 | struct cpu cpu; | 25 | struct cpu cpu; |
12 | }; | 26 | }; |
@@ -17,4 +31,7 @@ extern void arch_unregister_cpu(int); | |||
17 | #endif | 31 | #endif |
18 | 32 | ||
19 | DECLARE_PER_CPU(int, cpu_state); | 33 | DECLARE_PER_CPU(int, cpu_state); |
34 | |||
35 | extern unsigned int boot_cpu_id; | ||
36 | |||
20 | #endif /* _ASM_X86_CPU_H */ | 37 | #endif /* _ASM_X86_CPU_H */ |
diff --git a/arch/x86/include/asm/cpumask.h b/arch/x86/include/asm/cpumask.h new file mode 100644 index 000000000000..a7f3c75f8ad7 --- /dev/null +++ b/arch/x86/include/asm/cpumask.h | |||
@@ -0,0 +1,32 @@ | |||
1 | #ifndef _ASM_X86_CPUMASK_H | ||
2 | #define _ASM_X86_CPUMASK_H | ||
3 | #ifndef __ASSEMBLY__ | ||
4 | #include <linux/cpumask.h> | ||
5 | |||
6 | #ifdef CONFIG_X86_64 | ||
7 | |||
8 | extern cpumask_var_t cpu_callin_mask; | ||
9 | extern cpumask_var_t cpu_callout_mask; | ||
10 | extern cpumask_var_t cpu_initialized_mask; | ||
11 | extern cpumask_var_t cpu_sibling_setup_mask; | ||
12 | |||
13 | extern void setup_cpu_local_masks(void); | ||
14 | |||
15 | #else /* CONFIG_X86_32 */ | ||
16 | |||
17 | extern cpumask_t cpu_callin_map; | ||
18 | extern cpumask_t cpu_callout_map; | ||
19 | extern cpumask_t cpu_initialized; | ||
20 | extern cpumask_t cpu_sibling_setup_map; | ||
21 | |||
22 | #define cpu_callin_mask ((struct cpumask *)&cpu_callin_map) | ||
23 | #define cpu_callout_mask ((struct cpumask *)&cpu_callout_map) | ||
24 | #define cpu_initialized_mask ((struct cpumask *)&cpu_initialized) | ||
25 | #define cpu_sibling_setup_mask ((struct cpumask *)&cpu_sibling_setup_map) | ||
26 | |||
27 | static inline void setup_cpu_local_masks(void) { } | ||
28 | |||
29 | #endif /* CONFIG_X86_32 */ | ||
30 | |||
31 | #endif /* __ASSEMBLY__ */ | ||
32 | #endif /* _ASM_X86_CPUMASK_H */ | ||
diff --git a/arch/x86/include/asm/current.h b/arch/x86/include/asm/current.h index 0930b4f8d672..c68c361697e1 100644 --- a/arch/x86/include/asm/current.h +++ b/arch/x86/include/asm/current.h | |||
@@ -1,39 +1,21 @@ | |||
1 | #ifndef _ASM_X86_CURRENT_H | 1 | #ifndef _ASM_X86_CURRENT_H |
2 | #define _ASM_X86_CURRENT_H | 2 | #define _ASM_X86_CURRENT_H |
3 | 3 | ||
4 | #ifdef CONFIG_X86_32 | ||
5 | #include <linux/compiler.h> | 4 | #include <linux/compiler.h> |
6 | #include <asm/percpu.h> | 5 | #include <asm/percpu.h> |
7 | 6 | ||
7 | #ifndef __ASSEMBLY__ | ||
8 | struct task_struct; | 8 | struct task_struct; |
9 | 9 | ||
10 | DECLARE_PER_CPU(struct task_struct *, current_task); | 10 | DECLARE_PER_CPU(struct task_struct *, current_task); |
11 | static __always_inline struct task_struct *get_current(void) | ||
12 | { | ||
13 | return x86_read_percpu(current_task); | ||
14 | } | ||
15 | |||
16 | #else /* X86_32 */ | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | #include <asm/pda.h> | ||
20 | |||
21 | struct task_struct; | ||
22 | 11 | ||
23 | static __always_inline struct task_struct *get_current(void) | 12 | static __always_inline struct task_struct *get_current(void) |
24 | { | 13 | { |
25 | return read_pda(pcurrent); | 14 | return percpu_read(current_task); |
26 | } | 15 | } |
27 | 16 | ||
28 | #else /* __ASSEMBLY__ */ | 17 | #define current get_current() |
29 | |||
30 | #include <asm/asm-offsets.h> | ||
31 | #define GET_CURRENT(reg) movq %gs:(pda_pcurrent),reg | ||
32 | 18 | ||
33 | #endif /* __ASSEMBLY__ */ | 19 | #endif /* __ASSEMBLY__ */ |
34 | 20 | ||
35 | #endif /* X86_32 */ | ||
36 | |||
37 | #define current get_current() | ||
38 | |||
39 | #endif /* _ASM_X86_CURRENT_H */ | 21 | #endif /* _ASM_X86_CURRENT_H */ |
diff --git a/arch/x86/include/asm/mach-default/do_timer.h b/arch/x86/include/asm/do_timer.h index 23ecda0b28a0..23ecda0b28a0 100644 --- a/arch/x86/include/asm/mach-default/do_timer.h +++ b/arch/x86/include/asm/do_timer.h | |||
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h index f51a3ddde01a..83c1bc8d2e8a 100644 --- a/arch/x86/include/asm/elf.h +++ b/arch/x86/include/asm/elf.h | |||
@@ -112,7 +112,7 @@ extern unsigned int vdso_enabled; | |||
112 | * now struct_user_regs, they are different) | 112 | * now struct_user_regs, they are different) |
113 | */ | 113 | */ |
114 | 114 | ||
115 | #define ELF_CORE_COPY_REGS(pr_reg, regs) \ | 115 | #define ELF_CORE_COPY_REGS_COMMON(pr_reg, regs) \ |
116 | do { \ | 116 | do { \ |
117 | pr_reg[0] = regs->bx; \ | 117 | pr_reg[0] = regs->bx; \ |
118 | pr_reg[1] = regs->cx; \ | 118 | pr_reg[1] = regs->cx; \ |
@@ -124,7 +124,6 @@ do { \ | |||
124 | pr_reg[7] = regs->ds & 0xffff; \ | 124 | pr_reg[7] = regs->ds & 0xffff; \ |
125 | pr_reg[8] = regs->es & 0xffff; \ | 125 | pr_reg[8] = regs->es & 0xffff; \ |
126 | pr_reg[9] = regs->fs & 0xffff; \ | 126 | pr_reg[9] = regs->fs & 0xffff; \ |
127 | savesegment(gs, pr_reg[10]); \ | ||
128 | pr_reg[11] = regs->orig_ax; \ | 127 | pr_reg[11] = regs->orig_ax; \ |
129 | pr_reg[12] = regs->ip; \ | 128 | pr_reg[12] = regs->ip; \ |
130 | pr_reg[13] = regs->cs & 0xffff; \ | 129 | pr_reg[13] = regs->cs & 0xffff; \ |
@@ -133,6 +132,18 @@ do { \ | |||
133 | pr_reg[16] = regs->ss & 0xffff; \ | 132 | pr_reg[16] = regs->ss & 0xffff; \ |
134 | } while (0); | 133 | } while (0); |
135 | 134 | ||
135 | #define ELF_CORE_COPY_REGS(pr_reg, regs) \ | ||
136 | do { \ | ||
137 | ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\ | ||
138 | pr_reg[10] = get_user_gs(regs); \ | ||
139 | } while (0); | ||
140 | |||
141 | #define ELF_CORE_COPY_KERNEL_REGS(pr_reg, regs) \ | ||
142 | do { \ | ||
143 | ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\ | ||
144 | savesegment(gs, pr_reg[10]); \ | ||
145 | } while (0); | ||
146 | |||
136 | #define ELF_PLATFORM (utsname()->machine) | 147 | #define ELF_PLATFORM (utsname()->machine) |
137 | #define set_personality_64bit() do { } while (0) | 148 | #define set_personality_64bit() do { } while (0) |
138 | 149 | ||
diff --git a/arch/x86/include/asm/mach-default/entry_arch.h b/arch/x86/include/asm/entry_arch.h index 6b1add8e31dd..854d538ae857 100644 --- a/arch/x86/include/asm/mach-default/entry_arch.h +++ b/arch/x86/include/asm/entry_arch.h | |||
@@ -9,12 +9,28 @@ | |||
9 | * is no hardware IRQ pin equivalent for them, they are triggered | 9 | * is no hardware IRQ pin equivalent for them, they are triggered |
10 | * through the ICC by us (IPIs) | 10 | * through the ICC by us (IPIs) |
11 | */ | 11 | */ |
12 | #ifdef CONFIG_X86_SMP | 12 | #ifdef CONFIG_SMP |
13 | BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) | 13 | BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) |
14 | BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) | ||
15 | BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) | 14 | BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) |
16 | BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR) | 15 | BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR) |
17 | BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR) | 16 | BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR) |
17 | |||
18 | BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0, | ||
19 | smp_invalidate_interrupt) | ||
20 | BUILD_INTERRUPT3(invalidate_interrupt1,INVALIDATE_TLB_VECTOR_START+1, | ||
21 | smp_invalidate_interrupt) | ||
22 | BUILD_INTERRUPT3(invalidate_interrupt2,INVALIDATE_TLB_VECTOR_START+2, | ||
23 | smp_invalidate_interrupt) | ||
24 | BUILD_INTERRUPT3(invalidate_interrupt3,INVALIDATE_TLB_VECTOR_START+3, | ||
25 | smp_invalidate_interrupt) | ||
26 | BUILD_INTERRUPT3(invalidate_interrupt4,INVALIDATE_TLB_VECTOR_START+4, | ||
27 | smp_invalidate_interrupt) | ||
28 | BUILD_INTERRUPT3(invalidate_interrupt5,INVALIDATE_TLB_VECTOR_START+5, | ||
29 | smp_invalidate_interrupt) | ||
30 | BUILD_INTERRUPT3(invalidate_interrupt6,INVALIDATE_TLB_VECTOR_START+6, | ||
31 | smp_invalidate_interrupt) | ||
32 | BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7, | ||
33 | smp_invalidate_interrupt) | ||
18 | #endif | 34 | #endif |
19 | 35 | ||
20 | /* | 36 | /* |
@@ -25,10 +41,15 @@ BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR) | |||
25 | * a much simpler SMP time architecture: | 41 | * a much simpler SMP time architecture: |
26 | */ | 42 | */ |
27 | #ifdef CONFIG_X86_LOCAL_APIC | 43 | #ifdef CONFIG_X86_LOCAL_APIC |
44 | |||
28 | BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) | 45 | BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) |
29 | BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) | 46 | BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) |
30 | BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) | 47 | BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) |
31 | 48 | ||
49 | #ifdef CONFIG_PERF_COUNTERS | ||
50 | BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR) | ||
51 | #endif | ||
52 | |||
32 | #ifdef CONFIG_X86_MCE_P4THERMAL | 53 | #ifdef CONFIG_X86_MCE_P4THERMAL |
33 | BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR) | 54 | BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR) |
34 | #endif | 55 | #endif |
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h deleted file mode 100644 index c58b9cc74465..000000000000 --- a/arch/x86/include/asm/es7000/apic.h +++ /dev/null | |||
@@ -1,242 +0,0 @@ | |||
1 | #ifndef __ASM_ES7000_APIC_H | ||
2 | #define __ASM_ES7000_APIC_H | ||
3 | |||
4 | #include <linux/gfp.h> | ||
5 | |||
6 | #define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu) | ||
7 | #define esr_disable (1) | ||
8 | |||
9 | static inline int apic_id_registered(void) | ||
10 | { | ||
11 | return (1); | ||
12 | } | ||
13 | |||
14 | static inline const cpumask_t *target_cpus_cluster(void) | ||
15 | { | ||
16 | return &CPU_MASK_ALL; | ||
17 | } | ||
18 | |||
19 | static inline const cpumask_t *target_cpus(void) | ||
20 | { | ||
21 | return &cpumask_of_cpu(smp_processor_id()); | ||
22 | } | ||
23 | |||
24 | #define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER) | ||
25 | #define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio) | ||
26 | #define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */ | ||
27 | #define NO_BALANCE_IRQ_CLUSTER (1) | ||
28 | |||
29 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
30 | #define INT_DELIVERY_MODE (dest_Fixed) | ||
31 | #define INT_DEST_MODE (0) /* phys delivery to target procs */ | ||
32 | #define NO_BALANCE_IRQ (0) | ||
33 | #undef APIC_DEST_LOGICAL | ||
34 | #define APIC_DEST_LOGICAL 0x0 | ||
35 | |||
36 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
37 | { | ||
38 | return 0; | ||
39 | } | ||
40 | static inline unsigned long check_apicid_present(int bit) | ||
41 | { | ||
42 | return physid_isset(bit, phys_cpu_present_map); | ||
43 | } | ||
44 | |||
45 | #define apicid_cluster(apicid) (apicid & 0xF0) | ||
46 | |||
47 | static inline unsigned long calculate_ldr(int cpu) | ||
48 | { | ||
49 | unsigned long id; | ||
50 | id = xapic_phys_to_log_apicid(cpu); | ||
51 | return (SET_APIC_LOGICAL_ID(id)); | ||
52 | } | ||
53 | |||
54 | /* | ||
55 | * Set up the logical destination ID. | ||
56 | * | ||
57 | * Intel recommends to set DFR, LdR and TPR before enabling | ||
58 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
59 | * document number 292116). So here it goes... | ||
60 | */ | ||
61 | static inline void init_apic_ldr_cluster(void) | ||
62 | { | ||
63 | unsigned long val; | ||
64 | int cpu = smp_processor_id(); | ||
65 | |||
66 | apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER); | ||
67 | val = calculate_ldr(cpu); | ||
68 | apic_write(APIC_LDR, val); | ||
69 | } | ||
70 | |||
71 | static inline void init_apic_ldr(void) | ||
72 | { | ||
73 | unsigned long val; | ||
74 | int cpu = smp_processor_id(); | ||
75 | |||
76 | apic_write(APIC_DFR, APIC_DFR_VALUE); | ||
77 | val = calculate_ldr(cpu); | ||
78 | apic_write(APIC_LDR, val); | ||
79 | } | ||
80 | |||
81 | extern int apic_version [MAX_APICS]; | ||
82 | static inline void setup_apic_routing(void) | ||
83 | { | ||
84 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | ||
85 | printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", | ||
86 | (apic_version[apic] == 0x14) ? | ||
87 | "Physical Cluster" : "Logical Cluster", | ||
88 | nr_ioapics, cpus_addr(*target_cpus())[0]); | ||
89 | } | ||
90 | |||
91 | static inline int multi_timer_check(int apic, int irq) | ||
92 | { | ||
93 | return 0; | ||
94 | } | ||
95 | |||
96 | static inline int apicid_to_node(int logical_apicid) | ||
97 | { | ||
98 | return 0; | ||
99 | } | ||
100 | |||
101 | |||
102 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
103 | { | ||
104 | if (!mps_cpu) | ||
105 | return boot_cpu_physical_apicid; | ||
106 | else if (mps_cpu < nr_cpu_ids) | ||
107 | return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
108 | else | ||
109 | return BAD_APICID; | ||
110 | } | ||
111 | |||
112 | static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) | ||
113 | { | ||
114 | static int id = 0; | ||
115 | physid_mask_t mask; | ||
116 | mask = physid_mask_of_physid(id); | ||
117 | ++id; | ||
118 | return mask; | ||
119 | } | ||
120 | |||
121 | extern u8 cpu_2_logical_apicid[]; | ||
122 | /* Mapping from cpu number to logical apicid */ | ||
123 | static inline int cpu_to_logical_apicid(int cpu) | ||
124 | { | ||
125 | #ifdef CONFIG_SMP | ||
126 | if (cpu >= nr_cpu_ids) | ||
127 | return BAD_APICID; | ||
128 | return (int)cpu_2_logical_apicid[cpu]; | ||
129 | #else | ||
130 | return logical_smp_processor_id(); | ||
131 | #endif | ||
132 | } | ||
133 | |||
134 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
135 | { | ||
136 | /* For clustered we don't have a good way to do this yet - hack */ | ||
137 | return physids_promote(0xff); | ||
138 | } | ||
139 | |||
140 | |||
141 | static inline void setup_portio_remap(void) | ||
142 | { | ||
143 | } | ||
144 | |||
145 | extern unsigned int boot_cpu_physical_apicid; | ||
146 | static inline int check_phys_apicid_present(int cpu_physical_apicid) | ||
147 | { | ||
148 | boot_cpu_physical_apicid = read_apic_id(); | ||
149 | return (1); | ||
150 | } | ||
151 | |||
152 | static inline unsigned int | ||
153 | cpu_mask_to_apicid_cluster(const struct cpumask *cpumask) | ||
154 | { | ||
155 | int num_bits_set; | ||
156 | int cpus_found = 0; | ||
157 | int cpu; | ||
158 | int apicid; | ||
159 | |||
160 | num_bits_set = cpumask_weight(cpumask); | ||
161 | /* Return id to all */ | ||
162 | if (num_bits_set == nr_cpu_ids) | ||
163 | return 0xFF; | ||
164 | /* | ||
165 | * The cpus in the mask must all be on the apic cluster. If are not | ||
166 | * on the same apicid cluster return default value of TARGET_CPUS. | ||
167 | */ | ||
168 | cpu = cpumask_first(cpumask); | ||
169 | apicid = cpu_to_logical_apicid(cpu); | ||
170 | while (cpus_found < num_bits_set) { | ||
171 | if (cpumask_test_cpu(cpu, cpumask)) { | ||
172 | int new_apicid = cpu_to_logical_apicid(cpu); | ||
173 | if (apicid_cluster(apicid) != | ||
174 | apicid_cluster(new_apicid)){ | ||
175 | printk ("%s: Not a valid mask!\n", __func__); | ||
176 | return 0xFF; | ||
177 | } | ||
178 | apicid = new_apicid; | ||
179 | cpus_found++; | ||
180 | } | ||
181 | cpu++; | ||
182 | } | ||
183 | return apicid; | ||
184 | } | ||
185 | |||
186 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
187 | { | ||
188 | int num_bits_set; | ||
189 | int cpus_found = 0; | ||
190 | int cpu; | ||
191 | int apicid; | ||
192 | |||
193 | num_bits_set = cpus_weight(*cpumask); | ||
194 | /* Return id to all */ | ||
195 | if (num_bits_set == nr_cpu_ids) | ||
196 | return cpu_to_logical_apicid(0); | ||
197 | /* | ||
198 | * The cpus in the mask must all be on the apic cluster. If are not | ||
199 | * on the same apicid cluster return default value of TARGET_CPUS. | ||
200 | */ | ||
201 | cpu = first_cpu(*cpumask); | ||
202 | apicid = cpu_to_logical_apicid(cpu); | ||
203 | while (cpus_found < num_bits_set) { | ||
204 | if (cpu_isset(cpu, *cpumask)) { | ||
205 | int new_apicid = cpu_to_logical_apicid(cpu); | ||
206 | if (apicid_cluster(apicid) != | ||
207 | apicid_cluster(new_apicid)){ | ||
208 | printk ("%s: Not a valid mask!\n", __func__); | ||
209 | return cpu_to_logical_apicid(0); | ||
210 | } | ||
211 | apicid = new_apicid; | ||
212 | cpus_found++; | ||
213 | } | ||
214 | cpu++; | ||
215 | } | ||
216 | return apicid; | ||
217 | } | ||
218 | |||
219 | |||
220 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask, | ||
221 | const struct cpumask *andmask) | ||
222 | { | ||
223 | int apicid = cpu_to_logical_apicid(0); | ||
224 | cpumask_var_t cpumask; | ||
225 | |||
226 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | ||
227 | return apicid; | ||
228 | |||
229 | cpumask_and(cpumask, inmask, andmask); | ||
230 | cpumask_and(cpumask, cpumask, cpu_online_mask); | ||
231 | apicid = cpu_mask_to_apicid(cpumask); | ||
232 | |||
233 | free_cpumask_var(cpumask); | ||
234 | return apicid; | ||
235 | } | ||
236 | |||
237 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
238 | { | ||
239 | return cpuid_apic >> index_msb; | ||
240 | } | ||
241 | |||
242 | #endif /* __ASM_ES7000_APIC_H */ | ||
diff --git a/arch/x86/include/asm/es7000/apicdef.h b/arch/x86/include/asm/es7000/apicdef.h deleted file mode 100644 index 8b234a3cb851..000000000000 --- a/arch/x86/include/asm/es7000/apicdef.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_ES7000_APICDEF_H | ||
2 | #define __ASM_ES7000_APICDEF_H | ||
3 | |||
4 | #define APIC_ID_MASK (0xFF<<24) | ||
5 | |||
6 | static inline unsigned get_apic_id(unsigned long x) | ||
7 | { | ||
8 | return (((x)>>24)&0xFF); | ||
9 | } | ||
10 | |||
11 | #define GET_APIC_ID(x) get_apic_id(x) | ||
12 | |||
13 | #endif | ||
diff --git a/arch/x86/include/asm/es7000/ipi.h b/arch/x86/include/asm/es7000/ipi.h deleted file mode 100644 index 7e8ed24d4b8a..000000000000 --- a/arch/x86/include/asm/es7000/ipi.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | #ifndef __ASM_ES7000_IPI_H | ||
2 | #define __ASM_ES7000_IPI_H | ||
3 | |||
4 | void send_IPI_mask_sequence(const struct cpumask *mask, int vector); | ||
5 | void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); | ||
6 | |||
7 | static inline void send_IPI_mask(const struct cpumask *mask, int vector) | ||
8 | { | ||
9 | send_IPI_mask_sequence(mask, vector); | ||
10 | } | ||
11 | |||
12 | static inline void send_IPI_allbutself(int vector) | ||
13 | { | ||
14 | send_IPI_mask_allbutself(cpu_online_mask, vector); | ||
15 | } | ||
16 | |||
17 | static inline void send_IPI_all(int vector) | ||
18 | { | ||
19 | send_IPI_mask(cpu_online_mask, vector); | ||
20 | } | ||
21 | |||
22 | #endif /* __ASM_ES7000_IPI_H */ | ||
diff --git a/arch/x86/include/asm/es7000/mpparse.h b/arch/x86/include/asm/es7000/mpparse.h deleted file mode 100644 index c1629b090ec2..000000000000 --- a/arch/x86/include/asm/es7000/mpparse.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | #ifndef __ASM_ES7000_MPPARSE_H | ||
2 | #define __ASM_ES7000_MPPARSE_H | ||
3 | |||
4 | #include <linux/acpi.h> | ||
5 | |||
6 | extern int parse_unisys_oem (char *oemptr); | ||
7 | extern int find_unisys_acpi_oem_table(unsigned long *oem_addr); | ||
8 | extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr); | ||
9 | extern void setup_unisys(void); | ||
10 | |||
11 | #ifndef CONFIG_X86_GENERICARCH | ||
12 | extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id); | ||
13 | extern int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid); | ||
14 | #endif | ||
15 | |||
16 | #ifdef CONFIG_ACPI | ||
17 | |||
18 | static inline int es7000_check_dsdt(void) | ||
19 | { | ||
20 | struct acpi_table_header header; | ||
21 | |||
22 | if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) && | ||
23 | !strncmp(header.oem_id, "UNISYS", 6)) | ||
24 | return 1; | ||
25 | return 0; | ||
26 | } | ||
27 | #endif | ||
28 | |||
29 | #endif /* __ASM_MACH_MPPARSE_H */ | ||
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h deleted file mode 100644 index 78f0daaee436..000000000000 --- a/arch/x86/include/asm/es7000/wakecpu.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | #ifndef __ASM_ES7000_WAKECPU_H | ||
2 | #define __ASM_ES7000_WAKECPU_H | ||
3 | |||
4 | #define TRAMPOLINE_PHYS_LOW 0x467 | ||
5 | #define TRAMPOLINE_PHYS_HIGH 0x469 | ||
6 | |||
7 | static inline void wait_for_init_deassert(atomic_t *deassert) | ||
8 | { | ||
9 | #ifndef CONFIG_ES7000_CLUSTERED_APIC | ||
10 | while (!atomic_read(deassert)) | ||
11 | cpu_relax(); | ||
12 | #endif | ||
13 | return; | ||
14 | } | ||
15 | |||
16 | /* Nothing to do for most platforms, since cleared by the INIT cycle */ | ||
17 | static inline void smp_callin_clear_local_apic(void) | ||
18 | { | ||
19 | } | ||
20 | |||
21 | static inline void store_NMI_vector(unsigned short *high, unsigned short *low) | ||
22 | { | ||
23 | } | ||
24 | |||
25 | static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) | ||
26 | { | ||
27 | } | ||
28 | |||
29 | extern void __inquire_remote_apic(int apicid); | ||
30 | |||
31 | static inline void inquire_remote_apic(int apicid) | ||
32 | { | ||
33 | if (apic_verbosity >= APIC_DEBUG) | ||
34 | __inquire_remote_apic(apicid); | ||
35 | } | ||
36 | |||
37 | #endif /* __ASM_MACH_WAKECPU_H */ | ||
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h index 23696d44a0af..63a79c77d220 100644 --- a/arch/x86/include/asm/fixmap.h +++ b/arch/x86/include/asm/fixmap.h | |||
@@ -1,11 +1,145 @@ | |||
1 | /* | ||
2 | * fixmap.h: compile-time virtual memory allocation | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 1998 Ingo Molnar | ||
9 | * | ||
10 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 | ||
11 | * x86_32 and x86_64 integration by Gustavo F. Padovan, February 2009 | ||
12 | */ | ||
13 | |||
1 | #ifndef _ASM_X86_FIXMAP_H | 14 | #ifndef _ASM_X86_FIXMAP_H |
2 | #define _ASM_X86_FIXMAP_H | 15 | #define _ASM_X86_FIXMAP_H |
3 | 16 | ||
17 | #ifndef __ASSEMBLY__ | ||
18 | #include <linux/kernel.h> | ||
19 | #include <asm/acpi.h> | ||
20 | #include <asm/apicdef.h> | ||
21 | #include <asm/page.h> | ||
22 | #ifdef CONFIG_X86_32 | ||
23 | #include <linux/threads.h> | ||
24 | #include <asm/kmap_types.h> | ||
25 | #else | ||
26 | #include <asm/vsyscall.h> | ||
27 | #endif | ||
28 | |||
29 | /* | ||
30 | * We can't declare FIXADDR_TOP as variable for x86_64 because vsyscall | ||
31 | * uses fixmaps that relies on FIXADDR_TOP for proper address calculation. | ||
32 | * Because of this, FIXADDR_TOP x86 integration was left as later work. | ||
33 | */ | ||
34 | #ifdef CONFIG_X86_32 | ||
35 | /* used by vmalloc.c, vsyscall.lds.S. | ||
36 | * | ||
37 | * Leave one empty page between vmalloc'ed areas and | ||
38 | * the start of the fixmap. | ||
39 | */ | ||
40 | extern unsigned long __FIXADDR_TOP; | ||
41 | #define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP) | ||
42 | |||
43 | #define FIXADDR_USER_START __fix_to_virt(FIX_VDSO) | ||
44 | #define FIXADDR_USER_END __fix_to_virt(FIX_VDSO - 1) | ||
45 | #else | ||
46 | #define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE) | ||
47 | |||
48 | /* Only covers 32bit vsyscalls currently. Need another set for 64bit. */ | ||
49 | #define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL) | ||
50 | #define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE) | ||
51 | #endif | ||
52 | |||
53 | |||
54 | /* | ||
55 | * Here we define all the compile-time 'special' virtual | ||
56 | * addresses. The point is to have a constant address at | ||
57 | * compile time, but to set the physical address only | ||
58 | * in the boot process. | ||
59 | * for x86_32: We allocate these special addresses | ||
60 | * from the end of virtual memory (0xfffff000) backwards. | ||
61 | * Also this lets us do fail-safe vmalloc(), we | ||
62 | * can guarantee that these special addresses and | ||
63 | * vmalloc()-ed addresses never overlap. | ||
64 | * | ||
65 | * These 'compile-time allocated' memory buffers are | ||
66 | * fixed-size 4k pages (or larger if used with an increment | ||
67 | * higher than 1). Use set_fixmap(idx,phys) to associate | ||
68 | * physical memory with fixmap indices. | ||
69 | * | ||
70 | * TLB entries of such buffers will not be flushed across | ||
71 | * task switches. | ||
72 | */ | ||
73 | enum fixed_addresses { | ||
4 | #ifdef CONFIG_X86_32 | 74 | #ifdef CONFIG_X86_32 |
5 | # include "fixmap_32.h" | 75 | FIX_HOLE, |
76 | FIX_VDSO, | ||
6 | #else | 77 | #else |
7 | # include "fixmap_64.h" | 78 | VSYSCALL_LAST_PAGE, |
79 | VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE | ||
80 | + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1, | ||
81 | VSYSCALL_HPET, | ||
8 | #endif | 82 | #endif |
83 | FIX_DBGP_BASE, | ||
84 | FIX_EARLYCON_MEM_BASE, | ||
85 | #ifdef CONFIG_X86_LOCAL_APIC | ||
86 | FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ | ||
87 | #endif | ||
88 | #ifdef CONFIG_X86_IO_APIC | ||
89 | FIX_IO_APIC_BASE_0, | ||
90 | FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1, | ||
91 | #endif | ||
92 | #ifdef CONFIG_X86_VISWS_APIC | ||
93 | FIX_CO_CPU, /* Cobalt timer */ | ||
94 | FIX_CO_APIC, /* Cobalt APIC Redirection Table */ | ||
95 | FIX_LI_PCIA, /* Lithium PCI Bridge A */ | ||
96 | FIX_LI_PCIB, /* Lithium PCI Bridge B */ | ||
97 | #endif | ||
98 | #ifdef CONFIG_X86_F00F_BUG | ||
99 | FIX_F00F_IDT, /* Virtual mapping for IDT */ | ||
100 | #endif | ||
101 | #ifdef CONFIG_X86_CYCLONE_TIMER | ||
102 | FIX_CYCLONE_TIMER, /*cyclone timer register*/ | ||
103 | #endif | ||
104 | #ifdef CONFIG_X86_32 | ||
105 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ | ||
106 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, | ||
107 | #ifdef CONFIG_PCI_MMCONFIG | ||
108 | FIX_PCIE_MCFG, | ||
109 | #endif | ||
110 | #endif | ||
111 | #ifdef CONFIG_PARAVIRT | ||
112 | FIX_PARAVIRT_BOOTMAP, | ||
113 | #endif | ||
114 | __end_of_permanent_fixed_addresses, | ||
115 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT | ||
116 | FIX_OHCI1394_BASE, | ||
117 | #endif | ||
118 | /* | ||
119 | * 256 temporary boot-time mappings, used by early_ioremap(), | ||
120 | * before ioremap() is functional. | ||
121 | * | ||
122 | * We round it up to the next 256 pages boundary so that we | ||
123 | * can have a single pgd entry and a single pte table: | ||
124 | */ | ||
125 | #define NR_FIX_BTMAPS 64 | ||
126 | #define FIX_BTMAPS_SLOTS 4 | ||
127 | FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 - | ||
128 | (__end_of_permanent_fixed_addresses & 255), | ||
129 | FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1, | ||
130 | #ifdef CONFIG_X86_32 | ||
131 | FIX_WP_TEST, | ||
132 | #endif | ||
133 | __end_of_fixed_addresses | ||
134 | }; | ||
135 | |||
136 | |||
137 | extern void reserve_top_address(unsigned long reserve); | ||
138 | |||
139 | #define FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT) | ||
140 | #define FIXADDR_BOOT_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) | ||
141 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | ||
142 | #define FIXADDR_BOOT_START (FIXADDR_TOP - FIXADDR_BOOT_SIZE) | ||
9 | 143 | ||
10 | extern int fixmaps_set; | 144 | extern int fixmaps_set; |
11 | 145 | ||
@@ -69,4 +203,5 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) | |||
69 | BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); | 203 | BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); |
70 | return __virt_to_fix(vaddr); | 204 | return __virt_to_fix(vaddr); |
71 | } | 205 | } |
206 | #endif /* !__ASSEMBLY__ */ | ||
72 | #endif /* _ASM_X86_FIXMAP_H */ | 207 | #endif /* _ASM_X86_FIXMAP_H */ |
diff --git a/arch/x86/include/asm/fixmap_32.h b/arch/x86/include/asm/fixmap_32.h deleted file mode 100644 index c7115c1d7217..000000000000 --- a/arch/x86/include/asm/fixmap_32.h +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | /* | ||
2 | * fixmap.h: compile-time virtual memory allocation | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 1998 Ingo Molnar | ||
9 | * | ||
10 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 | ||
11 | */ | ||
12 | |||
13 | #ifndef _ASM_X86_FIXMAP_32_H | ||
14 | #define _ASM_X86_FIXMAP_32_H | ||
15 | |||
16 | |||
17 | /* used by vmalloc.c, vsyscall.lds.S. | ||
18 | * | ||
19 | * Leave one empty page between vmalloc'ed areas and | ||
20 | * the start of the fixmap. | ||
21 | */ | ||
22 | extern unsigned long __FIXADDR_TOP; | ||
23 | #define FIXADDR_USER_START __fix_to_virt(FIX_VDSO) | ||
24 | #define FIXADDR_USER_END __fix_to_virt(FIX_VDSO - 1) | ||
25 | |||
26 | #ifndef __ASSEMBLY__ | ||
27 | #include <linux/kernel.h> | ||
28 | #include <asm/acpi.h> | ||
29 | #include <asm/apicdef.h> | ||
30 | #include <asm/page.h> | ||
31 | #include <linux/threads.h> | ||
32 | #include <asm/kmap_types.h> | ||
33 | |||
34 | /* | ||
35 | * Here we define all the compile-time 'special' virtual | ||
36 | * addresses. The point is to have a constant address at | ||
37 | * compile time, but to set the physical address only | ||
38 | * in the boot process. We allocate these special addresses | ||
39 | * from the end of virtual memory (0xfffff000) backwards. | ||
40 | * Also this lets us do fail-safe vmalloc(), we | ||
41 | * can guarantee that these special addresses and | ||
42 | * vmalloc()-ed addresses never overlap. | ||
43 | * | ||
44 | * these 'compile-time allocated' memory buffers are | ||
45 | * fixed-size 4k pages. (or larger if used with an increment | ||
46 | * highger than 1) use fixmap_set(idx,phys) to associate | ||
47 | * physical memory with fixmap indices. | ||
48 | * | ||
49 | * TLB entries of such buffers will not be flushed across | ||
50 | * task switches. | ||
51 | */ | ||
52 | enum fixed_addresses { | ||
53 | FIX_HOLE, | ||
54 | FIX_VDSO, | ||
55 | FIX_DBGP_BASE, | ||
56 | FIX_EARLYCON_MEM_BASE, | ||
57 | #ifdef CONFIG_X86_LOCAL_APIC | ||
58 | FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ | ||
59 | #endif | ||
60 | #ifdef CONFIG_X86_IO_APIC | ||
61 | FIX_IO_APIC_BASE_0, | ||
62 | FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS-1, | ||
63 | #endif | ||
64 | #ifdef CONFIG_X86_VISWS_APIC | ||
65 | FIX_CO_CPU, /* Cobalt timer */ | ||
66 | FIX_CO_APIC, /* Cobalt APIC Redirection Table */ | ||
67 | FIX_LI_PCIA, /* Lithium PCI Bridge A */ | ||
68 | FIX_LI_PCIB, /* Lithium PCI Bridge B */ | ||
69 | #endif | ||
70 | #ifdef CONFIG_X86_F00F_BUG | ||
71 | FIX_F00F_IDT, /* Virtual mapping for IDT */ | ||
72 | #endif | ||
73 | #ifdef CONFIG_X86_CYCLONE_TIMER | ||
74 | FIX_CYCLONE_TIMER, /*cyclone timer register*/ | ||
75 | #endif | ||
76 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ | ||
77 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, | ||
78 | #ifdef CONFIG_PCI_MMCONFIG | ||
79 | FIX_PCIE_MCFG, | ||
80 | #endif | ||
81 | #ifdef CONFIG_PARAVIRT | ||
82 | FIX_PARAVIRT_BOOTMAP, | ||
83 | #endif | ||
84 | __end_of_permanent_fixed_addresses, | ||
85 | /* | ||
86 | * 256 temporary boot-time mappings, used by early_ioremap(), | ||
87 | * before ioremap() is functional. | ||
88 | * | ||
89 | * We round it up to the next 256 pages boundary so that we | ||
90 | * can have a single pgd entry and a single pte table: | ||
91 | */ | ||
92 | #define NR_FIX_BTMAPS 64 | ||
93 | #define FIX_BTMAPS_SLOTS 4 | ||
94 | FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 - | ||
95 | (__end_of_permanent_fixed_addresses & 255), | ||
96 | FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1, | ||
97 | FIX_WP_TEST, | ||
98 | #ifdef CONFIG_ACPI | ||
99 | FIX_ACPI_BEGIN, | ||
100 | FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1, | ||
101 | #endif | ||
102 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT | ||
103 | FIX_OHCI1394_BASE, | ||
104 | #endif | ||
105 | __end_of_fixed_addresses | ||
106 | }; | ||
107 | |||
108 | extern void reserve_top_address(unsigned long reserve); | ||
109 | |||
110 | |||
111 | #define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP) | ||
112 | |||
113 | #define __FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT) | ||
114 | #define __FIXADDR_BOOT_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) | ||
115 | #define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE) | ||
116 | #define FIXADDR_BOOT_START (FIXADDR_TOP - __FIXADDR_BOOT_SIZE) | ||
117 | |||
118 | #endif /* !__ASSEMBLY__ */ | ||
119 | #endif /* _ASM_X86_FIXMAP_32_H */ | ||
diff --git a/arch/x86/include/asm/fixmap_64.h b/arch/x86/include/asm/fixmap_64.h deleted file mode 100644 index 8be740977db8..000000000000 --- a/arch/x86/include/asm/fixmap_64.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* | ||
2 | * fixmap.h: compile-time virtual memory allocation | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 1998 Ingo Molnar | ||
9 | */ | ||
10 | |||
11 | #ifndef _ASM_X86_FIXMAP_64_H | ||
12 | #define _ASM_X86_FIXMAP_64_H | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <asm/acpi.h> | ||
16 | #include <asm/apicdef.h> | ||
17 | #include <asm/page.h> | ||
18 | #include <asm/vsyscall.h> | ||
19 | |||
20 | /* | ||
21 | * Here we define all the compile-time 'special' virtual | ||
22 | * addresses. The point is to have a constant address at | ||
23 | * compile time, but to set the physical address only | ||
24 | * in the boot process. | ||
25 | * | ||
26 | * These 'compile-time allocated' memory buffers are | ||
27 | * fixed-size 4k pages (or larger if used with an increment | ||
28 | * higher than 1). Use set_fixmap(idx,phys) to associate | ||
29 | * physical memory with fixmap indices. | ||
30 | * | ||
31 | * TLB entries of such buffers will not be flushed across | ||
32 | * task switches. | ||
33 | */ | ||
34 | |||
35 | enum fixed_addresses { | ||
36 | VSYSCALL_LAST_PAGE, | ||
37 | VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE | ||
38 | + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1, | ||
39 | VSYSCALL_HPET, | ||
40 | FIX_DBGP_BASE, | ||
41 | FIX_EARLYCON_MEM_BASE, | ||
42 | FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ | ||
43 | FIX_IO_APIC_BASE_0, | ||
44 | FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1, | ||
45 | #ifdef CONFIG_PARAVIRT | ||
46 | FIX_PARAVIRT_BOOTMAP, | ||
47 | #endif | ||
48 | __end_of_permanent_fixed_addresses, | ||
49 | #ifdef CONFIG_ACPI | ||
50 | FIX_ACPI_BEGIN, | ||
51 | FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1, | ||
52 | #endif | ||
53 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT | ||
54 | FIX_OHCI1394_BASE, | ||
55 | #endif | ||
56 | /* | ||
57 | * 256 temporary boot-time mappings, used by early_ioremap(), | ||
58 | * before ioremap() is functional. | ||
59 | * | ||
60 | * We round it up to the next 256 pages boundary so that we | ||
61 | * can have a single pgd entry and a single pte table: | ||
62 | */ | ||
63 | #define NR_FIX_BTMAPS 64 | ||
64 | #define FIX_BTMAPS_SLOTS 4 | ||
65 | FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 - | ||
66 | (__end_of_permanent_fixed_addresses & 255), | ||
67 | FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1, | ||
68 | __end_of_fixed_addresses | ||
69 | }; | ||
70 | |||
71 | #define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE) | ||
72 | #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) | ||
73 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | ||
74 | |||
75 | /* Only covers 32bit vsyscalls currently. Need another set for 64bit. */ | ||
76 | #define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL) | ||
77 | #define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE) | ||
78 | |||
79 | #endif /* _ASM_X86_FIXMAP_64_H */ | ||
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h index d48bee663a6f..4b8b98fa7f25 100644 --- a/arch/x86/include/asm/genapic.h +++ b/arch/x86/include/asm/genapic.h | |||
@@ -1,5 +1 @@ | |||
1 | #ifdef CONFIG_X86_32 | #include <asm/apic.h> | |
2 | # include "genapic_32.h" | ||
3 | #else | ||
4 | # include "genapic_64.h" | ||
5 | #endif | ||
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h deleted file mode 100644 index 2c05b737ee22..000000000000 --- a/arch/x86/include/asm/genapic_32.h +++ /dev/null | |||
@@ -1,148 +0,0 @@ | |||
1 | #ifndef _ASM_X86_GENAPIC_32_H | ||
2 | #define _ASM_X86_GENAPIC_32_H | ||
3 | |||
4 | #include <asm/mpspec.h> | ||
5 | #include <asm/atomic.h> | ||
6 | |||
7 | /* | ||
8 | * Generic APIC driver interface. | ||
9 | * | ||
10 | * An straight forward mapping of the APIC related parts of the | ||
11 | * x86 subarchitecture interface to a dynamic object. | ||
12 | * | ||
13 | * This is used by the "generic" x86 subarchitecture. | ||
14 | * | ||
15 | * Copyright 2003 Andi Kleen, SuSE Labs. | ||
16 | */ | ||
17 | |||
18 | struct mpc_bus; | ||
19 | struct mpc_table; | ||
20 | struct mpc_cpu; | ||
21 | |||
22 | struct genapic { | ||
23 | char *name; | ||
24 | int (*probe)(void); | ||
25 | |||
26 | int (*apic_id_registered)(void); | ||
27 | const struct cpumask *(*target_cpus)(void); | ||
28 | int int_delivery_mode; | ||
29 | int int_dest_mode; | ||
30 | int ESR_DISABLE; | ||
31 | int apic_destination_logical; | ||
32 | unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid); | ||
33 | unsigned long (*check_apicid_present)(int apicid); | ||
34 | int no_balance_irq; | ||
35 | int no_ioapic_check; | ||
36 | void (*init_apic_ldr)(void); | ||
37 | physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map); | ||
38 | |||
39 | void (*setup_apic_routing)(void); | ||
40 | int (*multi_timer_check)(int apic, int irq); | ||
41 | int (*apicid_to_node)(int logical_apicid); | ||
42 | int (*cpu_to_logical_apicid)(int cpu); | ||
43 | int (*cpu_present_to_apicid)(int mps_cpu); | ||
44 | physid_mask_t (*apicid_to_cpu_present)(int phys_apicid); | ||
45 | void (*setup_portio_remap)(void); | ||
46 | int (*check_phys_apicid_present)(int boot_cpu_physical_apicid); | ||
47 | void (*enable_apic_mode)(void); | ||
48 | u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb); | ||
49 | |||
50 | /* mpparse */ | ||
51 | /* When one of the next two hooks returns 1 the genapic | ||
52 | is switched to this. Essentially they are additional probe | ||
53 | functions. */ | ||
54 | int (*mps_oem_check)(struct mpc_table *mpc, char *oem, | ||
55 | char *productid); | ||
56 | int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); | ||
57 | |||
58 | unsigned (*get_apic_id)(unsigned long x); | ||
59 | unsigned long apic_id_mask; | ||
60 | unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask); | ||
61 | unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, | ||
62 | const struct cpumask *andmask); | ||
63 | void (*vector_allocation_domain)(int cpu, struct cpumask *retmask); | ||
64 | |||
65 | #ifdef CONFIG_SMP | ||
66 | /* ipi */ | ||
67 | void (*send_IPI_mask)(const struct cpumask *mask, int vector); | ||
68 | void (*send_IPI_mask_allbutself)(const struct cpumask *mask, | ||
69 | int vector); | ||
70 | void (*send_IPI_allbutself)(int vector); | ||
71 | void (*send_IPI_all)(int vector); | ||
72 | #endif | ||
73 | int (*wakeup_cpu)(int apicid, unsigned long start_eip); | ||
74 | int trampoline_phys_low; | ||
75 | int trampoline_phys_high; | ||
76 | void (*wait_for_init_deassert)(atomic_t *deassert); | ||
77 | void (*smp_callin_clear_local_apic)(void); | ||
78 | void (*store_NMI_vector)(unsigned short *high, unsigned short *low); | ||
79 | void (*restore_NMI_vector)(unsigned short *high, unsigned short *low); | ||
80 | void (*inquire_remote_apic)(int apicid); | ||
81 | }; | ||
82 | |||
83 | #define APICFUNC(x) .x = x, | ||
84 | |||
85 | /* More functions could be probably marked IPIFUNC and save some space | ||
86 | in UP GENERICARCH kernels, but I don't have the nerve right now | ||
87 | to untangle this mess. -AK */ | ||
88 | #ifdef CONFIG_SMP | ||
89 | #define IPIFUNC(x) APICFUNC(x) | ||
90 | #else | ||
91 | #define IPIFUNC(x) | ||
92 | #endif | ||
93 | |||
94 | #define APIC_INIT(aname, aprobe) \ | ||
95 | { \ | ||
96 | .name = aname, \ | ||
97 | .probe = aprobe, \ | ||
98 | .int_delivery_mode = INT_DELIVERY_MODE, \ | ||
99 | .int_dest_mode = INT_DEST_MODE, \ | ||
100 | .no_balance_irq = NO_BALANCE_IRQ, \ | ||
101 | .ESR_DISABLE = esr_disable, \ | ||
102 | .apic_destination_logical = APIC_DEST_LOGICAL, \ | ||
103 | APICFUNC(apic_id_registered) \ | ||
104 | APICFUNC(target_cpus) \ | ||
105 | APICFUNC(check_apicid_used) \ | ||
106 | APICFUNC(check_apicid_present) \ | ||
107 | APICFUNC(init_apic_ldr) \ | ||
108 | APICFUNC(ioapic_phys_id_map) \ | ||
109 | APICFUNC(setup_apic_routing) \ | ||
110 | APICFUNC(multi_timer_check) \ | ||
111 | APICFUNC(apicid_to_node) \ | ||
112 | APICFUNC(cpu_to_logical_apicid) \ | ||
113 | APICFUNC(cpu_present_to_apicid) \ | ||
114 | APICFUNC(apicid_to_cpu_present) \ | ||
115 | APICFUNC(setup_portio_remap) \ | ||
116 | APICFUNC(check_phys_apicid_present) \ | ||
117 | APICFUNC(mps_oem_check) \ | ||
118 | APICFUNC(get_apic_id) \ | ||
119 | .apic_id_mask = APIC_ID_MASK, \ | ||
120 | APICFUNC(cpu_mask_to_apicid) \ | ||
121 | APICFUNC(cpu_mask_to_apicid_and) \ | ||
122 | APICFUNC(vector_allocation_domain) \ | ||
123 | APICFUNC(acpi_madt_oem_check) \ | ||
124 | IPIFUNC(send_IPI_mask) \ | ||
125 | IPIFUNC(send_IPI_allbutself) \ | ||
126 | IPIFUNC(send_IPI_all) \ | ||
127 | APICFUNC(enable_apic_mode) \ | ||
128 | APICFUNC(phys_pkg_id) \ | ||
129 | .trampoline_phys_low = TRAMPOLINE_PHYS_LOW, \ | ||
130 | .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, \ | ||
131 | APICFUNC(wait_for_init_deassert) \ | ||
132 | APICFUNC(smp_callin_clear_local_apic) \ | ||
133 | APICFUNC(store_NMI_vector) \ | ||
134 | APICFUNC(restore_NMI_vector) \ | ||
135 | APICFUNC(inquire_remote_apic) \ | ||
136 | } | ||
137 | |||
138 | extern struct genapic *genapic; | ||
139 | extern void es7000_update_genapic_to_cluster(void); | ||
140 | |||
141 | enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; | ||
142 | #define get_uv_system_type() UV_NONE | ||
143 | #define is_uv_system() 0 | ||
144 | #define uv_wakeup_secondary(a, b) 1 | ||
145 | #define uv_system_init() do {} while (0) | ||
146 | |||
147 | |||
148 | #endif /* _ASM_X86_GENAPIC_32_H */ | ||
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h deleted file mode 100644 index adf32fb56aa6..000000000000 --- a/arch/x86/include/asm/genapic_64.h +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | #ifndef _ASM_X86_GENAPIC_64_H | ||
2 | #define _ASM_X86_GENAPIC_64_H | ||
3 | |||
4 | #include <linux/cpumask.h> | ||
5 | |||
6 | /* | ||
7 | * Copyright 2004 James Cleverdon, IBM. | ||
8 | * Subject to the GNU Public License, v.2 | ||
9 | * | ||
10 | * Generic APIC sub-arch data struct. | ||
11 | * | ||
12 | * Hacked for x86-64 by James Cleverdon from i386 architecture code by | ||
13 | * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and | ||
14 | * James Cleverdon. | ||
15 | */ | ||
16 | |||
17 | struct genapic { | ||
18 | char *name; | ||
19 | int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); | ||
20 | u32 int_delivery_mode; | ||
21 | u32 int_dest_mode; | ||
22 | int (*apic_id_registered)(void); | ||
23 | const struct cpumask *(*target_cpus)(void); | ||
24 | void (*vector_allocation_domain)(int cpu, struct cpumask *retmask); | ||
25 | void (*init_apic_ldr)(void); | ||
26 | /* ipi */ | ||
27 | void (*send_IPI_mask)(const struct cpumask *mask, int vector); | ||
28 | void (*send_IPI_mask_allbutself)(const struct cpumask *mask, | ||
29 | int vector); | ||
30 | void (*send_IPI_allbutself)(int vector); | ||
31 | void (*send_IPI_all)(int vector); | ||
32 | void (*send_IPI_self)(int vector); | ||
33 | /* */ | ||
34 | unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask); | ||
35 | unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, | ||
36 | const struct cpumask *andmask); | ||
37 | unsigned int (*phys_pkg_id)(int index_msb); | ||
38 | unsigned int (*get_apic_id)(unsigned long x); | ||
39 | unsigned long (*set_apic_id)(unsigned int id); | ||
40 | unsigned long apic_id_mask; | ||
41 | /* wakeup_secondary_cpu */ | ||
42 | int (*wakeup_cpu)(int apicid, unsigned long start_eip); | ||
43 | }; | ||
44 | |||
45 | extern struct genapic *genapic; | ||
46 | |||
47 | extern struct genapic apic_flat; | ||
48 | extern struct genapic apic_physflat; | ||
49 | extern struct genapic apic_x2apic_cluster; | ||
50 | extern struct genapic apic_x2apic_phys; | ||
51 | extern int acpi_madt_oem_check(char *, char *); | ||
52 | |||
53 | extern void apic_send_IPI_self(int vector); | ||
54 | enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; | ||
55 | extern enum uv_system_type get_uv_system_type(void); | ||
56 | extern int is_uv_system(void); | ||
57 | |||
58 | extern struct genapic apic_x2apic_uv_x; | ||
59 | DECLARE_PER_CPU(int, x2apic_extra_bits); | ||
60 | extern void uv_cpu_init(void); | ||
61 | extern void uv_system_init(void); | ||
62 | extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip); | ||
63 | |||
64 | extern void setup_apic_routing(void); | ||
65 | |||
66 | #endif /* _ASM_X86_GENAPIC_64_H */ | ||
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h index 000787df66e6..176f058e7159 100644 --- a/arch/x86/include/asm/hardirq.h +++ b/arch/x86/include/asm/hardirq.h | |||
@@ -1,11 +1,52 @@ | |||
1 | #ifdef CONFIG_X86_32 | 1 | #ifndef _ASM_X86_HARDIRQ_H |
2 | # include "hardirq_32.h" | 2 | #define _ASM_X86_HARDIRQ_H |
3 | #else | 3 | |
4 | # include "hardirq_64.h" | 4 | #include <linux/threads.h> |
5 | #include <linux/irq.h> | ||
6 | |||
7 | typedef struct { | ||
8 | unsigned int __softirq_pending; | ||
9 | unsigned int __nmi_count; /* arch dependent */ | ||
10 | unsigned int irq0_irqs; | ||
11 | #ifdef CONFIG_X86_LOCAL_APIC | ||
12 | unsigned int apic_timer_irqs; /* arch dependent */ | ||
13 | unsigned int irq_spurious_count; | ||
14 | #endif | ||
15 | #ifdef CONFIG_SMP | ||
16 | unsigned int irq_resched_count; | ||
17 | unsigned int irq_call_count; | ||
18 | unsigned int irq_tlb_count; | ||
19 | #endif | ||
20 | #ifdef CONFIG_X86_MCE | ||
21 | unsigned int irq_thermal_count; | ||
22 | # ifdef CONFIG_X86_64 | ||
23 | unsigned int irq_threshold_count; | ||
24 | # endif | ||
5 | #endif | 25 | #endif |
26 | } ____cacheline_aligned irq_cpustat_t; | ||
27 | |||
28 | DECLARE_PER_CPU(irq_cpustat_t, irq_stat); | ||
29 | |||
30 | /* We can have at most NR_VECTORS irqs routed to a cpu at a time */ | ||
31 | #define MAX_HARDIRQS_PER_CPU NR_VECTORS | ||
32 | |||
33 | #define __ARCH_IRQ_STAT | ||
34 | |||
35 | #define inc_irq_stat(member) percpu_add(irq_stat.member, 1) | ||
36 | |||
37 | #define local_softirq_pending() percpu_read(irq_stat.__softirq_pending) | ||
38 | |||
39 | #define __ARCH_SET_SOFTIRQ_PENDING | ||
40 | |||
41 | #define set_softirq_pending(x) percpu_write(irq_stat.__softirq_pending, (x)) | ||
42 | #define or_softirq_pending(x) percpu_or(irq_stat.__softirq_pending, (x)) | ||
43 | |||
44 | extern void ack_bad_irq(unsigned int irq); | ||
6 | 45 | ||
7 | extern u64 arch_irq_stat_cpu(unsigned int cpu); | 46 | extern u64 arch_irq_stat_cpu(unsigned int cpu); |
8 | #define arch_irq_stat_cpu arch_irq_stat_cpu | 47 | #define arch_irq_stat_cpu arch_irq_stat_cpu |
9 | 48 | ||
10 | extern u64 arch_irq_stat(void); | 49 | extern u64 arch_irq_stat(void); |
11 | #define arch_irq_stat arch_irq_stat | 50 | #define arch_irq_stat arch_irq_stat |
51 | |||
52 | #endif /* _ASM_X86_HARDIRQ_H */ | ||
diff --git a/arch/x86/include/asm/hardirq_32.h b/arch/x86/include/asm/hardirq_32.h deleted file mode 100644 index cf7954d1405f..000000000000 --- a/arch/x86/include/asm/hardirq_32.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | #ifndef _ASM_X86_HARDIRQ_32_H | ||
2 | #define _ASM_X86_HARDIRQ_32_H | ||
3 | |||
4 | #include <linux/threads.h> | ||
5 | #include <linux/irq.h> | ||
6 | |||
7 | typedef struct { | ||
8 | unsigned int __softirq_pending; | ||
9 | unsigned long idle_timestamp; | ||
10 | unsigned int __nmi_count; /* arch dependent */ | ||
11 | unsigned int apic_timer_irqs; /* arch dependent */ | ||
12 | unsigned int irq0_irqs; | ||
13 | unsigned int irq_resched_count; | ||
14 | unsigned int irq_call_count; | ||
15 | unsigned int irq_tlb_count; | ||
16 | unsigned int irq_thermal_count; | ||
17 | unsigned int irq_spurious_count; | ||
18 | } ____cacheline_aligned irq_cpustat_t; | ||
19 | |||
20 | DECLARE_PER_CPU(irq_cpustat_t, irq_stat); | ||
21 | |||
22 | #define __ARCH_IRQ_STAT | ||
23 | #define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member) | ||
24 | |||
25 | #define inc_irq_stat(member) (__get_cpu_var(irq_stat).member++) | ||
26 | |||
27 | void ack_bad_irq(unsigned int irq); | ||
28 | #include <linux/irq_cpustat.h> | ||
29 | |||
30 | #endif /* _ASM_X86_HARDIRQ_32_H */ | ||
diff --git a/arch/x86/include/asm/hardirq_64.h b/arch/x86/include/asm/hardirq_64.h deleted file mode 100644 index b5a6b5d56704..000000000000 --- a/arch/x86/include/asm/hardirq_64.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef _ASM_X86_HARDIRQ_64_H | ||
2 | #define _ASM_X86_HARDIRQ_64_H | ||
3 | |||
4 | #include <linux/threads.h> | ||
5 | #include <linux/irq.h> | ||
6 | #include <asm/pda.h> | ||
7 | #include <asm/apic.h> | ||
8 | |||
9 | /* We can have at most NR_VECTORS irqs routed to a cpu at a time */ | ||
10 | #define MAX_HARDIRQS_PER_CPU NR_VECTORS | ||
11 | |||
12 | #define __ARCH_IRQ_STAT 1 | ||
13 | |||
14 | #define inc_irq_stat(member) add_pda(member, 1) | ||
15 | |||
16 | #define local_softirq_pending() read_pda(__softirq_pending) | ||
17 | |||
18 | #define __ARCH_SET_SOFTIRQ_PENDING 1 | ||
19 | |||
20 | #define set_softirq_pending(x) write_pda(__softirq_pending, (x)) | ||
21 | #define or_softirq_pending(x) or_pda(__softirq_pending, (x)) | ||
22 | |||
23 | extern void ack_bad_irq(unsigned int irq); | ||
24 | |||
25 | #endif /* _ASM_X86_HARDIRQ_64_H */ | ||
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h index 8de644b6b959..370e1c83bb49 100644 --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h | |||
@@ -25,8 +25,6 @@ | |||
25 | #include <asm/irq.h> | 25 | #include <asm/irq.h> |
26 | #include <asm/sections.h> | 26 | #include <asm/sections.h> |
27 | 27 | ||
28 | #define platform_legacy_irq(irq) ((irq) < 16) | ||
29 | |||
30 | /* Interrupt handlers registered during init_IRQ */ | 28 | /* Interrupt handlers registered during init_IRQ */ |
31 | extern void apic_timer_interrupt(void); | 29 | extern void apic_timer_interrupt(void); |
32 | extern void error_interrupt(void); | 30 | extern void error_interrupt(void); |
@@ -58,7 +56,7 @@ extern void make_8259A_irq(unsigned int irq); | |||
58 | extern void init_8259A(int aeoi); | 56 | extern void init_8259A(int aeoi); |
59 | 57 | ||
60 | /* IOAPIC */ | 58 | /* IOAPIC */ |
61 | #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs)) | 59 | #define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs)) |
62 | extern unsigned long io_apic_irqs; | 60 | extern unsigned long io_apic_irqs; |
63 | 61 | ||
64 | extern void init_VISWS_APIC_irqs(void); | 62 | extern void init_VISWS_APIC_irqs(void); |
@@ -67,15 +65,7 @@ extern void disable_IO_APIC(void); | |||
67 | extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); | 65 | extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); |
68 | extern void setup_ioapic_dest(void); | 66 | extern void setup_ioapic_dest(void); |
69 | 67 | ||
70 | #ifdef CONFIG_X86_64 | ||
71 | extern void enable_IO_APIC(void); | 68 | extern void enable_IO_APIC(void); |
72 | #endif | ||
73 | |||
74 | /* IPI functions */ | ||
75 | #ifdef CONFIG_X86_32 | ||
76 | extern void send_IPI_self(int vector); | ||
77 | #endif | ||
78 | extern void send_IPI(int dest, int vector); | ||
79 | 69 | ||
80 | /* Statistics */ | 70 | /* Statistics */ |
81 | extern atomic_t irq_err_count; | 71 | extern atomic_t irq_err_count; |
@@ -84,21 +74,11 @@ extern atomic_t irq_mis_count; | |||
84 | /* EISA */ | 74 | /* EISA */ |
85 | extern void eisa_set_level_irq(unsigned int irq); | 75 | extern void eisa_set_level_irq(unsigned int irq); |
86 | 76 | ||
87 | /* Voyager functions */ | ||
88 | extern asmlinkage void vic_cpi_interrupt(void); | ||
89 | extern asmlinkage void vic_sys_interrupt(void); | ||
90 | extern asmlinkage void vic_cmn_interrupt(void); | ||
91 | extern asmlinkage void qic_timer_interrupt(void); | ||
92 | extern asmlinkage void qic_invalidate_interrupt(void); | ||
93 | extern asmlinkage void qic_reschedule_interrupt(void); | ||
94 | extern asmlinkage void qic_enable_irq_interrupt(void); | ||
95 | extern asmlinkage void qic_call_function_interrupt(void); | ||
96 | |||
97 | /* SMP */ | 77 | /* SMP */ |
98 | extern void smp_apic_timer_interrupt(struct pt_regs *); | 78 | extern void smp_apic_timer_interrupt(struct pt_regs *); |
99 | extern void smp_spurious_interrupt(struct pt_regs *); | 79 | extern void smp_spurious_interrupt(struct pt_regs *); |
100 | extern void smp_error_interrupt(struct pt_regs *); | 80 | extern void smp_error_interrupt(struct pt_regs *); |
101 | #ifdef CONFIG_X86_SMP | 81 | #ifdef CONFIG_SMP |
102 | extern void smp_reschedule_interrupt(struct pt_regs *); | 82 | extern void smp_reschedule_interrupt(struct pt_regs *); |
103 | extern void smp_call_function_interrupt(struct pt_regs *); | 83 | extern void smp_call_function_interrupt(struct pt_regs *); |
104 | extern void smp_call_function_single_interrupt(struct pt_regs *); | 84 | extern void smp_call_function_single_interrupt(struct pt_regs *); |
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h index 58d7091eeb1f..1a99e6c092af 100644 --- a/arch/x86/include/asm/i8259.h +++ b/arch/x86/include/asm/i8259.h | |||
@@ -60,4 +60,8 @@ extern struct irq_chip i8259A_chip; | |||
60 | extern void mask_8259A(void); | 60 | extern void mask_8259A(void); |
61 | extern void unmask_8259A(void); | 61 | extern void unmask_8259A(void); |
62 | 62 | ||
63 | #ifdef CONFIG_X86_32 | ||
64 | extern void init_ISA_irqs(void); | ||
65 | #endif | ||
66 | |||
63 | #endif /* _ASM_X86_I8259_H */ | 67 | #endif /* _ASM_X86_I8259_H */ |
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 1dbbdf4be9b4..e5383e3d2f8c 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h | |||
@@ -5,6 +5,7 @@ | |||
5 | 5 | ||
6 | #include <linux/compiler.h> | 6 | #include <linux/compiler.h> |
7 | #include <asm-generic/int-ll64.h> | 7 | #include <asm-generic/int-ll64.h> |
8 | #include <asm/page.h> | ||
8 | 9 | ||
9 | #define build_mmio_read(name, size, type, reg, barrier) \ | 10 | #define build_mmio_read(name, size, type, reg, barrier) \ |
10 | static inline type name(const volatile void __iomem *addr) \ | 11 | static inline type name(const volatile void __iomem *addr) \ |
@@ -80,6 +81,98 @@ static inline void writeq(__u64 val, volatile void __iomem *addr) | |||
80 | #define readq readq | 81 | #define readq readq |
81 | #define writeq writeq | 82 | #define writeq writeq |
82 | 83 | ||
84 | /** | ||
85 | * virt_to_phys - map virtual addresses to physical | ||
86 | * @address: address to remap | ||
87 | * | ||
88 | * The returned physical address is the physical (CPU) mapping for | ||
89 | * the memory address given. It is only valid to use this function on | ||
90 | * addresses directly mapped or allocated via kmalloc. | ||
91 | * | ||
92 | * This function does not give bus mappings for DMA transfers. In | ||
93 | * almost all conceivable cases a device driver should not be using | ||
94 | * this function | ||
95 | */ | ||
96 | |||
97 | static inline phys_addr_t virt_to_phys(volatile void *address) | ||
98 | { | ||
99 | return __pa(address); | ||
100 | } | ||
101 | |||
102 | /** | ||
103 | * phys_to_virt - map physical address to virtual | ||
104 | * @address: address to remap | ||
105 | * | ||
106 | * The returned virtual address is a current CPU mapping for | ||
107 | * the memory address given. It is only valid to use this function on | ||
108 | * addresses that have a kernel mapping | ||
109 | * | ||
110 | * This function does not handle bus mappings for DMA transfers. In | ||
111 | * almost all conceivable cases a device driver should not be using | ||
112 | * this function | ||
113 | */ | ||
114 | |||
115 | static inline void *phys_to_virt(phys_addr_t address) | ||
116 | { | ||
117 | return __va(address); | ||
118 | } | ||
119 | |||
120 | /* | ||
121 | * Change "struct page" to physical address. | ||
122 | */ | ||
123 | #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) | ||
124 | |||
125 | /* | ||
126 | * ISA I/O bus memory addresses are 1:1 with the physical address. | ||
127 | * However, we truncate the address to unsigned int to avoid undesirable | ||
128 | * promitions in legacy drivers. | ||
129 | */ | ||
130 | static inline unsigned int isa_virt_to_bus(volatile void *address) | ||
131 | { | ||
132 | return (unsigned int)virt_to_phys(address); | ||
133 | } | ||
134 | #define isa_page_to_bus(page) ((unsigned int)page_to_phys(page)) | ||
135 | #define isa_bus_to_virt phys_to_virt | ||
136 | |||
137 | /* | ||
138 | * However PCI ones are not necessarily 1:1 and therefore these interfaces | ||
139 | * are forbidden in portable PCI drivers. | ||
140 | * | ||
141 | * Allow them on x86 for legacy drivers, though. | ||
142 | */ | ||
143 | #define virt_to_bus virt_to_phys | ||
144 | #define bus_to_virt phys_to_virt | ||
145 | |||
146 | /** | ||
147 | * ioremap - map bus memory into CPU space | ||
148 | * @offset: bus address of the memory | ||
149 | * @size: size of the resource to map | ||
150 | * | ||
151 | * ioremap performs a platform specific sequence of operations to | ||
152 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | ||
153 | * writew/writel functions and the other mmio helpers. The returned | ||
154 | * address is not guaranteed to be usable directly as a virtual | ||
155 | * address. | ||
156 | * | ||
157 | * If the area you are trying to map is a PCI BAR you should have a | ||
158 | * look at pci_iomap(). | ||
159 | */ | ||
160 | extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); | ||
161 | extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); | ||
162 | extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, | ||
163 | unsigned long prot_val); | ||
164 | |||
165 | /* | ||
166 | * The default ioremap() behavior is non-cached: | ||
167 | */ | ||
168 | static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) | ||
169 | { | ||
170 | return ioremap_nocache(offset, size); | ||
171 | } | ||
172 | |||
173 | extern void iounmap(volatile void __iomem *addr); | ||
174 | |||
175 | |||
83 | #ifdef CONFIG_X86_32 | 176 | #ifdef CONFIG_X86_32 |
84 | # include "io_32.h" | 177 | # include "io_32.h" |
85 | #else | 178 | #else |
@@ -91,7 +184,7 @@ extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr); | |||
91 | 184 | ||
92 | extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, | 185 | extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, |
93 | unsigned long prot_val); | 186 | unsigned long prot_val); |
94 | extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size); | 187 | extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size); |
95 | 188 | ||
96 | /* | 189 | /* |
97 | * early_ioremap() and early_iounmap() are for temporary early boot-time | 190 | * early_ioremap() and early_iounmap() are for temporary early boot-time |
@@ -103,7 +196,7 @@ extern void early_ioremap_reset(void); | |||
103 | extern void __iomem *early_ioremap(unsigned long offset, unsigned long size); | 196 | extern void __iomem *early_ioremap(unsigned long offset, unsigned long size); |
104 | extern void __iomem *early_memremap(unsigned long offset, unsigned long size); | 197 | extern void __iomem *early_memremap(unsigned long offset, unsigned long size); |
105 | extern void early_iounmap(void __iomem *addr, unsigned long size); | 198 | extern void early_iounmap(void __iomem *addr, unsigned long size); |
106 | extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); | ||
107 | 199 | ||
200 | #define IO_SPACE_LIMIT 0xffff | ||
108 | 201 | ||
109 | #endif /* _ASM_X86_IO_H */ | 202 | #endif /* _ASM_X86_IO_H */ |
diff --git a/arch/x86/include/asm/io_32.h b/arch/x86/include/asm/io_32.h index d8e242e1b396..a299900f5920 100644 --- a/arch/x86/include/asm/io_32.h +++ b/arch/x86/include/asm/io_32.h | |||
@@ -37,8 +37,6 @@ | |||
37 | * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> | 37 | * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> |
38 | */ | 38 | */ |
39 | 39 | ||
40 | #define IO_SPACE_LIMIT 0xffff | ||
41 | |||
42 | #define XQUAD_PORTIO_BASE 0xfe400000 | 40 | #define XQUAD_PORTIO_BASE 0xfe400000 |
43 | #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */ | 41 | #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */ |
44 | 42 | ||
@@ -53,92 +51,6 @@ | |||
53 | */ | 51 | */ |
54 | #define xlate_dev_kmem_ptr(p) p | 52 | #define xlate_dev_kmem_ptr(p) p |
55 | 53 | ||
56 | /** | ||
57 | * virt_to_phys - map virtual addresses to physical | ||
58 | * @address: address to remap | ||
59 | * | ||
60 | * The returned physical address is the physical (CPU) mapping for | ||
61 | * the memory address given. It is only valid to use this function on | ||
62 | * addresses directly mapped or allocated via kmalloc. | ||
63 | * | ||
64 | * This function does not give bus mappings for DMA transfers. In | ||
65 | * almost all conceivable cases a device driver should not be using | ||
66 | * this function | ||
67 | */ | ||
68 | |||
69 | static inline unsigned long virt_to_phys(volatile void *address) | ||
70 | { | ||
71 | return __pa(address); | ||
72 | } | ||
73 | |||
74 | /** | ||
75 | * phys_to_virt - map physical address to virtual | ||
76 | * @address: address to remap | ||
77 | * | ||
78 | * The returned virtual address is a current CPU mapping for | ||
79 | * the memory address given. It is only valid to use this function on | ||
80 | * addresses that have a kernel mapping | ||
81 | * | ||
82 | * This function does not handle bus mappings for DMA transfers. In | ||
83 | * almost all conceivable cases a device driver should not be using | ||
84 | * this function | ||
85 | */ | ||
86 | |||
87 | static inline void *phys_to_virt(unsigned long address) | ||
88 | { | ||
89 | return __va(address); | ||
90 | } | ||
91 | |||
92 | /* | ||
93 | * Change "struct page" to physical address. | ||
94 | */ | ||
95 | #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) | ||
96 | |||
97 | /** | ||
98 | * ioremap - map bus memory into CPU space | ||
99 | * @offset: bus address of the memory | ||
100 | * @size: size of the resource to map | ||
101 | * | ||
102 | * ioremap performs a platform specific sequence of operations to | ||
103 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | ||
104 | * writew/writel functions and the other mmio helpers. The returned | ||
105 | * address is not guaranteed to be usable directly as a virtual | ||
106 | * address. | ||
107 | * | ||
108 | * If the area you are trying to map is a PCI BAR you should have a | ||
109 | * look at pci_iomap(). | ||
110 | */ | ||
111 | extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); | ||
112 | extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); | ||
113 | extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, | ||
114 | unsigned long prot_val); | ||
115 | |||
116 | /* | ||
117 | * The default ioremap() behavior is non-cached: | ||
118 | */ | ||
119 | static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) | ||
120 | { | ||
121 | return ioremap_nocache(offset, size); | ||
122 | } | ||
123 | |||
124 | extern void iounmap(volatile void __iomem *addr); | ||
125 | |||
126 | /* | ||
127 | * ISA I/O bus memory addresses are 1:1 with the physical address. | ||
128 | */ | ||
129 | #define isa_virt_to_bus virt_to_phys | ||
130 | #define isa_page_to_bus page_to_phys | ||
131 | #define isa_bus_to_virt phys_to_virt | ||
132 | |||
133 | /* | ||
134 | * However PCI ones are not necessarily 1:1 and therefore these interfaces | ||
135 | * are forbidden in portable PCI drivers. | ||
136 | * | ||
137 | * Allow them on x86 for legacy drivers, though. | ||
138 | */ | ||
139 | #define virt_to_bus virt_to_phys | ||
140 | #define bus_to_virt phys_to_virt | ||
141 | |||
142 | static inline void | 54 | static inline void |
143 | memset_io(volatile void __iomem *addr, unsigned char val, int count) | 55 | memset_io(volatile void __iomem *addr, unsigned char val, int count) |
144 | { | 56 | { |
diff --git a/arch/x86/include/asm/io_64.h b/arch/x86/include/asm/io_64.h index 563c16270ba6..244067893af4 100644 --- a/arch/x86/include/asm/io_64.h +++ b/arch/x86/include/asm/io_64.h | |||
@@ -136,73 +136,12 @@ __OUTS(b) | |||
136 | __OUTS(w) | 136 | __OUTS(w) |
137 | __OUTS(l) | 137 | __OUTS(l) |
138 | 138 | ||
139 | #define IO_SPACE_LIMIT 0xffff | ||
140 | |||
141 | #if defined(__KERNEL__) && defined(__x86_64__) | 139 | #if defined(__KERNEL__) && defined(__x86_64__) |
142 | 140 | ||
143 | #include <linux/vmalloc.h> | 141 | #include <linux/vmalloc.h> |
144 | 142 | ||
145 | #ifndef __i386__ | ||
146 | /* | ||
147 | * Change virtual addresses to physical addresses and vv. | ||
148 | * These are pretty trivial | ||
149 | */ | ||
150 | static inline unsigned long virt_to_phys(volatile void *address) | ||
151 | { | ||
152 | return __pa(address); | ||
153 | } | ||
154 | |||
155 | static inline void *phys_to_virt(unsigned long address) | ||
156 | { | ||
157 | return __va(address); | ||
158 | } | ||
159 | #endif | ||
160 | |||
161 | /* | ||
162 | * Change "struct page" to physical address. | ||
163 | */ | ||
164 | #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) | ||
165 | |||
166 | #include <asm-generic/iomap.h> | 143 | #include <asm-generic/iomap.h> |
167 | 144 | ||
168 | /* | ||
169 | * This one maps high address device memory and turns off caching for that area. | ||
170 | * it's useful if some control registers are in such an area and write combining | ||
171 | * or read caching is not desirable: | ||
172 | */ | ||
173 | extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size); | ||
174 | extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size); | ||
175 | extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size, | ||
176 | unsigned long prot_val); | ||
177 | |||
178 | /* | ||
179 | * The default ioremap() behavior is non-cached: | ||
180 | */ | ||
181 | static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) | ||
182 | { | ||
183 | return ioremap_nocache(offset, size); | ||
184 | } | ||
185 | |||
186 | extern void iounmap(volatile void __iomem *addr); | ||
187 | |||
188 | extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); | ||
189 | |||
190 | /* | ||
191 | * ISA I/O bus memory addresses are 1:1 with the physical address. | ||
192 | */ | ||
193 | #define isa_virt_to_bus virt_to_phys | ||
194 | #define isa_page_to_bus page_to_phys | ||
195 | #define isa_bus_to_virt phys_to_virt | ||
196 | |||
197 | /* | ||
198 | * However PCI ones are not necessarily 1:1 and therefore these interfaces | ||
199 | * are forbidden in portable PCI drivers. | ||
200 | * | ||
201 | * Allow them on x86 for legacy drivers, though. | ||
202 | */ | ||
203 | #define virt_to_bus virt_to_phys | ||
204 | #define bus_to_virt phys_to_virt | ||
205 | |||
206 | void __memcpy_fromio(void *, unsigned long, unsigned); | 145 | void __memcpy_fromio(void *, unsigned long, unsigned); |
207 | void __memcpy_toio(unsigned long, const void *, unsigned); | 146 | void __memcpy_toio(unsigned long, const void *, unsigned); |
208 | 147 | ||
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 7a1f44ac1f17..59cb4a1317b7 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h | |||
@@ -114,38 +114,16 @@ struct IR_IO_APIC_route_entry { | |||
114 | extern int nr_ioapics; | 114 | extern int nr_ioapics; |
115 | extern int nr_ioapic_registers[MAX_IO_APICS]; | 115 | extern int nr_ioapic_registers[MAX_IO_APICS]; |
116 | 116 | ||
117 | /* | ||
118 | * MP-BIOS irq configuration table structures: | ||
119 | */ | ||
120 | |||
121 | #define MP_MAX_IOAPIC_PIN 127 | 117 | #define MP_MAX_IOAPIC_PIN 127 |
122 | 118 | ||
123 | struct mp_config_ioapic { | ||
124 | unsigned long mp_apicaddr; | ||
125 | unsigned int mp_apicid; | ||
126 | unsigned char mp_type; | ||
127 | unsigned char mp_apicver; | ||
128 | unsigned char mp_flags; | ||
129 | }; | ||
130 | |||
131 | struct mp_config_intsrc { | ||
132 | unsigned int mp_dstapic; | ||
133 | unsigned char mp_type; | ||
134 | unsigned char mp_irqtype; | ||
135 | unsigned short mp_irqflag; | ||
136 | unsigned char mp_srcbus; | ||
137 | unsigned char mp_srcbusirq; | ||
138 | unsigned char mp_dstirq; | ||
139 | }; | ||
140 | |||
141 | /* I/O APIC entries */ | 119 | /* I/O APIC entries */ |
142 | extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; | 120 | extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; |
143 | 121 | ||
144 | /* # of MP IRQ source entries */ | 122 | /* # of MP IRQ source entries */ |
145 | extern int mp_irq_entries; | 123 | extern int mp_irq_entries; |
146 | 124 | ||
147 | /* MP IRQ source entries */ | 125 | /* MP IRQ source entries */ |
148 | extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; | 126 | extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
149 | 127 | ||
150 | /* non-0 if default (table-less) MP configuration */ | 128 | /* non-0 if default (table-less) MP configuration */ |
151 | extern int mpc_default_type; | 129 | extern int mpc_default_type; |
@@ -165,15 +143,6 @@ extern int noioapicreroute; | |||
165 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ | 143 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ |
166 | extern int timer_through_8259; | 144 | extern int timer_through_8259; |
167 | 145 | ||
168 | static inline void disable_ioapic_setup(void) | ||
169 | { | ||
170 | #ifdef CONFIG_PCI | ||
171 | noioapicquirk = 1; | ||
172 | noioapicreroute = -1; | ||
173 | #endif | ||
174 | skip_ioapic_setup = 1; | ||
175 | } | ||
176 | |||
177 | /* | 146 | /* |
178 | * If we use the IO-APIC for IRQ routing, disable automatic | 147 | * If we use the IO-APIC for IRQ routing, disable automatic |
179 | * assignment of PCI IRQ's. | 148 | * assignment of PCI IRQ's. |
@@ -200,6 +169,12 @@ extern void reinit_intr_remapped_IO_APIC(int); | |||
200 | 169 | ||
201 | extern void probe_nr_irqs_gsi(void); | 170 | extern void probe_nr_irqs_gsi(void); |
202 | 171 | ||
172 | extern int setup_ioapic_entry(int apic, int irq, | ||
173 | struct IO_APIC_route_entry *entry, | ||
174 | unsigned int destination, int trigger, | ||
175 | int polarity, int vector); | ||
176 | extern void ioapic_write_entry(int apic, int pin, | ||
177 | struct IO_APIC_route_entry e); | ||
203 | #else /* !CONFIG_X86_IO_APIC */ | 178 | #else /* !CONFIG_X86_IO_APIC */ |
204 | #define io_apic_assign_pci_irqs 0 | 179 | #define io_apic_assign_pci_irqs 0 |
205 | static const int timer_through_8259 = 0; | 180 | static const int timer_through_8259 = 0; |
diff --git a/arch/x86/include/asm/ipi.h b/arch/x86/include/asm/ipi.h index c745a306f7d3..0b7228268a63 100644 --- a/arch/x86/include/asm/ipi.h +++ b/arch/x86/include/asm/ipi.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef _ASM_X86_IPI_H | 1 | #ifndef _ASM_X86_IPI_H |
2 | #define _ASM_X86_IPI_H | 2 | #define _ASM_X86_IPI_H |
3 | 3 | ||
4 | #ifdef CONFIG_X86_LOCAL_APIC | ||
5 | |||
4 | /* | 6 | /* |
5 | * Copyright 2004 James Cleverdon, IBM. | 7 | * Copyright 2004 James Cleverdon, IBM. |
6 | * Subject to the GNU Public License, v.2 | 8 | * Subject to the GNU Public License, v.2 |
@@ -55,8 +57,8 @@ static inline void __xapic_wait_icr_idle(void) | |||
55 | cpu_relax(); | 57 | cpu_relax(); |
56 | } | 58 | } |
57 | 59 | ||
58 | static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, | 60 | static inline void |
59 | unsigned int dest) | 61 | __default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest) |
60 | { | 62 | { |
61 | /* | 63 | /* |
62 | * Subtle. In the case of the 'never do double writes' workaround | 64 | * Subtle. In the case of the 'never do double writes' workaround |
@@ -87,8 +89,8 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, | |||
87 | * This is used to send an IPI with no shorthand notation (the destination is | 89 | * This is used to send an IPI with no shorthand notation (the destination is |
88 | * specified in bits 56 to 63 of the ICR). | 90 | * specified in bits 56 to 63 of the ICR). |
89 | */ | 91 | */ |
90 | static inline void __send_IPI_dest_field(unsigned int mask, int vector, | 92 | static inline void |
91 | unsigned int dest) | 93 | __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest) |
92 | { | 94 | { |
93 | unsigned long cfg; | 95 | unsigned long cfg; |
94 | 96 | ||
@@ -117,41 +119,44 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector, | |||
117 | native_apic_mem_write(APIC_ICR, cfg); | 119 | native_apic_mem_write(APIC_ICR, cfg); |
118 | } | 120 | } |
119 | 121 | ||
120 | static inline void send_IPI_mask_sequence(const struct cpumask *mask, | 122 | extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, |
121 | int vector) | 123 | int vector); |
122 | { | 124 | extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, |
123 | unsigned long flags; | 125 | int vector); |
124 | unsigned long query_cpu; | 126 | extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, |
127 | int vector); | ||
128 | extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, | ||
129 | int vector); | ||
125 | 130 | ||
126 | /* | 131 | /* Avoid include hell */ |
127 | * Hack. The clustered APIC addressing mode doesn't allow us to send | 132 | #define NMI_VECTOR 0x02 |
128 | * to an arbitrary mask, so I do a unicast to each CPU instead. | 133 | |
129 | * - mbligh | 134 | extern int no_broadcast; |
130 | */ | 135 | |
131 | local_irq_save(flags); | 136 | static inline void __default_local_send_IPI_allbutself(int vector) |
132 | for_each_cpu(query_cpu, mask) { | 137 | { |
133 | __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu), | 138 | if (no_broadcast || vector == NMI_VECTOR) |
134 | vector, APIC_DEST_PHYSICAL); | 139 | apic->send_IPI_mask_allbutself(cpu_online_mask, vector); |
135 | } | 140 | else |
136 | local_irq_restore(flags); | 141 | __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical); |
137 | } | 142 | } |
138 | 143 | ||
139 | static inline void send_IPI_mask_allbutself(const struct cpumask *mask, | 144 | static inline void __default_local_send_IPI_all(int vector) |
140 | int vector) | ||
141 | { | 145 | { |
142 | unsigned long flags; | 146 | if (no_broadcast || vector == NMI_VECTOR) |
143 | unsigned int query_cpu; | 147 | apic->send_IPI_mask(cpu_online_mask, vector); |
144 | unsigned int this_cpu = smp_processor_id(); | 148 | else |
145 | 149 | __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical); | |
146 | /* See Hack comment above */ | ||
147 | |||
148 | local_irq_save(flags); | ||
149 | for_each_cpu(query_cpu, mask) | ||
150 | if (query_cpu != this_cpu) | ||
151 | __send_IPI_dest_field( | ||
152 | per_cpu(x86_cpu_to_apicid, query_cpu), | ||
153 | vector, APIC_DEST_PHYSICAL); | ||
154 | local_irq_restore(flags); | ||
155 | } | 150 | } |
156 | 151 | ||
152 | #ifdef CONFIG_X86_32 | ||
153 | extern void default_send_IPI_mask_logical(const struct cpumask *mask, | ||
154 | int vector); | ||
155 | extern void default_send_IPI_allbutself(int vector); | ||
156 | extern void default_send_IPI_all(int vector); | ||
157 | extern void default_send_IPI_self(int vector); | ||
158 | #endif | ||
159 | |||
160 | #endif | ||
161 | |||
157 | #endif /* _ASM_X86_IPI_H */ | 162 | #endif /* _ASM_X86_IPI_H */ |
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h index 592688ed04d3..107eb2196691 100644 --- a/arch/x86/include/asm/irq.h +++ b/arch/x86/include/asm/irq.h | |||
@@ -36,9 +36,11 @@ static inline int irq_canonicalize(int irq) | |||
36 | extern void fixup_irqs(void); | 36 | extern void fixup_irqs(void); |
37 | #endif | 37 | #endif |
38 | 38 | ||
39 | extern unsigned int do_IRQ(struct pt_regs *regs); | ||
40 | extern void init_IRQ(void); | 39 | extern void init_IRQ(void); |
41 | extern void native_init_IRQ(void); | 40 | extern void native_init_IRQ(void); |
41 | extern bool handle_irq(unsigned irq, struct pt_regs *regs); | ||
42 | |||
43 | extern unsigned int do_IRQ(struct pt_regs *regs); | ||
42 | 44 | ||
43 | /* Interrupt vector management */ | 45 | /* Interrupt vector management */ |
44 | extern DECLARE_BITMAP(used_vectors, NR_VECTORS); | 46 | extern DECLARE_BITMAP(used_vectors, NR_VECTORS); |
diff --git a/arch/x86/include/asm/irq_regs.h b/arch/x86/include/asm/irq_regs.h index 89c898ab298b..77843225b7ea 100644 --- a/arch/x86/include/asm/irq_regs.h +++ b/arch/x86/include/asm/irq_regs.h | |||
@@ -1,5 +1,31 @@ | |||
1 | #ifdef CONFIG_X86_32 | 1 | /* |
2 | # include "irq_regs_32.h" | 2 | * Per-cpu current frame pointer - the location of the last exception frame on |
3 | #else | 3 | * the stack, stored in the per-cpu area. |
4 | # include "irq_regs_64.h" | 4 | * |
5 | #endif | 5 | * Jeremy Fitzhardinge <jeremy@goop.org> |
6 | */ | ||
7 | #ifndef _ASM_X86_IRQ_REGS_H | ||
8 | #define _ASM_X86_IRQ_REGS_H | ||
9 | |||
10 | #include <asm/percpu.h> | ||
11 | |||
12 | #define ARCH_HAS_OWN_IRQ_REGS | ||
13 | |||
14 | DECLARE_PER_CPU(struct pt_regs *, irq_regs); | ||
15 | |||
16 | static inline struct pt_regs *get_irq_regs(void) | ||
17 | { | ||
18 | return percpu_read(irq_regs); | ||
19 | } | ||
20 | |||
21 | static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs) | ||
22 | { | ||
23 | struct pt_regs *old_regs; | ||
24 | |||
25 | old_regs = get_irq_regs(); | ||
26 | percpu_write(irq_regs, new_regs); | ||
27 | |||
28 | return old_regs; | ||
29 | } | ||
30 | |||
31 | #endif /* _ASM_X86_IRQ_REGS_32_H */ | ||
diff --git a/arch/x86/include/asm/irq_regs_32.h b/arch/x86/include/asm/irq_regs_32.h deleted file mode 100644 index 86afd7473457..000000000000 --- a/arch/x86/include/asm/irq_regs_32.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * Per-cpu current frame pointer - the location of the last exception frame on | ||
3 | * the stack, stored in the per-cpu area. | ||
4 | * | ||
5 | * Jeremy Fitzhardinge <jeremy@goop.org> | ||
6 | */ | ||
7 | #ifndef _ASM_X86_IRQ_REGS_32_H | ||
8 | #define _ASM_X86_IRQ_REGS_32_H | ||
9 | |||
10 | #include <asm/percpu.h> | ||
11 | |||
12 | #define ARCH_HAS_OWN_IRQ_REGS | ||
13 | |||
14 | DECLARE_PER_CPU(struct pt_regs *, irq_regs); | ||
15 | |||
16 | static inline struct pt_regs *get_irq_regs(void) | ||
17 | { | ||
18 | return x86_read_percpu(irq_regs); | ||
19 | } | ||
20 | |||
21 | static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs) | ||
22 | { | ||
23 | struct pt_regs *old_regs; | ||
24 | |||
25 | old_regs = get_irq_regs(); | ||
26 | x86_write_percpu(irq_regs, new_regs); | ||
27 | |||
28 | return old_regs; | ||
29 | } | ||
30 | |||
31 | #endif /* _ASM_X86_IRQ_REGS_32_H */ | ||
diff --git a/arch/x86/include/asm/irq_regs_64.h b/arch/x86/include/asm/irq_regs_64.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/arch/x86/include/asm/irq_regs_64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/irq_regs.h> | ||
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h index f7ff65032b9d..8a285f356f8a 100644 --- a/arch/x86/include/asm/irq_vectors.h +++ b/arch/x86/include/asm/irq_vectors.h | |||
@@ -1,47 +1,69 @@ | |||
1 | #ifndef _ASM_X86_IRQ_VECTORS_H | 1 | #ifndef _ASM_X86_IRQ_VECTORS_H |
2 | #define _ASM_X86_IRQ_VECTORS_H | 2 | #define _ASM_X86_IRQ_VECTORS_H |
3 | 3 | ||
4 | #include <linux/threads.h> | 4 | /* |
5 | * Linux IRQ vector layout. | ||
6 | * | ||
7 | * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can | ||
8 | * be defined by Linux. They are used as a jump table by the CPU when a | ||
9 | * given vector is triggered - by a CPU-external, CPU-internal or | ||
10 | * software-triggered event. | ||
11 | * | ||
12 | * Linux sets the kernel code address each entry jumps to early during | ||
13 | * bootup, and never changes them. This is the general layout of the | ||
14 | * IDT entries: | ||
15 | * | ||
16 | * Vectors 0 ... 31 : system traps and exceptions - hardcoded events | ||
17 | * Vectors 32 ... 127 : device interrupts | ||
18 | * Vector 128 : legacy int80 syscall interface | ||
19 | * Vectors 129 ... 237 : device interrupts | ||
20 | * Vectors 238 ... 255 : special interrupts | ||
21 | * | ||
22 | * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table. | ||
23 | * | ||
24 | * This file enumerates the exact layout of them: | ||
25 | */ | ||
5 | 26 | ||
6 | #define NMI_VECTOR 0x02 | 27 | #define NMI_VECTOR 0x02 |
7 | 28 | ||
8 | /* | 29 | /* |
9 | * IDT vectors usable for external interrupt sources start | 30 | * IDT vectors usable for external interrupt sources start |
10 | * at 0x20: | 31 | * at 0x20: |
11 | */ | 32 | */ |
12 | #define FIRST_EXTERNAL_VECTOR 0x20 | 33 | #define FIRST_EXTERNAL_VECTOR 0x20 |
13 | 34 | ||
14 | #ifdef CONFIG_X86_32 | 35 | #ifdef CONFIG_X86_32 |
15 | # define SYSCALL_VECTOR 0x80 | 36 | # define SYSCALL_VECTOR 0x80 |
16 | #else | 37 | #else |
17 | # define IA32_SYSCALL_VECTOR 0x80 | 38 | # define IA32_SYSCALL_VECTOR 0x80 |
18 | #endif | 39 | #endif |
19 | 40 | ||
20 | /* | 41 | /* |
21 | * Reserve the lowest usable priority level 0x20 - 0x2f for triggering | 42 | * Reserve the lowest usable priority level 0x20 - 0x2f for triggering |
22 | * cleanup after irq migration. | 43 | * cleanup after irq migration. |
23 | */ | 44 | */ |
24 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR | 45 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR |
25 | 46 | ||
26 | /* | 47 | /* |
27 | * Vectors 0x30-0x3f are used for ISA interrupts. | 48 | * Vectors 0x30-0x3f are used for ISA interrupts. |
28 | */ | 49 | */ |
29 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) | 50 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) |
30 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) | 51 | |
31 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) | 52 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) |
32 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) | 53 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) |
33 | #define IRQ4_VECTOR (IRQ0_VECTOR + 4) | 54 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) |
34 | #define IRQ5_VECTOR (IRQ0_VECTOR + 5) | 55 | #define IRQ4_VECTOR (IRQ0_VECTOR + 4) |
35 | #define IRQ6_VECTOR (IRQ0_VECTOR + 6) | 56 | #define IRQ5_VECTOR (IRQ0_VECTOR + 5) |
36 | #define IRQ7_VECTOR (IRQ0_VECTOR + 7) | 57 | #define IRQ6_VECTOR (IRQ0_VECTOR + 6) |
37 | #define IRQ8_VECTOR (IRQ0_VECTOR + 8) | 58 | #define IRQ7_VECTOR (IRQ0_VECTOR + 7) |
38 | #define IRQ9_VECTOR (IRQ0_VECTOR + 9) | 59 | #define IRQ8_VECTOR (IRQ0_VECTOR + 8) |
39 | #define IRQ10_VECTOR (IRQ0_VECTOR + 10) | 60 | #define IRQ9_VECTOR (IRQ0_VECTOR + 9) |
40 | #define IRQ11_VECTOR (IRQ0_VECTOR + 11) | 61 | #define IRQ10_VECTOR (IRQ0_VECTOR + 10) |
41 | #define IRQ12_VECTOR (IRQ0_VECTOR + 12) | 62 | #define IRQ11_VECTOR (IRQ0_VECTOR + 11) |
42 | #define IRQ13_VECTOR (IRQ0_VECTOR + 13) | 63 | #define IRQ12_VECTOR (IRQ0_VECTOR + 12) |
43 | #define IRQ14_VECTOR (IRQ0_VECTOR + 14) | 64 | #define IRQ13_VECTOR (IRQ0_VECTOR + 13) |
44 | #define IRQ15_VECTOR (IRQ0_VECTOR + 15) | 65 | #define IRQ14_VECTOR (IRQ0_VECTOR + 14) |
66 | #define IRQ15_VECTOR (IRQ0_VECTOR + 15) | ||
45 | 67 | ||
46 | /* | 68 | /* |
47 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff | 69 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff |
@@ -49,119 +71,98 @@ | |||
49 | * some of the following vectors are 'rare', they are merged | 71 | * some of the following vectors are 'rare', they are merged |
50 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. | 72 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. |
51 | * TLB, reschedule and local APIC vectors are performance-critical. | 73 | * TLB, reschedule and local APIC vectors are performance-critical. |
52 | * | ||
53 | * Vectors 0xf0-0xfa are free (reserved for future Linux use). | ||
54 | */ | 74 | */ |
55 | #ifdef CONFIG_X86_32 | ||
56 | |||
57 | # define SPURIOUS_APIC_VECTOR 0xff | ||
58 | # define ERROR_APIC_VECTOR 0xfe | ||
59 | # define INVALIDATE_TLB_VECTOR 0xfd | ||
60 | # define RESCHEDULE_VECTOR 0xfc | ||
61 | # define CALL_FUNCTION_VECTOR 0xfb | ||
62 | # define CALL_FUNCTION_SINGLE_VECTOR 0xfa | ||
63 | # define THERMAL_APIC_VECTOR 0xf0 | ||
64 | |||
65 | #else | ||
66 | 75 | ||
67 | #define SPURIOUS_APIC_VECTOR 0xff | 76 | #define SPURIOUS_APIC_VECTOR 0xff |
77 | /* | ||
78 | * Sanity check | ||
79 | */ | ||
80 | #if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F) | ||
81 | # error SPURIOUS_APIC_VECTOR definition error | ||
82 | #endif | ||
83 | |||
68 | #define ERROR_APIC_VECTOR 0xfe | 84 | #define ERROR_APIC_VECTOR 0xfe |
69 | #define RESCHEDULE_VECTOR 0xfd | 85 | #define RESCHEDULE_VECTOR 0xfd |
70 | #define CALL_FUNCTION_VECTOR 0xfc | 86 | #define CALL_FUNCTION_VECTOR 0xfc |
71 | #define CALL_FUNCTION_SINGLE_VECTOR 0xfb | 87 | #define CALL_FUNCTION_SINGLE_VECTOR 0xfb |
72 | #define THERMAL_APIC_VECTOR 0xfa | 88 | #define THERMAL_APIC_VECTOR 0xfa |
73 | #define THRESHOLD_APIC_VECTOR 0xf9 | ||
74 | #define UV_BAU_MESSAGE 0xf8 | ||
75 | #define INVALIDATE_TLB_VECTOR_END 0xf7 | ||
76 | #define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */ | ||
77 | |||
78 | #define NUM_INVALIDATE_TLB_VECTORS 8 | ||
79 | 89 | ||
90 | #ifdef CONFIG_X86_32 | ||
91 | /* 0xf8 - 0xf9 : free */ | ||
92 | #else | ||
93 | # define THRESHOLD_APIC_VECTOR 0xf9 | ||
94 | # define UV_BAU_MESSAGE 0xf8 | ||
80 | #endif | 95 | #endif |
81 | 96 | ||
97 | /* f0-f7 used for spreading out TLB flushes: */ | ||
98 | #define INVALIDATE_TLB_VECTOR_END 0xf7 | ||
99 | #define INVALIDATE_TLB_VECTOR_START 0xf0 | ||
100 | #define NUM_INVALIDATE_TLB_VECTORS 8 | ||
101 | |||
82 | /* | 102 | /* |
83 | * Local APIC timer IRQ vector is on a different priority level, | 103 | * Local APIC timer IRQ vector is on a different priority level, |
84 | * to work around the 'lost local interrupt if more than 2 IRQ | 104 | * to work around the 'lost local interrupt if more than 2 IRQ |
85 | * sources per level' errata. | 105 | * sources per level' errata. |
86 | */ | 106 | */ |
87 | #define LOCAL_TIMER_VECTOR 0xef | 107 | #define LOCAL_TIMER_VECTOR 0xef |
108 | |||
109 | /* | ||
110 | * Performance monitoring interrupt vector: | ||
111 | */ | ||
112 | #define LOCAL_PERF_VECTOR 0xee | ||
88 | 113 | ||
89 | /* | 114 | /* |
90 | * First APIC vector available to drivers: (vectors 0x30-0xee) we | 115 | * First APIC vector available to drivers: (vectors 0x30-0xee) we |
91 | * start at 0x31(0x41) to spread out vectors evenly between priority | 116 | * start at 0x31(0x41) to spread out vectors evenly between priority |
92 | * levels. (0x80 is the syscall vector) | 117 | * levels. (0x80 is the syscall vector) |
93 | */ | 118 | */ |
94 | #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) | 119 | #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) |
95 | |||
96 | #define NR_VECTORS 256 | ||
97 | 120 | ||
98 | #define FPU_IRQ 13 | 121 | #define NR_VECTORS 256 |
99 | 122 | ||
100 | #define FIRST_VM86_IRQ 3 | 123 | #define FPU_IRQ 13 |
101 | #define LAST_VM86_IRQ 15 | ||
102 | #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) | ||
103 | 124 | ||
104 | #define NR_IRQS_LEGACY 16 | 125 | #define FIRST_VM86_IRQ 3 |
126 | #define LAST_VM86_IRQ 15 | ||
105 | 127 | ||
106 | #if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER) | 128 | #ifndef __ASSEMBLY__ |
107 | 129 | static inline int invalid_vm86_irq(int irq) | |
108 | #ifndef CONFIG_SPARSE_IRQ | 130 | { |
109 | # if NR_CPUS < MAX_IO_APICS | 131 | return irq < FIRST_VM86_IRQ || irq > LAST_VM86_IRQ; |
110 | # define NR_IRQS (NR_VECTORS + (32 * NR_CPUS)) | 132 | } |
111 | # else | ||
112 | # define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) | ||
113 | # endif | ||
114 | #else | ||
115 | # if (8 * NR_CPUS) > (32 * MAX_IO_APICS) | ||
116 | # define NR_IRQS (NR_VECTORS + (8 * NR_CPUS)) | ||
117 | # else | ||
118 | # define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) | ||
119 | # endif | ||
120 | #endif | 133 | #endif |
121 | 134 | ||
122 | #elif defined(CONFIG_X86_VOYAGER) | 135 | /* |
123 | 136 | * Size the maximum number of interrupts. | |
124 | # define NR_IRQS 224 | 137 | * |
138 | * If the irq_desc[] array has a sparse layout, we can size things | ||
139 | * generously - it scales up linearly with the maximum number of CPUs, | ||
140 | * and the maximum number of IO-APICs, whichever is higher. | ||
141 | * | ||
142 | * In other cases we size more conservatively, to not create too large | ||
143 | * static arrays. | ||
144 | */ | ||
125 | 145 | ||
126 | #else /* IO_APIC || VOYAGER */ | 146 | #define NR_IRQS_LEGACY 16 |
127 | 147 | ||
128 | # define NR_IRQS 16 | 148 | #define CPU_VECTOR_LIMIT ( 8 * NR_CPUS ) |
149 | #define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS ) | ||
129 | 150 | ||
151 | #ifdef CONFIG_X86_IO_APIC | ||
152 | # ifdef CONFIG_SPARSE_IRQ | ||
153 | # define NR_IRQS \ | ||
154 | (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \ | ||
155 | (NR_VECTORS + CPU_VECTOR_LIMIT) : \ | ||
156 | (NR_VECTORS + IO_APIC_VECTOR_LIMIT)) | ||
157 | # else | ||
158 | # if NR_CPUS < MAX_IO_APICS | ||
159 | # define NR_IRQS (NR_VECTORS + 4*CPU_VECTOR_LIMIT) | ||
160 | # else | ||
161 | # define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) | ||
162 | # endif | ||
163 | # endif | ||
164 | #else /* !CONFIG_X86_IO_APIC: */ | ||
165 | # define NR_IRQS NR_IRQS_LEGACY | ||
130 | #endif | 166 | #endif |
131 | 167 | ||
132 | /* Voyager specific defines */ | ||
133 | /* These define the CPIs we use in linux */ | ||
134 | #define VIC_CPI_LEVEL0 0 | ||
135 | #define VIC_CPI_LEVEL1 1 | ||
136 | /* now the fake CPIs */ | ||
137 | #define VIC_TIMER_CPI 2 | ||
138 | #define VIC_INVALIDATE_CPI 3 | ||
139 | #define VIC_RESCHEDULE_CPI 4 | ||
140 | #define VIC_ENABLE_IRQ_CPI 5 | ||
141 | #define VIC_CALL_FUNCTION_CPI 6 | ||
142 | #define VIC_CALL_FUNCTION_SINGLE_CPI 7 | ||
143 | |||
144 | /* Now the QIC CPIs: Since we don't need the two initial levels, | ||
145 | * these are 2 less than the VIC CPIs */ | ||
146 | #define QIC_CPI_OFFSET 1 | ||
147 | #define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) | ||
148 | #define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) | ||
149 | #define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) | ||
150 | #define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) | ||
151 | #define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) | ||
152 | #define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET) | ||
153 | |||
154 | #define VIC_START_FAKE_CPI VIC_TIMER_CPI | ||
155 | #define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI | ||
156 | |||
157 | /* this is the SYS_INT CPI. */ | ||
158 | #define VIC_SYS_INT 8 | ||
159 | #define VIC_CMN_INT 15 | ||
160 | |||
161 | /* This is the boot CPI for alternate processors. It gets overwritten | ||
162 | * by the above once the system has activated all available processors */ | ||
163 | #define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 | ||
164 | #define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) | ||
165 | |||
166 | |||
167 | #endif /* _ASM_X86_IRQ_VECTORS_H */ | 168 | #endif /* _ASM_X86_IRQ_VECTORS_H */ |
diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h index c61d8b2ab8b9..0ceb6d19ed30 100644 --- a/arch/x86/include/asm/kexec.h +++ b/arch/x86/include/asm/kexec.h | |||
@@ -9,23 +9,8 @@ | |||
9 | # define PAGES_NR 4 | 9 | # define PAGES_NR 4 |
10 | #else | 10 | #else |
11 | # define PA_CONTROL_PAGE 0 | 11 | # define PA_CONTROL_PAGE 0 |
12 | # define VA_CONTROL_PAGE 1 | 12 | # define PA_TABLE_PAGE 1 |
13 | # define PA_PGD 2 | 13 | # define PAGES_NR 2 |
14 | # define VA_PGD 3 | ||
15 | # define PA_PUD_0 4 | ||
16 | # define VA_PUD_0 5 | ||
17 | # define PA_PMD_0 6 | ||
18 | # define VA_PMD_0 7 | ||
19 | # define PA_PTE_0 8 | ||
20 | # define VA_PTE_0 9 | ||
21 | # define PA_PUD_1 10 | ||
22 | # define VA_PUD_1 11 | ||
23 | # define PA_PMD_1 12 | ||
24 | # define VA_PMD_1 13 | ||
25 | # define PA_PTE_1 14 | ||
26 | # define VA_PTE_1 15 | ||
27 | # define PA_TABLE_PAGE 16 | ||
28 | # define PAGES_NR 17 | ||
29 | #endif | 14 | #endif |
30 | 15 | ||
31 | #ifdef CONFIG_X86_32 | 16 | #ifdef CONFIG_X86_32 |
@@ -157,9 +142,9 @@ relocate_kernel(unsigned long indirection_page, | |||
157 | unsigned long start_address) ATTRIB_NORET; | 142 | unsigned long start_address) ATTRIB_NORET; |
158 | #endif | 143 | #endif |
159 | 144 | ||
160 | #ifdef CONFIG_X86_32 | ||
161 | #define ARCH_HAS_KIMAGE_ARCH | 145 | #define ARCH_HAS_KIMAGE_ARCH |
162 | 146 | ||
147 | #ifdef CONFIG_X86_32 | ||
163 | struct kimage_arch { | 148 | struct kimage_arch { |
164 | pgd_t *pgd; | 149 | pgd_t *pgd; |
165 | #ifdef CONFIG_X86_PAE | 150 | #ifdef CONFIG_X86_PAE |
@@ -169,6 +154,12 @@ struct kimage_arch { | |||
169 | pte_t *pte0; | 154 | pte_t *pte0; |
170 | pte_t *pte1; | 155 | pte_t *pte1; |
171 | }; | 156 | }; |
157 | #else | ||
158 | struct kimage_arch { | ||
159 | pud_t *pud; | ||
160 | pmd_t *pmd; | ||
161 | pte_t *pte; | ||
162 | }; | ||
172 | #endif | 163 | #endif |
173 | 164 | ||
174 | #endif /* __ASSEMBLY__ */ | 165 | #endif /* __ASSEMBLY__ */ |
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h index 5d98d0b68ffc..9320e2a8a26a 100644 --- a/arch/x86/include/asm/linkage.h +++ b/arch/x86/include/asm/linkage.h | |||
@@ -52,70 +52,14 @@ | |||
52 | 52 | ||
53 | #endif | 53 | #endif |
54 | 54 | ||
55 | #define GLOBAL(name) \ | ||
56 | .globl name; \ | ||
57 | name: | ||
58 | |||
55 | #ifdef CONFIG_X86_ALIGNMENT_16 | 59 | #ifdef CONFIG_X86_ALIGNMENT_16 |
56 | #define __ALIGN .align 16,0x90 | 60 | #define __ALIGN .align 16,0x90 |
57 | #define __ALIGN_STR ".align 16,0x90" | 61 | #define __ALIGN_STR ".align 16,0x90" |
58 | #endif | 62 | #endif |
59 | 63 | ||
60 | /* | ||
61 | * to check ENTRY_X86/END_X86 and | ||
62 | * KPROBE_ENTRY_X86/KPROBE_END_X86 | ||
63 | * unbalanced-missed-mixed appearance | ||
64 | */ | ||
65 | #define __set_entry_x86 .set ENTRY_X86_IN, 0 | ||
66 | #define __unset_entry_x86 .set ENTRY_X86_IN, 1 | ||
67 | #define __set_kprobe_x86 .set KPROBE_X86_IN, 0 | ||
68 | #define __unset_kprobe_x86 .set KPROBE_X86_IN, 1 | ||
69 | |||
70 | #define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed" | ||
71 | |||
72 | #define __check_entry_x86 \ | ||
73 | .ifdef ENTRY_X86_IN; \ | ||
74 | .ifeq ENTRY_X86_IN; \ | ||
75 | __macro_err_x86; \ | ||
76 | .abort; \ | ||
77 | .endif; \ | ||
78 | .endif | ||
79 | |||
80 | #define __check_kprobe_x86 \ | ||
81 | .ifdef KPROBE_X86_IN; \ | ||
82 | .ifeq KPROBE_X86_IN; \ | ||
83 | __macro_err_x86; \ | ||
84 | .abort; \ | ||
85 | .endif; \ | ||
86 | .endif | ||
87 | |||
88 | #define __check_entry_kprobe_x86 \ | ||
89 | __check_entry_x86; \ | ||
90 | __check_kprobe_x86 | ||
91 | |||
92 | #define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86 | ||
93 | |||
94 | #define ENTRY_X86(name) \ | ||
95 | __check_entry_kprobe_x86; \ | ||
96 | __set_entry_x86; \ | ||
97 | .globl name; \ | ||
98 | __ALIGN; \ | ||
99 | name: | ||
100 | |||
101 | #define END_X86(name) \ | ||
102 | __unset_entry_x86; \ | ||
103 | __check_entry_kprobe_x86; \ | ||
104 | .size name, .-name | ||
105 | |||
106 | #define KPROBE_ENTRY_X86(name) \ | ||
107 | __check_entry_kprobe_x86; \ | ||
108 | __set_kprobe_x86; \ | ||
109 | .pushsection .kprobes.text, "ax"; \ | ||
110 | .globl name; \ | ||
111 | __ALIGN; \ | ||
112 | name: | ||
113 | |||
114 | #define KPROBE_END_X86(name) \ | ||
115 | __unset_kprobe_x86; \ | ||
116 | __check_entry_kprobe_x86; \ | ||
117 | .size name, .-name; \ | ||
118 | .popsection | ||
119 | |||
120 | #endif /* _ASM_X86_LINKAGE_H */ | 64 | #endif /* _ASM_X86_LINKAGE_H */ |
121 | 65 | ||
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h deleted file mode 100644 index cc09cbbee27e..000000000000 --- a/arch/x86/include/asm/mach-default/mach_apic.h +++ /dev/null | |||
@@ -1,168 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H | ||
2 | #define _ASM_X86_MACH_DEFAULT_MACH_APIC_H | ||
3 | |||
4 | #ifdef CONFIG_X86_LOCAL_APIC | ||
5 | |||
6 | #include <mach_apicdef.h> | ||
7 | #include <asm/smp.h> | ||
8 | |||
9 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
10 | |||
11 | static inline const struct cpumask *target_cpus(void) | ||
12 | { | ||
13 | #ifdef CONFIG_SMP | ||
14 | return cpu_online_mask; | ||
15 | #else | ||
16 | return cpumask_of(0); | ||
17 | #endif | ||
18 | } | ||
19 | |||
20 | #define NO_BALANCE_IRQ (0) | ||
21 | #define esr_disable (0) | ||
22 | |||
23 | #ifdef CONFIG_X86_64 | ||
24 | #include <asm/genapic.h> | ||
25 | #define INT_DELIVERY_MODE (genapic->int_delivery_mode) | ||
26 | #define INT_DEST_MODE (genapic->int_dest_mode) | ||
27 | #define TARGET_CPUS (genapic->target_cpus()) | ||
28 | #define apic_id_registered (genapic->apic_id_registered) | ||
29 | #define init_apic_ldr (genapic->init_apic_ldr) | ||
30 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) | ||
31 | #define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and) | ||
32 | #define phys_pkg_id (genapic->phys_pkg_id) | ||
33 | #define vector_allocation_domain (genapic->vector_allocation_domain) | ||
34 | #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) | ||
35 | #define send_IPI_self (genapic->send_IPI_self) | ||
36 | #define wakeup_secondary_cpu (genapic->wakeup_cpu) | ||
37 | extern void setup_apic_routing(void); | ||
38 | #else | ||
39 | #define INT_DELIVERY_MODE dest_LowestPrio | ||
40 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ | ||
41 | #define TARGET_CPUS (target_cpus()) | ||
42 | #define wakeup_secondary_cpu wakeup_secondary_cpu_via_init | ||
43 | /* | ||
44 | * Set up the logical destination ID. | ||
45 | * | ||
46 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
47 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
48 | * document number 292116). So here it goes... | ||
49 | */ | ||
50 | static inline void init_apic_ldr(void) | ||
51 | { | ||
52 | unsigned long val; | ||
53 | |||
54 | apic_write(APIC_DFR, APIC_DFR_VALUE); | ||
55 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
56 | val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); | ||
57 | apic_write(APIC_LDR, val); | ||
58 | } | ||
59 | |||
60 | static inline int apic_id_registered(void) | ||
61 | { | ||
62 | return physid_isset(read_apic_id(), phys_cpu_present_map); | ||
63 | } | ||
64 | |||
65 | static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask) | ||
66 | { | ||
67 | return cpumask_bits(cpumask)[0]; | ||
68 | } | ||
69 | |||
70 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
71 | const struct cpumask *andmask) | ||
72 | { | ||
73 | unsigned long mask1 = cpumask_bits(cpumask)[0]; | ||
74 | unsigned long mask2 = cpumask_bits(andmask)[0]; | ||
75 | unsigned long mask3 = cpumask_bits(cpu_online_mask)[0]; | ||
76 | |||
77 | return (unsigned int)(mask1 & mask2 & mask3); | ||
78 | } | ||
79 | |||
80 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
81 | { | ||
82 | return cpuid_apic >> index_msb; | ||
83 | } | ||
84 | |||
85 | static inline void setup_apic_routing(void) | ||
86 | { | ||
87 | #ifdef CONFIG_X86_IO_APIC | ||
88 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | ||
89 | "Flat", nr_ioapics); | ||
90 | #endif | ||
91 | } | ||
92 | |||
93 | static inline int apicid_to_node(int logical_apicid) | ||
94 | { | ||
95 | #ifdef CONFIG_SMP | ||
96 | return apicid_2_node[hard_smp_processor_id()]; | ||
97 | #else | ||
98 | return 0; | ||
99 | #endif | ||
100 | } | ||
101 | |||
102 | static inline void vector_allocation_domain(int cpu, struct cpumask *retmask) | ||
103 | { | ||
104 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
105 | * specified in the interrupt destination when using lowest | ||
106 | * priority interrupt delivery mode. | ||
107 | * | ||
108 | * In particular there was a hyperthreading cpu observed to | ||
109 | * deliver interrupts to the wrong hyperthread when only one | ||
110 | * hyperthread was specified in the interrupt desitination. | ||
111 | */ | ||
112 | *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } }; | ||
113 | } | ||
114 | #endif | ||
115 | |||
116 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
117 | { | ||
118 | return physid_isset(apicid, bitmap); | ||
119 | } | ||
120 | |||
121 | static inline unsigned long check_apicid_present(int bit) | ||
122 | { | ||
123 | return physid_isset(bit, phys_cpu_present_map); | ||
124 | } | ||
125 | |||
126 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
127 | { | ||
128 | return phys_map; | ||
129 | } | ||
130 | |||
131 | static inline int multi_timer_check(int apic, int irq) | ||
132 | { | ||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | /* Mapping from cpu number to logical apicid */ | ||
137 | static inline int cpu_to_logical_apicid(int cpu) | ||
138 | { | ||
139 | return 1 << cpu; | ||
140 | } | ||
141 | |||
142 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
143 | { | ||
144 | if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) | ||
145 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
146 | else | ||
147 | return BAD_APICID; | ||
148 | } | ||
149 | |||
150 | static inline physid_mask_t apicid_to_cpu_present(int phys_apicid) | ||
151 | { | ||
152 | return physid_mask_of_physid(phys_apicid); | ||
153 | } | ||
154 | |||
155 | static inline void setup_portio_remap(void) | ||
156 | { | ||
157 | } | ||
158 | |||
159 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
160 | { | ||
161 | return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); | ||
162 | } | ||
163 | |||
164 | static inline void enable_apic_mode(void) | ||
165 | { | ||
166 | } | ||
167 | #endif /* CONFIG_X86_LOCAL_APIC */ | ||
168 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */ | ||
diff --git a/arch/x86/include/asm/mach-default/mach_apicdef.h b/arch/x86/include/asm/mach-default/mach_apicdef.h deleted file mode 100644 index 53179936d6c6..000000000000 --- a/arch/x86/include/asm/mach-default/mach_apicdef.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H | ||
2 | #define _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H | ||
3 | |||
4 | #include <asm/apic.h> | ||
5 | |||
6 | #ifdef CONFIG_X86_64 | ||
7 | #define APIC_ID_MASK (genapic->apic_id_mask) | ||
8 | #define GET_APIC_ID(x) (genapic->get_apic_id(x)) | ||
9 | #define SET_APIC_ID(x) (genapic->set_apic_id(x)) | ||
10 | #else | ||
11 | #define APIC_ID_MASK (0xF<<24) | ||
12 | static inline unsigned get_apic_id(unsigned long x) | ||
13 | { | ||
14 | unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); | ||
15 | if (APIC_XAPIC(ver)) | ||
16 | return (((x)>>24)&0xFF); | ||
17 | else | ||
18 | return (((x)>>24)&0xF); | ||
19 | } | ||
20 | |||
21 | #define GET_APIC_ID(x) get_apic_id(x) | ||
22 | #endif | ||
23 | |||
24 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H */ | ||
diff --git a/arch/x86/include/asm/mach-default/mach_ipi.h b/arch/x86/include/asm/mach-default/mach_ipi.h deleted file mode 100644 index 191312d155da..000000000000 --- a/arch/x86/include/asm/mach-default/mach_ipi.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_IPI_H | ||
2 | #define _ASM_X86_MACH_DEFAULT_MACH_IPI_H | ||
3 | |||
4 | /* Avoid include hell */ | ||
5 | #define NMI_VECTOR 0x02 | ||
6 | |||
7 | void send_IPI_mask_bitmask(const struct cpumask *mask, int vector); | ||
8 | void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); | ||
9 | void __send_IPI_shortcut(unsigned int shortcut, int vector); | ||
10 | |||
11 | extern int no_broadcast; | ||
12 | |||
13 | #ifdef CONFIG_X86_64 | ||
14 | #include <asm/genapic.h> | ||
15 | #define send_IPI_mask (genapic->send_IPI_mask) | ||
16 | #define send_IPI_mask_allbutself (genapic->send_IPI_mask_allbutself) | ||
17 | #else | ||
18 | static inline void send_IPI_mask(const struct cpumask *mask, int vector) | ||
19 | { | ||
20 | send_IPI_mask_bitmask(mask, vector); | ||
21 | } | ||
22 | void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); | ||
23 | #endif | ||
24 | |||
25 | static inline void __local_send_IPI_allbutself(int vector) | ||
26 | { | ||
27 | if (no_broadcast || vector == NMI_VECTOR) | ||
28 | send_IPI_mask_allbutself(cpu_online_mask, vector); | ||
29 | else | ||
30 | __send_IPI_shortcut(APIC_DEST_ALLBUT, vector); | ||
31 | } | ||
32 | |||
33 | static inline void __local_send_IPI_all(int vector) | ||
34 | { | ||
35 | if (no_broadcast || vector == NMI_VECTOR) | ||
36 | send_IPI_mask(cpu_online_mask, vector); | ||
37 | else | ||
38 | __send_IPI_shortcut(APIC_DEST_ALLINC, vector); | ||
39 | } | ||
40 | |||
41 | #ifdef CONFIG_X86_64 | ||
42 | #define send_IPI_allbutself (genapic->send_IPI_allbutself) | ||
43 | #define send_IPI_all (genapic->send_IPI_all) | ||
44 | #else | ||
45 | static inline void send_IPI_allbutself(int vector) | ||
46 | { | ||
47 | /* | ||
48 | * if there are no other CPUs in the system then we get an APIC send | ||
49 | * error if we try to broadcast, thus avoid sending IPIs in this case. | ||
50 | */ | ||
51 | if (!(num_online_cpus() > 1)) | ||
52 | return; | ||
53 | |||
54 | __local_send_IPI_allbutself(vector); | ||
55 | return; | ||
56 | } | ||
57 | |||
58 | static inline void send_IPI_all(int vector) | ||
59 | { | ||
60 | __local_send_IPI_all(vector); | ||
61 | } | ||
62 | #endif | ||
63 | |||
64 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_IPI_H */ | ||
diff --git a/arch/x86/include/asm/mach-default/mach_mpparse.h b/arch/x86/include/asm/mach-default/mach_mpparse.h deleted file mode 100644 index c70a263d68cd..000000000000 --- a/arch/x86/include/asm/mach-default/mach_mpparse.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H | ||
2 | #define _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H | ||
3 | |||
4 | static inline int | ||
5 | mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
6 | { | ||
7 | return 0; | ||
8 | } | ||
9 | |||
10 | /* Hook from generic ACPI tables.c */ | ||
11 | static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
12 | { | ||
13 | return 0; | ||
14 | } | ||
15 | |||
16 | |||
17 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H */ | ||
diff --git a/arch/x86/include/asm/mach-default/mach_mpspec.h b/arch/x86/include/asm/mach-default/mach_mpspec.h deleted file mode 100644 index e85ede686be8..000000000000 --- a/arch/x86/include/asm/mach-default/mach_mpspec.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H | ||
2 | #define _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H | ||
3 | |||
4 | #define MAX_IRQ_SOURCES 256 | ||
5 | |||
6 | #if CONFIG_BASE_SMALL == 0 | ||
7 | #define MAX_MP_BUSSES 256 | ||
8 | #else | ||
9 | #define MAX_MP_BUSSES 32 | ||
10 | #endif | ||
11 | |||
12 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H */ | ||
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h deleted file mode 100644 index 89897a6a65b9..000000000000 --- a/arch/x86/include/asm/mach-default/mach_wakecpu.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H | ||
2 | #define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H | ||
3 | |||
4 | #define TRAMPOLINE_PHYS_LOW (0x467) | ||
5 | #define TRAMPOLINE_PHYS_HIGH (0x469) | ||
6 | |||
7 | static inline void wait_for_init_deassert(atomic_t *deassert) | ||
8 | { | ||
9 | while (!atomic_read(deassert)) | ||
10 | cpu_relax(); | ||
11 | return; | ||
12 | } | ||
13 | |||
14 | /* Nothing to do for most platforms, since cleared by the INIT cycle */ | ||
15 | static inline void smp_callin_clear_local_apic(void) | ||
16 | { | ||
17 | } | ||
18 | |||
19 | static inline void store_NMI_vector(unsigned short *high, unsigned short *low) | ||
20 | { | ||
21 | } | ||
22 | |||
23 | static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) | ||
24 | { | ||
25 | } | ||
26 | |||
27 | #ifdef CONFIG_SMP | ||
28 | extern void __inquire_remote_apic(int apicid); | ||
29 | #else /* CONFIG_SMP */ | ||
30 | static inline void __inquire_remote_apic(int apicid) | ||
31 | { | ||
32 | } | ||
33 | #endif /* CONFIG_SMP */ | ||
34 | |||
35 | static inline void inquire_remote_apic(int apicid) | ||
36 | { | ||
37 | if (apic_verbosity >= APIC_DEBUG) | ||
38 | __inquire_remote_apic(apicid); | ||
39 | } | ||
40 | |||
41 | #endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */ | ||
diff --git a/arch/x86/include/asm/mach-generic/gpio.h b/arch/x86/include/asm/mach-generic/gpio.h deleted file mode 100644 index 995c45efdb33..000000000000 --- a/arch/x86/include/asm/mach-generic/gpio.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_GPIO_H | ||
2 | #define _ASM_X86_MACH_GENERIC_GPIO_H | ||
3 | |||
4 | int gpio_request(unsigned gpio, const char *label); | ||
5 | void gpio_free(unsigned gpio); | ||
6 | int gpio_direction_input(unsigned gpio); | ||
7 | int gpio_direction_output(unsigned gpio, int value); | ||
8 | int gpio_get_value(unsigned gpio); | ||
9 | void gpio_set_value(unsigned gpio, int value); | ||
10 | int gpio_to_irq(unsigned gpio); | ||
11 | int irq_to_gpio(unsigned irq); | ||
12 | |||
13 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | ||
14 | |||
15 | #endif /* _ASM_X86_MACH_GENERIC_GPIO_H */ | ||
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h deleted file mode 100644 index 48553e958ad5..000000000000 --- a/arch/x86/include/asm/mach-generic/mach_apic.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_MACH_APIC_H | ||
2 | #define _ASM_X86_MACH_GENERIC_MACH_APIC_H | ||
3 | |||
4 | #include <asm/genapic.h> | ||
5 | |||
6 | #define esr_disable (genapic->ESR_DISABLE) | ||
7 | #define NO_BALANCE_IRQ (genapic->no_balance_irq) | ||
8 | #define INT_DELIVERY_MODE (genapic->int_delivery_mode) | ||
9 | #define INT_DEST_MODE (genapic->int_dest_mode) | ||
10 | #undef APIC_DEST_LOGICAL | ||
11 | #define APIC_DEST_LOGICAL (genapic->apic_destination_logical) | ||
12 | #define TARGET_CPUS (genapic->target_cpus()) | ||
13 | #define apic_id_registered (genapic->apic_id_registered) | ||
14 | #define init_apic_ldr (genapic->init_apic_ldr) | ||
15 | #define ioapic_phys_id_map (genapic->ioapic_phys_id_map) | ||
16 | #define setup_apic_routing (genapic->setup_apic_routing) | ||
17 | #define multi_timer_check (genapic->multi_timer_check) | ||
18 | #define apicid_to_node (genapic->apicid_to_node) | ||
19 | #define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid) | ||
20 | #define cpu_present_to_apicid (genapic->cpu_present_to_apicid) | ||
21 | #define apicid_to_cpu_present (genapic->apicid_to_cpu_present) | ||
22 | #define setup_portio_remap (genapic->setup_portio_remap) | ||
23 | #define check_apicid_present (genapic->check_apicid_present) | ||
24 | #define check_phys_apicid_present (genapic->check_phys_apicid_present) | ||
25 | #define check_apicid_used (genapic->check_apicid_used) | ||
26 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) | ||
27 | #define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and) | ||
28 | #define vector_allocation_domain (genapic->vector_allocation_domain) | ||
29 | #define enable_apic_mode (genapic->enable_apic_mode) | ||
30 | #define phys_pkg_id (genapic->phys_pkg_id) | ||
31 | #define wakeup_secondary_cpu (genapic->wakeup_cpu) | ||
32 | |||
33 | extern void generic_bigsmp_probe(void); | ||
34 | |||
35 | #endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */ | ||
diff --git a/arch/x86/include/asm/mach-generic/mach_apicdef.h b/arch/x86/include/asm/mach-generic/mach_apicdef.h deleted file mode 100644 index 68041f3802f4..000000000000 --- a/arch/x86/include/asm/mach-generic/mach_apicdef.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_MACH_APICDEF_H | ||
2 | #define _ASM_X86_MACH_GENERIC_MACH_APICDEF_H | ||
3 | |||
4 | #ifndef APIC_DEFINITION | ||
5 | #include <asm/genapic.h> | ||
6 | |||
7 | #define GET_APIC_ID (genapic->get_apic_id) | ||
8 | #define APIC_ID_MASK (genapic->apic_id_mask) | ||
9 | #endif | ||
10 | |||
11 | #endif /* _ASM_X86_MACH_GENERIC_MACH_APICDEF_H */ | ||
diff --git a/arch/x86/include/asm/mach-generic/mach_ipi.h b/arch/x86/include/asm/mach-generic/mach_ipi.h deleted file mode 100644 index ffd637e3c3d9..000000000000 --- a/arch/x86/include/asm/mach-generic/mach_ipi.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_MACH_IPI_H | ||
2 | #define _ASM_X86_MACH_GENERIC_MACH_IPI_H | ||
3 | |||
4 | #include <asm/genapic.h> | ||
5 | |||
6 | #define send_IPI_mask (genapic->send_IPI_mask) | ||
7 | #define send_IPI_allbutself (genapic->send_IPI_allbutself) | ||
8 | #define send_IPI_all (genapic->send_IPI_all) | ||
9 | |||
10 | #endif /* _ASM_X86_MACH_GENERIC_MACH_IPI_H */ | ||
diff --git a/arch/x86/include/asm/mach-generic/mach_mpparse.h b/arch/x86/include/asm/mach-generic/mach_mpparse.h deleted file mode 100644 index 9444ab8dca94..000000000000 --- a/arch/x86/include/asm/mach-generic/mach_mpparse.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H | ||
2 | #define _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H | ||
3 | |||
4 | |||
5 | extern int mps_oem_check(struct mpc_table *, char *, char *); | ||
6 | |||
7 | extern int acpi_madt_oem_check(char *, char *); | ||
8 | |||
9 | #endif /* _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H */ | ||
diff --git a/arch/x86/include/asm/mach-generic/mach_mpspec.h b/arch/x86/include/asm/mach-generic/mach_mpspec.h deleted file mode 100644 index 3bc407226578..000000000000 --- a/arch/x86/include/asm/mach-generic/mach_mpspec.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H | ||
2 | #define _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H | ||
3 | |||
4 | #define MAX_IRQ_SOURCES 256 | ||
5 | |||
6 | /* Summit or generic (i.e. installer) kernels need lots of bus entries. */ | ||
7 | /* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */ | ||
8 | #define MAX_MP_BUSSES 260 | ||
9 | |||
10 | extern void numaq_mps_oem_check(struct mpc_table *, char *, char *); | ||
11 | |||
12 | #endif /* _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H */ | ||
diff --git a/arch/x86/include/asm/mach-generic/mach_wakecpu.h b/arch/x86/include/asm/mach-generic/mach_wakecpu.h deleted file mode 100644 index 1ab16b168c8a..000000000000 --- a/arch/x86/include/asm/mach-generic/mach_wakecpu.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H | ||
2 | #define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H | ||
3 | |||
4 | #define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low) | ||
5 | #define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high) | ||
6 | #define wait_for_init_deassert (genapic->wait_for_init_deassert) | ||
7 | #define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic) | ||
8 | #define store_NMI_vector (genapic->store_NMI_vector) | ||
9 | #define restore_NMI_vector (genapic->restore_NMI_vector) | ||
10 | #define inquire_remote_apic (genapic->inquire_remote_apic) | ||
11 | |||
12 | #endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */ | ||
diff --git a/arch/x86/include/asm/mach-rdc321x/gpio.h b/arch/x86/include/asm/mach-rdc321x/gpio.h deleted file mode 100644 index c210ab5788b0..000000000000 --- a/arch/x86/include/asm/mach-rdc321x/gpio.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MACH_RDC321X_GPIO_H | ||
2 | #define _ASM_X86_MACH_RDC321X_GPIO_H | ||
3 | |||
4 | #include <linux/kernel.h> | ||
5 | |||
6 | extern int rdc_gpio_get_value(unsigned gpio); | ||
7 | extern void rdc_gpio_set_value(unsigned gpio, int value); | ||
8 | extern int rdc_gpio_direction_input(unsigned gpio); | ||
9 | extern int rdc_gpio_direction_output(unsigned gpio, int value); | ||
10 | extern int rdc_gpio_request(unsigned gpio, const char *label); | ||
11 | extern void rdc_gpio_free(unsigned gpio); | ||
12 | extern void __init rdc321x_gpio_setup(void); | ||
13 | |||
14 | /* Wrappers for the arch-neutral GPIO API */ | ||
15 | |||
16 | static inline int gpio_request(unsigned gpio, const char *label) | ||
17 | { | ||
18 | return rdc_gpio_request(gpio, label); | ||
19 | } | ||
20 | |||
21 | static inline void gpio_free(unsigned gpio) | ||
22 | { | ||
23 | might_sleep(); | ||
24 | rdc_gpio_free(gpio); | ||
25 | } | ||
26 | |||
27 | static inline int gpio_direction_input(unsigned gpio) | ||
28 | { | ||
29 | return rdc_gpio_direction_input(gpio); | ||
30 | } | ||
31 | |||
32 | static inline int gpio_direction_output(unsigned gpio, int value) | ||
33 | { | ||
34 | return rdc_gpio_direction_output(gpio, value); | ||
35 | } | ||
36 | |||
37 | static inline int gpio_get_value(unsigned gpio) | ||
38 | { | ||
39 | return rdc_gpio_get_value(gpio); | ||
40 | } | ||
41 | |||
42 | static inline void gpio_set_value(unsigned gpio, int value) | ||
43 | { | ||
44 | rdc_gpio_set_value(gpio, value); | ||
45 | } | ||
46 | |||
47 | static inline int gpio_to_irq(unsigned gpio) | ||
48 | { | ||
49 | return gpio; | ||
50 | } | ||
51 | |||
52 | static inline int irq_to_gpio(unsigned irq) | ||
53 | { | ||
54 | return irq; | ||
55 | } | ||
56 | |||
57 | /* For cansleep */ | ||
58 | #include <asm-generic/gpio.h> | ||
59 | |||
60 | #endif /* _ASM_X86_MACH_RDC321X_GPIO_H */ | ||
diff --git a/arch/x86/include/asm/mach-voyager/do_timer.h b/arch/x86/include/asm/mach-voyager/do_timer.h deleted file mode 100644 index 9e5a459fd15b..000000000000 --- a/arch/x86/include/asm/mach-voyager/do_timer.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* defines for inline arch setup functions */ | ||
2 | #include <linux/clockchips.h> | ||
3 | |||
4 | #include <asm/voyager.h> | ||
5 | #include <asm/i8253.h> | ||
6 | |||
7 | /** | ||
8 | * do_timer_interrupt_hook - hook into timer tick | ||
9 | * | ||
10 | * Call the pit clock event handler. see asm/i8253.h | ||
11 | **/ | ||
12 | static inline void do_timer_interrupt_hook(void) | ||
13 | { | ||
14 | global_clock_event->event_handler(global_clock_event); | ||
15 | voyager_timer_interrupt(); | ||
16 | } | ||
17 | |||
diff --git a/arch/x86/include/asm/mach-voyager/entry_arch.h b/arch/x86/include/asm/mach-voyager/entry_arch.h deleted file mode 100644 index ae52624b5937..000000000000 --- a/arch/x86/include/asm/mach-voyager/entry_arch.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* -*- mode: c; c-basic-offset: 8 -*- */ | ||
2 | |||
3 | /* Copyright (C) 2002 | ||
4 | * | ||
5 | * Author: James.Bottomley@HansenPartnership.com | ||
6 | * | ||
7 | * linux/arch/i386/voyager/entry_arch.h | ||
8 | * | ||
9 | * This file builds the VIC and QIC CPI gates | ||
10 | */ | ||
11 | |||
12 | /* initialise the voyager interrupt gates | ||
13 | * | ||
14 | * This uses the macros in irq.h to set up assembly jump gates. The | ||
15 | * calls are then redirected to the same routine with smp_ prefixed */ | ||
16 | BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT) | ||
17 | BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT) | ||
18 | BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0); | ||
19 | |||
20 | /* do all the QIC interrupts */ | ||
21 | BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI); | ||
22 | BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI); | ||
23 | BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); | ||
24 | BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); | ||
25 | BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); | ||
26 | BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI); | ||
diff --git a/arch/x86/include/asm/mach-voyager/setup_arch.h b/arch/x86/include/asm/mach-voyager/setup_arch.h deleted file mode 100644 index 71729ca05cd7..000000000000 --- a/arch/x86/include/asm/mach-voyager/setup_arch.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #include <asm/voyager.h> | ||
2 | #include <asm/setup.h> | ||
3 | #define VOYAGER_BIOS_INFO ((struct voyager_bios_info *) \ | ||
4 | (&boot_params.apm_bios_info)) | ||
5 | |||
6 | /* Hook to call BIOS initialisation function */ | ||
7 | |||
8 | /* for voyager, pass the voyager BIOS/SUS info area to the detection | ||
9 | * routines */ | ||
10 | |||
11 | #define ARCH_SETUP voyager_detect(VOYAGER_BIOS_INFO); | ||
12 | |||
diff --git a/arch/x86/include/asm/mach-default/mach_timer.h b/arch/x86/include/asm/mach_timer.h index 853728519ae9..853728519ae9 100644 --- a/arch/x86/include/asm/mach-default/mach_timer.h +++ b/arch/x86/include/asm/mach_timer.h | |||
diff --git a/arch/x86/include/asm/mach-default/mach_traps.h b/arch/x86/include/asm/mach_traps.h index f7920601e472..f7920601e472 100644 --- a/arch/x86/include/asm/mach-default/mach_traps.h +++ b/arch/x86/include/asm/mach_traps.h | |||
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index 8aeeb3fd73db..f923203dc39a 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h | |||
@@ -21,11 +21,54 @@ static inline void paravirt_activate_mm(struct mm_struct *prev, | |||
21 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm); | 21 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm); |
22 | void destroy_context(struct mm_struct *mm); | 22 | void destroy_context(struct mm_struct *mm); |
23 | 23 | ||
24 | #ifdef CONFIG_X86_32 | 24 | |
25 | # include "mmu_context_32.h" | 25 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
26 | #else | 26 | { |
27 | # include "mmu_context_64.h" | 27 | #ifdef CONFIG_SMP |
28 | if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) | ||
29 | percpu_write(cpu_tlbstate.state, TLBSTATE_LAZY); | ||
30 | #endif | ||
31 | } | ||
32 | |||
33 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | ||
34 | struct task_struct *tsk) | ||
35 | { | ||
36 | unsigned cpu = smp_processor_id(); | ||
37 | |||
38 | if (likely(prev != next)) { | ||
39 | /* stop flush ipis for the previous mm */ | ||
40 | cpu_clear(cpu, prev->cpu_vm_mask); | ||
41 | #ifdef CONFIG_SMP | ||
42 | percpu_write(cpu_tlbstate.state, TLBSTATE_OK); | ||
43 | percpu_write(cpu_tlbstate.active_mm, next); | ||
28 | #endif | 44 | #endif |
45 | cpu_set(cpu, next->cpu_vm_mask); | ||
46 | |||
47 | /* Re-load page tables */ | ||
48 | load_cr3(next->pgd); | ||
49 | |||
50 | /* | ||
51 | * load the LDT, if the LDT is different: | ||
52 | */ | ||
53 | if (unlikely(prev->context.ldt != next->context.ldt)) | ||
54 | load_LDT_nolock(&next->context); | ||
55 | } | ||
56 | #ifdef CONFIG_SMP | ||
57 | else { | ||
58 | percpu_write(cpu_tlbstate.state, TLBSTATE_OK); | ||
59 | BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next); | ||
60 | |||
61 | if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) { | ||
62 | /* We were in lazy tlb mode and leave_mm disabled | ||
63 | * tlb flush IPI delivery. We must reload CR3 | ||
64 | * to make sure to use no freed page tables. | ||
65 | */ | ||
66 | load_cr3(next->pgd); | ||
67 | load_LDT_nolock(&next->context); | ||
68 | } | ||
69 | } | ||
70 | #endif | ||
71 | } | ||
29 | 72 | ||
30 | #define activate_mm(prev, next) \ | 73 | #define activate_mm(prev, next) \ |
31 | do { \ | 74 | do { \ |
@@ -33,5 +76,17 @@ do { \ | |||
33 | switch_mm((prev), (next), NULL); \ | 76 | switch_mm((prev), (next), NULL); \ |
34 | } while (0); | 77 | } while (0); |
35 | 78 | ||
79 | #ifdef CONFIG_X86_32 | ||
80 | #define deactivate_mm(tsk, mm) \ | ||
81 | do { \ | ||
82 | lazy_load_gs(0); \ | ||
83 | } while (0) | ||
84 | #else | ||
85 | #define deactivate_mm(tsk, mm) \ | ||
86 | do { \ | ||
87 | load_gs_index(0); \ | ||
88 | loadsegment(fs, 0); \ | ||
89 | } while (0) | ||
90 | #endif | ||
36 | 91 | ||
37 | #endif /* _ASM_X86_MMU_CONTEXT_H */ | 92 | #endif /* _ASM_X86_MMU_CONTEXT_H */ |
diff --git a/arch/x86/include/asm/mmu_context_32.h b/arch/x86/include/asm/mmu_context_32.h deleted file mode 100644 index 7e98ce1d2c0e..000000000000 --- a/arch/x86/include/asm/mmu_context_32.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MMU_CONTEXT_32_H | ||
2 | #define _ASM_X86_MMU_CONTEXT_32_H | ||
3 | |||
4 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | ||
5 | { | ||
6 | #ifdef CONFIG_SMP | ||
7 | if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK) | ||
8 | x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY); | ||
9 | #endif | ||
10 | } | ||
11 | |||
12 | static inline void switch_mm(struct mm_struct *prev, | ||
13 | struct mm_struct *next, | ||
14 | struct task_struct *tsk) | ||
15 | { | ||
16 | int cpu = smp_processor_id(); | ||
17 | |||
18 | if (likely(prev != next)) { | ||
19 | /* stop flush ipis for the previous mm */ | ||
20 | cpu_clear(cpu, prev->cpu_vm_mask); | ||
21 | #ifdef CONFIG_SMP | ||
22 | x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK); | ||
23 | x86_write_percpu(cpu_tlbstate.active_mm, next); | ||
24 | #endif | ||
25 | cpu_set(cpu, next->cpu_vm_mask); | ||
26 | |||
27 | /* Re-load page tables */ | ||
28 | load_cr3(next->pgd); | ||
29 | |||
30 | /* | ||
31 | * load the LDT, if the LDT is different: | ||
32 | */ | ||
33 | if (unlikely(prev->context.ldt != next->context.ldt)) | ||
34 | load_LDT_nolock(&next->context); | ||
35 | } | ||
36 | #ifdef CONFIG_SMP | ||
37 | else { | ||
38 | x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK); | ||
39 | BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next); | ||
40 | |||
41 | if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) { | ||
42 | /* We were in lazy tlb mode and leave_mm disabled | ||
43 | * tlb flush IPI delivery. We must reload %cr3. | ||
44 | */ | ||
45 | load_cr3(next->pgd); | ||
46 | load_LDT_nolock(&next->context); | ||
47 | } | ||
48 | } | ||
49 | #endif | ||
50 | } | ||
51 | |||
52 | #define deactivate_mm(tsk, mm) \ | ||
53 | asm("movl %0,%%gs": :"r" (0)); | ||
54 | |||
55 | #endif /* _ASM_X86_MMU_CONTEXT_32_H */ | ||
diff --git a/arch/x86/include/asm/mmu_context_64.h b/arch/x86/include/asm/mmu_context_64.h deleted file mode 100644 index 677d36e9540a..000000000000 --- a/arch/x86/include/asm/mmu_context_64.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | #ifndef _ASM_X86_MMU_CONTEXT_64_H | ||
2 | #define _ASM_X86_MMU_CONTEXT_64_H | ||
3 | |||
4 | #include <asm/pda.h> | ||
5 | |||
6 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | ||
7 | { | ||
8 | #ifdef CONFIG_SMP | ||
9 | if (read_pda(mmu_state) == TLBSTATE_OK) | ||
10 | write_pda(mmu_state, TLBSTATE_LAZY); | ||
11 | #endif | ||
12 | } | ||
13 | |||
14 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | ||
15 | struct task_struct *tsk) | ||
16 | { | ||
17 | unsigned cpu = smp_processor_id(); | ||
18 | if (likely(prev != next)) { | ||
19 | /* stop flush ipis for the previous mm */ | ||
20 | cpu_clear(cpu, prev->cpu_vm_mask); | ||
21 | #ifdef CONFIG_SMP | ||
22 | write_pda(mmu_state, TLBSTATE_OK); | ||
23 | write_pda(active_mm, next); | ||
24 | #endif | ||
25 | cpu_set(cpu, next->cpu_vm_mask); | ||
26 | load_cr3(next->pgd); | ||
27 | |||
28 | if (unlikely(next->context.ldt != prev->context.ldt)) | ||
29 | load_LDT_nolock(&next->context); | ||
30 | } | ||
31 | #ifdef CONFIG_SMP | ||
32 | else { | ||
33 | write_pda(mmu_state, TLBSTATE_OK); | ||
34 | if (read_pda(active_mm) != next) | ||
35 | BUG(); | ||
36 | if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) { | ||
37 | /* We were in lazy tlb mode and leave_mm disabled | ||
38 | * tlb flush IPI delivery. We must reload CR3 | ||
39 | * to make sure to use no freed page tables. | ||
40 | */ | ||
41 | load_cr3(next->pgd); | ||
42 | load_LDT_nolock(&next->context); | ||
43 | } | ||
44 | } | ||
45 | #endif | ||
46 | } | ||
47 | |||
48 | #define deactivate_mm(tsk, mm) \ | ||
49 | do { \ | ||
50 | load_gs_index(0); \ | ||
51 | asm volatile("movl %0,%%fs"::"r"(0)); \ | ||
52 | } while (0) | ||
53 | |||
54 | #endif /* _ASM_X86_MMU_CONTEXT_64_H */ | ||
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h index 105fb90a0635..ede6998bd92c 100644 --- a/arch/x86/include/asm/mmzone_32.h +++ b/arch/x86/include/asm/mmzone_32.h | |||
@@ -91,46 +91,9 @@ static inline int pfn_valid(int pfn) | |||
91 | #endif /* CONFIG_DISCONTIGMEM */ | 91 | #endif /* CONFIG_DISCONTIGMEM */ |
92 | 92 | ||
93 | #ifdef CONFIG_NEED_MULTIPLE_NODES | 93 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
94 | 94 | /* always use node 0 for bootmem on this numa platform */ | |
95 | /* | 95 | #define bootmem_arch_preferred_node(__bdata, size, align, goal, limit) \ |
96 | * Following are macros that are specific to this numa platform. | 96 | (NODE_DATA(0)->bdata) |
97 | */ | ||
98 | #define reserve_bootmem(addr, size, flags) \ | ||
99 | reserve_bootmem_node(NODE_DATA(0), (addr), (size), (flags)) | ||
100 | #define alloc_bootmem(x) \ | ||
101 | __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) | ||
102 | #define alloc_bootmem_nopanic(x) \ | ||
103 | __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), SMP_CACHE_BYTES, \ | ||
104 | __pa(MAX_DMA_ADDRESS)) | ||
105 | #define alloc_bootmem_low(x) \ | ||
106 | __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, 0) | ||
107 | #define alloc_bootmem_pages(x) \ | ||
108 | __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) | ||
109 | #define alloc_bootmem_pages_nopanic(x) \ | ||
110 | __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), PAGE_SIZE, \ | ||
111 | __pa(MAX_DMA_ADDRESS)) | ||
112 | #define alloc_bootmem_low_pages(x) \ | ||
113 | __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0) | ||
114 | #define alloc_bootmem_node(pgdat, x) \ | ||
115 | ({ \ | ||
116 | struct pglist_data __maybe_unused \ | ||
117 | *__alloc_bootmem_node__pgdat = (pgdat); \ | ||
118 | __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, \ | ||
119 | __pa(MAX_DMA_ADDRESS)); \ | ||
120 | }) | ||
121 | #define alloc_bootmem_pages_node(pgdat, x) \ | ||
122 | ({ \ | ||
123 | struct pglist_data __maybe_unused \ | ||
124 | *__alloc_bootmem_node__pgdat = (pgdat); \ | ||
125 | __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, \ | ||
126 | __pa(MAX_DMA_ADDRESS)); \ | ||
127 | }) | ||
128 | #define alloc_bootmem_low_pages_node(pgdat, x) \ | ||
129 | ({ \ | ||
130 | struct pglist_data __maybe_unused \ | ||
131 | *__alloc_bootmem_node__pgdat = (pgdat); \ | ||
132 | __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0); \ | ||
133 | }) | ||
134 | #endif /* CONFIG_NEED_MULTIPLE_NODES */ | 97 | #endif /* CONFIG_NEED_MULTIPLE_NODES */ |
135 | 98 | ||
136 | #endif /* _ASM_X86_MMZONE_32_H */ | 99 | #endif /* _ASM_X86_MMZONE_32_H */ |
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h index bd22f2a3713f..642fc7fc8cdc 100644 --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h | |||
@@ -9,7 +9,18 @@ extern int apic_version[MAX_APICS]; | |||
9 | extern int pic_mode; | 9 | extern int pic_mode; |
10 | 10 | ||
11 | #ifdef CONFIG_X86_32 | 11 | #ifdef CONFIG_X86_32 |
12 | #include <mach_mpspec.h> | 12 | |
13 | /* | ||
14 | * Summit or generic (i.e. installer) kernels need lots of bus entries. | ||
15 | * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. | ||
16 | */ | ||
17 | #if CONFIG_BASE_SMALL == 0 | ||
18 | # define MAX_MP_BUSSES 260 | ||
19 | #else | ||
20 | # define MAX_MP_BUSSES 32 | ||
21 | #endif | ||
22 | |||
23 | #define MAX_IRQ_SOURCES 256 | ||
13 | 24 | ||
14 | extern unsigned int def_to_bigsmp; | 25 | extern unsigned int def_to_bigsmp; |
15 | extern u8 apicid_2_node[]; | 26 | extern u8 apicid_2_node[]; |
@@ -20,15 +31,15 @@ extern int mp_bus_id_to_local[MAX_MP_BUSSES]; | |||
20 | extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; | 31 | extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; |
21 | #endif | 32 | #endif |
22 | 33 | ||
23 | #define MAX_APICID 256 | 34 | #define MAX_APICID 256 |
24 | 35 | ||
25 | #else | 36 | #else /* CONFIG_X86_64: */ |
26 | 37 | ||
27 | #define MAX_MP_BUSSES 256 | 38 | #define MAX_MP_BUSSES 256 |
28 | /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ | 39 | /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ |
29 | #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) | 40 | #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) |
30 | 41 | ||
31 | #endif | 42 | #endif /* CONFIG_X86_64 */ |
32 | 43 | ||
33 | extern void early_find_smp_config(void); | 44 | extern void early_find_smp_config(void); |
34 | extern void early_get_smp_config(void); | 45 | extern void early_get_smp_config(void); |
@@ -45,11 +56,13 @@ extern int smp_found_config; | |||
45 | extern int mpc_default_type; | 56 | extern int mpc_default_type; |
46 | extern unsigned long mp_lapic_addr; | 57 | extern unsigned long mp_lapic_addr; |
47 | 58 | ||
48 | extern void find_smp_config(void); | ||
49 | extern void get_smp_config(void); | 59 | extern void get_smp_config(void); |
60 | |||
50 | #ifdef CONFIG_X86_MPPARSE | 61 | #ifdef CONFIG_X86_MPPARSE |
62 | extern void find_smp_config(void); | ||
51 | extern void early_reserve_e820_mpc_new(void); | 63 | extern void early_reserve_e820_mpc_new(void); |
52 | #else | 64 | #else |
65 | static inline void find_smp_config(void) { } | ||
53 | static inline void early_reserve_e820_mpc_new(void) { } | 66 | static inline void early_reserve_e820_mpc_new(void) { } |
54 | #endif | 67 | #endif |
55 | 68 | ||
@@ -64,6 +77,8 @@ extern int acpi_probe_gsi(void); | |||
64 | #ifdef CONFIG_X86_IO_APIC | 77 | #ifdef CONFIG_X86_IO_APIC |
65 | extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | 78 | extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
66 | u32 gsi, int triggering, int polarity); | 79 | u32 gsi, int triggering, int polarity); |
80 | extern int mp_find_ioapic(int gsi); | ||
81 | extern int mp_find_ioapic_pin(int ioapic, int gsi); | ||
67 | #else | 82 | #else |
68 | static inline int | 83 | static inline int |
69 | mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | 84 | mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
@@ -148,4 +163,8 @@ static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) | |||
148 | 163 | ||
149 | extern physid_mask_t phys_cpu_present_map; | 164 | extern physid_mask_t phys_cpu_present_map; |
150 | 165 | ||
166 | extern int generic_mps_oem_check(struct mpc_table *, char *, char *); | ||
167 | |||
168 | extern int default_acpi_madt_oem_check(char *, char *); | ||
169 | |||
151 | #endif /* _ASM_X86_MPSPEC_H */ | 170 | #endif /* _ASM_X86_MPSPEC_H */ |
diff --git a/arch/x86/include/asm/mpspec_def.h b/arch/x86/include/asm/mpspec_def.h index 59568bc4767f..4a7f96d7c188 100644 --- a/arch/x86/include/asm/mpspec_def.h +++ b/arch/x86/include/asm/mpspec_def.h | |||
@@ -24,17 +24,18 @@ | |||
24 | # endif | 24 | # endif |
25 | #endif | 25 | #endif |
26 | 26 | ||
27 | struct intel_mp_floating { | 27 | /* Intel MP Floating Pointer Structure */ |
28 | char mpf_signature[4]; /* "_MP_" */ | 28 | struct mpf_intel { |
29 | unsigned int mpf_physptr; /* Configuration table address */ | 29 | char signature[4]; /* "_MP_" */ |
30 | unsigned char mpf_length; /* Our length (paragraphs) */ | 30 | unsigned int physptr; /* Configuration table address */ |
31 | unsigned char mpf_specification;/* Specification version */ | 31 | unsigned char length; /* Our length (paragraphs) */ |
32 | unsigned char mpf_checksum; /* Checksum (makes sum 0) */ | 32 | unsigned char specification; /* Specification version */ |
33 | unsigned char mpf_feature1; /* Standard or configuration ? */ | 33 | unsigned char checksum; /* Checksum (makes sum 0) */ |
34 | unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */ | 34 | unsigned char feature1; /* Standard or configuration ? */ |
35 | unsigned char mpf_feature3; /* Unused (0) */ | 35 | unsigned char feature2; /* Bit7 set for IMCR|PIC */ |
36 | unsigned char mpf_feature4; /* Unused (0) */ | 36 | unsigned char feature3; /* Unused (0) */ |
37 | unsigned char mpf_feature5; /* Unused (0) */ | 37 | unsigned char feature4; /* Unused (0) */ |
38 | unsigned char feature5; /* Unused (0) */ | ||
38 | }; | 39 | }; |
39 | 40 | ||
40 | #define MPC_SIGNATURE "PCMP" | 41 | #define MPC_SIGNATURE "PCMP" |
diff --git a/arch/x86/include/asm/numa_32.h b/arch/x86/include/asm/numa_32.h index e9f5db796244..a37229011b56 100644 --- a/arch/x86/include/asm/numa_32.h +++ b/arch/x86/include/asm/numa_32.h | |||
@@ -4,8 +4,12 @@ | |||
4 | extern int pxm_to_nid(int pxm); | 4 | extern int pxm_to_nid(int pxm); |
5 | extern void numa_remove_cpu(int cpu); | 5 | extern void numa_remove_cpu(int cpu); |
6 | 6 | ||
7 | #ifdef CONFIG_NUMA | 7 | #ifdef CONFIG_HIGHMEM |
8 | extern void set_highmem_pages_init(void); | 8 | extern void set_highmem_pages_init(void); |
9 | #else | ||
10 | static inline void set_highmem_pages_init(void) | ||
11 | { | ||
12 | } | ||
9 | #endif | 13 | #endif |
10 | 14 | ||
11 | #endif /* _ASM_X86_NUMA_32_H */ | 15 | #endif /* _ASM_X86_NUMA_32_H */ |
diff --git a/arch/x86/include/asm/numaq.h b/arch/x86/include/asm/numaq.h index 1e8bd30b4c16..9f0a5f5d29ec 100644 --- a/arch/x86/include/asm/numaq.h +++ b/arch/x86/include/asm/numaq.h | |||
@@ -31,6 +31,8 @@ | |||
31 | extern int found_numaq; | 31 | extern int found_numaq; |
32 | extern int get_memcfg_numaq(void); | 32 | extern int get_memcfg_numaq(void); |
33 | 33 | ||
34 | extern void *xquad_portio; | ||
35 | |||
34 | /* | 36 | /* |
35 | * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the | 37 | * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the |
36 | */ | 38 | */ |
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h deleted file mode 100644 index bf37bc49bd8e..000000000000 --- a/arch/x86/include/asm/numaq/apic.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | #ifndef __ASM_NUMAQ_APIC_H | ||
2 | #define __ASM_NUMAQ_APIC_H | ||
3 | |||
4 | #include <asm/io.h> | ||
5 | #include <linux/mmzone.h> | ||
6 | #include <linux/nodemask.h> | ||
7 | |||
8 | #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) | ||
9 | |||
10 | static inline const cpumask_t *target_cpus(void) | ||
11 | { | ||
12 | return &CPU_MASK_ALL; | ||
13 | } | ||
14 | |||
15 | #define NO_BALANCE_IRQ (1) | ||
16 | #define esr_disable (1) | ||
17 | |||
18 | #define INT_DELIVERY_MODE dest_LowestPrio | ||
19 | #define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */ | ||
20 | |||
21 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
22 | { | ||
23 | return physid_isset(apicid, bitmap); | ||
24 | } | ||
25 | static inline unsigned long check_apicid_present(int bit) | ||
26 | { | ||
27 | return physid_isset(bit, phys_cpu_present_map); | ||
28 | } | ||
29 | #define apicid_cluster(apicid) (apicid & 0xF0) | ||
30 | |||
31 | static inline int apic_id_registered(void) | ||
32 | { | ||
33 | return 1; | ||
34 | } | ||
35 | |||
36 | static inline void init_apic_ldr(void) | ||
37 | { | ||
38 | /* Already done in NUMA-Q firmware */ | ||
39 | } | ||
40 | |||
41 | static inline void setup_apic_routing(void) | ||
42 | { | ||
43 | printk("Enabling APIC mode: %s. Using %d I/O APICs\n", | ||
44 | "NUMA-Q", nr_ioapics); | ||
45 | } | ||
46 | |||
47 | /* | ||
48 | * Skip adding the timer int on secondary nodes, which causes | ||
49 | * a small but painful rift in the time-space continuum. | ||
50 | */ | ||
51 | static inline int multi_timer_check(int apic, int irq) | ||
52 | { | ||
53 | return apic != 0 && irq == 0; | ||
54 | } | ||
55 | |||
56 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) | ||
57 | { | ||
58 | /* We don't have a good way to do this yet - hack */ | ||
59 | return physids_promote(0xFUL); | ||
60 | } | ||
61 | |||
62 | /* Mapping from cpu number to logical apicid */ | ||
63 | extern u8 cpu_2_logical_apicid[]; | ||
64 | static inline int cpu_to_logical_apicid(int cpu) | ||
65 | { | ||
66 | if (cpu >= nr_cpu_ids) | ||
67 | return BAD_APICID; | ||
68 | return (int)cpu_2_logical_apicid[cpu]; | ||
69 | } | ||
70 | |||
71 | /* | ||
72 | * Supporting over 60 cpus on NUMA-Q requires a locality-dependent | ||
73 | * cpu to APIC ID relation to properly interact with the intelligent | ||
74 | * mode of the cluster controller. | ||
75 | */ | ||
76 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
77 | { | ||
78 | if (mps_cpu < 60) | ||
79 | return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3)); | ||
80 | else | ||
81 | return BAD_APICID; | ||
82 | } | ||
83 | |||
84 | static inline int apicid_to_node(int logical_apicid) | ||
85 | { | ||
86 | return logical_apicid >> 4; | ||
87 | } | ||
88 | |||
89 | static inline physid_mask_t apicid_to_cpu_present(int logical_apicid) | ||
90 | { | ||
91 | int node = apicid_to_node(logical_apicid); | ||
92 | int cpu = __ffs(logical_apicid & 0xf); | ||
93 | |||
94 | return physid_mask_of_physid(cpu + 4*node); | ||
95 | } | ||
96 | |||
97 | extern void *xquad_portio; | ||
98 | |||
99 | static inline void setup_portio_remap(void) | ||
100 | { | ||
101 | int num_quads = num_online_nodes(); | ||
102 | |||
103 | if (num_quads <= 1) | ||
104 | return; | ||
105 | |||
106 | printk("Remapping cross-quad port I/O for %d quads\n", num_quads); | ||
107 | xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD); | ||
108 | printk("xquad_portio vaddr 0x%08lx, len %08lx\n", | ||
109 | (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD); | ||
110 | } | ||
111 | |||
112 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
113 | { | ||
114 | return (1); | ||
115 | } | ||
116 | |||
117 | static inline void enable_apic_mode(void) | ||
118 | { | ||
119 | } | ||
120 | |||
121 | /* | ||
122 | * We use physical apicids here, not logical, so just return the default | ||
123 | * physical broadcast to stop people from breaking us | ||
124 | */ | ||
125 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
126 | { | ||
127 | return (int) 0xF; | ||
128 | } | ||
129 | |||
130 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
131 | const struct cpumask *andmask) | ||
132 | { | ||
133 | return (int) 0xF; | ||
134 | } | ||
135 | |||
136 | /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */ | ||
137 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
138 | { | ||
139 | return cpuid_apic >> index_msb; | ||
140 | } | ||
141 | |||
142 | #endif /* __ASM_NUMAQ_APIC_H */ | ||
diff --git a/arch/x86/include/asm/numaq/apicdef.h b/arch/x86/include/asm/numaq/apicdef.h deleted file mode 100644 index e012a46cc22a..000000000000 --- a/arch/x86/include/asm/numaq/apicdef.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef __ASM_NUMAQ_APICDEF_H | ||
2 | #define __ASM_NUMAQ_APICDEF_H | ||
3 | |||
4 | |||
5 | #define APIC_ID_MASK (0xF<<24) | ||
6 | |||
7 | static inline unsigned get_apic_id(unsigned long x) | ||
8 | { | ||
9 | return (((x)>>24)&0x0F); | ||
10 | } | ||
11 | |||
12 | #define GET_APIC_ID(x) get_apic_id(x) | ||
13 | |||
14 | #endif | ||
diff --git a/arch/x86/include/asm/numaq/ipi.h b/arch/x86/include/asm/numaq/ipi.h deleted file mode 100644 index a8374c652778..000000000000 --- a/arch/x86/include/asm/numaq/ipi.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | #ifndef __ASM_NUMAQ_IPI_H | ||
2 | #define __ASM_NUMAQ_IPI_H | ||
3 | |||
4 | void send_IPI_mask_sequence(const struct cpumask *mask, int vector); | ||
5 | void send_IPI_mask_allbutself(const struct cpumask *mask, int vector); | ||
6 | |||
7 | static inline void send_IPI_mask(const struct cpumask *mask, int vector) | ||
8 | { | ||
9 | send_IPI_mask_sequence(mask, vector); | ||
10 | } | ||
11 | |||
12 | static inline void send_IPI_allbutself(int vector) | ||
13 | { | ||
14 | send_IPI_mask_allbutself(cpu_online_mask, vector); | ||
15 | } | ||
16 | |||
17 | static inline void send_IPI_all(int vector) | ||
18 | { | ||
19 | send_IPI_mask(cpu_online_mask, vector); | ||
20 | } | ||
21 | |||
22 | #endif /* __ASM_NUMAQ_IPI_H */ | ||
diff --git a/arch/x86/include/asm/numaq/mpparse.h b/arch/x86/include/asm/numaq/mpparse.h deleted file mode 100644 index a2eeefcd1cc7..000000000000 --- a/arch/x86/include/asm/numaq/mpparse.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_NUMAQ_MPPARSE_H | ||
2 | #define __ASM_NUMAQ_MPPARSE_H | ||
3 | |||
4 | extern void numaq_mps_oem_check(struct mpc_table *, char *, char *); | ||
5 | |||
6 | #endif /* __ASM_NUMAQ_MPPARSE_H */ | ||
diff --git a/arch/x86/include/asm/numaq/wakecpu.h b/arch/x86/include/asm/numaq/wakecpu.h deleted file mode 100644 index 6f499df8eddb..000000000000 --- a/arch/x86/include/asm/numaq/wakecpu.h +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | #ifndef __ASM_NUMAQ_WAKECPU_H | ||
2 | #define __ASM_NUMAQ_WAKECPU_H | ||
3 | |||
4 | /* This file copes with machines that wakeup secondary CPUs by NMIs */ | ||
5 | |||
6 | #define TRAMPOLINE_PHYS_LOW (0x8) | ||
7 | #define TRAMPOLINE_PHYS_HIGH (0xa) | ||
8 | |||
9 | /* We don't do anything here because we use NMI's to boot instead */ | ||
10 | static inline void wait_for_init_deassert(atomic_t *deassert) | ||
11 | { | ||
12 | } | ||
13 | |||
14 | /* | ||
15 | * Because we use NMIs rather than the INIT-STARTUP sequence to | ||
16 | * bootstrap the CPUs, the APIC may be in a weird state. Kick it. | ||
17 | */ | ||
18 | static inline void smp_callin_clear_local_apic(void) | ||
19 | { | ||
20 | clear_local_APIC(); | ||
21 | } | ||
22 | |||
23 | static inline void store_NMI_vector(unsigned short *high, unsigned short *low) | ||
24 | { | ||
25 | printk("Storing NMI vector\n"); | ||
26 | *high = | ||
27 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)); | ||
28 | *low = | ||
29 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)); | ||
30 | } | ||
31 | |||
32 | static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) | ||
33 | { | ||
34 | printk("Restoring NMI vector\n"); | ||
35 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = | ||
36 | *high; | ||
37 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = | ||
38 | *low; | ||
39 | } | ||
40 | |||
41 | static inline void inquire_remote_apic(int apicid) | ||
42 | { | ||
43 | } | ||
44 | |||
45 | #endif /* __ASM_NUMAQ_WAKECPU_H */ | ||
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h index 776579119a00..89ed9d70b0aa 100644 --- a/arch/x86/include/asm/page.h +++ b/arch/x86/include/asm/page.h | |||
@@ -1,42 +1,11 @@ | |||
1 | #ifndef _ASM_X86_PAGE_H | 1 | #ifndef _ASM_X86_PAGE_H |
2 | #define _ASM_X86_PAGE_H | 2 | #define _ASM_X86_PAGE_H |
3 | 3 | ||
4 | #include <linux/const.h> | 4 | #include <linux/types.h> |
5 | |||
6 | /* PAGE_SHIFT determines the page size */ | ||
7 | #define PAGE_SHIFT 12 | ||
8 | #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) | ||
9 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
10 | 5 | ||
11 | #ifdef __KERNEL__ | 6 | #ifdef __KERNEL__ |
12 | 7 | ||
13 | #define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1) | 8 | #include <asm/page_types.h> |
14 | #define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1) | ||
15 | |||
16 | /* Cast PAGE_MASK to a signed type so that it is sign-extended if | ||
17 | virtual addresses are 32-bits but physical addresses are larger | ||
18 | (ie, 32-bit PAE). */ | ||
19 | #define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK) | ||
20 | |||
21 | /* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */ | ||
22 | #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK) | ||
23 | |||
24 | /* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */ | ||
25 | #define PTE_FLAGS_MASK (~PTE_PFN_MASK) | ||
26 | |||
27 | #define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT) | ||
28 | #define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1)) | ||
29 | |||
30 | #define HPAGE_SHIFT PMD_SHIFT | ||
31 | #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) | ||
32 | #define HPAGE_MASK (~(HPAGE_SIZE - 1)) | ||
33 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) | ||
34 | |||
35 | #define HUGE_MAX_HSTATE 2 | ||
36 | |||
37 | #ifndef __ASSEMBLY__ | ||
38 | #include <linux/types.h> | ||
39 | #endif | ||
40 | 9 | ||
41 | #ifdef CONFIG_X86_64 | 10 | #ifdef CONFIG_X86_64 |
42 | #include <asm/page_64.h> | 11 | #include <asm/page_64.h> |
@@ -44,38 +13,18 @@ | |||
44 | #include <asm/page_32.h> | 13 | #include <asm/page_32.h> |
45 | #endif /* CONFIG_X86_64 */ | 14 | #endif /* CONFIG_X86_64 */ |
46 | 15 | ||
47 | #define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) | ||
48 | |||
49 | #define VM_DATA_DEFAULT_FLAGS \ | ||
50 | (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ | ||
51 | VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
52 | |||
53 | |||
54 | #ifndef __ASSEMBLY__ | 16 | #ifndef __ASSEMBLY__ |
55 | 17 | ||
56 | typedef struct { pgdval_t pgd; } pgd_t; | ||
57 | typedef struct { pgprotval_t pgprot; } pgprot_t; | ||
58 | |||
59 | extern int page_is_ram(unsigned long pagenr); | ||
60 | extern int devmem_is_allowed(unsigned long pagenr); | ||
61 | extern void map_devmem(unsigned long pfn, unsigned long size, | ||
62 | pgprot_t vma_prot); | ||
63 | extern void unmap_devmem(unsigned long pfn, unsigned long size, | ||
64 | pgprot_t vma_prot); | ||
65 | |||
66 | extern unsigned long max_low_pfn_mapped; | ||
67 | extern unsigned long max_pfn_mapped; | ||
68 | |||
69 | struct page; | 18 | struct page; |
70 | 19 | ||
71 | static inline void clear_user_page(void *page, unsigned long vaddr, | 20 | static inline void clear_user_page(void *page, unsigned long vaddr, |
72 | struct page *pg) | 21 | struct page *pg) |
73 | { | 22 | { |
74 | clear_page(page); | 23 | clear_page(page); |
75 | } | 24 | } |
76 | 25 | ||
77 | static inline void copy_user_page(void *to, void *from, unsigned long vaddr, | 26 | static inline void copy_user_page(void *to, void *from, unsigned long vaddr, |
78 | struct page *topage) | 27 | struct page *topage) |
79 | { | 28 | { |
80 | copy_page(to, from); | 29 | copy_page(to, from); |
81 | } | 30 | } |
@@ -84,99 +33,6 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr, | |||
84 | alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) | 33 | alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) |
85 | #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE | 34 | #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE |
86 | 35 | ||
87 | static inline pgd_t native_make_pgd(pgdval_t val) | ||
88 | { | ||
89 | return (pgd_t) { val }; | ||
90 | } | ||
91 | |||
92 | static inline pgdval_t native_pgd_val(pgd_t pgd) | ||
93 | { | ||
94 | return pgd.pgd; | ||
95 | } | ||
96 | |||
97 | #if PAGETABLE_LEVELS >= 3 | ||
98 | #if PAGETABLE_LEVELS == 4 | ||
99 | typedef struct { pudval_t pud; } pud_t; | ||
100 | |||
101 | static inline pud_t native_make_pud(pmdval_t val) | ||
102 | { | ||
103 | return (pud_t) { val }; | ||
104 | } | ||
105 | |||
106 | static inline pudval_t native_pud_val(pud_t pud) | ||
107 | { | ||
108 | return pud.pud; | ||
109 | } | ||
110 | #else /* PAGETABLE_LEVELS == 3 */ | ||
111 | #include <asm-generic/pgtable-nopud.h> | ||
112 | |||
113 | static inline pudval_t native_pud_val(pud_t pud) | ||
114 | { | ||
115 | return native_pgd_val(pud.pgd); | ||
116 | } | ||
117 | #endif /* PAGETABLE_LEVELS == 4 */ | ||
118 | |||
119 | typedef struct { pmdval_t pmd; } pmd_t; | ||
120 | |||
121 | static inline pmd_t native_make_pmd(pmdval_t val) | ||
122 | { | ||
123 | return (pmd_t) { val }; | ||
124 | } | ||
125 | |||
126 | static inline pmdval_t native_pmd_val(pmd_t pmd) | ||
127 | { | ||
128 | return pmd.pmd; | ||
129 | } | ||
130 | #else /* PAGETABLE_LEVELS == 2 */ | ||
131 | #include <asm-generic/pgtable-nopmd.h> | ||
132 | |||
133 | static inline pmdval_t native_pmd_val(pmd_t pmd) | ||
134 | { | ||
135 | return native_pgd_val(pmd.pud.pgd); | ||
136 | } | ||
137 | #endif /* PAGETABLE_LEVELS >= 3 */ | ||
138 | |||
139 | static inline pte_t native_make_pte(pteval_t val) | ||
140 | { | ||
141 | return (pte_t) { .pte = val }; | ||
142 | } | ||
143 | |||
144 | static inline pteval_t native_pte_val(pte_t pte) | ||
145 | { | ||
146 | return pte.pte; | ||
147 | } | ||
148 | |||
149 | static inline pteval_t native_pte_flags(pte_t pte) | ||
150 | { | ||
151 | return native_pte_val(pte) & PTE_FLAGS_MASK; | ||
152 | } | ||
153 | |||
154 | #define pgprot_val(x) ((x).pgprot) | ||
155 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
156 | |||
157 | #ifdef CONFIG_PARAVIRT | ||
158 | #include <asm/paravirt.h> | ||
159 | #else /* !CONFIG_PARAVIRT */ | ||
160 | |||
161 | #define pgd_val(x) native_pgd_val(x) | ||
162 | #define __pgd(x) native_make_pgd(x) | ||
163 | |||
164 | #ifndef __PAGETABLE_PUD_FOLDED | ||
165 | #define pud_val(x) native_pud_val(x) | ||
166 | #define __pud(x) native_make_pud(x) | ||
167 | #endif | ||
168 | |||
169 | #ifndef __PAGETABLE_PMD_FOLDED | ||
170 | #define pmd_val(x) native_pmd_val(x) | ||
171 | #define __pmd(x) native_make_pmd(x) | ||
172 | #endif | ||
173 | |||
174 | #define pte_val(x) native_pte_val(x) | ||
175 | #define pte_flags(x) native_pte_flags(x) | ||
176 | #define __pte(x) native_make_pte(x) | ||
177 | |||
178 | #endif /* CONFIG_PARAVIRT */ | ||
179 | |||
180 | #define __pa(x) __phys_addr((unsigned long)(x)) | 36 | #define __pa(x) __phys_addr((unsigned long)(x)) |
181 | #define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x)) | 37 | #define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x)) |
182 | /* __pa_symbol should be used for C visible symbols. | 38 | /* __pa_symbol should be used for C visible symbols. |
diff --git a/arch/x86/include/asm/page_32.h b/arch/x86/include/asm/page_32.h index bcde0d7b4325..da4e762406f7 100644 --- a/arch/x86/include/asm/page_32.h +++ b/arch/x86/include/asm/page_32.h | |||
@@ -1,82 +1,14 @@ | |||
1 | #ifndef _ASM_X86_PAGE_32_H | 1 | #ifndef _ASM_X86_PAGE_32_H |
2 | #define _ASM_X86_PAGE_32_H | 2 | #define _ASM_X86_PAGE_32_H |
3 | 3 | ||
4 | /* | 4 | #include <asm/page_32_types.h> |
5 | * This handles the memory map. | ||
6 | * | ||
7 | * A __PAGE_OFFSET of 0xC0000000 means that the kernel has | ||
8 | * a virtual address space of one gigabyte, which limits the | ||
9 | * amount of physical memory you can use to about 950MB. | ||
10 | * | ||
11 | * If you want more physical memory than this then see the CONFIG_HIGHMEM4G | ||
12 | * and CONFIG_HIGHMEM64G options in the kernel configuration. | ||
13 | */ | ||
14 | #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) | ||
15 | |||
16 | #ifdef CONFIG_4KSTACKS | ||
17 | #define THREAD_ORDER 0 | ||
18 | #else | ||
19 | #define THREAD_ORDER 1 | ||
20 | #endif | ||
21 | #define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) | ||
22 | |||
23 | #define STACKFAULT_STACK 0 | ||
24 | #define DOUBLEFAULT_STACK 1 | ||
25 | #define NMI_STACK 0 | ||
26 | #define DEBUG_STACK 0 | ||
27 | #define MCE_STACK 0 | ||
28 | #define N_EXCEPTION_STACKS 1 | ||
29 | |||
30 | #ifdef CONFIG_X86_PAE | ||
31 | /* 44=32+12, the limit we can fit into an unsigned long pfn */ | ||
32 | #define __PHYSICAL_MASK_SHIFT 44 | ||
33 | #define __VIRTUAL_MASK_SHIFT 32 | ||
34 | #define PAGETABLE_LEVELS 3 | ||
35 | |||
36 | #ifndef __ASSEMBLY__ | ||
37 | typedef u64 pteval_t; | ||
38 | typedef u64 pmdval_t; | ||
39 | typedef u64 pudval_t; | ||
40 | typedef u64 pgdval_t; | ||
41 | typedef u64 pgprotval_t; | ||
42 | |||
43 | typedef union { | ||
44 | struct { | ||
45 | unsigned long pte_low, pte_high; | ||
46 | }; | ||
47 | pteval_t pte; | ||
48 | } pte_t; | ||
49 | #endif /* __ASSEMBLY__ | ||
50 | */ | ||
51 | #else /* !CONFIG_X86_PAE */ | ||
52 | #define __PHYSICAL_MASK_SHIFT 32 | ||
53 | #define __VIRTUAL_MASK_SHIFT 32 | ||
54 | #define PAGETABLE_LEVELS 2 | ||
55 | |||
56 | #ifndef __ASSEMBLY__ | ||
57 | typedef unsigned long pteval_t; | ||
58 | typedef unsigned long pmdval_t; | ||
59 | typedef unsigned long pudval_t; | ||
60 | typedef unsigned long pgdval_t; | ||
61 | typedef unsigned long pgprotval_t; | ||
62 | |||
63 | typedef union { | ||
64 | pteval_t pte; | ||
65 | pteval_t pte_low; | ||
66 | } pte_t; | ||
67 | |||
68 | #endif /* __ASSEMBLY__ */ | ||
69 | #endif /* CONFIG_X86_PAE */ | ||
70 | 5 | ||
71 | #ifndef __ASSEMBLY__ | 6 | #ifndef __ASSEMBLY__ |
72 | typedef struct page *pgtable_t; | ||
73 | #endif | ||
74 | 7 | ||
75 | #ifdef CONFIG_HUGETLB_PAGE | 8 | #ifdef CONFIG_HUGETLB_PAGE |
76 | #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA | 9 | #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA |
77 | #endif | 10 | #endif |
78 | 11 | ||
79 | #ifndef __ASSEMBLY__ | ||
80 | #define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET) | 12 | #define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET) |
81 | #ifdef CONFIG_DEBUG_VIRTUAL | 13 | #ifdef CONFIG_DEBUG_VIRTUAL |
82 | extern unsigned long __phys_addr(unsigned long); | 14 | extern unsigned long __phys_addr(unsigned long); |
@@ -89,23 +21,6 @@ extern unsigned long __phys_addr(unsigned long); | |||
89 | #define pfn_valid(pfn) ((pfn) < max_mapnr) | 21 | #define pfn_valid(pfn) ((pfn) < max_mapnr) |
90 | #endif /* CONFIG_FLATMEM */ | 22 | #endif /* CONFIG_FLATMEM */ |
91 | 23 | ||
92 | extern int nx_enabled; | ||
93 | |||
94 | /* | ||
95 | * This much address space is reserved for vmalloc() and iomap() | ||
96 | * as well as fixmap mappings. | ||
97 | */ | ||
98 | extern unsigned int __VMALLOC_RESERVE; | ||
99 | extern int sysctl_legacy_va_layout; | ||
100 | |||
101 | extern void find_low_pfn_range(void); | ||
102 | extern unsigned long init_memory_mapping(unsigned long start, | ||
103 | unsigned long end); | ||
104 | extern void initmem_init(unsigned long, unsigned long); | ||
105 | extern void free_initmem(void); | ||
106 | extern void setup_bootmem_allocator(void); | ||
107 | |||
108 | |||
109 | #ifdef CONFIG_X86_USE_3DNOW | 24 | #ifdef CONFIG_X86_USE_3DNOW |
110 | #include <asm/mmx.h> | 25 | #include <asm/mmx.h> |
111 | 26 | ||
diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h new file mode 100644 index 000000000000..f1e4a79a6e41 --- /dev/null +++ b/arch/x86/include/asm/page_32_types.h | |||
@@ -0,0 +1,60 @@ | |||
1 | #ifndef _ASM_X86_PAGE_32_DEFS_H | ||
2 | #define _ASM_X86_PAGE_32_DEFS_H | ||
3 | |||
4 | #include <linux/const.h> | ||
5 | |||
6 | /* | ||
7 | * This handles the memory map. | ||
8 | * | ||
9 | * A __PAGE_OFFSET of 0xC0000000 means that the kernel has | ||
10 | * a virtual address space of one gigabyte, which limits the | ||
11 | * amount of physical memory you can use to about 950MB. | ||
12 | * | ||
13 | * If you want more physical memory than this then see the CONFIG_HIGHMEM4G | ||
14 | * and CONFIG_HIGHMEM64G options in the kernel configuration. | ||
15 | */ | ||
16 | #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) | ||
17 | |||
18 | #ifdef CONFIG_4KSTACKS | ||
19 | #define THREAD_ORDER 0 | ||
20 | #else | ||
21 | #define THREAD_ORDER 1 | ||
22 | #endif | ||
23 | #define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) | ||
24 | |||
25 | #define STACKFAULT_STACK 0 | ||
26 | #define DOUBLEFAULT_STACK 1 | ||
27 | #define NMI_STACK 0 | ||
28 | #define DEBUG_STACK 0 | ||
29 | #define MCE_STACK 0 | ||
30 | #define N_EXCEPTION_STACKS 1 | ||
31 | |||
32 | #ifdef CONFIG_X86_PAE | ||
33 | /* 44=32+12, the limit we can fit into an unsigned long pfn */ | ||
34 | #define __PHYSICAL_MASK_SHIFT 44 | ||
35 | #define __VIRTUAL_MASK_SHIFT 32 | ||
36 | |||
37 | #else /* !CONFIG_X86_PAE */ | ||
38 | #define __PHYSICAL_MASK_SHIFT 32 | ||
39 | #define __VIRTUAL_MASK_SHIFT 32 | ||
40 | #endif /* CONFIG_X86_PAE */ | ||
41 | |||
42 | #ifndef __ASSEMBLY__ | ||
43 | |||
44 | /* | ||
45 | * This much address space is reserved for vmalloc() and iomap() | ||
46 | * as well as fixmap mappings. | ||
47 | */ | ||
48 | extern unsigned int __VMALLOC_RESERVE; | ||
49 | extern int sysctl_legacy_va_layout; | ||
50 | |||
51 | extern void find_low_pfn_range(void); | ||
52 | extern unsigned long init_memory_mapping(unsigned long start, | ||
53 | unsigned long end); | ||
54 | extern void initmem_init(unsigned long, unsigned long); | ||
55 | extern void free_initmem(void); | ||
56 | extern void setup_bootmem_allocator(void); | ||
57 | |||
58 | #endif /* !__ASSEMBLY__ */ | ||
59 | |||
60 | #endif /* _ASM_X86_PAGE_32_DEFS_H */ | ||
diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h index 5ebca29f44f0..072694ed81a5 100644 --- a/arch/x86/include/asm/page_64.h +++ b/arch/x86/include/asm/page_64.h | |||
@@ -1,105 +1,6 @@ | |||
1 | #ifndef _ASM_X86_PAGE_64_H | 1 | #ifndef _ASM_X86_PAGE_64_H |
2 | #define _ASM_X86_PAGE_64_H | 2 | #define _ASM_X86_PAGE_64_H |
3 | 3 | ||
4 | #define PAGETABLE_LEVELS 4 | 4 | #include <asm/page_64_types.h> |
5 | |||
6 | #define THREAD_ORDER 1 | ||
7 | #define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) | ||
8 | #define CURRENT_MASK (~(THREAD_SIZE - 1)) | ||
9 | |||
10 | #define EXCEPTION_STACK_ORDER 0 | ||
11 | #define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER) | ||
12 | |||
13 | #define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1) | ||
14 | #define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER) | ||
15 | |||
16 | #define IRQSTACK_ORDER 2 | ||
17 | #define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER) | ||
18 | |||
19 | #define STACKFAULT_STACK 1 | ||
20 | #define DOUBLEFAULT_STACK 2 | ||
21 | #define NMI_STACK 3 | ||
22 | #define DEBUG_STACK 4 | ||
23 | #define MCE_STACK 5 | ||
24 | #define N_EXCEPTION_STACKS 5 /* hw limit: 7 */ | ||
25 | |||
26 | #define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT) | ||
27 | #define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1)) | ||
28 | |||
29 | /* | ||
30 | * Set __PAGE_OFFSET to the most negative possible address + | ||
31 | * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a | ||
32 | * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's | ||
33 | * what Xen requires. | ||
34 | */ | ||
35 | #define __PAGE_OFFSET _AC(0xffff880000000000, UL) | ||
36 | |||
37 | #define __PHYSICAL_START CONFIG_PHYSICAL_START | ||
38 | #define __KERNEL_ALIGN 0x200000 | ||
39 | |||
40 | /* | ||
41 | * Make sure kernel is aligned to 2MB address. Catching it at compile | ||
42 | * time is better. Change your config file and compile the kernel | ||
43 | * for a 2MB aligned address (CONFIG_PHYSICAL_START) | ||
44 | */ | ||
45 | #if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0 | ||
46 | #error "CONFIG_PHYSICAL_START must be a multiple of 2MB" | ||
47 | #endif | ||
48 | |||
49 | #define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START) | ||
50 | #define __START_KERNEL_map _AC(0xffffffff80000000, UL) | ||
51 | |||
52 | /* See Documentation/x86_64/mm.txt for a description of the memory map. */ | ||
53 | #define __PHYSICAL_MASK_SHIFT 46 | ||
54 | #define __VIRTUAL_MASK_SHIFT 48 | ||
55 | |||
56 | /* | ||
57 | * Kernel image size is limited to 512 MB (see level2_kernel_pgt in | ||
58 | * arch/x86/kernel/head_64.S), and it is mapped here: | ||
59 | */ | ||
60 | #define KERNEL_IMAGE_SIZE (512 * 1024 * 1024) | ||
61 | #define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL) | ||
62 | |||
63 | #ifndef __ASSEMBLY__ | ||
64 | void clear_page(void *page); | ||
65 | void copy_page(void *to, void *from); | ||
66 | |||
67 | /* duplicated to the one in bootmem.h */ | ||
68 | extern unsigned long max_pfn; | ||
69 | extern unsigned long phys_base; | ||
70 | |||
71 | extern unsigned long __phys_addr(unsigned long); | ||
72 | #define __phys_reloc_hide(x) (x) | ||
73 | |||
74 | /* | ||
75 | * These are used to make use of C type-checking.. | ||
76 | */ | ||
77 | typedef unsigned long pteval_t; | ||
78 | typedef unsigned long pmdval_t; | ||
79 | typedef unsigned long pudval_t; | ||
80 | typedef unsigned long pgdval_t; | ||
81 | typedef unsigned long pgprotval_t; | ||
82 | |||
83 | typedef struct page *pgtable_t; | ||
84 | |||
85 | typedef struct { pteval_t pte; } pte_t; | ||
86 | |||
87 | #define vmemmap ((struct page *)VMEMMAP_START) | ||
88 | |||
89 | extern unsigned long init_memory_mapping(unsigned long start, | ||
90 | unsigned long end); | ||
91 | |||
92 | extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn); | ||
93 | extern void free_initmem(void); | ||
94 | |||
95 | extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); | ||
96 | extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); | ||
97 | |||
98 | #endif /* !__ASSEMBLY__ */ | ||
99 | |||
100 | #ifdef CONFIG_FLATMEM | ||
101 | #define pfn_valid(pfn) ((pfn) < max_pfn) | ||
102 | #endif | ||
103 | |||
104 | 5 | ||
105 | #endif /* _ASM_X86_PAGE_64_H */ | 6 | #endif /* _ASM_X86_PAGE_64_H */ |
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h new file mode 100644 index 000000000000..d38c91b70248 --- /dev/null +++ b/arch/x86/include/asm/page_64_types.h | |||
@@ -0,0 +1,89 @@ | |||
1 | #ifndef _ASM_X86_PAGE_64_DEFS_H | ||
2 | #define _ASM_X86_PAGE_64_DEFS_H | ||
3 | |||
4 | #define THREAD_ORDER 1 | ||
5 | #define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) | ||
6 | #define CURRENT_MASK (~(THREAD_SIZE - 1)) | ||
7 | |||
8 | #define EXCEPTION_STACK_ORDER 0 | ||
9 | #define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER) | ||
10 | |||
11 | #define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1) | ||
12 | #define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER) | ||
13 | |||
14 | #define IRQ_STACK_ORDER 2 | ||
15 | #define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER) | ||
16 | |||
17 | #define STACKFAULT_STACK 1 | ||
18 | #define DOUBLEFAULT_STACK 2 | ||
19 | #define NMI_STACK 3 | ||
20 | #define DEBUG_STACK 4 | ||
21 | #define MCE_STACK 5 | ||
22 | #define N_EXCEPTION_STACKS 5 /* hw limit: 7 */ | ||
23 | |||
24 | #define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT) | ||
25 | #define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1)) | ||
26 | |||
27 | /* | ||
28 | * Set __PAGE_OFFSET to the most negative possible address + | ||
29 | * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a | ||
30 | * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's | ||
31 | * what Xen requires. | ||
32 | */ | ||
33 | #define __PAGE_OFFSET _AC(0xffff880000000000, UL) | ||
34 | |||
35 | #define __PHYSICAL_START CONFIG_PHYSICAL_START | ||
36 | #define __KERNEL_ALIGN 0x200000 | ||
37 | |||
38 | /* | ||
39 | * Make sure kernel is aligned to 2MB address. Catching it at compile | ||
40 | * time is better. Change your config file and compile the kernel | ||
41 | * for a 2MB aligned address (CONFIG_PHYSICAL_START) | ||
42 | */ | ||
43 | #if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0 | ||
44 | #error "CONFIG_PHYSICAL_START must be a multiple of 2MB" | ||
45 | #endif | ||
46 | |||
47 | #define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START) | ||
48 | #define __START_KERNEL_map _AC(0xffffffff80000000, UL) | ||
49 | |||
50 | /* See Documentation/x86_64/mm.txt for a description of the memory map. */ | ||
51 | #define __PHYSICAL_MASK_SHIFT 46 | ||
52 | #define __VIRTUAL_MASK_SHIFT 48 | ||
53 | |||
54 | /* | ||
55 | * Kernel image size is limited to 512 MB (see level2_kernel_pgt in | ||
56 | * arch/x86/kernel/head_64.S), and it is mapped here: | ||
57 | */ | ||
58 | #define KERNEL_IMAGE_SIZE (512 * 1024 * 1024) | ||
59 | #define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL) | ||
60 | |||
61 | #ifndef __ASSEMBLY__ | ||
62 | void clear_page(void *page); | ||
63 | void copy_page(void *to, void *from); | ||
64 | |||
65 | /* duplicated to the one in bootmem.h */ | ||
66 | extern unsigned long max_pfn; | ||
67 | extern unsigned long phys_base; | ||
68 | |||
69 | extern unsigned long __phys_addr(unsigned long); | ||
70 | #define __phys_reloc_hide(x) (x) | ||
71 | |||
72 | #define vmemmap ((struct page *)VMEMMAP_START) | ||
73 | |||
74 | extern unsigned long init_memory_mapping(unsigned long start, | ||
75 | unsigned long end); | ||
76 | |||
77 | extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn); | ||
78 | extern void free_initmem(void); | ||
79 | |||
80 | extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); | ||
81 | extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); | ||
82 | |||
83 | #endif /* !__ASSEMBLY__ */ | ||
84 | |||
85 | #ifdef CONFIG_FLATMEM | ||
86 | #define pfn_valid(pfn) ((pfn) < max_pfn) | ||
87 | #endif | ||
88 | |||
89 | #endif /* _ASM_X86_PAGE_64_DEFS_H */ | ||
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h new file mode 100644 index 000000000000..2d625da6603c --- /dev/null +++ b/arch/x86/include/asm/page_types.h | |||
@@ -0,0 +1,57 @@ | |||
1 | #ifndef _ASM_X86_PAGE_DEFS_H | ||
2 | #define _ASM_X86_PAGE_DEFS_H | ||
3 | |||
4 | #include <linux/const.h> | ||
5 | |||
6 | /* PAGE_SHIFT determines the page size */ | ||
7 | #define PAGE_SHIFT 12 | ||
8 | #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) | ||
9 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
10 | |||
11 | #define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1) | ||
12 | #define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1) | ||
13 | |||
14 | /* Cast PAGE_MASK to a signed type so that it is sign-extended if | ||
15 | virtual addresses are 32-bits but physical addresses are larger | ||
16 | (ie, 32-bit PAE). */ | ||
17 | #define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK) | ||
18 | |||
19 | #define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT) | ||
20 | #define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1)) | ||
21 | |||
22 | #define HPAGE_SHIFT PMD_SHIFT | ||
23 | #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) | ||
24 | #define HPAGE_MASK (~(HPAGE_SIZE - 1)) | ||
25 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) | ||
26 | |||
27 | #define HUGE_MAX_HSTATE 2 | ||
28 | |||
29 | #define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) | ||
30 | |||
31 | #define VM_DATA_DEFAULT_FLAGS \ | ||
32 | (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \ | ||
33 | VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
34 | |||
35 | #ifdef CONFIG_X86_64 | ||
36 | #include <asm/page_64_types.h> | ||
37 | #else | ||
38 | #include <asm/page_32_types.h> | ||
39 | #endif /* CONFIG_X86_64 */ | ||
40 | |||
41 | #ifndef __ASSEMBLY__ | ||
42 | |||
43 | struct pgprot; | ||
44 | |||
45 | extern int page_is_ram(unsigned long pagenr); | ||
46 | extern int devmem_is_allowed(unsigned long pagenr); | ||
47 | extern void map_devmem(unsigned long pfn, unsigned long size, | ||
48 | struct pgprot vma_prot); | ||
49 | extern void unmap_devmem(unsigned long pfn, unsigned long size, | ||
50 | struct pgprot vma_prot); | ||
51 | |||
52 | extern unsigned long max_low_pfn_mapped; | ||
53 | extern unsigned long max_pfn_mapped; | ||
54 | |||
55 | #endif /* !__ASSEMBLY__ */ | ||
56 | |||
57 | #endif /* _ASM_X86_PAGE_DEFS_H */ | ||
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h index e299287e8e33..0617d5cc9712 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * para-virtualization: those hooks are defined here. */ | 4 | * para-virtualization: those hooks are defined here. */ |
5 | 5 | ||
6 | #ifdef CONFIG_PARAVIRT | 6 | #ifdef CONFIG_PARAVIRT |
7 | #include <asm/page.h> | 7 | #include <asm/pgtable_types.h> |
8 | #include <asm/asm.h> | 8 | #include <asm/asm.h> |
9 | 9 | ||
10 | /* Bitmask of what can be clobbered: usually at least eax. */ | 10 | /* Bitmask of what can be clobbered: usually at least eax. */ |
@@ -12,21 +12,38 @@ | |||
12 | #define CLBR_EAX (1 << 0) | 12 | #define CLBR_EAX (1 << 0) |
13 | #define CLBR_ECX (1 << 1) | 13 | #define CLBR_ECX (1 << 1) |
14 | #define CLBR_EDX (1 << 2) | 14 | #define CLBR_EDX (1 << 2) |
15 | #define CLBR_EDI (1 << 3) | ||
15 | 16 | ||
16 | #ifdef CONFIG_X86_64 | 17 | #ifdef CONFIG_X86_32 |
17 | #define CLBR_RSI (1 << 3) | 18 | /* CLBR_ANY should match all regs platform has. For i386, that's just it */ |
18 | #define CLBR_RDI (1 << 4) | 19 | #define CLBR_ANY ((1 << 4) - 1) |
20 | |||
21 | #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) | ||
22 | #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) | ||
23 | #define CLBR_SCRATCH (0) | ||
24 | #else | ||
25 | #define CLBR_RAX CLBR_EAX | ||
26 | #define CLBR_RCX CLBR_ECX | ||
27 | #define CLBR_RDX CLBR_EDX | ||
28 | #define CLBR_RDI CLBR_EDI | ||
29 | #define CLBR_RSI (1 << 4) | ||
19 | #define CLBR_R8 (1 << 5) | 30 | #define CLBR_R8 (1 << 5) |
20 | #define CLBR_R9 (1 << 6) | 31 | #define CLBR_R9 (1 << 6) |
21 | #define CLBR_R10 (1 << 7) | 32 | #define CLBR_R10 (1 << 7) |
22 | #define CLBR_R11 (1 << 8) | 33 | #define CLBR_R11 (1 << 8) |
34 | |||
23 | #define CLBR_ANY ((1 << 9) - 1) | 35 | #define CLBR_ANY ((1 << 9) - 1) |
36 | |||
37 | #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ | ||
38 | CLBR_RCX | CLBR_R8 | CLBR_R9) | ||
39 | #define CLBR_RET_REG (CLBR_RAX) | ||
40 | #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) | ||
41 | |||
24 | #include <asm/desc_defs.h> | 42 | #include <asm/desc_defs.h> |
25 | #else | ||
26 | /* CLBR_ANY should match all regs platform has. For i386, that's just it */ | ||
27 | #define CLBR_ANY ((1 << 3) - 1) | ||
28 | #endif /* X86_64 */ | 43 | #endif /* X86_64 */ |
29 | 44 | ||
45 | #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) | ||
46 | |||
30 | #ifndef __ASSEMBLY__ | 47 | #ifndef __ASSEMBLY__ |
31 | #include <linux/types.h> | 48 | #include <linux/types.h> |
32 | #include <linux/cpumask.h> | 49 | #include <linux/cpumask.h> |
@@ -40,6 +57,14 @@ struct tss_struct; | |||
40 | struct mm_struct; | 57 | struct mm_struct; |
41 | struct desc_struct; | 58 | struct desc_struct; |
42 | 59 | ||
60 | /* | ||
61 | * Wrapper type for pointers to code which uses the non-standard | ||
62 | * calling convention. See PV_CALL_SAVE_REGS_THUNK below. | ||
63 | */ | ||
64 | struct paravirt_callee_save { | ||
65 | void *func; | ||
66 | }; | ||
67 | |||
43 | /* general info */ | 68 | /* general info */ |
44 | struct pv_info { | 69 | struct pv_info { |
45 | unsigned int kernel_rpl; | 70 | unsigned int kernel_rpl; |
@@ -189,11 +214,15 @@ struct pv_irq_ops { | |||
189 | * expected to use X86_EFLAGS_IF; all other bits | 214 | * expected to use X86_EFLAGS_IF; all other bits |
190 | * returned from save_fl are undefined, and may be ignored by | 215 | * returned from save_fl are undefined, and may be ignored by |
191 | * restore_fl. | 216 | * restore_fl. |
217 | * | ||
218 | * NOTE: These functions callers expect the callee to preserve | ||
219 | * more registers than the standard C calling convention. | ||
192 | */ | 220 | */ |
193 | unsigned long (*save_fl)(void); | 221 | struct paravirt_callee_save save_fl; |
194 | void (*restore_fl)(unsigned long); | 222 | struct paravirt_callee_save restore_fl; |
195 | void (*irq_disable)(void); | 223 | struct paravirt_callee_save irq_disable; |
196 | void (*irq_enable)(void); | 224 | struct paravirt_callee_save irq_enable; |
225 | |||
197 | void (*safe_halt)(void); | 226 | void (*safe_halt)(void); |
198 | void (*halt)(void); | 227 | void (*halt)(void); |
199 | 228 | ||
@@ -244,7 +273,8 @@ struct pv_mmu_ops { | |||
244 | void (*flush_tlb_user)(void); | 273 | void (*flush_tlb_user)(void); |
245 | void (*flush_tlb_kernel)(void); | 274 | void (*flush_tlb_kernel)(void); |
246 | void (*flush_tlb_single)(unsigned long addr); | 275 | void (*flush_tlb_single)(unsigned long addr); |
247 | void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, | 276 | void (*flush_tlb_others)(const struct cpumask *cpus, |
277 | struct mm_struct *mm, | ||
248 | unsigned long va); | 278 | unsigned long va); |
249 | 279 | ||
250 | /* Hooks for allocating and freeing a pagetable top-level */ | 280 | /* Hooks for allocating and freeing a pagetable top-level */ |
@@ -278,12 +308,11 @@ struct pv_mmu_ops { | |||
278 | void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, | 308 | void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, |
279 | pte_t *ptep, pte_t pte); | 309 | pte_t *ptep, pte_t pte); |
280 | 310 | ||
281 | pteval_t (*pte_val)(pte_t); | 311 | struct paravirt_callee_save pte_val; |
282 | pteval_t (*pte_flags)(pte_t); | 312 | struct paravirt_callee_save make_pte; |
283 | pte_t (*make_pte)(pteval_t pte); | ||
284 | 313 | ||
285 | pgdval_t (*pgd_val)(pgd_t); | 314 | struct paravirt_callee_save pgd_val; |
286 | pgd_t (*make_pgd)(pgdval_t pgd); | 315 | struct paravirt_callee_save make_pgd; |
287 | 316 | ||
288 | #if PAGETABLE_LEVELS >= 3 | 317 | #if PAGETABLE_LEVELS >= 3 |
289 | #ifdef CONFIG_X86_PAE | 318 | #ifdef CONFIG_X86_PAE |
@@ -298,12 +327,12 @@ struct pv_mmu_ops { | |||
298 | 327 | ||
299 | void (*set_pud)(pud_t *pudp, pud_t pudval); | 328 | void (*set_pud)(pud_t *pudp, pud_t pudval); |
300 | 329 | ||
301 | pmdval_t (*pmd_val)(pmd_t); | 330 | struct paravirt_callee_save pmd_val; |
302 | pmd_t (*make_pmd)(pmdval_t pmd); | 331 | struct paravirt_callee_save make_pmd; |
303 | 332 | ||
304 | #if PAGETABLE_LEVELS == 4 | 333 | #if PAGETABLE_LEVELS == 4 |
305 | pudval_t (*pud_val)(pud_t); | 334 | struct paravirt_callee_save pud_val; |
306 | pud_t (*make_pud)(pudval_t pud); | 335 | struct paravirt_callee_save make_pud; |
307 | 336 | ||
308 | void (*set_pgd)(pgd_t *pudp, pgd_t pgdval); | 337 | void (*set_pgd)(pgd_t *pudp, pgd_t pgdval); |
309 | #endif /* PAGETABLE_LEVELS == 4 */ | 338 | #endif /* PAGETABLE_LEVELS == 4 */ |
@@ -388,6 +417,8 @@ extern struct pv_lock_ops pv_lock_ops; | |||
388 | asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":") | 417 | asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":") |
389 | 418 | ||
390 | unsigned paravirt_patch_nop(void); | 419 | unsigned paravirt_patch_nop(void); |
420 | unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len); | ||
421 | unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len); | ||
391 | unsigned paravirt_patch_ignore(unsigned len); | 422 | unsigned paravirt_patch_ignore(unsigned len); |
392 | unsigned paravirt_patch_call(void *insnbuf, | 423 | unsigned paravirt_patch_call(void *insnbuf, |
393 | const void *target, u16 tgt_clobbers, | 424 | const void *target, u16 tgt_clobbers, |
@@ -479,25 +510,45 @@ int paravirt_disable_iospace(void); | |||
479 | * makes sure the incoming and outgoing types are always correct. | 510 | * makes sure the incoming and outgoing types are always correct. |
480 | */ | 511 | */ |
481 | #ifdef CONFIG_X86_32 | 512 | #ifdef CONFIG_X86_32 |
482 | #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx | 513 | #define PVOP_VCALL_ARGS \ |
514 | unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx | ||
483 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS | 515 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS |
516 | |||
517 | #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) | ||
518 | #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) | ||
519 | #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) | ||
520 | |||
484 | #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ | 521 | #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ |
485 | "=c" (__ecx) | 522 | "=c" (__ecx) |
486 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS | 523 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS |
524 | |||
525 | #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) | ||
526 | #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS | ||
527 | |||
487 | #define EXTRA_CLOBBERS | 528 | #define EXTRA_CLOBBERS |
488 | #define VEXTRA_CLOBBERS | 529 | #define VEXTRA_CLOBBERS |
489 | #else | 530 | #else /* CONFIG_X86_64 */ |
490 | #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx | 531 | #define PVOP_VCALL_ARGS \ |
532 | unsigned long __edi = __edi, __esi = __esi, \ | ||
533 | __edx = __edx, __ecx = __ecx | ||
491 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax | 534 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax |
535 | |||
536 | #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) | ||
537 | #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) | ||
538 | #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) | ||
539 | #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) | ||
540 | |||
492 | #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ | 541 | #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ |
493 | "=S" (__esi), "=d" (__edx), \ | 542 | "=S" (__esi), "=d" (__edx), \ |
494 | "=c" (__ecx) | 543 | "=c" (__ecx) |
495 | |||
496 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) | 544 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) |
497 | 545 | ||
546 | #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) | ||
547 | #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS | ||
548 | |||
498 | #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" | 549 | #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" |
499 | #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" | 550 | #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" |
500 | #endif | 551 | #endif /* CONFIG_X86_32 */ |
501 | 552 | ||
502 | #ifdef CONFIG_PARAVIRT_DEBUG | 553 | #ifdef CONFIG_PARAVIRT_DEBUG |
503 | #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) | 554 | #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) |
@@ -505,10 +556,11 @@ int paravirt_disable_iospace(void); | |||
505 | #define PVOP_TEST_NULL(op) ((void)op) | 556 | #define PVOP_TEST_NULL(op) ((void)op) |
506 | #endif | 557 | #endif |
507 | 558 | ||
508 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ | 559 | #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ |
560 | pre, post, ...) \ | ||
509 | ({ \ | 561 | ({ \ |
510 | rettype __ret; \ | 562 | rettype __ret; \ |
511 | PVOP_CALL_ARGS; \ | 563 | PVOP_CALL_ARGS; \ |
512 | PVOP_TEST_NULL(op); \ | 564 | PVOP_TEST_NULL(op); \ |
513 | /* This is 32-bit specific, but is okay in 64-bit */ \ | 565 | /* This is 32-bit specific, but is okay in 64-bit */ \ |
514 | /* since this condition will never hold */ \ | 566 | /* since this condition will never hold */ \ |
@@ -516,70 +568,113 @@ int paravirt_disable_iospace(void); | |||
516 | asm volatile(pre \ | 568 | asm volatile(pre \ |
517 | paravirt_alt(PARAVIRT_CALL) \ | 569 | paravirt_alt(PARAVIRT_CALL) \ |
518 | post \ | 570 | post \ |
519 | : PVOP_CALL_CLOBBERS \ | 571 | : call_clbr \ |
520 | : paravirt_type(op), \ | 572 | : paravirt_type(op), \ |
521 | paravirt_clobber(CLBR_ANY), \ | 573 | paravirt_clobber(clbr), \ |
522 | ##__VA_ARGS__ \ | 574 | ##__VA_ARGS__ \ |
523 | : "memory", "cc" EXTRA_CLOBBERS); \ | 575 | : "memory", "cc" extra_clbr); \ |
524 | __ret = (rettype)((((u64)__edx) << 32) | __eax); \ | 576 | __ret = (rettype)((((u64)__edx) << 32) | __eax); \ |
525 | } else { \ | 577 | } else { \ |
526 | asm volatile(pre \ | 578 | asm volatile(pre \ |
527 | paravirt_alt(PARAVIRT_CALL) \ | 579 | paravirt_alt(PARAVIRT_CALL) \ |
528 | post \ | 580 | post \ |
529 | : PVOP_CALL_CLOBBERS \ | 581 | : call_clbr \ |
530 | : paravirt_type(op), \ | 582 | : paravirt_type(op), \ |
531 | paravirt_clobber(CLBR_ANY), \ | 583 | paravirt_clobber(clbr), \ |
532 | ##__VA_ARGS__ \ | 584 | ##__VA_ARGS__ \ |
533 | : "memory", "cc" EXTRA_CLOBBERS); \ | 585 | : "memory", "cc" extra_clbr); \ |
534 | __ret = (rettype)__eax; \ | 586 | __ret = (rettype)__eax; \ |
535 | } \ | 587 | } \ |
536 | __ret; \ | 588 | __ret; \ |
537 | }) | 589 | }) |
538 | #define __PVOP_VCALL(op, pre, post, ...) \ | 590 | |
591 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ | ||
592 | ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ | ||
593 | EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) | ||
594 | |||
595 | #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ | ||
596 | ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ | ||
597 | PVOP_CALLEE_CLOBBERS, , \ | ||
598 | pre, post, ##__VA_ARGS__) | ||
599 | |||
600 | |||
601 | #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ | ||
539 | ({ \ | 602 | ({ \ |
540 | PVOP_VCALL_ARGS; \ | 603 | PVOP_VCALL_ARGS; \ |
541 | PVOP_TEST_NULL(op); \ | 604 | PVOP_TEST_NULL(op); \ |
542 | asm volatile(pre \ | 605 | asm volatile(pre \ |
543 | paravirt_alt(PARAVIRT_CALL) \ | 606 | paravirt_alt(PARAVIRT_CALL) \ |
544 | post \ | 607 | post \ |
545 | : PVOP_VCALL_CLOBBERS \ | 608 | : call_clbr \ |
546 | : paravirt_type(op), \ | 609 | : paravirt_type(op), \ |
547 | paravirt_clobber(CLBR_ANY), \ | 610 | paravirt_clobber(clbr), \ |
548 | ##__VA_ARGS__ \ | 611 | ##__VA_ARGS__ \ |
549 | : "memory", "cc" VEXTRA_CLOBBERS); \ | 612 | : "memory", "cc" extra_clbr); \ |
550 | }) | 613 | }) |
551 | 614 | ||
615 | #define __PVOP_VCALL(op, pre, post, ...) \ | ||
616 | ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ | ||
617 | VEXTRA_CLOBBERS, \ | ||
618 | pre, post, ##__VA_ARGS__) | ||
619 | |||
620 | #define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...) \ | ||
621 | ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ | ||
622 | PVOP_VCALLEE_CLOBBERS, , \ | ||
623 | pre, post, ##__VA_ARGS__) | ||
624 | |||
625 | |||
626 | |||
552 | #define PVOP_CALL0(rettype, op) \ | 627 | #define PVOP_CALL0(rettype, op) \ |
553 | __PVOP_CALL(rettype, op, "", "") | 628 | __PVOP_CALL(rettype, op, "", "") |
554 | #define PVOP_VCALL0(op) \ | 629 | #define PVOP_VCALL0(op) \ |
555 | __PVOP_VCALL(op, "", "") | 630 | __PVOP_VCALL(op, "", "") |
556 | 631 | ||
632 | #define PVOP_CALLEE0(rettype, op) \ | ||
633 | __PVOP_CALLEESAVE(rettype, op, "", "") | ||
634 | #define PVOP_VCALLEE0(op) \ | ||
635 | __PVOP_VCALLEESAVE(op, "", "") | ||
636 | |||
637 | |||
557 | #define PVOP_CALL1(rettype, op, arg1) \ | 638 | #define PVOP_CALL1(rettype, op, arg1) \ |
558 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1))) | 639 | __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) |
559 | #define PVOP_VCALL1(op, arg1) \ | 640 | #define PVOP_VCALL1(op, arg1) \ |
560 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1))) | 641 | __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) |
642 | |||
643 | #define PVOP_CALLEE1(rettype, op, arg1) \ | ||
644 | __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) | ||
645 | #define PVOP_VCALLEE1(op, arg1) \ | ||
646 | __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) | ||
647 | |||
561 | 648 | ||
562 | #define PVOP_CALL2(rettype, op, arg1, arg2) \ | 649 | #define PVOP_CALL2(rettype, op, arg1, arg2) \ |
563 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ | 650 | __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ |
564 | "1" ((unsigned long)(arg2))) | 651 | PVOP_CALL_ARG2(arg2)) |
565 | #define PVOP_VCALL2(op, arg1, arg2) \ | 652 | #define PVOP_VCALL2(op, arg1, arg2) \ |
566 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ | 653 | __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ |
567 | "1" ((unsigned long)(arg2))) | 654 | PVOP_CALL_ARG2(arg2)) |
655 | |||
656 | #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ | ||
657 | __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ | ||
658 | PVOP_CALL_ARG2(arg2)) | ||
659 | #define PVOP_VCALLEE2(op, arg1, arg2) \ | ||
660 | __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ | ||
661 | PVOP_CALL_ARG2(arg2)) | ||
662 | |||
568 | 663 | ||
569 | #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ | 664 | #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ |
570 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ | 665 | __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ |
571 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) | 666 | PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) |
572 | #define PVOP_VCALL3(op, arg1, arg2, arg3) \ | 667 | #define PVOP_VCALL3(op, arg1, arg2, arg3) \ |
573 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ | 668 | __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ |
574 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) | 669 | PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) |
575 | 670 | ||
576 | /* This is the only difference in x86_64. We can make it much simpler */ | 671 | /* This is the only difference in x86_64. We can make it much simpler */ |
577 | #ifdef CONFIG_X86_32 | 672 | #ifdef CONFIG_X86_32 |
578 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | 673 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ |
579 | __PVOP_CALL(rettype, op, \ | 674 | __PVOP_CALL(rettype, op, \ |
580 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | 675 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ |
581 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | 676 | PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ |
582 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | 677 | PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) |
583 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | 678 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ |
584 | __PVOP_VCALL(op, \ | 679 | __PVOP_VCALL(op, \ |
585 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | 680 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ |
@@ -587,13 +682,13 @@ int paravirt_disable_iospace(void); | |||
587 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | 682 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) |
588 | #else | 683 | #else |
589 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | 684 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ |
590 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ | 685 | __PVOP_CALL(rettype, op, "", "", \ |
591 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ | 686 | PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ |
592 | "3"((unsigned long)(arg4))) | 687 | PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) |
593 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | 688 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ |
594 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ | 689 | __PVOP_VCALL(op, "", "", \ |
595 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ | 690 | PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ |
596 | "3"((unsigned long)(arg4))) | 691 | PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) |
597 | #endif | 692 | #endif |
598 | 693 | ||
599 | static inline int paravirt_enabled(void) | 694 | static inline int paravirt_enabled(void) |
@@ -984,10 +1079,11 @@ static inline void __flush_tlb_single(unsigned long addr) | |||
984 | PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr); | 1079 | PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr); |
985 | } | 1080 | } |
986 | 1081 | ||
987 | static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | 1082 | static inline void flush_tlb_others(const struct cpumask *cpumask, |
1083 | struct mm_struct *mm, | ||
988 | unsigned long va) | 1084 | unsigned long va) |
989 | { | 1085 | { |
990 | PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va); | 1086 | PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va); |
991 | } | 1087 | } |
992 | 1088 | ||
993 | static inline int paravirt_pgd_alloc(struct mm_struct *mm) | 1089 | static inline int paravirt_pgd_alloc(struct mm_struct *mm) |
@@ -1059,13 +1155,13 @@ static inline pte_t __pte(pteval_t val) | |||
1059 | pteval_t ret; | 1155 | pteval_t ret; |
1060 | 1156 | ||
1061 | if (sizeof(pteval_t) > sizeof(long)) | 1157 | if (sizeof(pteval_t) > sizeof(long)) |
1062 | ret = PVOP_CALL2(pteval_t, | 1158 | ret = PVOP_CALLEE2(pteval_t, |
1063 | pv_mmu_ops.make_pte, | 1159 | pv_mmu_ops.make_pte, |
1064 | val, (u64)val >> 32); | 1160 | val, (u64)val >> 32); |
1065 | else | 1161 | else |
1066 | ret = PVOP_CALL1(pteval_t, | 1162 | ret = PVOP_CALLEE1(pteval_t, |
1067 | pv_mmu_ops.make_pte, | 1163 | pv_mmu_ops.make_pte, |
1068 | val); | 1164 | val); |
1069 | 1165 | ||
1070 | return (pte_t) { .pte = ret }; | 1166 | return (pte_t) { .pte = ret }; |
1071 | } | 1167 | } |
@@ -1075,29 +1171,12 @@ static inline pteval_t pte_val(pte_t pte) | |||
1075 | pteval_t ret; | 1171 | pteval_t ret; |
1076 | 1172 | ||
1077 | if (sizeof(pteval_t) > sizeof(long)) | 1173 | if (sizeof(pteval_t) > sizeof(long)) |
1078 | ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val, | 1174 | ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val, |
1079 | pte.pte, (u64)pte.pte >> 32); | 1175 | pte.pte, (u64)pte.pte >> 32); |
1080 | else | ||
1081 | ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val, | ||
1082 | pte.pte); | ||
1083 | |||
1084 | return ret; | ||
1085 | } | ||
1086 | |||
1087 | static inline pteval_t pte_flags(pte_t pte) | ||
1088 | { | ||
1089 | pteval_t ret; | ||
1090 | |||
1091 | if (sizeof(pteval_t) > sizeof(long)) | ||
1092 | ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags, | ||
1093 | pte.pte, (u64)pte.pte >> 32); | ||
1094 | else | 1176 | else |
1095 | ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags, | 1177 | ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val, |
1096 | pte.pte); | 1178 | pte.pte); |
1097 | 1179 | ||
1098 | #ifdef CONFIG_PARAVIRT_DEBUG | ||
1099 | BUG_ON(ret & PTE_PFN_MASK); | ||
1100 | #endif | ||
1101 | return ret; | 1180 | return ret; |
1102 | } | 1181 | } |
1103 | 1182 | ||
@@ -1106,11 +1185,11 @@ static inline pgd_t __pgd(pgdval_t val) | |||
1106 | pgdval_t ret; | 1185 | pgdval_t ret; |
1107 | 1186 | ||
1108 | if (sizeof(pgdval_t) > sizeof(long)) | 1187 | if (sizeof(pgdval_t) > sizeof(long)) |
1109 | ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd, | 1188 | ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd, |
1110 | val, (u64)val >> 32); | 1189 | val, (u64)val >> 32); |
1111 | else | 1190 | else |
1112 | ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd, | 1191 | ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd, |
1113 | val); | 1192 | val); |
1114 | 1193 | ||
1115 | return (pgd_t) { ret }; | 1194 | return (pgd_t) { ret }; |
1116 | } | 1195 | } |
@@ -1120,11 +1199,11 @@ static inline pgdval_t pgd_val(pgd_t pgd) | |||
1120 | pgdval_t ret; | 1199 | pgdval_t ret; |
1121 | 1200 | ||
1122 | if (sizeof(pgdval_t) > sizeof(long)) | 1201 | if (sizeof(pgdval_t) > sizeof(long)) |
1123 | ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val, | 1202 | ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val, |
1124 | pgd.pgd, (u64)pgd.pgd >> 32); | 1203 | pgd.pgd, (u64)pgd.pgd >> 32); |
1125 | else | 1204 | else |
1126 | ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val, | 1205 | ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val, |
1127 | pgd.pgd); | 1206 | pgd.pgd); |
1128 | 1207 | ||
1129 | return ret; | 1208 | return ret; |
1130 | } | 1209 | } |
@@ -1188,11 +1267,11 @@ static inline pmd_t __pmd(pmdval_t val) | |||
1188 | pmdval_t ret; | 1267 | pmdval_t ret; |
1189 | 1268 | ||
1190 | if (sizeof(pmdval_t) > sizeof(long)) | 1269 | if (sizeof(pmdval_t) > sizeof(long)) |
1191 | ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd, | 1270 | ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd, |
1192 | val, (u64)val >> 32); | 1271 | val, (u64)val >> 32); |
1193 | else | 1272 | else |
1194 | ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd, | 1273 | ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd, |
1195 | val); | 1274 | val); |
1196 | 1275 | ||
1197 | return (pmd_t) { ret }; | 1276 | return (pmd_t) { ret }; |
1198 | } | 1277 | } |
@@ -1202,11 +1281,11 @@ static inline pmdval_t pmd_val(pmd_t pmd) | |||
1202 | pmdval_t ret; | 1281 | pmdval_t ret; |
1203 | 1282 | ||
1204 | if (sizeof(pmdval_t) > sizeof(long)) | 1283 | if (sizeof(pmdval_t) > sizeof(long)) |
1205 | ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val, | 1284 | ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val, |
1206 | pmd.pmd, (u64)pmd.pmd >> 32); | 1285 | pmd.pmd, (u64)pmd.pmd >> 32); |
1207 | else | 1286 | else |
1208 | ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val, | 1287 | ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val, |
1209 | pmd.pmd); | 1288 | pmd.pmd); |
1210 | 1289 | ||
1211 | return ret; | 1290 | return ret; |
1212 | } | 1291 | } |
@@ -1228,11 +1307,11 @@ static inline pud_t __pud(pudval_t val) | |||
1228 | pudval_t ret; | 1307 | pudval_t ret; |
1229 | 1308 | ||
1230 | if (sizeof(pudval_t) > sizeof(long)) | 1309 | if (sizeof(pudval_t) > sizeof(long)) |
1231 | ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud, | 1310 | ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud, |
1232 | val, (u64)val >> 32); | 1311 | val, (u64)val >> 32); |
1233 | else | 1312 | else |
1234 | ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud, | 1313 | ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud, |
1235 | val); | 1314 | val); |
1236 | 1315 | ||
1237 | return (pud_t) { ret }; | 1316 | return (pud_t) { ret }; |
1238 | } | 1317 | } |
@@ -1242,11 +1321,11 @@ static inline pudval_t pud_val(pud_t pud) | |||
1242 | pudval_t ret; | 1321 | pudval_t ret; |
1243 | 1322 | ||
1244 | if (sizeof(pudval_t) > sizeof(long)) | 1323 | if (sizeof(pudval_t) > sizeof(long)) |
1245 | ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val, | 1324 | ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val, |
1246 | pud.pud, (u64)pud.pud >> 32); | 1325 | pud.pud, (u64)pud.pud >> 32); |
1247 | else | 1326 | else |
1248 | ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val, | 1327 | ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val, |
1249 | pud.pud); | 1328 | pud.pud); |
1250 | 1329 | ||
1251 | return ret; | 1330 | return ret; |
1252 | } | 1331 | } |
@@ -1374,9 +1453,10 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, | |||
1374 | } | 1453 | } |
1375 | 1454 | ||
1376 | void _paravirt_nop(void); | 1455 | void _paravirt_nop(void); |
1377 | #define paravirt_nop ((void *)_paravirt_nop) | 1456 | u32 _paravirt_ident_32(u32); |
1457 | u64 _paravirt_ident_64(u64); | ||
1378 | 1458 | ||
1379 | void paravirt_use_bytelocks(void); | 1459 | #define paravirt_nop ((void *)_paravirt_nop) |
1380 | 1460 | ||
1381 | #ifdef CONFIG_SMP | 1461 | #ifdef CONFIG_SMP |
1382 | 1462 | ||
@@ -1426,12 +1506,37 @@ extern struct paravirt_patch_site __parainstructions[], | |||
1426 | __parainstructions_end[]; | 1506 | __parainstructions_end[]; |
1427 | 1507 | ||
1428 | #ifdef CONFIG_X86_32 | 1508 | #ifdef CONFIG_X86_32 |
1429 | #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;" | 1509 | #define PV_SAVE_REGS "pushl %ecx; pushl %edx;" |
1430 | #define PV_RESTORE_REGS "popl %%edx; popl %%ecx" | 1510 | #define PV_RESTORE_REGS "popl %edx; popl %ecx;" |
1511 | |||
1512 | /* save and restore all caller-save registers, except return value */ | ||
1513 | #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;" | ||
1514 | #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;" | ||
1515 | |||
1431 | #define PV_FLAGS_ARG "0" | 1516 | #define PV_FLAGS_ARG "0" |
1432 | #define PV_EXTRA_CLOBBERS | 1517 | #define PV_EXTRA_CLOBBERS |
1433 | #define PV_VEXTRA_CLOBBERS | 1518 | #define PV_VEXTRA_CLOBBERS |
1434 | #else | 1519 | #else |
1520 | /* save and restore all caller-save registers, except return value */ | ||
1521 | #define PV_SAVE_ALL_CALLER_REGS \ | ||
1522 | "push %rcx;" \ | ||
1523 | "push %rdx;" \ | ||
1524 | "push %rsi;" \ | ||
1525 | "push %rdi;" \ | ||
1526 | "push %r8;" \ | ||
1527 | "push %r9;" \ | ||
1528 | "push %r10;" \ | ||
1529 | "push %r11;" | ||
1530 | #define PV_RESTORE_ALL_CALLER_REGS \ | ||
1531 | "pop %r11;" \ | ||
1532 | "pop %r10;" \ | ||
1533 | "pop %r9;" \ | ||
1534 | "pop %r8;" \ | ||
1535 | "pop %rdi;" \ | ||
1536 | "pop %rsi;" \ | ||
1537 | "pop %rdx;" \ | ||
1538 | "pop %rcx;" | ||
1539 | |||
1435 | /* We save some registers, but all of them, that's too much. We clobber all | 1540 | /* We save some registers, but all of them, that's too much. We clobber all |
1436 | * caller saved registers but the argument parameter */ | 1541 | * caller saved registers but the argument parameter */ |
1437 | #define PV_SAVE_REGS "pushq %%rdi;" | 1542 | #define PV_SAVE_REGS "pushq %%rdi;" |
@@ -1441,52 +1546,76 @@ extern struct paravirt_patch_site __parainstructions[], | |||
1441 | #define PV_FLAGS_ARG "D" | 1546 | #define PV_FLAGS_ARG "D" |
1442 | #endif | 1547 | #endif |
1443 | 1548 | ||
1549 | /* | ||
1550 | * Generate a thunk around a function which saves all caller-save | ||
1551 | * registers except for the return value. This allows C functions to | ||
1552 | * be called from assembler code where fewer than normal registers are | ||
1553 | * available. It may also help code generation around calls from C | ||
1554 | * code if the common case doesn't use many registers. | ||
1555 | * | ||
1556 | * When a callee is wrapped in a thunk, the caller can assume that all | ||
1557 | * arg regs and all scratch registers are preserved across the | ||
1558 | * call. The return value in rax/eax will not be saved, even for void | ||
1559 | * functions. | ||
1560 | */ | ||
1561 | #define PV_CALLEE_SAVE_REGS_THUNK(func) \ | ||
1562 | extern typeof(func) __raw_callee_save_##func; \ | ||
1563 | static void *__##func##__ __used = func; \ | ||
1564 | \ | ||
1565 | asm(".pushsection .text;" \ | ||
1566 | "__raw_callee_save_" #func ": " \ | ||
1567 | PV_SAVE_ALL_CALLER_REGS \ | ||
1568 | "call " #func ";" \ | ||
1569 | PV_RESTORE_ALL_CALLER_REGS \ | ||
1570 | "ret;" \ | ||
1571 | ".popsection") | ||
1572 | |||
1573 | /* Get a reference to a callee-save function */ | ||
1574 | #define PV_CALLEE_SAVE(func) \ | ||
1575 | ((struct paravirt_callee_save) { __raw_callee_save_##func }) | ||
1576 | |||
1577 | /* Promise that "func" already uses the right calling convention */ | ||
1578 | #define __PV_IS_CALLEE_SAVE(func) \ | ||
1579 | ((struct paravirt_callee_save) { func }) | ||
1580 | |||
1444 | static inline unsigned long __raw_local_save_flags(void) | 1581 | static inline unsigned long __raw_local_save_flags(void) |
1445 | { | 1582 | { |
1446 | unsigned long f; | 1583 | unsigned long f; |
1447 | 1584 | ||
1448 | asm volatile(paravirt_alt(PV_SAVE_REGS | 1585 | asm volatile(paravirt_alt(PARAVIRT_CALL) |
1449 | PARAVIRT_CALL | ||
1450 | PV_RESTORE_REGS) | ||
1451 | : "=a"(f) | 1586 | : "=a"(f) |
1452 | : paravirt_type(pv_irq_ops.save_fl), | 1587 | : paravirt_type(pv_irq_ops.save_fl), |
1453 | paravirt_clobber(CLBR_EAX) | 1588 | paravirt_clobber(CLBR_EAX) |
1454 | : "memory", "cc" PV_VEXTRA_CLOBBERS); | 1589 | : "memory", "cc"); |
1455 | return f; | 1590 | return f; |
1456 | } | 1591 | } |
1457 | 1592 | ||
1458 | static inline void raw_local_irq_restore(unsigned long f) | 1593 | static inline void raw_local_irq_restore(unsigned long f) |
1459 | { | 1594 | { |
1460 | asm volatile(paravirt_alt(PV_SAVE_REGS | 1595 | asm volatile(paravirt_alt(PARAVIRT_CALL) |
1461 | PARAVIRT_CALL | ||
1462 | PV_RESTORE_REGS) | ||
1463 | : "=a"(f) | 1596 | : "=a"(f) |
1464 | : PV_FLAGS_ARG(f), | 1597 | : PV_FLAGS_ARG(f), |
1465 | paravirt_type(pv_irq_ops.restore_fl), | 1598 | paravirt_type(pv_irq_ops.restore_fl), |
1466 | paravirt_clobber(CLBR_EAX) | 1599 | paravirt_clobber(CLBR_EAX) |
1467 | : "memory", "cc" PV_EXTRA_CLOBBERS); | 1600 | : "memory", "cc"); |
1468 | } | 1601 | } |
1469 | 1602 | ||
1470 | static inline void raw_local_irq_disable(void) | 1603 | static inline void raw_local_irq_disable(void) |
1471 | { | 1604 | { |
1472 | asm volatile(paravirt_alt(PV_SAVE_REGS | 1605 | asm volatile(paravirt_alt(PARAVIRT_CALL) |
1473 | PARAVIRT_CALL | ||
1474 | PV_RESTORE_REGS) | ||
1475 | : | 1606 | : |
1476 | : paravirt_type(pv_irq_ops.irq_disable), | 1607 | : paravirt_type(pv_irq_ops.irq_disable), |
1477 | paravirt_clobber(CLBR_EAX) | 1608 | paravirt_clobber(CLBR_EAX) |
1478 | : "memory", "eax", "cc" PV_EXTRA_CLOBBERS); | 1609 | : "memory", "eax", "cc"); |
1479 | } | 1610 | } |
1480 | 1611 | ||
1481 | static inline void raw_local_irq_enable(void) | 1612 | static inline void raw_local_irq_enable(void) |
1482 | { | 1613 | { |
1483 | asm volatile(paravirt_alt(PV_SAVE_REGS | 1614 | asm volatile(paravirt_alt(PARAVIRT_CALL) |
1484 | PARAVIRT_CALL | ||
1485 | PV_RESTORE_REGS) | ||
1486 | : | 1615 | : |
1487 | : paravirt_type(pv_irq_ops.irq_enable), | 1616 | : paravirt_type(pv_irq_ops.irq_enable), |
1488 | paravirt_clobber(CLBR_EAX) | 1617 | paravirt_clobber(CLBR_EAX) |
1489 | : "memory", "eax", "cc" PV_EXTRA_CLOBBERS); | 1618 | : "memory", "eax", "cc"); |
1490 | } | 1619 | } |
1491 | 1620 | ||
1492 | static inline unsigned long __raw_local_irq_save(void) | 1621 | static inline unsigned long __raw_local_irq_save(void) |
@@ -1529,33 +1658,49 @@ static inline unsigned long __raw_local_irq_save(void) | |||
1529 | .popsection | 1658 | .popsection |
1530 | 1659 | ||
1531 | 1660 | ||
1661 | #define COND_PUSH(set, mask, reg) \ | ||
1662 | .if ((~(set)) & mask); push %reg; .endif | ||
1663 | #define COND_POP(set, mask, reg) \ | ||
1664 | .if ((~(set)) & mask); pop %reg; .endif | ||
1665 | |||
1532 | #ifdef CONFIG_X86_64 | 1666 | #ifdef CONFIG_X86_64 |
1533 | #define PV_SAVE_REGS \ | 1667 | |
1534 | push %rax; \ | 1668 | #define PV_SAVE_REGS(set) \ |
1535 | push %rcx; \ | 1669 | COND_PUSH(set, CLBR_RAX, rax); \ |
1536 | push %rdx; \ | 1670 | COND_PUSH(set, CLBR_RCX, rcx); \ |
1537 | push %rsi; \ | 1671 | COND_PUSH(set, CLBR_RDX, rdx); \ |
1538 | push %rdi; \ | 1672 | COND_PUSH(set, CLBR_RSI, rsi); \ |
1539 | push %r8; \ | 1673 | COND_PUSH(set, CLBR_RDI, rdi); \ |
1540 | push %r9; \ | 1674 | COND_PUSH(set, CLBR_R8, r8); \ |
1541 | push %r10; \ | 1675 | COND_PUSH(set, CLBR_R9, r9); \ |
1542 | push %r11 | 1676 | COND_PUSH(set, CLBR_R10, r10); \ |
1543 | #define PV_RESTORE_REGS \ | 1677 | COND_PUSH(set, CLBR_R11, r11) |
1544 | pop %r11; \ | 1678 | #define PV_RESTORE_REGS(set) \ |
1545 | pop %r10; \ | 1679 | COND_POP(set, CLBR_R11, r11); \ |
1546 | pop %r9; \ | 1680 | COND_POP(set, CLBR_R10, r10); \ |
1547 | pop %r8; \ | 1681 | COND_POP(set, CLBR_R9, r9); \ |
1548 | pop %rdi; \ | 1682 | COND_POP(set, CLBR_R8, r8); \ |
1549 | pop %rsi; \ | 1683 | COND_POP(set, CLBR_RDI, rdi); \ |
1550 | pop %rdx; \ | 1684 | COND_POP(set, CLBR_RSI, rsi); \ |
1551 | pop %rcx; \ | 1685 | COND_POP(set, CLBR_RDX, rdx); \ |
1552 | pop %rax | 1686 | COND_POP(set, CLBR_RCX, rcx); \ |
1687 | COND_POP(set, CLBR_RAX, rax) | ||
1688 | |||
1553 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8) | 1689 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8) |
1554 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8) | 1690 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8) |
1555 | #define PARA_INDIRECT(addr) *addr(%rip) | 1691 | #define PARA_INDIRECT(addr) *addr(%rip) |
1556 | #else | 1692 | #else |
1557 | #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx | 1693 | #define PV_SAVE_REGS(set) \ |
1558 | #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax | 1694 | COND_PUSH(set, CLBR_EAX, eax); \ |
1695 | COND_PUSH(set, CLBR_EDI, edi); \ | ||
1696 | COND_PUSH(set, CLBR_ECX, ecx); \ | ||
1697 | COND_PUSH(set, CLBR_EDX, edx) | ||
1698 | #define PV_RESTORE_REGS(set) \ | ||
1699 | COND_POP(set, CLBR_EDX, edx); \ | ||
1700 | COND_POP(set, CLBR_ECX, ecx); \ | ||
1701 | COND_POP(set, CLBR_EDI, edi); \ | ||
1702 | COND_POP(set, CLBR_EAX, eax) | ||
1703 | |||
1559 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4) | 1704 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4) |
1560 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4) | 1705 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4) |
1561 | #define PARA_INDIRECT(addr) *%cs:addr | 1706 | #define PARA_INDIRECT(addr) *%cs:addr |
@@ -1567,15 +1712,15 @@ static inline unsigned long __raw_local_irq_save(void) | |||
1567 | 1712 | ||
1568 | #define DISABLE_INTERRUPTS(clobbers) \ | 1713 | #define DISABLE_INTERRUPTS(clobbers) \ |
1569 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \ | 1714 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \ |
1570 | PV_SAVE_REGS; \ | 1715 | PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \ |
1571 | call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \ | 1716 | call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \ |
1572 | PV_RESTORE_REGS;) \ | 1717 | PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);) |
1573 | 1718 | ||
1574 | #define ENABLE_INTERRUPTS(clobbers) \ | 1719 | #define ENABLE_INTERRUPTS(clobbers) \ |
1575 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \ | 1720 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \ |
1576 | PV_SAVE_REGS; \ | 1721 | PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \ |
1577 | call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \ | 1722 | call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \ |
1578 | PV_RESTORE_REGS;) | 1723 | PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);) |
1579 | 1724 | ||
1580 | #define USERGS_SYSRET32 \ | 1725 | #define USERGS_SYSRET32 \ |
1581 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \ | 1726 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \ |
@@ -1605,11 +1750,15 @@ static inline unsigned long __raw_local_irq_save(void) | |||
1605 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ | 1750 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ |
1606 | swapgs) | 1751 | swapgs) |
1607 | 1752 | ||
1753 | /* | ||
1754 | * Note: swapgs is very special, and in practise is either going to be | ||
1755 | * implemented with a single "swapgs" instruction or something very | ||
1756 | * special. Either way, we don't need to save any registers for | ||
1757 | * it. | ||
1758 | */ | ||
1608 | #define SWAPGS \ | 1759 | #define SWAPGS \ |
1609 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ | 1760 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ |
1610 | PV_SAVE_REGS; \ | 1761 | call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \ |
1611 | call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \ | ||
1612 | PV_RESTORE_REGS \ | ||
1613 | ) | 1762 | ) |
1614 | 1763 | ||
1615 | #define GET_CR2_INTO_RCX \ | 1764 | #define GET_CR2_INTO_RCX \ |
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h index b8493b3b9890..b0e70056838e 100644 --- a/arch/x86/include/asm/pat.h +++ b/arch/x86/include/asm/pat.h | |||
@@ -5,10 +5,8 @@ | |||
5 | 5 | ||
6 | #ifdef CONFIG_X86_PAT | 6 | #ifdef CONFIG_X86_PAT |
7 | extern int pat_enabled; | 7 | extern int pat_enabled; |
8 | extern void validate_pat_support(struct cpuinfo_x86 *c); | ||
9 | #else | 8 | #else |
10 | static const int pat_enabled; | 9 | static const int pat_enabled; |
11 | static inline void validate_pat_support(struct cpuinfo_x86 *c) { } | ||
12 | #endif | 10 | #endif |
13 | 11 | ||
14 | extern void pat_init(void); | 12 | extern void pat_init(void); |
@@ -17,6 +15,7 @@ extern int reserve_memtype(u64 start, u64 end, | |||
17 | unsigned long req_type, unsigned long *ret_type); | 15 | unsigned long req_type, unsigned long *ret_type); |
18 | extern int free_memtype(u64 start, u64 end); | 16 | extern int free_memtype(u64 start, u64 end); |
19 | 17 | ||
20 | extern void pat_disable(char *reason); | 18 | extern int kernel_map_sync_memtype(u64 base, unsigned long size, |
19 | unsigned long flag); | ||
21 | 20 | ||
22 | #endif /* _ASM_X86_PAT_H */ | 21 | #endif /* _ASM_X86_PAT_H */ |
diff --git a/arch/x86/include/asm/mach-default/pci-functions.h b/arch/x86/include/asm/pci-functions.h index ed0bab427354..ed0bab427354 100644 --- a/arch/x86/include/asm/mach-default/pci-functions.h +++ b/arch/x86/include/asm/pci-functions.h | |||
diff --git a/arch/x86/include/asm/pda.h b/arch/x86/include/asm/pda.h deleted file mode 100644 index 2fbfff88df37..000000000000 --- a/arch/x86/include/asm/pda.h +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | #ifndef _ASM_X86_PDA_H | ||
2 | #define _ASM_X86_PDA_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | #include <linux/stddef.h> | ||
6 | #include <linux/types.h> | ||
7 | #include <linux/cache.h> | ||
8 | #include <asm/page.h> | ||
9 | |||
10 | /* Per processor datastructure. %gs points to it while the kernel runs */ | ||
11 | struct x8664_pda { | ||
12 | struct task_struct *pcurrent; /* 0 Current process */ | ||
13 | unsigned long data_offset; /* 8 Per cpu data offset from linker | ||
14 | address */ | ||
15 | unsigned long kernelstack; /* 16 top of kernel stack for current */ | ||
16 | unsigned long oldrsp; /* 24 user rsp for system call */ | ||
17 | int irqcount; /* 32 Irq nesting counter. Starts -1 */ | ||
18 | unsigned int cpunumber; /* 36 Logical CPU number */ | ||
19 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
20 | unsigned long stack_canary; /* 40 stack canary value */ | ||
21 | /* gcc-ABI: this canary MUST be at | ||
22 | offset 40!!! */ | ||
23 | #endif | ||
24 | char *irqstackptr; | ||
25 | short nodenumber; /* number of current node (32k max) */ | ||
26 | short in_bootmem; /* pda lives in bootmem */ | ||
27 | unsigned int __softirq_pending; | ||
28 | unsigned int __nmi_count; /* number of NMI on this CPUs */ | ||
29 | short mmu_state; | ||
30 | short isidle; | ||
31 | struct mm_struct *active_mm; | ||
32 | unsigned apic_timer_irqs; | ||
33 | unsigned irq0_irqs; | ||
34 | unsigned irq_resched_count; | ||
35 | unsigned irq_call_count; | ||
36 | unsigned irq_tlb_count; | ||
37 | unsigned irq_thermal_count; | ||
38 | unsigned irq_threshold_count; | ||
39 | unsigned irq_spurious_count; | ||
40 | } ____cacheline_aligned_in_smp; | ||
41 | |||
42 | extern struct x8664_pda **_cpu_pda; | ||
43 | extern void pda_init(int); | ||
44 | |||
45 | #define cpu_pda(i) (_cpu_pda[i]) | ||
46 | |||
47 | /* | ||
48 | * There is no fast way to get the base address of the PDA, all the accesses | ||
49 | * have to mention %fs/%gs. So it needs to be done this Torvaldian way. | ||
50 | */ | ||
51 | extern void __bad_pda_field(void) __attribute__((noreturn)); | ||
52 | |||
53 | /* | ||
54 | * proxy_pda doesn't actually exist, but tell gcc it is accessed for | ||
55 | * all PDA accesses so it gets read/write dependencies right. | ||
56 | */ | ||
57 | extern struct x8664_pda _proxy_pda; | ||
58 | |||
59 | #define pda_offset(field) offsetof(struct x8664_pda, field) | ||
60 | |||
61 | #define pda_to_op(op, field, val) \ | ||
62 | do { \ | ||
63 | typedef typeof(_proxy_pda.field) T__; \ | ||
64 | if (0) { T__ tmp__; tmp__ = (val); } /* type checking */ \ | ||
65 | switch (sizeof(_proxy_pda.field)) { \ | ||
66 | case 2: \ | ||
67 | asm(op "w %1,%%gs:%c2" : \ | ||
68 | "+m" (_proxy_pda.field) : \ | ||
69 | "ri" ((T__)val), \ | ||
70 | "i"(pda_offset(field))); \ | ||
71 | break; \ | ||
72 | case 4: \ | ||
73 | asm(op "l %1,%%gs:%c2" : \ | ||
74 | "+m" (_proxy_pda.field) : \ | ||
75 | "ri" ((T__)val), \ | ||
76 | "i" (pda_offset(field))); \ | ||
77 | break; \ | ||
78 | case 8: \ | ||
79 | asm(op "q %1,%%gs:%c2": \ | ||
80 | "+m" (_proxy_pda.field) : \ | ||
81 | "ri" ((T__)val), \ | ||
82 | "i"(pda_offset(field))); \ | ||
83 | break; \ | ||
84 | default: \ | ||
85 | __bad_pda_field(); \ | ||
86 | } \ | ||
87 | } while (0) | ||
88 | |||
89 | #define pda_from_op(op, field) \ | ||
90 | ({ \ | ||
91 | typeof(_proxy_pda.field) ret__; \ | ||
92 | switch (sizeof(_proxy_pda.field)) { \ | ||
93 | case 2: \ | ||
94 | asm(op "w %%gs:%c1,%0" : \ | ||
95 | "=r" (ret__) : \ | ||
96 | "i" (pda_offset(field)), \ | ||
97 | "m" (_proxy_pda.field)); \ | ||
98 | break; \ | ||
99 | case 4: \ | ||
100 | asm(op "l %%gs:%c1,%0": \ | ||
101 | "=r" (ret__): \ | ||
102 | "i" (pda_offset(field)), \ | ||
103 | "m" (_proxy_pda.field)); \ | ||
104 | break; \ | ||
105 | case 8: \ | ||
106 | asm(op "q %%gs:%c1,%0": \ | ||
107 | "=r" (ret__) : \ | ||
108 | "i" (pda_offset(field)), \ | ||
109 | "m" (_proxy_pda.field)); \ | ||
110 | break; \ | ||
111 | default: \ | ||
112 | __bad_pda_field(); \ | ||
113 | } \ | ||
114 | ret__; \ | ||
115 | }) | ||
116 | |||
117 | #define read_pda(field) pda_from_op("mov", field) | ||
118 | #define write_pda(field, val) pda_to_op("mov", field, val) | ||
119 | #define add_pda(field, val) pda_to_op("add", field, val) | ||
120 | #define sub_pda(field, val) pda_to_op("sub", field, val) | ||
121 | #define or_pda(field, val) pda_to_op("or", field, val) | ||
122 | |||
123 | /* This is not atomic against other CPUs -- CPU preemption needs to be off */ | ||
124 | #define test_and_clear_bit_pda(bit, field) \ | ||
125 | ({ \ | ||
126 | int old__; \ | ||
127 | asm volatile("btr %2,%%gs:%c3\n\tsbbl %0,%0" \ | ||
128 | : "=r" (old__), "+m" (_proxy_pda.field) \ | ||
129 | : "dIr" (bit), "i" (pda_offset(field)) : "memory");\ | ||
130 | old__; \ | ||
131 | }) | ||
132 | |||
133 | #endif | ||
134 | |||
135 | #define PDA_STACKOFFSET (5*8) | ||
136 | |||
137 | #endif /* _ASM_X86_PDA_H */ | ||
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h index ece72053ba63..aee103b26d01 100644 --- a/arch/x86/include/asm/percpu.h +++ b/arch/x86/include/asm/percpu.h | |||
@@ -2,53 +2,12 @@ | |||
2 | #define _ASM_X86_PERCPU_H | 2 | #define _ASM_X86_PERCPU_H |
3 | 3 | ||
4 | #ifdef CONFIG_X86_64 | 4 | #ifdef CONFIG_X86_64 |
5 | #include <linux/compiler.h> | 5 | #define __percpu_seg gs |
6 | 6 | #define __percpu_mov_op movq | |
7 | /* Same as asm-generic/percpu.h, except that we store the per cpu offset | 7 | #else |
8 | in the PDA. Longer term the PDA and every per cpu variable | 8 | #define __percpu_seg fs |
9 | should be just put into a single section and referenced directly | 9 | #define __percpu_mov_op movl |
10 | from %gs */ | ||
11 | |||
12 | #ifdef CONFIG_SMP | ||
13 | #include <asm/pda.h> | ||
14 | |||
15 | #define __per_cpu_offset(cpu) (cpu_pda(cpu)->data_offset) | ||
16 | #define __my_cpu_offset read_pda(data_offset) | ||
17 | |||
18 | #define per_cpu_offset(x) (__per_cpu_offset(x)) | ||
19 | |||
20 | #endif | 10 | #endif |
21 | #include <asm-generic/percpu.h> | ||
22 | |||
23 | DECLARE_PER_CPU(struct x8664_pda, pda); | ||
24 | |||
25 | /* | ||
26 | * These are supposed to be implemented as a single instruction which | ||
27 | * operates on the per-cpu data base segment. x86-64 doesn't have | ||
28 | * that yet, so this is a fairly inefficient workaround for the | ||
29 | * meantime. The single instruction is atomic with respect to | ||
30 | * preemption and interrupts, so we need to explicitly disable | ||
31 | * interrupts here to achieve the same effect. However, because it | ||
32 | * can be used from within interrupt-disable/enable, we can't actually | ||
33 | * disable interrupts; disabling preemption is enough. | ||
34 | */ | ||
35 | #define x86_read_percpu(var) \ | ||
36 | ({ \ | ||
37 | typeof(per_cpu_var(var)) __tmp; \ | ||
38 | preempt_disable(); \ | ||
39 | __tmp = __get_cpu_var(var); \ | ||
40 | preempt_enable(); \ | ||
41 | __tmp; \ | ||
42 | }) | ||
43 | |||
44 | #define x86_write_percpu(var, val) \ | ||
45 | do { \ | ||
46 | preempt_disable(); \ | ||
47 | __get_cpu_var(var) = (val); \ | ||
48 | preempt_enable(); \ | ||
49 | } while(0) | ||
50 | |||
51 | #else /* CONFIG_X86_64 */ | ||
52 | 11 | ||
53 | #ifdef __ASSEMBLY__ | 12 | #ifdef __ASSEMBLY__ |
54 | 13 | ||
@@ -65,47 +24,48 @@ DECLARE_PER_CPU(struct x8664_pda, pda); | |||
65 | * PER_CPU(cpu_gdt_descr, %ebx) | 24 | * PER_CPU(cpu_gdt_descr, %ebx) |
66 | */ | 25 | */ |
67 | #ifdef CONFIG_SMP | 26 | #ifdef CONFIG_SMP |
68 | #define PER_CPU(var, reg) \ | 27 | #define PER_CPU(var, reg) \ |
69 | movl %fs:per_cpu__##this_cpu_off, reg; \ | 28 | __percpu_mov_op %__percpu_seg:per_cpu__this_cpu_off, reg; \ |
70 | lea per_cpu__##var(reg), reg | 29 | lea per_cpu__##var(reg), reg |
71 | #define PER_CPU_VAR(var) %fs:per_cpu__##var | 30 | #define PER_CPU_VAR(var) %__percpu_seg:per_cpu__##var |
72 | #else /* ! SMP */ | 31 | #else /* ! SMP */ |
73 | #define PER_CPU(var, reg) \ | 32 | #define PER_CPU(var, reg) \ |
74 | movl $per_cpu__##var, reg | 33 | __percpu_mov_op $per_cpu__##var, reg |
75 | #define PER_CPU_VAR(var) per_cpu__##var | 34 | #define PER_CPU_VAR(var) per_cpu__##var |
76 | #endif /* SMP */ | 35 | #endif /* SMP */ |
77 | 36 | ||
37 | #ifdef CONFIG_X86_64_SMP | ||
38 | #define INIT_PER_CPU_VAR(var) init_per_cpu__##var | ||
39 | #else | ||
40 | #define INIT_PER_CPU_VAR(var) per_cpu__##var | ||
41 | #endif | ||
42 | |||
78 | #else /* ...!ASSEMBLY */ | 43 | #else /* ...!ASSEMBLY */ |
79 | 44 | ||
45 | #include <linux/stringify.h> | ||
46 | |||
47 | #ifdef CONFIG_SMP | ||
48 | #define __percpu_arg(x) "%%"__stringify(__percpu_seg)":%P" #x | ||
49 | #define __my_cpu_offset percpu_read(this_cpu_off) | ||
50 | #else | ||
51 | #define __percpu_arg(x) "%" #x | ||
52 | #endif | ||
53 | |||
80 | /* | 54 | /* |
81 | * PER_CPU finds an address of a per-cpu variable. | 55 | * Initialized pointers to per-cpu variables needed for the boot |
56 | * processor need to use these macros to get the proper address | ||
57 | * offset from __per_cpu_load on SMP. | ||
82 | * | 58 | * |
83 | * Args: | 59 | * There also must be an entry in vmlinux_64.lds.S |
84 | * var - variable name | ||
85 | * cpu - 32bit register containing the current CPU number | ||
86 | * | ||
87 | * The resulting address is stored in the "cpu" argument. | ||
88 | * | ||
89 | * Example: | ||
90 | * PER_CPU(cpu_gdt_descr, %ebx) | ||
91 | */ | 60 | */ |
92 | #ifdef CONFIG_SMP | 61 | #define DECLARE_INIT_PER_CPU(var) \ |
93 | 62 | extern typeof(per_cpu_var(var)) init_per_cpu_var(var) | |
94 | #define __my_cpu_offset x86_read_percpu(this_cpu_off) | ||
95 | |||
96 | /* fs segment starts at (positive) offset == __per_cpu_offset[cpu] */ | ||
97 | #define __percpu_seg "%%fs:" | ||
98 | |||
99 | #else /* !SMP */ | ||
100 | |||
101 | #define __percpu_seg "" | ||
102 | |||
103 | #endif /* SMP */ | ||
104 | |||
105 | #include <asm-generic/percpu.h> | ||
106 | 63 | ||
107 | /* We can use this directly for local CPU (faster). */ | 64 | #ifdef CONFIG_X86_64_SMP |
108 | DECLARE_PER_CPU(unsigned long, this_cpu_off); | 65 | #define init_per_cpu_var(var) init_per_cpu__##var |
66 | #else | ||
67 | #define init_per_cpu_var(var) per_cpu_var(var) | ||
68 | #endif | ||
109 | 69 | ||
110 | /* For arch-specific code, we can use direct single-insn ops (they | 70 | /* For arch-specific code, we can use direct single-insn ops (they |
111 | * don't give an lvalue though). */ | 71 | * don't give an lvalue though). */ |
@@ -120,20 +80,25 @@ do { \ | |||
120 | } \ | 80 | } \ |
121 | switch (sizeof(var)) { \ | 81 | switch (sizeof(var)) { \ |
122 | case 1: \ | 82 | case 1: \ |
123 | asm(op "b %1,"__percpu_seg"%0" \ | 83 | asm(op "b %1,"__percpu_arg(0) \ |
124 | : "+m" (var) \ | 84 | : "+m" (var) \ |
125 | : "ri" ((T__)val)); \ | 85 | : "ri" ((T__)val)); \ |
126 | break; \ | 86 | break; \ |
127 | case 2: \ | 87 | case 2: \ |
128 | asm(op "w %1,"__percpu_seg"%0" \ | 88 | asm(op "w %1,"__percpu_arg(0) \ |
129 | : "+m" (var) \ | 89 | : "+m" (var) \ |
130 | : "ri" ((T__)val)); \ | 90 | : "ri" ((T__)val)); \ |
131 | break; \ | 91 | break; \ |
132 | case 4: \ | 92 | case 4: \ |
133 | asm(op "l %1,"__percpu_seg"%0" \ | 93 | asm(op "l %1,"__percpu_arg(0) \ |
134 | : "+m" (var) \ | 94 | : "+m" (var) \ |
135 | : "ri" ((T__)val)); \ | 95 | : "ri" ((T__)val)); \ |
136 | break; \ | 96 | break; \ |
97 | case 8: \ | ||
98 | asm(op "q %1,"__percpu_arg(0) \ | ||
99 | : "+m" (var) \ | ||
100 | : "re" ((T__)val)); \ | ||
101 | break; \ | ||
137 | default: __bad_percpu_size(); \ | 102 | default: __bad_percpu_size(); \ |
138 | } \ | 103 | } \ |
139 | } while (0) | 104 | } while (0) |
@@ -143,17 +108,22 @@ do { \ | |||
143 | typeof(var) ret__; \ | 108 | typeof(var) ret__; \ |
144 | switch (sizeof(var)) { \ | 109 | switch (sizeof(var)) { \ |
145 | case 1: \ | 110 | case 1: \ |
146 | asm(op "b "__percpu_seg"%1,%0" \ | 111 | asm(op "b "__percpu_arg(1)",%0" \ |
147 | : "=r" (ret__) \ | 112 | : "=r" (ret__) \ |
148 | : "m" (var)); \ | 113 | : "m" (var)); \ |
149 | break; \ | 114 | break; \ |
150 | case 2: \ | 115 | case 2: \ |
151 | asm(op "w "__percpu_seg"%1,%0" \ | 116 | asm(op "w "__percpu_arg(1)",%0" \ |
152 | : "=r" (ret__) \ | 117 | : "=r" (ret__) \ |
153 | : "m" (var)); \ | 118 | : "m" (var)); \ |
154 | break; \ | 119 | break; \ |
155 | case 4: \ | 120 | case 4: \ |
156 | asm(op "l "__percpu_seg"%1,%0" \ | 121 | asm(op "l "__percpu_arg(1)",%0" \ |
122 | : "=r" (ret__) \ | ||
123 | : "m" (var)); \ | ||
124 | break; \ | ||
125 | case 8: \ | ||
126 | asm(op "q "__percpu_arg(1)",%0" \ | ||
157 | : "=r" (ret__) \ | 127 | : "=r" (ret__) \ |
158 | : "m" (var)); \ | 128 | : "m" (var)); \ |
159 | break; \ | 129 | break; \ |
@@ -162,13 +132,30 @@ do { \ | |||
162 | ret__; \ | 132 | ret__; \ |
163 | }) | 133 | }) |
164 | 134 | ||
165 | #define x86_read_percpu(var) percpu_from_op("mov", per_cpu__##var) | 135 | #define percpu_read(var) percpu_from_op("mov", per_cpu__##var) |
166 | #define x86_write_percpu(var, val) percpu_to_op("mov", per_cpu__##var, val) | 136 | #define percpu_write(var, val) percpu_to_op("mov", per_cpu__##var, val) |
167 | #define x86_add_percpu(var, val) percpu_to_op("add", per_cpu__##var, val) | 137 | #define percpu_add(var, val) percpu_to_op("add", per_cpu__##var, val) |
168 | #define x86_sub_percpu(var, val) percpu_to_op("sub", per_cpu__##var, val) | 138 | #define percpu_sub(var, val) percpu_to_op("sub", per_cpu__##var, val) |
169 | #define x86_or_percpu(var, val) percpu_to_op("or", per_cpu__##var, val) | 139 | #define percpu_and(var, val) percpu_to_op("and", per_cpu__##var, val) |
140 | #define percpu_or(var, val) percpu_to_op("or", per_cpu__##var, val) | ||
141 | #define percpu_xor(var, val) percpu_to_op("xor", per_cpu__##var, val) | ||
142 | |||
143 | /* This is not atomic against other CPUs -- CPU preemption needs to be off */ | ||
144 | #define x86_test_and_clear_bit_percpu(bit, var) \ | ||
145 | ({ \ | ||
146 | int old__; \ | ||
147 | asm volatile("btr %2,"__percpu_arg(1)"\n\tsbbl %0,%0" \ | ||
148 | : "=r" (old__), "+m" (per_cpu__##var) \ | ||
149 | : "dIr" (bit)); \ | ||
150 | old__; \ | ||
151 | }) | ||
152 | |||
153 | #include <asm-generic/percpu.h> | ||
154 | |||
155 | /* We can use this directly for local CPU (faster). */ | ||
156 | DECLARE_PER_CPU(unsigned long, this_cpu_off); | ||
157 | |||
170 | #endif /* !__ASSEMBLY__ */ | 158 | #endif /* !__ASSEMBLY__ */ |
171 | #endif /* !CONFIG_X86_64 */ | ||
172 | 159 | ||
173 | #ifdef CONFIG_SMP | 160 | #ifdef CONFIG_SMP |
174 | 161 | ||
@@ -195,9 +182,9 @@ do { \ | |||
195 | #define early_per_cpu_ptr(_name) (_name##_early_ptr) | 182 | #define early_per_cpu_ptr(_name) (_name##_early_ptr) |
196 | #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx]) | 183 | #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx]) |
197 | #define early_per_cpu(_name, _cpu) \ | 184 | #define early_per_cpu(_name, _cpu) \ |
198 | (early_per_cpu_ptr(_name) ? \ | 185 | *(early_per_cpu_ptr(_name) ? \ |
199 | early_per_cpu_ptr(_name)[_cpu] : \ | 186 | &early_per_cpu_ptr(_name)[_cpu] : \ |
200 | per_cpu(_name, _cpu)) | 187 | &per_cpu(_name, _cpu)) |
201 | 188 | ||
202 | #else /* !CONFIG_SMP */ | 189 | #else /* !CONFIG_SMP */ |
203 | #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ | 190 | #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ |
diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h index e0d199fe1d83..c1774ac9da7a 100644 --- a/arch/x86/include/asm/pgtable-2level.h +++ b/arch/x86/include/asm/pgtable-2level.h | |||
@@ -53,8 +53,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp) | |||
53 | #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp) | 53 | #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp) |
54 | #endif | 54 | #endif |
55 | 55 | ||
56 | #define pte_none(x) (!(x).pte_low) | ||
57 | |||
58 | /* | 56 | /* |
59 | * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken, | 57 | * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken, |
60 | * split up the 29 bits of offset into this range: | 58 | * split up the 29 bits of offset into this range: |
diff --git a/arch/x86/include/asm/pgtable-2level-defs.h b/arch/x86/include/asm/pgtable-2level_types.h index d77db8990eaa..daacc23e3fb9 100644 --- a/arch/x86/include/asm/pgtable-2level-defs.h +++ b/arch/x86/include/asm/pgtable-2level_types.h | |||
@@ -1,7 +1,23 @@ | |||
1 | #ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H | 1 | #ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H |
2 | #define _ASM_X86_PGTABLE_2LEVEL_DEFS_H | 2 | #define _ASM_X86_PGTABLE_2LEVEL_DEFS_H |
3 | 3 | ||
4 | #ifndef __ASSEMBLY__ | ||
5 | #include <linux/types.h> | ||
6 | |||
7 | typedef unsigned long pteval_t; | ||
8 | typedef unsigned long pmdval_t; | ||
9 | typedef unsigned long pudval_t; | ||
10 | typedef unsigned long pgdval_t; | ||
11 | typedef unsigned long pgprotval_t; | ||
12 | |||
13 | typedef union { | ||
14 | pteval_t pte; | ||
15 | pteval_t pte_low; | ||
16 | } pte_t; | ||
17 | #endif /* !__ASSEMBLY__ */ | ||
18 | |||
4 | #define SHARED_KERNEL_PMD 0 | 19 | #define SHARED_KERNEL_PMD 0 |
20 | #define PAGETABLE_LEVELS 2 | ||
5 | 21 | ||
6 | /* | 22 | /* |
7 | * traditional i386 two-level paging structure: | 23 | * traditional i386 two-level paging structure: |
@@ -10,6 +26,7 @@ | |||
10 | #define PGDIR_SHIFT 22 | 26 | #define PGDIR_SHIFT 22 |
11 | #define PTRS_PER_PGD 1024 | 27 | #define PTRS_PER_PGD 1024 |
12 | 28 | ||
29 | |||
13 | /* | 30 | /* |
14 | * the i386 is two-level, so we don't really have any | 31 | * the i386 is two-level, so we don't really have any |
15 | * PMD directory physically. | 32 | * PMD directory physically. |
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h index 447da43cddb3..3f13cdf61156 100644 --- a/arch/x86/include/asm/pgtable-3level.h +++ b/arch/x86/include/asm/pgtable-3level.h | |||
@@ -18,21 +18,6 @@ | |||
18 | printk("%s:%d: bad pgd %p(%016Lx).\n", \ | 18 | printk("%s:%d: bad pgd %p(%016Lx).\n", \ |
19 | __FILE__, __LINE__, &(e), pgd_val(e)) | 19 | __FILE__, __LINE__, &(e), pgd_val(e)) |
20 | 20 | ||
21 | static inline int pud_none(pud_t pud) | ||
22 | { | ||
23 | return pud_val(pud) == 0; | ||
24 | } | ||
25 | |||
26 | static inline int pud_bad(pud_t pud) | ||
27 | { | ||
28 | return (pud_val(pud) & ~(PTE_PFN_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0; | ||
29 | } | ||
30 | |||
31 | static inline int pud_present(pud_t pud) | ||
32 | { | ||
33 | return pud_val(pud) & _PAGE_PRESENT; | ||
34 | } | ||
35 | |||
36 | /* Rules for using set_pte: the pte being assigned *must* be | 21 | /* Rules for using set_pte: the pte being assigned *must* be |
37 | * either not present or in a state where the hardware will | 22 | * either not present or in a state where the hardware will |
38 | * not attempt to update the pte. In places where this is | 23 | * not attempt to update the pte. In places where this is |
@@ -120,15 +105,6 @@ static inline void pud_clear(pud_t *pudp) | |||
120 | write_cr3(pgd); | 105 | write_cr3(pgd); |
121 | } | 106 | } |
122 | 107 | ||
123 | #define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT) | ||
124 | |||
125 | #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_PFN_MASK)) | ||
126 | |||
127 | |||
128 | /* Find an entry in the second-level page table.. */ | ||
129 | #define pmd_offset(pud, address) ((pmd_t *)pud_page_vaddr(*(pud)) + \ | ||
130 | pmd_index(address)) | ||
131 | |||
132 | #ifdef CONFIG_SMP | 108 | #ifdef CONFIG_SMP |
133 | static inline pte_t native_ptep_get_and_clear(pte_t *ptep) | 109 | static inline pte_t native_ptep_get_and_clear(pte_t *ptep) |
134 | { | 110 | { |
@@ -145,17 +121,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep) | |||
145 | #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp) | 121 | #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp) |
146 | #endif | 122 | #endif |
147 | 123 | ||
148 | #define __HAVE_ARCH_PTE_SAME | ||
149 | static inline int pte_same(pte_t a, pte_t b) | ||
150 | { | ||
151 | return a.pte_low == b.pte_low && a.pte_high == b.pte_high; | ||
152 | } | ||
153 | |||
154 | static inline int pte_none(pte_t pte) | ||
155 | { | ||
156 | return !pte.pte_low && !pte.pte_high; | ||
157 | } | ||
158 | |||
159 | /* | 124 | /* |
160 | * Bits 0, 6 and 7 are taken in the low part of the pte, | 125 | * Bits 0, 6 and 7 are taken in the low part of the pte, |
161 | * put the 32 bits of offset into the high part. | 126 | * put the 32 bits of offset into the high part. |
diff --git a/arch/x86/include/asm/pgtable-3level-defs.h b/arch/x86/include/asm/pgtable-3level_types.h index 62561367653c..1bd5876c8649 100644 --- a/arch/x86/include/asm/pgtable-3level-defs.h +++ b/arch/x86/include/asm/pgtable-3level_types.h | |||
@@ -1,12 +1,31 @@ | |||
1 | #ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H | 1 | #ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H |
2 | #define _ASM_X86_PGTABLE_3LEVEL_DEFS_H | 2 | #define _ASM_X86_PGTABLE_3LEVEL_DEFS_H |
3 | 3 | ||
4 | #ifndef __ASSEMBLY__ | ||
5 | #include <linux/types.h> | ||
6 | |||
7 | typedef u64 pteval_t; | ||
8 | typedef u64 pmdval_t; | ||
9 | typedef u64 pudval_t; | ||
10 | typedef u64 pgdval_t; | ||
11 | typedef u64 pgprotval_t; | ||
12 | |||
13 | typedef union { | ||
14 | struct { | ||
15 | unsigned long pte_low, pte_high; | ||
16 | }; | ||
17 | pteval_t pte; | ||
18 | } pte_t; | ||
19 | #endif /* !__ASSEMBLY__ */ | ||
20 | |||
4 | #ifdef CONFIG_PARAVIRT | 21 | #ifdef CONFIG_PARAVIRT |
5 | #define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd) | 22 | #define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd) |
6 | #else | 23 | #else |
7 | #define SHARED_KERNEL_PMD 1 | 24 | #define SHARED_KERNEL_PMD 1 |
8 | #endif | 25 | #endif |
9 | 26 | ||
27 | #define PAGETABLE_LEVELS 3 | ||
28 | |||
10 | /* | 29 | /* |
11 | * PGDIR_SHIFT determines what a top-level page table entry can map | 30 | * PGDIR_SHIFT determines what a top-level page table entry can map |
12 | */ | 31 | */ |
@@ -25,4 +44,5 @@ | |||
25 | */ | 44 | */ |
26 | #define PTRS_PER_PTE 512 | 45 | #define PTRS_PER_PTE 512 |
27 | 46 | ||
47 | |||
28 | #endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */ | 48 | #endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */ |
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 4f5af8447d54..d0812e155f1d 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h | |||
@@ -1,164 +1,9 @@ | |||
1 | #ifndef _ASM_X86_PGTABLE_H | 1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | 2 | #define _ASM_X86_PGTABLE_H |
3 | 3 | ||
4 | #define FIRST_USER_ADDRESS 0 | 4 | #include <asm/page.h> |
5 | |||
6 | #define _PAGE_BIT_PRESENT 0 /* is present */ | ||
7 | #define _PAGE_BIT_RW 1 /* writeable */ | ||
8 | #define _PAGE_BIT_USER 2 /* userspace addressable */ | ||
9 | #define _PAGE_BIT_PWT 3 /* page write through */ | ||
10 | #define _PAGE_BIT_PCD 4 /* page cache disabled */ | ||
11 | #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ | ||
12 | #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ | ||
13 | #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ | ||
14 | #define _PAGE_BIT_PAT 7 /* on 4KB pages */ | ||
15 | #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ | ||
16 | #define _PAGE_BIT_UNUSED1 9 /* available for programmer */ | ||
17 | #define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */ | ||
18 | #define _PAGE_BIT_UNUSED3 11 | ||
19 | #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ | ||
20 | #define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1 | ||
21 | #define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1 | ||
22 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ | ||
23 | |||
24 | /* If _PAGE_BIT_PRESENT is clear, we use these: */ | ||
25 | /* - if the user mapped it with PROT_NONE; pte_present gives true */ | ||
26 | #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL | ||
27 | /* - set: nonlinear file mapping, saved PTE; unset:swap */ | ||
28 | #define _PAGE_BIT_FILE _PAGE_BIT_DIRTY | ||
29 | |||
30 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) | ||
31 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) | ||
32 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) | ||
33 | #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT) | ||
34 | #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD) | ||
35 | #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED) | ||
36 | #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY) | ||
37 | #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE) | ||
38 | #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL) | ||
39 | #define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1) | ||
40 | #define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP) | ||
41 | #define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3) | ||
42 | #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) | ||
43 | #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) | ||
44 | #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL) | ||
45 | #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST) | ||
46 | #define __HAVE_ARCH_PTE_SPECIAL | ||
47 | |||
48 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) | ||
49 | #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) | ||
50 | #else | ||
51 | #define _PAGE_NX (_AT(pteval_t, 0)) | ||
52 | #endif | ||
53 | 5 | ||
54 | #define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE) | 6 | #include <asm/pgtable_types.h> |
55 | #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) | ||
56 | |||
57 | #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | ||
58 | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
59 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \ | ||
60 | _PAGE_DIRTY) | ||
61 | |||
62 | /* Set of bits not changed in pte_modify */ | ||
63 | #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ | ||
64 | _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
65 | |||
66 | #define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT) | ||
67 | #define _PAGE_CACHE_WB (0) | ||
68 | #define _PAGE_CACHE_WC (_PAGE_PWT) | ||
69 | #define _PAGE_CACHE_UC_MINUS (_PAGE_PCD) | ||
70 | #define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT) | ||
71 | |||
72 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) | ||
73 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | ||
74 | _PAGE_ACCESSED | _PAGE_NX) | ||
75 | |||
76 | #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \ | ||
77 | _PAGE_USER | _PAGE_ACCESSED) | ||
78 | #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
79 | _PAGE_ACCESSED | _PAGE_NX) | ||
80 | #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
81 | _PAGE_ACCESSED) | ||
82 | #define PAGE_COPY PAGE_COPY_NOEXEC | ||
83 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
84 | _PAGE_ACCESSED | _PAGE_NX) | ||
85 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
86 | _PAGE_ACCESSED) | ||
87 | |||
88 | #define __PAGE_KERNEL_EXEC \ | ||
89 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL) | ||
90 | #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX) | ||
91 | |||
92 | #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW) | ||
93 | #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) | ||
94 | #define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT) | ||
95 | #define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC) | ||
96 | #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT) | ||
97 | #define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD) | ||
98 | #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) | ||
99 | #define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT) | ||
100 | #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) | ||
101 | #define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE) | ||
102 | #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE) | ||
103 | |||
104 | #define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP) | ||
105 | #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP) | ||
106 | #define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP) | ||
107 | #define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP) | ||
108 | |||
109 | #define PAGE_KERNEL __pgprot(__PAGE_KERNEL) | ||
110 | #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO) | ||
111 | #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC) | ||
112 | #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX) | ||
113 | #define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC) | ||
114 | #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE) | ||
115 | #define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS) | ||
116 | #define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE) | ||
117 | #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE) | ||
118 | #define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE) | ||
119 | #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC) | ||
120 | #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL) | ||
121 | #define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE) | ||
122 | |||
123 | #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO) | ||
124 | #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE) | ||
125 | #define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS) | ||
126 | #define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC) | ||
127 | |||
128 | /* xwr */ | ||
129 | #define __P000 PAGE_NONE | ||
130 | #define __P001 PAGE_READONLY | ||
131 | #define __P010 PAGE_COPY | ||
132 | #define __P011 PAGE_COPY | ||
133 | #define __P100 PAGE_READONLY_EXEC | ||
134 | #define __P101 PAGE_READONLY_EXEC | ||
135 | #define __P110 PAGE_COPY_EXEC | ||
136 | #define __P111 PAGE_COPY_EXEC | ||
137 | |||
138 | #define __S000 PAGE_NONE | ||
139 | #define __S001 PAGE_READONLY | ||
140 | #define __S010 PAGE_SHARED | ||
141 | #define __S011 PAGE_SHARED | ||
142 | #define __S100 PAGE_READONLY_EXEC | ||
143 | #define __S101 PAGE_READONLY_EXEC | ||
144 | #define __S110 PAGE_SHARED_EXEC | ||
145 | #define __S111 PAGE_SHARED_EXEC | ||
146 | |||
147 | /* | ||
148 | * early identity mapping pte attrib macros. | ||
149 | */ | ||
150 | #ifdef CONFIG_X86_64 | ||
151 | #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC | ||
152 | #else | ||
153 | /* | ||
154 | * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection | ||
155 | * bits are combined, this will alow user to access the high address mapped | ||
156 | * VDSO in the presence of CONFIG_COMPAT_VDSO | ||
157 | */ | ||
158 | #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */ | ||
159 | #define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */ | ||
160 | #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ | ||
161 | #endif | ||
162 | 7 | ||
163 | /* | 8 | /* |
164 | * Macro to mark a page protection value as UC- | 9 | * Macro to mark a page protection value as UC- |
@@ -170,9 +15,6 @@ | |||
170 | 15 | ||
171 | #ifndef __ASSEMBLY__ | 16 | #ifndef __ASSEMBLY__ |
172 | 17 | ||
173 | #define pgprot_writecombine pgprot_writecombine | ||
174 | extern pgprot_t pgprot_writecombine(pgprot_t prot); | ||
175 | |||
176 | /* | 18 | /* |
177 | * ZERO_PAGE is a global shared page that is always zero: used | 19 | * ZERO_PAGE is a global shared page that is always zero: used |
178 | * for zero-mapped memory areas etc.. | 20 | * for zero-mapped memory areas etc.. |
@@ -183,6 +25,66 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; | |||
183 | extern spinlock_t pgd_lock; | 25 | extern spinlock_t pgd_lock; |
184 | extern struct list_head pgd_list; | 26 | extern struct list_head pgd_list; |
185 | 27 | ||
28 | #ifdef CONFIG_PARAVIRT | ||
29 | #include <asm/paravirt.h> | ||
30 | #else /* !CONFIG_PARAVIRT */ | ||
31 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | ||
32 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | ||
33 | |||
34 | #define set_pte_present(mm, addr, ptep, pte) \ | ||
35 | native_set_pte_present(mm, addr, ptep, pte) | ||
36 | #define set_pte_atomic(ptep, pte) \ | ||
37 | native_set_pte_atomic(ptep, pte) | ||
38 | |||
39 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | ||
40 | |||
41 | #ifndef __PAGETABLE_PUD_FOLDED | ||
42 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | ||
43 | #define pgd_clear(pgd) native_pgd_clear(pgd) | ||
44 | #endif | ||
45 | |||
46 | #ifndef set_pud | ||
47 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | ||
48 | #endif | ||
49 | |||
50 | #ifndef __PAGETABLE_PMD_FOLDED | ||
51 | #define pud_clear(pud) native_pud_clear(pud) | ||
52 | #endif | ||
53 | |||
54 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | ||
55 | #define pmd_clear(pmd) native_pmd_clear(pmd) | ||
56 | |||
57 | #define pte_update(mm, addr, ptep) do { } while (0) | ||
58 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | ||
59 | |||
60 | static inline void __init paravirt_pagetable_setup_start(pgd_t *base) | ||
61 | { | ||
62 | native_pagetable_setup_start(base); | ||
63 | } | ||
64 | |||
65 | static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | ||
66 | { | ||
67 | native_pagetable_setup_done(base); | ||
68 | } | ||
69 | |||
70 | #define pgd_val(x) native_pgd_val(x) | ||
71 | #define __pgd(x) native_make_pgd(x) | ||
72 | |||
73 | #ifndef __PAGETABLE_PUD_FOLDED | ||
74 | #define pud_val(x) native_pud_val(x) | ||
75 | #define __pud(x) native_make_pud(x) | ||
76 | #endif | ||
77 | |||
78 | #ifndef __PAGETABLE_PMD_FOLDED | ||
79 | #define pmd_val(x) native_pmd_val(x) | ||
80 | #define __pmd(x) native_make_pmd(x) | ||
81 | #endif | ||
82 | |||
83 | #define pte_val(x) native_pte_val(x) | ||
84 | #define __pte(x) native_make_pte(x) | ||
85 | |||
86 | #endif /* CONFIG_PARAVIRT */ | ||
87 | |||
186 | /* | 88 | /* |
187 | * The following only work if pte_present() is true. | 89 | * The following only work if pte_present() is true. |
188 | * Undefined behaviour if not.. | 90 | * Undefined behaviour if not.. |
@@ -236,72 +138,84 @@ static inline unsigned long pte_pfn(pte_t pte) | |||
236 | 138 | ||
237 | static inline int pmd_large(pmd_t pte) | 139 | static inline int pmd_large(pmd_t pte) |
238 | { | 140 | { |
239 | return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) == | 141 | return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) == |
240 | (_PAGE_PSE | _PAGE_PRESENT); | 142 | (_PAGE_PSE | _PAGE_PRESENT); |
241 | } | 143 | } |
242 | 144 | ||
145 | static inline pte_t pte_set_flags(pte_t pte, pteval_t set) | ||
146 | { | ||
147 | pteval_t v = native_pte_val(pte); | ||
148 | |||
149 | return native_make_pte(v | set); | ||
150 | } | ||
151 | |||
152 | static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) | ||
153 | { | ||
154 | pteval_t v = native_pte_val(pte); | ||
155 | |||
156 | return native_make_pte(v & ~clear); | ||
157 | } | ||
158 | |||
243 | static inline pte_t pte_mkclean(pte_t pte) | 159 | static inline pte_t pte_mkclean(pte_t pte) |
244 | { | 160 | { |
245 | return __pte(pte_val(pte) & ~_PAGE_DIRTY); | 161 | return pte_clear_flags(pte, _PAGE_DIRTY); |
246 | } | 162 | } |
247 | 163 | ||
248 | static inline pte_t pte_mkold(pte_t pte) | 164 | static inline pte_t pte_mkold(pte_t pte) |
249 | { | 165 | { |
250 | return __pte(pte_val(pte) & ~_PAGE_ACCESSED); | 166 | return pte_clear_flags(pte, _PAGE_ACCESSED); |
251 | } | 167 | } |
252 | 168 | ||
253 | static inline pte_t pte_wrprotect(pte_t pte) | 169 | static inline pte_t pte_wrprotect(pte_t pte) |
254 | { | 170 | { |
255 | return __pte(pte_val(pte) & ~_PAGE_RW); | 171 | return pte_clear_flags(pte, _PAGE_RW); |
256 | } | 172 | } |
257 | 173 | ||
258 | static inline pte_t pte_mkexec(pte_t pte) | 174 | static inline pte_t pte_mkexec(pte_t pte) |
259 | { | 175 | { |
260 | return __pte(pte_val(pte) & ~_PAGE_NX); | 176 | return pte_clear_flags(pte, _PAGE_NX); |
261 | } | 177 | } |
262 | 178 | ||
263 | static inline pte_t pte_mkdirty(pte_t pte) | 179 | static inline pte_t pte_mkdirty(pte_t pte) |
264 | { | 180 | { |
265 | return __pte(pte_val(pte) | _PAGE_DIRTY); | 181 | return pte_set_flags(pte, _PAGE_DIRTY); |
266 | } | 182 | } |
267 | 183 | ||
268 | static inline pte_t pte_mkyoung(pte_t pte) | 184 | static inline pte_t pte_mkyoung(pte_t pte) |
269 | { | 185 | { |
270 | return __pte(pte_val(pte) | _PAGE_ACCESSED); | 186 | return pte_set_flags(pte, _PAGE_ACCESSED); |
271 | } | 187 | } |
272 | 188 | ||
273 | static inline pte_t pte_mkwrite(pte_t pte) | 189 | static inline pte_t pte_mkwrite(pte_t pte) |
274 | { | 190 | { |
275 | return __pte(pte_val(pte) | _PAGE_RW); | 191 | return pte_set_flags(pte, _PAGE_RW); |
276 | } | 192 | } |
277 | 193 | ||
278 | static inline pte_t pte_mkhuge(pte_t pte) | 194 | static inline pte_t pte_mkhuge(pte_t pte) |
279 | { | 195 | { |
280 | return __pte(pte_val(pte) | _PAGE_PSE); | 196 | return pte_set_flags(pte, _PAGE_PSE); |
281 | } | 197 | } |
282 | 198 | ||
283 | static inline pte_t pte_clrhuge(pte_t pte) | 199 | static inline pte_t pte_clrhuge(pte_t pte) |
284 | { | 200 | { |
285 | return __pte(pte_val(pte) & ~_PAGE_PSE); | 201 | return pte_clear_flags(pte, _PAGE_PSE); |
286 | } | 202 | } |
287 | 203 | ||
288 | static inline pte_t pte_mkglobal(pte_t pte) | 204 | static inline pte_t pte_mkglobal(pte_t pte) |
289 | { | 205 | { |
290 | return __pte(pte_val(pte) | _PAGE_GLOBAL); | 206 | return pte_set_flags(pte, _PAGE_GLOBAL); |
291 | } | 207 | } |
292 | 208 | ||
293 | static inline pte_t pte_clrglobal(pte_t pte) | 209 | static inline pte_t pte_clrglobal(pte_t pte) |
294 | { | 210 | { |
295 | return __pte(pte_val(pte) & ~_PAGE_GLOBAL); | 211 | return pte_clear_flags(pte, _PAGE_GLOBAL); |
296 | } | 212 | } |
297 | 213 | ||
298 | static inline pte_t pte_mkspecial(pte_t pte) | 214 | static inline pte_t pte_mkspecial(pte_t pte) |
299 | { | 215 | { |
300 | return __pte(pte_val(pte) | _PAGE_SPECIAL); | 216 | return pte_set_flags(pte, _PAGE_SPECIAL); |
301 | } | 217 | } |
302 | 218 | ||
303 | extern pteval_t __supported_pte_mask; | ||
304 | |||
305 | /* | 219 | /* |
306 | * Mask out unsupported bits in a present pgprot. Non-present pgprots | 220 | * Mask out unsupported bits in a present pgprot. Non-present pgprots |
307 | * can use those bits for other purposes, so leave them be. | 221 | * can use those bits for other purposes, so leave them be. |
@@ -374,82 +288,197 @@ static inline int is_new_memtype_allowed(unsigned long flags, | |||
374 | return 1; | 288 | return 1; |
375 | } | 289 | } |
376 | 290 | ||
377 | #ifndef __ASSEMBLY__ | 291 | pmd_t *populate_extra_pmd(unsigned long vaddr); |
378 | /* Indicate that x86 has its own track and untrack pfn vma functions */ | 292 | pte_t *populate_extra_pte(unsigned long vaddr); |
379 | #define __HAVE_PFNMAP_TRACKING | 293 | #endif /* __ASSEMBLY__ */ |
380 | |||
381 | #define __HAVE_PHYS_MEM_ACCESS_PROT | ||
382 | struct file; | ||
383 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | ||
384 | unsigned long size, pgprot_t vma_prot); | ||
385 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | ||
386 | unsigned long size, pgprot_t *vma_prot); | ||
387 | #endif | ||
388 | |||
389 | /* Install a pte for a particular vaddr in kernel space. */ | ||
390 | void set_pte_vaddr(unsigned long vaddr, pte_t pte); | ||
391 | 294 | ||
392 | #ifdef CONFIG_X86_32 | 295 | #ifdef CONFIG_X86_32 |
393 | extern void native_pagetable_setup_start(pgd_t *base); | 296 | # include "pgtable_32.h" |
394 | extern void native_pagetable_setup_done(pgd_t *base); | ||
395 | #else | 297 | #else |
396 | static inline void native_pagetable_setup_start(pgd_t *base) {} | 298 | # include "pgtable_64.h" |
397 | static inline void native_pagetable_setup_done(pgd_t *base) {} | ||
398 | #endif | 299 | #endif |
399 | 300 | ||
400 | struct seq_file; | 301 | #ifndef __ASSEMBLY__ |
401 | extern void arch_report_meminfo(struct seq_file *m); | 302 | #include <linux/mm_types.h> |
402 | 303 | ||
403 | #ifdef CONFIG_PARAVIRT | 304 | static inline int pte_none(pte_t pte) |
404 | #include <asm/paravirt.h> | 305 | { |
405 | #else /* !CONFIG_PARAVIRT */ | 306 | return !pte.pte; |
406 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | 307 | } |
407 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | ||
408 | 308 | ||
409 | #define set_pte_present(mm, addr, ptep, pte) \ | 309 | #define __HAVE_ARCH_PTE_SAME |
410 | native_set_pte_present(mm, addr, ptep, pte) | 310 | static inline int pte_same(pte_t a, pte_t b) |
411 | #define set_pte_atomic(ptep, pte) \ | 311 | { |
412 | native_set_pte_atomic(ptep, pte) | 312 | return a.pte == b.pte; |
313 | } | ||
413 | 314 | ||
414 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | 315 | static inline int pte_present(pte_t a) |
316 | { | ||
317 | return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); | ||
318 | } | ||
415 | 319 | ||
416 | #ifndef __PAGETABLE_PUD_FOLDED | 320 | static inline int pmd_present(pmd_t pmd) |
417 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | 321 | { |
418 | #define pgd_clear(pgd) native_pgd_clear(pgd) | 322 | return pmd_flags(pmd) & _PAGE_PRESENT; |
419 | #endif | 323 | } |
420 | 324 | ||
421 | #ifndef set_pud | 325 | static inline int pmd_none(pmd_t pmd) |
422 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | 326 | { |
423 | #endif | 327 | /* Only check low word on 32-bit platforms, since it might be |
328 | out of sync with upper half. */ | ||
329 | return (unsigned long)native_pmd_val(pmd) == 0; | ||
330 | } | ||
424 | 331 | ||
425 | #ifndef __PAGETABLE_PMD_FOLDED | 332 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
426 | #define pud_clear(pud) native_pud_clear(pud) | 333 | { |
427 | #endif | 334 | return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK); |
335 | } | ||
428 | 336 | ||
429 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | 337 | /* |
430 | #define pmd_clear(pmd) native_pmd_clear(pmd) | 338 | * Currently stuck as a macro due to indirect forward reference to |
339 | * linux/mmzone.h's __section_mem_map_addr() definition: | ||
340 | */ | ||
341 | #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT) | ||
431 | 342 | ||
432 | #define pte_update(mm, addr, ptep) do { } while (0) | 343 | /* |
433 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | 344 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] |
345 | * | ||
346 | * this macro returns the index of the entry in the pmd page which would | ||
347 | * control the given virtual address | ||
348 | */ | ||
349 | static inline unsigned pmd_index(unsigned long address) | ||
350 | { | ||
351 | return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); | ||
352 | } | ||
434 | 353 | ||
435 | static inline void __init paravirt_pagetable_setup_start(pgd_t *base) | 354 | /* |
355 | * Conversion functions: convert a page and protection to a page entry, | ||
356 | * and a page entry and page directory to the page they refer to. | ||
357 | * | ||
358 | * (Currently stuck as a macro because of indirect forward reference | ||
359 | * to linux/mm.h:page_to_nid()) | ||
360 | */ | ||
361 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | ||
362 | |||
363 | /* | ||
364 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | ||
365 | * | ||
366 | * this function returns the index of the entry in the pte page which would | ||
367 | * control the given virtual address | ||
368 | */ | ||
369 | static inline unsigned pte_index(unsigned long address) | ||
436 | { | 370 | { |
437 | native_pagetable_setup_start(base); | 371 | return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); |
438 | } | 372 | } |
439 | 373 | ||
440 | static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | 374 | static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) |
441 | { | 375 | { |
442 | native_pagetable_setup_done(base); | 376 | return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); |
443 | } | 377 | } |
444 | #endif /* CONFIG_PARAVIRT */ | ||
445 | 378 | ||
446 | #endif /* __ASSEMBLY__ */ | 379 | static inline int pmd_bad(pmd_t pmd) |
380 | { | ||
381 | return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; | ||
382 | } | ||
447 | 383 | ||
448 | #ifdef CONFIG_X86_32 | 384 | static inline unsigned long pages_to_mb(unsigned long npg) |
449 | # include "pgtable_32.h" | 385 | { |
386 | return npg >> (20 - PAGE_SHIFT); | ||
387 | } | ||
388 | |||
389 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ | ||
390 | remap_pfn_range(vma, vaddr, pfn, size, prot) | ||
391 | |||
392 | #if PAGETABLE_LEVELS > 2 | ||
393 | static inline int pud_none(pud_t pud) | ||
394 | { | ||
395 | return native_pud_val(pud) == 0; | ||
396 | } | ||
397 | |||
398 | static inline int pud_present(pud_t pud) | ||
399 | { | ||
400 | return pud_flags(pud) & _PAGE_PRESENT; | ||
401 | } | ||
402 | |||
403 | static inline unsigned long pud_page_vaddr(pud_t pud) | ||
404 | { | ||
405 | return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK); | ||
406 | } | ||
407 | |||
408 | /* | ||
409 | * Currently stuck as a macro due to indirect forward reference to | ||
410 | * linux/mmzone.h's __section_mem_map_addr() definition: | ||
411 | */ | ||
412 | #define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT) | ||
413 | |||
414 | /* Find an entry in the second-level page table.. */ | ||
415 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) | ||
416 | { | ||
417 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); | ||
418 | } | ||
419 | |||
420 | static inline unsigned long pmd_pfn(pmd_t pmd) | ||
421 | { | ||
422 | return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT; | ||
423 | } | ||
424 | |||
425 | static inline int pud_large(pud_t pud) | ||
426 | { | ||
427 | return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == | ||
428 | (_PAGE_PSE | _PAGE_PRESENT); | ||
429 | } | ||
430 | |||
431 | static inline int pud_bad(pud_t pud) | ||
432 | { | ||
433 | return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; | ||
434 | } | ||
450 | #else | 435 | #else |
451 | # include "pgtable_64.h" | 436 | static inline int pud_large(pud_t pud) |
452 | #endif | 437 | { |
438 | return 0; | ||
439 | } | ||
440 | #endif /* PAGETABLE_LEVELS > 2 */ | ||
441 | |||
442 | #if PAGETABLE_LEVELS > 3 | ||
443 | static inline int pgd_present(pgd_t pgd) | ||
444 | { | ||
445 | return pgd_flags(pgd) & _PAGE_PRESENT; | ||
446 | } | ||
447 | |||
448 | static inline unsigned long pgd_page_vaddr(pgd_t pgd) | ||
449 | { | ||
450 | return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); | ||
451 | } | ||
452 | |||
453 | /* | ||
454 | * Currently stuck as a macro due to indirect forward reference to | ||
455 | * linux/mmzone.h's __section_mem_map_addr() definition: | ||
456 | */ | ||
457 | #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) | ||
458 | |||
459 | /* to find an entry in a page-table-directory. */ | ||
460 | static inline unsigned pud_index(unsigned long address) | ||
461 | { | ||
462 | return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); | ||
463 | } | ||
464 | |||
465 | static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) | ||
466 | { | ||
467 | return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); | ||
468 | } | ||
469 | |||
470 | static inline int pgd_bad(pgd_t pgd) | ||
471 | { | ||
472 | return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; | ||
473 | } | ||
474 | |||
475 | static inline int pgd_none(pgd_t pgd) | ||
476 | { | ||
477 | return !native_pgd_val(pgd); | ||
478 | } | ||
479 | #endif /* PAGETABLE_LEVELS > 3 */ | ||
480 | |||
481 | #endif /* __ASSEMBLY__ */ | ||
453 | 482 | ||
454 | /* | 483 | /* |
455 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | 484 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] |
@@ -476,28 +505,6 @@ static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | |||
476 | 505 | ||
477 | #ifndef __ASSEMBLY__ | 506 | #ifndef __ASSEMBLY__ |
478 | 507 | ||
479 | enum { | ||
480 | PG_LEVEL_NONE, | ||
481 | PG_LEVEL_4K, | ||
482 | PG_LEVEL_2M, | ||
483 | PG_LEVEL_1G, | ||
484 | PG_LEVEL_NUM | ||
485 | }; | ||
486 | |||
487 | #ifdef CONFIG_PROC_FS | ||
488 | extern void update_page_count(int level, unsigned long pages); | ||
489 | #else | ||
490 | static inline void update_page_count(int level, unsigned long pages) { } | ||
491 | #endif | ||
492 | |||
493 | /* | ||
494 | * Helper function that returns the kernel pagetable entry controlling | ||
495 | * the virtual address 'address'. NULL means no pagetable entry present. | ||
496 | * NOTE: the return type is pte_t but if the pmd is PSE then we return it | ||
497 | * as a pte too. | ||
498 | */ | ||
499 | extern pte_t *lookup_address(unsigned long address, unsigned int *level); | ||
500 | |||
501 | /* local pte updates need not use xchg for locking */ | 508 | /* local pte updates need not use xchg for locking */ |
502 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | 509 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) |
503 | { | 510 | { |
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h index 72b020deb46b..97612fc7632f 100644 --- a/arch/x86/include/asm/pgtable_32.h +++ b/arch/x86/include/asm/pgtable_32.h | |||
@@ -1,6 +1,7 @@ | |||
1 | #ifndef _ASM_X86_PGTABLE_32_H | 1 | #ifndef _ASM_X86_PGTABLE_32_H |
2 | #define _ASM_X86_PGTABLE_32_H | 2 | #define _ASM_X86_PGTABLE_32_H |
3 | 3 | ||
4 | #include <asm/pgtable_32_types.h> | ||
4 | 5 | ||
5 | /* | 6 | /* |
6 | * The Linux memory management assumes a three-level page table setup. On | 7 | * The Linux memory management assumes a three-level page table setup. On |
@@ -33,47 +34,6 @@ void paging_init(void); | |||
33 | 34 | ||
34 | extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t); | 35 | extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t); |
35 | 36 | ||
36 | /* | ||
37 | * The Linux x86 paging architecture is 'compile-time dual-mode', it | ||
38 | * implements both the traditional 2-level x86 page tables and the | ||
39 | * newer 3-level PAE-mode page tables. | ||
40 | */ | ||
41 | #ifdef CONFIG_X86_PAE | ||
42 | # include <asm/pgtable-3level-defs.h> | ||
43 | # define PMD_SIZE (1UL << PMD_SHIFT) | ||
44 | # define PMD_MASK (~(PMD_SIZE - 1)) | ||
45 | #else | ||
46 | # include <asm/pgtable-2level-defs.h> | ||
47 | #endif | ||
48 | |||
49 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
50 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
51 | |||
52 | /* Just any arbitrary offset to the start of the vmalloc VM area: the | ||
53 | * current 8MB value just means that there will be a 8MB "hole" after the | ||
54 | * physical memory until the kernel virtual memory starts. That means that | ||
55 | * any out-of-bounds memory accesses will hopefully be caught. | ||
56 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced | ||
57 | * area for the same reason. ;) | ||
58 | */ | ||
59 | #define VMALLOC_OFFSET (8 * 1024 * 1024) | ||
60 | #define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET) | ||
61 | #ifdef CONFIG_X86_PAE | ||
62 | #define LAST_PKMAP 512 | ||
63 | #else | ||
64 | #define LAST_PKMAP 1024 | ||
65 | #endif | ||
66 | |||
67 | #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \ | ||
68 | & PMD_MASK) | ||
69 | |||
70 | #ifdef CONFIG_HIGHMEM | ||
71 | # define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE) | ||
72 | #else | ||
73 | # define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE) | ||
74 | #endif | ||
75 | |||
76 | #define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE) | ||
77 | 37 | ||
78 | /* | 38 | /* |
79 | * Define this if things work differently on an i386 and an i486: | 39 | * Define this if things work differently on an i386 and an i486: |
@@ -85,55 +45,12 @@ extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t); | |||
85 | /* The boot page tables (all created as a single array) */ | 45 | /* The boot page tables (all created as a single array) */ |
86 | extern unsigned long pg0[]; | 46 | extern unsigned long pg0[]; |
87 | 47 | ||
88 | #define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) | ||
89 | |||
90 | /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */ | ||
91 | #define pmd_none(x) (!(unsigned long)pmd_val((x))) | ||
92 | #define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT) | ||
93 | #define pmd_bad(x) ((pmd_val(x) & (PTE_FLAGS_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) | ||
94 | |||
95 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | ||
96 | |||
97 | #ifdef CONFIG_X86_PAE | 48 | #ifdef CONFIG_X86_PAE |
98 | # include <asm/pgtable-3level.h> | 49 | # include <asm/pgtable-3level.h> |
99 | #else | 50 | #else |
100 | # include <asm/pgtable-2level.h> | 51 | # include <asm/pgtable-2level.h> |
101 | #endif | 52 | #endif |
102 | 53 | ||
103 | /* | ||
104 | * Conversion functions: convert a page and protection to a page entry, | ||
105 | * and a page entry and page directory to the page they refer to. | ||
106 | */ | ||
107 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | ||
108 | |||
109 | |||
110 | static inline int pud_large(pud_t pud) { return 0; } | ||
111 | |||
112 | /* | ||
113 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] | ||
114 | * | ||
115 | * this macro returns the index of the entry in the pmd page which would | ||
116 | * control the given virtual address | ||
117 | */ | ||
118 | #define pmd_index(address) \ | ||
119 | (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | ||
120 | |||
121 | /* | ||
122 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | ||
123 | * | ||
124 | * this macro returns the index of the entry in the pte page which would | ||
125 | * control the given virtual address | ||
126 | */ | ||
127 | #define pte_index(address) \ | ||
128 | (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
129 | #define pte_offset_kernel(dir, address) \ | ||
130 | ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index((address))) | ||
131 | |||
132 | #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT)) | ||
133 | |||
134 | #define pmd_page_vaddr(pmd) \ | ||
135 | ((unsigned long)__va(pmd_val((pmd)) & PTE_PFN_MASK)) | ||
136 | |||
137 | #if defined(CONFIG_HIGHPTE) | 54 | #if defined(CONFIG_HIGHPTE) |
138 | #define pte_offset_map(dir, address) \ | 55 | #define pte_offset_map(dir, address) \ |
139 | ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \ | 56 | ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \ |
@@ -176,7 +93,4 @@ do { \ | |||
176 | #define kern_addr_valid(kaddr) (0) | 93 | #define kern_addr_valid(kaddr) (0) |
177 | #endif | 94 | #endif |
178 | 95 | ||
179 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ | ||
180 | remap_pfn_range(vma, vaddr, pfn, size, prot) | ||
181 | |||
182 | #endif /* _ASM_X86_PGTABLE_32_H */ | 96 | #endif /* _ASM_X86_PGTABLE_32_H */ |
diff --git a/arch/x86/include/asm/pgtable_32_types.h b/arch/x86/include/asm/pgtable_32_types.h new file mode 100644 index 000000000000..bd8df3b2fe04 --- /dev/null +++ b/arch/x86/include/asm/pgtable_32_types.h | |||
@@ -0,0 +1,46 @@ | |||
1 | #ifndef _ASM_X86_PGTABLE_32_DEFS_H | ||
2 | #define _ASM_X86_PGTABLE_32_DEFS_H | ||
3 | |||
4 | /* | ||
5 | * The Linux x86 paging architecture is 'compile-time dual-mode', it | ||
6 | * implements both the traditional 2-level x86 page tables and the | ||
7 | * newer 3-level PAE-mode page tables. | ||
8 | */ | ||
9 | #ifdef CONFIG_X86_PAE | ||
10 | # include <asm/pgtable-3level_types.h> | ||
11 | # define PMD_SIZE (1UL << PMD_SHIFT) | ||
12 | # define PMD_MASK (~(PMD_SIZE - 1)) | ||
13 | #else | ||
14 | # include <asm/pgtable-2level_types.h> | ||
15 | #endif | ||
16 | |||
17 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
18 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
19 | |||
20 | /* Just any arbitrary offset to the start of the vmalloc VM area: the | ||
21 | * current 8MB value just means that there will be a 8MB "hole" after the | ||
22 | * physical memory until the kernel virtual memory starts. That means that | ||
23 | * any out-of-bounds memory accesses will hopefully be caught. | ||
24 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced | ||
25 | * area for the same reason. ;) | ||
26 | */ | ||
27 | #define VMALLOC_OFFSET (8 * 1024 * 1024) | ||
28 | #define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET) | ||
29 | #ifdef CONFIG_X86_PAE | ||
30 | #define LAST_PKMAP 512 | ||
31 | #else | ||
32 | #define LAST_PKMAP 1024 | ||
33 | #endif | ||
34 | |||
35 | #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \ | ||
36 | & PMD_MASK) | ||
37 | |||
38 | #ifdef CONFIG_HIGHMEM | ||
39 | # define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE) | ||
40 | #else | ||
41 | # define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE) | ||
42 | #endif | ||
43 | |||
44 | #define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE) | ||
45 | |||
46 | #endif /* _ASM_X86_PGTABLE_32_DEFS_H */ | ||
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h index ba09289accaa..6b87bc6d5018 100644 --- a/arch/x86/include/asm/pgtable_64.h +++ b/arch/x86/include/asm/pgtable_64.h | |||
@@ -2,6 +2,8 @@ | |||
2 | #define _ASM_X86_PGTABLE_64_H | 2 | #define _ASM_X86_PGTABLE_64_H |
3 | 3 | ||
4 | #include <linux/const.h> | 4 | #include <linux/const.h> |
5 | #include <asm/pgtable_64_types.h> | ||
6 | |||
5 | #ifndef __ASSEMBLY__ | 7 | #ifndef __ASSEMBLY__ |
6 | 8 | ||
7 | /* | 9 | /* |
@@ -11,7 +13,6 @@ | |||
11 | #include <asm/processor.h> | 13 | #include <asm/processor.h> |
12 | #include <linux/bitops.h> | 14 | #include <linux/bitops.h> |
13 | #include <linux/threads.h> | 15 | #include <linux/threads.h> |
14 | #include <asm/pda.h> | ||
15 | 16 | ||
16 | extern pud_t level3_kernel_pgt[512]; | 17 | extern pud_t level3_kernel_pgt[512]; |
17 | extern pud_t level3_ident_pgt[512]; | 18 | extern pud_t level3_ident_pgt[512]; |
@@ -26,32 +27,6 @@ extern void paging_init(void); | |||
26 | 27 | ||
27 | #endif /* !__ASSEMBLY__ */ | 28 | #endif /* !__ASSEMBLY__ */ |
28 | 29 | ||
29 | #define SHARED_KERNEL_PMD 0 | ||
30 | |||
31 | /* | ||
32 | * PGDIR_SHIFT determines what a top-level page table entry can map | ||
33 | */ | ||
34 | #define PGDIR_SHIFT 39 | ||
35 | #define PTRS_PER_PGD 512 | ||
36 | |||
37 | /* | ||
38 | * 3rd level page | ||
39 | */ | ||
40 | #define PUD_SHIFT 30 | ||
41 | #define PTRS_PER_PUD 512 | ||
42 | |||
43 | /* | ||
44 | * PMD_SHIFT determines the size of the area a middle-level | ||
45 | * page table can map | ||
46 | */ | ||
47 | #define PMD_SHIFT 21 | ||
48 | #define PTRS_PER_PMD 512 | ||
49 | |||
50 | /* | ||
51 | * entries per page directory level | ||
52 | */ | ||
53 | #define PTRS_PER_PTE 512 | ||
54 | |||
55 | #ifndef __ASSEMBLY__ | 30 | #ifndef __ASSEMBLY__ |
56 | 31 | ||
57 | #define pte_ERROR(e) \ | 32 | #define pte_ERROR(e) \ |
@@ -67,9 +42,6 @@ extern void paging_init(void); | |||
67 | printk("%s:%d: bad pgd %p(%016lx).\n", \ | 42 | printk("%s:%d: bad pgd %p(%016lx).\n", \ |
68 | __FILE__, __LINE__, &(e), pgd_val(e)) | 43 | __FILE__, __LINE__, &(e), pgd_val(e)) |
69 | 44 | ||
70 | #define pgd_none(x) (!pgd_val(x)) | ||
71 | #define pud_none(x) (!pud_val(x)) | ||
72 | |||
73 | struct mm_struct; | 45 | struct mm_struct; |
74 | 46 | ||
75 | void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte); | 47 | void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte); |
@@ -134,48 +106,6 @@ static inline void native_pgd_clear(pgd_t *pgd) | |||
134 | native_set_pgd(pgd, native_make_pgd(0)); | 106 | native_set_pgd(pgd, native_make_pgd(0)); |
135 | } | 107 | } |
136 | 108 | ||
137 | #define pte_same(a, b) ((a).pte == (b).pte) | ||
138 | |||
139 | #endif /* !__ASSEMBLY__ */ | ||
140 | |||
141 | #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) | ||
142 | #define PMD_MASK (~(PMD_SIZE - 1)) | ||
143 | #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) | ||
144 | #define PUD_MASK (~(PUD_SIZE - 1)) | ||
145 | #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) | ||
146 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
147 | |||
148 | |||
149 | #define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL) | ||
150 | #define VMALLOC_START _AC(0xffffc20000000000, UL) | ||
151 | #define VMALLOC_END _AC(0xffffe1ffffffffff, UL) | ||
152 | #define VMEMMAP_START _AC(0xffffe20000000000, UL) | ||
153 | #define MODULES_VADDR _AC(0xffffffffa0000000, UL) | ||
154 | #define MODULES_END _AC(0xffffffffff000000, UL) | ||
155 | #define MODULES_LEN (MODULES_END - MODULES_VADDR) | ||
156 | |||
157 | #ifndef __ASSEMBLY__ | ||
158 | |||
159 | static inline int pgd_bad(pgd_t pgd) | ||
160 | { | ||
161 | return (pgd_val(pgd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE; | ||
162 | } | ||
163 | |||
164 | static inline int pud_bad(pud_t pud) | ||
165 | { | ||
166 | return (pud_val(pud) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE; | ||
167 | } | ||
168 | |||
169 | static inline int pmd_bad(pmd_t pmd) | ||
170 | { | ||
171 | return (pmd_val(pmd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE; | ||
172 | } | ||
173 | |||
174 | #define pte_none(x) (!pte_val((x))) | ||
175 | #define pte_present(x) (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE)) | ||
176 | |||
177 | #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */ | ||
178 | |||
179 | /* | 109 | /* |
180 | * Conversion functions: convert a page and protection to a page entry, | 110 | * Conversion functions: convert a page and protection to a page entry, |
181 | * and a page entry and page directory to the page they refer to. | 111 | * and a page entry and page directory to the page they refer to. |
@@ -184,41 +114,12 @@ static inline int pmd_bad(pmd_t pmd) | |||
184 | /* | 114 | /* |
185 | * Level 4 access. | 115 | * Level 4 access. |
186 | */ | 116 | */ |
187 | #define pgd_page_vaddr(pgd) \ | ||
188 | ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_PFN_MASK)) | ||
189 | #define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT)) | ||
190 | #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT) | ||
191 | static inline int pgd_large(pgd_t pgd) { return 0; } | 117 | static inline int pgd_large(pgd_t pgd) { return 0; } |
192 | #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE) | 118 | #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE) |
193 | 119 | ||
194 | /* PUD - Level3 access */ | 120 | /* PUD - Level3 access */ |
195 | /* to find an entry in a page-table-directory. */ | ||
196 | #define pud_page_vaddr(pud) \ | ||
197 | ((unsigned long)__va(pud_val((pud)) & PHYSICAL_PAGE_MASK)) | ||
198 | #define pud_page(pud) (pfn_to_page(pud_val((pud)) >> PAGE_SHIFT)) | ||
199 | #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)) | ||
200 | #define pud_offset(pgd, address) \ | ||
201 | ((pud_t *)pgd_page_vaddr(*(pgd)) + pud_index((address))) | ||
202 | #define pud_present(pud) (pud_val((pud)) & _PAGE_PRESENT) | ||
203 | |||
204 | static inline int pud_large(pud_t pte) | ||
205 | { | ||
206 | return (pud_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) == | ||
207 | (_PAGE_PSE | _PAGE_PRESENT); | ||
208 | } | ||
209 | 121 | ||
210 | /* PMD - Level 2 access */ | 122 | /* PMD - Level 2 access */ |
211 | #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_PFN_MASK)) | ||
212 | #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT)) | ||
213 | |||
214 | #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | ||
215 | #define pmd_offset(dir, address) ((pmd_t *)pud_page_vaddr(*(dir)) + \ | ||
216 | pmd_index(address)) | ||
217 | #define pmd_none(x) (!pmd_val((x))) | ||
218 | #define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT) | ||
219 | #define pfn_pmd(nr, prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val((prot)))) | ||
220 | #define pmd_pfn(x) ((pmd_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT) | ||
221 | |||
222 | #define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT) | 123 | #define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT) |
223 | #define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \ | 124 | #define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \ |
224 | _PAGE_FILE }) | 125 | _PAGE_FILE }) |
@@ -226,13 +127,6 @@ static inline int pud_large(pud_t pte) | |||
226 | 127 | ||
227 | /* PTE - Level 1 access. */ | 128 | /* PTE - Level 1 access. */ |
228 | 129 | ||
229 | /* page, protection -> pte */ | ||
230 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn((page)), (pgprot)) | ||
231 | |||
232 | #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
233 | #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \ | ||
234 | pte_index((address))) | ||
235 | |||
236 | /* x86-64 always has all page tables mapped. */ | 130 | /* x86-64 always has all page tables mapped. */ |
237 | #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) | 131 | #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) |
238 | #define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address)) | 132 | #define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address)) |
@@ -266,9 +160,6 @@ extern int direct_gbpages; | |||
266 | extern int kern_addr_valid(unsigned long addr); | 160 | extern int kern_addr_valid(unsigned long addr); |
267 | extern void cleanup_highmap(void); | 161 | extern void cleanup_highmap(void); |
268 | 162 | ||
269 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ | ||
270 | remap_pfn_range(vma, vaddr, pfn, size, prot) | ||
271 | |||
272 | #define HAVE_ARCH_UNMAPPED_AREA | 163 | #define HAVE_ARCH_UNMAPPED_AREA |
273 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | 164 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN |
274 | 165 | ||
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h new file mode 100644 index 000000000000..fbf42b8e0383 --- /dev/null +++ b/arch/x86/include/asm/pgtable_64_types.h | |||
@@ -0,0 +1,63 @@ | |||
1 | #ifndef _ASM_X86_PGTABLE_64_DEFS_H | ||
2 | #define _ASM_X86_PGTABLE_64_DEFS_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | #include <linux/types.h> | ||
6 | |||
7 | /* | ||
8 | * These are used to make use of C type-checking.. | ||
9 | */ | ||
10 | typedef unsigned long pteval_t; | ||
11 | typedef unsigned long pmdval_t; | ||
12 | typedef unsigned long pudval_t; | ||
13 | typedef unsigned long pgdval_t; | ||
14 | typedef unsigned long pgprotval_t; | ||
15 | |||
16 | typedef struct { pteval_t pte; } pte_t; | ||
17 | |||
18 | #endif /* !__ASSEMBLY__ */ | ||
19 | |||
20 | #define SHARED_KERNEL_PMD 0 | ||
21 | #define PAGETABLE_LEVELS 4 | ||
22 | |||
23 | /* | ||
24 | * PGDIR_SHIFT determines what a top-level page table entry can map | ||
25 | */ | ||
26 | #define PGDIR_SHIFT 39 | ||
27 | #define PTRS_PER_PGD 512 | ||
28 | |||
29 | /* | ||
30 | * 3rd level page | ||
31 | */ | ||
32 | #define PUD_SHIFT 30 | ||
33 | #define PTRS_PER_PUD 512 | ||
34 | |||
35 | /* | ||
36 | * PMD_SHIFT determines the size of the area a middle-level | ||
37 | * page table can map | ||
38 | */ | ||
39 | #define PMD_SHIFT 21 | ||
40 | #define PTRS_PER_PMD 512 | ||
41 | |||
42 | /* | ||
43 | * entries per page directory level | ||
44 | */ | ||
45 | #define PTRS_PER_PTE 512 | ||
46 | |||
47 | #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) | ||
48 | #define PMD_MASK (~(PMD_SIZE - 1)) | ||
49 | #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) | ||
50 | #define PUD_MASK (~(PUD_SIZE - 1)) | ||
51 | #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) | ||
52 | #define PGDIR_MASK (~(PGDIR_SIZE - 1)) | ||
53 | |||
54 | |||
55 | #define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL) | ||
56 | #define VMALLOC_START _AC(0xffffc20000000000, UL) | ||
57 | #define VMALLOC_END _AC(0xffffe1ffffffffff, UL) | ||
58 | #define VMEMMAP_START _AC(0xffffe20000000000, UL) | ||
59 | #define MODULES_VADDR _AC(0xffffffffa0000000, UL) | ||
60 | #define MODULES_END _AC(0xffffffffff000000, UL) | ||
61 | #define MODULES_LEN (MODULES_END - MODULES_VADDR) | ||
62 | |||
63 | #endif /* _ASM_X86_PGTABLE_64_DEFS_H */ | ||
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h new file mode 100644 index 000000000000..4d258ad76a0f --- /dev/null +++ b/arch/x86/include/asm/pgtable_types.h | |||
@@ -0,0 +1,328 @@ | |||
1 | #ifndef _ASM_X86_PGTABLE_DEFS_H | ||
2 | #define _ASM_X86_PGTABLE_DEFS_H | ||
3 | |||
4 | #include <linux/const.h> | ||
5 | #include <asm/page_types.h> | ||
6 | |||
7 | #define FIRST_USER_ADDRESS 0 | ||
8 | |||
9 | #define _PAGE_BIT_PRESENT 0 /* is present */ | ||
10 | #define _PAGE_BIT_RW 1 /* writeable */ | ||
11 | #define _PAGE_BIT_USER 2 /* userspace addressable */ | ||
12 | #define _PAGE_BIT_PWT 3 /* page write through */ | ||
13 | #define _PAGE_BIT_PCD 4 /* page cache disabled */ | ||
14 | #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ | ||
15 | #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ | ||
16 | #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ | ||
17 | #define _PAGE_BIT_PAT 7 /* on 4KB pages */ | ||
18 | #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ | ||
19 | #define _PAGE_BIT_UNUSED1 9 /* available for programmer */ | ||
20 | #define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */ | ||
21 | #define _PAGE_BIT_UNUSED3 11 | ||
22 | #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ | ||
23 | #define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1 | ||
24 | #define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1 | ||
25 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ | ||
26 | |||
27 | /* If _PAGE_BIT_PRESENT is clear, we use these: */ | ||
28 | /* - if the user mapped it with PROT_NONE; pte_present gives true */ | ||
29 | #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL | ||
30 | /* - set: nonlinear file mapping, saved PTE; unset:swap */ | ||
31 | #define _PAGE_BIT_FILE _PAGE_BIT_DIRTY | ||
32 | |||
33 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) | ||
34 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) | ||
35 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) | ||
36 | #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT) | ||
37 | #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD) | ||
38 | #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED) | ||
39 | #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY) | ||
40 | #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE) | ||
41 | #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL) | ||
42 | #define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1) | ||
43 | #define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP) | ||
44 | #define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3) | ||
45 | #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) | ||
46 | #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) | ||
47 | #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL) | ||
48 | #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST) | ||
49 | #define __HAVE_ARCH_PTE_SPECIAL | ||
50 | |||
51 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) | ||
52 | #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) | ||
53 | #else | ||
54 | #define _PAGE_NX (_AT(pteval_t, 0)) | ||
55 | #endif | ||
56 | |||
57 | #define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE) | ||
58 | #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) | ||
59 | |||
60 | #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | ||
61 | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
62 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \ | ||
63 | _PAGE_DIRTY) | ||
64 | |||
65 | /* Set of bits not changed in pte_modify */ | ||
66 | #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ | ||
67 | _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
68 | |||
69 | #define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT) | ||
70 | #define _PAGE_CACHE_WB (0) | ||
71 | #define _PAGE_CACHE_WC (_PAGE_PWT) | ||
72 | #define _PAGE_CACHE_UC_MINUS (_PAGE_PCD) | ||
73 | #define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT) | ||
74 | |||
75 | #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED) | ||
76 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ | ||
77 | _PAGE_ACCESSED | _PAGE_NX) | ||
78 | |||
79 | #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \ | ||
80 | _PAGE_USER | _PAGE_ACCESSED) | ||
81 | #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
82 | _PAGE_ACCESSED | _PAGE_NX) | ||
83 | #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
84 | _PAGE_ACCESSED) | ||
85 | #define PAGE_COPY PAGE_COPY_NOEXEC | ||
86 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
87 | _PAGE_ACCESSED | _PAGE_NX) | ||
88 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | ||
89 | _PAGE_ACCESSED) | ||
90 | |||
91 | #define __PAGE_KERNEL_EXEC \ | ||
92 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL) | ||
93 | #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX) | ||
94 | |||
95 | #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW) | ||
96 | #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) | ||
97 | #define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT) | ||
98 | #define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC) | ||
99 | #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT) | ||
100 | #define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD) | ||
101 | #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) | ||
102 | #define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT) | ||
103 | #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) | ||
104 | #define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE) | ||
105 | #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE) | ||
106 | |||
107 | #define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP) | ||
108 | #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP) | ||
109 | #define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP) | ||
110 | #define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP) | ||
111 | |||
112 | #define PAGE_KERNEL __pgprot(__PAGE_KERNEL) | ||
113 | #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO) | ||
114 | #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC) | ||
115 | #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX) | ||
116 | #define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC) | ||
117 | #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE) | ||
118 | #define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS) | ||
119 | #define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE) | ||
120 | #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE) | ||
121 | #define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE) | ||
122 | #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC) | ||
123 | #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL) | ||
124 | #define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE) | ||
125 | |||
126 | #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO) | ||
127 | #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE) | ||
128 | #define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS) | ||
129 | #define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC) | ||
130 | |||
131 | /* xwr */ | ||
132 | #define __P000 PAGE_NONE | ||
133 | #define __P001 PAGE_READONLY | ||
134 | #define __P010 PAGE_COPY | ||
135 | #define __P011 PAGE_COPY | ||
136 | #define __P100 PAGE_READONLY_EXEC | ||
137 | #define __P101 PAGE_READONLY_EXEC | ||
138 | #define __P110 PAGE_COPY_EXEC | ||
139 | #define __P111 PAGE_COPY_EXEC | ||
140 | |||
141 | #define __S000 PAGE_NONE | ||
142 | #define __S001 PAGE_READONLY | ||
143 | #define __S010 PAGE_SHARED | ||
144 | #define __S011 PAGE_SHARED | ||
145 | #define __S100 PAGE_READONLY_EXEC | ||
146 | #define __S101 PAGE_READONLY_EXEC | ||
147 | #define __S110 PAGE_SHARED_EXEC | ||
148 | #define __S111 PAGE_SHARED_EXEC | ||
149 | |||
150 | /* | ||
151 | * early identity mapping pte attrib macros. | ||
152 | */ | ||
153 | #ifdef CONFIG_X86_64 | ||
154 | #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC | ||
155 | #else | ||
156 | /* | ||
157 | * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection | ||
158 | * bits are combined, this will alow user to access the high address mapped | ||
159 | * VDSO in the presence of CONFIG_COMPAT_VDSO | ||
160 | */ | ||
161 | #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */ | ||
162 | #define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */ | ||
163 | #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ | ||
164 | #endif | ||
165 | |||
166 | #ifdef CONFIG_X86_32 | ||
167 | # include "pgtable_32_types.h" | ||
168 | #else | ||
169 | # include "pgtable_64_types.h" | ||
170 | #endif | ||
171 | |||
172 | #ifndef __ASSEMBLY__ | ||
173 | |||
174 | #include <linux/types.h> | ||
175 | |||
176 | /* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */ | ||
177 | #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK) | ||
178 | |||
179 | /* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */ | ||
180 | #define PTE_FLAGS_MASK (~PTE_PFN_MASK) | ||
181 | |||
182 | typedef struct pgprot { pgprotval_t pgprot; } pgprot_t; | ||
183 | |||
184 | typedef struct { pgdval_t pgd; } pgd_t; | ||
185 | |||
186 | static inline pgd_t native_make_pgd(pgdval_t val) | ||
187 | { | ||
188 | return (pgd_t) { val }; | ||
189 | } | ||
190 | |||
191 | static inline pgdval_t native_pgd_val(pgd_t pgd) | ||
192 | { | ||
193 | return pgd.pgd; | ||
194 | } | ||
195 | |||
196 | static inline pgdval_t pgd_flags(pgd_t pgd) | ||
197 | { | ||
198 | return native_pgd_val(pgd) & PTE_FLAGS_MASK; | ||
199 | } | ||
200 | |||
201 | #if PAGETABLE_LEVELS > 3 | ||
202 | typedef struct { pudval_t pud; } pud_t; | ||
203 | |||
204 | static inline pud_t native_make_pud(pmdval_t val) | ||
205 | { | ||
206 | return (pud_t) { val }; | ||
207 | } | ||
208 | |||
209 | static inline pudval_t native_pud_val(pud_t pud) | ||
210 | { | ||
211 | return pud.pud; | ||
212 | } | ||
213 | #else | ||
214 | #include <asm-generic/pgtable-nopud.h> | ||
215 | |||
216 | static inline pudval_t native_pud_val(pud_t pud) | ||
217 | { | ||
218 | return native_pgd_val(pud.pgd); | ||
219 | } | ||
220 | #endif | ||
221 | |||
222 | #if PAGETABLE_LEVELS > 2 | ||
223 | typedef struct { pmdval_t pmd; } pmd_t; | ||
224 | |||
225 | static inline pmd_t native_make_pmd(pmdval_t val) | ||
226 | { | ||
227 | return (pmd_t) { val }; | ||
228 | } | ||
229 | |||
230 | static inline pmdval_t native_pmd_val(pmd_t pmd) | ||
231 | { | ||
232 | return pmd.pmd; | ||
233 | } | ||
234 | #else | ||
235 | #include <asm-generic/pgtable-nopmd.h> | ||
236 | |||
237 | static inline pmdval_t native_pmd_val(pmd_t pmd) | ||
238 | { | ||
239 | return native_pgd_val(pmd.pud.pgd); | ||
240 | } | ||
241 | #endif | ||
242 | |||
243 | static inline pudval_t pud_flags(pud_t pud) | ||
244 | { | ||
245 | return native_pud_val(pud) & PTE_FLAGS_MASK; | ||
246 | } | ||
247 | |||
248 | static inline pmdval_t pmd_flags(pmd_t pmd) | ||
249 | { | ||
250 | return native_pmd_val(pmd) & PTE_FLAGS_MASK; | ||
251 | } | ||
252 | |||
253 | static inline pte_t native_make_pte(pteval_t val) | ||
254 | { | ||
255 | return (pte_t) { .pte = val }; | ||
256 | } | ||
257 | |||
258 | static inline pteval_t native_pte_val(pte_t pte) | ||
259 | { | ||
260 | return pte.pte; | ||
261 | } | ||
262 | |||
263 | static inline pteval_t pte_flags(pte_t pte) | ||
264 | { | ||
265 | return native_pte_val(pte) & PTE_FLAGS_MASK; | ||
266 | } | ||
267 | |||
268 | #define pgprot_val(x) ((x).pgprot) | ||
269 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
270 | |||
271 | |||
272 | typedef struct page *pgtable_t; | ||
273 | |||
274 | extern pteval_t __supported_pte_mask; | ||
275 | extern int nx_enabled; | ||
276 | |||
277 | #define pgprot_writecombine pgprot_writecombine | ||
278 | extern pgprot_t pgprot_writecombine(pgprot_t prot); | ||
279 | |||
280 | /* Indicate that x86 has its own track and untrack pfn vma functions */ | ||
281 | #define __HAVE_PFNMAP_TRACKING | ||
282 | |||
283 | #define __HAVE_PHYS_MEM_ACCESS_PROT | ||
284 | struct file; | ||
285 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | ||
286 | unsigned long size, pgprot_t vma_prot); | ||
287 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | ||
288 | unsigned long size, pgprot_t *vma_prot); | ||
289 | |||
290 | /* Install a pte for a particular vaddr in kernel space. */ | ||
291 | void set_pte_vaddr(unsigned long vaddr, pte_t pte); | ||
292 | |||
293 | #ifdef CONFIG_X86_32 | ||
294 | extern void native_pagetable_setup_start(pgd_t *base); | ||
295 | extern void native_pagetable_setup_done(pgd_t *base); | ||
296 | #else | ||
297 | static inline void native_pagetable_setup_start(pgd_t *base) {} | ||
298 | static inline void native_pagetable_setup_done(pgd_t *base) {} | ||
299 | #endif | ||
300 | |||
301 | struct seq_file; | ||
302 | extern void arch_report_meminfo(struct seq_file *m); | ||
303 | |||
304 | enum { | ||
305 | PG_LEVEL_NONE, | ||
306 | PG_LEVEL_4K, | ||
307 | PG_LEVEL_2M, | ||
308 | PG_LEVEL_1G, | ||
309 | PG_LEVEL_NUM | ||
310 | }; | ||
311 | |||
312 | #ifdef CONFIG_PROC_FS | ||
313 | extern void update_page_count(int level, unsigned long pages); | ||
314 | #else | ||
315 | static inline void update_page_count(int level, unsigned long pages) { } | ||
316 | #endif | ||
317 | |||
318 | /* | ||
319 | * Helper function that returns the kernel pagetable entry controlling | ||
320 | * the virtual address 'address'. NULL means no pagetable entry present. | ||
321 | * NOTE: the return type is pte_t but if the pmd is PSE then we return it | ||
322 | * as a pte too. | ||
323 | */ | ||
324 | extern pte_t *lookup_address(unsigned long address, unsigned int *level); | ||
325 | |||
326 | #endif /* !__ASSEMBLY__ */ | ||
327 | |||
328 | #endif /* _ASM_X86_PGTABLE_DEFS_H */ | ||
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 3bfd5235a9eb..76139506c3e4 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h | |||
@@ -16,6 +16,7 @@ struct mm_struct; | |||
16 | #include <asm/cpufeature.h> | 16 | #include <asm/cpufeature.h> |
17 | #include <asm/system.h> | 17 | #include <asm/system.h> |
18 | #include <asm/page.h> | 18 | #include <asm/page.h> |
19 | #include <asm/pgtable_types.h> | ||
19 | #include <asm/percpu.h> | 20 | #include <asm/percpu.h> |
20 | #include <asm/msr.h> | 21 | #include <asm/msr.h> |
21 | #include <asm/desc_defs.h> | 22 | #include <asm/desc_defs.h> |
@@ -73,7 +74,7 @@ struct cpuinfo_x86 { | |||
73 | char pad0; | 74 | char pad0; |
74 | #else | 75 | #else |
75 | /* Number of 4K pages in DTLB/ITLB combined(in pages): */ | 76 | /* Number of 4K pages in DTLB/ITLB combined(in pages): */ |
76 | int x86_tlbsize; | 77 | int x86_tlbsize; |
77 | __u8 x86_virt_bits; | 78 | __u8 x86_virt_bits; |
78 | __u8 x86_phys_bits; | 79 | __u8 x86_phys_bits; |
79 | #endif | 80 | #endif |
@@ -247,7 +248,6 @@ struct x86_hw_tss { | |||
247 | #define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long)) | 248 | #define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long)) |
248 | #define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap) | 249 | #define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap) |
249 | #define INVALID_IO_BITMAP_OFFSET 0x8000 | 250 | #define INVALID_IO_BITMAP_OFFSET 0x8000 |
250 | #define INVALID_IO_BITMAP_OFFSET_LAZY 0x9000 | ||
251 | 251 | ||
252 | struct tss_struct { | 252 | struct tss_struct { |
253 | /* | 253 | /* |
@@ -262,11 +262,6 @@ struct tss_struct { | |||
262 | * be within the limit. | 262 | * be within the limit. |
263 | */ | 263 | */ |
264 | unsigned long io_bitmap[IO_BITMAP_LONGS + 1]; | 264 | unsigned long io_bitmap[IO_BITMAP_LONGS + 1]; |
265 | /* | ||
266 | * Cache the current maximum and the last task that used the bitmap: | ||
267 | */ | ||
268 | unsigned long io_bitmap_max; | ||
269 | struct thread_struct *io_bitmap_owner; | ||
270 | 265 | ||
271 | /* | 266 | /* |
272 | * .. and then another 0x100 bytes for the emergency kernel stack: | 267 | * .. and then another 0x100 bytes for the emergency kernel stack: |
@@ -378,9 +373,30 @@ union thread_xstate { | |||
378 | 373 | ||
379 | #ifdef CONFIG_X86_64 | 374 | #ifdef CONFIG_X86_64 |
380 | DECLARE_PER_CPU(struct orig_ist, orig_ist); | 375 | DECLARE_PER_CPU(struct orig_ist, orig_ist); |
376 | |||
377 | union irq_stack_union { | ||
378 | char irq_stack[IRQ_STACK_SIZE]; | ||
379 | /* | ||
380 | * GCC hardcodes the stack canary as %gs:40. Since the | ||
381 | * irq_stack is the object at %gs:0, we reserve the bottom | ||
382 | * 48 bytes of the irq stack for the canary. | ||
383 | */ | ||
384 | struct { | ||
385 | char gs_base[40]; | ||
386 | unsigned long stack_canary; | ||
387 | }; | ||
388 | }; | ||
389 | |||
390 | DECLARE_PER_CPU(union irq_stack_union, irq_stack_union); | ||
391 | DECLARE_INIT_PER_CPU(irq_stack_union); | ||
392 | |||
393 | DECLARE_PER_CPU(char *, irq_stack_ptr); | ||
394 | #else /* X86_64 */ | ||
395 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
396 | DECLARE_PER_CPU(unsigned long, stack_canary); | ||
381 | #endif | 397 | #endif |
398 | #endif /* X86_64 */ | ||
382 | 399 | ||
383 | extern void print_cpu_info(struct cpuinfo_x86 *); | ||
384 | extern unsigned int xstate_size; | 400 | extern unsigned int xstate_size; |
385 | extern void free_thread_xstate(struct task_struct *); | 401 | extern void free_thread_xstate(struct task_struct *); |
386 | extern struct kmem_cache *task_xstate_cachep; | 402 | extern struct kmem_cache *task_xstate_cachep; |
@@ -752,9 +768,9 @@ extern int sysenter_setup(void); | |||
752 | extern struct desc_ptr early_gdt_descr; | 768 | extern struct desc_ptr early_gdt_descr; |
753 | 769 | ||
754 | extern void cpu_set_gdt(int); | 770 | extern void cpu_set_gdt(int); |
755 | extern void switch_to_new_gdt(void); | 771 | extern void switch_to_new_gdt(int); |
772 | extern void load_percpu_segment(int); | ||
756 | extern void cpu_init(void); | 773 | extern void cpu_init(void); |
757 | extern void init_gdt(int cpu); | ||
758 | 774 | ||
759 | static inline unsigned long get_debugctlmsr(void) | 775 | static inline unsigned long get_debugctlmsr(void) |
760 | { | 776 | { |
@@ -839,6 +855,7 @@ static inline void spin_lock_prefetch(const void *x) | |||
839 | * User space process size: 3GB (default). | 855 | * User space process size: 3GB (default). |
840 | */ | 856 | */ |
841 | #define TASK_SIZE PAGE_OFFSET | 857 | #define TASK_SIZE PAGE_OFFSET |
858 | #define TASK_SIZE_MAX TASK_SIZE | ||
842 | #define STACK_TOP TASK_SIZE | 859 | #define STACK_TOP TASK_SIZE |
843 | #define STACK_TOP_MAX STACK_TOP | 860 | #define STACK_TOP_MAX STACK_TOP |
844 | 861 | ||
@@ -898,7 +915,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk); | |||
898 | /* | 915 | /* |
899 | * User space process size. 47bits minus one guard page. | 916 | * User space process size. 47bits minus one guard page. |
900 | */ | 917 | */ |
901 | #define TASK_SIZE64 ((1UL << 47) - PAGE_SIZE) | 918 | #define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE) |
902 | 919 | ||
903 | /* This decides where the kernel will search for a free chunk of vm | 920 | /* This decides where the kernel will search for a free chunk of vm |
904 | * space during mmap's. | 921 | * space during mmap's. |
@@ -907,12 +924,12 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk); | |||
907 | 0xc0000000 : 0xFFFFe000) | 924 | 0xc0000000 : 0xFFFFe000) |
908 | 925 | ||
909 | #define TASK_SIZE (test_thread_flag(TIF_IA32) ? \ | 926 | #define TASK_SIZE (test_thread_flag(TIF_IA32) ? \ |
910 | IA32_PAGE_OFFSET : TASK_SIZE64) | 927 | IA32_PAGE_OFFSET : TASK_SIZE_MAX) |
911 | #define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \ | 928 | #define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \ |
912 | IA32_PAGE_OFFSET : TASK_SIZE64) | 929 | IA32_PAGE_OFFSET : TASK_SIZE_MAX) |
913 | 930 | ||
914 | #define STACK_TOP TASK_SIZE | 931 | #define STACK_TOP TASK_SIZE |
915 | #define STACK_TOP_MAX TASK_SIZE64 | 932 | #define STACK_TOP_MAX TASK_SIZE_MAX |
916 | 933 | ||
917 | #define INIT_THREAD { \ | 934 | #define INIT_THREAD { \ |
918 | .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \ | 935 | .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \ |
diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h index d6a22f92ba77..49fb3ecf3bb3 100644 --- a/arch/x86/include/asm/proto.h +++ b/arch/x86/include/asm/proto.h | |||
@@ -18,11 +18,7 @@ extern void syscall32_cpu_init(void); | |||
18 | 18 | ||
19 | extern void check_efer(void); | 19 | extern void check_efer(void); |
20 | 20 | ||
21 | #ifdef CONFIG_X86_BIOS_REBOOT | ||
22 | extern int reboot_force; | 21 | extern int reboot_force; |
23 | #else | ||
24 | static const int reboot_force = 0; | ||
25 | #endif | ||
26 | 22 | ||
27 | long do_arch_prctl(struct task_struct *task, int code, unsigned long addr); | 23 | long do_arch_prctl(struct task_struct *task, int code, unsigned long addr); |
28 | 24 | ||
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h index 6d34d954c228..e304b66abeea 100644 --- a/arch/x86/include/asm/ptrace.h +++ b/arch/x86/include/asm/ptrace.h | |||
@@ -28,7 +28,7 @@ struct pt_regs { | |||
28 | int xds; | 28 | int xds; |
29 | int xes; | 29 | int xes; |
30 | int xfs; | 30 | int xfs; |
31 | /* int gs; */ | 31 | int xgs; |
32 | long orig_eax; | 32 | long orig_eax; |
33 | long eip; | 33 | long eip; |
34 | int xcs; | 34 | int xcs; |
@@ -50,7 +50,7 @@ struct pt_regs { | |||
50 | unsigned long ds; | 50 | unsigned long ds; |
51 | unsigned long es; | 51 | unsigned long es; |
52 | unsigned long fs; | 52 | unsigned long fs; |
53 | /* int gs; */ | 53 | unsigned long gs; |
54 | unsigned long orig_ax; | 54 | unsigned long orig_ax; |
55 | unsigned long ip; | 55 | unsigned long ip; |
56 | unsigned long cs; | 56 | unsigned long cs; |
diff --git a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h b/arch/x86/include/asm/rdc321x_defs.h index c8e9c8bed3d0..c8e9c8bed3d0 100644 --- a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h +++ b/arch/x86/include/asm/rdc321x_defs.h | |||
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h index 1dc1b51ac623..14e0ed86a6f9 100644 --- a/arch/x86/include/asm/segment.h +++ b/arch/x86/include/asm/segment.h | |||
@@ -61,7 +61,7 @@ | |||
61 | * | 61 | * |
62 | * 26 - ESPFIX small SS | 62 | * 26 - ESPFIX small SS |
63 | * 27 - per-cpu [ offset to per-cpu data area ] | 63 | * 27 - per-cpu [ offset to per-cpu data area ] |
64 | * 28 - unused | 64 | * 28 - stack_canary-20 [ for stack protector ] |
65 | * 29 - unused | 65 | * 29 - unused |
66 | * 30 - unused | 66 | * 30 - unused |
67 | * 31 - TSS for double fault handler | 67 | * 31 - TSS for double fault handler |
@@ -95,6 +95,13 @@ | |||
95 | #define __KERNEL_PERCPU 0 | 95 | #define __KERNEL_PERCPU 0 |
96 | #endif | 96 | #endif |
97 | 97 | ||
98 | #define GDT_ENTRY_STACK_CANARY (GDT_ENTRY_KERNEL_BASE + 16) | ||
99 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
100 | #define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY * 8) | ||
101 | #else | ||
102 | #define __KERNEL_STACK_CANARY 0 | ||
103 | #endif | ||
104 | |||
98 | #define GDT_ENTRY_DOUBLEFAULT_TSS 31 | 105 | #define GDT_ENTRY_DOUBLEFAULT_TSS 31 |
99 | 106 | ||
100 | /* | 107 | /* |
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h index c2308f5250fd..05c6f6b11fd5 100644 --- a/arch/x86/include/asm/setup.h +++ b/arch/x86/include/asm/setup.h | |||
@@ -13,6 +13,7 @@ | |||
13 | struct mpc_cpu; | 13 | struct mpc_cpu; |
14 | struct mpc_bus; | 14 | struct mpc_bus; |
15 | struct mpc_oemtable; | 15 | struct mpc_oemtable; |
16 | |||
16 | struct x86_quirks { | 17 | struct x86_quirks { |
17 | int (*arch_pre_time_init)(void); | 18 | int (*arch_pre_time_init)(void); |
18 | int (*arch_time_init)(void); | 19 | int (*arch_time_init)(void); |
@@ -28,11 +29,18 @@ struct x86_quirks { | |||
28 | void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name); | 29 | void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name); |
29 | void (*mpc_oem_pci_bus)(struct mpc_bus *m); | 30 | void (*mpc_oem_pci_bus)(struct mpc_bus *m); |
30 | void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable, | 31 | void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable, |
31 | unsigned short oemsize); | 32 | unsigned short oemsize); |
32 | int (*setup_ioapic_ids)(void); | 33 | int (*setup_ioapic_ids)(void); |
33 | int (*update_genapic)(void); | ||
34 | }; | 34 | }; |
35 | 35 | ||
36 | extern void x86_quirk_pre_intr_init(void); | ||
37 | extern void x86_quirk_intr_init(void); | ||
38 | |||
39 | extern void x86_quirk_trap_init(void); | ||
40 | |||
41 | extern void x86_quirk_pre_time_init(void); | ||
42 | extern void x86_quirk_time_init(void); | ||
43 | |||
36 | #endif /* __ASSEMBLY__ */ | 44 | #endif /* __ASSEMBLY__ */ |
37 | 45 | ||
38 | #ifdef __i386__ | 46 | #ifdef __i386__ |
@@ -56,7 +64,11 @@ struct x86_quirks { | |||
56 | #include <asm/bootparam.h> | 64 | #include <asm/bootparam.h> |
57 | 65 | ||
58 | /* Interrupt control for vSMPowered x86_64 systems */ | 66 | /* Interrupt control for vSMPowered x86_64 systems */ |
67 | #ifdef CONFIG_X86_VSMP | ||
59 | void vsmp_init(void); | 68 | void vsmp_init(void); |
69 | #else | ||
70 | static inline void vsmp_init(void) { } | ||
71 | #endif | ||
60 | 72 | ||
61 | void setup_bios_corruption_check(void); | 73 | void setup_bios_corruption_check(void); |
62 | 74 | ||
@@ -68,8 +80,6 @@ static inline void visws_early_detect(void) { } | |||
68 | static inline int is_visws_box(void) { return 0; } | 80 | static inline int is_visws_box(void) { return 0; } |
69 | #endif | 81 | #endif |
70 | 82 | ||
71 | extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); | ||
72 | extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip); | ||
73 | extern struct x86_quirks *x86_quirks; | 83 | extern struct x86_quirks *x86_quirks; |
74 | extern unsigned long saved_video_mode; | 84 | extern unsigned long saved_video_mode; |
75 | 85 | ||
@@ -99,7 +109,6 @@ extern unsigned long init_pg_tables_start; | |||
99 | extern unsigned long init_pg_tables_end; | 109 | extern unsigned long init_pg_tables_end; |
100 | 110 | ||
101 | #else | 111 | #else |
102 | void __init x86_64_init_pda(void); | ||
103 | void __init x86_64_start_kernel(char *real_mode); | 112 | void __init x86_64_start_kernel(char *real_mode); |
104 | void __init x86_64_start_reservations(char *real_mode_data); | 113 | void __init x86_64_start_reservations(char *real_mode_data); |
105 | 114 | ||
diff --git a/arch/x86/include/asm/mach-default/setup_arch.h b/arch/x86/include/asm/setup_arch.h index 38846208b548..38846208b548 100644 --- a/arch/x86/include/asm/mach-default/setup_arch.h +++ b/arch/x86/include/asm/setup_arch.h | |||
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h index 19953df61c52..47d0e21f2b9e 100644 --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h | |||
@@ -15,34 +15,8 @@ | |||
15 | # include <asm/io_apic.h> | 15 | # include <asm/io_apic.h> |
16 | # endif | 16 | # endif |
17 | #endif | 17 | #endif |
18 | #include <asm/pda.h> | ||
19 | #include <asm/thread_info.h> | 18 | #include <asm/thread_info.h> |
20 | 19 | #include <asm/cpumask.h> | |
21 | #ifdef CONFIG_X86_64 | ||
22 | |||
23 | extern cpumask_var_t cpu_callin_mask; | ||
24 | extern cpumask_var_t cpu_callout_mask; | ||
25 | extern cpumask_var_t cpu_initialized_mask; | ||
26 | extern cpumask_var_t cpu_sibling_setup_mask; | ||
27 | |||
28 | #else /* CONFIG_X86_32 */ | ||
29 | |||
30 | extern cpumask_t cpu_callin_map; | ||
31 | extern cpumask_t cpu_callout_map; | ||
32 | extern cpumask_t cpu_initialized; | ||
33 | extern cpumask_t cpu_sibling_setup_map; | ||
34 | |||
35 | #define cpu_callin_mask ((struct cpumask *)&cpu_callin_map) | ||
36 | #define cpu_callout_mask ((struct cpumask *)&cpu_callout_map) | ||
37 | #define cpu_initialized_mask ((struct cpumask *)&cpu_initialized) | ||
38 | #define cpu_sibling_setup_mask ((struct cpumask *)&cpu_sibling_setup_map) | ||
39 | |||
40 | #endif /* CONFIG_X86_32 */ | ||
41 | |||
42 | extern void (*mtrr_hook)(void); | ||
43 | extern void zap_low_mappings(void); | ||
44 | |||
45 | extern int __cpuinit get_local_pda(int cpu); | ||
46 | 20 | ||
47 | extern int smp_num_siblings; | 21 | extern int smp_num_siblings; |
48 | extern unsigned int num_processors; | 22 | extern unsigned int num_processors; |
@@ -50,9 +24,7 @@ extern unsigned int num_processors; | |||
50 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); | 24 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); |
51 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); | 25 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); |
52 | DECLARE_PER_CPU(u16, cpu_llc_id); | 26 | DECLARE_PER_CPU(u16, cpu_llc_id); |
53 | #ifdef CONFIG_X86_32 | ||
54 | DECLARE_PER_CPU(int, cpu_number); | 27 | DECLARE_PER_CPU(int, cpu_number); |
55 | #endif | ||
56 | 28 | ||
57 | static inline struct cpumask *cpu_sibling_mask(int cpu) | 29 | static inline struct cpumask *cpu_sibling_mask(int cpu) |
58 | { | 30 | { |
@@ -167,8 +139,6 @@ void play_dead_common(void); | |||
167 | void native_send_call_func_ipi(const struct cpumask *mask); | 139 | void native_send_call_func_ipi(const struct cpumask *mask); |
168 | void native_send_call_func_single_ipi(int cpu); | 140 | void native_send_call_func_single_ipi(int cpu); |
169 | 141 | ||
170 | extern void prefill_possible_map(void); | ||
171 | |||
172 | void smp_store_cpu_info(int id); | 142 | void smp_store_cpu_info(int id); |
173 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) | 143 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
174 | 144 | ||
@@ -177,10 +147,6 @@ static inline int num_booting_cpus(void) | |||
177 | { | 147 | { |
178 | return cpumask_weight(cpu_callout_mask); | 148 | return cpumask_weight(cpu_callout_mask); |
179 | } | 149 | } |
180 | #else | ||
181 | static inline void prefill_possible_map(void) | ||
182 | { | ||
183 | } | ||
184 | #endif /* CONFIG_SMP */ | 150 | #endif /* CONFIG_SMP */ |
185 | 151 | ||
186 | extern unsigned disabled_cpus __cpuinitdata; | 152 | extern unsigned disabled_cpus __cpuinitdata; |
@@ -191,11 +157,11 @@ extern unsigned disabled_cpus __cpuinitdata; | |||
191 | * from the initial startup. We map APIC_BASE very early in page_setup(), | 157 | * from the initial startup. We map APIC_BASE very early in page_setup(), |
192 | * so this is correct in the x86 case. | 158 | * so this is correct in the x86 case. |
193 | */ | 159 | */ |
194 | #define raw_smp_processor_id() (x86_read_percpu(cpu_number)) | 160 | #define raw_smp_processor_id() (percpu_read(cpu_number)) |
195 | extern int safe_smp_processor_id(void); | 161 | extern int safe_smp_processor_id(void); |
196 | 162 | ||
197 | #elif defined(CONFIG_X86_64_SMP) | 163 | #elif defined(CONFIG_X86_64_SMP) |
198 | #define raw_smp_processor_id() read_pda(cpunumber) | 164 | #define raw_smp_processor_id() (percpu_read(cpu_number)) |
199 | 165 | ||
200 | #define stack_smp_processor_id() \ | 166 | #define stack_smp_processor_id() \ |
201 | ({ \ | 167 | ({ \ |
@@ -205,10 +171,6 @@ extern int safe_smp_processor_id(void); | |||
205 | }) | 171 | }) |
206 | #define safe_smp_processor_id() smp_processor_id() | 172 | #define safe_smp_processor_id() smp_processor_id() |
207 | 173 | ||
208 | #else /* !CONFIG_X86_32_SMP && !CONFIG_X86_64_SMP */ | ||
209 | #define cpu_physical_id(cpu) boot_cpu_physical_apicid | ||
210 | #define safe_smp_processor_id() 0 | ||
211 | #define stack_smp_processor_id() 0 | ||
212 | #endif | 174 | #endif |
213 | 175 | ||
214 | #ifdef CONFIG_X86_LOCAL_APIC | 176 | #ifdef CONFIG_X86_LOCAL_APIC |
@@ -220,28 +182,9 @@ static inline int logical_smp_processor_id(void) | |||
220 | return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR)); | 182 | return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR)); |
221 | } | 183 | } |
222 | 184 | ||
223 | #include <mach_apicdef.h> | ||
224 | static inline unsigned int read_apic_id(void) | ||
225 | { | ||
226 | unsigned int reg; | ||
227 | |||
228 | reg = *(u32 *)(APIC_BASE + APIC_ID); | ||
229 | |||
230 | return GET_APIC_ID(reg); | ||
231 | } | ||
232 | #endif | 185 | #endif |
233 | 186 | ||
234 | |||
235 | # if defined(APIC_DEFINITION) || defined(CONFIG_X86_64) | ||
236 | extern int hard_smp_processor_id(void); | 187 | extern int hard_smp_processor_id(void); |
237 | # else | ||
238 | #include <mach_apicdef.h> | ||
239 | static inline int hard_smp_processor_id(void) | ||
240 | { | ||
241 | /* we don't want to mark this access volatile - bad code generation */ | ||
242 | return read_apic_id(); | ||
243 | } | ||
244 | # endif /* APIC_DEFINITION */ | ||
245 | 188 | ||
246 | #else /* CONFIG_X86_LOCAL_APIC */ | 189 | #else /* CONFIG_X86_LOCAL_APIC */ |
247 | 190 | ||
@@ -251,11 +194,5 @@ static inline int hard_smp_processor_id(void) | |||
251 | 194 | ||
252 | #endif /* CONFIG_X86_LOCAL_APIC */ | 195 | #endif /* CONFIG_X86_LOCAL_APIC */ |
253 | 196 | ||
254 | #ifdef CONFIG_X86_HAS_BOOT_CPU_ID | ||
255 | extern unsigned char boot_cpu_id; | ||
256 | #else | ||
257 | #define boot_cpu_id 0 | ||
258 | #endif | ||
259 | |||
260 | #endif /* __ASSEMBLY__ */ | 197 | #endif /* __ASSEMBLY__ */ |
261 | #endif /* _ASM_X86_SMP_H */ | 198 | #endif /* _ASM_X86_SMP_H */ |
diff --git a/arch/x86/include/asm/mach-default/smpboot_hooks.h b/arch/x86/include/asm/smpboot_hooks.h index 23bf52103b89..1def60114906 100644 --- a/arch/x86/include/asm/mach-default/smpboot_hooks.h +++ b/arch/x86/include/asm/smpboot_hooks.h | |||
@@ -13,10 +13,10 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) | |||
13 | CMOS_WRITE(0xa, 0xf); | 13 | CMOS_WRITE(0xa, 0xf); |
14 | local_flush_tlb(); | 14 | local_flush_tlb(); |
15 | pr_debug("1.\n"); | 15 | pr_debug("1.\n"); |
16 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = | 16 | *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_high)) = |
17 | start_eip >> 4; | 17 | start_eip >> 4; |
18 | pr_debug("2.\n"); | 18 | pr_debug("2.\n"); |
19 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = | 19 | *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_low)) = |
20 | start_eip & 0xf; | 20 | start_eip & 0xf; |
21 | pr_debug("3.\n"); | 21 | pr_debug("3.\n"); |
22 | } | 22 | } |
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void) | |||
34 | */ | 34 | */ |
35 | CMOS_WRITE(0, 0xf); | 35 | CMOS_WRITE(0, 0xf); |
36 | 36 | ||
37 | *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; | 37 | *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0; |
38 | } | 38 | } |
39 | 39 | ||
40 | static inline void __init smpboot_setup_io_apic(void) | 40 | static inline void __init smpboot_setup_io_apic(void) |
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h index 8247e94ac6b1..3a5696656680 100644 --- a/arch/x86/include/asm/spinlock.h +++ b/arch/x86/include/asm/spinlock.h | |||
@@ -172,70 +172,8 @@ static inline int __ticket_spin_is_contended(raw_spinlock_t *lock) | |||
172 | return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1; | 172 | return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1; |
173 | } | 173 | } |
174 | 174 | ||
175 | #ifdef CONFIG_PARAVIRT | 175 | #ifndef CONFIG_PARAVIRT |
176 | /* | ||
177 | * Define virtualization-friendly old-style lock byte lock, for use in | ||
178 | * pv_lock_ops if desired. | ||
179 | * | ||
180 | * This differs from the pre-2.6.24 spinlock by always using xchgb | ||
181 | * rather than decb to take the lock; this allows it to use a | ||
182 | * zero-initialized lock structure. It also maintains a 1-byte | ||
183 | * contention counter, so that we can implement | ||
184 | * __byte_spin_is_contended. | ||
185 | */ | ||
186 | struct __byte_spinlock { | ||
187 | s8 lock; | ||
188 | s8 spinners; | ||
189 | }; | ||
190 | |||
191 | static inline int __byte_spin_is_locked(raw_spinlock_t *lock) | ||
192 | { | ||
193 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
194 | return bl->lock != 0; | ||
195 | } | ||
196 | |||
197 | static inline int __byte_spin_is_contended(raw_spinlock_t *lock) | ||
198 | { | ||
199 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
200 | return bl->spinners != 0; | ||
201 | } | ||
202 | |||
203 | static inline void __byte_spin_lock(raw_spinlock_t *lock) | ||
204 | { | ||
205 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
206 | s8 val = 1; | ||
207 | |||
208 | asm("1: xchgb %1, %0\n" | ||
209 | " test %1,%1\n" | ||
210 | " jz 3f\n" | ||
211 | " " LOCK_PREFIX "incb %2\n" | ||
212 | "2: rep;nop\n" | ||
213 | " cmpb $1, %0\n" | ||
214 | " je 2b\n" | ||
215 | " " LOCK_PREFIX "decb %2\n" | ||
216 | " jmp 1b\n" | ||
217 | "3:" | ||
218 | : "+m" (bl->lock), "+q" (val), "+m" (bl->spinners): : "memory"); | ||
219 | } | ||
220 | |||
221 | static inline int __byte_spin_trylock(raw_spinlock_t *lock) | ||
222 | { | ||
223 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
224 | u8 old = 1; | ||
225 | |||
226 | asm("xchgb %1,%0" | ||
227 | : "+m" (bl->lock), "+q" (old) : : "memory"); | ||
228 | 176 | ||
229 | return old == 0; | ||
230 | } | ||
231 | |||
232 | static inline void __byte_spin_unlock(raw_spinlock_t *lock) | ||
233 | { | ||
234 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
235 | smp_wmb(); | ||
236 | bl->lock = 0; | ||
237 | } | ||
238 | #else /* !CONFIG_PARAVIRT */ | ||
239 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) | 177 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) |
240 | { | 178 | { |
241 | return __ticket_spin_is_locked(lock); | 179 | return __ticket_spin_is_locked(lock); |
@@ -268,7 +206,7 @@ static __always_inline void __raw_spin_lock_flags(raw_spinlock_t *lock, | |||
268 | __raw_spin_lock(lock); | 206 | __raw_spin_lock(lock); |
269 | } | 207 | } |
270 | 208 | ||
271 | #endif /* CONFIG_PARAVIRT */ | 209 | #endif |
272 | 210 | ||
273 | static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock) | 211 | static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock) |
274 | { | 212 | { |
@@ -330,8 +268,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *lock) | |||
330 | { | 268 | { |
331 | atomic_t *count = (atomic_t *)lock; | 269 | atomic_t *count = (atomic_t *)lock; |
332 | 270 | ||
333 | atomic_dec(count); | 271 | if (atomic_dec_return(count) >= 0) |
334 | if (atomic_read(count) >= 0) | ||
335 | return 1; | 272 | return 1; |
336 | atomic_inc(count); | 273 | atomic_inc(count); |
337 | return 0; | 274 | return 0; |
diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h new file mode 100644 index 000000000000..c2d742c6e15f --- /dev/null +++ b/arch/x86/include/asm/stackprotector.h | |||
@@ -0,0 +1,124 @@ | |||
1 | /* | ||
2 | * GCC stack protector support. | ||
3 | * | ||
4 | * Stack protector works by putting predefined pattern at the start of | ||
5 | * the stack frame and verifying that it hasn't been overwritten when | ||
6 | * returning from the function. The pattern is called stack canary | ||
7 | * and unfortunately gcc requires it to be at a fixed offset from %gs. | ||
8 | * On x86_64, the offset is 40 bytes and on x86_32 20 bytes. x86_64 | ||
9 | * and x86_32 use segment registers differently and thus handles this | ||
10 | * requirement differently. | ||
11 | * | ||
12 | * On x86_64, %gs is shared by percpu area and stack canary. All | ||
13 | * percpu symbols are zero based and %gs points to the base of percpu | ||
14 | * area. The first occupant of the percpu area is always | ||
15 | * irq_stack_union which contains stack_canary at offset 40. Userland | ||
16 | * %gs is always saved and restored on kernel entry and exit using | ||
17 | * swapgs, so stack protector doesn't add any complexity there. | ||
18 | * | ||
19 | * On x86_32, it's slightly more complicated. As in x86_64, %gs is | ||
20 | * used for userland TLS. Unfortunately, some processors are much | ||
21 | * slower at loading segment registers with different value when | ||
22 | * entering and leaving the kernel, so the kernel uses %fs for percpu | ||
23 | * area and manages %gs lazily so that %gs is switched only when | ||
24 | * necessary, usually during task switch. | ||
25 | * | ||
26 | * As gcc requires the stack canary at %gs:20, %gs can't be managed | ||
27 | * lazily if stack protector is enabled, so the kernel saves and | ||
28 | * restores userland %gs on kernel entry and exit. This behavior is | ||
29 | * controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in | ||
30 | * system.h to hide the details. | ||
31 | */ | ||
32 | |||
33 | #ifndef _ASM_STACKPROTECTOR_H | ||
34 | #define _ASM_STACKPROTECTOR_H 1 | ||
35 | |||
36 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
37 | |||
38 | #include <asm/tsc.h> | ||
39 | #include <asm/processor.h> | ||
40 | #include <asm/percpu.h> | ||
41 | #include <asm/system.h> | ||
42 | #include <asm/desc.h> | ||
43 | #include <linux/random.h> | ||
44 | |||
45 | /* | ||
46 | * 24 byte read-only segment initializer for stack canary. Linker | ||
47 | * can't handle the address bit shifting. Address will be set in | ||
48 | * head_32 for boot CPU and setup_per_cpu_areas() for others. | ||
49 | */ | ||
50 | #define GDT_STACK_CANARY_INIT \ | ||
51 | [GDT_ENTRY_STACK_CANARY] = { { { 0x00000018, 0x00409000 } } }, | ||
52 | |||
53 | /* | ||
54 | * Initialize the stackprotector canary value. | ||
55 | * | ||
56 | * NOTE: this must only be called from functions that never return, | ||
57 | * and it must always be inlined. | ||
58 | */ | ||
59 | static __always_inline void boot_init_stack_canary(void) | ||
60 | { | ||
61 | u64 canary; | ||
62 | u64 tsc; | ||
63 | |||
64 | #ifdef CONFIG_X86_64 | ||
65 | BUILD_BUG_ON(offsetof(union irq_stack_union, stack_canary) != 40); | ||
66 | #endif | ||
67 | /* | ||
68 | * We both use the random pool and the current TSC as a source | ||
69 | * of randomness. The TSC only matters for very early init, | ||
70 | * there it already has some randomness on most systems. Later | ||
71 | * on during the bootup the random pool has true entropy too. | ||
72 | */ | ||
73 | get_random_bytes(&canary, sizeof(canary)); | ||
74 | tsc = __native_read_tsc(); | ||
75 | canary += tsc + (tsc << 32UL); | ||
76 | |||
77 | current->stack_canary = canary; | ||
78 | #ifdef CONFIG_X86_64 | ||
79 | percpu_write(irq_stack_union.stack_canary, canary); | ||
80 | #else | ||
81 | percpu_write(stack_canary, canary); | ||
82 | #endif | ||
83 | } | ||
84 | |||
85 | static inline void setup_stack_canary_segment(int cpu) | ||
86 | { | ||
87 | #ifdef CONFIG_X86_32 | ||
88 | unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu) - 20; | ||
89 | struct desc_struct *gdt_table = get_cpu_gdt_table(cpu); | ||
90 | struct desc_struct desc; | ||
91 | |||
92 | desc = gdt_table[GDT_ENTRY_STACK_CANARY]; | ||
93 | desc.base0 = canary & 0xffff; | ||
94 | desc.base1 = (canary >> 16) & 0xff; | ||
95 | desc.base2 = (canary >> 24) & 0xff; | ||
96 | write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S); | ||
97 | #endif | ||
98 | } | ||
99 | |||
100 | static inline void load_stack_canary_segment(void) | ||
101 | { | ||
102 | #ifdef CONFIG_X86_32 | ||
103 | asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory"); | ||
104 | #endif | ||
105 | } | ||
106 | |||
107 | #else /* CC_STACKPROTECTOR */ | ||
108 | |||
109 | #define GDT_STACK_CANARY_INIT | ||
110 | |||
111 | /* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */ | ||
112 | |||
113 | static inline void setup_stack_canary_segment(int cpu) | ||
114 | { } | ||
115 | |||
116 | static inline void load_stack_canary_segment(void) | ||
117 | { | ||
118 | #ifdef CONFIG_X86_32 | ||
119 | asm volatile ("mov %0, %%gs" : : "r" (0)); | ||
120 | #endif | ||
121 | } | ||
122 | |||
123 | #endif /* CC_STACKPROTECTOR */ | ||
124 | #endif /* _ASM_STACKPROTECTOR_H */ | ||
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h deleted file mode 100644 index 93d2c8667cfe..000000000000 --- a/arch/x86/include/asm/summit/apic.h +++ /dev/null | |||
@@ -1,202 +0,0 @@ | |||
1 | #ifndef __ASM_SUMMIT_APIC_H | ||
2 | #define __ASM_SUMMIT_APIC_H | ||
3 | |||
4 | #include <asm/smp.h> | ||
5 | #include <linux/gfp.h> | ||
6 | |||
7 | #define esr_disable (1) | ||
8 | #define NO_BALANCE_IRQ (0) | ||
9 | |||
10 | /* In clustered mode, the high nibble of APIC ID is a cluster number. | ||
11 | * The low nibble is a 4-bit bitmap. */ | ||
12 | #define XAPIC_DEST_CPUS_SHIFT 4 | ||
13 | #define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1) | ||
14 | #define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT) | ||
15 | |||
16 | #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) | ||
17 | |||
18 | static inline const cpumask_t *target_cpus(void) | ||
19 | { | ||
20 | /* CPU_MASK_ALL (0xff) has undefined behaviour with | ||
21 | * dest_LowestPrio mode logical clustered apic interrupt routing | ||
22 | * Just start on cpu 0. IRQ balancing will spread load | ||
23 | */ | ||
24 | return &cpumask_of_cpu(0); | ||
25 | } | ||
26 | |||
27 | #define INT_DELIVERY_MODE (dest_LowestPrio) | ||
28 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ | ||
29 | |||
30 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) | ||
31 | { | ||
32 | return 0; | ||
33 | } | ||
34 | |||
35 | /* we don't use the phys_cpu_present_map to indicate apicid presence */ | ||
36 | static inline unsigned long check_apicid_present(int bit) | ||
37 | { | ||
38 | return 1; | ||
39 | } | ||
40 | |||
41 | #define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK) | ||
42 | |||
43 | extern u8 cpu_2_logical_apicid[]; | ||
44 | |||
45 | static inline void init_apic_ldr(void) | ||
46 | { | ||
47 | unsigned long val, id; | ||
48 | int count = 0; | ||
49 | u8 my_id = (u8)hard_smp_processor_id(); | ||
50 | u8 my_cluster = (u8)apicid_cluster(my_id); | ||
51 | #ifdef CONFIG_SMP | ||
52 | u8 lid; | ||
53 | int i; | ||
54 | |||
55 | /* Create logical APIC IDs by counting CPUs already in cluster. */ | ||
56 | for (count = 0, i = nr_cpu_ids; --i >= 0; ) { | ||
57 | lid = cpu_2_logical_apicid[i]; | ||
58 | if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster) | ||
59 | ++count; | ||
60 | } | ||
61 | #endif | ||
62 | /* We only have a 4 wide bitmap in cluster mode. If a deranged | ||
63 | * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */ | ||
64 | BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT); | ||
65 | id = my_cluster | (1UL << count); | ||
66 | apic_write(APIC_DFR, APIC_DFR_VALUE); | ||
67 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
68 | val |= SET_APIC_LOGICAL_ID(id); | ||
69 | apic_write(APIC_LDR, val); | ||
70 | } | ||
71 | |||
72 | static inline int multi_timer_check(int apic, int irq) | ||
73 | { | ||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | static inline int apic_id_registered(void) | ||
78 | { | ||
79 | return 1; | ||
80 | } | ||
81 | |||
82 | static inline void setup_apic_routing(void) | ||
83 | { | ||
84 | printk("Enabling APIC mode: Summit. Using %d I/O APICs\n", | ||
85 | nr_ioapics); | ||
86 | } | ||
87 | |||
88 | static inline int apicid_to_node(int logical_apicid) | ||
89 | { | ||
90 | #ifdef CONFIG_SMP | ||
91 | return apicid_2_node[hard_smp_processor_id()]; | ||
92 | #else | ||
93 | return 0; | ||
94 | #endif | ||
95 | } | ||
96 | |||
97 | /* Mapping from cpu number to logical apicid */ | ||
98 | static inline int cpu_to_logical_apicid(int cpu) | ||
99 | { | ||
100 | #ifdef CONFIG_SMP | ||
101 | if (cpu >= nr_cpu_ids) | ||
102 | return BAD_APICID; | ||
103 | return (int)cpu_2_logical_apicid[cpu]; | ||
104 | #else | ||
105 | return logical_smp_processor_id(); | ||
106 | #endif | ||
107 | } | ||
108 | |||
109 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
110 | { | ||
111 | if (mps_cpu < nr_cpu_ids) | ||
112 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
113 | else | ||
114 | return BAD_APICID; | ||
115 | } | ||
116 | |||
117 | static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map) | ||
118 | { | ||
119 | /* For clustered we don't have a good way to do this yet - hack */ | ||
120 | return physids_promote(0x0F); | ||
121 | } | ||
122 | |||
123 | static inline physid_mask_t apicid_to_cpu_present(int apicid) | ||
124 | { | ||
125 | return physid_mask_of_physid(0); | ||
126 | } | ||
127 | |||
128 | static inline void setup_portio_remap(void) | ||
129 | { | ||
130 | } | ||
131 | |||
132 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
133 | { | ||
134 | return 1; | ||
135 | } | ||
136 | |||
137 | static inline void enable_apic_mode(void) | ||
138 | { | ||
139 | } | ||
140 | |||
141 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
142 | { | ||
143 | int num_bits_set; | ||
144 | int cpus_found = 0; | ||
145 | int cpu; | ||
146 | int apicid; | ||
147 | |||
148 | num_bits_set = cpus_weight(*cpumask); | ||
149 | /* Return id to all */ | ||
150 | if (num_bits_set >= nr_cpu_ids) | ||
151 | return (int) 0xFF; | ||
152 | /* | ||
153 | * The cpus in the mask must all be on the apic cluster. If are not | ||
154 | * on the same apicid cluster return default value of TARGET_CPUS. | ||
155 | */ | ||
156 | cpu = first_cpu(*cpumask); | ||
157 | apicid = cpu_to_logical_apicid(cpu); | ||
158 | while (cpus_found < num_bits_set) { | ||
159 | if (cpu_isset(cpu, *cpumask)) { | ||
160 | int new_apicid = cpu_to_logical_apicid(cpu); | ||
161 | if (apicid_cluster(apicid) != | ||
162 | apicid_cluster(new_apicid)){ | ||
163 | printk ("%s: Not a valid mask!\n", __func__); | ||
164 | return 0xFF; | ||
165 | } | ||
166 | apicid = apicid | new_apicid; | ||
167 | cpus_found++; | ||
168 | } | ||
169 | cpu++; | ||
170 | } | ||
171 | return apicid; | ||
172 | } | ||
173 | |||
174 | static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask, | ||
175 | const struct cpumask *andmask) | ||
176 | { | ||
177 | int apicid = cpu_to_logical_apicid(0); | ||
178 | cpumask_var_t cpumask; | ||
179 | |||
180 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | ||
181 | return apicid; | ||
182 | |||
183 | cpumask_and(cpumask, inmask, andmask); | ||
184 | cpumask_and(cpumask, cpumask, cpu_online_mask); | ||
185 | apicid = cpu_mask_to_apicid(cpumask); | ||
186 | |||
187 | free_cpumask_var(cpumask); | ||
188 | return apicid; | ||
189 | } | ||
190 | |||
191 | /* cpuid returns the value latched in the HW at reset, not the APIC ID | ||
192 | * register's value. For any box whose BIOS changes APIC IDs, like | ||
193 | * clustered APIC systems, we must use hard_smp_processor_id. | ||
194 | * | ||
195 | * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID. | ||
196 | */ | ||
197 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
198 | { | ||
199 | return hard_smp_processor_id() >> index_msb; | ||
200 | } | ||
201 | |||
202 | #endif /* __ASM_SUMMIT_APIC_H */ | ||
diff --git a/arch/x86/include/asm/summit/apicdef.h b/arch/x86/include/asm/summit/apicdef.h deleted file mode 100644 index f3fbca1f61c1..000000000000 --- a/arch/x86/include/asm/summit/apicdef.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | #ifndef __ASM_SUMMIT_APICDEF_H | ||
2 | #define __ASM_SUMMIT_APICDEF_H | ||
3 | |||
4 | #define APIC_ID_MASK (0xFF<<24) | ||
5 | |||
6 | static inline unsigned get_apic_id(unsigned long x) | ||
7 | { | ||
8 | return (x>>24)&0xFF; | ||
9 | } | ||
10 | |||
11 | #define GET_APIC_ID(x) get_apic_id(x) | ||
12 | |||
13 | #endif | ||
diff --git a/arch/x86/include/asm/summit/ipi.h b/arch/x86/include/asm/summit/ipi.h deleted file mode 100644 index a8a2c24f50cc..000000000000 --- a/arch/x86/include/asm/summit/ipi.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | #ifndef __ASM_SUMMIT_IPI_H | ||
2 | #define __ASM_SUMMIT_IPI_H | ||
3 | |||
4 | void send_IPI_mask_sequence(const cpumask_t *mask, int vector); | ||
5 | void send_IPI_mask_allbutself(const cpumask_t *mask, int vector); | ||
6 | |||
7 | static inline void send_IPI_mask(const cpumask_t *mask, int vector) | ||
8 | { | ||
9 | send_IPI_mask_sequence(mask, vector); | ||
10 | } | ||
11 | |||
12 | static inline void send_IPI_allbutself(int vector) | ||
13 | { | ||
14 | cpumask_t mask = cpu_online_map; | ||
15 | cpu_clear(smp_processor_id(), mask); | ||
16 | |||
17 | if (!cpus_empty(mask)) | ||
18 | send_IPI_mask(&mask, vector); | ||
19 | } | ||
20 | |||
21 | static inline void send_IPI_all(int vector) | ||
22 | { | ||
23 | send_IPI_mask(&cpu_online_map, vector); | ||
24 | } | ||
25 | |||
26 | #endif /* __ASM_SUMMIT_IPI_H */ | ||
diff --git a/arch/x86/include/asm/summit/mpparse.h b/arch/x86/include/asm/summit/mpparse.h deleted file mode 100644 index 380e86c02363..000000000000 --- a/arch/x86/include/asm/summit/mpparse.h +++ /dev/null | |||
@@ -1,109 +0,0 @@ | |||
1 | #ifndef __ASM_SUMMIT_MPPARSE_H | ||
2 | #define __ASM_SUMMIT_MPPARSE_H | ||
3 | |||
4 | #include <asm/tsc.h> | ||
5 | |||
6 | extern int use_cyclone; | ||
7 | |||
8 | #ifdef CONFIG_X86_SUMMIT_NUMA | ||
9 | extern void setup_summit(void); | ||
10 | #else | ||
11 | #define setup_summit() {} | ||
12 | #endif | ||
13 | |||
14 | static inline int mps_oem_check(struct mpc_table *mpc, char *oem, | ||
15 | char *productid) | ||
16 | { | ||
17 | if (!strncmp(oem, "IBM ENSW", 8) && | ||
18 | (!strncmp(productid, "VIGIL SMP", 9) | ||
19 | || !strncmp(productid, "EXA", 3) | ||
20 | || !strncmp(productid, "RUTHLESS SMP", 12))){ | ||
21 | mark_tsc_unstable("Summit based system"); | ||
22 | use_cyclone = 1; /*enable cyclone-timer*/ | ||
23 | setup_summit(); | ||
24 | return 1; | ||
25 | } | ||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | /* Hook from generic ACPI tables.c */ | ||
30 | static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
31 | { | ||
32 | if (!strncmp(oem_id, "IBM", 3) && | ||
33 | (!strncmp(oem_table_id, "SERVIGIL", 8) | ||
34 | || !strncmp(oem_table_id, "EXA", 3))){ | ||
35 | mark_tsc_unstable("Summit based system"); | ||
36 | use_cyclone = 1; /*enable cyclone-timer*/ | ||
37 | setup_summit(); | ||
38 | return 1; | ||
39 | } | ||
40 | return 0; | ||
41 | } | ||
42 | |||
43 | struct rio_table_hdr { | ||
44 | unsigned char version; /* Version number of this data structure */ | ||
45 | /* Version 3 adds chassis_num & WP_index */ | ||
46 | unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */ | ||
47 | unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */ | ||
48 | } __attribute__((packed)); | ||
49 | |||
50 | struct scal_detail { | ||
51 | unsigned char node_id; /* Scalability Node ID */ | ||
52 | unsigned long CBAR; /* Address of 1MB register space */ | ||
53 | unsigned char port0node; /* Node ID port connected to: 0xFF=None */ | ||
54 | unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
55 | unsigned char port1node; /* Node ID port connected to: 0xFF = None */ | ||
56 | unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
57 | unsigned char port2node; /* Node ID port connected to: 0xFF = None */ | ||
58 | unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
59 | unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */ | ||
60 | } __attribute__((packed)); | ||
61 | |||
62 | struct rio_detail { | ||
63 | unsigned char node_id; /* RIO Node ID */ | ||
64 | unsigned long BBAR; /* Address of 1MB register space */ | ||
65 | unsigned char type; /* Type of device */ | ||
66 | unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/ | ||
67 | /* For CYC: Node ID of Twister that owns this CYC */ | ||
68 | unsigned char port0node; /* Node ID port connected to: 0xFF=None */ | ||
69 | unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
70 | unsigned char port1node; /* Node ID port connected to: 0xFF=None */ | ||
71 | unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
72 | unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */ | ||
73 | /* For CYC: 0 */ | ||
74 | unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */ | ||
75 | /* = 0 : the XAPIC is not used, ie:*/ | ||
76 | /* ints fwded to another XAPIC */ | ||
77 | /* Bits1:7 Reserved */ | ||
78 | /* For CYC: Bits0:7 Reserved */ | ||
79 | unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */ | ||
80 | /* lower slot numbers/PCI bus numbers */ | ||
81 | /* For CYC: No meaning */ | ||
82 | unsigned char chassis_num; /* 1 based Chassis number */ | ||
83 | /* For LookOut WPEGs this field indicates the */ | ||
84 | /* Expansion Chassis #, enumerated from Boot */ | ||
85 | /* Node WPEG external port, then Boot Node CYC */ | ||
86 | /* external port, then Next Vigil chassis WPEG */ | ||
87 | /* external port, etc. */ | ||
88 | /* Shared Lookouts have only 1 chassis number (the */ | ||
89 | /* first one assigned) */ | ||
90 | } __attribute__((packed)); | ||
91 | |||
92 | |||
93 | typedef enum { | ||
94 | CompatTwister = 0, /* Compatibility Twister */ | ||
95 | AltTwister = 1, /* Alternate Twister of internal 8-way */ | ||
96 | CompatCyclone = 2, /* Compatibility Cyclone */ | ||
97 | AltCyclone = 3, /* Alternate Cyclone of internal 8-way */ | ||
98 | CompatWPEG = 4, /* Compatibility WPEG */ | ||
99 | AltWPEG = 5, /* Second Planar WPEG */ | ||
100 | LookOutAWPEG = 6, /* LookOut WPEG */ | ||
101 | LookOutBWPEG = 7, /* LookOut WPEG */ | ||
102 | } node_type; | ||
103 | |||
104 | static inline int is_WPEG(struct rio_detail *rio){ | ||
105 | return (rio->type == CompatWPEG || rio->type == AltWPEG || | ||
106 | rio->type == LookOutAWPEG || rio->type == LookOutBWPEG); | ||
107 | } | ||
108 | |||
109 | #endif /* __ASM_SUMMIT_MPPARSE_H */ | ||
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h index e26d34b0bc79..7043408f6904 100644 --- a/arch/x86/include/asm/syscalls.h +++ b/arch/x86/include/asm/syscalls.h | |||
@@ -29,21 +29,21 @@ asmlinkage int sys_get_thread_area(struct user_desc __user *); | |||
29 | /* X86_32 only */ | 29 | /* X86_32 only */ |
30 | #ifdef CONFIG_X86_32 | 30 | #ifdef CONFIG_X86_32 |
31 | /* kernel/process_32.c */ | 31 | /* kernel/process_32.c */ |
32 | asmlinkage int sys_fork(struct pt_regs); | 32 | int sys_fork(struct pt_regs *); |
33 | asmlinkage int sys_clone(struct pt_regs); | 33 | int sys_clone(struct pt_regs *); |
34 | asmlinkage int sys_vfork(struct pt_regs); | 34 | int sys_vfork(struct pt_regs *); |
35 | asmlinkage int sys_execve(struct pt_regs); | 35 | int sys_execve(struct pt_regs *); |
36 | 36 | ||
37 | /* kernel/signal_32.c */ | 37 | /* kernel/signal_32.c */ |
38 | asmlinkage int sys_sigsuspend(int, int, old_sigset_t); | 38 | asmlinkage int sys_sigsuspend(int, int, old_sigset_t); |
39 | asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, | 39 | asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, |
40 | struct old_sigaction __user *); | 40 | struct old_sigaction __user *); |
41 | asmlinkage int sys_sigaltstack(unsigned long); | 41 | int sys_sigaltstack(struct pt_regs *); |
42 | asmlinkage unsigned long sys_sigreturn(unsigned long); | 42 | unsigned long sys_sigreturn(struct pt_regs *); |
43 | asmlinkage int sys_rt_sigreturn(unsigned long); | 43 | long sys_rt_sigreturn(struct pt_regs *); |
44 | 44 | ||
45 | /* kernel/ioport.c */ | 45 | /* kernel/ioport.c */ |
46 | asmlinkage long sys_iopl(unsigned long); | 46 | long sys_iopl(struct pt_regs *); |
47 | 47 | ||
48 | /* kernel/sys_i386_32.c */ | 48 | /* kernel/sys_i386_32.c */ |
49 | asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, | 49 | asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, |
@@ -59,8 +59,8 @@ struct oldold_utsname; | |||
59 | asmlinkage int sys_olduname(struct oldold_utsname __user *); | 59 | asmlinkage int sys_olduname(struct oldold_utsname __user *); |
60 | 60 | ||
61 | /* kernel/vm86_32.c */ | 61 | /* kernel/vm86_32.c */ |
62 | asmlinkage int sys_vm86old(struct pt_regs); | 62 | int sys_vm86old(struct pt_regs *); |
63 | asmlinkage int sys_vm86(struct pt_regs); | 63 | int sys_vm86(struct pt_regs *); |
64 | 64 | ||
65 | #else /* CONFIG_X86_32 */ | 65 | #else /* CONFIG_X86_32 */ |
66 | 66 | ||
@@ -82,7 +82,7 @@ asmlinkage long sys_iopl(unsigned int, struct pt_regs *); | |||
82 | /* kernel/signal_64.c */ | 82 | /* kernel/signal_64.c */ |
83 | asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *, | 83 | asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *, |
84 | struct pt_regs *); | 84 | struct pt_regs *); |
85 | asmlinkage long sys_rt_sigreturn(struct pt_regs *); | 85 | long sys_rt_sigreturn(struct pt_regs *); |
86 | 86 | ||
87 | /* kernel/sys_x86_64.c */ | 87 | /* kernel/sys_x86_64.c */ |
88 | asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long, | 88 | asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long, |
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h index 8e626ea33a1a..643c59b4bc6e 100644 --- a/arch/x86/include/asm/system.h +++ b/arch/x86/include/asm/system.h | |||
@@ -20,9 +20,26 @@ | |||
20 | struct task_struct; /* one of the stranger aspects of C forward declarations */ | 20 | struct task_struct; /* one of the stranger aspects of C forward declarations */ |
21 | struct task_struct *__switch_to(struct task_struct *prev, | 21 | struct task_struct *__switch_to(struct task_struct *prev, |
22 | struct task_struct *next); | 22 | struct task_struct *next); |
23 | struct tss_struct; | ||
24 | void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p, | ||
25 | struct tss_struct *tss); | ||
23 | 26 | ||
24 | #ifdef CONFIG_X86_32 | 27 | #ifdef CONFIG_X86_32 |
25 | 28 | ||
29 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
30 | #define __switch_canary \ | ||
31 | "movl %P[task_canary](%[next]), %%ebx\n\t" \ | ||
32 | "movl %%ebx, "__percpu_arg([stack_canary])"\n\t" | ||
33 | #define __switch_canary_oparam \ | ||
34 | , [stack_canary] "=m" (per_cpu_var(stack_canary)) | ||
35 | #define __switch_canary_iparam \ | ||
36 | , [task_canary] "i" (offsetof(struct task_struct, stack_canary)) | ||
37 | #else /* CC_STACKPROTECTOR */ | ||
38 | #define __switch_canary | ||
39 | #define __switch_canary_oparam | ||
40 | #define __switch_canary_iparam | ||
41 | #endif /* CC_STACKPROTECTOR */ | ||
42 | |||
26 | /* | 43 | /* |
27 | * Saving eflags is important. It switches not only IOPL between tasks, | 44 | * Saving eflags is important. It switches not only IOPL between tasks, |
28 | * it also protects other tasks from NT leaking through sysenter etc. | 45 | * it also protects other tasks from NT leaking through sysenter etc. |
@@ -44,6 +61,7 @@ do { \ | |||
44 | "movl %[next_sp],%%esp\n\t" /* restore ESP */ \ | 61 | "movl %[next_sp],%%esp\n\t" /* restore ESP */ \ |
45 | "movl $1f,%[prev_ip]\n\t" /* save EIP */ \ | 62 | "movl $1f,%[prev_ip]\n\t" /* save EIP */ \ |
46 | "pushl %[next_ip]\n\t" /* restore EIP */ \ | 63 | "pushl %[next_ip]\n\t" /* restore EIP */ \ |
64 | __switch_canary \ | ||
47 | "jmp __switch_to\n" /* regparm call */ \ | 65 | "jmp __switch_to\n" /* regparm call */ \ |
48 | "1:\t" \ | 66 | "1:\t" \ |
49 | "popl %%ebp\n\t" /* restore EBP */ \ | 67 | "popl %%ebp\n\t" /* restore EBP */ \ |
@@ -58,6 +76,8 @@ do { \ | |||
58 | "=b" (ebx), "=c" (ecx), "=d" (edx), \ | 76 | "=b" (ebx), "=c" (ecx), "=d" (edx), \ |
59 | "=S" (esi), "=D" (edi) \ | 77 | "=S" (esi), "=D" (edi) \ |
60 | \ | 78 | \ |
79 | __switch_canary_oparam \ | ||
80 | \ | ||
61 | /* input parameters: */ \ | 81 | /* input parameters: */ \ |
62 | : [next_sp] "m" (next->thread.sp), \ | 82 | : [next_sp] "m" (next->thread.sp), \ |
63 | [next_ip] "m" (next->thread.ip), \ | 83 | [next_ip] "m" (next->thread.ip), \ |
@@ -66,6 +86,8 @@ do { \ | |||
66 | [prev] "a" (prev), \ | 86 | [prev] "a" (prev), \ |
67 | [next] "d" (next) \ | 87 | [next] "d" (next) \ |
68 | \ | 88 | \ |
89 | __switch_canary_iparam \ | ||
90 | \ | ||
69 | : /* reloaded segment registers */ \ | 91 | : /* reloaded segment registers */ \ |
70 | "memory"); \ | 92 | "memory"); \ |
71 | } while (0) | 93 | } while (0) |
@@ -86,27 +108,44 @@ do { \ | |||
86 | , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \ | 108 | , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \ |
87 | "r12", "r13", "r14", "r15" | 109 | "r12", "r13", "r14", "r15" |
88 | 110 | ||
111 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
112 | #define __switch_canary \ | ||
113 | "movq %P[task_canary](%%rsi),%%r8\n\t" \ | ||
114 | "movq %%r8,"__percpu_arg([gs_canary])"\n\t" | ||
115 | #define __switch_canary_oparam \ | ||
116 | , [gs_canary] "=m" (per_cpu_var(irq_stack_union.stack_canary)) | ||
117 | #define __switch_canary_iparam \ | ||
118 | , [task_canary] "i" (offsetof(struct task_struct, stack_canary)) | ||
119 | #else /* CC_STACKPROTECTOR */ | ||
120 | #define __switch_canary | ||
121 | #define __switch_canary_oparam | ||
122 | #define __switch_canary_iparam | ||
123 | #endif /* CC_STACKPROTECTOR */ | ||
124 | |||
89 | /* Save restore flags to clear handle leaking NT */ | 125 | /* Save restore flags to clear handle leaking NT */ |
90 | #define switch_to(prev, next, last) \ | 126 | #define switch_to(prev, next, last) \ |
91 | asm volatile(SAVE_CONTEXT \ | 127 | asm volatile(SAVE_CONTEXT \ |
92 | "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \ | 128 | "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \ |
93 | "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \ | 129 | "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \ |
94 | "call __switch_to\n\t" \ | 130 | "call __switch_to\n\t" \ |
95 | ".globl thread_return\n" \ | 131 | ".globl thread_return\n" \ |
96 | "thread_return:\n\t" \ | 132 | "thread_return:\n\t" \ |
97 | "movq %%gs:%P[pda_pcurrent],%%rsi\n\t" \ | 133 | "movq "__percpu_arg([current_task])",%%rsi\n\t" \ |
134 | __switch_canary \ | ||
98 | "movq %P[thread_info](%%rsi),%%r8\n\t" \ | 135 | "movq %P[thread_info](%%rsi),%%r8\n\t" \ |
99 | LOCK_PREFIX "btr %[tif_fork],%P[ti_flags](%%r8)\n\t" \ | ||
100 | "movq %%rax,%%rdi\n\t" \ | 136 | "movq %%rax,%%rdi\n\t" \ |
101 | "jc ret_from_fork\n\t" \ | 137 | "testl %[_tif_fork],%P[ti_flags](%%r8)\n\t" \ |
138 | "jnz ret_from_fork\n\t" \ | ||
102 | RESTORE_CONTEXT \ | 139 | RESTORE_CONTEXT \ |
103 | : "=a" (last) \ | 140 | : "=a" (last) \ |
141 | __switch_canary_oparam \ | ||
104 | : [next] "S" (next), [prev] "D" (prev), \ | 142 | : [next] "S" (next), [prev] "D" (prev), \ |
105 | [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \ | 143 | [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \ |
106 | [ti_flags] "i" (offsetof(struct thread_info, flags)), \ | 144 | [ti_flags] "i" (offsetof(struct thread_info, flags)), \ |
107 | [tif_fork] "i" (TIF_FORK), \ | 145 | [_tif_fork] "i" (_TIF_FORK), \ |
108 | [thread_info] "i" (offsetof(struct task_struct, stack)), \ | 146 | [thread_info] "i" (offsetof(struct task_struct, stack)), \ |
109 | [pda_pcurrent] "i" (offsetof(struct x8664_pda, pcurrent)) \ | 147 | [current_task] "m" (per_cpu_var(current_task)) \ |
148 | __switch_canary_iparam \ | ||
110 | : "memory", "cc" __EXTRA_CLOBBER) | 149 | : "memory", "cc" __EXTRA_CLOBBER) |
111 | #endif | 150 | #endif |
112 | 151 | ||
@@ -165,6 +204,25 @@ extern void native_load_gs_index(unsigned); | |||
165 | #define savesegment(seg, value) \ | 204 | #define savesegment(seg, value) \ |
166 | asm("mov %%" #seg ",%0":"=r" (value) : : "memory") | 205 | asm("mov %%" #seg ",%0":"=r" (value) : : "memory") |
167 | 206 | ||
207 | /* | ||
208 | * x86_32 user gs accessors. | ||
209 | */ | ||
210 | #ifdef CONFIG_X86_32 | ||
211 | #ifdef CONFIG_X86_32_LAZY_GS | ||
212 | #define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;}) | ||
213 | #define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v)) | ||
214 | #define task_user_gs(tsk) ((tsk)->thread.gs) | ||
215 | #define lazy_save_gs(v) savesegment(gs, (v)) | ||
216 | #define lazy_load_gs(v) loadsegment(gs, (v)) | ||
217 | #else /* X86_32_LAZY_GS */ | ||
218 | #define get_user_gs(regs) (u16)((regs)->gs) | ||
219 | #define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0) | ||
220 | #define task_user_gs(tsk) (task_pt_regs(tsk)->gs) | ||
221 | #define lazy_save_gs(v) do { } while (0) | ||
222 | #define lazy_load_gs(v) do { } while (0) | ||
223 | #endif /* X86_32_LAZY_GS */ | ||
224 | #endif /* X86_32 */ | ||
225 | |||
168 | static inline unsigned long get_limit(unsigned long segment) | 226 | static inline unsigned long get_limit(unsigned long segment) |
169 | { | 227 | { |
170 | unsigned long __limit; | 228 | unsigned long __limit; |
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index 98789647baa9..df9d5f78385e 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h | |||
@@ -40,6 +40,7 @@ struct thread_info { | |||
40 | */ | 40 | */ |
41 | __u8 supervisor_stack[0]; | 41 | __u8 supervisor_stack[0]; |
42 | #endif | 42 | #endif |
43 | int uaccess_err; | ||
43 | }; | 44 | }; |
44 | 45 | ||
45 | #define INIT_THREAD_INFO(tsk) \ | 46 | #define INIT_THREAD_INFO(tsk) \ |
@@ -194,25 +195,21 @@ static inline struct thread_info *current_thread_info(void) | |||
194 | 195 | ||
195 | #else /* X86_32 */ | 196 | #else /* X86_32 */ |
196 | 197 | ||
197 | #include <asm/pda.h> | 198 | #include <asm/percpu.h> |
199 | #define KERNEL_STACK_OFFSET (5*8) | ||
198 | 200 | ||
199 | /* | 201 | /* |
200 | * macros/functions for gaining access to the thread information structure | 202 | * macros/functions for gaining access to the thread information structure |
201 | * preempt_count needs to be 1 initially, until the scheduler is functional. | 203 | * preempt_count needs to be 1 initially, until the scheduler is functional. |
202 | */ | 204 | */ |
203 | #ifndef __ASSEMBLY__ | 205 | #ifndef __ASSEMBLY__ |
204 | static inline struct thread_info *current_thread_info(void) | 206 | DECLARE_PER_CPU(unsigned long, kernel_stack); |
205 | { | ||
206 | struct thread_info *ti; | ||
207 | ti = (void *)(read_pda(kernelstack) + PDA_STACKOFFSET - THREAD_SIZE); | ||
208 | return ti; | ||
209 | } | ||
210 | 207 | ||
211 | /* do not use in interrupt context */ | 208 | static inline struct thread_info *current_thread_info(void) |
212 | static inline struct thread_info *stack_thread_info(void) | ||
213 | { | 209 | { |
214 | struct thread_info *ti; | 210 | struct thread_info *ti; |
215 | asm("andq %%rsp,%0; " : "=r" (ti) : "0" (~(THREAD_SIZE - 1))); | 211 | ti = (void *)(percpu_read(kernel_stack) + |
212 | KERNEL_STACK_OFFSET - THREAD_SIZE); | ||
216 | return ti; | 213 | return ti; |
217 | } | 214 | } |
218 | 215 | ||
@@ -220,8 +217,8 @@ static inline struct thread_info *stack_thread_info(void) | |||
220 | 217 | ||
221 | /* how to get the thread information struct from ASM */ | 218 | /* how to get the thread information struct from ASM */ |
222 | #define GET_THREAD_INFO(reg) \ | 219 | #define GET_THREAD_INFO(reg) \ |
223 | movq %gs:pda_kernelstack,reg ; \ | 220 | movq PER_CPU_VAR(kernel_stack),reg ; \ |
224 | subq $(THREAD_SIZE-PDA_STACKOFFSET),reg | 221 | subq $(THREAD_SIZE-KERNEL_STACK_OFFSET),reg |
225 | 222 | ||
226 | #endif | 223 | #endif |
227 | 224 | ||
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index 4f5c24724856..a81195eaa2b3 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h | |||
@@ -3,6 +3,7 @@ | |||
3 | #include <linux/init.h> | 3 | #include <linux/init.h> |
4 | #include <linux/pm.h> | 4 | #include <linux/pm.h> |
5 | #include <linux/percpu.h> | 5 | #include <linux/percpu.h> |
6 | #include <linux/interrupt.h> | ||
6 | 7 | ||
7 | #define TICK_SIZE (tick_nsec / 1000) | 8 | #define TICK_SIZE (tick_nsec / 1000) |
8 | 9 | ||
@@ -11,8 +12,9 @@ unsigned long native_calibrate_tsc(void); | |||
11 | 12 | ||
12 | #ifdef CONFIG_X86_32 | 13 | #ifdef CONFIG_X86_32 |
13 | extern int timer_ack; | 14 | extern int timer_ack; |
14 | #endif | ||
15 | extern int recalibrate_cpu_khz(void); | 15 | extern int recalibrate_cpu_khz(void); |
16 | extern irqreturn_t timer_interrupt(int irq, void *dev_id); | ||
17 | #endif /* CONFIG_X86_32 */ | ||
16 | 18 | ||
17 | extern int no_timer_check; | 19 | extern int no_timer_check; |
18 | 20 | ||
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h index 0e7bbb549116..d3539f998f88 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h | |||
@@ -113,7 +113,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, | |||
113 | __flush_tlb(); | 113 | __flush_tlb(); |
114 | } | 114 | } |
115 | 115 | ||
116 | static inline void native_flush_tlb_others(const cpumask_t *cpumask, | 116 | static inline void native_flush_tlb_others(const struct cpumask *cpumask, |
117 | struct mm_struct *mm, | 117 | struct mm_struct *mm, |
118 | unsigned long va) | 118 | unsigned long va) |
119 | { | 119 | { |
@@ -142,31 +142,28 @@ static inline void flush_tlb_range(struct vm_area_struct *vma, | |||
142 | flush_tlb_mm(vma->vm_mm); | 142 | flush_tlb_mm(vma->vm_mm); |
143 | } | 143 | } |
144 | 144 | ||
145 | void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm, | 145 | void native_flush_tlb_others(const struct cpumask *cpumask, |
146 | unsigned long va); | 146 | struct mm_struct *mm, unsigned long va); |
147 | 147 | ||
148 | #define TLBSTATE_OK 1 | 148 | #define TLBSTATE_OK 1 |
149 | #define TLBSTATE_LAZY 2 | 149 | #define TLBSTATE_LAZY 2 |
150 | 150 | ||
151 | #ifdef CONFIG_X86_32 | ||
152 | struct tlb_state { | 151 | struct tlb_state { |
153 | struct mm_struct *active_mm; | 152 | struct mm_struct *active_mm; |
154 | int state; | 153 | int state; |
155 | char __cacheline_padding[L1_CACHE_BYTES-8]; | ||
156 | }; | 154 | }; |
157 | DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate); | 155 | DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate); |
158 | 156 | ||
159 | void reset_lazy_tlbstate(void); | ||
160 | #else | ||
161 | static inline void reset_lazy_tlbstate(void) | 157 | static inline void reset_lazy_tlbstate(void) |
162 | { | 158 | { |
159 | percpu_write(cpu_tlbstate.state, 0); | ||
160 | percpu_write(cpu_tlbstate.active_mm, &init_mm); | ||
163 | } | 161 | } |
164 | #endif | ||
165 | 162 | ||
166 | #endif /* SMP */ | 163 | #endif /* SMP */ |
167 | 164 | ||
168 | #ifndef CONFIG_PARAVIRT | 165 | #ifndef CONFIG_PARAVIRT |
169 | #define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va) | 166 | #define flush_tlb_others(mask, mm, va) native_flush_tlb_others(mask, mm, va) |
170 | #endif | 167 | #endif |
171 | 168 | ||
172 | static inline void flush_tlb_kernel_range(unsigned long start, | 169 | static inline void flush_tlb_kernel_range(unsigned long start, |
@@ -175,4 +172,6 @@ static inline void flush_tlb_kernel_range(unsigned long start, | |||
175 | flush_tlb_all(); | 172 | flush_tlb_all(); |
176 | } | 173 | } |
177 | 174 | ||
175 | extern void zap_low_mappings(void); | ||
176 | |||
178 | #endif /* _ASM_X86_TLBFLUSH_H */ | 177 | #endif /* _ASM_X86_TLBFLUSH_H */ |
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index 4e2f2e0aab27..77cfb2cfb386 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h | |||
@@ -74,6 +74,8 @@ static inline const struct cpumask *cpumask_of_node(int node) | |||
74 | return &node_to_cpumask_map[node]; | 74 | return &node_to_cpumask_map[node]; |
75 | } | 75 | } |
76 | 76 | ||
77 | static inline void setup_node_to_cpumask_map(void) { } | ||
78 | |||
77 | #else /* CONFIG_X86_64 */ | 79 | #else /* CONFIG_X86_64 */ |
78 | 80 | ||
79 | /* Mappings between node number and cpus on that node. */ | 81 | /* Mappings between node number and cpus on that node. */ |
@@ -83,7 +85,8 @@ extern cpumask_t *node_to_cpumask_map; | |||
83 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); | 85 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); |
84 | 86 | ||
85 | /* Returns the number of the current Node. */ | 87 | /* Returns the number of the current Node. */ |
86 | #define numa_node_id() read_pda(nodenumber) | 88 | DECLARE_PER_CPU(int, node_number); |
89 | #define numa_node_id() percpu_read(node_number) | ||
87 | 90 | ||
88 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | 91 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS |
89 | extern int cpu_to_node(int cpu); | 92 | extern int cpu_to_node(int cpu); |
@@ -102,10 +105,7 @@ static inline int cpu_to_node(int cpu) | |||
102 | /* Same function but used if called before per_cpu areas are setup */ | 105 | /* Same function but used if called before per_cpu areas are setup */ |
103 | static inline int early_cpu_to_node(int cpu) | 106 | static inline int early_cpu_to_node(int cpu) |
104 | { | 107 | { |
105 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) | 108 | return early_per_cpu(x86_cpu_to_node_map, cpu); |
106 | return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu]; | ||
107 | |||
108 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
109 | } | 109 | } |
110 | 110 | ||
111 | /* Returns a pointer to the cpumask of CPUs on Node 'node'. */ | 111 | /* Returns a pointer to the cpumask of CPUs on Node 'node'. */ |
@@ -122,6 +122,8 @@ static inline cpumask_t node_to_cpumask(int node) | |||
122 | 122 | ||
123 | #endif /* !CONFIG_DEBUG_PER_CPU_MAPS */ | 123 | #endif /* !CONFIG_DEBUG_PER_CPU_MAPS */ |
124 | 124 | ||
125 | extern void setup_node_to_cpumask_map(void); | ||
126 | |||
125 | /* | 127 | /* |
126 | * Replace default node_to_cpumask_ptr with optimized version | 128 | * Replace default node_to_cpumask_ptr with optimized version |
127 | * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)" | 129 | * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)" |
@@ -192,9 +194,20 @@ extern int __node_distance(int, int); | |||
192 | 194 | ||
193 | #else /* !CONFIG_NUMA */ | 195 | #else /* !CONFIG_NUMA */ |
194 | 196 | ||
195 | #define numa_node_id() 0 | 197 | static inline int numa_node_id(void) |
196 | #define cpu_to_node(cpu) 0 | 198 | { |
197 | #define early_cpu_to_node(cpu) 0 | 199 | return 0; |
200 | } | ||
201 | |||
202 | static inline int cpu_to_node(int cpu) | ||
203 | { | ||
204 | return 0; | ||
205 | } | ||
206 | |||
207 | static inline int early_cpu_to_node(int cpu) | ||
208 | { | ||
209 | return 0; | ||
210 | } | ||
198 | 211 | ||
199 | static inline const cpumask_t *cpumask_of_node(int node) | 212 | static inline const cpumask_t *cpumask_of_node(int node) |
200 | { | 213 | { |
@@ -209,6 +222,8 @@ static inline int node_to_first_cpu(int node) | |||
209 | return first_cpu(cpu_online_map); | 222 | return first_cpu(cpu_online_map); |
210 | } | 223 | } |
211 | 224 | ||
225 | static inline void setup_node_to_cpumask_map(void) { } | ||
226 | |||
212 | /* | 227 | /* |
213 | * Replace default node_to_cpumask_ptr with optimized version | 228 | * Replace default node_to_cpumask_ptr with optimized version |
214 | * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)" | 229 | * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)" |
diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h index 780ba0ab94f9..90f06c25221d 100644 --- a/arch/x86/include/asm/trampoline.h +++ b/arch/x86/include/asm/trampoline.h | |||
@@ -13,6 +13,7 @@ extern unsigned char *trampoline_base; | |||
13 | 13 | ||
14 | extern unsigned long init_rsp; | 14 | extern unsigned long init_rsp; |
15 | extern unsigned long initial_code; | 15 | extern unsigned long initial_code; |
16 | extern unsigned long initial_gs; | ||
16 | 17 | ||
17 | #define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE) | 18 | #define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE) |
18 | #define TRAMPOLINE_BASE 0x6000 | 19 | #define TRAMPOLINE_BASE 0x6000 |
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index cf3bb053da0b..0d5342515b86 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h | |||
@@ -41,7 +41,7 @@ dotraplinkage void do_int3(struct pt_regs *, long); | |||
41 | dotraplinkage void do_overflow(struct pt_regs *, long); | 41 | dotraplinkage void do_overflow(struct pt_regs *, long); |
42 | dotraplinkage void do_bounds(struct pt_regs *, long); | 42 | dotraplinkage void do_bounds(struct pt_regs *, long); |
43 | dotraplinkage void do_invalid_op(struct pt_regs *, long); | 43 | dotraplinkage void do_invalid_op(struct pt_regs *, long); |
44 | dotraplinkage void do_device_not_available(struct pt_regs); | 44 | dotraplinkage void do_device_not_available(struct pt_regs *, long); |
45 | dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long); | 45 | dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long); |
46 | dotraplinkage void do_invalid_TSS(struct pt_regs *, long); | 46 | dotraplinkage void do_invalid_TSS(struct pt_regs *, long); |
47 | dotraplinkage void do_segment_not_present(struct pt_regs *, long); | 47 | dotraplinkage void do_segment_not_present(struct pt_regs *, long); |
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h index 4340055b7559..b685ece89d5c 100644 --- a/arch/x86/include/asm/uaccess.h +++ b/arch/x86/include/asm/uaccess.h | |||
@@ -121,7 +121,7 @@ extern int __get_user_bad(void); | |||
121 | 121 | ||
122 | #define __get_user_x(size, ret, x, ptr) \ | 122 | #define __get_user_x(size, ret, x, ptr) \ |
123 | asm volatile("call __get_user_" #size \ | 123 | asm volatile("call __get_user_" #size \ |
124 | : "=a" (ret),"=d" (x) \ | 124 | : "=a" (ret), "=d" (x) \ |
125 | : "0" (ptr)) \ | 125 | : "0" (ptr)) \ |
126 | 126 | ||
127 | /* Careful: we have to cast the result to the type of the pointer | 127 | /* Careful: we have to cast the result to the type of the pointer |
@@ -181,12 +181,12 @@ extern int __get_user_bad(void); | |||
181 | 181 | ||
182 | #define __put_user_x(size, x, ptr, __ret_pu) \ | 182 | #define __put_user_x(size, x, ptr, __ret_pu) \ |
183 | asm volatile("call __put_user_" #size : "=a" (__ret_pu) \ | 183 | asm volatile("call __put_user_" #size : "=a" (__ret_pu) \ |
184 | :"0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") | 184 | : "0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") |
185 | 185 | ||
186 | 186 | ||
187 | 187 | ||
188 | #ifdef CONFIG_X86_32 | 188 | #ifdef CONFIG_X86_32 |
189 | #define __put_user_u64(x, addr, err) \ | 189 | #define __put_user_asm_u64(x, addr, err, errret) \ |
190 | asm volatile("1: movl %%eax,0(%2)\n" \ | 190 | asm volatile("1: movl %%eax,0(%2)\n" \ |
191 | "2: movl %%edx,4(%2)\n" \ | 191 | "2: movl %%edx,4(%2)\n" \ |
192 | "3:\n" \ | 192 | "3:\n" \ |
@@ -197,14 +197,24 @@ extern int __get_user_bad(void); | |||
197 | _ASM_EXTABLE(1b, 4b) \ | 197 | _ASM_EXTABLE(1b, 4b) \ |
198 | _ASM_EXTABLE(2b, 4b) \ | 198 | _ASM_EXTABLE(2b, 4b) \ |
199 | : "=r" (err) \ | 199 | : "=r" (err) \ |
200 | : "A" (x), "r" (addr), "i" (-EFAULT), "0" (err)) | 200 | : "A" (x), "r" (addr), "i" (errret), "0" (err)) |
201 | |||
202 | #define __put_user_asm_ex_u64(x, addr) \ | ||
203 | asm volatile("1: movl %%eax,0(%1)\n" \ | ||
204 | "2: movl %%edx,4(%1)\n" \ | ||
205 | "3:\n" \ | ||
206 | _ASM_EXTABLE(1b, 2b - 1b) \ | ||
207 | _ASM_EXTABLE(2b, 3b - 2b) \ | ||
208 | : : "A" (x), "r" (addr)) | ||
201 | 209 | ||
202 | #define __put_user_x8(x, ptr, __ret_pu) \ | 210 | #define __put_user_x8(x, ptr, __ret_pu) \ |
203 | asm volatile("call __put_user_8" : "=a" (__ret_pu) \ | 211 | asm volatile("call __put_user_8" : "=a" (__ret_pu) \ |
204 | : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") | 212 | : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") |
205 | #else | 213 | #else |
206 | #define __put_user_u64(x, ptr, retval) \ | 214 | #define __put_user_asm_u64(x, ptr, retval, errret) \ |
207 | __put_user_asm(x, ptr, retval, "q", "", "Zr", -EFAULT) | 215 | __put_user_asm(x, ptr, retval, "q", "", "Zr", errret) |
216 | #define __put_user_asm_ex_u64(x, addr) \ | ||
217 | __put_user_asm_ex(x, addr, "q", "", "Zr") | ||
208 | #define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu) | 218 | #define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu) |
209 | #endif | 219 | #endif |
210 | 220 | ||
@@ -276,10 +286,32 @@ do { \ | |||
276 | __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \ | 286 | __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \ |
277 | break; \ | 287 | break; \ |
278 | case 4: \ | 288 | case 4: \ |
279 | __put_user_asm(x, ptr, retval, "l", "k", "ir", errret);\ | 289 | __put_user_asm(x, ptr, retval, "l", "k", "ir", errret); \ |
280 | break; \ | 290 | break; \ |
281 | case 8: \ | 291 | case 8: \ |
282 | __put_user_u64((__typeof__(*ptr))(x), ptr, retval); \ | 292 | __put_user_asm_u64((__typeof__(*ptr))(x), ptr, retval, \ |
293 | errret); \ | ||
294 | break; \ | ||
295 | default: \ | ||
296 | __put_user_bad(); \ | ||
297 | } \ | ||
298 | } while (0) | ||
299 | |||
300 | #define __put_user_size_ex(x, ptr, size) \ | ||
301 | do { \ | ||
302 | __chk_user_ptr(ptr); \ | ||
303 | switch (size) { \ | ||
304 | case 1: \ | ||
305 | __put_user_asm_ex(x, ptr, "b", "b", "iq"); \ | ||
306 | break; \ | ||
307 | case 2: \ | ||
308 | __put_user_asm_ex(x, ptr, "w", "w", "ir"); \ | ||
309 | break; \ | ||
310 | case 4: \ | ||
311 | __put_user_asm_ex(x, ptr, "l", "k", "ir"); \ | ||
312 | break; \ | ||
313 | case 8: \ | ||
314 | __put_user_asm_ex_u64((__typeof__(*ptr))(x), ptr); \ | ||
283 | break; \ | 315 | break; \ |
284 | default: \ | 316 | default: \ |
285 | __put_user_bad(); \ | 317 | __put_user_bad(); \ |
@@ -311,9 +343,12 @@ do { \ | |||
311 | 343 | ||
312 | #ifdef CONFIG_X86_32 | 344 | #ifdef CONFIG_X86_32 |
313 | #define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad() | 345 | #define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad() |
346 | #define __get_user_asm_ex_u64(x, ptr) (x) = __get_user_bad() | ||
314 | #else | 347 | #else |
315 | #define __get_user_asm_u64(x, ptr, retval, errret) \ | 348 | #define __get_user_asm_u64(x, ptr, retval, errret) \ |
316 | __get_user_asm(x, ptr, retval, "q", "", "=r", errret) | 349 | __get_user_asm(x, ptr, retval, "q", "", "=r", errret) |
350 | #define __get_user_asm_ex_u64(x, ptr) \ | ||
351 | __get_user_asm_ex(x, ptr, "q", "", "=r") | ||
317 | #endif | 352 | #endif |
318 | 353 | ||
319 | #define __get_user_size(x, ptr, size, retval, errret) \ | 354 | #define __get_user_size(x, ptr, size, retval, errret) \ |
@@ -350,6 +385,33 @@ do { \ | |||
350 | : "=r" (err), ltype(x) \ | 385 | : "=r" (err), ltype(x) \ |
351 | : "m" (__m(addr)), "i" (errret), "0" (err)) | 386 | : "m" (__m(addr)), "i" (errret), "0" (err)) |
352 | 387 | ||
388 | #define __get_user_size_ex(x, ptr, size) \ | ||
389 | do { \ | ||
390 | __chk_user_ptr(ptr); \ | ||
391 | switch (size) { \ | ||
392 | case 1: \ | ||
393 | __get_user_asm_ex(x, ptr, "b", "b", "=q"); \ | ||
394 | break; \ | ||
395 | case 2: \ | ||
396 | __get_user_asm_ex(x, ptr, "w", "w", "=r"); \ | ||
397 | break; \ | ||
398 | case 4: \ | ||
399 | __get_user_asm_ex(x, ptr, "l", "k", "=r"); \ | ||
400 | break; \ | ||
401 | case 8: \ | ||
402 | __get_user_asm_ex_u64(x, ptr); \ | ||
403 | break; \ | ||
404 | default: \ | ||
405 | (x) = __get_user_bad(); \ | ||
406 | } \ | ||
407 | } while (0) | ||
408 | |||
409 | #define __get_user_asm_ex(x, addr, itype, rtype, ltype) \ | ||
410 | asm volatile("1: mov"itype" %1,%"rtype"0\n" \ | ||
411 | "2:\n" \ | ||
412 | _ASM_EXTABLE(1b, 2b - 1b) \ | ||
413 | : ltype(x) : "m" (__m(addr))) | ||
414 | |||
353 | #define __put_user_nocheck(x, ptr, size) \ | 415 | #define __put_user_nocheck(x, ptr, size) \ |
354 | ({ \ | 416 | ({ \ |
355 | int __pu_err; \ | 417 | int __pu_err; \ |
@@ -385,6 +447,26 @@ struct __large_struct { unsigned long buf[100]; }; | |||
385 | _ASM_EXTABLE(1b, 3b) \ | 447 | _ASM_EXTABLE(1b, 3b) \ |
386 | : "=r"(err) \ | 448 | : "=r"(err) \ |
387 | : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err)) | 449 | : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err)) |
450 | |||
451 | #define __put_user_asm_ex(x, addr, itype, rtype, ltype) \ | ||
452 | asm volatile("1: mov"itype" %"rtype"0,%1\n" \ | ||
453 | "2:\n" \ | ||
454 | _ASM_EXTABLE(1b, 2b - 1b) \ | ||
455 | : : ltype(x), "m" (__m(addr))) | ||
456 | |||
457 | /* | ||
458 | * uaccess_try and catch | ||
459 | */ | ||
460 | #define uaccess_try do { \ | ||
461 | int prev_err = current_thread_info()->uaccess_err; \ | ||
462 | current_thread_info()->uaccess_err = 0; \ | ||
463 | barrier(); | ||
464 | |||
465 | #define uaccess_catch(err) \ | ||
466 | (err) |= current_thread_info()->uaccess_err; \ | ||
467 | current_thread_info()->uaccess_err = prev_err; \ | ||
468 | } while (0) | ||
469 | |||
388 | /** | 470 | /** |
389 | * __get_user: - Get a simple variable from user space, with less checking. | 471 | * __get_user: - Get a simple variable from user space, with less checking. |
390 | * @x: Variable to store result. | 472 | * @x: Variable to store result. |
@@ -408,6 +490,7 @@ struct __large_struct { unsigned long buf[100]; }; | |||
408 | 490 | ||
409 | #define __get_user(x, ptr) \ | 491 | #define __get_user(x, ptr) \ |
410 | __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | 492 | __get_user_nocheck((x), (ptr), sizeof(*(ptr))) |
493 | |||
411 | /** | 494 | /** |
412 | * __put_user: - Write a simple value into user space, with less checking. | 495 | * __put_user: - Write a simple value into user space, with less checking. |
413 | * @x: Value to copy to user space. | 496 | * @x: Value to copy to user space. |
@@ -435,6 +518,45 @@ struct __large_struct { unsigned long buf[100]; }; | |||
435 | #define __put_user_unaligned __put_user | 518 | #define __put_user_unaligned __put_user |
436 | 519 | ||
437 | /* | 520 | /* |
521 | * {get|put}_user_try and catch | ||
522 | * | ||
523 | * get_user_try { | ||
524 | * get_user_ex(...); | ||
525 | * } get_user_catch(err) | ||
526 | */ | ||
527 | #define get_user_try uaccess_try | ||
528 | #define get_user_catch(err) uaccess_catch(err) | ||
529 | |||
530 | #define get_user_ex(x, ptr) do { \ | ||
531 | unsigned long __gue_val; \ | ||
532 | __get_user_size_ex((__gue_val), (ptr), (sizeof(*(ptr)))); \ | ||
533 | (x) = (__force __typeof__(*(ptr)))__gue_val; \ | ||
534 | } while (0) | ||
535 | |||
536 | #ifdef CONFIG_X86_WP_WORKS_OK | ||
537 | |||
538 | #define put_user_try uaccess_try | ||
539 | #define put_user_catch(err) uaccess_catch(err) | ||
540 | |||
541 | #define put_user_ex(x, ptr) \ | ||
542 | __put_user_size_ex((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) | ||
543 | |||
544 | #else /* !CONFIG_X86_WP_WORKS_OK */ | ||
545 | |||
546 | #define put_user_try do { \ | ||
547 | int __uaccess_err = 0; | ||
548 | |||
549 | #define put_user_catch(err) \ | ||
550 | (err) |= __uaccess_err; \ | ||
551 | } while (0) | ||
552 | |||
553 | #define put_user_ex(x, ptr) do { \ | ||
554 | __uaccess_err |= __put_user(x, ptr); \ | ||
555 | } while (0) | ||
556 | |||
557 | #endif /* CONFIG_X86_WP_WORKS_OK */ | ||
558 | |||
559 | /* | ||
438 | * movsl can be slow when source and dest are not both 8-byte aligned | 560 | * movsl can be slow when source and dest are not both 8-byte aligned |
439 | */ | 561 | */ |
440 | #ifdef CONFIG_X86_INTEL_USERCOPY | 562 | #ifdef CONFIG_X86_INTEL_USERCOPY |
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h index 84210c479fca..8cc687326eb8 100644 --- a/arch/x86/include/asm/uaccess_64.h +++ b/arch/x86/include/asm/uaccess_64.h | |||
@@ -188,16 +188,16 @@ __copy_to_user_inatomic(void __user *dst, const void *src, unsigned size) | |||
188 | extern long __copy_user_nocache(void *dst, const void __user *src, | 188 | extern long __copy_user_nocache(void *dst, const void __user *src, |
189 | unsigned size, int zerorest); | 189 | unsigned size, int zerorest); |
190 | 190 | ||
191 | static inline int __copy_from_user_nocache(void *dst, const void __user *src, | 191 | static inline int |
192 | unsigned size) | 192 | __copy_from_user_nocache(void *dst, const void __user *src, unsigned size) |
193 | { | 193 | { |
194 | might_sleep(); | 194 | might_sleep(); |
195 | return __copy_user_nocache(dst, src, size, 1); | 195 | return __copy_user_nocache(dst, src, size, 1); |
196 | } | 196 | } |
197 | 197 | ||
198 | static inline int __copy_from_user_inatomic_nocache(void *dst, | 198 | static inline int |
199 | const void __user *src, | 199 | __copy_from_user_inatomic_nocache(void *dst, const void __user *src, |
200 | unsigned size) | 200 | unsigned size) |
201 | { | 201 | { |
202 | return __copy_user_nocache(dst, src, size, 0); | 202 | return __copy_user_nocache(dst, src, size, 0); |
203 | } | 203 | } |
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h new file mode 100644 index 000000000000..c0a01b5d985b --- /dev/null +++ b/arch/x86/include/asm/uv/uv.h | |||
@@ -0,0 +1,33 @@ | |||
1 | #ifndef _ASM_X86_UV_UV_H | ||
2 | #define _ASM_X86_UV_UV_H | ||
3 | |||
4 | enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC}; | ||
5 | |||
6 | struct cpumask; | ||
7 | struct mm_struct; | ||
8 | |||
9 | #ifdef CONFIG_X86_UV | ||
10 | |||
11 | extern enum uv_system_type get_uv_system_type(void); | ||
12 | extern int is_uv_system(void); | ||
13 | extern void uv_cpu_init(void); | ||
14 | extern void uv_system_init(void); | ||
15 | extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask, | ||
16 | struct mm_struct *mm, | ||
17 | unsigned long va, | ||
18 | unsigned int cpu); | ||
19 | |||
20 | #else /* X86_UV */ | ||
21 | |||
22 | static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; } | ||
23 | static inline int is_uv_system(void) { return 0; } | ||
24 | static inline void uv_cpu_init(void) { } | ||
25 | static inline void uv_system_init(void) { } | ||
26 | static inline const struct cpumask * | ||
27 | uv_flush_tlb_others(const struct cpumask *cpumask, struct mm_struct *mm, | ||
28 | unsigned long va, unsigned int cpu) | ||
29 | { return cpumask; } | ||
30 | |||
31 | #endif /* X86_UV */ | ||
32 | |||
33 | #endif /* _ASM_X86_UV_UV_H */ | ||
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h index 50423c7b56b2..9b0e61bf7a88 100644 --- a/arch/x86/include/asm/uv/uv_bau.h +++ b/arch/x86/include/asm/uv/uv_bau.h | |||
@@ -325,7 +325,6 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits) | |||
325 | #define cpubit_isset(cpu, bau_local_cpumask) \ | 325 | #define cpubit_isset(cpu, bau_local_cpumask) \ |
326 | test_bit((cpu), (bau_local_cpumask).bits) | 326 | test_bit((cpu), (bau_local_cpumask).bits) |
327 | 327 | ||
328 | extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long); | ||
329 | extern void uv_bau_message_intr1(void); | 328 | extern void uv_bau_message_intr1(void); |
330 | extern void uv_bau_timeout_intr1(void); | 329 | extern void uv_bau_timeout_intr1(void); |
331 | 330 | ||
diff --git a/arch/x86/include/asm/vic.h b/arch/x86/include/asm/vic.h deleted file mode 100644 index 53100f353612..000000000000 --- a/arch/x86/include/asm/vic.h +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | /* Copyright (C) 1999,2001 | ||
2 | * | ||
3 | * Author: J.E.J.Bottomley@HansenPartnership.com | ||
4 | * | ||
5 | * Standard include definitions for the NCR Voyager Interrupt Controller */ | ||
6 | |||
7 | /* The eight CPI vectors. To activate a CPI, you write a bit mask | ||
8 | * corresponding to the processor set to be interrupted into the | ||
9 | * relevant register. That set of CPUs will then be interrupted with | ||
10 | * the CPI */ | ||
11 | static const int VIC_CPI_Registers[] = | ||
12 | {0xFC00, 0xFC01, 0xFC08, 0xFC09, | ||
13 | 0xFC10, 0xFC11, 0xFC18, 0xFC19 }; | ||
14 | |||
15 | #define VIC_PROC_WHO_AM_I 0xfc29 | ||
16 | # define QUAD_IDENTIFIER 0xC0 | ||
17 | # define EIGHT_SLOT_IDENTIFIER 0xE0 | ||
18 | #define QIC_EXTENDED_PROCESSOR_SELECT 0xFC72 | ||
19 | #define VIC_CPI_BASE_REGISTER 0xFC41 | ||
20 | #define VIC_PROCESSOR_ID 0xFC21 | ||
21 | # define VIC_CPU_MASQUERADE_ENABLE 0x8 | ||
22 | |||
23 | #define VIC_CLAIM_REGISTER_0 0xFC38 | ||
24 | #define VIC_CLAIM_REGISTER_1 0xFC39 | ||
25 | #define VIC_REDIRECT_REGISTER_0 0xFC60 | ||
26 | #define VIC_REDIRECT_REGISTER_1 0xFC61 | ||
27 | #define VIC_PRIORITY_REGISTER 0xFC20 | ||
28 | |||
29 | #define VIC_PRIMARY_MC_BASE 0xFC48 | ||
30 | #define VIC_SECONDARY_MC_BASE 0xFC49 | ||
31 | |||
32 | #define QIC_PROCESSOR_ID 0xFC71 | ||
33 | # define QIC_CPUID_ENABLE 0x08 | ||
34 | |||
35 | #define QIC_VIC_CPI_BASE_REGISTER 0xFC79 | ||
36 | #define QIC_CPI_BASE_REGISTER 0xFC7A | ||
37 | |||
38 | #define QIC_MASK_REGISTER0 0xFC80 | ||
39 | /* NOTE: these are masked high, enabled low */ | ||
40 | # define QIC_PERF_TIMER 0x01 | ||
41 | # define QIC_LPE 0x02 | ||
42 | # define QIC_SYS_INT 0x04 | ||
43 | # define QIC_CMN_INT 0x08 | ||
44 | /* at the moment, just enable CMN_INT, disable SYS_INT */ | ||
45 | # define QIC_DEFAULT_MASK0 (~(QIC_CMN_INT /* | VIC_SYS_INT */)) | ||
46 | #define QIC_MASK_REGISTER1 0xFC81 | ||
47 | # define QIC_BOOT_CPI_MASK 0xFE | ||
48 | /* Enable CPI's 1-6 inclusive */ | ||
49 | # define QIC_CPI_ENABLE 0x81 | ||
50 | |||
51 | #define QIC_INTERRUPT_CLEAR0 0xFC8A | ||
52 | #define QIC_INTERRUPT_CLEAR1 0xFC8B | ||
53 | |||
54 | /* this is where we place the CPI vectors */ | ||
55 | #define VIC_DEFAULT_CPI_BASE 0xC0 | ||
56 | /* this is where we place the QIC CPI vectors */ | ||
57 | #define QIC_DEFAULT_CPI_BASE 0xD0 | ||
58 | |||
59 | #define VIC_BOOT_INTERRUPT_MASK 0xfe | ||
60 | |||
61 | extern void smp_vic_timer_interrupt(void); | ||
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h deleted file mode 100644 index b3e647307625..000000000000 --- a/arch/x86/include/asm/voyager.h +++ /dev/null | |||
@@ -1,529 +0,0 @@ | |||
1 | /* Copyright (C) 1999,2001 | ||
2 | * | ||
3 | * Author: J.E.J.Bottomley@HansenPartnership.com | ||
4 | * | ||
5 | * Standard include definitions for the NCR Voyager system */ | ||
6 | |||
7 | #undef VOYAGER_DEBUG | ||
8 | #undef VOYAGER_CAT_DEBUG | ||
9 | |||
10 | #ifdef VOYAGER_DEBUG | ||
11 | #define VDEBUG(x) printk x | ||
12 | #else | ||
13 | #define VDEBUG(x) | ||
14 | #endif | ||
15 | |||
16 | /* There are three levels of voyager machine: 3,4 and 5. The rule is | ||
17 | * if it's less than 3435 it's a Level 3 except for a 3360 which is | ||
18 | * a level 4. A 3435 or above is a Level 5 */ | ||
19 | #define VOYAGER_LEVEL5_AND_ABOVE 0x3435 | ||
20 | #define VOYAGER_LEVEL4 0x3360 | ||
21 | |||
22 | /* The L4 DINO ASIC */ | ||
23 | #define VOYAGER_DINO 0x43 | ||
24 | |||
25 | /* voyager ports in standard I/O space */ | ||
26 | #define VOYAGER_MC_SETUP 0x96 | ||
27 | |||
28 | |||
29 | #define VOYAGER_CAT_CONFIG_PORT 0x97 | ||
30 | # define VOYAGER_CAT_DESELECT 0xff | ||
31 | #define VOYAGER_SSPB_RELOCATION_PORT 0x98 | ||
32 | |||
33 | /* Valid CAT controller commands */ | ||
34 | /* start instruction register cycle */ | ||
35 | #define VOYAGER_CAT_IRCYC 0x01 | ||
36 | /* start data register cycle */ | ||
37 | #define VOYAGER_CAT_DRCYC 0x02 | ||
38 | /* move to execute state */ | ||
39 | #define VOYAGER_CAT_RUN 0x0F | ||
40 | /* end operation */ | ||
41 | #define VOYAGER_CAT_END 0x80 | ||
42 | /* hold in idle state */ | ||
43 | #define VOYAGER_CAT_HOLD 0x90 | ||
44 | /* single step an "intest" vector */ | ||
45 | #define VOYAGER_CAT_STEP 0xE0 | ||
46 | /* return cat controller to CLEMSON mode */ | ||
47 | #define VOYAGER_CAT_CLEMSON 0xFF | ||
48 | |||
49 | /* the default cat command header */ | ||
50 | #define VOYAGER_CAT_HEADER 0x7F | ||
51 | |||
52 | /* the range of possible CAT module ids in the system */ | ||
53 | #define VOYAGER_MIN_MODULE 0x10 | ||
54 | #define VOYAGER_MAX_MODULE 0x1f | ||
55 | |||
56 | /* The voyager registers per asic */ | ||
57 | #define VOYAGER_ASIC_ID_REG 0x00 | ||
58 | #define VOYAGER_ASIC_TYPE_REG 0x01 | ||
59 | /* the sub address registers can be made auto incrementing on reads */ | ||
60 | #define VOYAGER_AUTO_INC_REG 0x02 | ||
61 | # define VOYAGER_AUTO_INC 0x04 | ||
62 | # define VOYAGER_NO_AUTO_INC 0xfb | ||
63 | #define VOYAGER_SUBADDRDATA 0x03 | ||
64 | #define VOYAGER_SCANPATH 0x05 | ||
65 | # define VOYAGER_CONNECT_ASIC 0x01 | ||
66 | # define VOYAGER_DISCONNECT_ASIC 0xfe | ||
67 | #define VOYAGER_SUBADDRLO 0x06 | ||
68 | #define VOYAGER_SUBADDRHI 0x07 | ||
69 | #define VOYAGER_SUBMODSELECT 0x08 | ||
70 | #define VOYAGER_SUBMODPRESENT 0x09 | ||
71 | |||
72 | #define VOYAGER_SUBADDR_LO 0xff | ||
73 | #define VOYAGER_SUBADDR_HI 0xffff | ||
74 | |||
75 | /* the maximum size of a scan path -- used to form instructions */ | ||
76 | #define VOYAGER_MAX_SCAN_PATH 0x100 | ||
77 | /* the biggest possible register size (in bytes) */ | ||
78 | #define VOYAGER_MAX_REG_SIZE 4 | ||
79 | |||
80 | /* Total number of possible modules (including submodules) */ | ||
81 | #define VOYAGER_MAX_MODULES 16 | ||
82 | /* Largest number of asics per module */ | ||
83 | #define VOYAGER_MAX_ASICS_PER_MODULE 7 | ||
84 | |||
85 | /* the CAT asic of each module is always the first one */ | ||
86 | #define VOYAGER_CAT_ID 0 | ||
87 | #define VOYAGER_PSI 0x1a | ||
88 | |||
89 | /* voyager instruction operations and registers */ | ||
90 | #define VOYAGER_READ_CONFIG 0x1 | ||
91 | #define VOYAGER_WRITE_CONFIG 0x2 | ||
92 | #define VOYAGER_BYPASS 0xff | ||
93 | |||
94 | typedef struct voyager_asic { | ||
95 | __u8 asic_addr; /* ASIC address; Level 4 */ | ||
96 | __u8 asic_type; /* ASIC type */ | ||
97 | __u8 asic_id; /* ASIC id */ | ||
98 | __u8 jtag_id[4]; /* JTAG id */ | ||
99 | __u8 asic_location; /* Location within scan path; start w/ 0 */ | ||
100 | __u8 bit_location; /* Location within bit stream; start w/ 0 */ | ||
101 | __u8 ireg_length; /* Instruction register length */ | ||
102 | __u16 subaddr; /* Amount of sub address space */ | ||
103 | struct voyager_asic *next; /* Next asic in linked list */ | ||
104 | } voyager_asic_t; | ||
105 | |||
106 | typedef struct voyager_module { | ||
107 | __u8 module_addr; /* Module address */ | ||
108 | __u8 scan_path_connected; /* Scan path connected */ | ||
109 | __u16 ee_size; /* Size of the EEPROM */ | ||
110 | __u16 num_asics; /* Number of Asics */ | ||
111 | __u16 inst_bits; /* Instruction bits in the scan path */ | ||
112 | __u16 largest_reg; /* Largest register in the scan path */ | ||
113 | __u16 smallest_reg; /* Smallest register in the scan path */ | ||
114 | voyager_asic_t *asic; /* First ASIC in scan path (CAT_I) */ | ||
115 | struct voyager_module *submodule; /* Submodule pointer */ | ||
116 | struct voyager_module *next; /* Next module in linked list */ | ||
117 | } voyager_module_t; | ||
118 | |||
119 | typedef struct voyager_eeprom_hdr { | ||
120 | __u8 module_id[4]; | ||
121 | __u8 version_id; | ||
122 | __u8 config_id; | ||
123 | __u16 boundry_id; /* boundary scan id */ | ||
124 | __u16 ee_size; /* size of EEPROM */ | ||
125 | __u8 assembly[11]; /* assembly # */ | ||
126 | __u8 assembly_rev; /* assembly rev */ | ||
127 | __u8 tracer[4]; /* tracer number */ | ||
128 | __u16 assembly_cksum; /* asm checksum */ | ||
129 | __u16 power_consump; /* pwr requirements */ | ||
130 | __u16 num_asics; /* number of asics */ | ||
131 | __u16 bist_time; /* min. bist time */ | ||
132 | __u16 err_log_offset; /* error log offset */ | ||
133 | __u16 scan_path_offset;/* scan path offset */ | ||
134 | __u16 cct_offset; | ||
135 | __u16 log_length; /* length of err log */ | ||
136 | __u16 xsum_end; /* offset to end of | ||
137 | checksum */ | ||
138 | __u8 reserved[4]; | ||
139 | __u8 sflag; /* starting sentinal */ | ||
140 | __u8 part_number[13]; /* prom part number */ | ||
141 | __u8 version[10]; /* version number */ | ||
142 | __u8 signature[8]; | ||
143 | __u16 eeprom_chksum; | ||
144 | __u32 data_stamp_offset; | ||
145 | __u8 eflag ; /* ending sentinal */ | ||
146 | } __attribute__((packed)) voyager_eprom_hdr_t; | ||
147 | |||
148 | |||
149 | |||
150 | #define VOYAGER_EPROM_SIZE_OFFSET \ | ||
151 | ((__u16)(&(((voyager_eprom_hdr_t *)0)->ee_size))) | ||
152 | #define VOYAGER_XSUM_END_OFFSET 0x2a | ||
153 | |||
154 | /* the following three definitions are for internal table layouts | ||
155 | * in the module EPROMs. We really only care about the IDs and | ||
156 | * offsets */ | ||
157 | typedef struct voyager_sp_table { | ||
158 | __u8 asic_id; | ||
159 | __u8 bypass_flag; | ||
160 | __u16 asic_data_offset; | ||
161 | __u16 config_data_offset; | ||
162 | } __attribute__((packed)) voyager_sp_table_t; | ||
163 | |||
164 | typedef struct voyager_jtag_table { | ||
165 | __u8 icode[4]; | ||
166 | __u8 runbist[4]; | ||
167 | __u8 intest[4]; | ||
168 | __u8 samp_preld[4]; | ||
169 | __u8 ireg_len; | ||
170 | } __attribute__((packed)) voyager_jtt_t; | ||
171 | |||
172 | typedef struct voyager_asic_data_table { | ||
173 | __u8 jtag_id[4]; | ||
174 | __u16 length_bsr; | ||
175 | __u16 length_bist_reg; | ||
176 | __u32 bist_clk; | ||
177 | __u16 subaddr_bits; | ||
178 | __u16 seed_bits; | ||
179 | __u16 sig_bits; | ||
180 | __u16 jtag_offset; | ||
181 | } __attribute__((packed)) voyager_at_t; | ||
182 | |||
183 | /* Voyager Interrupt Controller (VIC) registers */ | ||
184 | |||
185 | /* Base to add to Cross Processor Interrupts (CPIs) when triggering | ||
186 | * the CPU IRQ line */ | ||
187 | /* register defines for the WCBICs (one per processor) */ | ||
188 | #define VOYAGER_WCBIC0 0x41 /* bus A node P1 processor 0 */ | ||
189 | #define VOYAGER_WCBIC1 0x49 /* bus A node P1 processor 1 */ | ||
190 | #define VOYAGER_WCBIC2 0x51 /* bus A node P2 processor 0 */ | ||
191 | #define VOYAGER_WCBIC3 0x59 /* bus A node P2 processor 1 */ | ||
192 | #define VOYAGER_WCBIC4 0x61 /* bus B node P1 processor 0 */ | ||
193 | #define VOYAGER_WCBIC5 0x69 /* bus B node P1 processor 1 */ | ||
194 | #define VOYAGER_WCBIC6 0x71 /* bus B node P2 processor 0 */ | ||
195 | #define VOYAGER_WCBIC7 0x79 /* bus B node P2 processor 1 */ | ||
196 | |||
197 | |||
198 | /* top of memory registers */ | ||
199 | #define VOYAGER_WCBIC_TOM_L 0x4 | ||
200 | #define VOYAGER_WCBIC_TOM_H 0x5 | ||
201 | |||
202 | /* register defines for Voyager Memory Contol (VMC) | ||
203 | * these are present on L4 machines only */ | ||
204 | #define VOYAGER_VMC1 0x81 | ||
205 | #define VOYAGER_VMC2 0x91 | ||
206 | #define VOYAGER_VMC3 0xa1 | ||
207 | #define VOYAGER_VMC4 0xb1 | ||
208 | |||
209 | /* VMC Ports */ | ||
210 | #define VOYAGER_VMC_MEMORY_SETUP 0x9 | ||
211 | # define VMC_Interleaving 0x01 | ||
212 | # define VMC_4Way 0x02 | ||
213 | # define VMC_EvenCacheLines 0x04 | ||
214 | # define VMC_HighLine 0x08 | ||
215 | # define VMC_Start0_Enable 0x20 | ||
216 | # define VMC_Start1_Enable 0x40 | ||
217 | # define VMC_Vremap 0x80 | ||
218 | #define VOYAGER_VMC_BANK_DENSITY 0xa | ||
219 | # define VMC_BANK_EMPTY 0 | ||
220 | # define VMC_BANK_4MB 1 | ||
221 | # define VMC_BANK_16MB 2 | ||
222 | # define VMC_BANK_64MB 3 | ||
223 | # define VMC_BANK0_MASK 0x03 | ||
224 | # define VMC_BANK1_MASK 0x0C | ||
225 | # define VMC_BANK2_MASK 0x30 | ||
226 | # define VMC_BANK3_MASK 0xC0 | ||
227 | |||
228 | /* Magellan Memory Controller (MMC) defines - present on L5 */ | ||
229 | #define VOYAGER_MMC_ASIC_ID 1 | ||
230 | /* the two memory modules corresponding to memory cards in the system */ | ||
231 | #define VOYAGER_MMC_MEMORY0_MODULE 0x14 | ||
232 | #define VOYAGER_MMC_MEMORY1_MODULE 0x15 | ||
233 | /* the Magellan Memory Address (MMA) defines */ | ||
234 | #define VOYAGER_MMA_ASIC_ID 2 | ||
235 | |||
236 | /* Submodule number for the Quad Baseboard */ | ||
237 | #define VOYAGER_QUAD_BASEBOARD 1 | ||
238 | |||
239 | /* ASIC defines for the Quad Baseboard */ | ||
240 | #define VOYAGER_QUAD_QDATA0 1 | ||
241 | #define VOYAGER_QUAD_QDATA1 2 | ||
242 | #define VOYAGER_QUAD_QABC 3 | ||
243 | |||
244 | /* Useful areas in extended CMOS */ | ||
245 | #define VOYAGER_PROCESSOR_PRESENT_MASK 0x88a | ||
246 | #define VOYAGER_MEMORY_CLICKMAP 0xa23 | ||
247 | #define VOYAGER_DUMP_LOCATION 0xb1a | ||
248 | |||
249 | /* SUS In Control bit - used to tell SUS that we don't need to be | ||
250 | * babysat anymore */ | ||
251 | #define VOYAGER_SUS_IN_CONTROL_PORT 0x3ff | ||
252 | # define VOYAGER_IN_CONTROL_FLAG 0x80 | ||
253 | |||
254 | /* Voyager PSI defines */ | ||
255 | #define VOYAGER_PSI_STATUS_REG 0x08 | ||
256 | # define PSI_DC_FAIL 0x01 | ||
257 | # define PSI_MON 0x02 | ||
258 | # define PSI_FAULT 0x04 | ||
259 | # define PSI_ALARM 0x08 | ||
260 | # define PSI_CURRENT 0x10 | ||
261 | # define PSI_DVM 0x20 | ||
262 | # define PSI_PSCFAULT 0x40 | ||
263 | # define PSI_STAT_CHG 0x80 | ||
264 | |||
265 | #define VOYAGER_PSI_SUPPLY_REG 0x8000 | ||
266 | /* read */ | ||
267 | # define PSI_FAIL_DC 0x01 | ||
268 | # define PSI_FAIL_AC 0x02 | ||
269 | # define PSI_MON_INT 0x04 | ||
270 | # define PSI_SWITCH_OFF 0x08 | ||
271 | # define PSI_HX_OFF 0x10 | ||
272 | # define PSI_SECURITY 0x20 | ||
273 | # define PSI_CMOS_BATT_LOW 0x40 | ||
274 | # define PSI_CMOS_BATT_FAIL 0x80 | ||
275 | /* write */ | ||
276 | # define PSI_CLR_SWITCH_OFF 0x13 | ||
277 | # define PSI_CLR_HX_OFF 0x14 | ||
278 | # define PSI_CLR_CMOS_BATT_FAIL 0x17 | ||
279 | |||
280 | #define VOYAGER_PSI_MASK 0x8001 | ||
281 | # define PSI_MASK_MASK 0x10 | ||
282 | |||
283 | #define VOYAGER_PSI_AC_FAIL_REG 0x8004 | ||
284 | #define AC_FAIL_STAT_CHANGE 0x80 | ||
285 | |||
286 | #define VOYAGER_PSI_GENERAL_REG 0x8007 | ||
287 | /* read */ | ||
288 | # define PSI_SWITCH_ON 0x01 | ||
289 | # define PSI_SWITCH_ENABLED 0x02 | ||
290 | # define PSI_ALARM_ENABLED 0x08 | ||
291 | # define PSI_SECURE_ENABLED 0x10 | ||
292 | # define PSI_COLD_RESET 0x20 | ||
293 | # define PSI_COLD_START 0x80 | ||
294 | /* write */ | ||
295 | # define PSI_POWER_DOWN 0x10 | ||
296 | # define PSI_SWITCH_DISABLE 0x01 | ||
297 | # define PSI_SWITCH_ENABLE 0x11 | ||
298 | # define PSI_CLEAR 0x12 | ||
299 | # define PSI_ALARM_DISABLE 0x03 | ||
300 | # define PSI_ALARM_ENABLE 0x13 | ||
301 | # define PSI_CLEAR_COLD_RESET 0x05 | ||
302 | # define PSI_SET_COLD_RESET 0x15 | ||
303 | # define PSI_CLEAR_COLD_START 0x07 | ||
304 | # define PSI_SET_COLD_START 0x17 | ||
305 | |||
306 | |||
307 | |||
308 | struct voyager_bios_info { | ||
309 | __u8 len; | ||
310 | __u8 major; | ||
311 | __u8 minor; | ||
312 | __u8 debug; | ||
313 | __u8 num_classes; | ||
314 | __u8 class_1; | ||
315 | __u8 class_2; | ||
316 | }; | ||
317 | |||
318 | /* The following structures and definitions are for the Kernel/SUS | ||
319 | * interface these are needed to find out how SUS initialised any Quad | ||
320 | * boards in the system */ | ||
321 | |||
322 | #define NUMBER_OF_MC_BUSSES 2 | ||
323 | #define SLOTS_PER_MC_BUS 8 | ||
324 | #define MAX_CPUS 16 /* 16 way CPU system */ | ||
325 | #define MAX_PROCESSOR_BOARDS 4 /* 4 processor slot system */ | ||
326 | #define MAX_CACHE_LEVELS 4 /* # of cache levels supported */ | ||
327 | #define MAX_SHARED_CPUS 4 /* # of CPUs that can share a LARC */ | ||
328 | #define NUMBER_OF_POS_REGS 8 | ||
329 | |||
330 | typedef struct { | ||
331 | __u8 MC_Slot; | ||
332 | __u8 POS_Values[NUMBER_OF_POS_REGS]; | ||
333 | } __attribute__((packed)) MC_SlotInformation_t; | ||
334 | |||
335 | struct QuadDescription { | ||
336 | __u8 Type; /* for type 0 (DYADIC or MONADIC) all fields | ||
337 | * will be zero except for slot */ | ||
338 | __u8 StructureVersion; | ||
339 | __u32 CPI_BaseAddress; | ||
340 | __u32 LARC_BankSize; | ||
341 | __u32 LocalMemoryStateBits; | ||
342 | __u8 Slot; /* Processor slots 1 - 4 */ | ||
343 | } __attribute__((packed)); | ||
344 | |||
345 | struct ProcBoardInfo { | ||
346 | __u8 Type; | ||
347 | __u8 StructureVersion; | ||
348 | __u8 NumberOfBoards; | ||
349 | struct QuadDescription QuadData[MAX_PROCESSOR_BOARDS]; | ||
350 | } __attribute__((packed)); | ||
351 | |||
352 | struct CacheDescription { | ||
353 | __u8 Level; | ||
354 | __u32 TotalSize; | ||
355 | __u16 LineSize; | ||
356 | __u8 Associativity; | ||
357 | __u8 CacheType; | ||
358 | __u8 WriteType; | ||
359 | __u8 Number_CPUs_SharedBy; | ||
360 | __u8 Shared_CPUs_Hardware_IDs[MAX_SHARED_CPUS]; | ||
361 | |||
362 | } __attribute__((packed)); | ||
363 | |||
364 | struct CPU_Description { | ||
365 | __u8 CPU_HardwareId; | ||
366 | char *FRU_String; | ||
367 | __u8 NumberOfCacheLevels; | ||
368 | struct CacheDescription CacheLevelData[MAX_CACHE_LEVELS]; | ||
369 | } __attribute__((packed)); | ||
370 | |||
371 | struct CPU_Info { | ||
372 | __u8 Type; | ||
373 | __u8 StructureVersion; | ||
374 | __u8 NumberOf_CPUs; | ||
375 | struct CPU_Description CPU_Data[MAX_CPUS]; | ||
376 | } __attribute__((packed)); | ||
377 | |||
378 | |||
379 | /* | ||
380 | * This structure will be used by SUS and the OS. | ||
381 | * The assumption about this structure is that no blank space is | ||
382 | * packed in it by our friend the compiler. | ||
383 | */ | ||
384 | typedef struct { | ||
385 | __u8 Mailbox_SUS; /* Written to by SUS to give | ||
386 | commands/response to the OS */ | ||
387 | __u8 Mailbox_OS; /* Written to by the OS to give | ||
388 | commands/response to SUS */ | ||
389 | __u8 SUS_MailboxVersion; /* Tells the OS which iteration of the | ||
390 | interface SUS supports */ | ||
391 | __u8 OS_MailboxVersion; /* Tells SUS which iteration of the | ||
392 | interface the OS supports */ | ||
393 | __u32 OS_Flags; /* Flags set by the OS as info for | ||
394 | SUS */ | ||
395 | __u32 SUS_Flags; /* Flags set by SUS as info | ||
396 | for the OS */ | ||
397 | __u32 WatchDogPeriod; /* Watchdog period (in seconds) which | ||
398 | the DP uses to see if the OS | ||
399 | is dead */ | ||
400 | __u32 WatchDogCount; /* Updated by the OS on every tic. */ | ||
401 | __u32 MemoryFor_SUS_ErrorLog; /* Flat 32 bit address which tells SUS | ||
402 | where to stuff the SUS error log | ||
403 | on a dump */ | ||
404 | MC_SlotInformation_t MC_SlotInfo[NUMBER_OF_MC_BUSSES*SLOTS_PER_MC_BUS]; | ||
405 | /* Storage for MCA POS data */ | ||
406 | /* All new SECOND_PASS_INTERFACE fields added from this point */ | ||
407 | struct ProcBoardInfo *BoardData; | ||
408 | struct CPU_Info *CPU_Data; | ||
409 | /* All new fields must be added from this point */ | ||
410 | } Voyager_KernelSUS_Mbox_t; | ||
411 | |||
412 | /* structure for finding the right memory address to send a QIC CPI to */ | ||
413 | struct voyager_qic_cpi { | ||
414 | /* Each cache line (32 bytes) can trigger a cpi. The cpi | ||
415 | * read/write may occur anywhere in the cache line---pick the | ||
416 | * middle to be safe */ | ||
417 | struct { | ||
418 | __u32 pad1[3]; | ||
419 | __u32 cpi; | ||
420 | __u32 pad2[4]; | ||
421 | } qic_cpi[8]; | ||
422 | }; | ||
423 | |||
424 | struct voyager_status { | ||
425 | __u32 power_fail:1; | ||
426 | __u32 switch_off:1; | ||
427 | __u32 request_from_kernel:1; | ||
428 | }; | ||
429 | |||
430 | struct voyager_psi_regs { | ||
431 | __u8 cat_id; | ||
432 | __u8 cat_dev; | ||
433 | __u8 cat_control; | ||
434 | __u8 subaddr; | ||
435 | __u8 dummy4; | ||
436 | __u8 checkbit; | ||
437 | __u8 subaddr_low; | ||
438 | __u8 subaddr_high; | ||
439 | __u8 intstatus; | ||
440 | __u8 stat1; | ||
441 | __u8 stat3; | ||
442 | __u8 fault; | ||
443 | __u8 tms; | ||
444 | __u8 gen; | ||
445 | __u8 sysconf; | ||
446 | __u8 dummy15; | ||
447 | }; | ||
448 | |||
449 | struct voyager_psi_subregs { | ||
450 | __u8 supply; | ||
451 | __u8 mask; | ||
452 | __u8 present; | ||
453 | __u8 DCfail; | ||
454 | __u8 ACfail; | ||
455 | __u8 fail; | ||
456 | __u8 UPSfail; | ||
457 | __u8 genstatus; | ||
458 | }; | ||
459 | |||
460 | struct voyager_psi { | ||
461 | struct voyager_psi_regs regs; | ||
462 | struct voyager_psi_subregs subregs; | ||
463 | }; | ||
464 | |||
465 | struct voyager_SUS { | ||
466 | #define VOYAGER_DUMP_BUTTON_NMI 0x1 | ||
467 | #define VOYAGER_SUS_VALID 0x2 | ||
468 | #define VOYAGER_SYSINT_COMPLETE 0x3 | ||
469 | __u8 SUS_mbox; | ||
470 | #define VOYAGER_NO_COMMAND 0x0 | ||
471 | #define VOYAGER_IGNORE_DUMP 0x1 | ||
472 | #define VOYAGER_DO_DUMP 0x2 | ||
473 | #define VOYAGER_SYSINT_HANDSHAKE 0x3 | ||
474 | #define VOYAGER_DO_MEM_DUMP 0x4 | ||
475 | #define VOYAGER_SYSINT_WAS_RECOVERED 0x5 | ||
476 | __u8 kernel_mbox; | ||
477 | #define VOYAGER_MAILBOX_VERSION 0x10 | ||
478 | __u8 SUS_version; | ||
479 | __u8 kernel_version; | ||
480 | #define VOYAGER_OS_HAS_SYSINT 0x1 | ||
481 | #define VOYAGER_OS_IN_PROGRESS 0x2 | ||
482 | #define VOYAGER_UPDATING_WDPERIOD 0x4 | ||
483 | __u32 kernel_flags; | ||
484 | #define VOYAGER_SUS_BOOTING 0x1 | ||
485 | #define VOYAGER_SUS_IN_PROGRESS 0x2 | ||
486 | __u32 SUS_flags; | ||
487 | __u32 watchdog_period; | ||
488 | __u32 watchdog_count; | ||
489 | __u32 SUS_errorlog; | ||
490 | /* lots of system configuration stuff under here */ | ||
491 | }; | ||
492 | |||
493 | /* Variables exported by voyager_smp */ | ||
494 | extern __u32 voyager_extended_vic_processors; | ||
495 | extern __u32 voyager_allowed_boot_processors; | ||
496 | extern __u32 voyager_quad_processors; | ||
497 | extern struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS]; | ||
498 | extern struct voyager_SUS *voyager_SUS; | ||
499 | |||
500 | /* variables exported always */ | ||
501 | extern struct task_struct *voyager_thread; | ||
502 | extern int voyager_level; | ||
503 | extern struct voyager_status voyager_status; | ||
504 | |||
505 | /* functions exported by the voyager and voyager_smp modules */ | ||
506 | extern int voyager_cat_readb(__u8 module, __u8 asic, int reg); | ||
507 | extern void voyager_cat_init(void); | ||
508 | extern void voyager_detect(struct voyager_bios_info *); | ||
509 | extern void voyager_trap_init(void); | ||
510 | extern void voyager_setup_irqs(void); | ||
511 | extern int voyager_memory_detect(int region, __u32 *addr, __u32 *length); | ||
512 | extern void voyager_smp_intr_init(void); | ||
513 | extern __u8 voyager_extended_cmos_read(__u16 cmos_address); | ||
514 | extern void voyager_smp_dump(void); | ||
515 | extern void voyager_timer_interrupt(void); | ||
516 | extern void smp_local_timer_interrupt(void); | ||
517 | extern void voyager_power_off(void); | ||
518 | extern void smp_voyager_power_off(void *dummy); | ||
519 | extern void voyager_restart(void); | ||
520 | extern void voyager_cat_power_off(void); | ||
521 | extern void voyager_cat_do_common_interrupt(void); | ||
522 | extern void voyager_handle_nmi(void); | ||
523 | extern void voyager_smp_intr_init(void); | ||
524 | /* Commands for the following are */ | ||
525 | #define VOYAGER_PSI_READ 0 | ||
526 | #define VOYAGER_PSI_WRITE 1 | ||
527 | #define VOYAGER_PSI_SUBREAD 2 | ||
528 | #define VOYAGER_PSI_SUBWRITE 3 | ||
529 | extern void voyager_cat_psi(__u8, __u16, __u8 *); | ||
diff --git a/arch/x86/include/asm/xen/events.h b/arch/x86/include/asm/xen/events.h index 19144184983a..1df35417c412 100644 --- a/arch/x86/include/asm/xen/events.h +++ b/arch/x86/include/asm/xen/events.h | |||
@@ -15,10 +15,4 @@ static inline int xen_irqs_disabled(struct pt_regs *regs) | |||
15 | return raw_irqs_disabled_flags(regs->flags); | 15 | return raw_irqs_disabled_flags(regs->flags); |
16 | } | 16 | } |
17 | 17 | ||
18 | static inline void xen_do_IRQ(int irq, struct pt_regs *regs) | ||
19 | { | ||
20 | regs->orig_ax = ~irq; | ||
21 | do_IRQ(regs); | ||
22 | } | ||
23 | |||
24 | #endif /* _ASM_X86_XEN_EVENTS_H */ | 18 | #endif /* _ASM_X86_XEN_EVENTS_H */ |
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h index 81fbd735aec4..d5b7e90c0edf 100644 --- a/arch/x86/include/asm/xen/hypervisor.h +++ b/arch/x86/include/asm/xen/hypervisor.h | |||
@@ -38,22 +38,30 @@ extern struct shared_info *HYPERVISOR_shared_info; | |||
38 | extern struct start_info *xen_start_info; | 38 | extern struct start_info *xen_start_info; |
39 | 39 | ||
40 | enum xen_domain_type { | 40 | enum xen_domain_type { |
41 | XEN_NATIVE, | 41 | XEN_NATIVE, /* running on bare hardware */ |
42 | XEN_PV_DOMAIN, | 42 | XEN_PV_DOMAIN, /* running in a PV domain */ |
43 | XEN_HVM_DOMAIN, | 43 | XEN_HVM_DOMAIN, /* running in a Xen hvm domain */ |
44 | }; | 44 | }; |
45 | 45 | ||
46 | extern enum xen_domain_type xen_domain_type; | ||
47 | |||
48 | #ifdef CONFIG_XEN | 46 | #ifdef CONFIG_XEN |
49 | #define xen_domain() (xen_domain_type != XEN_NATIVE) | 47 | extern enum xen_domain_type xen_domain_type; |
50 | #else | 48 | #else |
51 | #define xen_domain() (0) | 49 | #define xen_domain_type XEN_NATIVE |
52 | #endif | 50 | #endif |
53 | 51 | ||
54 | #define xen_pv_domain() (xen_domain() && xen_domain_type == XEN_PV_DOMAIN) | 52 | #define xen_domain() (xen_domain_type != XEN_NATIVE) |
55 | #define xen_hvm_domain() (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN) | 53 | #define xen_pv_domain() (xen_domain() && \ |
54 | xen_domain_type == XEN_PV_DOMAIN) | ||
55 | #define xen_hvm_domain() (xen_domain() && \ | ||
56 | xen_domain_type == XEN_HVM_DOMAIN) | ||
57 | |||
58 | #ifdef CONFIG_XEN_DOM0 | ||
59 | #include <xen/interface/xen.h> | ||
56 | 60 | ||
57 | #define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN) | 61 | #define xen_initial_domain() (xen_pv_domain() && \ |
62 | xen_start_info->flags & SIF_INITDOMAIN) | ||
63 | #else /* !CONFIG_XEN_DOM0 */ | ||
64 | #define xen_initial_domain() (0) | ||
65 | #endif /* CONFIG_XEN_DOM0 */ | ||
58 | 66 | ||
59 | #endif /* _ASM_X86_XEN_HYPERVISOR_H */ | 67 | #endif /* _ASM_X86_XEN_HYPERVISOR_H */ |
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h index 4bd990ee43df..1a918dde46b5 100644 --- a/arch/x86/include/asm/xen/page.h +++ b/arch/x86/include/asm/xen/page.h | |||
@@ -164,6 +164,7 @@ static inline pte_t __pte_ma(pteval_t x) | |||
164 | 164 | ||
165 | 165 | ||
166 | xmaddr_t arbitrary_virt_to_machine(void *address); | 166 | xmaddr_t arbitrary_virt_to_machine(void *address); |
167 | unsigned long arbitrary_virt_to_mfn(void *vaddr); | ||
167 | void make_lowmem_page_readonly(void *vaddr); | 168 | void make_lowmem_page_readonly(void *vaddr); |
168 | void make_lowmem_page_readwrite(void *vaddr); | 169 | void make_lowmem_page_readwrite(void *vaddr); |
169 | 170 | ||
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index d364df03c1d6..95f216bbfaf1 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile | |||
@@ -23,11 +23,12 @@ nostackp := $(call cc-option, -fno-stack-protector) | |||
23 | CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp) | 23 | CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp) |
24 | CFLAGS_hpet.o := $(nostackp) | 24 | CFLAGS_hpet.o := $(nostackp) |
25 | CFLAGS_tsc.o := $(nostackp) | 25 | CFLAGS_tsc.o := $(nostackp) |
26 | CFLAGS_paravirt.o := $(nostackp) | ||
26 | 27 | ||
27 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o | 28 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o |
28 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o | 29 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o |
29 | obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o | 30 | obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o |
30 | obj-y += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o | 31 | obj-y += setup.o i8259.o irqinit_$(BITS).o |
31 | obj-$(CONFIG_X86_VISWS) += visws_quirks.o | 32 | obj-$(CONFIG_X86_VISWS) += visws_quirks.o |
32 | obj-$(CONFIG_X86_32) += probe_roms_32.o | 33 | obj-$(CONFIG_X86_32) += probe_roms_32.o |
33 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o | 34 | obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o |
@@ -49,31 +50,27 @@ obj-y += step.o | |||
49 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | 50 | obj-$(CONFIG_STACKTRACE) += stacktrace.o |
50 | obj-y += cpu/ | 51 | obj-y += cpu/ |
51 | obj-y += acpi/ | 52 | obj-y += acpi/ |
52 | obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o | 53 | obj-y += reboot.o |
53 | obj-$(CONFIG_MCA) += mca_32.o | 54 | obj-$(CONFIG_MCA) += mca_32.o |
54 | obj-$(CONFIG_X86_MSR) += msr.o | 55 | obj-$(CONFIG_X86_MSR) += msr.o |
55 | obj-$(CONFIG_X86_CPUID) += cpuid.o | 56 | obj-$(CONFIG_X86_CPUID) += cpuid.o |
56 | obj-$(CONFIG_PCI) += early-quirks.o | 57 | obj-$(CONFIG_PCI) += early-quirks.o |
57 | apm-y := apm_32.o | 58 | apm-y := apm_32.o |
58 | obj-$(CONFIG_APM) += apm.o | 59 | obj-$(CONFIG_APM) += apm.o |
59 | obj-$(CONFIG_X86_SMP) += smp.o | 60 | obj-$(CONFIG_SMP) += smp.o |
60 | obj-$(CONFIG_X86_SMP) += smpboot.o tsc_sync.o ipi.o tlb_$(BITS).o | 61 | obj-$(CONFIG_SMP) += smpboot.o tsc_sync.o |
61 | obj-$(CONFIG_X86_32_SMP) += smpcommon.o | 62 | obj-$(CONFIG_SMP) += setup_percpu.o |
62 | obj-$(CONFIG_X86_64_SMP) += tsc_sync.o smpcommon.o | 63 | obj-$(CONFIG_X86_64_SMP) += tsc_sync.o |
63 | obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o | 64 | obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o |
64 | obj-$(CONFIG_X86_MPPARSE) += mpparse.o | 65 | obj-$(CONFIG_X86_MPPARSE) += mpparse.o |
65 | obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o | 66 | obj-y += apic/ |
66 | obj-$(CONFIG_X86_IO_APIC) += io_apic.o | ||
67 | obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o | 67 | obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o |
68 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o | 68 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o |
69 | obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o | 69 | obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o |
70 | obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o | 70 | obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o |
71 | obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o | 71 | obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o |
72 | obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o | 72 | obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o |
73 | obj-$(CONFIG_X86_NUMAQ) += numaq_32.o | 73 | obj-$(CONFIG_X86_VSMP) += vsmp_64.o |
74 | obj-$(CONFIG_X86_ES7000) += es7000_32.o | ||
75 | obj-$(CONFIG_X86_SUMMIT_NUMA) += summit_32.o | ||
76 | obj-y += vsmp_64.o | ||
77 | obj-$(CONFIG_KPROBES) += kprobes.o | 74 | obj-$(CONFIG_KPROBES) += kprobes.o |
78 | obj-$(CONFIG_MODULES) += module_$(BITS).o | 75 | obj-$(CONFIG_MODULES) += module_$(BITS).o |
79 | obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o | 76 | obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o |
@@ -114,16 +111,13 @@ obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o # NB rename without _64 | |||
114 | ### | 111 | ### |
115 | # 64 bit specific files | 112 | # 64 bit specific files |
116 | ifeq ($(CONFIG_X86_64),y) | 113 | ifeq ($(CONFIG_X86_64),y) |
117 | obj-y += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o | 114 | obj-$(CONFIG_X86_UV) += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o |
118 | obj-y += bios_uv.o uv_irq.o uv_sysfs.o | 115 | obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o |
119 | obj-y += genx2apic_cluster.o | 116 | obj-$(CONFIG_AUDIT) += audit_64.o |
120 | obj-y += genx2apic_phys.o | 117 | |
121 | obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o | 118 | obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o |
122 | obj-$(CONFIG_AUDIT) += audit_64.o | 119 | obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o |
123 | 120 | obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o | |
124 | obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o | 121 | |
125 | obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o | 122 | obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o |
126 | obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o | ||
127 | |||
128 | obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o | ||
129 | endif | 123 | endif |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 7678f10c4568..a18eb7ce2236 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
@@ -37,15 +37,10 @@ | |||
37 | #include <asm/pgtable.h> | 37 | #include <asm/pgtable.h> |
38 | #include <asm/io_apic.h> | 38 | #include <asm/io_apic.h> |
39 | #include <asm/apic.h> | 39 | #include <asm/apic.h> |
40 | #include <asm/genapic.h> | ||
41 | #include <asm/io.h> | 40 | #include <asm/io.h> |
42 | #include <asm/mpspec.h> | 41 | #include <asm/mpspec.h> |
43 | #include <asm/smp.h> | 42 | #include <asm/smp.h> |
44 | 43 | ||
45 | #ifdef CONFIG_X86_LOCAL_APIC | ||
46 | # include <mach_apic.h> | ||
47 | #endif | ||
48 | |||
49 | static int __initdata acpi_force = 0; | 44 | static int __initdata acpi_force = 0; |
50 | u32 acpi_rsdt_forced; | 45 | u32 acpi_rsdt_forced; |
51 | #ifdef CONFIG_ACPI | 46 | #ifdef CONFIG_ACPI |
@@ -56,16 +51,7 @@ int acpi_disabled = 1; | |||
56 | EXPORT_SYMBOL(acpi_disabled); | 51 | EXPORT_SYMBOL(acpi_disabled); |
57 | 52 | ||
58 | #ifdef CONFIG_X86_64 | 53 | #ifdef CONFIG_X86_64 |
59 | 54 | # include <asm/proto.h> | |
60 | #include <asm/proto.h> | ||
61 | |||
62 | #else /* X86 */ | ||
63 | |||
64 | #ifdef CONFIG_X86_LOCAL_APIC | ||
65 | #include <mach_apic.h> | ||
66 | #include <mach_mpparse.h> | ||
67 | #endif /* CONFIG_X86_LOCAL_APIC */ | ||
68 | |||
69 | #endif /* X86 */ | 55 | #endif /* X86 */ |
70 | 56 | ||
71 | #define BAD_MADT_ENTRY(entry, end) ( \ | 57 | #define BAD_MADT_ENTRY(entry, end) ( \ |
@@ -121,35 +107,18 @@ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; | |||
121 | */ | 107 | */ |
122 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) | 108 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
123 | { | 109 | { |
124 | unsigned long base, offset, mapped_size; | ||
125 | int idx; | ||
126 | 110 | ||
127 | if (!phys || !size) | 111 | if (!phys || !size) |
128 | return NULL; | 112 | return NULL; |
129 | 113 | ||
130 | if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT)) | 114 | return early_ioremap(phys, size); |
131 | return __va(phys); | 115 | } |
132 | 116 | void __init __acpi_unmap_table(char *map, unsigned long size) | |
133 | offset = phys & (PAGE_SIZE - 1); | 117 | { |
134 | mapped_size = PAGE_SIZE - offset; | 118 | if (!map || !size) |
135 | clear_fixmap(FIX_ACPI_END); | 119 | return; |
136 | set_fixmap(FIX_ACPI_END, phys); | ||
137 | base = fix_to_virt(FIX_ACPI_END); | ||
138 | |||
139 | /* | ||
140 | * Most cases can be covered by the below. | ||
141 | */ | ||
142 | idx = FIX_ACPI_END; | ||
143 | while (mapped_size < size) { | ||
144 | if (--idx < FIX_ACPI_BEGIN) | ||
145 | return NULL; /* cannot handle this */ | ||
146 | phys += PAGE_SIZE; | ||
147 | clear_fixmap(idx); | ||
148 | set_fixmap(idx, phys); | ||
149 | mapped_size += PAGE_SIZE; | ||
150 | } | ||
151 | 120 | ||
152 | return ((unsigned char *)base + offset); | 121 | early_iounmap(map, size); |
153 | } | 122 | } |
154 | 123 | ||
155 | #ifdef CONFIG_PCI_MMCONFIG | 124 | #ifdef CONFIG_PCI_MMCONFIG |
@@ -239,7 +208,8 @@ static int __init acpi_parse_madt(struct acpi_table_header *table) | |||
239 | madt->address); | 208 | madt->address); |
240 | } | 209 | } |
241 | 210 | ||
242 | acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); | 211 | default_acpi_madt_oem_check(madt->header.oem_id, |
212 | madt->header.oem_table_id); | ||
243 | 213 | ||
244 | return 0; | 214 | return 0; |
245 | } | 215 | } |
@@ -884,7 +854,7 @@ static struct { | |||
884 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | 854 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); |
885 | } mp_ioapic_routing[MAX_IO_APICS]; | 855 | } mp_ioapic_routing[MAX_IO_APICS]; |
886 | 856 | ||
887 | static int mp_find_ioapic(int gsi) | 857 | int mp_find_ioapic(int gsi) |
888 | { | 858 | { |
889 | int i = 0; | 859 | int i = 0; |
890 | 860 | ||
@@ -899,6 +869,16 @@ static int mp_find_ioapic(int gsi) | |||
899 | return -1; | 869 | return -1; |
900 | } | 870 | } |
901 | 871 | ||
872 | int mp_find_ioapic_pin(int ioapic, int gsi) | ||
873 | { | ||
874 | if (WARN_ON(ioapic == -1)) | ||
875 | return -1; | ||
876 | if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end)) | ||
877 | return -1; | ||
878 | |||
879 | return gsi - mp_ioapic_routing[ioapic].gsi_base; | ||
880 | } | ||
881 | |||
902 | static u8 __init uniq_ioapic_id(u8 id) | 882 | static u8 __init uniq_ioapic_id(u8 id) |
903 | { | 883 | { |
904 | #ifdef CONFIG_X86_32 | 884 | #ifdef CONFIG_X86_32 |
@@ -912,8 +892,8 @@ static u8 __init uniq_ioapic_id(u8 id) | |||
912 | DECLARE_BITMAP(used, 256); | 892 | DECLARE_BITMAP(used, 256); |
913 | bitmap_zero(used, 256); | 893 | bitmap_zero(used, 256); |
914 | for (i = 0; i < nr_ioapics; i++) { | 894 | for (i = 0; i < nr_ioapics; i++) { |
915 | struct mp_config_ioapic *ia = &mp_ioapics[i]; | 895 | struct mpc_ioapic *ia = &mp_ioapics[i]; |
916 | __set_bit(ia->mp_apicid, used); | 896 | __set_bit(ia->apicid, used); |
917 | } | 897 | } |
918 | if (!test_bit(id, used)) | 898 | if (!test_bit(id, used)) |
919 | return id; | 899 | return id; |
@@ -945,29 +925,29 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |||
945 | 925 | ||
946 | idx = nr_ioapics; | 926 | idx = nr_ioapics; |
947 | 927 | ||
948 | mp_ioapics[idx].mp_type = MP_IOAPIC; | 928 | mp_ioapics[idx].type = MP_IOAPIC; |
949 | mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; | 929 | mp_ioapics[idx].flags = MPC_APIC_USABLE; |
950 | mp_ioapics[idx].mp_apicaddr = address; | 930 | mp_ioapics[idx].apicaddr = address; |
951 | 931 | ||
952 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | 932 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); |
953 | mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); | 933 | mp_ioapics[idx].apicid = uniq_ioapic_id(id); |
954 | #ifdef CONFIG_X86_32 | 934 | #ifdef CONFIG_X86_32 |
955 | mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); | 935 | mp_ioapics[idx].apicver = io_apic_get_version(idx); |
956 | #else | 936 | #else |
957 | mp_ioapics[idx].mp_apicver = 0; | 937 | mp_ioapics[idx].apicver = 0; |
958 | #endif | 938 | #endif |
959 | /* | 939 | /* |
960 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | 940 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups |
961 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | 941 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). |
962 | */ | 942 | */ |
963 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; | 943 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid; |
964 | mp_ioapic_routing[idx].gsi_base = gsi_base; | 944 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
965 | mp_ioapic_routing[idx].gsi_end = gsi_base + | 945 | mp_ioapic_routing[idx].gsi_end = gsi_base + |
966 | io_apic_get_redir_entries(idx); | 946 | io_apic_get_redir_entries(idx); |
967 | 947 | ||
968 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " | 948 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " |
969 | "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, | 949 | "GSI %d-%d\n", idx, mp_ioapics[idx].apicid, |
970 | mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, | 950 | mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr, |
971 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); | 951 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
972 | 952 | ||
973 | nr_ioapics++; | 953 | nr_ioapics++; |
@@ -996,19 +976,19 @@ int __init acpi_probe_gsi(void) | |||
996 | return max_gsi + 1; | 976 | return max_gsi + 1; |
997 | } | 977 | } |
998 | 978 | ||
999 | static void assign_to_mp_irq(struct mp_config_intsrc *m, | 979 | static void assign_to_mp_irq(struct mpc_intsrc *m, |
1000 | struct mp_config_intsrc *mp_irq) | 980 | struct mpc_intsrc *mp_irq) |
1001 | { | 981 | { |
1002 | memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); | 982 | memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); |
1003 | } | 983 | } |
1004 | 984 | ||
1005 | static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, | 985 | static int mp_irq_cmp(struct mpc_intsrc *mp_irq, |
1006 | struct mp_config_intsrc *m) | 986 | struct mpc_intsrc *m) |
1007 | { | 987 | { |
1008 | return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); | 988 | return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); |
1009 | } | 989 | } |
1010 | 990 | ||
1011 | static void save_mp_irq(struct mp_config_intsrc *m) | 991 | static void save_mp_irq(struct mpc_intsrc *m) |
1012 | { | 992 | { |
1013 | int i; | 993 | int i; |
1014 | 994 | ||
@@ -1026,7 +1006,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) | |||
1026 | { | 1006 | { |
1027 | int ioapic; | 1007 | int ioapic; |
1028 | int pin; | 1008 | int pin; |
1029 | struct mp_config_intsrc mp_irq; | 1009 | struct mpc_intsrc mp_irq; |
1030 | 1010 | ||
1031 | /* | 1011 | /* |
1032 | * Convert 'gsi' to 'ioapic.pin'. | 1012 | * Convert 'gsi' to 'ioapic.pin'. |
@@ -1034,7 +1014,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) | |||
1034 | ioapic = mp_find_ioapic(gsi); | 1014 | ioapic = mp_find_ioapic(gsi); |
1035 | if (ioapic < 0) | 1015 | if (ioapic < 0) |
1036 | return; | 1016 | return; |
1037 | pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | 1017 | pin = mp_find_ioapic_pin(ioapic, gsi); |
1038 | 1018 | ||
1039 | /* | 1019 | /* |
1040 | * TBD: This check is for faulty timer entries, where the override | 1020 | * TBD: This check is for faulty timer entries, where the override |
@@ -1044,13 +1024,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) | |||
1044 | if ((bus_irq == 0) && (trigger == 3)) | 1024 | if ((bus_irq == 0) && (trigger == 3)) |
1045 | trigger = 1; | 1025 | trigger = 1; |
1046 | 1026 | ||
1047 | mp_irq.mp_type = MP_INTSRC; | 1027 | mp_irq.type = MP_INTSRC; |
1048 | mp_irq.mp_irqtype = mp_INT; | 1028 | mp_irq.irqtype = mp_INT; |
1049 | mp_irq.mp_irqflag = (trigger << 2) | polarity; | 1029 | mp_irq.irqflag = (trigger << 2) | polarity; |
1050 | mp_irq.mp_srcbus = MP_ISA_BUS; | 1030 | mp_irq.srcbus = MP_ISA_BUS; |
1051 | mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ | 1031 | mp_irq.srcbusirq = bus_irq; /* IRQ */ |
1052 | mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ | 1032 | mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ |
1053 | mp_irq.mp_dstirq = pin; /* INTIN# */ | 1033 | mp_irq.dstirq = pin; /* INTIN# */ |
1054 | 1034 | ||
1055 | save_mp_irq(&mp_irq); | 1035 | save_mp_irq(&mp_irq); |
1056 | } | 1036 | } |
@@ -1060,7 +1040,7 @@ void __init mp_config_acpi_legacy_irqs(void) | |||
1060 | int i; | 1040 | int i; |
1061 | int ioapic; | 1041 | int ioapic; |
1062 | unsigned int dstapic; | 1042 | unsigned int dstapic; |
1063 | struct mp_config_intsrc mp_irq; | 1043 | struct mpc_intsrc mp_irq; |
1064 | 1044 | ||
1065 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | 1045 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) |
1066 | /* | 1046 | /* |
@@ -1085,7 +1065,7 @@ void __init mp_config_acpi_legacy_irqs(void) | |||
1085 | ioapic = mp_find_ioapic(0); | 1065 | ioapic = mp_find_ioapic(0); |
1086 | if (ioapic < 0) | 1066 | if (ioapic < 0) |
1087 | return; | 1067 | return; |
1088 | dstapic = mp_ioapics[ioapic].mp_apicid; | 1068 | dstapic = mp_ioapics[ioapic].apicid; |
1089 | 1069 | ||
1090 | /* | 1070 | /* |
1091 | * Use the default configuration for the IRQs 0-15. Unless | 1071 | * Use the default configuration for the IRQs 0-15. Unless |
@@ -1095,16 +1075,14 @@ void __init mp_config_acpi_legacy_irqs(void) | |||
1095 | int idx; | 1075 | int idx; |
1096 | 1076 | ||
1097 | for (idx = 0; idx < mp_irq_entries; idx++) { | 1077 | for (idx = 0; idx < mp_irq_entries; idx++) { |
1098 | struct mp_config_intsrc *irq = mp_irqs + idx; | 1078 | struct mpc_intsrc *irq = mp_irqs + idx; |
1099 | 1079 | ||
1100 | /* Do we already have a mapping for this ISA IRQ? */ | 1080 | /* Do we already have a mapping for this ISA IRQ? */ |
1101 | if (irq->mp_srcbus == MP_ISA_BUS | 1081 | if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) |
1102 | && irq->mp_srcbusirq == i) | ||
1103 | break; | 1082 | break; |
1104 | 1083 | ||
1105 | /* Do we already have a mapping for this IOAPIC pin */ | 1084 | /* Do we already have a mapping for this IOAPIC pin */ |
1106 | if (irq->mp_dstapic == dstapic && | 1085 | if (irq->dstapic == dstapic && irq->dstirq == i) |
1107 | irq->mp_dstirq == i) | ||
1108 | break; | 1086 | break; |
1109 | } | 1087 | } |
1110 | 1088 | ||
@@ -1113,13 +1091,13 @@ void __init mp_config_acpi_legacy_irqs(void) | |||
1113 | continue; /* IRQ already used */ | 1091 | continue; /* IRQ already used */ |
1114 | } | 1092 | } |
1115 | 1093 | ||
1116 | mp_irq.mp_type = MP_INTSRC; | 1094 | mp_irq.type = MP_INTSRC; |
1117 | mp_irq.mp_irqflag = 0; /* Conforming */ | 1095 | mp_irq.irqflag = 0; /* Conforming */ |
1118 | mp_irq.mp_srcbus = MP_ISA_BUS; | 1096 | mp_irq.srcbus = MP_ISA_BUS; |
1119 | mp_irq.mp_dstapic = dstapic; | 1097 | mp_irq.dstapic = dstapic; |
1120 | mp_irq.mp_irqtype = mp_INT; | 1098 | mp_irq.irqtype = mp_INT; |
1121 | mp_irq.mp_srcbusirq = i; /* Identity mapped */ | 1099 | mp_irq.srcbusirq = i; /* Identity mapped */ |
1122 | mp_irq.mp_dstirq = i; | 1100 | mp_irq.dstirq = i; |
1123 | 1101 | ||
1124 | save_mp_irq(&mp_irq); | 1102 | save_mp_irq(&mp_irq); |
1125 | } | 1103 | } |
@@ -1156,7 +1134,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) | |||
1156 | return gsi; | 1134 | return gsi; |
1157 | } | 1135 | } |
1158 | 1136 | ||
1159 | ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | 1137 | ioapic_pin = mp_find_ioapic_pin(ioapic, gsi); |
1160 | 1138 | ||
1161 | #ifdef CONFIG_X86_32 | 1139 | #ifdef CONFIG_X86_32 |
1162 | if (ioapic_renumber_irq) | 1140 | if (ioapic_renumber_irq) |
@@ -1230,22 +1208,22 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | |||
1230 | u32 gsi, int triggering, int polarity) | 1208 | u32 gsi, int triggering, int polarity) |
1231 | { | 1209 | { |
1232 | #ifdef CONFIG_X86_MPPARSE | 1210 | #ifdef CONFIG_X86_MPPARSE |
1233 | struct mp_config_intsrc mp_irq; | 1211 | struct mpc_intsrc mp_irq; |
1234 | int ioapic; | 1212 | int ioapic; |
1235 | 1213 | ||
1236 | if (!acpi_ioapic) | 1214 | if (!acpi_ioapic) |
1237 | return 0; | 1215 | return 0; |
1238 | 1216 | ||
1239 | /* print the entry should happen on mptable identically */ | 1217 | /* print the entry should happen on mptable identically */ |
1240 | mp_irq.mp_type = MP_INTSRC; | 1218 | mp_irq.type = MP_INTSRC; |
1241 | mp_irq.mp_irqtype = mp_INT; | 1219 | mp_irq.irqtype = mp_INT; |
1242 | mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | 1220 | mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | |
1243 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); | 1221 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
1244 | mp_irq.mp_srcbus = number; | 1222 | mp_irq.srcbus = number; |
1245 | mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | 1223 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); |
1246 | ioapic = mp_find_ioapic(gsi); | 1224 | ioapic = mp_find_ioapic(gsi); |
1247 | mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; | 1225 | mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; |
1248 | mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; | 1226 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); |
1249 | 1227 | ||
1250 | save_mp_irq(&mp_irq); | 1228 | save_mp_irq(&mp_irq); |
1251 | #endif | 1229 | #endif |
@@ -1372,7 +1350,7 @@ static void __init acpi_process_madt(void) | |||
1372 | if (!error) { | 1350 | if (!error) { |
1373 | acpi_lapic = 1; | 1351 | acpi_lapic = 1; |
1374 | 1352 | ||
1375 | #ifdef CONFIG_X86_GENERICARCH | 1353 | #ifdef CONFIG_X86_BIGSMP |
1376 | generic_bigsmp_probe(); | 1354 | generic_bigsmp_probe(); |
1377 | #endif | 1355 | #endif |
1378 | /* | 1356 | /* |
@@ -1384,9 +1362,8 @@ static void __init acpi_process_madt(void) | |||
1384 | acpi_ioapic = 1; | 1362 | acpi_ioapic = 1; |
1385 | 1363 | ||
1386 | smp_found_config = 1; | 1364 | smp_found_config = 1; |
1387 | #ifdef CONFIG_X86_32 | 1365 | if (apic->setup_apic_routing) |
1388 | setup_apic_routing(); | 1366 | apic->setup_apic_routing(); |
1389 | #endif | ||
1390 | } | 1367 | } |
1391 | } | 1368 | } |
1392 | if (error == -EINVAL) { | 1369 | if (error == -EINVAL) { |
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.S b/arch/x86/kernel/acpi/realmode/wakeup.S index 3355973b12ac..580b4e296010 100644 --- a/arch/x86/kernel/acpi/realmode/wakeup.S +++ b/arch/x86/kernel/acpi/realmode/wakeup.S | |||
@@ -3,8 +3,8 @@ | |||
3 | */ | 3 | */ |
4 | #include <asm/segment.h> | 4 | #include <asm/segment.h> |
5 | #include <asm/msr-index.h> | 5 | #include <asm/msr-index.h> |
6 | #include <asm/page.h> | 6 | #include <asm/page_types.h> |
7 | #include <asm/pgtable.h> | 7 | #include <asm/pgtable_types.h> |
8 | #include <asm/processor-flags.h> | 8 | #include <asm/processor-flags.h> |
9 | 9 | ||
10 | .code16 | 10 | .code16 |
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index a60c1f3bcb87..7c243a2c5115 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c | |||
@@ -101,6 +101,7 @@ int acpi_save_state_mem(void) | |||
101 | stack_start.sp = temp_stack + sizeof(temp_stack); | 101 | stack_start.sp = temp_stack + sizeof(temp_stack); |
102 | early_gdt_descr.address = | 102 | early_gdt_descr.address = |
103 | (unsigned long)get_cpu_gdt_table(smp_processor_id()); | 103 | (unsigned long)get_cpu_gdt_table(smp_processor_id()); |
104 | initial_gs = per_cpu_offset(smp_processor_id()); | ||
104 | #endif | 105 | #endif |
105 | initial_code = (unsigned long)wakeup_long64; | 106 | initial_code = (unsigned long)wakeup_long64; |
106 | saved_magic = 0x123456789abcdef0; | 107 | saved_magic = 0x123456789abcdef0; |
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S index a12e6a9fb659..8ded418b0593 100644 --- a/arch/x86/kernel/acpi/wakeup_32.S +++ b/arch/x86/kernel/acpi/wakeup_32.S | |||
@@ -1,7 +1,7 @@ | |||
1 | .section .text.page_aligned | 1 | .section .text.page_aligned |
2 | #include <linux/linkage.h> | 2 | #include <linux/linkage.h> |
3 | #include <asm/segment.h> | 3 | #include <asm/segment.h> |
4 | #include <asm/page.h> | 4 | #include <asm/page_types.h> |
5 | 5 | ||
6 | # Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv2 | 6 | # Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv2 |
7 | 7 | ||
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S index 96258d9dc974..8ea5164cbd04 100644 --- a/arch/x86/kernel/acpi/wakeup_64.S +++ b/arch/x86/kernel/acpi/wakeup_64.S | |||
@@ -1,8 +1,8 @@ | |||
1 | .text | 1 | .text |
2 | #include <linux/linkage.h> | 2 | #include <linux/linkage.h> |
3 | #include <asm/segment.h> | 3 | #include <asm/segment.h> |
4 | #include <asm/pgtable.h> | 4 | #include <asm/pgtable_types.h> |
5 | #include <asm/page.h> | 5 | #include <asm/page_types.h> |
6 | #include <asm/msr.h> | 6 | #include <asm/msr.h> |
7 | #include <asm/asm-offsets.h> | 7 | #include <asm/asm-offsets.h> |
8 | 8 | ||
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c index a84ac7b570e6..6907b8e85d52 100644 --- a/arch/x86/kernel/alternative.c +++ b/arch/x86/kernel/alternative.c | |||
@@ -498,12 +498,12 @@ void *text_poke_early(void *addr, const void *opcode, size_t len) | |||
498 | */ | 498 | */ |
499 | void *__kprobes text_poke(void *addr, const void *opcode, size_t len) | 499 | void *__kprobes text_poke(void *addr, const void *opcode, size_t len) |
500 | { | 500 | { |
501 | unsigned long flags; | ||
502 | char *vaddr; | 501 | char *vaddr; |
503 | int nr_pages = 2; | 502 | int nr_pages = 2; |
504 | struct page *pages[2]; | 503 | struct page *pages[2]; |
505 | int i; | 504 | int i; |
506 | 505 | ||
506 | might_sleep(); | ||
507 | if (!core_kernel_text((unsigned long)addr)) { | 507 | if (!core_kernel_text((unsigned long)addr)) { |
508 | pages[0] = vmalloc_to_page(addr); | 508 | pages[0] = vmalloc_to_page(addr); |
509 | pages[1] = vmalloc_to_page(addr + PAGE_SIZE); | 509 | pages[1] = vmalloc_to_page(addr + PAGE_SIZE); |
@@ -517,9 +517,9 @@ void *__kprobes text_poke(void *addr, const void *opcode, size_t len) | |||
517 | nr_pages = 1; | 517 | nr_pages = 1; |
518 | vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL); | 518 | vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL); |
519 | BUG_ON(!vaddr); | 519 | BUG_ON(!vaddr); |
520 | local_irq_save(flags); | 520 | local_irq_disable(); |
521 | memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len); | 521 | memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len); |
522 | local_irq_restore(flags); | 522 | local_irq_enable(); |
523 | vunmap(vaddr); | 523 | vunmap(vaddr); |
524 | sync_core(); | 524 | sync_core(); |
525 | /* Could also do a CLFLUSH here to speed up CPU recovery; but | 525 | /* Could also do a CLFLUSH here to speed up CPU recovery; but |
diff --git a/arch/x86/kernel/apic/Makefile b/arch/x86/kernel/apic/Makefile new file mode 100644 index 000000000000..da7b7b9f8bd8 --- /dev/null +++ b/arch/x86/kernel/apic/Makefile | |||
@@ -0,0 +1,19 @@ | |||
1 | # | ||
2 | # Makefile for local APIC drivers and for the IO-APIC code | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_X86_LOCAL_APIC) += apic.o probe_$(BITS).o ipi.o nmi.o | ||
6 | obj-$(CONFIG_X86_IO_APIC) += io_apic.o | ||
7 | obj-$(CONFIG_SMP) += ipi.o | ||
8 | |||
9 | ifeq ($(CONFIG_X86_64),y) | ||
10 | obj-y += apic_flat_64.o | ||
11 | obj-$(CONFIG_X86_X2APIC) += x2apic_cluster.o | ||
12 | obj-$(CONFIG_X86_X2APIC) += x2apic_phys.o | ||
13 | obj-$(CONFIG_X86_UV) += x2apic_uv_x.o | ||
14 | endif | ||
15 | |||
16 | obj-$(CONFIG_X86_BIGSMP) += bigsmp_32.o | ||
17 | obj-$(CONFIG_X86_NUMAQ) += numaq_32.o | ||
18 | obj-$(CONFIG_X86_ES7000) += es7000_32.o | ||
19 | obj-$(CONFIG_X86_SUMMIT) += summit_32.o | ||
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic/apic.c index 570f36e44e59..f9cecdfd05c5 100644 --- a/arch/x86/kernel/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Local APIC handling, local APIC timers | 2 | * Local APIC handling, local APIC timers |
3 | * | 3 | * |
4 | * (c) 1999, 2000 Ingo Molnar <mingo@redhat.com> | 4 | * (c) 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
5 | * | 5 | * |
6 | * Fixes | 6 | * Fixes |
7 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs; | 7 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs; |
@@ -14,51 +14,69 @@ | |||
14 | * Mikael Pettersson : PM converted to driver model. | 14 | * Mikael Pettersson : PM converted to driver model. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/init.h> | ||
18 | |||
19 | #include <linux/mm.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/bootmem.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/mc146818rtc.h> | ||
24 | #include <linux/kernel_stat.h> | 17 | #include <linux/kernel_stat.h> |
25 | #include <linux/sysdev.h> | 18 | #include <linux/mc146818rtc.h> |
26 | #include <linux/ioport.h> | ||
27 | #include <linux/cpu.h> | ||
28 | #include <linux/clockchips.h> | ||
29 | #include <linux/acpi_pmtmr.h> | 19 | #include <linux/acpi_pmtmr.h> |
20 | #include <linux/clockchips.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/bootmem.h> | ||
23 | #include <linux/ftrace.h> | ||
24 | #include <linux/ioport.h> | ||
30 | #include <linux/module.h> | 25 | #include <linux/module.h> |
31 | #include <linux/dmi.h> | 26 | #include <linux/sysdev.h> |
27 | #include <linux/delay.h> | ||
28 | #include <linux/timex.h> | ||
32 | #include <linux/dmar.h> | 29 | #include <linux/dmar.h> |
33 | #include <linux/ftrace.h> | 30 | #include <linux/init.h> |
34 | #include <linux/smp.h> | 31 | #include <linux/cpu.h> |
32 | #include <linux/dmi.h> | ||
35 | #include <linux/nmi.h> | 33 | #include <linux/nmi.h> |
36 | #include <linux/timex.h> | 34 | #include <linux/smp.h> |
35 | #include <linux/mm.h> | ||
37 | 36 | ||
37 | #include <asm/pgalloc.h> | ||
38 | #include <asm/atomic.h> | 38 | #include <asm/atomic.h> |
39 | #include <asm/mtrr.h> | ||
40 | #include <asm/mpspec.h> | 39 | #include <asm/mpspec.h> |
41 | #include <asm/desc.h> | ||
42 | #include <asm/arch_hooks.h> | ||
43 | #include <asm/hpet.h> | ||
44 | #include <asm/pgalloc.h> | ||
45 | #include <asm/i8253.h> | 40 | #include <asm/i8253.h> |
46 | #include <asm/idle.h> | 41 | #include <asm/i8259.h> |
47 | #include <asm/proto.h> | 42 | #include <asm/proto.h> |
48 | #include <asm/apic.h> | 43 | #include <asm/apic.h> |
49 | #include <asm/i8259.h> | 44 | #include <asm/desc.h> |
45 | #include <asm/hpet.h> | ||
46 | #include <asm/idle.h> | ||
47 | #include <asm/mtrr.h> | ||
50 | #include <asm/smp.h> | 48 | #include <asm/smp.h> |
51 | 49 | ||
52 | #include <mach_apic.h> | 50 | unsigned int num_processors; |
53 | #include <mach_apicdef.h> | 51 | |
54 | #include <mach_ipi.h> | 52 | unsigned disabled_cpus __cpuinitdata; |
53 | |||
54 | /* Processor that is doing the boot up */ | ||
55 | unsigned int boot_cpu_physical_apicid = -1U; | ||
55 | 56 | ||
56 | /* | 57 | /* |
57 | * Sanity check | 58 | * The highest APIC ID seen during enumeration. |
59 | * | ||
60 | * This determines the messaging protocol we can use: if all APIC IDs | ||
61 | * are in the 0 ... 7 range, then we can use logical addressing which | ||
62 | * has some performance advantages (better broadcasting). | ||
63 | * | ||
64 | * If there's an APIC ID above 8, we use physical addressing. | ||
58 | */ | 65 | */ |
59 | #if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F) | 66 | unsigned int max_physical_apicid; |
60 | # error SPURIOUS_APIC_VECTOR definition error | 67 | |
61 | #endif | 68 | /* |
69 | * Bitmask of physically existing CPUs: | ||
70 | */ | ||
71 | physid_mask_t phys_cpu_present_map; | ||
72 | |||
73 | /* | ||
74 | * Map cpu index to physical APIC ID | ||
75 | */ | ||
76 | DEFINE_EARLY_PER_CPU(u16, x86_cpu_to_apicid, BAD_APICID); | ||
77 | DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID); | ||
78 | EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid); | ||
79 | EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid); | ||
62 | 80 | ||
63 | #ifdef CONFIG_X86_32 | 81 | #ifdef CONFIG_X86_32 |
64 | /* | 82 | /* |
@@ -92,11 +110,7 @@ static __init int setup_apicpmtimer(char *s) | |||
92 | __setup("apicpmtimer", setup_apicpmtimer); | 110 | __setup("apicpmtimer", setup_apicpmtimer); |
93 | #endif | 111 | #endif |
94 | 112 | ||
95 | #ifdef CONFIG_X86_64 | 113 | #ifdef CONFIG_X86_X2APIC |
96 | #define HAVE_X2APIC | ||
97 | #endif | ||
98 | |||
99 | #ifdef HAVE_X2APIC | ||
100 | int x2apic; | 114 | int x2apic; |
101 | /* x2apic enabled before OS handover */ | 115 | /* x2apic enabled before OS handover */ |
102 | static int x2apic_preenabled; | 116 | static int x2apic_preenabled; |
@@ -194,18 +208,13 @@ static int modern_apic(void) | |||
194 | return lapic_get_version() >= 0x14; | 208 | return lapic_get_version() >= 0x14; |
195 | } | 209 | } |
196 | 210 | ||
197 | /* | 211 | void native_apic_wait_icr_idle(void) |
198 | * Paravirt kernels also might be using these below ops. So we still | ||
199 | * use generic apic_read()/apic_write(), which might be pointing to different | ||
200 | * ops in PARAVIRT case. | ||
201 | */ | ||
202 | void xapic_wait_icr_idle(void) | ||
203 | { | 212 | { |
204 | while (apic_read(APIC_ICR) & APIC_ICR_BUSY) | 213 | while (apic_read(APIC_ICR) & APIC_ICR_BUSY) |
205 | cpu_relax(); | 214 | cpu_relax(); |
206 | } | 215 | } |
207 | 216 | ||
208 | u32 safe_xapic_wait_icr_idle(void) | 217 | u32 native_safe_apic_wait_icr_idle(void) |
209 | { | 218 | { |
210 | u32 send_status; | 219 | u32 send_status; |
211 | int timeout; | 220 | int timeout; |
@@ -221,13 +230,13 @@ u32 safe_xapic_wait_icr_idle(void) | |||
221 | return send_status; | 230 | return send_status; |
222 | } | 231 | } |
223 | 232 | ||
224 | void xapic_icr_write(u32 low, u32 id) | 233 | void native_apic_icr_write(u32 low, u32 id) |
225 | { | 234 | { |
226 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); | 235 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); |
227 | apic_write(APIC_ICR, low); | 236 | apic_write(APIC_ICR, low); |
228 | } | 237 | } |
229 | 238 | ||
230 | static u64 xapic_icr_read(void) | 239 | u64 native_apic_icr_read(void) |
231 | { | 240 | { |
232 | u32 icr1, icr2; | 241 | u32 icr1, icr2; |
233 | 242 | ||
@@ -237,54 +246,6 @@ static u64 xapic_icr_read(void) | |||
237 | return icr1 | ((u64)icr2 << 32); | 246 | return icr1 | ((u64)icr2 << 32); |
238 | } | 247 | } |
239 | 248 | ||
240 | static struct apic_ops xapic_ops = { | ||
241 | .read = native_apic_mem_read, | ||
242 | .write = native_apic_mem_write, | ||
243 | .icr_read = xapic_icr_read, | ||
244 | .icr_write = xapic_icr_write, | ||
245 | .wait_icr_idle = xapic_wait_icr_idle, | ||
246 | .safe_wait_icr_idle = safe_xapic_wait_icr_idle, | ||
247 | }; | ||
248 | |||
249 | struct apic_ops __read_mostly *apic_ops = &xapic_ops; | ||
250 | EXPORT_SYMBOL_GPL(apic_ops); | ||
251 | |||
252 | #ifdef HAVE_X2APIC | ||
253 | static void x2apic_wait_icr_idle(void) | ||
254 | { | ||
255 | /* no need to wait for icr idle in x2apic */ | ||
256 | return; | ||
257 | } | ||
258 | |||
259 | static u32 safe_x2apic_wait_icr_idle(void) | ||
260 | { | ||
261 | /* no need to wait for icr idle in x2apic */ | ||
262 | return 0; | ||
263 | } | ||
264 | |||
265 | void x2apic_icr_write(u32 low, u32 id) | ||
266 | { | ||
267 | wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); | ||
268 | } | ||
269 | |||
270 | static u64 x2apic_icr_read(void) | ||
271 | { | ||
272 | unsigned long val; | ||
273 | |||
274 | rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); | ||
275 | return val; | ||
276 | } | ||
277 | |||
278 | static struct apic_ops x2apic_ops = { | ||
279 | .read = native_apic_msr_read, | ||
280 | .write = native_apic_msr_write, | ||
281 | .icr_read = x2apic_icr_read, | ||
282 | .icr_write = x2apic_icr_write, | ||
283 | .wait_icr_idle = x2apic_wait_icr_idle, | ||
284 | .safe_wait_icr_idle = safe_x2apic_wait_icr_idle, | ||
285 | }; | ||
286 | #endif | ||
287 | |||
288 | /** | 249 | /** |
289 | * enable_NMI_through_LVT0 - enable NMI through local vector table 0 | 250 | * enable_NMI_through_LVT0 - enable NMI through local vector table 0 |
290 | */ | 251 | */ |
@@ -457,7 +418,7 @@ static void lapic_timer_setup(enum clock_event_mode mode, | |||
457 | static void lapic_timer_broadcast(const struct cpumask *mask) | 418 | static void lapic_timer_broadcast(const struct cpumask *mask) |
458 | { | 419 | { |
459 | #ifdef CONFIG_SMP | 420 | #ifdef CONFIG_SMP |
460 | send_IPI_mask(mask, LOCAL_TIMER_VECTOR); | 421 | apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR); |
461 | #endif | 422 | #endif |
462 | } | 423 | } |
463 | 424 | ||
@@ -535,7 +496,8 @@ static void __init lapic_cal_handler(struct clock_event_device *dev) | |||
535 | } | 496 | } |
536 | } | 497 | } |
537 | 498 | ||
538 | static int __init calibrate_by_pmtimer(long deltapm, long *delta) | 499 | static int __init |
500 | calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc) | ||
539 | { | 501 | { |
540 | const long pm_100ms = PMTMR_TICKS_PER_SEC / 10; | 502 | const long pm_100ms = PMTMR_TICKS_PER_SEC / 10; |
541 | const long pm_thresh = pm_100ms / 100; | 503 | const long pm_thresh = pm_100ms / 100; |
@@ -546,7 +508,7 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta) | |||
546 | return -1; | 508 | return -1; |
547 | #endif | 509 | #endif |
548 | 510 | ||
549 | apic_printk(APIC_VERBOSE, "... PM timer delta = %ld\n", deltapm); | 511 | apic_printk(APIC_VERBOSE, "... PM-Timer delta = %ld\n", deltapm); |
550 | 512 | ||
551 | /* Check, if the PM timer is available */ | 513 | /* Check, if the PM timer is available */ |
552 | if (!deltapm) | 514 | if (!deltapm) |
@@ -556,19 +518,30 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta) | |||
556 | 518 | ||
557 | if (deltapm > (pm_100ms - pm_thresh) && | 519 | if (deltapm > (pm_100ms - pm_thresh) && |
558 | deltapm < (pm_100ms + pm_thresh)) { | 520 | deltapm < (pm_100ms + pm_thresh)) { |
559 | apic_printk(APIC_VERBOSE, "... PM timer result ok\n"); | 521 | apic_printk(APIC_VERBOSE, "... PM-Timer result ok\n"); |
560 | } else { | 522 | return 0; |
561 | res = (((u64)deltapm) * mult) >> 22; | 523 | } |
562 | do_div(res, 1000000); | 524 | |
563 | pr_warning("APIC calibration not consistent " | 525 | res = (((u64)deltapm) * mult) >> 22; |
564 | "with PM Timer: %ldms instead of 100ms\n", | 526 | do_div(res, 1000000); |
565 | (long)res); | 527 | pr_warning("APIC calibration not consistent " |
566 | /* Correct the lapic counter value */ | 528 | "with PM-Timer: %ldms instead of 100ms\n",(long)res); |
567 | res = (((u64)(*delta)) * pm_100ms); | 529 | |
530 | /* Correct the lapic counter value */ | ||
531 | res = (((u64)(*delta)) * pm_100ms); | ||
532 | do_div(res, deltapm); | ||
533 | pr_info("APIC delta adjusted to PM-Timer: " | ||
534 | "%lu (%ld)\n", (unsigned long)res, *delta); | ||
535 | *delta = (long)res; | ||
536 | |||
537 | /* Correct the tsc counter value */ | ||
538 | if (cpu_has_tsc) { | ||
539 | res = (((u64)(*deltatsc)) * pm_100ms); | ||
568 | do_div(res, deltapm); | 540 | do_div(res, deltapm); |
569 | pr_info("APIC delta adjusted to PM-Timer: " | 541 | apic_printk(APIC_VERBOSE, "TSC delta adjusted to " |
570 | "%lu (%ld)\n", (unsigned long)res, *delta); | 542 | "PM-Timer: %lu (%ld) \n", |
571 | *delta = (long)res; | 543 | (unsigned long)res, *deltatsc); |
544 | *deltatsc = (long)res; | ||
572 | } | 545 | } |
573 | 546 | ||
574 | return 0; | 547 | return 0; |
@@ -579,7 +552,7 @@ static int __init calibrate_APIC_clock(void) | |||
579 | struct clock_event_device *levt = &__get_cpu_var(lapic_events); | 552 | struct clock_event_device *levt = &__get_cpu_var(lapic_events); |
580 | void (*real_handler)(struct clock_event_device *dev); | 553 | void (*real_handler)(struct clock_event_device *dev); |
581 | unsigned long deltaj; | 554 | unsigned long deltaj; |
582 | long delta; | 555 | long delta, deltatsc; |
583 | int pm_referenced = 0; | 556 | int pm_referenced = 0; |
584 | 557 | ||
585 | local_irq_disable(); | 558 | local_irq_disable(); |
@@ -609,9 +582,11 @@ static int __init calibrate_APIC_clock(void) | |||
609 | delta = lapic_cal_t1 - lapic_cal_t2; | 582 | delta = lapic_cal_t1 - lapic_cal_t2; |
610 | apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta); | 583 | apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta); |
611 | 584 | ||
585 | deltatsc = (long)(lapic_cal_tsc2 - lapic_cal_tsc1); | ||
586 | |||
612 | /* we trust the PM based calibration if possible */ | 587 | /* we trust the PM based calibration if possible */ |
613 | pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1, | 588 | pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1, |
614 | &delta); | 589 | &delta, &deltatsc); |
615 | 590 | ||
616 | /* Calculate the scaled math multiplication factor */ | 591 | /* Calculate the scaled math multiplication factor */ |
617 | lapic_clockevent.mult = div_sc(delta, TICK_NSEC * LAPIC_CAL_LOOPS, | 592 | lapic_clockevent.mult = div_sc(delta, TICK_NSEC * LAPIC_CAL_LOOPS, |
@@ -629,11 +604,10 @@ static int __init calibrate_APIC_clock(void) | |||
629 | calibration_result); | 604 | calibration_result); |
630 | 605 | ||
631 | if (cpu_has_tsc) { | 606 | if (cpu_has_tsc) { |
632 | delta = (long)(lapic_cal_tsc2 - lapic_cal_tsc1); | ||
633 | apic_printk(APIC_VERBOSE, "..... CPU clock speed is " | 607 | apic_printk(APIC_VERBOSE, "..... CPU clock speed is " |
634 | "%ld.%04ld MHz.\n", | 608 | "%ld.%04ld MHz.\n", |
635 | (delta / LAPIC_CAL_LOOPS) / (1000000 / HZ), | 609 | (deltatsc / LAPIC_CAL_LOOPS) / (1000000 / HZ), |
636 | (delta / LAPIC_CAL_LOOPS) % (1000000 / HZ)); | 610 | (deltatsc / LAPIC_CAL_LOOPS) % (1000000 / HZ)); |
637 | } | 611 | } |
638 | 612 | ||
639 | apic_printk(APIC_VERBOSE, "..... host bus clock speed is " | 613 | apic_printk(APIC_VERBOSE, "..... host bus clock speed is " |
@@ -991,11 +965,11 @@ int __init verify_local_APIC(void) | |||
991 | */ | 965 | */ |
992 | reg0 = apic_read(APIC_ID); | 966 | reg0 = apic_read(APIC_ID); |
993 | apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0); | 967 | apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0); |
994 | apic_write(APIC_ID, reg0 ^ APIC_ID_MASK); | 968 | apic_write(APIC_ID, reg0 ^ apic->apic_id_mask); |
995 | reg1 = apic_read(APIC_ID); | 969 | reg1 = apic_read(APIC_ID); |
996 | apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1); | 970 | apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1); |
997 | apic_write(APIC_ID, reg0); | 971 | apic_write(APIC_ID, reg0); |
998 | if (reg1 != (reg0 ^ APIC_ID_MASK)) | 972 | if (reg1 != (reg0 ^ apic->apic_id_mask)) |
999 | return 0; | 973 | return 0; |
1000 | 974 | ||
1001 | /* | 975 | /* |
@@ -1089,7 +1063,7 @@ static void __cpuinit lapic_setup_esr(void) | |||
1089 | return; | 1063 | return; |
1090 | } | 1064 | } |
1091 | 1065 | ||
1092 | if (esr_disable) { | 1066 | if (apic->disable_esr) { |
1093 | /* | 1067 | /* |
1094 | * Something untraceable is creating bad interrupts on | 1068 | * Something untraceable is creating bad interrupts on |
1095 | * secondary quads ... for the moment, just leave the | 1069 | * secondary quads ... for the moment, just leave the |
@@ -1130,9 +1104,14 @@ void __cpuinit setup_local_APIC(void) | |||
1130 | unsigned int value; | 1104 | unsigned int value; |
1131 | int i, j; | 1105 | int i, j; |
1132 | 1106 | ||
1107 | if (disable_apic) { | ||
1108 | arch_disable_smp_support(); | ||
1109 | return; | ||
1110 | } | ||
1111 | |||
1133 | #ifdef CONFIG_X86_32 | 1112 | #ifdef CONFIG_X86_32 |
1134 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ | 1113 | /* Pound the ESR really hard over the head with a big hammer - mbligh */ |
1135 | if (lapic_is_integrated() && esr_disable) { | 1114 | if (lapic_is_integrated() && apic->disable_esr) { |
1136 | apic_write(APIC_ESR, 0); | 1115 | apic_write(APIC_ESR, 0); |
1137 | apic_write(APIC_ESR, 0); | 1116 | apic_write(APIC_ESR, 0); |
1138 | apic_write(APIC_ESR, 0); | 1117 | apic_write(APIC_ESR, 0); |
@@ -1146,7 +1125,7 @@ void __cpuinit setup_local_APIC(void) | |||
1146 | * Double-check whether this APIC is really registered. | 1125 | * Double-check whether this APIC is really registered. |
1147 | * This is meaningless in clustered apic mode, so we skip it. | 1126 | * This is meaningless in clustered apic mode, so we skip it. |
1148 | */ | 1127 | */ |
1149 | if (!apic_id_registered()) | 1128 | if (!apic->apic_id_registered()) |
1150 | BUG(); | 1129 | BUG(); |
1151 | 1130 | ||
1152 | /* | 1131 | /* |
@@ -1154,7 +1133,7 @@ void __cpuinit setup_local_APIC(void) | |||
1154 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | 1133 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
1155 | * document number 292116). So here it goes... | 1134 | * document number 292116). So here it goes... |
1156 | */ | 1135 | */ |
1157 | init_apic_ldr(); | 1136 | apic->init_apic_ldr(); |
1158 | 1137 | ||
1159 | /* | 1138 | /* |
1160 | * Set Task Priority to 'accept all'. We never change this | 1139 | * Set Task Priority to 'accept all'. We never change this |
@@ -1282,17 +1261,12 @@ void __cpuinit end_local_APIC_setup(void) | |||
1282 | apic_pm_activate(); | 1261 | apic_pm_activate(); |
1283 | } | 1262 | } |
1284 | 1263 | ||
1285 | #ifdef HAVE_X2APIC | 1264 | #ifdef CONFIG_X86_X2APIC |
1286 | void check_x2apic(void) | 1265 | void check_x2apic(void) |
1287 | { | 1266 | { |
1288 | int msr, msr2; | 1267 | if (x2apic_enabled()) { |
1289 | |||
1290 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | ||
1291 | |||
1292 | if (msr & X2APIC_ENABLE) { | ||
1293 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); | 1268 | pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); |
1294 | x2apic_preenabled = x2apic = 1; | 1269 | x2apic_preenabled = x2apic = 1; |
1295 | apic_ops = &x2apic_ops; | ||
1296 | } | 1270 | } |
1297 | } | 1271 | } |
1298 | 1272 | ||
@@ -1300,6 +1274,9 @@ void enable_x2apic(void) | |||
1300 | { | 1274 | { |
1301 | int msr, msr2; | 1275 | int msr, msr2; |
1302 | 1276 | ||
1277 | if (!x2apic) | ||
1278 | return; | ||
1279 | |||
1303 | rdmsr(MSR_IA32_APICBASE, msr, msr2); | 1280 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
1304 | if (!(msr & X2APIC_ENABLE)) { | 1281 | if (!(msr & X2APIC_ENABLE)) { |
1305 | pr_info("Enabling x2apic\n"); | 1282 | pr_info("Enabling x2apic\n"); |
@@ -1363,7 +1340,6 @@ void __init enable_IR_x2apic(void) | |||
1363 | 1340 | ||
1364 | if (!x2apic) { | 1341 | if (!x2apic) { |
1365 | x2apic = 1; | 1342 | x2apic = 1; |
1366 | apic_ops = &x2apic_ops; | ||
1367 | enable_x2apic(); | 1343 | enable_x2apic(); |
1368 | } | 1344 | } |
1369 | 1345 | ||
@@ -1401,7 +1377,7 @@ end: | |||
1401 | 1377 | ||
1402 | return; | 1378 | return; |
1403 | } | 1379 | } |
1404 | #endif /* HAVE_X2APIC */ | 1380 | #endif /* CONFIG_X86_X2APIC */ |
1405 | 1381 | ||
1406 | #ifdef CONFIG_X86_64 | 1382 | #ifdef CONFIG_X86_64 |
1407 | /* | 1383 | /* |
@@ -1532,7 +1508,7 @@ void __init early_init_lapic_mapping(void) | |||
1532 | */ | 1508 | */ |
1533 | void __init init_apic_mappings(void) | 1509 | void __init init_apic_mappings(void) |
1534 | { | 1510 | { |
1535 | #ifdef HAVE_X2APIC | 1511 | #ifdef CONFIG_X86_X2APIC |
1536 | if (x2apic) { | 1512 | if (x2apic) { |
1537 | boot_cpu_physical_apicid = read_apic_id(); | 1513 | boot_cpu_physical_apicid = read_apic_id(); |
1538 | return; | 1514 | return; |
@@ -1570,11 +1546,11 @@ int apic_version[MAX_APICS]; | |||
1570 | 1546 | ||
1571 | int __init APIC_init_uniprocessor(void) | 1547 | int __init APIC_init_uniprocessor(void) |
1572 | { | 1548 | { |
1573 | #ifdef CONFIG_X86_64 | ||
1574 | if (disable_apic) { | 1549 | if (disable_apic) { |
1575 | pr_info("Apic disabled\n"); | 1550 | pr_info("Apic disabled\n"); |
1576 | return -1; | 1551 | return -1; |
1577 | } | 1552 | } |
1553 | #ifdef CONFIG_X86_64 | ||
1578 | if (!cpu_has_apic) { | 1554 | if (!cpu_has_apic) { |
1579 | disable_apic = 1; | 1555 | disable_apic = 1; |
1580 | pr_info("Apic disabled by BIOS\n"); | 1556 | pr_info("Apic disabled by BIOS\n"); |
@@ -1596,11 +1572,9 @@ int __init APIC_init_uniprocessor(void) | |||
1596 | } | 1572 | } |
1597 | #endif | 1573 | #endif |
1598 | 1574 | ||
1599 | #ifdef HAVE_X2APIC | ||
1600 | enable_IR_x2apic(); | 1575 | enable_IR_x2apic(); |
1601 | #endif | ||
1602 | #ifdef CONFIG_X86_64 | 1576 | #ifdef CONFIG_X86_64 |
1603 | setup_apic_routing(); | 1577 | default_setup_apic_routing(); |
1604 | #endif | 1578 | #endif |
1605 | 1579 | ||
1606 | verify_local_APIC(); | 1580 | verify_local_APIC(); |
@@ -1621,35 +1595,31 @@ int __init APIC_init_uniprocessor(void) | |||
1621 | physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); | 1595 | physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); |
1622 | setup_local_APIC(); | 1596 | setup_local_APIC(); |
1623 | 1597 | ||
1624 | #ifdef CONFIG_X86_64 | 1598 | #ifdef CONFIG_X86_IO_APIC |
1625 | /* | 1599 | /* |
1626 | * Now enable IO-APICs, actually call clear_IO_APIC | 1600 | * Now enable IO-APICs, actually call clear_IO_APIC |
1627 | * We need clear_IO_APIC before enabling vector on BP | 1601 | * We need clear_IO_APIC before enabling error vector |
1628 | */ | 1602 | */ |
1629 | if (!skip_ioapic_setup && nr_ioapics) | 1603 | if (!skip_ioapic_setup && nr_ioapics) |
1630 | enable_IO_APIC(); | 1604 | enable_IO_APIC(); |
1631 | #endif | 1605 | #endif |
1632 | 1606 | ||
1633 | #ifdef CONFIG_X86_IO_APIC | ||
1634 | if (!smp_found_config || skip_ioapic_setup || !nr_ioapics) | ||
1635 | #endif | ||
1636 | localise_nmi_watchdog(); | ||
1637 | end_local_APIC_setup(); | 1607 | end_local_APIC_setup(); |
1638 | 1608 | ||
1639 | #ifdef CONFIG_X86_IO_APIC | 1609 | #ifdef CONFIG_X86_IO_APIC |
1640 | if (smp_found_config && !skip_ioapic_setup && nr_ioapics) | 1610 | if (smp_found_config && !skip_ioapic_setup && nr_ioapics) |
1641 | setup_IO_APIC(); | 1611 | setup_IO_APIC(); |
1642 | # ifdef CONFIG_X86_64 | 1612 | else { |
1643 | else | ||
1644 | nr_ioapics = 0; | 1613 | nr_ioapics = 0; |
1645 | # endif | 1614 | localise_nmi_watchdog(); |
1615 | } | ||
1616 | #else | ||
1617 | localise_nmi_watchdog(); | ||
1646 | #endif | 1618 | #endif |
1647 | 1619 | ||
1620 | setup_boot_clock(); | ||
1648 | #ifdef CONFIG_X86_64 | 1621 | #ifdef CONFIG_X86_64 |
1649 | setup_boot_APIC_clock(); | ||
1650 | check_nmi_watchdog(); | 1622 | check_nmi_watchdog(); |
1651 | #else | ||
1652 | setup_boot_clock(); | ||
1653 | #endif | 1623 | #endif |
1654 | 1624 | ||
1655 | return 0; | 1625 | return 0; |
@@ -1738,7 +1708,8 @@ void __init connect_bsp_APIC(void) | |||
1738 | outb(0x01, 0x23); | 1708 | outb(0x01, 0x23); |
1739 | } | 1709 | } |
1740 | #endif | 1710 | #endif |
1741 | enable_apic_mode(); | 1711 | if (apic->enable_apic_mode) |
1712 | apic->enable_apic_mode(); | ||
1742 | } | 1713 | } |
1743 | 1714 | ||
1744 | /** | 1715 | /** |
@@ -1876,29 +1847,39 @@ void __cpuinit generic_processor_info(int apicid, int version) | |||
1876 | } | 1847 | } |
1877 | #endif | 1848 | #endif |
1878 | 1849 | ||
1879 | #if defined(CONFIG_X86_SMP) || defined(CONFIG_X86_64) | 1850 | #if defined(CONFIG_SMP) || defined(CONFIG_X86_64) |
1880 | /* are we being called early in kernel startup? */ | 1851 | early_per_cpu(x86_cpu_to_apicid, cpu) = apicid; |
1881 | if (early_per_cpu_ptr(x86_cpu_to_apicid)) { | 1852 | early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid; |
1882 | u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid); | ||
1883 | u16 *bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); | ||
1884 | |||
1885 | cpu_to_apicid[cpu] = apicid; | ||
1886 | bios_cpu_apicid[cpu] = apicid; | ||
1887 | } else { | ||
1888 | per_cpu(x86_cpu_to_apicid, cpu) = apicid; | ||
1889 | per_cpu(x86_bios_cpu_apicid, cpu) = apicid; | ||
1890 | } | ||
1891 | #endif | 1853 | #endif |
1892 | 1854 | ||
1893 | set_cpu_possible(cpu, true); | 1855 | set_cpu_possible(cpu, true); |
1894 | set_cpu_present(cpu, true); | 1856 | set_cpu_present(cpu, true); |
1895 | } | 1857 | } |
1896 | 1858 | ||
1897 | #ifdef CONFIG_X86_64 | ||
1898 | int hard_smp_processor_id(void) | 1859 | int hard_smp_processor_id(void) |
1899 | { | 1860 | { |
1900 | return read_apic_id(); | 1861 | return read_apic_id(); |
1901 | } | 1862 | } |
1863 | |||
1864 | void default_init_apic_ldr(void) | ||
1865 | { | ||
1866 | unsigned long val; | ||
1867 | |||
1868 | apic_write(APIC_DFR, APIC_DFR_VALUE); | ||
1869 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
1870 | val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); | ||
1871 | apic_write(APIC_LDR, val); | ||
1872 | } | ||
1873 | |||
1874 | #ifdef CONFIG_X86_32 | ||
1875 | int default_apicid_to_node(int logical_apicid) | ||
1876 | { | ||
1877 | #ifdef CONFIG_SMP | ||
1878 | return apicid_2_node[hard_smp_processor_id()]; | ||
1879 | #else | ||
1880 | return 0; | ||
1881 | #endif | ||
1882 | } | ||
1902 | #endif | 1883 | #endif |
1903 | 1884 | ||
1904 | /* | 1885 | /* |
@@ -1976,7 +1957,7 @@ static int lapic_resume(struct sys_device *dev) | |||
1976 | 1957 | ||
1977 | local_irq_save(flags); | 1958 | local_irq_save(flags); |
1978 | 1959 | ||
1979 | #ifdef HAVE_X2APIC | 1960 | #ifdef CONFIG_X86_X2APIC |
1980 | if (x2apic) | 1961 | if (x2apic) |
1981 | enable_x2apic(); | 1962 | enable_x2apic(); |
1982 | else | 1963 | else |
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c index 34185488e4fb..f933822dba18 100644 --- a/arch/x86/kernel/genapic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c | |||
@@ -17,9 +17,8 @@ | |||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/hardirq.h> | 18 | #include <linux/hardirq.h> |
19 | #include <asm/smp.h> | 19 | #include <asm/smp.h> |
20 | #include <asm/apic.h> | ||
20 | #include <asm/ipi.h> | 21 | #include <asm/ipi.h> |
21 | #include <asm/genapic.h> | ||
22 | #include <mach_apicdef.h> | ||
23 | 22 | ||
24 | #ifdef CONFIG_ACPI | 23 | #ifdef CONFIG_ACPI |
25 | #include <acpi/acpi_bus.h> | 24 | #include <acpi/acpi_bus.h> |
@@ -74,7 +73,7 @@ static inline void _flat_send_IPI_mask(unsigned long mask, int vector) | |||
74 | unsigned long flags; | 73 | unsigned long flags; |
75 | 74 | ||
76 | local_irq_save(flags); | 75 | local_irq_save(flags); |
77 | __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL); | 76 | __default_send_IPI_dest_field(mask, vector, apic->dest_logical); |
78 | local_irq_restore(flags); | 77 | local_irq_restore(flags); |
79 | } | 78 | } |
80 | 79 | ||
@@ -85,14 +84,15 @@ static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector) | |||
85 | _flat_send_IPI_mask(mask, vector); | 84 | _flat_send_IPI_mask(mask, vector); |
86 | } | 85 | } |
87 | 86 | ||
88 | static void flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, | 87 | static void |
89 | int vector) | 88 | flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector) |
90 | { | 89 | { |
91 | unsigned long mask = cpumask_bits(cpumask)[0]; | 90 | unsigned long mask = cpumask_bits(cpumask)[0]; |
92 | int cpu = smp_processor_id(); | 91 | int cpu = smp_processor_id(); |
93 | 92 | ||
94 | if (cpu < BITS_PER_LONG) | 93 | if (cpu < BITS_PER_LONG) |
95 | clear_bit(cpu, &mask); | 94 | clear_bit(cpu, &mask); |
95 | |||
96 | _flat_send_IPI_mask(mask, vector); | 96 | _flat_send_IPI_mask(mask, vector); |
97 | } | 97 | } |
98 | 98 | ||
@@ -114,23 +114,27 @@ static void flat_send_IPI_allbutself(int vector) | |||
114 | _flat_send_IPI_mask(mask, vector); | 114 | _flat_send_IPI_mask(mask, vector); |
115 | } | 115 | } |
116 | } else if (num_online_cpus() > 1) { | 116 | } else if (num_online_cpus() > 1) { |
117 | __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL); | 117 | __default_send_IPI_shortcut(APIC_DEST_ALLBUT, |
118 | vector, apic->dest_logical); | ||
118 | } | 119 | } |
119 | } | 120 | } |
120 | 121 | ||
121 | static void flat_send_IPI_all(int vector) | 122 | static void flat_send_IPI_all(int vector) |
122 | { | 123 | { |
123 | if (vector == NMI_VECTOR) | 124 | if (vector == NMI_VECTOR) { |
124 | flat_send_IPI_mask(cpu_online_mask, vector); | 125 | flat_send_IPI_mask(cpu_online_mask, vector); |
125 | else | 126 | } else { |
126 | __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL); | 127 | __default_send_IPI_shortcut(APIC_DEST_ALLINC, |
128 | vector, apic->dest_logical); | ||
129 | } | ||
127 | } | 130 | } |
128 | 131 | ||
129 | static unsigned int get_apic_id(unsigned long x) | 132 | static unsigned int flat_get_apic_id(unsigned long x) |
130 | { | 133 | { |
131 | unsigned int id; | 134 | unsigned int id; |
132 | 135 | ||
133 | id = (((x)>>24) & 0xFFu); | 136 | id = (((x)>>24) & 0xFFu); |
137 | |||
134 | return id; | 138 | return id; |
135 | } | 139 | } |
136 | 140 | ||
@@ -146,7 +150,7 @@ static unsigned int read_xapic_id(void) | |||
146 | { | 150 | { |
147 | unsigned int id; | 151 | unsigned int id; |
148 | 152 | ||
149 | id = get_apic_id(apic_read(APIC_ID)); | 153 | id = flat_get_apic_id(apic_read(APIC_ID)); |
150 | return id; | 154 | return id; |
151 | } | 155 | } |
152 | 156 | ||
@@ -169,31 +173,67 @@ static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
169 | return mask1 & mask2; | 173 | return mask1 & mask2; |
170 | } | 174 | } |
171 | 175 | ||
172 | static unsigned int phys_pkg_id(int index_msb) | 176 | static int flat_phys_pkg_id(int initial_apic_id, int index_msb) |
173 | { | 177 | { |
174 | return hard_smp_processor_id() >> index_msb; | 178 | return hard_smp_processor_id() >> index_msb; |
175 | } | 179 | } |
176 | 180 | ||
177 | struct genapic apic_flat = { | 181 | struct apic apic_flat = { |
178 | .name = "flat", | 182 | .name = "flat", |
179 | .acpi_madt_oem_check = flat_acpi_madt_oem_check, | 183 | .probe = NULL, |
180 | .int_delivery_mode = dest_LowestPrio, | 184 | .acpi_madt_oem_check = flat_acpi_madt_oem_check, |
181 | .int_dest_mode = (APIC_DEST_LOGICAL != 0), | 185 | .apic_id_registered = flat_apic_id_registered, |
182 | .target_cpus = flat_target_cpus, | 186 | |
183 | .vector_allocation_domain = flat_vector_allocation_domain, | 187 | .irq_delivery_mode = dest_LowestPrio, |
184 | .apic_id_registered = flat_apic_id_registered, | 188 | .irq_dest_mode = 1, /* logical */ |
185 | .init_apic_ldr = flat_init_apic_ldr, | 189 | |
186 | .send_IPI_all = flat_send_IPI_all, | 190 | .target_cpus = flat_target_cpus, |
187 | .send_IPI_allbutself = flat_send_IPI_allbutself, | 191 | .disable_esr = 0, |
188 | .send_IPI_mask = flat_send_IPI_mask, | 192 | .dest_logical = APIC_DEST_LOGICAL, |
189 | .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, | 193 | .check_apicid_used = NULL, |
190 | .send_IPI_self = apic_send_IPI_self, | 194 | .check_apicid_present = NULL, |
191 | .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, | 195 | |
192 | .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and, | 196 | .vector_allocation_domain = flat_vector_allocation_domain, |
193 | .phys_pkg_id = phys_pkg_id, | 197 | .init_apic_ldr = flat_init_apic_ldr, |
194 | .get_apic_id = get_apic_id, | 198 | |
195 | .set_apic_id = set_apic_id, | 199 | .ioapic_phys_id_map = NULL, |
196 | .apic_id_mask = (0xFFu<<24), | 200 | .setup_apic_routing = NULL, |
201 | .multi_timer_check = NULL, | ||
202 | .apicid_to_node = NULL, | ||
203 | .cpu_to_logical_apicid = NULL, | ||
204 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | ||
205 | .apicid_to_cpu_present = NULL, | ||
206 | .setup_portio_remap = NULL, | ||
207 | .check_phys_apicid_present = default_check_phys_apicid_present, | ||
208 | .enable_apic_mode = NULL, | ||
209 | .phys_pkg_id = flat_phys_pkg_id, | ||
210 | .mps_oem_check = NULL, | ||
211 | |||
212 | .get_apic_id = flat_get_apic_id, | ||
213 | .set_apic_id = set_apic_id, | ||
214 | .apic_id_mask = 0xFFu << 24, | ||
215 | |||
216 | .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, | ||
217 | .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and, | ||
218 | |||
219 | .send_IPI_mask = flat_send_IPI_mask, | ||
220 | .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, | ||
221 | .send_IPI_allbutself = flat_send_IPI_allbutself, | ||
222 | .send_IPI_all = flat_send_IPI_all, | ||
223 | .send_IPI_self = apic_send_IPI_self, | ||
224 | |||
225 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
226 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
227 | .wait_for_init_deassert = NULL, | ||
228 | .smp_callin_clear_local_apic = NULL, | ||
229 | .inquire_remote_apic = NULL, | ||
230 | |||
231 | .read = native_apic_mem_read, | ||
232 | .write = native_apic_mem_write, | ||
233 | .icr_read = native_apic_icr_read, | ||
234 | .icr_write = native_apic_icr_write, | ||
235 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
236 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
197 | }; | 237 | }; |
198 | 238 | ||
199 | /* | 239 | /* |
@@ -232,18 +272,18 @@ static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask) | |||
232 | 272 | ||
233 | static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector) | 273 | static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector) |
234 | { | 274 | { |
235 | send_IPI_mask_sequence(cpumask, vector); | 275 | default_send_IPI_mask_sequence_phys(cpumask, vector); |
236 | } | 276 | } |
237 | 277 | ||
238 | static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask, | 278 | static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask, |
239 | int vector) | 279 | int vector) |
240 | { | 280 | { |
241 | send_IPI_mask_allbutself(cpumask, vector); | 281 | default_send_IPI_mask_allbutself_phys(cpumask, vector); |
242 | } | 282 | } |
243 | 283 | ||
244 | static void physflat_send_IPI_allbutself(int vector) | 284 | static void physflat_send_IPI_allbutself(int vector) |
245 | { | 285 | { |
246 | send_IPI_mask_allbutself(cpu_online_mask, vector); | 286 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); |
247 | } | 287 | } |
248 | 288 | ||
249 | static void physflat_send_IPI_all(int vector) | 289 | static void physflat_send_IPI_all(int vector) |
@@ -276,32 +316,72 @@ physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
276 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | 316 | * We're using fixed IRQ delivery, can only return one phys APIC ID. |
277 | * May as well be the first. | 317 | * May as well be the first. |
278 | */ | 318 | */ |
279 | for_each_cpu_and(cpu, cpumask, andmask) | 319 | for_each_cpu_and(cpu, cpumask, andmask) { |
280 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 320 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
281 | break; | 321 | break; |
322 | } | ||
282 | if (cpu < nr_cpu_ids) | 323 | if (cpu < nr_cpu_ids) |
283 | return per_cpu(x86_cpu_to_apicid, cpu); | 324 | return per_cpu(x86_cpu_to_apicid, cpu); |
325 | |||
284 | return BAD_APICID; | 326 | return BAD_APICID; |
285 | } | 327 | } |
286 | 328 | ||
287 | struct genapic apic_physflat = { | 329 | struct apic apic_physflat = { |
288 | .name = "physical flat", | 330 | |
289 | .acpi_madt_oem_check = physflat_acpi_madt_oem_check, | 331 | .name = "physical flat", |
290 | .int_delivery_mode = dest_Fixed, | 332 | .probe = NULL, |
291 | .int_dest_mode = (APIC_DEST_PHYSICAL != 0), | 333 | .acpi_madt_oem_check = physflat_acpi_madt_oem_check, |
292 | .target_cpus = physflat_target_cpus, | 334 | .apic_id_registered = flat_apic_id_registered, |
293 | .vector_allocation_domain = physflat_vector_allocation_domain, | 335 | |
294 | .apic_id_registered = flat_apic_id_registered, | 336 | .irq_delivery_mode = dest_Fixed, |
295 | .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/ | 337 | .irq_dest_mode = 0, /* physical */ |
296 | .send_IPI_all = physflat_send_IPI_all, | 338 | |
297 | .send_IPI_allbutself = physflat_send_IPI_allbutself, | 339 | .target_cpus = physflat_target_cpus, |
298 | .send_IPI_mask = physflat_send_IPI_mask, | 340 | .disable_esr = 0, |
299 | .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself, | 341 | .dest_logical = 0, |
300 | .send_IPI_self = apic_send_IPI_self, | 342 | .check_apicid_used = NULL, |
301 | .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, | 343 | .check_apicid_present = NULL, |
302 | .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and, | 344 | |
303 | .phys_pkg_id = phys_pkg_id, | 345 | .vector_allocation_domain = physflat_vector_allocation_domain, |
304 | .get_apic_id = get_apic_id, | 346 | /* not needed, but shouldn't hurt: */ |
305 | .set_apic_id = set_apic_id, | 347 | .init_apic_ldr = flat_init_apic_ldr, |
306 | .apic_id_mask = (0xFFu<<24), | 348 | |
349 | .ioapic_phys_id_map = NULL, | ||
350 | .setup_apic_routing = NULL, | ||
351 | .multi_timer_check = NULL, | ||
352 | .apicid_to_node = NULL, | ||
353 | .cpu_to_logical_apicid = NULL, | ||
354 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | ||
355 | .apicid_to_cpu_present = NULL, | ||
356 | .setup_portio_remap = NULL, | ||
357 | .check_phys_apicid_present = default_check_phys_apicid_present, | ||
358 | .enable_apic_mode = NULL, | ||
359 | .phys_pkg_id = flat_phys_pkg_id, | ||
360 | .mps_oem_check = NULL, | ||
361 | |||
362 | .get_apic_id = flat_get_apic_id, | ||
363 | .set_apic_id = set_apic_id, | ||
364 | .apic_id_mask = 0xFFu << 24, | ||
365 | |||
366 | .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, | ||
367 | .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and, | ||
368 | |||
369 | .send_IPI_mask = physflat_send_IPI_mask, | ||
370 | .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself, | ||
371 | .send_IPI_allbutself = physflat_send_IPI_allbutself, | ||
372 | .send_IPI_all = physflat_send_IPI_all, | ||
373 | .send_IPI_self = apic_send_IPI_self, | ||
374 | |||
375 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
376 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
377 | .wait_for_init_deassert = NULL, | ||
378 | .smp_callin_clear_local_apic = NULL, | ||
379 | .inquire_remote_apic = NULL, | ||
380 | |||
381 | .read = native_apic_mem_read, | ||
382 | .write = native_apic_mem_write, | ||
383 | .icr_read = native_apic_icr_read, | ||
384 | .icr_write = native_apic_icr_write, | ||
385 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
386 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
307 | }; | 387 | }; |
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c new file mode 100644 index 000000000000..d806ecaa948f --- /dev/null +++ b/arch/x86/kernel/apic/bigsmp_32.c | |||
@@ -0,0 +1,267 @@ | |||
1 | /* | ||
2 | * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs. | ||
3 | * | ||
4 | * Drives the local APIC in "clustered mode". | ||
5 | */ | ||
6 | #include <linux/threads.h> | ||
7 | #include <linux/cpumask.h> | ||
8 | #include <linux/kernel.h> | ||
9 | #include <linux/init.h> | ||
10 | #include <linux/dmi.h> | ||
11 | #include <linux/smp.h> | ||
12 | |||
13 | #include <asm/apicdef.h> | ||
14 | #include <asm/fixmap.h> | ||
15 | #include <asm/mpspec.h> | ||
16 | #include <asm/apic.h> | ||
17 | #include <asm/ipi.h> | ||
18 | |||
19 | static unsigned bigsmp_get_apic_id(unsigned long x) | ||
20 | { | ||
21 | return (x >> 24) & 0xFF; | ||
22 | } | ||
23 | |||
24 | static int bigsmp_apic_id_registered(void) | ||
25 | { | ||
26 | return 1; | ||
27 | } | ||
28 | |||
29 | static const cpumask_t *bigsmp_target_cpus(void) | ||
30 | { | ||
31 | #ifdef CONFIG_SMP | ||
32 | return &cpu_online_map; | ||
33 | #else | ||
34 | return &cpumask_of_cpu(0); | ||
35 | #endif | ||
36 | } | ||
37 | |||
38 | static unsigned long bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid) | ||
39 | { | ||
40 | return 0; | ||
41 | } | ||
42 | |||
43 | static unsigned long bigsmp_check_apicid_present(int bit) | ||
44 | { | ||
45 | return 1; | ||
46 | } | ||
47 | |||
48 | static inline unsigned long calculate_ldr(int cpu) | ||
49 | { | ||
50 | unsigned long val, id; | ||
51 | |||
52 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
53 | id = per_cpu(x86_bios_cpu_apicid, cpu); | ||
54 | val |= SET_APIC_LOGICAL_ID(id); | ||
55 | |||
56 | return val; | ||
57 | } | ||
58 | |||
59 | /* | ||
60 | * Set up the logical destination ID. | ||
61 | * | ||
62 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
63 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
64 | * document number 292116). So here it goes... | ||
65 | */ | ||
66 | static void bigsmp_init_apic_ldr(void) | ||
67 | { | ||
68 | unsigned long val; | ||
69 | int cpu = smp_processor_id(); | ||
70 | |||
71 | apic_write(APIC_DFR, APIC_DFR_FLAT); | ||
72 | val = calculate_ldr(cpu); | ||
73 | apic_write(APIC_LDR, val); | ||
74 | } | ||
75 | |||
76 | static void bigsmp_setup_apic_routing(void) | ||
77 | { | ||
78 | printk(KERN_INFO | ||
79 | "Enabling APIC mode: Physflat. Using %d I/O APICs\n", | ||
80 | nr_ioapics); | ||
81 | } | ||
82 | |||
83 | static int bigsmp_apicid_to_node(int logical_apicid) | ||
84 | { | ||
85 | return apicid_2_node[hard_smp_processor_id()]; | ||
86 | } | ||
87 | |||
88 | static int bigsmp_cpu_present_to_apicid(int mps_cpu) | ||
89 | { | ||
90 | if (mps_cpu < nr_cpu_ids) | ||
91 | return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
92 | |||
93 | return BAD_APICID; | ||
94 | } | ||
95 | |||
96 | static physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid) | ||
97 | { | ||
98 | return physid_mask_of_physid(phys_apicid); | ||
99 | } | ||
100 | |||
101 | /* Mapping from cpu number to logical apicid */ | ||
102 | static inline int bigsmp_cpu_to_logical_apicid(int cpu) | ||
103 | { | ||
104 | if (cpu >= nr_cpu_ids) | ||
105 | return BAD_APICID; | ||
106 | return cpu_physical_id(cpu); | ||
107 | } | ||
108 | |||
109 | static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map) | ||
110 | { | ||
111 | /* For clustered we don't have a good way to do this yet - hack */ | ||
112 | return physids_promote(0xFFL); | ||
113 | } | ||
114 | |||
115 | static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
116 | { | ||
117 | return 1; | ||
118 | } | ||
119 | |||
120 | /* As we are using single CPU as destination, pick only one CPU here */ | ||
121 | static unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
122 | { | ||
123 | return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask)); | ||
124 | } | ||
125 | |||
126 | static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
127 | const struct cpumask *andmask) | ||
128 | { | ||
129 | int cpu; | ||
130 | |||
131 | /* | ||
132 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
133 | * May as well be the first. | ||
134 | */ | ||
135 | for_each_cpu_and(cpu, cpumask, andmask) { | ||
136 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | ||
137 | break; | ||
138 | } | ||
139 | if (cpu < nr_cpu_ids) | ||
140 | return bigsmp_cpu_to_logical_apicid(cpu); | ||
141 | |||
142 | return BAD_APICID; | ||
143 | } | ||
144 | |||
145 | static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb) | ||
146 | { | ||
147 | return cpuid_apic >> index_msb; | ||
148 | } | ||
149 | |||
150 | static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector) | ||
151 | { | ||
152 | default_send_IPI_mask_sequence_phys(mask, vector); | ||
153 | } | ||
154 | |||
155 | static void bigsmp_send_IPI_allbutself(int vector) | ||
156 | { | ||
157 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); | ||
158 | } | ||
159 | |||
160 | static void bigsmp_send_IPI_all(int vector) | ||
161 | { | ||
162 | bigsmp_send_IPI_mask(cpu_online_mask, vector); | ||
163 | } | ||
164 | |||
165 | static int dmi_bigsmp; /* can be set by dmi scanners */ | ||
166 | |||
167 | static int hp_ht_bigsmp(const struct dmi_system_id *d) | ||
168 | { | ||
169 | printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident); | ||
170 | dmi_bigsmp = 1; | ||
171 | |||
172 | return 0; | ||
173 | } | ||
174 | |||
175 | |||
176 | static const struct dmi_system_id bigsmp_dmi_table[] = { | ||
177 | { hp_ht_bigsmp, "HP ProLiant DL760 G2", | ||
178 | { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), | ||
179 | DMI_MATCH(DMI_BIOS_VERSION, "P44-"), | ||
180 | } | ||
181 | }, | ||
182 | |||
183 | { hp_ht_bigsmp, "HP ProLiant DL740", | ||
184 | { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), | ||
185 | DMI_MATCH(DMI_BIOS_VERSION, "P47-"), | ||
186 | } | ||
187 | }, | ||
188 | { } /* NULL entry stops DMI scanning */ | ||
189 | }; | ||
190 | |||
191 | static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
192 | { | ||
193 | cpus_clear(*retmask); | ||
194 | cpu_set(cpu, *retmask); | ||
195 | } | ||
196 | |||
197 | static int probe_bigsmp(void) | ||
198 | { | ||
199 | if (def_to_bigsmp) | ||
200 | dmi_bigsmp = 1; | ||
201 | else | ||
202 | dmi_check_system(bigsmp_dmi_table); | ||
203 | |||
204 | return dmi_bigsmp; | ||
205 | } | ||
206 | |||
207 | struct apic apic_bigsmp = { | ||
208 | |||
209 | .name = "bigsmp", | ||
210 | .probe = probe_bigsmp, | ||
211 | .acpi_madt_oem_check = NULL, | ||
212 | .apic_id_registered = bigsmp_apic_id_registered, | ||
213 | |||
214 | .irq_delivery_mode = dest_Fixed, | ||
215 | /* phys delivery to target CPU: */ | ||
216 | .irq_dest_mode = 0, | ||
217 | |||
218 | .target_cpus = bigsmp_target_cpus, | ||
219 | .disable_esr = 1, | ||
220 | .dest_logical = 0, | ||
221 | .check_apicid_used = bigsmp_check_apicid_used, | ||
222 | .check_apicid_present = bigsmp_check_apicid_present, | ||
223 | |||
224 | .vector_allocation_domain = bigsmp_vector_allocation_domain, | ||
225 | .init_apic_ldr = bigsmp_init_apic_ldr, | ||
226 | |||
227 | .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, | ||
228 | .setup_apic_routing = bigsmp_setup_apic_routing, | ||
229 | .multi_timer_check = NULL, | ||
230 | .apicid_to_node = bigsmp_apicid_to_node, | ||
231 | .cpu_to_logical_apicid = bigsmp_cpu_to_logical_apicid, | ||
232 | .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid, | ||
233 | .apicid_to_cpu_present = bigsmp_apicid_to_cpu_present, | ||
234 | .setup_portio_remap = NULL, | ||
235 | .check_phys_apicid_present = bigsmp_check_phys_apicid_present, | ||
236 | .enable_apic_mode = NULL, | ||
237 | .phys_pkg_id = bigsmp_phys_pkg_id, | ||
238 | .mps_oem_check = NULL, | ||
239 | |||
240 | .get_apic_id = bigsmp_get_apic_id, | ||
241 | .set_apic_id = NULL, | ||
242 | .apic_id_mask = 0xFF << 24, | ||
243 | |||
244 | .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid, | ||
245 | .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and, | ||
246 | |||
247 | .send_IPI_mask = bigsmp_send_IPI_mask, | ||
248 | .send_IPI_mask_allbutself = NULL, | ||
249 | .send_IPI_allbutself = bigsmp_send_IPI_allbutself, | ||
250 | .send_IPI_all = bigsmp_send_IPI_all, | ||
251 | .send_IPI_self = default_send_IPI_self, | ||
252 | |||
253 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
254 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
255 | |||
256 | .wait_for_init_deassert = default_wait_for_init_deassert, | ||
257 | |||
258 | .smp_callin_clear_local_apic = NULL, | ||
259 | .inquire_remote_apic = default_inquire_remote_apic, | ||
260 | |||
261 | .read = native_apic_mem_read, | ||
262 | .write = native_apic_mem_write, | ||
263 | .icr_read = native_apic_icr_read, | ||
264 | .icr_write = native_apic_icr_write, | ||
265 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
266 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
267 | }; | ||
diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c new file mode 100644 index 000000000000..19588f2770ee --- /dev/null +++ b/arch/x86/kernel/apic/es7000_32.c | |||
@@ -0,0 +1,780 @@ | |||
1 | /* | ||
2 | * Written by: Garry Forsgren, Unisys Corporation | ||
3 | * Natalie Protasevich, Unisys Corporation | ||
4 | * | ||
5 | * This file contains the code to configure and interface | ||
6 | * with Unisys ES7000 series hardware system manager. | ||
7 | * | ||
8 | * Copyright (c) 2003 Unisys Corporation. | ||
9 | * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar | ||
10 | * | ||
11 | * All Rights Reserved. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify it | ||
14 | * under the terms of version 2 of the GNU General Public License as | ||
15 | * published by the Free Software Foundation. | ||
16 | * | ||
17 | * This program is distributed in the hope that it would be useful, but | ||
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License along | ||
22 | * with this program; if not, write the Free Software Foundation, Inc., 59 | ||
23 | * Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
24 | * | ||
25 | * Contact information: Unisys Corporation, Township Line & Union Meeting | ||
26 | * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: | ||
27 | * | ||
28 | * http://www.unisys.com | ||
29 | */ | ||
30 | #include <linux/notifier.h> | ||
31 | #include <linux/spinlock.h> | ||
32 | #include <linux/cpumask.h> | ||
33 | #include <linux/threads.h> | ||
34 | #include <linux/kernel.h> | ||
35 | #include <linux/module.h> | ||
36 | #include <linux/reboot.h> | ||
37 | #include <linux/string.h> | ||
38 | #include <linux/types.h> | ||
39 | #include <linux/errno.h> | ||
40 | #include <linux/acpi.h> | ||
41 | #include <linux/init.h> | ||
42 | #include <linux/nmi.h> | ||
43 | #include <linux/smp.h> | ||
44 | #include <linux/io.h> | ||
45 | |||
46 | #include <asm/apicdef.h> | ||
47 | #include <asm/atomic.h> | ||
48 | #include <asm/fixmap.h> | ||
49 | #include <asm/mpspec.h> | ||
50 | #include <asm/setup.h> | ||
51 | #include <asm/apic.h> | ||
52 | #include <asm/ipi.h> | ||
53 | |||
54 | /* | ||
55 | * ES7000 chipsets | ||
56 | */ | ||
57 | |||
58 | #define NON_UNISYS 0 | ||
59 | #define ES7000_CLASSIC 1 | ||
60 | #define ES7000_ZORRO 2 | ||
61 | |||
62 | #define MIP_REG 1 | ||
63 | #define MIP_PSAI_REG 4 | ||
64 | |||
65 | #define MIP_BUSY 1 | ||
66 | #define MIP_SPIN 0xf0000 | ||
67 | #define MIP_VALID 0x0100000000000000ULL | ||
68 | #define MIP_SW_APIC 0x1020b | ||
69 | |||
70 | #define MIP_PORT(val) ((val >> 32) & 0xffff) | ||
71 | |||
72 | #define MIP_RD_LO(val) (val & 0xffffffff) | ||
73 | |||
74 | struct mip_reg { | ||
75 | unsigned long long off_0x00; | ||
76 | unsigned long long off_0x08; | ||
77 | unsigned long long off_0x10; | ||
78 | unsigned long long off_0x18; | ||
79 | unsigned long long off_0x20; | ||
80 | unsigned long long off_0x28; | ||
81 | unsigned long long off_0x30; | ||
82 | unsigned long long off_0x38; | ||
83 | }; | ||
84 | |||
85 | struct mip_reg_info { | ||
86 | unsigned long long mip_info; | ||
87 | unsigned long long delivery_info; | ||
88 | unsigned long long host_reg; | ||
89 | unsigned long long mip_reg; | ||
90 | }; | ||
91 | |||
92 | struct psai { | ||
93 | unsigned long long entry_type; | ||
94 | unsigned long long addr; | ||
95 | unsigned long long bep_addr; | ||
96 | }; | ||
97 | |||
98 | #ifdef CONFIG_ACPI | ||
99 | |||
100 | struct es7000_oem_table { | ||
101 | struct acpi_table_header Header; | ||
102 | u32 OEMTableAddr; | ||
103 | u32 OEMTableSize; | ||
104 | }; | ||
105 | |||
106 | static unsigned long oem_addrX; | ||
107 | static unsigned long oem_size; | ||
108 | |||
109 | #endif | ||
110 | |||
111 | /* | ||
112 | * ES7000 Globals | ||
113 | */ | ||
114 | |||
115 | static volatile unsigned long *psai; | ||
116 | static struct mip_reg *mip_reg; | ||
117 | static struct mip_reg *host_reg; | ||
118 | static int mip_port; | ||
119 | static unsigned long mip_addr; | ||
120 | static unsigned long host_addr; | ||
121 | |||
122 | int es7000_plat; | ||
123 | |||
124 | /* | ||
125 | * GSI override for ES7000 platforms. | ||
126 | */ | ||
127 | |||
128 | static unsigned int base; | ||
129 | |||
130 | static int | ||
131 | es7000_rename_gsi(int ioapic, int gsi) | ||
132 | { | ||
133 | if (es7000_plat == ES7000_ZORRO) | ||
134 | return gsi; | ||
135 | |||
136 | if (!base) { | ||
137 | int i; | ||
138 | for (i = 0; i < nr_ioapics; i++) | ||
139 | base += nr_ioapic_registers[i]; | ||
140 | } | ||
141 | |||
142 | if (!ioapic && (gsi < 16)) | ||
143 | gsi += base; | ||
144 | |||
145 | return gsi; | ||
146 | } | ||
147 | |||
148 | static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) | ||
149 | { | ||
150 | unsigned long vect = 0, psaival = 0; | ||
151 | |||
152 | if (psai == NULL) | ||
153 | return -1; | ||
154 | |||
155 | vect = ((unsigned long)__pa(eip)/0x1000) << 16; | ||
156 | psaival = (0x1000000 | vect | cpu); | ||
157 | |||
158 | while (*psai & 0x1000000) | ||
159 | ; | ||
160 | |||
161 | *psai = psaival; | ||
162 | |||
163 | return 0; | ||
164 | } | ||
165 | |||
166 | static int es7000_apic_is_cluster(void) | ||
167 | { | ||
168 | /* MPENTIUMIII */ | ||
169 | if (boot_cpu_data.x86 == 6 && | ||
170 | (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) | ||
171 | return 1; | ||
172 | |||
173 | return 0; | ||
174 | } | ||
175 | |||
176 | static void setup_unisys(void) | ||
177 | { | ||
178 | /* | ||
179 | * Determine the generation of the ES7000 currently running. | ||
180 | * | ||
181 | * es7000_plat = 1 if the machine is a 5xx ES7000 box | ||
182 | * es7000_plat = 2 if the machine is a x86_64 ES7000 box | ||
183 | * | ||
184 | */ | ||
185 | if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2)) | ||
186 | es7000_plat = ES7000_ZORRO; | ||
187 | else | ||
188 | es7000_plat = ES7000_CLASSIC; | ||
189 | ioapic_renumber_irq = es7000_rename_gsi; | ||
190 | } | ||
191 | |||
192 | /* | ||
193 | * Parse the OEM Table: | ||
194 | */ | ||
195 | static int parse_unisys_oem(char *oemptr) | ||
196 | { | ||
197 | int i; | ||
198 | int success = 0; | ||
199 | unsigned char type, size; | ||
200 | unsigned long val; | ||
201 | char *tp = NULL; | ||
202 | struct psai *psaip = NULL; | ||
203 | struct mip_reg_info *mi; | ||
204 | struct mip_reg *host, *mip; | ||
205 | |||
206 | tp = oemptr; | ||
207 | |||
208 | tp += 8; | ||
209 | |||
210 | for (i = 0; i <= 6; i++) { | ||
211 | type = *tp++; | ||
212 | size = *tp++; | ||
213 | tp -= 2; | ||
214 | switch (type) { | ||
215 | case MIP_REG: | ||
216 | mi = (struct mip_reg_info *)tp; | ||
217 | val = MIP_RD_LO(mi->host_reg); | ||
218 | host_addr = val; | ||
219 | host = (struct mip_reg *)val; | ||
220 | host_reg = __va(host); | ||
221 | val = MIP_RD_LO(mi->mip_reg); | ||
222 | mip_port = MIP_PORT(mi->mip_info); | ||
223 | mip_addr = val; | ||
224 | mip = (struct mip_reg *)val; | ||
225 | mip_reg = __va(mip); | ||
226 | pr_debug("es7000_mipcfg: host_reg = 0x%lx \n", | ||
227 | (unsigned long)host_reg); | ||
228 | pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n", | ||
229 | (unsigned long)mip_reg); | ||
230 | success++; | ||
231 | break; | ||
232 | case MIP_PSAI_REG: | ||
233 | psaip = (struct psai *)tp; | ||
234 | if (tp != NULL) { | ||
235 | if (psaip->addr) | ||
236 | psai = __va(psaip->addr); | ||
237 | else | ||
238 | psai = NULL; | ||
239 | success++; | ||
240 | } | ||
241 | break; | ||
242 | default: | ||
243 | break; | ||
244 | } | ||
245 | tp += size; | ||
246 | } | ||
247 | |||
248 | if (success < 2) | ||
249 | es7000_plat = NON_UNISYS; | ||
250 | else | ||
251 | setup_unisys(); | ||
252 | |||
253 | return es7000_plat; | ||
254 | } | ||
255 | |||
256 | #ifdef CONFIG_ACPI | ||
257 | static int find_unisys_acpi_oem_table(unsigned long *oem_addr) | ||
258 | { | ||
259 | struct acpi_table_header *header = NULL; | ||
260 | struct es7000_oem_table *table; | ||
261 | acpi_size tbl_size; | ||
262 | acpi_status ret; | ||
263 | int i = 0; | ||
264 | |||
265 | for (;;) { | ||
266 | ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size); | ||
267 | if (!ACPI_SUCCESS(ret)) | ||
268 | return -1; | ||
269 | |||
270 | if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) | ||
271 | break; | ||
272 | |||
273 | early_acpi_os_unmap_memory(header, tbl_size); | ||
274 | } | ||
275 | |||
276 | table = (void *)header; | ||
277 | |||
278 | oem_addrX = table->OEMTableAddr; | ||
279 | oem_size = table->OEMTableSize; | ||
280 | |||
281 | early_acpi_os_unmap_memory(header, tbl_size); | ||
282 | |||
283 | *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, oem_size); | ||
284 | |||
285 | return 0; | ||
286 | } | ||
287 | |||
288 | static void unmap_unisys_acpi_oem_table(unsigned long oem_addr) | ||
289 | { | ||
290 | if (!oem_addr) | ||
291 | return; | ||
292 | |||
293 | __acpi_unmap_table((char *)oem_addr, oem_size); | ||
294 | } | ||
295 | |||
296 | static int es7000_check_dsdt(void) | ||
297 | { | ||
298 | struct acpi_table_header header; | ||
299 | |||
300 | if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) && | ||
301 | !strncmp(header.oem_id, "UNISYS", 6)) | ||
302 | return 1; | ||
303 | return 0; | ||
304 | } | ||
305 | |||
306 | static int es7000_acpi_ret; | ||
307 | |||
308 | /* Hook from generic ACPI tables.c */ | ||
309 | static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
310 | { | ||
311 | unsigned long oem_addr = 0; | ||
312 | int check_dsdt; | ||
313 | int ret = 0; | ||
314 | |||
315 | /* check dsdt at first to avoid clear fix_map for oem_addr */ | ||
316 | check_dsdt = es7000_check_dsdt(); | ||
317 | |||
318 | if (!find_unisys_acpi_oem_table(&oem_addr)) { | ||
319 | if (check_dsdt) { | ||
320 | ret = parse_unisys_oem((char *)oem_addr); | ||
321 | } else { | ||
322 | setup_unisys(); | ||
323 | ret = 1; | ||
324 | } | ||
325 | /* | ||
326 | * we need to unmap it | ||
327 | */ | ||
328 | unmap_unisys_acpi_oem_table(oem_addr); | ||
329 | } | ||
330 | |||
331 | es7000_acpi_ret = ret; | ||
332 | |||
333 | return ret && !es7000_apic_is_cluster(); | ||
334 | } | ||
335 | |||
336 | static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id) | ||
337 | { | ||
338 | int ret = es7000_acpi_ret; | ||
339 | |||
340 | return ret && es7000_apic_is_cluster(); | ||
341 | } | ||
342 | |||
343 | #else /* !CONFIG_ACPI: */ | ||
344 | static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
345 | { | ||
346 | return 0; | ||
347 | } | ||
348 | |||
349 | static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id) | ||
350 | { | ||
351 | return 0; | ||
352 | } | ||
353 | #endif /* !CONFIG_ACPI */ | ||
354 | |||
355 | static void es7000_spin(int n) | ||
356 | { | ||
357 | int i = 0; | ||
358 | |||
359 | while (i++ < n) | ||
360 | rep_nop(); | ||
361 | } | ||
362 | |||
363 | static int es7000_mip_write(struct mip_reg *mip_reg) | ||
364 | { | ||
365 | int status = 0; | ||
366 | int spin; | ||
367 | |||
368 | spin = MIP_SPIN; | ||
369 | while ((host_reg->off_0x38 & MIP_VALID) != 0) { | ||
370 | if (--spin <= 0) { | ||
371 | WARN(1, "Timeout waiting for Host Valid Flag\n"); | ||
372 | return -1; | ||
373 | } | ||
374 | es7000_spin(MIP_SPIN); | ||
375 | } | ||
376 | |||
377 | memcpy(host_reg, mip_reg, sizeof(struct mip_reg)); | ||
378 | outb(1, mip_port); | ||
379 | |||
380 | spin = MIP_SPIN; | ||
381 | |||
382 | while ((mip_reg->off_0x38 & MIP_VALID) == 0) { | ||
383 | if (--spin <= 0) { | ||
384 | WARN(1, "Timeout waiting for MIP Valid Flag\n"); | ||
385 | return -1; | ||
386 | } | ||
387 | es7000_spin(MIP_SPIN); | ||
388 | } | ||
389 | |||
390 | status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48; | ||
391 | mip_reg->off_0x38 &= ~MIP_VALID; | ||
392 | |||
393 | return status; | ||
394 | } | ||
395 | |||
396 | static void es7000_enable_apic_mode(void) | ||
397 | { | ||
398 | struct mip_reg es7000_mip_reg; | ||
399 | int mip_status; | ||
400 | |||
401 | if (!es7000_plat) | ||
402 | return; | ||
403 | |||
404 | printk(KERN_INFO "ES7000: Enabling APIC mode.\n"); | ||
405 | memset(&es7000_mip_reg, 0, sizeof(struct mip_reg)); | ||
406 | es7000_mip_reg.off_0x00 = MIP_SW_APIC; | ||
407 | es7000_mip_reg.off_0x38 = MIP_VALID; | ||
408 | |||
409 | while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) | ||
410 | WARN(1, "Command failed, status = %x\n", mip_status); | ||
411 | } | ||
412 | |||
413 | static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
414 | { | ||
415 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
416 | * specified in the interrupt destination when using lowest | ||
417 | * priority interrupt delivery mode. | ||
418 | * | ||
419 | * In particular there was a hyperthreading cpu observed to | ||
420 | * deliver interrupts to the wrong hyperthread when only one | ||
421 | * hyperthread was specified in the interrupt desitination. | ||
422 | */ | ||
423 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | ||
424 | } | ||
425 | |||
426 | |||
427 | static void es7000_wait_for_init_deassert(atomic_t *deassert) | ||
428 | { | ||
429 | while (!atomic_read(deassert)) | ||
430 | cpu_relax(); | ||
431 | } | ||
432 | |||
433 | static unsigned int es7000_get_apic_id(unsigned long x) | ||
434 | { | ||
435 | return (x >> 24) & 0xFF; | ||
436 | } | ||
437 | |||
438 | static void es7000_send_IPI_mask(const struct cpumask *mask, int vector) | ||
439 | { | ||
440 | default_send_IPI_mask_sequence_phys(mask, vector); | ||
441 | } | ||
442 | |||
443 | static void es7000_send_IPI_allbutself(int vector) | ||
444 | { | ||
445 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); | ||
446 | } | ||
447 | |||
448 | static void es7000_send_IPI_all(int vector) | ||
449 | { | ||
450 | es7000_send_IPI_mask(cpu_online_mask, vector); | ||
451 | } | ||
452 | |||
453 | static int es7000_apic_id_registered(void) | ||
454 | { | ||
455 | return 1; | ||
456 | } | ||
457 | |||
458 | static const cpumask_t *target_cpus_cluster(void) | ||
459 | { | ||
460 | return &CPU_MASK_ALL; | ||
461 | } | ||
462 | |||
463 | static const cpumask_t *es7000_target_cpus(void) | ||
464 | { | ||
465 | return &cpumask_of_cpu(smp_processor_id()); | ||
466 | } | ||
467 | |||
468 | static unsigned long | ||
469 | es7000_check_apicid_used(physid_mask_t bitmap, int apicid) | ||
470 | { | ||
471 | return 0; | ||
472 | } | ||
473 | static unsigned long es7000_check_apicid_present(int bit) | ||
474 | { | ||
475 | return physid_isset(bit, phys_cpu_present_map); | ||
476 | } | ||
477 | |||
478 | static unsigned long calculate_ldr(int cpu) | ||
479 | { | ||
480 | unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu); | ||
481 | |||
482 | return SET_APIC_LOGICAL_ID(id); | ||
483 | } | ||
484 | |||
485 | /* | ||
486 | * Set up the logical destination ID. | ||
487 | * | ||
488 | * Intel recommends to set DFR, LdR and TPR before enabling | ||
489 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
490 | * document number 292116). So here it goes... | ||
491 | */ | ||
492 | static void es7000_init_apic_ldr_cluster(void) | ||
493 | { | ||
494 | unsigned long val; | ||
495 | int cpu = smp_processor_id(); | ||
496 | |||
497 | apic_write(APIC_DFR, APIC_DFR_CLUSTER); | ||
498 | val = calculate_ldr(cpu); | ||
499 | apic_write(APIC_LDR, val); | ||
500 | } | ||
501 | |||
502 | static void es7000_init_apic_ldr(void) | ||
503 | { | ||
504 | unsigned long val; | ||
505 | int cpu = smp_processor_id(); | ||
506 | |||
507 | apic_write(APIC_DFR, APIC_DFR_FLAT); | ||
508 | val = calculate_ldr(cpu); | ||
509 | apic_write(APIC_LDR, val); | ||
510 | } | ||
511 | |||
512 | static void es7000_setup_apic_routing(void) | ||
513 | { | ||
514 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | ||
515 | |||
516 | printk(KERN_INFO | ||
517 | "Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", | ||
518 | (apic_version[apic] == 0x14) ? | ||
519 | "Physical Cluster" : "Logical Cluster", | ||
520 | nr_ioapics, cpus_addr(*es7000_target_cpus())[0]); | ||
521 | } | ||
522 | |||
523 | static int es7000_apicid_to_node(int logical_apicid) | ||
524 | { | ||
525 | return 0; | ||
526 | } | ||
527 | |||
528 | |||
529 | static int es7000_cpu_present_to_apicid(int mps_cpu) | ||
530 | { | ||
531 | if (!mps_cpu) | ||
532 | return boot_cpu_physical_apicid; | ||
533 | else if (mps_cpu < nr_cpu_ids) | ||
534 | return per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
535 | else | ||
536 | return BAD_APICID; | ||
537 | } | ||
538 | |||
539 | static int cpu_id; | ||
540 | |||
541 | static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid) | ||
542 | { | ||
543 | physid_mask_t mask; | ||
544 | |||
545 | mask = physid_mask_of_physid(cpu_id); | ||
546 | ++cpu_id; | ||
547 | |||
548 | return mask; | ||
549 | } | ||
550 | |||
551 | /* Mapping from cpu number to logical apicid */ | ||
552 | static int es7000_cpu_to_logical_apicid(int cpu) | ||
553 | { | ||
554 | #ifdef CONFIG_SMP | ||
555 | if (cpu >= nr_cpu_ids) | ||
556 | return BAD_APICID; | ||
557 | return cpu_2_logical_apicid[cpu]; | ||
558 | #else | ||
559 | return logical_smp_processor_id(); | ||
560 | #endif | ||
561 | } | ||
562 | |||
563 | static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map) | ||
564 | { | ||
565 | /* For clustered we don't have a good way to do this yet - hack */ | ||
566 | return physids_promote(0xff); | ||
567 | } | ||
568 | |||
569 | static int es7000_check_phys_apicid_present(int cpu_physical_apicid) | ||
570 | { | ||
571 | boot_cpu_physical_apicid = read_apic_id(); | ||
572 | return 1; | ||
573 | } | ||
574 | |||
575 | static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
576 | { | ||
577 | unsigned int round = 0; | ||
578 | int cpu, uninitialized_var(apicid); | ||
579 | |||
580 | /* | ||
581 | * The cpus in the mask must all be on the apic cluster. | ||
582 | */ | ||
583 | for_each_cpu(cpu, cpumask) { | ||
584 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | ||
585 | |||
586 | if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { | ||
587 | WARN(1, "Not a valid mask!"); | ||
588 | |||
589 | return BAD_APICID; | ||
590 | } | ||
591 | apicid = new_apicid; | ||
592 | round++; | ||
593 | } | ||
594 | return apicid; | ||
595 | } | ||
596 | |||
597 | static unsigned int | ||
598 | es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask, | ||
599 | const struct cpumask *andmask) | ||
600 | { | ||
601 | int apicid = es7000_cpu_to_logical_apicid(0); | ||
602 | cpumask_var_t cpumask; | ||
603 | |||
604 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | ||
605 | return apicid; | ||
606 | |||
607 | cpumask_and(cpumask, inmask, andmask); | ||
608 | cpumask_and(cpumask, cpumask, cpu_online_mask); | ||
609 | apicid = es7000_cpu_mask_to_apicid(cpumask); | ||
610 | |||
611 | free_cpumask_var(cpumask); | ||
612 | |||
613 | return apicid; | ||
614 | } | ||
615 | |||
616 | static int es7000_phys_pkg_id(int cpuid_apic, int index_msb) | ||
617 | { | ||
618 | return cpuid_apic >> index_msb; | ||
619 | } | ||
620 | |||
621 | static int probe_es7000(void) | ||
622 | { | ||
623 | /* probed later in mptable/ACPI hooks */ | ||
624 | return 0; | ||
625 | } | ||
626 | |||
627 | static int es7000_mps_ret; | ||
628 | static int es7000_mps_oem_check(struct mpc_table *mpc, char *oem, | ||
629 | char *productid) | ||
630 | { | ||
631 | int ret = 0; | ||
632 | |||
633 | if (mpc->oemptr) { | ||
634 | struct mpc_oemtable *oem_table = | ||
635 | (struct mpc_oemtable *)mpc->oemptr; | ||
636 | |||
637 | if (!strncmp(oem, "UNISYS", 6)) | ||
638 | ret = parse_unisys_oem((char *)oem_table); | ||
639 | } | ||
640 | |||
641 | es7000_mps_ret = ret; | ||
642 | |||
643 | return ret && !es7000_apic_is_cluster(); | ||
644 | } | ||
645 | |||
646 | static int es7000_mps_oem_check_cluster(struct mpc_table *mpc, char *oem, | ||
647 | char *productid) | ||
648 | { | ||
649 | int ret = es7000_mps_ret; | ||
650 | |||
651 | return ret && es7000_apic_is_cluster(); | ||
652 | } | ||
653 | |||
654 | struct apic apic_es7000_cluster = { | ||
655 | |||
656 | .name = "es7000", | ||
657 | .probe = probe_es7000, | ||
658 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check_cluster, | ||
659 | .apic_id_registered = es7000_apic_id_registered, | ||
660 | |||
661 | .irq_delivery_mode = dest_LowestPrio, | ||
662 | /* logical delivery broadcast to all procs: */ | ||
663 | .irq_dest_mode = 1, | ||
664 | |||
665 | .target_cpus = target_cpus_cluster, | ||
666 | .disable_esr = 1, | ||
667 | .dest_logical = 0, | ||
668 | .check_apicid_used = es7000_check_apicid_used, | ||
669 | .check_apicid_present = es7000_check_apicid_present, | ||
670 | |||
671 | .vector_allocation_domain = es7000_vector_allocation_domain, | ||
672 | .init_apic_ldr = es7000_init_apic_ldr_cluster, | ||
673 | |||
674 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | ||
675 | .setup_apic_routing = es7000_setup_apic_routing, | ||
676 | .multi_timer_check = NULL, | ||
677 | .apicid_to_node = es7000_apicid_to_node, | ||
678 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | ||
679 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | ||
680 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | ||
681 | .setup_portio_remap = NULL, | ||
682 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | ||
683 | .enable_apic_mode = es7000_enable_apic_mode, | ||
684 | .phys_pkg_id = es7000_phys_pkg_id, | ||
685 | .mps_oem_check = es7000_mps_oem_check_cluster, | ||
686 | |||
687 | .get_apic_id = es7000_get_apic_id, | ||
688 | .set_apic_id = NULL, | ||
689 | .apic_id_mask = 0xFF << 24, | ||
690 | |||
691 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, | ||
692 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | ||
693 | |||
694 | .send_IPI_mask = es7000_send_IPI_mask, | ||
695 | .send_IPI_mask_allbutself = NULL, | ||
696 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | ||
697 | .send_IPI_all = es7000_send_IPI_all, | ||
698 | .send_IPI_self = default_send_IPI_self, | ||
699 | |||
700 | .wakeup_secondary_cpu = wakeup_secondary_cpu_via_mip, | ||
701 | |||
702 | .trampoline_phys_low = 0x467, | ||
703 | .trampoline_phys_high = 0x469, | ||
704 | |||
705 | .wait_for_init_deassert = NULL, | ||
706 | |||
707 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | ||
708 | .smp_callin_clear_local_apic = NULL, | ||
709 | .inquire_remote_apic = default_inquire_remote_apic, | ||
710 | |||
711 | .read = native_apic_mem_read, | ||
712 | .write = native_apic_mem_write, | ||
713 | .icr_read = native_apic_icr_read, | ||
714 | .icr_write = native_apic_icr_write, | ||
715 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
716 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
717 | }; | ||
718 | |||
719 | struct apic apic_es7000 = { | ||
720 | |||
721 | .name = "es7000", | ||
722 | .probe = probe_es7000, | ||
723 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check, | ||
724 | .apic_id_registered = es7000_apic_id_registered, | ||
725 | |||
726 | .irq_delivery_mode = dest_Fixed, | ||
727 | /* phys delivery to target CPUs: */ | ||
728 | .irq_dest_mode = 0, | ||
729 | |||
730 | .target_cpus = es7000_target_cpus, | ||
731 | .disable_esr = 1, | ||
732 | .dest_logical = 0, | ||
733 | .check_apicid_used = es7000_check_apicid_used, | ||
734 | .check_apicid_present = es7000_check_apicid_present, | ||
735 | |||
736 | .vector_allocation_domain = es7000_vector_allocation_domain, | ||
737 | .init_apic_ldr = es7000_init_apic_ldr, | ||
738 | |||
739 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | ||
740 | .setup_apic_routing = es7000_setup_apic_routing, | ||
741 | .multi_timer_check = NULL, | ||
742 | .apicid_to_node = es7000_apicid_to_node, | ||
743 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | ||
744 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | ||
745 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | ||
746 | .setup_portio_remap = NULL, | ||
747 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | ||
748 | .enable_apic_mode = es7000_enable_apic_mode, | ||
749 | .phys_pkg_id = es7000_phys_pkg_id, | ||
750 | .mps_oem_check = es7000_mps_oem_check, | ||
751 | |||
752 | .get_apic_id = es7000_get_apic_id, | ||
753 | .set_apic_id = NULL, | ||
754 | .apic_id_mask = 0xFF << 24, | ||
755 | |||
756 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, | ||
757 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | ||
758 | |||
759 | .send_IPI_mask = es7000_send_IPI_mask, | ||
760 | .send_IPI_mask_allbutself = NULL, | ||
761 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | ||
762 | .send_IPI_all = es7000_send_IPI_all, | ||
763 | .send_IPI_self = default_send_IPI_self, | ||
764 | |||
765 | .trampoline_phys_low = 0x467, | ||
766 | .trampoline_phys_high = 0x469, | ||
767 | |||
768 | .wait_for_init_deassert = es7000_wait_for_init_deassert, | ||
769 | |||
770 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | ||
771 | .smp_callin_clear_local_apic = NULL, | ||
772 | .inquire_remote_apic = default_inquire_remote_apic, | ||
773 | |||
774 | .read = native_apic_mem_read, | ||
775 | .write = native_apic_mem_write, | ||
776 | .icr_read = native_apic_icr_read, | ||
777 | .icr_write = native_apic_icr_write, | ||
778 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
779 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
780 | }; | ||
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/apic/io_apic.c index bc7ac4da90d7..00e6071cefc4 100644 --- a/arch/x86/kernel/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Intel IO-APIC support for multi-Pentium hosts. | 2 | * Intel IO-APIC support for multi-Pentium hosts. |
3 | * | 3 | * |
4 | * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar, Hajnalka Szabo | 4 | * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo |
5 | * | 5 | * |
6 | * Many thanks to Stig Venaas for trying out countless experimental | 6 | * Many thanks to Stig Venaas for trying out countless experimental |
7 | * patches and reporting/debugging problems patiently! | 7 | * patches and reporting/debugging problems patiently! |
@@ -46,6 +46,7 @@ | |||
46 | #include <asm/idle.h> | 46 | #include <asm/idle.h> |
47 | #include <asm/io.h> | 47 | #include <asm/io.h> |
48 | #include <asm/smp.h> | 48 | #include <asm/smp.h> |
49 | #include <asm/cpu.h> | ||
49 | #include <asm/desc.h> | 50 | #include <asm/desc.h> |
50 | #include <asm/proto.h> | 51 | #include <asm/proto.h> |
51 | #include <asm/acpi.h> | 52 | #include <asm/acpi.h> |
@@ -61,9 +62,7 @@ | |||
61 | #include <asm/uv/uv_hub.h> | 62 | #include <asm/uv/uv_hub.h> |
62 | #include <asm/uv/uv_irq.h> | 63 | #include <asm/uv/uv_irq.h> |
63 | 64 | ||
64 | #include <mach_ipi.h> | 65 | #include <asm/apic.h> |
65 | #include <mach_apic.h> | ||
66 | #include <mach_apicdef.h> | ||
67 | 66 | ||
68 | #define __apicdebuginit(type) static type __init | 67 | #define __apicdebuginit(type) static type __init |
69 | 68 | ||
@@ -82,11 +81,11 @@ static DEFINE_SPINLOCK(vector_lock); | |||
82 | int nr_ioapic_registers[MAX_IO_APICS]; | 81 | int nr_ioapic_registers[MAX_IO_APICS]; |
83 | 82 | ||
84 | /* I/O APIC entries */ | 83 | /* I/O APIC entries */ |
85 | struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; | 84 | struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; |
86 | int nr_ioapics; | 85 | int nr_ioapics; |
87 | 86 | ||
88 | /* MP IRQ source entries */ | 87 | /* MP IRQ source entries */ |
89 | struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; | 88 | struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
90 | 89 | ||
91 | /* # of MP IRQ source entries */ | 90 | /* # of MP IRQ source entries */ |
92 | int mp_irq_entries; | 91 | int mp_irq_entries; |
@@ -99,10 +98,19 @@ DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); | |||
99 | 98 | ||
100 | int skip_ioapic_setup; | 99 | int skip_ioapic_setup; |
101 | 100 | ||
101 | void arch_disable_smp_support(void) | ||
102 | { | ||
103 | #ifdef CONFIG_PCI | ||
104 | noioapicquirk = 1; | ||
105 | noioapicreroute = -1; | ||
106 | #endif | ||
107 | skip_ioapic_setup = 1; | ||
108 | } | ||
109 | |||
102 | static int __init parse_noapic(char *str) | 110 | static int __init parse_noapic(char *str) |
103 | { | 111 | { |
104 | /* disable IO-APIC */ | 112 | /* disable IO-APIC */ |
105 | disable_ioapic_setup(); | 113 | arch_disable_smp_support(); |
106 | return 0; | 114 | return 0; |
107 | } | 115 | } |
108 | early_param("noapic", parse_noapic); | 116 | early_param("noapic", parse_noapic); |
@@ -356,7 +364,7 @@ set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask) | |||
356 | 364 | ||
357 | if (!cfg->move_in_progress) { | 365 | if (!cfg->move_in_progress) { |
358 | /* it means that domain is not changed */ | 366 | /* it means that domain is not changed */ |
359 | if (!cpumask_intersects(&desc->affinity, mask)) | 367 | if (!cpumask_intersects(desc->affinity, mask)) |
360 | cfg->move_desc_pending = 1; | 368 | cfg->move_desc_pending = 1; |
361 | } | 369 | } |
362 | } | 370 | } |
@@ -386,7 +394,7 @@ struct io_apic { | |||
386 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) | 394 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) |
387 | { | 395 | { |
388 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) | 396 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) |
389 | + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK); | 397 | + (mp_ioapics[idx].apicaddr & ~PAGE_MASK); |
390 | } | 398 | } |
391 | 399 | ||
392 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) | 400 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) |
@@ -478,7 +486,7 @@ __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) | |||
478 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); | 486 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
479 | } | 487 | } |
480 | 488 | ||
481 | static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) | 489 | void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
482 | { | 490 | { |
483 | unsigned long flags; | 491 | unsigned long flags; |
484 | spin_lock_irqsave(&ioapic_lock, flags); | 492 | spin_lock_irqsave(&ioapic_lock, flags); |
@@ -513,11 +521,11 @@ static void send_cleanup_vector(struct irq_cfg *cfg) | |||
513 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) | 521 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) |
514 | cfg->move_cleanup_count++; | 522 | cfg->move_cleanup_count++; |
515 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) | 523 | for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) |
516 | send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); | 524 | apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); |
517 | } else { | 525 | } else { |
518 | cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); | 526 | cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); |
519 | cfg->move_cleanup_count = cpumask_weight(cleanup_mask); | 527 | cfg->move_cleanup_count = cpumask_weight(cleanup_mask); |
520 | send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); | 528 | apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); |
521 | free_cpumask_var(cleanup_mask); | 529 | free_cpumask_var(cleanup_mask); |
522 | } | 530 | } |
523 | cfg->move_in_progress = 0; | 531 | cfg->move_in_progress = 0; |
@@ -562,8 +570,9 @@ static int | |||
562 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); | 570 | assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); |
563 | 571 | ||
564 | /* | 572 | /* |
565 | * Either sets desc->affinity to a valid value, and returns cpu_mask_to_apicid | 573 | * Either sets desc->affinity to a valid value, and returns |
566 | * of that, or returns BAD_APICID and leaves desc->affinity untouched. | 574 | * ->cpu_mask_to_apicid of that, or returns BAD_APICID and |
575 | * leaves desc->affinity untouched. | ||
567 | */ | 576 | */ |
568 | static unsigned int | 577 | static unsigned int |
569 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) | 578 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) |
@@ -579,9 +588,10 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) | |||
579 | if (assign_irq_vector(irq, cfg, mask)) | 588 | if (assign_irq_vector(irq, cfg, mask)) |
580 | return BAD_APICID; | 589 | return BAD_APICID; |
581 | 590 | ||
582 | cpumask_and(&desc->affinity, cfg->domain, mask); | 591 | cpumask_and(desc->affinity, cfg->domain, mask); |
583 | set_extra_move_desc(desc, mask); | 592 | set_extra_move_desc(desc, mask); |
584 | return cpu_mask_to_apicid_and(&desc->affinity, cpu_online_mask); | 593 | |
594 | return apic->cpu_mask_to_apicid_and(desc->affinity, cpu_online_mask); | ||
585 | } | 595 | } |
586 | 596 | ||
587 | static void | 597 | static void |
@@ -796,23 +806,6 @@ static void clear_IO_APIC (void) | |||
796 | clear_IO_APIC_pin(apic, pin); | 806 | clear_IO_APIC_pin(apic, pin); |
797 | } | 807 | } |
798 | 808 | ||
799 | #if !defined(CONFIG_SMP) && defined(CONFIG_X86_32) | ||
800 | void send_IPI_self(int vector) | ||
801 | { | ||
802 | unsigned int cfg; | ||
803 | |||
804 | /* | ||
805 | * Wait for idle. | ||
806 | */ | ||
807 | apic_wait_icr_idle(); | ||
808 | cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL; | ||
809 | /* | ||
810 | * Send the IPI. The write to APIC_ICR fires this off. | ||
811 | */ | ||
812 | apic_write(APIC_ICR, cfg); | ||
813 | } | ||
814 | #endif /* !CONFIG_SMP && CONFIG_X86_32*/ | ||
815 | |||
816 | #ifdef CONFIG_X86_32 | 809 | #ifdef CONFIG_X86_32 |
817 | /* | 810 | /* |
818 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to | 811 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to |
@@ -820,8 +813,9 @@ void send_IPI_self(int vector) | |||
820 | */ | 813 | */ |
821 | 814 | ||
822 | #define MAX_PIRQS 8 | 815 | #define MAX_PIRQS 8 |
823 | static int pirq_entries [MAX_PIRQS]; | 816 | static int pirq_entries[MAX_PIRQS] = { |
824 | static int pirqs_enabled; | 817 | [0 ... MAX_PIRQS - 1] = -1 |
818 | }; | ||
825 | 819 | ||
826 | static int __init ioapic_pirq_setup(char *str) | 820 | static int __init ioapic_pirq_setup(char *str) |
827 | { | 821 | { |
@@ -830,10 +824,6 @@ static int __init ioapic_pirq_setup(char *str) | |||
830 | 824 | ||
831 | get_options(str, ARRAY_SIZE(ints), ints); | 825 | get_options(str, ARRAY_SIZE(ints), ints); |
832 | 826 | ||
833 | for (i = 0; i < MAX_PIRQS; i++) | ||
834 | pirq_entries[i] = -1; | ||
835 | |||
836 | pirqs_enabled = 1; | ||
837 | apic_printk(APIC_VERBOSE, KERN_INFO | 827 | apic_printk(APIC_VERBOSE, KERN_INFO |
838 | "PIRQ redirection, working around broken MP-BIOS.\n"); | 828 | "PIRQ redirection, working around broken MP-BIOS.\n"); |
839 | max = MAX_PIRQS; | 829 | max = MAX_PIRQS; |
@@ -944,10 +934,10 @@ static int find_irq_entry(int apic, int pin, int type) | |||
944 | int i; | 934 | int i; |
945 | 935 | ||
946 | for (i = 0; i < mp_irq_entries; i++) | 936 | for (i = 0; i < mp_irq_entries; i++) |
947 | if (mp_irqs[i].mp_irqtype == type && | 937 | if (mp_irqs[i].irqtype == type && |
948 | (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid || | 938 | (mp_irqs[i].dstapic == mp_ioapics[apic].apicid || |
949 | mp_irqs[i].mp_dstapic == MP_APIC_ALL) && | 939 | mp_irqs[i].dstapic == MP_APIC_ALL) && |
950 | mp_irqs[i].mp_dstirq == pin) | 940 | mp_irqs[i].dstirq == pin) |
951 | return i; | 941 | return i; |
952 | 942 | ||
953 | return -1; | 943 | return -1; |
@@ -961,13 +951,13 @@ static int __init find_isa_irq_pin(int irq, int type) | |||
961 | int i; | 951 | int i; |
962 | 952 | ||
963 | for (i = 0; i < mp_irq_entries; i++) { | 953 | for (i = 0; i < mp_irq_entries; i++) { |
964 | int lbus = mp_irqs[i].mp_srcbus; | 954 | int lbus = mp_irqs[i].srcbus; |
965 | 955 | ||
966 | if (test_bit(lbus, mp_bus_not_pci) && | 956 | if (test_bit(lbus, mp_bus_not_pci) && |
967 | (mp_irqs[i].mp_irqtype == type) && | 957 | (mp_irqs[i].irqtype == type) && |
968 | (mp_irqs[i].mp_srcbusirq == irq)) | 958 | (mp_irqs[i].srcbusirq == irq)) |
969 | 959 | ||
970 | return mp_irqs[i].mp_dstirq; | 960 | return mp_irqs[i].dstirq; |
971 | } | 961 | } |
972 | return -1; | 962 | return -1; |
973 | } | 963 | } |
@@ -977,17 +967,17 @@ static int __init find_isa_irq_apic(int irq, int type) | |||
977 | int i; | 967 | int i; |
978 | 968 | ||
979 | for (i = 0; i < mp_irq_entries; i++) { | 969 | for (i = 0; i < mp_irq_entries; i++) { |
980 | int lbus = mp_irqs[i].mp_srcbus; | 970 | int lbus = mp_irqs[i].srcbus; |
981 | 971 | ||
982 | if (test_bit(lbus, mp_bus_not_pci) && | 972 | if (test_bit(lbus, mp_bus_not_pci) && |
983 | (mp_irqs[i].mp_irqtype == type) && | 973 | (mp_irqs[i].irqtype == type) && |
984 | (mp_irqs[i].mp_srcbusirq == irq)) | 974 | (mp_irqs[i].srcbusirq == irq)) |
985 | break; | 975 | break; |
986 | } | 976 | } |
987 | if (i < mp_irq_entries) { | 977 | if (i < mp_irq_entries) { |
988 | int apic; | 978 | int apic; |
989 | for(apic = 0; apic < nr_ioapics; apic++) { | 979 | for(apic = 0; apic < nr_ioapics; apic++) { |
990 | if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic) | 980 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic) |
991 | return apic; | 981 | return apic; |
992 | } | 982 | } |
993 | } | 983 | } |
@@ -1012,23 +1002,23 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) | |||
1012 | return -1; | 1002 | return -1; |
1013 | } | 1003 | } |
1014 | for (i = 0; i < mp_irq_entries; i++) { | 1004 | for (i = 0; i < mp_irq_entries; i++) { |
1015 | int lbus = mp_irqs[i].mp_srcbus; | 1005 | int lbus = mp_irqs[i].srcbus; |
1016 | 1006 | ||
1017 | for (apic = 0; apic < nr_ioapics; apic++) | 1007 | for (apic = 0; apic < nr_ioapics; apic++) |
1018 | if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic || | 1008 | if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || |
1019 | mp_irqs[i].mp_dstapic == MP_APIC_ALL) | 1009 | mp_irqs[i].dstapic == MP_APIC_ALL) |
1020 | break; | 1010 | break; |
1021 | 1011 | ||
1022 | if (!test_bit(lbus, mp_bus_not_pci) && | 1012 | if (!test_bit(lbus, mp_bus_not_pci) && |
1023 | !mp_irqs[i].mp_irqtype && | 1013 | !mp_irqs[i].irqtype && |
1024 | (bus == lbus) && | 1014 | (bus == lbus) && |
1025 | (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { | 1015 | (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { |
1026 | int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq); | 1016 | int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); |
1027 | 1017 | ||
1028 | if (!(apic || IO_APIC_IRQ(irq))) | 1018 | if (!(apic || IO_APIC_IRQ(irq))) |
1029 | continue; | 1019 | continue; |
1030 | 1020 | ||
1031 | if (pin == (mp_irqs[i].mp_srcbusirq & 3)) | 1021 | if (pin == (mp_irqs[i].srcbusirq & 3)) |
1032 | return irq; | 1022 | return irq; |
1033 | /* | 1023 | /* |
1034 | * Use the first all-but-pin matching entry as a | 1024 | * Use the first all-but-pin matching entry as a |
@@ -1071,7 +1061,7 @@ static int EISA_ELCR(unsigned int irq) | |||
1071 | * EISA conforming in the MP table, that means its trigger type must | 1061 | * EISA conforming in the MP table, that means its trigger type must |
1072 | * be read in from the ELCR */ | 1062 | * be read in from the ELCR */ |
1073 | 1063 | ||
1074 | #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq)) | 1064 | #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq)) |
1075 | #define default_EISA_polarity(idx) default_ISA_polarity(idx) | 1065 | #define default_EISA_polarity(idx) default_ISA_polarity(idx) |
1076 | 1066 | ||
1077 | /* PCI interrupts are always polarity one level triggered, | 1067 | /* PCI interrupts are always polarity one level triggered, |
@@ -1088,13 +1078,13 @@ static int EISA_ELCR(unsigned int irq) | |||
1088 | 1078 | ||
1089 | static int MPBIOS_polarity(int idx) | 1079 | static int MPBIOS_polarity(int idx) |
1090 | { | 1080 | { |
1091 | int bus = mp_irqs[idx].mp_srcbus; | 1081 | int bus = mp_irqs[idx].srcbus; |
1092 | int polarity; | 1082 | int polarity; |
1093 | 1083 | ||
1094 | /* | 1084 | /* |
1095 | * Determine IRQ line polarity (high active or low active): | 1085 | * Determine IRQ line polarity (high active or low active): |
1096 | */ | 1086 | */ |
1097 | switch (mp_irqs[idx].mp_irqflag & 3) | 1087 | switch (mp_irqs[idx].irqflag & 3) |
1098 | { | 1088 | { |
1099 | case 0: /* conforms, ie. bus-type dependent polarity */ | 1089 | case 0: /* conforms, ie. bus-type dependent polarity */ |
1100 | if (test_bit(bus, mp_bus_not_pci)) | 1090 | if (test_bit(bus, mp_bus_not_pci)) |
@@ -1130,13 +1120,13 @@ static int MPBIOS_polarity(int idx) | |||
1130 | 1120 | ||
1131 | static int MPBIOS_trigger(int idx) | 1121 | static int MPBIOS_trigger(int idx) |
1132 | { | 1122 | { |
1133 | int bus = mp_irqs[idx].mp_srcbus; | 1123 | int bus = mp_irqs[idx].srcbus; |
1134 | int trigger; | 1124 | int trigger; |
1135 | 1125 | ||
1136 | /* | 1126 | /* |
1137 | * Determine IRQ trigger mode (edge or level sensitive): | 1127 | * Determine IRQ trigger mode (edge or level sensitive): |
1138 | */ | 1128 | */ |
1139 | switch ((mp_irqs[idx].mp_irqflag>>2) & 3) | 1129 | switch ((mp_irqs[idx].irqflag>>2) & 3) |
1140 | { | 1130 | { |
1141 | case 0: /* conforms, ie. bus-type dependent */ | 1131 | case 0: /* conforms, ie. bus-type dependent */ |
1142 | if (test_bit(bus, mp_bus_not_pci)) | 1132 | if (test_bit(bus, mp_bus_not_pci)) |
@@ -1214,16 +1204,16 @@ int (*ioapic_renumber_irq)(int ioapic, int irq); | |||
1214 | static int pin_2_irq(int idx, int apic, int pin) | 1204 | static int pin_2_irq(int idx, int apic, int pin) |
1215 | { | 1205 | { |
1216 | int irq, i; | 1206 | int irq, i; |
1217 | int bus = mp_irqs[idx].mp_srcbus; | 1207 | int bus = mp_irqs[idx].srcbus; |
1218 | 1208 | ||
1219 | /* | 1209 | /* |
1220 | * Debugging check, we are in big trouble if this message pops up! | 1210 | * Debugging check, we are in big trouble if this message pops up! |
1221 | */ | 1211 | */ |
1222 | if (mp_irqs[idx].mp_dstirq != pin) | 1212 | if (mp_irqs[idx].dstirq != pin) |
1223 | printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); | 1213 | printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); |
1224 | 1214 | ||
1225 | if (test_bit(bus, mp_bus_not_pci)) { | 1215 | if (test_bit(bus, mp_bus_not_pci)) { |
1226 | irq = mp_irqs[idx].mp_srcbusirq; | 1216 | irq = mp_irqs[idx].srcbusirq; |
1227 | } else { | 1217 | } else { |
1228 | /* | 1218 | /* |
1229 | * PCI IRQs are mapped in order | 1219 | * PCI IRQs are mapped in order |
@@ -1315,7 +1305,7 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask) | |||
1315 | int new_cpu; | 1305 | int new_cpu; |
1316 | int vector, offset; | 1306 | int vector, offset; |
1317 | 1307 | ||
1318 | vector_allocation_domain(cpu, tmp_mask); | 1308 | apic->vector_allocation_domain(cpu, tmp_mask); |
1319 | 1309 | ||
1320 | vector = current_vector; | 1310 | vector = current_vector; |
1321 | offset = current_offset; | 1311 | offset = current_offset; |
@@ -1485,10 +1475,10 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t | |||
1485 | handle_edge_irq, "edge"); | 1475 | handle_edge_irq, "edge"); |
1486 | } | 1476 | } |
1487 | 1477 | ||
1488 | static int setup_ioapic_entry(int apic, int irq, | 1478 | int setup_ioapic_entry(int apic_id, int irq, |
1489 | struct IO_APIC_route_entry *entry, | 1479 | struct IO_APIC_route_entry *entry, |
1490 | unsigned int destination, int trigger, | 1480 | unsigned int destination, int trigger, |
1491 | int polarity, int vector) | 1481 | int polarity, int vector) |
1492 | { | 1482 | { |
1493 | /* | 1483 | /* |
1494 | * add it to the IO-APIC irq-routing table: | 1484 | * add it to the IO-APIC irq-routing table: |
@@ -1497,25 +1487,25 @@ static int setup_ioapic_entry(int apic, int irq, | |||
1497 | 1487 | ||
1498 | #ifdef CONFIG_INTR_REMAP | 1488 | #ifdef CONFIG_INTR_REMAP |
1499 | if (intr_remapping_enabled) { | 1489 | if (intr_remapping_enabled) { |
1500 | struct intel_iommu *iommu = map_ioapic_to_ir(apic); | 1490 | struct intel_iommu *iommu = map_ioapic_to_ir(apic_id); |
1501 | struct irte irte; | 1491 | struct irte irte; |
1502 | struct IR_IO_APIC_route_entry *ir_entry = | 1492 | struct IR_IO_APIC_route_entry *ir_entry = |
1503 | (struct IR_IO_APIC_route_entry *) entry; | 1493 | (struct IR_IO_APIC_route_entry *) entry; |
1504 | int index; | 1494 | int index; |
1505 | 1495 | ||
1506 | if (!iommu) | 1496 | if (!iommu) |
1507 | panic("No mapping iommu for ioapic %d\n", apic); | 1497 | panic("No mapping iommu for ioapic %d\n", apic_id); |
1508 | 1498 | ||
1509 | index = alloc_irte(iommu, irq, 1); | 1499 | index = alloc_irte(iommu, irq, 1); |
1510 | if (index < 0) | 1500 | if (index < 0) |
1511 | panic("Failed to allocate IRTE for ioapic %d\n", apic); | 1501 | panic("Failed to allocate IRTE for ioapic %d\n", apic_id); |
1512 | 1502 | ||
1513 | memset(&irte, 0, sizeof(irte)); | 1503 | memset(&irte, 0, sizeof(irte)); |
1514 | 1504 | ||
1515 | irte.present = 1; | 1505 | irte.present = 1; |
1516 | irte.dst_mode = INT_DEST_MODE; | 1506 | irte.dst_mode = apic->irq_dest_mode; |
1517 | irte.trigger_mode = trigger; | 1507 | irte.trigger_mode = trigger; |
1518 | irte.dlvry_mode = INT_DELIVERY_MODE; | 1508 | irte.dlvry_mode = apic->irq_delivery_mode; |
1519 | irte.vector = vector; | 1509 | irte.vector = vector; |
1520 | irte.dest_id = IRTE_DEST(destination); | 1510 | irte.dest_id = IRTE_DEST(destination); |
1521 | 1511 | ||
@@ -1528,8 +1518,8 @@ static int setup_ioapic_entry(int apic, int irq, | |||
1528 | } else | 1518 | } else |
1529 | #endif | 1519 | #endif |
1530 | { | 1520 | { |
1531 | entry->delivery_mode = INT_DELIVERY_MODE; | 1521 | entry->delivery_mode = apic->irq_delivery_mode; |
1532 | entry->dest_mode = INT_DEST_MODE; | 1522 | entry->dest_mode = apic->irq_dest_mode; |
1533 | entry->dest = destination; | 1523 | entry->dest = destination; |
1534 | } | 1524 | } |
1535 | 1525 | ||
@@ -1546,7 +1536,7 @@ static int setup_ioapic_entry(int apic, int irq, | |||
1546 | return 0; | 1536 | return 0; |
1547 | } | 1537 | } |
1548 | 1538 | ||
1549 | static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_desc *desc, | 1539 | static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc, |
1550 | int trigger, int polarity) | 1540 | int trigger, int polarity) |
1551 | { | 1541 | { |
1552 | struct irq_cfg *cfg; | 1542 | struct irq_cfg *cfg; |
@@ -1558,22 +1548,22 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de | |||
1558 | 1548 | ||
1559 | cfg = desc->chip_data; | 1549 | cfg = desc->chip_data; |
1560 | 1550 | ||
1561 | if (assign_irq_vector(irq, cfg, TARGET_CPUS)) | 1551 | if (assign_irq_vector(irq, cfg, apic->target_cpus())) |
1562 | return; | 1552 | return; |
1563 | 1553 | ||
1564 | dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); | 1554 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
1565 | 1555 | ||
1566 | apic_printk(APIC_VERBOSE,KERN_DEBUG | 1556 | apic_printk(APIC_VERBOSE,KERN_DEBUG |
1567 | "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " | 1557 | "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " |
1568 | "IRQ %d Mode:%i Active:%i)\n", | 1558 | "IRQ %d Mode:%i Active:%i)\n", |
1569 | apic, mp_ioapics[apic].mp_apicid, pin, cfg->vector, | 1559 | apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector, |
1570 | irq, trigger, polarity); | 1560 | irq, trigger, polarity); |
1571 | 1561 | ||
1572 | 1562 | ||
1573 | if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry, | 1563 | if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry, |
1574 | dest, trigger, polarity, cfg->vector)) { | 1564 | dest, trigger, polarity, cfg->vector)) { |
1575 | printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", | 1565 | printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", |
1576 | mp_ioapics[apic].mp_apicid, pin); | 1566 | mp_ioapics[apic_id].apicid, pin); |
1577 | __clear_irq_vector(irq, cfg); | 1567 | __clear_irq_vector(irq, cfg); |
1578 | return; | 1568 | return; |
1579 | } | 1569 | } |
@@ -1582,12 +1572,12 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de | |||
1582 | if (irq < NR_IRQS_LEGACY) | 1572 | if (irq < NR_IRQS_LEGACY) |
1583 | disable_8259A_irq(irq); | 1573 | disable_8259A_irq(irq); |
1584 | 1574 | ||
1585 | ioapic_write_entry(apic, pin, entry); | 1575 | ioapic_write_entry(apic_id, pin, entry); |
1586 | } | 1576 | } |
1587 | 1577 | ||
1588 | static void __init setup_IO_APIC_irqs(void) | 1578 | static void __init setup_IO_APIC_irqs(void) |
1589 | { | 1579 | { |
1590 | int apic, pin, idx, irq; | 1580 | int apic_id, pin, idx, irq; |
1591 | int notcon = 0; | 1581 | int notcon = 0; |
1592 | struct irq_desc *desc; | 1582 | struct irq_desc *desc; |
1593 | struct irq_cfg *cfg; | 1583 | struct irq_cfg *cfg; |
@@ -1595,21 +1585,19 @@ static void __init setup_IO_APIC_irqs(void) | |||
1595 | 1585 | ||
1596 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); | 1586 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); |
1597 | 1587 | ||
1598 | for (apic = 0; apic < nr_ioapics; apic++) { | 1588 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { |
1599 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { | 1589 | for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) { |
1600 | 1590 | ||
1601 | idx = find_irq_entry(apic, pin, mp_INT); | 1591 | idx = find_irq_entry(apic_id, pin, mp_INT); |
1602 | if (idx == -1) { | 1592 | if (idx == -1) { |
1603 | if (!notcon) { | 1593 | if (!notcon) { |
1604 | notcon = 1; | 1594 | notcon = 1; |
1605 | apic_printk(APIC_VERBOSE, | 1595 | apic_printk(APIC_VERBOSE, |
1606 | KERN_DEBUG " %d-%d", | 1596 | KERN_DEBUG " %d-%d", |
1607 | mp_ioapics[apic].mp_apicid, | 1597 | mp_ioapics[apic_id].apicid, pin); |
1608 | pin); | ||
1609 | } else | 1598 | } else |
1610 | apic_printk(APIC_VERBOSE, " %d-%d", | 1599 | apic_printk(APIC_VERBOSE, " %d-%d", |
1611 | mp_ioapics[apic].mp_apicid, | 1600 | mp_ioapics[apic_id].apicid, pin); |
1612 | pin); | ||
1613 | continue; | 1601 | continue; |
1614 | } | 1602 | } |
1615 | if (notcon) { | 1603 | if (notcon) { |
@@ -1618,20 +1606,25 @@ static void __init setup_IO_APIC_irqs(void) | |||
1618 | notcon = 0; | 1606 | notcon = 0; |
1619 | } | 1607 | } |
1620 | 1608 | ||
1621 | irq = pin_2_irq(idx, apic, pin); | 1609 | irq = pin_2_irq(idx, apic_id, pin); |
1622 | #ifdef CONFIG_X86_32 | 1610 | |
1623 | if (multi_timer_check(apic, irq)) | 1611 | /* |
1612 | * Skip the timer IRQ if there's a quirk handler | ||
1613 | * installed and if it returns 1: | ||
1614 | */ | ||
1615 | if (apic->multi_timer_check && | ||
1616 | apic->multi_timer_check(apic_id, irq)) | ||
1624 | continue; | 1617 | continue; |
1625 | #endif | 1618 | |
1626 | desc = irq_to_desc_alloc_cpu(irq, cpu); | 1619 | desc = irq_to_desc_alloc_cpu(irq, cpu); |
1627 | if (!desc) { | 1620 | if (!desc) { |
1628 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); | 1621 | printk(KERN_INFO "can not get irq_desc for %d\n", irq); |
1629 | continue; | 1622 | continue; |
1630 | } | 1623 | } |
1631 | cfg = desc->chip_data; | 1624 | cfg = desc->chip_data; |
1632 | add_pin_to_irq_cpu(cfg, cpu, apic, pin); | 1625 | add_pin_to_irq_cpu(cfg, cpu, apic_id, pin); |
1633 | 1626 | ||
1634 | setup_IO_APIC_irq(apic, pin, irq, desc, | 1627 | setup_IO_APIC_irq(apic_id, pin, irq, desc, |
1635 | irq_trigger(idx), irq_polarity(idx)); | 1628 | irq_trigger(idx), irq_polarity(idx)); |
1636 | } | 1629 | } |
1637 | } | 1630 | } |
@@ -1644,7 +1637,7 @@ static void __init setup_IO_APIC_irqs(void) | |||
1644 | /* | 1637 | /* |
1645 | * Set up the timer pin, possibly with the 8259A-master behind. | 1638 | * Set up the timer pin, possibly with the 8259A-master behind. |
1646 | */ | 1639 | */ |
1647 | static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, | 1640 | static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin, |
1648 | int vector) | 1641 | int vector) |
1649 | { | 1642 | { |
1650 | struct IO_APIC_route_entry entry; | 1643 | struct IO_APIC_route_entry entry; |
@@ -1660,10 +1653,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, | |||
1660 | * We use logical delivery to get the timer IRQ | 1653 | * We use logical delivery to get the timer IRQ |
1661 | * to the first CPU. | 1654 | * to the first CPU. |
1662 | */ | 1655 | */ |
1663 | entry.dest_mode = INT_DEST_MODE; | 1656 | entry.dest_mode = apic->irq_dest_mode; |
1664 | entry.mask = 1; /* mask IRQ now */ | 1657 | entry.mask = 0; /* don't mask IRQ for edge */ |
1665 | entry.dest = cpu_mask_to_apicid(TARGET_CPUS); | 1658 | entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus()); |
1666 | entry.delivery_mode = INT_DELIVERY_MODE; | 1659 | entry.delivery_mode = apic->irq_delivery_mode; |
1667 | entry.polarity = 0; | 1660 | entry.polarity = 0; |
1668 | entry.trigger = 0; | 1661 | entry.trigger = 0; |
1669 | entry.vector = vector; | 1662 | entry.vector = vector; |
@@ -1677,7 +1670,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, | |||
1677 | /* | 1670 | /* |
1678 | * Add it to the IO-APIC irq-routing table: | 1671 | * Add it to the IO-APIC irq-routing table: |
1679 | */ | 1672 | */ |
1680 | ioapic_write_entry(apic, pin, entry); | 1673 | ioapic_write_entry(apic_id, pin, entry); |
1681 | } | 1674 | } |
1682 | 1675 | ||
1683 | 1676 | ||
@@ -1699,7 +1692,7 @@ __apicdebuginit(void) print_IO_APIC(void) | |||
1699 | printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); | 1692 | printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); |
1700 | for (i = 0; i < nr_ioapics; i++) | 1693 | for (i = 0; i < nr_ioapics; i++) |
1701 | printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", | 1694 | printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", |
1702 | mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]); | 1695 | mp_ioapics[i].apicid, nr_ioapic_registers[i]); |
1703 | 1696 | ||
1704 | /* | 1697 | /* |
1705 | * We are a bit conservative about what we expect. We have to | 1698 | * We are a bit conservative about what we expect. We have to |
@@ -1719,7 +1712,7 @@ __apicdebuginit(void) print_IO_APIC(void) | |||
1719 | spin_unlock_irqrestore(&ioapic_lock, flags); | 1712 | spin_unlock_irqrestore(&ioapic_lock, flags); |
1720 | 1713 | ||
1721 | printk("\n"); | 1714 | printk("\n"); |
1722 | printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid); | 1715 | printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid); |
1723 | printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); | 1716 | printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); |
1724 | printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); | 1717 | printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); |
1725 | printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); | 1718 | printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); |
@@ -1980,13 +1973,6 @@ void __init enable_IO_APIC(void) | |||
1980 | int apic; | 1973 | int apic; |
1981 | unsigned long flags; | 1974 | unsigned long flags; |
1982 | 1975 | ||
1983 | #ifdef CONFIG_X86_32 | ||
1984 | int i; | ||
1985 | if (!pirqs_enabled) | ||
1986 | for (i = 0; i < MAX_PIRQS; i++) | ||
1987 | pirq_entries[i] = -1; | ||
1988 | #endif | ||
1989 | |||
1990 | /* | 1976 | /* |
1991 | * The number of IO-APIC IRQ registers (== #pins): | 1977 | * The number of IO-APIC IRQ registers (== #pins): |
1992 | */ | 1978 | */ |
@@ -2090,7 +2076,7 @@ static void __init setup_ioapic_ids_from_mpc(void) | |||
2090 | { | 2076 | { |
2091 | union IO_APIC_reg_00 reg_00; | 2077 | union IO_APIC_reg_00 reg_00; |
2092 | physid_mask_t phys_id_present_map; | 2078 | physid_mask_t phys_id_present_map; |
2093 | int apic; | 2079 | int apic_id; |
2094 | int i; | 2080 | int i; |
2095 | unsigned char old_id; | 2081 | unsigned char old_id; |
2096 | unsigned long flags; | 2082 | unsigned long flags; |
@@ -2109,26 +2095,26 @@ static void __init setup_ioapic_ids_from_mpc(void) | |||
2109 | * This is broken; anything with a real cpu count has to | 2095 | * This is broken; anything with a real cpu count has to |
2110 | * circumvent this idiocy regardless. | 2096 | * circumvent this idiocy regardless. |
2111 | */ | 2097 | */ |
2112 | phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map); | 2098 | phys_id_present_map = apic->ioapic_phys_id_map(phys_cpu_present_map); |
2113 | 2099 | ||
2114 | /* | 2100 | /* |
2115 | * Set the IOAPIC ID to the value stored in the MPC table. | 2101 | * Set the IOAPIC ID to the value stored in the MPC table. |
2116 | */ | 2102 | */ |
2117 | for (apic = 0; apic < nr_ioapics; apic++) { | 2103 | for (apic_id = 0; apic_id < nr_ioapics; apic_id++) { |
2118 | 2104 | ||
2119 | /* Read the register 0 value */ | 2105 | /* Read the register 0 value */ |
2120 | spin_lock_irqsave(&ioapic_lock, flags); | 2106 | spin_lock_irqsave(&ioapic_lock, flags); |
2121 | reg_00.raw = io_apic_read(apic, 0); | 2107 | reg_00.raw = io_apic_read(apic_id, 0); |
2122 | spin_unlock_irqrestore(&ioapic_lock, flags); | 2108 | spin_unlock_irqrestore(&ioapic_lock, flags); |
2123 | 2109 | ||
2124 | old_id = mp_ioapics[apic].mp_apicid; | 2110 | old_id = mp_ioapics[apic_id].apicid; |
2125 | 2111 | ||
2126 | if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) { | 2112 | if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) { |
2127 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", | 2113 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", |
2128 | apic, mp_ioapics[apic].mp_apicid); | 2114 | apic_id, mp_ioapics[apic_id].apicid); |
2129 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", | 2115 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
2130 | reg_00.bits.ID); | 2116 | reg_00.bits.ID); |
2131 | mp_ioapics[apic].mp_apicid = reg_00.bits.ID; | 2117 | mp_ioapics[apic_id].apicid = reg_00.bits.ID; |
2132 | } | 2118 | } |
2133 | 2119 | ||
2134 | /* | 2120 | /* |
@@ -2136,10 +2122,10 @@ static void __init setup_ioapic_ids_from_mpc(void) | |||
2136 | * system must have a unique ID or we get lots of nice | 2122 | * system must have a unique ID or we get lots of nice |
2137 | * 'stuck on smp_invalidate_needed IPI wait' messages. | 2123 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
2138 | */ | 2124 | */ |
2139 | if (check_apicid_used(phys_id_present_map, | 2125 | if (apic->check_apicid_used(phys_id_present_map, |
2140 | mp_ioapics[apic].mp_apicid)) { | 2126 | mp_ioapics[apic_id].apicid)) { |
2141 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", | 2127 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", |
2142 | apic, mp_ioapics[apic].mp_apicid); | 2128 | apic_id, mp_ioapics[apic_id].apicid); |
2143 | for (i = 0; i < get_physical_broadcast(); i++) | 2129 | for (i = 0; i < get_physical_broadcast(); i++) |
2144 | if (!physid_isset(i, phys_id_present_map)) | 2130 | if (!physid_isset(i, phys_id_present_map)) |
2145 | break; | 2131 | break; |
@@ -2148,13 +2134,13 @@ static void __init setup_ioapic_ids_from_mpc(void) | |||
2148 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", | 2134 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
2149 | i); | 2135 | i); |
2150 | physid_set(i, phys_id_present_map); | 2136 | physid_set(i, phys_id_present_map); |
2151 | mp_ioapics[apic].mp_apicid = i; | 2137 | mp_ioapics[apic_id].apicid = i; |
2152 | } else { | 2138 | } else { |
2153 | physid_mask_t tmp; | 2139 | physid_mask_t tmp; |
2154 | tmp = apicid_to_cpu_present(mp_ioapics[apic].mp_apicid); | 2140 | tmp = apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid); |
2155 | apic_printk(APIC_VERBOSE, "Setting %d in the " | 2141 | apic_printk(APIC_VERBOSE, "Setting %d in the " |
2156 | "phys_id_present_map\n", | 2142 | "phys_id_present_map\n", |
2157 | mp_ioapics[apic].mp_apicid); | 2143 | mp_ioapics[apic_id].apicid); |
2158 | physids_or(phys_id_present_map, phys_id_present_map, tmp); | 2144 | physids_or(phys_id_present_map, phys_id_present_map, tmp); |
2159 | } | 2145 | } |
2160 | 2146 | ||
@@ -2163,11 +2149,11 @@ static void __init setup_ioapic_ids_from_mpc(void) | |||
2163 | * We need to adjust the IRQ routing table | 2149 | * We need to adjust the IRQ routing table |
2164 | * if the ID changed. | 2150 | * if the ID changed. |
2165 | */ | 2151 | */ |
2166 | if (old_id != mp_ioapics[apic].mp_apicid) | 2152 | if (old_id != mp_ioapics[apic_id].apicid) |
2167 | for (i = 0; i < mp_irq_entries; i++) | 2153 | for (i = 0; i < mp_irq_entries; i++) |
2168 | if (mp_irqs[i].mp_dstapic == old_id) | 2154 | if (mp_irqs[i].dstapic == old_id) |
2169 | mp_irqs[i].mp_dstapic | 2155 | mp_irqs[i].dstapic |
2170 | = mp_ioapics[apic].mp_apicid; | 2156 | = mp_ioapics[apic_id].apicid; |
2171 | 2157 | ||
2172 | /* | 2158 | /* |
2173 | * Read the right value from the MPC table and | 2159 | * Read the right value from the MPC table and |
@@ -2175,20 +2161,20 @@ static void __init setup_ioapic_ids_from_mpc(void) | |||
2175 | */ | 2161 | */ |
2176 | apic_printk(APIC_VERBOSE, KERN_INFO | 2162 | apic_printk(APIC_VERBOSE, KERN_INFO |
2177 | "...changing IO-APIC physical APIC ID to %d ...", | 2163 | "...changing IO-APIC physical APIC ID to %d ...", |
2178 | mp_ioapics[apic].mp_apicid); | 2164 | mp_ioapics[apic_id].apicid); |
2179 | 2165 | ||
2180 | reg_00.bits.ID = mp_ioapics[apic].mp_apicid; | 2166 | reg_00.bits.ID = mp_ioapics[apic_id].apicid; |
2181 | spin_lock_irqsave(&ioapic_lock, flags); | 2167 | spin_lock_irqsave(&ioapic_lock, flags); |
2182 | io_apic_write(apic, 0, reg_00.raw); | 2168 | io_apic_write(apic_id, 0, reg_00.raw); |
2183 | spin_unlock_irqrestore(&ioapic_lock, flags); | 2169 | spin_unlock_irqrestore(&ioapic_lock, flags); |
2184 | 2170 | ||
2185 | /* | 2171 | /* |
2186 | * Sanity check | 2172 | * Sanity check |
2187 | */ | 2173 | */ |
2188 | spin_lock_irqsave(&ioapic_lock, flags); | 2174 | spin_lock_irqsave(&ioapic_lock, flags); |
2189 | reg_00.raw = io_apic_read(apic, 0); | 2175 | reg_00.raw = io_apic_read(apic_id, 0); |
2190 | spin_unlock_irqrestore(&ioapic_lock, flags); | 2176 | spin_unlock_irqrestore(&ioapic_lock, flags); |
2191 | if (reg_00.bits.ID != mp_ioapics[apic].mp_apicid) | 2177 | if (reg_00.bits.ID != mp_ioapics[apic_id].apicid) |
2192 | printk("could not set ID!\n"); | 2178 | printk("could not set ID!\n"); |
2193 | else | 2179 | else |
2194 | apic_printk(APIC_VERBOSE, " ok.\n"); | 2180 | apic_printk(APIC_VERBOSE, " ok.\n"); |
@@ -2291,7 +2277,7 @@ static int ioapic_retrigger_irq(unsigned int irq) | |||
2291 | unsigned long flags; | 2277 | unsigned long flags; |
2292 | 2278 | ||
2293 | spin_lock_irqsave(&vector_lock, flags); | 2279 | spin_lock_irqsave(&vector_lock, flags); |
2294 | send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); | 2280 | apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); |
2295 | spin_unlock_irqrestore(&vector_lock, flags); | 2281 | spin_unlock_irqrestore(&vector_lock, flags); |
2296 | 2282 | ||
2297 | return 1; | 2283 | return 1; |
@@ -2299,7 +2285,7 @@ static int ioapic_retrigger_irq(unsigned int irq) | |||
2299 | #else | 2285 | #else |
2300 | static int ioapic_retrigger_irq(unsigned int irq) | 2286 | static int ioapic_retrigger_irq(unsigned int irq) |
2301 | { | 2287 | { |
2302 | send_IPI_self(irq_cfg(irq)->vector); | 2288 | apic->send_IPI_self(irq_cfg(irq)->vector); |
2303 | 2289 | ||
2304 | return 1; | 2290 | return 1; |
2305 | } | 2291 | } |
@@ -2363,7 +2349,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | |||
2363 | 2349 | ||
2364 | set_extra_move_desc(desc, mask); | 2350 | set_extra_move_desc(desc, mask); |
2365 | 2351 | ||
2366 | dest = cpu_mask_to_apicid_and(cfg->domain, mask); | 2352 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask); |
2367 | 2353 | ||
2368 | modify_ioapic_rte = desc->status & IRQ_LEVEL; | 2354 | modify_ioapic_rte = desc->status & IRQ_LEVEL; |
2369 | if (modify_ioapic_rte) { | 2355 | if (modify_ioapic_rte) { |
@@ -2383,7 +2369,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | |||
2383 | if (cfg->move_in_progress) | 2369 | if (cfg->move_in_progress) |
2384 | send_cleanup_vector(cfg); | 2370 | send_cleanup_vector(cfg); |
2385 | 2371 | ||
2386 | cpumask_copy(&desc->affinity, mask); | 2372 | cpumask_copy(desc->affinity, mask); |
2387 | } | 2373 | } |
2388 | 2374 | ||
2389 | static int migrate_irq_remapped_level_desc(struct irq_desc *desc) | 2375 | static int migrate_irq_remapped_level_desc(struct irq_desc *desc) |
@@ -2405,11 +2391,11 @@ static int migrate_irq_remapped_level_desc(struct irq_desc *desc) | |||
2405 | } | 2391 | } |
2406 | 2392 | ||
2407 | /* everthing is clear. we have right of way */ | 2393 | /* everthing is clear. we have right of way */ |
2408 | migrate_ioapic_irq_desc(desc, &desc->pending_mask); | 2394 | migrate_ioapic_irq_desc(desc, desc->pending_mask); |
2409 | 2395 | ||
2410 | ret = 0; | 2396 | ret = 0; |
2411 | desc->status &= ~IRQ_MOVE_PENDING; | 2397 | desc->status &= ~IRQ_MOVE_PENDING; |
2412 | cpumask_clear(&desc->pending_mask); | 2398 | cpumask_clear(desc->pending_mask); |
2413 | 2399 | ||
2414 | unmask: | 2400 | unmask: |
2415 | unmask_IO_APIC_irq_desc(desc); | 2401 | unmask_IO_APIC_irq_desc(desc); |
@@ -2434,7 +2420,7 @@ static void ir_irq_migration(struct work_struct *work) | |||
2434 | continue; | 2420 | continue; |
2435 | } | 2421 | } |
2436 | 2422 | ||
2437 | desc->chip->set_affinity(irq, &desc->pending_mask); | 2423 | desc->chip->set_affinity(irq, desc->pending_mask); |
2438 | spin_unlock_irqrestore(&desc->lock, flags); | 2424 | spin_unlock_irqrestore(&desc->lock, flags); |
2439 | } | 2425 | } |
2440 | } | 2426 | } |
@@ -2448,7 +2434,7 @@ static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc, | |||
2448 | { | 2434 | { |
2449 | if (desc->status & IRQ_LEVEL) { | 2435 | if (desc->status & IRQ_LEVEL) { |
2450 | desc->status |= IRQ_MOVE_PENDING; | 2436 | desc->status |= IRQ_MOVE_PENDING; |
2451 | cpumask_copy(&desc->pending_mask, mask); | 2437 | cpumask_copy(desc->pending_mask, mask); |
2452 | migrate_irq_remapped_level_desc(desc); | 2438 | migrate_irq_remapped_level_desc(desc); |
2453 | return; | 2439 | return; |
2454 | } | 2440 | } |
@@ -2516,7 +2502,7 @@ static void irq_complete_move(struct irq_desc **descp) | |||
2516 | 2502 | ||
2517 | /* domain has not changed, but affinity did */ | 2503 | /* domain has not changed, but affinity did */ |
2518 | me = smp_processor_id(); | 2504 | me = smp_processor_id(); |
2519 | if (cpu_isset(me, desc->affinity)) { | 2505 | if (cpumask_test_cpu(me, desc->affinity)) { |
2520 | *descp = desc = move_irq_desc(desc, me); | 2506 | *descp = desc = move_irq_desc(desc, me); |
2521 | /* get the new one */ | 2507 | /* get the new one */ |
2522 | cfg = desc->chip_data; | 2508 | cfg = desc->chip_data; |
@@ -2867,19 +2853,15 @@ static inline void __init check_timer(void) | |||
2867 | int cpu = boot_cpu_id; | 2853 | int cpu = boot_cpu_id; |
2868 | int apic1, pin1, apic2, pin2; | 2854 | int apic1, pin1, apic2, pin2; |
2869 | unsigned long flags; | 2855 | unsigned long flags; |
2870 | unsigned int ver; | ||
2871 | int no_pin1 = 0; | 2856 | int no_pin1 = 0; |
2872 | 2857 | ||
2873 | local_irq_save(flags); | 2858 | local_irq_save(flags); |
2874 | 2859 | ||
2875 | ver = apic_read(APIC_LVR); | ||
2876 | ver = GET_APIC_VERSION(ver); | ||
2877 | |||
2878 | /* | 2860 | /* |
2879 | * get/set the timer IRQ vector: | 2861 | * get/set the timer IRQ vector: |
2880 | */ | 2862 | */ |
2881 | disable_8259A_irq(0); | 2863 | disable_8259A_irq(0); |
2882 | assign_irq_vector(0, cfg, TARGET_CPUS); | 2864 | assign_irq_vector(0, cfg, apic->target_cpus()); |
2883 | 2865 | ||
2884 | /* | 2866 | /* |
2885 | * As IRQ0 is to be enabled in the 8259A, the virtual | 2867 | * As IRQ0 is to be enabled in the 8259A, the virtual |
@@ -2893,7 +2875,13 @@ static inline void __init check_timer(void) | |||
2893 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); | 2875 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
2894 | init_8259A(1); | 2876 | init_8259A(1); |
2895 | #ifdef CONFIG_X86_32 | 2877 | #ifdef CONFIG_X86_32 |
2896 | timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); | 2878 | { |
2879 | unsigned int ver; | ||
2880 | |||
2881 | ver = apic_read(APIC_LVR); | ||
2882 | ver = GET_APIC_VERSION(ver); | ||
2883 | timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); | ||
2884 | } | ||
2897 | #endif | 2885 | #endif |
2898 | 2886 | ||
2899 | pin1 = find_isa_irq_pin(0, mp_INT); | 2887 | pin1 = find_isa_irq_pin(0, mp_INT); |
@@ -2932,8 +2920,17 @@ static inline void __init check_timer(void) | |||
2932 | if (no_pin1) { | 2920 | if (no_pin1) { |
2933 | add_pin_to_irq_cpu(cfg, cpu, apic1, pin1); | 2921 | add_pin_to_irq_cpu(cfg, cpu, apic1, pin1); |
2934 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); | 2922 | setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); |
2923 | } else { | ||
2924 | /* for edge trigger, setup_IO_APIC_irq already | ||
2925 | * leave it unmasked. | ||
2926 | * so only need to unmask if it is level-trigger | ||
2927 | * do we really have level trigger timer? | ||
2928 | */ | ||
2929 | int idx; | ||
2930 | idx = find_irq_entry(apic1, pin1, mp_INT); | ||
2931 | if (idx != -1 && irq_trigger(idx)) | ||
2932 | unmask_IO_APIC_irq_desc(desc); | ||
2935 | } | 2933 | } |
2936 | unmask_IO_APIC_irq_desc(desc); | ||
2937 | if (timer_irq_works()) { | 2934 | if (timer_irq_works()) { |
2938 | if (nmi_watchdog == NMI_IO_APIC) { | 2935 | if (nmi_watchdog == NMI_IO_APIC) { |
2939 | setup_nmi(); | 2936 | setup_nmi(); |
@@ -2947,6 +2944,7 @@ static inline void __init check_timer(void) | |||
2947 | if (intr_remapping_enabled) | 2944 | if (intr_remapping_enabled) |
2948 | panic("timer doesn't work through Interrupt-remapped IO-APIC"); | 2945 | panic("timer doesn't work through Interrupt-remapped IO-APIC"); |
2949 | #endif | 2946 | #endif |
2947 | local_irq_disable(); | ||
2950 | clear_IO_APIC_pin(apic1, pin1); | 2948 | clear_IO_APIC_pin(apic1, pin1); |
2951 | if (!no_pin1) | 2949 | if (!no_pin1) |
2952 | apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " | 2950 | apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " |
@@ -2961,7 +2959,6 @@ static inline void __init check_timer(void) | |||
2961 | */ | 2959 | */ |
2962 | replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2); | 2960 | replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2); |
2963 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); | 2961 | setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); |
2964 | unmask_IO_APIC_irq_desc(desc); | ||
2965 | enable_8259A_irq(0); | 2962 | enable_8259A_irq(0); |
2966 | if (timer_irq_works()) { | 2963 | if (timer_irq_works()) { |
2967 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); | 2964 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); |
@@ -2976,6 +2973,7 @@ static inline void __init check_timer(void) | |||
2976 | /* | 2973 | /* |
2977 | * Cleanup, just in case ... | 2974 | * Cleanup, just in case ... |
2978 | */ | 2975 | */ |
2976 | local_irq_disable(); | ||
2979 | disable_8259A_irq(0); | 2977 | disable_8259A_irq(0); |
2980 | clear_IO_APIC_pin(apic2, pin2); | 2978 | clear_IO_APIC_pin(apic2, pin2); |
2981 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); | 2979 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); |
@@ -3001,6 +2999,7 @@ static inline void __init check_timer(void) | |||
3001 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); | 2999 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
3002 | goto out; | 3000 | goto out; |
3003 | } | 3001 | } |
3002 | local_irq_disable(); | ||
3004 | disable_8259A_irq(0); | 3003 | disable_8259A_irq(0); |
3005 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); | 3004 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); |
3006 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); | 3005 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); |
@@ -3018,6 +3017,7 @@ static inline void __init check_timer(void) | |||
3018 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); | 3017 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
3019 | goto out; | 3018 | goto out; |
3020 | } | 3019 | } |
3020 | local_irq_disable(); | ||
3021 | apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); | 3021 | apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); |
3022 | panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " | 3022 | panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " |
3023 | "report. Then try booting with the 'noapic' option.\n"); | 3023 | "report. Then try booting with the 'noapic' option.\n"); |
@@ -3047,13 +3047,9 @@ out: | |||
3047 | void __init setup_IO_APIC(void) | 3047 | void __init setup_IO_APIC(void) |
3048 | { | 3048 | { |
3049 | 3049 | ||
3050 | #ifdef CONFIG_X86_32 | ||
3051 | enable_IO_APIC(); | ||
3052 | #else | ||
3053 | /* | 3050 | /* |
3054 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP | 3051 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
3055 | */ | 3052 | */ |
3056 | #endif | ||
3057 | 3053 | ||
3058 | io_apic_irqs = ~PIC_IRQS; | 3054 | io_apic_irqs = ~PIC_IRQS; |
3059 | 3055 | ||
@@ -3118,8 +3114,8 @@ static int ioapic_resume(struct sys_device *dev) | |||
3118 | 3114 | ||
3119 | spin_lock_irqsave(&ioapic_lock, flags); | 3115 | spin_lock_irqsave(&ioapic_lock, flags); |
3120 | reg_00.raw = io_apic_read(dev->id, 0); | 3116 | reg_00.raw = io_apic_read(dev->id, 0); |
3121 | if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) { | 3117 | if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) { |
3122 | reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid; | 3118 | reg_00.bits.ID = mp_ioapics[dev->id].apicid; |
3123 | io_apic_write(dev->id, 0, reg_00.raw); | 3119 | io_apic_write(dev->id, 0, reg_00.raw); |
3124 | } | 3120 | } |
3125 | spin_unlock_irqrestore(&ioapic_lock, flags); | 3121 | spin_unlock_irqrestore(&ioapic_lock, flags); |
@@ -3169,6 +3165,7 @@ static int __init ioapic_init_sysfs(void) | |||
3169 | 3165 | ||
3170 | device_initcall(ioapic_init_sysfs); | 3166 | device_initcall(ioapic_init_sysfs); |
3171 | 3167 | ||
3168 | static int nr_irqs_gsi = NR_IRQS_LEGACY; | ||
3172 | /* | 3169 | /* |
3173 | * Dynamic irq allocate and deallocation | 3170 | * Dynamic irq allocate and deallocation |
3174 | */ | 3171 | */ |
@@ -3183,11 +3180,11 @@ unsigned int create_irq_nr(unsigned int irq_want) | |||
3183 | struct irq_desc *desc_new = NULL; | 3180 | struct irq_desc *desc_new = NULL; |
3184 | 3181 | ||
3185 | irq = 0; | 3182 | irq = 0; |
3186 | spin_lock_irqsave(&vector_lock, flags); | 3183 | if (irq_want < nr_irqs_gsi) |
3187 | for (new = irq_want; new < NR_IRQS; new++) { | 3184 | irq_want = nr_irqs_gsi; |
3188 | if (platform_legacy_irq(new)) | ||
3189 | continue; | ||
3190 | 3185 | ||
3186 | spin_lock_irqsave(&vector_lock, flags); | ||
3187 | for (new = irq_want; new < nr_irqs; new++) { | ||
3191 | desc_new = irq_to_desc_alloc_cpu(new, cpu); | 3188 | desc_new = irq_to_desc_alloc_cpu(new, cpu); |
3192 | if (!desc_new) { | 3189 | if (!desc_new) { |
3193 | printk(KERN_INFO "can not get irq_desc for %d\n", new); | 3190 | printk(KERN_INFO "can not get irq_desc for %d\n", new); |
@@ -3197,7 +3194,7 @@ unsigned int create_irq_nr(unsigned int irq_want) | |||
3197 | 3194 | ||
3198 | if (cfg_new->vector != 0) | 3195 | if (cfg_new->vector != 0) |
3199 | continue; | 3196 | continue; |
3200 | if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0) | 3197 | if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0) |
3201 | irq = new; | 3198 | irq = new; |
3202 | break; | 3199 | break; |
3203 | } | 3200 | } |
@@ -3212,7 +3209,6 @@ unsigned int create_irq_nr(unsigned int irq_want) | |||
3212 | return irq; | 3209 | return irq; |
3213 | } | 3210 | } |
3214 | 3211 | ||
3215 | static int nr_irqs_gsi = NR_IRQS_LEGACY; | ||
3216 | int create_irq(void) | 3212 | int create_irq(void) |
3217 | { | 3213 | { |
3218 | unsigned int irq_want; | 3214 | unsigned int irq_want; |
@@ -3259,12 +3255,15 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms | |||
3259 | int err; | 3255 | int err; |
3260 | unsigned dest; | 3256 | unsigned dest; |
3261 | 3257 | ||
3258 | if (disable_apic) | ||
3259 | return -ENXIO; | ||
3260 | |||
3262 | cfg = irq_cfg(irq); | 3261 | cfg = irq_cfg(irq); |
3263 | err = assign_irq_vector(irq, cfg, TARGET_CPUS); | 3262 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
3264 | if (err) | 3263 | if (err) |
3265 | return err; | 3264 | return err; |
3266 | 3265 | ||
3267 | dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); | 3266 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
3268 | 3267 | ||
3269 | #ifdef CONFIG_INTR_REMAP | 3268 | #ifdef CONFIG_INTR_REMAP |
3270 | if (irq_remapped(irq)) { | 3269 | if (irq_remapped(irq)) { |
@@ -3278,9 +3277,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms | |||
3278 | memset (&irte, 0, sizeof(irte)); | 3277 | memset (&irte, 0, sizeof(irte)); |
3279 | 3278 | ||
3280 | irte.present = 1; | 3279 | irte.present = 1; |
3281 | irte.dst_mode = INT_DEST_MODE; | 3280 | irte.dst_mode = apic->irq_dest_mode; |
3282 | irte.trigger_mode = 0; /* edge */ | 3281 | irte.trigger_mode = 0; /* edge */ |
3283 | irte.dlvry_mode = INT_DELIVERY_MODE; | 3282 | irte.dlvry_mode = apic->irq_delivery_mode; |
3284 | irte.vector = cfg->vector; | 3283 | irte.vector = cfg->vector; |
3285 | irte.dest_id = IRTE_DEST(dest); | 3284 | irte.dest_id = IRTE_DEST(dest); |
3286 | 3285 | ||
@@ -3298,10 +3297,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms | |||
3298 | msg->address_hi = MSI_ADDR_BASE_HI; | 3297 | msg->address_hi = MSI_ADDR_BASE_HI; |
3299 | msg->address_lo = | 3298 | msg->address_lo = |
3300 | MSI_ADDR_BASE_LO | | 3299 | MSI_ADDR_BASE_LO | |
3301 | ((INT_DEST_MODE == 0) ? | 3300 | ((apic->irq_dest_mode == 0) ? |
3302 | MSI_ADDR_DEST_MODE_PHYSICAL: | 3301 | MSI_ADDR_DEST_MODE_PHYSICAL: |
3303 | MSI_ADDR_DEST_MODE_LOGICAL) | | 3302 | MSI_ADDR_DEST_MODE_LOGICAL) | |
3304 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? | 3303 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
3305 | MSI_ADDR_REDIRECTION_CPU: | 3304 | MSI_ADDR_REDIRECTION_CPU: |
3306 | MSI_ADDR_REDIRECTION_LOWPRI) | | 3305 | MSI_ADDR_REDIRECTION_LOWPRI) | |
3307 | MSI_ADDR_DEST_ID(dest); | 3306 | MSI_ADDR_DEST_ID(dest); |
@@ -3309,7 +3308,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms | |||
3309 | msg->data = | 3308 | msg->data = |
3310 | MSI_DATA_TRIGGER_EDGE | | 3309 | MSI_DATA_TRIGGER_EDGE | |
3311 | MSI_DATA_LEVEL_ASSERT | | 3310 | MSI_DATA_LEVEL_ASSERT | |
3312 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? | 3311 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
3313 | MSI_DATA_DELIVERY_FIXED: | 3312 | MSI_DATA_DELIVERY_FIXED: |
3314 | MSI_DATA_DELIVERY_LOWPRI) | | 3313 | MSI_DATA_DELIVERY_LOWPRI) | |
3315 | MSI_DATA_VECTOR(cfg->vector); | 3314 | MSI_DATA_VECTOR(cfg->vector); |
@@ -3464,40 +3463,6 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq) | |||
3464 | return 0; | 3463 | return 0; |
3465 | } | 3464 | } |
3466 | 3465 | ||
3467 | int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc) | ||
3468 | { | ||
3469 | unsigned int irq; | ||
3470 | int ret; | ||
3471 | unsigned int irq_want; | ||
3472 | |||
3473 | irq_want = nr_irqs_gsi; | ||
3474 | irq = create_irq_nr(irq_want); | ||
3475 | if (irq == 0) | ||
3476 | return -1; | ||
3477 | |||
3478 | #ifdef CONFIG_INTR_REMAP | ||
3479 | if (!intr_remapping_enabled) | ||
3480 | goto no_ir; | ||
3481 | |||
3482 | ret = msi_alloc_irte(dev, irq, 1); | ||
3483 | if (ret < 0) | ||
3484 | goto error; | ||
3485 | no_ir: | ||
3486 | #endif | ||
3487 | ret = setup_msi_irq(dev, msidesc, irq); | ||
3488 | if (ret < 0) { | ||
3489 | destroy_irq(irq); | ||
3490 | return ret; | ||
3491 | } | ||
3492 | return 0; | ||
3493 | |||
3494 | #ifdef CONFIG_INTR_REMAP | ||
3495 | error: | ||
3496 | destroy_irq(irq); | ||
3497 | return ret; | ||
3498 | #endif | ||
3499 | } | ||
3500 | |||
3501 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | 3466 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
3502 | { | 3467 | { |
3503 | unsigned int irq; | 3468 | unsigned int irq; |
@@ -3514,9 +3479,9 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
3514 | sub_handle = 0; | 3479 | sub_handle = 0; |
3515 | list_for_each_entry(msidesc, &dev->msi_list, list) { | 3480 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
3516 | irq = create_irq_nr(irq_want); | 3481 | irq = create_irq_nr(irq_want); |
3517 | irq_want++; | ||
3518 | if (irq == 0) | 3482 | if (irq == 0) |
3519 | return -1; | 3483 | return -1; |
3484 | irq_want = irq + 1; | ||
3520 | #ifdef CONFIG_INTR_REMAP | 3485 | #ifdef CONFIG_INTR_REMAP |
3521 | if (!intr_remapping_enabled) | 3486 | if (!intr_remapping_enabled) |
3522 | goto no_ir; | 3487 | goto no_ir; |
@@ -3727,13 +3692,17 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) | |||
3727 | struct irq_cfg *cfg; | 3692 | struct irq_cfg *cfg; |
3728 | int err; | 3693 | int err; |
3729 | 3694 | ||
3695 | if (disable_apic) | ||
3696 | return -ENXIO; | ||
3697 | |||
3730 | cfg = irq_cfg(irq); | 3698 | cfg = irq_cfg(irq); |
3731 | err = assign_irq_vector(irq, cfg, TARGET_CPUS); | 3699 | err = assign_irq_vector(irq, cfg, apic->target_cpus()); |
3732 | if (!err) { | 3700 | if (!err) { |
3733 | struct ht_irq_msg msg; | 3701 | struct ht_irq_msg msg; |
3734 | unsigned dest; | 3702 | unsigned dest; |
3735 | 3703 | ||
3736 | dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); | 3704 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, |
3705 | apic->target_cpus()); | ||
3737 | 3706 | ||
3738 | msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); | 3707 | msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); |
3739 | 3708 | ||
@@ -3741,11 +3710,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) | |||
3741 | HT_IRQ_LOW_BASE | | 3710 | HT_IRQ_LOW_BASE | |
3742 | HT_IRQ_LOW_DEST_ID(dest) | | 3711 | HT_IRQ_LOW_DEST_ID(dest) | |
3743 | HT_IRQ_LOW_VECTOR(cfg->vector) | | 3712 | HT_IRQ_LOW_VECTOR(cfg->vector) | |
3744 | ((INT_DEST_MODE == 0) ? | 3713 | ((apic->irq_dest_mode == 0) ? |
3745 | HT_IRQ_LOW_DM_PHYSICAL : | 3714 | HT_IRQ_LOW_DM_PHYSICAL : |
3746 | HT_IRQ_LOW_DM_LOGICAL) | | 3715 | HT_IRQ_LOW_DM_LOGICAL) | |
3747 | HT_IRQ_LOW_RQEOI_EDGE | | 3716 | HT_IRQ_LOW_RQEOI_EDGE | |
3748 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? | 3717 | ((apic->irq_delivery_mode != dest_LowestPrio) ? |
3749 | HT_IRQ_LOW_MT_FIXED : | 3718 | HT_IRQ_LOW_MT_FIXED : |
3750 | HT_IRQ_LOW_MT_ARBITRATED) | | 3719 | HT_IRQ_LOW_MT_ARBITRATED) | |
3751 | HT_IRQ_LOW_IRQ_MASKED; | 3720 | HT_IRQ_LOW_IRQ_MASKED; |
@@ -3761,7 +3730,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) | |||
3761 | } | 3730 | } |
3762 | #endif /* CONFIG_HT_IRQ */ | 3731 | #endif /* CONFIG_HT_IRQ */ |
3763 | 3732 | ||
3764 | #ifdef CONFIG_X86_64 | 3733 | #ifdef CONFIG_X86_UV |
3765 | /* | 3734 | /* |
3766 | * Re-target the irq to the specified CPU and enable the specified MMR located | 3735 | * Re-target the irq to the specified CPU and enable the specified MMR located |
3767 | * on the specified blade to allow the sending of MSIs to the specified CPU. | 3736 | * on the specified blade to allow the sending of MSIs to the specified CPU. |
@@ -3793,12 +3762,12 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, | |||
3793 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); | 3762 | BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); |
3794 | 3763 | ||
3795 | entry->vector = cfg->vector; | 3764 | entry->vector = cfg->vector; |
3796 | entry->delivery_mode = INT_DELIVERY_MODE; | 3765 | entry->delivery_mode = apic->irq_delivery_mode; |
3797 | entry->dest_mode = INT_DEST_MODE; | 3766 | entry->dest_mode = apic->irq_dest_mode; |
3798 | entry->polarity = 0; | 3767 | entry->polarity = 0; |
3799 | entry->trigger = 0; | 3768 | entry->trigger = 0; |
3800 | entry->mask = 0; | 3769 | entry->mask = 0; |
3801 | entry->dest = cpu_mask_to_apicid(eligible_cpu); | 3770 | entry->dest = apic->cpu_mask_to_apicid(eligible_cpu); |
3802 | 3771 | ||
3803 | mmr_pnode = uv_blade_to_pnode(mmr_blade); | 3772 | mmr_pnode = uv_blade_to_pnode(mmr_blade); |
3804 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); | 3773 | uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); |
@@ -3861,6 +3830,28 @@ void __init probe_nr_irqs_gsi(void) | |||
3861 | printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi); | 3830 | printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi); |
3862 | } | 3831 | } |
3863 | 3832 | ||
3833 | #ifdef CONFIG_SPARSE_IRQ | ||
3834 | int __init arch_probe_nr_irqs(void) | ||
3835 | { | ||
3836 | int nr; | ||
3837 | |||
3838 | if (nr_irqs > (NR_VECTORS * nr_cpu_ids)) | ||
3839 | nr_irqs = NR_VECTORS * nr_cpu_ids; | ||
3840 | |||
3841 | nr = nr_irqs_gsi + 8 * nr_cpu_ids; | ||
3842 | #if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ) | ||
3843 | /* | ||
3844 | * for MSI and HT dyn irq | ||
3845 | */ | ||
3846 | nr += nr_irqs_gsi * 16; | ||
3847 | #endif | ||
3848 | if (nr < nr_irqs) | ||
3849 | nr_irqs = nr; | ||
3850 | |||
3851 | return 0; | ||
3852 | } | ||
3853 | #endif | ||
3854 | |||
3864 | /* -------------------------------------------------------------------------- | 3855 | /* -------------------------------------------------------------------------- |
3865 | ACPI-based IOAPIC Configuration | 3856 | ACPI-based IOAPIC Configuration |
3866 | -------------------------------------------------------------------------- */ | 3857 | -------------------------------------------------------------------------- */ |
@@ -3886,7 +3877,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id) | |||
3886 | */ | 3877 | */ |
3887 | 3878 | ||
3888 | if (physids_empty(apic_id_map)) | 3879 | if (physids_empty(apic_id_map)) |
3889 | apic_id_map = ioapic_phys_id_map(phys_cpu_present_map); | 3880 | apic_id_map = apic->ioapic_phys_id_map(phys_cpu_present_map); |
3890 | 3881 | ||
3891 | spin_lock_irqsave(&ioapic_lock, flags); | 3882 | spin_lock_irqsave(&ioapic_lock, flags); |
3892 | reg_00.raw = io_apic_read(ioapic, 0); | 3883 | reg_00.raw = io_apic_read(ioapic, 0); |
@@ -3902,10 +3893,10 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id) | |||
3902 | * Every APIC in a system must have a unique ID or we get lots of nice | 3893 | * Every APIC in a system must have a unique ID or we get lots of nice |
3903 | * 'stuck on smp_invalidate_needed IPI wait' messages. | 3894 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
3904 | */ | 3895 | */ |
3905 | if (check_apicid_used(apic_id_map, apic_id)) { | 3896 | if (apic->check_apicid_used(apic_id_map, apic_id)) { |
3906 | 3897 | ||
3907 | for (i = 0; i < get_physical_broadcast(); i++) { | 3898 | for (i = 0; i < get_physical_broadcast(); i++) { |
3908 | if (!check_apicid_used(apic_id_map, i)) | 3899 | if (!apic->check_apicid_used(apic_id_map, i)) |
3909 | break; | 3900 | break; |
3910 | } | 3901 | } |
3911 | 3902 | ||
@@ -3918,7 +3909,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id) | |||
3918 | apic_id = i; | 3909 | apic_id = i; |
3919 | } | 3910 | } |
3920 | 3911 | ||
3921 | tmp = apicid_to_cpu_present(apic_id); | 3912 | tmp = apic->apicid_to_cpu_present(apic_id); |
3922 | physids_or(apic_id_map, apic_id_map, tmp); | 3913 | physids_or(apic_id_map, apic_id_map, tmp); |
3923 | 3914 | ||
3924 | if (reg_00.bits.ID != apic_id) { | 3915 | if (reg_00.bits.ID != apic_id) { |
@@ -3995,8 +3986,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) | |||
3995 | return -1; | 3986 | return -1; |
3996 | 3987 | ||
3997 | for (i = 0; i < mp_irq_entries; i++) | 3988 | for (i = 0; i < mp_irq_entries; i++) |
3998 | if (mp_irqs[i].mp_irqtype == mp_INT && | 3989 | if (mp_irqs[i].irqtype == mp_INT && |
3999 | mp_irqs[i].mp_srcbusirq == bus_irq) | 3990 | mp_irqs[i].srcbusirq == bus_irq) |
4000 | break; | 3991 | break; |
4001 | if (i >= mp_irq_entries) | 3992 | if (i >= mp_irq_entries) |
4002 | return -1; | 3993 | return -1; |
@@ -4011,7 +4002,7 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) | |||
4011 | /* | 4002 | /* |
4012 | * This function currently is only a helper for the i386 smp boot process where | 4003 | * This function currently is only a helper for the i386 smp boot process where |
4013 | * we need to reprogram the ioredtbls to cater for the cpus which have come online | 4004 | * we need to reprogram the ioredtbls to cater for the cpus which have come online |
4014 | * so mask in all cases should simply be TARGET_CPUS | 4005 | * so mask in all cases should simply be apic->target_cpus() |
4015 | */ | 4006 | */ |
4016 | #ifdef CONFIG_SMP | 4007 | #ifdef CONFIG_SMP |
4017 | void __init setup_ioapic_dest(void) | 4008 | void __init setup_ioapic_dest(void) |
@@ -4050,9 +4041,9 @@ void __init setup_ioapic_dest(void) | |||
4050 | */ | 4041 | */ |
4051 | if (desc->status & | 4042 | if (desc->status & |
4052 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) | 4043 | (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) |
4053 | mask = &desc->affinity; | 4044 | mask = desc->affinity; |
4054 | else | 4045 | else |
4055 | mask = TARGET_CPUS; | 4046 | mask = apic->target_cpus(); |
4056 | 4047 | ||
4057 | #ifdef CONFIG_INTR_REMAP | 4048 | #ifdef CONFIG_INTR_REMAP |
4058 | if (intr_remapping_enabled) | 4049 | if (intr_remapping_enabled) |
@@ -4111,7 +4102,7 @@ void __init ioapic_init_mappings(void) | |||
4111 | ioapic_res = ioapic_setup_resources(); | 4102 | ioapic_res = ioapic_setup_resources(); |
4112 | for (i = 0; i < nr_ioapics; i++) { | 4103 | for (i = 0; i < nr_ioapics; i++) { |
4113 | if (smp_found_config) { | 4104 | if (smp_found_config) { |
4114 | ioapic_phys = mp_ioapics[i].mp_apicaddr; | 4105 | ioapic_phys = mp_ioapics[i].apicaddr; |
4115 | #ifdef CONFIG_X86_32 | 4106 | #ifdef CONFIG_X86_32 |
4116 | if (!ioapic_phys) { | 4107 | if (!ioapic_phys) { |
4117 | printk(KERN_ERR | 4108 | printk(KERN_ERR |
diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c new file mode 100644 index 000000000000..dbf5445727a9 --- /dev/null +++ b/arch/x86/kernel/apic/ipi.c | |||
@@ -0,0 +1,164 @@ | |||
1 | #include <linux/cpumask.h> | ||
2 | #include <linux/interrupt.h> | ||
3 | #include <linux/init.h> | ||
4 | |||
5 | #include <linux/mm.h> | ||
6 | #include <linux/delay.h> | ||
7 | #include <linux/spinlock.h> | ||
8 | #include <linux/kernel_stat.h> | ||
9 | #include <linux/mc146818rtc.h> | ||
10 | #include <linux/cache.h> | ||
11 | #include <linux/cpu.h> | ||
12 | #include <linux/module.h> | ||
13 | |||
14 | #include <asm/smp.h> | ||
15 | #include <asm/mtrr.h> | ||
16 | #include <asm/tlbflush.h> | ||
17 | #include <asm/mmu_context.h> | ||
18 | #include <asm/apic.h> | ||
19 | #include <asm/proto.h> | ||
20 | #include <asm/ipi.h> | ||
21 | |||
22 | void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector) | ||
23 | { | ||
24 | unsigned long query_cpu; | ||
25 | unsigned long flags; | ||
26 | |||
27 | /* | ||
28 | * Hack. The clustered APIC addressing mode doesn't allow us to send | ||
29 | * to an arbitrary mask, so I do a unicast to each CPU instead. | ||
30 | * - mbligh | ||
31 | */ | ||
32 | local_irq_save(flags); | ||
33 | for_each_cpu(query_cpu, mask) { | ||
34 | __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, | ||
35 | query_cpu), vector, APIC_DEST_PHYSICAL); | ||
36 | } | ||
37 | local_irq_restore(flags); | ||
38 | } | ||
39 | |||
40 | void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, | ||
41 | int vector) | ||
42 | { | ||
43 | unsigned int this_cpu = smp_processor_id(); | ||
44 | unsigned int query_cpu; | ||
45 | unsigned long flags; | ||
46 | |||
47 | /* See Hack comment above */ | ||
48 | |||
49 | local_irq_save(flags); | ||
50 | for_each_cpu(query_cpu, mask) { | ||
51 | if (query_cpu == this_cpu) | ||
52 | continue; | ||
53 | __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, | ||
54 | query_cpu), vector, APIC_DEST_PHYSICAL); | ||
55 | } | ||
56 | local_irq_restore(flags); | ||
57 | } | ||
58 | |||
59 | void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, | ||
60 | int vector) | ||
61 | { | ||
62 | unsigned long flags; | ||
63 | unsigned int query_cpu; | ||
64 | |||
65 | /* | ||
66 | * Hack. The clustered APIC addressing mode doesn't allow us to send | ||
67 | * to an arbitrary mask, so I do a unicasts to each CPU instead. This | ||
68 | * should be modified to do 1 message per cluster ID - mbligh | ||
69 | */ | ||
70 | |||
71 | local_irq_save(flags); | ||
72 | for_each_cpu(query_cpu, mask) | ||
73 | __default_send_IPI_dest_field( | ||
74 | apic->cpu_to_logical_apicid(query_cpu), vector, | ||
75 | apic->dest_logical); | ||
76 | local_irq_restore(flags); | ||
77 | } | ||
78 | |||
79 | void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, | ||
80 | int vector) | ||
81 | { | ||
82 | unsigned long flags; | ||
83 | unsigned int query_cpu; | ||
84 | unsigned int this_cpu = smp_processor_id(); | ||
85 | |||
86 | /* See Hack comment above */ | ||
87 | |||
88 | local_irq_save(flags); | ||
89 | for_each_cpu(query_cpu, mask) { | ||
90 | if (query_cpu == this_cpu) | ||
91 | continue; | ||
92 | __default_send_IPI_dest_field( | ||
93 | apic->cpu_to_logical_apicid(query_cpu), vector, | ||
94 | apic->dest_logical); | ||
95 | } | ||
96 | local_irq_restore(flags); | ||
97 | } | ||
98 | |||
99 | #ifdef CONFIG_X86_32 | ||
100 | |||
101 | /* | ||
102 | * This is only used on smaller machines. | ||
103 | */ | ||
104 | void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector) | ||
105 | { | ||
106 | unsigned long mask = cpumask_bits(cpumask)[0]; | ||
107 | unsigned long flags; | ||
108 | |||
109 | local_irq_save(flags); | ||
110 | WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]); | ||
111 | __default_send_IPI_dest_field(mask, vector, apic->dest_logical); | ||
112 | local_irq_restore(flags); | ||
113 | } | ||
114 | |||
115 | void default_send_IPI_allbutself(int vector) | ||
116 | { | ||
117 | /* | ||
118 | * if there are no other CPUs in the system then we get an APIC send | ||
119 | * error if we try to broadcast, thus avoid sending IPIs in this case. | ||
120 | */ | ||
121 | if (!(num_online_cpus() > 1)) | ||
122 | return; | ||
123 | |||
124 | __default_local_send_IPI_allbutself(vector); | ||
125 | } | ||
126 | |||
127 | void default_send_IPI_all(int vector) | ||
128 | { | ||
129 | __default_local_send_IPI_all(vector); | ||
130 | } | ||
131 | |||
132 | void default_send_IPI_self(int vector) | ||
133 | { | ||
134 | __default_send_IPI_shortcut(APIC_DEST_SELF, vector, apic->dest_logical); | ||
135 | } | ||
136 | |||
137 | /* must come after the send_IPI functions above for inlining */ | ||
138 | static int convert_apicid_to_cpu(int apic_id) | ||
139 | { | ||
140 | int i; | ||
141 | |||
142 | for_each_possible_cpu(i) { | ||
143 | if (per_cpu(x86_cpu_to_apicid, i) == apic_id) | ||
144 | return i; | ||
145 | } | ||
146 | return -1; | ||
147 | } | ||
148 | |||
149 | int safe_smp_processor_id(void) | ||
150 | { | ||
151 | int apicid, cpuid; | ||
152 | |||
153 | if (!boot_cpu_has(X86_FEATURE_APIC)) | ||
154 | return 0; | ||
155 | |||
156 | apicid = hard_smp_processor_id(); | ||
157 | if (apicid == BAD_APICID) | ||
158 | return 0; | ||
159 | |||
160 | cpuid = convert_apicid_to_cpu(apicid); | ||
161 | |||
162 | return cpuid >= 0 ? cpuid : 0; | ||
163 | } | ||
164 | #endif | ||
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/apic/nmi.c index 7228979f1e7f..bdfad80c3cf1 100644 --- a/arch/x86/kernel/nmi.c +++ b/arch/x86/kernel/apic/nmi.c | |||
@@ -34,7 +34,7 @@ | |||
34 | 34 | ||
35 | #include <asm/mce.h> | 35 | #include <asm/mce.h> |
36 | 36 | ||
37 | #include <mach_traps.h> | 37 | #include <asm/mach_traps.h> |
38 | 38 | ||
39 | int unknown_nmi_panic; | 39 | int unknown_nmi_panic; |
40 | int nmi_watchdog_enabled; | 40 | int nmi_watchdog_enabled; |
@@ -61,11 +61,7 @@ static int endflag __initdata; | |||
61 | 61 | ||
62 | static inline unsigned int get_nmi_count(int cpu) | 62 | static inline unsigned int get_nmi_count(int cpu) |
63 | { | 63 | { |
64 | #ifdef CONFIG_X86_64 | 64 | return per_cpu(irq_stat, cpu).__nmi_count; |
65 | return cpu_pda(cpu)->__nmi_count; | ||
66 | #else | ||
67 | return nmi_count(cpu); | ||
68 | #endif | ||
69 | } | 65 | } |
70 | 66 | ||
71 | static inline int mce_in_progress(void) | 67 | static inline int mce_in_progress(void) |
@@ -82,12 +78,8 @@ static inline int mce_in_progress(void) | |||
82 | */ | 78 | */ |
83 | static inline unsigned int get_timer_irqs(int cpu) | 79 | static inline unsigned int get_timer_irqs(int cpu) |
84 | { | 80 | { |
85 | #ifdef CONFIG_X86_64 | ||
86 | return read_pda(apic_timer_irqs) + read_pda(irq0_irqs); | ||
87 | #else | ||
88 | return per_cpu(irq_stat, cpu).apic_timer_irqs + | 81 | return per_cpu(irq_stat, cpu).apic_timer_irqs + |
89 | per_cpu(irq_stat, cpu).irq0_irqs; | 82 | per_cpu(irq_stat, cpu).irq0_irqs; |
90 | #endif | ||
91 | } | 83 | } |
92 | 84 | ||
93 | #ifdef CONFIG_SMP | 85 | #ifdef CONFIG_SMP |
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c new file mode 100644 index 000000000000..ba2fc6465534 --- /dev/null +++ b/arch/x86/kernel/apic/numaq_32.c | |||
@@ -0,0 +1,557 @@ | |||
1 | /* | ||
2 | * Written by: Patricia Gaughen, IBM Corporation | ||
3 | * | ||
4 | * Copyright (C) 2002, IBM Corp. | ||
5 | * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar | ||
6 | * | ||
7 | * All rights reserved. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, but | ||
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
17 | * NON INFRINGEMENT. See the GNU General Public License for more | ||
18 | * details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
23 | * | ||
24 | * Send feedback to <gone@us.ibm.com> | ||
25 | */ | ||
26 | #include <linux/nodemask.h> | ||
27 | #include <linux/topology.h> | ||
28 | #include <linux/bootmem.h> | ||
29 | #include <linux/threads.h> | ||
30 | #include <linux/cpumask.h> | ||
31 | #include <linux/kernel.h> | ||
32 | #include <linux/mmzone.h> | ||
33 | #include <linux/module.h> | ||
34 | #include <linux/string.h> | ||
35 | #include <linux/init.h> | ||
36 | #include <linux/numa.h> | ||
37 | #include <linux/smp.h> | ||
38 | #include <linux/io.h> | ||
39 | #include <linux/mm.h> | ||
40 | |||
41 | #include <asm/processor.h> | ||
42 | #include <asm/fixmap.h> | ||
43 | #include <asm/mpspec.h> | ||
44 | #include <asm/numaq.h> | ||
45 | #include <asm/setup.h> | ||
46 | #include <asm/apic.h> | ||
47 | #include <asm/e820.h> | ||
48 | #include <asm/ipi.h> | ||
49 | |||
50 | #define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT)) | ||
51 | |||
52 | int found_numaq; | ||
53 | |||
54 | /* | ||
55 | * Have to match translation table entries to main table entries by counter | ||
56 | * hence the mpc_record variable .... can't see a less disgusting way of | ||
57 | * doing this .... | ||
58 | */ | ||
59 | struct mpc_trans { | ||
60 | unsigned char mpc_type; | ||
61 | unsigned char trans_len; | ||
62 | unsigned char trans_type; | ||
63 | unsigned char trans_quad; | ||
64 | unsigned char trans_global; | ||
65 | unsigned char trans_local; | ||
66 | unsigned short trans_reserved; | ||
67 | }; | ||
68 | |||
69 | /* x86_quirks member */ | ||
70 | static int mpc_record; | ||
71 | |||
72 | static struct mpc_trans *translation_table[MAX_MPC_ENTRY]; | ||
73 | |||
74 | int mp_bus_id_to_node[MAX_MP_BUSSES]; | ||
75 | int mp_bus_id_to_local[MAX_MP_BUSSES]; | ||
76 | int quad_local_to_mp_bus_id[NR_CPUS/4][4]; | ||
77 | |||
78 | |||
79 | static inline void numaq_register_node(int node, struct sys_cfg_data *scd) | ||
80 | { | ||
81 | struct eachquadmem *eq = scd->eq + node; | ||
82 | |||
83 | node_set_online(node); | ||
84 | |||
85 | /* Convert to pages */ | ||
86 | node_start_pfn[node] = | ||
87 | MB_TO_PAGES(eq->hi_shrd_mem_start - eq->priv_mem_size); | ||
88 | |||
89 | node_end_pfn[node] = | ||
90 | MB_TO_PAGES(eq->hi_shrd_mem_start + eq->hi_shrd_mem_size); | ||
91 | |||
92 | e820_register_active_regions(node, node_start_pfn[node], | ||
93 | node_end_pfn[node]); | ||
94 | |||
95 | memory_present(node, node_start_pfn[node], node_end_pfn[node]); | ||
96 | |||
97 | node_remap_size[node] = node_memmap_size_bytes(node, | ||
98 | node_start_pfn[node], | ||
99 | node_end_pfn[node]); | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * Function: smp_dump_qct() | ||
104 | * | ||
105 | * Description: gets memory layout from the quad config table. This | ||
106 | * function also updates node_online_map with the nodes (quads) present. | ||
107 | */ | ||
108 | static void __init smp_dump_qct(void) | ||
109 | { | ||
110 | struct sys_cfg_data *scd; | ||
111 | int node; | ||
112 | |||
113 | scd = (void *)__va(SYS_CFG_DATA_PRIV_ADDR); | ||
114 | |||
115 | nodes_clear(node_online_map); | ||
116 | for_each_node(node) { | ||
117 | if (scd->quads_present31_0 & (1 << node)) | ||
118 | numaq_register_node(node, scd); | ||
119 | } | ||
120 | } | ||
121 | |||
122 | void __cpuinit numaq_tsc_disable(void) | ||
123 | { | ||
124 | if (!found_numaq) | ||
125 | return; | ||
126 | |||
127 | if (num_online_nodes() > 1) { | ||
128 | printk(KERN_DEBUG "NUMAQ: disabling TSC\n"); | ||
129 | setup_clear_cpu_cap(X86_FEATURE_TSC); | ||
130 | } | ||
131 | } | ||
132 | |||
133 | static int __init numaq_pre_time_init(void) | ||
134 | { | ||
135 | numaq_tsc_disable(); | ||
136 | return 0; | ||
137 | } | ||
138 | |||
139 | static inline int generate_logical_apicid(int quad, int phys_apicid) | ||
140 | { | ||
141 | return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1); | ||
142 | } | ||
143 | |||
144 | /* x86_quirks member */ | ||
145 | static int mpc_apic_id(struct mpc_cpu *m) | ||
146 | { | ||
147 | int quad = translation_table[mpc_record]->trans_quad; | ||
148 | int logical_apicid = generate_logical_apicid(quad, m->apicid); | ||
149 | |||
150 | printk(KERN_DEBUG | ||
151 | "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n", | ||
152 | m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8, | ||
153 | (m->cpufeature & CPU_MODEL_MASK) >> 4, | ||
154 | m->apicver, quad, logical_apicid); | ||
155 | |||
156 | return logical_apicid; | ||
157 | } | ||
158 | |||
159 | /* x86_quirks member */ | ||
160 | static void mpc_oem_bus_info(struct mpc_bus *m, char *name) | ||
161 | { | ||
162 | int quad = translation_table[mpc_record]->trans_quad; | ||
163 | int local = translation_table[mpc_record]->trans_local; | ||
164 | |||
165 | mp_bus_id_to_node[m->busid] = quad; | ||
166 | mp_bus_id_to_local[m->busid] = local; | ||
167 | |||
168 | printk(KERN_INFO "Bus #%d is %s (node %d)\n", m->busid, name, quad); | ||
169 | } | ||
170 | |||
171 | /* x86_quirks member */ | ||
172 | static void mpc_oem_pci_bus(struct mpc_bus *m) | ||
173 | { | ||
174 | int quad = translation_table[mpc_record]->trans_quad; | ||
175 | int local = translation_table[mpc_record]->trans_local; | ||
176 | |||
177 | quad_local_to_mp_bus_id[quad][local] = m->busid; | ||
178 | } | ||
179 | |||
180 | static void __init MP_translation_info(struct mpc_trans *m) | ||
181 | { | ||
182 | printk(KERN_INFO | ||
183 | "Translation: record %d, type %d, quad %d, global %d, local %d\n", | ||
184 | mpc_record, m->trans_type, m->trans_quad, m->trans_global, | ||
185 | m->trans_local); | ||
186 | |||
187 | if (mpc_record >= MAX_MPC_ENTRY) | ||
188 | printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n"); | ||
189 | else | ||
190 | translation_table[mpc_record] = m; /* stash this for later */ | ||
191 | |||
192 | if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad)) | ||
193 | node_set_online(m->trans_quad); | ||
194 | } | ||
195 | |||
196 | static int __init mpf_checksum(unsigned char *mp, int len) | ||
197 | { | ||
198 | int sum = 0; | ||
199 | |||
200 | while (len--) | ||
201 | sum += *mp++; | ||
202 | |||
203 | return sum & 0xFF; | ||
204 | } | ||
205 | |||
206 | /* | ||
207 | * Read/parse the MPC oem tables | ||
208 | */ | ||
209 | static void __init | ||
210 | smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize) | ||
211 | { | ||
212 | int count = sizeof(*oemtable); /* the header size */ | ||
213 | unsigned char *oemptr = ((unsigned char *)oemtable) + count; | ||
214 | |||
215 | mpc_record = 0; | ||
216 | printk(KERN_INFO | ||
217 | "Found an OEM MPC table at %8p - parsing it ... \n", oemtable); | ||
218 | |||
219 | if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) { | ||
220 | printk(KERN_WARNING | ||
221 | "SMP mpc oemtable: bad signature [%c%c%c%c]!\n", | ||
222 | oemtable->signature[0], oemtable->signature[1], | ||
223 | oemtable->signature[2], oemtable->signature[3]); | ||
224 | return; | ||
225 | } | ||
226 | |||
227 | if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) { | ||
228 | printk(KERN_WARNING "SMP oem mptable: checksum error!\n"); | ||
229 | return; | ||
230 | } | ||
231 | |||
232 | while (count < oemtable->length) { | ||
233 | switch (*oemptr) { | ||
234 | case MP_TRANSLATION: | ||
235 | { | ||
236 | struct mpc_trans *m = (void *)oemptr; | ||
237 | |||
238 | MP_translation_info(m); | ||
239 | oemptr += sizeof(*m); | ||
240 | count += sizeof(*m); | ||
241 | ++mpc_record; | ||
242 | break; | ||
243 | } | ||
244 | default: | ||
245 | printk(KERN_WARNING | ||
246 | "Unrecognised OEM table entry type! - %d\n", | ||
247 | (int)*oemptr); | ||
248 | return; | ||
249 | } | ||
250 | } | ||
251 | } | ||
252 | |||
253 | static int __init numaq_setup_ioapic_ids(void) | ||
254 | { | ||
255 | /* so can skip it */ | ||
256 | return 1; | ||
257 | } | ||
258 | |||
259 | static struct x86_quirks numaq_x86_quirks __initdata = { | ||
260 | .arch_pre_time_init = numaq_pre_time_init, | ||
261 | .arch_time_init = NULL, | ||
262 | .arch_pre_intr_init = NULL, | ||
263 | .arch_memory_setup = NULL, | ||
264 | .arch_intr_init = NULL, | ||
265 | .arch_trap_init = NULL, | ||
266 | .mach_get_smp_config = NULL, | ||
267 | .mach_find_smp_config = NULL, | ||
268 | .mpc_record = &mpc_record, | ||
269 | .mpc_apic_id = mpc_apic_id, | ||
270 | .mpc_oem_bus_info = mpc_oem_bus_info, | ||
271 | .mpc_oem_pci_bus = mpc_oem_pci_bus, | ||
272 | .smp_read_mpc_oem = smp_read_mpc_oem, | ||
273 | .setup_ioapic_ids = numaq_setup_ioapic_ids, | ||
274 | }; | ||
275 | |||
276 | static __init void early_check_numaq(void) | ||
277 | { | ||
278 | /* | ||
279 | * Find possible boot-time SMP configuration: | ||
280 | */ | ||
281 | early_find_smp_config(); | ||
282 | |||
283 | /* | ||
284 | * get boot-time SMP configuration: | ||
285 | */ | ||
286 | if (smp_found_config) | ||
287 | early_get_smp_config(); | ||
288 | |||
289 | if (found_numaq) | ||
290 | x86_quirks = &numaq_x86_quirks; | ||
291 | } | ||
292 | |||
293 | int __init get_memcfg_numaq(void) | ||
294 | { | ||
295 | early_check_numaq(); | ||
296 | if (!found_numaq) | ||
297 | return 0; | ||
298 | smp_dump_qct(); | ||
299 | |||
300 | return 1; | ||
301 | } | ||
302 | |||
303 | #define NUMAQ_APIC_DFR_VALUE (APIC_DFR_CLUSTER) | ||
304 | |||
305 | static inline unsigned int numaq_get_apic_id(unsigned long x) | ||
306 | { | ||
307 | return (x >> 24) & 0x0F; | ||
308 | } | ||
309 | |||
310 | static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector) | ||
311 | { | ||
312 | default_send_IPI_mask_sequence_logical(mask, vector); | ||
313 | } | ||
314 | |||
315 | static inline void numaq_send_IPI_allbutself(int vector) | ||
316 | { | ||
317 | default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector); | ||
318 | } | ||
319 | |||
320 | static inline void numaq_send_IPI_all(int vector) | ||
321 | { | ||
322 | numaq_send_IPI_mask(cpu_online_mask, vector); | ||
323 | } | ||
324 | |||
325 | #define NUMAQ_TRAMPOLINE_PHYS_LOW (0x8) | ||
326 | #define NUMAQ_TRAMPOLINE_PHYS_HIGH (0xa) | ||
327 | |||
328 | /* | ||
329 | * Because we use NMIs rather than the INIT-STARTUP sequence to | ||
330 | * bootstrap the CPUs, the APIC may be in a weird state. Kick it: | ||
331 | */ | ||
332 | static inline void numaq_smp_callin_clear_local_apic(void) | ||
333 | { | ||
334 | clear_local_APIC(); | ||
335 | } | ||
336 | |||
337 | static inline const cpumask_t *numaq_target_cpus(void) | ||
338 | { | ||
339 | return &CPU_MASK_ALL; | ||
340 | } | ||
341 | |||
342 | static inline unsigned long | ||
343 | numaq_check_apicid_used(physid_mask_t bitmap, int apicid) | ||
344 | { | ||
345 | return physid_isset(apicid, bitmap); | ||
346 | } | ||
347 | |||
348 | static inline unsigned long numaq_check_apicid_present(int bit) | ||
349 | { | ||
350 | return physid_isset(bit, phys_cpu_present_map); | ||
351 | } | ||
352 | |||
353 | static inline int numaq_apic_id_registered(void) | ||
354 | { | ||
355 | return 1; | ||
356 | } | ||
357 | |||
358 | static inline void numaq_init_apic_ldr(void) | ||
359 | { | ||
360 | /* Already done in NUMA-Q firmware */ | ||
361 | } | ||
362 | |||
363 | static inline void numaq_setup_apic_routing(void) | ||
364 | { | ||
365 | printk(KERN_INFO | ||
366 | "Enabling APIC mode: NUMA-Q. Using %d I/O APICs\n", | ||
367 | nr_ioapics); | ||
368 | } | ||
369 | |||
370 | /* | ||
371 | * Skip adding the timer int on secondary nodes, which causes | ||
372 | * a small but painful rift in the time-space continuum. | ||
373 | */ | ||
374 | static inline int numaq_multi_timer_check(int apic, int irq) | ||
375 | { | ||
376 | return apic != 0 && irq == 0; | ||
377 | } | ||
378 | |||
379 | static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map) | ||
380 | { | ||
381 | /* We don't have a good way to do this yet - hack */ | ||
382 | return physids_promote(0xFUL); | ||
383 | } | ||
384 | |||
385 | static inline int numaq_cpu_to_logical_apicid(int cpu) | ||
386 | { | ||
387 | if (cpu >= nr_cpu_ids) | ||
388 | return BAD_APICID; | ||
389 | return cpu_2_logical_apicid[cpu]; | ||
390 | } | ||
391 | |||
392 | /* | ||
393 | * Supporting over 60 cpus on NUMA-Q requires a locality-dependent | ||
394 | * cpu to APIC ID relation to properly interact with the intelligent | ||
395 | * mode of the cluster controller. | ||
396 | */ | ||
397 | static inline int numaq_cpu_present_to_apicid(int mps_cpu) | ||
398 | { | ||
399 | if (mps_cpu < 60) | ||
400 | return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3)); | ||
401 | else | ||
402 | return BAD_APICID; | ||
403 | } | ||
404 | |||
405 | static inline int numaq_apicid_to_node(int logical_apicid) | ||
406 | { | ||
407 | return logical_apicid >> 4; | ||
408 | } | ||
409 | |||
410 | static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid) | ||
411 | { | ||
412 | int node = numaq_apicid_to_node(logical_apicid); | ||
413 | int cpu = __ffs(logical_apicid & 0xf); | ||
414 | |||
415 | return physid_mask_of_physid(cpu + 4*node); | ||
416 | } | ||
417 | |||
418 | /* Where the IO area was mapped on multiquad, always 0 otherwise */ | ||
419 | void *xquad_portio; | ||
420 | |||
421 | static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
422 | { | ||
423 | return 1; | ||
424 | } | ||
425 | |||
426 | /* | ||
427 | * We use physical apicids here, not logical, so just return the default | ||
428 | * physical broadcast to stop people from breaking us | ||
429 | */ | ||
430 | static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
431 | { | ||
432 | return 0x0F; | ||
433 | } | ||
434 | |||
435 | static inline unsigned int | ||
436 | numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | ||
437 | const struct cpumask *andmask) | ||
438 | { | ||
439 | return 0x0F; | ||
440 | } | ||
441 | |||
442 | /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */ | ||
443 | static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb) | ||
444 | { | ||
445 | return cpuid_apic >> index_msb; | ||
446 | } | ||
447 | |||
448 | static int | ||
449 | numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
450 | { | ||
451 | if (strncmp(oem, "IBM NUMA", 8)) | ||
452 | printk(KERN_ERR "Warning! Not a NUMA-Q system!\n"); | ||
453 | else | ||
454 | found_numaq = 1; | ||
455 | |||
456 | return found_numaq; | ||
457 | } | ||
458 | |||
459 | static int probe_numaq(void) | ||
460 | { | ||
461 | /* already know from get_memcfg_numaq() */ | ||
462 | return found_numaq; | ||
463 | } | ||
464 | |||
465 | static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
466 | { | ||
467 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
468 | * specified in the interrupt destination when using lowest | ||
469 | * priority interrupt delivery mode. | ||
470 | * | ||
471 | * In particular there was a hyperthreading cpu observed to | ||
472 | * deliver interrupts to the wrong hyperthread when only one | ||
473 | * hyperthread was specified in the interrupt desitination. | ||
474 | */ | ||
475 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | ||
476 | } | ||
477 | |||
478 | static void numaq_setup_portio_remap(void) | ||
479 | { | ||
480 | int num_quads = num_online_nodes(); | ||
481 | |||
482 | if (num_quads <= 1) | ||
483 | return; | ||
484 | |||
485 | printk(KERN_INFO | ||
486 | "Remapping cross-quad port I/O for %d quads\n", num_quads); | ||
487 | |||
488 | xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD); | ||
489 | |||
490 | printk(KERN_INFO | ||
491 | "xquad_portio vaddr 0x%08lx, len %08lx\n", | ||
492 | (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD); | ||
493 | } | ||
494 | |||
495 | struct apic apic_numaq = { | ||
496 | |||
497 | .name = "NUMAQ", | ||
498 | .probe = probe_numaq, | ||
499 | .acpi_madt_oem_check = NULL, | ||
500 | .apic_id_registered = numaq_apic_id_registered, | ||
501 | |||
502 | .irq_delivery_mode = dest_LowestPrio, | ||
503 | /* physical delivery on LOCAL quad: */ | ||
504 | .irq_dest_mode = 0, | ||
505 | |||
506 | .target_cpus = numaq_target_cpus, | ||
507 | .disable_esr = 1, | ||
508 | .dest_logical = APIC_DEST_LOGICAL, | ||
509 | .check_apicid_used = numaq_check_apicid_used, | ||
510 | .check_apicid_present = numaq_check_apicid_present, | ||
511 | |||
512 | .vector_allocation_domain = numaq_vector_allocation_domain, | ||
513 | .init_apic_ldr = numaq_init_apic_ldr, | ||
514 | |||
515 | .ioapic_phys_id_map = numaq_ioapic_phys_id_map, | ||
516 | .setup_apic_routing = numaq_setup_apic_routing, | ||
517 | .multi_timer_check = numaq_multi_timer_check, | ||
518 | .apicid_to_node = numaq_apicid_to_node, | ||
519 | .cpu_to_logical_apicid = numaq_cpu_to_logical_apicid, | ||
520 | .cpu_present_to_apicid = numaq_cpu_present_to_apicid, | ||
521 | .apicid_to_cpu_present = numaq_apicid_to_cpu_present, | ||
522 | .setup_portio_remap = numaq_setup_portio_remap, | ||
523 | .check_phys_apicid_present = numaq_check_phys_apicid_present, | ||
524 | .enable_apic_mode = NULL, | ||
525 | .phys_pkg_id = numaq_phys_pkg_id, | ||
526 | .mps_oem_check = numaq_mps_oem_check, | ||
527 | |||
528 | .get_apic_id = numaq_get_apic_id, | ||
529 | .set_apic_id = NULL, | ||
530 | .apic_id_mask = 0x0F << 24, | ||
531 | |||
532 | .cpu_mask_to_apicid = numaq_cpu_mask_to_apicid, | ||
533 | .cpu_mask_to_apicid_and = numaq_cpu_mask_to_apicid_and, | ||
534 | |||
535 | .send_IPI_mask = numaq_send_IPI_mask, | ||
536 | .send_IPI_mask_allbutself = NULL, | ||
537 | .send_IPI_allbutself = numaq_send_IPI_allbutself, | ||
538 | .send_IPI_all = numaq_send_IPI_all, | ||
539 | .send_IPI_self = default_send_IPI_self, | ||
540 | |||
541 | .wakeup_secondary_cpu = wakeup_secondary_cpu_via_nmi, | ||
542 | .trampoline_phys_low = NUMAQ_TRAMPOLINE_PHYS_LOW, | ||
543 | .trampoline_phys_high = NUMAQ_TRAMPOLINE_PHYS_HIGH, | ||
544 | |||
545 | /* We don't do anything here because we use NMI's to boot instead */ | ||
546 | .wait_for_init_deassert = NULL, | ||
547 | |||
548 | .smp_callin_clear_local_apic = numaq_smp_callin_clear_local_apic, | ||
549 | .inquire_remote_apic = NULL, | ||
550 | |||
551 | .read = native_apic_mem_read, | ||
552 | .write = native_apic_mem_write, | ||
553 | .icr_read = native_apic_icr_read, | ||
554 | .icr_write = native_apic_icr_write, | ||
555 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
556 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
557 | }; | ||
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c new file mode 100644 index 000000000000..141c99a1c264 --- /dev/null +++ b/arch/x86/kernel/apic/probe_32.c | |||
@@ -0,0 +1,284 @@ | |||
1 | /* | ||
2 | * Default generic APIC driver. This handles up to 8 CPUs. | ||
3 | * | ||
4 | * Copyright 2003 Andi Kleen, SuSE Labs. | ||
5 | * Subject to the GNU Public License, v.2 | ||
6 | * | ||
7 | * Generic x86 APIC driver probe layer. | ||
8 | */ | ||
9 | #include <linux/threads.h> | ||
10 | #include <linux/cpumask.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/string.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/ctype.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <asm/fixmap.h> | ||
18 | #include <asm/mpspec.h> | ||
19 | #include <asm/apicdef.h> | ||
20 | #include <asm/apic.h> | ||
21 | #include <asm/setup.h> | ||
22 | |||
23 | #include <linux/threads.h> | ||
24 | #include <linux/cpumask.h> | ||
25 | #include <asm/mpspec.h> | ||
26 | #include <asm/fixmap.h> | ||
27 | #include <asm/apicdef.h> | ||
28 | #include <linux/kernel.h> | ||
29 | #include <linux/string.h> | ||
30 | #include <linux/smp.h> | ||
31 | #include <linux/init.h> | ||
32 | #include <asm/ipi.h> | ||
33 | |||
34 | #include <linux/smp.h> | ||
35 | #include <linux/init.h> | ||
36 | #include <linux/interrupt.h> | ||
37 | #include <asm/acpi.h> | ||
38 | #include <asm/e820.h> | ||
39 | #include <asm/setup.h> | ||
40 | |||
41 | #ifdef CONFIG_HOTPLUG_CPU | ||
42 | #define DEFAULT_SEND_IPI (1) | ||
43 | #else | ||
44 | #define DEFAULT_SEND_IPI (0) | ||
45 | #endif | ||
46 | |||
47 | int no_broadcast = DEFAULT_SEND_IPI; | ||
48 | |||
49 | static __init int no_ipi_broadcast(char *str) | ||
50 | { | ||
51 | get_option(&str, &no_broadcast); | ||
52 | pr_info("Using %s mode\n", | ||
53 | no_broadcast ? "No IPI Broadcast" : "IPI Broadcast"); | ||
54 | return 1; | ||
55 | } | ||
56 | __setup("no_ipi_broadcast=", no_ipi_broadcast); | ||
57 | |||
58 | static int __init print_ipi_mode(void) | ||
59 | { | ||
60 | pr_info("Using IPI %s mode\n", | ||
61 | no_broadcast ? "No-Shortcut" : "Shortcut"); | ||
62 | return 0; | ||
63 | } | ||
64 | late_initcall(print_ipi_mode); | ||
65 | |||
66 | void default_setup_apic_routing(void) | ||
67 | { | ||
68 | #ifdef CONFIG_X86_IO_APIC | ||
69 | printk(KERN_INFO | ||
70 | "Enabling APIC mode: Flat. Using %d I/O APICs\n", | ||
71 | nr_ioapics); | ||
72 | #endif | ||
73 | } | ||
74 | |||
75 | static void default_vector_allocation_domain(int cpu, struct cpumask *retmask) | ||
76 | { | ||
77 | /* | ||
78 | * Careful. Some cpus do not strictly honor the set of cpus | ||
79 | * specified in the interrupt destination when using lowest | ||
80 | * priority interrupt delivery mode. | ||
81 | * | ||
82 | * In particular there was a hyperthreading cpu observed to | ||
83 | * deliver interrupts to the wrong hyperthread when only one | ||
84 | * hyperthread was specified in the interrupt desitination. | ||
85 | */ | ||
86 | *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } }; | ||
87 | } | ||
88 | |||
89 | /* should be called last. */ | ||
90 | static int probe_default(void) | ||
91 | { | ||
92 | return 1; | ||
93 | } | ||
94 | |||
95 | struct apic apic_default = { | ||
96 | |||
97 | .name = "default", | ||
98 | .probe = probe_default, | ||
99 | .acpi_madt_oem_check = NULL, | ||
100 | .apic_id_registered = default_apic_id_registered, | ||
101 | |||
102 | .irq_delivery_mode = dest_LowestPrio, | ||
103 | /* logical delivery broadcast to all CPUs: */ | ||
104 | .irq_dest_mode = 1, | ||
105 | |||
106 | .target_cpus = default_target_cpus, | ||
107 | .disable_esr = 0, | ||
108 | .dest_logical = APIC_DEST_LOGICAL, | ||
109 | .check_apicid_used = default_check_apicid_used, | ||
110 | .check_apicid_present = default_check_apicid_present, | ||
111 | |||
112 | .vector_allocation_domain = default_vector_allocation_domain, | ||
113 | .init_apic_ldr = default_init_apic_ldr, | ||
114 | |||
115 | .ioapic_phys_id_map = default_ioapic_phys_id_map, | ||
116 | .setup_apic_routing = default_setup_apic_routing, | ||
117 | .multi_timer_check = NULL, | ||
118 | .apicid_to_node = default_apicid_to_node, | ||
119 | .cpu_to_logical_apicid = default_cpu_to_logical_apicid, | ||
120 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | ||
121 | .apicid_to_cpu_present = default_apicid_to_cpu_present, | ||
122 | .setup_portio_remap = NULL, | ||
123 | .check_phys_apicid_present = default_check_phys_apicid_present, | ||
124 | .enable_apic_mode = NULL, | ||
125 | .phys_pkg_id = default_phys_pkg_id, | ||
126 | .mps_oem_check = NULL, | ||
127 | |||
128 | .get_apic_id = default_get_apic_id, | ||
129 | .set_apic_id = NULL, | ||
130 | .apic_id_mask = 0x0F << 24, | ||
131 | |||
132 | .cpu_mask_to_apicid = default_cpu_mask_to_apicid, | ||
133 | .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, | ||
134 | |||
135 | .send_IPI_mask = default_send_IPI_mask_logical, | ||
136 | .send_IPI_mask_allbutself = default_send_IPI_mask_allbutself_logical, | ||
137 | .send_IPI_allbutself = default_send_IPI_allbutself, | ||
138 | .send_IPI_all = default_send_IPI_all, | ||
139 | .send_IPI_self = default_send_IPI_self, | ||
140 | |||
141 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
142 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
143 | |||
144 | .wait_for_init_deassert = default_wait_for_init_deassert, | ||
145 | |||
146 | .smp_callin_clear_local_apic = NULL, | ||
147 | .inquire_remote_apic = default_inquire_remote_apic, | ||
148 | |||
149 | .read = native_apic_mem_read, | ||
150 | .write = native_apic_mem_write, | ||
151 | .icr_read = native_apic_icr_read, | ||
152 | .icr_write = native_apic_icr_write, | ||
153 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
154 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
155 | }; | ||
156 | |||
157 | extern struct apic apic_numaq; | ||
158 | extern struct apic apic_summit; | ||
159 | extern struct apic apic_bigsmp; | ||
160 | extern struct apic apic_es7000; | ||
161 | extern struct apic apic_es7000_cluster; | ||
162 | extern struct apic apic_default; | ||
163 | |||
164 | struct apic *apic = &apic_default; | ||
165 | EXPORT_SYMBOL_GPL(apic); | ||
166 | |||
167 | static struct apic *apic_probe[] __initdata = { | ||
168 | #ifdef CONFIG_X86_NUMAQ | ||
169 | &apic_numaq, | ||
170 | #endif | ||
171 | #ifdef CONFIG_X86_SUMMIT | ||
172 | &apic_summit, | ||
173 | #endif | ||
174 | #ifdef CONFIG_X86_BIGSMP | ||
175 | &apic_bigsmp, | ||
176 | #endif | ||
177 | #ifdef CONFIG_X86_ES7000 | ||
178 | &apic_es7000, | ||
179 | &apic_es7000_cluster, | ||
180 | #endif | ||
181 | &apic_default, /* must be last */ | ||
182 | NULL, | ||
183 | }; | ||
184 | |||
185 | static int cmdline_apic __initdata; | ||
186 | static int __init parse_apic(char *arg) | ||
187 | { | ||
188 | int i; | ||
189 | |||
190 | if (!arg) | ||
191 | return -EINVAL; | ||
192 | |||
193 | for (i = 0; apic_probe[i]; i++) { | ||
194 | if (!strcmp(apic_probe[i]->name, arg)) { | ||
195 | apic = apic_probe[i]; | ||
196 | cmdline_apic = 1; | ||
197 | return 0; | ||
198 | } | ||
199 | } | ||
200 | |||
201 | /* Parsed again by __setup for debug/verbose */ | ||
202 | return 0; | ||
203 | } | ||
204 | early_param("apic", parse_apic); | ||
205 | |||
206 | void __init generic_bigsmp_probe(void) | ||
207 | { | ||
208 | #ifdef CONFIG_X86_BIGSMP | ||
209 | /* | ||
210 | * This routine is used to switch to bigsmp mode when | ||
211 | * - There is no apic= option specified by the user | ||
212 | * - generic_apic_probe() has chosen apic_default as the sub_arch | ||
213 | * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support | ||
214 | */ | ||
215 | |||
216 | if (!cmdline_apic && apic == &apic_default) { | ||
217 | if (apic_bigsmp.probe()) { | ||
218 | apic = &apic_bigsmp; | ||
219 | printk(KERN_INFO "Overriding APIC driver with %s\n", | ||
220 | apic->name); | ||
221 | } | ||
222 | } | ||
223 | #endif | ||
224 | } | ||
225 | |||
226 | void __init generic_apic_probe(void) | ||
227 | { | ||
228 | if (!cmdline_apic) { | ||
229 | int i; | ||
230 | for (i = 0; apic_probe[i]; i++) { | ||
231 | if (apic_probe[i]->probe()) { | ||
232 | apic = apic_probe[i]; | ||
233 | break; | ||
234 | } | ||
235 | } | ||
236 | /* Not visible without early console */ | ||
237 | if (!apic_probe[i]) | ||
238 | panic("Didn't find an APIC driver"); | ||
239 | } | ||
240 | printk(KERN_INFO "Using APIC driver %s\n", apic->name); | ||
241 | } | ||
242 | |||
243 | /* These functions can switch the APIC even after the initial ->probe() */ | ||
244 | |||
245 | int __init | ||
246 | generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
247 | { | ||
248 | int i; | ||
249 | |||
250 | for (i = 0; apic_probe[i]; ++i) { | ||
251 | if (!apic_probe[i]->mps_oem_check) | ||
252 | continue; | ||
253 | if (!apic_probe[i]->mps_oem_check(mpc, oem, productid)) | ||
254 | continue; | ||
255 | |||
256 | if (!cmdline_apic) { | ||
257 | apic = apic_probe[i]; | ||
258 | printk(KERN_INFO "Switched to APIC driver `%s'.\n", | ||
259 | apic->name); | ||
260 | } | ||
261 | return 1; | ||
262 | } | ||
263 | return 0; | ||
264 | } | ||
265 | |||
266 | int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
267 | { | ||
268 | int i; | ||
269 | |||
270 | for (i = 0; apic_probe[i]; ++i) { | ||
271 | if (!apic_probe[i]->acpi_madt_oem_check) | ||
272 | continue; | ||
273 | if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) | ||
274 | continue; | ||
275 | |||
276 | if (!cmdline_apic) { | ||
277 | apic = apic_probe[i]; | ||
278 | printk(KERN_INFO "Switched to APIC driver `%s'.\n", | ||
279 | apic->name); | ||
280 | } | ||
281 | return 1; | ||
282 | } | ||
283 | return 0; | ||
284 | } | ||
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/apic/probe_64.c index 2bced78b0b8e..8d7748efe6a8 100644 --- a/arch/x86/kernel/genapic_64.c +++ b/arch/x86/kernel/apic/probe_64.c | |||
@@ -19,22 +19,27 @@ | |||
19 | #include <linux/dmar.h> | 19 | #include <linux/dmar.h> |
20 | 20 | ||
21 | #include <asm/smp.h> | 21 | #include <asm/smp.h> |
22 | #include <asm/apic.h> | ||
22 | #include <asm/ipi.h> | 23 | #include <asm/ipi.h> |
23 | #include <asm/genapic.h> | ||
24 | #include <asm/setup.h> | 24 | #include <asm/setup.h> |
25 | 25 | ||
26 | extern struct genapic apic_flat; | 26 | extern struct apic apic_flat; |
27 | extern struct genapic apic_physflat; | 27 | extern struct apic apic_physflat; |
28 | extern struct genapic apic_x2xpic_uv_x; | 28 | extern struct apic apic_x2xpic_uv_x; |
29 | extern struct genapic apic_x2apic_phys; | 29 | extern struct apic apic_x2apic_phys; |
30 | extern struct genapic apic_x2apic_cluster; | 30 | extern struct apic apic_x2apic_cluster; |
31 | 31 | ||
32 | struct genapic __read_mostly *genapic = &apic_flat; | 32 | struct apic __read_mostly *apic = &apic_flat; |
33 | EXPORT_SYMBOL_GPL(apic); | ||
33 | 34 | ||
34 | static struct genapic *apic_probe[] __initdata = { | 35 | static struct apic *apic_probe[] __initdata = { |
36 | #ifdef CONFIG_X86_UV | ||
35 | &apic_x2apic_uv_x, | 37 | &apic_x2apic_uv_x, |
38 | #endif | ||
39 | #ifdef CONFIG_X86_X2APIC | ||
36 | &apic_x2apic_phys, | 40 | &apic_x2apic_phys, |
37 | &apic_x2apic_cluster, | 41 | &apic_x2apic_cluster, |
42 | #endif | ||
38 | &apic_physflat, | 43 | &apic_physflat, |
39 | NULL, | 44 | NULL, |
40 | }; | 45 | }; |
@@ -42,39 +47,45 @@ static struct genapic *apic_probe[] __initdata = { | |||
42 | /* | 47 | /* |
43 | * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode. | 48 | * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode. |
44 | */ | 49 | */ |
45 | void __init setup_apic_routing(void) | 50 | void __init default_setup_apic_routing(void) |
46 | { | 51 | { |
47 | if (genapic == &apic_x2apic_phys || genapic == &apic_x2apic_cluster) { | 52 | #ifdef CONFIG_X86_X2APIC |
48 | if (!intr_remapping_enabled) | 53 | if (x2apic && (apic != &apic_x2apic_phys && |
49 | genapic = &apic_flat; | 54 | #ifdef CONFIG_X86_UV |
55 | apic != &apic_x2apic_uv_x && | ||
56 | #endif | ||
57 | apic != &apic_x2apic_cluster)) { | ||
58 | if (x2apic_phys) | ||
59 | apic = &apic_x2apic_phys; | ||
60 | else | ||
61 | apic = &apic_x2apic_cluster; | ||
62 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); | ||
50 | } | 63 | } |
64 | #endif | ||
51 | 65 | ||
52 | if (genapic == &apic_flat) { | 66 | if (apic == &apic_flat) { |
53 | if (max_physical_apicid >= 8) | 67 | if (max_physical_apicid >= 8) |
54 | genapic = &apic_physflat; | 68 | apic = &apic_physflat; |
55 | printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name); | 69 | printk(KERN_INFO "Setting APIC routing to %s\n", apic->name); |
56 | } | 70 | } |
57 | |||
58 | if (x86_quirks->update_genapic) | ||
59 | x86_quirks->update_genapic(); | ||
60 | } | 71 | } |
61 | 72 | ||
62 | /* Same for both flat and physical. */ | 73 | /* Same for both flat and physical. */ |
63 | 74 | ||
64 | void apic_send_IPI_self(int vector) | 75 | void apic_send_IPI_self(int vector) |
65 | { | 76 | { |
66 | __send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL); | 77 | __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL); |
67 | } | 78 | } |
68 | 79 | ||
69 | int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 80 | int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
70 | { | 81 | { |
71 | int i; | 82 | int i; |
72 | 83 | ||
73 | for (i = 0; apic_probe[i]; ++i) { | 84 | for (i = 0; apic_probe[i]; ++i) { |
74 | if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { | 85 | if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { |
75 | genapic = apic_probe[i]; | 86 | apic = apic_probe[i]; |
76 | printk(KERN_INFO "Setting APIC routing to %s.\n", | 87 | printk(KERN_INFO "Setting APIC routing to %s.\n", |
77 | genapic->name); | 88 | apic->name); |
78 | return 1; | 89 | return 1; |
79 | } | 90 | } |
80 | } | 91 | } |
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c new file mode 100644 index 000000000000..aac52fa873ff --- /dev/null +++ b/arch/x86/kernel/apic/summit_32.c | |||
@@ -0,0 +1,579 @@ | |||
1 | /* | ||
2 | * IBM Summit-Specific Code | ||
3 | * | ||
4 | * Written By: Matthew Dobson, IBM Corporation | ||
5 | * | ||
6 | * Copyright (c) 2003 IBM Corp. | ||
7 | * | ||
8 | * All rights reserved. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or (at | ||
13 | * your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, but | ||
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
18 | * NON INFRINGEMENT. See the GNU General Public License for more | ||
19 | * details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
24 | * | ||
25 | * Send feedback to <colpatch@us.ibm.com> | ||
26 | * | ||
27 | */ | ||
28 | |||
29 | #include <linux/mm.h> | ||
30 | #include <linux/init.h> | ||
31 | #include <asm/io.h> | ||
32 | #include <asm/bios_ebda.h> | ||
33 | |||
34 | /* | ||
35 | * APIC driver for the IBM "Summit" chipset. | ||
36 | */ | ||
37 | #include <linux/threads.h> | ||
38 | #include <linux/cpumask.h> | ||
39 | #include <asm/mpspec.h> | ||
40 | #include <asm/apic.h> | ||
41 | #include <asm/smp.h> | ||
42 | #include <asm/fixmap.h> | ||
43 | #include <asm/apicdef.h> | ||
44 | #include <asm/ipi.h> | ||
45 | #include <linux/kernel.h> | ||
46 | #include <linux/string.h> | ||
47 | #include <linux/init.h> | ||
48 | #include <linux/gfp.h> | ||
49 | #include <linux/smp.h> | ||
50 | |||
51 | static unsigned summit_get_apic_id(unsigned long x) | ||
52 | { | ||
53 | return (x >> 24) & 0xFF; | ||
54 | } | ||
55 | |||
56 | static inline void summit_send_IPI_mask(const cpumask_t *mask, int vector) | ||
57 | { | ||
58 | default_send_IPI_mask_sequence_logical(mask, vector); | ||
59 | } | ||
60 | |||
61 | static void summit_send_IPI_allbutself(int vector) | ||
62 | { | ||
63 | cpumask_t mask = cpu_online_map; | ||
64 | cpu_clear(smp_processor_id(), mask); | ||
65 | |||
66 | if (!cpus_empty(mask)) | ||
67 | summit_send_IPI_mask(&mask, vector); | ||
68 | } | ||
69 | |||
70 | static void summit_send_IPI_all(int vector) | ||
71 | { | ||
72 | summit_send_IPI_mask(&cpu_online_map, vector); | ||
73 | } | ||
74 | |||
75 | #include <asm/tsc.h> | ||
76 | |||
77 | extern int use_cyclone; | ||
78 | |||
79 | #ifdef CONFIG_X86_SUMMIT_NUMA | ||
80 | static void setup_summit(void); | ||
81 | #else | ||
82 | static inline void setup_summit(void) {} | ||
83 | #endif | ||
84 | |||
85 | static int summit_mps_oem_check(struct mpc_table *mpc, char *oem, | ||
86 | char *productid) | ||
87 | { | ||
88 | if (!strncmp(oem, "IBM ENSW", 8) && | ||
89 | (!strncmp(productid, "VIGIL SMP", 9) | ||
90 | || !strncmp(productid, "EXA", 3) | ||
91 | || !strncmp(productid, "RUTHLESS SMP", 12))){ | ||
92 | mark_tsc_unstable("Summit based system"); | ||
93 | use_cyclone = 1; /*enable cyclone-timer*/ | ||
94 | setup_summit(); | ||
95 | return 1; | ||
96 | } | ||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | /* Hook from generic ACPI tables.c */ | ||
101 | static int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
102 | { | ||
103 | if (!strncmp(oem_id, "IBM", 3) && | ||
104 | (!strncmp(oem_table_id, "SERVIGIL", 8) | ||
105 | || !strncmp(oem_table_id, "EXA", 3))){ | ||
106 | mark_tsc_unstable("Summit based system"); | ||
107 | use_cyclone = 1; /*enable cyclone-timer*/ | ||
108 | setup_summit(); | ||
109 | return 1; | ||
110 | } | ||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | struct rio_table_hdr { | ||
115 | unsigned char version; /* Version number of this data structure */ | ||
116 | /* Version 3 adds chassis_num & WP_index */ | ||
117 | unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */ | ||
118 | unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */ | ||
119 | } __attribute__((packed)); | ||
120 | |||
121 | struct scal_detail { | ||
122 | unsigned char node_id; /* Scalability Node ID */ | ||
123 | unsigned long CBAR; /* Address of 1MB register space */ | ||
124 | unsigned char port0node; /* Node ID port connected to: 0xFF=None */ | ||
125 | unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
126 | unsigned char port1node; /* Node ID port connected to: 0xFF = None */ | ||
127 | unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
128 | unsigned char port2node; /* Node ID port connected to: 0xFF = None */ | ||
129 | unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
130 | unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */ | ||
131 | } __attribute__((packed)); | ||
132 | |||
133 | struct rio_detail { | ||
134 | unsigned char node_id; /* RIO Node ID */ | ||
135 | unsigned long BBAR; /* Address of 1MB register space */ | ||
136 | unsigned char type; /* Type of device */ | ||
137 | unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/ | ||
138 | /* For CYC: Node ID of Twister that owns this CYC */ | ||
139 | unsigned char port0node; /* Node ID port connected to: 0xFF=None */ | ||
140 | unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
141 | unsigned char port1node; /* Node ID port connected to: 0xFF=None */ | ||
142 | unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */ | ||
143 | unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */ | ||
144 | /* For CYC: 0 */ | ||
145 | unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */ | ||
146 | /* = 0 : the XAPIC is not used, ie:*/ | ||
147 | /* ints fwded to another XAPIC */ | ||
148 | /* Bits1:7 Reserved */ | ||
149 | /* For CYC: Bits0:7 Reserved */ | ||
150 | unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */ | ||
151 | /* lower slot numbers/PCI bus numbers */ | ||
152 | /* For CYC: No meaning */ | ||
153 | unsigned char chassis_num; /* 1 based Chassis number */ | ||
154 | /* For LookOut WPEGs this field indicates the */ | ||
155 | /* Expansion Chassis #, enumerated from Boot */ | ||
156 | /* Node WPEG external port, then Boot Node CYC */ | ||
157 | /* external port, then Next Vigil chassis WPEG */ | ||
158 | /* external port, etc. */ | ||
159 | /* Shared Lookouts have only 1 chassis number (the */ | ||
160 | /* first one assigned) */ | ||
161 | } __attribute__((packed)); | ||
162 | |||
163 | |||
164 | typedef enum { | ||
165 | CompatTwister = 0, /* Compatibility Twister */ | ||
166 | AltTwister = 1, /* Alternate Twister of internal 8-way */ | ||
167 | CompatCyclone = 2, /* Compatibility Cyclone */ | ||
168 | AltCyclone = 3, /* Alternate Cyclone of internal 8-way */ | ||
169 | CompatWPEG = 4, /* Compatibility WPEG */ | ||
170 | AltWPEG = 5, /* Second Planar WPEG */ | ||
171 | LookOutAWPEG = 6, /* LookOut WPEG */ | ||
172 | LookOutBWPEG = 7, /* LookOut WPEG */ | ||
173 | } node_type; | ||
174 | |||
175 | static inline int is_WPEG(struct rio_detail *rio){ | ||
176 | return (rio->type == CompatWPEG || rio->type == AltWPEG || | ||
177 | rio->type == LookOutAWPEG || rio->type == LookOutBWPEG); | ||
178 | } | ||
179 | |||
180 | |||
181 | /* In clustered mode, the high nibble of APIC ID is a cluster number. | ||
182 | * The low nibble is a 4-bit bitmap. */ | ||
183 | #define XAPIC_DEST_CPUS_SHIFT 4 | ||
184 | #define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1) | ||
185 | #define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT) | ||
186 | |||
187 | #define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER) | ||
188 | |||
189 | static const cpumask_t *summit_target_cpus(void) | ||
190 | { | ||
191 | /* CPU_MASK_ALL (0xff) has undefined behaviour with | ||
192 | * dest_LowestPrio mode logical clustered apic interrupt routing | ||
193 | * Just start on cpu 0. IRQ balancing will spread load | ||
194 | */ | ||
195 | return &cpumask_of_cpu(0); | ||
196 | } | ||
197 | |||
198 | static unsigned long summit_check_apicid_used(physid_mask_t bitmap, int apicid) | ||
199 | { | ||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | /* we don't use the phys_cpu_present_map to indicate apicid presence */ | ||
204 | static unsigned long summit_check_apicid_present(int bit) | ||
205 | { | ||
206 | return 1; | ||
207 | } | ||
208 | |||
209 | static void summit_init_apic_ldr(void) | ||
210 | { | ||
211 | unsigned long val, id; | ||
212 | int count = 0; | ||
213 | u8 my_id = (u8)hard_smp_processor_id(); | ||
214 | u8 my_cluster = APIC_CLUSTER(my_id); | ||
215 | #ifdef CONFIG_SMP | ||
216 | u8 lid; | ||
217 | int i; | ||
218 | |||
219 | /* Create logical APIC IDs by counting CPUs already in cluster. */ | ||
220 | for (count = 0, i = nr_cpu_ids; --i >= 0; ) { | ||
221 | lid = cpu_2_logical_apicid[i]; | ||
222 | if (lid != BAD_APICID && APIC_CLUSTER(lid) == my_cluster) | ||
223 | ++count; | ||
224 | } | ||
225 | #endif | ||
226 | /* We only have a 4 wide bitmap in cluster mode. If a deranged | ||
227 | * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */ | ||
228 | BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT); | ||
229 | id = my_cluster | (1UL << count); | ||
230 | apic_write(APIC_DFR, SUMMIT_APIC_DFR_VALUE); | ||
231 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
232 | val |= SET_APIC_LOGICAL_ID(id); | ||
233 | apic_write(APIC_LDR, val); | ||
234 | } | ||
235 | |||
236 | static int summit_apic_id_registered(void) | ||
237 | { | ||
238 | return 1; | ||
239 | } | ||
240 | |||
241 | static void summit_setup_apic_routing(void) | ||
242 | { | ||
243 | printk("Enabling APIC mode: Summit. Using %d I/O APICs\n", | ||
244 | nr_ioapics); | ||
245 | } | ||
246 | |||
247 | static int summit_apicid_to_node(int logical_apicid) | ||
248 | { | ||
249 | #ifdef CONFIG_SMP | ||
250 | return apicid_2_node[hard_smp_processor_id()]; | ||
251 | #else | ||
252 | return 0; | ||
253 | #endif | ||
254 | } | ||
255 | |||
256 | /* Mapping from cpu number to logical apicid */ | ||
257 | static inline int summit_cpu_to_logical_apicid(int cpu) | ||
258 | { | ||
259 | #ifdef CONFIG_SMP | ||
260 | if (cpu >= nr_cpu_ids) | ||
261 | return BAD_APICID; | ||
262 | return cpu_2_logical_apicid[cpu]; | ||
263 | #else | ||
264 | return logical_smp_processor_id(); | ||
265 | #endif | ||
266 | } | ||
267 | |||
268 | static int summit_cpu_present_to_apicid(int mps_cpu) | ||
269 | { | ||
270 | if (mps_cpu < nr_cpu_ids) | ||
271 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); | ||
272 | else | ||
273 | return BAD_APICID; | ||
274 | } | ||
275 | |||
276 | static physid_mask_t summit_ioapic_phys_id_map(physid_mask_t phys_id_map) | ||
277 | { | ||
278 | /* For clustered we don't have a good way to do this yet - hack */ | ||
279 | return physids_promote(0x0F); | ||
280 | } | ||
281 | |||
282 | static physid_mask_t summit_apicid_to_cpu_present(int apicid) | ||
283 | { | ||
284 | return physid_mask_of_physid(0); | ||
285 | } | ||
286 | |||
287 | static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
288 | { | ||
289 | return 1; | ||
290 | } | ||
291 | |||
292 | static unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask) | ||
293 | { | ||
294 | unsigned int round = 0; | ||
295 | int cpu, apicid = 0; | ||
296 | |||
297 | /* | ||
298 | * The cpus in the mask must all be on the apic cluster. | ||
299 | */ | ||
300 | for_each_cpu(cpu, cpumask) { | ||
301 | int new_apicid = summit_cpu_to_logical_apicid(cpu); | ||
302 | |||
303 | if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { | ||
304 | printk("%s: Not a valid mask!\n", __func__); | ||
305 | return BAD_APICID; | ||
306 | } | ||
307 | apicid |= new_apicid; | ||
308 | round++; | ||
309 | } | ||
310 | return apicid; | ||
311 | } | ||
312 | |||
313 | static unsigned int summit_cpu_mask_to_apicid_and(const struct cpumask *inmask, | ||
314 | const struct cpumask *andmask) | ||
315 | { | ||
316 | int apicid = summit_cpu_to_logical_apicid(0); | ||
317 | cpumask_var_t cpumask; | ||
318 | |||
319 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | ||
320 | return apicid; | ||
321 | |||
322 | cpumask_and(cpumask, inmask, andmask); | ||
323 | cpumask_and(cpumask, cpumask, cpu_online_mask); | ||
324 | apicid = summit_cpu_mask_to_apicid(cpumask); | ||
325 | |||
326 | free_cpumask_var(cpumask); | ||
327 | |||
328 | return apicid; | ||
329 | } | ||
330 | |||
331 | /* | ||
332 | * cpuid returns the value latched in the HW at reset, not the APIC ID | ||
333 | * register's value. For any box whose BIOS changes APIC IDs, like | ||
334 | * clustered APIC systems, we must use hard_smp_processor_id. | ||
335 | * | ||
336 | * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID. | ||
337 | */ | ||
338 | static int summit_phys_pkg_id(int cpuid_apic, int index_msb) | ||
339 | { | ||
340 | return hard_smp_processor_id() >> index_msb; | ||
341 | } | ||
342 | |||
343 | static int probe_summit(void) | ||
344 | { | ||
345 | /* probed later in mptable/ACPI hooks */ | ||
346 | return 0; | ||
347 | } | ||
348 | |||
349 | static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
350 | { | ||
351 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
352 | * specified in the interrupt destination when using lowest | ||
353 | * priority interrupt delivery mode. | ||
354 | * | ||
355 | * In particular there was a hyperthreading cpu observed to | ||
356 | * deliver interrupts to the wrong hyperthread when only one | ||
357 | * hyperthread was specified in the interrupt desitination. | ||
358 | */ | ||
359 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | ||
360 | } | ||
361 | |||
362 | #ifdef CONFIG_X86_SUMMIT_NUMA | ||
363 | static struct rio_table_hdr *rio_table_hdr; | ||
364 | static struct scal_detail *scal_devs[MAX_NUMNODES]; | ||
365 | static struct rio_detail *rio_devs[MAX_NUMNODES*4]; | ||
366 | |||
367 | #ifndef CONFIG_X86_NUMAQ | ||
368 | static int mp_bus_id_to_node[MAX_MP_BUSSES]; | ||
369 | #endif | ||
370 | |||
371 | static int setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus) | ||
372 | { | ||
373 | int twister = 0, node = 0; | ||
374 | int i, bus, num_buses; | ||
375 | |||
376 | for (i = 0; i < rio_table_hdr->num_rio_dev; i++) { | ||
377 | if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) { | ||
378 | twister = rio_devs[i]->owner_id; | ||
379 | break; | ||
380 | } | ||
381 | } | ||
382 | if (i == rio_table_hdr->num_rio_dev) { | ||
383 | printk(KERN_ERR "%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__); | ||
384 | return last_bus; | ||
385 | } | ||
386 | |||
387 | for (i = 0; i < rio_table_hdr->num_scal_dev; i++) { | ||
388 | if (scal_devs[i]->node_id == twister) { | ||
389 | node = scal_devs[i]->node_id; | ||
390 | break; | ||
391 | } | ||
392 | } | ||
393 | if (i == rio_table_hdr->num_scal_dev) { | ||
394 | printk(KERN_ERR "%s: Couldn't find owner Twister for Cyclone!\n", __func__); | ||
395 | return last_bus; | ||
396 | } | ||
397 | |||
398 | switch (rio_devs[wpeg_num]->type) { | ||
399 | case CompatWPEG: | ||
400 | /* | ||
401 | * The Compatibility Winnipeg controls the 2 legacy buses, | ||
402 | * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case | ||
403 | * a PCI-PCI bridge card is used in either slot: total 5 buses. | ||
404 | */ | ||
405 | num_buses = 5; | ||
406 | break; | ||
407 | case AltWPEG: | ||
408 | /* | ||
409 | * The Alternate Winnipeg controls the 2 133MHz buses [1 slot | ||
410 | * each], their 2 "extra" buses, the 100MHz bus [2 slots] and | ||
411 | * the "extra" buses for each of those slots: total 7 buses. | ||
412 | */ | ||
413 | num_buses = 7; | ||
414 | break; | ||
415 | case LookOutAWPEG: | ||
416 | case LookOutBWPEG: | ||
417 | /* | ||
418 | * A Lookout Winnipeg controls 3 100MHz buses [2 slots each] | ||
419 | * & the "extra" buses for each of those slots: total 9 buses. | ||
420 | */ | ||
421 | num_buses = 9; | ||
422 | break; | ||
423 | default: | ||
424 | printk(KERN_INFO "%s: Unsupported Winnipeg type!\n", __func__); | ||
425 | return last_bus; | ||
426 | } | ||
427 | |||
428 | for (bus = last_bus; bus < last_bus + num_buses; bus++) | ||
429 | mp_bus_id_to_node[bus] = node; | ||
430 | return bus; | ||
431 | } | ||
432 | |||
433 | static int build_detail_arrays(void) | ||
434 | { | ||
435 | unsigned long ptr; | ||
436 | int i, scal_detail_size, rio_detail_size; | ||
437 | |||
438 | if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) { | ||
439 | printk(KERN_WARNING "%s: MAX_NUMNODES too low! Defined as %d, but system has %d nodes.\n", __func__, MAX_NUMNODES, rio_table_hdr->num_scal_dev); | ||
440 | return 0; | ||
441 | } | ||
442 | |||
443 | switch (rio_table_hdr->version) { | ||
444 | default: | ||
445 | printk(KERN_WARNING "%s: Invalid Rio Grande Table Version: %d\n", __func__, rio_table_hdr->version); | ||
446 | return 0; | ||
447 | case 2: | ||
448 | scal_detail_size = 11; | ||
449 | rio_detail_size = 13; | ||
450 | break; | ||
451 | case 3: | ||
452 | scal_detail_size = 12; | ||
453 | rio_detail_size = 15; | ||
454 | break; | ||
455 | } | ||
456 | |||
457 | ptr = (unsigned long)rio_table_hdr + 3; | ||
458 | for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size) | ||
459 | scal_devs[i] = (struct scal_detail *)ptr; | ||
460 | |||
461 | for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size) | ||
462 | rio_devs[i] = (struct rio_detail *)ptr; | ||
463 | |||
464 | return 1; | ||
465 | } | ||
466 | |||
467 | void setup_summit(void) | ||
468 | { | ||
469 | unsigned long ptr; | ||
470 | unsigned short offset; | ||
471 | int i, next_wpeg, next_bus = 0; | ||
472 | |||
473 | /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */ | ||
474 | ptr = get_bios_ebda(); | ||
475 | ptr = (unsigned long)phys_to_virt(ptr); | ||
476 | |||
477 | rio_table_hdr = NULL; | ||
478 | offset = 0x180; | ||
479 | while (offset) { | ||
480 | /* The block id is stored in the 2nd word */ | ||
481 | if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) { | ||
482 | /* set the pointer past the offset & block id */ | ||
483 | rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4); | ||
484 | break; | ||
485 | } | ||
486 | /* The next offset is stored in the 1st word. 0 means no more */ | ||
487 | offset = *((unsigned short *)(ptr + offset)); | ||
488 | } | ||
489 | if (!rio_table_hdr) { | ||
490 | printk(KERN_ERR "%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__); | ||
491 | return; | ||
492 | } | ||
493 | |||
494 | if (!build_detail_arrays()) | ||
495 | return; | ||
496 | |||
497 | /* The first Winnipeg we're looking for has an index of 0 */ | ||
498 | next_wpeg = 0; | ||
499 | do { | ||
500 | for (i = 0; i < rio_table_hdr->num_rio_dev; i++) { | ||
501 | if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) { | ||
502 | /* It's the Winnipeg we're looking for! */ | ||
503 | next_bus = setup_pci_node_map_for_wpeg(i, next_bus); | ||
504 | next_wpeg++; | ||
505 | break; | ||
506 | } | ||
507 | } | ||
508 | /* | ||
509 | * If we go through all Rio devices and don't find one with | ||
510 | * the next index, it means we've found all the Winnipegs, | ||
511 | * and thus all the PCI buses. | ||
512 | */ | ||
513 | if (i == rio_table_hdr->num_rio_dev) | ||
514 | next_wpeg = 0; | ||
515 | } while (next_wpeg != 0); | ||
516 | } | ||
517 | #endif | ||
518 | |||
519 | struct apic apic_summit = { | ||
520 | |||
521 | .name = "summit", | ||
522 | .probe = probe_summit, | ||
523 | .acpi_madt_oem_check = summit_acpi_madt_oem_check, | ||
524 | .apic_id_registered = summit_apic_id_registered, | ||
525 | |||
526 | .irq_delivery_mode = dest_LowestPrio, | ||
527 | /* logical delivery broadcast to all CPUs: */ | ||
528 | .irq_dest_mode = 1, | ||
529 | |||
530 | .target_cpus = summit_target_cpus, | ||
531 | .disable_esr = 1, | ||
532 | .dest_logical = APIC_DEST_LOGICAL, | ||
533 | .check_apicid_used = summit_check_apicid_used, | ||
534 | .check_apicid_present = summit_check_apicid_present, | ||
535 | |||
536 | .vector_allocation_domain = summit_vector_allocation_domain, | ||
537 | .init_apic_ldr = summit_init_apic_ldr, | ||
538 | |||
539 | .ioapic_phys_id_map = summit_ioapic_phys_id_map, | ||
540 | .setup_apic_routing = summit_setup_apic_routing, | ||
541 | .multi_timer_check = NULL, | ||
542 | .apicid_to_node = summit_apicid_to_node, | ||
543 | .cpu_to_logical_apicid = summit_cpu_to_logical_apicid, | ||
544 | .cpu_present_to_apicid = summit_cpu_present_to_apicid, | ||
545 | .apicid_to_cpu_present = summit_apicid_to_cpu_present, | ||
546 | .setup_portio_remap = NULL, | ||
547 | .check_phys_apicid_present = summit_check_phys_apicid_present, | ||
548 | .enable_apic_mode = NULL, | ||
549 | .phys_pkg_id = summit_phys_pkg_id, | ||
550 | .mps_oem_check = summit_mps_oem_check, | ||
551 | |||
552 | .get_apic_id = summit_get_apic_id, | ||
553 | .set_apic_id = NULL, | ||
554 | .apic_id_mask = 0xFF << 24, | ||
555 | |||
556 | .cpu_mask_to_apicid = summit_cpu_mask_to_apicid, | ||
557 | .cpu_mask_to_apicid_and = summit_cpu_mask_to_apicid_and, | ||
558 | |||
559 | .send_IPI_mask = summit_send_IPI_mask, | ||
560 | .send_IPI_mask_allbutself = NULL, | ||
561 | .send_IPI_allbutself = summit_send_IPI_allbutself, | ||
562 | .send_IPI_all = summit_send_IPI_all, | ||
563 | .send_IPI_self = default_send_IPI_self, | ||
564 | |||
565 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
566 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
567 | |||
568 | .wait_for_init_deassert = default_wait_for_init_deassert, | ||
569 | |||
570 | .smp_callin_clear_local_apic = NULL, | ||
571 | .inquire_remote_apic = default_inquire_remote_apic, | ||
572 | |||
573 | .read = native_apic_mem_read, | ||
574 | .write = native_apic_mem_write, | ||
575 | .icr_read = native_apic_icr_read, | ||
576 | .icr_write = native_apic_icr_write, | ||
577 | .wait_icr_idle = native_apic_wait_icr_idle, | ||
578 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | ||
579 | }; | ||
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c index 6ce497cc372d..8fb87b6dd633 100644 --- a/arch/x86/kernel/genx2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c | |||
@@ -7,17 +7,14 @@ | |||
7 | #include <linux/dmar.h> | 7 | #include <linux/dmar.h> |
8 | 8 | ||
9 | #include <asm/smp.h> | 9 | #include <asm/smp.h> |
10 | #include <asm/apic.h> | ||
10 | #include <asm/ipi.h> | 11 | #include <asm/ipi.h> |
11 | #include <asm/genapic.h> | ||
12 | 12 | ||
13 | DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); | 13 | DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); |
14 | 14 | ||
15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
16 | { | 16 | { |
17 | if (cpu_has_x2apic) | 17 | return x2apic_enabled(); |
18 | return 1; | ||
19 | |||
20 | return 0; | ||
21 | } | 18 | } |
22 | 19 | ||
23 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ | 20 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |
@@ -36,8 +33,8 @@ static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) | |||
36 | cpumask_set_cpu(cpu, retmask); | 33 | cpumask_set_cpu(cpu, retmask); |
37 | } | 34 | } |
38 | 35 | ||
39 | static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, | 36 | static void |
40 | unsigned int dest) | 37 | __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) |
41 | { | 38 | { |
42 | unsigned long cfg; | 39 | unsigned long cfg; |
43 | 40 | ||
@@ -46,7 +43,7 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, | |||
46 | /* | 43 | /* |
47 | * send the IPI. | 44 | * send the IPI. |
48 | */ | 45 | */ |
49 | x2apic_icr_write(cfg, apicid); | 46 | native_x2apic_icr_write(cfg, apicid); |
50 | } | 47 | } |
51 | 48 | ||
52 | /* | 49 | /* |
@@ -57,45 +54,50 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, | |||
57 | */ | 54 | */ |
58 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) | 55 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) |
59 | { | 56 | { |
60 | unsigned long flags; | ||
61 | unsigned long query_cpu; | 57 | unsigned long query_cpu; |
58 | unsigned long flags; | ||
62 | 59 | ||
63 | local_irq_save(flags); | 60 | local_irq_save(flags); |
64 | for_each_cpu(query_cpu, mask) | 61 | for_each_cpu(query_cpu, mask) { |
65 | __x2apic_send_IPI_dest( | 62 | __x2apic_send_IPI_dest( |
66 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | 63 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
67 | vector, APIC_DEST_LOGICAL); | 64 | vector, apic->dest_logical); |
65 | } | ||
68 | local_irq_restore(flags); | 66 | local_irq_restore(flags); |
69 | } | 67 | } |
70 | 68 | ||
71 | static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, | 69 | static void |
72 | int vector) | 70 | x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) |
73 | { | 71 | { |
74 | unsigned long flags; | ||
75 | unsigned long query_cpu; | ||
76 | unsigned long this_cpu = smp_processor_id(); | 72 | unsigned long this_cpu = smp_processor_id(); |
73 | unsigned long query_cpu; | ||
74 | unsigned long flags; | ||
77 | 75 | ||
78 | local_irq_save(flags); | 76 | local_irq_save(flags); |
79 | for_each_cpu(query_cpu, mask) | 77 | for_each_cpu(query_cpu, mask) { |
80 | if (query_cpu != this_cpu) | 78 | if (query_cpu == this_cpu) |
81 | __x2apic_send_IPI_dest( | 79 | continue; |
80 | __x2apic_send_IPI_dest( | ||
82 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | 81 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
83 | vector, APIC_DEST_LOGICAL); | 82 | vector, apic->dest_logical); |
83 | } | ||
84 | local_irq_restore(flags); | 84 | local_irq_restore(flags); |
85 | } | 85 | } |
86 | 86 | ||
87 | static void x2apic_send_IPI_allbutself(int vector) | 87 | static void x2apic_send_IPI_allbutself(int vector) |
88 | { | 88 | { |
89 | unsigned long flags; | ||
90 | unsigned long query_cpu; | ||
91 | unsigned long this_cpu = smp_processor_id(); | 89 | unsigned long this_cpu = smp_processor_id(); |
90 | unsigned long query_cpu; | ||
91 | unsigned long flags; | ||
92 | 92 | ||
93 | local_irq_save(flags); | 93 | local_irq_save(flags); |
94 | for_each_online_cpu(query_cpu) | 94 | for_each_online_cpu(query_cpu) { |
95 | if (query_cpu != this_cpu) | 95 | if (query_cpu == this_cpu) |
96 | __x2apic_send_IPI_dest( | 96 | continue; |
97 | __x2apic_send_IPI_dest( | ||
97 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), | 98 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
98 | vector, APIC_DEST_LOGICAL); | 99 | vector, apic->dest_logical); |
100 | } | ||
99 | local_irq_restore(flags); | 101 | local_irq_restore(flags); |
100 | } | 102 | } |
101 | 103 | ||
@@ -111,21 +113,21 @@ static int x2apic_apic_id_registered(void) | |||
111 | 113 | ||
112 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) | 114 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) |
113 | { | 115 | { |
114 | int cpu; | ||
115 | |||
116 | /* | 116 | /* |
117 | * We're using fixed IRQ delivery, can only return one logical APIC ID. | 117 | * We're using fixed IRQ delivery, can only return one logical APIC ID. |
118 | * May as well be the first. | 118 | * May as well be the first. |
119 | */ | 119 | */ |
120 | cpu = cpumask_first(cpumask); | 120 | int cpu = cpumask_first(cpumask); |
121 | |||
121 | if ((unsigned)cpu < nr_cpu_ids) | 122 | if ((unsigned)cpu < nr_cpu_ids) |
122 | return per_cpu(x86_cpu_to_logical_apicid, cpu); | 123 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
123 | else | 124 | else |
124 | return BAD_APICID; | 125 | return BAD_APICID; |
125 | } | 126 | } |
126 | 127 | ||
127 | static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | 128 | static unsigned int |
128 | const struct cpumask *andmask) | 129 | x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
130 | const struct cpumask *andmask) | ||
129 | { | 131 | { |
130 | int cpu; | 132 | int cpu; |
131 | 133 | ||
@@ -133,15 +135,18 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
133 | * We're using fixed IRQ delivery, can only return one logical APIC ID. | 135 | * We're using fixed IRQ delivery, can only return one logical APIC ID. |
134 | * May as well be the first. | 136 | * May as well be the first. |
135 | */ | 137 | */ |
136 | for_each_cpu_and(cpu, cpumask, andmask) | 138 | for_each_cpu_and(cpu, cpumask, andmask) { |
137 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 139 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
138 | break; | 140 | break; |
141 | } | ||
142 | |||
139 | if (cpu < nr_cpu_ids) | 143 | if (cpu < nr_cpu_ids) |
140 | return per_cpu(x86_cpu_to_logical_apicid, cpu); | 144 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
145 | |||
141 | return BAD_APICID; | 146 | return BAD_APICID; |
142 | } | 147 | } |
143 | 148 | ||
144 | static unsigned int get_apic_id(unsigned long x) | 149 | static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x) |
145 | { | 150 | { |
146 | unsigned int id; | 151 | unsigned int id; |
147 | 152 | ||
@@ -157,7 +162,7 @@ static unsigned long set_apic_id(unsigned int id) | |||
157 | return x; | 162 | return x; |
158 | } | 163 | } |
159 | 164 | ||
160 | static unsigned int phys_pkg_id(int index_msb) | 165 | static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb) |
161 | { | 166 | { |
162 | return current_cpu_data.initial_apicid >> index_msb; | 167 | return current_cpu_data.initial_apicid >> index_msb; |
163 | } | 168 | } |
@@ -172,27 +177,63 @@ static void init_x2apic_ldr(void) | |||
172 | int cpu = smp_processor_id(); | 177 | int cpu = smp_processor_id(); |
173 | 178 | ||
174 | per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); | 179 | per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); |
175 | return; | 180 | } |
176 | } | 181 | |
177 | 182 | struct apic apic_x2apic_cluster = { | |
178 | struct genapic apic_x2apic_cluster = { | 183 | |
179 | .name = "cluster x2apic", | 184 | .name = "cluster x2apic", |
180 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, | 185 | .probe = NULL, |
181 | .int_delivery_mode = dest_LowestPrio, | 186 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, |
182 | .int_dest_mode = (APIC_DEST_LOGICAL != 0), | 187 | .apic_id_registered = x2apic_apic_id_registered, |
183 | .target_cpus = x2apic_target_cpus, | 188 | |
184 | .vector_allocation_domain = x2apic_vector_allocation_domain, | 189 | .irq_delivery_mode = dest_LowestPrio, |
185 | .apic_id_registered = x2apic_apic_id_registered, | 190 | .irq_dest_mode = 1, /* logical */ |
186 | .init_apic_ldr = init_x2apic_ldr, | 191 | |
187 | .send_IPI_all = x2apic_send_IPI_all, | 192 | .target_cpus = x2apic_target_cpus, |
188 | .send_IPI_allbutself = x2apic_send_IPI_allbutself, | 193 | .disable_esr = 0, |
189 | .send_IPI_mask = x2apic_send_IPI_mask, | 194 | .dest_logical = APIC_DEST_LOGICAL, |
190 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, | 195 | .check_apicid_used = NULL, |
191 | .send_IPI_self = x2apic_send_IPI_self, | 196 | .check_apicid_present = NULL, |
192 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | 197 | |
193 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, | 198 | .vector_allocation_domain = x2apic_vector_allocation_domain, |
194 | .phys_pkg_id = phys_pkg_id, | 199 | .init_apic_ldr = init_x2apic_ldr, |
195 | .get_apic_id = get_apic_id, | 200 | |
196 | .set_apic_id = set_apic_id, | 201 | .ioapic_phys_id_map = NULL, |
197 | .apic_id_mask = (0xFFFFFFFFu), | 202 | .setup_apic_routing = NULL, |
203 | .multi_timer_check = NULL, | ||
204 | .apicid_to_node = NULL, | ||
205 | .cpu_to_logical_apicid = NULL, | ||
206 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | ||
207 | .apicid_to_cpu_present = NULL, | ||
208 | .setup_portio_remap = NULL, | ||
209 | .check_phys_apicid_present = default_check_phys_apicid_present, | ||
210 | .enable_apic_mode = NULL, | ||
211 | .phys_pkg_id = x2apic_cluster_phys_pkg_id, | ||
212 | .mps_oem_check = NULL, | ||
213 | |||
214 | .get_apic_id = x2apic_cluster_phys_get_apic_id, | ||
215 | .set_apic_id = set_apic_id, | ||
216 | .apic_id_mask = 0xFFFFFFFFu, | ||
217 | |||
218 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | ||
219 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, | ||
220 | |||
221 | .send_IPI_mask = x2apic_send_IPI_mask, | ||
222 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, | ||
223 | .send_IPI_allbutself = x2apic_send_IPI_allbutself, | ||
224 | .send_IPI_all = x2apic_send_IPI_all, | ||
225 | .send_IPI_self = x2apic_send_IPI_self, | ||
226 | |||
227 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
228 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
229 | .wait_for_init_deassert = NULL, | ||
230 | .smp_callin_clear_local_apic = NULL, | ||
231 | .inquire_remote_apic = NULL, | ||
232 | |||
233 | .read = native_apic_msr_read, | ||
234 | .write = native_apic_msr_write, | ||
235 | .icr_read = native_x2apic_icr_read, | ||
236 | .icr_write = native_x2apic_icr_write, | ||
237 | .wait_icr_idle = native_x2apic_wait_icr_idle, | ||
238 | .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, | ||
198 | }; | 239 | }; |
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c index 21bcc0e098ba..23625b9f98b2 100644 --- a/arch/x86/kernel/genx2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c | |||
@@ -7,10 +7,10 @@ | |||
7 | #include <linux/dmar.h> | 7 | #include <linux/dmar.h> |
8 | 8 | ||
9 | #include <asm/smp.h> | 9 | #include <asm/smp.h> |
10 | #include <asm/apic.h> | ||
10 | #include <asm/ipi.h> | 11 | #include <asm/ipi.h> |
11 | #include <asm/genapic.h> | ||
12 | 12 | ||
13 | static int x2apic_phys; | 13 | int x2apic_phys; |
14 | 14 | ||
15 | static int set_x2apic_phys_mode(char *arg) | 15 | static int set_x2apic_phys_mode(char *arg) |
16 | { | 16 | { |
@@ -21,10 +21,10 @@ early_param("x2apic_phys", set_x2apic_phys_mode); | |||
21 | 21 | ||
22 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 22 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
23 | { | 23 | { |
24 | if (cpu_has_x2apic && x2apic_phys) | 24 | if (x2apic_phys) |
25 | return 1; | 25 | return x2apic_enabled(); |
26 | 26 | else | |
27 | return 0; | 27 | return 0; |
28 | } | 28 | } |
29 | 29 | ||
30 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ | 30 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |
@@ -50,13 +50,13 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, | |||
50 | /* | 50 | /* |
51 | * send the IPI. | 51 | * send the IPI. |
52 | */ | 52 | */ |
53 | x2apic_icr_write(cfg, apicid); | 53 | native_x2apic_icr_write(cfg, apicid); |
54 | } | 54 | } |
55 | 55 | ||
56 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) | 56 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) |
57 | { | 57 | { |
58 | unsigned long flags; | ||
59 | unsigned long query_cpu; | 58 | unsigned long query_cpu; |
59 | unsigned long flags; | ||
60 | 60 | ||
61 | local_irq_save(flags); | 61 | local_irq_save(flags); |
62 | for_each_cpu(query_cpu, mask) { | 62 | for_each_cpu(query_cpu, mask) { |
@@ -66,12 +66,12 @@ static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) | |||
66 | local_irq_restore(flags); | 66 | local_irq_restore(flags); |
67 | } | 67 | } |
68 | 68 | ||
69 | static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, | 69 | static void |
70 | int vector) | 70 | x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) |
71 | { | 71 | { |
72 | unsigned long flags; | ||
73 | unsigned long query_cpu; | ||
74 | unsigned long this_cpu = smp_processor_id(); | 72 | unsigned long this_cpu = smp_processor_id(); |
73 | unsigned long query_cpu; | ||
74 | unsigned long flags; | ||
75 | 75 | ||
76 | local_irq_save(flags); | 76 | local_irq_save(flags); |
77 | for_each_cpu(query_cpu, mask) { | 77 | for_each_cpu(query_cpu, mask) { |
@@ -85,16 +85,17 @@ static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, | |||
85 | 85 | ||
86 | static void x2apic_send_IPI_allbutself(int vector) | 86 | static void x2apic_send_IPI_allbutself(int vector) |
87 | { | 87 | { |
88 | unsigned long flags; | ||
89 | unsigned long query_cpu; | ||
90 | unsigned long this_cpu = smp_processor_id(); | 88 | unsigned long this_cpu = smp_processor_id(); |
89 | unsigned long query_cpu; | ||
90 | unsigned long flags; | ||
91 | 91 | ||
92 | local_irq_save(flags); | 92 | local_irq_save(flags); |
93 | for_each_online_cpu(query_cpu) | 93 | for_each_online_cpu(query_cpu) { |
94 | if (query_cpu != this_cpu) | 94 | if (query_cpu == this_cpu) |
95 | __x2apic_send_IPI_dest( | 95 | continue; |
96 | per_cpu(x86_cpu_to_apicid, query_cpu), | 96 | __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), |
97 | vector, APIC_DEST_PHYSICAL); | 97 | vector, APIC_DEST_PHYSICAL); |
98 | } | ||
98 | local_irq_restore(flags); | 99 | local_irq_restore(flags); |
99 | } | 100 | } |
100 | 101 | ||
@@ -110,21 +111,21 @@ static int x2apic_apic_id_registered(void) | |||
110 | 111 | ||
111 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) | 112 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) |
112 | { | 113 | { |
113 | int cpu; | ||
114 | |||
115 | /* | 114 | /* |
116 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | 115 | * We're using fixed IRQ delivery, can only return one phys APIC ID. |
117 | * May as well be the first. | 116 | * May as well be the first. |
118 | */ | 117 | */ |
119 | cpu = cpumask_first(cpumask); | 118 | int cpu = cpumask_first(cpumask); |
119 | |||
120 | if ((unsigned)cpu < nr_cpu_ids) | 120 | if ((unsigned)cpu < nr_cpu_ids) |
121 | return per_cpu(x86_cpu_to_apicid, cpu); | 121 | return per_cpu(x86_cpu_to_apicid, cpu); |
122 | else | 122 | else |
123 | return BAD_APICID; | 123 | return BAD_APICID; |
124 | } | 124 | } |
125 | 125 | ||
126 | static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | 126 | static unsigned int |
127 | const struct cpumask *andmask) | 127 | x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
128 | const struct cpumask *andmask) | ||
128 | { | 129 | { |
129 | int cpu; | 130 | int cpu; |
130 | 131 | ||
@@ -132,31 +133,28 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
132 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | 133 | * We're using fixed IRQ delivery, can only return one phys APIC ID. |
133 | * May as well be the first. | 134 | * May as well be the first. |
134 | */ | 135 | */ |
135 | for_each_cpu_and(cpu, cpumask, andmask) | 136 | for_each_cpu_and(cpu, cpumask, andmask) { |
136 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 137 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
137 | break; | 138 | break; |
139 | } | ||
140 | |||
138 | if (cpu < nr_cpu_ids) | 141 | if (cpu < nr_cpu_ids) |
139 | return per_cpu(x86_cpu_to_apicid, cpu); | 142 | return per_cpu(x86_cpu_to_apicid, cpu); |
143 | |||
140 | return BAD_APICID; | 144 | return BAD_APICID; |
141 | } | 145 | } |
142 | 146 | ||
143 | static unsigned int get_apic_id(unsigned long x) | 147 | static unsigned int x2apic_phys_get_apic_id(unsigned long x) |
144 | { | 148 | { |
145 | unsigned int id; | 149 | return x; |
146 | |||
147 | id = x; | ||
148 | return id; | ||
149 | } | 150 | } |
150 | 151 | ||
151 | static unsigned long set_apic_id(unsigned int id) | 152 | static unsigned long set_apic_id(unsigned int id) |
152 | { | 153 | { |
153 | unsigned long x; | 154 | return id; |
154 | |||
155 | x = id; | ||
156 | return x; | ||
157 | } | 155 | } |
158 | 156 | ||
159 | static unsigned int phys_pkg_id(int index_msb) | 157 | static int x2apic_phys_pkg_id(int initial_apicid, int index_msb) |
160 | { | 158 | { |
161 | return current_cpu_data.initial_apicid >> index_msb; | 159 | return current_cpu_data.initial_apicid >> index_msb; |
162 | } | 160 | } |
@@ -168,27 +166,63 @@ static void x2apic_send_IPI_self(int vector) | |||
168 | 166 | ||
169 | static void init_x2apic_ldr(void) | 167 | static void init_x2apic_ldr(void) |
170 | { | 168 | { |
171 | return; | 169 | } |
172 | } | 170 | |
173 | 171 | struct apic apic_x2apic_phys = { | |
174 | struct genapic apic_x2apic_phys = { | 172 | |
175 | .name = "physical x2apic", | 173 | .name = "physical x2apic", |
176 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, | 174 | .probe = NULL, |
177 | .int_delivery_mode = dest_Fixed, | 175 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, |
178 | .int_dest_mode = (APIC_DEST_PHYSICAL != 0), | 176 | .apic_id_registered = x2apic_apic_id_registered, |
179 | .target_cpus = x2apic_target_cpus, | 177 | |
180 | .vector_allocation_domain = x2apic_vector_allocation_domain, | 178 | .irq_delivery_mode = dest_Fixed, |
181 | .apic_id_registered = x2apic_apic_id_registered, | 179 | .irq_dest_mode = 0, /* physical */ |
182 | .init_apic_ldr = init_x2apic_ldr, | 180 | |
183 | .send_IPI_all = x2apic_send_IPI_all, | 181 | .target_cpus = x2apic_target_cpus, |
184 | .send_IPI_allbutself = x2apic_send_IPI_allbutself, | 182 | .disable_esr = 0, |
185 | .send_IPI_mask = x2apic_send_IPI_mask, | 183 | .dest_logical = 0, |
186 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, | 184 | .check_apicid_used = NULL, |
187 | .send_IPI_self = x2apic_send_IPI_self, | 185 | .check_apicid_present = NULL, |
188 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | 186 | |
189 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, | 187 | .vector_allocation_domain = x2apic_vector_allocation_domain, |
190 | .phys_pkg_id = phys_pkg_id, | 188 | .init_apic_ldr = init_x2apic_ldr, |
191 | .get_apic_id = get_apic_id, | 189 | |
192 | .set_apic_id = set_apic_id, | 190 | .ioapic_phys_id_map = NULL, |
193 | .apic_id_mask = (0xFFFFFFFFu), | 191 | .setup_apic_routing = NULL, |
192 | .multi_timer_check = NULL, | ||
193 | .apicid_to_node = NULL, | ||
194 | .cpu_to_logical_apicid = NULL, | ||
195 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | ||
196 | .apicid_to_cpu_present = NULL, | ||
197 | .setup_portio_remap = NULL, | ||
198 | .check_phys_apicid_present = default_check_phys_apicid_present, | ||
199 | .enable_apic_mode = NULL, | ||
200 | .phys_pkg_id = x2apic_phys_pkg_id, | ||
201 | .mps_oem_check = NULL, | ||
202 | |||
203 | .get_apic_id = x2apic_phys_get_apic_id, | ||
204 | .set_apic_id = set_apic_id, | ||
205 | .apic_id_mask = 0xFFFFFFFFu, | ||
206 | |||
207 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | ||
208 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, | ||
209 | |||
210 | .send_IPI_mask = x2apic_send_IPI_mask, | ||
211 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, | ||
212 | .send_IPI_allbutself = x2apic_send_IPI_allbutself, | ||
213 | .send_IPI_all = x2apic_send_IPI_all, | ||
214 | .send_IPI_self = x2apic_send_IPI_self, | ||
215 | |||
216 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
217 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
218 | .wait_for_init_deassert = NULL, | ||
219 | .smp_callin_clear_local_apic = NULL, | ||
220 | .inquire_remote_apic = NULL, | ||
221 | |||
222 | .read = native_apic_msr_read, | ||
223 | .write = native_apic_msr_write, | ||
224 | .icr_read = native_x2apic_icr_read, | ||
225 | .icr_write = native_x2apic_icr_write, | ||
226 | .wait_icr_idle = native_x2apic_wait_icr_idle, | ||
227 | .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, | ||
194 | }; | 228 | }; |
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index b193e082f6ce..1bd6da1f8fad 100644 --- a/arch/x86/kernel/genx2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -7,27 +7,28 @@ | |||
7 | * | 7 | * |
8 | * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. | 8 | * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. |
9 | */ | 9 | */ |
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/threads.h> | ||
13 | #include <linux/cpu.h> | ||
14 | #include <linux/cpumask.h> | 10 | #include <linux/cpumask.h> |
11 | #include <linux/hardirq.h> | ||
12 | #include <linux/proc_fs.h> | ||
13 | #include <linux/threads.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/module.h> | ||
15 | #include <linux/string.h> | 16 | #include <linux/string.h> |
16 | #include <linux/ctype.h> | 17 | #include <linux/ctype.h> |
17 | #include <linux/init.h> | ||
18 | #include <linux/sched.h> | 18 | #include <linux/sched.h> |
19 | #include <linux/module.h> | ||
20 | #include <linux/hardirq.h> | ||
21 | #include <linux/timer.h> | 19 | #include <linux/timer.h> |
22 | #include <linux/proc_fs.h> | 20 | #include <linux/cpu.h> |
23 | #include <asm/current.h> | 21 | #include <linux/init.h> |
24 | #include <asm/smp.h> | 22 | |
25 | #include <asm/ipi.h> | ||
26 | #include <asm/genapic.h> | ||
27 | #include <asm/pgtable.h> | ||
28 | #include <asm/uv/uv_mmrs.h> | 23 | #include <asm/uv/uv_mmrs.h> |
29 | #include <asm/uv/uv_hub.h> | 24 | #include <asm/uv/uv_hub.h> |
25 | #include <asm/current.h> | ||
26 | #include <asm/pgtable.h> | ||
30 | #include <asm/uv/bios.h> | 27 | #include <asm/uv/bios.h> |
28 | #include <asm/uv/uv.h> | ||
29 | #include <asm/apic.h> | ||
30 | #include <asm/ipi.h> | ||
31 | #include <asm/smp.h> | ||
31 | 32 | ||
32 | DEFINE_PER_CPU(int, x2apic_extra_bits); | 33 | DEFINE_PER_CPU(int, x2apic_extra_bits); |
33 | 34 | ||
@@ -90,39 +91,43 @@ static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask) | |||
90 | cpumask_set_cpu(cpu, retmask); | 91 | cpumask_set_cpu(cpu, retmask); |
91 | } | 92 | } |
92 | 93 | ||
93 | int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip) | 94 | static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip) |
94 | { | 95 | { |
96 | #ifdef CONFIG_SMP | ||
95 | unsigned long val; | 97 | unsigned long val; |
96 | int pnode; | 98 | int pnode; |
97 | 99 | ||
98 | pnode = uv_apicid_to_pnode(phys_apicid); | 100 | pnode = uv_apicid_to_pnode(phys_apicid); |
99 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | | 101 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
100 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | | 102 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
101 | (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | | 103 | ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | |
102 | APIC_DM_INIT; | 104 | APIC_DM_INIT; |
103 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); | 105 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); |
104 | mdelay(10); | 106 | mdelay(10); |
105 | 107 | ||
106 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | | 108 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
107 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | | 109 | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
108 | (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | | 110 | ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | |
109 | APIC_DM_STARTUP; | 111 | APIC_DM_STARTUP; |
110 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); | 112 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); |
113 | |||
114 | atomic_set(&init_deasserted, 1); | ||
115 | #endif | ||
111 | return 0; | 116 | return 0; |
112 | } | 117 | } |
113 | 118 | ||
114 | static void uv_send_IPI_one(int cpu, int vector) | 119 | static void uv_send_IPI_one(int cpu, int vector) |
115 | { | 120 | { |
116 | unsigned long val, apicid, lapicid; | 121 | unsigned long val, apicid; |
117 | int pnode; | 122 | int pnode; |
118 | 123 | ||
119 | apicid = per_cpu(x86_cpu_to_apicid, cpu); | 124 | apicid = per_cpu(x86_cpu_to_apicid, cpu); |
120 | lapicid = apicid & 0x3f; /* ZZZ macro needed */ | ||
121 | pnode = uv_apicid_to_pnode(apicid); | 125 | pnode = uv_apicid_to_pnode(apicid); |
122 | val = | 126 | |
123 | (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid << | 127 | val = (1UL << UVH_IPI_INT_SEND_SHFT) | |
124 | UVH_IPI_INT_APIC_ID_SHFT) | | 128 | (apicid << UVH_IPI_INT_APIC_ID_SHFT) | |
125 | (vector << UVH_IPI_INT_VECTOR_SHFT); | 129 | (vector << UVH_IPI_INT_VECTOR_SHFT); |
130 | |||
126 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); | 131 | uv_write_global_mmr64(pnode, UVH_IPI_INT, val); |
127 | } | 132 | } |
128 | 133 | ||
@@ -136,22 +141,24 @@ static void uv_send_IPI_mask(const struct cpumask *mask, int vector) | |||
136 | 141 | ||
137 | static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) | 142 | static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) |
138 | { | 143 | { |
139 | unsigned int cpu; | ||
140 | unsigned int this_cpu = smp_processor_id(); | 144 | unsigned int this_cpu = smp_processor_id(); |
145 | unsigned int cpu; | ||
141 | 146 | ||
142 | for_each_cpu(cpu, mask) | 147 | for_each_cpu(cpu, mask) { |
143 | if (cpu != this_cpu) | 148 | if (cpu != this_cpu) |
144 | uv_send_IPI_one(cpu, vector); | 149 | uv_send_IPI_one(cpu, vector); |
150 | } | ||
145 | } | 151 | } |
146 | 152 | ||
147 | static void uv_send_IPI_allbutself(int vector) | 153 | static void uv_send_IPI_allbutself(int vector) |
148 | { | 154 | { |
149 | unsigned int cpu; | ||
150 | unsigned int this_cpu = smp_processor_id(); | 155 | unsigned int this_cpu = smp_processor_id(); |
156 | unsigned int cpu; | ||
151 | 157 | ||
152 | for_each_online_cpu(cpu) | 158 | for_each_online_cpu(cpu) { |
153 | if (cpu != this_cpu) | 159 | if (cpu != this_cpu) |
154 | uv_send_IPI_one(cpu, vector); | 160 | uv_send_IPI_one(cpu, vector); |
161 | } | ||
155 | } | 162 | } |
156 | 163 | ||
157 | static void uv_send_IPI_all(int vector) | 164 | static void uv_send_IPI_all(int vector) |
@@ -170,21 +177,21 @@ static void uv_init_apic_ldr(void) | |||
170 | 177 | ||
171 | static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask) | 178 | static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask) |
172 | { | 179 | { |
173 | int cpu; | ||
174 | |||
175 | /* | 180 | /* |
176 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | 181 | * We're using fixed IRQ delivery, can only return one phys APIC ID. |
177 | * May as well be the first. | 182 | * May as well be the first. |
178 | */ | 183 | */ |
179 | cpu = cpumask_first(cpumask); | 184 | int cpu = cpumask_first(cpumask); |
185 | |||
180 | if ((unsigned)cpu < nr_cpu_ids) | 186 | if ((unsigned)cpu < nr_cpu_ids) |
181 | return per_cpu(x86_cpu_to_apicid, cpu); | 187 | return per_cpu(x86_cpu_to_apicid, cpu); |
182 | else | 188 | else |
183 | return BAD_APICID; | 189 | return BAD_APICID; |
184 | } | 190 | } |
185 | 191 | ||
186 | static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | 192 | static unsigned int |
187 | const struct cpumask *andmask) | 193 | uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
194 | const struct cpumask *andmask) | ||
188 | { | 195 | { |
189 | int cpu; | 196 | int cpu; |
190 | 197 | ||
@@ -192,15 +199,17 @@ static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
192 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | 199 | * We're using fixed IRQ delivery, can only return one phys APIC ID. |
193 | * May as well be the first. | 200 | * May as well be the first. |
194 | */ | 201 | */ |
195 | for_each_cpu_and(cpu, cpumask, andmask) | 202 | for_each_cpu_and(cpu, cpumask, andmask) { |
196 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 203 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
197 | break; | 204 | break; |
205 | } | ||
198 | if (cpu < nr_cpu_ids) | 206 | if (cpu < nr_cpu_ids) |
199 | return per_cpu(x86_cpu_to_apicid, cpu); | 207 | return per_cpu(x86_cpu_to_apicid, cpu); |
208 | |||
200 | return BAD_APICID; | 209 | return BAD_APICID; |
201 | } | 210 | } |
202 | 211 | ||
203 | static unsigned int get_apic_id(unsigned long x) | 212 | static unsigned int x2apic_get_apic_id(unsigned long x) |
204 | { | 213 | { |
205 | unsigned int id; | 214 | unsigned int id; |
206 | 215 | ||
@@ -222,10 +231,10 @@ static unsigned long set_apic_id(unsigned int id) | |||
222 | static unsigned int uv_read_apic_id(void) | 231 | static unsigned int uv_read_apic_id(void) |
223 | { | 232 | { |
224 | 233 | ||
225 | return get_apic_id(apic_read(APIC_ID)); | 234 | return x2apic_get_apic_id(apic_read(APIC_ID)); |
226 | } | 235 | } |
227 | 236 | ||
228 | static unsigned int phys_pkg_id(int index_msb) | 237 | static int uv_phys_pkg_id(int initial_apicid, int index_msb) |
229 | { | 238 | { |
230 | return uv_read_apic_id() >> index_msb; | 239 | return uv_read_apic_id() >> index_msb; |
231 | } | 240 | } |
@@ -235,26 +244,64 @@ static void uv_send_IPI_self(int vector) | |||
235 | apic_write(APIC_SELF_IPI, vector); | 244 | apic_write(APIC_SELF_IPI, vector); |
236 | } | 245 | } |
237 | 246 | ||
238 | struct genapic apic_x2apic_uv_x = { | 247 | struct apic apic_x2apic_uv_x = { |
239 | .name = "UV large system", | 248 | |
240 | .acpi_madt_oem_check = uv_acpi_madt_oem_check, | 249 | .name = "UV large system", |
241 | .int_delivery_mode = dest_Fixed, | 250 | .probe = NULL, |
242 | .int_dest_mode = (APIC_DEST_PHYSICAL != 0), | 251 | .acpi_madt_oem_check = uv_acpi_madt_oem_check, |
243 | .target_cpus = uv_target_cpus, | 252 | .apic_id_registered = uv_apic_id_registered, |
244 | .vector_allocation_domain = uv_vector_allocation_domain, | 253 | |
245 | .apic_id_registered = uv_apic_id_registered, | 254 | .irq_delivery_mode = dest_Fixed, |
246 | .init_apic_ldr = uv_init_apic_ldr, | 255 | .irq_dest_mode = 1, /* logical */ |
247 | .send_IPI_all = uv_send_IPI_all, | 256 | |
248 | .send_IPI_allbutself = uv_send_IPI_allbutself, | 257 | .target_cpus = uv_target_cpus, |
249 | .send_IPI_mask = uv_send_IPI_mask, | 258 | .disable_esr = 0, |
250 | .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, | 259 | .dest_logical = APIC_DEST_LOGICAL, |
251 | .send_IPI_self = uv_send_IPI_self, | 260 | .check_apicid_used = NULL, |
252 | .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, | 261 | .check_apicid_present = NULL, |
253 | .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and, | 262 | |
254 | .phys_pkg_id = phys_pkg_id, | 263 | .vector_allocation_domain = uv_vector_allocation_domain, |
255 | .get_apic_id = get_apic_id, | 264 | .init_apic_ldr = uv_init_apic_ldr, |
256 | .set_apic_id = set_apic_id, | 265 | |
257 | .apic_id_mask = (0xFFFFFFFFu), | 266 | .ioapic_phys_id_map = NULL, |
267 | .setup_apic_routing = NULL, | ||
268 | .multi_timer_check = NULL, | ||
269 | .apicid_to_node = NULL, | ||
270 | .cpu_to_logical_apicid = NULL, | ||
271 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | ||
272 | .apicid_to_cpu_present = NULL, | ||
273 | .setup_portio_remap = NULL, | ||
274 | .check_phys_apicid_present = default_check_phys_apicid_present, | ||
275 | .enable_apic_mode = NULL, | ||
276 | .phys_pkg_id = uv_phys_pkg_id, | ||
277 | .mps_oem_check = NULL, | ||
278 | |||
279 | .get_apic_id = x2apic_get_apic_id, | ||
280 | .set_apic_id = set_apic_id, | ||
281 | .apic_id_mask = 0xFFFFFFFFu, | ||
282 | |||
283 | .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, | ||
284 | .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and, | ||
285 | |||
286 | .send_IPI_mask = uv_send_IPI_mask, | ||
287 | .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, | ||
288 | .send_IPI_allbutself = uv_send_IPI_allbutself, | ||
289 | .send_IPI_all = uv_send_IPI_all, | ||
290 | .send_IPI_self = uv_send_IPI_self, | ||
291 | |||
292 | .wakeup_secondary_cpu = uv_wakeup_secondary, | ||
293 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
294 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
295 | .wait_for_init_deassert = NULL, | ||
296 | .smp_callin_clear_local_apic = NULL, | ||
297 | .inquire_remote_apic = NULL, | ||
298 | |||
299 | .read = native_apic_msr_read, | ||
300 | .write = native_apic_msr_write, | ||
301 | .icr_read = native_x2apic_icr_read, | ||
302 | .icr_write = native_x2apic_icr_write, | ||
303 | .wait_icr_idle = native_x2apic_wait_icr_idle, | ||
304 | .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, | ||
258 | }; | 305 | }; |
259 | 306 | ||
260 | static __cpuinit void set_x2apic_extra_bits(int pnode) | 307 | static __cpuinit void set_x2apic_extra_bits(int pnode) |
@@ -322,7 +369,7 @@ static __init void map_high(char *id, unsigned long base, int shift, | |||
322 | paddr = base << shift; | 369 | paddr = base << shift; |
323 | bytes = (1UL << shift) * (max_pnode + 1); | 370 | bytes = (1UL << shift) * (max_pnode + 1); |
324 | printk(KERN_INFO "UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, | 371 | printk(KERN_INFO "UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, |
325 | paddr + bytes); | 372 | paddr + bytes); |
326 | if (map_type == map_uc) | 373 | if (map_type == map_uc) |
327 | init_extra_mapping_uc(paddr, bytes); | 374 | init_extra_mapping_uc(paddr, bytes); |
328 | else | 375 | else |
@@ -485,7 +532,7 @@ late_initcall(uv_init_heartbeat); | |||
485 | 532 | ||
486 | /* | 533 | /* |
487 | * Called on each cpu to initialize the per_cpu UV data area. | 534 | * Called on each cpu to initialize the per_cpu UV data area. |
488 | * ZZZ hotplug not supported yet | 535 | * FIXME: hotplug not supported yet |
489 | */ | 536 | */ |
490 | void __cpuinit uv_cpu_init(void) | 537 | void __cpuinit uv_cpu_init(void) |
491 | { | 538 | { |
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index 266ec6c18b6c..10033fe718e0 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c | |||
@@ -301,7 +301,7 @@ extern int (*console_blank_hook)(int); | |||
301 | */ | 301 | */ |
302 | #define APM_ZERO_SEGS | 302 | #define APM_ZERO_SEGS |
303 | 303 | ||
304 | #include "apm.h" | 304 | #include <asm/apm.h> |
305 | 305 | ||
306 | /* | 306 | /* |
307 | * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend. | 307 | * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend. |
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c index ee4df08feee6..fbf2f33e3080 100644 --- a/arch/x86/kernel/asm-offsets_32.c +++ b/arch/x86/kernel/asm-offsets_32.c | |||
@@ -75,6 +75,7 @@ void foo(void) | |||
75 | OFFSET(PT_DS, pt_regs, ds); | 75 | OFFSET(PT_DS, pt_regs, ds); |
76 | OFFSET(PT_ES, pt_regs, es); | 76 | OFFSET(PT_ES, pt_regs, es); |
77 | OFFSET(PT_FS, pt_regs, fs); | 77 | OFFSET(PT_FS, pt_regs, fs); |
78 | OFFSET(PT_GS, pt_regs, gs); | ||
78 | OFFSET(PT_ORIG_EAX, pt_regs, orig_ax); | 79 | OFFSET(PT_ORIG_EAX, pt_regs, orig_ax); |
79 | OFFSET(PT_EIP, pt_regs, ip); | 80 | OFFSET(PT_EIP, pt_regs, ip); |
80 | OFFSET(PT_CS, pt_regs, cs); | 81 | OFFSET(PT_CS, pt_regs, cs); |
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c index 1d41d3f1edbc..8793ab33e2c1 100644 --- a/arch/x86/kernel/asm-offsets_64.c +++ b/arch/x86/kernel/asm-offsets_64.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/hardirq.h> | 11 | #include <linux/hardirq.h> |
12 | #include <linux/suspend.h> | 12 | #include <linux/suspend.h> |
13 | #include <linux/kbuild.h> | 13 | #include <linux/kbuild.h> |
14 | #include <asm/pda.h> | ||
15 | #include <asm/processor.h> | 14 | #include <asm/processor.h> |
16 | #include <asm/segment.h> | 15 | #include <asm/segment.h> |
17 | #include <asm/thread_info.h> | 16 | #include <asm/thread_info.h> |
@@ -48,16 +47,6 @@ int main(void) | |||
48 | #endif | 47 | #endif |
49 | BLANK(); | 48 | BLANK(); |
50 | #undef ENTRY | 49 | #undef ENTRY |
51 | #define ENTRY(entry) DEFINE(pda_ ## entry, offsetof(struct x8664_pda, entry)) | ||
52 | ENTRY(kernelstack); | ||
53 | ENTRY(oldrsp); | ||
54 | ENTRY(pcurrent); | ||
55 | ENTRY(irqcount); | ||
56 | ENTRY(cpunumber); | ||
57 | ENTRY(irqstackptr); | ||
58 | ENTRY(data_offset); | ||
59 | BLANK(); | ||
60 | #undef ENTRY | ||
61 | #ifdef CONFIG_PARAVIRT | 50 | #ifdef CONFIG_PARAVIRT |
62 | BLANK(); | 51 | BLANK(); |
63 | OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled); | 52 | OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled); |
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c index 2cf23634b6d9..6882a735d9c0 100644 --- a/arch/x86/kernel/cpu/addon_cpuid_features.c +++ b/arch/x86/kernel/cpu/addon_cpuid_features.c | |||
@@ -7,7 +7,7 @@ | |||
7 | #include <asm/pat.h> | 7 | #include <asm/pat.h> |
8 | #include <asm/processor.h> | 8 | #include <asm/processor.h> |
9 | 9 | ||
10 | #include <mach_apic.h> | 10 | #include <asm/apic.h> |
11 | 11 | ||
12 | struct cpuid_bit { | 12 | struct cpuid_bit { |
13 | u16 feature; | 13 | u16 feature; |
@@ -69,7 +69,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c) | |||
69 | */ | 69 | */ |
70 | void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c) | 70 | void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c) |
71 | { | 71 | { |
72 | #ifdef CONFIG_X86_SMP | 72 | #ifdef CONFIG_SMP |
73 | unsigned int eax, ebx, ecx, edx, sub_index; | 73 | unsigned int eax, ebx, ecx, edx, sub_index; |
74 | unsigned int ht_mask_width, core_plus_mask_width; | 74 | unsigned int ht_mask_width, core_plus_mask_width; |
75 | unsigned int core_select_mask, core_level_siblings; | 75 | unsigned int core_select_mask, core_level_siblings; |
@@ -116,22 +116,14 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c) | |||
116 | 116 | ||
117 | core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; | 117 | core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; |
118 | 118 | ||
119 | #ifdef CONFIG_X86_32 | 119 | c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width) |
120 | c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width) | ||
121 | & core_select_mask; | 120 | & core_select_mask; |
122 | c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width); | 121 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width); |
123 | /* | 122 | /* |
124 | * Reinit the apicid, now that we have extended initial_apicid. | 123 | * Reinit the apicid, now that we have extended initial_apicid. |
125 | */ | 124 | */ |
126 | c->apicid = phys_pkg_id(c->initial_apicid, 0); | 125 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
127 | #else | 126 | |
128 | c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask; | ||
129 | c->phys_proc_id = phys_pkg_id(core_plus_mask_width); | ||
130 | /* | ||
131 | * Reinit the apicid, now that we have extended initial_apicid. | ||
132 | */ | ||
133 | c->apicid = phys_pkg_id(0); | ||
134 | #endif | ||
135 | c->x86_max_cores = (core_level_siblings / smp_num_siblings); | 127 | c->x86_max_cores = (core_level_siblings / smp_num_siblings); |
136 | 128 | ||
137 | 129 | ||
@@ -143,37 +135,3 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c) | |||
143 | return; | 135 | return; |
144 | #endif | 136 | #endif |
145 | } | 137 | } |
146 | |||
147 | #ifdef CONFIG_X86_PAT | ||
148 | void __cpuinit validate_pat_support(struct cpuinfo_x86 *c) | ||
149 | { | ||
150 | if (!cpu_has_pat) | ||
151 | pat_disable("PAT not supported by CPU."); | ||
152 | |||
153 | switch (c->x86_vendor) { | ||
154 | case X86_VENDOR_INTEL: | ||
155 | /* | ||
156 | * There is a known erratum on Pentium III and Core Solo | ||
157 | * and Core Duo CPUs. | ||
158 | * " Page with PAT set to WC while associated MTRR is UC | ||
159 | * may consolidate to UC " | ||
160 | * Because of this erratum, it is better to stick with | ||
161 | * setting WC in MTRR rather than using PAT on these CPUs. | ||
162 | * | ||
163 | * Enable PAT WC only on P4, Core 2 or later CPUs. | ||
164 | */ | ||
165 | if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15)) | ||
166 | return; | ||
167 | |||
168 | pat_disable("PAT WC disabled due to known CPU erratum."); | ||
169 | return; | ||
170 | |||
171 | case X86_VENDOR_AMD: | ||
172 | case X86_VENDOR_CENTAUR: | ||
173 | case X86_VENDOR_TRANSMETA: | ||
174 | return; | ||
175 | } | ||
176 | |||
177 | pat_disable("PAT disabled. Not yet verified on this CPU type."); | ||
178 | } | ||
179 | #endif | ||
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 7c878f6aa919..25423a5b80ed 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -12,8 +12,6 @@ | |||
12 | # include <asm/cacheflush.h> | 12 | # include <asm/cacheflush.h> |
13 | #endif | 13 | #endif |
14 | 14 | ||
15 | #include <mach_apic.h> | ||
16 | |||
17 | #include "cpu.h" | 15 | #include "cpu.h" |
18 | 16 | ||
19 | #ifdef CONFIG_X86_32 | 17 | #ifdef CONFIG_X86_32 |
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 83492b1f93b1..826d5c876278 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -21,14 +21,14 @@ | |||
21 | #include <asm/asm.h> | 21 | #include <asm/asm.h> |
22 | #include <asm/numa.h> | 22 | #include <asm/numa.h> |
23 | #include <asm/smp.h> | 23 | #include <asm/smp.h> |
24 | #ifdef CONFIG_X86_LOCAL_APIC | 24 | #include <asm/cpu.h> |
25 | #include <asm/mpspec.h> | 25 | #include <asm/cpumask.h> |
26 | #include <asm/apic.h> | 26 | #include <asm/apic.h> |
27 | #include <mach_apic.h> | 27 | |
28 | #include <asm/genapic.h> | 28 | #ifdef CONFIG_X86_LOCAL_APIC |
29 | #include <asm/uv/uv.h> | ||
29 | #endif | 30 | #endif |
30 | 31 | ||
31 | #include <asm/pda.h> | ||
32 | #include <asm/pgtable.h> | 32 | #include <asm/pgtable.h> |
33 | #include <asm/processor.h> | 33 | #include <asm/processor.h> |
34 | #include <asm/desc.h> | 34 | #include <asm/desc.h> |
@@ -37,6 +37,7 @@ | |||
37 | #include <asm/sections.h> | 37 | #include <asm/sections.h> |
38 | #include <asm/setup.h> | 38 | #include <asm/setup.h> |
39 | #include <asm/hypervisor.h> | 39 | #include <asm/hypervisor.h> |
40 | #include <asm/stackprotector.h> | ||
40 | 41 | ||
41 | #include "cpu.h" | 42 | #include "cpu.h" |
42 | 43 | ||
@@ -50,6 +51,15 @@ cpumask_var_t cpu_initialized_mask; | |||
50 | /* representing cpus for which sibling maps can be computed */ | 51 | /* representing cpus for which sibling maps can be computed */ |
51 | cpumask_var_t cpu_sibling_setup_mask; | 52 | cpumask_var_t cpu_sibling_setup_mask; |
52 | 53 | ||
54 | /* correctly size the local cpu masks */ | ||
55 | void __init setup_cpu_local_masks(void) | ||
56 | { | ||
57 | alloc_bootmem_cpumask_var(&cpu_initialized_mask); | ||
58 | alloc_bootmem_cpumask_var(&cpu_callin_mask); | ||
59 | alloc_bootmem_cpumask_var(&cpu_callout_mask); | ||
60 | alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask); | ||
61 | } | ||
62 | |||
53 | #else /* CONFIG_X86_32 */ | 63 | #else /* CONFIG_X86_32 */ |
54 | 64 | ||
55 | cpumask_t cpu_callin_map; | 65 | cpumask_t cpu_callin_map; |
@@ -62,23 +72,23 @@ cpumask_t cpu_sibling_setup_map; | |||
62 | 72 | ||
63 | static struct cpu_dev *this_cpu __cpuinitdata; | 73 | static struct cpu_dev *this_cpu __cpuinitdata; |
64 | 74 | ||
75 | DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { | ||
65 | #ifdef CONFIG_X86_64 | 76 | #ifdef CONFIG_X86_64 |
66 | /* We need valid kernel segments for data and code in long mode too | 77 | /* |
67 | * IRET will check the segment types kkeil 2000/10/28 | 78 | * We need valid kernel segments for data and code in long mode too |
68 | * Also sysret mandates a special GDT layout | 79 | * IRET will check the segment types kkeil 2000/10/28 |
69 | */ | 80 | * Also sysret mandates a special GDT layout |
70 | /* The TLS descriptors are currently at a different place compared to i386. | 81 | * |
71 | Hopefully nobody expects them at a fixed place (Wine?) */ | 82 | * The TLS descriptors are currently at a different place compared to i386. |
72 | DEFINE_PER_CPU(struct gdt_page, gdt_page) = { .gdt = { | 83 | * Hopefully nobody expects them at a fixed place (Wine?) |
84 | */ | ||
73 | [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } }, | 85 | [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } }, |
74 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } }, | 86 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } }, |
75 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } }, | 87 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } }, |
76 | [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } }, | 88 | [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } }, |
77 | [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } }, | 89 | [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } }, |
78 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } }, | 90 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } }, |
79 | } }; | ||
80 | #else | 91 | #else |
81 | DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { | ||
82 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } }, | 92 | [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } }, |
83 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } }, | 93 | [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } }, |
84 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } }, | 94 | [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } }, |
@@ -110,9 +120,10 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { | |||
110 | [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } }, | 120 | [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } }, |
111 | 121 | ||
112 | [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } }, | 122 | [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } }, |
113 | [GDT_ENTRY_PERCPU] = { { { 0x00000000, 0x00000000 } } }, | 123 | [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } }, |
114 | } }; | 124 | GDT_STACK_CANARY_INIT |
115 | #endif | 125 | #endif |
126 | } }; | ||
116 | EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); | 127 | EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); |
117 | 128 | ||
118 | #ifdef CONFIG_X86_32 | 129 | #ifdef CONFIG_X86_32 |
@@ -213,6 +224,49 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) | |||
213 | #endif | 224 | #endif |
214 | 225 | ||
215 | /* | 226 | /* |
227 | * Some CPU features depend on higher CPUID levels, which may not always | ||
228 | * be available due to CPUID level capping or broken virtualization | ||
229 | * software. Add those features to this table to auto-disable them. | ||
230 | */ | ||
231 | struct cpuid_dependent_feature { | ||
232 | u32 feature; | ||
233 | u32 level; | ||
234 | }; | ||
235 | static const struct cpuid_dependent_feature __cpuinitconst | ||
236 | cpuid_dependent_features[] = { | ||
237 | { X86_FEATURE_MWAIT, 0x00000005 }, | ||
238 | { X86_FEATURE_DCA, 0x00000009 }, | ||
239 | { X86_FEATURE_XSAVE, 0x0000000d }, | ||
240 | { 0, 0 } | ||
241 | }; | ||
242 | |||
243 | static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) | ||
244 | { | ||
245 | const struct cpuid_dependent_feature *df; | ||
246 | for (df = cpuid_dependent_features; df->feature; df++) { | ||
247 | /* | ||
248 | * Note: cpuid_level is set to -1 if unavailable, but | ||
249 | * extended_extended_level is set to 0 if unavailable | ||
250 | * and the legitimate extended levels are all negative | ||
251 | * when signed; hence the weird messing around with | ||
252 | * signs here... | ||
253 | */ | ||
254 | if (cpu_has(c, df->feature) && | ||
255 | ((s32)df->level < 0 ? | ||
256 | (u32)df->level > (u32)c->extended_cpuid_level : | ||
257 | (s32)df->level > (s32)c->cpuid_level)) { | ||
258 | clear_cpu_cap(c, df->feature); | ||
259 | if (warn) | ||
260 | printk(KERN_WARNING | ||
261 | "CPU: CPU feature %s disabled " | ||
262 | "due to lack of CPUID level 0x%x\n", | ||
263 | x86_cap_flags[df->feature], | ||
264 | df->level); | ||
265 | } | ||
266 | } | ||
267 | } | ||
268 | |||
269 | /* | ||
216 | * Naming convention should be: <Name> [(<Codename>)] | 270 | * Naming convention should be: <Name> [(<Codename>)] |
217 | * This table only is used unless init_<vendor>() below doesn't set it; | 271 | * This table only is used unless init_<vendor>() below doesn't set it; |
218 | * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used | 272 | * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used |
@@ -242,18 +296,29 @@ static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c) | |||
242 | 296 | ||
243 | __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; | 297 | __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; |
244 | 298 | ||
299 | void load_percpu_segment(int cpu) | ||
300 | { | ||
301 | #ifdef CONFIG_X86_32 | ||
302 | loadsegment(fs, __KERNEL_PERCPU); | ||
303 | #else | ||
304 | loadsegment(gs, 0); | ||
305 | wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu)); | ||
306 | #endif | ||
307 | load_stack_canary_segment(); | ||
308 | } | ||
309 | |||
245 | /* Current gdt points %fs at the "master" per-cpu area: after this, | 310 | /* Current gdt points %fs at the "master" per-cpu area: after this, |
246 | * it's on the real one. */ | 311 | * it's on the real one. */ |
247 | void switch_to_new_gdt(void) | 312 | void switch_to_new_gdt(int cpu) |
248 | { | 313 | { |
249 | struct desc_ptr gdt_descr; | 314 | struct desc_ptr gdt_descr; |
250 | 315 | ||
251 | gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id()); | 316 | gdt_descr.address = (long)get_cpu_gdt_table(cpu); |
252 | gdt_descr.size = GDT_SIZE - 1; | 317 | gdt_descr.size = GDT_SIZE - 1; |
253 | load_gdt(&gdt_descr); | 318 | load_gdt(&gdt_descr); |
254 | #ifdef CONFIG_X86_32 | 319 | /* Reload the per-cpu base */ |
255 | asm("mov %0, %%fs" : : "r" (__KERNEL_PERCPU) : "memory"); | 320 | |
256 | #endif | 321 | load_percpu_segment(cpu); |
257 | } | 322 | } |
258 | 323 | ||
259 | static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; | 324 | static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; |
@@ -383,11 +448,7 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
383 | } | 448 | } |
384 | 449 | ||
385 | index_msb = get_count_order(smp_num_siblings); | 450 | index_msb = get_count_order(smp_num_siblings); |
386 | #ifdef CONFIG_X86_64 | 451 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb); |
387 | c->phys_proc_id = phys_pkg_id(index_msb); | ||
388 | #else | ||
389 | c->phys_proc_id = phys_pkg_id(c->initial_apicid, index_msb); | ||
390 | #endif | ||
391 | 452 | ||
392 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; | 453 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
393 | 454 | ||
@@ -395,13 +456,8 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
395 | 456 | ||
396 | core_bits = get_count_order(c->x86_max_cores); | 457 | core_bits = get_count_order(c->x86_max_cores); |
397 | 458 | ||
398 | #ifdef CONFIG_X86_64 | 459 | c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) & |
399 | c->cpu_core_id = phys_pkg_id(index_msb) & | ||
400 | ((1 << core_bits) - 1); | 460 | ((1 << core_bits) - 1); |
401 | #else | ||
402 | c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) & | ||
403 | ((1 << core_bits) - 1); | ||
404 | #endif | ||
405 | } | 461 | } |
406 | 462 | ||
407 | out: | 463 | out: |
@@ -570,11 +626,10 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) | |||
570 | if (this_cpu->c_early_init) | 626 | if (this_cpu->c_early_init) |
571 | this_cpu->c_early_init(c); | 627 | this_cpu->c_early_init(c); |
572 | 628 | ||
573 | validate_pat_support(c); | ||
574 | |||
575 | #ifdef CONFIG_SMP | 629 | #ifdef CONFIG_SMP |
576 | c->cpu_index = boot_cpu_id; | 630 | c->cpu_index = boot_cpu_id; |
577 | #endif | 631 | #endif |
632 | filter_cpuid_features(c, false); | ||
578 | } | 633 | } |
579 | 634 | ||
580 | void __init early_cpu_init(void) | 635 | void __init early_cpu_init(void) |
@@ -637,7 +692,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c) | |||
637 | c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF; | 692 | c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF; |
638 | #ifdef CONFIG_X86_32 | 693 | #ifdef CONFIG_X86_32 |
639 | # ifdef CONFIG_X86_HT | 694 | # ifdef CONFIG_X86_HT |
640 | c->apicid = phys_pkg_id(c->initial_apicid, 0); | 695 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
641 | # else | 696 | # else |
642 | c->apicid = c->initial_apicid; | 697 | c->apicid = c->initial_apicid; |
643 | # endif | 698 | # endif |
@@ -684,7 +739,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
684 | this_cpu->c_identify(c); | 739 | this_cpu->c_identify(c); |
685 | 740 | ||
686 | #ifdef CONFIG_X86_64 | 741 | #ifdef CONFIG_X86_64 |
687 | c->apicid = phys_pkg_id(0); | 742 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
688 | #endif | 743 | #endif |
689 | 744 | ||
690 | /* | 745 | /* |
@@ -708,6 +763,9 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
708 | * we do "generic changes." | 763 | * we do "generic changes." |
709 | */ | 764 | */ |
710 | 765 | ||
766 | /* Filter out anything that depends on CPUID levels we don't have */ | ||
767 | filter_cpuid_features(c, true); | ||
768 | |||
711 | /* If the model name is still unset, do table lookup. */ | 769 | /* If the model name is still unset, do table lookup. */ |
712 | if (!c->x86_model_id[0]) { | 770 | if (!c->x86_model_id[0]) { |
713 | char *p; | 771 | char *p; |
@@ -877,54 +935,22 @@ static __init int setup_disablecpuid(char *arg) | |||
877 | __setup("clearcpuid=", setup_disablecpuid); | 935 | __setup("clearcpuid=", setup_disablecpuid); |
878 | 936 | ||
879 | #ifdef CONFIG_X86_64 | 937 | #ifdef CONFIG_X86_64 |
880 | struct x8664_pda **_cpu_pda __read_mostly; | ||
881 | EXPORT_SYMBOL(_cpu_pda); | ||
882 | |||
883 | struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; | 938 | struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; |
884 | 939 | ||
885 | static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss; | 940 | DEFINE_PER_CPU_FIRST(union irq_stack_union, |
941 | irq_stack_union) __aligned(PAGE_SIZE); | ||
942 | DEFINE_PER_CPU(char *, irq_stack_ptr) = | ||
943 | init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64; | ||
886 | 944 | ||
887 | void __cpuinit pda_init(int cpu) | 945 | DEFINE_PER_CPU(unsigned long, kernel_stack) = |
888 | { | 946 | (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE; |
889 | struct x8664_pda *pda = cpu_pda(cpu); | 947 | EXPORT_PER_CPU_SYMBOL(kernel_stack); |
890 | 948 | ||
891 | /* Setup up data that may be needed in __get_free_pages early */ | 949 | DEFINE_PER_CPU(unsigned int, irq_count) = -1; |
892 | loadsegment(fs, 0); | ||
893 | loadsegment(gs, 0); | ||
894 | /* Memory clobbers used to order PDA accessed */ | ||
895 | mb(); | ||
896 | wrmsrl(MSR_GS_BASE, pda); | ||
897 | mb(); | ||
898 | |||
899 | pda->cpunumber = cpu; | ||
900 | pda->irqcount = -1; | ||
901 | pda->kernelstack = (unsigned long)stack_thread_info() - | ||
902 | PDA_STACKOFFSET + THREAD_SIZE; | ||
903 | pda->active_mm = &init_mm; | ||
904 | pda->mmu_state = 0; | ||
905 | |||
906 | if (cpu == 0) { | ||
907 | /* others are initialized in smpboot.c */ | ||
908 | pda->pcurrent = &init_task; | ||
909 | pda->irqstackptr = boot_cpu_stack; | ||
910 | pda->irqstackptr += IRQSTACKSIZE - 64; | ||
911 | } else { | ||
912 | if (!pda->irqstackptr) { | ||
913 | pda->irqstackptr = (char *) | ||
914 | __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER); | ||
915 | if (!pda->irqstackptr) | ||
916 | panic("cannot allocate irqstack for cpu %d", | ||
917 | cpu); | ||
918 | pda->irqstackptr += IRQSTACKSIZE - 64; | ||
919 | } | ||
920 | 950 | ||
921 | if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE) | 951 | static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks |
922 | pda->nodenumber = cpu_to_node(cpu); | 952 | [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]) |
923 | } | 953 | __aligned(PAGE_SIZE); |
924 | } | ||
925 | |||
926 | static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + | ||
927 | DEBUG_STKSZ] __page_aligned_bss; | ||
928 | 954 | ||
929 | extern asmlinkage void ignore_sysret(void); | 955 | extern asmlinkage void ignore_sysret(void); |
930 | 956 | ||
@@ -957,16 +983,21 @@ unsigned long kernel_eflags; | |||
957 | */ | 983 | */ |
958 | DEFINE_PER_CPU(struct orig_ist, orig_ist); | 984 | DEFINE_PER_CPU(struct orig_ist, orig_ist); |
959 | 985 | ||
960 | #else | 986 | #else /* x86_64 */ |
961 | 987 | ||
962 | /* Make sure %fs is initialized properly in idle threads */ | 988 | #ifdef CONFIG_CC_STACKPROTECTOR |
989 | DEFINE_PER_CPU(unsigned long, stack_canary); | ||
990 | #endif | ||
991 | |||
992 | /* Make sure %fs and %gs are initialized properly in idle threads */ | ||
963 | struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) | 993 | struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) |
964 | { | 994 | { |
965 | memset(regs, 0, sizeof(struct pt_regs)); | 995 | memset(regs, 0, sizeof(struct pt_regs)); |
966 | regs->fs = __KERNEL_PERCPU; | 996 | regs->fs = __KERNEL_PERCPU; |
997 | regs->gs = __KERNEL_STACK_CANARY; | ||
967 | return regs; | 998 | return regs; |
968 | } | 999 | } |
969 | #endif | 1000 | #endif /* x86_64 */ |
970 | 1001 | ||
971 | /* | 1002 | /* |
972 | * cpu_init() initializes state that is per-CPU. Some data is already | 1003 | * cpu_init() initializes state that is per-CPU. Some data is already |
@@ -982,15 +1013,14 @@ void __cpuinit cpu_init(void) | |||
982 | struct tss_struct *t = &per_cpu(init_tss, cpu); | 1013 | struct tss_struct *t = &per_cpu(init_tss, cpu); |
983 | struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); | 1014 | struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); |
984 | unsigned long v; | 1015 | unsigned long v; |
985 | char *estacks = NULL; | ||
986 | struct task_struct *me; | 1016 | struct task_struct *me; |
987 | int i; | 1017 | int i; |
988 | 1018 | ||
989 | /* CPU 0 is initialised in head64.c */ | 1019 | #ifdef CONFIG_NUMA |
990 | if (cpu != 0) | 1020 | if (cpu != 0 && percpu_read(node_number) == 0 && |
991 | pda_init(cpu); | 1021 | cpu_to_node(cpu) != NUMA_NO_NODE) |
992 | else | 1022 | percpu_write(node_number, cpu_to_node(cpu)); |
993 | estacks = boot_exception_stacks; | 1023 | #endif |
994 | 1024 | ||
995 | me = current; | 1025 | me = current; |
996 | 1026 | ||
@@ -1006,7 +1036,9 @@ void __cpuinit cpu_init(void) | |||
1006 | * and set up the GDT descriptor: | 1036 | * and set up the GDT descriptor: |
1007 | */ | 1037 | */ |
1008 | 1038 | ||
1009 | switch_to_new_gdt(); | 1039 | switch_to_new_gdt(cpu); |
1040 | loadsegment(fs, 0); | ||
1041 | |||
1010 | load_idt((const struct desc_ptr *)&idt_descr); | 1042 | load_idt((const struct desc_ptr *)&idt_descr); |
1011 | 1043 | ||
1012 | memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); | 1044 | memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); |
@@ -1017,25 +1049,20 @@ void __cpuinit cpu_init(void) | |||
1017 | barrier(); | 1049 | barrier(); |
1018 | 1050 | ||
1019 | check_efer(); | 1051 | check_efer(); |
1020 | if (cpu != 0 && x2apic) | 1052 | if (cpu != 0) |
1021 | enable_x2apic(); | 1053 | enable_x2apic(); |
1022 | 1054 | ||
1023 | /* | 1055 | /* |
1024 | * set up and load the per-CPU TSS | 1056 | * set up and load the per-CPU TSS |
1025 | */ | 1057 | */ |
1026 | if (!orig_ist->ist[0]) { | 1058 | if (!orig_ist->ist[0]) { |
1027 | static const unsigned int order[N_EXCEPTION_STACKS] = { | 1059 | static const unsigned int sizes[N_EXCEPTION_STACKS] = { |
1028 | [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER, | 1060 | [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ, |
1029 | [DEBUG_STACK - 1] = DEBUG_STACK_ORDER | 1061 | [DEBUG_STACK - 1] = DEBUG_STKSZ |
1030 | }; | 1062 | }; |
1063 | char *estacks = per_cpu(exception_stacks, cpu); | ||
1031 | for (v = 0; v < N_EXCEPTION_STACKS; v++) { | 1064 | for (v = 0; v < N_EXCEPTION_STACKS; v++) { |
1032 | if (cpu) { | 1065 | estacks += sizes[v]; |
1033 | estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]); | ||
1034 | if (!estacks) | ||
1035 | panic("Cannot allocate exception " | ||
1036 | "stack %ld %d\n", v, cpu); | ||
1037 | } | ||
1038 | estacks += PAGE_SIZE << order[v]; | ||
1039 | orig_ist->ist[v] = t->x86_tss.ist[v] = | 1066 | orig_ist->ist[v] = t->x86_tss.ist[v] = |
1040 | (unsigned long)estacks; | 1067 | (unsigned long)estacks; |
1041 | } | 1068 | } |
@@ -1069,22 +1096,19 @@ void __cpuinit cpu_init(void) | |||
1069 | */ | 1096 | */ |
1070 | if (kgdb_connected && arch_kgdb_ops.correct_hw_break) | 1097 | if (kgdb_connected && arch_kgdb_ops.correct_hw_break) |
1071 | arch_kgdb_ops.correct_hw_break(); | 1098 | arch_kgdb_ops.correct_hw_break(); |
1072 | else { | 1099 | else |
1073 | #endif | 1100 | #endif |
1074 | /* | 1101 | { |
1075 | * Clear all 6 debug registers: | 1102 | /* |
1076 | */ | 1103 | * Clear all 6 debug registers: |
1077 | 1104 | */ | |
1078 | set_debugreg(0UL, 0); | 1105 | set_debugreg(0UL, 0); |
1079 | set_debugreg(0UL, 1); | 1106 | set_debugreg(0UL, 1); |
1080 | set_debugreg(0UL, 2); | 1107 | set_debugreg(0UL, 2); |
1081 | set_debugreg(0UL, 3); | 1108 | set_debugreg(0UL, 3); |
1082 | set_debugreg(0UL, 6); | 1109 | set_debugreg(0UL, 6); |
1083 | set_debugreg(0UL, 7); | 1110 | set_debugreg(0UL, 7); |
1084 | #ifdef CONFIG_KGDB | ||
1085 | /* If the kgdb is connected no debug regs should be altered. */ | ||
1086 | } | 1111 | } |
1087 | #endif | ||
1088 | 1112 | ||
1089 | fpu_init(); | 1113 | fpu_init(); |
1090 | 1114 | ||
@@ -1114,7 +1138,7 @@ void __cpuinit cpu_init(void) | |||
1114 | clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); | 1138 | clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); |
1115 | 1139 | ||
1116 | load_idt(&idt_descr); | 1140 | load_idt(&idt_descr); |
1117 | switch_to_new_gdt(); | 1141 | switch_to_new_gdt(cpu); |
1118 | 1142 | ||
1119 | /* | 1143 | /* |
1120 | * Set up and load the per-CPU TSS and LDT | 1144 | * Set up and load the per-CPU TSS and LDT |
@@ -1135,9 +1159,6 @@ void __cpuinit cpu_init(void) | |||
1135 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); | 1159 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); |
1136 | #endif | 1160 | #endif |
1137 | 1161 | ||
1138 | /* Clear %gs. */ | ||
1139 | asm volatile ("mov %0, %%gs" : : "r" (0)); | ||
1140 | |||
1141 | /* Clear all 6 debug registers: */ | 1162 | /* Clear all 6 debug registers: */ |
1142 | set_debugreg(0, 0); | 1163 | set_debugreg(0, 0); |
1143 | set_debugreg(0, 1); | 1164 | set_debugreg(0, 1); |
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c index 3babe1f1e912..23da96e57b17 100644 --- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c | |||
@@ -601,7 +601,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) | |||
601 | if (!data) | 601 | if (!data) |
602 | return -ENOMEM; | 602 | return -ENOMEM; |
603 | 603 | ||
604 | data->acpi_data = percpu_ptr(acpi_perf_data, cpu); | 604 | data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu); |
605 | per_cpu(drv_data, cpu) = data; | 605 | per_cpu(drv_data, cpu) = data; |
606 | 606 | ||
607 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) | 607 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
diff --git a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c index 3f83ea12c47a..35a257dd4bb7 100644 --- a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c +++ b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c | |||
@@ -204,12 +204,12 @@ static int eps_cpu_init(struct cpufreq_policy *policy) | |||
204 | } | 204 | } |
205 | /* Enable Enhanced PowerSaver */ | 205 | /* Enable Enhanced PowerSaver */ |
206 | rdmsrl(MSR_IA32_MISC_ENABLE, val); | 206 | rdmsrl(MSR_IA32_MISC_ENABLE, val); |
207 | if (!(val & 1 << 16)) { | 207 | if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) { |
208 | val |= 1 << 16; | 208 | val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP; |
209 | wrmsrl(MSR_IA32_MISC_ENABLE, val); | 209 | wrmsrl(MSR_IA32_MISC_ENABLE, val); |
210 | /* Can be locked at 0 */ | 210 | /* Can be locked at 0 */ |
211 | rdmsrl(MSR_IA32_MISC_ENABLE, val); | 211 | rdmsrl(MSR_IA32_MISC_ENABLE, val); |
212 | if (!(val & 1 << 16)) { | 212 | if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) { |
213 | printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n"); | 213 | printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n"); |
214 | return -ENODEV; | 214 | return -ENODEV; |
215 | } | 215 | } |
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c index f08998278a3a..c9f1fdc02830 100644 --- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c +++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c | |||
@@ -390,14 +390,14 @@ static int centrino_cpu_init(struct cpufreq_policy *policy) | |||
390 | enable it if not. */ | 390 | enable it if not. */ |
391 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); | 391 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
392 | 392 | ||
393 | if (!(l & (1<<16))) { | 393 | if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) { |
394 | l |= (1<<16); | 394 | l |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP; |
395 | dprintk("trying to enable Enhanced SpeedStep (%x)\n", l); | 395 | dprintk("trying to enable Enhanced SpeedStep (%x)\n", l); |
396 | wrmsr(MSR_IA32_MISC_ENABLE, l, h); | 396 | wrmsr(MSR_IA32_MISC_ENABLE, l, h); |
397 | 397 | ||
398 | /* check to see if it stuck */ | 398 | /* check to see if it stuck */ |
399 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); | 399 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
400 | if (!(l & (1<<16))) { | 400 | if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) { |
401 | printk(KERN_INFO PFX | 401 | printk(KERN_INFO PFX |
402 | "couldn't enable Enhanced SpeedStep\n"); | 402 | "couldn't enable Enhanced SpeedStep\n"); |
403 | return -ENODEV; | 403 | return -ENODEV; |
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 5fff00c70de0..1a89a2b68d15 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #ifdef CONFIG_X86_LOCAL_APIC | 25 | #ifdef CONFIG_X86_LOCAL_APIC |
26 | #include <asm/mpspec.h> | 26 | #include <asm/mpspec.h> |
27 | #include <asm/apic.h> | 27 | #include <asm/apic.h> |
28 | #include <mach_apic.h> | ||
29 | #endif | 28 | #endif |
30 | 29 | ||
31 | static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) | 30 | static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) |
@@ -69,6 +68,18 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) | |||
69 | sched_clock_stable = 1; | 68 | sched_clock_stable = 1; |
70 | } | 69 | } |
71 | 70 | ||
71 | /* | ||
72 | * There is a known erratum on Pentium III and Core Solo | ||
73 | * and Core Duo CPUs. | ||
74 | * " Page with PAT set to WC while associated MTRR is UC | ||
75 | * may consolidate to UC " | ||
76 | * Because of this erratum, it is better to stick with | ||
77 | * setting WC in MTRR rather than using PAT on these CPUs. | ||
78 | * | ||
79 | * Enable PAT WC only on P4, Core 2 or later CPUs. | ||
80 | */ | ||
81 | if (c->x86 == 6 && c->x86_model < 15) | ||
82 | clear_cpu_cap(c, X86_FEATURE_PAT); | ||
72 | } | 83 | } |
73 | 84 | ||
74 | #ifdef CONFIG_X86_32 | 85 | #ifdef CONFIG_X86_32 |
@@ -141,10 +152,10 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c) | |||
141 | */ | 152 | */ |
142 | if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) { | 153 | if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) { |
143 | rdmsr(MSR_IA32_MISC_ENABLE, lo, hi); | 154 | rdmsr(MSR_IA32_MISC_ENABLE, lo, hi); |
144 | if ((lo & (1<<9)) == 0) { | 155 | if ((lo & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE) == 0) { |
145 | printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n"); | 156 | printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n"); |
146 | printk (KERN_INFO "CPU: Disabling hardware prefetching (Errata 037)\n"); | 157 | printk (KERN_INFO "CPU: Disabling hardware prefetching (Errata 037)\n"); |
147 | lo |= (1<<9); /* Disable hw prefetching */ | 158 | lo |= MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE; |
148 | wrmsr (MSR_IA32_MISC_ENABLE, lo, hi); | 159 | wrmsr (MSR_IA32_MISC_ENABLE, lo, hi); |
149 | } | 160 | } |
150 | } | 161 | } |
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index da299eb85fc0..7293508d8f5c 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c | |||
@@ -147,7 +147,16 @@ struct _cpuid4_info { | |||
147 | union _cpuid4_leaf_ecx ecx; | 147 | union _cpuid4_leaf_ecx ecx; |
148 | unsigned long size; | 148 | unsigned long size; |
149 | unsigned long can_disable; | 149 | unsigned long can_disable; |
150 | cpumask_t shared_cpu_map; /* future?: only cpus/node is needed */ | 150 | DECLARE_BITMAP(shared_cpu_map, NR_CPUS); |
151 | }; | ||
152 | |||
153 | /* subset of above _cpuid4_info w/o shared_cpu_map */ | ||
154 | struct _cpuid4_info_regs { | ||
155 | union _cpuid4_leaf_eax eax; | ||
156 | union _cpuid4_leaf_ebx ebx; | ||
157 | union _cpuid4_leaf_ecx ecx; | ||
158 | unsigned long size; | ||
159 | unsigned long can_disable; | ||
151 | }; | 160 | }; |
152 | 161 | ||
153 | #ifdef CONFIG_PCI | 162 | #ifdef CONFIG_PCI |
@@ -278,7 +287,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, | |||
278 | } | 287 | } |
279 | 288 | ||
280 | static void __cpuinit | 289 | static void __cpuinit |
281 | amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf) | 290 | amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf) |
282 | { | 291 | { |
283 | if (index < 3) | 292 | if (index < 3) |
284 | return; | 293 | return; |
@@ -286,7 +295,8 @@ amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf) | |||
286 | } | 295 | } |
287 | 296 | ||
288 | static int | 297 | static int |
289 | __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf) | 298 | __cpuinit cpuid4_cache_lookup_regs(int index, |
299 | struct _cpuid4_info_regs *this_leaf) | ||
290 | { | 300 | { |
291 | union _cpuid4_leaf_eax eax; | 301 | union _cpuid4_leaf_eax eax; |
292 | union _cpuid4_leaf_ebx ebx; | 302 | union _cpuid4_leaf_ebx ebx; |
@@ -314,6 +324,15 @@ __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf) | |||
314 | return 0; | 324 | return 0; |
315 | } | 325 | } |
316 | 326 | ||
327 | static int | ||
328 | __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf) | ||
329 | { | ||
330 | struct _cpuid4_info_regs *leaf_regs = | ||
331 | (struct _cpuid4_info_regs *)this_leaf; | ||
332 | |||
333 | return cpuid4_cache_lookup_regs(index, leaf_regs); | ||
334 | } | ||
335 | |||
317 | static int __cpuinit find_num_cache_leaves(void) | 336 | static int __cpuinit find_num_cache_leaves(void) |
318 | { | 337 | { |
319 | unsigned int eax, ebx, ecx, edx; | 338 | unsigned int eax, ebx, ecx, edx; |
@@ -353,11 +372,10 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c) | |||
353 | * parameters cpuid leaf to find the cache details | 372 | * parameters cpuid leaf to find the cache details |
354 | */ | 373 | */ |
355 | for (i = 0; i < num_cache_leaves; i++) { | 374 | for (i = 0; i < num_cache_leaves; i++) { |
356 | struct _cpuid4_info this_leaf; | 375 | struct _cpuid4_info_regs this_leaf; |
357 | |||
358 | int retval; | 376 | int retval; |
359 | 377 | ||
360 | retval = cpuid4_cache_lookup(i, &this_leaf); | 378 | retval = cpuid4_cache_lookup_regs(i, &this_leaf); |
361 | if (retval >= 0) { | 379 | if (retval >= 0) { |
362 | switch(this_leaf.eax.split.level) { | 380 | switch(this_leaf.eax.split.level) { |
363 | case 1: | 381 | case 1: |
@@ -506,17 +524,20 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index) | |||
506 | num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing; | 524 | num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing; |
507 | 525 | ||
508 | if (num_threads_sharing == 1) | 526 | if (num_threads_sharing == 1) |
509 | cpu_set(cpu, this_leaf->shared_cpu_map); | 527 | cpumask_set_cpu(cpu, to_cpumask(this_leaf->shared_cpu_map)); |
510 | else { | 528 | else { |
511 | index_msb = get_count_order(num_threads_sharing); | 529 | index_msb = get_count_order(num_threads_sharing); |
512 | 530 | ||
513 | for_each_online_cpu(i) { | 531 | for_each_online_cpu(i) { |
514 | if (cpu_data(i).apicid >> index_msb == | 532 | if (cpu_data(i).apicid >> index_msb == |
515 | c->apicid >> index_msb) { | 533 | c->apicid >> index_msb) { |
516 | cpu_set(i, this_leaf->shared_cpu_map); | 534 | cpumask_set_cpu(i, |
535 | to_cpumask(this_leaf->shared_cpu_map)); | ||
517 | if (i != cpu && per_cpu(cpuid4_info, i)) { | 536 | if (i != cpu && per_cpu(cpuid4_info, i)) { |
518 | sibling_leaf = CPUID4_INFO_IDX(i, index); | 537 | sibling_leaf = |
519 | cpu_set(cpu, sibling_leaf->shared_cpu_map); | 538 | CPUID4_INFO_IDX(i, index); |
539 | cpumask_set_cpu(cpu, to_cpumask( | ||
540 | sibling_leaf->shared_cpu_map)); | ||
520 | } | 541 | } |
521 | } | 542 | } |
522 | } | 543 | } |
@@ -528,9 +549,10 @@ static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index) | |||
528 | int sibling; | 549 | int sibling; |
529 | 550 | ||
530 | this_leaf = CPUID4_INFO_IDX(cpu, index); | 551 | this_leaf = CPUID4_INFO_IDX(cpu, index); |
531 | for_each_cpu_mask_nr(sibling, this_leaf->shared_cpu_map) { | 552 | for_each_cpu(sibling, to_cpumask(this_leaf->shared_cpu_map)) { |
532 | sibling_leaf = CPUID4_INFO_IDX(sibling, index); | 553 | sibling_leaf = CPUID4_INFO_IDX(sibling, index); |
533 | cpu_clear(cpu, sibling_leaf->shared_cpu_map); | 554 | cpumask_clear_cpu(cpu, |
555 | to_cpumask(sibling_leaf->shared_cpu_map)); | ||
534 | } | 556 | } |
535 | } | 557 | } |
536 | #else | 558 | #else |
@@ -635,8 +657,9 @@ static ssize_t show_shared_cpu_map_func(struct _cpuid4_info *this_leaf, | |||
635 | int n = 0; | 657 | int n = 0; |
636 | 658 | ||
637 | if (len > 1) { | 659 | if (len > 1) { |
638 | cpumask_t *mask = &this_leaf->shared_cpu_map; | 660 | const struct cpumask *mask; |
639 | 661 | ||
662 | mask = to_cpumask(this_leaf->shared_cpu_map); | ||
640 | n = type? | 663 | n = type? |
641 | cpulist_scnprintf(buf, len-2, mask) : | 664 | cpulist_scnprintf(buf, len-2, mask) : |
642 | cpumask_scnprintf(buf, len-2, mask); | 665 | cpumask_scnprintf(buf, len-2, mask); |
@@ -699,7 +722,8 @@ static struct pci_dev *get_k8_northbridge(int node) | |||
699 | 722 | ||
700 | static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) | 723 | static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) |
701 | { | 724 | { |
702 | int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map)); | 725 | const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map); |
726 | int node = cpu_to_node(cpumask_first(mask)); | ||
703 | struct pci_dev *dev = NULL; | 727 | struct pci_dev *dev = NULL; |
704 | ssize_t ret = 0; | 728 | ssize_t ret = 0; |
705 | int i; | 729 | int i; |
@@ -733,7 +757,8 @@ static ssize_t | |||
733 | store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf, | 757 | store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf, |
734 | size_t count) | 758 | size_t count) |
735 | { | 759 | { |
736 | int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map)); | 760 | const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map); |
761 | int node = cpu_to_node(cpumask_first(mask)); | ||
737 | struct pci_dev *dev = NULL; | 762 | struct pci_dev *dev = NULL; |
738 | unsigned int ret, index, val; | 763 | unsigned int ret, index, val; |
739 | 764 | ||
@@ -878,7 +903,7 @@ err_out: | |||
878 | return -ENOMEM; | 903 | return -ENOMEM; |
879 | } | 904 | } |
880 | 905 | ||
881 | static cpumask_t cache_dev_map = CPU_MASK_NONE; | 906 | static DECLARE_BITMAP(cache_dev_map, NR_CPUS); |
882 | 907 | ||
883 | /* Add/Remove cache interface for CPU device */ | 908 | /* Add/Remove cache interface for CPU device */ |
884 | static int __cpuinit cache_add_dev(struct sys_device * sys_dev) | 909 | static int __cpuinit cache_add_dev(struct sys_device * sys_dev) |
@@ -918,7 +943,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev) | |||
918 | } | 943 | } |
919 | kobject_uevent(&(this_object->kobj), KOBJ_ADD); | 944 | kobject_uevent(&(this_object->kobj), KOBJ_ADD); |
920 | } | 945 | } |
921 | cpu_set(cpu, cache_dev_map); | 946 | cpumask_set_cpu(cpu, to_cpumask(cache_dev_map)); |
922 | 947 | ||
923 | kobject_uevent(per_cpu(cache_kobject, cpu), KOBJ_ADD); | 948 | kobject_uevent(per_cpu(cache_kobject, cpu), KOBJ_ADD); |
924 | return 0; | 949 | return 0; |
@@ -931,9 +956,9 @@ static void __cpuinit cache_remove_dev(struct sys_device * sys_dev) | |||
931 | 956 | ||
932 | if (per_cpu(cpuid4_info, cpu) == NULL) | 957 | if (per_cpu(cpuid4_info, cpu) == NULL) |
933 | return; | 958 | return; |
934 | if (!cpu_isset(cpu, cache_dev_map)) | 959 | if (!cpumask_test_cpu(cpu, to_cpumask(cache_dev_map))) |
935 | return; | 960 | return; |
936 | cpu_clear(cpu, cache_dev_map); | 961 | cpumask_clear_cpu(cpu, to_cpumask(cache_dev_map)); |
937 | 962 | ||
938 | for (i = 0; i < num_cache_leaves; i++) | 963 | for (i = 0; i < num_cache_leaves; i++) |
939 | kobject_put(&(INDEX_KOBJECT_PTR(cpu,i)->kobj)); | 964 | kobject_put(&(INDEX_KOBJECT_PTR(cpu,i)->kobj)); |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c index f2ee0ae29bd6..9817506dd469 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c | |||
@@ -67,7 +67,7 @@ static struct threshold_block threshold_defaults = { | |||
67 | struct threshold_bank { | 67 | struct threshold_bank { |
68 | struct kobject *kobj; | 68 | struct kobject *kobj; |
69 | struct threshold_block *blocks; | 69 | struct threshold_block *blocks; |
70 | cpumask_t cpus; | 70 | cpumask_var_t cpus; |
71 | }; | 71 | }; |
72 | static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]); | 72 | static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]); |
73 | 73 | ||
@@ -481,7 +481,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) | |||
481 | 481 | ||
482 | #ifdef CONFIG_SMP | 482 | #ifdef CONFIG_SMP |
483 | if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */ | 483 | if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */ |
484 | i = first_cpu(per_cpu(cpu_core_map, cpu)); | 484 | i = cpumask_first(&per_cpu(cpu_core_map, cpu)); |
485 | 485 | ||
486 | /* first core not up yet */ | 486 | /* first core not up yet */ |
487 | if (cpu_data(i).cpu_core_id) | 487 | if (cpu_data(i).cpu_core_id) |
@@ -501,7 +501,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) | |||
501 | if (err) | 501 | if (err) |
502 | goto out; | 502 | goto out; |
503 | 503 | ||
504 | b->cpus = per_cpu(cpu_core_map, cpu); | 504 | cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu)); |
505 | per_cpu(threshold_banks, cpu)[bank] = b; | 505 | per_cpu(threshold_banks, cpu)[bank] = b; |
506 | goto out; | 506 | goto out; |
507 | } | 507 | } |
@@ -512,15 +512,20 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) | |||
512 | err = -ENOMEM; | 512 | err = -ENOMEM; |
513 | goto out; | 513 | goto out; |
514 | } | 514 | } |
515 | if (!alloc_cpumask_var(&b->cpus, GFP_KERNEL)) { | ||
516 | kfree(b); | ||
517 | err = -ENOMEM; | ||
518 | goto out; | ||
519 | } | ||
515 | 520 | ||
516 | b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj); | 521 | b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj); |
517 | if (!b->kobj) | 522 | if (!b->kobj) |
518 | goto out_free; | 523 | goto out_free; |
519 | 524 | ||
520 | #ifndef CONFIG_SMP | 525 | #ifndef CONFIG_SMP |
521 | b->cpus = CPU_MASK_ALL; | 526 | cpumask_setall(b->cpus); |
522 | #else | 527 | #else |
523 | b->cpus = per_cpu(cpu_core_map, cpu); | 528 | cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu)); |
524 | #endif | 529 | #endif |
525 | 530 | ||
526 | per_cpu(threshold_banks, cpu)[bank] = b; | 531 | per_cpu(threshold_banks, cpu)[bank] = b; |
@@ -529,7 +534,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) | |||
529 | if (err) | 534 | if (err) |
530 | goto out_free; | 535 | goto out_free; |
531 | 536 | ||
532 | for_each_cpu_mask_nr(i, b->cpus) { | 537 | for_each_cpu(i, b->cpus) { |
533 | if (i == cpu) | 538 | if (i == cpu) |
534 | continue; | 539 | continue; |
535 | 540 | ||
@@ -545,6 +550,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) | |||
545 | 550 | ||
546 | out_free: | 551 | out_free: |
547 | per_cpu(threshold_banks, cpu)[bank] = NULL; | 552 | per_cpu(threshold_banks, cpu)[bank] = NULL; |
553 | free_cpumask_var(b->cpus); | ||
548 | kfree(b); | 554 | kfree(b); |
549 | out: | 555 | out: |
550 | return err; | 556 | return err; |
@@ -619,7 +625,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank) | |||
619 | #endif | 625 | #endif |
620 | 626 | ||
621 | /* remove all sibling symlinks before unregistering */ | 627 | /* remove all sibling symlinks before unregistering */ |
622 | for_each_cpu_mask_nr(i, b->cpus) { | 628 | for_each_cpu(i, b->cpus) { |
623 | if (i == cpu) | 629 | if (i == cpu) |
624 | continue; | 630 | continue; |
625 | 631 | ||
@@ -632,6 +638,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank) | |||
632 | free_out: | 638 | free_out: |
633 | kobject_del(b->kobj); | 639 | kobject_del(b->kobj); |
634 | kobject_put(b->kobj); | 640 | kobject_put(b->kobj); |
641 | free_cpumask_var(b->cpus); | ||
635 | kfree(b); | 642 | kfree(b); |
636 | per_cpu(threshold_banks, cpu)[bank] = NULL; | 643 | per_cpu(threshold_banks, cpu)[bank] = NULL; |
637 | } | 644 | } |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c index f44c36624360..aa5e287c98e0 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c | |||
@@ -7,6 +7,7 @@ | |||
7 | #include <linux/interrupt.h> | 7 | #include <linux/interrupt.h> |
8 | #include <linux/percpu.h> | 8 | #include <linux/percpu.h> |
9 | #include <asm/processor.h> | 9 | #include <asm/processor.h> |
10 | #include <asm/apic.h> | ||
10 | #include <asm/msr.h> | 11 | #include <asm/msr.h> |
11 | #include <asm/mce.h> | 12 | #include <asm/mce.h> |
12 | #include <asm/hw_irq.h> | 13 | #include <asm/hw_irq.h> |
@@ -48,13 +49,13 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) | |||
48 | */ | 49 | */ |
49 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); | 50 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
50 | h = apic_read(APIC_LVTTHMR); | 51 | h = apic_read(APIC_LVTTHMR); |
51 | if ((l & (1 << 3)) && (h & APIC_DM_SMI)) { | 52 | if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { |
52 | printk(KERN_DEBUG | 53 | printk(KERN_DEBUG |
53 | "CPU%d: Thermal monitoring handled by SMI\n", cpu); | 54 | "CPU%d: Thermal monitoring handled by SMI\n", cpu); |
54 | return; | 55 | return; |
55 | } | 56 | } |
56 | 57 | ||
57 | if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13))) | 58 | if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2)) |
58 | tm2 = 1; | 59 | tm2 = 1; |
59 | 60 | ||
60 | if (h & APIC_VECTOR_MASK) { | 61 | if (h & APIC_VECTOR_MASK) { |
@@ -72,7 +73,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) | |||
72 | wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h); | 73 | wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h); |
73 | 74 | ||
74 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); | 75 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
75 | wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h); | 76 | wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); |
76 | 77 | ||
77 | l = apic_read(APIC_LVTTHMR); | 78 | l = apic_read(APIC_LVTTHMR); |
78 | apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); | 79 | apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); |
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c index 9b60fce09f75..f53bdcbaf382 100644 --- a/arch/x86/kernel/cpu/mcheck/p4.c +++ b/arch/x86/kernel/cpu/mcheck/p4.c | |||
@@ -85,7 +85,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) | |||
85 | */ | 85 | */ |
86 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); | 86 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
87 | h = apic_read(APIC_LVTTHMR); | 87 | h = apic_read(APIC_LVTTHMR); |
88 | if ((l & (1<<3)) && (h & APIC_DM_SMI)) { | 88 | if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { |
89 | printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n", | 89 | printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n", |
90 | cpu); | 90 | cpu); |
91 | return; /* -EBUSY */ | 91 | return; /* -EBUSY */ |
@@ -111,7 +111,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) | |||
111 | vendor_thermal_interrupt = intel_thermal_interrupt; | 111 | vendor_thermal_interrupt = intel_thermal_interrupt; |
112 | 112 | ||
113 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); | 113 | rdmsr(MSR_IA32_MISC_ENABLE, l, h); |
114 | wrmsr(MSR_IA32_MISC_ENABLE, l | (1<<3), h); | 114 | wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); |
115 | 115 | ||
116 | l = apic_read(APIC_LVTTHMR); | 116 | l = apic_read(APIC_LVTTHMR); |
117 | apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); | 117 | apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); |
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c index 9abd48b22674..f6c70a164e32 100644 --- a/arch/x86/kernel/cpu/perfctr-watchdog.c +++ b/arch/x86/kernel/cpu/perfctr-watchdog.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/nmi.h> | 19 | #include <linux/nmi.h> |
20 | #include <linux/kprobes.h> | 20 | #include <linux/kprobes.h> |
21 | 21 | ||
22 | #include <asm/apic.h> | 22 | #include <asm/genapic.h> |
23 | #include <asm/intel_arch_perfmon.h> | 23 | #include <asm/intel_arch_perfmon.h> |
24 | 24 | ||
25 | struct nmi_watchdog_ctlblk { | 25 | struct nmi_watchdog_ctlblk { |
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c index 01b1244ef1c0..d67e0e48bc2d 100644 --- a/arch/x86/kernel/cpu/proc.c +++ b/arch/x86/kernel/cpu/proc.c | |||
@@ -7,11 +7,10 @@ | |||
7 | /* | 7 | /* |
8 | * Get CPU information for use by the procfs. | 8 | * Get CPU information for use by the procfs. |
9 | */ | 9 | */ |
10 | #ifdef CONFIG_X86_32 | ||
11 | static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, | 10 | static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, |
12 | unsigned int cpu) | 11 | unsigned int cpu) |
13 | { | 12 | { |
14 | #ifdef CONFIG_X86_HT | 13 | #ifdef CONFIG_SMP |
15 | if (c->x86_max_cores * smp_num_siblings > 1) { | 14 | if (c->x86_max_cores * smp_num_siblings > 1) { |
16 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); | 15 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); |
17 | seq_printf(m, "siblings\t: %d\n", | 16 | seq_printf(m, "siblings\t: %d\n", |
@@ -24,6 +23,7 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, | |||
24 | #endif | 23 | #endif |
25 | } | 24 | } |
26 | 25 | ||
26 | #ifdef CONFIG_X86_32 | ||
27 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) | 27 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) |
28 | { | 28 | { |
29 | /* | 29 | /* |
@@ -50,22 +50,6 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) | |||
50 | c->wp_works_ok ? "yes" : "no"); | 50 | c->wp_works_ok ? "yes" : "no"); |
51 | } | 51 | } |
52 | #else | 52 | #else |
53 | static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, | ||
54 | unsigned int cpu) | ||
55 | { | ||
56 | #ifdef CONFIG_SMP | ||
57 | if (c->x86_max_cores * smp_num_siblings > 1) { | ||
58 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); | ||
59 | seq_printf(m, "siblings\t: %d\n", | ||
60 | cpus_weight(per_cpu(cpu_core_map, cpu))); | ||
61 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); | ||
62 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); | ||
63 | seq_printf(m, "apicid\t\t: %d\n", c->apicid); | ||
64 | seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid); | ||
65 | } | ||
66 | #endif | ||
67 | } | ||
68 | |||
69 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) | 53 | static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) |
70 | { | 54 | { |
71 | seq_printf(m, | 55 | seq_printf(m, |
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c index c689d19e35ab..ff958248e61d 100644 --- a/arch/x86/kernel/crash.c +++ b/arch/x86/kernel/crash.c | |||
@@ -24,12 +24,10 @@ | |||
24 | #include <asm/apic.h> | 24 | #include <asm/apic.h> |
25 | #include <asm/hpet.h> | 25 | #include <asm/hpet.h> |
26 | #include <linux/kdebug.h> | 26 | #include <linux/kdebug.h> |
27 | #include <asm/smp.h> | 27 | #include <asm/cpu.h> |
28 | #include <asm/reboot.h> | 28 | #include <asm/reboot.h> |
29 | #include <asm/virtext.h> | 29 | #include <asm/virtext.h> |
30 | 30 | ||
31 | #include <mach_ipi.h> | ||
32 | |||
33 | 31 | ||
34 | #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC) | 32 | #if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC) |
35 | 33 | ||
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c index 6b1f6f6f8661..87d103ded1c3 100644 --- a/arch/x86/kernel/dumpstack.c +++ b/arch/x86/kernel/dumpstack.c | |||
@@ -99,7 +99,7 @@ print_context_stack(struct thread_info *tinfo, | |||
99 | frame = frame->next_frame; | 99 | frame = frame->next_frame; |
100 | bp = (unsigned long) frame; | 100 | bp = (unsigned long) frame; |
101 | } else { | 101 | } else { |
102 | ops->address(data, addr, bp == 0); | 102 | ops->address(data, addr, 0); |
103 | } | 103 | } |
104 | print_ftrace_graph_addr(addr, data, ops, tinfo, graph); | 104 | print_ftrace_graph_addr(addr, data, ops, tinfo, graph); |
105 | } | 105 | } |
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c index c302d0707048..d35db5993fd6 100644 --- a/arch/x86/kernel/dumpstack_64.c +++ b/arch/x86/kernel/dumpstack_64.c | |||
@@ -106,7 +106,8 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs, | |||
106 | const struct stacktrace_ops *ops, void *data) | 106 | const struct stacktrace_ops *ops, void *data) |
107 | { | 107 | { |
108 | const unsigned cpu = get_cpu(); | 108 | const unsigned cpu = get_cpu(); |
109 | unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr; | 109 | unsigned long *irq_stack_end = |
110 | (unsigned long *)per_cpu(irq_stack_ptr, cpu); | ||
110 | unsigned used = 0; | 111 | unsigned used = 0; |
111 | struct thread_info *tinfo; | 112 | struct thread_info *tinfo; |
112 | int graph = 0; | 113 | int graph = 0; |
@@ -160,23 +161,23 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs, | |||
160 | stack = (unsigned long *) estack_end[-2]; | 161 | stack = (unsigned long *) estack_end[-2]; |
161 | continue; | 162 | continue; |
162 | } | 163 | } |
163 | if (irqstack_end) { | 164 | if (irq_stack_end) { |
164 | unsigned long *irqstack; | 165 | unsigned long *irq_stack; |
165 | irqstack = irqstack_end - | 166 | irq_stack = irq_stack_end - |
166 | (IRQSTACKSIZE - 64) / sizeof(*irqstack); | 167 | (IRQ_STACK_SIZE - 64) / sizeof(*irq_stack); |
167 | 168 | ||
168 | if (stack >= irqstack && stack < irqstack_end) { | 169 | if (stack >= irq_stack && stack < irq_stack_end) { |
169 | if (ops->stack(data, "IRQ") < 0) | 170 | if (ops->stack(data, "IRQ") < 0) |
170 | break; | 171 | break; |
171 | bp = print_context_stack(tinfo, stack, bp, | 172 | bp = print_context_stack(tinfo, stack, bp, |
172 | ops, data, irqstack_end, &graph); | 173 | ops, data, irq_stack_end, &graph); |
173 | /* | 174 | /* |
174 | * We link to the next stack (which would be | 175 | * We link to the next stack (which would be |
175 | * the process stack normally) the last | 176 | * the process stack normally) the last |
176 | * pointer (index -1 to end) in the IRQ stack: | 177 | * pointer (index -1 to end) in the IRQ stack: |
177 | */ | 178 | */ |
178 | stack = (unsigned long *) (irqstack_end[-1]); | 179 | stack = (unsigned long *) (irq_stack_end[-1]); |
179 | irqstack_end = NULL; | 180 | irq_stack_end = NULL; |
180 | ops->stack(data, "EOI"); | 181 | ops->stack(data, "EOI"); |
181 | continue; | 182 | continue; |
182 | } | 183 | } |
@@ -199,10 +200,10 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs, | |||
199 | unsigned long *stack; | 200 | unsigned long *stack; |
200 | int i; | 201 | int i; |
201 | const int cpu = smp_processor_id(); | 202 | const int cpu = smp_processor_id(); |
202 | unsigned long *irqstack_end = | 203 | unsigned long *irq_stack_end = |
203 | (unsigned long *) (cpu_pda(cpu)->irqstackptr); | 204 | (unsigned long *)(per_cpu(irq_stack_ptr, cpu)); |
204 | unsigned long *irqstack = | 205 | unsigned long *irq_stack = |
205 | (unsigned long *) (cpu_pda(cpu)->irqstackptr - IRQSTACKSIZE); | 206 | (unsigned long *)(per_cpu(irq_stack_ptr, cpu) - IRQ_STACK_SIZE); |
206 | 207 | ||
207 | /* | 208 | /* |
208 | * debugging aid: "show_stack(NULL, NULL);" prints the | 209 | * debugging aid: "show_stack(NULL, NULL);" prints the |
@@ -218,9 +219,9 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs, | |||
218 | 219 | ||
219 | stack = sp; | 220 | stack = sp; |
220 | for (i = 0; i < kstack_depth_to_print; i++) { | 221 | for (i = 0; i < kstack_depth_to_print; i++) { |
221 | if (stack >= irqstack && stack <= irqstack_end) { | 222 | if (stack >= irq_stack && stack <= irq_stack_end) { |
222 | if (stack == irqstack_end) { | 223 | if (stack == irq_stack_end) { |
223 | stack = (unsigned long *) (irqstack_end[-1]); | 224 | stack = (unsigned long *) (irq_stack_end[-1]); |
224 | printk(" <EOI> "); | 225 | printk(" <EOI> "); |
225 | } | 226 | } |
226 | } else { | 227 | } else { |
@@ -241,7 +242,7 @@ void show_registers(struct pt_regs *regs) | |||
241 | int i; | 242 | int i; |
242 | unsigned long sp; | 243 | unsigned long sp; |
243 | const int cpu = smp_processor_id(); | 244 | const int cpu = smp_processor_id(); |
244 | struct task_struct *cur = cpu_pda(cpu)->pcurrent; | 245 | struct task_struct *cur = current; |
245 | 246 | ||
246 | sp = regs->sp; | 247 | sp = regs->sp; |
247 | printk("CPU %d ", cpu); | 248 | printk("CPU %d ", cpu); |
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index e85826829cf2..508bec1cee27 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c | |||
@@ -858,6 +858,9 @@ void __init reserve_early_overlap_ok(u64 start, u64 end, char *name) | |||
858 | */ | 858 | */ |
859 | void __init reserve_early(u64 start, u64 end, char *name) | 859 | void __init reserve_early(u64 start, u64 end, char *name) |
860 | { | 860 | { |
861 | if (start >= end) | ||
862 | return; | ||
863 | |||
861 | drop_overlaps_that_are_ok(start, end); | 864 | drop_overlaps_that_are_ok(start, end); |
862 | __reserve_early(start, end, name, 0); | 865 | __reserve_early(start, end, name, 0); |
863 | } | 866 | } |
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c index 504ad198e4ad..639ad98238a2 100644 --- a/arch/x86/kernel/early_printk.c +++ b/arch/x86/kernel/early_printk.c | |||
@@ -13,8 +13,8 @@ | |||
13 | #include <asm/setup.h> | 13 | #include <asm/setup.h> |
14 | #include <xen/hvc-console.h> | 14 | #include <xen/hvc-console.h> |
15 | #include <asm/pci-direct.h> | 15 | #include <asm/pci-direct.h> |
16 | #include <asm/pgtable.h> | ||
17 | #include <asm/fixmap.h> | 16 | #include <asm/fixmap.h> |
17 | #include <asm/pgtable.h> | ||
18 | #include <linux/usb/ehci_def.h> | 18 | #include <linux/usb/ehci_def.h> |
19 | 19 | ||
20 | /* Simple VGA output */ | 20 | /* Simple VGA output */ |
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c index eb1ef3b67dd5..1736acc4d7aa 100644 --- a/arch/x86/kernel/efi.c +++ b/arch/x86/kernel/efi.c | |||
@@ -366,10 +366,12 @@ void __init efi_init(void) | |||
366 | SMBIOS_TABLE_GUID)) { | 366 | SMBIOS_TABLE_GUID)) { |
367 | efi.smbios = config_tables[i].table; | 367 | efi.smbios = config_tables[i].table; |
368 | printk(" SMBIOS=0x%lx ", config_tables[i].table); | 368 | printk(" SMBIOS=0x%lx ", config_tables[i].table); |
369 | #ifdef CONFIG_X86_UV | ||
369 | } else if (!efi_guidcmp(config_tables[i].guid, | 370 | } else if (!efi_guidcmp(config_tables[i].guid, |
370 | UV_SYSTEM_TABLE_GUID)) { | 371 | UV_SYSTEM_TABLE_GUID)) { |
371 | efi.uv_systab = config_tables[i].table; | 372 | efi.uv_systab = config_tables[i].table; |
372 | printk(" UVsystab=0x%lx ", config_tables[i].table); | 373 | printk(" UVsystab=0x%lx ", config_tables[i].table); |
374 | #endif | ||
373 | } else if (!efi_guidcmp(config_tables[i].guid, | 375 | } else if (!efi_guidcmp(config_tables[i].guid, |
374 | HCDP_TABLE_GUID)) { | 376 | HCDP_TABLE_GUID)) { |
375 | efi.hcdp = config_tables[i].table; | 377 | efi.hcdp = config_tables[i].table; |
diff --git a/arch/x86/kernel/efi_64.c b/arch/x86/kernel/efi_64.c index cb783b92c50c..22c3b7828c50 100644 --- a/arch/x86/kernel/efi_64.c +++ b/arch/x86/kernel/efi_64.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <asm/proto.h> | 36 | #include <asm/proto.h> |
37 | #include <asm/efi.h> | 37 | #include <asm/efi.h> |
38 | #include <asm/cacheflush.h> | 38 | #include <asm/cacheflush.h> |
39 | #include <asm/fixmap.h> | ||
39 | 40 | ||
40 | static pgd_t save_pgd __initdata; | 41 | static pgd_t save_pgd __initdata; |
41 | static unsigned long efi_flags __initdata; | 42 | static unsigned long efi_flags __initdata; |
diff --git a/arch/x86/kernel/efi_stub_32.S b/arch/x86/kernel/efi_stub_32.S index ef00bb77d7e4..fbe66e626c09 100644 --- a/arch/x86/kernel/efi_stub_32.S +++ b/arch/x86/kernel/efi_stub_32.S | |||
@@ -6,7 +6,7 @@ | |||
6 | */ | 6 | */ |
7 | 7 | ||
8 | #include <linux/linkage.h> | 8 | #include <linux/linkage.h> |
9 | #include <asm/page.h> | 9 | #include <asm/page_types.h> |
10 | 10 | ||
11 | /* | 11 | /* |
12 | * efi_call_phys(void *, ...) is a function with variable parameters. | 12 | * efi_call_phys(void *, ...) is a function with variable parameters. |
@@ -113,6 +113,7 @@ ENTRY(efi_call_phys) | |||
113 | movl (%edx), %ecx | 113 | movl (%edx), %ecx |
114 | pushl %ecx | 114 | pushl %ecx |
115 | ret | 115 | ret |
116 | ENDPROC(efi_call_phys) | ||
116 | .previous | 117 | .previous |
117 | 118 | ||
118 | .data | 119 | .data |
diff --git a/arch/x86/kernel/efi_stub_64.S b/arch/x86/kernel/efi_stub_64.S index 99b47d48c9f4..4c07ccab8146 100644 --- a/arch/x86/kernel/efi_stub_64.S +++ b/arch/x86/kernel/efi_stub_64.S | |||
@@ -41,6 +41,7 @@ ENTRY(efi_call0) | |||
41 | addq $32, %rsp | 41 | addq $32, %rsp |
42 | RESTORE_XMM | 42 | RESTORE_XMM |
43 | ret | 43 | ret |
44 | ENDPROC(efi_call0) | ||
44 | 45 | ||
45 | ENTRY(efi_call1) | 46 | ENTRY(efi_call1) |
46 | SAVE_XMM | 47 | SAVE_XMM |
@@ -50,6 +51,7 @@ ENTRY(efi_call1) | |||
50 | addq $32, %rsp | 51 | addq $32, %rsp |
51 | RESTORE_XMM | 52 | RESTORE_XMM |
52 | ret | 53 | ret |
54 | ENDPROC(efi_call1) | ||
53 | 55 | ||
54 | ENTRY(efi_call2) | 56 | ENTRY(efi_call2) |
55 | SAVE_XMM | 57 | SAVE_XMM |
@@ -59,6 +61,7 @@ ENTRY(efi_call2) | |||
59 | addq $32, %rsp | 61 | addq $32, %rsp |
60 | RESTORE_XMM | 62 | RESTORE_XMM |
61 | ret | 63 | ret |
64 | ENDPROC(efi_call2) | ||
62 | 65 | ||
63 | ENTRY(efi_call3) | 66 | ENTRY(efi_call3) |
64 | SAVE_XMM | 67 | SAVE_XMM |
@@ -69,6 +72,7 @@ ENTRY(efi_call3) | |||
69 | addq $32, %rsp | 72 | addq $32, %rsp |
70 | RESTORE_XMM | 73 | RESTORE_XMM |
71 | ret | 74 | ret |
75 | ENDPROC(efi_call3) | ||
72 | 76 | ||
73 | ENTRY(efi_call4) | 77 | ENTRY(efi_call4) |
74 | SAVE_XMM | 78 | SAVE_XMM |
@@ -80,6 +84,7 @@ ENTRY(efi_call4) | |||
80 | addq $32, %rsp | 84 | addq $32, %rsp |
81 | RESTORE_XMM | 85 | RESTORE_XMM |
82 | ret | 86 | ret |
87 | ENDPROC(efi_call4) | ||
83 | 88 | ||
84 | ENTRY(efi_call5) | 89 | ENTRY(efi_call5) |
85 | SAVE_XMM | 90 | SAVE_XMM |
@@ -92,6 +97,7 @@ ENTRY(efi_call5) | |||
92 | addq $48, %rsp | 97 | addq $48, %rsp |
93 | RESTORE_XMM | 98 | RESTORE_XMM |
94 | ret | 99 | ret |
100 | ENDPROC(efi_call5) | ||
95 | 101 | ||
96 | ENTRY(efi_call6) | 102 | ENTRY(efi_call6) |
97 | SAVE_XMM | 103 | SAVE_XMM |
@@ -107,3 +113,4 @@ ENTRY(efi_call6) | |||
107 | addq $48, %rsp | 113 | addq $48, %rsp |
108 | RESTORE_XMM | 114 | RESTORE_XMM |
109 | ret | 115 | ret |
116 | ENDPROC(efi_call6) | ||
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 46469029e9d3..899e8938e79f 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S | |||
@@ -30,12 +30,13 @@ | |||
30 | * 1C(%esp) - %ds | 30 | * 1C(%esp) - %ds |
31 | * 20(%esp) - %es | 31 | * 20(%esp) - %es |
32 | * 24(%esp) - %fs | 32 | * 24(%esp) - %fs |
33 | * 28(%esp) - orig_eax | 33 | * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS |
34 | * 2C(%esp) - %eip | 34 | * 2C(%esp) - orig_eax |
35 | * 30(%esp) - %cs | 35 | * 30(%esp) - %eip |
36 | * 34(%esp) - %eflags | 36 | * 34(%esp) - %cs |
37 | * 38(%esp) - %oldesp | 37 | * 38(%esp) - %eflags |
38 | * 3C(%esp) - %oldss | 38 | * 3C(%esp) - %oldesp |
39 | * 40(%esp) - %oldss | ||
39 | * | 40 | * |
40 | * "current" is in register %ebx during any slow entries. | 41 | * "current" is in register %ebx during any slow entries. |
41 | */ | 42 | */ |
@@ -46,7 +47,7 @@ | |||
46 | #include <asm/errno.h> | 47 | #include <asm/errno.h> |
47 | #include <asm/segment.h> | 48 | #include <asm/segment.h> |
48 | #include <asm/smp.h> | 49 | #include <asm/smp.h> |
49 | #include <asm/page.h> | 50 | #include <asm/page_types.h> |
50 | #include <asm/desc.h> | 51 | #include <asm/desc.h> |
51 | #include <asm/percpu.h> | 52 | #include <asm/percpu.h> |
52 | #include <asm/dwarf2.h> | 53 | #include <asm/dwarf2.h> |
@@ -101,121 +102,221 @@ | |||
101 | #define resume_userspace_sig resume_userspace | 102 | #define resume_userspace_sig resume_userspace |
102 | #endif | 103 | #endif |
103 | 104 | ||
104 | #define SAVE_ALL \ | 105 | /* |
105 | cld; \ | 106 | * User gs save/restore |
106 | pushl %fs; \ | 107 | * |
107 | CFI_ADJUST_CFA_OFFSET 4;\ | 108 | * %gs is used for userland TLS and kernel only uses it for stack |
108 | /*CFI_REL_OFFSET fs, 0;*/\ | 109 | * canary which is required to be at %gs:20 by gcc. Read the comment |
109 | pushl %es; \ | 110 | * at the top of stackprotector.h for more info. |
110 | CFI_ADJUST_CFA_OFFSET 4;\ | 111 | * |
111 | /*CFI_REL_OFFSET es, 0;*/\ | 112 | * Local labels 98 and 99 are used. |
112 | pushl %ds; \ | 113 | */ |
113 | CFI_ADJUST_CFA_OFFSET 4;\ | 114 | #ifdef CONFIG_X86_32_LAZY_GS |
114 | /*CFI_REL_OFFSET ds, 0;*/\ | 115 | |
115 | pushl %eax; \ | 116 | /* unfortunately push/pop can't be no-op */ |
116 | CFI_ADJUST_CFA_OFFSET 4;\ | 117 | .macro PUSH_GS |
117 | CFI_REL_OFFSET eax, 0;\ | 118 | pushl $0 |
118 | pushl %ebp; \ | 119 | CFI_ADJUST_CFA_OFFSET 4 |
119 | CFI_ADJUST_CFA_OFFSET 4;\ | 120 | .endm |
120 | CFI_REL_OFFSET ebp, 0;\ | 121 | .macro POP_GS pop=0 |
121 | pushl %edi; \ | 122 | addl $(4 + \pop), %esp |
122 | CFI_ADJUST_CFA_OFFSET 4;\ | 123 | CFI_ADJUST_CFA_OFFSET -(4 + \pop) |
123 | CFI_REL_OFFSET edi, 0;\ | 124 | .endm |
124 | pushl %esi; \ | 125 | .macro POP_GS_EX |
125 | CFI_ADJUST_CFA_OFFSET 4;\ | 126 | .endm |
126 | CFI_REL_OFFSET esi, 0;\ | 127 | |
127 | pushl %edx; \ | 128 | /* all the rest are no-op */ |
128 | CFI_ADJUST_CFA_OFFSET 4;\ | 129 | .macro PTGS_TO_GS |
129 | CFI_REL_OFFSET edx, 0;\ | 130 | .endm |
130 | pushl %ecx; \ | 131 | .macro PTGS_TO_GS_EX |
131 | CFI_ADJUST_CFA_OFFSET 4;\ | 132 | .endm |
132 | CFI_REL_OFFSET ecx, 0;\ | 133 | .macro GS_TO_REG reg |
133 | pushl %ebx; \ | 134 | .endm |
134 | CFI_ADJUST_CFA_OFFSET 4;\ | 135 | .macro REG_TO_PTGS reg |
135 | CFI_REL_OFFSET ebx, 0;\ | 136 | .endm |
136 | movl $(__USER_DS), %edx; \ | 137 | .macro SET_KERNEL_GS reg |
137 | movl %edx, %ds; \ | 138 | .endm |
138 | movl %edx, %es; \ | 139 | |
139 | movl $(__KERNEL_PERCPU), %edx; \ | 140 | #else /* CONFIG_X86_32_LAZY_GS */ |
141 | |||
142 | .macro PUSH_GS | ||
143 | pushl %gs | ||
144 | CFI_ADJUST_CFA_OFFSET 4 | ||
145 | /*CFI_REL_OFFSET gs, 0*/ | ||
146 | .endm | ||
147 | |||
148 | .macro POP_GS pop=0 | ||
149 | 98: popl %gs | ||
150 | CFI_ADJUST_CFA_OFFSET -4 | ||
151 | /*CFI_RESTORE gs*/ | ||
152 | .if \pop <> 0 | ||
153 | add $\pop, %esp | ||
154 | CFI_ADJUST_CFA_OFFSET -\pop | ||
155 | .endif | ||
156 | .endm | ||
157 | .macro POP_GS_EX | ||
158 | .pushsection .fixup, "ax" | ||
159 | 99: movl $0, (%esp) | ||
160 | jmp 98b | ||
161 | .section __ex_table, "a" | ||
162 | .align 4 | ||
163 | .long 98b, 99b | ||
164 | .popsection | ||
165 | .endm | ||
166 | |||
167 | .macro PTGS_TO_GS | ||
168 | 98: mov PT_GS(%esp), %gs | ||
169 | .endm | ||
170 | .macro PTGS_TO_GS_EX | ||
171 | .pushsection .fixup, "ax" | ||
172 | 99: movl $0, PT_GS(%esp) | ||
173 | jmp 98b | ||
174 | .section __ex_table, "a" | ||
175 | .align 4 | ||
176 | .long 98b, 99b | ||
177 | .popsection | ||
178 | .endm | ||
179 | |||
180 | .macro GS_TO_REG reg | ||
181 | movl %gs, \reg | ||
182 | /*CFI_REGISTER gs, \reg*/ | ||
183 | .endm | ||
184 | .macro REG_TO_PTGS reg | ||
185 | movl \reg, PT_GS(%esp) | ||
186 | /*CFI_REL_OFFSET gs, PT_GS*/ | ||
187 | .endm | ||
188 | .macro SET_KERNEL_GS reg | ||
189 | movl $(__KERNEL_STACK_CANARY), \reg | ||
190 | movl \reg, %gs | ||
191 | .endm | ||
192 | |||
193 | #endif /* CONFIG_X86_32_LAZY_GS */ | ||
194 | |||
195 | .macro SAVE_ALL | ||
196 | cld | ||
197 | PUSH_GS | ||
198 | pushl %fs | ||
199 | CFI_ADJUST_CFA_OFFSET 4 | ||
200 | /*CFI_REL_OFFSET fs, 0;*/ | ||
201 | pushl %es | ||
202 | CFI_ADJUST_CFA_OFFSET 4 | ||
203 | /*CFI_REL_OFFSET es, 0;*/ | ||
204 | pushl %ds | ||
205 | CFI_ADJUST_CFA_OFFSET 4 | ||
206 | /*CFI_REL_OFFSET ds, 0;*/ | ||
207 | pushl %eax | ||
208 | CFI_ADJUST_CFA_OFFSET 4 | ||
209 | CFI_REL_OFFSET eax, 0 | ||
210 | pushl %ebp | ||
211 | CFI_ADJUST_CFA_OFFSET 4 | ||
212 | CFI_REL_OFFSET ebp, 0 | ||
213 | pushl %edi | ||
214 | CFI_ADJUST_CFA_OFFSET 4 | ||
215 | CFI_REL_OFFSET edi, 0 | ||
216 | pushl %esi | ||
217 | CFI_ADJUST_CFA_OFFSET 4 | ||
218 | CFI_REL_OFFSET esi, 0 | ||
219 | pushl %edx | ||
220 | CFI_ADJUST_CFA_OFFSET 4 | ||
221 | CFI_REL_OFFSET edx, 0 | ||
222 | pushl %ecx | ||
223 | CFI_ADJUST_CFA_OFFSET 4 | ||
224 | CFI_REL_OFFSET ecx, 0 | ||
225 | pushl %ebx | ||
226 | CFI_ADJUST_CFA_OFFSET 4 | ||
227 | CFI_REL_OFFSET ebx, 0 | ||
228 | movl $(__USER_DS), %edx | ||
229 | movl %edx, %ds | ||
230 | movl %edx, %es | ||
231 | movl $(__KERNEL_PERCPU), %edx | ||
140 | movl %edx, %fs | 232 | movl %edx, %fs |
233 | SET_KERNEL_GS %edx | ||
234 | .endm | ||
141 | 235 | ||
142 | #define RESTORE_INT_REGS \ | 236 | .macro RESTORE_INT_REGS |
143 | popl %ebx; \ | 237 | popl %ebx |
144 | CFI_ADJUST_CFA_OFFSET -4;\ | 238 | CFI_ADJUST_CFA_OFFSET -4 |
145 | CFI_RESTORE ebx;\ | 239 | CFI_RESTORE ebx |
146 | popl %ecx; \ | 240 | popl %ecx |
147 | CFI_ADJUST_CFA_OFFSET -4;\ | 241 | CFI_ADJUST_CFA_OFFSET -4 |
148 | CFI_RESTORE ecx;\ | 242 | CFI_RESTORE ecx |
149 | popl %edx; \ | 243 | popl %edx |
150 | CFI_ADJUST_CFA_OFFSET -4;\ | 244 | CFI_ADJUST_CFA_OFFSET -4 |
151 | CFI_RESTORE edx;\ | 245 | CFI_RESTORE edx |
152 | popl %esi; \ | 246 | popl %esi |
153 | CFI_ADJUST_CFA_OFFSET -4;\ | 247 | CFI_ADJUST_CFA_OFFSET -4 |
154 | CFI_RESTORE esi;\ | 248 | CFI_RESTORE esi |
155 | popl %edi; \ | 249 | popl %edi |
156 | CFI_ADJUST_CFA_OFFSET -4;\ | 250 | CFI_ADJUST_CFA_OFFSET -4 |
157 | CFI_RESTORE edi;\ | 251 | CFI_RESTORE edi |
158 | popl %ebp; \ | 252 | popl %ebp |
159 | CFI_ADJUST_CFA_OFFSET -4;\ | 253 | CFI_ADJUST_CFA_OFFSET -4 |
160 | CFI_RESTORE ebp;\ | 254 | CFI_RESTORE ebp |
161 | popl %eax; \ | 255 | popl %eax |
162 | CFI_ADJUST_CFA_OFFSET -4;\ | 256 | CFI_ADJUST_CFA_OFFSET -4 |
163 | CFI_RESTORE eax | 257 | CFI_RESTORE eax |
258 | .endm | ||
164 | 259 | ||
165 | #define RESTORE_REGS \ | 260 | .macro RESTORE_REGS pop=0 |
166 | RESTORE_INT_REGS; \ | 261 | RESTORE_INT_REGS |
167 | 1: popl %ds; \ | 262 | 1: popl %ds |
168 | CFI_ADJUST_CFA_OFFSET -4;\ | 263 | CFI_ADJUST_CFA_OFFSET -4 |
169 | /*CFI_RESTORE ds;*/\ | 264 | /*CFI_RESTORE ds;*/ |
170 | 2: popl %es; \ | 265 | 2: popl %es |
171 | CFI_ADJUST_CFA_OFFSET -4;\ | 266 | CFI_ADJUST_CFA_OFFSET -4 |
172 | /*CFI_RESTORE es;*/\ | 267 | /*CFI_RESTORE es;*/ |
173 | 3: popl %fs; \ | 268 | 3: popl %fs |
174 | CFI_ADJUST_CFA_OFFSET -4;\ | 269 | CFI_ADJUST_CFA_OFFSET -4 |
175 | /*CFI_RESTORE fs;*/\ | 270 | /*CFI_RESTORE fs;*/ |
176 | .pushsection .fixup,"ax"; \ | 271 | POP_GS \pop |
177 | 4: movl $0,(%esp); \ | 272 | .pushsection .fixup, "ax" |
178 | jmp 1b; \ | 273 | 4: movl $0, (%esp) |
179 | 5: movl $0,(%esp); \ | 274 | jmp 1b |
180 | jmp 2b; \ | 275 | 5: movl $0, (%esp) |
181 | 6: movl $0,(%esp); \ | 276 | jmp 2b |
182 | jmp 3b; \ | 277 | 6: movl $0, (%esp) |
183 | .section __ex_table,"a";\ | 278 | jmp 3b |
184 | .align 4; \ | 279 | .section __ex_table, "a" |
185 | .long 1b,4b; \ | 280 | .align 4 |
186 | .long 2b,5b; \ | 281 | .long 1b, 4b |
187 | .long 3b,6b; \ | 282 | .long 2b, 5b |
283 | .long 3b, 6b | ||
188 | .popsection | 284 | .popsection |
285 | POP_GS_EX | ||
286 | .endm | ||
189 | 287 | ||
190 | #define RING0_INT_FRAME \ | 288 | .macro RING0_INT_FRAME |
191 | CFI_STARTPROC simple;\ | 289 | CFI_STARTPROC simple |
192 | CFI_SIGNAL_FRAME;\ | 290 | CFI_SIGNAL_FRAME |
193 | CFI_DEF_CFA esp, 3*4;\ | 291 | CFI_DEF_CFA esp, 3*4 |
194 | /*CFI_OFFSET cs, -2*4;*/\ | 292 | /*CFI_OFFSET cs, -2*4;*/ |
195 | CFI_OFFSET eip, -3*4 | 293 | CFI_OFFSET eip, -3*4 |
294 | .endm | ||
196 | 295 | ||
197 | #define RING0_EC_FRAME \ | 296 | .macro RING0_EC_FRAME |
198 | CFI_STARTPROC simple;\ | 297 | CFI_STARTPROC simple |
199 | CFI_SIGNAL_FRAME;\ | 298 | CFI_SIGNAL_FRAME |
200 | CFI_DEF_CFA esp, 4*4;\ | 299 | CFI_DEF_CFA esp, 4*4 |
201 | /*CFI_OFFSET cs, -2*4;*/\ | 300 | /*CFI_OFFSET cs, -2*4;*/ |
202 | CFI_OFFSET eip, -3*4 | 301 | CFI_OFFSET eip, -3*4 |
302 | .endm | ||
203 | 303 | ||
204 | #define RING0_PTREGS_FRAME \ | 304 | .macro RING0_PTREGS_FRAME |
205 | CFI_STARTPROC simple;\ | 305 | CFI_STARTPROC simple |
206 | CFI_SIGNAL_FRAME;\ | 306 | CFI_SIGNAL_FRAME |
207 | CFI_DEF_CFA esp, PT_OLDESP-PT_EBX;\ | 307 | CFI_DEF_CFA esp, PT_OLDESP-PT_EBX |
208 | /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/\ | 308 | /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/ |
209 | CFI_OFFSET eip, PT_EIP-PT_OLDESP;\ | 309 | CFI_OFFSET eip, PT_EIP-PT_OLDESP |
210 | /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/\ | 310 | /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/ |
211 | /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/\ | 311 | /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/ |
212 | CFI_OFFSET eax, PT_EAX-PT_OLDESP;\ | 312 | CFI_OFFSET eax, PT_EAX-PT_OLDESP |
213 | CFI_OFFSET ebp, PT_EBP-PT_OLDESP;\ | 313 | CFI_OFFSET ebp, PT_EBP-PT_OLDESP |
214 | CFI_OFFSET edi, PT_EDI-PT_OLDESP;\ | 314 | CFI_OFFSET edi, PT_EDI-PT_OLDESP |
215 | CFI_OFFSET esi, PT_ESI-PT_OLDESP;\ | 315 | CFI_OFFSET esi, PT_ESI-PT_OLDESP |
216 | CFI_OFFSET edx, PT_EDX-PT_OLDESP;\ | 316 | CFI_OFFSET edx, PT_EDX-PT_OLDESP |
217 | CFI_OFFSET ecx, PT_ECX-PT_OLDESP;\ | 317 | CFI_OFFSET ecx, PT_ECX-PT_OLDESP |
218 | CFI_OFFSET ebx, PT_EBX-PT_OLDESP | 318 | CFI_OFFSET ebx, PT_EBX-PT_OLDESP |
319 | .endm | ||
219 | 320 | ||
220 | ENTRY(ret_from_fork) | 321 | ENTRY(ret_from_fork) |
221 | CFI_STARTPROC | 322 | CFI_STARTPROC |
@@ -362,6 +463,7 @@ sysenter_exit: | |||
362 | xorl %ebp,%ebp | 463 | xorl %ebp,%ebp |
363 | TRACE_IRQS_ON | 464 | TRACE_IRQS_ON |
364 | 1: mov PT_FS(%esp), %fs | 465 | 1: mov PT_FS(%esp), %fs |
466 | PTGS_TO_GS | ||
365 | ENABLE_INTERRUPTS_SYSEXIT | 467 | ENABLE_INTERRUPTS_SYSEXIT |
366 | 468 | ||
367 | #ifdef CONFIG_AUDITSYSCALL | 469 | #ifdef CONFIG_AUDITSYSCALL |
@@ -410,6 +512,7 @@ sysexit_audit: | |||
410 | .align 4 | 512 | .align 4 |
411 | .long 1b,2b | 513 | .long 1b,2b |
412 | .popsection | 514 | .popsection |
515 | PTGS_TO_GS_EX | ||
413 | ENDPROC(ia32_sysenter_target) | 516 | ENDPROC(ia32_sysenter_target) |
414 | 517 | ||
415 | # system call handler stub | 518 | # system call handler stub |
@@ -452,8 +555,7 @@ restore_all: | |||
452 | restore_nocheck: | 555 | restore_nocheck: |
453 | TRACE_IRQS_IRET | 556 | TRACE_IRQS_IRET |
454 | restore_nocheck_notrace: | 557 | restore_nocheck_notrace: |
455 | RESTORE_REGS | 558 | RESTORE_REGS 4 # skip orig_eax/error_code |
456 | addl $4, %esp # skip orig_eax/error_code | ||
457 | CFI_ADJUST_CFA_OFFSET -4 | 559 | CFI_ADJUST_CFA_OFFSET -4 |
458 | irq_return: | 560 | irq_return: |
459 | INTERRUPT_RETURN | 561 | INTERRUPT_RETURN |
@@ -595,28 +697,50 @@ syscall_badsys: | |||
595 | END(syscall_badsys) | 697 | END(syscall_badsys) |
596 | CFI_ENDPROC | 698 | CFI_ENDPROC |
597 | 699 | ||
598 | #define FIXUP_ESPFIX_STACK \ | 700 | /* |
599 | /* since we are on a wrong stack, we cant make it a C code :( */ \ | 701 | * System calls that need a pt_regs pointer. |
600 | PER_CPU(gdt_page, %ebx); \ | 702 | */ |
601 | GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah); \ | 703 | #define PTREGSCALL(name) \ |
602 | addl %esp, %eax; \ | 704 | ALIGN; \ |
603 | pushl $__KERNEL_DS; \ | 705 | ptregs_##name: \ |
604 | CFI_ADJUST_CFA_OFFSET 4; \ | 706 | leal 4(%esp),%eax; \ |
605 | pushl %eax; \ | 707 | jmp sys_##name; |
606 | CFI_ADJUST_CFA_OFFSET 4; \ | 708 | |
607 | lss (%esp), %esp; \ | 709 | PTREGSCALL(iopl) |
608 | CFI_ADJUST_CFA_OFFSET -8; | 710 | PTREGSCALL(fork) |
609 | #define UNWIND_ESPFIX_STACK \ | 711 | PTREGSCALL(clone) |
610 | movl %ss, %eax; \ | 712 | PTREGSCALL(vfork) |
611 | /* see if on espfix stack */ \ | 713 | PTREGSCALL(execve) |
612 | cmpw $__ESPFIX_SS, %ax; \ | 714 | PTREGSCALL(sigaltstack) |
613 | jne 27f; \ | 715 | PTREGSCALL(sigreturn) |
614 | movl $__KERNEL_DS, %eax; \ | 716 | PTREGSCALL(rt_sigreturn) |
615 | movl %eax, %ds; \ | 717 | PTREGSCALL(vm86) |
616 | movl %eax, %es; \ | 718 | PTREGSCALL(vm86old) |
617 | /* switch to normal stack */ \ | 719 | |
618 | FIXUP_ESPFIX_STACK; \ | 720 | .macro FIXUP_ESPFIX_STACK |
619 | 27:; | 721 | /* since we are on a wrong stack, we cant make it a C code :( */ |
722 | PER_CPU(gdt_page, %ebx) | ||
723 | GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah) | ||
724 | addl %esp, %eax | ||
725 | pushl $__KERNEL_DS | ||
726 | CFI_ADJUST_CFA_OFFSET 4 | ||
727 | pushl %eax | ||
728 | CFI_ADJUST_CFA_OFFSET 4 | ||
729 | lss (%esp), %esp | ||
730 | CFI_ADJUST_CFA_OFFSET -8 | ||
731 | .endm | ||
732 | .macro UNWIND_ESPFIX_STACK | ||
733 | movl %ss, %eax | ||
734 | /* see if on espfix stack */ | ||
735 | cmpw $__ESPFIX_SS, %ax | ||
736 | jne 27f | ||
737 | movl $__KERNEL_DS, %eax | ||
738 | movl %eax, %ds | ||
739 | movl %eax, %es | ||
740 | /* switch to normal stack */ | ||
741 | FIXUP_ESPFIX_STACK | ||
742 | 27: | ||
743 | .endm | ||
620 | 744 | ||
621 | /* | 745 | /* |
622 | * Build the entry stubs and pointer table with some assembler magic. | 746 | * Build the entry stubs and pointer table with some assembler magic. |
@@ -672,7 +796,7 @@ common_interrupt: | |||
672 | ENDPROC(common_interrupt) | 796 | ENDPROC(common_interrupt) |
673 | CFI_ENDPROC | 797 | CFI_ENDPROC |
674 | 798 | ||
675 | #define BUILD_INTERRUPT(name, nr) \ | 799 | #define BUILD_INTERRUPT3(name, nr, fn) \ |
676 | ENTRY(name) \ | 800 | ENTRY(name) \ |
677 | RING0_INT_FRAME; \ | 801 | RING0_INT_FRAME; \ |
678 | pushl $~(nr); \ | 802 | pushl $~(nr); \ |
@@ -680,13 +804,15 @@ ENTRY(name) \ | |||
680 | SAVE_ALL; \ | 804 | SAVE_ALL; \ |
681 | TRACE_IRQS_OFF \ | 805 | TRACE_IRQS_OFF \ |
682 | movl %esp,%eax; \ | 806 | movl %esp,%eax; \ |
683 | call smp_##name; \ | 807 | call fn; \ |
684 | jmp ret_from_intr; \ | 808 | jmp ret_from_intr; \ |
685 | CFI_ENDPROC; \ | 809 | CFI_ENDPROC; \ |
686 | ENDPROC(name) | 810 | ENDPROC(name) |
687 | 811 | ||
812 | #define BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(name, nr, smp_##name) | ||
813 | |||
688 | /* The include is where all of the SMP etc. interrupts come from */ | 814 | /* The include is where all of the SMP etc. interrupts come from */ |
689 | #include "entry_arch.h" | 815 | #include <asm/entry_arch.h> |
690 | 816 | ||
691 | ENTRY(coprocessor_error) | 817 | ENTRY(coprocessor_error) |
692 | RING0_INT_FRAME | 818 | RING0_INT_FRAME |
@@ -1068,7 +1194,10 @@ ENTRY(page_fault) | |||
1068 | CFI_ADJUST_CFA_OFFSET 4 | 1194 | CFI_ADJUST_CFA_OFFSET 4 |
1069 | ALIGN | 1195 | ALIGN |
1070 | error_code: | 1196 | error_code: |
1071 | /* the function address is in %fs's slot on the stack */ | 1197 | /* the function address is in %gs's slot on the stack */ |
1198 | pushl %fs | ||
1199 | CFI_ADJUST_CFA_OFFSET 4 | ||
1200 | /*CFI_REL_OFFSET fs, 0*/ | ||
1072 | pushl %es | 1201 | pushl %es |
1073 | CFI_ADJUST_CFA_OFFSET 4 | 1202 | CFI_ADJUST_CFA_OFFSET 4 |
1074 | /*CFI_REL_OFFSET es, 0*/ | 1203 | /*CFI_REL_OFFSET es, 0*/ |
@@ -1097,20 +1226,15 @@ error_code: | |||
1097 | CFI_ADJUST_CFA_OFFSET 4 | 1226 | CFI_ADJUST_CFA_OFFSET 4 |
1098 | CFI_REL_OFFSET ebx, 0 | 1227 | CFI_REL_OFFSET ebx, 0 |
1099 | cld | 1228 | cld |
1100 | pushl %fs | ||
1101 | CFI_ADJUST_CFA_OFFSET 4 | ||
1102 | /*CFI_REL_OFFSET fs, 0*/ | ||
1103 | movl $(__KERNEL_PERCPU), %ecx | 1229 | movl $(__KERNEL_PERCPU), %ecx |
1104 | movl %ecx, %fs | 1230 | movl %ecx, %fs |
1105 | UNWIND_ESPFIX_STACK | 1231 | UNWIND_ESPFIX_STACK |
1106 | popl %ecx | 1232 | GS_TO_REG %ecx |
1107 | CFI_ADJUST_CFA_OFFSET -4 | 1233 | movl PT_GS(%esp), %edi # get the function address |
1108 | /*CFI_REGISTER es, ecx*/ | ||
1109 | movl PT_FS(%esp), %edi # get the function address | ||
1110 | movl PT_ORIG_EAX(%esp), %edx # get the error code | 1234 | movl PT_ORIG_EAX(%esp), %edx # get the error code |
1111 | movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart | 1235 | movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart |
1112 | mov %ecx, PT_FS(%esp) | 1236 | REG_TO_PTGS %ecx |
1113 | /*CFI_REL_OFFSET fs, ES*/ | 1237 | SET_KERNEL_GS %ecx |
1114 | movl $(__USER_DS), %ecx | 1238 | movl $(__USER_DS), %ecx |
1115 | movl %ecx, %ds | 1239 | movl %ecx, %ds |
1116 | movl %ecx, %es | 1240 | movl %ecx, %es |
@@ -1134,26 +1258,27 @@ END(page_fault) | |||
1134 | * by hand onto the new stack - while updating the return eip past | 1258 | * by hand onto the new stack - while updating the return eip past |
1135 | * the instruction that would have done it for sysenter. | 1259 | * the instruction that would have done it for sysenter. |
1136 | */ | 1260 | */ |
1137 | #define FIX_STACK(offset, ok, label) \ | 1261 | .macro FIX_STACK offset ok label |
1138 | cmpw $__KERNEL_CS,4(%esp); \ | 1262 | cmpw $__KERNEL_CS, 4(%esp) |
1139 | jne ok; \ | 1263 | jne \ok |
1140 | label: \ | 1264 | \label: |
1141 | movl TSS_sysenter_sp0+offset(%esp),%esp; \ | 1265 | movl TSS_sysenter_sp0 + \offset(%esp), %esp |
1142 | CFI_DEF_CFA esp, 0; \ | 1266 | CFI_DEF_CFA esp, 0 |
1143 | CFI_UNDEFINED eip; \ | 1267 | CFI_UNDEFINED eip |
1144 | pushfl; \ | 1268 | pushfl |
1145 | CFI_ADJUST_CFA_OFFSET 4; \ | 1269 | CFI_ADJUST_CFA_OFFSET 4 |
1146 | pushl $__KERNEL_CS; \ | 1270 | pushl $__KERNEL_CS |
1147 | CFI_ADJUST_CFA_OFFSET 4; \ | 1271 | CFI_ADJUST_CFA_OFFSET 4 |
1148 | pushl $sysenter_past_esp; \ | 1272 | pushl $sysenter_past_esp |
1149 | CFI_ADJUST_CFA_OFFSET 4; \ | 1273 | CFI_ADJUST_CFA_OFFSET 4 |
1150 | CFI_REL_OFFSET eip, 0 | 1274 | CFI_REL_OFFSET eip, 0 |
1275 | .endm | ||
1151 | 1276 | ||
1152 | ENTRY(debug) | 1277 | ENTRY(debug) |
1153 | RING0_INT_FRAME | 1278 | RING0_INT_FRAME |
1154 | cmpl $ia32_sysenter_target,(%esp) | 1279 | cmpl $ia32_sysenter_target,(%esp) |
1155 | jne debug_stack_correct | 1280 | jne debug_stack_correct |
1156 | FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn) | 1281 | FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn |
1157 | debug_stack_correct: | 1282 | debug_stack_correct: |
1158 | pushl $-1 # mark this as an int | 1283 | pushl $-1 # mark this as an int |
1159 | CFI_ADJUST_CFA_OFFSET 4 | 1284 | CFI_ADJUST_CFA_OFFSET 4 |
@@ -1211,7 +1336,7 @@ nmi_stack_correct: | |||
1211 | 1336 | ||
1212 | nmi_stack_fixup: | 1337 | nmi_stack_fixup: |
1213 | RING0_INT_FRAME | 1338 | RING0_INT_FRAME |
1214 | FIX_STACK(12,nmi_stack_correct, 1) | 1339 | FIX_STACK 12, nmi_stack_correct, 1 |
1215 | jmp nmi_stack_correct | 1340 | jmp nmi_stack_correct |
1216 | 1341 | ||
1217 | nmi_debug_stack_check: | 1342 | nmi_debug_stack_check: |
@@ -1222,7 +1347,7 @@ nmi_debug_stack_check: | |||
1222 | jb nmi_stack_correct | 1347 | jb nmi_stack_correct |
1223 | cmpl $debug_esp_fix_insn,(%esp) | 1348 | cmpl $debug_esp_fix_insn,(%esp) |
1224 | ja nmi_stack_correct | 1349 | ja nmi_stack_correct |
1225 | FIX_STACK(24,nmi_stack_correct, 1) | 1350 | FIX_STACK 24, nmi_stack_correct, 1 |
1226 | jmp nmi_stack_correct | 1351 | jmp nmi_stack_correct |
1227 | 1352 | ||
1228 | nmi_espfix_stack: | 1353 | nmi_espfix_stack: |
@@ -1234,7 +1359,7 @@ nmi_espfix_stack: | |||
1234 | CFI_ADJUST_CFA_OFFSET 4 | 1359 | CFI_ADJUST_CFA_OFFSET 4 |
1235 | pushl %esp | 1360 | pushl %esp |
1236 | CFI_ADJUST_CFA_OFFSET 4 | 1361 | CFI_ADJUST_CFA_OFFSET 4 |
1237 | addw $4, (%esp) | 1362 | addl $4, (%esp) |
1238 | /* copy the iret frame of 12 bytes */ | 1363 | /* copy the iret frame of 12 bytes */ |
1239 | .rept 3 | 1364 | .rept 3 |
1240 | pushl 16(%esp) | 1365 | pushl 16(%esp) |
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index a1346217e43c..83d1836b9467 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S | |||
@@ -48,10 +48,11 @@ | |||
48 | #include <asm/unistd.h> | 48 | #include <asm/unistd.h> |
49 | #include <asm/thread_info.h> | 49 | #include <asm/thread_info.h> |
50 | #include <asm/hw_irq.h> | 50 | #include <asm/hw_irq.h> |
51 | #include <asm/page.h> | 51 | #include <asm/page_types.h> |
52 | #include <asm/irqflags.h> | 52 | #include <asm/irqflags.h> |
53 | #include <asm/paravirt.h> | 53 | #include <asm/paravirt.h> |
54 | #include <asm/ftrace.h> | 54 | #include <asm/ftrace.h> |
55 | #include <asm/percpu.h> | ||
55 | 56 | ||
56 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ | 57 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
57 | #include <linux/elf-em.h> | 58 | #include <linux/elf-em.h> |
@@ -76,20 +77,17 @@ ENTRY(ftrace_caller) | |||
76 | movq 8(%rbp), %rsi | 77 | movq 8(%rbp), %rsi |
77 | subq $MCOUNT_INSN_SIZE, %rdi | 78 | subq $MCOUNT_INSN_SIZE, %rdi |
78 | 79 | ||
79 | .globl ftrace_call | 80 | GLOBAL(ftrace_call) |
80 | ftrace_call: | ||
81 | call ftrace_stub | 81 | call ftrace_stub |
82 | 82 | ||
83 | MCOUNT_RESTORE_FRAME | 83 | MCOUNT_RESTORE_FRAME |
84 | 84 | ||
85 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | 85 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
86 | .globl ftrace_graph_call | 86 | GLOBAL(ftrace_graph_call) |
87 | ftrace_graph_call: | ||
88 | jmp ftrace_stub | 87 | jmp ftrace_stub |
89 | #endif | 88 | #endif |
90 | 89 | ||
91 | .globl ftrace_stub | 90 | GLOBAL(ftrace_stub) |
92 | ftrace_stub: | ||
93 | retq | 91 | retq |
94 | END(ftrace_caller) | 92 | END(ftrace_caller) |
95 | 93 | ||
@@ -109,8 +107,7 @@ ENTRY(mcount) | |||
109 | jnz ftrace_graph_caller | 107 | jnz ftrace_graph_caller |
110 | #endif | 108 | #endif |
111 | 109 | ||
112 | .globl ftrace_stub | 110 | GLOBAL(ftrace_stub) |
113 | ftrace_stub: | ||
114 | retq | 111 | retq |
115 | 112 | ||
116 | trace: | 113 | trace: |
@@ -147,9 +144,7 @@ ENTRY(ftrace_graph_caller) | |||
147 | retq | 144 | retq |
148 | END(ftrace_graph_caller) | 145 | END(ftrace_graph_caller) |
149 | 146 | ||
150 | 147 | GLOBAL(return_to_handler) | |
151 | .globl return_to_handler | ||
152 | return_to_handler: | ||
153 | subq $80, %rsp | 148 | subq $80, %rsp |
154 | 149 | ||
155 | movq %rax, (%rsp) | 150 | movq %rax, (%rsp) |
@@ -187,6 +182,7 @@ return_to_handler: | |||
187 | ENTRY(native_usergs_sysret64) | 182 | ENTRY(native_usergs_sysret64) |
188 | swapgs | 183 | swapgs |
189 | sysretq | 184 | sysretq |
185 | ENDPROC(native_usergs_sysret64) | ||
190 | #endif /* CONFIG_PARAVIRT */ | 186 | #endif /* CONFIG_PARAVIRT */ |
191 | 187 | ||
192 | 188 | ||
@@ -209,7 +205,7 @@ ENTRY(native_usergs_sysret64) | |||
209 | 205 | ||
210 | /* %rsp:at FRAMEEND */ | 206 | /* %rsp:at FRAMEEND */ |
211 | .macro FIXUP_TOP_OF_STACK tmp offset=0 | 207 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
212 | movq %gs:pda_oldrsp,\tmp | 208 | movq PER_CPU_VAR(old_rsp),\tmp |
213 | movq \tmp,RSP+\offset(%rsp) | 209 | movq \tmp,RSP+\offset(%rsp) |
214 | movq $__USER_DS,SS+\offset(%rsp) | 210 | movq $__USER_DS,SS+\offset(%rsp) |
215 | movq $__USER_CS,CS+\offset(%rsp) | 211 | movq $__USER_CS,CS+\offset(%rsp) |
@@ -220,7 +216,7 @@ ENTRY(native_usergs_sysret64) | |||
220 | 216 | ||
221 | .macro RESTORE_TOP_OF_STACK tmp offset=0 | 217 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
222 | movq RSP+\offset(%rsp),\tmp | 218 | movq RSP+\offset(%rsp),\tmp |
223 | movq \tmp,%gs:pda_oldrsp | 219 | movq \tmp,PER_CPU_VAR(old_rsp) |
224 | movq EFLAGS+\offset(%rsp),\tmp | 220 | movq EFLAGS+\offset(%rsp),\tmp |
225 | movq \tmp,R11+\offset(%rsp) | 221 | movq \tmp,R11+\offset(%rsp) |
226 | .endm | 222 | .endm |
@@ -336,15 +332,15 @@ ENTRY(save_args) | |||
336 | je 1f | 332 | je 1f |
337 | SWAPGS | 333 | SWAPGS |
338 | /* | 334 | /* |
339 | * irqcount is used to check if a CPU is already on an interrupt stack | 335 | * irq_count is used to check if a CPU is already on an interrupt stack |
340 | * or not. While this is essentially redundant with preempt_count it is | 336 | * or not. While this is essentially redundant with preempt_count it is |
341 | * a little cheaper to use a separate counter in the PDA (short of | 337 | * a little cheaper to use a separate counter in the PDA (short of |
342 | * moving irq_enter into assembly, which would be too much work) | 338 | * moving irq_enter into assembly, which would be too much work) |
343 | */ | 339 | */ |
344 | 1: incl %gs:pda_irqcount | 340 | 1: incl PER_CPU_VAR(irq_count) |
345 | jne 2f | 341 | jne 2f |
346 | popq_cfi %rax /* move return address... */ | 342 | popq_cfi %rax /* move return address... */ |
347 | mov %gs:pda_irqstackptr,%rsp | 343 | mov PER_CPU_VAR(irq_stack_ptr),%rsp |
348 | EMPTY_FRAME 0 | 344 | EMPTY_FRAME 0 |
349 | pushq_cfi %rbp /* backlink for unwinder */ | 345 | pushq_cfi %rbp /* backlink for unwinder */ |
350 | pushq_cfi %rax /* ... to the new stack */ | 346 | pushq_cfi %rax /* ... to the new stack */ |
@@ -409,6 +405,8 @@ END(save_paranoid) | |||
409 | ENTRY(ret_from_fork) | 405 | ENTRY(ret_from_fork) |
410 | DEFAULT_FRAME | 406 | DEFAULT_FRAME |
411 | 407 | ||
408 | LOCK ; btr $TIF_FORK,TI_flags(%r8) | ||
409 | |||
412 | push kernel_eflags(%rip) | 410 | push kernel_eflags(%rip) |
413 | CFI_ADJUST_CFA_OFFSET 8 | 411 | CFI_ADJUST_CFA_OFFSET 8 |
414 | popf # reset kernel eflags | 412 | popf # reset kernel eflags |
@@ -468,7 +466,7 @@ END(ret_from_fork) | |||
468 | ENTRY(system_call) | 466 | ENTRY(system_call) |
469 | CFI_STARTPROC simple | 467 | CFI_STARTPROC simple |
470 | CFI_SIGNAL_FRAME | 468 | CFI_SIGNAL_FRAME |
471 | CFI_DEF_CFA rsp,PDA_STACKOFFSET | 469 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
472 | CFI_REGISTER rip,rcx | 470 | CFI_REGISTER rip,rcx |
473 | /*CFI_REGISTER rflags,r11*/ | 471 | /*CFI_REGISTER rflags,r11*/ |
474 | SWAPGS_UNSAFE_STACK | 472 | SWAPGS_UNSAFE_STACK |
@@ -479,8 +477,8 @@ ENTRY(system_call) | |||
479 | */ | 477 | */ |
480 | ENTRY(system_call_after_swapgs) | 478 | ENTRY(system_call_after_swapgs) |
481 | 479 | ||
482 | movq %rsp,%gs:pda_oldrsp | 480 | movq %rsp,PER_CPU_VAR(old_rsp) |
483 | movq %gs:pda_kernelstack,%rsp | 481 | movq PER_CPU_VAR(kernel_stack),%rsp |
484 | /* | 482 | /* |
485 | * No need to follow this irqs off/on section - it's straight | 483 | * No need to follow this irqs off/on section - it's straight |
486 | * and short: | 484 | * and short: |
@@ -523,7 +521,7 @@ sysret_check: | |||
523 | CFI_REGISTER rip,rcx | 521 | CFI_REGISTER rip,rcx |
524 | RESTORE_ARGS 0,-ARG_SKIP,1 | 522 | RESTORE_ARGS 0,-ARG_SKIP,1 |
525 | /*CFI_REGISTER rflags,r11*/ | 523 | /*CFI_REGISTER rflags,r11*/ |
526 | movq %gs:pda_oldrsp, %rsp | 524 | movq PER_CPU_VAR(old_rsp), %rsp |
527 | USERGS_SYSRET64 | 525 | USERGS_SYSRET64 |
528 | 526 | ||
529 | CFI_RESTORE_STATE | 527 | CFI_RESTORE_STATE |
@@ -630,16 +628,14 @@ tracesys: | |||
630 | * Syscall return path ending with IRET. | 628 | * Syscall return path ending with IRET. |
631 | * Has correct top of stack, but partial stack frame. | 629 | * Has correct top of stack, but partial stack frame. |
632 | */ | 630 | */ |
633 | .globl int_ret_from_sys_call | 631 | GLOBAL(int_ret_from_sys_call) |
634 | .globl int_with_check | ||
635 | int_ret_from_sys_call: | ||
636 | DISABLE_INTERRUPTS(CLBR_NONE) | 632 | DISABLE_INTERRUPTS(CLBR_NONE) |
637 | TRACE_IRQS_OFF | 633 | TRACE_IRQS_OFF |
638 | testl $3,CS-ARGOFFSET(%rsp) | 634 | testl $3,CS-ARGOFFSET(%rsp) |
639 | je retint_restore_args | 635 | je retint_restore_args |
640 | movl $_TIF_ALLWORK_MASK,%edi | 636 | movl $_TIF_ALLWORK_MASK,%edi |
641 | /* edi: mask to check */ | 637 | /* edi: mask to check */ |
642 | int_with_check: | 638 | GLOBAL(int_with_check) |
643 | LOCKDEP_SYS_EXIT_IRQ | 639 | LOCKDEP_SYS_EXIT_IRQ |
644 | GET_THREAD_INFO(%rcx) | 640 | GET_THREAD_INFO(%rcx) |
645 | movl TI_flags(%rcx),%edx | 641 | movl TI_flags(%rcx),%edx |
@@ -833,11 +829,11 @@ common_interrupt: | |||
833 | XCPT_FRAME | 829 | XCPT_FRAME |
834 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ | 830 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
835 | interrupt do_IRQ | 831 | interrupt do_IRQ |
836 | /* 0(%rsp): oldrsp-ARGOFFSET */ | 832 | /* 0(%rsp): old_rsp-ARGOFFSET */ |
837 | ret_from_intr: | 833 | ret_from_intr: |
838 | DISABLE_INTERRUPTS(CLBR_NONE) | 834 | DISABLE_INTERRUPTS(CLBR_NONE) |
839 | TRACE_IRQS_OFF | 835 | TRACE_IRQS_OFF |
840 | decl %gs:pda_irqcount | 836 | decl PER_CPU_VAR(irq_count) |
841 | leaveq | 837 | leaveq |
842 | CFI_DEF_CFA_REGISTER rsp | 838 | CFI_DEF_CFA_REGISTER rsp |
843 | CFI_ADJUST_CFA_OFFSET -8 | 839 | CFI_ADJUST_CFA_OFFSET -8 |
@@ -982,8 +978,10 @@ apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \ | |||
982 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt | 978 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt |
983 | #endif | 979 | #endif |
984 | 980 | ||
981 | #ifdef CONFIG_X86_UV | ||
985 | apicinterrupt UV_BAU_MESSAGE \ | 982 | apicinterrupt UV_BAU_MESSAGE \ |
986 | uv_bau_message_intr1 uv_bau_message_interrupt | 983 | uv_bau_message_intr1 uv_bau_message_interrupt |
984 | #endif | ||
987 | apicinterrupt LOCAL_TIMER_VECTOR \ | 985 | apicinterrupt LOCAL_TIMER_VECTOR \ |
988 | apic_timer_interrupt smp_apic_timer_interrupt | 986 | apic_timer_interrupt smp_apic_timer_interrupt |
989 | 987 | ||
@@ -1073,10 +1071,10 @@ ENTRY(\sym) | |||
1073 | TRACE_IRQS_OFF | 1071 | TRACE_IRQS_OFF |
1074 | movq %rsp,%rdi /* pt_regs pointer */ | 1072 | movq %rsp,%rdi /* pt_regs pointer */ |
1075 | xorl %esi,%esi /* no error code */ | 1073 | xorl %esi,%esi /* no error code */ |
1076 | movq %gs:pda_data_offset, %rbp | 1074 | PER_CPU(init_tss, %rbp) |
1077 | subq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) | 1075 | subq $EXCEPTION_STKSZ, TSS_ist + (\ist - 1) * 8(%rbp) |
1078 | call \do_sym | 1076 | call \do_sym |
1079 | addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) | 1077 | addq $EXCEPTION_STKSZ, TSS_ist + (\ist - 1) * 8(%rbp) |
1080 | jmp paranoid_exit /* %ebx: no swapgs flag */ | 1078 | jmp paranoid_exit /* %ebx: no swapgs flag */ |
1081 | CFI_ENDPROC | 1079 | CFI_ENDPROC |
1082 | END(\sym) | 1080 | END(\sym) |
@@ -1138,7 +1136,7 @@ ENTRY(native_load_gs_index) | |||
1138 | CFI_STARTPROC | 1136 | CFI_STARTPROC |
1139 | pushf | 1137 | pushf |
1140 | CFI_ADJUST_CFA_OFFSET 8 | 1138 | CFI_ADJUST_CFA_OFFSET 8 |
1141 | DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI)) | 1139 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
1142 | SWAPGS | 1140 | SWAPGS |
1143 | gs_change: | 1141 | gs_change: |
1144 | movl %edi,%gs | 1142 | movl %edi,%gs |
@@ -1260,14 +1258,14 @@ ENTRY(call_softirq) | |||
1260 | CFI_REL_OFFSET rbp,0 | 1258 | CFI_REL_OFFSET rbp,0 |
1261 | mov %rsp,%rbp | 1259 | mov %rsp,%rbp |
1262 | CFI_DEF_CFA_REGISTER rbp | 1260 | CFI_DEF_CFA_REGISTER rbp |
1263 | incl %gs:pda_irqcount | 1261 | incl PER_CPU_VAR(irq_count) |
1264 | cmove %gs:pda_irqstackptr,%rsp | 1262 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
1265 | push %rbp # backlink for old unwinder | 1263 | push %rbp # backlink for old unwinder |
1266 | call __do_softirq | 1264 | call __do_softirq |
1267 | leaveq | 1265 | leaveq |
1268 | CFI_DEF_CFA_REGISTER rsp | 1266 | CFI_DEF_CFA_REGISTER rsp |
1269 | CFI_ADJUST_CFA_OFFSET -8 | 1267 | CFI_ADJUST_CFA_OFFSET -8 |
1270 | decl %gs:pda_irqcount | 1268 | decl PER_CPU_VAR(irq_count) |
1271 | ret | 1269 | ret |
1272 | CFI_ENDPROC | 1270 | CFI_ENDPROC |
1273 | END(call_softirq) | 1271 | END(call_softirq) |
@@ -1297,15 +1295,15 @@ ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) | |||
1297 | movq %rdi, %rsp # we don't return, adjust the stack frame | 1295 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1298 | CFI_ENDPROC | 1296 | CFI_ENDPROC |
1299 | DEFAULT_FRAME | 1297 | DEFAULT_FRAME |
1300 | 11: incl %gs:pda_irqcount | 1298 | 11: incl PER_CPU_VAR(irq_count) |
1301 | movq %rsp,%rbp | 1299 | movq %rsp,%rbp |
1302 | CFI_DEF_CFA_REGISTER rbp | 1300 | CFI_DEF_CFA_REGISTER rbp |
1303 | cmovzq %gs:pda_irqstackptr,%rsp | 1301 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
1304 | pushq %rbp # backlink for old unwinder | 1302 | pushq %rbp # backlink for old unwinder |
1305 | call xen_evtchn_do_upcall | 1303 | call xen_evtchn_do_upcall |
1306 | popq %rsp | 1304 | popq %rsp |
1307 | CFI_DEF_CFA_REGISTER rsp | 1305 | CFI_DEF_CFA_REGISTER rsp |
1308 | decl %gs:pda_irqcount | 1306 | decl PER_CPU_VAR(irq_count) |
1309 | jmp error_exit | 1307 | jmp error_exit |
1310 | CFI_ENDPROC | 1308 | CFI_ENDPROC |
1311 | END(do_hypervisor_callback) | 1309 | END(do_hypervisor_callback) |
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c deleted file mode 100644 index 53699c931ad4..000000000000 --- a/arch/x86/kernel/es7000_32.c +++ /dev/null | |||
@@ -1,378 +0,0 @@ | |||
1 | /* | ||
2 | * Written by: Garry Forsgren, Unisys Corporation | ||
3 | * Natalie Protasevich, Unisys Corporation | ||
4 | * This file contains the code to configure and interface | ||
5 | * with Unisys ES7000 series hardware system manager. | ||
6 | * | ||
7 | * Copyright (c) 2003 Unisys Corporation. All Rights Reserved. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of version 2 of the GNU General Public License as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | * This program is distributed in the hope that it would be useful, but | ||
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along | ||
18 | * with this program; if not, write the Free Software Foundation, Inc., 59 | ||
19 | * Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
20 | * | ||
21 | * Contact information: Unisys Corporation, Township Line & Union Meeting | ||
22 | * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: | ||
23 | * | ||
24 | * http://www.unisys.com | ||
25 | */ | ||
26 | |||
27 | #include <linux/module.h> | ||
28 | #include <linux/types.h> | ||
29 | #include <linux/kernel.h> | ||
30 | #include <linux/smp.h> | ||
31 | #include <linux/string.h> | ||
32 | #include <linux/spinlock.h> | ||
33 | #include <linux/errno.h> | ||
34 | #include <linux/notifier.h> | ||
35 | #include <linux/reboot.h> | ||
36 | #include <linux/init.h> | ||
37 | #include <linux/acpi.h> | ||
38 | #include <asm/io.h> | ||
39 | #include <asm/nmi.h> | ||
40 | #include <asm/smp.h> | ||
41 | #include <asm/atomic.h> | ||
42 | #include <asm/apicdef.h> | ||
43 | #include <mach_mpparse.h> | ||
44 | #include <asm/genapic.h> | ||
45 | #include <asm/setup.h> | ||
46 | |||
47 | /* | ||
48 | * ES7000 chipsets | ||
49 | */ | ||
50 | |||
51 | #define NON_UNISYS 0 | ||
52 | #define ES7000_CLASSIC 1 | ||
53 | #define ES7000_ZORRO 2 | ||
54 | |||
55 | |||
56 | #define MIP_REG 1 | ||
57 | #define MIP_PSAI_REG 4 | ||
58 | |||
59 | #define MIP_BUSY 1 | ||
60 | #define MIP_SPIN 0xf0000 | ||
61 | #define MIP_VALID 0x0100000000000000ULL | ||
62 | #define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff) | ||
63 | |||
64 | #define MIP_RD_LO(VALUE) (VALUE & 0xffffffff) | ||
65 | |||
66 | struct mip_reg_info { | ||
67 | unsigned long long mip_info; | ||
68 | unsigned long long delivery_info; | ||
69 | unsigned long long host_reg; | ||
70 | unsigned long long mip_reg; | ||
71 | }; | ||
72 | |||
73 | struct part_info { | ||
74 | unsigned char type; | ||
75 | unsigned char length; | ||
76 | unsigned char part_id; | ||
77 | unsigned char apic_mode; | ||
78 | unsigned long snum; | ||
79 | char ptype[16]; | ||
80 | char sname[64]; | ||
81 | char pname[64]; | ||
82 | }; | ||
83 | |||
84 | struct psai { | ||
85 | unsigned long long entry_type; | ||
86 | unsigned long long addr; | ||
87 | unsigned long long bep_addr; | ||
88 | }; | ||
89 | |||
90 | struct es7000_mem_info { | ||
91 | unsigned char type; | ||
92 | unsigned char length; | ||
93 | unsigned char resv[6]; | ||
94 | unsigned long long start; | ||
95 | unsigned long long size; | ||
96 | }; | ||
97 | |||
98 | struct es7000_oem_table { | ||
99 | unsigned long long hdr; | ||
100 | struct mip_reg_info mip; | ||
101 | struct part_info pif; | ||
102 | struct es7000_mem_info shm; | ||
103 | struct psai psai; | ||
104 | }; | ||
105 | |||
106 | #ifdef CONFIG_ACPI | ||
107 | |||
108 | struct oem_table { | ||
109 | struct acpi_table_header Header; | ||
110 | u32 OEMTableAddr; | ||
111 | u32 OEMTableSize; | ||
112 | }; | ||
113 | |||
114 | extern int find_unisys_acpi_oem_table(unsigned long *oem_addr); | ||
115 | extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr); | ||
116 | #endif | ||
117 | |||
118 | struct mip_reg { | ||
119 | unsigned long long off_0; | ||
120 | unsigned long long off_8; | ||
121 | unsigned long long off_10; | ||
122 | unsigned long long off_18; | ||
123 | unsigned long long off_20; | ||
124 | unsigned long long off_28; | ||
125 | unsigned long long off_30; | ||
126 | unsigned long long off_38; | ||
127 | }; | ||
128 | |||
129 | #define MIP_SW_APIC 0x1020b | ||
130 | #define MIP_FUNC(VALUE) (VALUE & 0xff) | ||
131 | |||
132 | /* | ||
133 | * ES7000 Globals | ||
134 | */ | ||
135 | |||
136 | static volatile unsigned long *psai = NULL; | ||
137 | static struct mip_reg *mip_reg; | ||
138 | static struct mip_reg *host_reg; | ||
139 | static int mip_port; | ||
140 | static unsigned long mip_addr, host_addr; | ||
141 | |||
142 | int es7000_plat; | ||
143 | |||
144 | /* | ||
145 | * GSI override for ES7000 platforms. | ||
146 | */ | ||
147 | |||
148 | static unsigned int base; | ||
149 | |||
150 | static int | ||
151 | es7000_rename_gsi(int ioapic, int gsi) | ||
152 | { | ||
153 | if (es7000_plat == ES7000_ZORRO) | ||
154 | return gsi; | ||
155 | |||
156 | if (!base) { | ||
157 | int i; | ||
158 | for (i = 0; i < nr_ioapics; i++) | ||
159 | base += nr_ioapic_registers[i]; | ||
160 | } | ||
161 | |||
162 | if (!ioapic && (gsi < 16)) | ||
163 | gsi += base; | ||
164 | return gsi; | ||
165 | } | ||
166 | |||
167 | static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) | ||
168 | { | ||
169 | unsigned long vect = 0, psaival = 0; | ||
170 | |||
171 | if (psai == NULL) | ||
172 | return -1; | ||
173 | |||
174 | vect = ((unsigned long)__pa(eip)/0x1000) << 16; | ||
175 | psaival = (0x1000000 | vect | cpu); | ||
176 | |||
177 | while (*psai & 0x1000000) | ||
178 | ; | ||
179 | |||
180 | *psai = psaival; | ||
181 | |||
182 | return 0; | ||
183 | } | ||
184 | |||
185 | static void noop_wait_for_deassert(atomic_t *deassert_not_used) | ||
186 | { | ||
187 | } | ||
188 | |||
189 | static int __init es7000_update_genapic(void) | ||
190 | { | ||
191 | genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip; | ||
192 | |||
193 | /* MPENTIUMIII */ | ||
194 | if (boot_cpu_data.x86 == 6 && | ||
195 | (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) { | ||
196 | es7000_update_genapic_to_cluster(); | ||
197 | genapic->wait_for_init_deassert = noop_wait_for_deassert; | ||
198 | genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip; | ||
199 | } | ||
200 | |||
201 | return 0; | ||
202 | } | ||
203 | |||
204 | void __init | ||
205 | setup_unisys(void) | ||
206 | { | ||
207 | /* | ||
208 | * Determine the generation of the ES7000 currently running. | ||
209 | * | ||
210 | * es7000_plat = 1 if the machine is a 5xx ES7000 box | ||
211 | * es7000_plat = 2 if the machine is a x86_64 ES7000 box | ||
212 | * | ||
213 | */ | ||
214 | if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2)) | ||
215 | es7000_plat = ES7000_ZORRO; | ||
216 | else | ||
217 | es7000_plat = ES7000_CLASSIC; | ||
218 | ioapic_renumber_irq = es7000_rename_gsi; | ||
219 | |||
220 | x86_quirks->update_genapic = es7000_update_genapic; | ||
221 | } | ||
222 | |||
223 | /* | ||
224 | * Parse the OEM Table | ||
225 | */ | ||
226 | |||
227 | int __init | ||
228 | parse_unisys_oem (char *oemptr) | ||
229 | { | ||
230 | int i; | ||
231 | int success = 0; | ||
232 | unsigned char type, size; | ||
233 | unsigned long val; | ||
234 | char *tp = NULL; | ||
235 | struct psai *psaip = NULL; | ||
236 | struct mip_reg_info *mi; | ||
237 | struct mip_reg *host, *mip; | ||
238 | |||
239 | tp = oemptr; | ||
240 | |||
241 | tp += 8; | ||
242 | |||
243 | for (i=0; i <= 6; i++) { | ||
244 | type = *tp++; | ||
245 | size = *tp++; | ||
246 | tp -= 2; | ||
247 | switch (type) { | ||
248 | case MIP_REG: | ||
249 | mi = (struct mip_reg_info *)tp; | ||
250 | val = MIP_RD_LO(mi->host_reg); | ||
251 | host_addr = val; | ||
252 | host = (struct mip_reg *)val; | ||
253 | host_reg = __va(host); | ||
254 | val = MIP_RD_LO(mi->mip_reg); | ||
255 | mip_port = MIP_PORT(mi->mip_info); | ||
256 | mip_addr = val; | ||
257 | mip = (struct mip_reg *)val; | ||
258 | mip_reg = __va(mip); | ||
259 | pr_debug("es7000_mipcfg: host_reg = 0x%lx \n", | ||
260 | (unsigned long)host_reg); | ||
261 | pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n", | ||
262 | (unsigned long)mip_reg); | ||
263 | success++; | ||
264 | break; | ||
265 | case MIP_PSAI_REG: | ||
266 | psaip = (struct psai *)tp; | ||
267 | if (tp != NULL) { | ||
268 | if (psaip->addr) | ||
269 | psai = __va(psaip->addr); | ||
270 | else | ||
271 | psai = NULL; | ||
272 | success++; | ||
273 | } | ||
274 | break; | ||
275 | default: | ||
276 | break; | ||
277 | } | ||
278 | tp += size; | ||
279 | } | ||
280 | |||
281 | if (success < 2) { | ||
282 | es7000_plat = NON_UNISYS; | ||
283 | } else | ||
284 | setup_unisys(); | ||
285 | return es7000_plat; | ||
286 | } | ||
287 | |||
288 | #ifdef CONFIG_ACPI | ||
289 | static unsigned long oem_addrX; | ||
290 | static unsigned long oem_size; | ||
291 | int __init find_unisys_acpi_oem_table(unsigned long *oem_addr) | ||
292 | { | ||
293 | struct acpi_table_header *header = NULL; | ||
294 | int i = 0; | ||
295 | |||
296 | while (ACPI_SUCCESS(acpi_get_table("OEM1", i++, &header))) { | ||
297 | if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) { | ||
298 | struct oem_table *t = (struct oem_table *)header; | ||
299 | |||
300 | oem_addrX = t->OEMTableAddr; | ||
301 | oem_size = t->OEMTableSize; | ||
302 | |||
303 | *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, | ||
304 | oem_size); | ||
305 | return 0; | ||
306 | } | ||
307 | } | ||
308 | return -1; | ||
309 | } | ||
310 | |||
311 | void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr) | ||
312 | { | ||
313 | } | ||
314 | #endif | ||
315 | |||
316 | static void | ||
317 | es7000_spin(int n) | ||
318 | { | ||
319 | int i = 0; | ||
320 | |||
321 | while (i++ < n) | ||
322 | rep_nop(); | ||
323 | } | ||
324 | |||
325 | static int __init | ||
326 | es7000_mip_write(struct mip_reg *mip_reg) | ||
327 | { | ||
328 | int status = 0; | ||
329 | int spin; | ||
330 | |||
331 | spin = MIP_SPIN; | ||
332 | while (((unsigned long long)host_reg->off_38 & | ||
333 | (unsigned long long)MIP_VALID) != 0) { | ||
334 | if (--spin <= 0) { | ||
335 | printk("es7000_mip_write: Timeout waiting for Host Valid Flag"); | ||
336 | return -1; | ||
337 | } | ||
338 | es7000_spin(MIP_SPIN); | ||
339 | } | ||
340 | |||
341 | memcpy(host_reg, mip_reg, sizeof(struct mip_reg)); | ||
342 | outb(1, mip_port); | ||
343 | |||
344 | spin = MIP_SPIN; | ||
345 | |||
346 | while (((unsigned long long)mip_reg->off_38 & | ||
347 | (unsigned long long)MIP_VALID) == 0) { | ||
348 | if (--spin <= 0) { | ||
349 | printk("es7000_mip_write: Timeout waiting for MIP Valid Flag"); | ||
350 | return -1; | ||
351 | } | ||
352 | es7000_spin(MIP_SPIN); | ||
353 | } | ||
354 | |||
355 | status = ((unsigned long long)mip_reg->off_0 & | ||
356 | (unsigned long long)0xffff0000000000ULL) >> 48; | ||
357 | mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 & | ||
358 | (unsigned long long)~MIP_VALID); | ||
359 | return status; | ||
360 | } | ||
361 | |||
362 | void __init | ||
363 | es7000_sw_apic(void) | ||
364 | { | ||
365 | if (es7000_plat) { | ||
366 | int mip_status; | ||
367 | struct mip_reg es7000_mip_reg; | ||
368 | |||
369 | printk("ES7000: Enabling APIC mode.\n"); | ||
370 | memset(&es7000_mip_reg, 0, sizeof(struct mip_reg)); | ||
371 | es7000_mip_reg.off_0 = MIP_SW_APIC; | ||
372 | es7000_mip_reg.off_38 = (MIP_VALID); | ||
373 | while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) | ||
374 | printk("es7000_sw_apic: command failed, status = %x\n", | ||
375 | mip_status); | ||
376 | return; | ||
377 | } | ||
378 | } | ||
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index b9a4d8c4b935..f5b272247690 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c | |||
@@ -26,27 +26,6 @@ | |||
26 | #include <asm/bios_ebda.h> | 26 | #include <asm/bios_ebda.h> |
27 | #include <asm/trampoline.h> | 27 | #include <asm/trampoline.h> |
28 | 28 | ||
29 | /* boot cpu pda */ | ||
30 | static struct x8664_pda _boot_cpu_pda; | ||
31 | |||
32 | #ifdef CONFIG_SMP | ||
33 | /* | ||
34 | * We install an empty cpu_pda pointer table to indicate to early users | ||
35 | * (numa_set_node) that the cpu_pda pointer table for cpus other than | ||
36 | * the boot cpu is not yet setup. | ||
37 | */ | ||
38 | static struct x8664_pda *__cpu_pda[NR_CPUS] __initdata; | ||
39 | #else | ||
40 | static struct x8664_pda *__cpu_pda[NR_CPUS] __read_mostly; | ||
41 | #endif | ||
42 | |||
43 | void __init x86_64_init_pda(void) | ||
44 | { | ||
45 | _cpu_pda = __cpu_pda; | ||
46 | cpu_pda(0) = &_boot_cpu_pda; | ||
47 | pda_init(0); | ||
48 | } | ||
49 | |||
50 | static void __init zap_identity_mappings(void) | 29 | static void __init zap_identity_mappings(void) |
51 | { | 30 | { |
52 | pgd_t *pgd = pgd_offset_k(0UL); | 31 | pgd_t *pgd = pgd_offset_k(0UL); |
@@ -112,8 +91,6 @@ void __init x86_64_start_kernel(char * real_mode_data) | |||
112 | if (console_loglevel == 10) | 91 | if (console_loglevel == 10) |
113 | early_printk("Kernel alive\n"); | 92 | early_printk("Kernel alive\n"); |
114 | 93 | ||
115 | x86_64_init_pda(); | ||
116 | |||
117 | x86_64_start_reservations(real_mode_data); | 94 | x86_64_start_reservations(real_mode_data); |
118 | } | 95 | } |
119 | 96 | ||
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S index e835b4eea70b..c32ca19d591a 100644 --- a/arch/x86/kernel/head_32.S +++ b/arch/x86/kernel/head_32.S | |||
@@ -11,14 +11,15 @@ | |||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/linkage.h> | 12 | #include <linux/linkage.h> |
13 | #include <asm/segment.h> | 13 | #include <asm/segment.h> |
14 | #include <asm/page.h> | 14 | #include <asm/page_types.h> |
15 | #include <asm/pgtable.h> | 15 | #include <asm/pgtable_types.h> |
16 | #include <asm/desc.h> | 16 | #include <asm/desc.h> |
17 | #include <asm/cache.h> | 17 | #include <asm/cache.h> |
18 | #include <asm/thread_info.h> | 18 | #include <asm/thread_info.h> |
19 | #include <asm/asm-offsets.h> | 19 | #include <asm/asm-offsets.h> |
20 | #include <asm/setup.h> | 20 | #include <asm/setup.h> |
21 | #include <asm/processor-flags.h> | 21 | #include <asm/processor-flags.h> |
22 | #include <asm/percpu.h> | ||
22 | 23 | ||
23 | /* Physical address */ | 24 | /* Physical address */ |
24 | #define pa(X) ((X) - __PAGE_OFFSET) | 25 | #define pa(X) ((X) - __PAGE_OFFSET) |
@@ -429,14 +430,34 @@ is386: movl $2,%ecx # set MP | |||
429 | ljmp $(__KERNEL_CS),$1f | 430 | ljmp $(__KERNEL_CS),$1f |
430 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers | 431 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers |
431 | movl %eax,%ss # after changing gdt. | 432 | movl %eax,%ss # after changing gdt. |
432 | movl %eax,%fs # gets reset once there's real percpu | ||
433 | 433 | ||
434 | movl $(__USER_DS),%eax # DS/ES contains default USER segment | 434 | movl $(__USER_DS),%eax # DS/ES contains default USER segment |
435 | movl %eax,%ds | 435 | movl %eax,%ds |
436 | movl %eax,%es | 436 | movl %eax,%es |
437 | 437 | ||
438 | xorl %eax,%eax # Clear GS and LDT | 438 | movl $(__KERNEL_PERCPU), %eax |
439 | movl %eax,%fs # set this cpu's percpu | ||
440 | |||
441 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
442 | /* | ||
443 | * The linker can't handle this by relocation. Manually set | ||
444 | * base address in stack canary segment descriptor. | ||
445 | */ | ||
446 | cmpb $0,ready | ||
447 | jne 1f | ||
448 | movl $per_cpu__gdt_page,%eax | ||
449 | movl $per_cpu__stack_canary,%ecx | ||
450 | subl $20, %ecx | ||
451 | movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) | ||
452 | shrl $16, %ecx | ||
453 | movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) | ||
454 | movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) | ||
455 | 1: | ||
456 | #endif | ||
457 | movl $(__KERNEL_STACK_CANARY),%eax | ||
439 | movl %eax,%gs | 458 | movl %eax,%gs |
459 | |||
460 | xorl %eax,%eax # Clear LDT | ||
440 | lldt %ax | 461 | lldt %ax |
441 | 462 | ||
442 | cld # gcc2 wants the direction flag cleared at all times | 463 | cld # gcc2 wants the direction flag cleared at all times |
@@ -446,8 +467,6 @@ is386: movl $2,%ecx # set MP | |||
446 | movb $1, ready | 467 | movb $1, ready |
447 | cmpb $0,%cl # the first CPU calls start_kernel | 468 | cmpb $0,%cl # the first CPU calls start_kernel |
448 | je 1f | 469 | je 1f |
449 | movl $(__KERNEL_PERCPU), %eax | ||
450 | movl %eax,%fs # set this cpu's percpu | ||
451 | movl (stack_start), %esp | 470 | movl (stack_start), %esp |
452 | 1: | 471 | 1: |
453 | #endif /* CONFIG_SMP */ | 472 | #endif /* CONFIG_SMP */ |
@@ -548,12 +567,8 @@ early_fault: | |||
548 | pushl %eax | 567 | pushl %eax |
549 | pushl %edx /* trapno */ | 568 | pushl %edx /* trapno */ |
550 | pushl $fault_msg | 569 | pushl $fault_msg |
551 | #ifdef CONFIG_EARLY_PRINTK | ||
552 | call early_printk | ||
553 | #else | ||
554 | call printk | 570 | call printk |
555 | #endif | 571 | #endif |
556 | #endif | ||
557 | call dump_stack | 572 | call dump_stack |
558 | hlt_loop: | 573 | hlt_loop: |
559 | hlt | 574 | hlt |
@@ -580,11 +595,10 @@ ignore_int: | |||
580 | pushl 32(%esp) | 595 | pushl 32(%esp) |
581 | pushl 40(%esp) | 596 | pushl 40(%esp) |
582 | pushl $int_msg | 597 | pushl $int_msg |
583 | #ifdef CONFIG_EARLY_PRINTK | ||
584 | call early_printk | ||
585 | #else | ||
586 | call printk | 598 | call printk |
587 | #endif | 599 | |
600 | call dump_stack | ||
601 | |||
588 | addl $(5*4),%esp | 602 | addl $(5*4),%esp |
589 | popl %ds | 603 | popl %ds |
590 | popl %es | 604 | popl %es |
@@ -660,7 +674,7 @@ early_recursion_flag: | |||
660 | .long 0 | 674 | .long 0 |
661 | 675 | ||
662 | int_msg: | 676 | int_msg: |
663 | .asciz "Unknown interrupt or fault at EIP %p %p %p\n" | 677 | .asciz "Unknown interrupt or fault at: %p %p %p\n" |
664 | 678 | ||
665 | fault_msg: | 679 | fault_msg: |
666 | /* fault info: */ | 680 | /* fault info: */ |
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 0e275d495563..54b29bb24e71 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <asm/msr.h> | 19 | #include <asm/msr.h> |
20 | #include <asm/cache.h> | 20 | #include <asm/cache.h> |
21 | #include <asm/processor-flags.h> | 21 | #include <asm/processor-flags.h> |
22 | #include <asm/percpu.h> | ||
22 | 23 | ||
23 | #ifdef CONFIG_PARAVIRT | 24 | #ifdef CONFIG_PARAVIRT |
24 | #include <asm/asm-offsets.h> | 25 | #include <asm/asm-offsets.h> |
@@ -226,12 +227,15 @@ ENTRY(secondary_startup_64) | |||
226 | movl %eax,%fs | 227 | movl %eax,%fs |
227 | movl %eax,%gs | 228 | movl %eax,%gs |
228 | 229 | ||
229 | /* | 230 | /* Set up %gs. |
230 | * Setup up a dummy PDA. this is just for some early bootup code | 231 | * |
231 | * that does in_interrupt() | 232 | * The base of %gs always points to the bottom of the irqstack |
232 | */ | 233 | * union. If the stack protector canary is enabled, it is |
234 | * located at %gs:40. Note that, on SMP, the boot cpu uses | ||
235 | * init data section till per cpu areas are set up. | ||
236 | */ | ||
233 | movl $MSR_GS_BASE,%ecx | 237 | movl $MSR_GS_BASE,%ecx |
234 | movq $empty_zero_page,%rax | 238 | movq initial_gs(%rip),%rax |
235 | movq %rax,%rdx | 239 | movq %rax,%rdx |
236 | shrq $32,%rdx | 240 | shrq $32,%rdx |
237 | wrmsr | 241 | wrmsr |
@@ -257,6 +261,8 @@ ENTRY(secondary_startup_64) | |||
257 | .align 8 | 261 | .align 8 |
258 | ENTRY(initial_code) | 262 | ENTRY(initial_code) |
259 | .quad x86_64_start_kernel | 263 | .quad x86_64_start_kernel |
264 | ENTRY(initial_gs) | ||
265 | .quad INIT_PER_CPU_VAR(irq_stack_union) | ||
260 | __FINITDATA | 266 | __FINITDATA |
261 | 267 | ||
262 | ENTRY(stack_start) | 268 | ENTRY(stack_start) |
@@ -323,8 +329,6 @@ early_idt_ripmsg: | |||
323 | #endif /* CONFIG_EARLY_PRINTK */ | 329 | #endif /* CONFIG_EARLY_PRINTK */ |
324 | .previous | 330 | .previous |
325 | 331 | ||
326 | .balign PAGE_SIZE | ||
327 | |||
328 | #define NEXT_PAGE(name) \ | 332 | #define NEXT_PAGE(name) \ |
329 | .balign PAGE_SIZE; \ | 333 | .balign PAGE_SIZE; \ |
330 | ENTRY(name) | 334 | ENTRY(name) |
@@ -401,7 +405,8 @@ NEXT_PAGE(level2_spare_pgt) | |||
401 | .globl early_gdt_descr | 405 | .globl early_gdt_descr |
402 | early_gdt_descr: | 406 | early_gdt_descr: |
403 | .word GDT_ENTRIES*8-1 | 407 | .word GDT_ENTRIES*8-1 |
404 | .quad per_cpu__gdt_page | 408 | early_gdt_descr_base: |
409 | .quad INIT_PER_CPU_VAR(gdt_page) | ||
405 | 410 | ||
406 | ENTRY(phys_base) | 411 | ENTRY(phys_base) |
407 | /* This must match the first entry in level2_kernel_pgt */ | 412 | /* This must match the first entry in level2_kernel_pgt */ |
@@ -412,7 +417,7 @@ ENTRY(phys_base) | |||
412 | .section .bss, "aw", @nobits | 417 | .section .bss, "aw", @nobits |
413 | .align L1_CACHE_BYTES | 418 | .align L1_CACHE_BYTES |
414 | ENTRY(idt_table) | 419 | ENTRY(idt_table) |
415 | .skip 256 * 16 | 420 | .skip IDT_ENTRIES * 16 |
416 | 421 | ||
417 | .section .bss.page_aligned, "aw", @nobits | 422 | .section .bss.page_aligned, "aw", @nobits |
418 | .align PAGE_SIZE | 423 | .align PAGE_SIZE |
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c index 11d5093eb281..df89102bef80 100644 --- a/arch/x86/kernel/i8259.c +++ b/arch/x86/kernel/i8259.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <asm/pgtable.h> | 22 | #include <asm/pgtable.h> |
23 | #include <asm/desc.h> | 23 | #include <asm/desc.h> |
24 | #include <asm/apic.h> | 24 | #include <asm/apic.h> |
25 | #include <asm/arch_hooks.h> | ||
26 | #include <asm/i8259.h> | 25 | #include <asm/i8259.h> |
27 | 26 | ||
28 | /* | 27 | /* |
diff --git a/arch/x86/kernel/ioport.c b/arch/x86/kernel/ioport.c index b12208f4dfee..99c4d308f16b 100644 --- a/arch/x86/kernel/ioport.c +++ b/arch/x86/kernel/ioport.c | |||
@@ -85,19 +85,8 @@ asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on) | |||
85 | 85 | ||
86 | t->io_bitmap_max = bytes; | 86 | t->io_bitmap_max = bytes; |
87 | 87 | ||
88 | #ifdef CONFIG_X86_32 | ||
89 | /* | ||
90 | * Sets the lazy trigger so that the next I/O operation will | ||
91 | * reload the correct bitmap. | ||
92 | * Reset the owner so that a process switch will not set | ||
93 | * tss->io_bitmap_base to IO_BITMAP_OFFSET. | ||
94 | */ | ||
95 | tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET_LAZY; | ||
96 | tss->io_bitmap_owner = NULL; | ||
97 | #else | ||
98 | /* Update the TSS: */ | 88 | /* Update the TSS: */ |
99 | memcpy(tss->io_bitmap, t->io_bitmap_ptr, bytes_updated); | 89 | memcpy(tss->io_bitmap, t->io_bitmap_ptr, bytes_updated); |
100 | #endif | ||
101 | 90 | ||
102 | put_cpu(); | 91 | put_cpu(); |
103 | 92 | ||
@@ -131,9 +120,8 @@ static int do_iopl(unsigned int level, struct pt_regs *regs) | |||
131 | } | 120 | } |
132 | 121 | ||
133 | #ifdef CONFIG_X86_32 | 122 | #ifdef CONFIG_X86_32 |
134 | asmlinkage long sys_iopl(unsigned long regsp) | 123 | long sys_iopl(struct pt_regs *regs) |
135 | { | 124 | { |
136 | struct pt_regs *regs = (struct pt_regs *)®sp; | ||
137 | unsigned int level = regs->bx; | 125 | unsigned int level = regs->bx; |
138 | struct thread_struct *t = ¤t->thread; | 126 | struct thread_struct *t = ¤t->thread; |
139 | int rc; | 127 | int rc; |
diff --git a/arch/x86/kernel/ipi.c b/arch/x86/kernel/ipi.c deleted file mode 100644 index 285bbf8831fa..000000000000 --- a/arch/x86/kernel/ipi.c +++ /dev/null | |||
@@ -1,190 +0,0 @@ | |||
1 | #include <linux/cpumask.h> | ||
2 | #include <linux/interrupt.h> | ||
3 | #include <linux/init.h> | ||
4 | |||
5 | #include <linux/mm.h> | ||
6 | #include <linux/delay.h> | ||
7 | #include <linux/spinlock.h> | ||
8 | #include <linux/kernel_stat.h> | ||
9 | #include <linux/mc146818rtc.h> | ||
10 | #include <linux/cache.h> | ||
11 | #include <linux/cpu.h> | ||
12 | #include <linux/module.h> | ||
13 | |||
14 | #include <asm/smp.h> | ||
15 | #include <asm/mtrr.h> | ||
16 | #include <asm/tlbflush.h> | ||
17 | #include <asm/mmu_context.h> | ||
18 | #include <asm/apic.h> | ||
19 | #include <asm/proto.h> | ||
20 | |||
21 | #ifdef CONFIG_X86_32 | ||
22 | #include <mach_apic.h> | ||
23 | #include <mach_ipi.h> | ||
24 | |||
25 | /* | ||
26 | * the following functions deal with sending IPIs between CPUs. | ||
27 | * | ||
28 | * We use 'broadcast', CPU->CPU IPIs and self-IPIs too. | ||
29 | */ | ||
30 | |||
31 | static inline int __prepare_ICR(unsigned int shortcut, int vector) | ||
32 | { | ||
33 | unsigned int icr = shortcut | APIC_DEST_LOGICAL; | ||
34 | |||
35 | switch (vector) { | ||
36 | default: | ||
37 | icr |= APIC_DM_FIXED | vector; | ||
38 | break; | ||
39 | case NMI_VECTOR: | ||
40 | icr |= APIC_DM_NMI; | ||
41 | break; | ||
42 | } | ||
43 | return icr; | ||
44 | } | ||
45 | |||
46 | static inline int __prepare_ICR2(unsigned int mask) | ||
47 | { | ||
48 | return SET_APIC_DEST_FIELD(mask); | ||
49 | } | ||
50 | |||
51 | void __send_IPI_shortcut(unsigned int shortcut, int vector) | ||
52 | { | ||
53 | /* | ||
54 | * Subtle. In the case of the 'never do double writes' workaround | ||
55 | * we have to lock out interrupts to be safe. As we don't care | ||
56 | * of the value read we use an atomic rmw access to avoid costly | ||
57 | * cli/sti. Otherwise we use an even cheaper single atomic write | ||
58 | * to the APIC. | ||
59 | */ | ||
60 | unsigned int cfg; | ||
61 | |||
62 | /* | ||
63 | * Wait for idle. | ||
64 | */ | ||
65 | apic_wait_icr_idle(); | ||
66 | |||
67 | /* | ||
68 | * No need to touch the target chip field | ||
69 | */ | ||
70 | cfg = __prepare_ICR(shortcut, vector); | ||
71 | |||
72 | /* | ||
73 | * Send the IPI. The write to APIC_ICR fires this off. | ||
74 | */ | ||
75 | apic_write(APIC_ICR, cfg); | ||
76 | } | ||
77 | |||
78 | void send_IPI_self(int vector) | ||
79 | { | ||
80 | __send_IPI_shortcut(APIC_DEST_SELF, vector); | ||
81 | } | ||
82 | |||
83 | /* | ||
84 | * This is used to send an IPI with no shorthand notation (the destination is | ||
85 | * specified in bits 56 to 63 of the ICR). | ||
86 | */ | ||
87 | static inline void __send_IPI_dest_field(unsigned long mask, int vector) | ||
88 | { | ||
89 | unsigned long cfg; | ||
90 | |||
91 | /* | ||
92 | * Wait for idle. | ||
93 | */ | ||
94 | if (unlikely(vector == NMI_VECTOR)) | ||
95 | safe_apic_wait_icr_idle(); | ||
96 | else | ||
97 | apic_wait_icr_idle(); | ||
98 | |||
99 | /* | ||
100 | * prepare target chip field | ||
101 | */ | ||
102 | cfg = __prepare_ICR2(mask); | ||
103 | apic_write(APIC_ICR2, cfg); | ||
104 | |||
105 | /* | ||
106 | * program the ICR | ||
107 | */ | ||
108 | cfg = __prepare_ICR(0, vector); | ||
109 | |||
110 | /* | ||
111 | * Send the IPI. The write to APIC_ICR fires this off. | ||
112 | */ | ||
113 | apic_write(APIC_ICR, cfg); | ||
114 | } | ||
115 | |||
116 | /* | ||
117 | * This is only used on smaller machines. | ||
118 | */ | ||
119 | void send_IPI_mask_bitmask(const struct cpumask *cpumask, int vector) | ||
120 | { | ||
121 | unsigned long mask = cpumask_bits(cpumask)[0]; | ||
122 | unsigned long flags; | ||
123 | |||
124 | local_irq_save(flags); | ||
125 | WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]); | ||
126 | __send_IPI_dest_field(mask, vector); | ||
127 | local_irq_restore(flags); | ||
128 | } | ||
129 | |||
130 | void send_IPI_mask_sequence(const struct cpumask *mask, int vector) | ||
131 | { | ||
132 | unsigned long flags; | ||
133 | unsigned int query_cpu; | ||
134 | |||
135 | /* | ||
136 | * Hack. The clustered APIC addressing mode doesn't allow us to send | ||
137 | * to an arbitrary mask, so I do a unicasts to each CPU instead. This | ||
138 | * should be modified to do 1 message per cluster ID - mbligh | ||
139 | */ | ||
140 | |||
141 | local_irq_save(flags); | ||
142 | for_each_cpu(query_cpu, mask) | ||
143 | __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), vector); | ||
144 | local_irq_restore(flags); | ||
145 | } | ||
146 | |||
147 | void send_IPI_mask_allbutself(const struct cpumask *mask, int vector) | ||
148 | { | ||
149 | unsigned long flags; | ||
150 | unsigned int query_cpu; | ||
151 | unsigned int this_cpu = smp_processor_id(); | ||
152 | |||
153 | /* See Hack comment above */ | ||
154 | |||
155 | local_irq_save(flags); | ||
156 | for_each_cpu(query_cpu, mask) | ||
157 | if (query_cpu != this_cpu) | ||
158 | __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), | ||
159 | vector); | ||
160 | local_irq_restore(flags); | ||
161 | } | ||
162 | |||
163 | /* must come after the send_IPI functions above for inlining */ | ||
164 | static int convert_apicid_to_cpu(int apic_id) | ||
165 | { | ||
166 | int i; | ||
167 | |||
168 | for_each_possible_cpu(i) { | ||
169 | if (per_cpu(x86_cpu_to_apicid, i) == apic_id) | ||
170 | return i; | ||
171 | } | ||
172 | return -1; | ||
173 | } | ||
174 | |||
175 | int safe_smp_processor_id(void) | ||
176 | { | ||
177 | int apicid, cpuid; | ||
178 | |||
179 | if (!boot_cpu_has(X86_FEATURE_APIC)) | ||
180 | return 0; | ||
181 | |||
182 | apicid = hard_smp_processor_id(); | ||
183 | if (apicid == BAD_APICID) | ||
184 | return 0; | ||
185 | |||
186 | cpuid = convert_apicid_to_cpu(apicid); | ||
187 | |||
188 | return cpuid >= 0 ? cpuid : 0; | ||
189 | } | ||
190 | #endif | ||
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c index 3973e2df7f87..f13ca1650aaf 100644 --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c | |||
@@ -6,10 +6,12 @@ | |||
6 | #include <linux/kernel_stat.h> | 6 | #include <linux/kernel_stat.h> |
7 | #include <linux/seq_file.h> | 7 | #include <linux/seq_file.h> |
8 | #include <linux/smp.h> | 8 | #include <linux/smp.h> |
9 | #include <linux/ftrace.h> | ||
9 | 10 | ||
10 | #include <asm/apic.h> | 11 | #include <asm/apic.h> |
11 | #include <asm/io_apic.h> | 12 | #include <asm/io_apic.h> |
12 | #include <asm/irq.h> | 13 | #include <asm/irq.h> |
14 | #include <asm/idle.h> | ||
13 | 15 | ||
14 | atomic_t irq_err_count; | 16 | atomic_t irq_err_count; |
15 | 17 | ||
@@ -36,11 +38,7 @@ void ack_bad_irq(unsigned int irq) | |||
36 | #endif | 38 | #endif |
37 | } | 39 | } |
38 | 40 | ||
39 | #ifdef CONFIG_X86_32 | 41 | #define irq_stats(x) (&per_cpu(irq_stat, x)) |
40 | # define irq_stats(x) (&per_cpu(irq_stat, x)) | ||
41 | #else | ||
42 | # define irq_stats(x) cpu_pda(x) | ||
43 | #endif | ||
44 | /* | 42 | /* |
45 | * /proc/interrupts printing: | 43 | * /proc/interrupts printing: |
46 | */ | 44 | */ |
@@ -192,4 +190,40 @@ u64 arch_irq_stat(void) | |||
192 | return sum; | 190 | return sum; |
193 | } | 191 | } |
194 | 192 | ||
193 | |||
194 | /* | ||
195 | * do_IRQ handles all normal device IRQ's (the special | ||
196 | * SMP cross-CPU interrupts have their own specific | ||
197 | * handlers). | ||
198 | */ | ||
199 | unsigned int __irq_entry do_IRQ(struct pt_regs *regs) | ||
200 | { | ||
201 | struct pt_regs *old_regs = set_irq_regs(regs); | ||
202 | |||
203 | /* high bit used in ret_from_ code */ | ||
204 | unsigned vector = ~regs->orig_ax; | ||
205 | unsigned irq; | ||
206 | |||
207 | exit_idle(); | ||
208 | irq_enter(); | ||
209 | |||
210 | irq = __get_cpu_var(vector_irq)[vector]; | ||
211 | |||
212 | if (!handle_irq(irq, regs)) { | ||
213 | #ifdef CONFIG_X86_64 | ||
214 | if (!disable_apic) | ||
215 | ack_APIC_irq(); | ||
216 | #endif | ||
217 | |||
218 | if (printk_ratelimit()) | ||
219 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n", | ||
220 | __func__, smp_processor_id(), vector, irq); | ||
221 | } | ||
222 | |||
223 | irq_exit(); | ||
224 | |||
225 | set_irq_regs(old_regs); | ||
226 | return 1; | ||
227 | } | ||
228 | |||
195 | EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq); | 229 | EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq); |
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c index 74b9ff7341e9..3b09634a5153 100644 --- a/arch/x86/kernel/irq_32.c +++ b/arch/x86/kernel/irq_32.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/cpu.h> | 16 | #include <linux/cpu.h> |
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/uaccess.h> | 18 | #include <linux/uaccess.h> |
19 | #include <linux/percpu.h> | ||
19 | 20 | ||
20 | #include <asm/apic.h> | 21 | #include <asm/apic.h> |
21 | 22 | ||
@@ -55,13 +56,13 @@ static inline void print_stack_overflow(void) { } | |||
55 | union irq_ctx { | 56 | union irq_ctx { |
56 | struct thread_info tinfo; | 57 | struct thread_info tinfo; |
57 | u32 stack[THREAD_SIZE/sizeof(u32)]; | 58 | u32 stack[THREAD_SIZE/sizeof(u32)]; |
58 | }; | 59 | } __attribute__((aligned(PAGE_SIZE))); |
59 | 60 | ||
60 | static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly; | 61 | static DEFINE_PER_CPU(union irq_ctx *, hardirq_ctx); |
61 | static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; | 62 | static DEFINE_PER_CPU(union irq_ctx *, softirq_ctx); |
62 | 63 | ||
63 | static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss; | 64 | static DEFINE_PER_CPU_PAGE_ALIGNED(union irq_ctx, hardirq_stack); |
64 | static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss; | 65 | static DEFINE_PER_CPU_PAGE_ALIGNED(union irq_ctx, softirq_stack); |
65 | 66 | ||
66 | static void call_on_stack(void *func, void *stack) | 67 | static void call_on_stack(void *func, void *stack) |
67 | { | 68 | { |
@@ -81,7 +82,7 @@ execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) | |||
81 | u32 *isp, arg1, arg2; | 82 | u32 *isp, arg1, arg2; |
82 | 83 | ||
83 | curctx = (union irq_ctx *) current_thread_info(); | 84 | curctx = (union irq_ctx *) current_thread_info(); |
84 | irqctx = hardirq_ctx[smp_processor_id()]; | 85 | irqctx = __get_cpu_var(hardirq_ctx); |
85 | 86 | ||
86 | /* | 87 | /* |
87 | * this is where we switch to the IRQ stack. However, if we are | 88 | * this is where we switch to the IRQ stack. However, if we are |
@@ -125,34 +126,34 @@ void __cpuinit irq_ctx_init(int cpu) | |||
125 | { | 126 | { |
126 | union irq_ctx *irqctx; | 127 | union irq_ctx *irqctx; |
127 | 128 | ||
128 | if (hardirq_ctx[cpu]) | 129 | if (per_cpu(hardirq_ctx, cpu)) |
129 | return; | 130 | return; |
130 | 131 | ||
131 | irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE]; | 132 | irqctx = &per_cpu(hardirq_stack, cpu); |
132 | irqctx->tinfo.task = NULL; | 133 | irqctx->tinfo.task = NULL; |
133 | irqctx->tinfo.exec_domain = NULL; | 134 | irqctx->tinfo.exec_domain = NULL; |
134 | irqctx->tinfo.cpu = cpu; | 135 | irqctx->tinfo.cpu = cpu; |
135 | irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; | 136 | irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; |
136 | irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); | 137 | irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); |
137 | 138 | ||
138 | hardirq_ctx[cpu] = irqctx; | 139 | per_cpu(hardirq_ctx, cpu) = irqctx; |
139 | 140 | ||
140 | irqctx = (union irq_ctx *) &softirq_stack[cpu*THREAD_SIZE]; | 141 | irqctx = &per_cpu(softirq_stack, cpu); |
141 | irqctx->tinfo.task = NULL; | 142 | irqctx->tinfo.task = NULL; |
142 | irqctx->tinfo.exec_domain = NULL; | 143 | irqctx->tinfo.exec_domain = NULL; |
143 | irqctx->tinfo.cpu = cpu; | 144 | irqctx->tinfo.cpu = cpu; |
144 | irqctx->tinfo.preempt_count = 0; | 145 | irqctx->tinfo.preempt_count = 0; |
145 | irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); | 146 | irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); |
146 | 147 | ||
147 | softirq_ctx[cpu] = irqctx; | 148 | per_cpu(softirq_ctx, cpu) = irqctx; |
148 | 149 | ||
149 | printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n", | 150 | printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n", |
150 | cpu, hardirq_ctx[cpu], softirq_ctx[cpu]); | 151 | cpu, per_cpu(hardirq_ctx, cpu), per_cpu(softirq_ctx, cpu)); |
151 | } | 152 | } |
152 | 153 | ||
153 | void irq_ctx_exit(int cpu) | 154 | void irq_ctx_exit(int cpu) |
154 | { | 155 | { |
155 | hardirq_ctx[cpu] = NULL; | 156 | per_cpu(hardirq_ctx, cpu) = NULL; |
156 | } | 157 | } |
157 | 158 | ||
158 | asmlinkage void do_softirq(void) | 159 | asmlinkage void do_softirq(void) |
@@ -169,7 +170,7 @@ asmlinkage void do_softirq(void) | |||
169 | 170 | ||
170 | if (local_softirq_pending()) { | 171 | if (local_softirq_pending()) { |
171 | curctx = current_thread_info(); | 172 | curctx = current_thread_info(); |
172 | irqctx = softirq_ctx[smp_processor_id()]; | 173 | irqctx = __get_cpu_var(softirq_ctx); |
173 | irqctx->tinfo.task = curctx->task; | 174 | irqctx->tinfo.task = curctx->task; |
174 | irqctx->tinfo.previous_esp = current_stack_pointer; | 175 | irqctx->tinfo.previous_esp = current_stack_pointer; |
175 | 176 | ||
@@ -191,33 +192,16 @@ static inline int | |||
191 | execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; } | 192 | execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; } |
192 | #endif | 193 | #endif |
193 | 194 | ||
194 | /* | 195 | bool handle_irq(unsigned irq, struct pt_regs *regs) |
195 | * do_IRQ handles all normal device IRQ's (the special | ||
196 | * SMP cross-CPU interrupts have their own specific | ||
197 | * handlers). | ||
198 | */ | ||
199 | unsigned int do_IRQ(struct pt_regs *regs) | ||
200 | { | 196 | { |
201 | struct pt_regs *old_regs; | ||
202 | /* high bit used in ret_from_ code */ | ||
203 | int overflow; | ||
204 | unsigned vector = ~regs->orig_ax; | ||
205 | struct irq_desc *desc; | 197 | struct irq_desc *desc; |
206 | unsigned irq; | 198 | int overflow; |
207 | |||
208 | |||
209 | old_regs = set_irq_regs(regs); | ||
210 | irq_enter(); | ||
211 | irq = __get_cpu_var(vector_irq)[vector]; | ||
212 | 199 | ||
213 | overflow = check_stack_overflow(); | 200 | overflow = check_stack_overflow(); |
214 | 201 | ||
215 | desc = irq_to_desc(irq); | 202 | desc = irq_to_desc(irq); |
216 | if (unlikely(!desc)) { | 203 | if (unlikely(!desc)) |
217 | printk(KERN_EMERG "%s: cannot handle IRQ %d vector %#x cpu %d\n", | 204 | return false; |
218 | __func__, irq, vector, smp_processor_id()); | ||
219 | BUG(); | ||
220 | } | ||
221 | 205 | ||
222 | if (!execute_on_irq_stack(overflow, desc, irq)) { | 206 | if (!execute_on_irq_stack(overflow, desc, irq)) { |
223 | if (unlikely(overflow)) | 207 | if (unlikely(overflow)) |
@@ -225,13 +209,10 @@ unsigned int do_IRQ(struct pt_regs *regs) | |||
225 | desc->handle_irq(irq, desc); | 209 | desc->handle_irq(irq, desc); |
226 | } | 210 | } |
227 | 211 | ||
228 | irq_exit(); | 212 | return true; |
229 | set_irq_regs(old_regs); | ||
230 | return 1; | ||
231 | } | 213 | } |
232 | 214 | ||
233 | #ifdef CONFIG_HOTPLUG_CPU | 215 | #ifdef CONFIG_HOTPLUG_CPU |
234 | #include <mach_apic.h> | ||
235 | 216 | ||
236 | /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */ | 217 | /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */ |
237 | void fixup_irqs(void) | 218 | void fixup_irqs(void) |
@@ -248,7 +229,7 @@ void fixup_irqs(void) | |||
248 | if (irq == 2) | 229 | if (irq == 2) |
249 | continue; | 230 | continue; |
250 | 231 | ||
251 | affinity = &desc->affinity; | 232 | affinity = desc->affinity; |
252 | if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { | 233 | if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { |
253 | printk("Breaking affinity for irq %i\n", irq); | 234 | printk("Breaking affinity for irq %i\n", irq); |
254 | affinity = cpu_all_mask; | 235 | affinity = cpu_all_mask; |
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c index 63c88e6ec025..977d8b43a0dd 100644 --- a/arch/x86/kernel/irq_64.c +++ b/arch/x86/kernel/irq_64.c | |||
@@ -18,6 +18,13 @@ | |||
18 | #include <linux/smp.h> | 18 | #include <linux/smp.h> |
19 | #include <asm/io_apic.h> | 19 | #include <asm/io_apic.h> |
20 | #include <asm/idle.h> | 20 | #include <asm/idle.h> |
21 | #include <asm/apic.h> | ||
22 | |||
23 | DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); | ||
24 | EXPORT_PER_CPU_SYMBOL(irq_stat); | ||
25 | |||
26 | DEFINE_PER_CPU(struct pt_regs *, irq_regs); | ||
27 | EXPORT_PER_CPU_SYMBOL(irq_regs); | ||
21 | 28 | ||
22 | /* | 29 | /* |
23 | * Probabilistic stack overflow check: | 30 | * Probabilistic stack overflow check: |
@@ -41,42 +48,18 @@ static inline void stack_overflow_check(struct pt_regs *regs) | |||
41 | #endif | 48 | #endif |
42 | } | 49 | } |
43 | 50 | ||
44 | /* | 51 | bool handle_irq(unsigned irq, struct pt_regs *regs) |
45 | * do_IRQ handles all normal device IRQ's (the special | ||
46 | * SMP cross-CPU interrupts have their own specific | ||
47 | * handlers). | ||
48 | */ | ||
49 | asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs) | ||
50 | { | 52 | { |
51 | struct pt_regs *old_regs = set_irq_regs(regs); | ||
52 | struct irq_desc *desc; | 53 | struct irq_desc *desc; |
53 | 54 | ||
54 | /* high bit used in ret_from_ code */ | ||
55 | unsigned vector = ~regs->orig_ax; | ||
56 | unsigned irq; | ||
57 | |||
58 | exit_idle(); | ||
59 | irq_enter(); | ||
60 | irq = __get_cpu_var(vector_irq)[vector]; | ||
61 | |||
62 | stack_overflow_check(regs); | 55 | stack_overflow_check(regs); |
63 | 56 | ||
64 | desc = irq_to_desc(irq); | 57 | desc = irq_to_desc(irq); |
65 | if (likely(desc)) | 58 | if (unlikely(!desc)) |
66 | generic_handle_irq_desc(irq, desc); | 59 | return false; |
67 | else { | ||
68 | if (!disable_apic) | ||
69 | ack_APIC_irq(); | ||
70 | |||
71 | if (printk_ratelimit()) | ||
72 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n", | ||
73 | __func__, smp_processor_id(), vector); | ||
74 | } | ||
75 | |||
76 | irq_exit(); | ||
77 | 60 | ||
78 | set_irq_regs(old_regs); | 61 | generic_handle_irq_desc(irq, desc); |
79 | return 1; | 62 | return true; |
80 | } | 63 | } |
81 | 64 | ||
82 | #ifdef CONFIG_HOTPLUG_CPU | 65 | #ifdef CONFIG_HOTPLUG_CPU |
@@ -100,7 +83,7 @@ void fixup_irqs(void) | |||
100 | /* interrupt's are disabled at this point */ | 83 | /* interrupt's are disabled at this point */ |
101 | spin_lock(&desc->lock); | 84 | spin_lock(&desc->lock); |
102 | 85 | ||
103 | affinity = &desc->affinity; | 86 | affinity = desc->affinity; |
104 | if (!irq_has_action(irq) || | 87 | if (!irq_has_action(irq) || |
105 | cpumask_equal(affinity, cpu_online_mask)) { | 88 | cpumask_equal(affinity, cpu_online_mask)) { |
106 | spin_unlock(&desc->lock); | 89 | spin_unlock(&desc->lock); |
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c index 10a09c2f1828..50b8c3a3006c 100644 --- a/arch/x86/kernel/irqinit_32.c +++ b/arch/x86/kernel/irqinit_32.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <asm/pgtable.h> | 18 | #include <asm/pgtable.h> |
19 | #include <asm/desc.h> | 19 | #include <asm/desc.h> |
20 | #include <asm/apic.h> | 20 | #include <asm/apic.h> |
21 | #include <asm/arch_hooks.h> | 21 | #include <asm/setup.h> |
22 | #include <asm/i8259.h> | 22 | #include <asm/i8259.h> |
23 | #include <asm/traps.h> | 23 | #include <asm/traps.h> |
24 | 24 | ||
@@ -78,6 +78,15 @@ void __init init_ISA_irqs(void) | |||
78 | } | 78 | } |
79 | } | 79 | } |
80 | 80 | ||
81 | /* | ||
82 | * IRQ2 is cascade interrupt to second interrupt controller | ||
83 | */ | ||
84 | static struct irqaction irq2 = { | ||
85 | .handler = no_action, | ||
86 | .mask = CPU_MASK_NONE, | ||
87 | .name = "cascade", | ||
88 | }; | ||
89 | |||
81 | DEFINE_PER_CPU(vector_irq_t, vector_irq) = { | 90 | DEFINE_PER_CPU(vector_irq_t, vector_irq) = { |
82 | [0 ... IRQ0_VECTOR - 1] = -1, | 91 | [0 ... IRQ0_VECTOR - 1] = -1, |
83 | [IRQ0_VECTOR] = 0, | 92 | [IRQ0_VECTOR] = 0, |
@@ -118,8 +127,8 @@ void __init native_init_IRQ(void) | |||
118 | { | 127 | { |
119 | int i; | 128 | int i; |
120 | 129 | ||
121 | /* all the set up before the call gates are initialised */ | 130 | /* Execute any quirks before the call gates are initialised: */ |
122 | pre_intr_init_hook(); | 131 | x86_quirk_pre_intr_init(); |
123 | 132 | ||
124 | /* | 133 | /* |
125 | * Cover the whole vector space, no vector can escape | 134 | * Cover the whole vector space, no vector can escape |
@@ -140,8 +149,15 @@ void __init native_init_IRQ(void) | |||
140 | */ | 149 | */ |
141 | alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); | 150 | alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); |
142 | 151 | ||
143 | /* IPI for invalidation */ | 152 | /* IPIs for invalidation */ |
144 | alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt); | 153 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0); |
154 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1); | ||
155 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2); | ||
156 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3); | ||
157 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4); | ||
158 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5); | ||
159 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6); | ||
160 | alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7); | ||
145 | 161 | ||
146 | /* IPI for generic function call */ | 162 | /* IPI for generic function call */ |
147 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); | 163 | alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); |
@@ -169,10 +185,14 @@ void __init native_init_IRQ(void) | |||
169 | alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); | 185 | alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); |
170 | #endif | 186 | #endif |
171 | 187 | ||
172 | /* setup after call gates are initialised (usually add in | 188 | if (!acpi_ioapic) |
173 | * the architecture specific gates) | 189 | setup_irq(2, &irq2); |
190 | |||
191 | /* | ||
192 | * Call quirks after call gates are initialised (usually add in | ||
193 | * the architecture specific gates): | ||
174 | */ | 194 | */ |
175 | intr_init_hook(); | 195 | x86_quirk_intr_init(); |
176 | 196 | ||
177 | /* | 197 | /* |
178 | * External FPU? Set up irq13 if so, for | 198 | * External FPU? Set up irq13 if so, for |
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c index 10435a120d22..eedfaebe1063 100644 --- a/arch/x86/kernel/kgdb.c +++ b/arch/x86/kernel/kgdb.c | |||
@@ -46,7 +46,7 @@ | |||
46 | #include <asm/apicdef.h> | 46 | #include <asm/apicdef.h> |
47 | #include <asm/system.h> | 47 | #include <asm/system.h> |
48 | 48 | ||
49 | #include <mach_ipi.h> | 49 | #include <asm/apic.h> |
50 | 50 | ||
51 | /* | 51 | /* |
52 | * Put the error code here just in case the user cares: | 52 | * Put the error code here just in case the user cares: |
@@ -347,7 +347,7 @@ void kgdb_post_primary_code(struct pt_regs *regs, int e_vector, int err_code) | |||
347 | */ | 347 | */ |
348 | void kgdb_roundup_cpus(unsigned long flags) | 348 | void kgdb_roundup_cpus(unsigned long flags) |
349 | { | 349 | { |
350 | send_IPI_allbutself(APIC_DM_NMI); | 350 | apic->send_IPI_allbutself(APIC_DM_NMI); |
351 | } | 351 | } |
352 | #endif | 352 | #endif |
353 | 353 | ||
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 652fce6d2cce..137f2e8132df 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/clocksource.h> | 19 | #include <linux/clocksource.h> |
20 | #include <linux/kvm_para.h> | 20 | #include <linux/kvm_para.h> |
21 | #include <asm/pvclock.h> | 21 | #include <asm/pvclock.h> |
22 | #include <asm/arch_hooks.h> | ||
23 | #include <asm/msr.h> | 22 | #include <asm/msr.h> |
24 | #include <asm/apic.h> | 23 | #include <asm/apic.h> |
25 | #include <linux/percpu.h> | 24 | #include <linux/percpu.h> |
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c index 37f420018a41..f5fc8c781a62 100644 --- a/arch/x86/kernel/machine_kexec_32.c +++ b/arch/x86/kernel/machine_kexec_32.c | |||
@@ -121,7 +121,7 @@ static void machine_kexec_page_table_set_one( | |||
121 | static void machine_kexec_prepare_page_tables(struct kimage *image) | 121 | static void machine_kexec_prepare_page_tables(struct kimage *image) |
122 | { | 122 | { |
123 | void *control_page; | 123 | void *control_page; |
124 | pmd_t *pmd = 0; | 124 | pmd_t *pmd = NULL; |
125 | 125 | ||
126 | control_page = page_address(image->control_code_page); | 126 | control_page = page_address(image->control_code_page); |
127 | #ifdef CONFIG_X86_PAE | 127 | #ifdef CONFIG_X86_PAE |
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c index c43caa3a91f3..6993d51b7fd8 100644 --- a/arch/x86/kernel/machine_kexec_64.c +++ b/arch/x86/kernel/machine_kexec_64.c | |||
@@ -18,15 +18,6 @@ | |||
18 | #include <asm/mmu_context.h> | 18 | #include <asm/mmu_context.h> |
19 | #include <asm/io.h> | 19 | #include <asm/io.h> |
20 | 20 | ||
21 | #define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE))) | ||
22 | static u64 kexec_pgd[512] PAGE_ALIGNED; | ||
23 | static u64 kexec_pud0[512] PAGE_ALIGNED; | ||
24 | static u64 kexec_pmd0[512] PAGE_ALIGNED; | ||
25 | static u64 kexec_pte0[512] PAGE_ALIGNED; | ||
26 | static u64 kexec_pud1[512] PAGE_ALIGNED; | ||
27 | static u64 kexec_pmd1[512] PAGE_ALIGNED; | ||
28 | static u64 kexec_pte1[512] PAGE_ALIGNED; | ||
29 | |||
30 | static void init_level2_page(pmd_t *level2p, unsigned long addr) | 21 | static void init_level2_page(pmd_t *level2p, unsigned long addr) |
31 | { | 22 | { |
32 | unsigned long end_addr; | 23 | unsigned long end_addr; |
@@ -107,12 +98,65 @@ out: | |||
107 | return result; | 98 | return result; |
108 | } | 99 | } |
109 | 100 | ||
101 | static void free_transition_pgtable(struct kimage *image) | ||
102 | { | ||
103 | free_page((unsigned long)image->arch.pud); | ||
104 | free_page((unsigned long)image->arch.pmd); | ||
105 | free_page((unsigned long)image->arch.pte); | ||
106 | } | ||
107 | |||
108 | static int init_transition_pgtable(struct kimage *image, pgd_t *pgd) | ||
109 | { | ||
110 | pud_t *pud; | ||
111 | pmd_t *pmd; | ||
112 | pte_t *pte; | ||
113 | unsigned long vaddr, paddr; | ||
114 | int result = -ENOMEM; | ||
115 | |||
116 | vaddr = (unsigned long)relocate_kernel; | ||
117 | paddr = __pa(page_address(image->control_code_page)+PAGE_SIZE); | ||
118 | pgd += pgd_index(vaddr); | ||
119 | if (!pgd_present(*pgd)) { | ||
120 | pud = (pud_t *)get_zeroed_page(GFP_KERNEL); | ||
121 | if (!pud) | ||
122 | goto err; | ||
123 | image->arch.pud = pud; | ||
124 | set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE)); | ||
125 | } | ||
126 | pud = pud_offset(pgd, vaddr); | ||
127 | if (!pud_present(*pud)) { | ||
128 | pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL); | ||
129 | if (!pmd) | ||
130 | goto err; | ||
131 | image->arch.pmd = pmd; | ||
132 | set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE)); | ||
133 | } | ||
134 | pmd = pmd_offset(pud, vaddr); | ||
135 | if (!pmd_present(*pmd)) { | ||
136 | pte = (pte_t *)get_zeroed_page(GFP_KERNEL); | ||
137 | if (!pte) | ||
138 | goto err; | ||
139 | image->arch.pte = pte; | ||
140 | set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE)); | ||
141 | } | ||
142 | pte = pte_offset_kernel(pmd, vaddr); | ||
143 | set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL_EXEC)); | ||
144 | return 0; | ||
145 | err: | ||
146 | free_transition_pgtable(image); | ||
147 | return result; | ||
148 | } | ||
149 | |||
110 | 150 | ||
111 | static int init_pgtable(struct kimage *image, unsigned long start_pgtable) | 151 | static int init_pgtable(struct kimage *image, unsigned long start_pgtable) |
112 | { | 152 | { |
113 | pgd_t *level4p; | 153 | pgd_t *level4p; |
154 | int result; | ||
114 | level4p = (pgd_t *)__va(start_pgtable); | 155 | level4p = (pgd_t *)__va(start_pgtable); |
115 | return init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT); | 156 | result = init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT); |
157 | if (result) | ||
158 | return result; | ||
159 | return init_transition_pgtable(image, level4p); | ||
116 | } | 160 | } |
117 | 161 | ||
118 | static void set_idt(void *newidt, u16 limit) | 162 | static void set_idt(void *newidt, u16 limit) |
@@ -174,7 +218,7 @@ int machine_kexec_prepare(struct kimage *image) | |||
174 | 218 | ||
175 | void machine_kexec_cleanup(struct kimage *image) | 219 | void machine_kexec_cleanup(struct kimage *image) |
176 | { | 220 | { |
177 | return; | 221 | free_transition_pgtable(image); |
178 | } | 222 | } |
179 | 223 | ||
180 | /* | 224 | /* |
@@ -195,22 +239,6 @@ void machine_kexec(struct kimage *image) | |||
195 | memcpy(control_page, relocate_kernel, PAGE_SIZE); | 239 | memcpy(control_page, relocate_kernel, PAGE_SIZE); |
196 | 240 | ||
197 | page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page); | 241 | page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page); |
198 | page_list[VA_CONTROL_PAGE] = (unsigned long)relocate_kernel; | ||
199 | page_list[PA_PGD] = virt_to_phys(&kexec_pgd); | ||
200 | page_list[VA_PGD] = (unsigned long)kexec_pgd; | ||
201 | page_list[PA_PUD_0] = virt_to_phys(&kexec_pud0); | ||
202 | page_list[VA_PUD_0] = (unsigned long)kexec_pud0; | ||
203 | page_list[PA_PMD_0] = virt_to_phys(&kexec_pmd0); | ||
204 | page_list[VA_PMD_0] = (unsigned long)kexec_pmd0; | ||
205 | page_list[PA_PTE_0] = virt_to_phys(&kexec_pte0); | ||
206 | page_list[VA_PTE_0] = (unsigned long)kexec_pte0; | ||
207 | page_list[PA_PUD_1] = virt_to_phys(&kexec_pud1); | ||
208 | page_list[VA_PUD_1] = (unsigned long)kexec_pud1; | ||
209 | page_list[PA_PMD_1] = virt_to_phys(&kexec_pmd1); | ||
210 | page_list[VA_PMD_1] = (unsigned long)kexec_pmd1; | ||
211 | page_list[PA_PTE_1] = virt_to_phys(&kexec_pte1); | ||
212 | page_list[VA_PTE_1] = (unsigned long)kexec_pte1; | ||
213 | |||
214 | page_list[PA_TABLE_PAGE] = | 242 | page_list[PA_TABLE_PAGE] = |
215 | (unsigned long)__pa(page_address(image->control_code_page)); | 243 | (unsigned long)__pa(page_address(image->control_code_page)); |
216 | 244 | ||
diff --git a/arch/x86/kernel/mca_32.c b/arch/x86/kernel/mca_32.c index 2dc183758be3..845d80ce1ef1 100644 --- a/arch/x86/kernel/mca_32.c +++ b/arch/x86/kernel/mca_32.c | |||
@@ -51,7 +51,6 @@ | |||
51 | #include <linux/ioport.h> | 51 | #include <linux/ioport.h> |
52 | #include <asm/uaccess.h> | 52 | #include <asm/uaccess.h> |
53 | #include <linux/init.h> | 53 | #include <linux/init.h> |
54 | #include <asm/arch_hooks.h> | ||
55 | 54 | ||
56 | static unsigned char which_scsi; | 55 | static unsigned char which_scsi; |
57 | 56 | ||
@@ -474,6 +473,4 @@ void __kprobes mca_handle_nmi(void) | |||
474 | * adapter was responsible for the error. | 473 | * adapter was responsible for the error. |
475 | */ | 474 | */ |
476 | bus_for_each_dev(&mca_bus_type, NULL, NULL, mca_handle_nmi_callback); | 475 | bus_for_each_dev(&mca_bus_type, NULL, NULL, mca_handle_nmi_callback); |
477 | 476 | } | |
478 | mca_nmi_hook(); | ||
479 | } /* mca_handle_nmi */ | ||
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c index b7f4c929e615..5e9f4fc51385 100644 --- a/arch/x86/kernel/microcode_intel.c +++ b/arch/x86/kernel/microcode_intel.c | |||
@@ -87,9 +87,9 @@ | |||
87 | #include <linux/cpu.h> | 87 | #include <linux/cpu.h> |
88 | #include <linux/firmware.h> | 88 | #include <linux/firmware.h> |
89 | #include <linux/platform_device.h> | 89 | #include <linux/platform_device.h> |
90 | #include <linux/uaccess.h> | ||
90 | 91 | ||
91 | #include <asm/msr.h> | 92 | #include <asm/msr.h> |
92 | #include <asm/uaccess.h> | ||
93 | #include <asm/processor.h> | 93 | #include <asm/processor.h> |
94 | #include <asm/microcode.h> | 94 | #include <asm/microcode.h> |
95 | 95 | ||
@@ -196,7 +196,7 @@ static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf) | |||
196 | return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1; | 196 | return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1; |
197 | } | 197 | } |
198 | 198 | ||
199 | static inline int | 199 | static inline int |
200 | update_match_revision(struct microcode_header_intel *mc_header, int rev) | 200 | update_match_revision(struct microcode_header_intel *mc_header, int rev) |
201 | { | 201 | { |
202 | return (mc_header->rev <= rev) ? 0 : 1; | 202 | return (mc_header->rev <= rev) ? 0 : 1; |
@@ -442,8 +442,8 @@ static int request_microcode_fw(int cpu, struct device *device) | |||
442 | return ret; | 442 | return ret; |
443 | } | 443 | } |
444 | 444 | ||
445 | ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size, | 445 | ret = generic_load_microcode(cpu, (void *)firmware->data, |
446 | &get_ucode_fw); | 446 | firmware->size, &get_ucode_fw); |
447 | 447 | ||
448 | release_firmware(firmware); | 448 | release_firmware(firmware); |
449 | 449 | ||
@@ -460,7 +460,7 @@ static int request_microcode_user(int cpu, const void __user *buf, size_t size) | |||
460 | /* We should bind the task to the CPU */ | 460 | /* We should bind the task to the CPU */ |
461 | BUG_ON(cpu != raw_smp_processor_id()); | 461 | BUG_ON(cpu != raw_smp_processor_id()); |
462 | 462 | ||
463 | return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user); | 463 | return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user); |
464 | } | 464 | } |
465 | 465 | ||
466 | static void microcode_fini_cpu(int cpu) | 466 | static void microcode_fini_cpu(int cpu) |
diff --git a/arch/x86/kernel/module_32.c b/arch/x86/kernel/module_32.c index 3db0a5442eb1..0edd819050e7 100644 --- a/arch/x86/kernel/module_32.c +++ b/arch/x86/kernel/module_32.c | |||
@@ -42,7 +42,7 @@ void module_free(struct module *mod, void *module_region) | |||
42 | { | 42 | { |
43 | vfree(module_region); | 43 | vfree(module_region); |
44 | /* FIXME: If module_region == mod->init_region, trim exception | 44 | /* FIXME: If module_region == mod->init_region, trim exception |
45 | table entries. */ | 45 | table entries. */ |
46 | } | 46 | } |
47 | 47 | ||
48 | /* We don't need anything special. */ | 48 | /* We don't need anything special. */ |
@@ -113,13 +113,13 @@ int module_finalize(const Elf_Ehdr *hdr, | |||
113 | *para = NULL; | 113 | *para = NULL; |
114 | char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; | 114 | char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; |
115 | 115 | ||
116 | for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) { | 116 | for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) { |
117 | if (!strcmp(".text", secstrings + s->sh_name)) | 117 | if (!strcmp(".text", secstrings + s->sh_name)) |
118 | text = s; | 118 | text = s; |
119 | if (!strcmp(".altinstructions", secstrings + s->sh_name)) | 119 | if (!strcmp(".altinstructions", secstrings + s->sh_name)) |
120 | alt = s; | 120 | alt = s; |
121 | if (!strcmp(".smp_locks", secstrings + s->sh_name)) | 121 | if (!strcmp(".smp_locks", secstrings + s->sh_name)) |
122 | locks= s; | 122 | locks = s; |
123 | if (!strcmp(".parainstructions", secstrings + s->sh_name)) | 123 | if (!strcmp(".parainstructions", secstrings + s->sh_name)) |
124 | para = s; | 124 | para = s; |
125 | } | 125 | } |
diff --git a/arch/x86/kernel/module_64.c b/arch/x86/kernel/module_64.c index 6ba87830d4b1..c23880b90b5c 100644 --- a/arch/x86/kernel/module_64.c +++ b/arch/x86/kernel/module_64.c | |||
@@ -30,14 +30,14 @@ | |||
30 | #include <asm/page.h> | 30 | #include <asm/page.h> |
31 | #include <asm/pgtable.h> | 31 | #include <asm/pgtable.h> |
32 | 32 | ||
33 | #define DEBUGP(fmt...) | 33 | #define DEBUGP(fmt...) |
34 | 34 | ||
35 | #ifndef CONFIG_UML | 35 | #ifndef CONFIG_UML |
36 | void module_free(struct module *mod, void *module_region) | 36 | void module_free(struct module *mod, void *module_region) |
37 | { | 37 | { |
38 | vfree(module_region); | 38 | vfree(module_region); |
39 | /* FIXME: If module_region == mod->init_region, trim exception | 39 | /* FIXME: If module_region == mod->init_region, trim exception |
40 | table entries. */ | 40 | table entries. */ |
41 | } | 41 | } |
42 | 42 | ||
43 | void *module_alloc(unsigned long size) | 43 | void *module_alloc(unsigned long size) |
@@ -77,7 +77,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, | |||
77 | Elf64_Rela *rel = (void *)sechdrs[relsec].sh_addr; | 77 | Elf64_Rela *rel = (void *)sechdrs[relsec].sh_addr; |
78 | Elf64_Sym *sym; | 78 | Elf64_Sym *sym; |
79 | void *loc; | 79 | void *loc; |
80 | u64 val; | 80 | u64 val; |
81 | 81 | ||
82 | DEBUGP("Applying relocate section %u to %u\n", relsec, | 82 | DEBUGP("Applying relocate section %u to %u\n", relsec, |
83 | sechdrs[relsec].sh_info); | 83 | sechdrs[relsec].sh_info); |
@@ -91,11 +91,11 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, | |||
91 | sym = (Elf64_Sym *)sechdrs[symindex].sh_addr | 91 | sym = (Elf64_Sym *)sechdrs[symindex].sh_addr |
92 | + ELF64_R_SYM(rel[i].r_info); | 92 | + ELF64_R_SYM(rel[i].r_info); |
93 | 93 | ||
94 | DEBUGP("type %d st_value %Lx r_addend %Lx loc %Lx\n", | 94 | DEBUGP("type %d st_value %Lx r_addend %Lx loc %Lx\n", |
95 | (int)ELF64_R_TYPE(rel[i].r_info), | 95 | (int)ELF64_R_TYPE(rel[i].r_info), |
96 | sym->st_value, rel[i].r_addend, (u64)loc); | 96 | sym->st_value, rel[i].r_addend, (u64)loc); |
97 | 97 | ||
98 | val = sym->st_value + rel[i].r_addend; | 98 | val = sym->st_value + rel[i].r_addend; |
99 | 99 | ||
100 | switch (ELF64_R_TYPE(rel[i].r_info)) { | 100 | switch (ELF64_R_TYPE(rel[i].r_info)) { |
101 | case R_X86_64_NONE: | 101 | case R_X86_64_NONE: |
@@ -113,16 +113,16 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, | |||
113 | if ((s64)val != *(s32 *)loc) | 113 | if ((s64)val != *(s32 *)loc) |
114 | goto overflow; | 114 | goto overflow; |
115 | break; | 115 | break; |
116 | case R_X86_64_PC32: | 116 | case R_X86_64_PC32: |
117 | val -= (u64)loc; | 117 | val -= (u64)loc; |
118 | *(u32 *)loc = val; | 118 | *(u32 *)loc = val; |
119 | #if 0 | 119 | #if 0 |
120 | if ((s64)val != *(s32 *)loc) | 120 | if ((s64)val != *(s32 *)loc) |
121 | goto overflow; | 121 | goto overflow; |
122 | #endif | 122 | #endif |
123 | break; | 123 | break; |
124 | default: | 124 | default: |
125 | printk(KERN_ERR "module %s: Unknown rela relocation: %Lu\n", | 125 | printk(KERN_ERR "module %s: Unknown rela relocation: %llu\n", |
126 | me->name, ELF64_R_TYPE(rel[i].r_info)); | 126 | me->name, ELF64_R_TYPE(rel[i].r_info)); |
127 | return -ENOEXEC; | 127 | return -ENOEXEC; |
128 | } | 128 | } |
@@ -130,7 +130,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, | |||
130 | return 0; | 130 | return 0; |
131 | 131 | ||
132 | overflow: | 132 | overflow: |
133 | printk(KERN_ERR "overflow in relocation type %d val %Lx\n", | 133 | printk(KERN_ERR "overflow in relocation type %d val %Lx\n", |
134 | (int)ELF64_R_TYPE(rel[i].r_info), val); | 134 | (int)ELF64_R_TYPE(rel[i].r_info), val); |
135 | printk(KERN_ERR "`%s' likely not compiled with -mcmodel=kernel\n", | 135 | printk(KERN_ERR "`%s' likely not compiled with -mcmodel=kernel\n", |
136 | me->name); | 136 | me->name); |
@@ -143,13 +143,13 @@ int apply_relocate(Elf_Shdr *sechdrs, | |||
143 | unsigned int relsec, | 143 | unsigned int relsec, |
144 | struct module *me) | 144 | struct module *me) |
145 | { | 145 | { |
146 | printk("non add relocation not supported\n"); | 146 | printk(KERN_ERR "non add relocation not supported\n"); |
147 | return -ENOSYS; | 147 | return -ENOSYS; |
148 | } | 148 | } |
149 | 149 | ||
150 | int module_finalize(const Elf_Ehdr *hdr, | 150 | int module_finalize(const Elf_Ehdr *hdr, |
151 | const Elf_Shdr *sechdrs, | 151 | const Elf_Shdr *sechdrs, |
152 | struct module *me) | 152 | struct module *me) |
153 | { | 153 | { |
154 | const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL, | 154 | const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL, |
155 | *para = NULL; | 155 | *para = NULL; |
@@ -161,7 +161,7 @@ int module_finalize(const Elf_Ehdr *hdr, | |||
161 | if (!strcmp(".altinstructions", secstrings + s->sh_name)) | 161 | if (!strcmp(".altinstructions", secstrings + s->sh_name)) |
162 | alt = s; | 162 | alt = s; |
163 | if (!strcmp(".smp_locks", secstrings + s->sh_name)) | 163 | if (!strcmp(".smp_locks", secstrings + s->sh_name)) |
164 | locks= s; | 164 | locks = s; |
165 | if (!strcmp(".parainstructions", secstrings + s->sh_name)) | 165 | if (!strcmp(".parainstructions", secstrings + s->sh_name)) |
166 | para = s; | 166 | para = s; |
167 | } | 167 | } |
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index a649a4ccad43..37cb1bda1baf 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * compliant MP-table parsing routines. | 3 | * compliant MP-table parsing routines. |
4 | * | 4 | * |
5 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> | 5 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
6 | * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> | 6 | * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
8 | */ | 8 | */ |
9 | 9 | ||
@@ -29,12 +29,7 @@ | |||
29 | #include <asm/setup.h> | 29 | #include <asm/setup.h> |
30 | #include <asm/smp.h> | 30 | #include <asm/smp.h> |
31 | 31 | ||
32 | #include <mach_apic.h> | 32 | #include <asm/apic.h> |
33 | #ifdef CONFIG_X86_32 | ||
34 | #include <mach_apicdef.h> | ||
35 | #include <mach_mpparse.h> | ||
36 | #endif | ||
37 | |||
38 | /* | 33 | /* |
39 | * Checksum an MP configuration block. | 34 | * Checksum an MP configuration block. |
40 | */ | 35 | */ |
@@ -144,11 +139,11 @@ static void __init MP_ioapic_info(struct mpc_ioapic *m) | |||
144 | if (bad_ioapic(m->apicaddr)) | 139 | if (bad_ioapic(m->apicaddr)) |
145 | return; | 140 | return; |
146 | 141 | ||
147 | mp_ioapics[nr_ioapics].mp_apicaddr = m->apicaddr; | 142 | mp_ioapics[nr_ioapics].apicaddr = m->apicaddr; |
148 | mp_ioapics[nr_ioapics].mp_apicid = m->apicid; | 143 | mp_ioapics[nr_ioapics].apicid = m->apicid; |
149 | mp_ioapics[nr_ioapics].mp_type = m->type; | 144 | mp_ioapics[nr_ioapics].type = m->type; |
150 | mp_ioapics[nr_ioapics].mp_apicver = m->apicver; | 145 | mp_ioapics[nr_ioapics].apicver = m->apicver; |
151 | mp_ioapics[nr_ioapics].mp_flags = m->flags; | 146 | mp_ioapics[nr_ioapics].flags = m->flags; |
152 | nr_ioapics++; | 147 | nr_ioapics++; |
153 | } | 148 | } |
154 | 149 | ||
@@ -160,55 +155,55 @@ static void print_MP_intsrc_info(struct mpc_intsrc *m) | |||
160 | m->srcbusirq, m->dstapic, m->dstirq); | 155 | m->srcbusirq, m->dstapic, m->dstirq); |
161 | } | 156 | } |
162 | 157 | ||
163 | static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq) | 158 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) |
164 | { | 159 | { |
165 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," | 160 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
166 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", | 161 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
167 | mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3, | 162 | mp_irq->irqtype, mp_irq->irqflag & 3, |
168 | (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus, | 163 | (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, |
169 | mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq); | 164 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); |
170 | } | 165 | } |
171 | 166 | ||
172 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, | 167 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, |
173 | struct mp_config_intsrc *mp_irq) | 168 | struct mpc_intsrc *mp_irq) |
174 | { | 169 | { |
175 | mp_irq->mp_dstapic = m->dstapic; | 170 | mp_irq->dstapic = m->dstapic; |
176 | mp_irq->mp_type = m->type; | 171 | mp_irq->type = m->type; |
177 | mp_irq->mp_irqtype = m->irqtype; | 172 | mp_irq->irqtype = m->irqtype; |
178 | mp_irq->mp_irqflag = m->irqflag; | 173 | mp_irq->irqflag = m->irqflag; |
179 | mp_irq->mp_srcbus = m->srcbus; | 174 | mp_irq->srcbus = m->srcbus; |
180 | mp_irq->mp_srcbusirq = m->srcbusirq; | 175 | mp_irq->srcbusirq = m->srcbusirq; |
181 | mp_irq->mp_dstirq = m->dstirq; | 176 | mp_irq->dstirq = m->dstirq; |
182 | } | 177 | } |
183 | 178 | ||
184 | static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq, | 179 | static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, |
185 | struct mpc_intsrc *m) | 180 | struct mpc_intsrc *m) |
186 | { | 181 | { |
187 | m->dstapic = mp_irq->mp_dstapic; | 182 | m->dstapic = mp_irq->dstapic; |
188 | m->type = mp_irq->mp_type; | 183 | m->type = mp_irq->type; |
189 | m->irqtype = mp_irq->mp_irqtype; | 184 | m->irqtype = mp_irq->irqtype; |
190 | m->irqflag = mp_irq->mp_irqflag; | 185 | m->irqflag = mp_irq->irqflag; |
191 | m->srcbus = mp_irq->mp_srcbus; | 186 | m->srcbus = mp_irq->srcbus; |
192 | m->srcbusirq = mp_irq->mp_srcbusirq; | 187 | m->srcbusirq = mp_irq->srcbusirq; |
193 | m->dstirq = mp_irq->mp_dstirq; | 188 | m->dstirq = mp_irq->dstirq; |
194 | } | 189 | } |
195 | 190 | ||
196 | static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq, | 191 | static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, |
197 | struct mpc_intsrc *m) | 192 | struct mpc_intsrc *m) |
198 | { | 193 | { |
199 | if (mp_irq->mp_dstapic != m->dstapic) | 194 | if (mp_irq->dstapic != m->dstapic) |
200 | return 1; | 195 | return 1; |
201 | if (mp_irq->mp_type != m->type) | 196 | if (mp_irq->type != m->type) |
202 | return 2; | 197 | return 2; |
203 | if (mp_irq->mp_irqtype != m->irqtype) | 198 | if (mp_irq->irqtype != m->irqtype) |
204 | return 3; | 199 | return 3; |
205 | if (mp_irq->mp_irqflag != m->irqflag) | 200 | if (mp_irq->irqflag != m->irqflag) |
206 | return 4; | 201 | return 4; |
207 | if (mp_irq->mp_srcbus != m->srcbus) | 202 | if (mp_irq->srcbus != m->srcbus) |
208 | return 5; | 203 | return 5; |
209 | if (mp_irq->mp_srcbusirq != m->srcbusirq) | 204 | if (mp_irq->srcbusirq != m->srcbusirq) |
210 | return 6; | 205 | return 6; |
211 | if (mp_irq->mp_dstirq != m->dstirq) | 206 | if (mp_irq->dstirq != m->dstirq) |
212 | return 7; | 207 | return 7; |
213 | 208 | ||
214 | return 0; | 209 | return 0; |
@@ -292,16 +287,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | |||
292 | return 0; | 287 | return 0; |
293 | 288 | ||
294 | #ifdef CONFIG_X86_32 | 289 | #ifdef CONFIG_X86_32 |
295 | /* | 290 | generic_mps_oem_check(mpc, oem, str); |
296 | * need to make sure summit and es7000's mps_oem_check is safe to be | ||
297 | * called early via genericarch 's mps_oem_check | ||
298 | */ | ||
299 | if (early) { | ||
300 | #ifdef CONFIG_X86_NUMAQ | ||
301 | numaq_mps_oem_check(mpc, oem, str); | ||
302 | #endif | ||
303 | } else | ||
304 | mps_oem_check(mpc, oem, str); | ||
305 | #endif | 291 | #endif |
306 | /* save the local APIC address, it might be non-default */ | 292 | /* save the local APIC address, it might be non-default */ |
307 | if (!acpi_lapic) | 293 | if (!acpi_lapic) |
@@ -386,13 +372,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) | |||
386 | (*x86_quirks->mpc_record)++; | 372 | (*x86_quirks->mpc_record)++; |
387 | } | 373 | } |
388 | 374 | ||
389 | #ifdef CONFIG_X86_GENERICARCH | 375 | #ifdef CONFIG_X86_BIGSMP |
390 | generic_bigsmp_probe(); | 376 | generic_bigsmp_probe(); |
391 | #endif | 377 | #endif |
392 | 378 | ||
393 | #ifdef CONFIG_X86_32 | 379 | if (apic->setup_apic_routing) |
394 | setup_apic_routing(); | 380 | apic->setup_apic_routing(); |
395 | #endif | 381 | |
396 | if (!num_processors) | 382 | if (!num_processors) |
397 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); | 383 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
398 | return num_processors; | 384 | return num_processors; |
@@ -417,7 +403,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type) | |||
417 | intsrc.type = MP_INTSRC; | 403 | intsrc.type = MP_INTSRC; |
418 | intsrc.irqflag = 0; /* conforming */ | 404 | intsrc.irqflag = 0; /* conforming */ |
419 | intsrc.srcbus = 0; | 405 | intsrc.srcbus = 0; |
420 | intsrc.dstapic = mp_ioapics[0].mp_apicid; | 406 | intsrc.dstapic = mp_ioapics[0].apicid; |
421 | 407 | ||
422 | intsrc.irqtype = mp_INT; | 408 | intsrc.irqtype = mp_INT; |
423 | 409 | ||
@@ -570,14 +556,14 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type) | |||
570 | } | 556 | } |
571 | } | 557 | } |
572 | 558 | ||
573 | static struct intel_mp_floating *mpf_found; | 559 | static struct mpf_intel *mpf_found; |
574 | 560 | ||
575 | /* | 561 | /* |
576 | * Scan the memory blocks for an SMP configuration block. | 562 | * Scan the memory blocks for an SMP configuration block. |
577 | */ | 563 | */ |
578 | static void __init __get_smp_config(unsigned int early) | 564 | static void __init __get_smp_config(unsigned int early) |
579 | { | 565 | { |
580 | struct intel_mp_floating *mpf = mpf_found; | 566 | struct mpf_intel *mpf = mpf_found; |
581 | 567 | ||
582 | if (!mpf) | 568 | if (!mpf) |
583 | return; | 569 | return; |
@@ -598,9 +584,9 @@ static void __init __get_smp_config(unsigned int early) | |||
598 | } | 584 | } |
599 | 585 | ||
600 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", | 586 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
601 | mpf->mpf_specification); | 587 | mpf->specification); |
602 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) | 588 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
603 | if (mpf->mpf_feature2 & (1 << 7)) { | 589 | if (mpf->feature2 & (1 << 7)) { |
604 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); | 590 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
605 | pic_mode = 1; | 591 | pic_mode = 1; |
606 | } else { | 592 | } else { |
@@ -611,7 +597,7 @@ static void __init __get_smp_config(unsigned int early) | |||
611 | /* | 597 | /* |
612 | * Now see if we need to read further. | 598 | * Now see if we need to read further. |
613 | */ | 599 | */ |
614 | if (mpf->mpf_feature1 != 0) { | 600 | if (mpf->feature1 != 0) { |
615 | if (early) { | 601 | if (early) { |
616 | /* | 602 | /* |
617 | * local APIC has default address | 603 | * local APIC has default address |
@@ -621,16 +607,16 @@ static void __init __get_smp_config(unsigned int early) | |||
621 | } | 607 | } |
622 | 608 | ||
623 | printk(KERN_INFO "Default MP configuration #%d\n", | 609 | printk(KERN_INFO "Default MP configuration #%d\n", |
624 | mpf->mpf_feature1); | 610 | mpf->feature1); |
625 | construct_default_ISA_mptable(mpf->mpf_feature1); | 611 | construct_default_ISA_mptable(mpf->feature1); |
626 | 612 | ||
627 | } else if (mpf->mpf_physptr) { | 613 | } else if (mpf->physptr) { |
628 | 614 | ||
629 | /* | 615 | /* |
630 | * Read the physical hardware table. Anything here will | 616 | * Read the physical hardware table. Anything here will |
631 | * override the defaults. | 617 | * override the defaults. |
632 | */ | 618 | */ |
633 | if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) { | 619 | if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) { |
634 | #ifdef CONFIG_X86_LOCAL_APIC | 620 | #ifdef CONFIG_X86_LOCAL_APIC |
635 | smp_found_config = 0; | 621 | smp_found_config = 0; |
636 | #endif | 622 | #endif |
@@ -688,32 +674,32 @@ static int __init smp_scan_config(unsigned long base, unsigned long length, | |||
688 | unsigned reserve) | 674 | unsigned reserve) |
689 | { | 675 | { |
690 | unsigned int *bp = phys_to_virt(base); | 676 | unsigned int *bp = phys_to_virt(base); |
691 | struct intel_mp_floating *mpf; | 677 | struct mpf_intel *mpf; |
692 | 678 | ||
693 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", | 679 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", |
694 | bp, length); | 680 | bp, length); |
695 | BUILD_BUG_ON(sizeof(*mpf) != 16); | 681 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
696 | 682 | ||
697 | while (length > 0) { | 683 | while (length > 0) { |
698 | mpf = (struct intel_mp_floating *)bp; | 684 | mpf = (struct mpf_intel *)bp; |
699 | if ((*bp == SMP_MAGIC_IDENT) && | 685 | if ((*bp == SMP_MAGIC_IDENT) && |
700 | (mpf->mpf_length == 1) && | 686 | (mpf->length == 1) && |
701 | !mpf_checksum((unsigned char *)bp, 16) && | 687 | !mpf_checksum((unsigned char *)bp, 16) && |
702 | ((mpf->mpf_specification == 1) | 688 | ((mpf->specification == 1) |
703 | || (mpf->mpf_specification == 4))) { | 689 | || (mpf->specification == 4))) { |
704 | #ifdef CONFIG_X86_LOCAL_APIC | 690 | #ifdef CONFIG_X86_LOCAL_APIC |
705 | smp_found_config = 1; | 691 | smp_found_config = 1; |
706 | #endif | 692 | #endif |
707 | mpf_found = mpf; | 693 | mpf_found = mpf; |
708 | 694 | ||
709 | printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n", | 695 | printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", |
710 | mpf, virt_to_phys(mpf)); | 696 | mpf, (u64)virt_to_phys(mpf)); |
711 | 697 | ||
712 | if (!reserve) | 698 | if (!reserve) |
713 | return 1; | 699 | return 1; |
714 | reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE, | 700 | reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE, |
715 | BOOTMEM_DEFAULT); | 701 | BOOTMEM_DEFAULT); |
716 | if (mpf->mpf_physptr) { | 702 | if (mpf->physptr) { |
717 | unsigned long size = PAGE_SIZE; | 703 | unsigned long size = PAGE_SIZE; |
718 | #ifdef CONFIG_X86_32 | 704 | #ifdef CONFIG_X86_32 |
719 | /* | 705 | /* |
@@ -722,15 +708,24 @@ static int __init smp_scan_config(unsigned long base, unsigned long length, | |||
722 | * the bottom is mapped now. | 708 | * the bottom is mapped now. |
723 | * PC-9800's MPC table places on the very last | 709 | * PC-9800's MPC table places on the very last |
724 | * of physical memory; so that simply reserving | 710 | * of physical memory; so that simply reserving |
725 | * PAGE_SIZE from mpg->mpf_physptr yields BUG() | 711 | * PAGE_SIZE from mpf->physptr yields BUG() |
726 | * in reserve_bootmem. | 712 | * in reserve_bootmem. |
713 | * also need to make sure physptr is below than | ||
714 | * max_low_pfn | ||
715 | * we don't need reserve the area above max_low_pfn | ||
727 | */ | 716 | */ |
728 | unsigned long end = max_low_pfn * PAGE_SIZE; | 717 | unsigned long end = max_low_pfn * PAGE_SIZE; |
729 | if (mpf->mpf_physptr + size > end) | 718 | |
730 | size = end - mpf->mpf_physptr; | 719 | if (mpf->physptr < end) { |
731 | #endif | 720 | if (mpf->physptr + size > end) |
732 | reserve_bootmem_generic(mpf->mpf_physptr, size, | 721 | size = end - mpf->physptr; |
722 | reserve_bootmem_generic(mpf->physptr, size, | ||
723 | BOOTMEM_DEFAULT); | ||
724 | } | ||
725 | #else | ||
726 | reserve_bootmem_generic(mpf->physptr, size, | ||
733 | BOOTMEM_DEFAULT); | 727 | BOOTMEM_DEFAULT); |
728 | #endif | ||
734 | } | 729 | } |
735 | 730 | ||
736 | return 1; | 731 | return 1; |
@@ -809,15 +804,15 @@ static int __init get_MP_intsrc_index(struct mpc_intsrc *m) | |||
809 | /* not legacy */ | 804 | /* not legacy */ |
810 | 805 | ||
811 | for (i = 0; i < mp_irq_entries; i++) { | 806 | for (i = 0; i < mp_irq_entries; i++) { |
812 | if (mp_irqs[i].mp_irqtype != mp_INT) | 807 | if (mp_irqs[i].irqtype != mp_INT) |
813 | continue; | 808 | continue; |
814 | 809 | ||
815 | if (mp_irqs[i].mp_irqflag != 0x0f) | 810 | if (mp_irqs[i].irqflag != 0x0f) |
816 | continue; | 811 | continue; |
817 | 812 | ||
818 | if (mp_irqs[i].mp_srcbus != m->srcbus) | 813 | if (mp_irqs[i].srcbus != m->srcbus) |
819 | continue; | 814 | continue; |
820 | if (mp_irqs[i].mp_srcbusirq != m->srcbusirq) | 815 | if (mp_irqs[i].srcbusirq != m->srcbusirq) |
821 | continue; | 816 | continue; |
822 | if (irq_used[i]) { | 817 | if (irq_used[i]) { |
823 | /* already claimed */ | 818 | /* already claimed */ |
@@ -922,10 +917,10 @@ static int __init replace_intsrc_all(struct mpc_table *mpc, | |||
922 | if (irq_used[i]) | 917 | if (irq_used[i]) |
923 | continue; | 918 | continue; |
924 | 919 | ||
925 | if (mp_irqs[i].mp_irqtype != mp_INT) | 920 | if (mp_irqs[i].irqtype != mp_INT) |
926 | continue; | 921 | continue; |
927 | 922 | ||
928 | if (mp_irqs[i].mp_irqflag != 0x0f) | 923 | if (mp_irqs[i].irqflag != 0x0f) |
929 | continue; | 924 | continue; |
930 | 925 | ||
931 | if (nr_m_spare > 0) { | 926 | if (nr_m_spare > 0) { |
@@ -1001,7 +996,7 @@ static int __init update_mp_table(void) | |||
1001 | { | 996 | { |
1002 | char str[16]; | 997 | char str[16]; |
1003 | char oem[10]; | 998 | char oem[10]; |
1004 | struct intel_mp_floating *mpf; | 999 | struct mpf_intel *mpf; |
1005 | struct mpc_table *mpc, *mpc_new; | 1000 | struct mpc_table *mpc, *mpc_new; |
1006 | 1001 | ||
1007 | if (!enable_update_mptable) | 1002 | if (!enable_update_mptable) |
@@ -1014,19 +1009,19 @@ static int __init update_mp_table(void) | |||
1014 | /* | 1009 | /* |
1015 | * Now see if we need to go further. | 1010 | * Now see if we need to go further. |
1016 | */ | 1011 | */ |
1017 | if (mpf->mpf_feature1 != 0) | 1012 | if (mpf->feature1 != 0) |
1018 | return 0; | 1013 | return 0; |
1019 | 1014 | ||
1020 | if (!mpf->mpf_physptr) | 1015 | if (!mpf->physptr) |
1021 | return 0; | 1016 | return 0; |
1022 | 1017 | ||
1023 | mpc = phys_to_virt(mpf->mpf_physptr); | 1018 | mpc = phys_to_virt(mpf->physptr); |
1024 | 1019 | ||
1025 | if (!smp_check_mpc(mpc, oem, str)) | 1020 | if (!smp_check_mpc(mpc, oem, str)) |
1026 | return 0; | 1021 | return 0; |
1027 | 1022 | ||
1028 | printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf)); | 1023 | printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); |
1029 | printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr); | 1024 | printk(KERN_INFO "physptr: %x\n", mpf->physptr); |
1030 | 1025 | ||
1031 | if (mpc_new_phys && mpc->length > mpc_new_length) { | 1026 | if (mpc_new_phys && mpc->length > mpc_new_length) { |
1032 | mpc_new_phys = 0; | 1027 | mpc_new_phys = 0; |
@@ -1047,23 +1042,23 @@ static int __init update_mp_table(void) | |||
1047 | } | 1042 | } |
1048 | printk(KERN_INFO "use in-positon replacing\n"); | 1043 | printk(KERN_INFO "use in-positon replacing\n"); |
1049 | } else { | 1044 | } else { |
1050 | mpf->mpf_physptr = mpc_new_phys; | 1045 | mpf->physptr = mpc_new_phys; |
1051 | mpc_new = phys_to_virt(mpc_new_phys); | 1046 | mpc_new = phys_to_virt(mpc_new_phys); |
1052 | memcpy(mpc_new, mpc, mpc->length); | 1047 | memcpy(mpc_new, mpc, mpc->length); |
1053 | mpc = mpc_new; | 1048 | mpc = mpc_new; |
1054 | /* check if we can modify that */ | 1049 | /* check if we can modify that */ |
1055 | if (mpc_new_phys - mpf->mpf_physptr) { | 1050 | if (mpc_new_phys - mpf->physptr) { |
1056 | struct intel_mp_floating *mpf_new; | 1051 | struct mpf_intel *mpf_new; |
1057 | /* steal 16 bytes from [0, 1k) */ | 1052 | /* steal 16 bytes from [0, 1k) */ |
1058 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); | 1053 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); |
1059 | mpf_new = phys_to_virt(0x400 - 16); | 1054 | mpf_new = phys_to_virt(0x400 - 16); |
1060 | memcpy(mpf_new, mpf, 16); | 1055 | memcpy(mpf_new, mpf, 16); |
1061 | mpf = mpf_new; | 1056 | mpf = mpf_new; |
1062 | mpf->mpf_physptr = mpc_new_phys; | 1057 | mpf->physptr = mpc_new_phys; |
1063 | } | 1058 | } |
1064 | mpf->mpf_checksum = 0; | 1059 | mpf->checksum = 0; |
1065 | mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16); | 1060 | mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); |
1066 | printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr); | 1061 | printk(KERN_INFO "physptr new: %x\n", mpf->physptr); |
1067 | } | 1062 | } |
1068 | 1063 | ||
1069 | /* | 1064 | /* |
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c index 726266695b2c..3cf3413ec626 100644 --- a/arch/x86/kernel/msr.c +++ b/arch/x86/kernel/msr.c | |||
@@ -35,10 +35,10 @@ | |||
35 | #include <linux/device.h> | 35 | #include <linux/device.h> |
36 | #include <linux/cpu.h> | 36 | #include <linux/cpu.h> |
37 | #include <linux/notifier.h> | 37 | #include <linux/notifier.h> |
38 | #include <linux/uaccess.h> | ||
38 | 39 | ||
39 | #include <asm/processor.h> | 40 | #include <asm/processor.h> |
40 | #include <asm/msr.h> | 41 | #include <asm/msr.h> |
41 | #include <asm/uaccess.h> | ||
42 | #include <asm/system.h> | 42 | #include <asm/system.h> |
43 | 43 | ||
44 | static struct class *msr_class; | 44 | static struct class *msr_class; |
diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c deleted file mode 100644 index f2191d4f2717..000000000000 --- a/arch/x86/kernel/numaq_32.c +++ /dev/null | |||
@@ -1,293 +0,0 @@ | |||
1 | /* | ||
2 | * Written by: Patricia Gaughen, IBM Corporation | ||
3 | * | ||
4 | * Copyright (C) 2002, IBM Corp. | ||
5 | * | ||
6 | * All rights reserved. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, but | ||
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
16 | * NON INFRINGEMENT. See the GNU General Public License for more | ||
17 | * details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | * | ||
23 | * Send feedback to <gone@us.ibm.com> | ||
24 | */ | ||
25 | |||
26 | #include <linux/mm.h> | ||
27 | #include <linux/bootmem.h> | ||
28 | #include <linux/mmzone.h> | ||
29 | #include <linux/module.h> | ||
30 | #include <linux/nodemask.h> | ||
31 | #include <asm/numaq.h> | ||
32 | #include <asm/topology.h> | ||
33 | #include <asm/processor.h> | ||
34 | #include <asm/genapic.h> | ||
35 | #include <asm/e820.h> | ||
36 | #include <asm/setup.h> | ||
37 | |||
38 | #define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT)) | ||
39 | |||
40 | /* | ||
41 | * Function: smp_dump_qct() | ||
42 | * | ||
43 | * Description: gets memory layout from the quad config table. This | ||
44 | * function also updates node_online_map with the nodes (quads) present. | ||
45 | */ | ||
46 | static void __init smp_dump_qct(void) | ||
47 | { | ||
48 | int node; | ||
49 | struct eachquadmem *eq; | ||
50 | struct sys_cfg_data *scd = | ||
51 | (struct sys_cfg_data *)__va(SYS_CFG_DATA_PRIV_ADDR); | ||
52 | |||
53 | nodes_clear(node_online_map); | ||
54 | for_each_node(node) { | ||
55 | if (scd->quads_present31_0 & (1 << node)) { | ||
56 | node_set_online(node); | ||
57 | eq = &scd->eq[node]; | ||
58 | /* Convert to pages */ | ||
59 | node_start_pfn[node] = MB_TO_PAGES( | ||
60 | eq->hi_shrd_mem_start - eq->priv_mem_size); | ||
61 | node_end_pfn[node] = MB_TO_PAGES( | ||
62 | eq->hi_shrd_mem_start + eq->hi_shrd_mem_size); | ||
63 | |||
64 | e820_register_active_regions(node, node_start_pfn[node], | ||
65 | node_end_pfn[node]); | ||
66 | memory_present(node, | ||
67 | node_start_pfn[node], node_end_pfn[node]); | ||
68 | node_remap_size[node] = node_memmap_size_bytes(node, | ||
69 | node_start_pfn[node], | ||
70 | node_end_pfn[node]); | ||
71 | } | ||
72 | } | ||
73 | } | ||
74 | |||
75 | |||
76 | void __cpuinit numaq_tsc_disable(void) | ||
77 | { | ||
78 | if (!found_numaq) | ||
79 | return; | ||
80 | |||
81 | if (num_online_nodes() > 1) { | ||
82 | printk(KERN_DEBUG "NUMAQ: disabling TSC\n"); | ||
83 | setup_clear_cpu_cap(X86_FEATURE_TSC); | ||
84 | } | ||
85 | } | ||
86 | |||
87 | static int __init numaq_pre_time_init(void) | ||
88 | { | ||
89 | numaq_tsc_disable(); | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | int found_numaq; | ||
94 | /* | ||
95 | * Have to match translation table entries to main table entries by counter | ||
96 | * hence the mpc_record variable .... can't see a less disgusting way of | ||
97 | * doing this .... | ||
98 | */ | ||
99 | struct mpc_config_translation { | ||
100 | unsigned char mpc_type; | ||
101 | unsigned char trans_len; | ||
102 | unsigned char trans_type; | ||
103 | unsigned char trans_quad; | ||
104 | unsigned char trans_global; | ||
105 | unsigned char trans_local; | ||
106 | unsigned short trans_reserved; | ||
107 | }; | ||
108 | |||
109 | /* x86_quirks member */ | ||
110 | static int mpc_record; | ||
111 | static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY] | ||
112 | __cpuinitdata; | ||
113 | |||
114 | static inline int generate_logical_apicid(int quad, int phys_apicid) | ||
115 | { | ||
116 | return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1); | ||
117 | } | ||
118 | |||
119 | /* x86_quirks member */ | ||
120 | static int mpc_apic_id(struct mpc_cpu *m) | ||
121 | { | ||
122 | int quad = translation_table[mpc_record]->trans_quad; | ||
123 | int logical_apicid = generate_logical_apicid(quad, m->apicid); | ||
124 | |||
125 | printk(KERN_DEBUG "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n", | ||
126 | m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8, | ||
127 | (m->cpufeature & CPU_MODEL_MASK) >> 4, | ||
128 | m->apicver, quad, logical_apicid); | ||
129 | return logical_apicid; | ||
130 | } | ||
131 | |||
132 | int mp_bus_id_to_node[MAX_MP_BUSSES]; | ||
133 | |||
134 | int mp_bus_id_to_local[MAX_MP_BUSSES]; | ||
135 | |||
136 | /* x86_quirks member */ | ||
137 | static void mpc_oem_bus_info(struct mpc_bus *m, char *name) | ||
138 | { | ||
139 | int quad = translation_table[mpc_record]->trans_quad; | ||
140 | int local = translation_table[mpc_record]->trans_local; | ||
141 | |||
142 | mp_bus_id_to_node[m->busid] = quad; | ||
143 | mp_bus_id_to_local[m->busid] = local; | ||
144 | printk(KERN_INFO "Bus #%d is %s (node %d)\n", | ||
145 | m->busid, name, quad); | ||
146 | } | ||
147 | |||
148 | int quad_local_to_mp_bus_id [NR_CPUS/4][4]; | ||
149 | |||
150 | /* x86_quirks member */ | ||
151 | static void mpc_oem_pci_bus(struct mpc_bus *m) | ||
152 | { | ||
153 | int quad = translation_table[mpc_record]->trans_quad; | ||
154 | int local = translation_table[mpc_record]->trans_local; | ||
155 | |||
156 | quad_local_to_mp_bus_id[quad][local] = m->busid; | ||
157 | } | ||
158 | |||
159 | static void __init MP_translation_info(struct mpc_config_translation *m) | ||
160 | { | ||
161 | printk(KERN_INFO | ||
162 | "Translation: record %d, type %d, quad %d, global %d, local %d\n", | ||
163 | mpc_record, m->trans_type, m->trans_quad, m->trans_global, | ||
164 | m->trans_local); | ||
165 | |||
166 | if (mpc_record >= MAX_MPC_ENTRY) | ||
167 | printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n"); | ||
168 | else | ||
169 | translation_table[mpc_record] = m; /* stash this for later */ | ||
170 | if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad)) | ||
171 | node_set_online(m->trans_quad); | ||
172 | } | ||
173 | |||
174 | static int __init mpf_checksum(unsigned char *mp, int len) | ||
175 | { | ||
176 | int sum = 0; | ||
177 | |||
178 | while (len--) | ||
179 | sum += *mp++; | ||
180 | |||
181 | return sum & 0xFF; | ||
182 | } | ||
183 | |||
184 | /* | ||
185 | * Read/parse the MPC oem tables | ||
186 | */ | ||
187 | |||
188 | static void __init smp_read_mpc_oem(struct mpc_oemtable *oemtable, | ||
189 | unsigned short oemsize) | ||
190 | { | ||
191 | int count = sizeof(*oemtable); /* the header size */ | ||
192 | unsigned char *oemptr = ((unsigned char *)oemtable) + count; | ||
193 | |||
194 | mpc_record = 0; | ||
195 | printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n", | ||
196 | oemtable); | ||
197 | if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) { | ||
198 | printk(KERN_WARNING | ||
199 | "SMP mpc oemtable: bad signature [%c%c%c%c]!\n", | ||
200 | oemtable->signature[0], oemtable->signature[1], | ||
201 | oemtable->signature[2], oemtable->signature[3]); | ||
202 | return; | ||
203 | } | ||
204 | if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) { | ||
205 | printk(KERN_WARNING "SMP oem mptable: checksum error!\n"); | ||
206 | return; | ||
207 | } | ||
208 | while (count < oemtable->length) { | ||
209 | switch (*oemptr) { | ||
210 | case MP_TRANSLATION: | ||
211 | { | ||
212 | struct mpc_config_translation *m = | ||
213 | (struct mpc_config_translation *)oemptr; | ||
214 | MP_translation_info(m); | ||
215 | oemptr += sizeof(*m); | ||
216 | count += sizeof(*m); | ||
217 | ++mpc_record; | ||
218 | break; | ||
219 | } | ||
220 | default: | ||
221 | { | ||
222 | printk(KERN_WARNING | ||
223 | "Unrecognised OEM table entry type! - %d\n", | ||
224 | (int)*oemptr); | ||
225 | return; | ||
226 | } | ||
227 | } | ||
228 | } | ||
229 | } | ||
230 | |||
231 | static int __init numaq_setup_ioapic_ids(void) | ||
232 | { | ||
233 | /* so can skip it */ | ||
234 | return 1; | ||
235 | } | ||
236 | |||
237 | static int __init numaq_update_genapic(void) | ||
238 | { | ||
239 | genapic->wakeup_cpu = wakeup_secondary_cpu_via_nmi; | ||
240 | |||
241 | return 0; | ||
242 | } | ||
243 | |||
244 | static struct x86_quirks numaq_x86_quirks __initdata = { | ||
245 | .arch_pre_time_init = numaq_pre_time_init, | ||
246 | .arch_time_init = NULL, | ||
247 | .arch_pre_intr_init = NULL, | ||
248 | .arch_memory_setup = NULL, | ||
249 | .arch_intr_init = NULL, | ||
250 | .arch_trap_init = NULL, | ||
251 | .mach_get_smp_config = NULL, | ||
252 | .mach_find_smp_config = NULL, | ||
253 | .mpc_record = &mpc_record, | ||
254 | .mpc_apic_id = mpc_apic_id, | ||
255 | .mpc_oem_bus_info = mpc_oem_bus_info, | ||
256 | .mpc_oem_pci_bus = mpc_oem_pci_bus, | ||
257 | .smp_read_mpc_oem = smp_read_mpc_oem, | ||
258 | .setup_ioapic_ids = numaq_setup_ioapic_ids, | ||
259 | .update_genapic = numaq_update_genapic, | ||
260 | }; | ||
261 | |||
262 | void numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
263 | { | ||
264 | if (strncmp(oem, "IBM NUMA", 8)) | ||
265 | printk("Warning! Not a NUMA-Q system!\n"); | ||
266 | else | ||
267 | found_numaq = 1; | ||
268 | } | ||
269 | |||
270 | static __init void early_check_numaq(void) | ||
271 | { | ||
272 | /* | ||
273 | * Find possible boot-time SMP configuration: | ||
274 | */ | ||
275 | early_find_smp_config(); | ||
276 | /* | ||
277 | * get boot-time SMP configuration: | ||
278 | */ | ||
279 | if (smp_found_config) | ||
280 | early_get_smp_config(); | ||
281 | |||
282 | if (found_numaq) | ||
283 | x86_quirks = &numaq_x86_quirks; | ||
284 | } | ||
285 | |||
286 | int __init get_memcfg_numaq(void) | ||
287 | { | ||
288 | early_check_numaq(); | ||
289 | if (!found_numaq) | ||
290 | return 0; | ||
291 | smp_dump_qct(); | ||
292 | return 1; | ||
293 | } | ||
diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravirt-spinlocks.c index 95777b0faa73..3a7c5a44082e 100644 --- a/arch/x86/kernel/paravirt-spinlocks.c +++ b/arch/x86/kernel/paravirt-spinlocks.c | |||
@@ -26,13 +26,3 @@ struct pv_lock_ops pv_lock_ops = { | |||
26 | }; | 26 | }; |
27 | EXPORT_SYMBOL(pv_lock_ops); | 27 | EXPORT_SYMBOL(pv_lock_ops); |
28 | 28 | ||
29 | void __init paravirt_use_bytelocks(void) | ||
30 | { | ||
31 | #ifdef CONFIG_SMP | ||
32 | pv_lock_ops.spin_is_locked = __byte_spin_is_locked; | ||
33 | pv_lock_ops.spin_is_contended = __byte_spin_is_contended; | ||
34 | pv_lock_ops.spin_lock = __byte_spin_lock; | ||
35 | pv_lock_ops.spin_trylock = __byte_spin_trylock; | ||
36 | pv_lock_ops.spin_unlock = __byte_spin_unlock; | ||
37 | #endif | ||
38 | } | ||
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index c6520a4e85d4..63dd358d8ee1 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <asm/paravirt.h> | 28 | #include <asm/paravirt.h> |
29 | #include <asm/desc.h> | 29 | #include <asm/desc.h> |
30 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
31 | #include <asm/arch_hooks.h> | ||
32 | #include <asm/pgtable.h> | 31 | #include <asm/pgtable.h> |
33 | #include <asm/time.h> | 32 | #include <asm/time.h> |
34 | #include <asm/pgalloc.h> | 33 | #include <asm/pgalloc.h> |
@@ -44,6 +43,17 @@ void _paravirt_nop(void) | |||
44 | { | 43 | { |
45 | } | 44 | } |
46 | 45 | ||
46 | /* identity function, which can be inlined */ | ||
47 | u32 _paravirt_ident_32(u32 x) | ||
48 | { | ||
49 | return x; | ||
50 | } | ||
51 | |||
52 | u64 _paravirt_ident_64(u64 x) | ||
53 | { | ||
54 | return x; | ||
55 | } | ||
56 | |||
47 | static void __init default_banner(void) | 57 | static void __init default_banner(void) |
48 | { | 58 | { |
49 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", | 59 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
@@ -138,9 +148,16 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, | |||
138 | if (opfunc == NULL) | 148 | if (opfunc == NULL) |
139 | /* If there's no function, patch it with a ud2a (BUG) */ | 149 | /* If there's no function, patch it with a ud2a (BUG) */ |
140 | ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a)); | 150 | ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a)); |
141 | else if (opfunc == paravirt_nop) | 151 | else if (opfunc == _paravirt_nop) |
142 | /* If the operation is a nop, then nop the callsite */ | 152 | /* If the operation is a nop, then nop the callsite */ |
143 | ret = paravirt_patch_nop(); | 153 | ret = paravirt_patch_nop(); |
154 | |||
155 | /* identity functions just return their single argument */ | ||
156 | else if (opfunc == _paravirt_ident_32) | ||
157 | ret = paravirt_patch_ident_32(insnbuf, len); | ||
158 | else if (opfunc == _paravirt_ident_64) | ||
159 | ret = paravirt_patch_ident_64(insnbuf, len); | ||
160 | |||
144 | else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) || | 161 | else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) || |
145 | type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) || | 162 | type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) || |
146 | type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) || | 163 | type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) || |
@@ -318,10 +335,10 @@ struct pv_time_ops pv_time_ops = { | |||
318 | 335 | ||
319 | struct pv_irq_ops pv_irq_ops = { | 336 | struct pv_irq_ops pv_irq_ops = { |
320 | .init_IRQ = native_init_IRQ, | 337 | .init_IRQ = native_init_IRQ, |
321 | .save_fl = native_save_fl, | 338 | .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl), |
322 | .restore_fl = native_restore_fl, | 339 | .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl), |
323 | .irq_disable = native_irq_disable, | 340 | .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable), |
324 | .irq_enable = native_irq_enable, | 341 | .irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable), |
325 | .safe_halt = native_safe_halt, | 342 | .safe_halt = native_safe_halt, |
326 | .halt = native_halt, | 343 | .halt = native_halt, |
327 | #ifdef CONFIG_X86_64 | 344 | #ifdef CONFIG_X86_64 |
@@ -399,6 +416,14 @@ struct pv_apic_ops pv_apic_ops = { | |||
399 | #endif | 416 | #endif |
400 | }; | 417 | }; |
401 | 418 | ||
419 | #if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE) | ||
420 | /* 32-bit pagetable entries */ | ||
421 | #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_32) | ||
422 | #else | ||
423 | /* 64-bit pagetable entries */ | ||
424 | #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64) | ||
425 | #endif | ||
426 | |||
402 | struct pv_mmu_ops pv_mmu_ops = { | 427 | struct pv_mmu_ops pv_mmu_ops = { |
403 | #ifndef CONFIG_X86_64 | 428 | #ifndef CONFIG_X86_64 |
404 | .pagetable_setup_start = native_pagetable_setup_start, | 429 | .pagetable_setup_start = native_pagetable_setup_start, |
@@ -450,22 +475,23 @@ struct pv_mmu_ops pv_mmu_ops = { | |||
450 | .pmd_clear = native_pmd_clear, | 475 | .pmd_clear = native_pmd_clear, |
451 | #endif | 476 | #endif |
452 | .set_pud = native_set_pud, | 477 | .set_pud = native_set_pud, |
453 | .pmd_val = native_pmd_val, | 478 | |
454 | .make_pmd = native_make_pmd, | 479 | .pmd_val = PTE_IDENT, |
480 | .make_pmd = PTE_IDENT, | ||
455 | 481 | ||
456 | #if PAGETABLE_LEVELS == 4 | 482 | #if PAGETABLE_LEVELS == 4 |
457 | .pud_val = native_pud_val, | 483 | .pud_val = PTE_IDENT, |
458 | .make_pud = native_make_pud, | 484 | .make_pud = PTE_IDENT, |
485 | |||
459 | .set_pgd = native_set_pgd, | 486 | .set_pgd = native_set_pgd, |
460 | #endif | 487 | #endif |
461 | #endif /* PAGETABLE_LEVELS >= 3 */ | 488 | #endif /* PAGETABLE_LEVELS >= 3 */ |
462 | 489 | ||
463 | .pte_val = native_pte_val, | 490 | .pte_val = PTE_IDENT, |
464 | .pte_flags = native_pte_flags, | 491 | .pgd_val = PTE_IDENT, |
465 | .pgd_val = native_pgd_val, | ||
466 | 492 | ||
467 | .make_pte = native_make_pte, | 493 | .make_pte = PTE_IDENT, |
468 | .make_pgd = native_make_pgd, | 494 | .make_pgd = PTE_IDENT, |
469 | 495 | ||
470 | .dup_mmap = paravirt_nop, | 496 | .dup_mmap = paravirt_nop, |
471 | .exit_mmap = paravirt_nop, | 497 | .exit_mmap = paravirt_nop, |
diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c index 9fe644f4861d..d9f32e6d6ab6 100644 --- a/arch/x86/kernel/paravirt_patch_32.c +++ b/arch/x86/kernel/paravirt_patch_32.c | |||
@@ -12,6 +12,18 @@ DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax"); | |||
12 | DEF_NATIVE(pv_cpu_ops, clts, "clts"); | 12 | DEF_NATIVE(pv_cpu_ops, clts, "clts"); |
13 | DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc"); | 13 | DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc"); |
14 | 14 | ||
15 | unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len) | ||
16 | { | ||
17 | /* arg in %eax, return in %eax */ | ||
18 | return 0; | ||
19 | } | ||
20 | |||
21 | unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len) | ||
22 | { | ||
23 | /* arg in %edx:%eax, return in %edx:%eax */ | ||
24 | return 0; | ||
25 | } | ||
26 | |||
15 | unsigned native_patch(u8 type, u16 clobbers, void *ibuf, | 27 | unsigned native_patch(u8 type, u16 clobbers, void *ibuf, |
16 | unsigned long addr, unsigned len) | 28 | unsigned long addr, unsigned len) |
17 | { | 29 | { |
diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c index 061d01df9ae6..3f08f34f93eb 100644 --- a/arch/x86/kernel/paravirt_patch_64.c +++ b/arch/x86/kernel/paravirt_patch_64.c | |||
@@ -19,6 +19,21 @@ DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq"); | |||
19 | DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl"); | 19 | DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl"); |
20 | DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs"); | 20 | DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs"); |
21 | 21 | ||
22 | DEF_NATIVE(, mov32, "mov %edi, %eax"); | ||
23 | DEF_NATIVE(, mov64, "mov %rdi, %rax"); | ||
24 | |||
25 | unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len) | ||
26 | { | ||
27 | return paravirt_patch_insns(insnbuf, len, | ||
28 | start__mov32, end__mov32); | ||
29 | } | ||
30 | |||
31 | unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len) | ||
32 | { | ||
33 | return paravirt_patch_insns(insnbuf, len, | ||
34 | start__mov64, end__mov64); | ||
35 | } | ||
36 | |||
22 | unsigned native_patch(u8 type, u16 clobbers, void *ibuf, | 37 | unsigned native_patch(u8 type, u16 clobbers, void *ibuf, |
23 | unsigned long addr, unsigned len) | 38 | unsigned long addr, unsigned len) |
24 | { | 39 | { |
diff --git a/arch/x86/kernel/probe_roms_32.c b/arch/x86/kernel/probe_roms_32.c index 675a48c404a5..071e7fea42e5 100644 --- a/arch/x86/kernel/probe_roms_32.c +++ b/arch/x86/kernel/probe_roms_32.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <asm/setup.h> | 18 | #include <asm/setup.h> |
19 | #include <asm/sections.h> | 19 | #include <asm/sections.h> |
20 | #include <asm/io.h> | 20 | #include <asm/io.h> |
21 | #include <setup_arch.h> | 21 | #include <asm/setup_arch.h> |
22 | 22 | ||
23 | static struct resource system_rom_resource = { | 23 | static struct resource system_rom_resource = { |
24 | .name = "System ROM", | 24 | .name = "System ROM", |
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 6d12f7e37f8c..6afa5232dbb7 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -1,8 +1,8 @@ | |||
1 | #include <linux/errno.h> | 1 | #include <linux/errno.h> |
2 | #include <linux/kernel.h> | 2 | #include <linux/kernel.h> |
3 | #include <linux/mm.h> | 3 | #include <linux/mm.h> |
4 | #include <asm/idle.h> | ||
5 | #include <linux/smp.h> | 4 | #include <linux/smp.h> |
5 | #include <linux/prctl.h> | ||
6 | #include <linux/slab.h> | 6 | #include <linux/slab.h> |
7 | #include <linux/sched.h> | 7 | #include <linux/sched.h> |
8 | #include <linux/module.h> | 8 | #include <linux/module.h> |
@@ -11,6 +11,9 @@ | |||
11 | #include <linux/ftrace.h> | 11 | #include <linux/ftrace.h> |
12 | #include <asm/system.h> | 12 | #include <asm/system.h> |
13 | #include <asm/apic.h> | 13 | #include <asm/apic.h> |
14 | #include <asm/idle.h> | ||
15 | #include <asm/uaccess.h> | ||
16 | #include <asm/i387.h> | ||
14 | 17 | ||
15 | unsigned long idle_halt; | 18 | unsigned long idle_halt; |
16 | EXPORT_SYMBOL(idle_halt); | 19 | EXPORT_SYMBOL(idle_halt); |
@@ -56,6 +59,192 @@ void arch_task_cache_init(void) | |||
56 | } | 59 | } |
57 | 60 | ||
58 | /* | 61 | /* |
62 | * Free current thread data structures etc.. | ||
63 | */ | ||
64 | void exit_thread(void) | ||
65 | { | ||
66 | struct task_struct *me = current; | ||
67 | struct thread_struct *t = &me->thread; | ||
68 | |||
69 | if (me->thread.io_bitmap_ptr) { | ||
70 | struct tss_struct *tss = &per_cpu(init_tss, get_cpu()); | ||
71 | |||
72 | kfree(t->io_bitmap_ptr); | ||
73 | t->io_bitmap_ptr = NULL; | ||
74 | clear_thread_flag(TIF_IO_BITMAP); | ||
75 | /* | ||
76 | * Careful, clear this in the TSS too: | ||
77 | */ | ||
78 | memset(tss->io_bitmap, 0xff, t->io_bitmap_max); | ||
79 | t->io_bitmap_max = 0; | ||
80 | put_cpu(); | ||
81 | } | ||
82 | |||
83 | ds_exit_thread(current); | ||
84 | } | ||
85 | |||
86 | void flush_thread(void) | ||
87 | { | ||
88 | struct task_struct *tsk = current; | ||
89 | |||
90 | #ifdef CONFIG_X86_64 | ||
91 | if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) { | ||
92 | clear_tsk_thread_flag(tsk, TIF_ABI_PENDING); | ||
93 | if (test_tsk_thread_flag(tsk, TIF_IA32)) { | ||
94 | clear_tsk_thread_flag(tsk, TIF_IA32); | ||
95 | } else { | ||
96 | set_tsk_thread_flag(tsk, TIF_IA32); | ||
97 | current_thread_info()->status |= TS_COMPAT; | ||
98 | } | ||
99 | } | ||
100 | #endif | ||
101 | |||
102 | clear_tsk_thread_flag(tsk, TIF_DEBUG); | ||
103 | |||
104 | tsk->thread.debugreg0 = 0; | ||
105 | tsk->thread.debugreg1 = 0; | ||
106 | tsk->thread.debugreg2 = 0; | ||
107 | tsk->thread.debugreg3 = 0; | ||
108 | tsk->thread.debugreg6 = 0; | ||
109 | tsk->thread.debugreg7 = 0; | ||
110 | memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array)); | ||
111 | /* | ||
112 | * Forget coprocessor state.. | ||
113 | */ | ||
114 | tsk->fpu_counter = 0; | ||
115 | clear_fpu(tsk); | ||
116 | clear_used_math(); | ||
117 | } | ||
118 | |||
119 | static void hard_disable_TSC(void) | ||
120 | { | ||
121 | write_cr4(read_cr4() | X86_CR4_TSD); | ||
122 | } | ||
123 | |||
124 | void disable_TSC(void) | ||
125 | { | ||
126 | preempt_disable(); | ||
127 | if (!test_and_set_thread_flag(TIF_NOTSC)) | ||
128 | /* | ||
129 | * Must flip the CPU state synchronously with | ||
130 | * TIF_NOTSC in the current running context. | ||
131 | */ | ||
132 | hard_disable_TSC(); | ||
133 | preempt_enable(); | ||
134 | } | ||
135 | |||
136 | static void hard_enable_TSC(void) | ||
137 | { | ||
138 | write_cr4(read_cr4() & ~X86_CR4_TSD); | ||
139 | } | ||
140 | |||
141 | static void enable_TSC(void) | ||
142 | { | ||
143 | preempt_disable(); | ||
144 | if (test_and_clear_thread_flag(TIF_NOTSC)) | ||
145 | /* | ||
146 | * Must flip the CPU state synchronously with | ||
147 | * TIF_NOTSC in the current running context. | ||
148 | */ | ||
149 | hard_enable_TSC(); | ||
150 | preempt_enable(); | ||
151 | } | ||
152 | |||
153 | int get_tsc_mode(unsigned long adr) | ||
154 | { | ||
155 | unsigned int val; | ||
156 | |||
157 | if (test_thread_flag(TIF_NOTSC)) | ||
158 | val = PR_TSC_SIGSEGV; | ||
159 | else | ||
160 | val = PR_TSC_ENABLE; | ||
161 | |||
162 | return put_user(val, (unsigned int __user *)adr); | ||
163 | } | ||
164 | |||
165 | int set_tsc_mode(unsigned int val) | ||
166 | { | ||
167 | if (val == PR_TSC_SIGSEGV) | ||
168 | disable_TSC(); | ||
169 | else if (val == PR_TSC_ENABLE) | ||
170 | enable_TSC(); | ||
171 | else | ||
172 | return -EINVAL; | ||
173 | |||
174 | return 0; | ||
175 | } | ||
176 | |||
177 | void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p, | ||
178 | struct tss_struct *tss) | ||
179 | { | ||
180 | struct thread_struct *prev, *next; | ||
181 | |||
182 | prev = &prev_p->thread; | ||
183 | next = &next_p->thread; | ||
184 | |||
185 | if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) || | ||
186 | test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR)) | ||
187 | ds_switch_to(prev_p, next_p); | ||
188 | else if (next->debugctlmsr != prev->debugctlmsr) | ||
189 | update_debugctlmsr(next->debugctlmsr); | ||
190 | |||
191 | if (test_tsk_thread_flag(next_p, TIF_DEBUG)) { | ||
192 | set_debugreg(next->debugreg0, 0); | ||
193 | set_debugreg(next->debugreg1, 1); | ||
194 | set_debugreg(next->debugreg2, 2); | ||
195 | set_debugreg(next->debugreg3, 3); | ||
196 | /* no 4 and 5 */ | ||
197 | set_debugreg(next->debugreg6, 6); | ||
198 | set_debugreg(next->debugreg7, 7); | ||
199 | } | ||
200 | |||
201 | if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^ | ||
202 | test_tsk_thread_flag(next_p, TIF_NOTSC)) { | ||
203 | /* prev and next are different */ | ||
204 | if (test_tsk_thread_flag(next_p, TIF_NOTSC)) | ||
205 | hard_disable_TSC(); | ||
206 | else | ||
207 | hard_enable_TSC(); | ||
208 | } | ||
209 | |||
210 | if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) { | ||
211 | /* | ||
212 | * Copy the relevant range of the IO bitmap. | ||
213 | * Normally this is 128 bytes or less: | ||
214 | */ | ||
215 | memcpy(tss->io_bitmap, next->io_bitmap_ptr, | ||
216 | max(prev->io_bitmap_max, next->io_bitmap_max)); | ||
217 | } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) { | ||
218 | /* | ||
219 | * Clear any possible leftover bits: | ||
220 | */ | ||
221 | memset(tss->io_bitmap, 0xff, prev->io_bitmap_max); | ||
222 | } | ||
223 | } | ||
224 | |||
225 | int sys_fork(struct pt_regs *regs) | ||
226 | { | ||
227 | return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL); | ||
228 | } | ||
229 | |||
230 | /* | ||
231 | * This is trivial, and on the face of it looks like it | ||
232 | * could equally well be done in user mode. | ||
233 | * | ||
234 | * Not so, for quite unobvious reasons - register pressure. | ||
235 | * In user mode vfork() cannot have a stack frame, and if | ||
236 | * done by calling the "clone()" system call directly, you | ||
237 | * do not have enough call-clobbered registers to hold all | ||
238 | * the information you need. | ||
239 | */ | ||
240 | int sys_vfork(struct pt_regs *regs) | ||
241 | { | ||
242 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0, | ||
243 | NULL, NULL); | ||
244 | } | ||
245 | |||
246 | |||
247 | /* | ||
59 | * Idle related variables and functions | 248 | * Idle related variables and functions |
60 | */ | 249 | */ |
61 | unsigned long boot_option_idle_override = 0; | 250 | unsigned long boot_option_idle_override = 0; |
@@ -350,7 +539,7 @@ static void c1e_idle(void) | |||
350 | 539 | ||
351 | void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) | 540 | void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) |
352 | { | 541 | { |
353 | #ifdef CONFIG_X86_SMP | 542 | #ifdef CONFIG_SMP |
354 | if (pm_idle == poll_idle && smp_num_siblings > 1) { | 543 | if (pm_idle == poll_idle && smp_num_siblings > 1) { |
355 | printk(KERN_WARNING "WARNING: polling idle and HT enabled," | 544 | printk(KERN_WARNING "WARNING: polling idle and HT enabled," |
356 | " performance may degrade.\n"); | 545 | " performance may degrade.\n"); |
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index bd4da2af08ae..14014d766cad 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <stdarg.h> | 12 | #include <stdarg.h> |
13 | 13 | ||
14 | #include <linux/stackprotector.h> | ||
14 | #include <linux/cpu.h> | 15 | #include <linux/cpu.h> |
15 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
16 | #include <linux/sched.h> | 17 | #include <linux/sched.h> |
@@ -66,9 +67,6 @@ asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); | |||
66 | DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; | 67 | DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; |
67 | EXPORT_PER_CPU_SYMBOL(current_task); | 68 | EXPORT_PER_CPU_SYMBOL(current_task); |
68 | 69 | ||
69 | DEFINE_PER_CPU(int, cpu_number); | ||
70 | EXPORT_PER_CPU_SYMBOL(cpu_number); | ||
71 | |||
72 | /* | 70 | /* |
73 | * Return saved PC of a blocked thread. | 71 | * Return saved PC of a blocked thread. |
74 | */ | 72 | */ |
@@ -94,6 +92,15 @@ void cpu_idle(void) | |||
94 | { | 92 | { |
95 | int cpu = smp_processor_id(); | 93 | int cpu = smp_processor_id(); |
96 | 94 | ||
95 | /* | ||
96 | * If we're the non-boot CPU, nothing set the stack canary up | ||
97 | * for us. CPU0 already has it initialized but no harm in | ||
98 | * doing it again. This is a good place for updating it, as | ||
99 | * we wont ever return from this function (so the invalid | ||
100 | * canaries already on the stack wont ever trigger). | ||
101 | */ | ||
102 | boot_init_stack_canary(); | ||
103 | |||
97 | current_thread_info()->status |= TS_POLLING; | 104 | current_thread_info()->status |= TS_POLLING; |
98 | 105 | ||
99 | /* endless idle loop with no priority at all */ | 106 | /* endless idle loop with no priority at all */ |
@@ -108,7 +115,6 @@ void cpu_idle(void) | |||
108 | play_dead(); | 115 | play_dead(); |
109 | 116 | ||
110 | local_irq_disable(); | 117 | local_irq_disable(); |
111 | __get_cpu_var(irq_stat).idle_timestamp = jiffies; | ||
112 | /* Don't trace irqs off for idle */ | 118 | /* Don't trace irqs off for idle */ |
113 | stop_critical_timings(); | 119 | stop_critical_timings(); |
114 | pm_idle(); | 120 | pm_idle(); |
@@ -132,7 +138,7 @@ void __show_regs(struct pt_regs *regs, int all) | |||
132 | if (user_mode_vm(regs)) { | 138 | if (user_mode_vm(regs)) { |
133 | sp = regs->sp; | 139 | sp = regs->sp; |
134 | ss = regs->ss & 0xffff; | 140 | ss = regs->ss & 0xffff; |
135 | savesegment(gs, gs); | 141 | gs = get_user_gs(regs); |
136 | } else { | 142 | } else { |
137 | sp = (unsigned long) (®s->sp); | 143 | sp = (unsigned long) (®s->sp); |
138 | savesegment(ss, ss); | 144 | savesegment(ss, ss); |
@@ -213,6 +219,7 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) | |||
213 | regs.ds = __USER_DS; | 219 | regs.ds = __USER_DS; |
214 | regs.es = __USER_DS; | 220 | regs.es = __USER_DS; |
215 | regs.fs = __KERNEL_PERCPU; | 221 | regs.fs = __KERNEL_PERCPU; |
222 | regs.gs = __KERNEL_STACK_CANARY; | ||
216 | regs.orig_ax = -1; | 223 | regs.orig_ax = -1; |
217 | regs.ip = (unsigned long) kernel_thread_helper; | 224 | regs.ip = (unsigned long) kernel_thread_helper; |
218 | regs.cs = __KERNEL_CS | get_kernel_rpl(); | 225 | regs.cs = __KERNEL_CS | get_kernel_rpl(); |
@@ -223,55 +230,6 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags) | |||
223 | } | 230 | } |
224 | EXPORT_SYMBOL(kernel_thread); | 231 | EXPORT_SYMBOL(kernel_thread); |
225 | 232 | ||
226 | /* | ||
227 | * Free current thread data structures etc.. | ||
228 | */ | ||
229 | void exit_thread(void) | ||
230 | { | ||
231 | /* The process may have allocated an io port bitmap... nuke it. */ | ||
232 | if (unlikely(test_thread_flag(TIF_IO_BITMAP))) { | ||
233 | struct task_struct *tsk = current; | ||
234 | struct thread_struct *t = &tsk->thread; | ||
235 | int cpu = get_cpu(); | ||
236 | struct tss_struct *tss = &per_cpu(init_tss, cpu); | ||
237 | |||
238 | kfree(t->io_bitmap_ptr); | ||
239 | t->io_bitmap_ptr = NULL; | ||
240 | clear_thread_flag(TIF_IO_BITMAP); | ||
241 | /* | ||
242 | * Careful, clear this in the TSS too: | ||
243 | */ | ||
244 | memset(tss->io_bitmap, 0xff, tss->io_bitmap_max); | ||
245 | t->io_bitmap_max = 0; | ||
246 | tss->io_bitmap_owner = NULL; | ||
247 | tss->io_bitmap_max = 0; | ||
248 | tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET; | ||
249 | put_cpu(); | ||
250 | } | ||
251 | |||
252 | ds_exit_thread(current); | ||
253 | } | ||
254 | |||
255 | void flush_thread(void) | ||
256 | { | ||
257 | struct task_struct *tsk = current; | ||
258 | |||
259 | tsk->thread.debugreg0 = 0; | ||
260 | tsk->thread.debugreg1 = 0; | ||
261 | tsk->thread.debugreg2 = 0; | ||
262 | tsk->thread.debugreg3 = 0; | ||
263 | tsk->thread.debugreg6 = 0; | ||
264 | tsk->thread.debugreg7 = 0; | ||
265 | memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array)); | ||
266 | clear_tsk_thread_flag(tsk, TIF_DEBUG); | ||
267 | /* | ||
268 | * Forget coprocessor state.. | ||
269 | */ | ||
270 | tsk->fpu_counter = 0; | ||
271 | clear_fpu(tsk); | ||
272 | clear_used_math(); | ||
273 | } | ||
274 | |||
275 | void release_thread(struct task_struct *dead_task) | 233 | void release_thread(struct task_struct *dead_task) |
276 | { | 234 | { |
277 | BUG_ON(dead_task->mm); | 235 | BUG_ON(dead_task->mm); |
@@ -305,7 +263,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp, | |||
305 | 263 | ||
306 | p->thread.ip = (unsigned long) ret_from_fork; | 264 | p->thread.ip = (unsigned long) ret_from_fork; |
307 | 265 | ||
308 | savesegment(gs, p->thread.gs); | 266 | task_user_gs(p) = get_user_gs(regs); |
309 | 267 | ||
310 | tsk = current; | 268 | tsk = current; |
311 | if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) { | 269 | if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) { |
@@ -343,7 +301,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp, | |||
343 | void | 301 | void |
344 | start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) | 302 | start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) |
345 | { | 303 | { |
346 | __asm__("movl %0, %%gs" : : "r"(0)); | 304 | set_user_gs(regs, 0); |
347 | regs->fs = 0; | 305 | regs->fs = 0; |
348 | set_fs(USER_DS); | 306 | set_fs(USER_DS); |
349 | regs->ds = __USER_DS; | 307 | regs->ds = __USER_DS; |
@@ -359,127 +317,6 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) | |||
359 | } | 317 | } |
360 | EXPORT_SYMBOL_GPL(start_thread); | 318 | EXPORT_SYMBOL_GPL(start_thread); |
361 | 319 | ||
362 | static void hard_disable_TSC(void) | ||
363 | { | ||
364 | write_cr4(read_cr4() | X86_CR4_TSD); | ||
365 | } | ||
366 | |||
367 | void disable_TSC(void) | ||
368 | { | ||
369 | preempt_disable(); | ||
370 | if (!test_and_set_thread_flag(TIF_NOTSC)) | ||
371 | /* | ||
372 | * Must flip the CPU state synchronously with | ||
373 | * TIF_NOTSC in the current running context. | ||
374 | */ | ||
375 | hard_disable_TSC(); | ||
376 | preempt_enable(); | ||
377 | } | ||
378 | |||
379 | static void hard_enable_TSC(void) | ||
380 | { | ||
381 | write_cr4(read_cr4() & ~X86_CR4_TSD); | ||
382 | } | ||
383 | |||
384 | static void enable_TSC(void) | ||
385 | { | ||
386 | preempt_disable(); | ||
387 | if (test_and_clear_thread_flag(TIF_NOTSC)) | ||
388 | /* | ||
389 | * Must flip the CPU state synchronously with | ||
390 | * TIF_NOTSC in the current running context. | ||
391 | */ | ||
392 | hard_enable_TSC(); | ||
393 | preempt_enable(); | ||
394 | } | ||
395 | |||
396 | int get_tsc_mode(unsigned long adr) | ||
397 | { | ||
398 | unsigned int val; | ||
399 | |||
400 | if (test_thread_flag(TIF_NOTSC)) | ||
401 | val = PR_TSC_SIGSEGV; | ||
402 | else | ||
403 | val = PR_TSC_ENABLE; | ||
404 | |||
405 | return put_user(val, (unsigned int __user *)adr); | ||
406 | } | ||
407 | |||
408 | int set_tsc_mode(unsigned int val) | ||
409 | { | ||
410 | if (val == PR_TSC_SIGSEGV) | ||
411 | disable_TSC(); | ||
412 | else if (val == PR_TSC_ENABLE) | ||
413 | enable_TSC(); | ||
414 | else | ||
415 | return -EINVAL; | ||
416 | |||
417 | return 0; | ||
418 | } | ||
419 | |||
420 | static noinline void | ||
421 | __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p, | ||
422 | struct tss_struct *tss) | ||
423 | { | ||
424 | struct thread_struct *prev, *next; | ||
425 | |||
426 | prev = &prev_p->thread; | ||
427 | next = &next_p->thread; | ||
428 | |||
429 | if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) || | ||
430 | test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR)) | ||
431 | ds_switch_to(prev_p, next_p); | ||
432 | else if (next->debugctlmsr != prev->debugctlmsr) | ||
433 | update_debugctlmsr(next->debugctlmsr); | ||
434 | |||
435 | if (test_tsk_thread_flag(next_p, TIF_DEBUG)) { | ||
436 | set_debugreg(next->debugreg0, 0); | ||
437 | set_debugreg(next->debugreg1, 1); | ||
438 | set_debugreg(next->debugreg2, 2); | ||
439 | set_debugreg(next->debugreg3, 3); | ||
440 | /* no 4 and 5 */ | ||
441 | set_debugreg(next->debugreg6, 6); | ||
442 | set_debugreg(next->debugreg7, 7); | ||
443 | } | ||
444 | |||
445 | if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^ | ||
446 | test_tsk_thread_flag(next_p, TIF_NOTSC)) { | ||
447 | /* prev and next are different */ | ||
448 | if (test_tsk_thread_flag(next_p, TIF_NOTSC)) | ||
449 | hard_disable_TSC(); | ||
450 | else | ||
451 | hard_enable_TSC(); | ||
452 | } | ||
453 | |||
454 | if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) { | ||
455 | /* | ||
456 | * Disable the bitmap via an invalid offset. We still cache | ||
457 | * the previous bitmap owner and the IO bitmap contents: | ||
458 | */ | ||
459 | tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET; | ||
460 | return; | ||
461 | } | ||
462 | |||
463 | if (likely(next == tss->io_bitmap_owner)) { | ||
464 | /* | ||
465 | * Previous owner of the bitmap (hence the bitmap content) | ||
466 | * matches the next task, we dont have to do anything but | ||
467 | * to set a valid offset in the TSS: | ||
468 | */ | ||
469 | tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET; | ||
470 | return; | ||
471 | } | ||
472 | /* | ||
473 | * Lazy TSS's I/O bitmap copy. We set an invalid offset here | ||
474 | * and we let the task to get a GPF in case an I/O instruction | ||
475 | * is performed. The handler of the GPF will verify that the | ||
476 | * faulting task has a valid I/O bitmap and, it true, does the | ||
477 | * real copy and restart the instruction. This will save us | ||
478 | * redundant copies when the currently switched task does not | ||
479 | * perform any I/O during its timeslice. | ||
480 | */ | ||
481 | tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET_LAZY; | ||
482 | } | ||
483 | 320 | ||
484 | /* | 321 | /* |
485 | * switch_to(x,yn) should switch tasks from x to y. | 322 | * switch_to(x,yn) should switch tasks from x to y. |
@@ -540,7 +377,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |||
540 | * used %fs or %gs (it does not today), or if the kernel is | 377 | * used %fs or %gs (it does not today), or if the kernel is |
541 | * running inside of a hypervisor layer. | 378 | * running inside of a hypervisor layer. |
542 | */ | 379 | */ |
543 | savesegment(gs, prev->gs); | 380 | lazy_save_gs(prev->gs); |
544 | 381 | ||
545 | /* | 382 | /* |
546 | * Load the per-thread Thread-Local Storage descriptor. | 383 | * Load the per-thread Thread-Local Storage descriptor. |
@@ -586,64 +423,44 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |||
586 | * Restore %gs if needed (which is common) | 423 | * Restore %gs if needed (which is common) |
587 | */ | 424 | */ |
588 | if (prev->gs | next->gs) | 425 | if (prev->gs | next->gs) |
589 | loadsegment(gs, next->gs); | 426 | lazy_load_gs(next->gs); |
590 | 427 | ||
591 | x86_write_percpu(current_task, next_p); | 428 | percpu_write(current_task, next_p); |
592 | 429 | ||
593 | return prev_p; | 430 | return prev_p; |
594 | } | 431 | } |
595 | 432 | ||
596 | asmlinkage int sys_fork(struct pt_regs regs) | 433 | int sys_clone(struct pt_regs *regs) |
597 | { | ||
598 | return do_fork(SIGCHLD, regs.sp, ®s, 0, NULL, NULL); | ||
599 | } | ||
600 | |||
601 | asmlinkage int sys_clone(struct pt_regs regs) | ||
602 | { | 434 | { |
603 | unsigned long clone_flags; | 435 | unsigned long clone_flags; |
604 | unsigned long newsp; | 436 | unsigned long newsp; |
605 | int __user *parent_tidptr, *child_tidptr; | 437 | int __user *parent_tidptr, *child_tidptr; |
606 | 438 | ||
607 | clone_flags = regs.bx; | 439 | clone_flags = regs->bx; |
608 | newsp = regs.cx; | 440 | newsp = regs->cx; |
609 | parent_tidptr = (int __user *)regs.dx; | 441 | parent_tidptr = (int __user *)regs->dx; |
610 | child_tidptr = (int __user *)regs.di; | 442 | child_tidptr = (int __user *)regs->di; |
611 | if (!newsp) | 443 | if (!newsp) |
612 | newsp = regs.sp; | 444 | newsp = regs->sp; |
613 | return do_fork(clone_flags, newsp, ®s, 0, parent_tidptr, child_tidptr); | 445 | return do_fork(clone_flags, newsp, regs, 0, parent_tidptr, child_tidptr); |
614 | } | ||
615 | |||
616 | /* | ||
617 | * This is trivial, and on the face of it looks like it | ||
618 | * could equally well be done in user mode. | ||
619 | * | ||
620 | * Not so, for quite unobvious reasons - register pressure. | ||
621 | * In user mode vfork() cannot have a stack frame, and if | ||
622 | * done by calling the "clone()" system call directly, you | ||
623 | * do not have enough call-clobbered registers to hold all | ||
624 | * the information you need. | ||
625 | */ | ||
626 | asmlinkage int sys_vfork(struct pt_regs regs) | ||
627 | { | ||
628 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs.sp, ®s, 0, NULL, NULL); | ||
629 | } | 446 | } |
630 | 447 | ||
631 | /* | 448 | /* |
632 | * sys_execve() executes a new program. | 449 | * sys_execve() executes a new program. |
633 | */ | 450 | */ |
634 | asmlinkage int sys_execve(struct pt_regs regs) | 451 | int sys_execve(struct pt_regs *regs) |
635 | { | 452 | { |
636 | int error; | 453 | int error; |
637 | char *filename; | 454 | char *filename; |
638 | 455 | ||
639 | filename = getname((char __user *) regs.bx); | 456 | filename = getname((char __user *) regs->bx); |
640 | error = PTR_ERR(filename); | 457 | error = PTR_ERR(filename); |
641 | if (IS_ERR(filename)) | 458 | if (IS_ERR(filename)) |
642 | goto out; | 459 | goto out; |
643 | error = do_execve(filename, | 460 | error = do_execve(filename, |
644 | (char __user * __user *) regs.cx, | 461 | (char __user * __user *) regs->cx, |
645 | (char __user * __user *) regs.dx, | 462 | (char __user * __user *) regs->dx, |
646 | ®s); | 463 | regs); |
647 | if (error == 0) { | 464 | if (error == 0) { |
648 | /* Make sure we don't return using sysenter.. */ | 465 | /* Make sure we don't return using sysenter.. */ |
649 | set_thread_flag(TIF_IRET); | 466 | set_thread_flag(TIF_IRET); |
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 85b4cb5c1980..abb7e6a7f0c6 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c | |||
@@ -16,6 +16,7 @@ | |||
16 | 16 | ||
17 | #include <stdarg.h> | 17 | #include <stdarg.h> |
18 | 18 | ||
19 | #include <linux/stackprotector.h> | ||
19 | #include <linux/cpu.h> | 20 | #include <linux/cpu.h> |
20 | #include <linux/errno.h> | 21 | #include <linux/errno.h> |
21 | #include <linux/sched.h> | 22 | #include <linux/sched.h> |
@@ -47,7 +48,6 @@ | |||
47 | #include <asm/processor.h> | 48 | #include <asm/processor.h> |
48 | #include <asm/i387.h> | 49 | #include <asm/i387.h> |
49 | #include <asm/mmu_context.h> | 50 | #include <asm/mmu_context.h> |
50 | #include <asm/pda.h> | ||
51 | #include <asm/prctl.h> | 51 | #include <asm/prctl.h> |
52 | #include <asm/desc.h> | 52 | #include <asm/desc.h> |
53 | #include <asm/proto.h> | 53 | #include <asm/proto.h> |
@@ -58,6 +58,12 @@ | |||
58 | 58 | ||
59 | asmlinkage extern void ret_from_fork(void); | 59 | asmlinkage extern void ret_from_fork(void); |
60 | 60 | ||
61 | DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; | ||
62 | EXPORT_PER_CPU_SYMBOL(current_task); | ||
63 | |||
64 | DEFINE_PER_CPU(unsigned long, old_rsp); | ||
65 | static DEFINE_PER_CPU(unsigned char, is_idle); | ||
66 | |||
61 | unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED; | 67 | unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED; |
62 | 68 | ||
63 | static ATOMIC_NOTIFIER_HEAD(idle_notifier); | 69 | static ATOMIC_NOTIFIER_HEAD(idle_notifier); |
@@ -76,13 +82,13 @@ EXPORT_SYMBOL_GPL(idle_notifier_unregister); | |||
76 | 82 | ||
77 | void enter_idle(void) | 83 | void enter_idle(void) |
78 | { | 84 | { |
79 | write_pda(isidle, 1); | 85 | percpu_write(is_idle, 1); |
80 | atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL); | 86 | atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL); |
81 | } | 87 | } |
82 | 88 | ||
83 | static void __exit_idle(void) | 89 | static void __exit_idle(void) |
84 | { | 90 | { |
85 | if (test_and_clear_bit_pda(0, isidle) == 0) | 91 | if (x86_test_and_clear_bit_percpu(0, is_idle) == 0) |
86 | return; | 92 | return; |
87 | atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL); | 93 | atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL); |
88 | } | 94 | } |
@@ -112,6 +118,16 @@ static inline void play_dead(void) | |||
112 | void cpu_idle(void) | 118 | void cpu_idle(void) |
113 | { | 119 | { |
114 | current_thread_info()->status |= TS_POLLING; | 120 | current_thread_info()->status |= TS_POLLING; |
121 | |||
122 | /* | ||
123 | * If we're the non-boot CPU, nothing set the stack canary up | ||
124 | * for us. CPU0 already has it initialized but no harm in | ||
125 | * doing it again. This is a good place for updating it, as | ||
126 | * we wont ever return from this function (so the invalid | ||
127 | * canaries already on the stack wont ever trigger). | ||
128 | */ | ||
129 | boot_init_stack_canary(); | ||
130 | |||
115 | /* endless idle loop with no priority at all */ | 131 | /* endless idle loop with no priority at all */ |
116 | while (1) { | 132 | while (1) { |
117 | tick_nohz_stop_sched_tick(1); | 133 | tick_nohz_stop_sched_tick(1); |
@@ -221,61 +237,6 @@ void show_regs(struct pt_regs *regs) | |||
221 | show_trace(NULL, regs, (void *)(regs + 1), regs->bp); | 237 | show_trace(NULL, regs, (void *)(regs + 1), regs->bp); |
222 | } | 238 | } |
223 | 239 | ||
224 | /* | ||
225 | * Free current thread data structures etc.. | ||
226 | */ | ||
227 | void exit_thread(void) | ||
228 | { | ||
229 | struct task_struct *me = current; | ||
230 | struct thread_struct *t = &me->thread; | ||
231 | |||
232 | if (me->thread.io_bitmap_ptr) { | ||
233 | struct tss_struct *tss = &per_cpu(init_tss, get_cpu()); | ||
234 | |||
235 | kfree(t->io_bitmap_ptr); | ||
236 | t->io_bitmap_ptr = NULL; | ||
237 | clear_thread_flag(TIF_IO_BITMAP); | ||
238 | /* | ||
239 | * Careful, clear this in the TSS too: | ||
240 | */ | ||
241 | memset(tss->io_bitmap, 0xff, t->io_bitmap_max); | ||
242 | t->io_bitmap_max = 0; | ||
243 | put_cpu(); | ||
244 | } | ||
245 | |||
246 | ds_exit_thread(current); | ||
247 | } | ||
248 | |||
249 | void flush_thread(void) | ||
250 | { | ||
251 | struct task_struct *tsk = current; | ||
252 | |||
253 | if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) { | ||
254 | clear_tsk_thread_flag(tsk, TIF_ABI_PENDING); | ||
255 | if (test_tsk_thread_flag(tsk, TIF_IA32)) { | ||
256 | clear_tsk_thread_flag(tsk, TIF_IA32); | ||
257 | } else { | ||
258 | set_tsk_thread_flag(tsk, TIF_IA32); | ||
259 | current_thread_info()->status |= TS_COMPAT; | ||
260 | } | ||
261 | } | ||
262 | clear_tsk_thread_flag(tsk, TIF_DEBUG); | ||
263 | |||
264 | tsk->thread.debugreg0 = 0; | ||
265 | tsk->thread.debugreg1 = 0; | ||
266 | tsk->thread.debugreg2 = 0; | ||
267 | tsk->thread.debugreg3 = 0; | ||
268 | tsk->thread.debugreg6 = 0; | ||
269 | tsk->thread.debugreg7 = 0; | ||
270 | memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array)); | ||
271 | /* | ||
272 | * Forget coprocessor state.. | ||
273 | */ | ||
274 | tsk->fpu_counter = 0; | ||
275 | clear_fpu(tsk); | ||
276 | clear_used_math(); | ||
277 | } | ||
278 | |||
279 | void release_thread(struct task_struct *dead_task) | 240 | void release_thread(struct task_struct *dead_task) |
280 | { | 241 | { |
281 | if (dead_task->mm) { | 242 | if (dead_task->mm) { |
@@ -397,7 +358,7 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) | |||
397 | load_gs_index(0); | 358 | load_gs_index(0); |
398 | regs->ip = new_ip; | 359 | regs->ip = new_ip; |
399 | regs->sp = new_sp; | 360 | regs->sp = new_sp; |
400 | write_pda(oldrsp, new_sp); | 361 | percpu_write(old_rsp, new_sp); |
401 | regs->cs = __USER_CS; | 362 | regs->cs = __USER_CS; |
402 | regs->ss = __USER_DS; | 363 | regs->ss = __USER_DS; |
403 | regs->flags = 0x200; | 364 | regs->flags = 0x200; |
@@ -409,118 +370,6 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) | |||
409 | } | 370 | } |
410 | EXPORT_SYMBOL_GPL(start_thread); | 371 | EXPORT_SYMBOL_GPL(start_thread); |
411 | 372 | ||
412 | static void hard_disable_TSC(void) | ||
413 | { | ||
414 | write_cr4(read_cr4() | X86_CR4_TSD); | ||
415 | } | ||
416 | |||
417 | void disable_TSC(void) | ||
418 | { | ||
419 | preempt_disable(); | ||
420 | if (!test_and_set_thread_flag(TIF_NOTSC)) | ||
421 | /* | ||
422 | * Must flip the CPU state synchronously with | ||
423 | * TIF_NOTSC in the current running context. | ||
424 | */ | ||
425 | hard_disable_TSC(); | ||
426 | preempt_enable(); | ||
427 | } | ||
428 | |||
429 | static void hard_enable_TSC(void) | ||
430 | { | ||
431 | write_cr4(read_cr4() & ~X86_CR4_TSD); | ||
432 | } | ||
433 | |||
434 | static void enable_TSC(void) | ||
435 | { | ||
436 | preempt_disable(); | ||
437 | if (test_and_clear_thread_flag(TIF_NOTSC)) | ||
438 | /* | ||
439 | * Must flip the CPU state synchronously with | ||
440 | * TIF_NOTSC in the current running context. | ||
441 | */ | ||
442 | hard_enable_TSC(); | ||
443 | preempt_enable(); | ||
444 | } | ||
445 | |||
446 | int get_tsc_mode(unsigned long adr) | ||
447 | { | ||
448 | unsigned int val; | ||
449 | |||
450 | if (test_thread_flag(TIF_NOTSC)) | ||
451 | val = PR_TSC_SIGSEGV; | ||
452 | else | ||
453 | val = PR_TSC_ENABLE; | ||
454 | |||
455 | return put_user(val, (unsigned int __user *)adr); | ||
456 | } | ||
457 | |||
458 | int set_tsc_mode(unsigned int val) | ||
459 | { | ||
460 | if (val == PR_TSC_SIGSEGV) | ||
461 | disable_TSC(); | ||
462 | else if (val == PR_TSC_ENABLE) | ||
463 | enable_TSC(); | ||
464 | else | ||
465 | return -EINVAL; | ||
466 | |||
467 | return 0; | ||
468 | } | ||
469 | |||
470 | /* | ||
471 | * This special macro can be used to load a debugging register | ||
472 | */ | ||
473 | #define loaddebug(thread, r) set_debugreg(thread->debugreg ## r, r) | ||
474 | |||
475 | static inline void __switch_to_xtra(struct task_struct *prev_p, | ||
476 | struct task_struct *next_p, | ||
477 | struct tss_struct *tss) | ||
478 | { | ||
479 | struct thread_struct *prev, *next; | ||
480 | |||
481 | prev = &prev_p->thread, | ||
482 | next = &next_p->thread; | ||
483 | |||
484 | if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) || | ||
485 | test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR)) | ||
486 | ds_switch_to(prev_p, next_p); | ||
487 | else if (next->debugctlmsr != prev->debugctlmsr) | ||
488 | update_debugctlmsr(next->debugctlmsr); | ||
489 | |||
490 | if (test_tsk_thread_flag(next_p, TIF_DEBUG)) { | ||
491 | loaddebug(next, 0); | ||
492 | loaddebug(next, 1); | ||
493 | loaddebug(next, 2); | ||
494 | loaddebug(next, 3); | ||
495 | /* no 4 and 5 */ | ||
496 | loaddebug(next, 6); | ||
497 | loaddebug(next, 7); | ||
498 | } | ||
499 | |||
500 | if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^ | ||
501 | test_tsk_thread_flag(next_p, TIF_NOTSC)) { | ||
502 | /* prev and next are different */ | ||
503 | if (test_tsk_thread_flag(next_p, TIF_NOTSC)) | ||
504 | hard_disable_TSC(); | ||
505 | else | ||
506 | hard_enable_TSC(); | ||
507 | } | ||
508 | |||
509 | if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) { | ||
510 | /* | ||
511 | * Copy the relevant range of the IO bitmap. | ||
512 | * Normally this is 128 bytes or less: | ||
513 | */ | ||
514 | memcpy(tss->io_bitmap, next->io_bitmap_ptr, | ||
515 | max(prev->io_bitmap_max, next->io_bitmap_max)); | ||
516 | } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) { | ||
517 | /* | ||
518 | * Clear any possible leftover bits: | ||
519 | */ | ||
520 | memset(tss->io_bitmap, 0xff, prev->io_bitmap_max); | ||
521 | } | ||
522 | } | ||
523 | |||
524 | /* | 373 | /* |
525 | * switch_to(x,y) should switch tasks from x to y. | 374 | * switch_to(x,y) should switch tasks from x to y. |
526 | * | 375 | * |
@@ -618,21 +467,13 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |||
618 | /* | 467 | /* |
619 | * Switch the PDA and FPU contexts. | 468 | * Switch the PDA and FPU contexts. |
620 | */ | 469 | */ |
621 | prev->usersp = read_pda(oldrsp); | 470 | prev->usersp = percpu_read(old_rsp); |
622 | write_pda(oldrsp, next->usersp); | 471 | percpu_write(old_rsp, next->usersp); |
623 | write_pda(pcurrent, next_p); | 472 | percpu_write(current_task, next_p); |
624 | 473 | ||
625 | write_pda(kernelstack, | 474 | percpu_write(kernel_stack, |
626 | (unsigned long)task_stack_page(next_p) + | 475 | (unsigned long)task_stack_page(next_p) + |
627 | THREAD_SIZE - PDA_STACKOFFSET); | 476 | THREAD_SIZE - KERNEL_STACK_OFFSET); |
628 | #ifdef CONFIG_CC_STACKPROTECTOR | ||
629 | write_pda(stack_canary, next_p->stack_canary); | ||
630 | /* | ||
631 | * Build time only check to make sure the stack_canary is at | ||
632 | * offset 40 in the pda; this is a gcc ABI requirement | ||
633 | */ | ||
634 | BUILD_BUG_ON(offsetof(struct x8664_pda, stack_canary) != 40); | ||
635 | #endif | ||
636 | 477 | ||
637 | /* | 478 | /* |
638 | * Now maybe reload the debug registers and handle I/O bitmaps | 479 | * Now maybe reload the debug registers and handle I/O bitmaps |
@@ -686,11 +527,6 @@ void set_personality_64bit(void) | |||
686 | current->personality &= ~READ_IMPLIES_EXEC; | 527 | current->personality &= ~READ_IMPLIES_EXEC; |
687 | } | 528 | } |
688 | 529 | ||
689 | asmlinkage long sys_fork(struct pt_regs *regs) | ||
690 | { | ||
691 | return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL); | ||
692 | } | ||
693 | |||
694 | asmlinkage long | 530 | asmlinkage long |
695 | sys_clone(unsigned long clone_flags, unsigned long newsp, | 531 | sys_clone(unsigned long clone_flags, unsigned long newsp, |
696 | void __user *parent_tid, void __user *child_tid, struct pt_regs *regs) | 532 | void __user *parent_tid, void __user *child_tid, struct pt_regs *regs) |
@@ -700,22 +536,6 @@ sys_clone(unsigned long clone_flags, unsigned long newsp, | |||
700 | return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); | 536 | return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); |
701 | } | 537 | } |
702 | 538 | ||
703 | /* | ||
704 | * This is trivial, and on the face of it looks like it | ||
705 | * could equally well be done in user mode. | ||
706 | * | ||
707 | * Not so, for quite unobvious reasons - register pressure. | ||
708 | * In user mode vfork() cannot have a stack frame, and if | ||
709 | * done by calling the "clone()" system call directly, you | ||
710 | * do not have enough call-clobbered registers to hold all | ||
711 | * the information you need. | ||
712 | */ | ||
713 | asmlinkage long sys_vfork(struct pt_regs *regs) | ||
714 | { | ||
715 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0, | ||
716 | NULL, NULL); | ||
717 | } | ||
718 | |||
719 | unsigned long get_wchan(struct task_struct *p) | 539 | unsigned long get_wchan(struct task_struct *p) |
720 | { | 540 | { |
721 | unsigned long stack; | 541 | unsigned long stack; |
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 06ca07f6ad86..3d9672e59c16 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c | |||
@@ -75,10 +75,7 @@ static inline bool invalid_selector(u16 value) | |||
75 | static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) | 75 | static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) |
76 | { | 76 | { |
77 | BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); | 77 | BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); |
78 | regno >>= 2; | 78 | return ®s->bx + (regno >> 2); |
79 | if (regno > FS) | ||
80 | --regno; | ||
81 | return ®s->bx + regno; | ||
82 | } | 79 | } |
83 | 80 | ||
84 | static u16 get_segment_reg(struct task_struct *task, unsigned long offset) | 81 | static u16 get_segment_reg(struct task_struct *task, unsigned long offset) |
@@ -90,9 +87,10 @@ static u16 get_segment_reg(struct task_struct *task, unsigned long offset) | |||
90 | if (offset != offsetof(struct user_regs_struct, gs)) | 87 | if (offset != offsetof(struct user_regs_struct, gs)) |
91 | retval = *pt_regs_access(task_pt_regs(task), offset); | 88 | retval = *pt_regs_access(task_pt_regs(task), offset); |
92 | else { | 89 | else { |
93 | retval = task->thread.gs; | ||
94 | if (task == current) | 90 | if (task == current) |
95 | savesegment(gs, retval); | 91 | retval = get_user_gs(task_pt_regs(task)); |
92 | else | ||
93 | retval = task_user_gs(task); | ||
96 | } | 94 | } |
97 | return retval; | 95 | return retval; |
98 | } | 96 | } |
@@ -126,13 +124,10 @@ static int set_segment_reg(struct task_struct *task, | |||
126 | break; | 124 | break; |
127 | 125 | ||
128 | case offsetof(struct user_regs_struct, gs): | 126 | case offsetof(struct user_regs_struct, gs): |
129 | task->thread.gs = value; | ||
130 | if (task == current) | 127 | if (task == current) |
131 | /* | 128 | set_user_gs(task_pt_regs(task), value); |
132 | * The user-mode %gs is not affected by | 129 | else |
133 | * kernel entry, so we must update the CPU. | 130 | task_user_gs(task) = value; |
134 | */ | ||
135 | loadsegment(gs, value); | ||
136 | } | 131 | } |
137 | 132 | ||
138 | return 0; | 133 | return 0; |
@@ -273,7 +268,7 @@ static unsigned long debugreg_addr_limit(struct task_struct *task) | |||
273 | if (test_tsk_thread_flag(task, TIF_IA32)) | 268 | if (test_tsk_thread_flag(task, TIF_IA32)) |
274 | return IA32_PAGE_OFFSET - 3; | 269 | return IA32_PAGE_OFFSET - 3; |
275 | #endif | 270 | #endif |
276 | return TASK_SIZE64 - 7; | 271 | return TASK_SIZE_MAX - 7; |
277 | } | 272 | } |
278 | 273 | ||
279 | #endif /* CONFIG_X86_32 */ | 274 | #endif /* CONFIG_X86_32 */ |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index 4526b3a75ed2..2aef36d8aca2 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <asm/reboot.h> | 14 | #include <asm/reboot.h> |
15 | #include <asm/pci_x86.h> | 15 | #include <asm/pci_x86.h> |
16 | #include <asm/virtext.h> | 16 | #include <asm/virtext.h> |
17 | #include <asm/cpu.h> | ||
17 | 18 | ||
18 | #ifdef CONFIG_X86_32 | 19 | #ifdef CONFIG_X86_32 |
19 | # include <linux/dmi.h> | 20 | # include <linux/dmi.h> |
@@ -23,8 +24,6 @@ | |||
23 | # include <asm/iommu.h> | 24 | # include <asm/iommu.h> |
24 | #endif | 25 | #endif |
25 | 26 | ||
26 | #include <mach_ipi.h> | ||
27 | |||
28 | /* | 27 | /* |
29 | * Power off function, if any | 28 | * Power off function, if any |
30 | */ | 29 | */ |
@@ -658,7 +657,7 @@ static int crash_nmi_callback(struct notifier_block *self, | |||
658 | 657 | ||
659 | static void smp_send_nmi_allbutself(void) | 658 | static void smp_send_nmi_allbutself(void) |
660 | { | 659 | { |
661 | send_IPI_allbutself(NMI_VECTOR); | 660 | apic->send_IPI_allbutself(NMI_VECTOR); |
662 | } | 661 | } |
663 | 662 | ||
664 | static struct notifier_block crash_nmi_nb = { | 663 | static struct notifier_block crash_nmi_nb = { |
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S index a160f3119725..2064d0aa8d28 100644 --- a/arch/x86/kernel/relocate_kernel_32.S +++ b/arch/x86/kernel/relocate_kernel_32.S | |||
@@ -7,7 +7,7 @@ | |||
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/linkage.h> | 9 | #include <linux/linkage.h> |
10 | #include <asm/page.h> | 10 | #include <asm/page_types.h> |
11 | #include <asm/kexec.h> | 11 | #include <asm/kexec.h> |
12 | #include <asm/processor-flags.h> | 12 | #include <asm/processor-flags.h> |
13 | 13 | ||
diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S index f5afe665a82b..d32cfb27a479 100644 --- a/arch/x86/kernel/relocate_kernel_64.S +++ b/arch/x86/kernel/relocate_kernel_64.S | |||
@@ -7,10 +7,10 @@ | |||
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/linkage.h> | 9 | #include <linux/linkage.h> |
10 | #include <asm/page.h> | 10 | #include <asm/page_types.h> |
11 | #include <asm/kexec.h> | 11 | #include <asm/kexec.h> |
12 | #include <asm/processor-flags.h> | 12 | #include <asm/processor-flags.h> |
13 | #include <asm/pgtable.h> | 13 | #include <asm/pgtable_types.h> |
14 | 14 | ||
15 | /* | 15 | /* |
16 | * Must be relocatable PIC code callable as a C function | 16 | * Must be relocatable PIC code callable as a C function |
@@ -29,122 +29,6 @@ relocate_kernel: | |||
29 | * %rdx start address | 29 | * %rdx start address |
30 | */ | 30 | */ |
31 | 31 | ||
32 | /* map the control page at its virtual address */ | ||
33 | |||
34 | movq $0x0000ff8000000000, %r10 /* mask */ | ||
35 | mov $(39 - 3), %cl /* bits to shift */ | ||
36 | movq PTR(VA_CONTROL_PAGE)(%rsi), %r11 /* address to map */ | ||
37 | |||
38 | movq %r11, %r9 | ||
39 | andq %r10, %r9 | ||
40 | shrq %cl, %r9 | ||
41 | |||
42 | movq PTR(VA_PGD)(%rsi), %r8 | ||
43 | addq %r8, %r9 | ||
44 | movq PTR(PA_PUD_0)(%rsi), %r8 | ||
45 | orq $PAGE_ATTR, %r8 | ||
46 | movq %r8, (%r9) | ||
47 | |||
48 | shrq $9, %r10 | ||
49 | sub $9, %cl | ||
50 | |||
51 | movq %r11, %r9 | ||
52 | andq %r10, %r9 | ||
53 | shrq %cl, %r9 | ||
54 | |||
55 | movq PTR(VA_PUD_0)(%rsi), %r8 | ||
56 | addq %r8, %r9 | ||
57 | movq PTR(PA_PMD_0)(%rsi), %r8 | ||
58 | orq $PAGE_ATTR, %r8 | ||
59 | movq %r8, (%r9) | ||
60 | |||
61 | shrq $9, %r10 | ||
62 | sub $9, %cl | ||
63 | |||
64 | movq %r11, %r9 | ||
65 | andq %r10, %r9 | ||
66 | shrq %cl, %r9 | ||
67 | |||
68 | movq PTR(VA_PMD_0)(%rsi), %r8 | ||
69 | addq %r8, %r9 | ||
70 | movq PTR(PA_PTE_0)(%rsi), %r8 | ||
71 | orq $PAGE_ATTR, %r8 | ||
72 | movq %r8, (%r9) | ||
73 | |||
74 | shrq $9, %r10 | ||
75 | sub $9, %cl | ||
76 | |||
77 | movq %r11, %r9 | ||
78 | andq %r10, %r9 | ||
79 | shrq %cl, %r9 | ||
80 | |||
81 | movq PTR(VA_PTE_0)(%rsi), %r8 | ||
82 | addq %r8, %r9 | ||
83 | movq PTR(PA_CONTROL_PAGE)(%rsi), %r8 | ||
84 | orq $PAGE_ATTR, %r8 | ||
85 | movq %r8, (%r9) | ||
86 | |||
87 | /* identity map the control page at its physical address */ | ||
88 | |||
89 | movq $0x0000ff8000000000, %r10 /* mask */ | ||
90 | mov $(39 - 3), %cl /* bits to shift */ | ||
91 | movq PTR(PA_CONTROL_PAGE)(%rsi), %r11 /* address to map */ | ||
92 | |||
93 | movq %r11, %r9 | ||
94 | andq %r10, %r9 | ||
95 | shrq %cl, %r9 | ||
96 | |||
97 | movq PTR(VA_PGD)(%rsi), %r8 | ||
98 | addq %r8, %r9 | ||
99 | movq PTR(PA_PUD_1)(%rsi), %r8 | ||
100 | orq $PAGE_ATTR, %r8 | ||
101 | movq %r8, (%r9) | ||
102 | |||
103 | shrq $9, %r10 | ||
104 | sub $9, %cl | ||
105 | |||
106 | movq %r11, %r9 | ||
107 | andq %r10, %r9 | ||
108 | shrq %cl, %r9 | ||
109 | |||
110 | movq PTR(VA_PUD_1)(%rsi), %r8 | ||
111 | addq %r8, %r9 | ||
112 | movq PTR(PA_PMD_1)(%rsi), %r8 | ||
113 | orq $PAGE_ATTR, %r8 | ||
114 | movq %r8, (%r9) | ||
115 | |||
116 | shrq $9, %r10 | ||
117 | sub $9, %cl | ||
118 | |||
119 | movq %r11, %r9 | ||
120 | andq %r10, %r9 | ||
121 | shrq %cl, %r9 | ||
122 | |||
123 | movq PTR(VA_PMD_1)(%rsi), %r8 | ||
124 | addq %r8, %r9 | ||
125 | movq PTR(PA_PTE_1)(%rsi), %r8 | ||
126 | orq $PAGE_ATTR, %r8 | ||
127 | movq %r8, (%r9) | ||
128 | |||
129 | shrq $9, %r10 | ||
130 | sub $9, %cl | ||
131 | |||
132 | movq %r11, %r9 | ||
133 | andq %r10, %r9 | ||
134 | shrq %cl, %r9 | ||
135 | |||
136 | movq PTR(VA_PTE_1)(%rsi), %r8 | ||
137 | addq %r8, %r9 | ||
138 | movq PTR(PA_CONTROL_PAGE)(%rsi), %r8 | ||
139 | orq $PAGE_ATTR, %r8 | ||
140 | movq %r8, (%r9) | ||
141 | |||
142 | relocate_new_kernel: | ||
143 | /* %rdi indirection_page | ||
144 | * %rsi page_list | ||
145 | * %rdx start address | ||
146 | */ | ||
147 | |||
148 | /* zero out flags, and disable interrupts */ | 32 | /* zero out flags, and disable interrupts */ |
149 | pushq $0 | 33 | pushq $0 |
150 | popfq | 34 | popfq |
@@ -156,9 +40,8 @@ relocate_new_kernel: | |||
156 | /* get physical address of page table now too */ | 40 | /* get physical address of page table now too */ |
157 | movq PTR(PA_TABLE_PAGE)(%rsi), %rcx | 41 | movq PTR(PA_TABLE_PAGE)(%rsi), %rcx |
158 | 42 | ||
159 | /* switch to new set of page tables */ | 43 | /* Switch to the identity mapped page tables */ |
160 | movq PTR(PA_PGD)(%rsi), %r9 | 44 | movq %rcx, %cr3 |
161 | movq %r9, %cr3 | ||
162 | 45 | ||
163 | /* setup a new stack at the end of the physical control page */ | 46 | /* setup a new stack at the end of the physical control page */ |
164 | lea PAGE_SIZE(%r8), %rsp | 47 | lea PAGE_SIZE(%r8), %rsp |
@@ -194,9 +77,7 @@ identity_mapped: | |||
194 | jmp 1f | 77 | jmp 1f |
195 | 1: | 78 | 1: |
196 | 79 | ||
197 | /* Switch to the identity mapped page tables, | 80 | /* Flush the TLB (needed?) */ |
198 | * and flush the TLB. | ||
199 | */ | ||
200 | movq %rcx, %cr3 | 81 | movq %rcx, %cr3 |
201 | 82 | ||
202 | /* Do the copies */ | 83 | /* Do the copies */ |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 6a8811a69324..b746deb9ebc6 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -74,14 +74,15 @@ | |||
74 | #include <asm/e820.h> | 74 | #include <asm/e820.h> |
75 | #include <asm/mpspec.h> | 75 | #include <asm/mpspec.h> |
76 | #include <asm/setup.h> | 76 | #include <asm/setup.h> |
77 | #include <asm/arch_hooks.h> | ||
78 | #include <asm/efi.h> | 77 | #include <asm/efi.h> |
78 | #include <asm/timer.h> | ||
79 | #include <asm/i8259.h> | ||
79 | #include <asm/sections.h> | 80 | #include <asm/sections.h> |
80 | #include <asm/dmi.h> | 81 | #include <asm/dmi.h> |
81 | #include <asm/io_apic.h> | 82 | #include <asm/io_apic.h> |
82 | #include <asm/ist.h> | 83 | #include <asm/ist.h> |
83 | #include <asm/vmi.h> | 84 | #include <asm/vmi.h> |
84 | #include <setup_arch.h> | 85 | #include <asm/setup_arch.h> |
85 | #include <asm/bios_ebda.h> | 86 | #include <asm/bios_ebda.h> |
86 | #include <asm/cacheflush.h> | 87 | #include <asm/cacheflush.h> |
87 | #include <asm/processor.h> | 88 | #include <asm/processor.h> |
@@ -89,7 +90,7 @@ | |||
89 | 90 | ||
90 | #include <asm/system.h> | 91 | #include <asm/system.h> |
91 | #include <asm/vsyscall.h> | 92 | #include <asm/vsyscall.h> |
92 | #include <asm/smp.h> | 93 | #include <asm/cpu.h> |
93 | #include <asm/desc.h> | 94 | #include <asm/desc.h> |
94 | #include <asm/dma.h> | 95 | #include <asm/dma.h> |
95 | #include <asm/iommu.h> | 96 | #include <asm/iommu.h> |
@@ -97,7 +98,6 @@ | |||
97 | #include <asm/mmu_context.h> | 98 | #include <asm/mmu_context.h> |
98 | #include <asm/proto.h> | 99 | #include <asm/proto.h> |
99 | 100 | ||
100 | #include <mach_apic.h> | ||
101 | #include <asm/paravirt.h> | 101 | #include <asm/paravirt.h> |
102 | #include <asm/hypervisor.h> | 102 | #include <asm/hypervisor.h> |
103 | 103 | ||
@@ -112,6 +112,20 @@ | |||
112 | #define ARCH_SETUP | 112 | #define ARCH_SETUP |
113 | #endif | 113 | #endif |
114 | 114 | ||
115 | unsigned int boot_cpu_id __read_mostly; | ||
116 | |||
117 | #ifdef CONFIG_X86_64 | ||
118 | int default_cpu_present_to_apicid(int mps_cpu) | ||
119 | { | ||
120 | return __default_cpu_present_to_apicid(mps_cpu); | ||
121 | } | ||
122 | |||
123 | int default_check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
124 | { | ||
125 | return __default_check_phys_apicid_present(boot_cpu_physical_apicid); | ||
126 | } | ||
127 | #endif | ||
128 | |||
115 | #ifndef CONFIG_DEBUG_BOOT_PARAMS | 129 | #ifndef CONFIG_DEBUG_BOOT_PARAMS |
116 | struct boot_params __initdata boot_params; | 130 | struct boot_params __initdata boot_params; |
117 | #else | 131 | #else |
@@ -586,20 +600,7 @@ static int __init setup_elfcorehdr(char *arg) | |||
586 | early_param("elfcorehdr", setup_elfcorehdr); | 600 | early_param("elfcorehdr", setup_elfcorehdr); |
587 | #endif | 601 | #endif |
588 | 602 | ||
589 | static int __init default_update_genapic(void) | 603 | static struct x86_quirks default_x86_quirks __initdata; |
590 | { | ||
591 | #ifdef CONFIG_X86_SMP | ||
592 | # if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64) | ||
593 | genapic->wakeup_cpu = wakeup_secondary_cpu_via_init; | ||
594 | # endif | ||
595 | #endif | ||
596 | |||
597 | return 0; | ||
598 | } | ||
599 | |||
600 | static struct x86_quirks default_x86_quirks __initdata = { | ||
601 | .update_genapic = default_update_genapic, | ||
602 | }; | ||
603 | 604 | ||
604 | struct x86_quirks *x86_quirks __initdata = &default_x86_quirks; | 605 | struct x86_quirks *x86_quirks __initdata = &default_x86_quirks; |
605 | 606 | ||
@@ -656,7 +657,6 @@ void __init setup_arch(char **cmdline_p) | |||
656 | #ifdef CONFIG_X86_32 | 657 | #ifdef CONFIG_X86_32 |
657 | memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data)); | 658 | memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data)); |
658 | visws_early_detect(); | 659 | visws_early_detect(); |
659 | pre_setup_arch_hook(); | ||
660 | #else | 660 | #else |
661 | printk(KERN_INFO "Command line: %s\n", boot_command_line); | 661 | printk(KERN_INFO "Command line: %s\n", boot_command_line); |
662 | #endif | 662 | #endif |
@@ -824,8 +824,7 @@ void __init setup_arch(char **cmdline_p) | |||
824 | #else | 824 | #else |
825 | num_physpages = max_pfn; | 825 | num_physpages = max_pfn; |
826 | 826 | ||
827 | if (cpu_has_x2apic) | 827 | check_x2apic(); |
828 | check_x2apic(); | ||
829 | 828 | ||
830 | /* How many end-of-memory variables you have, grandma! */ | 829 | /* How many end-of-memory variables you have, grandma! */ |
831 | /* need this before calling reserve_initrd */ | 830 | /* need this before calling reserve_initrd */ |
@@ -865,9 +864,7 @@ void __init setup_arch(char **cmdline_p) | |||
865 | 864 | ||
866 | reserve_initrd(); | 865 | reserve_initrd(); |
867 | 866 | ||
868 | #ifdef CONFIG_X86_64 | ||
869 | vsmp_init(); | 867 | vsmp_init(); |
870 | #endif | ||
871 | 868 | ||
872 | io_delay_init(); | 869 | io_delay_init(); |
873 | 870 | ||
@@ -893,12 +890,11 @@ void __init setup_arch(char **cmdline_p) | |||
893 | */ | 890 | */ |
894 | acpi_reserve_bootmem(); | 891 | acpi_reserve_bootmem(); |
895 | #endif | 892 | #endif |
896 | #ifdef CONFIG_X86_FIND_SMP_CONFIG | ||
897 | /* | 893 | /* |
898 | * Find and reserve possible boot-time SMP configuration: | 894 | * Find and reserve possible boot-time SMP configuration: |
899 | */ | 895 | */ |
900 | find_smp_config(); | 896 | find_smp_config(); |
901 | #endif | 897 | |
902 | reserve_crashkernel(); | 898 | reserve_crashkernel(); |
903 | 899 | ||
904 | #ifdef CONFIG_X86_64 | 900 | #ifdef CONFIG_X86_64 |
@@ -925,9 +921,7 @@ void __init setup_arch(char **cmdline_p) | |||
925 | map_vsyscall(); | 921 | map_vsyscall(); |
926 | #endif | 922 | #endif |
927 | 923 | ||
928 | #ifdef CONFIG_X86_GENERICARCH | ||
929 | generic_apic_probe(); | 924 | generic_apic_probe(); |
930 | #endif | ||
931 | 925 | ||
932 | early_quirks(); | 926 | early_quirks(); |
933 | 927 | ||
@@ -978,4 +972,95 @@ void __init setup_arch(char **cmdline_p) | |||
978 | #endif | 972 | #endif |
979 | } | 973 | } |
980 | 974 | ||
975 | #ifdef CONFIG_X86_32 | ||
981 | 976 | ||
977 | /** | ||
978 | * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors | ||
979 | * | ||
980 | * Description: | ||
981 | * Perform any necessary interrupt initialisation prior to setting up | ||
982 | * the "ordinary" interrupt call gates. For legacy reasons, the ISA | ||
983 | * interrupts should be initialised here if the machine emulates a PC | ||
984 | * in any way. | ||
985 | **/ | ||
986 | void __init x86_quirk_pre_intr_init(void) | ||
987 | { | ||
988 | if (x86_quirks->arch_pre_intr_init) { | ||
989 | if (x86_quirks->arch_pre_intr_init()) | ||
990 | return; | ||
991 | } | ||
992 | init_ISA_irqs(); | ||
993 | } | ||
994 | |||
995 | /** | ||
996 | * x86_quirk_intr_init - post gate setup interrupt initialisation | ||
997 | * | ||
998 | * Description: | ||
999 | * Fill in any interrupts that may have been left out by the general | ||
1000 | * init_IRQ() routine. interrupts having to do with the machine rather | ||
1001 | * than the devices on the I/O bus (like APIC interrupts in intel MP | ||
1002 | * systems) are started here. | ||
1003 | **/ | ||
1004 | void __init x86_quirk_intr_init(void) | ||
1005 | { | ||
1006 | if (x86_quirks->arch_intr_init) { | ||
1007 | if (x86_quirks->arch_intr_init()) | ||
1008 | return; | ||
1009 | } | ||
1010 | } | ||
1011 | |||
1012 | /** | ||
1013 | * x86_quirk_trap_init - initialise system specific traps | ||
1014 | * | ||
1015 | * Description: | ||
1016 | * Called as the final act of trap_init(). Used in VISWS to initialise | ||
1017 | * the various board specific APIC traps. | ||
1018 | **/ | ||
1019 | void __init x86_quirk_trap_init(void) | ||
1020 | { | ||
1021 | if (x86_quirks->arch_trap_init) { | ||
1022 | if (x86_quirks->arch_trap_init()) | ||
1023 | return; | ||
1024 | } | ||
1025 | } | ||
1026 | |||
1027 | static struct irqaction irq0 = { | ||
1028 | .handler = timer_interrupt, | ||
1029 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, | ||
1030 | .mask = CPU_MASK_NONE, | ||
1031 | .name = "timer" | ||
1032 | }; | ||
1033 | |||
1034 | /** | ||
1035 | * x86_quirk_pre_time_init - do any specific initialisations before. | ||
1036 | * | ||
1037 | **/ | ||
1038 | void __init x86_quirk_pre_time_init(void) | ||
1039 | { | ||
1040 | if (x86_quirks->arch_pre_time_init) | ||
1041 | x86_quirks->arch_pre_time_init(); | ||
1042 | } | ||
1043 | |||
1044 | /** | ||
1045 | * x86_quirk_time_init - do any specific initialisations for the system timer. | ||
1046 | * | ||
1047 | * Description: | ||
1048 | * Must plug the system timer interrupt source at HZ into the IRQ listed | ||
1049 | * in irq_vectors.h:TIMER_IRQ | ||
1050 | **/ | ||
1051 | void __init x86_quirk_time_init(void) | ||
1052 | { | ||
1053 | if (x86_quirks->arch_time_init) { | ||
1054 | /* | ||
1055 | * A nonzero return code does not mean failure, it means | ||
1056 | * that the architecture quirk does not want any | ||
1057 | * generic (timer) setup to be performed after this: | ||
1058 | */ | ||
1059 | if (x86_quirks->arch_time_init()) | ||
1060 | return; | ||
1061 | } | ||
1062 | |||
1063 | irq0.mask = cpumask_of_cpu(0); | ||
1064 | setup_irq(0, &irq0); | ||
1065 | } | ||
1066 | #endif /* CONFIG_X86_32 */ | ||
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index 01161077a49c..400331b50a53 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c | |||
@@ -7,402 +7,439 @@ | |||
7 | #include <linux/crash_dump.h> | 7 | #include <linux/crash_dump.h> |
8 | #include <linux/smp.h> | 8 | #include <linux/smp.h> |
9 | #include <linux/topology.h> | 9 | #include <linux/topology.h> |
10 | #include <linux/pfn.h> | ||
10 | #include <asm/sections.h> | 11 | #include <asm/sections.h> |
11 | #include <asm/processor.h> | 12 | #include <asm/processor.h> |
12 | #include <asm/setup.h> | 13 | #include <asm/setup.h> |
13 | #include <asm/mpspec.h> | 14 | #include <asm/mpspec.h> |
14 | #include <asm/apicdef.h> | 15 | #include <asm/apicdef.h> |
15 | #include <asm/highmem.h> | 16 | #include <asm/highmem.h> |
17 | #include <asm/proto.h> | ||
18 | #include <asm/cpumask.h> | ||
19 | #include <asm/cpu.h> | ||
20 | #include <asm/stackprotector.h> | ||
16 | 21 | ||
17 | #ifdef CONFIG_X86_LOCAL_APIC | 22 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS |
18 | unsigned int num_processors; | 23 | # define DBG(x...) printk(KERN_DEBUG x) |
19 | unsigned disabled_cpus __cpuinitdata; | 24 | #else |
20 | /* Processor that is doing the boot up */ | 25 | # define DBG(x...) |
21 | unsigned int boot_cpu_physical_apicid = -1U; | ||
22 | EXPORT_SYMBOL(boot_cpu_physical_apicid); | ||
23 | unsigned int max_physical_apicid; | ||
24 | |||
25 | /* Bitmask of physically existing CPUs */ | ||
26 | physid_mask_t phys_cpu_present_map; | ||
27 | #endif | 26 | #endif |
28 | 27 | ||
29 | /* map cpu index to physical APIC ID */ | 28 | DEFINE_PER_CPU(int, cpu_number); |
30 | DEFINE_EARLY_PER_CPU(u16, x86_cpu_to_apicid, BAD_APICID); | 29 | EXPORT_PER_CPU_SYMBOL(cpu_number); |
31 | DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID); | ||
32 | EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid); | ||
33 | EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid); | ||
34 | |||
35 | #if defined(CONFIG_NUMA) && defined(CONFIG_X86_64) | ||
36 | #define X86_64_NUMA 1 | ||
37 | 30 | ||
38 | /* map cpu index to node index */ | 31 | #ifdef CONFIG_X86_64 |
39 | DEFINE_EARLY_PER_CPU(int, x86_cpu_to_node_map, NUMA_NO_NODE); | 32 | #define BOOT_PERCPU_OFFSET ((unsigned long)__per_cpu_load) |
40 | EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_node_map); | 33 | #else |
34 | #define BOOT_PERCPU_OFFSET 0 | ||
35 | #endif | ||
41 | 36 | ||
42 | /* which logical CPUs are on which nodes */ | 37 | DEFINE_PER_CPU(unsigned long, this_cpu_off) = BOOT_PERCPU_OFFSET; |
43 | cpumask_t *node_to_cpumask_map; | 38 | EXPORT_PER_CPU_SYMBOL(this_cpu_off); |
44 | EXPORT_SYMBOL(node_to_cpumask_map); | ||
45 | 39 | ||
46 | /* setup node_to_cpumask_map */ | 40 | unsigned long __per_cpu_offset[NR_CPUS] __read_mostly = { |
47 | static void __init setup_node_to_cpumask_map(void); | 41 | [0 ... NR_CPUS-1] = BOOT_PERCPU_OFFSET, |
42 | }; | ||
43 | EXPORT_SYMBOL(__per_cpu_offset); | ||
48 | 44 | ||
45 | /* | ||
46 | * On x86_64 symbols referenced from code should be reachable using | ||
47 | * 32bit relocations. Reserve space for static percpu variables in | ||
48 | * modules so that they are always served from the first chunk which | ||
49 | * is located at the percpu segment base. On x86_32, anything can | ||
50 | * address anywhere. No need to reserve space in the first chunk. | ||
51 | */ | ||
52 | #ifdef CONFIG_X86_64 | ||
53 | #define PERCPU_FIRST_CHUNK_RESERVE PERCPU_MODULE_RESERVE | ||
49 | #else | 54 | #else |
50 | static inline void setup_node_to_cpumask_map(void) { } | 55 | #define PERCPU_FIRST_CHUNK_RESERVE 0 |
51 | #endif | 56 | #endif |
52 | 57 | ||
53 | #if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_X86_SMP) | 58 | /** |
54 | /* | 59 | * pcpu_need_numa - determine percpu allocation needs to consider NUMA |
55 | * Copy data used in early init routines from the initial arrays to the | 60 | * |
56 | * per cpu data areas. These arrays then become expendable and the | 61 | * If NUMA is not configured or there is only one NUMA node available, |
57 | * *_early_ptr's are zeroed indicating that the static arrays are gone. | 62 | * there is no reason to consider NUMA. This function determines |
63 | * whether percpu allocation should consider NUMA or not. | ||
64 | * | ||
65 | * RETURNS: | ||
66 | * true if NUMA should be considered; otherwise, false. | ||
58 | */ | 67 | */ |
59 | static void __init setup_per_cpu_maps(void) | 68 | static bool __init pcpu_need_numa(void) |
60 | { | 69 | { |
61 | int cpu; | 70 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
71 | pg_data_t *last = NULL; | ||
72 | unsigned int cpu; | ||
62 | 73 | ||
63 | for_each_possible_cpu(cpu) { | 74 | for_each_possible_cpu(cpu) { |
64 | per_cpu(x86_cpu_to_apicid, cpu) = | 75 | int node = early_cpu_to_node(cpu); |
65 | early_per_cpu_map(x86_cpu_to_apicid, cpu); | ||
66 | per_cpu(x86_bios_cpu_apicid, cpu) = | ||
67 | early_per_cpu_map(x86_bios_cpu_apicid, cpu); | ||
68 | #ifdef X86_64_NUMA | ||
69 | per_cpu(x86_cpu_to_node_map, cpu) = | ||
70 | early_per_cpu_map(x86_cpu_to_node_map, cpu); | ||
71 | #endif | ||
72 | } | ||
73 | 76 | ||
74 | /* indicate the early static arrays will soon be gone */ | 77 | if (node_online(node) && NODE_DATA(node) && |
75 | early_per_cpu_ptr(x86_cpu_to_apicid) = NULL; | 78 | last && last != NODE_DATA(node)) |
76 | early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL; | 79 | return true; |
77 | #ifdef X86_64_NUMA | 80 | |
78 | early_per_cpu_ptr(x86_cpu_to_node_map) = NULL; | 81 | last = NODE_DATA(node); |
82 | } | ||
79 | #endif | 83 | #endif |
84 | return false; | ||
80 | } | 85 | } |
81 | 86 | ||
82 | #ifdef CONFIG_X86_32 | 87 | /** |
83 | /* | 88 | * pcpu_alloc_bootmem - NUMA friendly alloc_bootmem wrapper for percpu |
84 | * Great future not-so-futuristic plan: make i386 and x86_64 do it | 89 | * @cpu: cpu to allocate for |
85 | * the same way | 90 | * @size: size allocation in bytes |
86 | */ | 91 | * @align: alignment |
87 | unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; | 92 | * |
88 | EXPORT_SYMBOL(__per_cpu_offset); | 93 | * Allocate @size bytes aligned at @align for cpu @cpu. This wrapper |
89 | static inline void setup_cpu_pda_map(void) { } | 94 | * does the right thing for NUMA regardless of the current |
90 | 95 | * configuration. | |
91 | #elif !defined(CONFIG_SMP) | 96 | * |
92 | static inline void setup_cpu_pda_map(void) { } | 97 | * RETURNS: |
93 | 98 | * Pointer to the allocated area on success, NULL on failure. | |
94 | #else /* CONFIG_SMP && CONFIG_X86_64 */ | ||
95 | |||
96 | /* | ||
97 | * Allocate cpu_pda pointer table and array via alloc_bootmem. | ||
98 | */ | 99 | */ |
99 | static void __init setup_cpu_pda_map(void) | 100 | static void * __init pcpu_alloc_bootmem(unsigned int cpu, unsigned long size, |
101 | unsigned long align) | ||
100 | { | 102 | { |
101 | char *pda; | 103 | const unsigned long goal = __pa(MAX_DMA_ADDRESS); |
102 | struct x8664_pda **new_cpu_pda; | 104 | #ifdef CONFIG_NEED_MULTIPLE_NODES |
103 | unsigned long size; | 105 | int node = early_cpu_to_node(cpu); |
104 | int cpu; | 106 | void *ptr; |
105 | 107 | ||
106 | size = roundup(sizeof(struct x8664_pda), cache_line_size()); | 108 | if (!node_online(node) || !NODE_DATA(node)) { |
107 | 109 | ptr = __alloc_bootmem_nopanic(size, align, goal); | |
108 | /* allocate cpu_pda array and pointer table */ | 110 | pr_info("cpu %d has no node %d or node-local memory\n", |
109 | { | 111 | cpu, node); |
110 | unsigned long tsize = nr_cpu_ids * sizeof(void *); | 112 | pr_debug("per cpu data for cpu%d %lu bytes at %016lx\n", |
111 | unsigned long asize = size * (nr_cpu_ids - 1); | 113 | cpu, size, __pa(ptr)); |
112 | 114 | } else { | |
113 | tsize = roundup(tsize, cache_line_size()); | 115 | ptr = __alloc_bootmem_node_nopanic(NODE_DATA(node), |
114 | new_cpu_pda = alloc_bootmem(tsize + asize); | 116 | size, align, goal); |
115 | pda = (char *)new_cpu_pda + tsize; | 117 | pr_debug("per cpu data for cpu%d %lu bytes on node%d at " |
116 | } | 118 | "%016lx\n", cpu, size, node, __pa(ptr)); |
117 | |||
118 | /* initialize pointer table to static pda's */ | ||
119 | for_each_possible_cpu(cpu) { | ||
120 | if (cpu == 0) { | ||
121 | /* leave boot cpu pda in place */ | ||
122 | new_cpu_pda[0] = cpu_pda(0); | ||
123 | continue; | ||
124 | } | ||
125 | new_cpu_pda[cpu] = (struct x8664_pda *)pda; | ||
126 | new_cpu_pda[cpu]->in_bootmem = 1; | ||
127 | pda += size; | ||
128 | } | 119 | } |
129 | 120 | return ptr; | |
130 | /* point to new pointer table */ | 121 | #else |
131 | _cpu_pda = new_cpu_pda; | 122 | return __alloc_bootmem_nopanic(size, align, goal); |
123 | #endif | ||
132 | } | 124 | } |
133 | 125 | ||
134 | #endif /* CONFIG_SMP && CONFIG_X86_64 */ | 126 | /* |
135 | 127 | * Remap allocator | |
136 | #ifdef CONFIG_X86_64 | 128 | * |
129 | * This allocator uses PMD page as unit. A PMD page is allocated for | ||
130 | * each cpu and each is remapped into vmalloc area using PMD mapping. | ||
131 | * As PMD page is quite large, only part of it is used for the first | ||
132 | * chunk. Unused part is returned to the bootmem allocator. | ||
133 | * | ||
134 | * So, the PMD pages are mapped twice - once to the physical mapping | ||
135 | * and to the vmalloc area for the first percpu chunk. The double | ||
136 | * mapping does add one more PMD TLB entry pressure but still is much | ||
137 | * better than only using 4k mappings while still being NUMA friendly. | ||
138 | */ | ||
139 | #ifdef CONFIG_NEED_MULTIPLE_NODES | ||
140 | static size_t pcpur_size __initdata; | ||
141 | static void **pcpur_ptrs __initdata; | ||
137 | 142 | ||
138 | /* correctly size the local cpu masks */ | 143 | static struct page * __init pcpur_get_page(unsigned int cpu, int pageno) |
139 | static void __init setup_cpu_local_masks(void) | ||
140 | { | 144 | { |
141 | alloc_bootmem_cpumask_var(&cpu_initialized_mask); | 145 | size_t off = (size_t)pageno << PAGE_SHIFT; |
142 | alloc_bootmem_cpumask_var(&cpu_callin_mask); | ||
143 | alloc_bootmem_cpumask_var(&cpu_callout_mask); | ||
144 | alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask); | ||
145 | } | ||
146 | 146 | ||
147 | #else /* CONFIG_X86_32 */ | 147 | if (off >= pcpur_size) |
148 | return NULL; | ||
148 | 149 | ||
149 | static inline void setup_cpu_local_masks(void) | 150 | return virt_to_page(pcpur_ptrs[cpu] + off); |
150 | { | ||
151 | } | 151 | } |
152 | 152 | ||
153 | #endif /* CONFIG_X86_32 */ | 153 | static ssize_t __init setup_pcpu_remap(size_t static_size) |
154 | |||
155 | /* | ||
156 | * Great future plan: | ||
157 | * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data. | ||
158 | * Always point %gs to its beginning | ||
159 | */ | ||
160 | void __init setup_per_cpu_areas(void) | ||
161 | { | 154 | { |
162 | ssize_t size, old_size; | 155 | static struct vm_struct vm; |
163 | char *ptr; | 156 | pg_data_t *last; |
164 | int cpu; | 157 | size_t ptrs_size, dyn_size; |
165 | unsigned long align = 1; | 158 | unsigned int cpu; |
166 | 159 | ssize_t ret; | |
167 | /* Setup cpu_pda map */ | 160 | |
168 | setup_cpu_pda_map(); | 161 | /* |
162 | * If large page isn't supported, there's no benefit in doing | ||
163 | * this. Also, on non-NUMA, embedding is better. | ||
164 | */ | ||
165 | if (!cpu_has_pse || pcpu_need_numa()) | ||
166 | return -EINVAL; | ||
167 | |||
168 | last = NULL; | ||
169 | for_each_possible_cpu(cpu) { | ||
170 | int node = early_cpu_to_node(cpu); | ||
169 | 171 | ||
170 | /* Copy section for each CPU (we discard the original) */ | 172 | if (node_online(node) && NODE_DATA(node) && |
171 | old_size = PERCPU_ENOUGH_ROOM; | 173 | last && last != NODE_DATA(node)) |
172 | align = max_t(unsigned long, PAGE_SIZE, align); | 174 | goto proceed; |
173 | size = roundup(old_size, align); | ||
174 | 175 | ||
175 | pr_info("NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n", | 176 | last = NODE_DATA(node); |
176 | NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids); | 177 | } |
178 | return -EINVAL; | ||
179 | |||
180 | proceed: | ||
181 | /* | ||
182 | * Currently supports only single page. Supporting multiple | ||
183 | * pages won't be too difficult if it ever becomes necessary. | ||
184 | */ | ||
185 | pcpur_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE + | ||
186 | PERCPU_DYNAMIC_RESERVE); | ||
187 | if (pcpur_size > PMD_SIZE) { | ||
188 | pr_warning("PERCPU: static data is larger than large page, " | ||
189 | "can't use large page\n"); | ||
190 | return -EINVAL; | ||
191 | } | ||
192 | dyn_size = pcpur_size - static_size - PERCPU_FIRST_CHUNK_RESERVE; | ||
177 | 193 | ||
178 | pr_info("PERCPU: Allocating %zd bytes of per cpu data\n", size); | 194 | /* allocate pointer array and alloc large pages */ |
195 | ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0])); | ||
196 | pcpur_ptrs = alloc_bootmem(ptrs_size); | ||
179 | 197 | ||
180 | for_each_possible_cpu(cpu) { | 198 | for_each_possible_cpu(cpu) { |
181 | #ifndef CONFIG_NEED_MULTIPLE_NODES | 199 | pcpur_ptrs[cpu] = pcpu_alloc_bootmem(cpu, PMD_SIZE, PMD_SIZE); |
182 | ptr = __alloc_bootmem(size, align, | 200 | if (!pcpur_ptrs[cpu]) |
183 | __pa(MAX_DMA_ADDRESS)); | 201 | goto enomem; |
184 | #else | 202 | |
185 | int node = early_cpu_to_node(cpu); | 203 | /* |
186 | if (!node_online(node) || !NODE_DATA(node)) { | 204 | * Only use pcpur_size bytes and give back the rest. |
187 | ptr = __alloc_bootmem(size, align, | 205 | * |
188 | __pa(MAX_DMA_ADDRESS)); | 206 | * Ingo: The 2MB up-rounding bootmem is needed to make |
189 | pr_info("cpu %d has no node %d or node-local memory\n", | 207 | * sure the partial 2MB page is still fully RAM - it's |
190 | cpu, node); | 208 | * not well-specified to have a PAT-incompatible area |
191 | pr_debug("per cpu data for cpu%d at %016lx\n", | 209 | * (unmapped RAM, device memory, etc.) in that hole. |
192 | cpu, __pa(ptr)); | 210 | */ |
193 | } else { | 211 | free_bootmem(__pa(pcpur_ptrs[cpu] + pcpur_size), |
194 | ptr = __alloc_bootmem_node(NODE_DATA(node), size, align, | 212 | PMD_SIZE - pcpur_size); |
195 | __pa(MAX_DMA_ADDRESS)); | 213 | |
196 | pr_debug("per cpu data for cpu%d on node%d at %016lx\n", | 214 | memcpy(pcpur_ptrs[cpu], __per_cpu_load, static_size); |
197 | cpu, node, __pa(ptr)); | ||
198 | } | ||
199 | #endif | ||
200 | per_cpu_offset(cpu) = ptr - __per_cpu_start; | ||
201 | memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); | ||
202 | } | 215 | } |
203 | 216 | ||
204 | /* Setup percpu data maps */ | 217 | /* allocate address and map */ |
205 | setup_per_cpu_maps(); | 218 | vm.flags = VM_ALLOC; |
206 | 219 | vm.size = num_possible_cpus() * PMD_SIZE; | |
207 | /* Setup node to cpumask map */ | 220 | vm_area_register_early(&vm, PMD_SIZE); |
208 | setup_node_to_cpumask_map(); | ||
209 | |||
210 | /* Setup cpu initialized, callin, callout masks */ | ||
211 | setup_cpu_local_masks(); | ||
212 | } | ||
213 | |||
214 | #endif | ||
215 | 221 | ||
216 | #ifdef X86_64_NUMA | 222 | for_each_possible_cpu(cpu) { |
223 | pmd_t *pmd; | ||
217 | 224 | ||
218 | /* | 225 | pmd = populate_extra_pmd((unsigned long)vm.addr |
219 | * Allocate node_to_cpumask_map based on number of available nodes | 226 | + cpu * PMD_SIZE); |
220 | * Requires node_possible_map to be valid. | 227 | set_pmd(pmd, pfn_pmd(page_to_pfn(virt_to_page(pcpur_ptrs[cpu])), |
221 | * | 228 | PAGE_KERNEL_LARGE)); |
222 | * Note: node_to_cpumask() is not valid until after this is done. | ||
223 | */ | ||
224 | static void __init setup_node_to_cpumask_map(void) | ||
225 | { | ||
226 | unsigned int node, num = 0; | ||
227 | cpumask_t *map; | ||
228 | |||
229 | /* setup nr_node_ids if not done yet */ | ||
230 | if (nr_node_ids == MAX_NUMNODES) { | ||
231 | for_each_node_mask(node, node_possible_map) | ||
232 | num = node; | ||
233 | nr_node_ids = num + 1; | ||
234 | } | 229 | } |
235 | 230 | ||
236 | /* allocate the map */ | 231 | /* we're ready, commit */ |
237 | map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t)); | 232 | pr_info("PERCPU: Remapped at %p with large pages, static data " |
238 | 233 | "%zu bytes\n", vm.addr, static_size); | |
239 | pr_debug("Node to cpumask map at %p for %d nodes\n", | 234 | |
240 | map, nr_node_ids); | 235 | ret = pcpu_setup_first_chunk(pcpur_get_page, static_size, |
241 | 236 | PERCPU_FIRST_CHUNK_RESERVE, dyn_size, | |
242 | /* node_to_cpumask() will now work */ | 237 | PMD_SIZE, vm.addr, NULL); |
243 | node_to_cpumask_map = map; | 238 | goto out_free_ar; |
239 | |||
240 | enomem: | ||
241 | for_each_possible_cpu(cpu) | ||
242 | if (pcpur_ptrs[cpu]) | ||
243 | free_bootmem(__pa(pcpur_ptrs[cpu]), PMD_SIZE); | ||
244 | ret = -ENOMEM; | ||
245 | out_free_ar: | ||
246 | free_bootmem(__pa(pcpur_ptrs), ptrs_size); | ||
247 | return ret; | ||
244 | } | 248 | } |
245 | 249 | #else | |
246 | void __cpuinit numa_set_node(int cpu, int node) | 250 | static ssize_t __init setup_pcpu_remap(size_t static_size) |
247 | { | 251 | { |
248 | int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map); | 252 | return -EINVAL; |
249 | |||
250 | if (cpu_pda(cpu) && node != NUMA_NO_NODE) | ||
251 | cpu_pda(cpu)->nodenumber = node; | ||
252 | |||
253 | if (cpu_to_node_map) | ||
254 | cpu_to_node_map[cpu] = node; | ||
255 | |||
256 | else if (per_cpu_offset(cpu)) | ||
257 | per_cpu(x86_cpu_to_node_map, cpu) = node; | ||
258 | |||
259 | else | ||
260 | pr_debug("Setting node for non-present cpu %d\n", cpu); | ||
261 | } | 253 | } |
254 | #endif | ||
262 | 255 | ||
263 | void __cpuinit numa_clear_node(int cpu) | 256 | /* |
257 | * Embedding allocator | ||
258 | * | ||
259 | * The first chunk is sized to just contain the static area plus | ||
260 | * module and dynamic reserves and embedded into linear physical | ||
261 | * mapping so that it can use PMD mapping without additional TLB | ||
262 | * pressure. | ||
263 | */ | ||
264 | static ssize_t __init setup_pcpu_embed(size_t static_size) | ||
264 | { | 265 | { |
265 | numa_set_node(cpu, NUMA_NO_NODE); | 266 | size_t reserve = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; |
267 | |||
268 | /* | ||
269 | * If large page isn't supported, there's no benefit in doing | ||
270 | * this. Also, embedding allocation doesn't play well with | ||
271 | * NUMA. | ||
272 | */ | ||
273 | if (!cpu_has_pse || pcpu_need_numa()) | ||
274 | return -EINVAL; | ||
275 | |||
276 | return pcpu_embed_first_chunk(static_size, PERCPU_FIRST_CHUNK_RESERVE, | ||
277 | reserve - PERCPU_FIRST_CHUNK_RESERVE, -1); | ||
266 | } | 278 | } |
267 | 279 | ||
268 | #ifndef CONFIG_DEBUG_PER_CPU_MAPS | 280 | /* |
281 | * 4k page allocator | ||
282 | * | ||
283 | * This is the basic allocator. Static percpu area is allocated | ||
284 | * page-by-page and most of initialization is done by the generic | ||
285 | * setup function. | ||
286 | */ | ||
287 | static struct page **pcpu4k_pages __initdata; | ||
288 | static int pcpu4k_nr_static_pages __initdata; | ||
269 | 289 | ||
270 | void __cpuinit numa_add_cpu(int cpu) | 290 | static struct page * __init pcpu4k_get_page(unsigned int cpu, int pageno) |
271 | { | 291 | { |
272 | cpu_set(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]); | 292 | if (pageno < pcpu4k_nr_static_pages) |
293 | return pcpu4k_pages[cpu * pcpu4k_nr_static_pages + pageno]; | ||
294 | return NULL; | ||
273 | } | 295 | } |
274 | 296 | ||
275 | void __cpuinit numa_remove_cpu(int cpu) | 297 | static void __init pcpu4k_populate_pte(unsigned long addr) |
276 | { | 298 | { |
277 | cpu_clear(cpu, node_to_cpumask_map[cpu_to_node(cpu)]); | 299 | populate_extra_pte(addr); |
278 | } | 300 | } |
279 | 301 | ||
280 | #else /* CONFIG_DEBUG_PER_CPU_MAPS */ | 302 | static ssize_t __init setup_pcpu_4k(size_t static_size) |
281 | |||
282 | /* | ||
283 | * --------- debug versions of the numa functions --------- | ||
284 | */ | ||
285 | static void __cpuinit numa_set_cpumask(int cpu, int enable) | ||
286 | { | 303 | { |
287 | int node = cpu_to_node(cpu); | 304 | size_t pages_size; |
288 | cpumask_t *mask; | 305 | unsigned int cpu; |
289 | char buf[64]; | 306 | int i, j; |
290 | 307 | ssize_t ret; | |
291 | if (node_to_cpumask_map == NULL) { | 308 | |
292 | printk(KERN_ERR "node_to_cpumask_map NULL\n"); | 309 | pcpu4k_nr_static_pages = PFN_UP(static_size); |
293 | dump_stack(); | 310 | |
294 | return; | 311 | /* unaligned allocations can't be freed, round up to page size */ |
295 | } | 312 | pages_size = PFN_ALIGN(pcpu4k_nr_static_pages * num_possible_cpus() |
296 | 313 | * sizeof(pcpu4k_pages[0])); | |
297 | mask = &node_to_cpumask_map[node]; | 314 | pcpu4k_pages = alloc_bootmem(pages_size); |
298 | if (enable) | 315 | |
299 | cpu_set(cpu, *mask); | 316 | /* allocate and copy */ |
300 | else | 317 | j = 0; |
301 | cpu_clear(cpu, *mask); | 318 | for_each_possible_cpu(cpu) |
319 | for (i = 0; i < pcpu4k_nr_static_pages; i++) { | ||
320 | void *ptr; | ||
321 | |||
322 | ptr = pcpu_alloc_bootmem(cpu, PAGE_SIZE, PAGE_SIZE); | ||
323 | if (!ptr) | ||
324 | goto enomem; | ||
325 | |||
326 | memcpy(ptr, __per_cpu_load + i * PAGE_SIZE, PAGE_SIZE); | ||
327 | pcpu4k_pages[j++] = virt_to_page(ptr); | ||
328 | } | ||
302 | 329 | ||
303 | cpulist_scnprintf(buf, sizeof(buf), mask); | 330 | /* we're ready, commit */ |
304 | printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n", | 331 | pr_info("PERCPU: Allocated %d 4k pages, static data %zu bytes\n", |
305 | enable ? "numa_add_cpu" : "numa_remove_cpu", cpu, node, buf); | 332 | pcpu4k_nr_static_pages, static_size); |
333 | |||
334 | ret = pcpu_setup_first_chunk(pcpu4k_get_page, static_size, | ||
335 | PERCPU_FIRST_CHUNK_RESERVE, -1, | ||
336 | -1, NULL, pcpu4k_populate_pte); | ||
337 | goto out_free_ar; | ||
338 | |||
339 | enomem: | ||
340 | while (--j >= 0) | ||
341 | free_bootmem(__pa(page_address(pcpu4k_pages[j])), PAGE_SIZE); | ||
342 | ret = -ENOMEM; | ||
343 | out_free_ar: | ||
344 | free_bootmem(__pa(pcpu4k_pages), pages_size); | ||
345 | return ret; | ||
306 | } | 346 | } |
307 | 347 | ||
308 | void __cpuinit numa_add_cpu(int cpu) | 348 | static inline void setup_percpu_segment(int cpu) |
309 | { | 349 | { |
310 | numa_set_cpumask(cpu, 1); | 350 | #ifdef CONFIG_X86_32 |
311 | } | 351 | struct desc_struct gdt; |
312 | |||
313 | void __cpuinit numa_remove_cpu(int cpu) | ||
314 | { | ||
315 | numa_set_cpumask(cpu, 0); | ||
316 | } | ||
317 | 352 | ||
318 | int cpu_to_node(int cpu) | 353 | pack_descriptor(&gdt, per_cpu_offset(cpu), 0xFFFFF, |
319 | { | 354 | 0x2 | DESCTYPE_S, 0x8); |
320 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) { | 355 | gdt.s = 1; |
321 | printk(KERN_WARNING | 356 | write_gdt_entry(get_cpu_gdt_table(cpu), |
322 | "cpu_to_node(%d): usage too early!\n", cpu); | 357 | GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S); |
323 | dump_stack(); | 358 | #endif |
324 | return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu]; | ||
325 | } | ||
326 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
327 | } | 359 | } |
328 | EXPORT_SYMBOL(cpu_to_node); | ||
329 | 360 | ||
330 | /* | 361 | /* |
331 | * Same function as cpu_to_node() but used if called before the | 362 | * Great future plan: |
332 | * per_cpu areas are setup. | 363 | * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data. |
364 | * Always point %gs to its beginning | ||
333 | */ | 365 | */ |
334 | int early_cpu_to_node(int cpu) | 366 | void __init setup_per_cpu_areas(void) |
335 | { | 367 | { |
336 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) | 368 | size_t static_size = __per_cpu_end - __per_cpu_start; |
337 | return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu]; | 369 | unsigned int cpu; |
338 | 370 | unsigned long delta; | |
339 | if (!per_cpu_offset(cpu)) { | 371 | size_t pcpu_unit_size; |
340 | printk(KERN_WARNING | 372 | ssize_t ret; |
341 | "early_cpu_to_node(%d): no per_cpu area!\n", cpu); | ||
342 | dump_stack(); | ||
343 | return NUMA_NO_NODE; | ||
344 | } | ||
345 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
346 | } | ||
347 | 373 | ||
374 | pr_info("NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n", | ||
375 | NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids); | ||
348 | 376 | ||
349 | /* empty cpumask */ | 377 | /* |
350 | static const cpumask_t cpu_mask_none; | 378 | * Allocate percpu area. If PSE is supported, try to make use |
351 | 379 | * of large page mappings. Please read comments on top of | |
352 | /* | 380 | * each allocator for details. |
353 | * Returns a pointer to the bitmask of CPUs on Node 'node'. | 381 | */ |
354 | */ | 382 | ret = setup_pcpu_remap(static_size); |
355 | const cpumask_t *cpumask_of_node(int node) | 383 | if (ret < 0) |
356 | { | 384 | ret = setup_pcpu_embed(static_size); |
357 | if (node_to_cpumask_map == NULL) { | 385 | if (ret < 0) |
358 | printk(KERN_WARNING | 386 | ret = setup_pcpu_4k(static_size); |
359 | "cpumask_of_node(%d): no node_to_cpumask_map!\n", | 387 | if (ret < 0) |
360 | node); | 388 | panic("cannot allocate static percpu area (%zu bytes, err=%zd)", |
361 | dump_stack(); | 389 | static_size, ret); |
362 | return (const cpumask_t *)&cpu_online_map; | 390 | |
363 | } | 391 | pcpu_unit_size = ret; |
364 | if (node >= nr_node_ids) { | 392 | |
365 | printk(KERN_WARNING | 393 | /* alrighty, percpu areas up and running */ |
366 | "cpumask_of_node(%d): node > nr_node_ids(%d)\n", | 394 | delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; |
367 | node, nr_node_ids); | 395 | for_each_possible_cpu(cpu) { |
368 | dump_stack(); | 396 | per_cpu_offset(cpu) = delta + cpu * pcpu_unit_size; |
369 | return &cpu_mask_none; | 397 | per_cpu(this_cpu_off, cpu) = per_cpu_offset(cpu); |
370 | } | 398 | per_cpu(cpu_number, cpu) = cpu; |
371 | return &node_to_cpumask_map[node]; | 399 | setup_percpu_segment(cpu); |
372 | } | 400 | setup_stack_canary_segment(cpu); |
373 | EXPORT_SYMBOL(cpumask_of_node); | 401 | /* |
374 | 402 | * Copy data used in early init routines from the | |
375 | /* | 403 | * initial arrays to the per cpu data areas. These |
376 | * Returns a bitmask of CPUs on Node 'node'. | 404 | * arrays then become expendable and the *_early_ptr's |
377 | * | 405 | * are zeroed indicating that the static arrays are |
378 | * Side note: this function creates the returned cpumask on the stack | 406 | * gone. |
379 | * so with a high NR_CPUS count, excessive stack space is used. The | 407 | */ |
380 | * node_to_cpumask_ptr function should be used whenever possible. | 408 | #ifdef CONFIG_X86_LOCAL_APIC |
381 | */ | 409 | per_cpu(x86_cpu_to_apicid, cpu) = |
382 | cpumask_t node_to_cpumask(int node) | 410 | early_per_cpu_map(x86_cpu_to_apicid, cpu); |
383 | { | 411 | per_cpu(x86_bios_cpu_apicid, cpu) = |
384 | if (node_to_cpumask_map == NULL) { | 412 | early_per_cpu_map(x86_bios_cpu_apicid, cpu); |
385 | printk(KERN_WARNING | 413 | #endif |
386 | "node_to_cpumask(%d): no node_to_cpumask_map!\n", node); | 414 | #ifdef CONFIG_X86_64 |
387 | dump_stack(); | 415 | per_cpu(irq_stack_ptr, cpu) = |
388 | return cpu_online_map; | 416 | per_cpu(irq_stack_union.irq_stack, cpu) + |
389 | } | 417 | IRQ_STACK_SIZE - 64; |
390 | if (node >= nr_node_ids) { | 418 | #ifdef CONFIG_NUMA |
391 | printk(KERN_WARNING | 419 | per_cpu(x86_cpu_to_node_map, cpu) = |
392 | "node_to_cpumask(%d): node > nr_node_ids(%d)\n", | 420 | early_per_cpu_map(x86_cpu_to_node_map, cpu); |
393 | node, nr_node_ids); | 421 | #endif |
394 | dump_stack(); | 422 | #endif |
395 | return cpu_mask_none; | 423 | /* |
424 | * Up to this point, the boot CPU has been using .data.init | ||
425 | * area. Reload any changed state for the boot CPU. | ||
426 | */ | ||
427 | if (cpu == boot_cpu_id) | ||
428 | switch_to_new_gdt(cpu); | ||
396 | } | 429 | } |
397 | return node_to_cpumask_map[node]; | ||
398 | } | ||
399 | EXPORT_SYMBOL(node_to_cpumask); | ||
400 | 430 | ||
401 | /* | 431 | /* indicate the early static arrays will soon be gone */ |
402 | * --------- end of debug versions of the numa functions --------- | 432 | #ifdef CONFIG_X86_LOCAL_APIC |
403 | */ | 433 | early_per_cpu_ptr(x86_cpu_to_apicid) = NULL; |
404 | 434 | early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL; | |
405 | #endif /* CONFIG_DEBUG_PER_CPU_MAPS */ | 435 | #endif |
436 | #if defined(CONFIG_X86_64) && defined(CONFIG_NUMA) | ||
437 | early_per_cpu_ptr(x86_cpu_to_node_map) = NULL; | ||
438 | #endif | ||
406 | 439 | ||
407 | #endif /* X86_64_NUMA */ | 440 | /* Setup node to cpumask map */ |
441 | setup_node_to_cpumask_map(); | ||
408 | 442 | ||
443 | /* Setup cpu initialized, callin, callout masks */ | ||
444 | setup_cpu_local_masks(); | ||
445 | } | ||
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c index df0587f24c54..d2cc6428c587 100644 --- a/arch/x86/kernel/signal.c +++ b/arch/x86/kernel/signal.c | |||
@@ -50,27 +50,23 @@ | |||
50 | # define FIX_EFLAGS __FIX_EFLAGS | 50 | # define FIX_EFLAGS __FIX_EFLAGS |
51 | #endif | 51 | #endif |
52 | 52 | ||
53 | #define COPY(x) { \ | 53 | #define COPY(x) do { \ |
54 | err |= __get_user(regs->x, &sc->x); \ | 54 | get_user_ex(regs->x, &sc->x); \ |
55 | } | 55 | } while (0) |
56 | 56 | ||
57 | #define COPY_SEG(seg) { \ | 57 | #define GET_SEG(seg) ({ \ |
58 | unsigned short tmp; \ | 58 | unsigned short tmp; \ |
59 | err |= __get_user(tmp, &sc->seg); \ | 59 | get_user_ex(tmp, &sc->seg); \ |
60 | regs->seg = tmp; \ | 60 | tmp; \ |
61 | } | 61 | }) |
62 | 62 | ||
63 | #define COPY_SEG_CPL3(seg) { \ | 63 | #define COPY_SEG(seg) do { \ |
64 | unsigned short tmp; \ | 64 | regs->seg = GET_SEG(seg); \ |
65 | err |= __get_user(tmp, &sc->seg); \ | 65 | } while (0) |
66 | regs->seg = tmp | 3; \ | ||
67 | } | ||
68 | 66 | ||
69 | #define GET_SEG(seg) { \ | 67 | #define COPY_SEG_CPL3(seg) do { \ |
70 | unsigned short tmp; \ | 68 | regs->seg = GET_SEG(seg) | 3; \ |
71 | err |= __get_user(tmp, &sc->seg); \ | 69 | } while (0) |
72 | loadsegment(seg, tmp); \ | ||
73 | } | ||
74 | 70 | ||
75 | static int | 71 | static int |
76 | restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, | 72 | restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, |
@@ -83,45 +79,49 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, | |||
83 | /* Always make any pending restarted system calls return -EINTR */ | 79 | /* Always make any pending restarted system calls return -EINTR */ |
84 | current_thread_info()->restart_block.fn = do_no_restart_syscall; | 80 | current_thread_info()->restart_block.fn = do_no_restart_syscall; |
85 | 81 | ||
82 | get_user_try { | ||
83 | |||
86 | #ifdef CONFIG_X86_32 | 84 | #ifdef CONFIG_X86_32 |
87 | GET_SEG(gs); | 85 | set_user_gs(regs, GET_SEG(gs)); |
88 | COPY_SEG(fs); | 86 | COPY_SEG(fs); |
89 | COPY_SEG(es); | 87 | COPY_SEG(es); |
90 | COPY_SEG(ds); | 88 | COPY_SEG(ds); |
91 | #endif /* CONFIG_X86_32 */ | 89 | #endif /* CONFIG_X86_32 */ |
92 | 90 | ||
93 | COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); | 91 | COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); |
94 | COPY(dx); COPY(cx); COPY(ip); | 92 | COPY(dx); COPY(cx); COPY(ip); |
95 | 93 | ||
96 | #ifdef CONFIG_X86_64 | 94 | #ifdef CONFIG_X86_64 |
97 | COPY(r8); | 95 | COPY(r8); |
98 | COPY(r9); | 96 | COPY(r9); |
99 | COPY(r10); | 97 | COPY(r10); |
100 | COPY(r11); | 98 | COPY(r11); |
101 | COPY(r12); | 99 | COPY(r12); |
102 | COPY(r13); | 100 | COPY(r13); |
103 | COPY(r14); | 101 | COPY(r14); |
104 | COPY(r15); | 102 | COPY(r15); |
105 | #endif /* CONFIG_X86_64 */ | 103 | #endif /* CONFIG_X86_64 */ |
106 | 104 | ||
107 | #ifdef CONFIG_X86_32 | 105 | #ifdef CONFIG_X86_32 |
108 | COPY_SEG_CPL3(cs); | 106 | COPY_SEG_CPL3(cs); |
109 | COPY_SEG_CPL3(ss); | 107 | COPY_SEG_CPL3(ss); |
110 | #else /* !CONFIG_X86_32 */ | 108 | #else /* !CONFIG_X86_32 */ |
111 | /* Kernel saves and restores only the CS segment register on signals, | 109 | /* Kernel saves and restores only the CS segment register on signals, |
112 | * which is the bare minimum needed to allow mixed 32/64-bit code. | 110 | * which is the bare minimum needed to allow mixed 32/64-bit code. |
113 | * App's signal handler can save/restore other segments if needed. */ | 111 | * App's signal handler can save/restore other segments if needed. */ |
114 | COPY_SEG_CPL3(cs); | 112 | COPY_SEG_CPL3(cs); |
115 | #endif /* CONFIG_X86_32 */ | 113 | #endif /* CONFIG_X86_32 */ |
116 | 114 | ||
117 | err |= __get_user(tmpflags, &sc->flags); | 115 | get_user_ex(tmpflags, &sc->flags); |
118 | regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); | 116 | regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); |
119 | regs->orig_ax = -1; /* disable syscall checks */ | 117 | regs->orig_ax = -1; /* disable syscall checks */ |
120 | 118 | ||
121 | err |= __get_user(buf, &sc->fpstate); | 119 | get_user_ex(buf, &sc->fpstate); |
122 | err |= restore_i387_xstate(buf); | 120 | err |= restore_i387_xstate(buf); |
121 | |||
122 | get_user_ex(*pax, &sc->ax); | ||
123 | } get_user_catch(err); | ||
123 | 124 | ||
124 | err |= __get_user(*pax, &sc->ax); | ||
125 | return err; | 125 | return err; |
126 | } | 126 | } |
127 | 127 | ||
@@ -131,57 +131,55 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate, | |||
131 | { | 131 | { |
132 | int err = 0; | 132 | int err = 0; |
133 | 133 | ||
134 | #ifdef CONFIG_X86_32 | 134 | put_user_try { |
135 | { | ||
136 | unsigned int tmp; | ||
137 | 135 | ||
138 | savesegment(gs, tmp); | 136 | #ifdef CONFIG_X86_32 |
139 | err |= __put_user(tmp, (unsigned int __user *)&sc->gs); | 137 | put_user_ex(get_user_gs(regs), (unsigned int __user *)&sc->gs); |
140 | } | 138 | put_user_ex(regs->fs, (unsigned int __user *)&sc->fs); |
141 | err |= __put_user(regs->fs, (unsigned int __user *)&sc->fs); | 139 | put_user_ex(regs->es, (unsigned int __user *)&sc->es); |
142 | err |= __put_user(regs->es, (unsigned int __user *)&sc->es); | 140 | put_user_ex(regs->ds, (unsigned int __user *)&sc->ds); |
143 | err |= __put_user(regs->ds, (unsigned int __user *)&sc->ds); | ||
144 | #endif /* CONFIG_X86_32 */ | 141 | #endif /* CONFIG_X86_32 */ |
145 | 142 | ||
146 | err |= __put_user(regs->di, &sc->di); | 143 | put_user_ex(regs->di, &sc->di); |
147 | err |= __put_user(regs->si, &sc->si); | 144 | put_user_ex(regs->si, &sc->si); |
148 | err |= __put_user(regs->bp, &sc->bp); | 145 | put_user_ex(regs->bp, &sc->bp); |
149 | err |= __put_user(regs->sp, &sc->sp); | 146 | put_user_ex(regs->sp, &sc->sp); |
150 | err |= __put_user(regs->bx, &sc->bx); | 147 | put_user_ex(regs->bx, &sc->bx); |
151 | err |= __put_user(regs->dx, &sc->dx); | 148 | put_user_ex(regs->dx, &sc->dx); |
152 | err |= __put_user(regs->cx, &sc->cx); | 149 | put_user_ex(regs->cx, &sc->cx); |
153 | err |= __put_user(regs->ax, &sc->ax); | 150 | put_user_ex(regs->ax, &sc->ax); |
154 | #ifdef CONFIG_X86_64 | 151 | #ifdef CONFIG_X86_64 |
155 | err |= __put_user(regs->r8, &sc->r8); | 152 | put_user_ex(regs->r8, &sc->r8); |
156 | err |= __put_user(regs->r9, &sc->r9); | 153 | put_user_ex(regs->r9, &sc->r9); |
157 | err |= __put_user(regs->r10, &sc->r10); | 154 | put_user_ex(regs->r10, &sc->r10); |
158 | err |= __put_user(regs->r11, &sc->r11); | 155 | put_user_ex(regs->r11, &sc->r11); |
159 | err |= __put_user(regs->r12, &sc->r12); | 156 | put_user_ex(regs->r12, &sc->r12); |
160 | err |= __put_user(regs->r13, &sc->r13); | 157 | put_user_ex(regs->r13, &sc->r13); |
161 | err |= __put_user(regs->r14, &sc->r14); | 158 | put_user_ex(regs->r14, &sc->r14); |
162 | err |= __put_user(regs->r15, &sc->r15); | 159 | put_user_ex(regs->r15, &sc->r15); |
163 | #endif /* CONFIG_X86_64 */ | 160 | #endif /* CONFIG_X86_64 */ |
164 | 161 | ||
165 | err |= __put_user(current->thread.trap_no, &sc->trapno); | 162 | put_user_ex(current->thread.trap_no, &sc->trapno); |
166 | err |= __put_user(current->thread.error_code, &sc->err); | 163 | put_user_ex(current->thread.error_code, &sc->err); |
167 | err |= __put_user(regs->ip, &sc->ip); | 164 | put_user_ex(regs->ip, &sc->ip); |
168 | #ifdef CONFIG_X86_32 | 165 | #ifdef CONFIG_X86_32 |
169 | err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs); | 166 | put_user_ex(regs->cs, (unsigned int __user *)&sc->cs); |
170 | err |= __put_user(regs->flags, &sc->flags); | 167 | put_user_ex(regs->flags, &sc->flags); |
171 | err |= __put_user(regs->sp, &sc->sp_at_signal); | 168 | put_user_ex(regs->sp, &sc->sp_at_signal); |
172 | err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss); | 169 | put_user_ex(regs->ss, (unsigned int __user *)&sc->ss); |
173 | #else /* !CONFIG_X86_32 */ | 170 | #else /* !CONFIG_X86_32 */ |
174 | err |= __put_user(regs->flags, &sc->flags); | 171 | put_user_ex(regs->flags, &sc->flags); |
175 | err |= __put_user(regs->cs, &sc->cs); | 172 | put_user_ex(regs->cs, &sc->cs); |
176 | err |= __put_user(0, &sc->gs); | 173 | put_user_ex(0, &sc->gs); |
177 | err |= __put_user(0, &sc->fs); | 174 | put_user_ex(0, &sc->fs); |
178 | #endif /* CONFIG_X86_32 */ | 175 | #endif /* CONFIG_X86_32 */ |
179 | 176 | ||
180 | err |= __put_user(fpstate, &sc->fpstate); | 177 | put_user_ex(fpstate, &sc->fpstate); |
181 | 178 | ||
182 | /* non-iBCS2 extensions.. */ | 179 | /* non-iBCS2 extensions.. */ |
183 | err |= __put_user(mask, &sc->oldmask); | 180 | put_user_ex(mask, &sc->oldmask); |
184 | err |= __put_user(current->thread.cr2, &sc->cr2); | 181 | put_user_ex(current->thread.cr2, &sc->cr2); |
182 | } put_user_catch(err); | ||
185 | 183 | ||
186 | return err; | 184 | return err; |
187 | } | 185 | } |
@@ -189,40 +187,35 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate, | |||
189 | /* | 187 | /* |
190 | * Set up a signal frame. | 188 | * Set up a signal frame. |
191 | */ | 189 | */ |
192 | #ifdef CONFIG_X86_32 | ||
193 | static const struct { | ||
194 | u16 poplmovl; | ||
195 | u32 val; | ||
196 | u16 int80; | ||
197 | } __attribute__((packed)) retcode = { | ||
198 | 0xb858, /* popl %eax; movl $..., %eax */ | ||
199 | __NR_sigreturn, | ||
200 | 0x80cd, /* int $0x80 */ | ||
201 | }; | ||
202 | |||
203 | static const struct { | ||
204 | u8 movl; | ||
205 | u32 val; | ||
206 | u16 int80; | ||
207 | u8 pad; | ||
208 | } __attribute__((packed)) rt_retcode = { | ||
209 | 0xb8, /* movl $..., %eax */ | ||
210 | __NR_rt_sigreturn, | ||
211 | 0x80cd, /* int $0x80 */ | ||
212 | 0 | ||
213 | }; | ||
214 | 190 | ||
215 | /* | 191 | /* |
216 | * Determine which stack to use.. | 192 | * Determine which stack to use.. |
217 | */ | 193 | */ |
194 | static unsigned long align_sigframe(unsigned long sp) | ||
195 | { | ||
196 | #ifdef CONFIG_X86_32 | ||
197 | /* | ||
198 | * Align the stack pointer according to the i386 ABI, | ||
199 | * i.e. so that on function entry ((sp + 4) & 15) == 0. | ||
200 | */ | ||
201 | sp = ((sp + 4) & -16ul) - 4; | ||
202 | #else /* !CONFIG_X86_32 */ | ||
203 | sp = round_down(sp, 16) - 8; | ||
204 | #endif | ||
205 | return sp; | ||
206 | } | ||
207 | |||
218 | static inline void __user * | 208 | static inline void __user * |
219 | get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size, | 209 | get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size, |
220 | void **fpstate) | 210 | void __user **fpstate) |
221 | { | 211 | { |
222 | unsigned long sp; | ||
223 | |||
224 | /* Default to using normal stack */ | 212 | /* Default to using normal stack */ |
225 | sp = regs->sp; | 213 | unsigned long sp = regs->sp; |
214 | |||
215 | #ifdef CONFIG_X86_64 | ||
216 | /* redzone */ | ||
217 | sp -= 128; | ||
218 | #endif /* CONFIG_X86_64 */ | ||
226 | 219 | ||
227 | /* | 220 | /* |
228 | * If we are on the alternate signal stack and would overflow it, don't. | 221 | * If we are on the alternate signal stack and would overflow it, don't. |
@@ -236,30 +229,52 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size, | |||
236 | if (sas_ss_flags(sp) == 0) | 229 | if (sas_ss_flags(sp) == 0) |
237 | sp = current->sas_ss_sp + current->sas_ss_size; | 230 | sp = current->sas_ss_sp + current->sas_ss_size; |
238 | } else { | 231 | } else { |
232 | #ifdef CONFIG_X86_32 | ||
239 | /* This is the legacy signal stack switching. */ | 233 | /* This is the legacy signal stack switching. */ |
240 | if ((regs->ss & 0xffff) != __USER_DS && | 234 | if ((regs->ss & 0xffff) != __USER_DS && |
241 | !(ka->sa.sa_flags & SA_RESTORER) && | 235 | !(ka->sa.sa_flags & SA_RESTORER) && |
242 | ka->sa.sa_restorer) | 236 | ka->sa.sa_restorer) |
243 | sp = (unsigned long) ka->sa.sa_restorer; | 237 | sp = (unsigned long) ka->sa.sa_restorer; |
238 | #endif /* CONFIG_X86_32 */ | ||
244 | } | 239 | } |
245 | 240 | ||
246 | if (used_math()) { | 241 | if (used_math()) { |
247 | sp = sp - sig_xstate_size; | 242 | sp -= sig_xstate_size; |
248 | *fpstate = (struct _fpstate *) sp; | 243 | #ifdef CONFIG_X86_64 |
244 | sp = round_down(sp, 64); | ||
245 | #endif /* CONFIG_X86_64 */ | ||
246 | *fpstate = (void __user *)sp; | ||
247 | |||
249 | if (save_i387_xstate(*fpstate) < 0) | 248 | if (save_i387_xstate(*fpstate) < 0) |
250 | return (void __user *)-1L; | 249 | return (void __user *)-1L; |
251 | } | 250 | } |
252 | 251 | ||
253 | sp -= frame_size; | 252 | return (void __user *)align_sigframe(sp - frame_size); |
254 | /* | ||
255 | * Align the stack pointer according to the i386 ABI, | ||
256 | * i.e. so that on function entry ((sp + 4) & 15) == 0. | ||
257 | */ | ||
258 | sp = ((sp + 4) & -16ul) - 4; | ||
259 | |||
260 | return (void __user *) sp; | ||
261 | } | 253 | } |
262 | 254 | ||
255 | #ifdef CONFIG_X86_32 | ||
256 | static const struct { | ||
257 | u16 poplmovl; | ||
258 | u32 val; | ||
259 | u16 int80; | ||
260 | } __attribute__((packed)) retcode = { | ||
261 | 0xb858, /* popl %eax; movl $..., %eax */ | ||
262 | __NR_sigreturn, | ||
263 | 0x80cd, /* int $0x80 */ | ||
264 | }; | ||
265 | |||
266 | static const struct { | ||
267 | u8 movl; | ||
268 | u32 val; | ||
269 | u16 int80; | ||
270 | u8 pad; | ||
271 | } __attribute__((packed)) rt_retcode = { | ||
272 | 0xb8, /* movl $..., %eax */ | ||
273 | __NR_rt_sigreturn, | ||
274 | 0x80cd, /* int $0x80 */ | ||
275 | 0 | ||
276 | }; | ||
277 | |||
263 | static int | 278 | static int |
264 | __setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, | 279 | __setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, |
265 | struct pt_regs *regs) | 280 | struct pt_regs *regs) |
@@ -336,43 +351,41 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
336 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | 351 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) |
337 | return -EFAULT; | 352 | return -EFAULT; |
338 | 353 | ||
339 | err |= __put_user(sig, &frame->sig); | 354 | put_user_try { |
340 | err |= __put_user(&frame->info, &frame->pinfo); | 355 | put_user_ex(sig, &frame->sig); |
341 | err |= __put_user(&frame->uc, &frame->puc); | 356 | put_user_ex(&frame->info, &frame->pinfo); |
342 | err |= copy_siginfo_to_user(&frame->info, info); | 357 | put_user_ex(&frame->uc, &frame->puc); |
343 | if (err) | 358 | err |= copy_siginfo_to_user(&frame->info, info); |
344 | return -EFAULT; | ||
345 | 359 | ||
346 | /* Create the ucontext. */ | 360 | /* Create the ucontext. */ |
347 | if (cpu_has_xsave) | 361 | if (cpu_has_xsave) |
348 | err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags); | 362 | put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags); |
349 | else | 363 | else |
350 | err |= __put_user(0, &frame->uc.uc_flags); | 364 | put_user_ex(0, &frame->uc.uc_flags); |
351 | err |= __put_user(0, &frame->uc.uc_link); | 365 | put_user_ex(0, &frame->uc.uc_link); |
352 | err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); | 366 | put_user_ex(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); |
353 | err |= __put_user(sas_ss_flags(regs->sp), | 367 | put_user_ex(sas_ss_flags(regs->sp), |
354 | &frame->uc.uc_stack.ss_flags); | 368 | &frame->uc.uc_stack.ss_flags); |
355 | err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); | 369 | put_user_ex(current->sas_ss_size, &frame->uc.uc_stack.ss_size); |
356 | err |= setup_sigcontext(&frame->uc.uc_mcontext, fpstate, | 370 | err |= setup_sigcontext(&frame->uc.uc_mcontext, fpstate, |
357 | regs, set->sig[0]); | 371 | regs, set->sig[0]); |
358 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | 372 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); |
359 | if (err) | 373 | |
360 | return -EFAULT; | 374 | /* Set up to return from userspace. */ |
361 | 375 | restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn); | |
362 | /* Set up to return from userspace. */ | 376 | if (ka->sa.sa_flags & SA_RESTORER) |
363 | restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn); | 377 | restorer = ka->sa.sa_restorer; |
364 | if (ka->sa.sa_flags & SA_RESTORER) | 378 | put_user_ex(restorer, &frame->pretcode); |
365 | restorer = ka->sa.sa_restorer; | ||
366 | err |= __put_user(restorer, &frame->pretcode); | ||
367 | 379 | ||
368 | /* | 380 | /* |
369 | * This is movl $__NR_rt_sigreturn, %ax ; int $0x80 | 381 | * This is movl $__NR_rt_sigreturn, %ax ; int $0x80 |
370 | * | 382 | * |
371 | * WE DO NOT USE IT ANY MORE! It's only left here for historical | 383 | * WE DO NOT USE IT ANY MORE! It's only left here for historical |
372 | * reasons and because gdb uses it as a signature to notice | 384 | * reasons and because gdb uses it as a signature to notice |
373 | * signal handler stack frames. | 385 | * signal handler stack frames. |
374 | */ | 386 | */ |
375 | err |= __put_user(*((u64 *)&rt_retcode), (u64 *)frame->retcode); | 387 | put_user_ex(*((u64 *)&rt_retcode), (u64 *)frame->retcode); |
388 | } put_user_catch(err); | ||
376 | 389 | ||
377 | if (err) | 390 | if (err) |
378 | return -EFAULT; | 391 | return -EFAULT; |
@@ -392,24 +405,6 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
392 | return 0; | 405 | return 0; |
393 | } | 406 | } |
394 | #else /* !CONFIG_X86_32 */ | 407 | #else /* !CONFIG_X86_32 */ |
395 | /* | ||
396 | * Determine which stack to use.. | ||
397 | */ | ||
398 | static void __user * | ||
399 | get_stack(struct k_sigaction *ka, unsigned long sp, unsigned long size) | ||
400 | { | ||
401 | /* Default to using normal stack - redzone*/ | ||
402 | sp -= 128; | ||
403 | |||
404 | /* This is the X/Open sanctioned signal stack switching. */ | ||
405 | if (ka->sa.sa_flags & SA_ONSTACK) { | ||
406 | if (sas_ss_flags(sp) == 0) | ||
407 | sp = current->sas_ss_sp + current->sas_ss_size; | ||
408 | } | ||
409 | |||
410 | return (void __user *)round_down(sp - size, 64); | ||
411 | } | ||
412 | |||
413 | static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | 408 | static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, |
414 | sigset_t *set, struct pt_regs *regs) | 409 | sigset_t *set, struct pt_regs *regs) |
415 | { | 410 | { |
@@ -418,15 +413,7 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
418 | int err = 0; | 413 | int err = 0; |
419 | struct task_struct *me = current; | 414 | struct task_struct *me = current; |
420 | 415 | ||
421 | if (used_math()) { | 416 | frame = get_sigframe(ka, regs, sizeof(struct rt_sigframe), &fp); |
422 | fp = get_stack(ka, regs->sp, sig_xstate_size); | ||
423 | frame = (void __user *)round_down( | ||
424 | (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8; | ||
425 | |||
426 | if (save_i387_xstate(fp) < 0) | ||
427 | return -EFAULT; | ||
428 | } else | ||
429 | frame = get_stack(ka, regs->sp, sizeof(struct rt_sigframe)) - 8; | ||
430 | 417 | ||
431 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) | 418 | if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) |
432 | return -EFAULT; | 419 | return -EFAULT; |
@@ -436,28 +423,30 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
436 | return -EFAULT; | 423 | return -EFAULT; |
437 | } | 424 | } |
438 | 425 | ||
439 | /* Create the ucontext. */ | 426 | put_user_try { |
440 | if (cpu_has_xsave) | 427 | /* Create the ucontext. */ |
441 | err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags); | 428 | if (cpu_has_xsave) |
442 | else | 429 | put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags); |
443 | err |= __put_user(0, &frame->uc.uc_flags); | 430 | else |
444 | err |= __put_user(0, &frame->uc.uc_link); | 431 | put_user_ex(0, &frame->uc.uc_flags); |
445 | err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp); | 432 | put_user_ex(0, &frame->uc.uc_link); |
446 | err |= __put_user(sas_ss_flags(regs->sp), | 433 | put_user_ex(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp); |
447 | &frame->uc.uc_stack.ss_flags); | 434 | put_user_ex(sas_ss_flags(regs->sp), |
448 | err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size); | 435 | &frame->uc.uc_stack.ss_flags); |
449 | err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]); | 436 | put_user_ex(me->sas_ss_size, &frame->uc.uc_stack.ss_size); |
450 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | 437 | err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]); |
451 | 438 | err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); | |
452 | /* Set up to return from userspace. If provided, use a stub | 439 | |
453 | already in userspace. */ | 440 | /* Set up to return from userspace. If provided, use a stub |
454 | /* x86-64 should always use SA_RESTORER. */ | 441 | already in userspace. */ |
455 | if (ka->sa.sa_flags & SA_RESTORER) { | 442 | /* x86-64 should always use SA_RESTORER. */ |
456 | err |= __put_user(ka->sa.sa_restorer, &frame->pretcode); | 443 | if (ka->sa.sa_flags & SA_RESTORER) { |
457 | } else { | 444 | put_user_ex(ka->sa.sa_restorer, &frame->pretcode); |
458 | /* could use a vstub here */ | 445 | } else { |
459 | return -EFAULT; | 446 | /* could use a vstub here */ |
460 | } | 447 | err |= -EFAULT; |
448 | } | ||
449 | } put_user_catch(err); | ||
461 | 450 | ||
462 | if (err) | 451 | if (err) |
463 | return -EFAULT; | 452 | return -EFAULT; |
@@ -509,31 +498,41 @@ sys_sigaction(int sig, const struct old_sigaction __user *act, | |||
509 | struct old_sigaction __user *oact) | 498 | struct old_sigaction __user *oact) |
510 | { | 499 | { |
511 | struct k_sigaction new_ka, old_ka; | 500 | struct k_sigaction new_ka, old_ka; |
512 | int ret; | 501 | int ret = 0; |
513 | 502 | ||
514 | if (act) { | 503 | if (act) { |
515 | old_sigset_t mask; | 504 | old_sigset_t mask; |
516 | 505 | ||
517 | if (!access_ok(VERIFY_READ, act, sizeof(*act)) || | 506 | if (!access_ok(VERIFY_READ, act, sizeof(*act))) |
518 | __get_user(new_ka.sa.sa_handler, &act->sa_handler) || | ||
519 | __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) | ||
520 | return -EFAULT; | 507 | return -EFAULT; |
521 | 508 | ||
522 | __get_user(new_ka.sa.sa_flags, &act->sa_flags); | 509 | get_user_try { |
523 | __get_user(mask, &act->sa_mask); | 510 | get_user_ex(new_ka.sa.sa_handler, &act->sa_handler); |
511 | get_user_ex(new_ka.sa.sa_flags, &act->sa_flags); | ||
512 | get_user_ex(mask, &act->sa_mask); | ||
513 | get_user_ex(new_ka.sa.sa_restorer, &act->sa_restorer); | ||
514 | } get_user_catch(ret); | ||
515 | |||
516 | if (ret) | ||
517 | return -EFAULT; | ||
524 | siginitset(&new_ka.sa.sa_mask, mask); | 518 | siginitset(&new_ka.sa.sa_mask, mask); |
525 | } | 519 | } |
526 | 520 | ||
527 | ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); | 521 | ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); |
528 | 522 | ||
529 | if (!ret && oact) { | 523 | if (!ret && oact) { |
530 | if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || | 524 | if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact))) |
531 | __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || | ||
532 | __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) | ||
533 | return -EFAULT; | 525 | return -EFAULT; |
534 | 526 | ||
535 | __put_user(old_ka.sa.sa_flags, &oact->sa_flags); | 527 | put_user_try { |
536 | __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); | 528 | put_user_ex(old_ka.sa.sa_handler, &oact->sa_handler); |
529 | put_user_ex(old_ka.sa.sa_flags, &oact->sa_flags); | ||
530 | put_user_ex(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); | ||
531 | put_user_ex(old_ka.sa.sa_restorer, &oact->sa_restorer); | ||
532 | } put_user_catch(ret); | ||
533 | |||
534 | if (ret) | ||
535 | return -EFAULT; | ||
537 | } | 536 | } |
538 | 537 | ||
539 | return ret; | 538 | return ret; |
@@ -541,14 +540,9 @@ sys_sigaction(int sig, const struct old_sigaction __user *act, | |||
541 | #endif /* CONFIG_X86_32 */ | 540 | #endif /* CONFIG_X86_32 */ |
542 | 541 | ||
543 | #ifdef CONFIG_X86_32 | 542 | #ifdef CONFIG_X86_32 |
544 | asmlinkage int sys_sigaltstack(unsigned long bx) | 543 | int sys_sigaltstack(struct pt_regs *regs) |
545 | { | 544 | { |
546 | /* | 545 | const stack_t __user *uss = (const stack_t __user *)regs->bx; |
547 | * This is needed to make gcc realize it doesn't own the | ||
548 | * "struct pt_regs" | ||
549 | */ | ||
550 | struct pt_regs *regs = (struct pt_regs *)&bx; | ||
551 | const stack_t __user *uss = (const stack_t __user *)bx; | ||
552 | stack_t __user *uoss = (stack_t __user *)regs->cx; | 546 | stack_t __user *uoss = (stack_t __user *)regs->cx; |
553 | 547 | ||
554 | return do_sigaltstack(uss, uoss, regs->sp); | 548 | return do_sigaltstack(uss, uoss, regs->sp); |
@@ -566,14 +560,12 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, | |||
566 | * Do a signal return; undo the signal stack. | 560 | * Do a signal return; undo the signal stack. |
567 | */ | 561 | */ |
568 | #ifdef CONFIG_X86_32 | 562 | #ifdef CONFIG_X86_32 |
569 | asmlinkage unsigned long sys_sigreturn(unsigned long __unused) | 563 | unsigned long sys_sigreturn(struct pt_regs *regs) |
570 | { | 564 | { |
571 | struct sigframe __user *frame; | 565 | struct sigframe __user *frame; |
572 | struct pt_regs *regs; | ||
573 | unsigned long ax; | 566 | unsigned long ax; |
574 | sigset_t set; | 567 | sigset_t set; |
575 | 568 | ||
576 | regs = (struct pt_regs *) &__unused; | ||
577 | frame = (struct sigframe __user *)(regs->sp - 8); | 569 | frame = (struct sigframe __user *)(regs->sp - 8); |
578 | 570 | ||
579 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | 571 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) |
@@ -600,7 +592,7 @@ badframe: | |||
600 | } | 592 | } |
601 | #endif /* CONFIG_X86_32 */ | 593 | #endif /* CONFIG_X86_32 */ |
602 | 594 | ||
603 | static long do_rt_sigreturn(struct pt_regs *regs) | 595 | long sys_rt_sigreturn(struct pt_regs *regs) |
604 | { | 596 | { |
605 | struct rt_sigframe __user *frame; | 597 | struct rt_sigframe __user *frame; |
606 | unsigned long ax; | 598 | unsigned long ax; |
@@ -631,25 +623,6 @@ badframe: | |||
631 | return 0; | 623 | return 0; |
632 | } | 624 | } |
633 | 625 | ||
634 | #ifdef CONFIG_X86_32 | ||
635 | /* | ||
636 | * Note: do not pass in pt_regs directly as with tail-call optimization | ||
637 | * GCC will incorrectly stomp on the caller's frame and corrupt user-space | ||
638 | * register state: | ||
639 | */ | ||
640 | asmlinkage int sys_rt_sigreturn(unsigned long __unused) | ||
641 | { | ||
642 | struct pt_regs *regs = (struct pt_regs *)&__unused; | ||
643 | |||
644 | return do_rt_sigreturn(regs); | ||
645 | } | ||
646 | #else /* !CONFIG_X86_32 */ | ||
647 | asmlinkage long sys_rt_sigreturn(struct pt_regs *regs) | ||
648 | { | ||
649 | return do_rt_sigreturn(regs); | ||
650 | } | ||
651 | #endif /* CONFIG_X86_32 */ | ||
652 | |||
653 | /* | 626 | /* |
654 | * OK, we're invoking a handler: | 627 | * OK, we're invoking a handler: |
655 | */ | 628 | */ |
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c index e6faa3316bd2..13f33ea8ccaa 100644 --- a/arch/x86/kernel/smp.c +++ b/arch/x86/kernel/smp.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Intel SMP support routines. | 2 | * Intel SMP support routines. |
3 | * | 3 | * |
4 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> | 4 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
5 | * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com> | 5 | * (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
6 | * (c) 2002,2003 Andi Kleen, SuSE Labs. | 6 | * (c) 2002,2003 Andi Kleen, SuSE Labs. |
7 | * | 7 | * |
8 | * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com> | 8 | * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com> |
@@ -26,8 +26,7 @@ | |||
26 | #include <asm/tlbflush.h> | 26 | #include <asm/tlbflush.h> |
27 | #include <asm/mmu_context.h> | 27 | #include <asm/mmu_context.h> |
28 | #include <asm/proto.h> | 28 | #include <asm/proto.h> |
29 | #include <mach_ipi.h> | 29 | #include <asm/apic.h> |
30 | #include <mach_apic.h> | ||
31 | /* | 30 | /* |
32 | * Some notes on x86 processor bugs affecting SMP operation: | 31 | * Some notes on x86 processor bugs affecting SMP operation: |
33 | * | 32 | * |
@@ -118,12 +117,12 @@ static void native_smp_send_reschedule(int cpu) | |||
118 | WARN_ON(1); | 117 | WARN_ON(1); |
119 | return; | 118 | return; |
120 | } | 119 | } |
121 | send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR); | 120 | apic->send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR); |
122 | } | 121 | } |
123 | 122 | ||
124 | void native_send_call_func_single_ipi(int cpu) | 123 | void native_send_call_func_single_ipi(int cpu) |
125 | { | 124 | { |
126 | send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR); | 125 | apic->send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR); |
127 | } | 126 | } |
128 | 127 | ||
129 | void native_send_call_func_ipi(const struct cpumask *mask) | 128 | void native_send_call_func_ipi(const struct cpumask *mask) |
@@ -131,7 +130,7 @@ void native_send_call_func_ipi(const struct cpumask *mask) | |||
131 | cpumask_var_t allbutself; | 130 | cpumask_var_t allbutself; |
132 | 131 | ||
133 | if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) { | 132 | if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) { |
134 | send_IPI_mask(mask, CALL_FUNCTION_VECTOR); | 133 | apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR); |
135 | return; | 134 | return; |
136 | } | 135 | } |
137 | 136 | ||
@@ -140,9 +139,9 @@ void native_send_call_func_ipi(const struct cpumask *mask) | |||
140 | 139 | ||
141 | if (cpumask_equal(mask, allbutself) && | 140 | if (cpumask_equal(mask, allbutself) && |
142 | cpumask_equal(cpu_online_mask, cpu_callout_mask)) | 141 | cpumask_equal(cpu_online_mask, cpu_callout_mask)) |
143 | send_IPI_allbutself(CALL_FUNCTION_VECTOR); | 142 | apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR); |
144 | else | 143 | else |
145 | send_IPI_mask(mask, CALL_FUNCTION_VECTOR); | 144 | apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR); |
146 | 145 | ||
147 | free_cpumask_var(allbutself); | 146 | free_cpumask_var(allbutself); |
148 | } | 147 | } |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index bb1a3b1fc87f..249334f5080a 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * x86 SMP booting functions | 2 | * x86 SMP booting functions |
3 | * | 3 | * |
4 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> | 4 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
5 | * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> | 5 | * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
6 | * Copyright 2001 Andi Kleen, SuSE Labs. | 6 | * Copyright 2001 Andi Kleen, SuSE Labs. |
7 | * | 7 | * |
8 | * Much of the core SMP work is based on previous work by Thomas Radke, to | 8 | * Much of the core SMP work is based on previous work by Thomas Radke, to |
@@ -53,7 +53,6 @@ | |||
53 | #include <asm/nmi.h> | 53 | #include <asm/nmi.h> |
54 | #include <asm/irq.h> | 54 | #include <asm/irq.h> |
55 | #include <asm/idle.h> | 55 | #include <asm/idle.h> |
56 | #include <asm/smp.h> | ||
57 | #include <asm/trampoline.h> | 56 | #include <asm/trampoline.h> |
58 | #include <asm/cpu.h> | 57 | #include <asm/cpu.h> |
59 | #include <asm/numa.h> | 58 | #include <asm/numa.h> |
@@ -61,13 +60,12 @@ | |||
61 | #include <asm/tlbflush.h> | 60 | #include <asm/tlbflush.h> |
62 | #include <asm/mtrr.h> | 61 | #include <asm/mtrr.h> |
63 | #include <asm/vmi.h> | 62 | #include <asm/vmi.h> |
64 | #include <asm/genapic.h> | 63 | #include <asm/apic.h> |
65 | #include <asm/setup.h> | 64 | #include <asm/setup.h> |
65 | #include <asm/uv/uv.h> | ||
66 | #include <linux/mc146818rtc.h> | 66 | #include <linux/mc146818rtc.h> |
67 | 67 | ||
68 | #include <mach_apic.h> | 68 | #include <asm/smpboot_hooks.h> |
69 | #include <mach_wakecpu.h> | ||
70 | #include <smpboot_hooks.h> | ||
71 | 69 | ||
72 | #ifdef CONFIG_X86_32 | 70 | #ifdef CONFIG_X86_32 |
73 | u8 apicid_2_node[MAX_APICID]; | 71 | u8 apicid_2_node[MAX_APICID]; |
@@ -114,7 +112,7 @@ EXPORT_PER_CPU_SYMBOL(cpu_core_map); | |||
114 | DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); | 112 | DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); |
115 | EXPORT_PER_CPU_SYMBOL(cpu_info); | 113 | EXPORT_PER_CPU_SYMBOL(cpu_info); |
116 | 114 | ||
117 | static atomic_t init_deasserted; | 115 | atomic_t init_deasserted; |
118 | 116 | ||
119 | 117 | ||
120 | /* Set if we find a B stepping CPU */ | 118 | /* Set if we find a B stepping CPU */ |
@@ -163,7 +161,7 @@ static void map_cpu_to_logical_apicid(void) | |||
163 | { | 161 | { |
164 | int cpu = smp_processor_id(); | 162 | int cpu = smp_processor_id(); |
165 | int apicid = logical_smp_processor_id(); | 163 | int apicid = logical_smp_processor_id(); |
166 | int node = apicid_to_node(apicid); | 164 | int node = apic->apicid_to_node(apicid); |
167 | 165 | ||
168 | if (!node_online(node)) | 166 | if (!node_online(node)) |
169 | node = first_online_node; | 167 | node = first_online_node; |
@@ -196,7 +194,8 @@ static void __cpuinit smp_callin(void) | |||
196 | * our local APIC. We have to wait for the IPI or we'll | 194 | * our local APIC. We have to wait for the IPI or we'll |
197 | * lock up on an APIC access. | 195 | * lock up on an APIC access. |
198 | */ | 196 | */ |
199 | wait_for_init_deassert(&init_deasserted); | 197 | if (apic->wait_for_init_deassert) |
198 | apic->wait_for_init_deassert(&init_deasserted); | ||
200 | 199 | ||
201 | /* | 200 | /* |
202 | * (This works even if the APIC is not enabled.) | 201 | * (This works even if the APIC is not enabled.) |
@@ -243,7 +242,8 @@ static void __cpuinit smp_callin(void) | |||
243 | */ | 242 | */ |
244 | 243 | ||
245 | pr_debug("CALLIN, before setup_local_APIC().\n"); | 244 | pr_debug("CALLIN, before setup_local_APIC().\n"); |
246 | smp_callin_clear_local_apic(); | 245 | if (apic->smp_callin_clear_local_apic) |
246 | apic->smp_callin_clear_local_apic(); | ||
247 | setup_local_APIC(); | 247 | setup_local_APIC(); |
248 | end_local_APIC_setup(); | 248 | end_local_APIC_setup(); |
249 | map_cpu_to_logical_apicid(); | 249 | map_cpu_to_logical_apicid(); |
@@ -583,7 +583,7 @@ wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip) | |||
583 | /* Target chip */ | 583 | /* Target chip */ |
584 | /* Boot on the stack */ | 584 | /* Boot on the stack */ |
585 | /* Kick the second */ | 585 | /* Kick the second */ |
586 | apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid); | 586 | apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid); |
587 | 587 | ||
588 | pr_debug("Waiting for send to finish...\n"); | 588 | pr_debug("Waiting for send to finish...\n"); |
589 | send_status = safe_apic_wait_icr_idle(); | 589 | send_status = safe_apic_wait_icr_idle(); |
@@ -614,12 +614,6 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) | |||
614 | unsigned long send_status, accept_status = 0; | 614 | unsigned long send_status, accept_status = 0; |
615 | int maxlvt, num_starts, j; | 615 | int maxlvt, num_starts, j; |
616 | 616 | ||
617 | if (get_uv_system_type() == UV_NON_UNIQUE_APIC) { | ||
618 | send_status = uv_wakeup_secondary(phys_apicid, start_eip); | ||
619 | atomic_set(&init_deasserted, 1); | ||
620 | return send_status; | ||
621 | } | ||
622 | |||
623 | maxlvt = lapic_get_maxlvt(); | 617 | maxlvt = lapic_get_maxlvt(); |
624 | 618 | ||
625 | /* | 619 | /* |
@@ -745,78 +739,23 @@ static void __cpuinit do_fork_idle(struct work_struct *work) | |||
745 | complete(&c_idle->done); | 739 | complete(&c_idle->done); |
746 | } | 740 | } |
747 | 741 | ||
748 | #ifdef CONFIG_X86_64 | ||
749 | |||
750 | /* __ref because it's safe to call free_bootmem when after_bootmem == 0. */ | ||
751 | static void __ref free_bootmem_pda(struct x8664_pda *oldpda) | ||
752 | { | ||
753 | if (!after_bootmem) | ||
754 | free_bootmem((unsigned long)oldpda, sizeof(*oldpda)); | ||
755 | } | ||
756 | |||
757 | /* | ||
758 | * Allocate node local memory for the AP pda. | ||
759 | * | ||
760 | * Must be called after the _cpu_pda pointer table is initialized. | ||
761 | */ | ||
762 | int __cpuinit get_local_pda(int cpu) | ||
763 | { | ||
764 | struct x8664_pda *oldpda, *newpda; | ||
765 | unsigned long size = sizeof(struct x8664_pda); | ||
766 | int node = cpu_to_node(cpu); | ||
767 | |||
768 | if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem) | ||
769 | return 0; | ||
770 | |||
771 | oldpda = cpu_pda(cpu); | ||
772 | newpda = kmalloc_node(size, GFP_ATOMIC, node); | ||
773 | if (!newpda) { | ||
774 | printk(KERN_ERR "Could not allocate node local PDA " | ||
775 | "for CPU %d on node %d\n", cpu, node); | ||
776 | |||
777 | if (oldpda) | ||
778 | return 0; /* have a usable pda */ | ||
779 | else | ||
780 | return -1; | ||
781 | } | ||
782 | |||
783 | if (oldpda) { | ||
784 | memcpy(newpda, oldpda, size); | ||
785 | free_bootmem_pda(oldpda); | ||
786 | } | ||
787 | |||
788 | newpda->in_bootmem = 0; | ||
789 | cpu_pda(cpu) = newpda; | ||
790 | return 0; | ||
791 | } | ||
792 | #endif /* CONFIG_X86_64 */ | ||
793 | |||
794 | static int __cpuinit do_boot_cpu(int apicid, int cpu) | ||
795 | /* | 742 | /* |
796 | * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad | 743 | * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad |
797 | * (ie clustered apic addressing mode), this is a LOGICAL apic ID. | 744 | * (ie clustered apic addressing mode), this is a LOGICAL apic ID. |
798 | * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu. | 745 | * Returns zero if CPU booted OK, else error code from |
746 | * ->wakeup_secondary_cpu. | ||
799 | */ | 747 | */ |
748 | static int __cpuinit do_boot_cpu(int apicid, int cpu) | ||
800 | { | 749 | { |
801 | unsigned long boot_error = 0; | 750 | unsigned long boot_error = 0; |
802 | int timeout; | ||
803 | unsigned long start_ip; | 751 | unsigned long start_ip; |
804 | unsigned short nmi_high = 0, nmi_low = 0; | 752 | int timeout; |
805 | struct create_idle c_idle = { | 753 | struct create_idle c_idle = { |
806 | .cpu = cpu, | 754 | .cpu = cpu, |
807 | .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), | 755 | .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), |
808 | }; | 756 | }; |
809 | INIT_WORK(&c_idle.work, do_fork_idle); | ||
810 | 757 | ||
811 | #ifdef CONFIG_X86_64 | 758 | INIT_WORK(&c_idle.work, do_fork_idle); |
812 | /* Allocate node local memory for AP pdas */ | ||
813 | if (cpu > 0) { | ||
814 | boot_error = get_local_pda(cpu); | ||
815 | if (boot_error) | ||
816 | goto restore_state; | ||
817 | /* if can't get pda memory, can't start cpu */ | ||
818 | } | ||
819 | #endif | ||
820 | 759 | ||
821 | alternatives_smp_switch(1); | 760 | alternatives_smp_switch(1); |
822 | 761 | ||
@@ -847,14 +786,16 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu) | |||
847 | 786 | ||
848 | set_idle_for_cpu(cpu, c_idle.idle); | 787 | set_idle_for_cpu(cpu, c_idle.idle); |
849 | do_rest: | 788 | do_rest: |
850 | #ifdef CONFIG_X86_32 | ||
851 | per_cpu(current_task, cpu) = c_idle.idle; | 789 | per_cpu(current_task, cpu) = c_idle.idle; |
852 | init_gdt(cpu); | 790 | #ifdef CONFIG_X86_32 |
853 | /* Stack for startup_32 can be just as for start_secondary onwards */ | 791 | /* Stack for startup_32 can be just as for start_secondary onwards */ |
854 | irq_ctx_init(cpu); | 792 | irq_ctx_init(cpu); |
855 | #else | 793 | #else |
856 | cpu_pda(cpu)->pcurrent = c_idle.idle; | ||
857 | clear_tsk_thread_flag(c_idle.idle, TIF_FORK); | 794 | clear_tsk_thread_flag(c_idle.idle, TIF_FORK); |
795 | initial_gs = per_cpu_offset(cpu); | ||
796 | per_cpu(kernel_stack, cpu) = | ||
797 | (unsigned long)task_stack_page(c_idle.idle) - | ||
798 | KERNEL_STACK_OFFSET + THREAD_SIZE; | ||
858 | #endif | 799 | #endif |
859 | early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); | 800 | early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); |
860 | initial_code = (unsigned long)start_secondary; | 801 | initial_code = (unsigned long)start_secondary; |
@@ -878,8 +819,6 @@ do_rest: | |||
878 | 819 | ||
879 | pr_debug("Setting warm reset code and vector.\n"); | 820 | pr_debug("Setting warm reset code and vector.\n"); |
880 | 821 | ||
881 | store_NMI_vector(&nmi_high, &nmi_low); | ||
882 | |||
883 | smpboot_setup_warm_reset_vector(start_ip); | 822 | smpboot_setup_warm_reset_vector(start_ip); |
884 | /* | 823 | /* |
885 | * Be paranoid about clearing APIC errors. | 824 | * Be paranoid about clearing APIC errors. |
@@ -891,9 +830,13 @@ do_rest: | |||
891 | } | 830 | } |
892 | 831 | ||
893 | /* | 832 | /* |
894 | * Starting actual IPI sequence... | 833 | * Kick the secondary CPU. Use the method in the APIC driver |
834 | * if it's defined - or use an INIT boot APIC message otherwise: | ||
895 | */ | 835 | */ |
896 | boot_error = wakeup_secondary_cpu(apicid, start_ip); | 836 | if (apic->wakeup_secondary_cpu) |
837 | boot_error = apic->wakeup_secondary_cpu(apicid, start_ip); | ||
838 | else | ||
839 | boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip); | ||
897 | 840 | ||
898 | if (!boot_error) { | 841 | if (!boot_error) { |
899 | /* | 842 | /* |
@@ -927,13 +870,11 @@ do_rest: | |||
927 | else | 870 | else |
928 | /* trampoline code not run */ | 871 | /* trampoline code not run */ |
929 | printk(KERN_ERR "Not responding.\n"); | 872 | printk(KERN_ERR "Not responding.\n"); |
930 | if (get_uv_system_type() != UV_NON_UNIQUE_APIC) | 873 | if (apic->inquire_remote_apic) |
931 | inquire_remote_apic(apicid); | 874 | apic->inquire_remote_apic(apicid); |
932 | } | 875 | } |
933 | } | 876 | } |
934 | #ifdef CONFIG_X86_64 | 877 | |
935 | restore_state: | ||
936 | #endif | ||
937 | if (boot_error) { | 878 | if (boot_error) { |
938 | /* Try to put things back the way they were before ... */ | 879 | /* Try to put things back the way they were before ... */ |
939 | numa_remove_cpu(cpu); /* was set by numa_add_cpu */ | 880 | numa_remove_cpu(cpu); /* was set by numa_add_cpu */ |
@@ -961,7 +902,7 @@ restore_state: | |||
961 | 902 | ||
962 | int __cpuinit native_cpu_up(unsigned int cpu) | 903 | int __cpuinit native_cpu_up(unsigned int cpu) |
963 | { | 904 | { |
964 | int apicid = cpu_present_to_apicid(cpu); | 905 | int apicid = apic->cpu_present_to_apicid(cpu); |
965 | unsigned long flags; | 906 | unsigned long flags; |
966 | int err; | 907 | int err; |
967 | 908 | ||
@@ -1054,14 +995,14 @@ static int __init smp_sanity_check(unsigned max_cpus) | |||
1054 | { | 995 | { |
1055 | preempt_disable(); | 996 | preempt_disable(); |
1056 | 997 | ||
1057 | #if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32) | 998 | #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32) |
1058 | if (def_to_bigsmp && nr_cpu_ids > 8) { | 999 | if (def_to_bigsmp && nr_cpu_ids > 8) { |
1059 | unsigned int cpu; | 1000 | unsigned int cpu; |
1060 | unsigned nr; | 1001 | unsigned nr; |
1061 | 1002 | ||
1062 | printk(KERN_WARNING | 1003 | printk(KERN_WARNING |
1063 | "More than 8 CPUs detected - skipping them.\n" | 1004 | "More than 8 CPUs detected - skipping them.\n" |
1064 | "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n"); | 1005 | "Use CONFIG_X86_BIGSMP.\n"); |
1065 | 1006 | ||
1066 | nr = 0; | 1007 | nr = 0; |
1067 | for_each_present_cpu(cpu) { | 1008 | for_each_present_cpu(cpu) { |
@@ -1107,7 +1048,7 @@ static int __init smp_sanity_check(unsigned max_cpus) | |||
1107 | * Should not be necessary because the MP table should list the boot | 1048 | * Should not be necessary because the MP table should list the boot |
1108 | * CPU too, but we do it for the sake of robustness anyway. | 1049 | * CPU too, but we do it for the sake of robustness anyway. |
1109 | */ | 1050 | */ |
1110 | if (!check_phys_apicid_present(boot_cpu_physical_apicid)) { | 1051 | if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) { |
1111 | printk(KERN_NOTICE | 1052 | printk(KERN_NOTICE |
1112 | "weird, boot CPU (#%d) not listed by the BIOS.\n", | 1053 | "weird, boot CPU (#%d) not listed by the BIOS.\n", |
1113 | boot_cpu_physical_apicid); | 1054 | boot_cpu_physical_apicid); |
@@ -1125,6 +1066,7 @@ static int __init smp_sanity_check(unsigned max_cpus) | |||
1125 | printk(KERN_ERR "... forcing use of dummy APIC emulation." | 1066 | printk(KERN_ERR "... forcing use of dummy APIC emulation." |
1126 | "(tell your hw vendor)\n"); | 1067 | "(tell your hw vendor)\n"); |
1127 | smpboot_clear_io_apic(); | 1068 | smpboot_clear_io_apic(); |
1069 | arch_disable_smp_support(); | ||
1128 | return -1; | 1070 | return -1; |
1129 | } | 1071 | } |
1130 | 1072 | ||
@@ -1181,9 +1123,9 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) | |||
1181 | current_thread_info()->cpu = 0; /* needed? */ | 1123 | current_thread_info()->cpu = 0; /* needed? */ |
1182 | set_cpu_sibling_map(0); | 1124 | set_cpu_sibling_map(0); |
1183 | 1125 | ||
1184 | #ifdef CONFIG_X86_64 | ||
1185 | enable_IR_x2apic(); | 1126 | enable_IR_x2apic(); |
1186 | setup_apic_routing(); | 1127 | #ifdef CONFIG_X86_64 |
1128 | default_setup_apic_routing(); | ||
1187 | #endif | 1129 | #endif |
1188 | 1130 | ||
1189 | if (smp_sanity_check(max_cpus) < 0) { | 1131 | if (smp_sanity_check(max_cpus) < 0) { |
@@ -1207,18 +1149,18 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) | |||
1207 | */ | 1149 | */ |
1208 | setup_local_APIC(); | 1150 | setup_local_APIC(); |
1209 | 1151 | ||
1210 | #ifdef CONFIG_X86_64 | ||
1211 | /* | 1152 | /* |
1212 | * Enable IO APIC before setting up error vector | 1153 | * Enable IO APIC before setting up error vector |
1213 | */ | 1154 | */ |
1214 | if (!skip_ioapic_setup && nr_ioapics) | 1155 | if (!skip_ioapic_setup && nr_ioapics) |
1215 | enable_IO_APIC(); | 1156 | enable_IO_APIC(); |
1216 | #endif | 1157 | |
1217 | end_local_APIC_setup(); | 1158 | end_local_APIC_setup(); |
1218 | 1159 | ||
1219 | map_cpu_to_logical_apicid(); | 1160 | map_cpu_to_logical_apicid(); |
1220 | 1161 | ||
1221 | setup_portio_remap(); | 1162 | if (apic->setup_portio_remap) |
1163 | apic->setup_portio_remap(); | ||
1222 | 1164 | ||
1223 | smpboot_setup_io_apic(); | 1165 | smpboot_setup_io_apic(); |
1224 | /* | 1166 | /* |
@@ -1240,10 +1182,7 @@ out: | |||
1240 | void __init native_smp_prepare_boot_cpu(void) | 1182 | void __init native_smp_prepare_boot_cpu(void) |
1241 | { | 1183 | { |
1242 | int me = smp_processor_id(); | 1184 | int me = smp_processor_id(); |
1243 | #ifdef CONFIG_X86_32 | 1185 | switch_to_new_gdt(me); |
1244 | init_gdt(me); | ||
1245 | #endif | ||
1246 | switch_to_new_gdt(); | ||
1247 | /* already set me in cpu_online_mask in boot_cpu_init() */ | 1186 | /* already set me in cpu_online_mask in boot_cpu_init() */ |
1248 | cpumask_set_cpu(me, cpu_callout_mask); | 1187 | cpumask_set_cpu(me, cpu_callout_mask); |
1249 | per_cpu(cpu_state, me) = CPU_ONLINE; | 1188 | per_cpu(cpu_state, me) = CPU_ONLINE; |
diff --git a/arch/x86/kernel/smpcommon.c b/arch/x86/kernel/smpcommon.c deleted file mode 100644 index 397e309839dd..000000000000 --- a/arch/x86/kernel/smpcommon.c +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* | ||
2 | * SMP stuff which is common to all sub-architectures. | ||
3 | */ | ||
4 | #include <linux/module.h> | ||
5 | #include <asm/smp.h> | ||
6 | |||
7 | #ifdef CONFIG_X86_32 | ||
8 | DEFINE_PER_CPU(unsigned long, this_cpu_off); | ||
9 | EXPORT_PER_CPU_SYMBOL(this_cpu_off); | ||
10 | |||
11 | /* | ||
12 | * Initialize the CPU's GDT. This is either the boot CPU doing itself | ||
13 | * (still using the master per-cpu area), or a CPU doing it for a | ||
14 | * secondary which will soon come up. | ||
15 | */ | ||
16 | __cpuinit void init_gdt(int cpu) | ||
17 | { | ||
18 | struct desc_struct gdt; | ||
19 | |||
20 | pack_descriptor(&gdt, __per_cpu_offset[cpu], 0xFFFFF, | ||
21 | 0x2 | DESCTYPE_S, 0x8); | ||
22 | gdt.s = 1; | ||
23 | |||
24 | write_gdt_entry(get_cpu_gdt_table(cpu), | ||
25 | GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S); | ||
26 | |||
27 | per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu]; | ||
28 | per_cpu(cpu_number, cpu) = cpu; | ||
29 | } | ||
30 | #endif | ||
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c index 10786af95545..f7bddc2e37d1 100644 --- a/arch/x86/kernel/stacktrace.c +++ b/arch/x86/kernel/stacktrace.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Stack trace management functions | 2 | * Stack trace management functions |
3 | * | 3 | * |
4 | * Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> | 4 | * Copyright (C) 2006-2009 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> |
5 | */ | 5 | */ |
6 | #include <linux/sched.h> | 6 | #include <linux/sched.h> |
7 | #include <linux/stacktrace.h> | 7 | #include <linux/stacktrace.h> |
diff --git a/arch/x86/kernel/summit_32.c b/arch/x86/kernel/summit_32.c deleted file mode 100644 index 7b987852e876..000000000000 --- a/arch/x86/kernel/summit_32.c +++ /dev/null | |||
@@ -1,188 +0,0 @@ | |||
1 | /* | ||
2 | * IBM Summit-Specific Code | ||
3 | * | ||
4 | * Written By: Matthew Dobson, IBM Corporation | ||
5 | * | ||
6 | * Copyright (c) 2003 IBM Corp. | ||
7 | * | ||
8 | * All rights reserved. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or (at | ||
13 | * your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, but | ||
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
18 | * NON INFRINGEMENT. See the GNU General Public License for more | ||
19 | * details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
24 | * | ||
25 | * Send feedback to <colpatch@us.ibm.com> | ||
26 | * | ||
27 | */ | ||
28 | |||
29 | #include <linux/mm.h> | ||
30 | #include <linux/init.h> | ||
31 | #include <asm/io.h> | ||
32 | #include <asm/bios_ebda.h> | ||
33 | #include <asm/summit/mpparse.h> | ||
34 | |||
35 | static struct rio_table_hdr *rio_table_hdr __initdata; | ||
36 | static struct scal_detail *scal_devs[MAX_NUMNODES] __initdata; | ||
37 | static struct rio_detail *rio_devs[MAX_NUMNODES*4] __initdata; | ||
38 | |||
39 | #ifndef CONFIG_X86_NUMAQ | ||
40 | static int mp_bus_id_to_node[MAX_MP_BUSSES] __initdata; | ||
41 | #endif | ||
42 | |||
43 | static int __init setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus) | ||
44 | { | ||
45 | int twister = 0, node = 0; | ||
46 | int i, bus, num_buses; | ||
47 | |||
48 | for (i = 0; i < rio_table_hdr->num_rio_dev; i++) { | ||
49 | if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) { | ||
50 | twister = rio_devs[i]->owner_id; | ||
51 | break; | ||
52 | } | ||
53 | } | ||
54 | if (i == rio_table_hdr->num_rio_dev) { | ||
55 | printk(KERN_ERR "%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__); | ||
56 | return last_bus; | ||
57 | } | ||
58 | |||
59 | for (i = 0; i < rio_table_hdr->num_scal_dev; i++) { | ||
60 | if (scal_devs[i]->node_id == twister) { | ||
61 | node = scal_devs[i]->node_id; | ||
62 | break; | ||
63 | } | ||
64 | } | ||
65 | if (i == rio_table_hdr->num_scal_dev) { | ||
66 | printk(KERN_ERR "%s: Couldn't find owner Twister for Cyclone!\n", __func__); | ||
67 | return last_bus; | ||
68 | } | ||
69 | |||
70 | switch (rio_devs[wpeg_num]->type) { | ||
71 | case CompatWPEG: | ||
72 | /* | ||
73 | * The Compatibility Winnipeg controls the 2 legacy buses, | ||
74 | * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case | ||
75 | * a PCI-PCI bridge card is used in either slot: total 5 buses. | ||
76 | */ | ||
77 | num_buses = 5; | ||
78 | break; | ||
79 | case AltWPEG: | ||
80 | /* | ||
81 | * The Alternate Winnipeg controls the 2 133MHz buses [1 slot | ||
82 | * each], their 2 "extra" buses, the 100MHz bus [2 slots] and | ||
83 | * the "extra" buses for each of those slots: total 7 buses. | ||
84 | */ | ||
85 | num_buses = 7; | ||
86 | break; | ||
87 | case LookOutAWPEG: | ||
88 | case LookOutBWPEG: | ||
89 | /* | ||
90 | * A Lookout Winnipeg controls 3 100MHz buses [2 slots each] | ||
91 | * & the "extra" buses for each of those slots: total 9 buses. | ||
92 | */ | ||
93 | num_buses = 9; | ||
94 | break; | ||
95 | default: | ||
96 | printk(KERN_INFO "%s: Unsupported Winnipeg type!\n", __func__); | ||
97 | return last_bus; | ||
98 | } | ||
99 | |||
100 | for (bus = last_bus; bus < last_bus + num_buses; bus++) | ||
101 | mp_bus_id_to_node[bus] = node; | ||
102 | return bus; | ||
103 | } | ||
104 | |||
105 | static int __init build_detail_arrays(void) | ||
106 | { | ||
107 | unsigned long ptr; | ||
108 | int i, scal_detail_size, rio_detail_size; | ||
109 | |||
110 | if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) { | ||
111 | printk(KERN_WARNING "%s: MAX_NUMNODES too low! Defined as %d, but system has %d nodes.\n", __func__, MAX_NUMNODES, rio_table_hdr->num_scal_dev); | ||
112 | return 0; | ||
113 | } | ||
114 | |||
115 | switch (rio_table_hdr->version) { | ||
116 | default: | ||
117 | printk(KERN_WARNING "%s: Invalid Rio Grande Table Version: %d\n", __func__, rio_table_hdr->version); | ||
118 | return 0; | ||
119 | case 2: | ||
120 | scal_detail_size = 11; | ||
121 | rio_detail_size = 13; | ||
122 | break; | ||
123 | case 3: | ||
124 | scal_detail_size = 12; | ||
125 | rio_detail_size = 15; | ||
126 | break; | ||
127 | } | ||
128 | |||
129 | ptr = (unsigned long)rio_table_hdr + 3; | ||
130 | for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size) | ||
131 | scal_devs[i] = (struct scal_detail *)ptr; | ||
132 | |||
133 | for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size) | ||
134 | rio_devs[i] = (struct rio_detail *)ptr; | ||
135 | |||
136 | return 1; | ||
137 | } | ||
138 | |||
139 | void __init setup_summit(void) | ||
140 | { | ||
141 | unsigned long ptr; | ||
142 | unsigned short offset; | ||
143 | int i, next_wpeg, next_bus = 0; | ||
144 | |||
145 | /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */ | ||
146 | ptr = get_bios_ebda(); | ||
147 | ptr = (unsigned long)phys_to_virt(ptr); | ||
148 | |||
149 | rio_table_hdr = NULL; | ||
150 | offset = 0x180; | ||
151 | while (offset) { | ||
152 | /* The block id is stored in the 2nd word */ | ||
153 | if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) { | ||
154 | /* set the pointer past the offset & block id */ | ||
155 | rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4); | ||
156 | break; | ||
157 | } | ||
158 | /* The next offset is stored in the 1st word. 0 means no more */ | ||
159 | offset = *((unsigned short *)(ptr + offset)); | ||
160 | } | ||
161 | if (!rio_table_hdr) { | ||
162 | printk(KERN_ERR "%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__); | ||
163 | return; | ||
164 | } | ||
165 | |||
166 | if (!build_detail_arrays()) | ||
167 | return; | ||
168 | |||
169 | /* The first Winnipeg we're looking for has an index of 0 */ | ||
170 | next_wpeg = 0; | ||
171 | do { | ||
172 | for (i = 0; i < rio_table_hdr->num_rio_dev; i++) { | ||
173 | if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) { | ||
174 | /* It's the Winnipeg we're looking for! */ | ||
175 | next_bus = setup_pci_node_map_for_wpeg(i, next_bus); | ||
176 | next_wpeg++; | ||
177 | break; | ||
178 | } | ||
179 | } | ||
180 | /* | ||
181 | * If we go through all Rio devices and don't find one with | ||
182 | * the next index, it means we've found all the Winnipegs, | ||
183 | * and thus all the PCI buses. | ||
184 | */ | ||
185 | if (i == rio_table_hdr->num_rio_dev) | ||
186 | next_wpeg = 0; | ||
187 | } while (next_wpeg != 0); | ||
188 | } | ||
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S index e2e86a08f31d..3bdb64829b82 100644 --- a/arch/x86/kernel/syscall_table_32.S +++ b/arch/x86/kernel/syscall_table_32.S | |||
@@ -1,7 +1,7 @@ | |||
1 | ENTRY(sys_call_table) | 1 | ENTRY(sys_call_table) |
2 | .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */ | 2 | .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */ |
3 | .long sys_exit | 3 | .long sys_exit |
4 | .long sys_fork | 4 | .long ptregs_fork |
5 | .long sys_read | 5 | .long sys_read |
6 | .long sys_write | 6 | .long sys_write |
7 | .long sys_open /* 5 */ | 7 | .long sys_open /* 5 */ |
@@ -10,7 +10,7 @@ ENTRY(sys_call_table) | |||
10 | .long sys_creat | 10 | .long sys_creat |
11 | .long sys_link | 11 | .long sys_link |
12 | .long sys_unlink /* 10 */ | 12 | .long sys_unlink /* 10 */ |
13 | .long sys_execve | 13 | .long ptregs_execve |
14 | .long sys_chdir | 14 | .long sys_chdir |
15 | .long sys_time | 15 | .long sys_time |
16 | .long sys_mknod | 16 | .long sys_mknod |
@@ -109,17 +109,17 @@ ENTRY(sys_call_table) | |||
109 | .long sys_newlstat | 109 | .long sys_newlstat |
110 | .long sys_newfstat | 110 | .long sys_newfstat |
111 | .long sys_uname | 111 | .long sys_uname |
112 | .long sys_iopl /* 110 */ | 112 | .long ptregs_iopl /* 110 */ |
113 | .long sys_vhangup | 113 | .long sys_vhangup |
114 | .long sys_ni_syscall /* old "idle" system call */ | 114 | .long sys_ni_syscall /* old "idle" system call */ |
115 | .long sys_vm86old | 115 | .long ptregs_vm86old |
116 | .long sys_wait4 | 116 | .long sys_wait4 |
117 | .long sys_swapoff /* 115 */ | 117 | .long sys_swapoff /* 115 */ |
118 | .long sys_sysinfo | 118 | .long sys_sysinfo |
119 | .long sys_ipc | 119 | .long sys_ipc |
120 | .long sys_fsync | 120 | .long sys_fsync |
121 | .long sys_sigreturn | 121 | .long ptregs_sigreturn |
122 | .long sys_clone /* 120 */ | 122 | .long ptregs_clone /* 120 */ |
123 | .long sys_setdomainname | 123 | .long sys_setdomainname |
124 | .long sys_newuname | 124 | .long sys_newuname |
125 | .long sys_modify_ldt | 125 | .long sys_modify_ldt |
@@ -165,14 +165,14 @@ ENTRY(sys_call_table) | |||
165 | .long sys_mremap | 165 | .long sys_mremap |
166 | .long sys_setresuid16 | 166 | .long sys_setresuid16 |
167 | .long sys_getresuid16 /* 165 */ | 167 | .long sys_getresuid16 /* 165 */ |
168 | .long sys_vm86 | 168 | .long ptregs_vm86 |
169 | .long sys_ni_syscall /* Old sys_query_module */ | 169 | .long sys_ni_syscall /* Old sys_query_module */ |
170 | .long sys_poll | 170 | .long sys_poll |
171 | .long sys_nfsservctl | 171 | .long sys_nfsservctl |
172 | .long sys_setresgid16 /* 170 */ | 172 | .long sys_setresgid16 /* 170 */ |
173 | .long sys_getresgid16 | 173 | .long sys_getresgid16 |
174 | .long sys_prctl | 174 | .long sys_prctl |
175 | .long sys_rt_sigreturn | 175 | .long ptregs_rt_sigreturn |
176 | .long sys_rt_sigaction | 176 | .long sys_rt_sigaction |
177 | .long sys_rt_sigprocmask /* 175 */ | 177 | .long sys_rt_sigprocmask /* 175 */ |
178 | .long sys_rt_sigpending | 178 | .long sys_rt_sigpending |
@@ -185,11 +185,11 @@ ENTRY(sys_call_table) | |||
185 | .long sys_getcwd | 185 | .long sys_getcwd |
186 | .long sys_capget | 186 | .long sys_capget |
187 | .long sys_capset /* 185 */ | 187 | .long sys_capset /* 185 */ |
188 | .long sys_sigaltstack | 188 | .long ptregs_sigaltstack |
189 | .long sys_sendfile | 189 | .long sys_sendfile |
190 | .long sys_ni_syscall /* reserved for streams1 */ | 190 | .long sys_ni_syscall /* reserved for streams1 */ |
191 | .long sys_ni_syscall /* reserved for streams2 */ | 191 | .long sys_ni_syscall /* reserved for streams2 */ |
192 | .long sys_vfork /* 190 */ | 192 | .long ptregs_vfork /* 190 */ |
193 | .long sys_getrlimit | 193 | .long sys_getrlimit |
194 | .long sys_mmap2 | 194 | .long sys_mmap2 |
195 | .long sys_truncate64 | 195 | .long sys_truncate64 |
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c index 3985cac0ed47..5c5d87f0b2e1 100644 --- a/arch/x86/kernel/time_32.c +++ b/arch/x86/kernel/time_32.c | |||
@@ -33,12 +33,12 @@ | |||
33 | #include <linux/time.h> | 33 | #include <linux/time.h> |
34 | #include <linux/mca.h> | 34 | #include <linux/mca.h> |
35 | 35 | ||
36 | #include <asm/arch_hooks.h> | 36 | #include <asm/setup.h> |
37 | #include <asm/hpet.h> | 37 | #include <asm/hpet.h> |
38 | #include <asm/time.h> | 38 | #include <asm/time.h> |
39 | #include <asm/timer.h> | 39 | #include <asm/timer.h> |
40 | 40 | ||
41 | #include "do_timer.h" | 41 | #include <asm/do_timer.h> |
42 | 42 | ||
43 | int timer_ack; | 43 | int timer_ack; |
44 | 44 | ||
@@ -118,7 +118,7 @@ void __init hpet_time_init(void) | |||
118 | { | 118 | { |
119 | if (!hpet_enable()) | 119 | if (!hpet_enable()) |
120 | setup_pit_timer(); | 120 | setup_pit_timer(); |
121 | time_init_hook(); | 121 | x86_quirk_time_init(); |
122 | } | 122 | } |
123 | 123 | ||
124 | /* | 124 | /* |
@@ -131,7 +131,7 @@ void __init hpet_time_init(void) | |||
131 | */ | 131 | */ |
132 | void __init time_init(void) | 132 | void __init time_init(void) |
133 | { | 133 | { |
134 | pre_time_init_hook(); | 134 | x86_quirk_pre_time_init(); |
135 | tsc_init(); | 135 | tsc_init(); |
136 | late_time_init = choose_time_init(); | 136 | late_time_init = choose_time_init(); |
137 | } | 137 | } |
diff --git a/arch/x86/kernel/tlb_32.c b/arch/x86/kernel/tlb_32.c deleted file mode 100644 index ce5054642247..000000000000 --- a/arch/x86/kernel/tlb_32.c +++ /dev/null | |||
@@ -1,256 +0,0 @@ | |||
1 | #include <linux/spinlock.h> | ||
2 | #include <linux/cpu.h> | ||
3 | #include <linux/interrupt.h> | ||
4 | |||
5 | #include <asm/tlbflush.h> | ||
6 | |||
7 | DEFINE_PER_CPU(struct tlb_state, cpu_tlbstate) | ||
8 | ____cacheline_aligned = { &init_mm, 0, }; | ||
9 | |||
10 | /* must come after the send_IPI functions above for inlining */ | ||
11 | #include <mach_ipi.h> | ||
12 | |||
13 | /* | ||
14 | * Smarter SMP flushing macros. | ||
15 | * c/o Linus Torvalds. | ||
16 | * | ||
17 | * These mean you can really definitely utterly forget about | ||
18 | * writing to user space from interrupts. (Its not allowed anyway). | ||
19 | * | ||
20 | * Optimizations Manfred Spraul <manfred@colorfullife.com> | ||
21 | */ | ||
22 | |||
23 | static cpumask_t flush_cpumask; | ||
24 | static struct mm_struct *flush_mm; | ||
25 | static unsigned long flush_va; | ||
26 | static DEFINE_SPINLOCK(tlbstate_lock); | ||
27 | |||
28 | /* | ||
29 | * We cannot call mmdrop() because we are in interrupt context, | ||
30 | * instead update mm->cpu_vm_mask. | ||
31 | * | ||
32 | * We need to reload %cr3 since the page tables may be going | ||
33 | * away from under us.. | ||
34 | */ | ||
35 | void leave_mm(int cpu) | ||
36 | { | ||
37 | BUG_ON(x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK); | ||
38 | cpu_clear(cpu, x86_read_percpu(cpu_tlbstate.active_mm)->cpu_vm_mask); | ||
39 | load_cr3(swapper_pg_dir); | ||
40 | } | ||
41 | EXPORT_SYMBOL_GPL(leave_mm); | ||
42 | |||
43 | /* | ||
44 | * | ||
45 | * The flush IPI assumes that a thread switch happens in this order: | ||
46 | * [cpu0: the cpu that switches] | ||
47 | * 1) switch_mm() either 1a) or 1b) | ||
48 | * 1a) thread switch to a different mm | ||
49 | * 1a1) cpu_clear(cpu, old_mm->cpu_vm_mask); | ||
50 | * Stop ipi delivery for the old mm. This is not synchronized with | ||
51 | * the other cpus, but smp_invalidate_interrupt ignore flush ipis | ||
52 | * for the wrong mm, and in the worst case we perform a superfluous | ||
53 | * tlb flush. | ||
54 | * 1a2) set cpu_tlbstate to TLBSTATE_OK | ||
55 | * Now the smp_invalidate_interrupt won't call leave_mm if cpu0 | ||
56 | * was in lazy tlb mode. | ||
57 | * 1a3) update cpu_tlbstate[].active_mm | ||
58 | * Now cpu0 accepts tlb flushes for the new mm. | ||
59 | * 1a4) cpu_set(cpu, new_mm->cpu_vm_mask); | ||
60 | * Now the other cpus will send tlb flush ipis. | ||
61 | * 1a4) change cr3. | ||
62 | * 1b) thread switch without mm change | ||
63 | * cpu_tlbstate[].active_mm is correct, cpu0 already handles | ||
64 | * flush ipis. | ||
65 | * 1b1) set cpu_tlbstate to TLBSTATE_OK | ||
66 | * 1b2) test_and_set the cpu bit in cpu_vm_mask. | ||
67 | * Atomically set the bit [other cpus will start sending flush ipis], | ||
68 | * and test the bit. | ||
69 | * 1b3) if the bit was 0: leave_mm was called, flush the tlb. | ||
70 | * 2) switch %%esp, ie current | ||
71 | * | ||
72 | * The interrupt must handle 2 special cases: | ||
73 | * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm. | ||
74 | * - the cpu performs speculative tlb reads, i.e. even if the cpu only | ||
75 | * runs in kernel space, the cpu could load tlb entries for user space | ||
76 | * pages. | ||
77 | * | ||
78 | * The good news is that cpu_tlbstate is local to each cpu, no | ||
79 | * write/read ordering problems. | ||
80 | */ | ||
81 | |||
82 | /* | ||
83 | * TLB flush IPI: | ||
84 | * | ||
85 | * 1) Flush the tlb entries if the cpu uses the mm that's being flushed. | ||
86 | * 2) Leave the mm if we are in the lazy tlb mode. | ||
87 | */ | ||
88 | |||
89 | void smp_invalidate_interrupt(struct pt_regs *regs) | ||
90 | { | ||
91 | unsigned long cpu; | ||
92 | |||
93 | cpu = get_cpu(); | ||
94 | |||
95 | if (!cpu_isset(cpu, flush_cpumask)) | ||
96 | goto out; | ||
97 | /* | ||
98 | * This was a BUG() but until someone can quote me the | ||
99 | * line from the intel manual that guarantees an IPI to | ||
100 | * multiple CPUs is retried _only_ on the erroring CPUs | ||
101 | * its staying as a return | ||
102 | * | ||
103 | * BUG(); | ||
104 | */ | ||
105 | |||
106 | if (flush_mm == x86_read_percpu(cpu_tlbstate.active_mm)) { | ||
107 | if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK) { | ||
108 | if (flush_va == TLB_FLUSH_ALL) | ||
109 | local_flush_tlb(); | ||
110 | else | ||
111 | __flush_tlb_one(flush_va); | ||
112 | } else | ||
113 | leave_mm(cpu); | ||
114 | } | ||
115 | ack_APIC_irq(); | ||
116 | smp_mb__before_clear_bit(); | ||
117 | cpu_clear(cpu, flush_cpumask); | ||
118 | smp_mb__after_clear_bit(); | ||
119 | out: | ||
120 | put_cpu_no_resched(); | ||
121 | inc_irq_stat(irq_tlb_count); | ||
122 | } | ||
123 | |||
124 | void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, | ||
125 | unsigned long va) | ||
126 | { | ||
127 | cpumask_t cpumask = *cpumaskp; | ||
128 | |||
129 | /* | ||
130 | * A couple of (to be removed) sanity checks: | ||
131 | * | ||
132 | * - current CPU must not be in mask | ||
133 | * - mask must exist :) | ||
134 | */ | ||
135 | BUG_ON(cpus_empty(cpumask)); | ||
136 | BUG_ON(cpu_isset(smp_processor_id(), cpumask)); | ||
137 | BUG_ON(!mm); | ||
138 | |||
139 | #ifdef CONFIG_HOTPLUG_CPU | ||
140 | /* If a CPU which we ran on has gone down, OK. */ | ||
141 | cpus_and(cpumask, cpumask, cpu_online_map); | ||
142 | if (unlikely(cpus_empty(cpumask))) | ||
143 | return; | ||
144 | #endif | ||
145 | |||
146 | /* | ||
147 | * i'm not happy about this global shared spinlock in the | ||
148 | * MM hot path, but we'll see how contended it is. | ||
149 | * AK: x86-64 has a faster method that could be ported. | ||
150 | */ | ||
151 | spin_lock(&tlbstate_lock); | ||
152 | |||
153 | flush_mm = mm; | ||
154 | flush_va = va; | ||
155 | cpus_or(flush_cpumask, cpumask, flush_cpumask); | ||
156 | |||
157 | /* | ||
158 | * Make the above memory operations globally visible before | ||
159 | * sending the IPI. | ||
160 | */ | ||
161 | smp_mb(); | ||
162 | /* | ||
163 | * We have to send the IPI only to | ||
164 | * CPUs affected. | ||
165 | */ | ||
166 | send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR); | ||
167 | |||
168 | while (!cpus_empty(flush_cpumask)) | ||
169 | /* nothing. lockup detection does not belong here */ | ||
170 | cpu_relax(); | ||
171 | |||
172 | flush_mm = NULL; | ||
173 | flush_va = 0; | ||
174 | spin_unlock(&tlbstate_lock); | ||
175 | } | ||
176 | |||
177 | void flush_tlb_current_task(void) | ||
178 | { | ||
179 | struct mm_struct *mm = current->mm; | ||
180 | cpumask_t cpu_mask; | ||
181 | |||
182 | preempt_disable(); | ||
183 | cpu_mask = mm->cpu_vm_mask; | ||
184 | cpu_clear(smp_processor_id(), cpu_mask); | ||
185 | |||
186 | local_flush_tlb(); | ||
187 | if (!cpus_empty(cpu_mask)) | ||
188 | flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); | ||
189 | preempt_enable(); | ||
190 | } | ||
191 | |||
192 | void flush_tlb_mm(struct mm_struct *mm) | ||
193 | { | ||
194 | cpumask_t cpu_mask; | ||
195 | |||
196 | preempt_disable(); | ||
197 | cpu_mask = mm->cpu_vm_mask; | ||
198 | cpu_clear(smp_processor_id(), cpu_mask); | ||
199 | |||
200 | if (current->active_mm == mm) { | ||
201 | if (current->mm) | ||
202 | local_flush_tlb(); | ||
203 | else | ||
204 | leave_mm(smp_processor_id()); | ||
205 | } | ||
206 | if (!cpus_empty(cpu_mask)) | ||
207 | flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); | ||
208 | |||
209 | preempt_enable(); | ||
210 | } | ||
211 | |||
212 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long va) | ||
213 | { | ||
214 | struct mm_struct *mm = vma->vm_mm; | ||
215 | cpumask_t cpu_mask; | ||
216 | |||
217 | preempt_disable(); | ||
218 | cpu_mask = mm->cpu_vm_mask; | ||
219 | cpu_clear(smp_processor_id(), cpu_mask); | ||
220 | |||
221 | if (current->active_mm == mm) { | ||
222 | if (current->mm) | ||
223 | __flush_tlb_one(va); | ||
224 | else | ||
225 | leave_mm(smp_processor_id()); | ||
226 | } | ||
227 | |||
228 | if (!cpus_empty(cpu_mask)) | ||
229 | flush_tlb_others(cpu_mask, mm, va); | ||
230 | |||
231 | preempt_enable(); | ||
232 | } | ||
233 | EXPORT_SYMBOL(flush_tlb_page); | ||
234 | |||
235 | static void do_flush_tlb_all(void *info) | ||
236 | { | ||
237 | unsigned long cpu = smp_processor_id(); | ||
238 | |||
239 | __flush_tlb_all(); | ||
240 | if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_LAZY) | ||
241 | leave_mm(cpu); | ||
242 | } | ||
243 | |||
244 | void flush_tlb_all(void) | ||
245 | { | ||
246 | on_each_cpu(do_flush_tlb_all, NULL, 1); | ||
247 | } | ||
248 | |||
249 | void reset_lazy_tlbstate(void) | ||
250 | { | ||
251 | int cpu = raw_smp_processor_id(); | ||
252 | |||
253 | per_cpu(cpu_tlbstate, cpu).state = 0; | ||
254 | per_cpu(cpu_tlbstate, cpu).active_mm = &init_mm; | ||
255 | } | ||
256 | |||
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c index 6812b829ed83..d038b9c45cf8 100644 --- a/arch/x86/kernel/tlb_uv.c +++ b/arch/x86/kernel/tlb_uv.c | |||
@@ -11,16 +11,15 @@ | |||
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | 12 | ||
13 | #include <asm/mmu_context.h> | 13 | #include <asm/mmu_context.h> |
14 | #include <asm/uv/uv.h> | ||
14 | #include <asm/uv/uv_mmrs.h> | 15 | #include <asm/uv/uv_mmrs.h> |
15 | #include <asm/uv/uv_hub.h> | 16 | #include <asm/uv/uv_hub.h> |
16 | #include <asm/uv/uv_bau.h> | 17 | #include <asm/uv/uv_bau.h> |
17 | #include <asm/genapic.h> | 18 | #include <asm/apic.h> |
18 | #include <asm/idle.h> | 19 | #include <asm/idle.h> |
19 | #include <asm/tsc.h> | 20 | #include <asm/tsc.h> |
20 | #include <asm/irq_vectors.h> | 21 | #include <asm/irq_vectors.h> |
21 | 22 | ||
22 | #include <mach_apic.h> | ||
23 | |||
24 | static struct bau_control **uv_bau_table_bases __read_mostly; | 23 | static struct bau_control **uv_bau_table_bases __read_mostly; |
25 | static int uv_bau_retry_limit __read_mostly; | 24 | static int uv_bau_retry_limit __read_mostly; |
26 | 25 | ||
@@ -210,14 +209,15 @@ static int uv_wait_completion(struct bau_desc *bau_desc, | |||
210 | * | 209 | * |
211 | * Send a broadcast and wait for a broadcast message to complete. | 210 | * Send a broadcast and wait for a broadcast message to complete. |
212 | * | 211 | * |
213 | * The cpumaskp mask contains the cpus the broadcast was sent to. | 212 | * The flush_mask contains the cpus the broadcast was sent to. |
214 | * | 213 | * |
215 | * Returns 1 if all remote flushing was done. The mask is zeroed. | 214 | * Returns NULL if all remote flushing was done. The mask is zeroed. |
216 | * Returns 0 if some remote flushing remains to be done. The mask is left | 215 | * Returns @flush_mask if some remote flushing remains to be done. The |
217 | * unchanged. | 216 | * mask will have some bits still set. |
218 | */ | 217 | */ |
219 | int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc, | 218 | const struct cpumask *uv_flush_send_and_wait(int cpu, int this_blade, |
220 | cpumask_t *cpumaskp) | 219 | struct bau_desc *bau_desc, |
220 | struct cpumask *flush_mask) | ||
221 | { | 221 | { |
222 | int completion_status = 0; | 222 | int completion_status = 0; |
223 | int right_shift; | 223 | int right_shift; |
@@ -257,66 +257,74 @@ int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc, | |||
257 | * the cpu's, all of which are still in the mask. | 257 | * the cpu's, all of which are still in the mask. |
258 | */ | 258 | */ |
259 | __get_cpu_var(ptcstats).ptc_i++; | 259 | __get_cpu_var(ptcstats).ptc_i++; |
260 | return 0; | 260 | return flush_mask; |
261 | } | 261 | } |
262 | 262 | ||
263 | /* | 263 | /* |
264 | * Success, so clear the remote cpu's from the mask so we don't | 264 | * Success, so clear the remote cpu's from the mask so we don't |
265 | * use the IPI method of shootdown on them. | 265 | * use the IPI method of shootdown on them. |
266 | */ | 266 | */ |
267 | for_each_cpu_mask(bit, *cpumaskp) { | 267 | for_each_cpu(bit, flush_mask) { |
268 | blade = uv_cpu_to_blade_id(bit); | 268 | blade = uv_cpu_to_blade_id(bit); |
269 | if (blade == this_blade) | 269 | if (blade == this_blade) |
270 | continue; | 270 | continue; |
271 | cpu_clear(bit, *cpumaskp); | 271 | cpumask_clear_cpu(bit, flush_mask); |
272 | } | 272 | } |
273 | if (!cpus_empty(*cpumaskp)) | 273 | if (!cpumask_empty(flush_mask)) |
274 | return 0; | 274 | return flush_mask; |
275 | return 1; | 275 | return NULL; |
276 | } | 276 | } |
277 | 277 | ||
278 | /** | 278 | /** |
279 | * uv_flush_tlb_others - globally purge translation cache of a virtual | 279 | * uv_flush_tlb_others - globally purge translation cache of a virtual |
280 | * address or all TLB's | 280 | * address or all TLB's |
281 | * @cpumaskp: mask of all cpu's in which the address is to be removed | 281 | * @cpumask: mask of all cpu's in which the address is to be removed |
282 | * @mm: mm_struct containing virtual address range | 282 | * @mm: mm_struct containing virtual address range |
283 | * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu) | 283 | * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu) |
284 | * @cpu: the current cpu | ||
284 | * | 285 | * |
285 | * This is the entry point for initiating any UV global TLB shootdown. | 286 | * This is the entry point for initiating any UV global TLB shootdown. |
286 | * | 287 | * |
287 | * Purges the translation caches of all specified processors of the given | 288 | * Purges the translation caches of all specified processors of the given |
288 | * virtual address, or purges all TLB's on specified processors. | 289 | * virtual address, or purges all TLB's on specified processors. |
289 | * | 290 | * |
290 | * The caller has derived the cpumaskp from the mm_struct and has subtracted | 291 | * The caller has derived the cpumask from the mm_struct. This function |
291 | * the local cpu from the mask. This function is called only if there | 292 | * is called only if there are bits set in the mask. (e.g. flush_tlb_page()) |
292 | * are bits set in the mask. (e.g. flush_tlb_page()) | ||
293 | * | 293 | * |
294 | * The cpumaskp is converted into a nodemask of the nodes containing | 294 | * The cpumask is converted into a nodemask of the nodes containing |
295 | * the cpus. | 295 | * the cpus. |
296 | * | 296 | * |
297 | * Returns 1 if all remote flushing was done. | 297 | * Note that this function should be called with preemption disabled. |
298 | * Returns 0 if some remote flushing remains to be done. | 298 | * |
299 | * Returns NULL if all remote flushing was done. | ||
300 | * Returns pointer to cpumask if some remote flushing remains to be | ||
301 | * done. The returned pointer is valid till preemption is re-enabled. | ||
299 | */ | 302 | */ |
300 | int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm, | 303 | const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask, |
301 | unsigned long va) | 304 | struct mm_struct *mm, |
305 | unsigned long va, unsigned int cpu) | ||
302 | { | 306 | { |
307 | static DEFINE_PER_CPU(cpumask_t, flush_tlb_mask); | ||
308 | struct cpumask *flush_mask = &__get_cpu_var(flush_tlb_mask); | ||
303 | int i; | 309 | int i; |
304 | int bit; | 310 | int bit; |
305 | int blade; | 311 | int blade; |
306 | int cpu; | 312 | int uv_cpu; |
307 | int this_blade; | 313 | int this_blade; |
308 | int locals = 0; | 314 | int locals = 0; |
309 | struct bau_desc *bau_desc; | 315 | struct bau_desc *bau_desc; |
310 | 316 | ||
311 | cpu = uv_blade_processor_id(); | 317 | cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu)); |
318 | |||
319 | uv_cpu = uv_blade_processor_id(); | ||
312 | this_blade = uv_numa_blade_id(); | 320 | this_blade = uv_numa_blade_id(); |
313 | bau_desc = __get_cpu_var(bau_control).descriptor_base; | 321 | bau_desc = __get_cpu_var(bau_control).descriptor_base; |
314 | bau_desc += UV_ITEMS_PER_DESCRIPTOR * cpu; | 322 | bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu; |
315 | 323 | ||
316 | bau_nodes_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE); | 324 | bau_nodes_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE); |
317 | 325 | ||
318 | i = 0; | 326 | i = 0; |
319 | for_each_cpu_mask(bit, *cpumaskp) { | 327 | for_each_cpu(bit, flush_mask) { |
320 | blade = uv_cpu_to_blade_id(bit); | 328 | blade = uv_cpu_to_blade_id(bit); |
321 | BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1)); | 329 | BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1)); |
322 | if (blade == this_blade) { | 330 | if (blade == this_blade) { |
@@ -331,17 +339,17 @@ int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm, | |||
331 | * no off_node flushing; return status for local node | 339 | * no off_node flushing; return status for local node |
332 | */ | 340 | */ |
333 | if (locals) | 341 | if (locals) |
334 | return 0; | 342 | return flush_mask; |
335 | else | 343 | else |
336 | return 1; | 344 | return NULL; |
337 | } | 345 | } |
338 | __get_cpu_var(ptcstats).requestor++; | 346 | __get_cpu_var(ptcstats).requestor++; |
339 | __get_cpu_var(ptcstats).ntargeted += i; | 347 | __get_cpu_var(ptcstats).ntargeted += i; |
340 | 348 | ||
341 | bau_desc->payload.address = va; | 349 | bau_desc->payload.address = va; |
342 | bau_desc->payload.sending_cpu = smp_processor_id(); | 350 | bau_desc->payload.sending_cpu = cpu; |
343 | 351 | ||
344 | return uv_flush_send_and_wait(cpu, this_blade, bau_desc, cpumaskp); | 352 | return uv_flush_send_and_wait(uv_cpu, this_blade, bau_desc, flush_mask); |
345 | } | 353 | } |
346 | 354 | ||
347 | /* | 355 | /* |
diff --git a/arch/x86/kernel/trampoline_32.S b/arch/x86/kernel/trampoline_32.S index d8ccc3c6552f..66d874e5404c 100644 --- a/arch/x86/kernel/trampoline_32.S +++ b/arch/x86/kernel/trampoline_32.S | |||
@@ -29,7 +29,7 @@ | |||
29 | 29 | ||
30 | #include <linux/linkage.h> | 30 | #include <linux/linkage.h> |
31 | #include <asm/segment.h> | 31 | #include <asm/segment.h> |
32 | #include <asm/page.h> | 32 | #include <asm/page_types.h> |
33 | 33 | ||
34 | /* We can free up trampoline after bootup if cpu hotplug is not supported. */ | 34 | /* We can free up trampoline after bootup if cpu hotplug is not supported. */ |
35 | #ifndef CONFIG_HOTPLUG_CPU | 35 | #ifndef CONFIG_HOTPLUG_CPU |
diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/kernel/trampoline_64.S index 894293c598db..cddfb8d386b9 100644 --- a/arch/x86/kernel/trampoline_64.S +++ b/arch/x86/kernel/trampoline_64.S | |||
@@ -25,10 +25,11 @@ | |||
25 | */ | 25 | */ |
26 | 26 | ||
27 | #include <linux/linkage.h> | 27 | #include <linux/linkage.h> |
28 | #include <asm/pgtable.h> | 28 | #include <asm/pgtable_types.h> |
29 | #include <asm/page.h> | 29 | #include <asm/page_types.h> |
30 | #include <asm/msr.h> | 30 | #include <asm/msr.h> |
31 | #include <asm/segment.h> | 31 | #include <asm/segment.h> |
32 | #include <asm/processor-flags.h> | ||
32 | 33 | ||
33 | .section .rodata, "a", @progbits | 34 | .section .rodata, "a", @progbits |
34 | 35 | ||
@@ -37,7 +38,7 @@ | |||
37 | ENTRY(trampoline_data) | 38 | ENTRY(trampoline_data) |
38 | r_base = . | 39 | r_base = . |
39 | cli # We should be safe anyway | 40 | cli # We should be safe anyway |
40 | wbinvd | 41 | wbinvd |
41 | mov %cs, %ax # Code and data in the same place | 42 | mov %cs, %ax # Code and data in the same place |
42 | mov %ax, %ds | 43 | mov %ax, %ds |
43 | mov %ax, %es | 44 | mov %ax, %es |
@@ -73,9 +74,8 @@ r_base = . | |||
73 | lidtl tidt - r_base # load idt with 0, 0 | 74 | lidtl tidt - r_base # load idt with 0, 0 |
74 | lgdtl tgdt - r_base # load gdt with whatever is appropriate | 75 | lgdtl tgdt - r_base # load gdt with whatever is appropriate |
75 | 76 | ||
76 | xor %ax, %ax | 77 | mov $X86_CR0_PE, %ax # protected mode (PE) bit |
77 | inc %ax # protected mode (PE) bit | 78 | lmsw %ax # into protected mode |
78 | lmsw %ax # into protected mode | ||
79 | 79 | ||
80 | # flush prefetch and jump to startup_32 | 80 | # flush prefetch and jump to startup_32 |
81 | ljmpl *(startup_32_vector - r_base) | 81 | ljmpl *(startup_32_vector - r_base) |
@@ -86,9 +86,8 @@ startup_32: | |||
86 | movl $__KERNEL_DS, %eax # Initialize the %ds segment register | 86 | movl $__KERNEL_DS, %eax # Initialize the %ds segment register |
87 | movl %eax, %ds | 87 | movl %eax, %ds |
88 | 88 | ||
89 | xorl %eax, %eax | 89 | movl $X86_CR4_PAE, %eax |
90 | btsl $5, %eax # Enable PAE mode | 90 | movl %eax, %cr4 # Enable PAE mode |
91 | movl %eax, %cr4 | ||
92 | 91 | ||
93 | # Setup trampoline 4 level pagetables | 92 | # Setup trampoline 4 level pagetables |
94 | leal (trampoline_level4_pgt - r_base)(%esi), %eax | 93 | leal (trampoline_level4_pgt - r_base)(%esi), %eax |
@@ -99,9 +98,9 @@ startup_32: | |||
99 | xorl %edx, %edx | 98 | xorl %edx, %edx |
100 | wrmsr | 99 | wrmsr |
101 | 100 | ||
102 | xorl %eax, %eax | 101 | # Enable paging and in turn activate Long Mode |
103 | btsl $31, %eax # Enable paging and in turn activate Long Mode | 102 | # Enable protected mode |
104 | btsl $0, %eax # Enable protected mode | 103 | movl $(X86_CR0_PG | X86_CR0_PE), %eax |
105 | movl %eax, %cr0 | 104 | movl %eax, %cr0 |
106 | 105 | ||
107 | /* | 106 | /* |
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index a9e7548e1790..a1d288327ff0 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c | |||
@@ -54,15 +54,14 @@ | |||
54 | #include <asm/desc.h> | 54 | #include <asm/desc.h> |
55 | #include <asm/i387.h> | 55 | #include <asm/i387.h> |
56 | 56 | ||
57 | #include <mach_traps.h> | 57 | #include <asm/mach_traps.h> |
58 | 58 | ||
59 | #ifdef CONFIG_X86_64 | 59 | #ifdef CONFIG_X86_64 |
60 | #include <asm/pgalloc.h> | 60 | #include <asm/pgalloc.h> |
61 | #include <asm/proto.h> | 61 | #include <asm/proto.h> |
62 | #include <asm/pda.h> | ||
63 | #else | 62 | #else |
64 | #include <asm/processor-flags.h> | 63 | #include <asm/processor-flags.h> |
65 | #include <asm/arch_hooks.h> | 64 | #include <asm/setup.h> |
66 | #include <asm/traps.h> | 65 | #include <asm/traps.h> |
67 | 66 | ||
68 | #include "cpu/mcheck/mce.h" | 67 | #include "cpu/mcheck/mce.h" |
@@ -119,47 +118,6 @@ die_if_kernel(const char *str, struct pt_regs *regs, long err) | |||
119 | if (!user_mode_vm(regs)) | 118 | if (!user_mode_vm(regs)) |
120 | die(str, regs, err); | 119 | die(str, regs, err); |
121 | } | 120 | } |
122 | |||
123 | /* | ||
124 | * Perform the lazy TSS's I/O bitmap copy. If the TSS has an | ||
125 | * invalid offset set (the LAZY one) and the faulting thread has | ||
126 | * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS, | ||
127 | * we set the offset field correctly and return 1. | ||
128 | */ | ||
129 | static int lazy_iobitmap_copy(void) | ||
130 | { | ||
131 | struct thread_struct *thread; | ||
132 | struct tss_struct *tss; | ||
133 | int cpu; | ||
134 | |||
135 | cpu = get_cpu(); | ||
136 | tss = &per_cpu(init_tss, cpu); | ||
137 | thread = ¤t->thread; | ||
138 | |||
139 | if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY && | ||
140 | thread->io_bitmap_ptr) { | ||
141 | memcpy(tss->io_bitmap, thread->io_bitmap_ptr, | ||
142 | thread->io_bitmap_max); | ||
143 | /* | ||
144 | * If the previously set map was extending to higher ports | ||
145 | * than the current one, pad extra space with 0xff (no access). | ||
146 | */ | ||
147 | if (thread->io_bitmap_max < tss->io_bitmap_max) { | ||
148 | memset((char *) tss->io_bitmap + | ||
149 | thread->io_bitmap_max, 0xff, | ||
150 | tss->io_bitmap_max - thread->io_bitmap_max); | ||
151 | } | ||
152 | tss->io_bitmap_max = thread->io_bitmap_max; | ||
153 | tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET; | ||
154 | tss->io_bitmap_owner = thread; | ||
155 | put_cpu(); | ||
156 | |||
157 | return 1; | ||
158 | } | ||
159 | put_cpu(); | ||
160 | |||
161 | return 0; | ||
162 | } | ||
163 | #endif | 121 | #endif |
164 | 122 | ||
165 | static void __kprobes | 123 | static void __kprobes |
@@ -310,11 +268,6 @@ do_general_protection(struct pt_regs *regs, long error_code) | |||
310 | conditional_sti(regs); | 268 | conditional_sti(regs); |
311 | 269 | ||
312 | #ifdef CONFIG_X86_32 | 270 | #ifdef CONFIG_X86_32 |
313 | if (lazy_iobitmap_copy()) { | ||
314 | /* restart the faulting instruction */ | ||
315 | return; | ||
316 | } | ||
317 | |||
318 | if (regs->flags & X86_VM_MASK) | 271 | if (regs->flags & X86_VM_MASK) |
319 | goto gp_in_vm86; | 272 | goto gp_in_vm86; |
320 | #endif | 273 | #endif |
@@ -914,19 +867,20 @@ void math_emulate(struct math_emu_info *info) | |||
914 | } | 867 | } |
915 | #endif /* CONFIG_MATH_EMULATION */ | 868 | #endif /* CONFIG_MATH_EMULATION */ |
916 | 869 | ||
917 | dotraplinkage void __kprobes do_device_not_available(struct pt_regs regs) | 870 | dotraplinkage void __kprobes |
871 | do_device_not_available(struct pt_regs *regs, long error_code) | ||
918 | { | 872 | { |
919 | #ifdef CONFIG_X86_32 | 873 | #ifdef CONFIG_X86_32 |
920 | if (read_cr0() & X86_CR0_EM) { | 874 | if (read_cr0() & X86_CR0_EM) { |
921 | struct math_emu_info info = { }; | 875 | struct math_emu_info info = { }; |
922 | 876 | ||
923 | conditional_sti(®s); | 877 | conditional_sti(regs); |
924 | 878 | ||
925 | info.regs = ®s; | 879 | info.regs = regs; |
926 | math_emulate(&info); | 880 | math_emulate(&info); |
927 | } else { | 881 | } else { |
928 | math_state_restore(); /* interrupts still off */ | 882 | math_state_restore(); /* interrupts still off */ |
929 | conditional_sti(®s); | 883 | conditional_sti(regs); |
930 | } | 884 | } |
931 | #else | 885 | #else |
932 | math_state_restore(); | 886 | math_state_restore(); |
@@ -942,7 +896,7 @@ dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) | |||
942 | info.si_signo = SIGILL; | 896 | info.si_signo = SIGILL; |
943 | info.si_errno = 0; | 897 | info.si_errno = 0; |
944 | info.si_code = ILL_BADSTK; | 898 | info.si_code = ILL_BADSTK; |
945 | info.si_addr = 0; | 899 | info.si_addr = NULL; |
946 | if (notify_die(DIE_TRAP, "iret exception", | 900 | if (notify_die(DIE_TRAP, "iret exception", |
947 | regs, error_code, 32, SIGILL) == NOTIFY_STOP) | 901 | regs, error_code, 32, SIGILL) == NOTIFY_STOP) |
948 | return; | 902 | return; |
@@ -1026,6 +980,6 @@ void __init trap_init(void) | |||
1026 | cpu_init(); | 980 | cpu_init(); |
1027 | 981 | ||
1028 | #ifdef CONFIG_X86_32 | 982 | #ifdef CONFIG_X86_32 |
1029 | trap_init_hook(); | 983 | x86_quirk_trap_init(); |
1030 | #endif | 984 | #endif |
1031 | } | 985 | } |
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 08afa1579e6d..7a567ebe6361 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c | |||
@@ -791,7 +791,7 @@ __cpuinit int unsynchronized_tsc(void) | |||
791 | if (!cpu_has_tsc || tsc_unstable) | 791 | if (!cpu_has_tsc || tsc_unstable) |
792 | return 1; | 792 | return 1; |
793 | 793 | ||
794 | #ifdef CONFIG_X86_SMP | 794 | #ifdef CONFIG_SMP |
795 | if (apic_is_clustered_box()) | 795 | if (apic_is_clustered_box()) |
796 | return 1; | 796 | return 1; |
797 | #endif | 797 | #endif |
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c index d801d06af068..191a876e9e87 100644 --- a/arch/x86/kernel/visws_quirks.c +++ b/arch/x86/kernel/visws_quirks.c | |||
@@ -24,18 +24,14 @@ | |||
24 | 24 | ||
25 | #include <asm/visws/cobalt.h> | 25 | #include <asm/visws/cobalt.h> |
26 | #include <asm/visws/piix4.h> | 26 | #include <asm/visws/piix4.h> |
27 | #include <asm/arch_hooks.h> | ||
28 | #include <asm/io_apic.h> | 27 | #include <asm/io_apic.h> |
29 | #include <asm/fixmap.h> | 28 | #include <asm/fixmap.h> |
30 | #include <asm/reboot.h> | 29 | #include <asm/reboot.h> |
31 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
31 | #include <asm/apic.h> | ||
32 | #include <asm/e820.h> | 32 | #include <asm/e820.h> |
33 | #include <asm/io.h> | 33 | #include <asm/io.h> |
34 | 34 | ||
35 | #include <mach_ipi.h> | ||
36 | |||
37 | #include "mach_apic.h" | ||
38 | |||
39 | #include <linux/kernel_stat.h> | 35 | #include <linux/kernel_stat.h> |
40 | 36 | ||
41 | #include <asm/i8259.h> | 37 | #include <asm/i8259.h> |
@@ -49,8 +45,6 @@ | |||
49 | 45 | ||
50 | extern int no_broadcast; | 46 | extern int no_broadcast; |
51 | 47 | ||
52 | #include <asm/apic.h> | ||
53 | |||
54 | char visws_board_type = -1; | 48 | char visws_board_type = -1; |
55 | char visws_board_rev = -1; | 49 | char visws_board_rev = -1; |
56 | 50 | ||
@@ -200,7 +194,7 @@ static void __init MP_processor_info(struct mpc_cpu *m) | |||
200 | return; | 194 | return; |
201 | } | 195 | } |
202 | 196 | ||
203 | apic_cpus = apicid_to_cpu_present(m->apicid); | 197 | apic_cpus = apic->apicid_to_cpu_present(m->apicid); |
204 | physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus); | 198 | physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus); |
205 | /* | 199 | /* |
206 | * Validate version | 200 | * Validate version |
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c index 4eeb5cf9720d..d7ac84e7fc1c 100644 --- a/arch/x86/kernel/vm86_32.c +++ b/arch/x86/kernel/vm86_32.c | |||
@@ -158,7 +158,7 @@ struct pt_regs *save_v86_state(struct kernel_vm86_regs *regs) | |||
158 | ret = KVM86->regs32; | 158 | ret = KVM86->regs32; |
159 | 159 | ||
160 | ret->fs = current->thread.saved_fs; | 160 | ret->fs = current->thread.saved_fs; |
161 | loadsegment(gs, current->thread.saved_gs); | 161 | set_user_gs(ret, current->thread.saved_gs); |
162 | 162 | ||
163 | return ret; | 163 | return ret; |
164 | } | 164 | } |
@@ -197,9 +197,9 @@ out: | |||
197 | static int do_vm86_irq_handling(int subfunction, int irqnumber); | 197 | static int do_vm86_irq_handling(int subfunction, int irqnumber); |
198 | static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk); | 198 | static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk); |
199 | 199 | ||
200 | asmlinkage int sys_vm86old(struct pt_regs regs) | 200 | int sys_vm86old(struct pt_regs *regs) |
201 | { | 201 | { |
202 | struct vm86_struct __user *v86 = (struct vm86_struct __user *)regs.bx; | 202 | struct vm86_struct __user *v86 = (struct vm86_struct __user *)regs->bx; |
203 | struct kernel_vm86_struct info; /* declare this _on top_, | 203 | struct kernel_vm86_struct info; /* declare this _on top_, |
204 | * this avoids wasting of stack space. | 204 | * this avoids wasting of stack space. |
205 | * This remains on the stack until we | 205 | * This remains on the stack until we |
@@ -218,7 +218,7 @@ asmlinkage int sys_vm86old(struct pt_regs regs) | |||
218 | if (tmp) | 218 | if (tmp) |
219 | goto out; | 219 | goto out; |
220 | memset(&info.vm86plus, 0, (int)&info.regs32 - (int)&info.vm86plus); | 220 | memset(&info.vm86plus, 0, (int)&info.regs32 - (int)&info.vm86plus); |
221 | info.regs32 = ®s; | 221 | info.regs32 = regs; |
222 | tsk->thread.vm86_info = v86; | 222 | tsk->thread.vm86_info = v86; |
223 | do_sys_vm86(&info, tsk); | 223 | do_sys_vm86(&info, tsk); |
224 | ret = 0; /* we never return here */ | 224 | ret = 0; /* we never return here */ |
@@ -227,7 +227,7 @@ out: | |||
227 | } | 227 | } |
228 | 228 | ||
229 | 229 | ||
230 | asmlinkage int sys_vm86(struct pt_regs regs) | 230 | int sys_vm86(struct pt_regs *regs) |
231 | { | 231 | { |
232 | struct kernel_vm86_struct info; /* declare this _on top_, | 232 | struct kernel_vm86_struct info; /* declare this _on top_, |
233 | * this avoids wasting of stack space. | 233 | * this avoids wasting of stack space. |
@@ -239,12 +239,12 @@ asmlinkage int sys_vm86(struct pt_regs regs) | |||
239 | struct vm86plus_struct __user *v86; | 239 | struct vm86plus_struct __user *v86; |
240 | 240 | ||
241 | tsk = current; | 241 | tsk = current; |
242 | switch (regs.bx) { | 242 | switch (regs->bx) { |
243 | case VM86_REQUEST_IRQ: | 243 | case VM86_REQUEST_IRQ: |
244 | case VM86_FREE_IRQ: | 244 | case VM86_FREE_IRQ: |
245 | case VM86_GET_IRQ_BITS: | 245 | case VM86_GET_IRQ_BITS: |
246 | case VM86_GET_AND_RESET_IRQ: | 246 | case VM86_GET_AND_RESET_IRQ: |
247 | ret = do_vm86_irq_handling(regs.bx, (int)regs.cx); | 247 | ret = do_vm86_irq_handling(regs->bx, (int)regs->cx); |
248 | goto out; | 248 | goto out; |
249 | case VM86_PLUS_INSTALL_CHECK: | 249 | case VM86_PLUS_INSTALL_CHECK: |
250 | /* | 250 | /* |
@@ -261,14 +261,14 @@ asmlinkage int sys_vm86(struct pt_regs regs) | |||
261 | ret = -EPERM; | 261 | ret = -EPERM; |
262 | if (tsk->thread.saved_sp0) | 262 | if (tsk->thread.saved_sp0) |
263 | goto out; | 263 | goto out; |
264 | v86 = (struct vm86plus_struct __user *)regs.cx; | 264 | v86 = (struct vm86plus_struct __user *)regs->cx; |
265 | tmp = copy_vm86_regs_from_user(&info.regs, &v86->regs, | 265 | tmp = copy_vm86_regs_from_user(&info.regs, &v86->regs, |
266 | offsetof(struct kernel_vm86_struct, regs32) - | 266 | offsetof(struct kernel_vm86_struct, regs32) - |
267 | sizeof(info.regs)); | 267 | sizeof(info.regs)); |
268 | ret = -EFAULT; | 268 | ret = -EFAULT; |
269 | if (tmp) | 269 | if (tmp) |
270 | goto out; | 270 | goto out; |
271 | info.regs32 = ®s; | 271 | info.regs32 = regs; |
272 | info.vm86plus.is_vm86pus = 1; | 272 | info.vm86plus.is_vm86pus = 1; |
273 | tsk->thread.vm86_info = (struct vm86_struct __user *)v86; | 273 | tsk->thread.vm86_info = (struct vm86_struct __user *)v86; |
274 | do_sys_vm86(&info, tsk); | 274 | do_sys_vm86(&info, tsk); |
@@ -323,7 +323,7 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk | |||
323 | info->regs32->ax = 0; | 323 | info->regs32->ax = 0; |
324 | tsk->thread.saved_sp0 = tsk->thread.sp0; | 324 | tsk->thread.saved_sp0 = tsk->thread.sp0; |
325 | tsk->thread.saved_fs = info->regs32->fs; | 325 | tsk->thread.saved_fs = info->regs32->fs; |
326 | savesegment(gs, tsk->thread.saved_gs); | 326 | tsk->thread.saved_gs = get_user_gs(info->regs32); |
327 | 327 | ||
328 | tss = &per_cpu(init_tss, get_cpu()); | 328 | tss = &per_cpu(init_tss, get_cpu()); |
329 | tsk->thread.sp0 = (unsigned long) &info->VM86_TSS_ESP0; | 329 | tsk->thread.sp0 = (unsigned long) &info->VM86_TSS_ESP0; |
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c index bef58b4982db..2cc4a90e2cb3 100644 --- a/arch/x86/kernel/vmi_32.c +++ b/arch/x86/kernel/vmi_32.c | |||
@@ -680,10 +680,11 @@ static inline int __init activate_vmi(void) | |||
680 | para_fill(pv_mmu_ops.write_cr2, SetCR2); | 680 | para_fill(pv_mmu_ops.write_cr2, SetCR2); |
681 | para_fill(pv_mmu_ops.write_cr3, SetCR3); | 681 | para_fill(pv_mmu_ops.write_cr3, SetCR3); |
682 | para_fill(pv_cpu_ops.write_cr4, SetCR4); | 682 | para_fill(pv_cpu_ops.write_cr4, SetCR4); |
683 | para_fill(pv_irq_ops.save_fl, GetInterruptMask); | 683 | |
684 | para_fill(pv_irq_ops.restore_fl, SetInterruptMask); | 684 | para_fill(pv_irq_ops.save_fl.func, GetInterruptMask); |
685 | para_fill(pv_irq_ops.irq_disable, DisableInterrupts); | 685 | para_fill(pv_irq_ops.restore_fl.func, SetInterruptMask); |
686 | para_fill(pv_irq_ops.irq_enable, EnableInterrupts); | 686 | para_fill(pv_irq_ops.irq_disable.func, DisableInterrupts); |
687 | para_fill(pv_irq_ops.irq_enable.func, EnableInterrupts); | ||
687 | 688 | ||
688 | para_fill(pv_cpu_ops.wbinvd, WBINVD); | 689 | para_fill(pv_cpu_ops.wbinvd, WBINVD); |
689 | para_fill(pv_cpu_ops.read_tsc, RDTSC); | 690 | para_fill(pv_cpu_ops.read_tsc, RDTSC); |
@@ -797,8 +798,8 @@ static inline int __init activate_vmi(void) | |||
797 | #endif | 798 | #endif |
798 | 799 | ||
799 | #ifdef CONFIG_X86_LOCAL_APIC | 800 | #ifdef CONFIG_X86_LOCAL_APIC |
800 | para_fill(apic_ops->read, APICRead); | 801 | para_fill(apic->read, APICRead); |
801 | para_fill(apic_ops->write, APICWrite); | 802 | para_fill(apic->write, APICWrite); |
802 | #endif | 803 | #endif |
803 | 804 | ||
804 | /* | 805 | /* |
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c index e5b088fffa40..33a788d5879c 100644 --- a/arch/x86/kernel/vmiclock_32.c +++ b/arch/x86/kernel/vmiclock_32.c | |||
@@ -28,7 +28,6 @@ | |||
28 | 28 | ||
29 | #include <asm/vmi.h> | 29 | #include <asm/vmi.h> |
30 | #include <asm/vmi_time.h> | 30 | #include <asm/vmi_time.h> |
31 | #include <asm/arch_hooks.h> | ||
32 | #include <asm/apicdef.h> | 31 | #include <asm/apicdef.h> |
33 | #include <asm/apic.h> | 32 | #include <asm/apic.h> |
34 | #include <asm/timer.h> | 33 | #include <asm/timer.h> |
@@ -256,7 +255,7 @@ void __devinit vmi_time_bsp_init(void) | |||
256 | */ | 255 | */ |
257 | clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL); | 256 | clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL); |
258 | local_irq_disable(); | 257 | local_irq_disable(); |
259 | #ifdef CONFIG_X86_SMP | 258 | #ifdef CONFIG_SMP |
260 | /* | 259 | /* |
261 | * XXX handle_percpu_irq only defined for SMP; we need to switch over | 260 | * XXX handle_percpu_irq only defined for SMP; we need to switch over |
262 | * to using it, since this is a local interrupt, which each CPU must | 261 | * to using it, since this is a local interrupt, which each CPU must |
@@ -288,8 +287,7 @@ static struct clocksource clocksource_vmi; | |||
288 | static cycle_t read_real_cycles(void) | 287 | static cycle_t read_real_cycles(void) |
289 | { | 288 | { |
290 | cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL); | 289 | cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL); |
291 | return ret >= clocksource_vmi.cycle_last ? | 290 | return max(ret, clocksource_vmi.cycle_last); |
292 | ret : clocksource_vmi.cycle_last; | ||
293 | } | 291 | } |
294 | 292 | ||
295 | static struct clocksource clocksource_vmi = { | 293 | static struct clocksource clocksource_vmi = { |
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S index 82c67559dde7..0d860963f268 100644 --- a/arch/x86/kernel/vmlinux_32.lds.S +++ b/arch/x86/kernel/vmlinux_32.lds.S | |||
@@ -12,7 +12,7 @@ | |||
12 | 12 | ||
13 | #include <asm-generic/vmlinux.lds.h> | 13 | #include <asm-generic/vmlinux.lds.h> |
14 | #include <asm/thread_info.h> | 14 | #include <asm/thread_info.h> |
15 | #include <asm/page.h> | 15 | #include <asm/page_types.h> |
16 | #include <asm/cache.h> | 16 | #include <asm/cache.h> |
17 | #include <asm/boot.h> | 17 | #include <asm/boot.h> |
18 | 18 | ||
@@ -178,14 +178,7 @@ SECTIONS | |||
178 | __initramfs_end = .; | 178 | __initramfs_end = .; |
179 | } | 179 | } |
180 | #endif | 180 | #endif |
181 | . = ALIGN(PAGE_SIZE); | 181 | PERCPU(PAGE_SIZE) |
182 | .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { | ||
183 | __per_cpu_start = .; | ||
184 | *(.data.percpu.page_aligned) | ||
185 | *(.data.percpu) | ||
186 | *(.data.percpu.shared_aligned) | ||
187 | __per_cpu_end = .; | ||
188 | } | ||
189 | . = ALIGN(PAGE_SIZE); | 182 | . = ALIGN(PAGE_SIZE); |
190 | /* freed after init ends here */ | 183 | /* freed after init ends here */ |
191 | 184 | ||
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S index 1a614c0e6bef..fbfced6f6800 100644 --- a/arch/x86/kernel/vmlinux_64.lds.S +++ b/arch/x86/kernel/vmlinux_64.lds.S | |||
@@ -5,7 +5,8 @@ | |||
5 | #define LOAD_OFFSET __START_KERNEL_map | 5 | #define LOAD_OFFSET __START_KERNEL_map |
6 | 6 | ||
7 | #include <asm-generic/vmlinux.lds.h> | 7 | #include <asm-generic/vmlinux.lds.h> |
8 | #include <asm/page.h> | 8 | #include <asm/asm-offsets.h> |
9 | #include <asm/page_types.h> | ||
9 | 10 | ||
10 | #undef i386 /* in case the preprocessor is a 32bit one */ | 11 | #undef i386 /* in case the preprocessor is a 32bit one */ |
11 | 12 | ||
@@ -13,12 +14,15 @@ OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64") | |||
13 | OUTPUT_ARCH(i386:x86-64) | 14 | OUTPUT_ARCH(i386:x86-64) |
14 | ENTRY(phys_startup_64) | 15 | ENTRY(phys_startup_64) |
15 | jiffies_64 = jiffies; | 16 | jiffies_64 = jiffies; |
16 | _proxy_pda = 1; | ||
17 | PHDRS { | 17 | PHDRS { |
18 | text PT_LOAD FLAGS(5); /* R_E */ | 18 | text PT_LOAD FLAGS(5); /* R_E */ |
19 | data PT_LOAD FLAGS(7); /* RWE */ | 19 | data PT_LOAD FLAGS(7); /* RWE */ |
20 | user PT_LOAD FLAGS(7); /* RWE */ | 20 | user PT_LOAD FLAGS(7); /* RWE */ |
21 | data.init PT_LOAD FLAGS(7); /* RWE */ | 21 | data.init PT_LOAD FLAGS(7); /* RWE */ |
22 | #ifdef CONFIG_SMP | ||
23 | percpu PT_LOAD FLAGS(7); /* RWE */ | ||
24 | #endif | ||
25 | data.init2 PT_LOAD FLAGS(7); /* RWE */ | ||
22 | note PT_NOTE FLAGS(0); /* ___ */ | 26 | note PT_NOTE FLAGS(0); /* ___ */ |
23 | } | 27 | } |
24 | SECTIONS | 28 | SECTIONS |
@@ -208,14 +212,28 @@ SECTIONS | |||
208 | __initramfs_end = .; | 212 | __initramfs_end = .; |
209 | #endif | 213 | #endif |
210 | 214 | ||
215 | #ifdef CONFIG_SMP | ||
216 | /* | ||
217 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the | ||
218 | * output PHDR, so the next output section - __data_nosave - should | ||
219 | * start another section data.init2. Also, pda should be at the head of | ||
220 | * percpu area. Preallocate it and define the percpu offset symbol | ||
221 | * so that it can be accessed as a percpu variable. | ||
222 | */ | ||
223 | . = ALIGN(PAGE_SIZE); | ||
224 | PERCPU_VADDR(0, :percpu) | ||
225 | #else | ||
211 | PERCPU(PAGE_SIZE) | 226 | PERCPU(PAGE_SIZE) |
227 | #endif | ||
212 | 228 | ||
213 | . = ALIGN(PAGE_SIZE); | 229 | . = ALIGN(PAGE_SIZE); |
214 | __init_end = .; | 230 | __init_end = .; |
215 | 231 | ||
216 | . = ALIGN(PAGE_SIZE); | 232 | . = ALIGN(PAGE_SIZE); |
217 | __nosave_begin = .; | 233 | __nosave_begin = .; |
218 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { *(.data.nosave) } | 234 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { |
235 | *(.data.nosave) | ||
236 | } :data.init2 /* use another section data.init2, see PERCPU_VADDR() above */ | ||
219 | . = ALIGN(PAGE_SIZE); | 237 | . = ALIGN(PAGE_SIZE); |
220 | __nosave_end = .; | 238 | __nosave_end = .; |
221 | 239 | ||
@@ -239,8 +257,21 @@ SECTIONS | |||
239 | DWARF_DEBUG | 257 | DWARF_DEBUG |
240 | } | 258 | } |
241 | 259 | ||
260 | /* | ||
261 | * Per-cpu symbols which need to be offset from __per_cpu_load | ||
262 | * for the boot processor. | ||
263 | */ | ||
264 | #define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load | ||
265 | INIT_PER_CPU(gdt_page); | ||
266 | INIT_PER_CPU(irq_stack_union); | ||
267 | |||
242 | /* | 268 | /* |
243 | * Build-time check on the image size: | 269 | * Build-time check on the image size: |
244 | */ | 270 | */ |
245 | ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), | 271 | ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), |
246 | "kernel image bigger than KERNEL_IMAGE_SIZE") | 272 | "kernel image bigger than KERNEL_IMAGE_SIZE") |
273 | |||
274 | #ifdef CONFIG_SMP | ||
275 | ASSERT((per_cpu__irq_stack_union == 0), | ||
276 | "irq_stack_union is not at start of per-cpu area"); | ||
277 | #endif | ||
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c index a688f3bfaec2..74de562812cc 100644 --- a/arch/x86/kernel/vsmp_64.c +++ b/arch/x86/kernel/vsmp_64.c | |||
@@ -22,7 +22,7 @@ | |||
22 | #include <asm/paravirt.h> | 22 | #include <asm/paravirt.h> |
23 | #include <asm/setup.h> | 23 | #include <asm/setup.h> |
24 | 24 | ||
25 | #if defined CONFIG_PCI && defined CONFIG_PARAVIRT | 25 | #ifdef CONFIG_PARAVIRT |
26 | /* | 26 | /* |
27 | * Interrupt control on vSMPowered systems: | 27 | * Interrupt control on vSMPowered systems: |
28 | * ~AC is a shadow of IF. If IF is 'on' AC should be 'off' | 28 | * ~AC is a shadow of IF. If IF is 'on' AC should be 'off' |
@@ -37,6 +37,7 @@ static unsigned long vsmp_save_fl(void) | |||
37 | flags &= ~X86_EFLAGS_IF; | 37 | flags &= ~X86_EFLAGS_IF; |
38 | return flags; | 38 | return flags; |
39 | } | 39 | } |
40 | PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl); | ||
40 | 41 | ||
41 | static void vsmp_restore_fl(unsigned long flags) | 42 | static void vsmp_restore_fl(unsigned long flags) |
42 | { | 43 | { |
@@ -46,6 +47,7 @@ static void vsmp_restore_fl(unsigned long flags) | |||
46 | flags |= X86_EFLAGS_AC; | 47 | flags |= X86_EFLAGS_AC; |
47 | native_restore_fl(flags); | 48 | native_restore_fl(flags); |
48 | } | 49 | } |
50 | PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl); | ||
49 | 51 | ||
50 | static void vsmp_irq_disable(void) | 52 | static void vsmp_irq_disable(void) |
51 | { | 53 | { |
@@ -53,6 +55,7 @@ static void vsmp_irq_disable(void) | |||
53 | 55 | ||
54 | native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC); | 56 | native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC); |
55 | } | 57 | } |
58 | PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable); | ||
56 | 59 | ||
57 | static void vsmp_irq_enable(void) | 60 | static void vsmp_irq_enable(void) |
58 | { | 61 | { |
@@ -60,6 +63,7 @@ static void vsmp_irq_enable(void) | |||
60 | 63 | ||
61 | native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC)); | 64 | native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC)); |
62 | } | 65 | } |
66 | PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable); | ||
63 | 67 | ||
64 | static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf, | 68 | static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf, |
65 | unsigned long addr, unsigned len) | 69 | unsigned long addr, unsigned len) |
@@ -90,10 +94,10 @@ static void __init set_vsmp_pv_ops(void) | |||
90 | cap, ctl); | 94 | cap, ctl); |
91 | if (cap & ctl & (1 << 4)) { | 95 | if (cap & ctl & (1 << 4)) { |
92 | /* Setup irq ops and turn on vSMP IRQ fastpath handling */ | 96 | /* Setup irq ops and turn on vSMP IRQ fastpath handling */ |
93 | pv_irq_ops.irq_disable = vsmp_irq_disable; | 97 | pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable); |
94 | pv_irq_ops.irq_enable = vsmp_irq_enable; | 98 | pv_irq_ops.irq_enable = PV_CALLEE_SAVE(vsmp_irq_enable); |
95 | pv_irq_ops.save_fl = vsmp_save_fl; | 99 | pv_irq_ops.save_fl = PV_CALLEE_SAVE(vsmp_save_fl); |
96 | pv_irq_ops.restore_fl = vsmp_restore_fl; | 100 | pv_irq_ops.restore_fl = PV_CALLEE_SAVE(vsmp_restore_fl); |
97 | pv_init_ops.patch = vsmp_patch; | 101 | pv_init_ops.patch = vsmp_patch; |
98 | 102 | ||
99 | ctl &= ~(1 << 4); | 103 | ctl &= ~(1 << 4); |
@@ -110,7 +114,6 @@ static void __init set_vsmp_pv_ops(void) | |||
110 | } | 114 | } |
111 | #endif | 115 | #endif |
112 | 116 | ||
113 | #ifdef CONFIG_PCI | ||
114 | static int is_vsmp = -1; | 117 | static int is_vsmp = -1; |
115 | 118 | ||
116 | static void __init detect_vsmp_box(void) | 119 | static void __init detect_vsmp_box(void) |
@@ -135,15 +138,6 @@ int is_vsmp_box(void) | |||
135 | return 0; | 138 | return 0; |
136 | } | 139 | } |
137 | } | 140 | } |
138 | #else | ||
139 | static void __init detect_vsmp_box(void) | ||
140 | { | ||
141 | } | ||
142 | int is_vsmp_box(void) | ||
143 | { | ||
144 | return 0; | ||
145 | } | ||
146 | #endif | ||
147 | 141 | ||
148 | void __init vsmp_init(void) | 142 | void __init vsmp_init(void) |
149 | { | 143 | { |
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c index 695e426aa354..3909e3ba5ce3 100644 --- a/arch/x86/kernel/x8664_ksyms_64.c +++ b/arch/x86/kernel/x8664_ksyms_64.c | |||
@@ -58,5 +58,3 @@ EXPORT_SYMBOL(__memcpy); | |||
58 | EXPORT_SYMBOL(empty_zero_page); | 58 | EXPORT_SYMBOL(empty_zero_page); |
59 | EXPORT_SYMBOL(init_level4_pgt); | 59 | EXPORT_SYMBOL(init_level4_pgt); |
60 | EXPORT_SYMBOL(load_gs_index); | 60 | EXPORT_SYMBOL(load_gs_index); |
61 | |||
62 | EXPORT_SYMBOL(_proxy_pda); | ||
diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig index c70e12b1a637..8dab8f7844d3 100644 --- a/arch/x86/lguest/Kconfig +++ b/arch/x86/lguest/Kconfig | |||
@@ -3,7 +3,6 @@ config LGUEST_GUEST | |||
3 | select PARAVIRT | 3 | select PARAVIRT |
4 | depends on X86_32 | 4 | depends on X86_32 |
5 | depends on !X86_PAE | 5 | depends on !X86_PAE |
6 | depends on !X86_VOYAGER | ||
7 | select VIRTIO | 6 | select VIRTIO |
8 | select VIRTIO_RING | 7 | select VIRTIO_RING |
9 | select VIRTIO_CONSOLE | 8 | select VIRTIO_CONSOLE |
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 960a8d9c049c..9fe4ddaa8f6f 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
@@ -173,24 +173,29 @@ static unsigned long save_fl(void) | |||
173 | { | 173 | { |
174 | return lguest_data.irq_enabled; | 174 | return lguest_data.irq_enabled; |
175 | } | 175 | } |
176 | PV_CALLEE_SAVE_REGS_THUNK(save_fl); | ||
176 | 177 | ||
177 | /* restore_flags() just sets the flags back to the value given. */ | 178 | /* restore_flags() just sets the flags back to the value given. */ |
178 | static void restore_fl(unsigned long flags) | 179 | static void restore_fl(unsigned long flags) |
179 | { | 180 | { |
180 | lguest_data.irq_enabled = flags; | 181 | lguest_data.irq_enabled = flags; |
181 | } | 182 | } |
183 | PV_CALLEE_SAVE_REGS_THUNK(restore_fl); | ||
182 | 184 | ||
183 | /* Interrupts go off... */ | 185 | /* Interrupts go off... */ |
184 | static void irq_disable(void) | 186 | static void irq_disable(void) |
185 | { | 187 | { |
186 | lguest_data.irq_enabled = 0; | 188 | lguest_data.irq_enabled = 0; |
187 | } | 189 | } |
190 | PV_CALLEE_SAVE_REGS_THUNK(irq_disable); | ||
188 | 191 | ||
189 | /* Interrupts go on... */ | 192 | /* Interrupts go on... */ |
190 | static void irq_enable(void) | 193 | static void irq_enable(void) |
191 | { | 194 | { |
192 | lguest_data.irq_enabled = X86_EFLAGS_IF; | 195 | lguest_data.irq_enabled = X86_EFLAGS_IF; |
193 | } | 196 | } |
197 | PV_CALLEE_SAVE_REGS_THUNK(irq_enable); | ||
198 | |||
194 | /*:*/ | 199 | /*:*/ |
195 | /*M:003 Note that we don't check for outstanding interrupts when we re-enable | 200 | /*M:003 Note that we don't check for outstanding interrupts when we re-enable |
196 | * them (or when we unmask an interrupt). This seems to work for the moment, | 201 | * them (or when we unmask an interrupt). This seems to work for the moment, |
@@ -278,7 +283,7 @@ static void lguest_load_tls(struct thread_struct *t, unsigned int cpu) | |||
278 | /* There's one problem which normal hardware doesn't have: the Host | 283 | /* There's one problem which normal hardware doesn't have: the Host |
279 | * can't handle us removing entries we're currently using. So we clear | 284 | * can't handle us removing entries we're currently using. So we clear |
280 | * the GS register here: if it's needed it'll be reloaded anyway. */ | 285 | * the GS register here: if it's needed it'll be reloaded anyway. */ |
281 | loadsegment(gs, 0); | 286 | lazy_load_gs(0); |
282 | lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0); | 287 | lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0); |
283 | } | 288 | } |
284 | 289 | ||
@@ -830,13 +835,14 @@ static u32 lguest_apic_safe_wait_icr_idle(void) | |||
830 | return 0; | 835 | return 0; |
831 | } | 836 | } |
832 | 837 | ||
833 | static struct apic_ops lguest_basic_apic_ops = { | 838 | static void set_lguest_basic_apic_ops(void) |
834 | .read = lguest_apic_read, | 839 | { |
835 | .write = lguest_apic_write, | 840 | apic->read = lguest_apic_read; |
836 | .icr_read = lguest_apic_icr_read, | 841 | apic->write = lguest_apic_write; |
837 | .icr_write = lguest_apic_icr_write, | 842 | apic->icr_read = lguest_apic_icr_read; |
838 | .wait_icr_idle = lguest_apic_wait_icr_idle, | 843 | apic->icr_write = lguest_apic_icr_write; |
839 | .safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle, | 844 | apic->wait_icr_idle = lguest_apic_wait_icr_idle; |
845 | apic->safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle; | ||
840 | }; | 846 | }; |
841 | #endif | 847 | #endif |
842 | 848 | ||
@@ -991,10 +997,10 @@ __init void lguest_init(void) | |||
991 | 997 | ||
992 | /* interrupt-related operations */ | 998 | /* interrupt-related operations */ |
993 | pv_irq_ops.init_IRQ = lguest_init_IRQ; | 999 | pv_irq_ops.init_IRQ = lguest_init_IRQ; |
994 | pv_irq_ops.save_fl = save_fl; | 1000 | pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl); |
995 | pv_irq_ops.restore_fl = restore_fl; | 1001 | pv_irq_ops.restore_fl = PV_CALLEE_SAVE(restore_fl); |
996 | pv_irq_ops.irq_disable = irq_disable; | 1002 | pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable); |
997 | pv_irq_ops.irq_enable = irq_enable; | 1003 | pv_irq_ops.irq_enable = PV_CALLEE_SAVE(irq_enable); |
998 | pv_irq_ops.safe_halt = lguest_safe_halt; | 1004 | pv_irq_ops.safe_halt = lguest_safe_halt; |
999 | 1005 | ||
1000 | /* init-time operations */ | 1006 | /* init-time operations */ |
@@ -1037,7 +1043,7 @@ __init void lguest_init(void) | |||
1037 | 1043 | ||
1038 | #ifdef CONFIG_X86_LOCAL_APIC | 1044 | #ifdef CONFIG_X86_LOCAL_APIC |
1039 | /* apic read/write intercepts */ | 1045 | /* apic read/write intercepts */ |
1040 | apic_ops = &lguest_basic_apic_ops; | 1046 | set_lguest_basic_apic_ops(); |
1041 | #endif | 1047 | #endif |
1042 | 1048 | ||
1043 | /* time operations */ | 1049 | /* time operations */ |
diff --git a/arch/x86/lib/getuser.S b/arch/x86/lib/getuser.S index ad374003742f..51f1504cddd9 100644 --- a/arch/x86/lib/getuser.S +++ b/arch/x86/lib/getuser.S | |||
@@ -28,7 +28,7 @@ | |||
28 | 28 | ||
29 | #include <linux/linkage.h> | 29 | #include <linux/linkage.h> |
30 | #include <asm/dwarf2.h> | 30 | #include <asm/dwarf2.h> |
31 | #include <asm/page.h> | 31 | #include <asm/page_types.h> |
32 | #include <asm/errno.h> | 32 | #include <asm/errno.h> |
33 | #include <asm/asm-offsets.h> | 33 | #include <asm/asm-offsets.h> |
34 | #include <asm/thread_info.h> | 34 | #include <asm/thread_info.h> |
diff --git a/arch/x86/mach-default/Makefile b/arch/x86/mach-default/Makefile deleted file mode 100644 index 012fe34459e6..000000000000 --- a/arch/x86/mach-default/Makefile +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | |||
5 | obj-y := setup.o | ||
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c deleted file mode 100644 index 50b591871128..000000000000 --- a/arch/x86/mach-default/setup.c +++ /dev/null | |||
@@ -1,174 +0,0 @@ | |||
1 | /* | ||
2 | * Machine specific setup for generic | ||
3 | */ | ||
4 | |||
5 | #include <linux/smp.h> | ||
6 | #include <linux/init.h> | ||
7 | #include <linux/interrupt.h> | ||
8 | #include <asm/acpi.h> | ||
9 | #include <asm/arch_hooks.h> | ||
10 | #include <asm/e820.h> | ||
11 | #include <asm/setup.h> | ||
12 | |||
13 | #include <mach_ipi.h> | ||
14 | |||
15 | #ifdef CONFIG_HOTPLUG_CPU | ||
16 | #define DEFAULT_SEND_IPI (1) | ||
17 | #else | ||
18 | #define DEFAULT_SEND_IPI (0) | ||
19 | #endif | ||
20 | |||
21 | int no_broadcast = DEFAULT_SEND_IPI; | ||
22 | |||
23 | /** | ||
24 | * pre_intr_init_hook - initialisation prior to setting up interrupt vectors | ||
25 | * | ||
26 | * Description: | ||
27 | * Perform any necessary interrupt initialisation prior to setting up | ||
28 | * the "ordinary" interrupt call gates. For legacy reasons, the ISA | ||
29 | * interrupts should be initialised here if the machine emulates a PC | ||
30 | * in any way. | ||
31 | **/ | ||
32 | void __init pre_intr_init_hook(void) | ||
33 | { | ||
34 | if (x86_quirks->arch_pre_intr_init) { | ||
35 | if (x86_quirks->arch_pre_intr_init()) | ||
36 | return; | ||
37 | } | ||
38 | init_ISA_irqs(); | ||
39 | } | ||
40 | |||
41 | /* | ||
42 | * IRQ2 is cascade interrupt to second interrupt controller | ||
43 | */ | ||
44 | static struct irqaction irq2 = { | ||
45 | .handler = no_action, | ||
46 | .mask = CPU_MASK_NONE, | ||
47 | .name = "cascade", | ||
48 | }; | ||
49 | |||
50 | /** | ||
51 | * intr_init_hook - post gate setup interrupt initialisation | ||
52 | * | ||
53 | * Description: | ||
54 | * Fill in any interrupts that may have been left out by the general | ||
55 | * init_IRQ() routine. interrupts having to do with the machine rather | ||
56 | * than the devices on the I/O bus (like APIC interrupts in intel MP | ||
57 | * systems) are started here. | ||
58 | **/ | ||
59 | void __init intr_init_hook(void) | ||
60 | { | ||
61 | if (x86_quirks->arch_intr_init) { | ||
62 | if (x86_quirks->arch_intr_init()) | ||
63 | return; | ||
64 | } | ||
65 | if (!acpi_ioapic) | ||
66 | setup_irq(2, &irq2); | ||
67 | |||
68 | } | ||
69 | |||
70 | /** | ||
71 | * pre_setup_arch_hook - hook called prior to any setup_arch() execution | ||
72 | * | ||
73 | * Description: | ||
74 | * generally used to activate any machine specific identification | ||
75 | * routines that may be needed before setup_arch() runs. On Voyager | ||
76 | * this is used to get the board revision and type. | ||
77 | **/ | ||
78 | void __init pre_setup_arch_hook(void) | ||
79 | { | ||
80 | } | ||
81 | |||
82 | /** | ||
83 | * trap_init_hook - initialise system specific traps | ||
84 | * | ||
85 | * Description: | ||
86 | * Called as the final act of trap_init(). Used in VISWS to initialise | ||
87 | * the various board specific APIC traps. | ||
88 | **/ | ||
89 | void __init trap_init_hook(void) | ||
90 | { | ||
91 | if (x86_quirks->arch_trap_init) { | ||
92 | if (x86_quirks->arch_trap_init()) | ||
93 | return; | ||
94 | } | ||
95 | } | ||
96 | |||
97 | static struct irqaction irq0 = { | ||
98 | .handler = timer_interrupt, | ||
99 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, | ||
100 | .mask = CPU_MASK_NONE, | ||
101 | .name = "timer" | ||
102 | }; | ||
103 | |||
104 | /** | ||
105 | * pre_time_init_hook - do any specific initialisations before. | ||
106 | * | ||
107 | **/ | ||
108 | void __init pre_time_init_hook(void) | ||
109 | { | ||
110 | if (x86_quirks->arch_pre_time_init) | ||
111 | x86_quirks->arch_pre_time_init(); | ||
112 | } | ||
113 | |||
114 | /** | ||
115 | * time_init_hook - do any specific initialisations for the system timer. | ||
116 | * | ||
117 | * Description: | ||
118 | * Must plug the system timer interrupt source at HZ into the IRQ listed | ||
119 | * in irq_vectors.h:TIMER_IRQ | ||
120 | **/ | ||
121 | void __init time_init_hook(void) | ||
122 | { | ||
123 | if (x86_quirks->arch_time_init) { | ||
124 | /* | ||
125 | * A nonzero return code does not mean failure, it means | ||
126 | * that the architecture quirk does not want any | ||
127 | * generic (timer) setup to be performed after this: | ||
128 | */ | ||
129 | if (x86_quirks->arch_time_init()) | ||
130 | return; | ||
131 | } | ||
132 | |||
133 | irq0.mask = cpumask_of_cpu(0); | ||
134 | setup_irq(0, &irq0); | ||
135 | } | ||
136 | |||
137 | #ifdef CONFIG_MCA | ||
138 | /** | ||
139 | * mca_nmi_hook - hook into MCA specific NMI chain | ||
140 | * | ||
141 | * Description: | ||
142 | * The MCA (Microchannel Architecture) has an NMI chain for NMI sources | ||
143 | * along the MCA bus. Use this to hook into that chain if you will need | ||
144 | * it. | ||
145 | **/ | ||
146 | void mca_nmi_hook(void) | ||
147 | { | ||
148 | /* | ||
149 | * If I recall correctly, there's a whole bunch of other things that | ||
150 | * we can do to check for NMI problems, but that's all I know about | ||
151 | * at the moment. | ||
152 | */ | ||
153 | pr_warning("NMI generated from unknown source!\n"); | ||
154 | } | ||
155 | #endif | ||
156 | |||
157 | static __init int no_ipi_broadcast(char *str) | ||
158 | { | ||
159 | get_option(&str, &no_broadcast); | ||
160 | pr_info("Using %s mode\n", | ||
161 | no_broadcast ? "No IPI Broadcast" : "IPI Broadcast"); | ||
162 | return 1; | ||
163 | } | ||
164 | __setup("no_ipi_broadcast=", no_ipi_broadcast); | ||
165 | |||
166 | static int __init print_ipi_mode(void) | ||
167 | { | ||
168 | pr_info("Using IPI %s mode\n", | ||
169 | no_broadcast ? "No-Shortcut" : "Shortcut"); | ||
170 | return 0; | ||
171 | } | ||
172 | |||
173 | late_initcall(print_ipi_mode); | ||
174 | |||
diff --git a/arch/x86/mach-generic/Makefile b/arch/x86/mach-generic/Makefile deleted file mode 100644 index 6730f4e7c744..000000000000 --- a/arch/x86/mach-generic/Makefile +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the generic architecture | ||
3 | # | ||
4 | |||
5 | EXTRA_CFLAGS := -Iarch/x86/kernel | ||
6 | |||
7 | obj-y := probe.o default.o | ||
8 | obj-$(CONFIG_X86_NUMAQ) += numaq.o | ||
9 | obj-$(CONFIG_X86_SUMMIT) += summit.o | ||
10 | obj-$(CONFIG_X86_BIGSMP) += bigsmp.o | ||
11 | obj-$(CONFIG_X86_ES7000) += es7000.o | ||
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c deleted file mode 100644 index bc4c7840b2a8..000000000000 --- a/arch/x86/mach-generic/bigsmp.c +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | /* | ||
2 | * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs. | ||
3 | * Drives the local APIC in "clustered mode". | ||
4 | */ | ||
5 | #define APIC_DEFINITION 1 | ||
6 | #include <linux/threads.h> | ||
7 | #include <linux/cpumask.h> | ||
8 | #include <asm/mpspec.h> | ||
9 | #include <asm/genapic.h> | ||
10 | #include <asm/fixmap.h> | ||
11 | #include <asm/apicdef.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/dmi.h> | ||
15 | #include <asm/bigsmp/apicdef.h> | ||
16 | #include <linux/smp.h> | ||
17 | #include <asm/bigsmp/apic.h> | ||
18 | #include <asm/bigsmp/ipi.h> | ||
19 | #include <asm/mach-default/mach_mpparse.h> | ||
20 | #include <asm/mach-default/mach_wakecpu.h> | ||
21 | |||
22 | static int dmi_bigsmp; /* can be set by dmi scanners */ | ||
23 | |||
24 | static int hp_ht_bigsmp(const struct dmi_system_id *d) | ||
25 | { | ||
26 | printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident); | ||
27 | dmi_bigsmp = 1; | ||
28 | return 0; | ||
29 | } | ||
30 | |||
31 | |||
32 | static const struct dmi_system_id bigsmp_dmi_table[] = { | ||
33 | { hp_ht_bigsmp, "HP ProLiant DL760 G2", | ||
34 | { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), | ||
35 | DMI_MATCH(DMI_BIOS_VERSION, "P44-"),} | ||
36 | }, | ||
37 | |||
38 | { hp_ht_bigsmp, "HP ProLiant DL740", | ||
39 | { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), | ||
40 | DMI_MATCH(DMI_BIOS_VERSION, "P47-"),} | ||
41 | }, | ||
42 | { } | ||
43 | }; | ||
44 | |||
45 | static void vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
46 | { | ||
47 | cpus_clear(*retmask); | ||
48 | cpu_set(cpu, *retmask); | ||
49 | } | ||
50 | |||
51 | static int probe_bigsmp(void) | ||
52 | { | ||
53 | if (def_to_bigsmp) | ||
54 | dmi_bigsmp = 1; | ||
55 | else | ||
56 | dmi_check_system(bigsmp_dmi_table); | ||
57 | return dmi_bigsmp; | ||
58 | } | ||
59 | |||
60 | struct genapic apic_bigsmp = APIC_INIT("bigsmp", probe_bigsmp); | ||
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c deleted file mode 100644 index e63a4a76d8cd..000000000000 --- a/arch/x86/mach-generic/default.c +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * Default generic APIC driver. This handles up to 8 CPUs. | ||
3 | */ | ||
4 | #define APIC_DEFINITION 1 | ||
5 | #include <linux/threads.h> | ||
6 | #include <linux/cpumask.h> | ||
7 | #include <asm/mpspec.h> | ||
8 | #include <asm/mach-default/mach_apicdef.h> | ||
9 | #include <asm/genapic.h> | ||
10 | #include <asm/fixmap.h> | ||
11 | #include <asm/apicdef.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/string.h> | ||
14 | #include <linux/smp.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <asm/mach-default/mach_apic.h> | ||
17 | #include <asm/mach-default/mach_ipi.h> | ||
18 | #include <asm/mach-default/mach_mpparse.h> | ||
19 | #include <asm/mach-default/mach_wakecpu.h> | ||
20 | |||
21 | /* should be called last. */ | ||
22 | static int probe_default(void) | ||
23 | { | ||
24 | return 1; | ||
25 | } | ||
26 | |||
27 | struct genapic apic_default = APIC_INIT("default", probe_default); | ||
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c deleted file mode 100644 index c2ded1448024..000000000000 --- a/arch/x86/mach-generic/es7000.c +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | /* | ||
2 | * APIC driver for the Unisys ES7000 chipset. | ||
3 | */ | ||
4 | #define APIC_DEFINITION 1 | ||
5 | #include <linux/threads.h> | ||
6 | #include <linux/cpumask.h> | ||
7 | #include <asm/mpspec.h> | ||
8 | #include <asm/genapic.h> | ||
9 | #include <asm/fixmap.h> | ||
10 | #include <asm/apicdef.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/string.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <asm/es7000/apicdef.h> | ||
15 | #include <linux/smp.h> | ||
16 | #include <asm/es7000/apic.h> | ||
17 | #include <asm/es7000/ipi.h> | ||
18 | #include <asm/es7000/mpparse.h> | ||
19 | #include <asm/mach-default/mach_wakecpu.h> | ||
20 | |||
21 | void __init es7000_update_genapic_to_cluster(void) | ||
22 | { | ||
23 | genapic->target_cpus = target_cpus_cluster; | ||
24 | genapic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER; | ||
25 | genapic->int_dest_mode = INT_DEST_MODE_CLUSTER; | ||
26 | genapic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER; | ||
27 | |||
28 | genapic->init_apic_ldr = init_apic_ldr_cluster; | ||
29 | |||
30 | genapic->cpu_mask_to_apicid = cpu_mask_to_apicid_cluster; | ||
31 | } | ||
32 | |||
33 | static int probe_es7000(void) | ||
34 | { | ||
35 | /* probed later in mptable/ACPI hooks */ | ||
36 | return 0; | ||
37 | } | ||
38 | |||
39 | extern void es7000_sw_apic(void); | ||
40 | static void __init enable_apic_mode(void) | ||
41 | { | ||
42 | es7000_sw_apic(); | ||
43 | return; | ||
44 | } | ||
45 | |||
46 | static __init int | ||
47 | mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
48 | { | ||
49 | if (mpc->oemptr) { | ||
50 | struct mpc_oemtable *oem_table = | ||
51 | (struct mpc_oemtable *)mpc->oemptr; | ||
52 | if (!strncmp(oem, "UNISYS", 6)) | ||
53 | return parse_unisys_oem((char *)oem_table); | ||
54 | } | ||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | #ifdef CONFIG_ACPI | ||
59 | /* Hook from generic ACPI tables.c */ | ||
60 | static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
61 | { | ||
62 | unsigned long oem_addr = 0; | ||
63 | int check_dsdt; | ||
64 | int ret = 0; | ||
65 | |||
66 | /* check dsdt at first to avoid clear fix_map for oem_addr */ | ||
67 | check_dsdt = es7000_check_dsdt(); | ||
68 | |||
69 | if (!find_unisys_acpi_oem_table(&oem_addr)) { | ||
70 | if (check_dsdt) | ||
71 | ret = parse_unisys_oem((char *)oem_addr); | ||
72 | else { | ||
73 | setup_unisys(); | ||
74 | ret = 1; | ||
75 | } | ||
76 | /* | ||
77 | * we need to unmap it | ||
78 | */ | ||
79 | unmap_unisys_acpi_oem_table(oem_addr); | ||
80 | } | ||
81 | return ret; | ||
82 | } | ||
83 | #else | ||
84 | static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
85 | { | ||
86 | return 0; | ||
87 | } | ||
88 | #endif | ||
89 | |||
90 | static void vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
91 | { | ||
92 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
93 | * specified in the interrupt destination when using lowest | ||
94 | * priority interrupt delivery mode. | ||
95 | * | ||
96 | * In particular there was a hyperthreading cpu observed to | ||
97 | * deliver interrupts to the wrong hyperthread when only one | ||
98 | * hyperthread was specified in the interrupt desitination. | ||
99 | */ | ||
100 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | ||
101 | } | ||
102 | |||
103 | struct genapic __initdata_refok apic_es7000 = APIC_INIT("es7000", probe_es7000); | ||
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c deleted file mode 100644 index 3679e2255645..000000000000 --- a/arch/x86/mach-generic/numaq.c +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* | ||
2 | * APIC driver for the IBM NUMAQ chipset. | ||
3 | */ | ||
4 | #define APIC_DEFINITION 1 | ||
5 | #include <linux/threads.h> | ||
6 | #include <linux/cpumask.h> | ||
7 | #include <asm/mpspec.h> | ||
8 | #include <asm/genapic.h> | ||
9 | #include <asm/fixmap.h> | ||
10 | #include <asm/apicdef.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/string.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <asm/numaq/apicdef.h> | ||
15 | #include <linux/smp.h> | ||
16 | #include <asm/numaq/apic.h> | ||
17 | #include <asm/numaq/ipi.h> | ||
18 | #include <asm/numaq/mpparse.h> | ||
19 | #include <asm/numaq/wakecpu.h> | ||
20 | #include <asm/numaq.h> | ||
21 | |||
22 | static int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
23 | { | ||
24 | numaq_mps_oem_check(mpc, oem, productid); | ||
25 | return found_numaq; | ||
26 | } | ||
27 | |||
28 | static int probe_numaq(void) | ||
29 | { | ||
30 | /* already know from get_memcfg_numaq() */ | ||
31 | return found_numaq; | ||
32 | } | ||
33 | |||
34 | /* Hook from generic ACPI tables.c */ | ||
35 | static int acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
36 | { | ||
37 | return 0; | ||
38 | } | ||
39 | |||
40 | static void vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
41 | { | ||
42 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
43 | * specified in the interrupt destination when using lowest | ||
44 | * priority interrupt delivery mode. | ||
45 | * | ||
46 | * In particular there was a hyperthreading cpu observed to | ||
47 | * deliver interrupts to the wrong hyperthread when only one | ||
48 | * hyperthread was specified in the interrupt desitination. | ||
49 | */ | ||
50 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | ||
51 | } | ||
52 | |||
53 | struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq); | ||
diff --git a/arch/x86/mach-generic/probe.c b/arch/x86/mach-generic/probe.c deleted file mode 100644 index 15a38daef1a8..000000000000 --- a/arch/x86/mach-generic/probe.c +++ /dev/null | |||
@@ -1,152 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2003 Andi Kleen, SuSE Labs. | ||
3 | * Subject to the GNU Public License, v.2 | ||
4 | * | ||
5 | * Generic x86 APIC driver probe layer. | ||
6 | */ | ||
7 | #include <linux/threads.h> | ||
8 | #include <linux/cpumask.h> | ||
9 | #include <linux/string.h> | ||
10 | #include <linux/kernel.h> | ||
11 | #include <linux/ctype.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <asm/fixmap.h> | ||
15 | #include <asm/mpspec.h> | ||
16 | #include <asm/apicdef.h> | ||
17 | #include <asm/genapic.h> | ||
18 | #include <asm/setup.h> | ||
19 | |||
20 | extern struct genapic apic_numaq; | ||
21 | extern struct genapic apic_summit; | ||
22 | extern struct genapic apic_bigsmp; | ||
23 | extern struct genapic apic_es7000; | ||
24 | extern struct genapic apic_default; | ||
25 | |||
26 | struct genapic *genapic = &apic_default; | ||
27 | |||
28 | static struct genapic *apic_probe[] __initdata = { | ||
29 | #ifdef CONFIG_X86_NUMAQ | ||
30 | &apic_numaq, | ||
31 | #endif | ||
32 | #ifdef CONFIG_X86_SUMMIT | ||
33 | &apic_summit, | ||
34 | #endif | ||
35 | #ifdef CONFIG_X86_BIGSMP | ||
36 | &apic_bigsmp, | ||
37 | #endif | ||
38 | #ifdef CONFIG_X86_ES7000 | ||
39 | &apic_es7000, | ||
40 | #endif | ||
41 | &apic_default, /* must be last */ | ||
42 | NULL, | ||
43 | }; | ||
44 | |||
45 | static int cmdline_apic __initdata; | ||
46 | static int __init parse_apic(char *arg) | ||
47 | { | ||
48 | int i; | ||
49 | |||
50 | if (!arg) | ||
51 | return -EINVAL; | ||
52 | |||
53 | for (i = 0; apic_probe[i]; i++) { | ||
54 | if (!strcmp(apic_probe[i]->name, arg)) { | ||
55 | genapic = apic_probe[i]; | ||
56 | cmdline_apic = 1; | ||
57 | return 0; | ||
58 | } | ||
59 | } | ||
60 | |||
61 | if (x86_quirks->update_genapic) | ||
62 | x86_quirks->update_genapic(); | ||
63 | |||
64 | /* Parsed again by __setup for debug/verbose */ | ||
65 | return 0; | ||
66 | } | ||
67 | early_param("apic", parse_apic); | ||
68 | |||
69 | void __init generic_bigsmp_probe(void) | ||
70 | { | ||
71 | #ifdef CONFIG_X86_BIGSMP | ||
72 | /* | ||
73 | * This routine is used to switch to bigsmp mode when | ||
74 | * - There is no apic= option specified by the user | ||
75 | * - generic_apic_probe() has chosen apic_default as the sub_arch | ||
76 | * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support | ||
77 | */ | ||
78 | |||
79 | if (!cmdline_apic && genapic == &apic_default) { | ||
80 | if (apic_bigsmp.probe()) { | ||
81 | genapic = &apic_bigsmp; | ||
82 | if (x86_quirks->update_genapic) | ||
83 | x86_quirks->update_genapic(); | ||
84 | printk(KERN_INFO "Overriding APIC driver with %s\n", | ||
85 | genapic->name); | ||
86 | } | ||
87 | } | ||
88 | #endif | ||
89 | } | ||
90 | |||
91 | void __init generic_apic_probe(void) | ||
92 | { | ||
93 | if (!cmdline_apic) { | ||
94 | int i; | ||
95 | for (i = 0; apic_probe[i]; i++) { | ||
96 | if (apic_probe[i]->probe()) { | ||
97 | genapic = apic_probe[i]; | ||
98 | break; | ||
99 | } | ||
100 | } | ||
101 | /* Not visible without early console */ | ||
102 | if (!apic_probe[i]) | ||
103 | panic("Didn't find an APIC driver"); | ||
104 | |||
105 | if (x86_quirks->update_genapic) | ||
106 | x86_quirks->update_genapic(); | ||
107 | } | ||
108 | printk(KERN_INFO "Using APIC driver %s\n", genapic->name); | ||
109 | } | ||
110 | |||
111 | /* These functions can switch the APIC even after the initial ->probe() */ | ||
112 | |||
113 | int __init mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
114 | { | ||
115 | int i; | ||
116 | for (i = 0; apic_probe[i]; ++i) { | ||
117 | if (apic_probe[i]->mps_oem_check(mpc, oem, productid)) { | ||
118 | if (!cmdline_apic) { | ||
119 | genapic = apic_probe[i]; | ||
120 | if (x86_quirks->update_genapic) | ||
121 | x86_quirks->update_genapic(); | ||
122 | printk(KERN_INFO "Switched to APIC driver `%s'.\n", | ||
123 | genapic->name); | ||
124 | } | ||
125 | return 1; | ||
126 | } | ||
127 | } | ||
128 | return 0; | ||
129 | } | ||
130 | |||
131 | int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
132 | { | ||
133 | int i; | ||
134 | for (i = 0; apic_probe[i]; ++i) { | ||
135 | if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { | ||
136 | if (!cmdline_apic) { | ||
137 | genapic = apic_probe[i]; | ||
138 | if (x86_quirks->update_genapic) | ||
139 | x86_quirks->update_genapic(); | ||
140 | printk(KERN_INFO "Switched to APIC driver `%s'.\n", | ||
141 | genapic->name); | ||
142 | } | ||
143 | return 1; | ||
144 | } | ||
145 | } | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | int hard_smp_processor_id(void) | ||
150 | { | ||
151 | return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID)); | ||
152 | } | ||
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c deleted file mode 100644 index 2821ffc188b5..000000000000 --- a/arch/x86/mach-generic/summit.c +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* | ||
2 | * APIC driver for the IBM "Summit" chipset. | ||
3 | */ | ||
4 | #define APIC_DEFINITION 1 | ||
5 | #include <linux/threads.h> | ||
6 | #include <linux/cpumask.h> | ||
7 | #include <asm/mpspec.h> | ||
8 | #include <asm/genapic.h> | ||
9 | #include <asm/fixmap.h> | ||
10 | #include <asm/apicdef.h> | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/string.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <asm/summit/apicdef.h> | ||
15 | #include <linux/smp.h> | ||
16 | #include <asm/summit/apic.h> | ||
17 | #include <asm/summit/ipi.h> | ||
18 | #include <asm/summit/mpparse.h> | ||
19 | #include <asm/mach-default/mach_wakecpu.h> | ||
20 | |||
21 | static int probe_summit(void) | ||
22 | { | ||
23 | /* probed later in mptable/ACPI hooks */ | ||
24 | return 0; | ||
25 | } | ||
26 | |||
27 | static void vector_allocation_domain(int cpu, cpumask_t *retmask) | ||
28 | { | ||
29 | /* Careful. Some cpus do not strictly honor the set of cpus | ||
30 | * specified in the interrupt destination when using lowest | ||
31 | * priority interrupt delivery mode. | ||
32 | * | ||
33 | * In particular there was a hyperthreading cpu observed to | ||
34 | * deliver interrupts to the wrong hyperthread when only one | ||
35 | * hyperthread was specified in the interrupt desitination. | ||
36 | */ | ||
37 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | ||
38 | } | ||
39 | |||
40 | struct genapic apic_summit = APIC_INIT("summit", probe_summit); | ||
diff --git a/arch/x86/mach-rdc321x/Makefile b/arch/x86/mach-rdc321x/Makefile deleted file mode 100644 index 8325b4ca431c..000000000000 --- a/arch/x86/mach-rdc321x/Makefile +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the RDC321x specific parts of the kernel | ||
3 | # | ||
4 | obj-$(CONFIG_X86_RDC321X) := gpio.o platform.o | ||
5 | |||
diff --git a/arch/x86/mach-rdc321x/gpio.c b/arch/x86/mach-rdc321x/gpio.c deleted file mode 100644 index 247f33d3a407..000000000000 --- a/arch/x86/mach-rdc321x/gpio.c +++ /dev/null | |||
@@ -1,194 +0,0 @@ | |||
1 | /* | ||
2 | * GPIO support for RDC SoC R3210/R8610 | ||
3 | * | ||
4 | * Copyright (C) 2007, Florian Fainelli <florian@openwrt.org> | ||
5 | * Copyright (C) 2008, Volker Weiss <dev@tintuc.de> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | |||
24 | #include <linux/spinlock.h> | ||
25 | #include <linux/io.h> | ||
26 | #include <linux/types.h> | ||
27 | #include <linux/module.h> | ||
28 | |||
29 | #include <asm/gpio.h> | ||
30 | #include <asm/mach-rdc321x/rdc321x_defs.h> | ||
31 | |||
32 | |||
33 | /* spin lock to protect our private copy of GPIO data register plus | ||
34 | the access to PCI conf registers. */ | ||
35 | static DEFINE_SPINLOCK(gpio_lock); | ||
36 | |||
37 | /* copy of GPIO data registers */ | ||
38 | static u32 gpio_data_reg1; | ||
39 | static u32 gpio_data_reg2; | ||
40 | |||
41 | static u32 gpio_request_data[2]; | ||
42 | |||
43 | |||
44 | static inline void rdc321x_conf_write(unsigned addr, u32 value) | ||
45 | { | ||
46 | outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR); | ||
47 | outl(value, RDC3210_CFGREG_DATA); | ||
48 | } | ||
49 | |||
50 | static inline void rdc321x_conf_or(unsigned addr, u32 value) | ||
51 | { | ||
52 | outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR); | ||
53 | value |= inl(RDC3210_CFGREG_DATA); | ||
54 | outl(value, RDC3210_CFGREG_DATA); | ||
55 | } | ||
56 | |||
57 | static inline u32 rdc321x_conf_read(unsigned addr) | ||
58 | { | ||
59 | outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR); | ||
60 | |||
61 | return inl(RDC3210_CFGREG_DATA); | ||
62 | } | ||
63 | |||
64 | /* configure pin as GPIO */ | ||
65 | static void rdc321x_configure_gpio(unsigned gpio) | ||
66 | { | ||
67 | unsigned long flags; | ||
68 | |||
69 | spin_lock_irqsave(&gpio_lock, flags); | ||
70 | rdc321x_conf_or(gpio < 32 | ||
71 | ? RDC321X_GPIO_CTRL_REG1 : RDC321X_GPIO_CTRL_REG2, | ||
72 | 1 << (gpio & 0x1f)); | ||
73 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
74 | } | ||
75 | |||
76 | /* initially setup the 2 copies of the gpio data registers. | ||
77 | This function must be called by the platform setup code. */ | ||
78 | void __init rdc321x_gpio_setup() | ||
79 | { | ||
80 | /* this might not be, what others (BIOS, bootloader, etc.) | ||
81 | wrote to these registers before, but it's a good guess. Still | ||
82 | better than just using 0xffffffff. */ | ||
83 | |||
84 | gpio_data_reg1 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG1); | ||
85 | gpio_data_reg2 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG2); | ||
86 | } | ||
87 | |||
88 | /* determine, if gpio number is valid */ | ||
89 | static inline int rdc321x_is_gpio(unsigned gpio) | ||
90 | { | ||
91 | return gpio <= RDC321X_MAX_GPIO; | ||
92 | } | ||
93 | |||
94 | /* request GPIO */ | ||
95 | int rdc_gpio_request(unsigned gpio, const char *label) | ||
96 | { | ||
97 | unsigned long flags; | ||
98 | |||
99 | if (!rdc321x_is_gpio(gpio)) | ||
100 | return -EINVAL; | ||
101 | |||
102 | spin_lock_irqsave(&gpio_lock, flags); | ||
103 | if (gpio_request_data[(gpio & 0x20) ? 1 : 0] & (1 << (gpio & 0x1f))) | ||
104 | goto inuse; | ||
105 | gpio_request_data[(gpio & 0x20) ? 1 : 0] |= (1 << (gpio & 0x1f)); | ||
106 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
107 | |||
108 | return 0; | ||
109 | inuse: | ||
110 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
111 | return -EINVAL; | ||
112 | } | ||
113 | EXPORT_SYMBOL(rdc_gpio_request); | ||
114 | |||
115 | /* release previously-claimed GPIO */ | ||
116 | void rdc_gpio_free(unsigned gpio) | ||
117 | { | ||
118 | unsigned long flags; | ||
119 | |||
120 | if (!rdc321x_is_gpio(gpio)) | ||
121 | return; | ||
122 | |||
123 | spin_lock_irqsave(&gpio_lock, flags); | ||
124 | gpio_request_data[(gpio & 0x20) ? 1 : 0] &= ~(1 << (gpio & 0x1f)); | ||
125 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
126 | } | ||
127 | EXPORT_SYMBOL(rdc_gpio_free); | ||
128 | |||
129 | /* read GPIO pin */ | ||
130 | int rdc_gpio_get_value(unsigned gpio) | ||
131 | { | ||
132 | u32 reg; | ||
133 | unsigned long flags; | ||
134 | |||
135 | spin_lock_irqsave(&gpio_lock, flags); | ||
136 | reg = rdc321x_conf_read(gpio < 32 | ||
137 | ? RDC321X_GPIO_DATA_REG1 : RDC321X_GPIO_DATA_REG2); | ||
138 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
139 | |||
140 | return (1 << (gpio & 0x1f)) & reg ? 1 : 0; | ||
141 | } | ||
142 | EXPORT_SYMBOL(rdc_gpio_get_value); | ||
143 | |||
144 | /* set GPIO pin to value */ | ||
145 | void rdc_gpio_set_value(unsigned gpio, int value) | ||
146 | { | ||
147 | unsigned long flags; | ||
148 | u32 reg; | ||
149 | |||
150 | reg = 1 << (gpio & 0x1f); | ||
151 | if (gpio < 32) { | ||
152 | spin_lock_irqsave(&gpio_lock, flags); | ||
153 | if (value) | ||
154 | gpio_data_reg1 |= reg; | ||
155 | else | ||
156 | gpio_data_reg1 &= ~reg; | ||
157 | rdc321x_conf_write(RDC321X_GPIO_DATA_REG1, gpio_data_reg1); | ||
158 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
159 | } else { | ||
160 | spin_lock_irqsave(&gpio_lock, flags); | ||
161 | if (value) | ||
162 | gpio_data_reg2 |= reg; | ||
163 | else | ||
164 | gpio_data_reg2 &= ~reg; | ||
165 | rdc321x_conf_write(RDC321X_GPIO_DATA_REG2, gpio_data_reg2); | ||
166 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
167 | } | ||
168 | } | ||
169 | EXPORT_SYMBOL(rdc_gpio_set_value); | ||
170 | |||
171 | /* configure GPIO pin as input */ | ||
172 | int rdc_gpio_direction_input(unsigned gpio) | ||
173 | { | ||
174 | if (!rdc321x_is_gpio(gpio)) | ||
175 | return -EINVAL; | ||
176 | |||
177 | rdc321x_configure_gpio(gpio); | ||
178 | |||
179 | return 0; | ||
180 | } | ||
181 | EXPORT_SYMBOL(rdc_gpio_direction_input); | ||
182 | |||
183 | /* configure GPIO pin as output and set value */ | ||
184 | int rdc_gpio_direction_output(unsigned gpio, int value) | ||
185 | { | ||
186 | if (!rdc321x_is_gpio(gpio)) | ||
187 | return -EINVAL; | ||
188 | |||
189 | gpio_set_value(gpio, value); | ||
190 | rdc321x_configure_gpio(gpio); | ||
191 | |||
192 | return 0; | ||
193 | } | ||
194 | EXPORT_SYMBOL(rdc_gpio_direction_output); | ||
diff --git a/arch/x86/mach-rdc321x/platform.c b/arch/x86/mach-rdc321x/platform.c deleted file mode 100644 index 4f4e50c3ad3b..000000000000 --- a/arch/x86/mach-rdc321x/platform.c +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * Generic RDC321x platform devices | ||
3 | * | ||
4 | * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version 2 | ||
9 | * of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the | ||
18 | * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, | ||
19 | * Boston, MA 02110-1301, USA. | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #include <linux/init.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/list.h> | ||
26 | #include <linux/device.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/leds.h> | ||
29 | |||
30 | #include <asm/gpio.h> | ||
31 | |||
32 | /* LEDS */ | ||
33 | static struct gpio_led default_leds[] = { | ||
34 | { .name = "rdc:dmz", .gpio = 1, }, | ||
35 | }; | ||
36 | |||
37 | static struct gpio_led_platform_data rdc321x_led_data = { | ||
38 | .num_leds = ARRAY_SIZE(default_leds), | ||
39 | .leds = default_leds, | ||
40 | }; | ||
41 | |||
42 | static struct platform_device rdc321x_leds = { | ||
43 | .name = "leds-gpio", | ||
44 | .id = -1, | ||
45 | .dev = { | ||
46 | .platform_data = &rdc321x_led_data, | ||
47 | } | ||
48 | }; | ||
49 | |||
50 | /* Watchdog */ | ||
51 | static struct platform_device rdc321x_wdt = { | ||
52 | .name = "rdc321x-wdt", | ||
53 | .id = -1, | ||
54 | .num_resources = 0, | ||
55 | }; | ||
56 | |||
57 | static struct platform_device *rdc321x_devs[] = { | ||
58 | &rdc321x_leds, | ||
59 | &rdc321x_wdt | ||
60 | }; | ||
61 | |||
62 | static int __init rdc_board_setup(void) | ||
63 | { | ||
64 | rdc321x_gpio_setup(); | ||
65 | |||
66 | return platform_add_devices(rdc321x_devs, ARRAY_SIZE(rdc321x_devs)); | ||
67 | } | ||
68 | |||
69 | arch_initcall(rdc_board_setup); | ||
diff --git a/arch/x86/mach-voyager/Makefile b/arch/x86/mach-voyager/Makefile deleted file mode 100644 index 15c250b371d3..000000000000 --- a/arch/x86/mach-voyager/Makefile +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | |||
5 | EXTRA_CFLAGS := -Iarch/x86/kernel | ||
6 | obj-y := setup.o voyager_basic.o voyager_thread.o | ||
7 | |||
8 | obj-$(CONFIG_SMP) += voyager_smp.o voyager_cat.o | ||
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c deleted file mode 100644 index 8e5118371f0f..000000000000 --- a/arch/x86/mach-voyager/setup.c +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | /* | ||
2 | * Machine specific setup for generic | ||
3 | */ | ||
4 | |||
5 | #include <linux/init.h> | ||
6 | #include <linux/interrupt.h> | ||
7 | #include <asm/arch_hooks.h> | ||
8 | #include <asm/voyager.h> | ||
9 | #include <asm/e820.h> | ||
10 | #include <asm/io.h> | ||
11 | #include <asm/setup.h> | ||
12 | |||
13 | void __init pre_intr_init_hook(void) | ||
14 | { | ||
15 | init_ISA_irqs(); | ||
16 | } | ||
17 | |||
18 | /* | ||
19 | * IRQ2 is cascade interrupt to second interrupt controller | ||
20 | */ | ||
21 | static struct irqaction irq2 = { | ||
22 | .handler = no_action, | ||
23 | .mask = CPU_MASK_NONE, | ||
24 | .name = "cascade", | ||
25 | }; | ||
26 | |||
27 | void __init intr_init_hook(void) | ||
28 | { | ||
29 | #ifdef CONFIG_SMP | ||
30 | voyager_smp_intr_init(); | ||
31 | #endif | ||
32 | |||
33 | setup_irq(2, &irq2); | ||
34 | } | ||
35 | |||
36 | static void voyager_disable_tsc(void) | ||
37 | { | ||
38 | /* Voyagers run their CPUs from independent clocks, so disable | ||
39 | * the TSC code because we can't sync them */ | ||
40 | setup_clear_cpu_cap(X86_FEATURE_TSC); | ||
41 | } | ||
42 | |||
43 | void __init pre_setup_arch_hook(void) | ||
44 | { | ||
45 | voyager_disable_tsc(); | ||
46 | } | ||
47 | |||
48 | void __init pre_time_init_hook(void) | ||
49 | { | ||
50 | voyager_disable_tsc(); | ||
51 | } | ||
52 | |||
53 | void __init trap_init_hook(void) | ||
54 | { | ||
55 | } | ||
56 | |||
57 | static struct irqaction irq0 = { | ||
58 | .handler = timer_interrupt, | ||
59 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, | ||
60 | .mask = CPU_MASK_NONE, | ||
61 | .name = "timer" | ||
62 | }; | ||
63 | |||
64 | void __init time_init_hook(void) | ||
65 | { | ||
66 | irq0.mask = cpumask_of_cpu(safe_smp_processor_id()); | ||
67 | setup_irq(0, &irq0); | ||
68 | } | ||
69 | |||
70 | /* Hook for machine specific memory setup. */ | ||
71 | |||
72 | char *__init machine_specific_memory_setup(void) | ||
73 | { | ||
74 | char *who; | ||
75 | int new_nr; | ||
76 | |||
77 | who = "NOT VOYAGER"; | ||
78 | |||
79 | if (voyager_level == 5) { | ||
80 | __u32 addr, length; | ||
81 | int i; | ||
82 | |||
83 | who = "Voyager-SUS"; | ||
84 | |||
85 | e820.nr_map = 0; | ||
86 | for (i = 0; voyager_memory_detect(i, &addr, &length); i++) { | ||
87 | e820_add_region(addr, length, E820_RAM); | ||
88 | } | ||
89 | return who; | ||
90 | } else if (voyager_level == 4) { | ||
91 | __u32 tom; | ||
92 | __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8; | ||
93 | /* select the DINO config space */ | ||
94 | outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT); | ||
95 | /* Read DINO top of memory register */ | ||
96 | tom = ((inb(catbase + 0x4) & 0xf0) << 16) | ||
97 | + ((inb(catbase + 0x5) & 0x7f) << 24); | ||
98 | |||
99 | if (inb(catbase) != VOYAGER_DINO) { | ||
100 | printk(KERN_ERR | ||
101 | "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n"); | ||
102 | tom = (boot_params.screen_info.ext_mem_k) << 10; | ||
103 | } | ||
104 | who = "Voyager-TOM"; | ||
105 | e820_add_region(0, 0x9f000, E820_RAM); | ||
106 | /* map from 1M to top of memory */ | ||
107 | e820_add_region(1 * 1024 * 1024, tom - 1 * 1024 * 1024, | ||
108 | E820_RAM); | ||
109 | /* FIXME: Should check the ASICs to see if I need to | ||
110 | * take out the 8M window. Just do it at the moment | ||
111 | * */ | ||
112 | e820_add_region(8 * 1024 * 1024, 8 * 1024 * 1024, | ||
113 | E820_RESERVED); | ||
114 | return who; | ||
115 | } | ||
116 | |||
117 | return default_machine_specific_memory_setup(); | ||
118 | } | ||
diff --git a/arch/x86/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c deleted file mode 100644 index 46d6f8067690..000000000000 --- a/arch/x86/mach-voyager/voyager_basic.c +++ /dev/null | |||
@@ -1,317 +0,0 @@ | |||
1 | /* Copyright (C) 1999,2001 | ||
2 | * | ||
3 | * Author: J.E.J.Bottomley@HansenPartnership.com | ||
4 | * | ||
5 | * This file contains all the voyager specific routines for getting | ||
6 | * initialisation of the architecture to function. For additional | ||
7 | * features see: | ||
8 | * | ||
9 | * voyager_cat.c - Voyager CAT bus interface | ||
10 | * voyager_smp.c - Voyager SMP hal (emulates linux smp.c) | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/ptrace.h> | ||
17 | #include <linux/ioport.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/reboot.h> | ||
22 | #include <linux/sysrq.h> | ||
23 | #include <linux/smp.h> | ||
24 | #include <linux/nodemask.h> | ||
25 | #include <asm/io.h> | ||
26 | #include <asm/voyager.h> | ||
27 | #include <asm/vic.h> | ||
28 | #include <linux/pm.h> | ||
29 | #include <asm/tlbflush.h> | ||
30 | #include <asm/arch_hooks.h> | ||
31 | #include <asm/i8253.h> | ||
32 | |||
33 | /* | ||
34 | * Power off function, if any | ||
35 | */ | ||
36 | void (*pm_power_off) (void); | ||
37 | EXPORT_SYMBOL(pm_power_off); | ||
38 | |||
39 | int voyager_level = 0; | ||
40 | |||
41 | struct voyager_SUS *voyager_SUS = NULL; | ||
42 | |||
43 | #ifdef CONFIG_SMP | ||
44 | static void voyager_dump(int dummy1, struct tty_struct *dummy3) | ||
45 | { | ||
46 | /* get here via a sysrq */ | ||
47 | voyager_smp_dump(); | ||
48 | } | ||
49 | |||
50 | static struct sysrq_key_op sysrq_voyager_dump_op = { | ||
51 | .handler = voyager_dump, | ||
52 | .help_msg = "Voyager", | ||
53 | .action_msg = "Dump Voyager Status", | ||
54 | }; | ||
55 | #endif | ||
56 | |||
57 | void voyager_detect(struct voyager_bios_info *bios) | ||
58 | { | ||
59 | if (bios->len != 0xff) { | ||
60 | int class = (bios->class_1 << 8) | ||
61 | | (bios->class_2 & 0xff); | ||
62 | |||
63 | printk("Voyager System detected.\n" | ||
64 | " Class %x, Revision %d.%d\n", | ||
65 | class, bios->major, bios->minor); | ||
66 | if (class == VOYAGER_LEVEL4) | ||
67 | voyager_level = 4; | ||
68 | else if (class < VOYAGER_LEVEL5_AND_ABOVE) | ||
69 | voyager_level = 3; | ||
70 | else | ||
71 | voyager_level = 5; | ||
72 | printk(" Architecture Level %d\n", voyager_level); | ||
73 | if (voyager_level < 4) | ||
74 | printk | ||
75 | ("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n"); | ||
76 | /* install the power off handler */ | ||
77 | pm_power_off = voyager_power_off; | ||
78 | #ifdef CONFIG_SMP | ||
79 | register_sysrq_key('v', &sysrq_voyager_dump_op); | ||
80 | #endif | ||
81 | } else { | ||
82 | printk("\n\n**WARNING**: No Voyager Subsystem Found\n"); | ||
83 | } | ||
84 | } | ||
85 | |||
86 | void voyager_system_interrupt(int cpl, void *dev_id) | ||
87 | { | ||
88 | printk("Voyager: detected system interrupt\n"); | ||
89 | } | ||
90 | |||
91 | /* Routine to read information from the extended CMOS area */ | ||
92 | __u8 voyager_extended_cmos_read(__u16 addr) | ||
93 | { | ||
94 | outb(addr & 0xff, 0x74); | ||
95 | outb((addr >> 8) & 0xff, 0x75); | ||
96 | return inb(0x76); | ||
97 | } | ||
98 | |||
99 | /* internal definitions for the SUS Click Map of memory */ | ||
100 | |||
101 | #define CLICK_ENTRIES 16 | ||
102 | #define CLICK_SIZE 4096 /* click to byte conversion for Length */ | ||
103 | |||
104 | typedef struct ClickMap { | ||
105 | struct Entry { | ||
106 | __u32 Address; | ||
107 | __u32 Length; | ||
108 | } Entry[CLICK_ENTRIES]; | ||
109 | } ClickMap_t; | ||
110 | |||
111 | /* This routine is pretty much an awful hack to read the bios clickmap by | ||
112 | * mapping it into page 0. There are usually three regions in the map: | ||
113 | * Base Memory | ||
114 | * Extended Memory | ||
115 | * zero length marker for end of map | ||
116 | * | ||
117 | * Returns are 0 for failure and 1 for success on extracting region. | ||
118 | */ | ||
119 | int __init voyager_memory_detect(int region, __u32 * start, __u32 * length) | ||
120 | { | ||
121 | int i; | ||
122 | int retval = 0; | ||
123 | __u8 cmos[4]; | ||
124 | ClickMap_t *map; | ||
125 | unsigned long map_addr; | ||
126 | unsigned long old; | ||
127 | |||
128 | if (region >= CLICK_ENTRIES) { | ||
129 | printk("Voyager: Illegal ClickMap region %d\n", region); | ||
130 | return 0; | ||
131 | } | ||
132 | |||
133 | for (i = 0; i < sizeof(cmos); i++) | ||
134 | cmos[i] = | ||
135 | voyager_extended_cmos_read(VOYAGER_MEMORY_CLICKMAP + i); | ||
136 | |||
137 | map_addr = *(unsigned long *)cmos; | ||
138 | |||
139 | /* steal page 0 for this */ | ||
140 | old = pg0[0]; | ||
141 | pg0[0] = ((map_addr & PAGE_MASK) | _PAGE_RW | _PAGE_PRESENT); | ||
142 | local_flush_tlb(); | ||
143 | /* now clear everything out but page 0 */ | ||
144 | map = (ClickMap_t *) (map_addr & (~PAGE_MASK)); | ||
145 | |||
146 | /* zero length is the end of the clickmap */ | ||
147 | if (map->Entry[region].Length != 0) { | ||
148 | *length = map->Entry[region].Length * CLICK_SIZE; | ||
149 | *start = map->Entry[region].Address; | ||
150 | retval = 1; | ||
151 | } | ||
152 | |||
153 | /* replace the mapping */ | ||
154 | pg0[0] = old; | ||
155 | local_flush_tlb(); | ||
156 | return retval; | ||
157 | } | ||
158 | |||
159 | /* voyager specific handling code for timer interrupts. Used to hand | ||
160 | * off the timer tick to the SMP code, since the VIC doesn't have an | ||
161 | * internal timer (The QIC does, but that's another story). */ | ||
162 | void voyager_timer_interrupt(void) | ||
163 | { | ||
164 | if ((jiffies & 0x3ff) == 0) { | ||
165 | |||
166 | /* There seems to be something flaky in either | ||
167 | * hardware or software that is resetting the timer 0 | ||
168 | * count to something much higher than it should be | ||
169 | * This seems to occur in the boot sequence, just | ||
170 | * before root is mounted. Therefore, every 10 | ||
171 | * seconds or so, we sanity check the timer zero count | ||
172 | * and kick it back to where it should be. | ||
173 | * | ||
174 | * FIXME: This is the most awful hack yet seen. I | ||
175 | * should work out exactly what is interfering with | ||
176 | * the timer count settings early in the boot sequence | ||
177 | * and swiftly introduce it to something sharp and | ||
178 | * pointy. */ | ||
179 | __u16 val; | ||
180 | |||
181 | spin_lock(&i8253_lock); | ||
182 | |||
183 | outb_p(0x00, 0x43); | ||
184 | val = inb_p(0x40); | ||
185 | val |= inb(0x40) << 8; | ||
186 | spin_unlock(&i8253_lock); | ||
187 | |||
188 | if (val > LATCH) { | ||
189 | printk | ||
190 | ("\nVOYAGER: countdown timer value too high (%d), resetting\n\n", | ||
191 | val); | ||
192 | spin_lock(&i8253_lock); | ||
193 | outb(0x34, 0x43); | ||
194 | outb_p(LATCH & 0xff, 0x40); /* LSB */ | ||
195 | outb(LATCH >> 8, 0x40); /* MSB */ | ||
196 | spin_unlock(&i8253_lock); | ||
197 | } | ||
198 | } | ||
199 | #ifdef CONFIG_SMP | ||
200 | smp_vic_timer_interrupt(); | ||
201 | #endif | ||
202 | } | ||
203 | |||
204 | void voyager_power_off(void) | ||
205 | { | ||
206 | printk("VOYAGER Power Off\n"); | ||
207 | |||
208 | if (voyager_level == 5) { | ||
209 | voyager_cat_power_off(); | ||
210 | } else if (voyager_level == 4) { | ||
211 | /* This doesn't apparently work on most L4 machines, | ||
212 | * but the specs say to do this to get automatic power | ||
213 | * off. Unfortunately, if it doesn't power off the | ||
214 | * machine, it ends up doing a cold restart, which | ||
215 | * isn't really intended, so comment out the code */ | ||
216 | #if 0 | ||
217 | int port; | ||
218 | |||
219 | /* enable the voyager Configuration Space */ | ||
220 | outb((inb(VOYAGER_MC_SETUP) & 0xf0) | 0x8, VOYAGER_MC_SETUP); | ||
221 | /* the port for the power off flag is an offset from the | ||
222 | floating base */ | ||
223 | port = (inb(VOYAGER_SSPB_RELOCATION_PORT) << 8) + 0x21; | ||
224 | /* set the power off flag */ | ||
225 | outb(inb(port) | 0x1, port); | ||
226 | #endif | ||
227 | } | ||
228 | /* and wait for it to happen */ | ||
229 | local_irq_disable(); | ||
230 | for (;;) | ||
231 | halt(); | ||
232 | } | ||
233 | |||
234 | /* copied from process.c */ | ||
235 | static inline void kb_wait(void) | ||
236 | { | ||
237 | int i; | ||
238 | |||
239 | for (i = 0; i < 0x10000; i++) | ||
240 | if ((inb_p(0x64) & 0x02) == 0) | ||
241 | break; | ||
242 | } | ||
243 | |||
244 | void machine_shutdown(void) | ||
245 | { | ||
246 | /* Architecture specific shutdown needed before a kexec */ | ||
247 | } | ||
248 | |||
249 | void machine_restart(char *cmd) | ||
250 | { | ||
251 | printk("Voyager Warm Restart\n"); | ||
252 | kb_wait(); | ||
253 | |||
254 | if (voyager_level == 5) { | ||
255 | /* write magic values to the RTC to inform system that | ||
256 | * shutdown is beginning */ | ||
257 | outb(0x8f, 0x70); | ||
258 | outb(0x5, 0x71); | ||
259 | |||
260 | udelay(50); | ||
261 | outb(0xfe, 0x64); /* pull reset low */ | ||
262 | } else if (voyager_level == 4) { | ||
263 | __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8; | ||
264 | __u8 basebd = inb(VOYAGER_MC_SETUP); | ||
265 | |||
266 | outb(basebd | 0x08, VOYAGER_MC_SETUP); | ||
267 | outb(0x02, catbase + 0x21); | ||
268 | } | ||
269 | local_irq_disable(); | ||
270 | for (;;) | ||
271 | halt(); | ||
272 | } | ||
273 | |||
274 | void machine_emergency_restart(void) | ||
275 | { | ||
276 | /*for now, just hook this to a warm restart */ | ||
277 | machine_restart(NULL); | ||
278 | } | ||
279 | |||
280 | void mca_nmi_hook(void) | ||
281 | { | ||
282 | __u8 dumpval __maybe_unused = inb(0xf823); | ||
283 | __u8 swnmi __maybe_unused = inb(0xf813); | ||
284 | |||
285 | /* FIXME: assume dump switch pressed */ | ||
286 | /* check to see if the dump switch was pressed */ | ||
287 | VDEBUG(("VOYAGER: dumpval = 0x%x, swnmi = 0x%x\n", dumpval, swnmi)); | ||
288 | /* clear swnmi */ | ||
289 | outb(0xff, 0xf813); | ||
290 | /* tell SUS to ignore dump */ | ||
291 | if (voyager_level == 5 && voyager_SUS != NULL) { | ||
292 | if (voyager_SUS->SUS_mbox == VOYAGER_DUMP_BUTTON_NMI) { | ||
293 | voyager_SUS->kernel_mbox = VOYAGER_NO_COMMAND; | ||
294 | voyager_SUS->kernel_flags |= VOYAGER_OS_IN_PROGRESS; | ||
295 | udelay(1000); | ||
296 | voyager_SUS->kernel_mbox = VOYAGER_IGNORE_DUMP; | ||
297 | voyager_SUS->kernel_flags &= ~VOYAGER_OS_IN_PROGRESS; | ||
298 | } | ||
299 | } | ||
300 | printk(KERN_ERR | ||
301 | "VOYAGER: Dump switch pressed, printing CPU%d tracebacks\n", | ||
302 | smp_processor_id()); | ||
303 | show_stack(NULL, NULL); | ||
304 | show_state(); | ||
305 | } | ||
306 | |||
307 | void machine_halt(void) | ||
308 | { | ||
309 | /* treat a halt like a power off */ | ||
310 | machine_power_off(); | ||
311 | } | ||
312 | |||
313 | void machine_power_off(void) | ||
314 | { | ||
315 | if (pm_power_off) | ||
316 | pm_power_off(); | ||
317 | } | ||
diff --git a/arch/x86/mach-voyager/voyager_cat.c b/arch/x86/mach-voyager/voyager_cat.c deleted file mode 100644 index 2ad598c104af..000000000000 --- a/arch/x86/mach-voyager/voyager_cat.c +++ /dev/null | |||
@@ -1,1197 +0,0 @@ | |||
1 | /* -*- mode: c; c-basic-offset: 8 -*- */ | ||
2 | |||
3 | /* Copyright (C) 1999,2001 | ||
4 | * | ||
5 | * Author: J.E.J.Bottomley@HansenPartnership.com | ||
6 | * | ||
7 | * This file contains all the logic for manipulating the CAT bus | ||
8 | * in a level 5 machine. | ||
9 | * | ||
10 | * The CAT bus is a serial configuration and test bus. Its primary | ||
11 | * uses are to probe the initial configuration of the system and to | ||
12 | * diagnose error conditions when a system interrupt occurs. The low | ||
13 | * level interface is fairly primitive, so most of this file consists | ||
14 | * of bit shift manipulations to send and receive packets on the | ||
15 | * serial bus */ | ||
16 | |||
17 | #include <linux/types.h> | ||
18 | #include <linux/completion.h> | ||
19 | #include <linux/sched.h> | ||
20 | #include <asm/voyager.h> | ||
21 | #include <asm/vic.h> | ||
22 | #include <linux/ioport.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/slab.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <asm/io.h> | ||
27 | |||
28 | #ifdef VOYAGER_CAT_DEBUG | ||
29 | #define CDEBUG(x) printk x | ||
30 | #else | ||
31 | #define CDEBUG(x) | ||
32 | #endif | ||
33 | |||
34 | /* the CAT command port */ | ||
35 | #define CAT_CMD (sspb + 0xe) | ||
36 | /* the CAT data port */ | ||
37 | #define CAT_DATA (sspb + 0xd) | ||
38 | |||
39 | /* the internal cat functions */ | ||
40 | static void cat_pack(__u8 * msg, __u16 start_bit, __u8 * data, __u16 num_bits); | ||
41 | static void cat_unpack(__u8 * msg, __u16 start_bit, __u8 * data, | ||
42 | __u16 num_bits); | ||
43 | static void cat_build_header(__u8 * header, const __u16 len, | ||
44 | const __u16 smallest_reg_bits, | ||
45 | const __u16 longest_reg_bits); | ||
46 | static int cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp, | ||
47 | __u8 reg, __u8 op); | ||
48 | static int cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp, | ||
49 | __u8 reg, __u8 * value); | ||
50 | static int cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes, | ||
51 | __u8 pad_bits); | ||
52 | static int cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, | ||
53 | __u8 value); | ||
54 | static int cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, | ||
55 | __u8 * value); | ||
56 | static int cat_subread(voyager_module_t * modp, voyager_asic_t * asicp, | ||
57 | __u16 offset, __u16 len, void *buf); | ||
58 | static int cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp, | ||
59 | __u8 reg, __u8 value); | ||
60 | static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp); | ||
61 | static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp); | ||
62 | |||
63 | static inline const char *cat_module_name(int module_id) | ||
64 | { | ||
65 | switch (module_id) { | ||
66 | case 0x10: | ||
67 | return "Processor Slot 0"; | ||
68 | case 0x11: | ||
69 | return "Processor Slot 1"; | ||
70 | case 0x12: | ||
71 | return "Processor Slot 2"; | ||
72 | case 0x13: | ||
73 | return "Processor Slot 4"; | ||
74 | case 0x14: | ||
75 | return "Memory Slot 0"; | ||
76 | case 0x15: | ||
77 | return "Memory Slot 1"; | ||
78 | case 0x18: | ||
79 | return "Primary Microchannel"; | ||
80 | case 0x19: | ||
81 | return "Secondary Microchannel"; | ||
82 | case 0x1a: | ||
83 | return "Power Supply Interface"; | ||
84 | case 0x1c: | ||
85 | return "Processor Slot 5"; | ||
86 | case 0x1d: | ||
87 | return "Processor Slot 6"; | ||
88 | case 0x1e: | ||
89 | return "Processor Slot 7"; | ||
90 | case 0x1f: | ||
91 | return "Processor Slot 8"; | ||
92 | default: | ||
93 | return "Unknown Module"; | ||
94 | } | ||
95 | } | ||
96 | |||
97 | static int sspb = 0; /* stores the super port location */ | ||
98 | int voyager_8slot = 0; /* set to true if a 51xx monster */ | ||
99 | |||
100 | voyager_module_t *voyager_cat_list; | ||
101 | |||
102 | /* the I/O port assignments for the VIC and QIC */ | ||
103 | static struct resource vic_res = { | ||
104 | .name = "Voyager Interrupt Controller", | ||
105 | .start = 0xFC00, | ||
106 | .end = 0xFC6F | ||
107 | }; | ||
108 | static struct resource qic_res = { | ||
109 | .name = "Quad Interrupt Controller", | ||
110 | .start = 0xFC70, | ||
111 | .end = 0xFCFF | ||
112 | }; | ||
113 | |||
114 | /* This function is used to pack a data bit stream inside a message. | ||
115 | * It writes num_bits of the data buffer in msg starting at start_bit. | ||
116 | * Note: This function assumes that any unused bit in the data stream | ||
117 | * is set to zero so that the ors will work correctly */ | ||
118 | static void | ||
119 | cat_pack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits) | ||
120 | { | ||
121 | /* compute initial shift needed */ | ||
122 | const __u16 offset = start_bit % BITS_PER_BYTE; | ||
123 | __u16 len = num_bits / BITS_PER_BYTE; | ||
124 | __u16 byte = start_bit / BITS_PER_BYTE; | ||
125 | __u16 residue = (num_bits % BITS_PER_BYTE) + offset; | ||
126 | int i; | ||
127 | |||
128 | /* adjust if we have more than a byte of residue */ | ||
129 | if (residue >= BITS_PER_BYTE) { | ||
130 | residue -= BITS_PER_BYTE; | ||
131 | len++; | ||
132 | } | ||
133 | |||
134 | /* clear out the bits. We assume here that if len==0 then | ||
135 | * residue >= offset. This is always true for the catbus | ||
136 | * operations */ | ||
137 | msg[byte] &= 0xff << (BITS_PER_BYTE - offset); | ||
138 | msg[byte++] |= data[0] >> offset; | ||
139 | if (len == 0) | ||
140 | return; | ||
141 | for (i = 1; i < len; i++) | ||
142 | msg[byte++] = (data[i - 1] << (BITS_PER_BYTE - offset)) | ||
143 | | (data[i] >> offset); | ||
144 | if (residue != 0) { | ||
145 | __u8 mask = 0xff >> residue; | ||
146 | __u8 last_byte = data[i - 1] << (BITS_PER_BYTE - offset) | ||
147 | | (data[i] >> offset); | ||
148 | |||
149 | last_byte &= ~mask; | ||
150 | msg[byte] &= mask; | ||
151 | msg[byte] |= last_byte; | ||
152 | } | ||
153 | return; | ||
154 | } | ||
155 | |||
156 | /* unpack the data again (same arguments as cat_pack()). data buffer | ||
157 | * must be zero populated. | ||
158 | * | ||
159 | * Function: given a message string move to start_bit and copy num_bits into | ||
160 | * data (starting at bit 0 in data). | ||
161 | */ | ||
162 | static void | ||
163 | cat_unpack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits) | ||
164 | { | ||
165 | /* compute initial shift needed */ | ||
166 | const __u16 offset = start_bit % BITS_PER_BYTE; | ||
167 | __u16 len = num_bits / BITS_PER_BYTE; | ||
168 | const __u8 last_bits = num_bits % BITS_PER_BYTE; | ||
169 | __u16 byte = start_bit / BITS_PER_BYTE; | ||
170 | int i; | ||
171 | |||
172 | if (last_bits != 0) | ||
173 | len++; | ||
174 | |||
175 | /* special case: want < 8 bits from msg and we can get it from | ||
176 | * a single byte of the msg */ | ||
177 | if (len == 0 && BITS_PER_BYTE - offset >= num_bits) { | ||
178 | data[0] = msg[byte] << offset; | ||
179 | data[0] &= 0xff >> (BITS_PER_BYTE - num_bits); | ||
180 | return; | ||
181 | } | ||
182 | for (i = 0; i < len; i++) { | ||
183 | /* this annoying if has to be done just in case a read of | ||
184 | * msg one beyond the array causes a panic */ | ||
185 | if (offset != 0) { | ||
186 | data[i] = msg[byte++] << offset; | ||
187 | data[i] |= msg[byte] >> (BITS_PER_BYTE - offset); | ||
188 | } else { | ||
189 | data[i] = msg[byte++]; | ||
190 | } | ||
191 | } | ||
192 | /* do we need to truncate the final byte */ | ||
193 | if (last_bits != 0) { | ||
194 | data[i - 1] &= 0xff << (BITS_PER_BYTE - last_bits); | ||
195 | } | ||
196 | return; | ||
197 | } | ||
198 | |||
199 | static void | ||
200 | cat_build_header(__u8 * header, const __u16 len, const __u16 smallest_reg_bits, | ||
201 | const __u16 longest_reg_bits) | ||
202 | { | ||
203 | int i; | ||
204 | __u16 start_bit = (smallest_reg_bits - 1) % BITS_PER_BYTE; | ||
205 | __u8 *last_byte = &header[len - 1]; | ||
206 | |||
207 | if (start_bit == 0) | ||
208 | start_bit = 1; /* must have at least one bit in the hdr */ | ||
209 | |||
210 | for (i = 0; i < len; i++) | ||
211 | header[i] = 0; | ||
212 | |||
213 | for (i = start_bit; i > 0; i--) | ||
214 | *last_byte = ((*last_byte) << 1) + 1; | ||
215 | |||
216 | } | ||
217 | |||
218 | static int | ||
219 | cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 op) | ||
220 | { | ||
221 | __u8 parity, inst, inst_buf[4] = { 0 }; | ||
222 | __u8 iseq[VOYAGER_MAX_SCAN_PATH], hseq[VOYAGER_MAX_REG_SIZE]; | ||
223 | __u16 ibytes, hbytes, padbits; | ||
224 | int i; | ||
225 | |||
226 | /* | ||
227 | * Parity is the parity of the register number + 1 (READ_REGISTER | ||
228 | * and WRITE_REGISTER always add '1' to the number of bits == 1) | ||
229 | */ | ||
230 | parity = (__u8) (1 + (reg & 0x01) + | ||
231 | ((__u8) (reg & 0x02) >> 1) + | ||
232 | ((__u8) (reg & 0x04) >> 2) + | ||
233 | ((__u8) (reg & 0x08) >> 3)) % 2; | ||
234 | |||
235 | inst = ((parity << 7) | (reg << 2) | op); | ||
236 | |||
237 | outb(VOYAGER_CAT_IRCYC, CAT_CMD); | ||
238 | if (!modp->scan_path_connected) { | ||
239 | if (asicp->asic_id != VOYAGER_CAT_ID) { | ||
240 | printk | ||
241 | ("**WARNING***: cat_sendinst has disconnected scan path not to CAT asic\n"); | ||
242 | return 1; | ||
243 | } | ||
244 | outb(VOYAGER_CAT_HEADER, CAT_DATA); | ||
245 | outb(inst, CAT_DATA); | ||
246 | if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) { | ||
247 | CDEBUG(("VOYAGER CAT: cat_sendinst failed to get CAT_HEADER\n")); | ||
248 | return 1; | ||
249 | } | ||
250 | return 0; | ||
251 | } | ||
252 | ibytes = modp->inst_bits / BITS_PER_BYTE; | ||
253 | if ((padbits = modp->inst_bits % BITS_PER_BYTE) != 0) { | ||
254 | padbits = BITS_PER_BYTE - padbits; | ||
255 | ibytes++; | ||
256 | } | ||
257 | hbytes = modp->largest_reg / BITS_PER_BYTE; | ||
258 | if (modp->largest_reg % BITS_PER_BYTE) | ||
259 | hbytes++; | ||
260 | CDEBUG(("cat_sendinst: ibytes=%d, hbytes=%d\n", ibytes, hbytes)); | ||
261 | /* initialise the instruction sequence to 0xff */ | ||
262 | for (i = 0; i < ibytes + hbytes; i++) | ||
263 | iseq[i] = 0xff; | ||
264 | cat_build_header(hseq, hbytes, modp->smallest_reg, modp->largest_reg); | ||
265 | cat_pack(iseq, modp->inst_bits, hseq, hbytes * BITS_PER_BYTE); | ||
266 | inst_buf[0] = inst; | ||
267 | inst_buf[1] = 0xFF >> (modp->largest_reg % BITS_PER_BYTE); | ||
268 | cat_pack(iseq, asicp->bit_location, inst_buf, asicp->ireg_length); | ||
269 | #ifdef VOYAGER_CAT_DEBUG | ||
270 | printk("ins = 0x%x, iseq: ", inst); | ||
271 | for (i = 0; i < ibytes + hbytes; i++) | ||
272 | printk("0x%x ", iseq[i]); | ||
273 | printk("\n"); | ||
274 | #endif | ||
275 | if (cat_shiftout(iseq, ibytes, hbytes, padbits)) { | ||
276 | CDEBUG(("VOYAGER CAT: cat_sendinst: cat_shiftout failed\n")); | ||
277 | return 1; | ||
278 | } | ||
279 | CDEBUG(("CAT SHIFTOUT DONE\n")); | ||
280 | return 0; | ||
281 | } | ||
282 | |||
283 | static int | ||
284 | cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, | ||
285 | __u8 * value) | ||
286 | { | ||
287 | if (!modp->scan_path_connected) { | ||
288 | if (asicp->asic_id != VOYAGER_CAT_ID) { | ||
289 | CDEBUG(("VOYAGER CAT: ERROR: cat_getdata to CAT asic with scan path connected\n")); | ||
290 | return 1; | ||
291 | } | ||
292 | if (reg > VOYAGER_SUBADDRHI) | ||
293 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
294 | outb(VOYAGER_CAT_DRCYC, CAT_CMD); | ||
295 | outb(VOYAGER_CAT_HEADER, CAT_DATA); | ||
296 | *value = inb(CAT_DATA); | ||
297 | outb(0xAA, CAT_DATA); | ||
298 | if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) { | ||
299 | CDEBUG(("cat_getdata: failed to get VOYAGER_CAT_HEADER\n")); | ||
300 | return 1; | ||
301 | } | ||
302 | return 0; | ||
303 | } else { | ||
304 | __u16 sbits = modp->num_asics - 1 + asicp->ireg_length; | ||
305 | __u16 sbytes = sbits / BITS_PER_BYTE; | ||
306 | __u16 tbytes; | ||
307 | __u8 string[VOYAGER_MAX_SCAN_PATH], | ||
308 | trailer[VOYAGER_MAX_REG_SIZE]; | ||
309 | __u8 padbits; | ||
310 | int i; | ||
311 | |||
312 | outb(VOYAGER_CAT_DRCYC, CAT_CMD); | ||
313 | |||
314 | if ((padbits = sbits % BITS_PER_BYTE) != 0) { | ||
315 | padbits = BITS_PER_BYTE - padbits; | ||
316 | sbytes++; | ||
317 | } | ||
318 | tbytes = asicp->ireg_length / BITS_PER_BYTE; | ||
319 | if (asicp->ireg_length % BITS_PER_BYTE) | ||
320 | tbytes++; | ||
321 | CDEBUG(("cat_getdata: tbytes = %d, sbytes = %d, padbits = %d\n", | ||
322 | tbytes, sbytes, padbits)); | ||
323 | cat_build_header(trailer, tbytes, 1, asicp->ireg_length); | ||
324 | |||
325 | for (i = tbytes - 1; i >= 0; i--) { | ||
326 | outb(trailer[i], CAT_DATA); | ||
327 | string[sbytes + i] = inb(CAT_DATA); | ||
328 | } | ||
329 | |||
330 | for (i = sbytes - 1; i >= 0; i--) { | ||
331 | outb(0xaa, CAT_DATA); | ||
332 | string[i] = inb(CAT_DATA); | ||
333 | } | ||
334 | *value = 0; | ||
335 | cat_unpack(string, | ||
336 | padbits + (tbytes * BITS_PER_BYTE) + | ||
337 | asicp->asic_location, value, asicp->ireg_length); | ||
338 | #ifdef VOYAGER_CAT_DEBUG | ||
339 | printk("value=0x%x, string: ", *value); | ||
340 | for (i = 0; i < tbytes + sbytes; i++) | ||
341 | printk("0x%x ", string[i]); | ||
342 | printk("\n"); | ||
343 | #endif | ||
344 | |||
345 | /* sanity check the rest of the return */ | ||
346 | for (i = 0; i < tbytes; i++) { | ||
347 | __u8 input = 0; | ||
348 | |||
349 | cat_unpack(string, padbits + (i * BITS_PER_BYTE), | ||
350 | &input, BITS_PER_BYTE); | ||
351 | if (trailer[i] != input) { | ||
352 | CDEBUG(("cat_getdata: failed to sanity check rest of ret(%d) 0x%x != 0x%x\n", i, input, trailer[i])); | ||
353 | return 1; | ||
354 | } | ||
355 | } | ||
356 | CDEBUG(("cat_getdata DONE\n")); | ||
357 | return 0; | ||
358 | } | ||
359 | } | ||
360 | |||
361 | static int | ||
362 | cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits) | ||
363 | { | ||
364 | int i; | ||
365 | |||
366 | for (i = data_bytes + header_bytes - 1; i >= header_bytes; i--) | ||
367 | outb(data[i], CAT_DATA); | ||
368 | |||
369 | for (i = header_bytes - 1; i >= 0; i--) { | ||
370 | __u8 header = 0; | ||
371 | __u8 input; | ||
372 | |||
373 | outb(data[i], CAT_DATA); | ||
374 | input = inb(CAT_DATA); | ||
375 | CDEBUG(("cat_shiftout: returned 0x%x\n", input)); | ||
376 | cat_unpack(data, ((data_bytes + i) * BITS_PER_BYTE) - pad_bits, | ||
377 | &header, BITS_PER_BYTE); | ||
378 | if (input != header) { | ||
379 | CDEBUG(("VOYAGER CAT: cat_shiftout failed to return header 0x%x != 0x%x\n", input, header)); | ||
380 | return 1; | ||
381 | } | ||
382 | } | ||
383 | return 0; | ||
384 | } | ||
385 | |||
386 | static int | ||
387 | cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp, | ||
388 | __u8 reg, __u8 value) | ||
389 | { | ||
390 | outb(VOYAGER_CAT_DRCYC, CAT_CMD); | ||
391 | if (!modp->scan_path_connected) { | ||
392 | if (asicp->asic_id != VOYAGER_CAT_ID) { | ||
393 | CDEBUG(("VOYAGER CAT: ERROR: scan path disconnected when asic != CAT\n")); | ||
394 | return 1; | ||
395 | } | ||
396 | outb(VOYAGER_CAT_HEADER, CAT_DATA); | ||
397 | outb(value, CAT_DATA); | ||
398 | if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) { | ||
399 | CDEBUG(("cat_senddata: failed to get correct header response to sent data\n")); | ||
400 | return 1; | ||
401 | } | ||
402 | if (reg > VOYAGER_SUBADDRHI) { | ||
403 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
404 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
405 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
406 | } | ||
407 | |||
408 | return 0; | ||
409 | } else { | ||
410 | __u16 hbytes = asicp->ireg_length / BITS_PER_BYTE; | ||
411 | __u16 dbytes = | ||
412 | (modp->num_asics - 1 + asicp->ireg_length) / BITS_PER_BYTE; | ||
413 | __u8 padbits, dseq[VOYAGER_MAX_SCAN_PATH], | ||
414 | hseq[VOYAGER_MAX_REG_SIZE]; | ||
415 | int i; | ||
416 | |||
417 | if ((padbits = (modp->num_asics - 1 | ||
418 | + asicp->ireg_length) % BITS_PER_BYTE) != 0) { | ||
419 | padbits = BITS_PER_BYTE - padbits; | ||
420 | dbytes++; | ||
421 | } | ||
422 | if (asicp->ireg_length % BITS_PER_BYTE) | ||
423 | hbytes++; | ||
424 | |||
425 | cat_build_header(hseq, hbytes, 1, asicp->ireg_length); | ||
426 | |||
427 | for (i = 0; i < dbytes + hbytes; i++) | ||
428 | dseq[i] = 0xff; | ||
429 | CDEBUG(("cat_senddata: dbytes=%d, hbytes=%d, padbits=%d\n", | ||
430 | dbytes, hbytes, padbits)); | ||
431 | cat_pack(dseq, modp->num_asics - 1 + asicp->ireg_length, | ||
432 | hseq, hbytes * BITS_PER_BYTE); | ||
433 | cat_pack(dseq, asicp->asic_location, &value, | ||
434 | asicp->ireg_length); | ||
435 | #ifdef VOYAGER_CAT_DEBUG | ||
436 | printk("dseq "); | ||
437 | for (i = 0; i < hbytes + dbytes; i++) { | ||
438 | printk("0x%x ", dseq[i]); | ||
439 | } | ||
440 | printk("\n"); | ||
441 | #endif | ||
442 | return cat_shiftout(dseq, dbytes, hbytes, padbits); | ||
443 | } | ||
444 | } | ||
445 | |||
446 | static int | ||
447 | cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 value) | ||
448 | { | ||
449 | if (cat_sendinst(modp, asicp, reg, VOYAGER_WRITE_CONFIG)) | ||
450 | return 1; | ||
451 | return cat_senddata(modp, asicp, reg, value); | ||
452 | } | ||
453 | |||
454 | static int | ||
455 | cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, | ||
456 | __u8 * value) | ||
457 | { | ||
458 | if (cat_sendinst(modp, asicp, reg, VOYAGER_READ_CONFIG)) | ||
459 | return 1; | ||
460 | return cat_getdata(modp, asicp, reg, value); | ||
461 | } | ||
462 | |||
463 | static int | ||
464 | cat_subaddrsetup(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset, | ||
465 | __u16 len) | ||
466 | { | ||
467 | __u8 val; | ||
468 | |||
469 | if (len > 1) { | ||
470 | /* set auto increment */ | ||
471 | __u8 newval; | ||
472 | |||
473 | if (cat_read(modp, asicp, VOYAGER_AUTO_INC_REG, &val)) { | ||
474 | CDEBUG(("cat_subaddrsetup: read of VOYAGER_AUTO_INC_REG failed\n")); | ||
475 | return 1; | ||
476 | } | ||
477 | CDEBUG(("cat_subaddrsetup: VOYAGER_AUTO_INC_REG = 0x%x\n", | ||
478 | val)); | ||
479 | newval = val | VOYAGER_AUTO_INC; | ||
480 | if (newval != val) { | ||
481 | if (cat_write(modp, asicp, VOYAGER_AUTO_INC_REG, val)) { | ||
482 | CDEBUG(("cat_subaddrsetup: write to VOYAGER_AUTO_INC_REG failed\n")); | ||
483 | return 1; | ||
484 | } | ||
485 | } | ||
486 | } | ||
487 | if (cat_write(modp, asicp, VOYAGER_SUBADDRLO, (__u8) (offset & 0xff))) { | ||
488 | CDEBUG(("cat_subaddrsetup: write to SUBADDRLO failed\n")); | ||
489 | return 1; | ||
490 | } | ||
491 | if (asicp->subaddr > VOYAGER_SUBADDR_LO) { | ||
492 | if (cat_write | ||
493 | (modp, asicp, VOYAGER_SUBADDRHI, (__u8) (offset >> 8))) { | ||
494 | CDEBUG(("cat_subaddrsetup: write to SUBADDRHI failed\n")); | ||
495 | return 1; | ||
496 | } | ||
497 | cat_read(modp, asicp, VOYAGER_SUBADDRHI, &val); | ||
498 | CDEBUG(("cat_subaddrsetup: offset = %d, hi = %d\n", offset, | ||
499 | val)); | ||
500 | } | ||
501 | cat_read(modp, asicp, VOYAGER_SUBADDRLO, &val); | ||
502 | CDEBUG(("cat_subaddrsetup: offset = %d, lo = %d\n", offset, val)); | ||
503 | return 0; | ||
504 | } | ||
505 | |||
506 | static int | ||
507 | cat_subwrite(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset, | ||
508 | __u16 len, void *buf) | ||
509 | { | ||
510 | int i, retval; | ||
511 | |||
512 | /* FIXME: need special actions for VOYAGER_CAT_ID here */ | ||
513 | if (asicp->asic_id == VOYAGER_CAT_ID) { | ||
514 | CDEBUG(("cat_subwrite: ATTEMPT TO WRITE TO CAT ASIC\n")); | ||
515 | /* FIXME -- This is supposed to be handled better | ||
516 | * There is a problem writing to the cat asic in the | ||
517 | * PSI. The 30us delay seems to work, though */ | ||
518 | udelay(30); | ||
519 | } | ||
520 | |||
521 | if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) { | ||
522 | printk("cat_subwrite: cat_subaddrsetup FAILED\n"); | ||
523 | return retval; | ||
524 | } | ||
525 | |||
526 | if (cat_sendinst | ||
527 | (modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_WRITE_CONFIG)) { | ||
528 | printk("cat_subwrite: cat_sendinst FAILED\n"); | ||
529 | return 1; | ||
530 | } | ||
531 | for (i = 0; i < len; i++) { | ||
532 | if (cat_senddata(modp, asicp, 0xFF, ((__u8 *) buf)[i])) { | ||
533 | printk | ||
534 | ("cat_subwrite: cat_sendata element at %d FAILED\n", | ||
535 | i); | ||
536 | return 1; | ||
537 | } | ||
538 | } | ||
539 | return 0; | ||
540 | } | ||
541 | static int | ||
542 | cat_subread(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset, | ||
543 | __u16 len, void *buf) | ||
544 | { | ||
545 | int i, retval; | ||
546 | |||
547 | if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) { | ||
548 | CDEBUG(("cat_subread: cat_subaddrsetup FAILED\n")); | ||
549 | return retval; | ||
550 | } | ||
551 | |||
552 | if (cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_READ_CONFIG)) { | ||
553 | CDEBUG(("cat_subread: cat_sendinst failed\n")); | ||
554 | return 1; | ||
555 | } | ||
556 | for (i = 0; i < len; i++) { | ||
557 | if (cat_getdata(modp, asicp, 0xFF, &((__u8 *) buf)[i])) { | ||
558 | CDEBUG(("cat_subread: cat_getdata element %d failed\n", | ||
559 | i)); | ||
560 | return 1; | ||
561 | } | ||
562 | } | ||
563 | return 0; | ||
564 | } | ||
565 | |||
566 | /* buffer for storing EPROM data read in during initialisation */ | ||
567 | static __initdata __u8 eprom_buf[0xFFFF]; | ||
568 | static voyager_module_t *voyager_initial_module; | ||
569 | |||
570 | /* Initialise the cat bus components. We assume this is called by the | ||
571 | * boot cpu *after* all memory initialisation has been done (so we can | ||
572 | * use kmalloc) but before smp initialisation, so we can probe the SMP | ||
573 | * configuration and pick up necessary information. */ | ||
574 | void __init voyager_cat_init(void) | ||
575 | { | ||
576 | voyager_module_t **modpp = &voyager_initial_module; | ||
577 | voyager_asic_t **asicpp; | ||
578 | voyager_asic_t *qabc_asic = NULL; | ||
579 | int i, j; | ||
580 | unsigned long qic_addr = 0; | ||
581 | __u8 qabc_data[0x20]; | ||
582 | __u8 num_submodules, val; | ||
583 | voyager_eprom_hdr_t *eprom_hdr = (voyager_eprom_hdr_t *) & eprom_buf[0]; | ||
584 | |||
585 | __u8 cmos[4]; | ||
586 | unsigned long addr; | ||
587 | |||
588 | /* initiallise the SUS mailbox */ | ||
589 | for (i = 0; i < sizeof(cmos); i++) | ||
590 | cmos[i] = voyager_extended_cmos_read(VOYAGER_DUMP_LOCATION + i); | ||
591 | addr = *(unsigned long *)cmos; | ||
592 | if ((addr & 0xff000000) != 0xff000000) { | ||
593 | printk(KERN_ERR | ||
594 | "Voyager failed to get SUS mailbox (addr = 0x%lx\n", | ||
595 | addr); | ||
596 | } else { | ||
597 | static struct resource res; | ||
598 | |||
599 | res.name = "voyager SUS"; | ||
600 | res.start = addr; | ||
601 | res.end = addr + 0x3ff; | ||
602 | |||
603 | request_resource(&iomem_resource, &res); | ||
604 | voyager_SUS = (struct voyager_SUS *) | ||
605 | ioremap(addr, 0x400); | ||
606 | printk(KERN_NOTICE "Voyager SUS mailbox version 0x%x\n", | ||
607 | voyager_SUS->SUS_version); | ||
608 | voyager_SUS->kernel_version = VOYAGER_MAILBOX_VERSION; | ||
609 | voyager_SUS->kernel_flags = VOYAGER_OS_HAS_SYSINT; | ||
610 | } | ||
611 | |||
612 | /* clear the processor counts */ | ||
613 | voyager_extended_vic_processors = 0; | ||
614 | voyager_quad_processors = 0; | ||
615 | |||
616 | printk("VOYAGER: beginning CAT bus probe\n"); | ||
617 | /* set up the SuperSet Port Block which tells us where the | ||
618 | * CAT communication port is */ | ||
619 | sspb = inb(VOYAGER_SSPB_RELOCATION_PORT) * 0x100; | ||
620 | VDEBUG(("VOYAGER DEBUG: sspb = 0x%x\n", sspb)); | ||
621 | |||
622 | /* now find out if were 8 slot or normal */ | ||
623 | if ((inb(VIC_PROC_WHO_AM_I) & EIGHT_SLOT_IDENTIFIER) | ||
624 | == EIGHT_SLOT_IDENTIFIER) { | ||
625 | voyager_8slot = 1; | ||
626 | printk(KERN_NOTICE | ||
627 | "Voyager: Eight slot 51xx configuration detected\n"); | ||
628 | } | ||
629 | |||
630 | for (i = VOYAGER_MIN_MODULE; i <= VOYAGER_MAX_MODULE; i++) { | ||
631 | __u8 input; | ||
632 | int asic; | ||
633 | __u16 eprom_size; | ||
634 | __u16 sp_offset; | ||
635 | |||
636 | outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); | ||
637 | outb(i, VOYAGER_CAT_CONFIG_PORT); | ||
638 | |||
639 | /* check the presence of the module */ | ||
640 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
641 | outb(VOYAGER_CAT_IRCYC, CAT_CMD); | ||
642 | outb(VOYAGER_CAT_HEADER, CAT_DATA); | ||
643 | /* stream series of alternating 1's and 0's to stimulate | ||
644 | * response */ | ||
645 | outb(0xAA, CAT_DATA); | ||
646 | input = inb(CAT_DATA); | ||
647 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
648 | if (input != VOYAGER_CAT_HEADER) { | ||
649 | continue; | ||
650 | } | ||
651 | CDEBUG(("VOYAGER DEBUG: found module id 0x%x, %s\n", i, | ||
652 | cat_module_name(i))); | ||
653 | *modpp = kmalloc(sizeof(voyager_module_t), GFP_KERNEL); /*&voyager_module_storage[cat_count++]; */ | ||
654 | if (*modpp == NULL) { | ||
655 | printk("**WARNING** kmalloc failure in cat_init\n"); | ||
656 | continue; | ||
657 | } | ||
658 | memset(*modpp, 0, sizeof(voyager_module_t)); | ||
659 | /* need temporary asic for cat_subread. It will be | ||
660 | * filled in correctly later */ | ||
661 | (*modpp)->asic = kmalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count]; */ | ||
662 | if ((*modpp)->asic == NULL) { | ||
663 | printk("**WARNING** kmalloc failure in cat_init\n"); | ||
664 | continue; | ||
665 | } | ||
666 | memset((*modpp)->asic, 0, sizeof(voyager_asic_t)); | ||
667 | (*modpp)->asic->asic_id = VOYAGER_CAT_ID; | ||
668 | (*modpp)->asic->subaddr = VOYAGER_SUBADDR_HI; | ||
669 | (*modpp)->module_addr = i; | ||
670 | (*modpp)->scan_path_connected = 0; | ||
671 | if (i == VOYAGER_PSI) { | ||
672 | /* Exception leg for modules with no EEPROM */ | ||
673 | printk("Module \"%s\"\n", cat_module_name(i)); | ||
674 | continue; | ||
675 | } | ||
676 | |||
677 | CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET)); | ||
678 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
679 | cat_disconnect(*modpp, (*modpp)->asic); | ||
680 | if (cat_subread(*modpp, (*modpp)->asic, | ||
681 | VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size), | ||
682 | &eprom_size)) { | ||
683 | printk | ||
684 | ("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n", | ||
685 | i); | ||
686 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
687 | continue; | ||
688 | } | ||
689 | if (eprom_size > sizeof(eprom_buf)) { | ||
690 | printk | ||
691 | ("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n", | ||
692 | i, eprom_size); | ||
693 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
694 | continue; | ||
695 | } | ||
696 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
697 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
698 | CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i, | ||
699 | eprom_size)); | ||
700 | if (cat_subread | ||
701 | (*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) { | ||
702 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
703 | continue; | ||
704 | } | ||
705 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
706 | printk("Module \"%s\", version 0x%x, tracer 0x%x, asics %d\n", | ||
707 | cat_module_name(i), eprom_hdr->version_id, | ||
708 | *((__u32 *) eprom_hdr->tracer), eprom_hdr->num_asics); | ||
709 | (*modpp)->ee_size = eprom_hdr->ee_size; | ||
710 | (*modpp)->num_asics = eprom_hdr->num_asics; | ||
711 | asicpp = &((*modpp)->asic); | ||
712 | sp_offset = eprom_hdr->scan_path_offset; | ||
713 | /* All we really care about are the Quad cards. We | ||
714 | * identify them because they are in a processor slot | ||
715 | * and have only four asics */ | ||
716 | if ((i < 0x10 || (i >= 0x14 && i < 0x1c) || i > 0x1f)) { | ||
717 | modpp = &((*modpp)->next); | ||
718 | continue; | ||
719 | } | ||
720 | /* Now we know it's in a processor slot, does it have | ||
721 | * a quad baseboard submodule */ | ||
722 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
723 | cat_read(*modpp, (*modpp)->asic, VOYAGER_SUBMODPRESENT, | ||
724 | &num_submodules); | ||
725 | /* lowest two bits, active low */ | ||
726 | num_submodules = ~(0xfc | num_submodules); | ||
727 | CDEBUG(("VOYAGER CAT: %d submodules present\n", | ||
728 | num_submodules)); | ||
729 | if (num_submodules == 0) { | ||
730 | /* fill in the dyadic extended processors */ | ||
731 | __u8 cpu = i & 0x07; | ||
732 | |||
733 | printk("Module \"%s\": Dyadic Processor Card\n", | ||
734 | cat_module_name(i)); | ||
735 | voyager_extended_vic_processors |= (1 << cpu); | ||
736 | cpu += 4; | ||
737 | voyager_extended_vic_processors |= (1 << cpu); | ||
738 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
739 | continue; | ||
740 | } | ||
741 | |||
742 | /* now we want to read the asics on the first submodule, | ||
743 | * which should be the quad base board */ | ||
744 | |||
745 | cat_read(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, &val); | ||
746 | CDEBUG(("cat_init: SUBMODSELECT value = 0x%x\n", val)); | ||
747 | val = (val & 0x7c) | VOYAGER_QUAD_BASEBOARD; | ||
748 | cat_write(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, val); | ||
749 | |||
750 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
751 | |||
752 | CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET)); | ||
753 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
754 | cat_disconnect(*modpp, (*modpp)->asic); | ||
755 | if (cat_subread(*modpp, (*modpp)->asic, | ||
756 | VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size), | ||
757 | &eprom_size)) { | ||
758 | printk | ||
759 | ("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n", | ||
760 | i); | ||
761 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
762 | continue; | ||
763 | } | ||
764 | if (eprom_size > sizeof(eprom_buf)) { | ||
765 | printk | ||
766 | ("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n", | ||
767 | i, eprom_size); | ||
768 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
769 | continue; | ||
770 | } | ||
771 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
772 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
773 | CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i, | ||
774 | eprom_size)); | ||
775 | if (cat_subread | ||
776 | (*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) { | ||
777 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
778 | continue; | ||
779 | } | ||
780 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
781 | /* Now do everything for the QBB submodule 1 */ | ||
782 | (*modpp)->ee_size = eprom_hdr->ee_size; | ||
783 | (*modpp)->num_asics = eprom_hdr->num_asics; | ||
784 | asicpp = &((*modpp)->asic); | ||
785 | sp_offset = eprom_hdr->scan_path_offset; | ||
786 | /* get rid of the dummy CAT asic and read the real one */ | ||
787 | kfree((*modpp)->asic); | ||
788 | for (asic = 0; asic < (*modpp)->num_asics; asic++) { | ||
789 | int j; | ||
790 | voyager_asic_t *asicp = *asicpp = kzalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count++]; */ | ||
791 | voyager_sp_table_t *sp_table; | ||
792 | voyager_at_t *asic_table; | ||
793 | voyager_jtt_t *jtag_table; | ||
794 | |||
795 | if (asicp == NULL) { | ||
796 | printk | ||
797 | ("**WARNING** kmalloc failure in cat_init\n"); | ||
798 | continue; | ||
799 | } | ||
800 | asicpp = &(asicp->next); | ||
801 | asicp->asic_location = asic; | ||
802 | sp_table = | ||
803 | (voyager_sp_table_t *) (eprom_buf + sp_offset); | ||
804 | asicp->asic_id = sp_table->asic_id; | ||
805 | asic_table = | ||
806 | (voyager_at_t *) (eprom_buf + | ||
807 | sp_table->asic_data_offset); | ||
808 | for (j = 0; j < 4; j++) | ||
809 | asicp->jtag_id[j] = asic_table->jtag_id[j]; | ||
810 | jtag_table = | ||
811 | (voyager_jtt_t *) (eprom_buf + | ||
812 | asic_table->jtag_offset); | ||
813 | asicp->ireg_length = jtag_table->ireg_len; | ||
814 | asicp->bit_location = (*modpp)->inst_bits; | ||
815 | (*modpp)->inst_bits += asicp->ireg_length; | ||
816 | if (asicp->ireg_length > (*modpp)->largest_reg) | ||
817 | (*modpp)->largest_reg = asicp->ireg_length; | ||
818 | if (asicp->ireg_length < (*modpp)->smallest_reg || | ||
819 | (*modpp)->smallest_reg == 0) | ||
820 | (*modpp)->smallest_reg = asicp->ireg_length; | ||
821 | CDEBUG(("asic 0x%x, ireg_length=%d, bit_location=%d\n", | ||
822 | asicp->asic_id, asicp->ireg_length, | ||
823 | asicp->bit_location)); | ||
824 | if (asicp->asic_id == VOYAGER_QUAD_QABC) { | ||
825 | CDEBUG(("VOYAGER CAT: QABC ASIC found\n")); | ||
826 | qabc_asic = asicp; | ||
827 | } | ||
828 | sp_offset += sizeof(voyager_sp_table_t); | ||
829 | } | ||
830 | CDEBUG(("Module inst_bits = %d, largest_reg = %d, smallest_reg=%d\n", (*modpp)->inst_bits, (*modpp)->largest_reg, (*modpp)->smallest_reg)); | ||
831 | /* OK, now we have the QUAD ASICs set up, use them. | ||
832 | * we need to: | ||
833 | * | ||
834 | * 1. Find the Memory area for the Quad CPIs. | ||
835 | * 2. Find the Extended VIC processor | ||
836 | * 3. Configure a second extended VIC processor (This | ||
837 | * cannot be done for the 51xx. | ||
838 | * */ | ||
839 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
840 | cat_connect(*modpp, (*modpp)->asic); | ||
841 | CDEBUG(("CAT CONNECTED!!\n")); | ||
842 | cat_subread(*modpp, qabc_asic, 0, sizeof(qabc_data), qabc_data); | ||
843 | qic_addr = qabc_data[5] << 8; | ||
844 | qic_addr = (qic_addr | qabc_data[6]) << 8; | ||
845 | qic_addr = (qic_addr | qabc_data[7]) << 8; | ||
846 | printk | ||
847 | ("Module \"%s\": Quad Processor Card; CPI 0x%lx, SET=0x%x\n", | ||
848 | cat_module_name(i), qic_addr, qabc_data[8]); | ||
849 | #if 0 /* plumbing fails---FIXME */ | ||
850 | if ((qabc_data[8] & 0xf0) == 0) { | ||
851 | /* FIXME: 32 way 8 CPU slot monster cannot be | ||
852 | * plumbed this way---need to check for it */ | ||
853 | |||
854 | printk("Plumbing second Extended Quad Processor\n"); | ||
855 | /* second VIC line hardwired to Quad CPU 1 */ | ||
856 | qabc_data[8] |= 0x20; | ||
857 | cat_subwrite(*modpp, qabc_asic, 8, 1, &qabc_data[8]); | ||
858 | #ifdef VOYAGER_CAT_DEBUG | ||
859 | /* verify plumbing */ | ||
860 | cat_subread(*modpp, qabc_asic, 8, 1, &qabc_data[8]); | ||
861 | if ((qabc_data[8] & 0xf0) == 0) { | ||
862 | CDEBUG(("PLUMBING FAILED: 0x%x\n", | ||
863 | qabc_data[8])); | ||
864 | } | ||
865 | #endif | ||
866 | } | ||
867 | #endif | ||
868 | |||
869 | { | ||
870 | struct resource *res = | ||
871 | kzalloc(sizeof(struct resource), GFP_KERNEL); | ||
872 | res->name = kmalloc(128, GFP_KERNEL); | ||
873 | sprintf((char *)res->name, "Voyager %s Quad CPI", | ||
874 | cat_module_name(i)); | ||
875 | res->start = qic_addr; | ||
876 | res->end = qic_addr + 0x3ff; | ||
877 | request_resource(&iomem_resource, res); | ||
878 | } | ||
879 | |||
880 | qic_addr = (unsigned long)ioremap_cache(qic_addr, 0x400); | ||
881 | |||
882 | for (j = 0; j < 4; j++) { | ||
883 | __u8 cpu; | ||
884 | |||
885 | if (voyager_8slot) { | ||
886 | /* 8 slot has a different mapping, | ||
887 | * each slot has only one vic line, so | ||
888 | * 1 cpu in each slot must be < 8 */ | ||
889 | cpu = (i & 0x07) + j * 8; | ||
890 | } else { | ||
891 | cpu = (i & 0x03) + j * 4; | ||
892 | } | ||
893 | if ((qabc_data[8] & (1 << j))) { | ||
894 | voyager_extended_vic_processors |= (1 << cpu); | ||
895 | } | ||
896 | if (qabc_data[8] & (1 << (j + 4))) { | ||
897 | /* Second SET register plumbed: Quad | ||
898 | * card has two VIC connected CPUs. | ||
899 | * Secondary cannot be booted as a VIC | ||
900 | * CPU */ | ||
901 | voyager_extended_vic_processors |= (1 << cpu); | ||
902 | voyager_allowed_boot_processors &= | ||
903 | (~(1 << cpu)); | ||
904 | } | ||
905 | |||
906 | voyager_quad_processors |= (1 << cpu); | ||
907 | voyager_quad_cpi_addr[cpu] = (struct voyager_qic_cpi *) | ||
908 | (qic_addr + (j << 8)); | ||
909 | CDEBUG(("CPU%d: CPI address 0x%lx\n", cpu, | ||
910 | (unsigned long)voyager_quad_cpi_addr[cpu])); | ||
911 | } | ||
912 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
913 | |||
914 | *asicpp = NULL; | ||
915 | modpp = &((*modpp)->next); | ||
916 | } | ||
917 | *modpp = NULL; | ||
918 | printk | ||
919 | ("CAT Bus Initialisation finished: extended procs 0x%x, quad procs 0x%x, allowed vic boot = 0x%x\n", | ||
920 | voyager_extended_vic_processors, voyager_quad_processors, | ||
921 | voyager_allowed_boot_processors); | ||
922 | request_resource(&ioport_resource, &vic_res); | ||
923 | if (voyager_quad_processors) | ||
924 | request_resource(&ioport_resource, &qic_res); | ||
925 | /* set up the front power switch */ | ||
926 | } | ||
927 | |||
928 | int voyager_cat_readb(__u8 module, __u8 asic, int reg) | ||
929 | { | ||
930 | return 0; | ||
931 | } | ||
932 | |||
933 | static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp) | ||
934 | { | ||
935 | __u8 val; | ||
936 | int err = 0; | ||
937 | |||
938 | if (!modp->scan_path_connected) | ||
939 | return 0; | ||
940 | if (asicp->asic_id != VOYAGER_CAT_ID) { | ||
941 | CDEBUG(("cat_disconnect: ASIC is not CAT\n")); | ||
942 | return 1; | ||
943 | } | ||
944 | err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val); | ||
945 | if (err) { | ||
946 | CDEBUG(("cat_disconnect: failed to read SCANPATH\n")); | ||
947 | return err; | ||
948 | } | ||
949 | val &= VOYAGER_DISCONNECT_ASIC; | ||
950 | err = cat_write(modp, asicp, VOYAGER_SCANPATH, val); | ||
951 | if (err) { | ||
952 | CDEBUG(("cat_disconnect: failed to write SCANPATH\n")); | ||
953 | return err; | ||
954 | } | ||
955 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
956 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
957 | modp->scan_path_connected = 0; | ||
958 | |||
959 | return 0; | ||
960 | } | ||
961 | |||
962 | static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp) | ||
963 | { | ||
964 | __u8 val; | ||
965 | int err = 0; | ||
966 | |||
967 | if (modp->scan_path_connected) | ||
968 | return 0; | ||
969 | if (asicp->asic_id != VOYAGER_CAT_ID) { | ||
970 | CDEBUG(("cat_connect: ASIC is not CAT\n")); | ||
971 | return 1; | ||
972 | } | ||
973 | |||
974 | err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val); | ||
975 | if (err) { | ||
976 | CDEBUG(("cat_connect: failed to read SCANPATH\n")); | ||
977 | return err; | ||
978 | } | ||
979 | val |= VOYAGER_CONNECT_ASIC; | ||
980 | err = cat_write(modp, asicp, VOYAGER_SCANPATH, val); | ||
981 | if (err) { | ||
982 | CDEBUG(("cat_connect: failed to write SCANPATH\n")); | ||
983 | return err; | ||
984 | } | ||
985 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
986 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
987 | modp->scan_path_connected = 1; | ||
988 | |||
989 | return 0; | ||
990 | } | ||
991 | |||
992 | void voyager_cat_power_off(void) | ||
993 | { | ||
994 | /* Power the machine off by writing to the PSI over the CAT | ||
995 | * bus */ | ||
996 | __u8 data; | ||
997 | voyager_module_t psi = { 0 }; | ||
998 | voyager_asic_t psi_asic = { 0 }; | ||
999 | |||
1000 | psi.asic = &psi_asic; | ||
1001 | psi.asic->asic_id = VOYAGER_CAT_ID; | ||
1002 | psi.asic->subaddr = VOYAGER_SUBADDR_HI; | ||
1003 | psi.module_addr = VOYAGER_PSI; | ||
1004 | psi.scan_path_connected = 0; | ||
1005 | |||
1006 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1007 | /* Connect the PSI to the CAT Bus */ | ||
1008 | outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); | ||
1009 | outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT); | ||
1010 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1011 | cat_disconnect(&psi, &psi_asic); | ||
1012 | /* Read the status */ | ||
1013 | cat_subread(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data); | ||
1014 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1015 | CDEBUG(("PSI STATUS 0x%x\n", data)); | ||
1016 | /* These two writes are power off prep and perform */ | ||
1017 | data = PSI_CLEAR; | ||
1018 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1019 | cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data); | ||
1020 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1021 | data = PSI_POWER_DOWN; | ||
1022 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1023 | cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data); | ||
1024 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1025 | } | ||
1026 | |||
1027 | struct voyager_status voyager_status = { 0 }; | ||
1028 | |||
1029 | void voyager_cat_psi(__u8 cmd, __u16 reg, __u8 * data) | ||
1030 | { | ||
1031 | voyager_module_t psi = { 0 }; | ||
1032 | voyager_asic_t psi_asic = { 0 }; | ||
1033 | |||
1034 | psi.asic = &psi_asic; | ||
1035 | psi.asic->asic_id = VOYAGER_CAT_ID; | ||
1036 | psi.asic->subaddr = VOYAGER_SUBADDR_HI; | ||
1037 | psi.module_addr = VOYAGER_PSI; | ||
1038 | psi.scan_path_connected = 0; | ||
1039 | |||
1040 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1041 | /* Connect the PSI to the CAT Bus */ | ||
1042 | outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); | ||
1043 | outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT); | ||
1044 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1045 | cat_disconnect(&psi, &psi_asic); | ||
1046 | switch (cmd) { | ||
1047 | case VOYAGER_PSI_READ: | ||
1048 | cat_read(&psi, &psi_asic, reg, data); | ||
1049 | break; | ||
1050 | case VOYAGER_PSI_WRITE: | ||
1051 | cat_write(&psi, &psi_asic, reg, *data); | ||
1052 | break; | ||
1053 | case VOYAGER_PSI_SUBREAD: | ||
1054 | cat_subread(&psi, &psi_asic, reg, 1, data); | ||
1055 | break; | ||
1056 | case VOYAGER_PSI_SUBWRITE: | ||
1057 | cat_subwrite(&psi, &psi_asic, reg, 1, data); | ||
1058 | break; | ||
1059 | default: | ||
1060 | printk(KERN_ERR "Voyager PSI, unrecognised command %d\n", cmd); | ||
1061 | break; | ||
1062 | } | ||
1063 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1064 | } | ||
1065 | |||
1066 | void voyager_cat_do_common_interrupt(void) | ||
1067 | { | ||
1068 | /* This is caused either by a memory parity error or something | ||
1069 | * in the PSI */ | ||
1070 | __u8 data; | ||
1071 | voyager_module_t psi = { 0 }; | ||
1072 | voyager_asic_t psi_asic = { 0 }; | ||
1073 | struct voyager_psi psi_reg; | ||
1074 | int i; | ||
1075 | re_read: | ||
1076 | psi.asic = &psi_asic; | ||
1077 | psi.asic->asic_id = VOYAGER_CAT_ID; | ||
1078 | psi.asic->subaddr = VOYAGER_SUBADDR_HI; | ||
1079 | psi.module_addr = VOYAGER_PSI; | ||
1080 | psi.scan_path_connected = 0; | ||
1081 | |||
1082 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1083 | /* Connect the PSI to the CAT Bus */ | ||
1084 | outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT); | ||
1085 | outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT); | ||
1086 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1087 | cat_disconnect(&psi, &psi_asic); | ||
1088 | /* Read the status. NOTE: Need to read *all* the PSI regs here | ||
1089 | * otherwise the cmn int will be reasserted */ | ||
1090 | for (i = 0; i < sizeof(psi_reg.regs); i++) { | ||
1091 | cat_read(&psi, &psi_asic, i, &((__u8 *) & psi_reg.regs)[i]); | ||
1092 | } | ||
1093 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1094 | if ((psi_reg.regs.checkbit & 0x02) == 0) { | ||
1095 | psi_reg.regs.checkbit |= 0x02; | ||
1096 | cat_write(&psi, &psi_asic, 5, psi_reg.regs.checkbit); | ||
1097 | printk("VOYAGER RE-READ PSI\n"); | ||
1098 | goto re_read; | ||
1099 | } | ||
1100 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1101 | for (i = 0; i < sizeof(psi_reg.subregs); i++) { | ||
1102 | /* This looks strange, but the PSI doesn't do auto increment | ||
1103 | * correctly */ | ||
1104 | cat_subread(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG + i, | ||
1105 | 1, &((__u8 *) & psi_reg.subregs)[i]); | ||
1106 | } | ||
1107 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1108 | #ifdef VOYAGER_CAT_DEBUG | ||
1109 | printk("VOYAGER PSI: "); | ||
1110 | for (i = 0; i < sizeof(psi_reg.regs); i++) | ||
1111 | printk("%02x ", ((__u8 *) & psi_reg.regs)[i]); | ||
1112 | printk("\n "); | ||
1113 | for (i = 0; i < sizeof(psi_reg.subregs); i++) | ||
1114 | printk("%02x ", ((__u8 *) & psi_reg.subregs)[i]); | ||
1115 | printk("\n"); | ||
1116 | #endif | ||
1117 | if (psi_reg.regs.intstatus & PSI_MON) { | ||
1118 | /* switch off or power fail */ | ||
1119 | |||
1120 | if (psi_reg.subregs.supply & PSI_SWITCH_OFF) { | ||
1121 | if (voyager_status.switch_off) { | ||
1122 | printk(KERN_ERR | ||
1123 | "Voyager front panel switch turned off again---Immediate power off!\n"); | ||
1124 | voyager_cat_power_off(); | ||
1125 | /* not reached */ | ||
1126 | } else { | ||
1127 | printk(KERN_ERR | ||
1128 | "Voyager front panel switch turned off\n"); | ||
1129 | voyager_status.switch_off = 1; | ||
1130 | voyager_status.request_from_kernel = 1; | ||
1131 | wake_up_process(voyager_thread); | ||
1132 | } | ||
1133 | /* Tell the hardware we're taking care of the | ||
1134 | * shutdown, otherwise it will power the box off | ||
1135 | * within 3 seconds of the switch being pressed and, | ||
1136 | * which is much more important to us, continue to | ||
1137 | * assert the common interrupt */ | ||
1138 | data = PSI_CLR_SWITCH_OFF; | ||
1139 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1140 | cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG, | ||
1141 | 1, &data); | ||
1142 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1143 | } else { | ||
1144 | |||
1145 | VDEBUG(("Voyager ac fail reg 0x%x\n", | ||
1146 | psi_reg.subregs.ACfail)); | ||
1147 | if ((psi_reg.subregs.ACfail & AC_FAIL_STAT_CHANGE) == 0) { | ||
1148 | /* No further update */ | ||
1149 | return; | ||
1150 | } | ||
1151 | #if 0 | ||
1152 | /* Don't bother trying to find out who failed. | ||
1153 | * FIXME: This probably makes the code incorrect on | ||
1154 | * anything other than a 345x */ | ||
1155 | for (i = 0; i < 5; i++) { | ||
1156 | if (psi_reg.subregs.ACfail & (1 << i)) { | ||
1157 | break; | ||
1158 | } | ||
1159 | } | ||
1160 | printk(KERN_NOTICE "AC FAIL IN SUPPLY %d\n", i); | ||
1161 | #endif | ||
1162 | /* DON'T do this: it shuts down the AC PSI | ||
1163 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1164 | data = PSI_MASK_MASK | i; | ||
1165 | cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_MASK, | ||
1166 | 1, &data); | ||
1167 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1168 | */ | ||
1169 | printk(KERN_ERR "Voyager AC power failure\n"); | ||
1170 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1171 | data = PSI_COLD_START; | ||
1172 | cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, | ||
1173 | 1, &data); | ||
1174 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1175 | voyager_status.power_fail = 1; | ||
1176 | voyager_status.request_from_kernel = 1; | ||
1177 | wake_up_process(voyager_thread); | ||
1178 | } | ||
1179 | |||
1180 | } else if (psi_reg.regs.intstatus & PSI_FAULT) { | ||
1181 | /* Major fault! */ | ||
1182 | printk(KERN_ERR | ||
1183 | "Voyager PSI Detected major fault, immediate power off!\n"); | ||
1184 | voyager_cat_power_off(); | ||
1185 | /* not reached */ | ||
1186 | } else if (psi_reg.regs.intstatus & (PSI_DC_FAIL | PSI_ALARM | ||
1187 | | PSI_CURRENT | PSI_DVM | ||
1188 | | PSI_PSCFAULT | PSI_STAT_CHG)) { | ||
1189 | /* other psi fault */ | ||
1190 | |||
1191 | printk(KERN_WARNING "Voyager PSI status 0x%x\n", data); | ||
1192 | /* clear the PSI fault */ | ||
1193 | outb(VOYAGER_CAT_RUN, CAT_CMD); | ||
1194 | cat_write(&psi, &psi_asic, VOYAGER_PSI_STATUS_REG, 0); | ||
1195 | outb(VOYAGER_CAT_END, CAT_CMD); | ||
1196 | } | ||
1197 | } | ||
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c deleted file mode 100644 index b9cc84a2a4fc..000000000000 --- a/arch/x86/mach-voyager/voyager_smp.c +++ /dev/null | |||
@@ -1,1807 +0,0 @@ | |||
1 | /* -*- mode: c; c-basic-offset: 8 -*- */ | ||
2 | |||
3 | /* Copyright (C) 1999,2001 | ||
4 | * | ||
5 | * Author: J.E.J.Bottomley@HansenPartnership.com | ||
6 | * | ||
7 | * This file provides all the same external entries as smp.c but uses | ||
8 | * the voyager hal to provide the functionality | ||
9 | */ | ||
10 | #include <linux/cpu.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/mm.h> | ||
13 | #include <linux/kernel_stat.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/mc146818rtc.h> | ||
16 | #include <linux/cache.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/bootmem.h> | ||
21 | #include <linux/completion.h> | ||
22 | #include <asm/desc.h> | ||
23 | #include <asm/voyager.h> | ||
24 | #include <asm/vic.h> | ||
25 | #include <asm/mtrr.h> | ||
26 | #include <asm/pgalloc.h> | ||
27 | #include <asm/tlbflush.h> | ||
28 | #include <asm/arch_hooks.h> | ||
29 | #include <asm/trampoline.h> | ||
30 | |||
31 | /* TLB state -- visible externally, indexed physically */ | ||
32 | DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { &init_mm, 0 }; | ||
33 | |||
34 | /* CPU IRQ affinity -- set to all ones initially */ | ||
35 | static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned = | ||
36 | {[0 ... NR_CPUS-1] = ~0UL }; | ||
37 | |||
38 | /* per CPU data structure (for /proc/cpuinfo et al), visible externally | ||
39 | * indexed physically */ | ||
40 | DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); | ||
41 | EXPORT_PER_CPU_SYMBOL(cpu_info); | ||
42 | |||
43 | /* physical ID of the CPU used to boot the system */ | ||
44 | unsigned char boot_cpu_id; | ||
45 | |||
46 | /* The memory line addresses for the Quad CPIs */ | ||
47 | struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS] __cacheline_aligned; | ||
48 | |||
49 | /* The masks for the Extended VIC processors, filled in by cat_init */ | ||
50 | __u32 voyager_extended_vic_processors = 0; | ||
51 | |||
52 | /* Masks for the extended Quad processors which cannot be VIC booted */ | ||
53 | __u32 voyager_allowed_boot_processors = 0; | ||
54 | |||
55 | /* The mask for the Quad Processors (both extended and non-extended) */ | ||
56 | __u32 voyager_quad_processors = 0; | ||
57 | |||
58 | /* Total count of live CPUs, used in process.c to display | ||
59 | * the CPU information and in irq.c for the per CPU irq | ||
60 | * activity count. Finally exported by i386_ksyms.c */ | ||
61 | static int voyager_extended_cpus = 1; | ||
62 | |||
63 | /* Used for the invalidate map that's also checked in the spinlock */ | ||
64 | static volatile unsigned long smp_invalidate_needed; | ||
65 | |||
66 | /* Bitmask of CPUs present in the system - exported by i386_syms.c, used | ||
67 | * by scheduler but indexed physically */ | ||
68 | static cpumask_t voyager_phys_cpu_present_map = CPU_MASK_NONE; | ||
69 | |||
70 | /* The internal functions */ | ||
71 | static void send_CPI(__u32 cpuset, __u8 cpi); | ||
72 | static void ack_CPI(__u8 cpi); | ||
73 | static int ack_QIC_CPI(__u8 cpi); | ||
74 | static void ack_special_QIC_CPI(__u8 cpi); | ||
75 | static void ack_VIC_CPI(__u8 cpi); | ||
76 | static void send_CPI_allbutself(__u8 cpi); | ||
77 | static void mask_vic_irq(unsigned int irq); | ||
78 | static void unmask_vic_irq(unsigned int irq); | ||
79 | static unsigned int startup_vic_irq(unsigned int irq); | ||
80 | static void enable_local_vic_irq(unsigned int irq); | ||
81 | static void disable_local_vic_irq(unsigned int irq); | ||
82 | static void before_handle_vic_irq(unsigned int irq); | ||
83 | static void after_handle_vic_irq(unsigned int irq); | ||
84 | static void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask); | ||
85 | static void ack_vic_irq(unsigned int irq); | ||
86 | static void vic_enable_cpi(void); | ||
87 | static void do_boot_cpu(__u8 cpuid); | ||
88 | static void do_quad_bootstrap(void); | ||
89 | static void initialize_secondary(void); | ||
90 | |||
91 | int hard_smp_processor_id(void); | ||
92 | int safe_smp_processor_id(void); | ||
93 | |||
94 | /* Inline functions */ | ||
95 | static inline void send_one_QIC_CPI(__u8 cpu, __u8 cpi) | ||
96 | { | ||
97 | voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi = | ||
98 | (smp_processor_id() << 16) + cpi; | ||
99 | } | ||
100 | |||
101 | static inline void send_QIC_CPI(__u32 cpuset, __u8 cpi) | ||
102 | { | ||
103 | int cpu; | ||
104 | |||
105 | for_each_online_cpu(cpu) { | ||
106 | if (cpuset & (1 << cpu)) { | ||
107 | #ifdef VOYAGER_DEBUG | ||
108 | if (!cpu_online(cpu)) | ||
109 | VDEBUG(("CPU%d sending cpi %d to CPU%d not in " | ||
110 | "cpu_online_map\n", | ||
111 | hard_smp_processor_id(), cpi, cpu)); | ||
112 | #endif | ||
113 | send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET); | ||
114 | } | ||
115 | } | ||
116 | } | ||
117 | |||
118 | static inline void wrapper_smp_local_timer_interrupt(void) | ||
119 | { | ||
120 | irq_enter(); | ||
121 | smp_local_timer_interrupt(); | ||
122 | irq_exit(); | ||
123 | } | ||
124 | |||
125 | static inline void send_one_CPI(__u8 cpu, __u8 cpi) | ||
126 | { | ||
127 | if (voyager_quad_processors & (1 << cpu)) | ||
128 | send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET); | ||
129 | else | ||
130 | send_CPI(1 << cpu, cpi); | ||
131 | } | ||
132 | |||
133 | static inline void send_CPI_allbutself(__u8 cpi) | ||
134 | { | ||
135 | __u8 cpu = smp_processor_id(); | ||
136 | __u32 mask = cpus_addr(cpu_online_map)[0] & ~(1 << cpu); | ||
137 | send_CPI(mask, cpi); | ||
138 | } | ||
139 | |||
140 | static inline int is_cpu_quad(void) | ||
141 | { | ||
142 | __u8 cpumask = inb(VIC_PROC_WHO_AM_I); | ||
143 | return ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER); | ||
144 | } | ||
145 | |||
146 | static inline int is_cpu_extended(void) | ||
147 | { | ||
148 | __u8 cpu = hard_smp_processor_id(); | ||
149 | |||
150 | return (voyager_extended_vic_processors & (1 << cpu)); | ||
151 | } | ||
152 | |||
153 | static inline int is_cpu_vic_boot(void) | ||
154 | { | ||
155 | __u8 cpu = hard_smp_processor_id(); | ||
156 | |||
157 | return (voyager_extended_vic_processors | ||
158 | & voyager_allowed_boot_processors & (1 << cpu)); | ||
159 | } | ||
160 | |||
161 | static inline void ack_CPI(__u8 cpi) | ||
162 | { | ||
163 | switch (cpi) { | ||
164 | case VIC_CPU_BOOT_CPI: | ||
165 | if (is_cpu_quad() && !is_cpu_vic_boot()) | ||
166 | ack_QIC_CPI(cpi); | ||
167 | else | ||
168 | ack_VIC_CPI(cpi); | ||
169 | break; | ||
170 | case VIC_SYS_INT: | ||
171 | case VIC_CMN_INT: | ||
172 | /* These are slightly strange. Even on the Quad card, | ||
173 | * They are vectored as VIC CPIs */ | ||
174 | if (is_cpu_quad()) | ||
175 | ack_special_QIC_CPI(cpi); | ||
176 | else | ||
177 | ack_VIC_CPI(cpi); | ||
178 | break; | ||
179 | default: | ||
180 | printk("VOYAGER ERROR: CPI%d is in common CPI code\n", cpi); | ||
181 | break; | ||
182 | } | ||
183 | } | ||
184 | |||
185 | /* local variables */ | ||
186 | |||
187 | /* The VIC IRQ descriptors -- these look almost identical to the | ||
188 | * 8259 IRQs except that masks and things must be kept per processor | ||
189 | */ | ||
190 | static struct irq_chip vic_chip = { | ||
191 | .name = "VIC", | ||
192 | .startup = startup_vic_irq, | ||
193 | .mask = mask_vic_irq, | ||
194 | .unmask = unmask_vic_irq, | ||
195 | .set_affinity = set_vic_irq_affinity, | ||
196 | }; | ||
197 | |||
198 | /* used to count up as CPUs are brought on line (starts at 0) */ | ||
199 | static int cpucount = 0; | ||
200 | |||
201 | /* The per cpu profile stuff - used in smp_local_timer_interrupt */ | ||
202 | static DEFINE_PER_CPU(int, prof_multiplier) = 1; | ||
203 | static DEFINE_PER_CPU(int, prof_old_multiplier) = 1; | ||
204 | static DEFINE_PER_CPU(int, prof_counter) = 1; | ||
205 | |||
206 | /* the map used to check if a CPU has booted */ | ||
207 | static __u32 cpu_booted_map; | ||
208 | |||
209 | /* the synchronize flag used to hold all secondary CPUs spinning in | ||
210 | * a tight loop until the boot sequence is ready for them */ | ||
211 | static cpumask_t smp_commenced_mask = CPU_MASK_NONE; | ||
212 | |||
213 | /* This is for the new dynamic CPU boot code */ | ||
214 | |||
215 | /* The per processor IRQ masks (these are usually kept in sync) */ | ||
216 | static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned; | ||
217 | |||
218 | /* the list of IRQs to be enabled by the VIC_ENABLE_IRQ_CPI */ | ||
219 | static __u16 vic_irq_enable_mask[NR_CPUS] __cacheline_aligned = { 0 }; | ||
220 | |||
221 | /* Lock for enable/disable of VIC interrupts */ | ||
222 | static __cacheline_aligned DEFINE_SPINLOCK(vic_irq_lock); | ||
223 | |||
224 | /* The boot processor is correctly set up in PC mode when it | ||
225 | * comes up, but the secondaries need their master/slave 8259 | ||
226 | * pairs initializing correctly */ | ||
227 | |||
228 | /* Interrupt counters (per cpu) and total - used to try to | ||
229 | * even up the interrupt handling routines */ | ||
230 | static long vic_intr_total = 0; | ||
231 | static long vic_intr_count[NR_CPUS] __cacheline_aligned = { 0 }; | ||
232 | static unsigned long vic_tick[NR_CPUS] __cacheline_aligned = { 0 }; | ||
233 | |||
234 | /* Since we can only use CPI0, we fake all the other CPIs */ | ||
235 | static unsigned long vic_cpi_mailbox[NR_CPUS] __cacheline_aligned; | ||
236 | |||
237 | /* debugging routine to read the isr of the cpu's pic */ | ||
238 | static inline __u16 vic_read_isr(void) | ||
239 | { | ||
240 | __u16 isr; | ||
241 | |||
242 | outb(0x0b, 0xa0); | ||
243 | isr = inb(0xa0) << 8; | ||
244 | outb(0x0b, 0x20); | ||
245 | isr |= inb(0x20); | ||
246 | |||
247 | return isr; | ||
248 | } | ||
249 | |||
250 | static __init void qic_setup(void) | ||
251 | { | ||
252 | if (!is_cpu_quad()) { | ||
253 | /* not a quad, no setup */ | ||
254 | return; | ||
255 | } | ||
256 | outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0); | ||
257 | outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1); | ||
258 | |||
259 | if (is_cpu_extended()) { | ||
260 | /* the QIC duplicate of the VIC base register */ | ||
261 | outb(VIC_DEFAULT_CPI_BASE, QIC_VIC_CPI_BASE_REGISTER); | ||
262 | outb(QIC_DEFAULT_CPI_BASE, QIC_CPI_BASE_REGISTER); | ||
263 | |||
264 | /* FIXME: should set up the QIC timer and memory parity | ||
265 | * error vectors here */ | ||
266 | } | ||
267 | } | ||
268 | |||
269 | static __init void vic_setup_pic(void) | ||
270 | { | ||
271 | outb(1, VIC_REDIRECT_REGISTER_1); | ||
272 | /* clear the claim registers for dynamic routing */ | ||
273 | outb(0, VIC_CLAIM_REGISTER_0); | ||
274 | outb(0, VIC_CLAIM_REGISTER_1); | ||
275 | |||
276 | outb(0, VIC_PRIORITY_REGISTER); | ||
277 | /* Set the Primary and Secondary Microchannel vector | ||
278 | * bases to be the same as the ordinary interrupts | ||
279 | * | ||
280 | * FIXME: This would be more efficient using separate | ||
281 | * vectors. */ | ||
282 | outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE); | ||
283 | outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE); | ||
284 | /* Now initiallise the master PIC belonging to this CPU by | ||
285 | * sending the four ICWs */ | ||
286 | |||
287 | /* ICW1: level triggered, ICW4 needed */ | ||
288 | outb(0x19, 0x20); | ||
289 | |||
290 | /* ICW2: vector base */ | ||
291 | outb(FIRST_EXTERNAL_VECTOR, 0x21); | ||
292 | |||
293 | /* ICW3: slave at line 2 */ | ||
294 | outb(0x04, 0x21); | ||
295 | |||
296 | /* ICW4: 8086 mode */ | ||
297 | outb(0x01, 0x21); | ||
298 | |||
299 | /* now the same for the slave PIC */ | ||
300 | |||
301 | /* ICW1: level trigger, ICW4 needed */ | ||
302 | outb(0x19, 0xA0); | ||
303 | |||
304 | /* ICW2: slave vector base */ | ||
305 | outb(FIRST_EXTERNAL_VECTOR + 8, 0xA1); | ||
306 | |||
307 | /* ICW3: slave ID */ | ||
308 | outb(0x02, 0xA1); | ||
309 | |||
310 | /* ICW4: 8086 mode */ | ||
311 | outb(0x01, 0xA1); | ||
312 | } | ||
313 | |||
314 | static void do_quad_bootstrap(void) | ||
315 | { | ||
316 | if (is_cpu_quad() && is_cpu_vic_boot()) { | ||
317 | int i; | ||
318 | unsigned long flags; | ||
319 | __u8 cpuid = hard_smp_processor_id(); | ||
320 | |||
321 | local_irq_save(flags); | ||
322 | |||
323 | for (i = 0; i < 4; i++) { | ||
324 | /* FIXME: this would be >>3 &0x7 on the 32 way */ | ||
325 | if (((cpuid >> 2) & 0x03) == i) | ||
326 | /* don't lower our own mask! */ | ||
327 | continue; | ||
328 | |||
329 | /* masquerade as local Quad CPU */ | ||
330 | outb(QIC_CPUID_ENABLE | i, QIC_PROCESSOR_ID); | ||
331 | /* enable the startup CPI */ | ||
332 | outb(QIC_BOOT_CPI_MASK, QIC_MASK_REGISTER1); | ||
333 | /* restore cpu id */ | ||
334 | outb(0, QIC_PROCESSOR_ID); | ||
335 | } | ||
336 | local_irq_restore(flags); | ||
337 | } | ||
338 | } | ||
339 | |||
340 | void prefill_possible_map(void) | ||
341 | { | ||
342 | /* This is empty on voyager because we need a much | ||
343 | * earlier detection which is done in find_smp_config */ | ||
344 | } | ||
345 | |||
346 | /* Set up all the basic stuff: read the SMP config and make all the | ||
347 | * SMP information reflect only the boot cpu. All others will be | ||
348 | * brought on-line later. */ | ||
349 | void __init find_smp_config(void) | ||
350 | { | ||
351 | int i; | ||
352 | |||
353 | boot_cpu_id = hard_smp_processor_id(); | ||
354 | |||
355 | printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id); | ||
356 | |||
357 | /* initialize the CPU structures (moved from smp_boot_cpus) */ | ||
358 | for (i = 0; i < nr_cpu_ids; i++) | ||
359 | cpu_irq_affinity[i] = ~0; | ||
360 | cpu_online_map = cpumask_of_cpu(boot_cpu_id); | ||
361 | |||
362 | /* The boot CPU must be extended */ | ||
363 | voyager_extended_vic_processors = 1 << boot_cpu_id; | ||
364 | /* initially, all of the first 8 CPUs can boot */ | ||
365 | voyager_allowed_boot_processors = 0xff; | ||
366 | /* set up everything for just this CPU, we can alter | ||
367 | * this as we start the other CPUs later */ | ||
368 | /* now get the CPU disposition from the extended CMOS */ | ||
369 | cpus_addr(voyager_phys_cpu_present_map)[0] = | ||
370 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK); | ||
371 | cpus_addr(voyager_phys_cpu_present_map)[0] |= | ||
372 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8; | ||
373 | cpus_addr(voyager_phys_cpu_present_map)[0] |= | ||
374 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + | ||
375 | 2) << 16; | ||
376 | cpus_addr(voyager_phys_cpu_present_map)[0] |= | ||
377 | voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + | ||
378 | 3) << 24; | ||
379 | init_cpu_possible(&voyager_phys_cpu_present_map); | ||
380 | printk("VOYAGER SMP: voyager_phys_cpu_present_map = 0x%lx\n", | ||
381 | cpus_addr(voyager_phys_cpu_present_map)[0]); | ||
382 | /* Here we set up the VIC to enable SMP */ | ||
383 | /* enable the CPIs by writing the base vector to their register */ | ||
384 | outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER); | ||
385 | outb(1, VIC_REDIRECT_REGISTER_1); | ||
386 | /* set the claim registers for static routing --- Boot CPU gets | ||
387 | * all interrupts untill all other CPUs started */ | ||
388 | outb(0xff, VIC_CLAIM_REGISTER_0); | ||
389 | outb(0xff, VIC_CLAIM_REGISTER_1); | ||
390 | /* Set the Primary and Secondary Microchannel vector | ||
391 | * bases to be the same as the ordinary interrupts | ||
392 | * | ||
393 | * FIXME: This would be more efficient using separate | ||
394 | * vectors. */ | ||
395 | outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE); | ||
396 | outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE); | ||
397 | |||
398 | /* Finally tell the firmware that we're driving */ | ||
399 | outb(inb(VOYAGER_SUS_IN_CONTROL_PORT) | VOYAGER_IN_CONTROL_FLAG, | ||
400 | VOYAGER_SUS_IN_CONTROL_PORT); | ||
401 | |||
402 | current_thread_info()->cpu = boot_cpu_id; | ||
403 | x86_write_percpu(cpu_number, boot_cpu_id); | ||
404 | } | ||
405 | |||
406 | /* | ||
407 | * The bootstrap kernel entry code has set these up. Save them | ||
408 | * for a given CPU, id is physical */ | ||
409 | void __init smp_store_cpu_info(int id) | ||
410 | { | ||
411 | struct cpuinfo_x86 *c = &cpu_data(id); | ||
412 | |||
413 | *c = boot_cpu_data; | ||
414 | c->cpu_index = id; | ||
415 | |||
416 | identify_secondary_cpu(c); | ||
417 | } | ||
418 | |||
419 | /* Routine initially called when a non-boot CPU is brought online */ | ||
420 | static void __init start_secondary(void *unused) | ||
421 | { | ||
422 | __u8 cpuid = hard_smp_processor_id(); | ||
423 | |||
424 | cpu_init(); | ||
425 | |||
426 | /* OK, we're in the routine */ | ||
427 | ack_CPI(VIC_CPU_BOOT_CPI); | ||
428 | |||
429 | /* setup the 8259 master slave pair belonging to this CPU --- | ||
430 | * we won't actually receive any until the boot CPU | ||
431 | * relinquishes it's static routing mask */ | ||
432 | vic_setup_pic(); | ||
433 | |||
434 | qic_setup(); | ||
435 | |||
436 | if (is_cpu_quad() && !is_cpu_vic_boot()) { | ||
437 | /* clear the boot CPI */ | ||
438 | __u8 dummy; | ||
439 | |||
440 | dummy = | ||
441 | voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi; | ||
442 | printk("read dummy %d\n", dummy); | ||
443 | } | ||
444 | |||
445 | /* lower the mask to receive CPIs */ | ||
446 | vic_enable_cpi(); | ||
447 | |||
448 | VDEBUG(("VOYAGER SMP: CPU%d, stack at about %p\n", cpuid, &cpuid)); | ||
449 | |||
450 | notify_cpu_starting(cpuid); | ||
451 | |||
452 | /* enable interrupts */ | ||
453 | local_irq_enable(); | ||
454 | |||
455 | /* get our bogomips */ | ||
456 | calibrate_delay(); | ||
457 | |||
458 | /* save our processor parameters */ | ||
459 | smp_store_cpu_info(cpuid); | ||
460 | |||
461 | /* if we're a quad, we may need to bootstrap other CPUs */ | ||
462 | do_quad_bootstrap(); | ||
463 | |||
464 | /* FIXME: this is rather a poor hack to prevent the CPU | ||
465 | * activating softirqs while it's supposed to be waiting for | ||
466 | * permission to proceed. Without this, the new per CPU stuff | ||
467 | * in the softirqs will fail */ | ||
468 | local_irq_disable(); | ||
469 | cpu_set(cpuid, cpu_callin_map); | ||
470 | |||
471 | /* signal that we're done */ | ||
472 | cpu_booted_map = 1; | ||
473 | |||
474 | while (!cpu_isset(cpuid, smp_commenced_mask)) | ||
475 | rep_nop(); | ||
476 | local_irq_enable(); | ||
477 | |||
478 | local_flush_tlb(); | ||
479 | |||
480 | cpu_set(cpuid, cpu_online_map); | ||
481 | wmb(); | ||
482 | cpu_idle(); | ||
483 | } | ||
484 | |||
485 | /* Routine to kick start the given CPU and wait for it to report ready | ||
486 | * (or timeout in startup). When this routine returns, the requested | ||
487 | * CPU is either fully running and configured or known to be dead. | ||
488 | * | ||
489 | * We call this routine sequentially 1 CPU at a time, so no need for | ||
490 | * locking */ | ||
491 | |||
492 | static void __init do_boot_cpu(__u8 cpu) | ||
493 | { | ||
494 | struct task_struct *idle; | ||
495 | int timeout; | ||
496 | unsigned long flags; | ||
497 | int quad_boot = (1 << cpu) & voyager_quad_processors | ||
498 | & ~(voyager_extended_vic_processors | ||
499 | & voyager_allowed_boot_processors); | ||
500 | |||
501 | /* This is the format of the CPI IDT gate (in real mode) which | ||
502 | * we're hijacking to boot the CPU */ | ||
503 | union IDTFormat { | ||
504 | struct seg { | ||
505 | __u16 Offset; | ||
506 | __u16 Segment; | ||
507 | } idt; | ||
508 | __u32 val; | ||
509 | } hijack_source; | ||
510 | |||
511 | __u32 *hijack_vector; | ||
512 | __u32 start_phys_address = setup_trampoline(); | ||
513 | |||
514 | /* There's a clever trick to this: The linux trampoline is | ||
515 | * compiled to begin at absolute location zero, so make the | ||
516 | * address zero but have the data segment selector compensate | ||
517 | * for the actual address */ | ||
518 | hijack_source.idt.Offset = start_phys_address & 0x000F; | ||
519 | hijack_source.idt.Segment = (start_phys_address >> 4) & 0xFFFF; | ||
520 | |||
521 | cpucount++; | ||
522 | alternatives_smp_switch(1); | ||
523 | |||
524 | idle = fork_idle(cpu); | ||
525 | if (IS_ERR(idle)) | ||
526 | panic("failed fork for CPU%d", cpu); | ||
527 | idle->thread.ip = (unsigned long)start_secondary; | ||
528 | /* init_tasks (in sched.c) is indexed logically */ | ||
529 | stack_start.sp = (void *)idle->thread.sp; | ||
530 | |||
531 | init_gdt(cpu); | ||
532 | per_cpu(current_task, cpu) = idle; | ||
533 | early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); | ||
534 | irq_ctx_init(cpu); | ||
535 | |||
536 | /* Note: Don't modify initial ss override */ | ||
537 | VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu, | ||
538 | (unsigned long)hijack_source.val, hijack_source.idt.Segment, | ||
539 | hijack_source.idt.Offset, stack_start.sp)); | ||
540 | |||
541 | /* init lowmem identity mapping */ | ||
542 | clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, | ||
543 | min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY)); | ||
544 | flush_tlb_all(); | ||
545 | |||
546 | if (quad_boot) { | ||
547 | printk("CPU %d: non extended Quad boot\n", cpu); | ||
548 | hijack_vector = | ||
549 | (__u32 *) | ||
550 | phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE) * 4); | ||
551 | *hijack_vector = hijack_source.val; | ||
552 | } else { | ||
553 | printk("CPU%d: extended VIC boot\n", cpu); | ||
554 | hijack_vector = | ||
555 | (__u32 *) | ||
556 | phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE) * 4); | ||
557 | *hijack_vector = hijack_source.val; | ||
558 | /* VIC errata, may also receive interrupt at this address */ | ||
559 | hijack_vector = | ||
560 | (__u32 *) | ||
561 | phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI + | ||
562 | VIC_DEFAULT_CPI_BASE) * 4); | ||
563 | *hijack_vector = hijack_source.val; | ||
564 | } | ||
565 | /* All non-boot CPUs start with interrupts fully masked. Need | ||
566 | * to lower the mask of the CPI we're about to send. We do | ||
567 | * this in the VIC by masquerading as the processor we're | ||
568 | * about to boot and lowering its interrupt mask */ | ||
569 | local_irq_save(flags); | ||
570 | if (quad_boot) { | ||
571 | send_one_QIC_CPI(cpu, VIC_CPU_BOOT_CPI); | ||
572 | } else { | ||
573 | outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID); | ||
574 | /* here we're altering registers belonging to `cpu' */ | ||
575 | |||
576 | outb(VIC_BOOT_INTERRUPT_MASK, 0x21); | ||
577 | /* now go back to our original identity */ | ||
578 | outb(boot_cpu_id, VIC_PROCESSOR_ID); | ||
579 | |||
580 | /* and boot the CPU */ | ||
581 | |||
582 | send_CPI((1 << cpu), VIC_CPU_BOOT_CPI); | ||
583 | } | ||
584 | cpu_booted_map = 0; | ||
585 | local_irq_restore(flags); | ||
586 | |||
587 | /* now wait for it to become ready (or timeout) */ | ||
588 | for (timeout = 0; timeout < 50000; timeout++) { | ||
589 | if (cpu_booted_map) | ||
590 | break; | ||
591 | udelay(100); | ||
592 | } | ||
593 | /* reset the page table */ | ||
594 | zap_low_mappings(); | ||
595 | |||
596 | if (cpu_booted_map) { | ||
597 | VDEBUG(("CPU%d: Booted successfully, back in CPU %d\n", | ||
598 | cpu, smp_processor_id())); | ||
599 | |||
600 | printk("CPU%d: ", cpu); | ||
601 | print_cpu_info(&cpu_data(cpu)); | ||
602 | wmb(); | ||
603 | cpu_set(cpu, cpu_callout_map); | ||
604 | cpu_set(cpu, cpu_present_map); | ||
605 | } else { | ||
606 | printk("CPU%d FAILED TO BOOT: ", cpu); | ||
607 | if (* | ||
608 | ((volatile unsigned char *)phys_to_virt(start_phys_address)) | ||
609 | == 0xA5) | ||
610 | printk("Stuck.\n"); | ||
611 | else | ||
612 | printk("Not responding.\n"); | ||
613 | |||
614 | cpucount--; | ||
615 | } | ||
616 | } | ||
617 | |||
618 | void __init smp_boot_cpus(void) | ||
619 | { | ||
620 | int i; | ||
621 | |||
622 | /* CAT BUS initialisation must be done after the memory */ | ||
623 | /* FIXME: The L4 has a catbus too, it just needs to be | ||
624 | * accessed in a totally different way */ | ||
625 | if (voyager_level == 5) { | ||
626 | voyager_cat_init(); | ||
627 | |||
628 | /* now that the cat has probed the Voyager System Bus, sanity | ||
629 | * check the cpu map */ | ||
630 | if (((voyager_quad_processors | voyager_extended_vic_processors) | ||
631 | & cpus_addr(voyager_phys_cpu_present_map)[0]) != | ||
632 | cpus_addr(voyager_phys_cpu_present_map)[0]) { | ||
633 | /* should panic */ | ||
634 | printk("\n\n***WARNING*** " | ||
635 | "Sanity check of CPU present map FAILED\n"); | ||
636 | } | ||
637 | } else if (voyager_level == 4) | ||
638 | voyager_extended_vic_processors = | ||
639 | cpus_addr(voyager_phys_cpu_present_map)[0]; | ||
640 | |||
641 | /* this sets up the idle task to run on the current cpu */ | ||
642 | voyager_extended_cpus = 1; | ||
643 | /* Remove the global_irq_holder setting, it triggers a BUG() on | ||
644 | * schedule at the moment */ | ||
645 | //global_irq_holder = boot_cpu_id; | ||
646 | |||
647 | /* FIXME: Need to do something about this but currently only works | ||
648 | * on CPUs with a tsc which none of mine have. | ||
649 | smp_tune_scheduling(); | ||
650 | */ | ||
651 | smp_store_cpu_info(boot_cpu_id); | ||
652 | /* setup the jump vector */ | ||
653 | initial_code = (unsigned long)initialize_secondary; | ||
654 | printk("CPU%d: ", boot_cpu_id); | ||
655 | print_cpu_info(&cpu_data(boot_cpu_id)); | ||
656 | |||
657 | if (is_cpu_quad()) { | ||
658 | /* booting on a Quad CPU */ | ||
659 | printk("VOYAGER SMP: Boot CPU is Quad\n"); | ||
660 | qic_setup(); | ||
661 | do_quad_bootstrap(); | ||
662 | } | ||
663 | |||
664 | /* enable our own CPIs */ | ||
665 | vic_enable_cpi(); | ||
666 | |||
667 | cpu_set(boot_cpu_id, cpu_online_map); | ||
668 | cpu_set(boot_cpu_id, cpu_callout_map); | ||
669 | |||
670 | /* loop over all the extended VIC CPUs and boot them. The | ||
671 | * Quad CPUs must be bootstrapped by their extended VIC cpu */ | ||
672 | for (i = 0; i < nr_cpu_ids; i++) { | ||
673 | if (i == boot_cpu_id || !cpu_isset(i, voyager_phys_cpu_present_map)) | ||
674 | continue; | ||
675 | do_boot_cpu(i); | ||
676 | /* This udelay seems to be needed for the Quad boots | ||
677 | * don't remove unless you know what you're doing */ | ||
678 | udelay(1000); | ||
679 | } | ||
680 | /* we could compute the total bogomips here, but why bother?, | ||
681 | * Code added from smpboot.c */ | ||
682 | { | ||
683 | unsigned long bogosum = 0; | ||
684 | |||
685 | for_each_online_cpu(i) | ||
686 | bogosum += cpu_data(i).loops_per_jiffy; | ||
687 | printk(KERN_INFO "Total of %d processors activated " | ||
688 | "(%lu.%02lu BogoMIPS).\n", | ||
689 | cpucount + 1, bogosum / (500000 / HZ), | ||
690 | (bogosum / (5000 / HZ)) % 100); | ||
691 | } | ||
692 | voyager_extended_cpus = hweight32(voyager_extended_vic_processors); | ||
693 | printk("VOYAGER: Extended (interrupt handling CPUs): " | ||
694 | "%d, non-extended: %d\n", voyager_extended_cpus, | ||
695 | num_booting_cpus() - voyager_extended_cpus); | ||
696 | /* that's it, switch to symmetric mode */ | ||
697 | outb(0, VIC_PRIORITY_REGISTER); | ||
698 | outb(0, VIC_CLAIM_REGISTER_0); | ||
699 | outb(0, VIC_CLAIM_REGISTER_1); | ||
700 | |||
701 | VDEBUG(("VOYAGER SMP: Booted with %d CPUs\n", num_booting_cpus())); | ||
702 | } | ||
703 | |||
704 | /* Reload the secondary CPUs task structure (this function does not | ||
705 | * return ) */ | ||
706 | static void __init initialize_secondary(void) | ||
707 | { | ||
708 | #if 0 | ||
709 | // AC kernels only | ||
710 | set_current(hard_get_current()); | ||
711 | #endif | ||
712 | |||
713 | /* | ||
714 | * We don't actually need to load the full TSS, | ||
715 | * basically just the stack pointer and the eip. | ||
716 | */ | ||
717 | |||
718 | asm volatile ("movl %0,%%esp\n\t" | ||
719 | "jmp *%1"::"r" (current->thread.sp), | ||
720 | "r"(current->thread.ip)); | ||
721 | } | ||
722 | |||
723 | /* handle a Voyager SYS_INT -- If we don't, the base board will | ||
724 | * panic the system. | ||
725 | * | ||
726 | * System interrupts occur because some problem was detected on the | ||
727 | * various busses. To find out what you have to probe all the | ||
728 | * hardware via the CAT bus. FIXME: At the moment we do nothing. */ | ||
729 | void smp_vic_sys_interrupt(struct pt_regs *regs) | ||
730 | { | ||
731 | ack_CPI(VIC_SYS_INT); | ||
732 | printk("Voyager SYSTEM INTERRUPT\n"); | ||
733 | } | ||
734 | |||
735 | /* Handle a voyager CMN_INT; These interrupts occur either because of | ||
736 | * a system status change or because a single bit memory error | ||
737 | * occurred. FIXME: At the moment, ignore all this. */ | ||
738 | void smp_vic_cmn_interrupt(struct pt_regs *regs) | ||
739 | { | ||
740 | static __u8 in_cmn_int = 0; | ||
741 | static DEFINE_SPINLOCK(cmn_int_lock); | ||
742 | |||
743 | /* common ints are broadcast, so make sure we only do this once */ | ||
744 | _raw_spin_lock(&cmn_int_lock); | ||
745 | if (in_cmn_int) | ||
746 | goto unlock_end; | ||
747 | |||
748 | in_cmn_int++; | ||
749 | _raw_spin_unlock(&cmn_int_lock); | ||
750 | |||
751 | VDEBUG(("Voyager COMMON INTERRUPT\n")); | ||
752 | |||
753 | if (voyager_level == 5) | ||
754 | voyager_cat_do_common_interrupt(); | ||
755 | |||
756 | _raw_spin_lock(&cmn_int_lock); | ||
757 | in_cmn_int = 0; | ||
758 | unlock_end: | ||
759 | _raw_spin_unlock(&cmn_int_lock); | ||
760 | ack_CPI(VIC_CMN_INT); | ||
761 | } | ||
762 | |||
763 | /* | ||
764 | * Reschedule call back. Nothing to do, all the work is done | ||
765 | * automatically when we return from the interrupt. */ | ||
766 | static void smp_reschedule_interrupt(void) | ||
767 | { | ||
768 | /* do nothing */ | ||
769 | } | ||
770 | |||
771 | static struct mm_struct *flush_mm; | ||
772 | static unsigned long flush_va; | ||
773 | static DEFINE_SPINLOCK(tlbstate_lock); | ||
774 | |||
775 | /* | ||
776 | * We cannot call mmdrop() because we are in interrupt context, | ||
777 | * instead update mm->cpu_vm_mask. | ||
778 | * | ||
779 | * We need to reload %cr3 since the page tables may be going | ||
780 | * away from under us.. | ||
781 | */ | ||
782 | static inline void voyager_leave_mm(unsigned long cpu) | ||
783 | { | ||
784 | if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) | ||
785 | BUG(); | ||
786 | cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask); | ||
787 | load_cr3(swapper_pg_dir); | ||
788 | } | ||
789 | |||
790 | /* | ||
791 | * Invalidate call-back | ||
792 | */ | ||
793 | static void smp_invalidate_interrupt(void) | ||
794 | { | ||
795 | __u8 cpu = smp_processor_id(); | ||
796 | |||
797 | if (!test_bit(cpu, &smp_invalidate_needed)) | ||
798 | return; | ||
799 | /* This will flood messages. Don't uncomment unless you see | ||
800 | * Problems with cross cpu invalidation | ||
801 | VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n", | ||
802 | smp_processor_id())); | ||
803 | */ | ||
804 | |||
805 | if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) { | ||
806 | if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) { | ||
807 | if (flush_va == TLB_FLUSH_ALL) | ||
808 | local_flush_tlb(); | ||
809 | else | ||
810 | __flush_tlb_one(flush_va); | ||
811 | } else | ||
812 | voyager_leave_mm(cpu); | ||
813 | } | ||
814 | smp_mb__before_clear_bit(); | ||
815 | clear_bit(cpu, &smp_invalidate_needed); | ||
816 | smp_mb__after_clear_bit(); | ||
817 | } | ||
818 | |||
819 | /* All the new flush operations for 2.4 */ | ||
820 | |||
821 | /* This routine is called with a physical cpu mask */ | ||
822 | static void | ||
823 | voyager_flush_tlb_others(unsigned long cpumask, struct mm_struct *mm, | ||
824 | unsigned long va) | ||
825 | { | ||
826 | int stuck = 50000; | ||
827 | |||
828 | if (!cpumask) | ||
829 | BUG(); | ||
830 | if ((cpumask & cpus_addr(cpu_online_map)[0]) != cpumask) | ||
831 | BUG(); | ||
832 | if (cpumask & (1 << smp_processor_id())) | ||
833 | BUG(); | ||
834 | if (!mm) | ||
835 | BUG(); | ||
836 | |||
837 | spin_lock(&tlbstate_lock); | ||
838 | |||
839 | flush_mm = mm; | ||
840 | flush_va = va; | ||
841 | atomic_set_mask(cpumask, &smp_invalidate_needed); | ||
842 | /* | ||
843 | * We have to send the CPI only to | ||
844 | * CPUs affected. | ||
845 | */ | ||
846 | send_CPI(cpumask, VIC_INVALIDATE_CPI); | ||
847 | |||
848 | while (smp_invalidate_needed) { | ||
849 | mb(); | ||
850 | if (--stuck == 0) { | ||
851 | printk("***WARNING*** Stuck doing invalidate CPI " | ||
852 | "(CPU%d)\n", smp_processor_id()); | ||
853 | break; | ||
854 | } | ||
855 | } | ||
856 | |||
857 | /* Uncomment only to debug invalidation problems | ||
858 | VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu)); | ||
859 | */ | ||
860 | |||
861 | flush_mm = NULL; | ||
862 | flush_va = 0; | ||
863 | spin_unlock(&tlbstate_lock); | ||
864 | } | ||
865 | |||
866 | void flush_tlb_current_task(void) | ||
867 | { | ||
868 | struct mm_struct *mm = current->mm; | ||
869 | unsigned long cpu_mask; | ||
870 | |||
871 | preempt_disable(); | ||
872 | |||
873 | cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id()); | ||
874 | local_flush_tlb(); | ||
875 | if (cpu_mask) | ||
876 | voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); | ||
877 | |||
878 | preempt_enable(); | ||
879 | } | ||
880 | |||
881 | void flush_tlb_mm(struct mm_struct *mm) | ||
882 | { | ||
883 | unsigned long cpu_mask; | ||
884 | |||
885 | preempt_disable(); | ||
886 | |||
887 | cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id()); | ||
888 | |||
889 | if (current->active_mm == mm) { | ||
890 | if (current->mm) | ||
891 | local_flush_tlb(); | ||
892 | else | ||
893 | voyager_leave_mm(smp_processor_id()); | ||
894 | } | ||
895 | if (cpu_mask) | ||
896 | voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); | ||
897 | |||
898 | preempt_enable(); | ||
899 | } | ||
900 | |||
901 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long va) | ||
902 | { | ||
903 | struct mm_struct *mm = vma->vm_mm; | ||
904 | unsigned long cpu_mask; | ||
905 | |||
906 | preempt_disable(); | ||
907 | |||
908 | cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id()); | ||
909 | if (current->active_mm == mm) { | ||
910 | if (current->mm) | ||
911 | __flush_tlb_one(va); | ||
912 | else | ||
913 | voyager_leave_mm(smp_processor_id()); | ||
914 | } | ||
915 | |||
916 | if (cpu_mask) | ||
917 | voyager_flush_tlb_others(cpu_mask, mm, va); | ||
918 | |||
919 | preempt_enable(); | ||
920 | } | ||
921 | |||
922 | EXPORT_SYMBOL(flush_tlb_page); | ||
923 | |||
924 | /* enable the requested IRQs */ | ||
925 | static void smp_enable_irq_interrupt(void) | ||
926 | { | ||
927 | __u8 irq; | ||
928 | __u8 cpu = get_cpu(); | ||
929 | |||
930 | VDEBUG(("VOYAGER SMP: CPU%d enabling irq mask 0x%x\n", cpu, | ||
931 | vic_irq_enable_mask[cpu])); | ||
932 | |||
933 | spin_lock(&vic_irq_lock); | ||
934 | for (irq = 0; irq < 16; irq++) { | ||
935 | if (vic_irq_enable_mask[cpu] & (1 << irq)) | ||
936 | enable_local_vic_irq(irq); | ||
937 | } | ||
938 | vic_irq_enable_mask[cpu] = 0; | ||
939 | spin_unlock(&vic_irq_lock); | ||
940 | |||
941 | put_cpu_no_resched(); | ||
942 | } | ||
943 | |||
944 | /* | ||
945 | * CPU halt call-back | ||
946 | */ | ||
947 | static void smp_stop_cpu_function(void *dummy) | ||
948 | { | ||
949 | VDEBUG(("VOYAGER SMP: CPU%d is STOPPING\n", smp_processor_id())); | ||
950 | cpu_clear(smp_processor_id(), cpu_online_map); | ||
951 | local_irq_disable(); | ||
952 | for (;;) | ||
953 | halt(); | ||
954 | } | ||
955 | |||
956 | /* execute a thread on a new CPU. The function to be called must be | ||
957 | * previously set up. This is used to schedule a function for | ||
958 | * execution on all CPUs - set up the function then broadcast a | ||
959 | * function_interrupt CPI to come here on each CPU */ | ||
960 | static void smp_call_function_interrupt(void) | ||
961 | { | ||
962 | irq_enter(); | ||
963 | generic_smp_call_function_interrupt(); | ||
964 | __get_cpu_var(irq_stat).irq_call_count++; | ||
965 | irq_exit(); | ||
966 | } | ||
967 | |||
968 | static void smp_call_function_single_interrupt(void) | ||
969 | { | ||
970 | irq_enter(); | ||
971 | generic_smp_call_function_single_interrupt(); | ||
972 | __get_cpu_var(irq_stat).irq_call_count++; | ||
973 | irq_exit(); | ||
974 | } | ||
975 | |||
976 | /* Sorry about the name. In an APIC based system, the APICs | ||
977 | * themselves are programmed to send a timer interrupt. This is used | ||
978 | * by linux to reschedule the processor. Voyager doesn't have this, | ||
979 | * so we use the system clock to interrupt one processor, which in | ||
980 | * turn, broadcasts a timer CPI to all the others --- we receive that | ||
981 | * CPI here. We don't use this actually for counting so losing | ||
982 | * ticks doesn't matter | ||
983 | * | ||
984 | * FIXME: For those CPUs which actually have a local APIC, we could | ||
985 | * try to use it to trigger this interrupt instead of having to | ||
986 | * broadcast the timer tick. Unfortunately, all my pentium DYADs have | ||
987 | * no local APIC, so I can't do this | ||
988 | * | ||
989 | * This function is currently a placeholder and is unused in the code */ | ||
990 | void smp_apic_timer_interrupt(struct pt_regs *regs) | ||
991 | { | ||
992 | struct pt_regs *old_regs = set_irq_regs(regs); | ||
993 | wrapper_smp_local_timer_interrupt(); | ||
994 | set_irq_regs(old_regs); | ||
995 | } | ||
996 | |||
997 | /* All of the QUAD interrupt GATES */ | ||
998 | void smp_qic_timer_interrupt(struct pt_regs *regs) | ||
999 | { | ||
1000 | struct pt_regs *old_regs = set_irq_regs(regs); | ||
1001 | ack_QIC_CPI(QIC_TIMER_CPI); | ||
1002 | wrapper_smp_local_timer_interrupt(); | ||
1003 | set_irq_regs(old_regs); | ||
1004 | } | ||
1005 | |||
1006 | void smp_qic_invalidate_interrupt(struct pt_regs *regs) | ||
1007 | { | ||
1008 | ack_QIC_CPI(QIC_INVALIDATE_CPI); | ||
1009 | smp_invalidate_interrupt(); | ||
1010 | } | ||
1011 | |||
1012 | void smp_qic_reschedule_interrupt(struct pt_regs *regs) | ||
1013 | { | ||
1014 | ack_QIC_CPI(QIC_RESCHEDULE_CPI); | ||
1015 | smp_reschedule_interrupt(); | ||
1016 | } | ||
1017 | |||
1018 | void smp_qic_enable_irq_interrupt(struct pt_regs *regs) | ||
1019 | { | ||
1020 | ack_QIC_CPI(QIC_ENABLE_IRQ_CPI); | ||
1021 | smp_enable_irq_interrupt(); | ||
1022 | } | ||
1023 | |||
1024 | void smp_qic_call_function_interrupt(struct pt_regs *regs) | ||
1025 | { | ||
1026 | ack_QIC_CPI(QIC_CALL_FUNCTION_CPI); | ||
1027 | smp_call_function_interrupt(); | ||
1028 | } | ||
1029 | |||
1030 | void smp_qic_call_function_single_interrupt(struct pt_regs *regs) | ||
1031 | { | ||
1032 | ack_QIC_CPI(QIC_CALL_FUNCTION_SINGLE_CPI); | ||
1033 | smp_call_function_single_interrupt(); | ||
1034 | } | ||
1035 | |||
1036 | void smp_vic_cpi_interrupt(struct pt_regs *regs) | ||
1037 | { | ||
1038 | struct pt_regs *old_regs = set_irq_regs(regs); | ||
1039 | __u8 cpu = smp_processor_id(); | ||
1040 | |||
1041 | if (is_cpu_quad()) | ||
1042 | ack_QIC_CPI(VIC_CPI_LEVEL0); | ||
1043 | else | ||
1044 | ack_VIC_CPI(VIC_CPI_LEVEL0); | ||
1045 | |||
1046 | if (test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu])) | ||
1047 | wrapper_smp_local_timer_interrupt(); | ||
1048 | if (test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu])) | ||
1049 | smp_invalidate_interrupt(); | ||
1050 | if (test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu])) | ||
1051 | smp_reschedule_interrupt(); | ||
1052 | if (test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu])) | ||
1053 | smp_enable_irq_interrupt(); | ||
1054 | if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu])) | ||
1055 | smp_call_function_interrupt(); | ||
1056 | if (test_and_clear_bit(VIC_CALL_FUNCTION_SINGLE_CPI, &vic_cpi_mailbox[cpu])) | ||
1057 | smp_call_function_single_interrupt(); | ||
1058 | set_irq_regs(old_regs); | ||
1059 | } | ||
1060 | |||
1061 | static void do_flush_tlb_all(void *info) | ||
1062 | { | ||
1063 | unsigned long cpu = smp_processor_id(); | ||
1064 | |||
1065 | __flush_tlb_all(); | ||
1066 | if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY) | ||
1067 | voyager_leave_mm(cpu); | ||
1068 | } | ||
1069 | |||
1070 | /* flush the TLB of every active CPU in the system */ | ||
1071 | void flush_tlb_all(void) | ||
1072 | { | ||
1073 | on_each_cpu(do_flush_tlb_all, 0, 1); | ||
1074 | } | ||
1075 | |||
1076 | /* send a reschedule CPI to one CPU by physical CPU number*/ | ||
1077 | static void voyager_smp_send_reschedule(int cpu) | ||
1078 | { | ||
1079 | send_one_CPI(cpu, VIC_RESCHEDULE_CPI); | ||
1080 | } | ||
1081 | |||
1082 | int hard_smp_processor_id(void) | ||
1083 | { | ||
1084 | __u8 i; | ||
1085 | __u8 cpumask = inb(VIC_PROC_WHO_AM_I); | ||
1086 | if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER) | ||
1087 | return cpumask & 0x1F; | ||
1088 | |||
1089 | for (i = 0; i < 8; i++) { | ||
1090 | if (cpumask & (1 << i)) | ||
1091 | return i; | ||
1092 | } | ||
1093 | printk("** WARNING ** Illegal cpuid returned by VIC: %d", cpumask); | ||
1094 | return 0; | ||
1095 | } | ||
1096 | |||
1097 | int safe_smp_processor_id(void) | ||
1098 | { | ||
1099 | return hard_smp_processor_id(); | ||
1100 | } | ||
1101 | |||
1102 | /* broadcast a halt to all other CPUs */ | ||
1103 | static void voyager_smp_send_stop(void) | ||
1104 | { | ||
1105 | smp_call_function(smp_stop_cpu_function, NULL, 1); | ||
1106 | } | ||
1107 | |||
1108 | /* this function is triggered in time.c when a clock tick fires | ||
1109 | * we need to re-broadcast the tick to all CPUs */ | ||
1110 | void smp_vic_timer_interrupt(void) | ||
1111 | { | ||
1112 | send_CPI_allbutself(VIC_TIMER_CPI); | ||
1113 | smp_local_timer_interrupt(); | ||
1114 | } | ||
1115 | |||
1116 | /* local (per CPU) timer interrupt. It does both profiling and | ||
1117 | * process statistics/rescheduling. | ||
1118 | * | ||
1119 | * We do profiling in every local tick, statistics/rescheduling | ||
1120 | * happen only every 'profiling multiplier' ticks. The default | ||
1121 | * multiplier is 1 and it can be changed by writing the new multiplier | ||
1122 | * value into /proc/profile. | ||
1123 | */ | ||
1124 | void smp_local_timer_interrupt(void) | ||
1125 | { | ||
1126 | int cpu = smp_processor_id(); | ||
1127 | long weight; | ||
1128 | |||
1129 | profile_tick(CPU_PROFILING); | ||
1130 | if (--per_cpu(prof_counter, cpu) <= 0) { | ||
1131 | /* | ||
1132 | * The multiplier may have changed since the last time we got | ||
1133 | * to this point as a result of the user writing to | ||
1134 | * /proc/profile. In this case we need to adjust the APIC | ||
1135 | * timer accordingly. | ||
1136 | * | ||
1137 | * Interrupts are already masked off at this point. | ||
1138 | */ | ||
1139 | per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu); | ||
1140 | if (per_cpu(prof_counter, cpu) != | ||
1141 | per_cpu(prof_old_multiplier, cpu)) { | ||
1142 | /* FIXME: need to update the vic timer tick here */ | ||
1143 | per_cpu(prof_old_multiplier, cpu) = | ||
1144 | per_cpu(prof_counter, cpu); | ||
1145 | } | ||
1146 | |||
1147 | update_process_times(user_mode_vm(get_irq_regs())); | ||
1148 | } | ||
1149 | |||
1150 | if (((1 << cpu) & voyager_extended_vic_processors) == 0) | ||
1151 | /* only extended VIC processors participate in | ||
1152 | * interrupt distribution */ | ||
1153 | return; | ||
1154 | |||
1155 | /* | ||
1156 | * We take the 'long' return path, and there every subsystem | ||
1157 | * grabs the appropriate locks (kernel lock/ irq lock). | ||
1158 | * | ||
1159 | * we might want to decouple profiling from the 'long path', | ||
1160 | * and do the profiling totally in assembly. | ||
1161 | * | ||
1162 | * Currently this isn't too much of an issue (performance wise), | ||
1163 | * we can take more than 100K local irqs per second on a 100 MHz P5. | ||
1164 | */ | ||
1165 | |||
1166 | if ((++vic_tick[cpu] & 0x7) != 0) | ||
1167 | return; | ||
1168 | /* get here every 16 ticks (about every 1/6 of a second) */ | ||
1169 | |||
1170 | /* Change our priority to give someone else a chance at getting | ||
1171 | * the IRQ. The algorithm goes like this: | ||
1172 | * | ||
1173 | * In the VIC, the dynamically routed interrupt is always | ||
1174 | * handled by the lowest priority eligible (i.e. receiving | ||
1175 | * interrupts) CPU. If >1 eligible CPUs are equal lowest, the | ||
1176 | * lowest processor number gets it. | ||
1177 | * | ||
1178 | * The priority of a CPU is controlled by a special per-CPU | ||
1179 | * VIC priority register which is 3 bits wide 0 being lowest | ||
1180 | * and 7 highest priority.. | ||
1181 | * | ||
1182 | * Therefore we subtract the average number of interrupts from | ||
1183 | * the number we've fielded. If this number is negative, we | ||
1184 | * lower the activity count and if it is positive, we raise | ||
1185 | * it. | ||
1186 | * | ||
1187 | * I'm afraid this still leads to odd looking interrupt counts: | ||
1188 | * the totals are all roughly equal, but the individual ones | ||
1189 | * look rather skewed. | ||
1190 | * | ||
1191 | * FIXME: This algorithm is total crap when mixed with SMP | ||
1192 | * affinity code since we now try to even up the interrupt | ||
1193 | * counts when an affinity binding is keeping them on a | ||
1194 | * particular CPU*/ | ||
1195 | weight = (vic_intr_count[cpu] * voyager_extended_cpus | ||
1196 | - vic_intr_total) >> 4; | ||
1197 | weight += 4; | ||
1198 | if (weight > 7) | ||
1199 | weight = 7; | ||
1200 | if (weight < 0) | ||
1201 | weight = 0; | ||
1202 | |||
1203 | outb((__u8) weight, VIC_PRIORITY_REGISTER); | ||
1204 | |||
1205 | #ifdef VOYAGER_DEBUG | ||
1206 | if ((vic_tick[cpu] & 0xFFF) == 0) { | ||
1207 | /* print this message roughly every 25 secs */ | ||
1208 | printk("VOYAGER SMP: vic_tick[%d] = %lu, weight = %ld\n", | ||
1209 | cpu, vic_tick[cpu], weight); | ||
1210 | } | ||
1211 | #endif | ||
1212 | } | ||
1213 | |||
1214 | /* setup the profiling timer */ | ||
1215 | int setup_profiling_timer(unsigned int multiplier) | ||
1216 | { | ||
1217 | int i; | ||
1218 | |||
1219 | if ((!multiplier)) | ||
1220 | return -EINVAL; | ||
1221 | |||
1222 | /* | ||
1223 | * Set the new multiplier for each CPU. CPUs don't start using the | ||
1224 | * new values until the next timer interrupt in which they do process | ||
1225 | * accounting. | ||
1226 | */ | ||
1227 | for (i = 0; i < nr_cpu_ids; ++i) | ||
1228 | per_cpu(prof_multiplier, i) = multiplier; | ||
1229 | |||
1230 | return 0; | ||
1231 | } | ||
1232 | |||
1233 | /* This is a bit of a mess, but forced on us by the genirq changes | ||
1234 | * there's no genirq handler that really does what voyager wants | ||
1235 | * so hack it up with the simple IRQ handler */ | ||
1236 | static void handle_vic_irq(unsigned int irq, struct irq_desc *desc) | ||
1237 | { | ||
1238 | before_handle_vic_irq(irq); | ||
1239 | handle_simple_irq(irq, desc); | ||
1240 | after_handle_vic_irq(irq); | ||
1241 | } | ||
1242 | |||
1243 | /* The CPIs are handled in the per cpu 8259s, so they must be | ||
1244 | * enabled to be received: FIX: enabling the CPIs in the early | ||
1245 | * boot sequence interferes with bug checking; enable them later | ||
1246 | * on in smp_init */ | ||
1247 | #define VIC_SET_GATE(cpi, vector) \ | ||
1248 | set_intr_gate((cpi) + VIC_DEFAULT_CPI_BASE, (vector)) | ||
1249 | #define QIC_SET_GATE(cpi, vector) \ | ||
1250 | set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector)) | ||
1251 | |||
1252 | void __init voyager_smp_intr_init(void) | ||
1253 | { | ||
1254 | int i; | ||
1255 | |||
1256 | /* initialize the per cpu irq mask to all disabled */ | ||
1257 | for (i = 0; i < nr_cpu_ids; i++) | ||
1258 | vic_irq_mask[i] = 0xFFFF; | ||
1259 | |||
1260 | VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt); | ||
1261 | |||
1262 | VIC_SET_GATE(VIC_SYS_INT, vic_sys_interrupt); | ||
1263 | VIC_SET_GATE(VIC_CMN_INT, vic_cmn_interrupt); | ||
1264 | |||
1265 | QIC_SET_GATE(QIC_TIMER_CPI, qic_timer_interrupt); | ||
1266 | QIC_SET_GATE(QIC_INVALIDATE_CPI, qic_invalidate_interrupt); | ||
1267 | QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt); | ||
1268 | QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt); | ||
1269 | QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt); | ||
1270 | |||
1271 | /* now put the VIC descriptor into the first 48 IRQs | ||
1272 | * | ||
1273 | * This is for later: first 16 correspond to PC IRQs; next 16 | ||
1274 | * are Primary MC IRQs and final 16 are Secondary MC IRQs */ | ||
1275 | for (i = 0; i < 48; i++) | ||
1276 | set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq); | ||
1277 | } | ||
1278 | |||
1279 | /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per | ||
1280 | * processor to receive CPI */ | ||
1281 | static void send_CPI(__u32 cpuset, __u8 cpi) | ||
1282 | { | ||
1283 | int cpu; | ||
1284 | __u32 quad_cpuset = (cpuset & voyager_quad_processors); | ||
1285 | |||
1286 | if (cpi < VIC_START_FAKE_CPI) { | ||
1287 | /* fake CPI are only used for booting, so send to the | ||
1288 | * extended quads as well---Quads must be VIC booted */ | ||
1289 | outb((__u8) (cpuset), VIC_CPI_Registers[cpi]); | ||
1290 | return; | ||
1291 | } | ||
1292 | if (quad_cpuset) | ||
1293 | send_QIC_CPI(quad_cpuset, cpi); | ||
1294 | cpuset &= ~quad_cpuset; | ||
1295 | cpuset &= 0xff; /* only first 8 CPUs vaild for VIC CPI */ | ||
1296 | if (cpuset == 0) | ||
1297 | return; | ||
1298 | for_each_online_cpu(cpu) { | ||
1299 | if (cpuset & (1 << cpu)) | ||
1300 | set_bit(cpi, &vic_cpi_mailbox[cpu]); | ||
1301 | } | ||
1302 | if (cpuset) | ||
1303 | outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]); | ||
1304 | } | ||
1305 | |||
1306 | /* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and | ||
1307 | * set the cache line to shared by reading it. | ||
1308 | * | ||
1309 | * DON'T make this inline otherwise the cache line read will be | ||
1310 | * optimised away | ||
1311 | * */ | ||
1312 | static int ack_QIC_CPI(__u8 cpi) | ||
1313 | { | ||
1314 | __u8 cpu = hard_smp_processor_id(); | ||
1315 | |||
1316 | cpi &= 7; | ||
1317 | |||
1318 | outb(1 << cpi, QIC_INTERRUPT_CLEAR1); | ||
1319 | return voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi; | ||
1320 | } | ||
1321 | |||
1322 | static void ack_special_QIC_CPI(__u8 cpi) | ||
1323 | { | ||
1324 | switch (cpi) { | ||
1325 | case VIC_CMN_INT: | ||
1326 | outb(QIC_CMN_INT, QIC_INTERRUPT_CLEAR0); | ||
1327 | break; | ||
1328 | case VIC_SYS_INT: | ||
1329 | outb(QIC_SYS_INT, QIC_INTERRUPT_CLEAR0); | ||
1330 | break; | ||
1331 | } | ||
1332 | /* also clear at the VIC, just in case (nop for non-extended proc) */ | ||
1333 | ack_VIC_CPI(cpi); | ||
1334 | } | ||
1335 | |||
1336 | /* Acknowledge receipt of CPI in the VIC (essentially an EOI) */ | ||
1337 | static void ack_VIC_CPI(__u8 cpi) | ||
1338 | { | ||
1339 | #ifdef VOYAGER_DEBUG | ||
1340 | unsigned long flags; | ||
1341 | __u16 isr; | ||
1342 | __u8 cpu = smp_processor_id(); | ||
1343 | |||
1344 | local_irq_save(flags); | ||
1345 | isr = vic_read_isr(); | ||
1346 | if ((isr & (1 << (cpi & 7))) == 0) { | ||
1347 | printk("VOYAGER SMP: CPU%d lost CPI%d\n", cpu, cpi); | ||
1348 | } | ||
1349 | #endif | ||
1350 | /* send specific EOI; the two system interrupts have | ||
1351 | * bit 4 set for a separate vector but behave as the | ||
1352 | * corresponding 3 bit intr */ | ||
1353 | outb_p(0x60 | (cpi & 7), 0x20); | ||
1354 | |||
1355 | #ifdef VOYAGER_DEBUG | ||
1356 | if ((vic_read_isr() & (1 << (cpi & 7))) != 0) { | ||
1357 | printk("VOYAGER SMP: CPU%d still asserting CPI%d\n", cpu, cpi); | ||
1358 | } | ||
1359 | local_irq_restore(flags); | ||
1360 | #endif | ||
1361 | } | ||
1362 | |||
1363 | /* cribbed with thanks from irq.c */ | ||
1364 | #define __byte(x,y) (((unsigned char *)&(y))[x]) | ||
1365 | #define cached_21(cpu) (__byte(0,vic_irq_mask[cpu])) | ||
1366 | #define cached_A1(cpu) (__byte(1,vic_irq_mask[cpu])) | ||
1367 | |||
1368 | static unsigned int startup_vic_irq(unsigned int irq) | ||
1369 | { | ||
1370 | unmask_vic_irq(irq); | ||
1371 | |||
1372 | return 0; | ||
1373 | } | ||
1374 | |||
1375 | /* The enable and disable routines. This is where we run into | ||
1376 | * conflicting architectural philosophy. Fundamentally, the voyager | ||
1377 | * architecture does not expect to have to disable interrupts globally | ||
1378 | * (the IRQ controllers belong to each CPU). The processor masquerade | ||
1379 | * which is used to start the system shouldn't be used in a running OS | ||
1380 | * since it will cause great confusion if two separate CPUs drive to | ||
1381 | * the same IRQ controller (I know, I've tried it). | ||
1382 | * | ||
1383 | * The solution is a variant on the NCR lazy SPL design: | ||
1384 | * | ||
1385 | * 1) To disable an interrupt, do nothing (other than set the | ||
1386 | * IRQ_DISABLED flag). This dares the interrupt actually to arrive. | ||
1387 | * | ||
1388 | * 2) If the interrupt dares to come in, raise the local mask against | ||
1389 | * it (this will result in all the CPU masks being raised | ||
1390 | * eventually). | ||
1391 | * | ||
1392 | * 3) To enable the interrupt, lower the mask on the local CPU and | ||
1393 | * broadcast an Interrupt enable CPI which causes all other CPUs to | ||
1394 | * adjust their masks accordingly. */ | ||
1395 | |||
1396 | static void unmask_vic_irq(unsigned int irq) | ||
1397 | { | ||
1398 | /* linux doesn't to processor-irq affinity, so enable on | ||
1399 | * all CPUs we know about */ | ||
1400 | int cpu = smp_processor_id(), real_cpu; | ||
1401 | __u16 mask = (1 << irq); | ||
1402 | __u32 processorList = 0; | ||
1403 | unsigned long flags; | ||
1404 | |||
1405 | VDEBUG(("VOYAGER: unmask_vic_irq(%d) CPU%d affinity 0x%lx\n", | ||
1406 | irq, cpu, cpu_irq_affinity[cpu])); | ||
1407 | spin_lock_irqsave(&vic_irq_lock, flags); | ||
1408 | for_each_online_cpu(real_cpu) { | ||
1409 | if (!(voyager_extended_vic_processors & (1 << real_cpu))) | ||
1410 | continue; | ||
1411 | if (!(cpu_irq_affinity[real_cpu] & mask)) { | ||
1412 | /* irq has no affinity for this CPU, ignore */ | ||
1413 | continue; | ||
1414 | } | ||
1415 | if (real_cpu == cpu) { | ||
1416 | enable_local_vic_irq(irq); | ||
1417 | } else if (vic_irq_mask[real_cpu] & mask) { | ||
1418 | vic_irq_enable_mask[real_cpu] |= mask; | ||
1419 | processorList |= (1 << real_cpu); | ||
1420 | } | ||
1421 | } | ||
1422 | spin_unlock_irqrestore(&vic_irq_lock, flags); | ||
1423 | if (processorList) | ||
1424 | send_CPI(processorList, VIC_ENABLE_IRQ_CPI); | ||
1425 | } | ||
1426 | |||
1427 | static void mask_vic_irq(unsigned int irq) | ||
1428 | { | ||
1429 | /* lazy disable, do nothing */ | ||
1430 | } | ||
1431 | |||
1432 | static void enable_local_vic_irq(unsigned int irq) | ||
1433 | { | ||
1434 | __u8 cpu = smp_processor_id(); | ||
1435 | __u16 mask = ~(1 << irq); | ||
1436 | __u16 old_mask = vic_irq_mask[cpu]; | ||
1437 | |||
1438 | vic_irq_mask[cpu] &= mask; | ||
1439 | if (vic_irq_mask[cpu] == old_mask) | ||
1440 | return; | ||
1441 | |||
1442 | VDEBUG(("VOYAGER DEBUG: Enabling irq %d in hardware on CPU %d\n", | ||
1443 | irq, cpu)); | ||
1444 | |||
1445 | if (irq & 8) { | ||
1446 | outb_p(cached_A1(cpu), 0xA1); | ||
1447 | (void)inb_p(0xA1); | ||
1448 | } else { | ||
1449 | outb_p(cached_21(cpu), 0x21); | ||
1450 | (void)inb_p(0x21); | ||
1451 | } | ||
1452 | } | ||
1453 | |||
1454 | static void disable_local_vic_irq(unsigned int irq) | ||
1455 | { | ||
1456 | __u8 cpu = smp_processor_id(); | ||
1457 | __u16 mask = (1 << irq); | ||
1458 | __u16 old_mask = vic_irq_mask[cpu]; | ||
1459 | |||
1460 | if (irq == 7) | ||
1461 | return; | ||
1462 | |||
1463 | vic_irq_mask[cpu] |= mask; | ||
1464 | if (old_mask == vic_irq_mask[cpu]) | ||
1465 | return; | ||
1466 | |||
1467 | VDEBUG(("VOYAGER DEBUG: Disabling irq %d in hardware on CPU %d\n", | ||
1468 | irq, cpu)); | ||
1469 | |||
1470 | if (irq & 8) { | ||
1471 | outb_p(cached_A1(cpu), 0xA1); | ||
1472 | (void)inb_p(0xA1); | ||
1473 | } else { | ||
1474 | outb_p(cached_21(cpu), 0x21); | ||
1475 | (void)inb_p(0x21); | ||
1476 | } | ||
1477 | } | ||
1478 | |||
1479 | /* The VIC is level triggered, so the ack can only be issued after the | ||
1480 | * interrupt completes. However, we do Voyager lazy interrupt | ||
1481 | * handling here: It is an extremely expensive operation to mask an | ||
1482 | * interrupt in the vic, so we merely set a flag (IRQ_DISABLED). If | ||
1483 | * this interrupt actually comes in, then we mask and ack here to push | ||
1484 | * the interrupt off to another CPU */ | ||
1485 | static void before_handle_vic_irq(unsigned int irq) | ||
1486 | { | ||
1487 | irq_desc_t *desc = irq_to_desc(irq); | ||
1488 | __u8 cpu = smp_processor_id(); | ||
1489 | |||
1490 | _raw_spin_lock(&vic_irq_lock); | ||
1491 | vic_intr_total++; | ||
1492 | vic_intr_count[cpu]++; | ||
1493 | |||
1494 | if (!(cpu_irq_affinity[cpu] & (1 << irq))) { | ||
1495 | /* The irq is not in our affinity mask, push it off | ||
1496 | * onto another CPU */ | ||
1497 | VDEBUG(("VOYAGER DEBUG: affinity triggered disable of irq %d " | ||
1498 | "on cpu %d\n", irq, cpu)); | ||
1499 | disable_local_vic_irq(irq); | ||
1500 | /* set IRQ_INPROGRESS to prevent the handler in irq.c from | ||
1501 | * actually calling the interrupt routine */ | ||
1502 | desc->status |= IRQ_REPLAY | IRQ_INPROGRESS; | ||
1503 | } else if (desc->status & IRQ_DISABLED) { | ||
1504 | /* Damn, the interrupt actually arrived, do the lazy | ||
1505 | * disable thing. The interrupt routine in irq.c will | ||
1506 | * not handle a IRQ_DISABLED interrupt, so nothing more | ||
1507 | * need be done here */ | ||
1508 | VDEBUG(("VOYAGER DEBUG: lazy disable of irq %d on CPU %d\n", | ||
1509 | irq, cpu)); | ||
1510 | disable_local_vic_irq(irq); | ||
1511 | desc->status |= IRQ_REPLAY; | ||
1512 | } else { | ||
1513 | desc->status &= ~IRQ_REPLAY; | ||
1514 | } | ||
1515 | |||
1516 | _raw_spin_unlock(&vic_irq_lock); | ||
1517 | } | ||
1518 | |||
1519 | /* Finish the VIC interrupt: basically mask */ | ||
1520 | static void after_handle_vic_irq(unsigned int irq) | ||
1521 | { | ||
1522 | irq_desc_t *desc = irq_to_desc(irq); | ||
1523 | |||
1524 | _raw_spin_lock(&vic_irq_lock); | ||
1525 | { | ||
1526 | unsigned int status = desc->status & ~IRQ_INPROGRESS; | ||
1527 | #ifdef VOYAGER_DEBUG | ||
1528 | __u16 isr; | ||
1529 | #endif | ||
1530 | |||
1531 | desc->status = status; | ||
1532 | if ((status & IRQ_DISABLED)) | ||
1533 | disable_local_vic_irq(irq); | ||
1534 | #ifdef VOYAGER_DEBUG | ||
1535 | /* DEBUG: before we ack, check what's in progress */ | ||
1536 | isr = vic_read_isr(); | ||
1537 | if ((isr & (1 << irq) && !(status & IRQ_REPLAY)) == 0) { | ||
1538 | int i; | ||
1539 | __u8 cpu = smp_processor_id(); | ||
1540 | __u8 real_cpu; | ||
1541 | int mask; /* Um... initialize me??? --RR */ | ||
1542 | |||
1543 | printk("VOYAGER SMP: CPU%d lost interrupt %d\n", | ||
1544 | cpu, irq); | ||
1545 | for_each_possible_cpu(real_cpu, mask) { | ||
1546 | |||
1547 | outb(VIC_CPU_MASQUERADE_ENABLE | real_cpu, | ||
1548 | VIC_PROCESSOR_ID); | ||
1549 | isr = vic_read_isr(); | ||
1550 | if (isr & (1 << irq)) { | ||
1551 | printk | ||
1552 | ("VOYAGER SMP: CPU%d ack irq %d\n", | ||
1553 | real_cpu, irq); | ||
1554 | ack_vic_irq(irq); | ||
1555 | } | ||
1556 | outb(cpu, VIC_PROCESSOR_ID); | ||
1557 | } | ||
1558 | } | ||
1559 | #endif /* VOYAGER_DEBUG */ | ||
1560 | /* as soon as we ack, the interrupt is eligible for | ||
1561 | * receipt by another CPU so everything must be in | ||
1562 | * order here */ | ||
1563 | ack_vic_irq(irq); | ||
1564 | if (status & IRQ_REPLAY) { | ||
1565 | /* replay is set if we disable the interrupt | ||
1566 | * in the before_handle_vic_irq() routine, so | ||
1567 | * clear the in progress bit here to allow the | ||
1568 | * next CPU to handle this correctly */ | ||
1569 | desc->status &= ~(IRQ_REPLAY | IRQ_INPROGRESS); | ||
1570 | } | ||
1571 | #ifdef VOYAGER_DEBUG | ||
1572 | isr = vic_read_isr(); | ||
1573 | if ((isr & (1 << irq)) != 0) | ||
1574 | printk("VOYAGER SMP: after_handle_vic_irq() after " | ||
1575 | "ack irq=%d, isr=0x%x\n", irq, isr); | ||
1576 | #endif /* VOYAGER_DEBUG */ | ||
1577 | } | ||
1578 | _raw_spin_unlock(&vic_irq_lock); | ||
1579 | |||
1580 | /* All code after this point is out of the main path - the IRQ | ||
1581 | * may be intercepted by another CPU if reasserted */ | ||
1582 | } | ||
1583 | |||
1584 | /* Linux processor - interrupt affinity manipulations. | ||
1585 | * | ||
1586 | * For each processor, we maintain a 32 bit irq affinity mask. | ||
1587 | * Initially it is set to all 1's so every processor accepts every | ||
1588 | * interrupt. In this call, we change the processor's affinity mask: | ||
1589 | * | ||
1590 | * Change from enable to disable: | ||
1591 | * | ||
1592 | * If the interrupt ever comes in to the processor, we will disable it | ||
1593 | * and ack it to push it off to another CPU, so just accept the mask here. | ||
1594 | * | ||
1595 | * Change from disable to enable: | ||
1596 | * | ||
1597 | * change the mask and then do an interrupt enable CPI to re-enable on | ||
1598 | * the selected processors */ | ||
1599 | |||
1600 | void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask) | ||
1601 | { | ||
1602 | /* Only extended processors handle interrupts */ | ||
1603 | unsigned long real_mask; | ||
1604 | unsigned long irq_mask = 1 << irq; | ||
1605 | int cpu; | ||
1606 | |||
1607 | real_mask = cpus_addr(*mask)[0] & voyager_extended_vic_processors; | ||
1608 | |||
1609 | if (cpus_addr(*mask)[0] == 0) | ||
1610 | /* can't have no CPUs to accept the interrupt -- extremely | ||
1611 | * bad things will happen */ | ||
1612 | return; | ||
1613 | |||
1614 | if (irq == 0) | ||
1615 | /* can't change the affinity of the timer IRQ. This | ||
1616 | * is due to the constraint in the voyager | ||
1617 | * architecture that the CPI also comes in on and IRQ | ||
1618 | * line and we have chosen IRQ0 for this. If you | ||
1619 | * raise the mask on this interrupt, the processor | ||
1620 | * will no-longer be able to accept VIC CPIs */ | ||
1621 | return; | ||
1622 | |||
1623 | if (irq >= 32) | ||
1624 | /* You can only have 32 interrupts in a voyager system | ||
1625 | * (and 32 only if you have a secondary microchannel | ||
1626 | * bus) */ | ||
1627 | return; | ||
1628 | |||
1629 | for_each_online_cpu(cpu) { | ||
1630 | unsigned long cpu_mask = 1 << cpu; | ||
1631 | |||
1632 | if (cpu_mask & real_mask) { | ||
1633 | /* enable the interrupt for this cpu */ | ||
1634 | cpu_irq_affinity[cpu] |= irq_mask; | ||
1635 | } else { | ||
1636 | /* disable the interrupt for this cpu */ | ||
1637 | cpu_irq_affinity[cpu] &= ~irq_mask; | ||
1638 | } | ||
1639 | } | ||
1640 | /* this is magic, we now have the correct affinity maps, so | ||
1641 | * enable the interrupt. This will send an enable CPI to | ||
1642 | * those CPUs who need to enable it in their local masks, | ||
1643 | * causing them to correct for the new affinity . If the | ||
1644 | * interrupt is currently globally disabled, it will simply be | ||
1645 | * disabled again as it comes in (voyager lazy disable). If | ||
1646 | * the affinity map is tightened to disable the interrupt on a | ||
1647 | * cpu, it will be pushed off when it comes in */ | ||
1648 | unmask_vic_irq(irq); | ||
1649 | } | ||
1650 | |||
1651 | static void ack_vic_irq(unsigned int irq) | ||
1652 | { | ||
1653 | if (irq & 8) { | ||
1654 | outb(0x62, 0x20); /* Specific EOI to cascade */ | ||
1655 | outb(0x60 | (irq & 7), 0xA0); | ||
1656 | } else { | ||
1657 | outb(0x60 | (irq & 7), 0x20); | ||
1658 | } | ||
1659 | } | ||
1660 | |||
1661 | /* enable the CPIs. In the VIC, the CPIs are delivered by the 8259 | ||
1662 | * but are not vectored by it. This means that the 8259 mask must be | ||
1663 | * lowered to receive them */ | ||
1664 | static __init void vic_enable_cpi(void) | ||
1665 | { | ||
1666 | __u8 cpu = smp_processor_id(); | ||
1667 | |||
1668 | /* just take a copy of the current mask (nop for boot cpu) */ | ||
1669 | vic_irq_mask[cpu] = vic_irq_mask[boot_cpu_id]; | ||
1670 | |||
1671 | enable_local_vic_irq(VIC_CPI_LEVEL0); | ||
1672 | enable_local_vic_irq(VIC_CPI_LEVEL1); | ||
1673 | /* for sys int and cmn int */ | ||
1674 | enable_local_vic_irq(7); | ||
1675 | |||
1676 | if (is_cpu_quad()) { | ||
1677 | outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0); | ||
1678 | outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1); | ||
1679 | VDEBUG(("VOYAGER SMP: QIC ENABLE CPI: CPU%d: MASK 0x%x\n", | ||
1680 | cpu, QIC_CPI_ENABLE)); | ||
1681 | } | ||
1682 | |||
1683 | VDEBUG(("VOYAGER SMP: ENABLE CPI: CPU%d: MASK 0x%x\n", | ||
1684 | cpu, vic_irq_mask[cpu])); | ||
1685 | } | ||
1686 | |||
1687 | void voyager_smp_dump() | ||
1688 | { | ||
1689 | int old_cpu = smp_processor_id(), cpu; | ||
1690 | |||
1691 | /* dump the interrupt masks of each processor */ | ||
1692 | for_each_online_cpu(cpu) { | ||
1693 | __u16 imr, isr, irr; | ||
1694 | unsigned long flags; | ||
1695 | |||
1696 | local_irq_save(flags); | ||
1697 | outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID); | ||
1698 | imr = (inb(0xa1) << 8) | inb(0x21); | ||
1699 | outb(0x0a, 0xa0); | ||
1700 | irr = inb(0xa0) << 8; | ||
1701 | outb(0x0a, 0x20); | ||
1702 | irr |= inb(0x20); | ||
1703 | outb(0x0b, 0xa0); | ||
1704 | isr = inb(0xa0) << 8; | ||
1705 | outb(0x0b, 0x20); | ||
1706 | isr |= inb(0x20); | ||
1707 | outb(old_cpu, VIC_PROCESSOR_ID); | ||
1708 | local_irq_restore(flags); | ||
1709 | printk("\tCPU%d: mask=0x%x, IMR=0x%x, IRR=0x%x, ISR=0x%x\n", | ||
1710 | cpu, vic_irq_mask[cpu], imr, irr, isr); | ||
1711 | #if 0 | ||
1712 | /* These lines are put in to try to unstick an un ack'd irq */ | ||
1713 | if (isr != 0) { | ||
1714 | int irq; | ||
1715 | for (irq = 0; irq < 16; irq++) { | ||
1716 | if (isr & (1 << irq)) { | ||
1717 | printk("\tCPU%d: ack irq %d\n", | ||
1718 | cpu, irq); | ||
1719 | local_irq_save(flags); | ||
1720 | outb(VIC_CPU_MASQUERADE_ENABLE | cpu, | ||
1721 | VIC_PROCESSOR_ID); | ||
1722 | ack_vic_irq(irq); | ||
1723 | outb(old_cpu, VIC_PROCESSOR_ID); | ||
1724 | local_irq_restore(flags); | ||
1725 | } | ||
1726 | } | ||
1727 | } | ||
1728 | #endif | ||
1729 | } | ||
1730 | } | ||
1731 | |||
1732 | void smp_voyager_power_off(void *dummy) | ||
1733 | { | ||
1734 | if (smp_processor_id() == boot_cpu_id) | ||
1735 | voyager_power_off(); | ||
1736 | else | ||
1737 | smp_stop_cpu_function(NULL); | ||
1738 | } | ||
1739 | |||
1740 | static void __init voyager_smp_prepare_cpus(unsigned int max_cpus) | ||
1741 | { | ||
1742 | /* FIXME: ignore max_cpus for now */ | ||
1743 | smp_boot_cpus(); | ||
1744 | } | ||
1745 | |||
1746 | static void __cpuinit voyager_smp_prepare_boot_cpu(void) | ||
1747 | { | ||
1748 | init_gdt(smp_processor_id()); | ||
1749 | switch_to_new_gdt(); | ||
1750 | |||
1751 | cpu_online_map = cpumask_of_cpu(smp_processor_id()); | ||
1752 | cpu_callout_map = cpumask_of_cpu(smp_processor_id()); | ||
1753 | cpu_callin_map = CPU_MASK_NONE; | ||
1754 | cpu_present_map = cpumask_of_cpu(smp_processor_id()); | ||
1755 | |||
1756 | } | ||
1757 | |||
1758 | static int __cpuinit voyager_cpu_up(unsigned int cpu) | ||
1759 | { | ||
1760 | /* This only works at boot for x86. See "rewrite" above. */ | ||
1761 | if (cpu_isset(cpu, smp_commenced_mask)) | ||
1762 | return -ENOSYS; | ||
1763 | |||
1764 | /* In case one didn't come up */ | ||
1765 | if (!cpu_isset(cpu, cpu_callin_map)) | ||
1766 | return -EIO; | ||
1767 | /* Unleash the CPU! */ | ||
1768 | cpu_set(cpu, smp_commenced_mask); | ||
1769 | while (!cpu_online(cpu)) | ||
1770 | mb(); | ||
1771 | return 0; | ||
1772 | } | ||
1773 | |||
1774 | static void __init voyager_smp_cpus_done(unsigned int max_cpus) | ||
1775 | { | ||
1776 | zap_low_mappings(); | ||
1777 | } | ||
1778 | |||
1779 | void __init smp_setup_processor_id(void) | ||
1780 | { | ||
1781 | current_thread_info()->cpu = hard_smp_processor_id(); | ||
1782 | x86_write_percpu(cpu_number, hard_smp_processor_id()); | ||
1783 | } | ||
1784 | |||
1785 | static void voyager_send_call_func(const struct cpumask *callmask) | ||
1786 | { | ||
1787 | __u32 mask = cpus_addr(*callmask)[0] & ~(1 << smp_processor_id()); | ||
1788 | send_CPI(mask, VIC_CALL_FUNCTION_CPI); | ||
1789 | } | ||
1790 | |||
1791 | static void voyager_send_call_func_single(int cpu) | ||
1792 | { | ||
1793 | send_CPI(1 << cpu, VIC_CALL_FUNCTION_SINGLE_CPI); | ||
1794 | } | ||
1795 | |||
1796 | struct smp_ops smp_ops = { | ||
1797 | .smp_prepare_boot_cpu = voyager_smp_prepare_boot_cpu, | ||
1798 | .smp_prepare_cpus = voyager_smp_prepare_cpus, | ||
1799 | .cpu_up = voyager_cpu_up, | ||
1800 | .smp_cpus_done = voyager_smp_cpus_done, | ||
1801 | |||
1802 | .smp_send_stop = voyager_smp_send_stop, | ||
1803 | .smp_send_reschedule = voyager_smp_send_reschedule, | ||
1804 | |||
1805 | .send_call_func_ipi = voyager_send_call_func, | ||
1806 | .send_call_func_single_ipi = voyager_send_call_func_single, | ||
1807 | }; | ||
diff --git a/arch/x86/mach-voyager/voyager_thread.c b/arch/x86/mach-voyager/voyager_thread.c deleted file mode 100644 index 15464a20fb38..000000000000 --- a/arch/x86/mach-voyager/voyager_thread.c +++ /dev/null | |||
@@ -1,128 +0,0 @@ | |||
1 | /* -*- mode: c; c-basic-offset: 8 -*- */ | ||
2 | |||
3 | /* Copyright (C) 2001 | ||
4 | * | ||
5 | * Author: J.E.J.Bottomley@HansenPartnership.com | ||
6 | * | ||
7 | * This module provides the machine status monitor thread for the | ||
8 | * voyager architecture. This allows us to monitor the machine | ||
9 | * environment (temp, voltage, fan function) and the front panel and | ||
10 | * internal UPS. If a fault is detected, this thread takes corrective | ||
11 | * action (usually just informing init) | ||
12 | * */ | ||
13 | |||
14 | #include <linux/module.h> | ||
15 | #include <linux/mm.h> | ||
16 | #include <linux/kernel_stat.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/mc146818rtc.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/bootmem.h> | ||
21 | #include <linux/kmod.h> | ||
22 | #include <linux/completion.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/kthread.h> | ||
25 | #include <asm/desc.h> | ||
26 | #include <asm/voyager.h> | ||
27 | #include <asm/vic.h> | ||
28 | #include <asm/mtrr.h> | ||
29 | #include <asm/msr.h> | ||
30 | |||
31 | struct task_struct *voyager_thread; | ||
32 | static __u8 set_timeout; | ||
33 | |||
34 | static int execute(const char *string) | ||
35 | { | ||
36 | int ret; | ||
37 | |||
38 | char *envp[] = { | ||
39 | "HOME=/", | ||
40 | "TERM=linux", | ||
41 | "PATH=/sbin:/usr/sbin:/bin:/usr/bin", | ||
42 | NULL, | ||
43 | }; | ||
44 | char *argv[] = { | ||
45 | "/bin/bash", | ||
46 | "-c", | ||
47 | (char *)string, | ||
48 | NULL, | ||
49 | }; | ||
50 | |||
51 | if ((ret = | ||
52 | call_usermodehelper(argv[0], argv, envp, UMH_WAIT_PROC)) != 0) { | ||
53 | printk(KERN_ERR "Voyager failed to run \"%s\": %i\n", string, | ||
54 | ret); | ||
55 | } | ||
56 | return ret; | ||
57 | } | ||
58 | |||
59 | static void check_from_kernel(void) | ||
60 | { | ||
61 | if (voyager_status.switch_off) { | ||
62 | |||
63 | /* FIXME: This should be configurable via proc */ | ||
64 | execute("umask 600; echo 0 > /etc/initrunlvl; kill -HUP 1"); | ||
65 | } else if (voyager_status.power_fail) { | ||
66 | VDEBUG(("Voyager daemon detected AC power failure\n")); | ||
67 | |||
68 | /* FIXME: This should be configureable via proc */ | ||
69 | execute("umask 600; echo F > /etc/powerstatus; kill -PWR 1"); | ||
70 | set_timeout = 1; | ||
71 | } | ||
72 | } | ||
73 | |||
74 | static void check_continuing_condition(void) | ||
75 | { | ||
76 | if (voyager_status.power_fail) { | ||
77 | __u8 data; | ||
78 | voyager_cat_psi(VOYAGER_PSI_SUBREAD, | ||
79 | VOYAGER_PSI_AC_FAIL_REG, &data); | ||
80 | if ((data & 0x1f) == 0) { | ||
81 | /* all power restored */ | ||
82 | printk(KERN_NOTICE | ||
83 | "VOYAGER AC power restored, cancelling shutdown\n"); | ||
84 | /* FIXME: should be user configureable */ | ||
85 | execute | ||
86 | ("umask 600; echo O > /etc/powerstatus; kill -PWR 1"); | ||
87 | set_timeout = 0; | ||
88 | } | ||
89 | } | ||
90 | } | ||
91 | |||
92 | static int thread(void *unused) | ||
93 | { | ||
94 | printk(KERN_NOTICE "Voyager starting monitor thread\n"); | ||
95 | |||
96 | for (;;) { | ||
97 | set_current_state(TASK_INTERRUPTIBLE); | ||
98 | schedule_timeout(set_timeout ? HZ : MAX_SCHEDULE_TIMEOUT); | ||
99 | |||
100 | VDEBUG(("Voyager Daemon awoken\n")); | ||
101 | if (voyager_status.request_from_kernel == 0) { | ||
102 | /* probably awoken from timeout */ | ||
103 | check_continuing_condition(); | ||
104 | } else { | ||
105 | check_from_kernel(); | ||
106 | voyager_status.request_from_kernel = 0; | ||
107 | } | ||
108 | } | ||
109 | } | ||
110 | |||
111 | static int __init voyager_thread_start(void) | ||
112 | { | ||
113 | voyager_thread = kthread_run(thread, NULL, "kvoyagerd"); | ||
114 | if (IS_ERR(voyager_thread)) { | ||
115 | printk(KERN_ERR | ||
116 | "Voyager: Failed to create system monitor thread.\n"); | ||
117 | return PTR_ERR(voyager_thread); | ||
118 | } | ||
119 | return 0; | ||
120 | } | ||
121 | |||
122 | static void __exit voyager_thread_stop(void) | ||
123 | { | ||
124 | kthread_stop(voyager_thread); | ||
125 | } | ||
126 | |||
127 | module_init(voyager_thread_start); | ||
128 | module_exit(voyager_thread_stop); | ||
diff --git a/arch/x86/math-emu/get_address.c b/arch/x86/math-emu/get_address.c index 420b3b6e3915..6ef5e99380f9 100644 --- a/arch/x86/math-emu/get_address.c +++ b/arch/x86/math-emu/get_address.c | |||
@@ -150,11 +150,9 @@ static long pm_address(u_char FPU_modrm, u_char segment, | |||
150 | #endif /* PARANOID */ | 150 | #endif /* PARANOID */ |
151 | 151 | ||
152 | switch (segment) { | 152 | switch (segment) { |
153 | /* gs isn't used by the kernel, so it still has its | ||
154 | user-space value. */ | ||
155 | case PREFIX_GS_ - 1: | 153 | case PREFIX_GS_ - 1: |
156 | /* N.B. - movl %seg, mem is a 2 byte write regardless of prefix */ | 154 | /* user gs handling can be lazy, use special accessors */ |
157 | savesegment(gs, addr->selector); | 155 | addr->selector = get_user_gs(FPU_info->regs); |
158 | break; | 156 | break; |
159 | default: | 157 | default: |
160 | addr->selector = PM_REG_(segment); | 158 | addr->selector = PM_REG_(segment); |
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile index d8cc96a2738f..08537747cb58 100644 --- a/arch/x86/mm/Makefile +++ b/arch/x86/mm/Makefile | |||
@@ -1,6 +1,8 @@ | |||
1 | obj-y := init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \ | 1 | obj-y := init.o init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \ |
2 | pat.o pgtable.o gup.o | 2 | pat.o pgtable.o gup.o |
3 | 3 | ||
4 | obj-$(CONFIG_SMP) += tlb.o | ||
5 | |||
4 | obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o | 6 | obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o |
5 | 7 | ||
6 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o | 8 | obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o |
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c index 7e8db53528a7..61b41ca3b5a2 100644 --- a/arch/x86/mm/extable.c +++ b/arch/x86/mm/extable.c | |||
@@ -23,6 +23,12 @@ int fixup_exception(struct pt_regs *regs) | |||
23 | 23 | ||
24 | fixup = search_exception_tables(regs->ip); | 24 | fixup = search_exception_tables(regs->ip); |
25 | if (fixup) { | 25 | if (fixup) { |
26 | /* If fixup is less than 16, it means uaccess error */ | ||
27 | if (fixup->fixup < 16) { | ||
28 | current_thread_info()->uaccess_err = -EFAULT; | ||
29 | regs->ip += fixup->fixup; | ||
30 | return 1; | ||
31 | } | ||
26 | regs->ip = fixup->fixup; | 32 | regs->ip = fixup->fixup; |
27 | return 1; | 33 | return 1; |
28 | } | 34 | } |
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index c76ef1d701c9..a03b7279efa0 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c | |||
@@ -1,73 +1,79 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1995 Linus Torvalds | 2 | * Copyright (C) 1995 Linus Torvalds |
3 | * Copyright (C) 2001,2002 Andi Kleen, SuSE Labs. | 3 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
4 | * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar | ||
4 | */ | 5 | */ |
5 | |||
6 | #include <linux/signal.h> | ||
7 | #include <linux/sched.h> | ||
8 | #include <linux/kernel.h> | ||
9 | #include <linux/errno.h> | ||
10 | #include <linux/string.h> | ||
11 | #include <linux/types.h> | ||
12 | #include <linux/ptrace.h> | ||
13 | #include <linux/mmiotrace.h> | ||
14 | #include <linux/mman.h> | ||
15 | #include <linux/mm.h> | ||
16 | #include <linux/smp.h> | ||
17 | #include <linux/interrupt.h> | 6 | #include <linux/interrupt.h> |
18 | #include <linux/init.h> | 7 | #include <linux/mmiotrace.h> |
19 | #include <linux/tty.h> | 8 | #include <linux/bootmem.h> |
20 | #include <linux/vt_kern.h> /* For unblank_screen() */ | ||
21 | #include <linux/compiler.h> | 9 | #include <linux/compiler.h> |
22 | #include <linux/highmem.h> | 10 | #include <linux/highmem.h> |
23 | #include <linux/bootmem.h> /* for max_low_pfn */ | ||
24 | #include <linux/vmalloc.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/kprobes.h> | 11 | #include <linux/kprobes.h> |
27 | #include <linux/uaccess.h> | 12 | #include <linux/uaccess.h> |
13 | #include <linux/vmalloc.h> | ||
14 | #include <linux/vt_kern.h> | ||
15 | #include <linux/signal.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/ptrace.h> | ||
18 | #include <linux/string.h> | ||
19 | #include <linux/module.h> | ||
28 | #include <linux/kdebug.h> | 20 | #include <linux/kdebug.h> |
21 | #include <linux/errno.h> | ||
22 | #include <linux/magic.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/types.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/mman.h> | ||
27 | #include <linux/tty.h> | ||
28 | #include <linux/smp.h> | ||
29 | #include <linux/mm.h> | ||
30 | |||
31 | #include <asm-generic/sections.h> | ||
29 | 32 | ||
30 | #include <asm/system.h> | ||
31 | #include <asm/desc.h> | ||
32 | #include <asm/segment.h> | ||
33 | #include <asm/pgalloc.h> | ||
34 | #include <asm/smp.h> | ||
35 | #include <asm/tlbflush.h> | 33 | #include <asm/tlbflush.h> |
34 | #include <asm/pgalloc.h> | ||
35 | #include <asm/segment.h> | ||
36 | #include <asm/system.h> | ||
36 | #include <asm/proto.h> | 37 | #include <asm/proto.h> |
37 | #include <asm-generic/sections.h> | ||
38 | #include <asm/traps.h> | 38 | #include <asm/traps.h> |
39 | #include <asm/desc.h> | ||
39 | 40 | ||
40 | /* | 41 | /* |
41 | * Page fault error code bits | 42 | * Page fault error code bits: |
42 | * bit 0 == 0 means no page found, 1 means protection fault | 43 | * |
43 | * bit 1 == 0 means read, 1 means write | 44 | * bit 0 == 0: no page found 1: protection fault |
44 | * bit 2 == 0 means kernel, 1 means user-mode | 45 | * bit 1 == 0: read access 1: write access |
45 | * bit 3 == 1 means use of reserved bit detected | 46 | * bit 2 == 0: kernel-mode access 1: user-mode access |
46 | * bit 4 == 1 means fault was an instruction fetch | 47 | * bit 3 == 1: use of reserved bit detected |
48 | * bit 4 == 1: fault was an instruction fetch | ||
47 | */ | 49 | */ |
48 | #define PF_PROT (1<<0) | 50 | enum x86_pf_error_code { |
49 | #define PF_WRITE (1<<1) | 51 | |
50 | #define PF_USER (1<<2) | 52 | PF_PROT = 1 << 0, |
51 | #define PF_RSVD (1<<3) | 53 | PF_WRITE = 1 << 1, |
52 | #define PF_INSTR (1<<4) | 54 | PF_USER = 1 << 2, |
55 | PF_RSVD = 1 << 3, | ||
56 | PF_INSTR = 1 << 4, | ||
57 | }; | ||
53 | 58 | ||
59 | /* | ||
60 | * Returns 0 if mmiotrace is disabled, or if the fault is not | ||
61 | * handled by mmiotrace: | ||
62 | */ | ||
54 | static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) | 63 | static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) |
55 | { | 64 | { |
56 | #ifdef CONFIG_MMIOTRACE | ||
57 | if (unlikely(is_kmmio_active())) | 65 | if (unlikely(is_kmmio_active())) |
58 | if (kmmio_handler(regs, addr) == 1) | 66 | if (kmmio_handler(regs, addr) == 1) |
59 | return -1; | 67 | return -1; |
60 | #endif | ||
61 | return 0; | 68 | return 0; |
62 | } | 69 | } |
63 | 70 | ||
64 | static inline int notify_page_fault(struct pt_regs *regs) | 71 | static inline int notify_page_fault(struct pt_regs *regs) |
65 | { | 72 | { |
66 | #ifdef CONFIG_KPROBES | ||
67 | int ret = 0; | 73 | int ret = 0; |
68 | 74 | ||
69 | /* kprobe_running() needs smp_processor_id() */ | 75 | /* kprobe_running() needs smp_processor_id() */ |
70 | if (!user_mode_vm(regs)) { | 76 | if (kprobes_built_in() && !user_mode_vm(regs)) { |
71 | preempt_disable(); | 77 | preempt_disable(); |
72 | if (kprobe_running() && kprobe_fault_handler(regs, 14)) | 78 | if (kprobe_running() && kprobe_fault_handler(regs, 14)) |
73 | ret = 1; | 79 | ret = 1; |
@@ -75,29 +81,76 @@ static inline int notify_page_fault(struct pt_regs *regs) | |||
75 | } | 81 | } |
76 | 82 | ||
77 | return ret; | 83 | return ret; |
78 | #else | ||
79 | return 0; | ||
80 | #endif | ||
81 | } | 84 | } |
82 | 85 | ||
83 | /* | 86 | /* |
84 | * X86_32 | 87 | * Prefetch quirks: |
85 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | 88 | * |
86 | * Check that here and ignore it. | 89 | * 32-bit mode: |
90 | * | ||
91 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | ||
92 | * Check that here and ignore it. | ||
93 | * | ||
94 | * 64-bit mode: | ||
87 | * | 95 | * |
88 | * X86_64 | 96 | * Sometimes the CPU reports invalid exceptions on prefetch. |
89 | * Sometimes the CPU reports invalid exceptions on prefetch. | 97 | * Check that here and ignore it. |
90 | * Check that here and ignore it. | ||
91 | * | 98 | * |
92 | * Opcode checker based on code by Richard Brunner | 99 | * Opcode checker based on code by Richard Brunner. |
93 | */ | 100 | */ |
94 | static int is_prefetch(struct pt_regs *regs, unsigned long addr, | 101 | static inline int |
95 | unsigned long error_code) | 102 | check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, |
103 | unsigned char opcode, int *prefetch) | ||
96 | { | 104 | { |
105 | unsigned char instr_hi = opcode & 0xf0; | ||
106 | unsigned char instr_lo = opcode & 0x0f; | ||
107 | |||
108 | switch (instr_hi) { | ||
109 | case 0x20: | ||
110 | case 0x30: | ||
111 | /* | ||
112 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | ||
113 | * In X86_64 long mode, the CPU will signal invalid | ||
114 | * opcode if some of these prefixes are present so | ||
115 | * X86_64 will never get here anyway | ||
116 | */ | ||
117 | return ((instr_lo & 7) == 0x6); | ||
118 | #ifdef CONFIG_X86_64 | ||
119 | case 0x40: | ||
120 | /* | ||
121 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | ||
122 | * Need to figure out under what instruction mode the | ||
123 | * instruction was issued. Could check the LDT for lm, | ||
124 | * but for now it's good enough to assume that long | ||
125 | * mode only uses well known segments or kernel. | ||
126 | */ | ||
127 | return (!user_mode(regs)) || (regs->cs == __USER_CS); | ||
128 | #endif | ||
129 | case 0x60: | ||
130 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | ||
131 | return (instr_lo & 0xC) == 0x4; | ||
132 | case 0xF0: | ||
133 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ | ||
134 | return !instr_lo || (instr_lo>>1) == 1; | ||
135 | case 0x00: | ||
136 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | ||
137 | if (probe_kernel_address(instr, opcode)) | ||
138 | return 0; | ||
139 | |||
140 | *prefetch = (instr_lo == 0xF) && | ||
141 | (opcode == 0x0D || opcode == 0x18); | ||
142 | return 0; | ||
143 | default: | ||
144 | return 0; | ||
145 | } | ||
146 | } | ||
147 | |||
148 | static int | ||
149 | is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) | ||
150 | { | ||
151 | unsigned char *max_instr; | ||
97 | unsigned char *instr; | 152 | unsigned char *instr; |
98 | int scan_more = 1; | ||
99 | int prefetch = 0; | 153 | int prefetch = 0; |
100 | unsigned char *max_instr; | ||
101 | 154 | ||
102 | /* | 155 | /* |
103 | * If it was a exec (instruction fetch) fault on NX page, then | 156 | * If it was a exec (instruction fetch) fault on NX page, then |
@@ -106,106 +159,170 @@ static int is_prefetch(struct pt_regs *regs, unsigned long addr, | |||
106 | if (error_code & PF_INSTR) | 159 | if (error_code & PF_INSTR) |
107 | return 0; | 160 | return 0; |
108 | 161 | ||
109 | instr = (unsigned char *)convert_ip_to_linear(current, regs); | 162 | instr = (void *)convert_ip_to_linear(current, regs); |
110 | max_instr = instr + 15; | 163 | max_instr = instr + 15; |
111 | 164 | ||
112 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) | 165 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) |
113 | return 0; | 166 | return 0; |
114 | 167 | ||
115 | while (scan_more && instr < max_instr) { | 168 | while (instr < max_instr) { |
116 | unsigned char opcode; | 169 | unsigned char opcode; |
117 | unsigned char instr_hi; | ||
118 | unsigned char instr_lo; | ||
119 | 170 | ||
120 | if (probe_kernel_address(instr, opcode)) | 171 | if (probe_kernel_address(instr, opcode)) |
121 | break; | 172 | break; |
122 | 173 | ||
123 | instr_hi = opcode & 0xf0; | ||
124 | instr_lo = opcode & 0x0f; | ||
125 | instr++; | 174 | instr++; |
126 | 175 | ||
127 | switch (instr_hi) { | 176 | if (!check_prefetch_opcode(regs, instr, opcode, &prefetch)) |
128 | case 0x20: | ||
129 | case 0x30: | ||
130 | /* | ||
131 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | ||
132 | * In X86_64 long mode, the CPU will signal invalid | ||
133 | * opcode if some of these prefixes are present so | ||
134 | * X86_64 will never get here anyway | ||
135 | */ | ||
136 | scan_more = ((instr_lo & 7) == 0x6); | ||
137 | break; | 177 | break; |
138 | #ifdef CONFIG_X86_64 | ||
139 | case 0x40: | ||
140 | /* | ||
141 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | ||
142 | * Need to figure out under what instruction mode the | ||
143 | * instruction was issued. Could check the LDT for lm, | ||
144 | * but for now it's good enough to assume that long | ||
145 | * mode only uses well known segments or kernel. | ||
146 | */ | ||
147 | scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS); | ||
148 | break; | ||
149 | #endif | ||
150 | case 0x60: | ||
151 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | ||
152 | scan_more = (instr_lo & 0xC) == 0x4; | ||
153 | break; | ||
154 | case 0xF0: | ||
155 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ | ||
156 | scan_more = !instr_lo || (instr_lo>>1) == 1; | ||
157 | break; | ||
158 | case 0x00: | ||
159 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | ||
160 | scan_more = 0; | ||
161 | |||
162 | if (probe_kernel_address(instr, opcode)) | ||
163 | break; | ||
164 | prefetch = (instr_lo == 0xF) && | ||
165 | (opcode == 0x0D || opcode == 0x18); | ||
166 | break; | ||
167 | default: | ||
168 | scan_more = 0; | ||
169 | break; | ||
170 | } | ||
171 | } | 178 | } |
172 | return prefetch; | 179 | return prefetch; |
173 | } | 180 | } |
174 | 181 | ||
175 | static void force_sig_info_fault(int si_signo, int si_code, | 182 | static void |
176 | unsigned long address, struct task_struct *tsk) | 183 | force_sig_info_fault(int si_signo, int si_code, unsigned long address, |
184 | struct task_struct *tsk) | ||
177 | { | 185 | { |
178 | siginfo_t info; | 186 | siginfo_t info; |
179 | 187 | ||
180 | info.si_signo = si_signo; | 188 | info.si_signo = si_signo; |
181 | info.si_errno = 0; | 189 | info.si_errno = 0; |
182 | info.si_code = si_code; | 190 | info.si_code = si_code; |
183 | info.si_addr = (void __user *)address; | 191 | info.si_addr = (void __user *)address; |
192 | |||
184 | force_sig_info(si_signo, &info, tsk); | 193 | force_sig_info(si_signo, &info, tsk); |
185 | } | 194 | } |
186 | 195 | ||
187 | #ifdef CONFIG_X86_64 | 196 | DEFINE_SPINLOCK(pgd_lock); |
188 | static int bad_address(void *p) | 197 | LIST_HEAD(pgd_list); |
198 | |||
199 | #ifdef CONFIG_X86_32 | ||
200 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | ||
189 | { | 201 | { |
190 | unsigned long dummy; | 202 | unsigned index = pgd_index(address); |
191 | return probe_kernel_address((unsigned long *)p, dummy); | 203 | pgd_t *pgd_k; |
204 | pud_t *pud, *pud_k; | ||
205 | pmd_t *pmd, *pmd_k; | ||
206 | |||
207 | pgd += index; | ||
208 | pgd_k = init_mm.pgd + index; | ||
209 | |||
210 | if (!pgd_present(*pgd_k)) | ||
211 | return NULL; | ||
212 | |||
213 | /* | ||
214 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | ||
215 | * and redundant with the set_pmd() on non-PAE. As would | ||
216 | * set_pud. | ||
217 | */ | ||
218 | pud = pud_offset(pgd, address); | ||
219 | pud_k = pud_offset(pgd_k, address); | ||
220 | if (!pud_present(*pud_k)) | ||
221 | return NULL; | ||
222 | |||
223 | pmd = pmd_offset(pud, address); | ||
224 | pmd_k = pmd_offset(pud_k, address); | ||
225 | if (!pmd_present(*pmd_k)) | ||
226 | return NULL; | ||
227 | |||
228 | if (!pmd_present(*pmd)) { | ||
229 | set_pmd(pmd, *pmd_k); | ||
230 | arch_flush_lazy_mmu_mode(); | ||
231 | } else { | ||
232 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | ||
233 | } | ||
234 | |||
235 | return pmd_k; | ||
236 | } | ||
237 | |||
238 | void vmalloc_sync_all(void) | ||
239 | { | ||
240 | unsigned long address; | ||
241 | |||
242 | if (SHARED_KERNEL_PMD) | ||
243 | return; | ||
244 | |||
245 | for (address = VMALLOC_START & PMD_MASK; | ||
246 | address >= TASK_SIZE && address < FIXADDR_TOP; | ||
247 | address += PMD_SIZE) { | ||
248 | |||
249 | unsigned long flags; | ||
250 | struct page *page; | ||
251 | |||
252 | spin_lock_irqsave(&pgd_lock, flags); | ||
253 | list_for_each_entry(page, &pgd_list, lru) { | ||
254 | if (!vmalloc_sync_one(page_address(page), address)) | ||
255 | break; | ||
256 | } | ||
257 | spin_unlock_irqrestore(&pgd_lock, flags); | ||
258 | } | ||
259 | } | ||
260 | |||
261 | /* | ||
262 | * 32-bit: | ||
263 | * | ||
264 | * Handle a fault on the vmalloc or module mapping area | ||
265 | */ | ||
266 | static noinline int vmalloc_fault(unsigned long address) | ||
267 | { | ||
268 | unsigned long pgd_paddr; | ||
269 | pmd_t *pmd_k; | ||
270 | pte_t *pte_k; | ||
271 | |||
272 | /* Make sure we are in vmalloc area: */ | ||
273 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | ||
274 | return -1; | ||
275 | |||
276 | /* | ||
277 | * Synchronize this task's top level page-table | ||
278 | * with the 'reference' page table. | ||
279 | * | ||
280 | * Do _not_ use "current" here. We might be inside | ||
281 | * an interrupt in the middle of a task switch.. | ||
282 | */ | ||
283 | pgd_paddr = read_cr3(); | ||
284 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | ||
285 | if (!pmd_k) | ||
286 | return -1; | ||
287 | |||
288 | pte_k = pte_offset_kernel(pmd_k, address); | ||
289 | if (!pte_present(*pte_k)) | ||
290 | return -1; | ||
291 | |||
292 | return 0; | ||
293 | } | ||
294 | |||
295 | /* | ||
296 | * Did it hit the DOS screen memory VA from vm86 mode? | ||
297 | */ | ||
298 | static inline void | ||
299 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | ||
300 | struct task_struct *tsk) | ||
301 | { | ||
302 | unsigned long bit; | ||
303 | |||
304 | if (!v8086_mode(regs)) | ||
305 | return; | ||
306 | |||
307 | bit = (address - 0xA0000) >> PAGE_SHIFT; | ||
308 | if (bit < 32) | ||
309 | tsk->thread.screen_bitmap |= 1 << bit; | ||
192 | } | 310 | } |
193 | #endif | ||
194 | 311 | ||
195 | static void dump_pagetable(unsigned long address) | 312 | static void dump_pagetable(unsigned long address) |
196 | { | 313 | { |
197 | #ifdef CONFIG_X86_32 | ||
198 | __typeof__(pte_val(__pte(0))) page; | 314 | __typeof__(pte_val(__pte(0))) page; |
199 | 315 | ||
200 | page = read_cr3(); | 316 | page = read_cr3(); |
201 | page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT]; | 317 | page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT]; |
318 | |||
202 | #ifdef CONFIG_X86_PAE | 319 | #ifdef CONFIG_X86_PAE |
203 | printk("*pdpt = %016Lx ", page); | 320 | printk("*pdpt = %016Lx ", page); |
204 | if ((page >> PAGE_SHIFT) < max_low_pfn | 321 | if ((page >> PAGE_SHIFT) < max_low_pfn |
205 | && page & _PAGE_PRESENT) { | 322 | && page & _PAGE_PRESENT) { |
206 | page &= PAGE_MASK; | 323 | page &= PAGE_MASK; |
207 | page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT) | 324 | page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT) |
208 | & (PTRS_PER_PMD - 1)]; | 325 | & (PTRS_PER_PMD - 1)]; |
209 | printk(KERN_CONT "*pde = %016Lx ", page); | 326 | printk(KERN_CONT "*pde = %016Lx ", page); |
210 | page &= ~_PAGE_NX; | 327 | page &= ~_PAGE_NX; |
211 | } | 328 | } |
@@ -217,19 +334,145 @@ static void dump_pagetable(unsigned long address) | |||
217 | * We must not directly access the pte in the highpte | 334 | * We must not directly access the pte in the highpte |
218 | * case if the page table is located in highmem. | 335 | * case if the page table is located in highmem. |
219 | * And let's rather not kmap-atomic the pte, just in case | 336 | * And let's rather not kmap-atomic the pte, just in case |
220 | * it's allocated already. | 337 | * it's allocated already: |
221 | */ | 338 | */ |
222 | if ((page >> PAGE_SHIFT) < max_low_pfn | 339 | if ((page >> PAGE_SHIFT) < max_low_pfn |
223 | && (page & _PAGE_PRESENT) | 340 | && (page & _PAGE_PRESENT) |
224 | && !(page & _PAGE_PSE)) { | 341 | && !(page & _PAGE_PSE)) { |
342 | |||
225 | page &= PAGE_MASK; | 343 | page &= PAGE_MASK; |
226 | page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT) | 344 | page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT) |
227 | & (PTRS_PER_PTE - 1)]; | 345 | & (PTRS_PER_PTE - 1)]; |
228 | printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page); | 346 | printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page); |
229 | } | 347 | } |
230 | 348 | ||
231 | printk("\n"); | 349 | printk("\n"); |
232 | #else /* CONFIG_X86_64 */ | 350 | } |
351 | |||
352 | #else /* CONFIG_X86_64: */ | ||
353 | |||
354 | void vmalloc_sync_all(void) | ||
355 | { | ||
356 | unsigned long address; | ||
357 | |||
358 | for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END; | ||
359 | address += PGDIR_SIZE) { | ||
360 | |||
361 | const pgd_t *pgd_ref = pgd_offset_k(address); | ||
362 | unsigned long flags; | ||
363 | struct page *page; | ||
364 | |||
365 | if (pgd_none(*pgd_ref)) | ||
366 | continue; | ||
367 | |||
368 | spin_lock_irqsave(&pgd_lock, flags); | ||
369 | list_for_each_entry(page, &pgd_list, lru) { | ||
370 | pgd_t *pgd; | ||
371 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | ||
372 | if (pgd_none(*pgd)) | ||
373 | set_pgd(pgd, *pgd_ref); | ||
374 | else | ||
375 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | ||
376 | } | ||
377 | spin_unlock_irqrestore(&pgd_lock, flags); | ||
378 | } | ||
379 | } | ||
380 | |||
381 | /* | ||
382 | * 64-bit: | ||
383 | * | ||
384 | * Handle a fault on the vmalloc area | ||
385 | * | ||
386 | * This assumes no large pages in there. | ||
387 | */ | ||
388 | static noinline int vmalloc_fault(unsigned long address) | ||
389 | { | ||
390 | pgd_t *pgd, *pgd_ref; | ||
391 | pud_t *pud, *pud_ref; | ||
392 | pmd_t *pmd, *pmd_ref; | ||
393 | pte_t *pte, *pte_ref; | ||
394 | |||
395 | /* Make sure we are in vmalloc area: */ | ||
396 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | ||
397 | return -1; | ||
398 | |||
399 | /* | ||
400 | * Copy kernel mappings over when needed. This can also | ||
401 | * happen within a race in page table update. In the later | ||
402 | * case just flush: | ||
403 | */ | ||
404 | pgd = pgd_offset(current->active_mm, address); | ||
405 | pgd_ref = pgd_offset_k(address); | ||
406 | if (pgd_none(*pgd_ref)) | ||
407 | return -1; | ||
408 | |||
409 | if (pgd_none(*pgd)) | ||
410 | set_pgd(pgd, *pgd_ref); | ||
411 | else | ||
412 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | ||
413 | |||
414 | /* | ||
415 | * Below here mismatches are bugs because these lower tables | ||
416 | * are shared: | ||
417 | */ | ||
418 | |||
419 | pud = pud_offset(pgd, address); | ||
420 | pud_ref = pud_offset(pgd_ref, address); | ||
421 | if (pud_none(*pud_ref)) | ||
422 | return -1; | ||
423 | |||
424 | if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref)) | ||
425 | BUG(); | ||
426 | |||
427 | pmd = pmd_offset(pud, address); | ||
428 | pmd_ref = pmd_offset(pud_ref, address); | ||
429 | if (pmd_none(*pmd_ref)) | ||
430 | return -1; | ||
431 | |||
432 | if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref)) | ||
433 | BUG(); | ||
434 | |||
435 | pte_ref = pte_offset_kernel(pmd_ref, address); | ||
436 | if (!pte_present(*pte_ref)) | ||
437 | return -1; | ||
438 | |||
439 | pte = pte_offset_kernel(pmd, address); | ||
440 | |||
441 | /* | ||
442 | * Don't use pte_page here, because the mappings can point | ||
443 | * outside mem_map, and the NUMA hash lookup cannot handle | ||
444 | * that: | ||
445 | */ | ||
446 | if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref)) | ||
447 | BUG(); | ||
448 | |||
449 | return 0; | ||
450 | } | ||
451 | |||
452 | static const char errata93_warning[] = | ||
453 | KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n" | ||
454 | KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n" | ||
455 | KERN_ERR "******* Please consider a BIOS update.\n" | ||
456 | KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n"; | ||
457 | |||
458 | /* | ||
459 | * No vm86 mode in 64-bit mode: | ||
460 | */ | ||
461 | static inline void | ||
462 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | ||
463 | struct task_struct *tsk) | ||
464 | { | ||
465 | } | ||
466 | |||
467 | static int bad_address(void *p) | ||
468 | { | ||
469 | unsigned long dummy; | ||
470 | |||
471 | return probe_kernel_address((unsigned long *)p, dummy); | ||
472 | } | ||
473 | |||
474 | static void dump_pagetable(unsigned long address) | ||
475 | { | ||
233 | pgd_t *pgd; | 476 | pgd_t *pgd; |
234 | pud_t *pud; | 477 | pud_t *pud; |
235 | pmd_t *pmd; | 478 | pmd_t *pmd; |
@@ -238,102 +481,77 @@ static void dump_pagetable(unsigned long address) | |||
238 | pgd = (pgd_t *)read_cr3(); | 481 | pgd = (pgd_t *)read_cr3(); |
239 | 482 | ||
240 | pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); | 483 | pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); |
484 | |||
241 | pgd += pgd_index(address); | 485 | pgd += pgd_index(address); |
242 | if (bad_address(pgd)) goto bad; | 486 | if (bad_address(pgd)) |
487 | goto bad; | ||
488 | |||
243 | printk("PGD %lx ", pgd_val(*pgd)); | 489 | printk("PGD %lx ", pgd_val(*pgd)); |
244 | if (!pgd_present(*pgd)) goto ret; | 490 | |
491 | if (!pgd_present(*pgd)) | ||
492 | goto out; | ||
245 | 493 | ||
246 | pud = pud_offset(pgd, address); | 494 | pud = pud_offset(pgd, address); |
247 | if (bad_address(pud)) goto bad; | 495 | if (bad_address(pud)) |
496 | goto bad; | ||
497 | |||
248 | printk("PUD %lx ", pud_val(*pud)); | 498 | printk("PUD %lx ", pud_val(*pud)); |
249 | if (!pud_present(*pud) || pud_large(*pud)) | 499 | if (!pud_present(*pud) || pud_large(*pud)) |
250 | goto ret; | 500 | goto out; |
251 | 501 | ||
252 | pmd = pmd_offset(pud, address); | 502 | pmd = pmd_offset(pud, address); |
253 | if (bad_address(pmd)) goto bad; | 503 | if (bad_address(pmd)) |
504 | goto bad; | ||
505 | |||
254 | printk("PMD %lx ", pmd_val(*pmd)); | 506 | printk("PMD %lx ", pmd_val(*pmd)); |
255 | if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret; | 507 | if (!pmd_present(*pmd) || pmd_large(*pmd)) |
508 | goto out; | ||
256 | 509 | ||
257 | pte = pte_offset_kernel(pmd, address); | 510 | pte = pte_offset_kernel(pmd, address); |
258 | if (bad_address(pte)) goto bad; | 511 | if (bad_address(pte)) |
512 | goto bad; | ||
513 | |||
259 | printk("PTE %lx", pte_val(*pte)); | 514 | printk("PTE %lx", pte_val(*pte)); |
260 | ret: | 515 | out: |
261 | printk("\n"); | 516 | printk("\n"); |
262 | return; | 517 | return; |
263 | bad: | 518 | bad: |
264 | printk("BAD\n"); | 519 | printk("BAD\n"); |
265 | #endif | ||
266 | } | ||
267 | |||
268 | #ifdef CONFIG_X86_32 | ||
269 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | ||
270 | { | ||
271 | unsigned index = pgd_index(address); | ||
272 | pgd_t *pgd_k; | ||
273 | pud_t *pud, *pud_k; | ||
274 | pmd_t *pmd, *pmd_k; | ||
275 | |||
276 | pgd += index; | ||
277 | pgd_k = init_mm.pgd + index; | ||
278 | |||
279 | if (!pgd_present(*pgd_k)) | ||
280 | return NULL; | ||
281 | |||
282 | /* | ||
283 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | ||
284 | * and redundant with the set_pmd() on non-PAE. As would | ||
285 | * set_pud. | ||
286 | */ | ||
287 | |||
288 | pud = pud_offset(pgd, address); | ||
289 | pud_k = pud_offset(pgd_k, address); | ||
290 | if (!pud_present(*pud_k)) | ||
291 | return NULL; | ||
292 | |||
293 | pmd = pmd_offset(pud, address); | ||
294 | pmd_k = pmd_offset(pud_k, address); | ||
295 | if (!pmd_present(*pmd_k)) | ||
296 | return NULL; | ||
297 | if (!pmd_present(*pmd)) { | ||
298 | set_pmd(pmd, *pmd_k); | ||
299 | arch_flush_lazy_mmu_mode(); | ||
300 | } else | ||
301 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | ||
302 | return pmd_k; | ||
303 | } | 520 | } |
304 | #endif | ||
305 | 521 | ||
306 | #ifdef CONFIG_X86_64 | 522 | #endif /* CONFIG_X86_64 */ |
307 | static const char errata93_warning[] = | ||
308 | KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n" | ||
309 | KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n" | ||
310 | KERN_ERR "******* Please consider a BIOS update.\n" | ||
311 | KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n"; | ||
312 | #endif | ||
313 | 523 | ||
314 | /* Workaround for K8 erratum #93 & buggy BIOS. | 524 | /* |
315 | BIOS SMM functions are required to use a specific workaround | 525 | * Workaround for K8 erratum #93 & buggy BIOS. |
316 | to avoid corruption of the 64bit RIP register on C stepping K8. | 526 | * |
317 | A lot of BIOS that didn't get tested properly miss this. | 527 | * BIOS SMM functions are required to use a specific workaround |
318 | The OS sees this as a page fault with the upper 32bits of RIP cleared. | 528 | * to avoid corruption of the 64bit RIP register on C stepping K8. |
319 | Try to work around it here. | 529 | * |
320 | Note we only handle faults in kernel here. | 530 | * A lot of BIOS that didn't get tested properly miss this. |
321 | Does nothing for X86_32 | 531 | * |
532 | * The OS sees this as a page fault with the upper 32bits of RIP cleared. | ||
533 | * Try to work around it here. | ||
534 | * | ||
535 | * Note we only handle faults in kernel here. | ||
536 | * Does nothing on 32-bit. | ||
322 | */ | 537 | */ |
323 | static int is_errata93(struct pt_regs *regs, unsigned long address) | 538 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
324 | { | 539 | { |
325 | #ifdef CONFIG_X86_64 | 540 | #ifdef CONFIG_X86_64 |
326 | static int warned; | 541 | static int once; |
542 | |||
327 | if (address != regs->ip) | 543 | if (address != regs->ip) |
328 | return 0; | 544 | return 0; |
545 | |||
329 | if ((address >> 32) != 0) | 546 | if ((address >> 32) != 0) |
330 | return 0; | 547 | return 0; |
548 | |||
331 | address |= 0xffffffffUL << 32; | 549 | address |= 0xffffffffUL << 32; |
332 | if ((address >= (u64)_stext && address <= (u64)_etext) || | 550 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
333 | (address >= MODULES_VADDR && address <= MODULES_END)) { | 551 | (address >= MODULES_VADDR && address <= MODULES_END)) { |
334 | if (!warned) { | 552 | if (!once) { |
335 | printk(errata93_warning); | 553 | printk(errata93_warning); |
336 | warned = 1; | 554 | once = 1; |
337 | } | 555 | } |
338 | regs->ip = address; | 556 | regs->ip = address; |
339 | return 1; | 557 | return 1; |
@@ -343,16 +561,17 @@ static int is_errata93(struct pt_regs *regs, unsigned long address) | |||
343 | } | 561 | } |
344 | 562 | ||
345 | /* | 563 | /* |
346 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps to illegal | 564 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps |
347 | * addresses >4GB. We catch this in the page fault handler because these | 565 | * to illegal addresses >4GB. |
348 | * addresses are not reachable. Just detect this case and return. Any code | 566 | * |
567 | * We catch this in the page fault handler because these addresses | ||
568 | * are not reachable. Just detect this case and return. Any code | ||
349 | * segment in LDT is compatibility mode. | 569 | * segment in LDT is compatibility mode. |
350 | */ | 570 | */ |
351 | static int is_errata100(struct pt_regs *regs, unsigned long address) | 571 | static int is_errata100(struct pt_regs *regs, unsigned long address) |
352 | { | 572 | { |
353 | #ifdef CONFIG_X86_64 | 573 | #ifdef CONFIG_X86_64 |
354 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && | 574 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32)) |
355 | (address >> 32)) | ||
356 | return 1; | 575 | return 1; |
357 | #endif | 576 | #endif |
358 | return 0; | 577 | return 0; |
@@ -362,8 +581,9 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address) | |||
362 | { | 581 | { |
363 | #ifdef CONFIG_X86_F00F_BUG | 582 | #ifdef CONFIG_X86_F00F_BUG |
364 | unsigned long nr; | 583 | unsigned long nr; |
584 | |||
365 | /* | 585 | /* |
366 | * Pentium F0 0F C7 C8 bug workaround. | 586 | * Pentium F0 0F C7 C8 bug workaround: |
367 | */ | 587 | */ |
368 | if (boot_cpu_data.f00f_bug) { | 588 | if (boot_cpu_data.f00f_bug) { |
369 | nr = (address - idt_descr.address) >> 3; | 589 | nr = (address - idt_descr.address) >> 3; |
@@ -377,62 +597,277 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address) | |||
377 | return 0; | 597 | return 0; |
378 | } | 598 | } |
379 | 599 | ||
380 | static void show_fault_oops(struct pt_regs *regs, unsigned long error_code, | 600 | static const char nx_warning[] = KERN_CRIT |
381 | unsigned long address) | 601 | "kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n"; |
602 | |||
603 | static void | ||
604 | show_fault_oops(struct pt_regs *regs, unsigned long error_code, | ||
605 | unsigned long address) | ||
382 | { | 606 | { |
383 | #ifdef CONFIG_X86_32 | ||
384 | if (!oops_may_print()) | 607 | if (!oops_may_print()) |
385 | return; | 608 | return; |
386 | #endif | ||
387 | 609 | ||
388 | #ifdef CONFIG_X86_PAE | ||
389 | if (error_code & PF_INSTR) { | 610 | if (error_code & PF_INSTR) { |
390 | unsigned int level; | 611 | unsigned int level; |
612 | |||
391 | pte_t *pte = lookup_address(address, &level); | 613 | pte_t *pte = lookup_address(address, &level); |
392 | 614 | ||
393 | if (pte && pte_present(*pte) && !pte_exec(*pte)) | 615 | if (pte && pte_present(*pte) && !pte_exec(*pte)) |
394 | printk(KERN_CRIT "kernel tried to execute " | 616 | printk(nx_warning, current_uid()); |
395 | "NX-protected page - exploit attempt? " | ||
396 | "(uid: %d)\n", current_uid()); | ||
397 | } | 617 | } |
398 | #endif | ||
399 | 618 | ||
400 | printk(KERN_ALERT "BUG: unable to handle kernel "); | 619 | printk(KERN_ALERT "BUG: unable to handle kernel "); |
401 | if (address < PAGE_SIZE) | 620 | if (address < PAGE_SIZE) |
402 | printk(KERN_CONT "NULL pointer dereference"); | 621 | printk(KERN_CONT "NULL pointer dereference"); |
403 | else | 622 | else |
404 | printk(KERN_CONT "paging request"); | 623 | printk(KERN_CONT "paging request"); |
624 | |||
405 | printk(KERN_CONT " at %p\n", (void *) address); | 625 | printk(KERN_CONT " at %p\n", (void *) address); |
406 | printk(KERN_ALERT "IP:"); | 626 | printk(KERN_ALERT "IP:"); |
407 | printk_address(regs->ip, 1); | 627 | printk_address(regs->ip, 1); |
628 | |||
408 | dump_pagetable(address); | 629 | dump_pagetable(address); |
409 | } | 630 | } |
410 | 631 | ||
411 | #ifdef CONFIG_X86_64 | 632 | static noinline void |
412 | static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs, | 633 | pgtable_bad(struct pt_regs *regs, unsigned long error_code, |
413 | unsigned long error_code) | 634 | unsigned long address) |
414 | { | 635 | { |
415 | unsigned long flags = oops_begin(); | ||
416 | int sig = SIGKILL; | ||
417 | struct task_struct *tsk; | 636 | struct task_struct *tsk; |
637 | unsigned long flags; | ||
638 | int sig; | ||
639 | |||
640 | flags = oops_begin(); | ||
641 | tsk = current; | ||
642 | sig = SIGKILL; | ||
418 | 643 | ||
419 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", | 644 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
420 | current->comm, address); | 645 | tsk->comm, address); |
421 | dump_pagetable(address); | 646 | dump_pagetable(address); |
422 | tsk = current; | 647 | |
423 | tsk->thread.cr2 = address; | 648 | tsk->thread.cr2 = address; |
424 | tsk->thread.trap_no = 14; | 649 | tsk->thread.trap_no = 14; |
425 | tsk->thread.error_code = error_code; | 650 | tsk->thread.error_code = error_code; |
651 | |||
426 | if (__die("Bad pagetable", regs, error_code)) | 652 | if (__die("Bad pagetable", regs, error_code)) |
427 | sig = 0; | 653 | sig = 0; |
654 | |||
428 | oops_end(flags, regs, sig); | 655 | oops_end(flags, regs, sig); |
429 | } | 656 | } |
430 | #endif | 657 | |
658 | static noinline void | ||
659 | no_context(struct pt_regs *regs, unsigned long error_code, | ||
660 | unsigned long address) | ||
661 | { | ||
662 | struct task_struct *tsk = current; | ||
663 | unsigned long *stackend; | ||
664 | unsigned long flags; | ||
665 | int sig; | ||
666 | |||
667 | /* Are we prepared to handle this kernel fault? */ | ||
668 | if (fixup_exception(regs)) | ||
669 | return; | ||
670 | |||
671 | /* | ||
672 | * 32-bit: | ||
673 | * | ||
674 | * Valid to do another page fault here, because if this fault | ||
675 | * had been triggered by is_prefetch fixup_exception would have | ||
676 | * handled it. | ||
677 | * | ||
678 | * 64-bit: | ||
679 | * | ||
680 | * Hall of shame of CPU/BIOS bugs. | ||
681 | */ | ||
682 | if (is_prefetch(regs, error_code, address)) | ||
683 | return; | ||
684 | |||
685 | if (is_errata93(regs, address)) | ||
686 | return; | ||
687 | |||
688 | /* | ||
689 | * Oops. The kernel tried to access some bad page. We'll have to | ||
690 | * terminate things with extreme prejudice: | ||
691 | */ | ||
692 | flags = oops_begin(); | ||
693 | |||
694 | show_fault_oops(regs, error_code, address); | ||
695 | |||
696 | stackend = end_of_stack(tsk); | ||
697 | if (*stackend != STACK_END_MAGIC) | ||
698 | printk(KERN_ALERT "Thread overran stack, or stack corrupted\n"); | ||
699 | |||
700 | tsk->thread.cr2 = address; | ||
701 | tsk->thread.trap_no = 14; | ||
702 | tsk->thread.error_code = error_code; | ||
703 | |||
704 | sig = SIGKILL; | ||
705 | if (__die("Oops", regs, error_code)) | ||
706 | sig = 0; | ||
707 | |||
708 | /* Executive summary in case the body of the oops scrolled away */ | ||
709 | printk(KERN_EMERG "CR2: %016lx\n", address); | ||
710 | |||
711 | oops_end(flags, regs, sig); | ||
712 | } | ||
713 | |||
714 | /* | ||
715 | * Print out info about fatal segfaults, if the show_unhandled_signals | ||
716 | * sysctl is set: | ||
717 | */ | ||
718 | static inline void | ||
719 | show_signal_msg(struct pt_regs *regs, unsigned long error_code, | ||
720 | unsigned long address, struct task_struct *tsk) | ||
721 | { | ||
722 | if (!unhandled_signal(tsk, SIGSEGV)) | ||
723 | return; | ||
724 | |||
725 | if (!printk_ratelimit()) | ||
726 | return; | ||
727 | |||
728 | printk(KERN_CONT "%s%s[%d]: segfault at %lx ip %p sp %p error %lx", | ||
729 | task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, | ||
730 | tsk->comm, task_pid_nr(tsk), address, | ||
731 | (void *)regs->ip, (void *)regs->sp, error_code); | ||
732 | |||
733 | print_vma_addr(KERN_CONT " in ", regs->ip); | ||
734 | |||
735 | printk(KERN_CONT "\n"); | ||
736 | } | ||
737 | |||
738 | static void | ||
739 | __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | ||
740 | unsigned long address, int si_code) | ||
741 | { | ||
742 | struct task_struct *tsk = current; | ||
743 | |||
744 | /* User mode accesses just cause a SIGSEGV */ | ||
745 | if (error_code & PF_USER) { | ||
746 | /* | ||
747 | * It's possible to have interrupts off here: | ||
748 | */ | ||
749 | local_irq_enable(); | ||
750 | |||
751 | /* | ||
752 | * Valid to do another page fault here because this one came | ||
753 | * from user space: | ||
754 | */ | ||
755 | if (is_prefetch(regs, error_code, address)) | ||
756 | return; | ||
757 | |||
758 | if (is_errata100(regs, address)) | ||
759 | return; | ||
760 | |||
761 | if (unlikely(show_unhandled_signals)) | ||
762 | show_signal_msg(regs, error_code, address, tsk); | ||
763 | |||
764 | /* Kernel addresses are always protection faults: */ | ||
765 | tsk->thread.cr2 = address; | ||
766 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | ||
767 | tsk->thread.trap_no = 14; | ||
768 | |||
769 | force_sig_info_fault(SIGSEGV, si_code, address, tsk); | ||
770 | |||
771 | return; | ||
772 | } | ||
773 | |||
774 | if (is_f00f_bug(regs, address)) | ||
775 | return; | ||
776 | |||
777 | no_context(regs, error_code, address); | ||
778 | } | ||
779 | |||
780 | static noinline void | ||
781 | bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | ||
782 | unsigned long address) | ||
783 | { | ||
784 | __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR); | ||
785 | } | ||
786 | |||
787 | static void | ||
788 | __bad_area(struct pt_regs *regs, unsigned long error_code, | ||
789 | unsigned long address, int si_code) | ||
790 | { | ||
791 | struct mm_struct *mm = current->mm; | ||
792 | |||
793 | /* | ||
794 | * Something tried to access memory that isn't in our memory map.. | ||
795 | * Fix it, but check if it's kernel or user first.. | ||
796 | */ | ||
797 | up_read(&mm->mmap_sem); | ||
798 | |||
799 | __bad_area_nosemaphore(regs, error_code, address, si_code); | ||
800 | } | ||
801 | |||
802 | static noinline void | ||
803 | bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address) | ||
804 | { | ||
805 | __bad_area(regs, error_code, address, SEGV_MAPERR); | ||
806 | } | ||
807 | |||
808 | static noinline void | ||
809 | bad_area_access_error(struct pt_regs *regs, unsigned long error_code, | ||
810 | unsigned long address) | ||
811 | { | ||
812 | __bad_area(regs, error_code, address, SEGV_ACCERR); | ||
813 | } | ||
814 | |||
815 | /* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */ | ||
816 | static void | ||
817 | out_of_memory(struct pt_regs *regs, unsigned long error_code, | ||
818 | unsigned long address) | ||
819 | { | ||
820 | /* | ||
821 | * We ran out of memory, call the OOM killer, and return the userspace | ||
822 | * (which will retry the fault, or kill us if we got oom-killed): | ||
823 | */ | ||
824 | up_read(¤t->mm->mmap_sem); | ||
825 | |||
826 | pagefault_out_of_memory(); | ||
827 | } | ||
828 | |||
829 | static void | ||
830 | do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address) | ||
831 | { | ||
832 | struct task_struct *tsk = current; | ||
833 | struct mm_struct *mm = tsk->mm; | ||
834 | |||
835 | up_read(&mm->mmap_sem); | ||
836 | |||
837 | /* Kernel mode? Handle exceptions or die: */ | ||
838 | if (!(error_code & PF_USER)) | ||
839 | no_context(regs, error_code, address); | ||
840 | |||
841 | /* User-space => ok to do another page fault: */ | ||
842 | if (is_prefetch(regs, error_code, address)) | ||
843 | return; | ||
844 | |||
845 | tsk->thread.cr2 = address; | ||
846 | tsk->thread.error_code = error_code; | ||
847 | tsk->thread.trap_no = 14; | ||
848 | |||
849 | force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); | ||
850 | } | ||
851 | |||
852 | static noinline void | ||
853 | mm_fault_error(struct pt_regs *regs, unsigned long error_code, | ||
854 | unsigned long address, unsigned int fault) | ||
855 | { | ||
856 | if (fault & VM_FAULT_OOM) { | ||
857 | out_of_memory(regs, error_code, address); | ||
858 | } else { | ||
859 | if (fault & VM_FAULT_SIGBUS) | ||
860 | do_sigbus(regs, error_code, address); | ||
861 | else | ||
862 | BUG(); | ||
863 | } | ||
864 | } | ||
431 | 865 | ||
432 | static int spurious_fault_check(unsigned long error_code, pte_t *pte) | 866 | static int spurious_fault_check(unsigned long error_code, pte_t *pte) |
433 | { | 867 | { |
434 | if ((error_code & PF_WRITE) && !pte_write(*pte)) | 868 | if ((error_code & PF_WRITE) && !pte_write(*pte)) |
435 | return 0; | 869 | return 0; |
870 | |||
436 | if ((error_code & PF_INSTR) && !pte_exec(*pte)) | 871 | if ((error_code & PF_INSTR) && !pte_exec(*pte)) |
437 | return 0; | 872 | return 0; |
438 | 873 | ||
@@ -440,21 +875,25 @@ static int spurious_fault_check(unsigned long error_code, pte_t *pte) | |||
440 | } | 875 | } |
441 | 876 | ||
442 | /* | 877 | /* |
443 | * Handle a spurious fault caused by a stale TLB entry. This allows | 878 | * Handle a spurious fault caused by a stale TLB entry. |
444 | * us to lazily refresh the TLB when increasing the permissions of a | 879 | * |
445 | * kernel page (RO -> RW or NX -> X). Doing it eagerly is very | 880 | * This allows us to lazily refresh the TLB when increasing the |
446 | * expensive since that implies doing a full cross-processor TLB | 881 | * permissions of a kernel page (RO -> RW or NX -> X). Doing it |
447 | * flush, even if no stale TLB entries exist on other processors. | 882 | * eagerly is very expensive since that implies doing a full |
883 | * cross-processor TLB flush, even if no stale TLB entries exist | ||
884 | * on other processors. | ||
885 | * | ||
448 | * There are no security implications to leaving a stale TLB when | 886 | * There are no security implications to leaving a stale TLB when |
449 | * increasing the permissions on a page. | 887 | * increasing the permissions on a page. |
450 | */ | 888 | */ |
451 | static int spurious_fault(unsigned long address, | 889 | static noinline int |
452 | unsigned long error_code) | 890 | spurious_fault(unsigned long error_code, unsigned long address) |
453 | { | 891 | { |
454 | pgd_t *pgd; | 892 | pgd_t *pgd; |
455 | pud_t *pud; | 893 | pud_t *pud; |
456 | pmd_t *pmd; | 894 | pmd_t *pmd; |
457 | pte_t *pte; | 895 | pte_t *pte; |
896 | int ret; | ||
458 | 897 | ||
459 | /* Reserved-bit violation or user access to kernel space? */ | 898 | /* Reserved-bit violation or user access to kernel space? */ |
460 | if (error_code & (PF_USER | PF_RSVD)) | 899 | if (error_code & (PF_USER | PF_RSVD)) |
@@ -482,127 +921,71 @@ static int spurious_fault(unsigned long address, | |||
482 | if (!pte_present(*pte)) | 921 | if (!pte_present(*pte)) |
483 | return 0; | 922 | return 0; |
484 | 923 | ||
485 | return spurious_fault_check(error_code, pte); | 924 | ret = spurious_fault_check(error_code, pte); |
486 | } | 925 | if (!ret) |
487 | 926 | return 0; | |
488 | /* | ||
489 | * X86_32 | ||
490 | * Handle a fault on the vmalloc or module mapping area | ||
491 | * | ||
492 | * X86_64 | ||
493 | * Handle a fault on the vmalloc area | ||
494 | * | ||
495 | * This assumes no large pages in there. | ||
496 | */ | ||
497 | static int vmalloc_fault(unsigned long address) | ||
498 | { | ||
499 | #ifdef CONFIG_X86_32 | ||
500 | unsigned long pgd_paddr; | ||
501 | pmd_t *pmd_k; | ||
502 | pte_t *pte_k; | ||
503 | |||
504 | /* Make sure we are in vmalloc area */ | ||
505 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | ||
506 | return -1; | ||
507 | 927 | ||
508 | /* | 928 | /* |
509 | * Synchronize this task's top level page-table | 929 | * Make sure we have permissions in PMD. |
510 | * with the 'reference' page table. | 930 | * If not, then there's a bug in the page tables: |
511 | * | ||
512 | * Do _not_ use "current" here. We might be inside | ||
513 | * an interrupt in the middle of a task switch.. | ||
514 | */ | 931 | */ |
515 | pgd_paddr = read_cr3(); | 932 | ret = spurious_fault_check(error_code, (pte_t *) pmd); |
516 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | 933 | WARN_ONCE(!ret, "PMD has incorrect permission bits\n"); |
517 | if (!pmd_k) | ||
518 | return -1; | ||
519 | pte_k = pte_offset_kernel(pmd_k, address); | ||
520 | if (!pte_present(*pte_k)) | ||
521 | return -1; | ||
522 | return 0; | ||
523 | #else | ||
524 | pgd_t *pgd, *pgd_ref; | ||
525 | pud_t *pud, *pud_ref; | ||
526 | pmd_t *pmd, *pmd_ref; | ||
527 | pte_t *pte, *pte_ref; | ||
528 | 934 | ||
529 | /* Make sure we are in vmalloc area */ | 935 | return ret; |
530 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | 936 | } |
531 | return -1; | ||
532 | 937 | ||
533 | /* Copy kernel mappings over when needed. This can also | 938 | int show_unhandled_signals = 1; |
534 | happen within a race in page table update. In the later | ||
535 | case just flush. */ | ||
536 | 939 | ||
537 | pgd = pgd_offset(current->active_mm, address); | 940 | static inline int |
538 | pgd_ref = pgd_offset_k(address); | 941 | access_error(unsigned long error_code, int write, struct vm_area_struct *vma) |
539 | if (pgd_none(*pgd_ref)) | 942 | { |
540 | return -1; | 943 | if (write) { |
541 | if (pgd_none(*pgd)) | 944 | /* write, present and write, not present: */ |
542 | set_pgd(pgd, *pgd_ref); | 945 | if (unlikely(!(vma->vm_flags & VM_WRITE))) |
543 | else | 946 | return 1; |
544 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | 947 | return 0; |
948 | } | ||
545 | 949 | ||
546 | /* Below here mismatches are bugs because these lower tables | 950 | /* read, present: */ |
547 | are shared */ | 951 | if (unlikely(error_code & PF_PROT)) |
952 | return 1; | ||
953 | |||
954 | /* read, not present: */ | ||
955 | if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))) | ||
956 | return 1; | ||
548 | 957 | ||
549 | pud = pud_offset(pgd, address); | ||
550 | pud_ref = pud_offset(pgd_ref, address); | ||
551 | if (pud_none(*pud_ref)) | ||
552 | return -1; | ||
553 | if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref)) | ||
554 | BUG(); | ||
555 | pmd = pmd_offset(pud, address); | ||
556 | pmd_ref = pmd_offset(pud_ref, address); | ||
557 | if (pmd_none(*pmd_ref)) | ||
558 | return -1; | ||
559 | if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref)) | ||
560 | BUG(); | ||
561 | pte_ref = pte_offset_kernel(pmd_ref, address); | ||
562 | if (!pte_present(*pte_ref)) | ||
563 | return -1; | ||
564 | pte = pte_offset_kernel(pmd, address); | ||
565 | /* Don't use pte_page here, because the mappings can point | ||
566 | outside mem_map, and the NUMA hash lookup cannot handle | ||
567 | that. */ | ||
568 | if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref)) | ||
569 | BUG(); | ||
570 | return 0; | 958 | return 0; |
571 | #endif | ||
572 | } | 959 | } |
573 | 960 | ||
574 | int show_unhandled_signals = 1; | 961 | static int fault_in_kernel_space(unsigned long address) |
962 | { | ||
963 | return address >= TASK_SIZE_MAX; | ||
964 | } | ||
575 | 965 | ||
576 | /* | 966 | /* |
577 | * This routine handles page faults. It determines the address, | 967 | * This routine handles page faults. It determines the address, |
578 | * and the problem, and then passes it off to one of the appropriate | 968 | * and the problem, and then passes it off to one of the appropriate |
579 | * routines. | 969 | * routines. |
580 | */ | 970 | */ |
581 | #ifdef CONFIG_X86_64 | 971 | dotraplinkage void __kprobes |
582 | asmlinkage | 972 | do_page_fault(struct pt_regs *regs, unsigned long error_code) |
583 | #endif | ||
584 | void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code) | ||
585 | { | 973 | { |
586 | struct task_struct *tsk; | ||
587 | struct mm_struct *mm; | ||
588 | struct vm_area_struct *vma; | 974 | struct vm_area_struct *vma; |
975 | struct task_struct *tsk; | ||
589 | unsigned long address; | 976 | unsigned long address; |
590 | int write, si_code; | 977 | struct mm_struct *mm; |
978 | int write; | ||
591 | int fault; | 979 | int fault; |
592 | #ifdef CONFIG_X86_64 | ||
593 | unsigned long flags; | ||
594 | int sig; | ||
595 | #endif | ||
596 | 980 | ||
597 | tsk = current; | 981 | tsk = current; |
598 | mm = tsk->mm; | 982 | mm = tsk->mm; |
983 | |||
599 | prefetchw(&mm->mmap_sem); | 984 | prefetchw(&mm->mmap_sem); |
600 | 985 | ||
601 | /* get the address */ | 986 | /* Get the faulting address: */ |
602 | address = read_cr2(); | 987 | address = read_cr2(); |
603 | 988 | ||
604 | si_code = SEGV_MAPERR; | ||
605 | |||
606 | if (unlikely(kmmio_fault(regs, address))) | 989 | if (unlikely(kmmio_fault(regs, address))) |
607 | return; | 990 | return; |
608 | 991 | ||
@@ -619,319 +1002,147 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code) | |||
619 | * (error_code & 4) == 0, and that the fault was not a | 1002 | * (error_code & 4) == 0, and that the fault was not a |
620 | * protection error (error_code & 9) == 0. | 1003 | * protection error (error_code & 9) == 0. |
621 | */ | 1004 | */ |
622 | #ifdef CONFIG_X86_32 | 1005 | if (unlikely(fault_in_kernel_space(address))) { |
623 | if (unlikely(address >= TASK_SIZE)) { | ||
624 | #else | ||
625 | if (unlikely(address >= TASK_SIZE64)) { | ||
626 | #endif | ||
627 | if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) && | 1006 | if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) && |
628 | vmalloc_fault(address) >= 0) | 1007 | vmalloc_fault(address) >= 0) |
629 | return; | 1008 | return; |
630 | 1009 | ||
631 | /* Can handle a stale RO->RW TLB */ | 1010 | /* Can handle a stale RO->RW TLB: */ |
632 | if (spurious_fault(address, error_code)) | 1011 | if (spurious_fault(error_code, address)) |
633 | return; | 1012 | return; |
634 | 1013 | ||
635 | /* kprobes don't want to hook the spurious faults. */ | 1014 | /* kprobes don't want to hook the spurious faults: */ |
636 | if (notify_page_fault(regs)) | 1015 | if (notify_page_fault(regs)) |
637 | return; | 1016 | return; |
638 | /* | 1017 | /* |
639 | * Don't take the mm semaphore here. If we fixup a prefetch | 1018 | * Don't take the mm semaphore here. If we fixup a prefetch |
640 | * fault we could otherwise deadlock. | 1019 | * fault we could otherwise deadlock: |
641 | */ | 1020 | */ |
642 | goto bad_area_nosemaphore; | 1021 | bad_area_nosemaphore(regs, error_code, address); |
643 | } | ||
644 | 1022 | ||
645 | /* kprobes don't want to hook the spurious faults. */ | ||
646 | if (notify_page_fault(regs)) | ||
647 | return; | 1023 | return; |
1024 | } | ||
648 | 1025 | ||
1026 | /* kprobes don't want to hook the spurious faults: */ | ||
1027 | if (unlikely(notify_page_fault(regs))) | ||
1028 | return; | ||
649 | /* | 1029 | /* |
650 | * It's safe to allow irq's after cr2 has been saved and the | 1030 | * It's safe to allow irq's after cr2 has been saved and the |
651 | * vmalloc fault has been handled. | 1031 | * vmalloc fault has been handled. |
652 | * | 1032 | * |
653 | * User-mode registers count as a user access even for any | 1033 | * User-mode registers count as a user access even for any |
654 | * potential system fault or CPU buglet. | 1034 | * potential system fault or CPU buglet: |
655 | */ | 1035 | */ |
656 | if (user_mode_vm(regs)) { | 1036 | if (user_mode_vm(regs)) { |
657 | local_irq_enable(); | 1037 | local_irq_enable(); |
658 | error_code |= PF_USER; | 1038 | error_code |= PF_USER; |
659 | } else if (regs->flags & X86_EFLAGS_IF) | 1039 | } else { |
660 | local_irq_enable(); | 1040 | if (regs->flags & X86_EFLAGS_IF) |
1041 | local_irq_enable(); | ||
1042 | } | ||
661 | 1043 | ||
662 | #ifdef CONFIG_X86_64 | ||
663 | if (unlikely(error_code & PF_RSVD)) | 1044 | if (unlikely(error_code & PF_RSVD)) |
664 | pgtable_bad(address, regs, error_code); | 1045 | pgtable_bad(regs, error_code, address); |
665 | #endif | ||
666 | 1046 | ||
667 | /* | 1047 | /* |
668 | * If we're in an interrupt, have no user context or are running in an | 1048 | * If we're in an interrupt, have no user context or are running |
669 | * atomic region then we must not take the fault. | 1049 | * in an atomic region then we must not take the fault: |
670 | */ | 1050 | */ |
671 | if (unlikely(in_atomic() || !mm)) | 1051 | if (unlikely(in_atomic() || !mm)) { |
672 | goto bad_area_nosemaphore; | 1052 | bad_area_nosemaphore(regs, error_code, address); |
1053 | return; | ||
1054 | } | ||
673 | 1055 | ||
674 | /* | 1056 | /* |
675 | * When running in the kernel we expect faults to occur only to | 1057 | * When running in the kernel we expect faults to occur only to |
676 | * addresses in user space. All other faults represent errors in the | 1058 | * addresses in user space. All other faults represent errors in |
677 | * kernel and should generate an OOPS. Unfortunately, in the case of an | 1059 | * the kernel and should generate an OOPS. Unfortunately, in the |
678 | * erroneous fault occurring in a code path which already holds mmap_sem | 1060 | * case of an erroneous fault occurring in a code path which already |
679 | * we will deadlock attempting to validate the fault against the | 1061 | * holds mmap_sem we will deadlock attempting to validate the fault |
680 | * address space. Luckily the kernel only validly references user | 1062 | * against the address space. Luckily the kernel only validly |
681 | * space from well defined areas of code, which are listed in the | 1063 | * references user space from well defined areas of code, which are |
682 | * exceptions table. | 1064 | * listed in the exceptions table. |
683 | * | 1065 | * |
684 | * As the vast majority of faults will be valid we will only perform | 1066 | * As the vast majority of faults will be valid we will only perform |
685 | * the source reference check when there is a possibility of a deadlock. | 1067 | * the source reference check when there is a possibility of a |
686 | * Attempt to lock the address space, if we cannot we then validate the | 1068 | * deadlock. Attempt to lock the address space, if we cannot we then |
687 | * source. If this is invalid we can skip the address space check, | 1069 | * validate the source. If this is invalid we can skip the address |
688 | * thus avoiding the deadlock. | 1070 | * space check, thus avoiding the deadlock: |
689 | */ | 1071 | */ |
690 | if (!down_read_trylock(&mm->mmap_sem)) { | 1072 | if (unlikely(!down_read_trylock(&mm->mmap_sem))) { |
691 | if ((error_code & PF_USER) == 0 && | 1073 | if ((error_code & PF_USER) == 0 && |
692 | !search_exception_tables(regs->ip)) | 1074 | !search_exception_tables(regs->ip)) { |
693 | goto bad_area_nosemaphore; | 1075 | bad_area_nosemaphore(regs, error_code, address); |
1076 | return; | ||
1077 | } | ||
694 | down_read(&mm->mmap_sem); | 1078 | down_read(&mm->mmap_sem); |
1079 | } else { | ||
1080 | /* | ||
1081 | * The above down_read_trylock() might have succeeded in | ||
1082 | * which case we'll have missed the might_sleep() from | ||
1083 | * down_read(): | ||
1084 | */ | ||
1085 | might_sleep(); | ||
695 | } | 1086 | } |
696 | 1087 | ||
697 | vma = find_vma(mm, address); | 1088 | vma = find_vma(mm, address); |
698 | if (!vma) | 1089 | if (unlikely(!vma)) { |
699 | goto bad_area; | 1090 | bad_area(regs, error_code, address); |
700 | if (vma->vm_start <= address) | 1091 | return; |
1092 | } | ||
1093 | if (likely(vma->vm_start <= address)) | ||
701 | goto good_area; | 1094 | goto good_area; |
702 | if (!(vma->vm_flags & VM_GROWSDOWN)) | 1095 | if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) { |
703 | goto bad_area; | 1096 | bad_area(regs, error_code, address); |
1097 | return; | ||
1098 | } | ||
704 | if (error_code & PF_USER) { | 1099 | if (error_code & PF_USER) { |
705 | /* | 1100 | /* |
706 | * Accessing the stack below %sp is always a bug. | 1101 | * Accessing the stack below %sp is always a bug. |
707 | * The large cushion allows instructions like enter | 1102 | * The large cushion allows instructions like enter |
708 | * and pusha to work. ("enter $65535,$31" pushes | 1103 | * and pusha to work. ("enter $65535, $31" pushes |
709 | * 32 pointers and then decrements %sp by 65535.) | 1104 | * 32 pointers and then decrements %sp by 65535.) |
710 | */ | 1105 | */ |
711 | if (address + 65536 + 32 * sizeof(unsigned long) < regs->sp) | 1106 | if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) { |
712 | goto bad_area; | 1107 | bad_area(regs, error_code, address); |
1108 | return; | ||
1109 | } | ||
713 | } | 1110 | } |
714 | if (expand_stack(vma, address)) | 1111 | if (unlikely(expand_stack(vma, address))) { |
715 | goto bad_area; | 1112 | bad_area(regs, error_code, address); |
716 | /* | 1113 | return; |
717 | * Ok, we have a good vm_area for this memory access, so | 1114 | } |
718 | * we can handle it.. | 1115 | |
719 | */ | 1116 | /* |
1117 | * Ok, we have a good vm_area for this memory access, so | ||
1118 | * we can handle it.. | ||
1119 | */ | ||
720 | good_area: | 1120 | good_area: |
721 | si_code = SEGV_ACCERR; | 1121 | write = error_code & PF_WRITE; |
722 | write = 0; | 1122 | |
723 | switch (error_code & (PF_PROT|PF_WRITE)) { | 1123 | if (unlikely(access_error(error_code, write, vma))) { |
724 | default: /* 3: write, present */ | 1124 | bad_area_access_error(regs, error_code, address); |
725 | /* fall through */ | 1125 | return; |
726 | case PF_WRITE: /* write, not present */ | ||
727 | if (!(vma->vm_flags & VM_WRITE)) | ||
728 | goto bad_area; | ||
729 | write++; | ||
730 | break; | ||
731 | case PF_PROT: /* read, present */ | ||
732 | goto bad_area; | ||
733 | case 0: /* read, not present */ | ||
734 | if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) | ||
735 | goto bad_area; | ||
736 | } | 1126 | } |
737 | 1127 | ||
738 | /* | 1128 | /* |
739 | * If for any reason at all we couldn't handle the fault, | 1129 | * If for any reason at all we couldn't handle the fault, |
740 | * make sure we exit gracefully rather than endlessly redo | 1130 | * make sure we exit gracefully rather than endlessly redo |
741 | * the fault. | 1131 | * the fault: |
742 | */ | 1132 | */ |
743 | fault = handle_mm_fault(mm, vma, address, write); | 1133 | fault = handle_mm_fault(mm, vma, address, write); |
1134 | |||
744 | if (unlikely(fault & VM_FAULT_ERROR)) { | 1135 | if (unlikely(fault & VM_FAULT_ERROR)) { |
745 | if (fault & VM_FAULT_OOM) | 1136 | mm_fault_error(regs, error_code, address, fault); |
746 | goto out_of_memory; | 1137 | return; |
747 | else if (fault & VM_FAULT_SIGBUS) | ||
748 | goto do_sigbus; | ||
749 | BUG(); | ||
750 | } | 1138 | } |
1139 | |||
751 | if (fault & VM_FAULT_MAJOR) | 1140 | if (fault & VM_FAULT_MAJOR) |
752 | tsk->maj_flt++; | 1141 | tsk->maj_flt++; |
753 | else | 1142 | else |
754 | tsk->min_flt++; | 1143 | tsk->min_flt++; |
755 | 1144 | ||
756 | #ifdef CONFIG_X86_32 | 1145 | check_v8086_mode(regs, address, tsk); |
757 | /* | ||
758 | * Did it hit the DOS screen memory VA from vm86 mode? | ||
759 | */ | ||
760 | if (v8086_mode(regs)) { | ||
761 | unsigned long bit = (address - 0xA0000) >> PAGE_SHIFT; | ||
762 | if (bit < 32) | ||
763 | tsk->thread.screen_bitmap |= 1 << bit; | ||
764 | } | ||
765 | #endif | ||
766 | up_read(&mm->mmap_sem); | ||
767 | return; | ||
768 | 1146 | ||
769 | /* | ||
770 | * Something tried to access memory that isn't in our memory map.. | ||
771 | * Fix it, but check if it's kernel or user first.. | ||
772 | */ | ||
773 | bad_area: | ||
774 | up_read(&mm->mmap_sem); | 1147 | up_read(&mm->mmap_sem); |
775 | |||
776 | bad_area_nosemaphore: | ||
777 | /* User mode accesses just cause a SIGSEGV */ | ||
778 | if (error_code & PF_USER) { | ||
779 | /* | ||
780 | * It's possible to have interrupts off here. | ||
781 | */ | ||
782 | local_irq_enable(); | ||
783 | |||
784 | /* | ||
785 | * Valid to do another page fault here because this one came | ||
786 | * from user space. | ||
787 | */ | ||
788 | if (is_prefetch(regs, address, error_code)) | ||
789 | return; | ||
790 | |||
791 | if (is_errata100(regs, address)) | ||
792 | return; | ||
793 | |||
794 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && | ||
795 | printk_ratelimit()) { | ||
796 | printk( | ||
797 | "%s%s[%d]: segfault at %lx ip %p sp %p error %lx", | ||
798 | task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, | ||
799 | tsk->comm, task_pid_nr(tsk), address, | ||
800 | (void *) regs->ip, (void *) regs->sp, error_code); | ||
801 | print_vma_addr(" in ", regs->ip); | ||
802 | printk("\n"); | ||
803 | } | ||
804 | |||
805 | tsk->thread.cr2 = address; | ||
806 | /* Kernel addresses are always protection faults */ | ||
807 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | ||
808 | tsk->thread.trap_no = 14; | ||
809 | force_sig_info_fault(SIGSEGV, si_code, address, tsk); | ||
810 | return; | ||
811 | } | ||
812 | |||
813 | if (is_f00f_bug(regs, address)) | ||
814 | return; | ||
815 | |||
816 | no_context: | ||
817 | /* Are we prepared to handle this kernel fault? */ | ||
818 | if (fixup_exception(regs)) | ||
819 | return; | ||
820 | |||
821 | /* | ||
822 | * X86_32 | ||
823 | * Valid to do another page fault here, because if this fault | ||
824 | * had been triggered by is_prefetch fixup_exception would have | ||
825 | * handled it. | ||
826 | * | ||
827 | * X86_64 | ||
828 | * Hall of shame of CPU/BIOS bugs. | ||
829 | */ | ||
830 | if (is_prefetch(regs, address, error_code)) | ||
831 | return; | ||
832 | |||
833 | if (is_errata93(regs, address)) | ||
834 | return; | ||
835 | |||
836 | /* | ||
837 | * Oops. The kernel tried to access some bad page. We'll have to | ||
838 | * terminate things with extreme prejudice. | ||
839 | */ | ||
840 | #ifdef CONFIG_X86_32 | ||
841 | bust_spinlocks(1); | ||
842 | #else | ||
843 | flags = oops_begin(); | ||
844 | #endif | ||
845 | |||
846 | show_fault_oops(regs, error_code, address); | ||
847 | |||
848 | tsk->thread.cr2 = address; | ||
849 | tsk->thread.trap_no = 14; | ||
850 | tsk->thread.error_code = error_code; | ||
851 | |||
852 | #ifdef CONFIG_X86_32 | ||
853 | die("Oops", regs, error_code); | ||
854 | bust_spinlocks(0); | ||
855 | do_exit(SIGKILL); | ||
856 | #else | ||
857 | sig = SIGKILL; | ||
858 | if (__die("Oops", regs, error_code)) | ||
859 | sig = 0; | ||
860 | /* Executive summary in case the body of the oops scrolled away */ | ||
861 | printk(KERN_EMERG "CR2: %016lx\n", address); | ||
862 | oops_end(flags, regs, sig); | ||
863 | #endif | ||
864 | |||
865 | out_of_memory: | ||
866 | /* | ||
867 | * We ran out of memory, call the OOM killer, and return the userspace | ||
868 | * (which will retry the fault, or kill us if we got oom-killed). | ||
869 | */ | ||
870 | up_read(&mm->mmap_sem); | ||
871 | pagefault_out_of_memory(); | ||
872 | return; | ||
873 | |||
874 | do_sigbus: | ||
875 | up_read(&mm->mmap_sem); | ||
876 | |||
877 | /* Kernel mode? Handle exceptions or die */ | ||
878 | if (!(error_code & PF_USER)) | ||
879 | goto no_context; | ||
880 | #ifdef CONFIG_X86_32 | ||
881 | /* User space => ok to do another page fault */ | ||
882 | if (is_prefetch(regs, address, error_code)) | ||
883 | return; | ||
884 | #endif | ||
885 | tsk->thread.cr2 = address; | ||
886 | tsk->thread.error_code = error_code; | ||
887 | tsk->thread.trap_no = 14; | ||
888 | force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); | ||
889 | } | ||
890 | |||
891 | DEFINE_SPINLOCK(pgd_lock); | ||
892 | LIST_HEAD(pgd_list); | ||
893 | |||
894 | void vmalloc_sync_all(void) | ||
895 | { | ||
896 | unsigned long address; | ||
897 | |||
898 | #ifdef CONFIG_X86_32 | ||
899 | if (SHARED_KERNEL_PMD) | ||
900 | return; | ||
901 | |||
902 | for (address = VMALLOC_START & PMD_MASK; | ||
903 | address >= TASK_SIZE && address < FIXADDR_TOP; | ||
904 | address += PMD_SIZE) { | ||
905 | unsigned long flags; | ||
906 | struct page *page; | ||
907 | |||
908 | spin_lock_irqsave(&pgd_lock, flags); | ||
909 | list_for_each_entry(page, &pgd_list, lru) { | ||
910 | if (!vmalloc_sync_one(page_address(page), | ||
911 | address)) | ||
912 | break; | ||
913 | } | ||
914 | spin_unlock_irqrestore(&pgd_lock, flags); | ||
915 | } | ||
916 | #else /* CONFIG_X86_64 */ | ||
917 | for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END; | ||
918 | address += PGDIR_SIZE) { | ||
919 | const pgd_t *pgd_ref = pgd_offset_k(address); | ||
920 | unsigned long flags; | ||
921 | struct page *page; | ||
922 | |||
923 | if (pgd_none(*pgd_ref)) | ||
924 | continue; | ||
925 | spin_lock_irqsave(&pgd_lock, flags); | ||
926 | list_for_each_entry(page, &pgd_list, lru) { | ||
927 | pgd_t *pgd; | ||
928 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | ||
929 | if (pgd_none(*pgd)) | ||
930 | set_pgd(pgd, *pgd_ref); | ||
931 | else | ||
932 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | ||
933 | } | ||
934 | spin_unlock_irqrestore(&pgd_lock, flags); | ||
935 | } | ||
936 | #endif | ||
937 | } | 1148 | } |
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c index bcc079c282dd..00f127c80b0e 100644 --- a/arch/x86/mm/highmem_32.c +++ b/arch/x86/mm/highmem_32.c | |||
@@ -1,5 +1,6 @@ | |||
1 | #include <linux/highmem.h> | 1 | #include <linux/highmem.h> |
2 | #include <linux/module.h> | 2 | #include <linux/module.h> |
3 | #include <linux/swap.h> /* for totalram_pages */ | ||
3 | 4 | ||
4 | void *kmap(struct page *page) | 5 | void *kmap(struct page *page) |
5 | { | 6 | { |
@@ -156,3 +157,36 @@ EXPORT_SYMBOL(kmap); | |||
156 | EXPORT_SYMBOL(kunmap); | 157 | EXPORT_SYMBOL(kunmap); |
157 | EXPORT_SYMBOL(kmap_atomic); | 158 | EXPORT_SYMBOL(kmap_atomic); |
158 | EXPORT_SYMBOL(kunmap_atomic); | 159 | EXPORT_SYMBOL(kunmap_atomic); |
160 | |||
161 | #ifdef CONFIG_NUMA | ||
162 | void __init set_highmem_pages_init(void) | ||
163 | { | ||
164 | struct zone *zone; | ||
165 | int nid; | ||
166 | |||
167 | for_each_zone(zone) { | ||
168 | unsigned long zone_start_pfn, zone_end_pfn; | ||
169 | |||
170 | if (!is_highmem(zone)) | ||
171 | continue; | ||
172 | |||
173 | zone_start_pfn = zone->zone_start_pfn; | ||
174 | zone_end_pfn = zone_start_pfn + zone->spanned_pages; | ||
175 | |||
176 | nid = zone_to_nid(zone); | ||
177 | printk(KERN_INFO "Initializing %s for node %d (%08lx:%08lx)\n", | ||
178 | zone->name, nid, zone_start_pfn, zone_end_pfn); | ||
179 | |||
180 | add_highpages_with_active_regions(nid, zone_start_pfn, | ||
181 | zone_end_pfn); | ||
182 | } | ||
183 | totalram_pages += totalhigh_pages; | ||
184 | } | ||
185 | #else | ||
186 | void __init set_highmem_pages_init(void) | ||
187 | { | ||
188 | add_highpages_with_active_regions(0, highstart_pfn, highend_pfn); | ||
189 | |||
190 | totalram_pages += totalhigh_pages; | ||
191 | } | ||
192 | #endif /* CONFIG_NUMA */ | ||
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c new file mode 100644 index 000000000000..ce6a722587d8 --- /dev/null +++ b/arch/x86/mm/init.c | |||
@@ -0,0 +1,49 @@ | |||
1 | #include <linux/swap.h> | ||
2 | #include <asm/cacheflush.h> | ||
3 | #include <asm/page.h> | ||
4 | #include <asm/sections.h> | ||
5 | #include <asm/system.h> | ||
6 | |||
7 | void free_init_pages(char *what, unsigned long begin, unsigned long end) | ||
8 | { | ||
9 | unsigned long addr = begin; | ||
10 | |||
11 | if (addr >= end) | ||
12 | return; | ||
13 | |||
14 | /* | ||
15 | * If debugging page accesses then do not free this memory but | ||
16 | * mark them not present - any buggy init-section access will | ||
17 | * create a kernel page fault: | ||
18 | */ | ||
19 | #ifdef CONFIG_DEBUG_PAGEALLOC | ||
20 | printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n", | ||
21 | begin, PAGE_ALIGN(end)); | ||
22 | set_memory_np(begin, (end - begin) >> PAGE_SHIFT); | ||
23 | #else | ||
24 | /* | ||
25 | * We just marked the kernel text read only above, now that | ||
26 | * we are going to free part of that, we need to make that | ||
27 | * writeable first. | ||
28 | */ | ||
29 | set_memory_rw(begin, (end - begin) >> PAGE_SHIFT); | ||
30 | |||
31 | printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10); | ||
32 | |||
33 | for (; addr < end; addr += PAGE_SIZE) { | ||
34 | ClearPageReserved(virt_to_page(addr)); | ||
35 | init_page_count(virt_to_page(addr)); | ||
36 | memset((void *)(addr & ~(PAGE_SIZE-1)), | ||
37 | POISON_FREE_INITMEM, PAGE_SIZE); | ||
38 | free_page(addr); | ||
39 | totalram_pages++; | ||
40 | } | ||
41 | #endif | ||
42 | } | ||
43 | |||
44 | void free_initmem(void) | ||
45 | { | ||
46 | free_init_pages("unused kernel memory", | ||
47 | (unsigned long)(&__init_begin), | ||
48 | (unsigned long)(&__init_end)); | ||
49 | } | ||
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c index 2cef05074413..47df0e1bbeb9 100644 --- a/arch/x86/mm/init_32.c +++ b/arch/x86/mm/init_32.c | |||
@@ -49,9 +49,6 @@ | |||
49 | #include <asm/paravirt.h> | 49 | #include <asm/paravirt.h> |
50 | #include <asm/setup.h> | 50 | #include <asm/setup.h> |
51 | #include <asm/cacheflush.h> | 51 | #include <asm/cacheflush.h> |
52 | #include <asm/smp.h> | ||
53 | |||
54 | unsigned int __VMALLOC_RESERVE = 128 << 20; | ||
55 | 52 | ||
56 | unsigned long max_low_pfn_mapped; | 53 | unsigned long max_low_pfn_mapped; |
57 | unsigned long max_pfn_mapped; | 54 | unsigned long max_pfn_mapped; |
@@ -138,6 +135,23 @@ static pte_t * __init one_page_table_init(pmd_t *pmd) | |||
138 | return pte_offset_kernel(pmd, 0); | 135 | return pte_offset_kernel(pmd, 0); |
139 | } | 136 | } |
140 | 137 | ||
138 | pmd_t * __init populate_extra_pmd(unsigned long vaddr) | ||
139 | { | ||
140 | int pgd_idx = pgd_index(vaddr); | ||
141 | int pmd_idx = pmd_index(vaddr); | ||
142 | |||
143 | return one_md_table_init(swapper_pg_dir + pgd_idx) + pmd_idx; | ||
144 | } | ||
145 | |||
146 | pte_t * __init populate_extra_pte(unsigned long vaddr) | ||
147 | { | ||
148 | int pte_idx = pte_index(vaddr); | ||
149 | pmd_t *pmd; | ||
150 | |||
151 | pmd = populate_extra_pmd(vaddr); | ||
152 | return one_page_table_init(pmd) + pte_idx; | ||
153 | } | ||
154 | |||
141 | static pte_t *__init page_table_kmap_check(pte_t *pte, pmd_t *pmd, | 155 | static pte_t *__init page_table_kmap_check(pte_t *pte, pmd_t *pmd, |
142 | unsigned long vaddr, pte_t *lastpte) | 156 | unsigned long vaddr, pte_t *lastpte) |
143 | { | 157 | { |
@@ -470,22 +484,10 @@ void __init add_highpages_with_active_regions(int nid, unsigned long start_pfn, | |||
470 | work_with_active_regions(nid, add_highpages_work_fn, &data); | 484 | work_with_active_regions(nid, add_highpages_work_fn, &data); |
471 | } | 485 | } |
472 | 486 | ||
473 | #ifndef CONFIG_NUMA | ||
474 | static void __init set_highmem_pages_init(void) | ||
475 | { | ||
476 | add_highpages_with_active_regions(0, highstart_pfn, highend_pfn); | ||
477 | |||
478 | totalram_pages += totalhigh_pages; | ||
479 | } | ||
480 | #endif /* !CONFIG_NUMA */ | ||
481 | |||
482 | #else | 487 | #else |
483 | static inline void permanent_kmaps_init(pgd_t *pgd_base) | 488 | static inline void permanent_kmaps_init(pgd_t *pgd_base) |
484 | { | 489 | { |
485 | } | 490 | } |
486 | static inline void set_highmem_pages_init(void) | ||
487 | { | ||
488 | } | ||
489 | #endif /* CONFIG_HIGHMEM */ | 491 | #endif /* CONFIG_HIGHMEM */ |
490 | 492 | ||
491 | void __init native_pagetable_setup_start(pgd_t *base) | 493 | void __init native_pagetable_setup_start(pgd_t *base) |
@@ -675,75 +677,97 @@ static int __init parse_highmem(char *arg) | |||
675 | } | 677 | } |
676 | early_param("highmem", parse_highmem); | 678 | early_param("highmem", parse_highmem); |
677 | 679 | ||
680 | #define MSG_HIGHMEM_TOO_BIG \ | ||
681 | "highmem size (%luMB) is bigger than pages available (%luMB)!\n" | ||
682 | |||
683 | #define MSG_LOWMEM_TOO_SMALL \ | ||
684 | "highmem size (%luMB) results in <64MB lowmem, ignoring it!\n" | ||
678 | /* | 685 | /* |
679 | * Determine low and high memory ranges: | 686 | * All of RAM fits into lowmem - but if user wants highmem |
687 | * artificially via the highmem=x boot parameter then create | ||
688 | * it: | ||
680 | */ | 689 | */ |
681 | void __init find_low_pfn_range(void) | 690 | void __init lowmem_pfn_init(void) |
682 | { | 691 | { |
683 | /* it could update max_pfn */ | ||
684 | |||
685 | /* max_low_pfn is 0, we already have early_res support */ | 692 | /* max_low_pfn is 0, we already have early_res support */ |
686 | |||
687 | max_low_pfn = max_pfn; | 693 | max_low_pfn = max_pfn; |
688 | if (max_low_pfn > MAXMEM_PFN) { | 694 | |
689 | if (highmem_pages == -1) | 695 | if (highmem_pages == -1) |
690 | highmem_pages = max_pfn - MAXMEM_PFN; | 696 | highmem_pages = 0; |
691 | if (highmem_pages + MAXMEM_PFN < max_pfn) | 697 | #ifdef CONFIG_HIGHMEM |
692 | max_pfn = MAXMEM_PFN + highmem_pages; | 698 | if (highmem_pages >= max_pfn) { |
693 | if (highmem_pages + MAXMEM_PFN > max_pfn) { | 699 | printk(KERN_ERR MSG_HIGHMEM_TOO_BIG, |
694 | printk(KERN_WARNING "only %luMB highmem pages " | 700 | pages_to_mb(highmem_pages), pages_to_mb(max_pfn)); |
695 | "available, ignoring highmem size of %uMB.\n", | 701 | highmem_pages = 0; |
696 | pages_to_mb(max_pfn - MAXMEM_PFN), | 702 | } |
703 | if (highmem_pages) { | ||
704 | if (max_low_pfn - highmem_pages < 64*1024*1024/PAGE_SIZE) { | ||
705 | printk(KERN_ERR MSG_LOWMEM_TOO_SMALL, | ||
697 | pages_to_mb(highmem_pages)); | 706 | pages_to_mb(highmem_pages)); |
698 | highmem_pages = 0; | 707 | highmem_pages = 0; |
699 | } | 708 | } |
700 | max_low_pfn = MAXMEM_PFN; | 709 | max_low_pfn -= highmem_pages; |
710 | } | ||
711 | #else | ||
712 | if (highmem_pages) | ||
713 | printk(KERN_ERR "ignoring highmem size on non-highmem kernel!\n"); | ||
714 | #endif | ||
715 | } | ||
716 | |||
717 | #define MSG_HIGHMEM_TOO_SMALL \ | ||
718 | "only %luMB highmem pages available, ignoring highmem size of %luMB!\n" | ||
719 | |||
720 | #define MSG_HIGHMEM_TRIMMED \ | ||
721 | "Warning: only 4GB will be used. Use a HIGHMEM64G enabled kernel!\n" | ||
722 | /* | ||
723 | * We have more RAM than fits into lowmem - we try to put it into | ||
724 | * highmem, also taking the highmem=x boot parameter into account: | ||
725 | */ | ||
726 | void __init highmem_pfn_init(void) | ||
727 | { | ||
728 | max_low_pfn = MAXMEM_PFN; | ||
729 | |||
730 | if (highmem_pages == -1) | ||
731 | highmem_pages = max_pfn - MAXMEM_PFN; | ||
732 | |||
733 | if (highmem_pages + MAXMEM_PFN < max_pfn) | ||
734 | max_pfn = MAXMEM_PFN + highmem_pages; | ||
735 | |||
736 | if (highmem_pages + MAXMEM_PFN > max_pfn) { | ||
737 | printk(KERN_WARNING MSG_HIGHMEM_TOO_SMALL, | ||
738 | pages_to_mb(max_pfn - MAXMEM_PFN), | ||
739 | pages_to_mb(highmem_pages)); | ||
740 | highmem_pages = 0; | ||
741 | } | ||
701 | #ifndef CONFIG_HIGHMEM | 742 | #ifndef CONFIG_HIGHMEM |
702 | /* Maximum memory usable is what is directly addressable */ | 743 | /* Maximum memory usable is what is directly addressable */ |
703 | printk(KERN_WARNING "Warning only %ldMB will be used.\n", | 744 | printk(KERN_WARNING "Warning only %ldMB will be used.\n", MAXMEM>>20); |
704 | MAXMEM>>20); | 745 | if (max_pfn > MAX_NONPAE_PFN) |
705 | if (max_pfn > MAX_NONPAE_PFN) | 746 | printk(KERN_WARNING "Use a HIGHMEM64G enabled kernel.\n"); |
706 | printk(KERN_WARNING | 747 | else |
707 | "Use a HIGHMEM64G enabled kernel.\n"); | 748 | printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n"); |
708 | else | 749 | max_pfn = MAXMEM_PFN; |
709 | printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n"); | ||
710 | max_pfn = MAXMEM_PFN; | ||
711 | #else /* !CONFIG_HIGHMEM */ | 750 | #else /* !CONFIG_HIGHMEM */ |
712 | #ifndef CONFIG_HIGHMEM64G | 751 | #ifndef CONFIG_HIGHMEM64G |
713 | if (max_pfn > MAX_NONPAE_PFN) { | 752 | if (max_pfn > MAX_NONPAE_PFN) { |
714 | max_pfn = MAX_NONPAE_PFN; | 753 | max_pfn = MAX_NONPAE_PFN; |
715 | printk(KERN_WARNING "Warning only 4GB will be used." | 754 | printk(KERN_WARNING MSG_HIGHMEM_TRIMMED); |
716 | "Use a HIGHMEM64G enabled kernel.\n"); | 755 | } |
717 | } | ||
718 | #endif /* !CONFIG_HIGHMEM64G */ | 756 | #endif /* !CONFIG_HIGHMEM64G */ |
719 | #endif /* !CONFIG_HIGHMEM */ | 757 | #endif /* !CONFIG_HIGHMEM */ |
720 | } else { | 758 | } |
721 | if (highmem_pages == -1) | 759 | |
722 | highmem_pages = 0; | 760 | /* |
723 | #ifdef CONFIG_HIGHMEM | 761 | * Determine low and high memory ranges: |
724 | if (highmem_pages >= max_pfn) { | 762 | */ |
725 | printk(KERN_ERR "highmem size specified (%uMB) is " | 763 | void __init find_low_pfn_range(void) |
726 | "bigger than pages available (%luMB)!.\n", | 764 | { |
727 | pages_to_mb(highmem_pages), | 765 | /* it could update max_pfn */ |
728 | pages_to_mb(max_pfn)); | 766 | |
729 | highmem_pages = 0; | 767 | if (max_pfn <= MAXMEM_PFN) |
730 | } | 768 | lowmem_pfn_init(); |
731 | if (highmem_pages) { | 769 | else |
732 | if (max_low_pfn - highmem_pages < | 770 | highmem_pfn_init(); |
733 | 64*1024*1024/PAGE_SIZE){ | ||
734 | printk(KERN_ERR "highmem size %uMB results in " | ||
735 | "smaller than 64MB lowmem, ignoring it.\n" | ||
736 | , pages_to_mb(highmem_pages)); | ||
737 | highmem_pages = 0; | ||
738 | } | ||
739 | max_low_pfn -= highmem_pages; | ||
740 | } | ||
741 | #else | ||
742 | if (highmem_pages) | ||
743 | printk(KERN_ERR "ignoring highmem size on non-highmem" | ||
744 | " kernel!\n"); | ||
745 | #endif | ||
746 | } | ||
747 | } | 771 | } |
748 | 772 | ||
749 | #ifndef CONFIG_NEED_MULTIPLE_NODES | 773 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
@@ -826,10 +850,10 @@ static void __init find_early_table_space(unsigned long end, int use_pse) | |||
826 | unsigned long puds, pmds, ptes, tables, start; | 850 | unsigned long puds, pmds, ptes, tables, start; |
827 | 851 | ||
828 | puds = (end + PUD_SIZE - 1) >> PUD_SHIFT; | 852 | puds = (end + PUD_SIZE - 1) >> PUD_SHIFT; |
829 | tables = PAGE_ALIGN(puds * sizeof(pud_t)); | 853 | tables = roundup(puds * sizeof(pud_t), PAGE_SIZE); |
830 | 854 | ||
831 | pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT; | 855 | pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT; |
832 | tables += PAGE_ALIGN(pmds * sizeof(pmd_t)); | 856 | tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE); |
833 | 857 | ||
834 | if (use_pse) { | 858 | if (use_pse) { |
835 | unsigned long extra; | 859 | unsigned long extra; |
@@ -840,10 +864,10 @@ static void __init find_early_table_space(unsigned long end, int use_pse) | |||
840 | } else | 864 | } else |
841 | ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; | 865 | ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; |
842 | 866 | ||
843 | tables += PAGE_ALIGN(ptes * sizeof(pte_t)); | 867 | tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE); |
844 | 868 | ||
845 | /* for fixmap */ | 869 | /* for fixmap */ |
846 | tables += PAGE_ALIGN(__end_of_fixed_addresses * sizeof(pte_t)); | 870 | tables += roundup(__end_of_fixed_addresses * sizeof(pte_t), PAGE_SIZE); |
847 | 871 | ||
848 | /* | 872 | /* |
849 | * RED-PEN putting page tables only on node 0 could | 873 | * RED-PEN putting page tables only on node 0 could |
@@ -1193,45 +1217,6 @@ void mark_rodata_ro(void) | |||
1193 | } | 1217 | } |
1194 | #endif | 1218 | #endif |
1195 | 1219 | ||
1196 | void free_init_pages(char *what, unsigned long begin, unsigned long end) | ||
1197 | { | ||
1198 | #ifdef CONFIG_DEBUG_PAGEALLOC | ||
1199 | /* | ||
1200 | * If debugging page accesses then do not free this memory but | ||
1201 | * mark them not present - any buggy init-section access will | ||
1202 | * create a kernel page fault: | ||
1203 | */ | ||
1204 | printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n", | ||
1205 | begin, PAGE_ALIGN(end)); | ||
1206 | set_memory_np(begin, (end - begin) >> PAGE_SHIFT); | ||
1207 | #else | ||
1208 | unsigned long addr; | ||
1209 | |||
1210 | /* | ||
1211 | * We just marked the kernel text read only above, now that | ||
1212 | * we are going to free part of that, we need to make that | ||
1213 | * writeable first. | ||
1214 | */ | ||
1215 | set_memory_rw(begin, (end - begin) >> PAGE_SHIFT); | ||
1216 | |||
1217 | for (addr = begin; addr < end; addr += PAGE_SIZE) { | ||
1218 | ClearPageReserved(virt_to_page(addr)); | ||
1219 | init_page_count(virt_to_page(addr)); | ||
1220 | memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE); | ||
1221 | free_page(addr); | ||
1222 | totalram_pages++; | ||
1223 | } | ||
1224 | printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10); | ||
1225 | #endif | ||
1226 | } | ||
1227 | |||
1228 | void free_initmem(void) | ||
1229 | { | ||
1230 | free_init_pages("unused kernel memory", | ||
1231 | (unsigned long)(&__init_begin), | ||
1232 | (unsigned long)(&__init_end)); | ||
1233 | } | ||
1234 | |||
1235 | #ifdef CONFIG_BLK_DEV_INITRD | 1220 | #ifdef CONFIG_BLK_DEV_INITRD |
1236 | void free_initrd_mem(unsigned long start, unsigned long end) | 1221 | void free_initrd_mem(unsigned long start, unsigned long end) |
1237 | { | 1222 | { |
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index b1352250096e..07f44d491df1 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c | |||
@@ -168,34 +168,51 @@ static __ref void *spp_getpage(void) | |||
168 | return ptr; | 168 | return ptr; |
169 | } | 169 | } |
170 | 170 | ||
171 | void | 171 | static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr) |
172 | set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) | ||
173 | { | 172 | { |
174 | pud_t *pud; | 173 | if (pgd_none(*pgd)) { |
175 | pmd_t *pmd; | 174 | pud_t *pud = (pud_t *)spp_getpage(); |
176 | pte_t *pte; | 175 | pgd_populate(&init_mm, pgd, pud); |
176 | if (pud != pud_offset(pgd, 0)) | ||
177 | printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", | ||
178 | pud, pud_offset(pgd, 0)); | ||
179 | } | ||
180 | return pud_offset(pgd, vaddr); | ||
181 | } | ||
177 | 182 | ||
178 | pud = pud_page + pud_index(vaddr); | 183 | static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) |
184 | { | ||
179 | if (pud_none(*pud)) { | 185 | if (pud_none(*pud)) { |
180 | pmd = (pmd_t *) spp_getpage(); | 186 | pmd_t *pmd = (pmd_t *) spp_getpage(); |
181 | pud_populate(&init_mm, pud, pmd); | 187 | pud_populate(&init_mm, pud, pmd); |
182 | if (pmd != pmd_offset(pud, 0)) { | 188 | if (pmd != pmd_offset(pud, 0)) |
183 | printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", | 189 | printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", |
184 | pmd, pmd_offset(pud, 0)); | 190 | pmd, pmd_offset(pud, 0)); |
185 | return; | ||
186 | } | ||
187 | } | 191 | } |
188 | pmd = pmd_offset(pud, vaddr); | 192 | return pmd_offset(pud, vaddr); |
193 | } | ||
194 | |||
195 | static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) | ||
196 | { | ||
189 | if (pmd_none(*pmd)) { | 197 | if (pmd_none(*pmd)) { |
190 | pte = (pte_t *) spp_getpage(); | 198 | pte_t *pte = (pte_t *) spp_getpage(); |
191 | pmd_populate_kernel(&init_mm, pmd, pte); | 199 | pmd_populate_kernel(&init_mm, pmd, pte); |
192 | if (pte != pte_offset_kernel(pmd, 0)) { | 200 | if (pte != pte_offset_kernel(pmd, 0)) |
193 | printk(KERN_ERR "PAGETABLE BUG #02!\n"); | 201 | printk(KERN_ERR "PAGETABLE BUG #02!\n"); |
194 | return; | ||
195 | } | ||
196 | } | 202 | } |
203 | return pte_offset_kernel(pmd, vaddr); | ||
204 | } | ||
205 | |||
206 | void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) | ||
207 | { | ||
208 | pud_t *pud; | ||
209 | pmd_t *pmd; | ||
210 | pte_t *pte; | ||
211 | |||
212 | pud = pud_page + pud_index(vaddr); | ||
213 | pmd = fill_pmd(pud, vaddr); | ||
214 | pte = fill_pte(pmd, vaddr); | ||
197 | 215 | ||
198 | pte = pte_offset_kernel(pmd, vaddr); | ||
199 | set_pte(pte, new_pte); | 216 | set_pte(pte, new_pte); |
200 | 217 | ||
201 | /* | 218 | /* |
@@ -205,8 +222,7 @@ set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) | |||
205 | __flush_tlb_one(vaddr); | 222 | __flush_tlb_one(vaddr); |
206 | } | 223 | } |
207 | 224 | ||
208 | void | 225 | void set_pte_vaddr(unsigned long vaddr, pte_t pteval) |
209 | set_pte_vaddr(unsigned long vaddr, pte_t pteval) | ||
210 | { | 226 | { |
211 | pgd_t *pgd; | 227 | pgd_t *pgd; |
212 | pud_t *pud_page; | 228 | pud_t *pud_page; |
@@ -223,6 +239,24 @@ set_pte_vaddr(unsigned long vaddr, pte_t pteval) | |||
223 | set_pte_vaddr_pud(pud_page, vaddr, pteval); | 239 | set_pte_vaddr_pud(pud_page, vaddr, pteval); |
224 | } | 240 | } |
225 | 241 | ||
242 | pmd_t * __init populate_extra_pmd(unsigned long vaddr) | ||
243 | { | ||
244 | pgd_t *pgd; | ||
245 | pud_t *pud; | ||
246 | |||
247 | pgd = pgd_offset_k(vaddr); | ||
248 | pud = fill_pud(pgd, vaddr); | ||
249 | return fill_pmd(pud, vaddr); | ||
250 | } | ||
251 | |||
252 | pte_t * __init populate_extra_pte(unsigned long vaddr) | ||
253 | { | ||
254 | pmd_t *pmd; | ||
255 | |||
256 | pmd = populate_extra_pmd(vaddr); | ||
257 | return fill_pte(pmd, vaddr); | ||
258 | } | ||
259 | |||
226 | /* | 260 | /* |
227 | * Create large page table mappings for a range of physical addresses. | 261 | * Create large page table mappings for a range of physical addresses. |
228 | */ | 262 | */ |
@@ -947,43 +981,6 @@ void __init mem_init(void) | |||
947 | initsize >> 10); | 981 | initsize >> 10); |
948 | } | 982 | } |
949 | 983 | ||
950 | void free_init_pages(char *what, unsigned long begin, unsigned long end) | ||
951 | { | ||
952 | unsigned long addr = begin; | ||
953 | |||
954 | if (addr >= end) | ||
955 | return; | ||
956 | |||
957 | /* | ||
958 | * If debugging page accesses then do not free this memory but | ||
959 | * mark them not present - any buggy init-section access will | ||
960 | * create a kernel page fault: | ||
961 | */ | ||
962 | #ifdef CONFIG_DEBUG_PAGEALLOC | ||
963 | printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n", | ||
964 | begin, PAGE_ALIGN(end)); | ||
965 | set_memory_np(begin, (end - begin) >> PAGE_SHIFT); | ||
966 | #else | ||
967 | printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10); | ||
968 | |||
969 | for (; addr < end; addr += PAGE_SIZE) { | ||
970 | ClearPageReserved(virt_to_page(addr)); | ||
971 | init_page_count(virt_to_page(addr)); | ||
972 | memset((void *)(addr & ~(PAGE_SIZE-1)), | ||
973 | POISON_FREE_INITMEM, PAGE_SIZE); | ||
974 | free_page(addr); | ||
975 | totalram_pages++; | ||
976 | } | ||
977 | #endif | ||
978 | } | ||
979 | |||
980 | void free_initmem(void) | ||
981 | { | ||
982 | free_init_pages("unused kernel memory", | ||
983 | (unsigned long)(&__init_begin), | ||
984 | (unsigned long)(&__init_end)); | ||
985 | } | ||
986 | |||
987 | #ifdef CONFIG_DEBUG_RODATA | 984 | #ifdef CONFIG_DEBUG_RODATA |
988 | const int rodata_test_data = 0xC3; | 985 | const int rodata_test_data = 0xC3; |
989 | EXPORT_SYMBOL_GPL(rodata_test_data); | 986 | EXPORT_SYMBOL_GPL(rodata_test_data); |
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index f45d5e29a72e..433f7bd4648a 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c | |||
@@ -348,7 +348,7 @@ EXPORT_SYMBOL(ioremap_nocache); | |||
348 | * | 348 | * |
349 | * Must be freed with iounmap. | 349 | * Must be freed with iounmap. |
350 | */ | 350 | */ |
351 | void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size) | 351 | void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size) |
352 | { | 352 | { |
353 | if (pat_enabled) | 353 | if (pat_enabled) |
354 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC, | 354 | return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC, |
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c index 9cab18b0b857..0bcd7883d036 100644 --- a/arch/x86/mm/memtest.c +++ b/arch/x86/mm/memtest.c | |||
@@ -9,44 +9,44 @@ | |||
9 | 9 | ||
10 | #include <asm/e820.h> | 10 | #include <asm/e820.h> |
11 | 11 | ||
12 | static void __init memtest(unsigned long start_phys, unsigned long size, | 12 | static u64 patterns[] __initdata = { |
13 | unsigned pattern) | 13 | 0, |
14 | 0xffffffffffffffffULL, | ||
15 | 0x5555555555555555ULL, | ||
16 | 0xaaaaaaaaaaaaaaaaULL, | ||
17 | 0x1111111111111111ULL, | ||
18 | 0x2222222222222222ULL, | ||
19 | 0x4444444444444444ULL, | ||
20 | 0x8888888888888888ULL, | ||
21 | 0x3333333333333333ULL, | ||
22 | 0x6666666666666666ULL, | ||
23 | 0x9999999999999999ULL, | ||
24 | 0xccccccccccccccccULL, | ||
25 | 0x7777777777777777ULL, | ||
26 | 0xbbbbbbbbbbbbbbbbULL, | ||
27 | 0xddddddddddddddddULL, | ||
28 | 0xeeeeeeeeeeeeeeeeULL, | ||
29 | 0x7a6c7258554e494cULL, /* yeah ;-) */ | ||
30 | }; | ||
31 | |||
32 | static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad) | ||
14 | { | 33 | { |
15 | unsigned long i; | 34 | printk(KERN_INFO " %016llx bad mem addr %010llx - %010llx reserved\n", |
16 | unsigned long *start; | 35 | (unsigned long long) pattern, |
17 | unsigned long start_bad; | 36 | (unsigned long long) start_bad, |
18 | unsigned long last_bad; | 37 | (unsigned long long) end_bad); |
19 | unsigned long val; | 38 | reserve_early(start_bad, end_bad, "BAD RAM"); |
20 | unsigned long start_phys_aligned; | 39 | } |
21 | unsigned long count; | ||
22 | unsigned long incr; | ||
23 | |||
24 | switch (pattern) { | ||
25 | case 0: | ||
26 | val = 0UL; | ||
27 | break; | ||
28 | case 1: | ||
29 | val = -1UL; | ||
30 | break; | ||
31 | case 2: | ||
32 | #ifdef CONFIG_X86_64 | ||
33 | val = 0x5555555555555555UL; | ||
34 | #else | ||
35 | val = 0x55555555UL; | ||
36 | #endif | ||
37 | break; | ||
38 | case 3: | ||
39 | #ifdef CONFIG_X86_64 | ||
40 | val = 0xaaaaaaaaaaaaaaaaUL; | ||
41 | #else | ||
42 | val = 0xaaaaaaaaUL; | ||
43 | #endif | ||
44 | break; | ||
45 | default: | ||
46 | return; | ||
47 | } | ||
48 | 40 | ||
49 | incr = sizeof(unsigned long); | 41 | static void __init memtest(u64 pattern, u64 start_phys, u64 size) |
42 | { | ||
43 | u64 i, count; | ||
44 | u64 *start; | ||
45 | u64 start_bad, last_bad; | ||
46 | u64 start_phys_aligned; | ||
47 | size_t incr; | ||
48 | |||
49 | incr = sizeof(pattern); | ||
50 | start_phys_aligned = ALIGN(start_phys, incr); | 50 | start_phys_aligned = ALIGN(start_phys, incr); |
51 | count = (size - (start_phys_aligned - start_phys))/incr; | 51 | count = (size - (start_phys_aligned - start_phys))/incr; |
52 | start = __va(start_phys_aligned); | 52 | start = __va(start_phys_aligned); |
@@ -54,25 +54,42 @@ static void __init memtest(unsigned long start_phys, unsigned long size, | |||
54 | last_bad = 0; | 54 | last_bad = 0; |
55 | 55 | ||
56 | for (i = 0; i < count; i++) | 56 | for (i = 0; i < count; i++) |
57 | start[i] = val; | 57 | start[i] = pattern; |
58 | for (i = 0; i < count; i++, start++, start_phys_aligned += incr) { | 58 | for (i = 0; i < count; i++, start++, start_phys_aligned += incr) { |
59 | if (*start != val) { | 59 | if (*start == pattern) |
60 | if (start_phys_aligned == last_bad + incr) { | 60 | continue; |
61 | last_bad += incr; | 61 | if (start_phys_aligned == last_bad + incr) { |
62 | } else { | 62 | last_bad += incr; |
63 | if (start_bad) { | 63 | continue; |
64 | printk(KERN_CONT "\n %016lx bad mem addr %010lx - %010lx reserved", | ||
65 | val, start_bad, last_bad + incr); | ||
66 | reserve_early(start_bad, last_bad + incr, "BAD RAM"); | ||
67 | } | ||
68 | start_bad = last_bad = start_phys_aligned; | ||
69 | } | ||
70 | } | 64 | } |
65 | if (start_bad) | ||
66 | reserve_bad_mem(pattern, start_bad, last_bad + incr); | ||
67 | start_bad = last_bad = start_phys_aligned; | ||
71 | } | 68 | } |
72 | if (start_bad) { | 69 | if (start_bad) |
73 | printk(KERN_CONT "\n %016lx bad mem addr %010lx - %010lx reserved", | 70 | reserve_bad_mem(pattern, start_bad, last_bad + incr); |
74 | val, start_bad, last_bad + incr); | 71 | } |
75 | reserve_early(start_bad, last_bad + incr, "BAD RAM"); | 72 | |
73 | static void __init do_one_pass(u64 pattern, u64 start, u64 end) | ||
74 | { | ||
75 | u64 size = 0; | ||
76 | |||
77 | while (start < end) { | ||
78 | start = find_e820_area_size(start, &size, 1); | ||
79 | |||
80 | /* done ? */ | ||
81 | if (start >= end) | ||
82 | break; | ||
83 | if (start + size > end) | ||
84 | size = end - start; | ||
85 | |||
86 | printk(KERN_INFO " %010llx - %010llx pattern %016llx\n", | ||
87 | (unsigned long long) start, | ||
88 | (unsigned long long) start + size, | ||
89 | (unsigned long long) cpu_to_be64(pattern)); | ||
90 | memtest(pattern, start, size); | ||
91 | |||
92 | start += size; | ||
76 | } | 93 | } |
77 | } | 94 | } |
78 | 95 | ||
@@ -90,33 +107,22 @@ early_param("memtest", parse_memtest); | |||
90 | 107 | ||
91 | void __init early_memtest(unsigned long start, unsigned long end) | 108 | void __init early_memtest(unsigned long start, unsigned long end) |
92 | { | 109 | { |
93 | u64 t_start, t_size; | 110 | unsigned int i; |
94 | unsigned pattern; | 111 | unsigned int idx = 0; |
95 | 112 | ||
96 | if (!memtest_pattern) | 113 | if (!memtest_pattern) |
97 | return; | 114 | return; |
98 | 115 | ||
99 | printk(KERN_INFO "early_memtest: pattern num %d", memtest_pattern); | 116 | printk(KERN_INFO "early_memtest: # of tests: %d\n", memtest_pattern); |
100 | for (pattern = 0; pattern < memtest_pattern; pattern++) { | 117 | for (i = 0; i < memtest_pattern; i++) { |
101 | t_start = start; | 118 | idx = i % ARRAY_SIZE(patterns); |
102 | t_size = 0; | 119 | do_one_pass(patterns[idx], start, end); |
103 | while (t_start < end) { | 120 | } |
104 | t_start = find_e820_area_size(t_start, &t_size, 1); | ||
105 | |||
106 | /* done ? */ | ||
107 | if (t_start >= end) | ||
108 | break; | ||
109 | if (t_start + t_size > end) | ||
110 | t_size = end - t_start; | ||
111 | |||
112 | printk(KERN_CONT "\n %010llx - %010llx pattern %d", | ||
113 | (unsigned long long)t_start, | ||
114 | (unsigned long long)t_start + t_size, pattern); | ||
115 | |||
116 | memtest(t_start, t_size, pattern); | ||
117 | 121 | ||
118 | t_start += t_size; | 122 | if (idx > 0) { |
119 | } | 123 | printk(KERN_INFO "early_memtest: wipe out " |
124 | "test pattern from memory\n"); | ||
125 | /* additional test with pattern 0 will do this */ | ||
126 | do_one_pass(0, start, end); | ||
120 | } | 127 | } |
121 | printk(KERN_CONT "\n"); | ||
122 | } | 128 | } |
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c index 56fe7124fbec..165829600566 100644 --- a/arch/x86/mm/mmap.c +++ b/arch/x86/mm/mmap.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * Based on code by Ingo Molnar and Andi Kleen, copyrighted | 4 | * Based on code by Ingo Molnar and Andi Kleen, copyrighted |
5 | * as follows: | 5 | * as follows: |
6 | * | 6 | * |
7 | * Copyright 2003-2004 Red Hat Inc., Durham, North Carolina. | 7 | * Copyright 2003-2009 Red Hat Inc. |
8 | * All Rights Reserved. | 8 | * All Rights Reserved. |
9 | * Copyright 2005 Andi Kleen, SUSE Labs. | 9 | * Copyright 2005 Andi Kleen, SUSE Labs. |
10 | * Copyright 2007 Jiri Kosina, SUSE Labs. | 10 | * Copyright 2007 Jiri Kosina, SUSE Labs. |
diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c index d1f7439d173c..451fe95a0352 100644 --- a/arch/x86/mm/numa_32.c +++ b/arch/x86/mm/numa_32.c | |||
@@ -194,7 +194,7 @@ void *alloc_remap(int nid, unsigned long size) | |||
194 | size = ALIGN(size, L1_CACHE_BYTES); | 194 | size = ALIGN(size, L1_CACHE_BYTES); |
195 | 195 | ||
196 | if (!allocation || (allocation + size) >= node_remap_end_vaddr[nid]) | 196 | if (!allocation || (allocation + size) >= node_remap_end_vaddr[nid]) |
197 | return 0; | 197 | return NULL; |
198 | 198 | ||
199 | node_remap_alloc_vaddr[nid] += size; | 199 | node_remap_alloc_vaddr[nid] += size; |
200 | memset(allocation, 0, size); | 200 | memset(allocation, 0, size); |
@@ -423,32 +423,6 @@ void __init initmem_init(unsigned long start_pfn, | |||
423 | setup_bootmem_allocator(); | 423 | setup_bootmem_allocator(); |
424 | } | 424 | } |
425 | 425 | ||
426 | void __init set_highmem_pages_init(void) | ||
427 | { | ||
428 | #ifdef CONFIG_HIGHMEM | ||
429 | struct zone *zone; | ||
430 | int nid; | ||
431 | |||
432 | for_each_zone(zone) { | ||
433 | unsigned long zone_start_pfn, zone_end_pfn; | ||
434 | |||
435 | if (!is_highmem(zone)) | ||
436 | continue; | ||
437 | |||
438 | zone_start_pfn = zone->zone_start_pfn; | ||
439 | zone_end_pfn = zone_start_pfn + zone->spanned_pages; | ||
440 | |||
441 | nid = zone_to_nid(zone); | ||
442 | printk(KERN_INFO "Initializing %s for node %d (%08lx:%08lx)\n", | ||
443 | zone->name, nid, zone_start_pfn, zone_end_pfn); | ||
444 | |||
445 | add_highpages_with_active_regions(nid, zone_start_pfn, | ||
446 | zone_end_pfn); | ||
447 | } | ||
448 | totalram_pages += totalhigh_pages; | ||
449 | #endif | ||
450 | } | ||
451 | |||
452 | #ifdef CONFIG_MEMORY_HOTPLUG | 426 | #ifdef CONFIG_MEMORY_HOTPLUG |
453 | static int paddr_to_nid(u64 addr) | 427 | static int paddr_to_nid(u64 addr) |
454 | { | 428 | { |
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index f3516da035d1..64c9cf043cdd 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c | |||
@@ -20,6 +20,12 @@ | |||
20 | #include <asm/acpi.h> | 20 | #include <asm/acpi.h> |
21 | #include <asm/k8.h> | 21 | #include <asm/k8.h> |
22 | 22 | ||
23 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | ||
24 | # define DBG(x...) printk(KERN_DEBUG x) | ||
25 | #else | ||
26 | # define DBG(x...) | ||
27 | #endif | ||
28 | |||
23 | struct pglist_data *node_data[MAX_NUMNODES] __read_mostly; | 29 | struct pglist_data *node_data[MAX_NUMNODES] __read_mostly; |
24 | EXPORT_SYMBOL(node_data); | 30 | EXPORT_SYMBOL(node_data); |
25 | 31 | ||
@@ -33,6 +39,21 @@ int numa_off __initdata; | |||
33 | static unsigned long __initdata nodemap_addr; | 39 | static unsigned long __initdata nodemap_addr; |
34 | static unsigned long __initdata nodemap_size; | 40 | static unsigned long __initdata nodemap_size; |
35 | 41 | ||
42 | DEFINE_PER_CPU(int, node_number) = 0; | ||
43 | EXPORT_PER_CPU_SYMBOL(node_number); | ||
44 | |||
45 | /* | ||
46 | * Map cpu index to node index | ||
47 | */ | ||
48 | DEFINE_EARLY_PER_CPU(int, x86_cpu_to_node_map, NUMA_NO_NODE); | ||
49 | EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_node_map); | ||
50 | |||
51 | /* | ||
52 | * Which logical CPUs are on which nodes | ||
53 | */ | ||
54 | cpumask_t *node_to_cpumask_map; | ||
55 | EXPORT_SYMBOL(node_to_cpumask_map); | ||
56 | |||
36 | /* | 57 | /* |
37 | * Given a shift value, try to populate memnodemap[] | 58 | * Given a shift value, try to populate memnodemap[] |
38 | * Returns : | 59 | * Returns : |
@@ -640,3 +661,199 @@ void __init init_cpu_to_node(void) | |||
640 | #endif | 661 | #endif |
641 | 662 | ||
642 | 663 | ||
664 | /* | ||
665 | * Allocate node_to_cpumask_map based on number of available nodes | ||
666 | * Requires node_possible_map to be valid. | ||
667 | * | ||
668 | * Note: node_to_cpumask() is not valid until after this is done. | ||
669 | * (Use CONFIG_DEBUG_PER_CPU_MAPS to check this.) | ||
670 | */ | ||
671 | void __init setup_node_to_cpumask_map(void) | ||
672 | { | ||
673 | unsigned int node, num = 0; | ||
674 | cpumask_t *map; | ||
675 | |||
676 | /* setup nr_node_ids if not done yet */ | ||
677 | if (nr_node_ids == MAX_NUMNODES) { | ||
678 | for_each_node_mask(node, node_possible_map) | ||
679 | num = node; | ||
680 | nr_node_ids = num + 1; | ||
681 | } | ||
682 | |||
683 | /* allocate the map */ | ||
684 | map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t)); | ||
685 | DBG("node_to_cpumask_map at %p for %d nodes\n", map, nr_node_ids); | ||
686 | |||
687 | pr_debug("Node to cpumask map at %p for %d nodes\n", | ||
688 | map, nr_node_ids); | ||
689 | |||
690 | /* node_to_cpumask() will now work */ | ||
691 | node_to_cpumask_map = map; | ||
692 | } | ||
693 | |||
694 | void __cpuinit numa_set_node(int cpu, int node) | ||
695 | { | ||
696 | int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map); | ||
697 | |||
698 | /* early setting, no percpu area yet */ | ||
699 | if (cpu_to_node_map) { | ||
700 | cpu_to_node_map[cpu] = node; | ||
701 | return; | ||
702 | } | ||
703 | |||
704 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | ||
705 | if (cpu >= nr_cpu_ids || !cpu_possible(cpu)) { | ||
706 | printk(KERN_ERR "numa_set_node: invalid cpu# (%d)\n", cpu); | ||
707 | dump_stack(); | ||
708 | return; | ||
709 | } | ||
710 | #endif | ||
711 | per_cpu(x86_cpu_to_node_map, cpu) = node; | ||
712 | |||
713 | if (node != NUMA_NO_NODE) | ||
714 | per_cpu(node_number, cpu) = node; | ||
715 | } | ||
716 | |||
717 | void __cpuinit numa_clear_node(int cpu) | ||
718 | { | ||
719 | numa_set_node(cpu, NUMA_NO_NODE); | ||
720 | } | ||
721 | |||
722 | #ifndef CONFIG_DEBUG_PER_CPU_MAPS | ||
723 | |||
724 | void __cpuinit numa_add_cpu(int cpu) | ||
725 | { | ||
726 | cpu_set(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]); | ||
727 | } | ||
728 | |||
729 | void __cpuinit numa_remove_cpu(int cpu) | ||
730 | { | ||
731 | cpu_clear(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]); | ||
732 | } | ||
733 | |||
734 | #else /* CONFIG_DEBUG_PER_CPU_MAPS */ | ||
735 | |||
736 | /* | ||
737 | * --------- debug versions of the numa functions --------- | ||
738 | */ | ||
739 | static void __cpuinit numa_set_cpumask(int cpu, int enable) | ||
740 | { | ||
741 | int node = early_cpu_to_node(cpu); | ||
742 | cpumask_t *mask; | ||
743 | char buf[64]; | ||
744 | |||
745 | if (node_to_cpumask_map == NULL) { | ||
746 | printk(KERN_ERR "node_to_cpumask_map NULL\n"); | ||
747 | dump_stack(); | ||
748 | return; | ||
749 | } | ||
750 | |||
751 | mask = &node_to_cpumask_map[node]; | ||
752 | if (enable) | ||
753 | cpu_set(cpu, *mask); | ||
754 | else | ||
755 | cpu_clear(cpu, *mask); | ||
756 | |||
757 | cpulist_scnprintf(buf, sizeof(buf), mask); | ||
758 | printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n", | ||
759 | enable ? "numa_add_cpu" : "numa_remove_cpu", cpu, node, buf); | ||
760 | } | ||
761 | |||
762 | void __cpuinit numa_add_cpu(int cpu) | ||
763 | { | ||
764 | numa_set_cpumask(cpu, 1); | ||
765 | } | ||
766 | |||
767 | void __cpuinit numa_remove_cpu(int cpu) | ||
768 | { | ||
769 | numa_set_cpumask(cpu, 0); | ||
770 | } | ||
771 | |||
772 | int cpu_to_node(int cpu) | ||
773 | { | ||
774 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) { | ||
775 | printk(KERN_WARNING | ||
776 | "cpu_to_node(%d): usage too early!\n", cpu); | ||
777 | dump_stack(); | ||
778 | return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu]; | ||
779 | } | ||
780 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
781 | } | ||
782 | EXPORT_SYMBOL(cpu_to_node); | ||
783 | |||
784 | /* | ||
785 | * Same function as cpu_to_node() but used if called before the | ||
786 | * per_cpu areas are setup. | ||
787 | */ | ||
788 | int early_cpu_to_node(int cpu) | ||
789 | { | ||
790 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) | ||
791 | return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu]; | ||
792 | |||
793 | if (!cpu_possible(cpu)) { | ||
794 | printk(KERN_WARNING | ||
795 | "early_cpu_to_node(%d): no per_cpu area!\n", cpu); | ||
796 | dump_stack(); | ||
797 | return NUMA_NO_NODE; | ||
798 | } | ||
799 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
800 | } | ||
801 | |||
802 | |||
803 | /* empty cpumask */ | ||
804 | static const cpumask_t cpu_mask_none; | ||
805 | |||
806 | /* | ||
807 | * Returns a pointer to the bitmask of CPUs on Node 'node'. | ||
808 | */ | ||
809 | const cpumask_t *cpumask_of_node(int node) | ||
810 | { | ||
811 | if (node_to_cpumask_map == NULL) { | ||
812 | printk(KERN_WARNING | ||
813 | "cpumask_of_node(%d): no node_to_cpumask_map!\n", | ||
814 | node); | ||
815 | dump_stack(); | ||
816 | return (const cpumask_t *)&cpu_online_map; | ||
817 | } | ||
818 | if (node >= nr_node_ids) { | ||
819 | printk(KERN_WARNING | ||
820 | "cpumask_of_node(%d): node > nr_node_ids(%d)\n", | ||
821 | node, nr_node_ids); | ||
822 | dump_stack(); | ||
823 | return &cpu_mask_none; | ||
824 | } | ||
825 | return &node_to_cpumask_map[node]; | ||
826 | } | ||
827 | EXPORT_SYMBOL(cpumask_of_node); | ||
828 | |||
829 | /* | ||
830 | * Returns a bitmask of CPUs on Node 'node'. | ||
831 | * | ||
832 | * Side note: this function creates the returned cpumask on the stack | ||
833 | * so with a high NR_CPUS count, excessive stack space is used. The | ||
834 | * node_to_cpumask_ptr function should be used whenever possible. | ||
835 | */ | ||
836 | cpumask_t node_to_cpumask(int node) | ||
837 | { | ||
838 | if (node_to_cpumask_map == NULL) { | ||
839 | printk(KERN_WARNING | ||
840 | "node_to_cpumask(%d): no node_to_cpumask_map!\n", node); | ||
841 | dump_stack(); | ||
842 | return cpu_online_map; | ||
843 | } | ||
844 | if (node >= nr_node_ids) { | ||
845 | printk(KERN_WARNING | ||
846 | "node_to_cpumask(%d): node > nr_node_ids(%d)\n", | ||
847 | node, nr_node_ids); | ||
848 | dump_stack(); | ||
849 | return cpu_mask_none; | ||
850 | } | ||
851 | return node_to_cpumask_map[node]; | ||
852 | } | ||
853 | EXPORT_SYMBOL(node_to_cpumask); | ||
854 | |||
855 | /* | ||
856 | * --------- end of debug versions of the numa functions --------- | ||
857 | */ | ||
858 | |||
859 | #endif /* CONFIG_DEBUG_PER_CPU_MAPS */ | ||
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 7233bd7e357b..9c4294986af7 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
@@ -482,6 +482,13 @@ static int split_large_page(pte_t *kpte, unsigned long address) | |||
482 | pbase = (pte_t *)page_address(base); | 482 | pbase = (pte_t *)page_address(base); |
483 | paravirt_alloc_pte(&init_mm, page_to_pfn(base)); | 483 | paravirt_alloc_pte(&init_mm, page_to_pfn(base)); |
484 | ref_prot = pte_pgprot(pte_clrhuge(*kpte)); | 484 | ref_prot = pte_pgprot(pte_clrhuge(*kpte)); |
485 | /* | ||
486 | * If we ever want to utilize the PAT bit, we need to | ||
487 | * update this function to make sure it's converted from | ||
488 | * bit 12 to bit 7 when we cross from the 2MB level to | ||
489 | * the 4K level: | ||
490 | */ | ||
491 | WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE); | ||
485 | 492 | ||
486 | #ifdef CONFIG_X86_64 | 493 | #ifdef CONFIG_X86_64 |
487 | if (level == PG_LEVEL_1G) { | 494 | if (level == PG_LEVEL_1G) { |
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index e0ab173b6974..2ed37158012d 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #ifdef CONFIG_X86_PAT | 31 | #ifdef CONFIG_X86_PAT |
32 | int __read_mostly pat_enabled = 1; | 32 | int __read_mostly pat_enabled = 1; |
33 | 33 | ||
34 | void __cpuinit pat_disable(char *reason) | 34 | void __cpuinit pat_disable(const char *reason) |
35 | { | 35 | { |
36 | pat_enabled = 0; | 36 | pat_enabled = 0; |
37 | printk(KERN_INFO "%s\n", reason); | 37 | printk(KERN_INFO "%s\n", reason); |
@@ -43,6 +43,11 @@ static int __init nopat(char *str) | |||
43 | return 0; | 43 | return 0; |
44 | } | 44 | } |
45 | early_param("nopat", nopat); | 45 | early_param("nopat", nopat); |
46 | #else | ||
47 | static inline void pat_disable(const char *reason) | ||
48 | { | ||
49 | (void)reason; | ||
50 | } | ||
46 | #endif | 51 | #endif |
47 | 52 | ||
48 | 53 | ||
@@ -79,16 +84,20 @@ void pat_init(void) | |||
79 | if (!pat_enabled) | 84 | if (!pat_enabled) |
80 | return; | 85 | return; |
81 | 86 | ||
82 | /* Paranoia check. */ | 87 | if (!cpu_has_pat) { |
83 | if (!cpu_has_pat && boot_pat_state) { | 88 | if (!boot_pat_state) { |
84 | /* | 89 | pat_disable("PAT not supported by CPU."); |
85 | * If this happens we are on a secondary CPU, but | 90 | return; |
86 | * switched to PAT on the boot CPU. We have no way to | 91 | } else { |
87 | * undo PAT. | 92 | /* |
88 | */ | 93 | * If this happens we are on a secondary CPU, but |
89 | printk(KERN_ERR "PAT enabled, " | 94 | * switched to PAT on the boot CPU. We have no way to |
90 | "but not supported by secondary CPU\n"); | 95 | * undo PAT. |
91 | BUG(); | 96 | */ |
97 | printk(KERN_ERR "PAT enabled, " | ||
98 | "but not supported by secondary CPU\n"); | ||
99 | BUG(); | ||
100 | } | ||
92 | } | 101 | } |
93 | 102 | ||
94 | /* Set PWT to Write-Combining. All other bits stay the same */ | 103 | /* Set PWT to Write-Combining. All other bits stay the same */ |
@@ -626,6 +635,33 @@ void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot) | |||
626 | } | 635 | } |
627 | 636 | ||
628 | /* | 637 | /* |
638 | * Change the memory type for the physial address range in kernel identity | ||
639 | * mapping space if that range is a part of identity map. | ||
640 | */ | ||
641 | int kernel_map_sync_memtype(u64 base, unsigned long size, unsigned long flags) | ||
642 | { | ||
643 | unsigned long id_sz; | ||
644 | |||
645 | if (!pat_enabled || base >= __pa(high_memory)) | ||
646 | return 0; | ||
647 | |||
648 | id_sz = (__pa(high_memory) < base + size) ? | ||
649 | __pa(high_memory) - base : | ||
650 | size; | ||
651 | |||
652 | if (ioremap_change_attr((unsigned long)__va(base), id_sz, flags) < 0) { | ||
653 | printk(KERN_INFO | ||
654 | "%s:%d ioremap_change_attr failed %s " | ||
655 | "for %Lx-%Lx\n", | ||
656 | current->comm, current->pid, | ||
657 | cattr_name(flags), | ||
658 | base, (unsigned long long)(base + size)); | ||
659 | return -EINVAL; | ||
660 | } | ||
661 | return 0; | ||
662 | } | ||
663 | |||
664 | /* | ||
629 | * Internal interface to reserve a range of physical memory with prot. | 665 | * Internal interface to reserve a range of physical memory with prot. |
630 | * Reserved non RAM regions only and after successful reserve_memtype, | 666 | * Reserved non RAM regions only and after successful reserve_memtype, |
631 | * this func also keeps identity mapping (if any) in sync with this new prot. | 667 | * this func also keeps identity mapping (if any) in sync with this new prot. |
@@ -634,7 +670,7 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, | |||
634 | int strict_prot) | 670 | int strict_prot) |
635 | { | 671 | { |
636 | int is_ram = 0; | 672 | int is_ram = 0; |
637 | int id_sz, ret; | 673 | int ret; |
638 | unsigned long flags; | 674 | unsigned long flags; |
639 | unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK); | 675 | unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK); |
640 | 676 | ||
@@ -671,23 +707,8 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, | |||
671 | flags); | 707 | flags); |
672 | } | 708 | } |
673 | 709 | ||
674 | /* Need to keep identity mapping in sync */ | 710 | if (kernel_map_sync_memtype(paddr, size, flags) < 0) { |
675 | if (paddr >= __pa(high_memory)) | ||
676 | return 0; | ||
677 | |||
678 | id_sz = (__pa(high_memory) < paddr + size) ? | ||
679 | __pa(high_memory) - paddr : | ||
680 | size; | ||
681 | |||
682 | if (ioremap_change_attr((unsigned long)__va(paddr), id_sz, flags) < 0) { | ||
683 | free_memtype(paddr, paddr + size); | 711 | free_memtype(paddr, paddr + size); |
684 | printk(KERN_ERR | ||
685 | "%s:%d reserve_pfn_range ioremap_change_attr failed %s " | ||
686 | "for %Lx-%Lx\n", | ||
687 | current->comm, current->pid, | ||
688 | cattr_name(flags), | ||
689 | (unsigned long long)paddr, | ||
690 | (unsigned long long)(paddr + size)); | ||
691 | return -EINVAL; | 712 | return -EINVAL; |
692 | } | 713 | } |
693 | return 0; | 714 | return 0; |
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c index 86f2ffc43c3d..5b7c7c8464fe 100644 --- a/arch/x86/mm/pgtable.c +++ b/arch/x86/mm/pgtable.c | |||
@@ -313,6 +313,24 @@ int ptep_clear_flush_young(struct vm_area_struct *vma, | |||
313 | return young; | 313 | return young; |
314 | } | 314 | } |
315 | 315 | ||
316 | /** | ||
317 | * reserve_top_address - reserves a hole in the top of kernel address space | ||
318 | * @reserve - size of hole to reserve | ||
319 | * | ||
320 | * Can be used to relocate the fixmap area and poke a hole in the top | ||
321 | * of kernel address space to make room for a hypervisor. | ||
322 | */ | ||
323 | void __init reserve_top_address(unsigned long reserve) | ||
324 | { | ||
325 | #ifdef CONFIG_X86_32 | ||
326 | BUG_ON(fixmaps_set > 0); | ||
327 | printk(KERN_INFO "Reserving virtual address space above 0x%08x\n", | ||
328 | (int)-reserve); | ||
329 | __FIXADDR_TOP = -reserve - PAGE_SIZE; | ||
330 | __VMALLOC_RESERVE += reserve; | ||
331 | #endif | ||
332 | } | ||
333 | |||
316 | int fixmaps_set; | 334 | int fixmaps_set; |
317 | 335 | ||
318 | void __native_set_fixmap(enum fixed_addresses idx, pte_t pte) | 336 | void __native_set_fixmap(enum fixed_addresses idx, pte_t pte) |
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c index 0951db9ee519..f2e477c91c1b 100644 --- a/arch/x86/mm/pgtable_32.c +++ b/arch/x86/mm/pgtable_32.c | |||
@@ -20,6 +20,8 @@ | |||
20 | #include <asm/tlb.h> | 20 | #include <asm/tlb.h> |
21 | #include <asm/tlbflush.h> | 21 | #include <asm/tlbflush.h> |
22 | 22 | ||
23 | unsigned int __VMALLOC_RESERVE = 128 << 20; | ||
24 | |||
23 | /* | 25 | /* |
24 | * Associate a virtual page frame with a given physical page frame | 26 | * Associate a virtual page frame with a given physical page frame |
25 | * and protection flags for that frame. | 27 | * and protection flags for that frame. |
@@ -97,22 +99,6 @@ void set_pmd_pfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags) | |||
97 | unsigned long __FIXADDR_TOP = 0xfffff000; | 99 | unsigned long __FIXADDR_TOP = 0xfffff000; |
98 | EXPORT_SYMBOL(__FIXADDR_TOP); | 100 | EXPORT_SYMBOL(__FIXADDR_TOP); |
99 | 101 | ||
100 | /** | ||
101 | * reserve_top_address - reserves a hole in the top of kernel address space | ||
102 | * @reserve - size of hole to reserve | ||
103 | * | ||
104 | * Can be used to relocate the fixmap area and poke a hole in the top | ||
105 | * of kernel address space to make room for a hypervisor. | ||
106 | */ | ||
107 | void __init reserve_top_address(unsigned long reserve) | ||
108 | { | ||
109 | BUG_ON(fixmaps_set > 0); | ||
110 | printk(KERN_INFO "Reserving virtual address space above 0x%08x\n", | ||
111 | (int)-reserve); | ||
112 | __FIXADDR_TOP = -reserve - PAGE_SIZE; | ||
113 | __VMALLOC_RESERVE += reserve; | ||
114 | } | ||
115 | |||
116 | /* | 102 | /* |
117 | * vmalloc=size forces the vmalloc area to be exactly 'size' | 103 | * vmalloc=size forces the vmalloc area to be exactly 'size' |
118 | * bytes. This can be used to increase (or decrease) the | 104 | * bytes. This can be used to increase (or decrease) the |
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c index 09737c8af074..574c8bc95ef0 100644 --- a/arch/x86/mm/srat_64.c +++ b/arch/x86/mm/srat_64.c | |||
@@ -20,7 +20,8 @@ | |||
20 | #include <asm/proto.h> | 20 | #include <asm/proto.h> |
21 | #include <asm/numa.h> | 21 | #include <asm/numa.h> |
22 | #include <asm/e820.h> | 22 | #include <asm/e820.h> |
23 | #include <asm/genapic.h> | 23 | #include <asm/apic.h> |
24 | #include <asm/uv/uv.h> | ||
24 | 25 | ||
25 | int acpi_numa __initdata; | 26 | int acpi_numa __initdata; |
26 | 27 | ||
diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/mm/tlb.c index f8be6f1d2e48..a654d59e4483 100644 --- a/arch/x86/kernel/tlb_64.c +++ b/arch/x86/mm/tlb.c | |||
@@ -1,24 +1,19 @@ | |||
1 | #include <linux/init.h> | 1 | #include <linux/init.h> |
2 | 2 | ||
3 | #include <linux/mm.h> | 3 | #include <linux/mm.h> |
4 | #include <linux/delay.h> | ||
5 | #include <linux/spinlock.h> | 4 | #include <linux/spinlock.h> |
6 | #include <linux/smp.h> | 5 | #include <linux/smp.h> |
7 | #include <linux/kernel_stat.h> | ||
8 | #include <linux/mc146818rtc.h> | ||
9 | #include <linux/interrupt.h> | 6 | #include <linux/interrupt.h> |
7 | #include <linux/module.h> | ||
10 | 8 | ||
11 | #include <asm/mtrr.h> | ||
12 | #include <asm/pgalloc.h> | ||
13 | #include <asm/tlbflush.h> | 9 | #include <asm/tlbflush.h> |
14 | #include <asm/mmu_context.h> | 10 | #include <asm/mmu_context.h> |
15 | #include <asm/proto.h> | 11 | #include <asm/apic.h> |
16 | #include <asm/apicdef.h> | 12 | #include <asm/uv/uv.h> |
17 | #include <asm/idle.h> | 13 | |
18 | #include <asm/uv/uv_hub.h> | 14 | DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) |
19 | #include <asm/uv/uv_bau.h> | 15 | = { &init_mm, 0, }; |
20 | 16 | ||
21 | #include <mach_ipi.h> | ||
22 | /* | 17 | /* |
23 | * Smarter SMP flushing macros. | 18 | * Smarter SMP flushing macros. |
24 | * c/o Linus Torvalds. | 19 | * c/o Linus Torvalds. |
@@ -33,7 +28,7 @@ | |||
33 | * To avoid global state use 8 different call vectors. | 28 | * To avoid global state use 8 different call vectors. |
34 | * Each CPU uses a specific vector to trigger flushes on other | 29 | * Each CPU uses a specific vector to trigger flushes on other |
35 | * CPUs. Depending on the received vector the target CPUs look into | 30 | * CPUs. Depending on the received vector the target CPUs look into |
36 | * the right per cpu variable for the flush data. | 31 | * the right array slot for the flush data. |
37 | * | 32 | * |
38 | * With more than 8 CPUs they are hashed to the 8 available | 33 | * With more than 8 CPUs they are hashed to the 8 available |
39 | * vectors. The limited global vector space forces us to this right now. | 34 | * vectors. The limited global vector space forces us to this right now. |
@@ -43,18 +38,18 @@ | |||
43 | 38 | ||
44 | union smp_flush_state { | 39 | union smp_flush_state { |
45 | struct { | 40 | struct { |
46 | cpumask_t flush_cpumask; | ||
47 | struct mm_struct *flush_mm; | 41 | struct mm_struct *flush_mm; |
48 | unsigned long flush_va; | 42 | unsigned long flush_va; |
49 | spinlock_t tlbstate_lock; | 43 | spinlock_t tlbstate_lock; |
44 | DECLARE_BITMAP(flush_cpumask, NR_CPUS); | ||
50 | }; | 45 | }; |
51 | char pad[SMP_CACHE_BYTES]; | 46 | char pad[CONFIG_X86_INTERNODE_CACHE_BYTES]; |
52 | } ____cacheline_aligned; | 47 | } ____cacheline_internodealigned_in_smp; |
53 | 48 | ||
54 | /* State is put into the per CPU data section, but padded | 49 | /* State is put into the per CPU data section, but padded |
55 | to a full cache line because other CPUs can access it and we don't | 50 | to a full cache line because other CPUs can access it and we don't |
56 | want false sharing in the per cpu data segment. */ | 51 | want false sharing in the per cpu data segment. */ |
57 | static DEFINE_PER_CPU(union smp_flush_state, flush_state); | 52 | static union smp_flush_state flush_state[NUM_INVALIDATE_TLB_VECTORS]; |
58 | 53 | ||
59 | /* | 54 | /* |
60 | * We cannot call mmdrop() because we are in interrupt context, | 55 | * We cannot call mmdrop() because we are in interrupt context, |
@@ -62,9 +57,9 @@ static DEFINE_PER_CPU(union smp_flush_state, flush_state); | |||
62 | */ | 57 | */ |
63 | void leave_mm(int cpu) | 58 | void leave_mm(int cpu) |
64 | { | 59 | { |
65 | if (read_pda(mmu_state) == TLBSTATE_OK) | 60 | if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) |
66 | BUG(); | 61 | BUG(); |
67 | cpu_clear(cpu, read_pda(active_mm)->cpu_vm_mask); | 62 | cpu_clear(cpu, percpu_read(cpu_tlbstate.active_mm)->cpu_vm_mask); |
68 | load_cr3(swapper_pg_dir); | 63 | load_cr3(swapper_pg_dir); |
69 | } | 64 | } |
70 | EXPORT_SYMBOL_GPL(leave_mm); | 65 | EXPORT_SYMBOL_GPL(leave_mm); |
@@ -117,10 +112,20 @@ EXPORT_SYMBOL_GPL(leave_mm); | |||
117 | * Interrupts are disabled. | 112 | * Interrupts are disabled. |
118 | */ | 113 | */ |
119 | 114 | ||
120 | asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) | 115 | /* |
116 | * FIXME: use of asmlinkage is not consistent. On x86_64 it's noop | ||
117 | * but still used for documentation purpose but the usage is slightly | ||
118 | * inconsistent. On x86_32, asmlinkage is regparm(0) but interrupt | ||
119 | * entry calls in with the first parameter in %eax. Maybe define | ||
120 | * intrlinkage? | ||
121 | */ | ||
122 | #ifdef CONFIG_X86_64 | ||
123 | asmlinkage | ||
124 | #endif | ||
125 | void smp_invalidate_interrupt(struct pt_regs *regs) | ||
121 | { | 126 | { |
122 | int cpu; | 127 | unsigned int cpu; |
123 | int sender; | 128 | unsigned int sender; |
124 | union smp_flush_state *f; | 129 | union smp_flush_state *f; |
125 | 130 | ||
126 | cpu = smp_processor_id(); | 131 | cpu = smp_processor_id(); |
@@ -129,9 +134,9 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) | |||
129 | * Use that to determine where the sender put the data. | 134 | * Use that to determine where the sender put the data. |
130 | */ | 135 | */ |
131 | sender = ~regs->orig_ax - INVALIDATE_TLB_VECTOR_START; | 136 | sender = ~regs->orig_ax - INVALIDATE_TLB_VECTOR_START; |
132 | f = &per_cpu(flush_state, sender); | 137 | f = &flush_state[sender]; |
133 | 138 | ||
134 | if (!cpu_isset(cpu, f->flush_cpumask)) | 139 | if (!cpumask_test_cpu(cpu, to_cpumask(f->flush_cpumask))) |
135 | goto out; | 140 | goto out; |
136 | /* | 141 | /* |
137 | * This was a BUG() but until someone can quote me the | 142 | * This was a BUG() but until someone can quote me the |
@@ -142,8 +147,8 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) | |||
142 | * BUG(); | 147 | * BUG(); |
143 | */ | 148 | */ |
144 | 149 | ||
145 | if (f->flush_mm == read_pda(active_mm)) { | 150 | if (f->flush_mm == percpu_read(cpu_tlbstate.active_mm)) { |
146 | if (read_pda(mmu_state) == TLBSTATE_OK) { | 151 | if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) { |
147 | if (f->flush_va == TLB_FLUSH_ALL) | 152 | if (f->flush_va == TLB_FLUSH_ALL) |
148 | local_flush_tlb(); | 153 | local_flush_tlb(); |
149 | else | 154 | else |
@@ -153,23 +158,21 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) | |||
153 | } | 158 | } |
154 | out: | 159 | out: |
155 | ack_APIC_irq(); | 160 | ack_APIC_irq(); |
156 | cpu_clear(cpu, f->flush_cpumask); | 161 | smp_mb__before_clear_bit(); |
162 | cpumask_clear_cpu(cpu, to_cpumask(f->flush_cpumask)); | ||
163 | smp_mb__after_clear_bit(); | ||
157 | inc_irq_stat(irq_tlb_count); | 164 | inc_irq_stat(irq_tlb_count); |
158 | } | 165 | } |
159 | 166 | ||
160 | void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, | 167 | static void flush_tlb_others_ipi(const struct cpumask *cpumask, |
161 | unsigned long va) | 168 | struct mm_struct *mm, unsigned long va) |
162 | { | 169 | { |
163 | int sender; | 170 | unsigned int sender; |
164 | union smp_flush_state *f; | 171 | union smp_flush_state *f; |
165 | cpumask_t cpumask = *cpumaskp; | ||
166 | |||
167 | if (is_uv_system() && uv_flush_tlb_others(&cpumask, mm, va)) | ||
168 | return; | ||
169 | 172 | ||
170 | /* Caller has disabled preemption */ | 173 | /* Caller has disabled preemption */ |
171 | sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS; | 174 | sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS; |
172 | f = &per_cpu(flush_state, sender); | 175 | f = &flush_state[sender]; |
173 | 176 | ||
174 | /* | 177 | /* |
175 | * Could avoid this lock when | 178 | * Could avoid this lock when |
@@ -180,7 +183,8 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, | |||
180 | 183 | ||
181 | f->flush_mm = mm; | 184 | f->flush_mm = mm; |
182 | f->flush_va = va; | 185 | f->flush_va = va; |
183 | cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask); | 186 | cpumask_andnot(to_cpumask(f->flush_cpumask), |
187 | cpumask, cpumask_of(smp_processor_id())); | ||
184 | 188 | ||
185 | /* | 189 | /* |
186 | * Make the above memory operations globally visible before | 190 | * Make the above memory operations globally visible before |
@@ -191,9 +195,10 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, | |||
191 | * We have to send the IPI only to | 195 | * We have to send the IPI only to |
192 | * CPUs affected. | 196 | * CPUs affected. |
193 | */ | 197 | */ |
194 | send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR_START + sender); | 198 | apic->send_IPI_mask(to_cpumask(f->flush_cpumask), |
199 | INVALIDATE_TLB_VECTOR_START + sender); | ||
195 | 200 | ||
196 | while (!cpus_empty(f->flush_cpumask)) | 201 | while (!cpumask_empty(to_cpumask(f->flush_cpumask))) |
197 | cpu_relax(); | 202 | cpu_relax(); |
198 | 203 | ||
199 | f->flush_mm = NULL; | 204 | f->flush_mm = NULL; |
@@ -201,12 +206,28 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, | |||
201 | spin_unlock(&f->tlbstate_lock); | 206 | spin_unlock(&f->tlbstate_lock); |
202 | } | 207 | } |
203 | 208 | ||
209 | void native_flush_tlb_others(const struct cpumask *cpumask, | ||
210 | struct mm_struct *mm, unsigned long va) | ||
211 | { | ||
212 | if (is_uv_system()) { | ||
213 | unsigned int cpu; | ||
214 | |||
215 | cpu = get_cpu(); | ||
216 | cpumask = uv_flush_tlb_others(cpumask, mm, va, cpu); | ||
217 | if (cpumask) | ||
218 | flush_tlb_others_ipi(cpumask, mm, va); | ||
219 | put_cpu(); | ||
220 | return; | ||
221 | } | ||
222 | flush_tlb_others_ipi(cpumask, mm, va); | ||
223 | } | ||
224 | |||
204 | static int __cpuinit init_smp_flush(void) | 225 | static int __cpuinit init_smp_flush(void) |
205 | { | 226 | { |
206 | int i; | 227 | int i; |
207 | 228 | ||
208 | for_each_possible_cpu(i) | 229 | for (i = 0; i < ARRAY_SIZE(flush_state); i++) |
209 | spin_lock_init(&per_cpu(flush_state, i).tlbstate_lock); | 230 | spin_lock_init(&flush_state[i].tlbstate_lock); |
210 | 231 | ||
211 | return 0; | 232 | return 0; |
212 | } | 233 | } |
@@ -215,25 +236,18 @@ core_initcall(init_smp_flush); | |||
215 | void flush_tlb_current_task(void) | 236 | void flush_tlb_current_task(void) |
216 | { | 237 | { |
217 | struct mm_struct *mm = current->mm; | 238 | struct mm_struct *mm = current->mm; |
218 | cpumask_t cpu_mask; | ||
219 | 239 | ||
220 | preempt_disable(); | 240 | preempt_disable(); |
221 | cpu_mask = mm->cpu_vm_mask; | ||
222 | cpu_clear(smp_processor_id(), cpu_mask); | ||
223 | 241 | ||
224 | local_flush_tlb(); | 242 | local_flush_tlb(); |
225 | if (!cpus_empty(cpu_mask)) | 243 | if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids) |
226 | flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); | 244 | flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL); |
227 | preempt_enable(); | 245 | preempt_enable(); |
228 | } | 246 | } |
229 | 247 | ||
230 | void flush_tlb_mm(struct mm_struct *mm) | 248 | void flush_tlb_mm(struct mm_struct *mm) |
231 | { | 249 | { |
232 | cpumask_t cpu_mask; | ||
233 | |||
234 | preempt_disable(); | 250 | preempt_disable(); |
235 | cpu_mask = mm->cpu_vm_mask; | ||
236 | cpu_clear(smp_processor_id(), cpu_mask); | ||
237 | 251 | ||
238 | if (current->active_mm == mm) { | 252 | if (current->active_mm == mm) { |
239 | if (current->mm) | 253 | if (current->mm) |
@@ -241,8 +255,8 @@ void flush_tlb_mm(struct mm_struct *mm) | |||
241 | else | 255 | else |
242 | leave_mm(smp_processor_id()); | 256 | leave_mm(smp_processor_id()); |
243 | } | 257 | } |
244 | if (!cpus_empty(cpu_mask)) | 258 | if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids) |
245 | flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); | 259 | flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL); |
246 | 260 | ||
247 | preempt_enable(); | 261 | preempt_enable(); |
248 | } | 262 | } |
@@ -250,11 +264,8 @@ void flush_tlb_mm(struct mm_struct *mm) | |||
250 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long va) | 264 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long va) |
251 | { | 265 | { |
252 | struct mm_struct *mm = vma->vm_mm; | 266 | struct mm_struct *mm = vma->vm_mm; |
253 | cpumask_t cpu_mask; | ||
254 | 267 | ||
255 | preempt_disable(); | 268 | preempt_disable(); |
256 | cpu_mask = mm->cpu_vm_mask; | ||
257 | cpu_clear(smp_processor_id(), cpu_mask); | ||
258 | 269 | ||
259 | if (current->active_mm == mm) { | 270 | if (current->active_mm == mm) { |
260 | if (current->mm) | 271 | if (current->mm) |
@@ -263,8 +274,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long va) | |||
263 | leave_mm(smp_processor_id()); | 274 | leave_mm(smp_processor_id()); |
264 | } | 275 | } |
265 | 276 | ||
266 | if (!cpus_empty(cpu_mask)) | 277 | if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids) |
267 | flush_tlb_others(cpu_mask, mm, va); | 278 | flush_tlb_others(&mm->cpu_vm_mask, mm, va); |
268 | 279 | ||
269 | preempt_enable(); | 280 | preempt_enable(); |
270 | } | 281 | } |
@@ -274,7 +285,7 @@ static void do_flush_tlb_all(void *info) | |||
274 | unsigned long cpu = smp_processor_id(); | 285 | unsigned long cpu = smp_processor_id(); |
275 | 286 | ||
276 | __flush_tlb_all(); | 287 | __flush_tlb_all(); |
277 | if (read_pda(mmu_state) == TLBSTATE_LAZY) | 288 | if (percpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY) |
278 | leave_mm(cpu); | 289 | leave_mm(cpu); |
279 | } | 290 | } |
280 | 291 | ||
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c index 2089354968a2..8eb295e116f6 100644 --- a/arch/x86/pci/numaq_32.c +++ b/arch/x86/pci/numaq_32.c | |||
@@ -5,7 +5,7 @@ | |||
5 | #include <linux/pci.h> | 5 | #include <linux/pci.h> |
6 | #include <linux/init.h> | 6 | #include <linux/init.h> |
7 | #include <linux/nodemask.h> | 7 | #include <linux/nodemask.h> |
8 | #include <mach_apic.h> | 8 | #include <asm/apic.h> |
9 | #include <asm/mpspec.h> | 9 | #include <asm/mpspec.h> |
10 | #include <asm/pci_x86.h> | 10 | #include <asm/pci_x86.h> |
11 | 11 | ||
@@ -18,10 +18,6 @@ | |||
18 | 18 | ||
19 | #define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local]) | 19 | #define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local]) |
20 | 20 | ||
21 | /* Where the IO area was mapped on multiquad, always 0 otherwise */ | ||
22 | void *xquad_portio; | ||
23 | EXPORT_SYMBOL(xquad_portio); | ||
24 | |||
25 | #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port) | 21 | #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port) |
26 | 22 | ||
27 | #define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \ | 23 | #define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \ |
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c index b82cae970dfd..1c975cc9839e 100644 --- a/arch/x86/pci/pcbios.c +++ b/arch/x86/pci/pcbios.c | |||
@@ -7,7 +7,7 @@ | |||
7 | #include <linux/module.h> | 7 | #include <linux/module.h> |
8 | #include <linux/uaccess.h> | 8 | #include <linux/uaccess.h> |
9 | #include <asm/pci_x86.h> | 9 | #include <asm/pci_x86.h> |
10 | #include <asm/mach-default/pci-functions.h> | 10 | #include <asm/pci-functions.h> |
11 | 11 | ||
12 | /* BIOS32 signature: "_32_" */ | 12 | /* BIOS32 signature: "_32_" */ |
13 | #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24)) | 13 | #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24)) |
diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S index d1e9b53f9d33..b641388d8286 100644 --- a/arch/x86/power/hibernate_asm_32.S +++ b/arch/x86/power/hibernate_asm_32.S | |||
@@ -8,7 +8,7 @@ | |||
8 | 8 | ||
9 | #include <linux/linkage.h> | 9 | #include <linux/linkage.h> |
10 | #include <asm/segment.h> | 10 | #include <asm/segment.h> |
11 | #include <asm/page.h> | 11 | #include <asm/page_types.h> |
12 | #include <asm/asm-offsets.h> | 12 | #include <asm/asm-offsets.h> |
13 | #include <asm/processor-flags.h> | 13 | #include <asm/processor-flags.h> |
14 | 14 | ||
diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S index 000415947d93..9356547d8c01 100644 --- a/arch/x86/power/hibernate_asm_64.S +++ b/arch/x86/power/hibernate_asm_64.S | |||
@@ -18,7 +18,7 @@ | |||
18 | .text | 18 | .text |
19 | #include <linux/linkage.h> | 19 | #include <linux/linkage.h> |
20 | #include <asm/segment.h> | 20 | #include <asm/segment.h> |
21 | #include <asm/page.h> | 21 | #include <asm/page_types.h> |
22 | #include <asm/asm-offsets.h> | 22 | #include <asm/asm-offsets.h> |
23 | #include <asm/processor-flags.h> | 23 | #include <asm/processor-flags.h> |
24 | 24 | ||
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile index 4d6ef0a336d6..16a9020c8f11 100644 --- a/arch/x86/vdso/Makefile +++ b/arch/x86/vdso/Makefile | |||
@@ -38,7 +38,7 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE | |||
38 | $(call if_changed,objcopy) | 38 | $(call if_changed,objcopy) |
39 | 39 | ||
40 | CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \ | 40 | CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \ |
41 | $(filter -g%,$(KBUILD_CFLAGS)) | 41 | $(filter -g%,$(KBUILD_CFLAGS)) $(call cc-option, -fno-stack-protector) |
42 | 42 | ||
43 | $(vobjs): KBUILD_CFLAGS += $(CFL) | 43 | $(vobjs): KBUILD_CFLAGS += $(CFL) |
44 | 44 | ||
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c index 9c98cc6ba978..7133cdf9098b 100644 --- a/arch/x86/vdso/vma.c +++ b/arch/x86/vdso/vma.c | |||
@@ -85,8 +85,8 @@ static unsigned long vdso_addr(unsigned long start, unsigned len) | |||
85 | unsigned long addr, end; | 85 | unsigned long addr, end; |
86 | unsigned offset; | 86 | unsigned offset; |
87 | end = (start + PMD_SIZE - 1) & PMD_MASK; | 87 | end = (start + PMD_SIZE - 1) & PMD_MASK; |
88 | if (end >= TASK_SIZE64) | 88 | if (end >= TASK_SIZE_MAX) |
89 | end = TASK_SIZE64; | 89 | end = TASK_SIZE_MAX; |
90 | end -= len; | 90 | end -= len; |
91 | /* This loses some more bits than a modulo, but is cheaper */ | 91 | /* This loses some more bits than a modulo, but is cheaper */ |
92 | offset = get_random_int() & (PTRS_PER_PTE - 1); | 92 | offset = get_random_int() & (PTRS_PER_PTE - 1); |
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig index 87b9ab166423..b83e119fbeb0 100644 --- a/arch/x86/xen/Kconfig +++ b/arch/x86/xen/Kconfig | |||
@@ -6,7 +6,7 @@ config XEN | |||
6 | bool "Xen guest support" | 6 | bool "Xen guest support" |
7 | select PARAVIRT | 7 | select PARAVIRT |
8 | select PARAVIRT_CLOCK | 8 | select PARAVIRT_CLOCK |
9 | depends on X86_64 || (X86_32 && X86_PAE && !(X86_VISWS || X86_VOYAGER)) | 9 | depends on X86_64 || (X86_32 && X86_PAE && !X86_VISWS) |
10 | depends on X86_CMPXCHG && X86_TSC | 10 | depends on X86_CMPXCHG && X86_TSC |
11 | help | 11 | help |
12 | This is the Linux Xen port. Enabling this will allow the | 12 | This is the Linux Xen port. Enabling this will allow the |
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile index 6dcefba7836f..3b767d03fd6a 100644 --- a/arch/x86/xen/Makefile +++ b/arch/x86/xen/Makefile | |||
@@ -6,7 +6,8 @@ CFLAGS_REMOVE_irq.o = -pg | |||
6 | endif | 6 | endif |
7 | 7 | ||
8 | obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ | 8 | obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ |
9 | time.o xen-asm_$(BITS).o grant-table.o suspend.o | 9 | time.o xen-asm.o xen-asm_$(BITS).o \ |
10 | grant-table.o suspend.o | ||
10 | 11 | ||
11 | obj-$(CONFIG_SMP) += smp.o spinlock.o | 12 | obj-$(CONFIG_SMP) += smp.o spinlock.o |
12 | obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o \ No newline at end of file | 13 | obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o \ No newline at end of file |
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index b58e96338149..82cd39a6cbd3 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
@@ -61,40 +61,13 @@ DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |||
61 | enum xen_domain_type xen_domain_type = XEN_NATIVE; | 61 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
62 | EXPORT_SYMBOL_GPL(xen_domain_type); | 62 | EXPORT_SYMBOL_GPL(xen_domain_type); |
63 | 63 | ||
64 | /* | ||
65 | * Identity map, in addition to plain kernel map. This needs to be | ||
66 | * large enough to allocate page table pages to allocate the rest. | ||
67 | * Each page can map 2MB. | ||
68 | */ | ||
69 | static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss; | ||
70 | |||
71 | #ifdef CONFIG_X86_64 | ||
72 | /* l3 pud for userspace vsyscall mapping */ | ||
73 | static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; | ||
74 | #endif /* CONFIG_X86_64 */ | ||
75 | |||
76 | /* | ||
77 | * Note about cr3 (pagetable base) values: | ||
78 | * | ||
79 | * xen_cr3 contains the current logical cr3 value; it contains the | ||
80 | * last set cr3. This may not be the current effective cr3, because | ||
81 | * its update may be being lazily deferred. However, a vcpu looking | ||
82 | * at its own cr3 can use this value knowing that it everything will | ||
83 | * be self-consistent. | ||
84 | * | ||
85 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | ||
86 | * hypercall to set the vcpu cr3 is complete (so it may be a little | ||
87 | * out of date, but it will never be set early). If one vcpu is | ||
88 | * looking at another vcpu's cr3 value, it should use this variable. | ||
89 | */ | ||
90 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | ||
91 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | ||
92 | |||
93 | struct start_info *xen_start_info; | 64 | struct start_info *xen_start_info; |
94 | EXPORT_SYMBOL_GPL(xen_start_info); | 65 | EXPORT_SYMBOL_GPL(xen_start_info); |
95 | 66 | ||
96 | struct shared_info xen_dummy_shared_info; | 67 | struct shared_info xen_dummy_shared_info; |
97 | 68 | ||
69 | void *xen_initial_gdt; | ||
70 | |||
98 | /* | 71 | /* |
99 | * Point at some empty memory to start with. We map the real shared_info | 72 | * Point at some empty memory to start with. We map the real shared_info |
100 | * page as soon as fixmap is up and running. | 73 | * page as soon as fixmap is up and running. |
@@ -114,14 +87,7 @@ struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; | |||
114 | * | 87 | * |
115 | * 0: not available, 1: available | 88 | * 0: not available, 1: available |
116 | */ | 89 | */ |
117 | static int have_vcpu_info_placement = | 90 | static int have_vcpu_info_placement = 1; |
118 | #ifdef CONFIG_X86_32 | ||
119 | 1 | ||
120 | #else | ||
121 | 0 | ||
122 | #endif | ||
123 | ; | ||
124 | |||
125 | 91 | ||
126 | static void xen_vcpu_setup(int cpu) | 92 | static void xen_vcpu_setup(int cpu) |
127 | { | 93 | { |
@@ -137,7 +103,7 @@ static void xen_vcpu_setup(int cpu) | |||
137 | 103 | ||
138 | vcpup = &per_cpu(xen_vcpu_info, cpu); | 104 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
139 | 105 | ||
140 | info.mfn = virt_to_mfn(vcpup); | 106 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
141 | info.offset = offset_in_page(vcpup); | 107 | info.offset = offset_in_page(vcpup); |
142 | 108 | ||
143 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", | 109 | printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", |
@@ -237,7 +203,7 @@ static unsigned long xen_get_debugreg(int reg) | |||
237 | return HYPERVISOR_get_debugreg(reg); | 203 | return HYPERVISOR_get_debugreg(reg); |
238 | } | 204 | } |
239 | 205 | ||
240 | static void xen_leave_lazy(void) | 206 | void xen_leave_lazy(void) |
241 | { | 207 | { |
242 | paravirt_leave_lazy(paravirt_get_lazy_mode()); | 208 | paravirt_leave_lazy(paravirt_get_lazy_mode()); |
243 | xen_mc_flush(); | 209 | xen_mc_flush(); |
@@ -335,8 +301,10 @@ static void xen_load_gdt(const struct desc_ptr *dtr) | |||
335 | frames = mcs.args; | 301 | frames = mcs.args; |
336 | 302 | ||
337 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | 303 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
338 | frames[f] = virt_to_mfn(va); | 304 | frames[f] = arbitrary_virt_to_mfn((void *)va); |
305 | |||
339 | make_lowmem_page_readonly((void *)va); | 306 | make_lowmem_page_readonly((void *)va); |
307 | make_lowmem_page_readonly(mfn_to_virt(frames[f])); | ||
340 | } | 308 | } |
341 | 309 | ||
342 | MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct)); | 310 | MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct)); |
@@ -348,7 +316,7 @@ static void load_TLS_descriptor(struct thread_struct *t, | |||
348 | unsigned int cpu, unsigned int i) | 316 | unsigned int cpu, unsigned int i) |
349 | { | 317 | { |
350 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | 318 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); |
351 | xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | 319 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
352 | struct multicall_space mc = __xen_mc_entry(0); | 320 | struct multicall_space mc = __xen_mc_entry(0); |
353 | 321 | ||
354 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | 322 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); |
@@ -357,13 +325,14 @@ static void load_TLS_descriptor(struct thread_struct *t, | |||
357 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | 325 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) |
358 | { | 326 | { |
359 | /* | 327 | /* |
360 | * XXX sleazy hack: If we're being called in a lazy-cpu zone, | 328 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
361 | * it means we're in a context switch, and %gs has just been | 329 | * and lazy gs handling is enabled, it means we're in a |
362 | * saved. This means we can zero it out to prevent faults on | 330 | * context switch, and %gs has just been saved. This means we |
363 | * exit from the hypervisor if the next process has no %gs. | 331 | * can zero it out to prevent faults on exit from the |
364 | * Either way, it has been saved, and the new value will get | 332 | * hypervisor if the next process has no %gs. Either way, it |
365 | * loaded properly. This will go away as soon as Xen has been | 333 | * has been saved, and the new value will get loaded properly. |
366 | * modified to not save/restore %gs for normal hypercalls. | 334 | * This will go away as soon as Xen has been modified to not |
335 | * save/restore %gs for normal hypercalls. | ||
367 | * | 336 | * |
368 | * On x86_64, this hack is not used for %gs, because gs points | 337 | * On x86_64, this hack is not used for %gs, because gs points |
369 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | 338 | * to KERNEL_GS_BASE (and uses it for PDA references), so we |
@@ -375,7 +344,7 @@ static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |||
375 | */ | 344 | */ |
376 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { | 345 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
377 | #ifdef CONFIG_X86_32 | 346 | #ifdef CONFIG_X86_32 |
378 | loadsegment(gs, 0); | 347 | lazy_load_gs(0); |
379 | #else | 348 | #else |
380 | loadsegment(fs, 0); | 349 | loadsegment(fs, 0); |
381 | #endif | 350 | #endif |
@@ -521,7 +490,7 @@ static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |||
521 | break; | 490 | break; |
522 | 491 | ||
523 | default: { | 492 | default: { |
524 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | 493 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
525 | 494 | ||
526 | xen_mc_flush(); | 495 | xen_mc_flush(); |
527 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | 496 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
@@ -587,94 +556,18 @@ static u32 xen_safe_apic_wait_icr_idle(void) | |||
587 | return 0; | 556 | return 0; |
588 | } | 557 | } |
589 | 558 | ||
590 | static struct apic_ops xen_basic_apic_ops = { | 559 | static void set_xen_basic_apic_ops(void) |
591 | .read = xen_apic_read, | ||
592 | .write = xen_apic_write, | ||
593 | .icr_read = xen_apic_icr_read, | ||
594 | .icr_write = xen_apic_icr_write, | ||
595 | .wait_icr_idle = xen_apic_wait_icr_idle, | ||
596 | .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle, | ||
597 | }; | ||
598 | |||
599 | #endif | ||
600 | |||
601 | static void xen_flush_tlb(void) | ||
602 | { | ||
603 | struct mmuext_op *op; | ||
604 | struct multicall_space mcs; | ||
605 | |||
606 | preempt_disable(); | ||
607 | |||
608 | mcs = xen_mc_entry(sizeof(*op)); | ||
609 | |||
610 | op = mcs.args; | ||
611 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | ||
612 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | ||
613 | |||
614 | xen_mc_issue(PARAVIRT_LAZY_MMU); | ||
615 | |||
616 | preempt_enable(); | ||
617 | } | ||
618 | |||
619 | static void xen_flush_tlb_single(unsigned long addr) | ||
620 | { | 560 | { |
621 | struct mmuext_op *op; | 561 | apic->read = xen_apic_read; |
622 | struct multicall_space mcs; | 562 | apic->write = xen_apic_write; |
623 | 563 | apic->icr_read = xen_apic_icr_read; | |
624 | preempt_disable(); | 564 | apic->icr_write = xen_apic_icr_write; |
625 | 565 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
626 | mcs = xen_mc_entry(sizeof(*op)); | 566 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; |
627 | op = mcs.args; | ||
628 | op->cmd = MMUEXT_INVLPG_LOCAL; | ||
629 | op->arg1.linear_addr = addr & PAGE_MASK; | ||
630 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | ||
631 | |||
632 | xen_mc_issue(PARAVIRT_LAZY_MMU); | ||
633 | |||
634 | preempt_enable(); | ||
635 | } | 567 | } |
636 | 568 | ||
637 | static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm, | 569 | #endif |
638 | unsigned long va) | ||
639 | { | ||
640 | struct { | ||
641 | struct mmuext_op op; | ||
642 | cpumask_t mask; | ||
643 | } *args; | ||
644 | cpumask_t cpumask = *cpus; | ||
645 | struct multicall_space mcs; | ||
646 | |||
647 | /* | ||
648 | * A couple of (to be removed) sanity checks: | ||
649 | * | ||
650 | * - current CPU must not be in mask | ||
651 | * - mask must exist :) | ||
652 | */ | ||
653 | BUG_ON(cpus_empty(cpumask)); | ||
654 | BUG_ON(cpu_isset(smp_processor_id(), cpumask)); | ||
655 | BUG_ON(!mm); | ||
656 | |||
657 | /* If a CPU which we ran on has gone down, OK. */ | ||
658 | cpus_and(cpumask, cpumask, cpu_online_map); | ||
659 | if (cpus_empty(cpumask)) | ||
660 | return; | ||
661 | |||
662 | mcs = xen_mc_entry(sizeof(*args)); | ||
663 | args = mcs.args; | ||
664 | args->mask = cpumask; | ||
665 | args->op.arg2.vcpumask = &args->mask; | ||
666 | |||
667 | if (va == TLB_FLUSH_ALL) { | ||
668 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; | ||
669 | } else { | ||
670 | args->op.cmd = MMUEXT_INVLPG_MULTI; | ||
671 | args->op.arg1.linear_addr = va; | ||
672 | } | ||
673 | |||
674 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); | ||
675 | 570 | ||
676 | xen_mc_issue(PARAVIRT_LAZY_MMU); | ||
677 | } | ||
678 | 571 | ||
679 | static void xen_clts(void) | 572 | static void xen_clts(void) |
680 | { | 573 | { |
@@ -700,21 +593,6 @@ static void xen_write_cr0(unsigned long cr0) | |||
700 | xen_mc_issue(PARAVIRT_LAZY_CPU); | 593 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
701 | } | 594 | } |
702 | 595 | ||
703 | static void xen_write_cr2(unsigned long cr2) | ||
704 | { | ||
705 | x86_read_percpu(xen_vcpu)->arch.cr2 = cr2; | ||
706 | } | ||
707 | |||
708 | static unsigned long xen_read_cr2(void) | ||
709 | { | ||
710 | return x86_read_percpu(xen_vcpu)->arch.cr2; | ||
711 | } | ||
712 | |||
713 | static unsigned long xen_read_cr2_direct(void) | ||
714 | { | ||
715 | return x86_read_percpu(xen_vcpu_info.arch.cr2); | ||
716 | } | ||
717 | |||
718 | static void xen_write_cr4(unsigned long cr4) | 596 | static void xen_write_cr4(unsigned long cr4) |
719 | { | 597 | { |
720 | cr4 &= ~X86_CR4_PGE; | 598 | cr4 &= ~X86_CR4_PGE; |
@@ -723,71 +601,6 @@ static void xen_write_cr4(unsigned long cr4) | |||
723 | native_write_cr4(cr4); | 601 | native_write_cr4(cr4); |
724 | } | 602 | } |
725 | 603 | ||
726 | static unsigned long xen_read_cr3(void) | ||
727 | { | ||
728 | return x86_read_percpu(xen_cr3); | ||
729 | } | ||
730 | |||
731 | static void set_current_cr3(void *v) | ||
732 | { | ||
733 | x86_write_percpu(xen_current_cr3, (unsigned long)v); | ||
734 | } | ||
735 | |||
736 | static void __xen_write_cr3(bool kernel, unsigned long cr3) | ||
737 | { | ||
738 | struct mmuext_op *op; | ||
739 | struct multicall_space mcs; | ||
740 | unsigned long mfn; | ||
741 | |||
742 | if (cr3) | ||
743 | mfn = pfn_to_mfn(PFN_DOWN(cr3)); | ||
744 | else | ||
745 | mfn = 0; | ||
746 | |||
747 | WARN_ON(mfn == 0 && kernel); | ||
748 | |||
749 | mcs = __xen_mc_entry(sizeof(*op)); | ||
750 | |||
751 | op = mcs.args; | ||
752 | op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; | ||
753 | op->arg1.mfn = mfn; | ||
754 | |||
755 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | ||
756 | |||
757 | if (kernel) { | ||
758 | x86_write_percpu(xen_cr3, cr3); | ||
759 | |||
760 | /* Update xen_current_cr3 once the batch has actually | ||
761 | been submitted. */ | ||
762 | xen_mc_callback(set_current_cr3, (void *)cr3); | ||
763 | } | ||
764 | } | ||
765 | |||
766 | static void xen_write_cr3(unsigned long cr3) | ||
767 | { | ||
768 | BUG_ON(preemptible()); | ||
769 | |||
770 | xen_mc_batch(); /* disables interrupts */ | ||
771 | |||
772 | /* Update while interrupts are disabled, so its atomic with | ||
773 | respect to ipis */ | ||
774 | x86_write_percpu(xen_cr3, cr3); | ||
775 | |||
776 | __xen_write_cr3(true, cr3); | ||
777 | |||
778 | #ifdef CONFIG_X86_64 | ||
779 | { | ||
780 | pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); | ||
781 | if (user_pgd) | ||
782 | __xen_write_cr3(false, __pa(user_pgd)); | ||
783 | else | ||
784 | __xen_write_cr3(false, 0); | ||
785 | } | ||
786 | #endif | ||
787 | |||
788 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ | ||
789 | } | ||
790 | |||
791 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) | 604 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
792 | { | 605 | { |
793 | int ret; | 606 | int ret; |
@@ -829,185 +642,6 @@ static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) | |||
829 | return ret; | 642 | return ret; |
830 | } | 643 | } |
831 | 644 | ||
832 | /* Early in boot, while setting up the initial pagetable, assume | ||
833 | everything is pinned. */ | ||
834 | static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) | ||
835 | { | ||
836 | #ifdef CONFIG_FLATMEM | ||
837 | BUG_ON(mem_map); /* should only be used early */ | ||
838 | #endif | ||
839 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | ||
840 | } | ||
841 | |||
842 | /* Early release_pte assumes that all pts are pinned, since there's | ||
843 | only init_mm and anything attached to that is pinned. */ | ||
844 | static void xen_release_pte_init(unsigned long pfn) | ||
845 | { | ||
846 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | ||
847 | } | ||
848 | |||
849 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) | ||
850 | { | ||
851 | struct mmuext_op op; | ||
852 | op.cmd = cmd; | ||
853 | op.arg1.mfn = pfn_to_mfn(pfn); | ||
854 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | ||
855 | BUG(); | ||
856 | } | ||
857 | |||
858 | /* This needs to make sure the new pte page is pinned iff its being | ||
859 | attached to a pinned pagetable. */ | ||
860 | static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level) | ||
861 | { | ||
862 | struct page *page = pfn_to_page(pfn); | ||
863 | |||
864 | if (PagePinned(virt_to_page(mm->pgd))) { | ||
865 | SetPagePinned(page); | ||
866 | |||
867 | vm_unmap_aliases(); | ||
868 | if (!PageHighMem(page)) { | ||
869 | make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn))); | ||
870 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | ||
871 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | ||
872 | } else { | ||
873 | /* make sure there are no stray mappings of | ||
874 | this page */ | ||
875 | kmap_flush_unused(); | ||
876 | } | ||
877 | } | ||
878 | } | ||
879 | |||
880 | static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) | ||
881 | { | ||
882 | xen_alloc_ptpage(mm, pfn, PT_PTE); | ||
883 | } | ||
884 | |||
885 | static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) | ||
886 | { | ||
887 | xen_alloc_ptpage(mm, pfn, PT_PMD); | ||
888 | } | ||
889 | |||
890 | static int xen_pgd_alloc(struct mm_struct *mm) | ||
891 | { | ||
892 | pgd_t *pgd = mm->pgd; | ||
893 | int ret = 0; | ||
894 | |||
895 | BUG_ON(PagePinned(virt_to_page(pgd))); | ||
896 | |||
897 | #ifdef CONFIG_X86_64 | ||
898 | { | ||
899 | struct page *page = virt_to_page(pgd); | ||
900 | pgd_t *user_pgd; | ||
901 | |||
902 | BUG_ON(page->private != 0); | ||
903 | |||
904 | ret = -ENOMEM; | ||
905 | |||
906 | user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); | ||
907 | page->private = (unsigned long)user_pgd; | ||
908 | |||
909 | if (user_pgd != NULL) { | ||
910 | user_pgd[pgd_index(VSYSCALL_START)] = | ||
911 | __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); | ||
912 | ret = 0; | ||
913 | } | ||
914 | |||
915 | BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); | ||
916 | } | ||
917 | #endif | ||
918 | |||
919 | return ret; | ||
920 | } | ||
921 | |||
922 | static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
923 | { | ||
924 | #ifdef CONFIG_X86_64 | ||
925 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | ||
926 | |||
927 | if (user_pgd) | ||
928 | free_page((unsigned long)user_pgd); | ||
929 | #endif | ||
930 | } | ||
931 | |||
932 | /* This should never happen until we're OK to use struct page */ | ||
933 | static void xen_release_ptpage(unsigned long pfn, unsigned level) | ||
934 | { | ||
935 | struct page *page = pfn_to_page(pfn); | ||
936 | |||
937 | if (PagePinned(page)) { | ||
938 | if (!PageHighMem(page)) { | ||
939 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | ||
940 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); | ||
941 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | ||
942 | } | ||
943 | ClearPagePinned(page); | ||
944 | } | ||
945 | } | ||
946 | |||
947 | static void xen_release_pte(unsigned long pfn) | ||
948 | { | ||
949 | xen_release_ptpage(pfn, PT_PTE); | ||
950 | } | ||
951 | |||
952 | static void xen_release_pmd(unsigned long pfn) | ||
953 | { | ||
954 | xen_release_ptpage(pfn, PT_PMD); | ||
955 | } | ||
956 | |||
957 | #if PAGETABLE_LEVELS == 4 | ||
958 | static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) | ||
959 | { | ||
960 | xen_alloc_ptpage(mm, pfn, PT_PUD); | ||
961 | } | ||
962 | |||
963 | static void xen_release_pud(unsigned long pfn) | ||
964 | { | ||
965 | xen_release_ptpage(pfn, PT_PUD); | ||
966 | } | ||
967 | #endif | ||
968 | |||
969 | #ifdef CONFIG_HIGHPTE | ||
970 | static void *xen_kmap_atomic_pte(struct page *page, enum km_type type) | ||
971 | { | ||
972 | pgprot_t prot = PAGE_KERNEL; | ||
973 | |||
974 | if (PagePinned(page)) | ||
975 | prot = PAGE_KERNEL_RO; | ||
976 | |||
977 | if (0 && PageHighMem(page)) | ||
978 | printk("mapping highpte %lx type %d prot %s\n", | ||
979 | page_to_pfn(page), type, | ||
980 | (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ"); | ||
981 | |||
982 | return kmap_atomic_prot(page, type, prot); | ||
983 | } | ||
984 | #endif | ||
985 | |||
986 | #ifdef CONFIG_X86_32 | ||
987 | static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) | ||
988 | { | ||
989 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ | ||
990 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | ||
991 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | ||
992 | pte_val_ma(pte)); | ||
993 | |||
994 | return pte; | ||
995 | } | ||
996 | |||
997 | /* Init-time set_pte while constructing initial pagetables, which | ||
998 | doesn't allow RO pagetable pages to be remapped RW */ | ||
999 | static __init void xen_set_pte_init(pte_t *ptep, pte_t pte) | ||
1000 | { | ||
1001 | pte = mask_rw_pte(ptep, pte); | ||
1002 | |||
1003 | xen_set_pte(ptep, pte); | ||
1004 | } | ||
1005 | #endif | ||
1006 | |||
1007 | static __init void xen_pagetable_setup_start(pgd_t *base) | ||
1008 | { | ||
1009 | } | ||
1010 | |||
1011 | void xen_setup_shared_info(void) | 645 | void xen_setup_shared_info(void) |
1012 | { | 646 | { |
1013 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | 647 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { |
@@ -1028,37 +662,6 @@ void xen_setup_shared_info(void) | |||
1028 | xen_setup_mfn_list_list(); | 662 | xen_setup_mfn_list_list(); |
1029 | } | 663 | } |
1030 | 664 | ||
1031 | static __init void xen_pagetable_setup_done(pgd_t *base) | ||
1032 | { | ||
1033 | xen_setup_shared_info(); | ||
1034 | } | ||
1035 | |||
1036 | static __init void xen_post_allocator_init(void) | ||
1037 | { | ||
1038 | pv_mmu_ops.set_pte = xen_set_pte; | ||
1039 | pv_mmu_ops.set_pmd = xen_set_pmd; | ||
1040 | pv_mmu_ops.set_pud = xen_set_pud; | ||
1041 | #if PAGETABLE_LEVELS == 4 | ||
1042 | pv_mmu_ops.set_pgd = xen_set_pgd; | ||
1043 | #endif | ||
1044 | |||
1045 | /* This will work as long as patching hasn't happened yet | ||
1046 | (which it hasn't) */ | ||
1047 | pv_mmu_ops.alloc_pte = xen_alloc_pte; | ||
1048 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | ||
1049 | pv_mmu_ops.release_pte = xen_release_pte; | ||
1050 | pv_mmu_ops.release_pmd = xen_release_pmd; | ||
1051 | #if PAGETABLE_LEVELS == 4 | ||
1052 | pv_mmu_ops.alloc_pud = xen_alloc_pud; | ||
1053 | pv_mmu_ops.release_pud = xen_release_pud; | ||
1054 | #endif | ||
1055 | |||
1056 | #ifdef CONFIG_X86_64 | ||
1057 | SetPagePinned(virt_to_page(level3_user_vsyscall)); | ||
1058 | #endif | ||
1059 | xen_mark_init_mm_pinned(); | ||
1060 | } | ||
1061 | |||
1062 | /* This is called once we have the cpu_possible_map */ | 665 | /* This is called once we have the cpu_possible_map */ |
1063 | void xen_setup_vcpu_info_placement(void) | 666 | void xen_setup_vcpu_info_placement(void) |
1064 | { | 667 | { |
@@ -1072,10 +675,10 @@ void xen_setup_vcpu_info_placement(void) | |||
1072 | if (have_vcpu_info_placement) { | 675 | if (have_vcpu_info_placement) { |
1073 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); | 676 | printk(KERN_INFO "Xen: using vcpu_info placement\n"); |
1074 | 677 | ||
1075 | pv_irq_ops.save_fl = xen_save_fl_direct; | 678 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1076 | pv_irq_ops.restore_fl = xen_restore_fl_direct; | 679 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); |
1077 | pv_irq_ops.irq_disable = xen_irq_disable_direct; | 680 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); |
1078 | pv_irq_ops.irq_enable = xen_irq_enable_direct; | 681 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); |
1079 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; | 682 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
1080 | } | 683 | } |
1081 | } | 684 | } |
@@ -1133,49 +736,6 @@ static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, | |||
1133 | return ret; | 736 | return ret; |
1134 | } | 737 | } |
1135 | 738 | ||
1136 | static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot) | ||
1137 | { | ||
1138 | pte_t pte; | ||
1139 | |||
1140 | phys >>= PAGE_SHIFT; | ||
1141 | |||
1142 | switch (idx) { | ||
1143 | case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: | ||
1144 | #ifdef CONFIG_X86_F00F_BUG | ||
1145 | case FIX_F00F_IDT: | ||
1146 | #endif | ||
1147 | #ifdef CONFIG_X86_32 | ||
1148 | case FIX_WP_TEST: | ||
1149 | case FIX_VDSO: | ||
1150 | # ifdef CONFIG_HIGHMEM | ||
1151 | case FIX_KMAP_BEGIN ... FIX_KMAP_END: | ||
1152 | # endif | ||
1153 | #else | ||
1154 | case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE: | ||
1155 | #endif | ||
1156 | #ifdef CONFIG_X86_LOCAL_APIC | ||
1157 | case FIX_APIC_BASE: /* maps dummy local APIC */ | ||
1158 | #endif | ||
1159 | pte = pfn_pte(phys, prot); | ||
1160 | break; | ||
1161 | |||
1162 | default: | ||
1163 | pte = mfn_pte(phys, prot); | ||
1164 | break; | ||
1165 | } | ||
1166 | |||
1167 | __native_set_fixmap(idx, pte); | ||
1168 | |||
1169 | #ifdef CONFIG_X86_64 | ||
1170 | /* Replicate changes to map the vsyscall page into the user | ||
1171 | pagetable vsyscall mapping. */ | ||
1172 | if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) { | ||
1173 | unsigned long vaddr = __fix_to_virt(idx); | ||
1174 | set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); | ||
1175 | } | ||
1176 | #endif | ||
1177 | } | ||
1178 | |||
1179 | static const struct pv_info xen_info __initdata = { | 739 | static const struct pv_info xen_info __initdata = { |
1180 | .paravirt_enabled = 1, | 740 | .paravirt_enabled = 1, |
1181 | .shared_kernel_pmd = 0, | 741 | .shared_kernel_pmd = 0, |
@@ -1271,87 +831,6 @@ static const struct pv_apic_ops xen_apic_ops __initdata = { | |||
1271 | #endif | 831 | #endif |
1272 | }; | 832 | }; |
1273 | 833 | ||
1274 | static const struct pv_mmu_ops xen_mmu_ops __initdata = { | ||
1275 | .pagetable_setup_start = xen_pagetable_setup_start, | ||
1276 | .pagetable_setup_done = xen_pagetable_setup_done, | ||
1277 | |||
1278 | .read_cr2 = xen_read_cr2, | ||
1279 | .write_cr2 = xen_write_cr2, | ||
1280 | |||
1281 | .read_cr3 = xen_read_cr3, | ||
1282 | .write_cr3 = xen_write_cr3, | ||
1283 | |||
1284 | .flush_tlb_user = xen_flush_tlb, | ||
1285 | .flush_tlb_kernel = xen_flush_tlb, | ||
1286 | .flush_tlb_single = xen_flush_tlb_single, | ||
1287 | .flush_tlb_others = xen_flush_tlb_others, | ||
1288 | |||
1289 | .pte_update = paravirt_nop, | ||
1290 | .pte_update_defer = paravirt_nop, | ||
1291 | |||
1292 | .pgd_alloc = xen_pgd_alloc, | ||
1293 | .pgd_free = xen_pgd_free, | ||
1294 | |||
1295 | .alloc_pte = xen_alloc_pte_init, | ||
1296 | .release_pte = xen_release_pte_init, | ||
1297 | .alloc_pmd = xen_alloc_pte_init, | ||
1298 | .alloc_pmd_clone = paravirt_nop, | ||
1299 | .release_pmd = xen_release_pte_init, | ||
1300 | |||
1301 | #ifdef CONFIG_HIGHPTE | ||
1302 | .kmap_atomic_pte = xen_kmap_atomic_pte, | ||
1303 | #endif | ||
1304 | |||
1305 | #ifdef CONFIG_X86_64 | ||
1306 | .set_pte = xen_set_pte, | ||
1307 | #else | ||
1308 | .set_pte = xen_set_pte_init, | ||
1309 | #endif | ||
1310 | .set_pte_at = xen_set_pte_at, | ||
1311 | .set_pmd = xen_set_pmd_hyper, | ||
1312 | |||
1313 | .ptep_modify_prot_start = __ptep_modify_prot_start, | ||
1314 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | ||
1315 | |||
1316 | .pte_val = xen_pte_val, | ||
1317 | .pte_flags = native_pte_flags, | ||
1318 | .pgd_val = xen_pgd_val, | ||
1319 | |||
1320 | .make_pte = xen_make_pte, | ||
1321 | .make_pgd = xen_make_pgd, | ||
1322 | |||
1323 | #ifdef CONFIG_X86_PAE | ||
1324 | .set_pte_atomic = xen_set_pte_atomic, | ||
1325 | .set_pte_present = xen_set_pte_at, | ||
1326 | .pte_clear = xen_pte_clear, | ||
1327 | .pmd_clear = xen_pmd_clear, | ||
1328 | #endif /* CONFIG_X86_PAE */ | ||
1329 | .set_pud = xen_set_pud_hyper, | ||
1330 | |||
1331 | .make_pmd = xen_make_pmd, | ||
1332 | .pmd_val = xen_pmd_val, | ||
1333 | |||
1334 | #if PAGETABLE_LEVELS == 4 | ||
1335 | .pud_val = xen_pud_val, | ||
1336 | .make_pud = xen_make_pud, | ||
1337 | .set_pgd = xen_set_pgd_hyper, | ||
1338 | |||
1339 | .alloc_pud = xen_alloc_pte_init, | ||
1340 | .release_pud = xen_release_pte_init, | ||
1341 | #endif /* PAGETABLE_LEVELS == 4 */ | ||
1342 | |||
1343 | .activate_mm = xen_activate_mm, | ||
1344 | .dup_mmap = xen_dup_mmap, | ||
1345 | .exit_mmap = xen_exit_mmap, | ||
1346 | |||
1347 | .lazy_mode = { | ||
1348 | .enter = paravirt_enter_lazy_mmu, | ||
1349 | .leave = xen_leave_lazy, | ||
1350 | }, | ||
1351 | |||
1352 | .set_fixmap = xen_set_fixmap, | ||
1353 | }; | ||
1354 | |||
1355 | static void xen_reboot(int reason) | 834 | static void xen_reboot(int reason) |
1356 | { | 835 | { |
1357 | struct sched_shutdown r = { .reason = reason }; | 836 | struct sched_shutdown r = { .reason = reason }; |
@@ -1394,223 +873,6 @@ static const struct machine_ops __initdata xen_machine_ops = { | |||
1394 | }; | 873 | }; |
1395 | 874 | ||
1396 | 875 | ||
1397 | static void __init xen_reserve_top(void) | ||
1398 | { | ||
1399 | #ifdef CONFIG_X86_32 | ||
1400 | unsigned long top = HYPERVISOR_VIRT_START; | ||
1401 | struct xen_platform_parameters pp; | ||
1402 | |||
1403 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | ||
1404 | top = pp.virt_start; | ||
1405 | |||
1406 | reserve_top_address(-top); | ||
1407 | #endif /* CONFIG_X86_32 */ | ||
1408 | } | ||
1409 | |||
1410 | /* | ||
1411 | * Like __va(), but returns address in the kernel mapping (which is | ||
1412 | * all we have until the physical memory mapping has been set up. | ||
1413 | */ | ||
1414 | static void *__ka(phys_addr_t paddr) | ||
1415 | { | ||
1416 | #ifdef CONFIG_X86_64 | ||
1417 | return (void *)(paddr + __START_KERNEL_map); | ||
1418 | #else | ||
1419 | return __va(paddr); | ||
1420 | #endif | ||
1421 | } | ||
1422 | |||
1423 | /* Convert a machine address to physical address */ | ||
1424 | static unsigned long m2p(phys_addr_t maddr) | ||
1425 | { | ||
1426 | phys_addr_t paddr; | ||
1427 | |||
1428 | maddr &= PTE_PFN_MASK; | ||
1429 | paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; | ||
1430 | |||
1431 | return paddr; | ||
1432 | } | ||
1433 | |||
1434 | /* Convert a machine address to kernel virtual */ | ||
1435 | static void *m2v(phys_addr_t maddr) | ||
1436 | { | ||
1437 | return __ka(m2p(maddr)); | ||
1438 | } | ||
1439 | |||
1440 | static void set_page_prot(void *addr, pgprot_t prot) | ||
1441 | { | ||
1442 | unsigned long pfn = __pa(addr) >> PAGE_SHIFT; | ||
1443 | pte_t pte = pfn_pte(pfn, prot); | ||
1444 | |||
1445 | if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) | ||
1446 | BUG(); | ||
1447 | } | ||
1448 | |||
1449 | static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) | ||
1450 | { | ||
1451 | unsigned pmdidx, pteidx; | ||
1452 | unsigned ident_pte; | ||
1453 | unsigned long pfn; | ||
1454 | |||
1455 | ident_pte = 0; | ||
1456 | pfn = 0; | ||
1457 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { | ||
1458 | pte_t *pte_page; | ||
1459 | |||
1460 | /* Reuse or allocate a page of ptes */ | ||
1461 | if (pmd_present(pmd[pmdidx])) | ||
1462 | pte_page = m2v(pmd[pmdidx].pmd); | ||
1463 | else { | ||
1464 | /* Check for free pte pages */ | ||
1465 | if (ident_pte == ARRAY_SIZE(level1_ident_pgt)) | ||
1466 | break; | ||
1467 | |||
1468 | pte_page = &level1_ident_pgt[ident_pte]; | ||
1469 | ident_pte += PTRS_PER_PTE; | ||
1470 | |||
1471 | pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); | ||
1472 | } | ||
1473 | |||
1474 | /* Install mappings */ | ||
1475 | for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { | ||
1476 | pte_t pte; | ||
1477 | |||
1478 | if (pfn > max_pfn_mapped) | ||
1479 | max_pfn_mapped = pfn; | ||
1480 | |||
1481 | if (!pte_none(pte_page[pteidx])) | ||
1482 | continue; | ||
1483 | |||
1484 | pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); | ||
1485 | pte_page[pteidx] = pte; | ||
1486 | } | ||
1487 | } | ||
1488 | |||
1489 | for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) | ||
1490 | set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); | ||
1491 | |||
1492 | set_page_prot(pmd, PAGE_KERNEL_RO); | ||
1493 | } | ||
1494 | |||
1495 | #ifdef CONFIG_X86_64 | ||
1496 | static void convert_pfn_mfn(void *v) | ||
1497 | { | ||
1498 | pte_t *pte = v; | ||
1499 | int i; | ||
1500 | |||
1501 | /* All levels are converted the same way, so just treat them | ||
1502 | as ptes. */ | ||
1503 | for (i = 0; i < PTRS_PER_PTE; i++) | ||
1504 | pte[i] = xen_make_pte(pte[i].pte); | ||
1505 | } | ||
1506 | |||
1507 | /* | ||
1508 | * Set up the inital kernel pagetable. | ||
1509 | * | ||
1510 | * We can construct this by grafting the Xen provided pagetable into | ||
1511 | * head_64.S's preconstructed pagetables. We copy the Xen L2's into | ||
1512 | * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This | ||
1513 | * means that only the kernel has a physical mapping to start with - | ||
1514 | * but that's enough to get __va working. We need to fill in the rest | ||
1515 | * of the physical mapping once some sort of allocator has been set | ||
1516 | * up. | ||
1517 | */ | ||
1518 | static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | ||
1519 | unsigned long max_pfn) | ||
1520 | { | ||
1521 | pud_t *l3; | ||
1522 | pmd_t *l2; | ||
1523 | |||
1524 | /* Zap identity mapping */ | ||
1525 | init_level4_pgt[0] = __pgd(0); | ||
1526 | |||
1527 | /* Pre-constructed entries are in pfn, so convert to mfn */ | ||
1528 | convert_pfn_mfn(init_level4_pgt); | ||
1529 | convert_pfn_mfn(level3_ident_pgt); | ||
1530 | convert_pfn_mfn(level3_kernel_pgt); | ||
1531 | |||
1532 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); | ||
1533 | l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); | ||
1534 | |||
1535 | memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1536 | memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1537 | |||
1538 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd); | ||
1539 | l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud); | ||
1540 | memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1541 | |||
1542 | /* Set up identity map */ | ||
1543 | xen_map_identity_early(level2_ident_pgt, max_pfn); | ||
1544 | |||
1545 | /* Make pagetable pieces RO */ | ||
1546 | set_page_prot(init_level4_pgt, PAGE_KERNEL_RO); | ||
1547 | set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); | ||
1548 | set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); | ||
1549 | set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); | ||
1550 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | ||
1551 | set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); | ||
1552 | |||
1553 | /* Pin down new L4 */ | ||
1554 | pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, | ||
1555 | PFN_DOWN(__pa_symbol(init_level4_pgt))); | ||
1556 | |||
1557 | /* Unpin Xen-provided one */ | ||
1558 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | ||
1559 | |||
1560 | /* Switch over */ | ||
1561 | pgd = init_level4_pgt; | ||
1562 | |||
1563 | /* | ||
1564 | * At this stage there can be no user pgd, and no page | ||
1565 | * structure to attach it to, so make sure we just set kernel | ||
1566 | * pgd. | ||
1567 | */ | ||
1568 | xen_mc_batch(); | ||
1569 | __xen_write_cr3(true, __pa(pgd)); | ||
1570 | xen_mc_issue(PARAVIRT_LAZY_CPU); | ||
1571 | |||
1572 | reserve_early(__pa(xen_start_info->pt_base), | ||
1573 | __pa(xen_start_info->pt_base + | ||
1574 | xen_start_info->nr_pt_frames * PAGE_SIZE), | ||
1575 | "XEN PAGETABLES"); | ||
1576 | |||
1577 | return pgd; | ||
1578 | } | ||
1579 | #else /* !CONFIG_X86_64 */ | ||
1580 | static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss; | ||
1581 | |||
1582 | static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | ||
1583 | unsigned long max_pfn) | ||
1584 | { | ||
1585 | pmd_t *kernel_pmd; | ||
1586 | |||
1587 | init_pg_tables_start = __pa(pgd); | ||
1588 | init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE; | ||
1589 | max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024); | ||
1590 | |||
1591 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); | ||
1592 | memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1593 | |||
1594 | xen_map_identity_early(level2_kernel_pgt, max_pfn); | ||
1595 | |||
1596 | memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD); | ||
1597 | set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY], | ||
1598 | __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT)); | ||
1599 | |||
1600 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | ||
1601 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | ||
1602 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); | ||
1603 | |||
1604 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | ||
1605 | |||
1606 | xen_write_cr3(__pa(swapper_pg_dir)); | ||
1607 | |||
1608 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir))); | ||
1609 | |||
1610 | return swapper_pg_dir; | ||
1611 | } | ||
1612 | #endif /* CONFIG_X86_64 */ | ||
1613 | |||
1614 | /* First C function to be called on Xen boot */ | 876 | /* First C function to be called on Xen boot */ |
1615 | asmlinkage void __init xen_start_kernel(void) | 877 | asmlinkage void __init xen_start_kernel(void) |
1616 | { | 878 | { |
@@ -1639,7 +901,7 @@ asmlinkage void __init xen_start_kernel(void) | |||
1639 | /* | 901 | /* |
1640 | * set up the basic apic ops. | 902 | * set up the basic apic ops. |
1641 | */ | 903 | */ |
1642 | apic_ops = &xen_basic_apic_ops; | 904 | set_xen_basic_apic_ops(); |
1643 | #endif | 905 | #endif |
1644 | 906 | ||
1645 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { | 907 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
@@ -1650,10 +912,18 @@ asmlinkage void __init xen_start_kernel(void) | |||
1650 | machine_ops = xen_machine_ops; | 912 | machine_ops = xen_machine_ops; |
1651 | 913 | ||
1652 | #ifdef CONFIG_X86_64 | 914 | #ifdef CONFIG_X86_64 |
1653 | /* Disable until direct per-cpu data access. */ | 915 | /* |
1654 | have_vcpu_info_placement = 0; | 916 | * Setup percpu state. We only need to do this for 64-bit |
1655 | x86_64_init_pda(); | 917 | * because 32-bit already has %fs set properly. |
918 | */ | ||
919 | load_percpu_segment(0); | ||
1656 | #endif | 920 | #endif |
921 | /* | ||
922 | * The only reliable way to retain the initial address of the | ||
923 | * percpu gdt_page is to remember it here, so we can go and | ||
924 | * mark it RW later, when the initial percpu area is freed. | ||
925 | */ | ||
926 | xen_initial_gdt = &per_cpu(gdt_page, 0); | ||
1657 | 927 | ||
1658 | xen_smp_init(); | 928 | xen_smp_init(); |
1659 | 929 | ||
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c index bb042608c602..cfd17799bd6d 100644 --- a/arch/x86/xen/irq.c +++ b/arch/x86/xen/irq.c | |||
@@ -19,27 +19,12 @@ void xen_force_evtchn_callback(void) | |||
19 | (void)HYPERVISOR_xen_version(0, NULL); | 19 | (void)HYPERVISOR_xen_version(0, NULL); |
20 | } | 20 | } |
21 | 21 | ||
22 | static void __init __xen_init_IRQ(void) | ||
23 | { | ||
24 | int i; | ||
25 | |||
26 | /* Create identity vector->irq map */ | ||
27 | for(i = 0; i < NR_VECTORS; i++) { | ||
28 | int cpu; | ||
29 | |||
30 | for_each_possible_cpu(cpu) | ||
31 | per_cpu(vector_irq, cpu)[i] = i; | ||
32 | } | ||
33 | |||
34 | xen_init_IRQ(); | ||
35 | } | ||
36 | |||
37 | static unsigned long xen_save_fl(void) | 22 | static unsigned long xen_save_fl(void) |
38 | { | 23 | { |
39 | struct vcpu_info *vcpu; | 24 | struct vcpu_info *vcpu; |
40 | unsigned long flags; | 25 | unsigned long flags; |
41 | 26 | ||
42 | vcpu = x86_read_percpu(xen_vcpu); | 27 | vcpu = percpu_read(xen_vcpu); |
43 | 28 | ||
44 | /* flag has opposite sense of mask */ | 29 | /* flag has opposite sense of mask */ |
45 | flags = !vcpu->evtchn_upcall_mask; | 30 | flags = !vcpu->evtchn_upcall_mask; |
@@ -50,6 +35,7 @@ static unsigned long xen_save_fl(void) | |||
50 | */ | 35 | */ |
51 | return (-flags) & X86_EFLAGS_IF; | 36 | return (-flags) & X86_EFLAGS_IF; |
52 | } | 37 | } |
38 | PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl); | ||
53 | 39 | ||
54 | static void xen_restore_fl(unsigned long flags) | 40 | static void xen_restore_fl(unsigned long flags) |
55 | { | 41 | { |
@@ -62,7 +48,7 @@ static void xen_restore_fl(unsigned long flags) | |||
62 | make sure we're don't switch CPUs between getting the vcpu | 48 | make sure we're don't switch CPUs between getting the vcpu |
63 | pointer and updating the mask. */ | 49 | pointer and updating the mask. */ |
64 | preempt_disable(); | 50 | preempt_disable(); |
65 | vcpu = x86_read_percpu(xen_vcpu); | 51 | vcpu = percpu_read(xen_vcpu); |
66 | vcpu->evtchn_upcall_mask = flags; | 52 | vcpu->evtchn_upcall_mask = flags; |
67 | preempt_enable_no_resched(); | 53 | preempt_enable_no_resched(); |
68 | 54 | ||
@@ -76,6 +62,7 @@ static void xen_restore_fl(unsigned long flags) | |||
76 | xen_force_evtchn_callback(); | 62 | xen_force_evtchn_callback(); |
77 | } | 63 | } |
78 | } | 64 | } |
65 | PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl); | ||
79 | 66 | ||
80 | static void xen_irq_disable(void) | 67 | static void xen_irq_disable(void) |
81 | { | 68 | { |
@@ -83,9 +70,10 @@ static void xen_irq_disable(void) | |||
83 | make sure we're don't switch CPUs between getting the vcpu | 70 | make sure we're don't switch CPUs between getting the vcpu |
84 | pointer and updating the mask. */ | 71 | pointer and updating the mask. */ |
85 | preempt_disable(); | 72 | preempt_disable(); |
86 | x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1; | 73 | percpu_read(xen_vcpu)->evtchn_upcall_mask = 1; |
87 | preempt_enable_no_resched(); | 74 | preempt_enable_no_resched(); |
88 | } | 75 | } |
76 | PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable); | ||
89 | 77 | ||
90 | static void xen_irq_enable(void) | 78 | static void xen_irq_enable(void) |
91 | { | 79 | { |
@@ -96,7 +84,7 @@ static void xen_irq_enable(void) | |||
96 | the caller is confused and is trying to re-enable interrupts | 84 | the caller is confused and is trying to re-enable interrupts |
97 | on an indeterminate processor. */ | 85 | on an indeterminate processor. */ |
98 | 86 | ||
99 | vcpu = x86_read_percpu(xen_vcpu); | 87 | vcpu = percpu_read(xen_vcpu); |
100 | vcpu->evtchn_upcall_mask = 0; | 88 | vcpu->evtchn_upcall_mask = 0; |
101 | 89 | ||
102 | /* Doesn't matter if we get preempted here, because any | 90 | /* Doesn't matter if we get preempted here, because any |
@@ -106,6 +94,7 @@ static void xen_irq_enable(void) | |||
106 | if (unlikely(vcpu->evtchn_upcall_pending)) | 94 | if (unlikely(vcpu->evtchn_upcall_pending)) |
107 | xen_force_evtchn_callback(); | 95 | xen_force_evtchn_callback(); |
108 | } | 96 | } |
97 | PV_CALLEE_SAVE_REGS_THUNK(xen_irq_enable); | ||
109 | 98 | ||
110 | static void xen_safe_halt(void) | 99 | static void xen_safe_halt(void) |
111 | { | 100 | { |
@@ -123,11 +112,13 @@ static void xen_halt(void) | |||
123 | } | 112 | } |
124 | 113 | ||
125 | static const struct pv_irq_ops xen_irq_ops __initdata = { | 114 | static const struct pv_irq_ops xen_irq_ops __initdata = { |
126 | .init_IRQ = __xen_init_IRQ, | 115 | .init_IRQ = xen_init_IRQ, |
127 | .save_fl = xen_save_fl, | 116 | |
128 | .restore_fl = xen_restore_fl, | 117 | .save_fl = PV_CALLEE_SAVE(xen_save_fl), |
129 | .irq_disable = xen_irq_disable, | 118 | .restore_fl = PV_CALLEE_SAVE(xen_restore_fl), |
130 | .irq_enable = xen_irq_enable, | 119 | .irq_disable = PV_CALLEE_SAVE(xen_irq_disable), |
120 | .irq_enable = PV_CALLEE_SAVE(xen_irq_enable), | ||
121 | |||
131 | .safe_halt = xen_safe_halt, | 122 | .safe_halt = xen_safe_halt, |
132 | .halt = xen_halt, | 123 | .halt = xen_halt, |
133 | #ifdef CONFIG_X86_64 | 124 | #ifdef CONFIG_X86_64 |
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 503c240e26c7..cb6afa4ec95c 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c | |||
@@ -47,6 +47,7 @@ | |||
47 | #include <asm/tlbflush.h> | 47 | #include <asm/tlbflush.h> |
48 | #include <asm/fixmap.h> | 48 | #include <asm/fixmap.h> |
49 | #include <asm/mmu_context.h> | 49 | #include <asm/mmu_context.h> |
50 | #include <asm/setup.h> | ||
50 | #include <asm/paravirt.h> | 51 | #include <asm/paravirt.h> |
51 | #include <asm/linkage.h> | 52 | #include <asm/linkage.h> |
52 | 53 | ||
@@ -55,6 +56,8 @@ | |||
55 | 56 | ||
56 | #include <xen/page.h> | 57 | #include <xen/page.h> |
57 | #include <xen/interface/xen.h> | 58 | #include <xen/interface/xen.h> |
59 | #include <xen/interface/version.h> | ||
60 | #include <xen/hvc-console.h> | ||
58 | 61 | ||
59 | #include "multicalls.h" | 62 | #include "multicalls.h" |
60 | #include "mmu.h" | 63 | #include "mmu.h" |
@@ -114,6 +117,37 @@ static inline void check_zero(void) | |||
114 | 117 | ||
115 | #endif /* CONFIG_XEN_DEBUG_FS */ | 118 | #endif /* CONFIG_XEN_DEBUG_FS */ |
116 | 119 | ||
120 | |||
121 | /* | ||
122 | * Identity map, in addition to plain kernel map. This needs to be | ||
123 | * large enough to allocate page table pages to allocate the rest. | ||
124 | * Each page can map 2MB. | ||
125 | */ | ||
126 | static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss; | ||
127 | |||
128 | #ifdef CONFIG_X86_64 | ||
129 | /* l3 pud for userspace vsyscall mapping */ | ||
130 | static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; | ||
131 | #endif /* CONFIG_X86_64 */ | ||
132 | |||
133 | /* | ||
134 | * Note about cr3 (pagetable base) values: | ||
135 | * | ||
136 | * xen_cr3 contains the current logical cr3 value; it contains the | ||
137 | * last set cr3. This may not be the current effective cr3, because | ||
138 | * its update may be being lazily deferred. However, a vcpu looking | ||
139 | * at its own cr3 can use this value knowing that it everything will | ||
140 | * be self-consistent. | ||
141 | * | ||
142 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | ||
143 | * hypercall to set the vcpu cr3 is complete (so it may be a little | ||
144 | * out of date, but it will never be set early). If one vcpu is | ||
145 | * looking at another vcpu's cr3 value, it should use this variable. | ||
146 | */ | ||
147 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | ||
148 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | ||
149 | |||
150 | |||
117 | /* | 151 | /* |
118 | * Just beyond the highest usermode address. STACK_TOP_MAX has a | 152 | * Just beyond the highest usermode address. STACK_TOP_MAX has a |
119 | * redzone above it, so round it up to a PGD boundary. | 153 | * redzone above it, so round it up to a PGD boundary. |
@@ -242,6 +276,13 @@ void set_phys_to_machine(unsigned long pfn, unsigned long mfn) | |||
242 | p2m_top[topidx][idx] = mfn; | 276 | p2m_top[topidx][idx] = mfn; |
243 | } | 277 | } |
244 | 278 | ||
279 | unsigned long arbitrary_virt_to_mfn(void *vaddr) | ||
280 | { | ||
281 | xmaddr_t maddr = arbitrary_virt_to_machine(vaddr); | ||
282 | |||
283 | return PFN_DOWN(maddr.maddr); | ||
284 | } | ||
285 | |||
245 | xmaddr_t arbitrary_virt_to_machine(void *vaddr) | 286 | xmaddr_t arbitrary_virt_to_machine(void *vaddr) |
246 | { | 287 | { |
247 | unsigned long address = (unsigned long)vaddr; | 288 | unsigned long address = (unsigned long)vaddr; |
@@ -458,28 +499,33 @@ pteval_t xen_pte_val(pte_t pte) | |||
458 | { | 499 | { |
459 | return pte_mfn_to_pfn(pte.pte); | 500 | return pte_mfn_to_pfn(pte.pte); |
460 | } | 501 | } |
502 | PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); | ||
461 | 503 | ||
462 | pgdval_t xen_pgd_val(pgd_t pgd) | 504 | pgdval_t xen_pgd_val(pgd_t pgd) |
463 | { | 505 | { |
464 | return pte_mfn_to_pfn(pgd.pgd); | 506 | return pte_mfn_to_pfn(pgd.pgd); |
465 | } | 507 | } |
508 | PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); | ||
466 | 509 | ||
467 | pte_t xen_make_pte(pteval_t pte) | 510 | pte_t xen_make_pte(pteval_t pte) |
468 | { | 511 | { |
469 | pte = pte_pfn_to_mfn(pte); | 512 | pte = pte_pfn_to_mfn(pte); |
470 | return native_make_pte(pte); | 513 | return native_make_pte(pte); |
471 | } | 514 | } |
515 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); | ||
472 | 516 | ||
473 | pgd_t xen_make_pgd(pgdval_t pgd) | 517 | pgd_t xen_make_pgd(pgdval_t pgd) |
474 | { | 518 | { |
475 | pgd = pte_pfn_to_mfn(pgd); | 519 | pgd = pte_pfn_to_mfn(pgd); |
476 | return native_make_pgd(pgd); | 520 | return native_make_pgd(pgd); |
477 | } | 521 | } |
522 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); | ||
478 | 523 | ||
479 | pmdval_t xen_pmd_val(pmd_t pmd) | 524 | pmdval_t xen_pmd_val(pmd_t pmd) |
480 | { | 525 | { |
481 | return pte_mfn_to_pfn(pmd.pmd); | 526 | return pte_mfn_to_pfn(pmd.pmd); |
482 | } | 527 | } |
528 | PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); | ||
483 | 529 | ||
484 | void xen_set_pud_hyper(pud_t *ptr, pud_t val) | 530 | void xen_set_pud_hyper(pud_t *ptr, pud_t val) |
485 | { | 531 | { |
@@ -556,12 +602,14 @@ pmd_t xen_make_pmd(pmdval_t pmd) | |||
556 | pmd = pte_pfn_to_mfn(pmd); | 602 | pmd = pte_pfn_to_mfn(pmd); |
557 | return native_make_pmd(pmd); | 603 | return native_make_pmd(pmd); |
558 | } | 604 | } |
605 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); | ||
559 | 606 | ||
560 | #if PAGETABLE_LEVELS == 4 | 607 | #if PAGETABLE_LEVELS == 4 |
561 | pudval_t xen_pud_val(pud_t pud) | 608 | pudval_t xen_pud_val(pud_t pud) |
562 | { | 609 | { |
563 | return pte_mfn_to_pfn(pud.pud); | 610 | return pte_mfn_to_pfn(pud.pud); |
564 | } | 611 | } |
612 | PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); | ||
565 | 613 | ||
566 | pud_t xen_make_pud(pudval_t pud) | 614 | pud_t xen_make_pud(pudval_t pud) |
567 | { | 615 | { |
@@ -569,6 +617,7 @@ pud_t xen_make_pud(pudval_t pud) | |||
569 | 617 | ||
570 | return native_make_pud(pud); | 618 | return native_make_pud(pud); |
571 | } | 619 | } |
620 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); | ||
572 | 621 | ||
573 | pgd_t *xen_get_user_pgd(pgd_t *pgd) | 622 | pgd_t *xen_get_user_pgd(pgd_t *pgd) |
574 | { | 623 | { |
@@ -1063,18 +1112,14 @@ static void drop_other_mm_ref(void *info) | |||
1063 | struct mm_struct *mm = info; | 1112 | struct mm_struct *mm = info; |
1064 | struct mm_struct *active_mm; | 1113 | struct mm_struct *active_mm; |
1065 | 1114 | ||
1066 | #ifdef CONFIG_X86_64 | 1115 | active_mm = percpu_read(cpu_tlbstate.active_mm); |
1067 | active_mm = read_pda(active_mm); | ||
1068 | #else | ||
1069 | active_mm = __get_cpu_var(cpu_tlbstate).active_mm; | ||
1070 | #endif | ||
1071 | 1116 | ||
1072 | if (active_mm == mm) | 1117 | if (active_mm == mm) |
1073 | leave_mm(smp_processor_id()); | 1118 | leave_mm(smp_processor_id()); |
1074 | 1119 | ||
1075 | /* If this cpu still has a stale cr3 reference, then make sure | 1120 | /* If this cpu still has a stale cr3 reference, then make sure |
1076 | it has been flushed. */ | 1121 | it has been flushed. */ |
1077 | if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) { | 1122 | if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) { |
1078 | load_cr3(swapper_pg_dir); | 1123 | load_cr3(swapper_pg_dir); |
1079 | arch_flush_lazy_cpu_mode(); | 1124 | arch_flush_lazy_cpu_mode(); |
1080 | } | 1125 | } |
@@ -1156,6 +1201,706 @@ void xen_exit_mmap(struct mm_struct *mm) | |||
1156 | spin_unlock(&mm->page_table_lock); | 1201 | spin_unlock(&mm->page_table_lock); |
1157 | } | 1202 | } |
1158 | 1203 | ||
1204 | static __init void xen_pagetable_setup_start(pgd_t *base) | ||
1205 | { | ||
1206 | } | ||
1207 | |||
1208 | static __init void xen_pagetable_setup_done(pgd_t *base) | ||
1209 | { | ||
1210 | xen_setup_shared_info(); | ||
1211 | } | ||
1212 | |||
1213 | static void xen_write_cr2(unsigned long cr2) | ||
1214 | { | ||
1215 | percpu_read(xen_vcpu)->arch.cr2 = cr2; | ||
1216 | } | ||
1217 | |||
1218 | static unsigned long xen_read_cr2(void) | ||
1219 | { | ||
1220 | return percpu_read(xen_vcpu)->arch.cr2; | ||
1221 | } | ||
1222 | |||
1223 | unsigned long xen_read_cr2_direct(void) | ||
1224 | { | ||
1225 | return percpu_read(xen_vcpu_info.arch.cr2); | ||
1226 | } | ||
1227 | |||
1228 | static void xen_flush_tlb(void) | ||
1229 | { | ||
1230 | struct mmuext_op *op; | ||
1231 | struct multicall_space mcs; | ||
1232 | |||
1233 | preempt_disable(); | ||
1234 | |||
1235 | mcs = xen_mc_entry(sizeof(*op)); | ||
1236 | |||
1237 | op = mcs.args; | ||
1238 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | ||
1239 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | ||
1240 | |||
1241 | xen_mc_issue(PARAVIRT_LAZY_MMU); | ||
1242 | |||
1243 | preempt_enable(); | ||
1244 | } | ||
1245 | |||
1246 | static void xen_flush_tlb_single(unsigned long addr) | ||
1247 | { | ||
1248 | struct mmuext_op *op; | ||
1249 | struct multicall_space mcs; | ||
1250 | |||
1251 | preempt_disable(); | ||
1252 | |||
1253 | mcs = xen_mc_entry(sizeof(*op)); | ||
1254 | op = mcs.args; | ||
1255 | op->cmd = MMUEXT_INVLPG_LOCAL; | ||
1256 | op->arg1.linear_addr = addr & PAGE_MASK; | ||
1257 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | ||
1258 | |||
1259 | xen_mc_issue(PARAVIRT_LAZY_MMU); | ||
1260 | |||
1261 | preempt_enable(); | ||
1262 | } | ||
1263 | |||
1264 | static void xen_flush_tlb_others(const struct cpumask *cpus, | ||
1265 | struct mm_struct *mm, unsigned long va) | ||
1266 | { | ||
1267 | struct { | ||
1268 | struct mmuext_op op; | ||
1269 | DECLARE_BITMAP(mask, NR_CPUS); | ||
1270 | } *args; | ||
1271 | struct multicall_space mcs; | ||
1272 | |||
1273 | BUG_ON(cpumask_empty(cpus)); | ||
1274 | BUG_ON(!mm); | ||
1275 | |||
1276 | mcs = xen_mc_entry(sizeof(*args)); | ||
1277 | args = mcs.args; | ||
1278 | args->op.arg2.vcpumask = to_cpumask(args->mask); | ||
1279 | |||
1280 | /* Remove us, and any offline CPUS. */ | ||
1281 | cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); | ||
1282 | cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); | ||
1283 | |||
1284 | if (va == TLB_FLUSH_ALL) { | ||
1285 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; | ||
1286 | } else { | ||
1287 | args->op.cmd = MMUEXT_INVLPG_MULTI; | ||
1288 | args->op.arg1.linear_addr = va; | ||
1289 | } | ||
1290 | |||
1291 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); | ||
1292 | |||
1293 | xen_mc_issue(PARAVIRT_LAZY_MMU); | ||
1294 | } | ||
1295 | |||
1296 | static unsigned long xen_read_cr3(void) | ||
1297 | { | ||
1298 | return percpu_read(xen_cr3); | ||
1299 | } | ||
1300 | |||
1301 | static void set_current_cr3(void *v) | ||
1302 | { | ||
1303 | percpu_write(xen_current_cr3, (unsigned long)v); | ||
1304 | } | ||
1305 | |||
1306 | static void __xen_write_cr3(bool kernel, unsigned long cr3) | ||
1307 | { | ||
1308 | struct mmuext_op *op; | ||
1309 | struct multicall_space mcs; | ||
1310 | unsigned long mfn; | ||
1311 | |||
1312 | if (cr3) | ||
1313 | mfn = pfn_to_mfn(PFN_DOWN(cr3)); | ||
1314 | else | ||
1315 | mfn = 0; | ||
1316 | |||
1317 | WARN_ON(mfn == 0 && kernel); | ||
1318 | |||
1319 | mcs = __xen_mc_entry(sizeof(*op)); | ||
1320 | |||
1321 | op = mcs.args; | ||
1322 | op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; | ||
1323 | op->arg1.mfn = mfn; | ||
1324 | |||
1325 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | ||
1326 | |||
1327 | if (kernel) { | ||
1328 | percpu_write(xen_cr3, cr3); | ||
1329 | |||
1330 | /* Update xen_current_cr3 once the batch has actually | ||
1331 | been submitted. */ | ||
1332 | xen_mc_callback(set_current_cr3, (void *)cr3); | ||
1333 | } | ||
1334 | } | ||
1335 | |||
1336 | static void xen_write_cr3(unsigned long cr3) | ||
1337 | { | ||
1338 | BUG_ON(preemptible()); | ||
1339 | |||
1340 | xen_mc_batch(); /* disables interrupts */ | ||
1341 | |||
1342 | /* Update while interrupts are disabled, so its atomic with | ||
1343 | respect to ipis */ | ||
1344 | percpu_write(xen_cr3, cr3); | ||
1345 | |||
1346 | __xen_write_cr3(true, cr3); | ||
1347 | |||
1348 | #ifdef CONFIG_X86_64 | ||
1349 | { | ||
1350 | pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); | ||
1351 | if (user_pgd) | ||
1352 | __xen_write_cr3(false, __pa(user_pgd)); | ||
1353 | else | ||
1354 | __xen_write_cr3(false, 0); | ||
1355 | } | ||
1356 | #endif | ||
1357 | |||
1358 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ | ||
1359 | } | ||
1360 | |||
1361 | static int xen_pgd_alloc(struct mm_struct *mm) | ||
1362 | { | ||
1363 | pgd_t *pgd = mm->pgd; | ||
1364 | int ret = 0; | ||
1365 | |||
1366 | BUG_ON(PagePinned(virt_to_page(pgd))); | ||
1367 | |||
1368 | #ifdef CONFIG_X86_64 | ||
1369 | { | ||
1370 | struct page *page = virt_to_page(pgd); | ||
1371 | pgd_t *user_pgd; | ||
1372 | |||
1373 | BUG_ON(page->private != 0); | ||
1374 | |||
1375 | ret = -ENOMEM; | ||
1376 | |||
1377 | user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); | ||
1378 | page->private = (unsigned long)user_pgd; | ||
1379 | |||
1380 | if (user_pgd != NULL) { | ||
1381 | user_pgd[pgd_index(VSYSCALL_START)] = | ||
1382 | __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); | ||
1383 | ret = 0; | ||
1384 | } | ||
1385 | |||
1386 | BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); | ||
1387 | } | ||
1388 | #endif | ||
1389 | |||
1390 | return ret; | ||
1391 | } | ||
1392 | |||
1393 | static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
1394 | { | ||
1395 | #ifdef CONFIG_X86_64 | ||
1396 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | ||
1397 | |||
1398 | if (user_pgd) | ||
1399 | free_page((unsigned long)user_pgd); | ||
1400 | #endif | ||
1401 | } | ||
1402 | |||
1403 | #ifdef CONFIG_HIGHPTE | ||
1404 | static void *xen_kmap_atomic_pte(struct page *page, enum km_type type) | ||
1405 | { | ||
1406 | pgprot_t prot = PAGE_KERNEL; | ||
1407 | |||
1408 | if (PagePinned(page)) | ||
1409 | prot = PAGE_KERNEL_RO; | ||
1410 | |||
1411 | if (0 && PageHighMem(page)) | ||
1412 | printk("mapping highpte %lx type %d prot %s\n", | ||
1413 | page_to_pfn(page), type, | ||
1414 | (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ"); | ||
1415 | |||
1416 | return kmap_atomic_prot(page, type, prot); | ||
1417 | } | ||
1418 | #endif | ||
1419 | |||
1420 | #ifdef CONFIG_X86_32 | ||
1421 | static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) | ||
1422 | { | ||
1423 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ | ||
1424 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | ||
1425 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | ||
1426 | pte_val_ma(pte)); | ||
1427 | |||
1428 | return pte; | ||
1429 | } | ||
1430 | |||
1431 | /* Init-time set_pte while constructing initial pagetables, which | ||
1432 | doesn't allow RO pagetable pages to be remapped RW */ | ||
1433 | static __init void xen_set_pte_init(pte_t *ptep, pte_t pte) | ||
1434 | { | ||
1435 | pte = mask_rw_pte(ptep, pte); | ||
1436 | |||
1437 | xen_set_pte(ptep, pte); | ||
1438 | } | ||
1439 | #endif | ||
1440 | |||
1441 | /* Early in boot, while setting up the initial pagetable, assume | ||
1442 | everything is pinned. */ | ||
1443 | static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) | ||
1444 | { | ||
1445 | #ifdef CONFIG_FLATMEM | ||
1446 | BUG_ON(mem_map); /* should only be used early */ | ||
1447 | #endif | ||
1448 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | ||
1449 | } | ||
1450 | |||
1451 | /* Early release_pte assumes that all pts are pinned, since there's | ||
1452 | only init_mm and anything attached to that is pinned. */ | ||
1453 | static void xen_release_pte_init(unsigned long pfn) | ||
1454 | { | ||
1455 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | ||
1456 | } | ||
1457 | |||
1458 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) | ||
1459 | { | ||
1460 | struct mmuext_op op; | ||
1461 | op.cmd = cmd; | ||
1462 | op.arg1.mfn = pfn_to_mfn(pfn); | ||
1463 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | ||
1464 | BUG(); | ||
1465 | } | ||
1466 | |||
1467 | /* This needs to make sure the new pte page is pinned iff its being | ||
1468 | attached to a pinned pagetable. */ | ||
1469 | static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level) | ||
1470 | { | ||
1471 | struct page *page = pfn_to_page(pfn); | ||
1472 | |||
1473 | if (PagePinned(virt_to_page(mm->pgd))) { | ||
1474 | SetPagePinned(page); | ||
1475 | |||
1476 | vm_unmap_aliases(); | ||
1477 | if (!PageHighMem(page)) { | ||
1478 | make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn))); | ||
1479 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | ||
1480 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | ||
1481 | } else { | ||
1482 | /* make sure there are no stray mappings of | ||
1483 | this page */ | ||
1484 | kmap_flush_unused(); | ||
1485 | } | ||
1486 | } | ||
1487 | } | ||
1488 | |||
1489 | static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) | ||
1490 | { | ||
1491 | xen_alloc_ptpage(mm, pfn, PT_PTE); | ||
1492 | } | ||
1493 | |||
1494 | static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) | ||
1495 | { | ||
1496 | xen_alloc_ptpage(mm, pfn, PT_PMD); | ||
1497 | } | ||
1498 | |||
1499 | /* This should never happen until we're OK to use struct page */ | ||
1500 | static void xen_release_ptpage(unsigned long pfn, unsigned level) | ||
1501 | { | ||
1502 | struct page *page = pfn_to_page(pfn); | ||
1503 | |||
1504 | if (PagePinned(page)) { | ||
1505 | if (!PageHighMem(page)) { | ||
1506 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | ||
1507 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); | ||
1508 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | ||
1509 | } | ||
1510 | ClearPagePinned(page); | ||
1511 | } | ||
1512 | } | ||
1513 | |||
1514 | static void xen_release_pte(unsigned long pfn) | ||
1515 | { | ||
1516 | xen_release_ptpage(pfn, PT_PTE); | ||
1517 | } | ||
1518 | |||
1519 | static void xen_release_pmd(unsigned long pfn) | ||
1520 | { | ||
1521 | xen_release_ptpage(pfn, PT_PMD); | ||
1522 | } | ||
1523 | |||
1524 | #if PAGETABLE_LEVELS == 4 | ||
1525 | static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) | ||
1526 | { | ||
1527 | xen_alloc_ptpage(mm, pfn, PT_PUD); | ||
1528 | } | ||
1529 | |||
1530 | static void xen_release_pud(unsigned long pfn) | ||
1531 | { | ||
1532 | xen_release_ptpage(pfn, PT_PUD); | ||
1533 | } | ||
1534 | #endif | ||
1535 | |||
1536 | void __init xen_reserve_top(void) | ||
1537 | { | ||
1538 | #ifdef CONFIG_X86_32 | ||
1539 | unsigned long top = HYPERVISOR_VIRT_START; | ||
1540 | struct xen_platform_parameters pp; | ||
1541 | |||
1542 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | ||
1543 | top = pp.virt_start; | ||
1544 | |||
1545 | reserve_top_address(-top); | ||
1546 | #endif /* CONFIG_X86_32 */ | ||
1547 | } | ||
1548 | |||
1549 | /* | ||
1550 | * Like __va(), but returns address in the kernel mapping (which is | ||
1551 | * all we have until the physical memory mapping has been set up. | ||
1552 | */ | ||
1553 | static void *__ka(phys_addr_t paddr) | ||
1554 | { | ||
1555 | #ifdef CONFIG_X86_64 | ||
1556 | return (void *)(paddr + __START_KERNEL_map); | ||
1557 | #else | ||
1558 | return __va(paddr); | ||
1559 | #endif | ||
1560 | } | ||
1561 | |||
1562 | /* Convert a machine address to physical address */ | ||
1563 | static unsigned long m2p(phys_addr_t maddr) | ||
1564 | { | ||
1565 | phys_addr_t paddr; | ||
1566 | |||
1567 | maddr &= PTE_PFN_MASK; | ||
1568 | paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; | ||
1569 | |||
1570 | return paddr; | ||
1571 | } | ||
1572 | |||
1573 | /* Convert a machine address to kernel virtual */ | ||
1574 | static void *m2v(phys_addr_t maddr) | ||
1575 | { | ||
1576 | return __ka(m2p(maddr)); | ||
1577 | } | ||
1578 | |||
1579 | static void set_page_prot(void *addr, pgprot_t prot) | ||
1580 | { | ||
1581 | unsigned long pfn = __pa(addr) >> PAGE_SHIFT; | ||
1582 | pte_t pte = pfn_pte(pfn, prot); | ||
1583 | |||
1584 | if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) | ||
1585 | BUG(); | ||
1586 | } | ||
1587 | |||
1588 | static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) | ||
1589 | { | ||
1590 | unsigned pmdidx, pteidx; | ||
1591 | unsigned ident_pte; | ||
1592 | unsigned long pfn; | ||
1593 | |||
1594 | ident_pte = 0; | ||
1595 | pfn = 0; | ||
1596 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { | ||
1597 | pte_t *pte_page; | ||
1598 | |||
1599 | /* Reuse or allocate a page of ptes */ | ||
1600 | if (pmd_present(pmd[pmdidx])) | ||
1601 | pte_page = m2v(pmd[pmdidx].pmd); | ||
1602 | else { | ||
1603 | /* Check for free pte pages */ | ||
1604 | if (ident_pte == ARRAY_SIZE(level1_ident_pgt)) | ||
1605 | break; | ||
1606 | |||
1607 | pte_page = &level1_ident_pgt[ident_pte]; | ||
1608 | ident_pte += PTRS_PER_PTE; | ||
1609 | |||
1610 | pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); | ||
1611 | } | ||
1612 | |||
1613 | /* Install mappings */ | ||
1614 | for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { | ||
1615 | pte_t pte; | ||
1616 | |||
1617 | if (pfn > max_pfn_mapped) | ||
1618 | max_pfn_mapped = pfn; | ||
1619 | |||
1620 | if (!pte_none(pte_page[pteidx])) | ||
1621 | continue; | ||
1622 | |||
1623 | pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); | ||
1624 | pte_page[pteidx] = pte; | ||
1625 | } | ||
1626 | } | ||
1627 | |||
1628 | for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) | ||
1629 | set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); | ||
1630 | |||
1631 | set_page_prot(pmd, PAGE_KERNEL_RO); | ||
1632 | } | ||
1633 | |||
1634 | #ifdef CONFIG_X86_64 | ||
1635 | static void convert_pfn_mfn(void *v) | ||
1636 | { | ||
1637 | pte_t *pte = v; | ||
1638 | int i; | ||
1639 | |||
1640 | /* All levels are converted the same way, so just treat them | ||
1641 | as ptes. */ | ||
1642 | for (i = 0; i < PTRS_PER_PTE; i++) | ||
1643 | pte[i] = xen_make_pte(pte[i].pte); | ||
1644 | } | ||
1645 | |||
1646 | /* | ||
1647 | * Set up the inital kernel pagetable. | ||
1648 | * | ||
1649 | * We can construct this by grafting the Xen provided pagetable into | ||
1650 | * head_64.S's preconstructed pagetables. We copy the Xen L2's into | ||
1651 | * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This | ||
1652 | * means that only the kernel has a physical mapping to start with - | ||
1653 | * but that's enough to get __va working. We need to fill in the rest | ||
1654 | * of the physical mapping once some sort of allocator has been set | ||
1655 | * up. | ||
1656 | */ | ||
1657 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | ||
1658 | unsigned long max_pfn) | ||
1659 | { | ||
1660 | pud_t *l3; | ||
1661 | pmd_t *l2; | ||
1662 | |||
1663 | /* Zap identity mapping */ | ||
1664 | init_level4_pgt[0] = __pgd(0); | ||
1665 | |||
1666 | /* Pre-constructed entries are in pfn, so convert to mfn */ | ||
1667 | convert_pfn_mfn(init_level4_pgt); | ||
1668 | convert_pfn_mfn(level3_ident_pgt); | ||
1669 | convert_pfn_mfn(level3_kernel_pgt); | ||
1670 | |||
1671 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); | ||
1672 | l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); | ||
1673 | |||
1674 | memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1675 | memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1676 | |||
1677 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd); | ||
1678 | l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud); | ||
1679 | memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1680 | |||
1681 | /* Set up identity map */ | ||
1682 | xen_map_identity_early(level2_ident_pgt, max_pfn); | ||
1683 | |||
1684 | /* Make pagetable pieces RO */ | ||
1685 | set_page_prot(init_level4_pgt, PAGE_KERNEL_RO); | ||
1686 | set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); | ||
1687 | set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); | ||
1688 | set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); | ||
1689 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | ||
1690 | set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); | ||
1691 | |||
1692 | /* Pin down new L4 */ | ||
1693 | pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, | ||
1694 | PFN_DOWN(__pa_symbol(init_level4_pgt))); | ||
1695 | |||
1696 | /* Unpin Xen-provided one */ | ||
1697 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | ||
1698 | |||
1699 | /* Switch over */ | ||
1700 | pgd = init_level4_pgt; | ||
1701 | |||
1702 | /* | ||
1703 | * At this stage there can be no user pgd, and no page | ||
1704 | * structure to attach it to, so make sure we just set kernel | ||
1705 | * pgd. | ||
1706 | */ | ||
1707 | xen_mc_batch(); | ||
1708 | __xen_write_cr3(true, __pa(pgd)); | ||
1709 | xen_mc_issue(PARAVIRT_LAZY_CPU); | ||
1710 | |||
1711 | reserve_early(__pa(xen_start_info->pt_base), | ||
1712 | __pa(xen_start_info->pt_base + | ||
1713 | xen_start_info->nr_pt_frames * PAGE_SIZE), | ||
1714 | "XEN PAGETABLES"); | ||
1715 | |||
1716 | return pgd; | ||
1717 | } | ||
1718 | #else /* !CONFIG_X86_64 */ | ||
1719 | static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss; | ||
1720 | |||
1721 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | ||
1722 | unsigned long max_pfn) | ||
1723 | { | ||
1724 | pmd_t *kernel_pmd; | ||
1725 | |||
1726 | init_pg_tables_start = __pa(pgd); | ||
1727 | init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE; | ||
1728 | max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024); | ||
1729 | |||
1730 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); | ||
1731 | memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); | ||
1732 | |||
1733 | xen_map_identity_early(level2_kernel_pgt, max_pfn); | ||
1734 | |||
1735 | memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD); | ||
1736 | set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY], | ||
1737 | __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT)); | ||
1738 | |||
1739 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | ||
1740 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | ||
1741 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); | ||
1742 | |||
1743 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | ||
1744 | |||
1745 | xen_write_cr3(__pa(swapper_pg_dir)); | ||
1746 | |||
1747 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir))); | ||
1748 | |||
1749 | return swapper_pg_dir; | ||
1750 | } | ||
1751 | #endif /* CONFIG_X86_64 */ | ||
1752 | |||
1753 | static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot) | ||
1754 | { | ||
1755 | pte_t pte; | ||
1756 | |||
1757 | phys >>= PAGE_SHIFT; | ||
1758 | |||
1759 | switch (idx) { | ||
1760 | case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: | ||
1761 | #ifdef CONFIG_X86_F00F_BUG | ||
1762 | case FIX_F00F_IDT: | ||
1763 | #endif | ||
1764 | #ifdef CONFIG_X86_32 | ||
1765 | case FIX_WP_TEST: | ||
1766 | case FIX_VDSO: | ||
1767 | # ifdef CONFIG_HIGHMEM | ||
1768 | case FIX_KMAP_BEGIN ... FIX_KMAP_END: | ||
1769 | # endif | ||
1770 | #else | ||
1771 | case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE: | ||
1772 | #endif | ||
1773 | #ifdef CONFIG_X86_LOCAL_APIC | ||
1774 | case FIX_APIC_BASE: /* maps dummy local APIC */ | ||
1775 | #endif | ||
1776 | pte = pfn_pte(phys, prot); | ||
1777 | break; | ||
1778 | |||
1779 | default: | ||
1780 | pte = mfn_pte(phys, prot); | ||
1781 | break; | ||
1782 | } | ||
1783 | |||
1784 | __native_set_fixmap(idx, pte); | ||
1785 | |||
1786 | #ifdef CONFIG_X86_64 | ||
1787 | /* Replicate changes to map the vsyscall page into the user | ||
1788 | pagetable vsyscall mapping. */ | ||
1789 | if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) { | ||
1790 | unsigned long vaddr = __fix_to_virt(idx); | ||
1791 | set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); | ||
1792 | } | ||
1793 | #endif | ||
1794 | } | ||
1795 | |||
1796 | __init void xen_post_allocator_init(void) | ||
1797 | { | ||
1798 | pv_mmu_ops.set_pte = xen_set_pte; | ||
1799 | pv_mmu_ops.set_pmd = xen_set_pmd; | ||
1800 | pv_mmu_ops.set_pud = xen_set_pud; | ||
1801 | #if PAGETABLE_LEVELS == 4 | ||
1802 | pv_mmu_ops.set_pgd = xen_set_pgd; | ||
1803 | #endif | ||
1804 | |||
1805 | /* This will work as long as patching hasn't happened yet | ||
1806 | (which it hasn't) */ | ||
1807 | pv_mmu_ops.alloc_pte = xen_alloc_pte; | ||
1808 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | ||
1809 | pv_mmu_ops.release_pte = xen_release_pte; | ||
1810 | pv_mmu_ops.release_pmd = xen_release_pmd; | ||
1811 | #if PAGETABLE_LEVELS == 4 | ||
1812 | pv_mmu_ops.alloc_pud = xen_alloc_pud; | ||
1813 | pv_mmu_ops.release_pud = xen_release_pud; | ||
1814 | #endif | ||
1815 | |||
1816 | #ifdef CONFIG_X86_64 | ||
1817 | SetPagePinned(virt_to_page(level3_user_vsyscall)); | ||
1818 | #endif | ||
1819 | xen_mark_init_mm_pinned(); | ||
1820 | } | ||
1821 | |||
1822 | |||
1823 | const struct pv_mmu_ops xen_mmu_ops __initdata = { | ||
1824 | .pagetable_setup_start = xen_pagetable_setup_start, | ||
1825 | .pagetable_setup_done = xen_pagetable_setup_done, | ||
1826 | |||
1827 | .read_cr2 = xen_read_cr2, | ||
1828 | .write_cr2 = xen_write_cr2, | ||
1829 | |||
1830 | .read_cr3 = xen_read_cr3, | ||
1831 | .write_cr3 = xen_write_cr3, | ||
1832 | |||
1833 | .flush_tlb_user = xen_flush_tlb, | ||
1834 | .flush_tlb_kernel = xen_flush_tlb, | ||
1835 | .flush_tlb_single = xen_flush_tlb_single, | ||
1836 | .flush_tlb_others = xen_flush_tlb_others, | ||
1837 | |||
1838 | .pte_update = paravirt_nop, | ||
1839 | .pte_update_defer = paravirt_nop, | ||
1840 | |||
1841 | .pgd_alloc = xen_pgd_alloc, | ||
1842 | .pgd_free = xen_pgd_free, | ||
1843 | |||
1844 | .alloc_pte = xen_alloc_pte_init, | ||
1845 | .release_pte = xen_release_pte_init, | ||
1846 | .alloc_pmd = xen_alloc_pte_init, | ||
1847 | .alloc_pmd_clone = paravirt_nop, | ||
1848 | .release_pmd = xen_release_pte_init, | ||
1849 | |||
1850 | #ifdef CONFIG_HIGHPTE | ||
1851 | .kmap_atomic_pte = xen_kmap_atomic_pte, | ||
1852 | #endif | ||
1853 | |||
1854 | #ifdef CONFIG_X86_64 | ||
1855 | .set_pte = xen_set_pte, | ||
1856 | #else | ||
1857 | .set_pte = xen_set_pte_init, | ||
1858 | #endif | ||
1859 | .set_pte_at = xen_set_pte_at, | ||
1860 | .set_pmd = xen_set_pmd_hyper, | ||
1861 | |||
1862 | .ptep_modify_prot_start = __ptep_modify_prot_start, | ||
1863 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | ||
1864 | |||
1865 | .pte_val = PV_CALLEE_SAVE(xen_pte_val), | ||
1866 | .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), | ||
1867 | |||
1868 | .make_pte = PV_CALLEE_SAVE(xen_make_pte), | ||
1869 | .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), | ||
1870 | |||
1871 | #ifdef CONFIG_X86_PAE | ||
1872 | .set_pte_atomic = xen_set_pte_atomic, | ||
1873 | .set_pte_present = xen_set_pte_at, | ||
1874 | .pte_clear = xen_pte_clear, | ||
1875 | .pmd_clear = xen_pmd_clear, | ||
1876 | #endif /* CONFIG_X86_PAE */ | ||
1877 | .set_pud = xen_set_pud_hyper, | ||
1878 | |||
1879 | .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), | ||
1880 | .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), | ||
1881 | |||
1882 | #if PAGETABLE_LEVELS == 4 | ||
1883 | .pud_val = PV_CALLEE_SAVE(xen_pud_val), | ||
1884 | .make_pud = PV_CALLEE_SAVE(xen_make_pud), | ||
1885 | .set_pgd = xen_set_pgd_hyper, | ||
1886 | |||
1887 | .alloc_pud = xen_alloc_pte_init, | ||
1888 | .release_pud = xen_release_pte_init, | ||
1889 | #endif /* PAGETABLE_LEVELS == 4 */ | ||
1890 | |||
1891 | .activate_mm = xen_activate_mm, | ||
1892 | .dup_mmap = xen_dup_mmap, | ||
1893 | .exit_mmap = xen_exit_mmap, | ||
1894 | |||
1895 | .lazy_mode = { | ||
1896 | .enter = paravirt_enter_lazy_mmu, | ||
1897 | .leave = xen_leave_lazy, | ||
1898 | }, | ||
1899 | |||
1900 | .set_fixmap = xen_set_fixmap, | ||
1901 | }; | ||
1902 | |||
1903 | |||
1159 | #ifdef CONFIG_XEN_DEBUG_FS | 1904 | #ifdef CONFIG_XEN_DEBUG_FS |
1160 | 1905 | ||
1161 | static struct dentry *d_mmu_debug; | 1906 | static struct dentry *d_mmu_debug; |
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h index 98d71659da5a..24d1b44a337d 100644 --- a/arch/x86/xen/mmu.h +++ b/arch/x86/xen/mmu.h | |||
@@ -54,4 +54,7 @@ pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t | |||
54 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | 54 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, |
55 | pte_t *ptep, pte_t pte); | 55 | pte_t *ptep, pte_t pte); |
56 | 56 | ||
57 | unsigned long xen_read_cr2_direct(void); | ||
58 | |||
59 | extern const struct pv_mmu_ops xen_mmu_ops; | ||
57 | #endif /* _XEN_MMU_H */ | 60 | #endif /* _XEN_MMU_H */ |
diff --git a/arch/x86/xen/multicalls.c b/arch/x86/xen/multicalls.c index c738644b5435..8bff7e7c290b 100644 --- a/arch/x86/xen/multicalls.c +++ b/arch/x86/xen/multicalls.c | |||
@@ -39,6 +39,7 @@ struct mc_buffer { | |||
39 | struct multicall_entry entries[MC_BATCH]; | 39 | struct multicall_entry entries[MC_BATCH]; |
40 | #if MC_DEBUG | 40 | #if MC_DEBUG |
41 | struct multicall_entry debug[MC_BATCH]; | 41 | struct multicall_entry debug[MC_BATCH]; |
42 | void *caller[MC_BATCH]; | ||
42 | #endif | 43 | #endif |
43 | unsigned char args[MC_ARGS]; | 44 | unsigned char args[MC_ARGS]; |
44 | struct callback { | 45 | struct callback { |
@@ -154,11 +155,12 @@ void xen_mc_flush(void) | |||
154 | ret, smp_processor_id()); | 155 | ret, smp_processor_id()); |
155 | dump_stack(); | 156 | dump_stack(); |
156 | for (i = 0; i < b->mcidx; i++) { | 157 | for (i = 0; i < b->mcidx; i++) { |
157 | printk(KERN_DEBUG " call %2d/%d: op=%lu arg=[%lx] result=%ld\n", | 158 | printk(KERN_DEBUG " call %2d/%d: op=%lu arg=[%lx] result=%ld\t%pF\n", |
158 | i+1, b->mcidx, | 159 | i+1, b->mcidx, |
159 | b->debug[i].op, | 160 | b->debug[i].op, |
160 | b->debug[i].args[0], | 161 | b->debug[i].args[0], |
161 | b->entries[i].result); | 162 | b->entries[i].result, |
163 | b->caller[i]); | ||
162 | } | 164 | } |
163 | } | 165 | } |
164 | #endif | 166 | #endif |
@@ -168,8 +170,6 @@ void xen_mc_flush(void) | |||
168 | } else | 170 | } else |
169 | BUG_ON(b->argidx != 0); | 171 | BUG_ON(b->argidx != 0); |
170 | 172 | ||
171 | local_irq_restore(flags); | ||
172 | |||
173 | for (i = 0; i < b->cbidx; i++) { | 173 | for (i = 0; i < b->cbidx; i++) { |
174 | struct callback *cb = &b->callbacks[i]; | 174 | struct callback *cb = &b->callbacks[i]; |
175 | 175 | ||
@@ -177,7 +177,9 @@ void xen_mc_flush(void) | |||
177 | } | 177 | } |
178 | b->cbidx = 0; | 178 | b->cbidx = 0; |
179 | 179 | ||
180 | BUG_ON(ret); | 180 | local_irq_restore(flags); |
181 | |||
182 | WARN_ON(ret); | ||
181 | } | 183 | } |
182 | 184 | ||
183 | struct multicall_space __xen_mc_entry(size_t args) | 185 | struct multicall_space __xen_mc_entry(size_t args) |
@@ -197,6 +199,9 @@ struct multicall_space __xen_mc_entry(size_t args) | |||
197 | } | 199 | } |
198 | 200 | ||
199 | ret.mc = &b->entries[b->mcidx]; | 201 | ret.mc = &b->entries[b->mcidx]; |
202 | #ifdef MC_DEBUG | ||
203 | b->caller[b->mcidx] = __builtin_return_address(0); | ||
204 | #endif | ||
200 | b->mcidx++; | 205 | b->mcidx++; |
201 | ret.args = &b->args[argidx]; | 206 | ret.args = &b->args[argidx]; |
202 | b->argidx = argidx + args; | 207 | b->argidx = argidx + args; |
diff --git a/arch/x86/xen/multicalls.h b/arch/x86/xen/multicalls.h index fa3e10725d98..9e565da5d1f7 100644 --- a/arch/x86/xen/multicalls.h +++ b/arch/x86/xen/multicalls.h | |||
@@ -41,7 +41,7 @@ static inline void xen_mc_issue(unsigned mode) | |||
41 | xen_mc_flush(); | 41 | xen_mc_flush(); |
42 | 42 | ||
43 | /* restore flags saved in xen_mc_batch */ | 43 | /* restore flags saved in xen_mc_batch */ |
44 | local_irq_restore(x86_read_percpu(xen_mc_irq_flags)); | 44 | local_irq_restore(percpu_read(xen_mc_irq_flags)); |
45 | } | 45 | } |
46 | 46 | ||
47 | /* Set up a callback to be called when the current batch is flushed */ | 47 | /* Set up a callback to be called when the current batch is flushed */ |
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c index c44e2069c7c7..8d470562ffc9 100644 --- a/arch/x86/xen/smp.c +++ b/arch/x86/xen/smp.c | |||
@@ -50,11 +50,7 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id); | |||
50 | */ | 50 | */ |
51 | static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id) | 51 | static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id) |
52 | { | 52 | { |
53 | #ifdef CONFIG_X86_32 | 53 | inc_irq_stat(irq_resched_count); |
54 | __get_cpu_var(irq_stat).irq_resched_count++; | ||
55 | #else | ||
56 | add_pda(irq_resched_count, 1); | ||
57 | #endif | ||
58 | 54 | ||
59 | return IRQ_HANDLED; | 55 | return IRQ_HANDLED; |
60 | } | 56 | } |
@@ -78,7 +74,7 @@ static __cpuinit void cpu_bringup(void) | |||
78 | xen_setup_cpu_clockevents(); | 74 | xen_setup_cpu_clockevents(); |
79 | 75 | ||
80 | cpu_set(cpu, cpu_online_map); | 76 | cpu_set(cpu, cpu_online_map); |
81 | x86_write_percpu(cpu_state, CPU_ONLINE); | 77 | percpu_write(cpu_state, CPU_ONLINE); |
82 | wmb(); | 78 | wmb(); |
83 | 79 | ||
84 | /* We can take interrupts now: we're officially "up". */ | 80 | /* We can take interrupts now: we're officially "up". */ |
@@ -174,7 +170,7 @@ static void __init xen_smp_prepare_boot_cpu(void) | |||
174 | 170 | ||
175 | /* We've switched to the "real" per-cpu gdt, so make sure the | 171 | /* We've switched to the "real" per-cpu gdt, so make sure the |
176 | old memory can be recycled */ | 172 | old memory can be recycled */ |
177 | make_lowmem_page_readwrite(&per_cpu_var(gdt_page)); | 173 | make_lowmem_page_readwrite(xen_initial_gdt); |
178 | 174 | ||
179 | xen_setup_vcpu_info_placement(); | 175 | xen_setup_vcpu_info_placement(); |
180 | } | 176 | } |
@@ -223,6 +219,7 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle) | |||
223 | { | 219 | { |
224 | struct vcpu_guest_context *ctxt; | 220 | struct vcpu_guest_context *ctxt; |
225 | struct desc_struct *gdt; | 221 | struct desc_struct *gdt; |
222 | unsigned long gdt_mfn; | ||
226 | 223 | ||
227 | if (cpumask_test_and_set_cpu(cpu, xen_cpu_initialized_map)) | 224 | if (cpumask_test_and_set_cpu(cpu, xen_cpu_initialized_map)) |
228 | return 0; | 225 | return 0; |
@@ -239,6 +236,8 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle) | |||
239 | ctxt->user_regs.ss = __KERNEL_DS; | 236 | ctxt->user_regs.ss = __KERNEL_DS; |
240 | #ifdef CONFIG_X86_32 | 237 | #ifdef CONFIG_X86_32 |
241 | ctxt->user_regs.fs = __KERNEL_PERCPU; | 238 | ctxt->user_regs.fs = __KERNEL_PERCPU; |
239 | #else | ||
240 | ctxt->gs_base_kernel = per_cpu_offset(cpu); | ||
242 | #endif | 241 | #endif |
243 | ctxt->user_regs.eip = (unsigned long)cpu_bringup_and_idle; | 242 | ctxt->user_regs.eip = (unsigned long)cpu_bringup_and_idle; |
244 | ctxt->user_regs.eflags = 0x1000; /* IOPL_RING1 */ | 243 | ctxt->user_regs.eflags = 0x1000; /* IOPL_RING1 */ |
@@ -250,9 +249,12 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle) | |||
250 | ctxt->ldt_ents = 0; | 249 | ctxt->ldt_ents = 0; |
251 | 250 | ||
252 | BUG_ON((unsigned long)gdt & ~PAGE_MASK); | 251 | BUG_ON((unsigned long)gdt & ~PAGE_MASK); |
252 | |||
253 | gdt_mfn = arbitrary_virt_to_mfn(gdt); | ||
253 | make_lowmem_page_readonly(gdt); | 254 | make_lowmem_page_readonly(gdt); |
255 | make_lowmem_page_readonly(mfn_to_virt(gdt_mfn)); | ||
254 | 256 | ||
255 | ctxt->gdt_frames[0] = virt_to_mfn(gdt); | 257 | ctxt->gdt_frames[0] = gdt_mfn; |
256 | ctxt->gdt_ents = GDT_ENTRIES; | 258 | ctxt->gdt_ents = GDT_ENTRIES; |
257 | 259 | ||
258 | ctxt->user_regs.cs = __KERNEL_CS; | 260 | ctxt->user_regs.cs = __KERNEL_CS; |
@@ -283,23 +285,14 @@ static int __cpuinit xen_cpu_up(unsigned int cpu) | |||
283 | struct task_struct *idle = idle_task(cpu); | 285 | struct task_struct *idle = idle_task(cpu); |
284 | int rc; | 286 | int rc; |
285 | 287 | ||
286 | #ifdef CONFIG_X86_64 | ||
287 | /* Allocate node local memory for AP pdas */ | ||
288 | WARN_ON(cpu == 0); | ||
289 | if (cpu > 0) { | ||
290 | rc = get_local_pda(cpu); | ||
291 | if (rc) | ||
292 | return rc; | ||
293 | } | ||
294 | #endif | ||
295 | |||
296 | #ifdef CONFIG_X86_32 | ||
297 | init_gdt(cpu); | ||
298 | per_cpu(current_task, cpu) = idle; | 288 | per_cpu(current_task, cpu) = idle; |
289 | #ifdef CONFIG_X86_32 | ||
299 | irq_ctx_init(cpu); | 290 | irq_ctx_init(cpu); |
300 | #else | 291 | #else |
301 | cpu_pda(cpu)->pcurrent = idle; | ||
302 | clear_tsk_thread_flag(idle, TIF_FORK); | 292 | clear_tsk_thread_flag(idle, TIF_FORK); |
293 | per_cpu(kernel_stack, cpu) = | ||
294 | (unsigned long)task_stack_page(idle) - | ||
295 | KERNEL_STACK_OFFSET + THREAD_SIZE; | ||
303 | #endif | 296 | #endif |
304 | xen_setup_timer(cpu); | 297 | xen_setup_timer(cpu); |
305 | xen_init_lock_cpu(cpu); | 298 | xen_init_lock_cpu(cpu); |
@@ -445,11 +438,7 @@ static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id) | |||
445 | { | 438 | { |
446 | irq_enter(); | 439 | irq_enter(); |
447 | generic_smp_call_function_interrupt(); | 440 | generic_smp_call_function_interrupt(); |
448 | #ifdef CONFIG_X86_32 | 441 | inc_irq_stat(irq_call_count); |
449 | __get_cpu_var(irq_stat).irq_call_count++; | ||
450 | #else | ||
451 | add_pda(irq_call_count, 1); | ||
452 | #endif | ||
453 | irq_exit(); | 442 | irq_exit(); |
454 | 443 | ||
455 | return IRQ_HANDLED; | 444 | return IRQ_HANDLED; |
@@ -459,11 +448,7 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id) | |||
459 | { | 448 | { |
460 | irq_enter(); | 449 | irq_enter(); |
461 | generic_smp_call_function_single_interrupt(); | 450 | generic_smp_call_function_single_interrupt(); |
462 | #ifdef CONFIG_X86_32 | 451 | inc_irq_stat(irq_call_count); |
463 | __get_cpu_var(irq_stat).irq_call_count++; | ||
464 | #else | ||
465 | add_pda(irq_call_count, 1); | ||
466 | #endif | ||
467 | irq_exit(); | 452 | irq_exit(); |
468 | 453 | ||
469 | return IRQ_HANDLED; | 454 | return IRQ_HANDLED; |
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c index 212ffe012b76..95be7b434724 100644 --- a/arch/x86/xen/suspend.c +++ b/arch/x86/xen/suspend.c | |||
@@ -6,6 +6,7 @@ | |||
6 | 6 | ||
7 | #include <asm/xen/hypercall.h> | 7 | #include <asm/xen/hypercall.h> |
8 | #include <asm/xen/page.h> | 8 | #include <asm/xen/page.h> |
9 | #include <asm/fixmap.h> | ||
9 | 10 | ||
10 | #include "xen-ops.h" | 11 | #include "xen-ops.h" |
11 | #include "mmu.h" | 12 | #include "mmu.h" |
diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S new file mode 100644 index 000000000000..79d7362ad6d1 --- /dev/null +++ b/arch/x86/xen/xen-asm.S | |||
@@ -0,0 +1,142 @@ | |||
1 | /* | ||
2 | * Asm versions of Xen pv-ops, suitable for either direct use or | ||
3 | * inlining. The inline versions are the same as the direct-use | ||
4 | * versions, with the pre- and post-amble chopped off. | ||
5 | * | ||
6 | * This code is encoded for size rather than absolute efficiency, with | ||
7 | * a view to being able to inline as much as possible. | ||
8 | * | ||
9 | * We only bother with direct forms (ie, vcpu in percpu data) of the | ||
10 | * operations here; the indirect forms are better handled in C, since | ||
11 | * they're generally too large to inline anyway. | ||
12 | */ | ||
13 | |||
14 | #include <asm/asm-offsets.h> | ||
15 | #include <asm/percpu.h> | ||
16 | #include <asm/processor-flags.h> | ||
17 | |||
18 | #include "xen-asm.h" | ||
19 | |||
20 | /* | ||
21 | * Enable events. This clears the event mask and tests the pending | ||
22 | * event status with one and operation. If there are pending events, | ||
23 | * then enter the hypervisor to get them handled. | ||
24 | */ | ||
25 | ENTRY(xen_irq_enable_direct) | ||
26 | /* Unmask events */ | ||
27 | movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask | ||
28 | |||
29 | /* | ||
30 | * Preempt here doesn't matter because that will deal with any | ||
31 | * pending interrupts. The pending check may end up being run | ||
32 | * on the wrong CPU, but that doesn't hurt. | ||
33 | */ | ||
34 | |||
35 | /* Test for pending */ | ||
36 | testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending | ||
37 | jz 1f | ||
38 | |||
39 | 2: call check_events | ||
40 | 1: | ||
41 | ENDPATCH(xen_irq_enable_direct) | ||
42 | ret | ||
43 | ENDPROC(xen_irq_enable_direct) | ||
44 | RELOC(xen_irq_enable_direct, 2b+1) | ||
45 | |||
46 | |||
47 | /* | ||
48 | * Disabling events is simply a matter of making the event mask | ||
49 | * non-zero. | ||
50 | */ | ||
51 | ENTRY(xen_irq_disable_direct) | ||
52 | movb $1, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask | ||
53 | ENDPATCH(xen_irq_disable_direct) | ||
54 | ret | ||
55 | ENDPROC(xen_irq_disable_direct) | ||
56 | RELOC(xen_irq_disable_direct, 0) | ||
57 | |||
58 | /* | ||
59 | * (xen_)save_fl is used to get the current interrupt enable status. | ||
60 | * Callers expect the status to be in X86_EFLAGS_IF, and other bits | ||
61 | * may be set in the return value. We take advantage of this by | ||
62 | * making sure that X86_EFLAGS_IF has the right value (and other bits | ||
63 | * in that byte are 0), but other bits in the return value are | ||
64 | * undefined. We need to toggle the state of the bit, because Xen and | ||
65 | * x86 use opposite senses (mask vs enable). | ||
66 | */ | ||
67 | ENTRY(xen_save_fl_direct) | ||
68 | testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask | ||
69 | setz %ah | ||
70 | addb %ah, %ah | ||
71 | ENDPATCH(xen_save_fl_direct) | ||
72 | ret | ||
73 | ENDPROC(xen_save_fl_direct) | ||
74 | RELOC(xen_save_fl_direct, 0) | ||
75 | |||
76 | |||
77 | /* | ||
78 | * In principle the caller should be passing us a value return from | ||
79 | * xen_save_fl_direct, but for robustness sake we test only the | ||
80 | * X86_EFLAGS_IF flag rather than the whole byte. After setting the | ||
81 | * interrupt mask state, it checks for unmasked pending events and | ||
82 | * enters the hypervisor to get them delivered if so. | ||
83 | */ | ||
84 | ENTRY(xen_restore_fl_direct) | ||
85 | #ifdef CONFIG_X86_64 | ||
86 | testw $X86_EFLAGS_IF, %di | ||
87 | #else | ||
88 | testb $X86_EFLAGS_IF>>8, %ah | ||
89 | #endif | ||
90 | setz PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask | ||
91 | /* | ||
92 | * Preempt here doesn't matter because that will deal with any | ||
93 | * pending interrupts. The pending check may end up being run | ||
94 | * on the wrong CPU, but that doesn't hurt. | ||
95 | */ | ||
96 | |||
97 | /* check for unmasked and pending */ | ||
98 | cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending | ||
99 | jz 1f | ||
100 | 2: call check_events | ||
101 | 1: | ||
102 | ENDPATCH(xen_restore_fl_direct) | ||
103 | ret | ||
104 | ENDPROC(xen_restore_fl_direct) | ||
105 | RELOC(xen_restore_fl_direct, 2b+1) | ||
106 | |||
107 | |||
108 | /* | ||
109 | * Force an event check by making a hypercall, but preserve regs | ||
110 | * before making the call. | ||
111 | */ | ||
112 | check_events: | ||
113 | #ifdef CONFIG_X86_32 | ||
114 | push %eax | ||
115 | push %ecx | ||
116 | push %edx | ||
117 | call xen_force_evtchn_callback | ||
118 | pop %edx | ||
119 | pop %ecx | ||
120 | pop %eax | ||
121 | #else | ||
122 | push %rax | ||
123 | push %rcx | ||
124 | push %rdx | ||
125 | push %rsi | ||
126 | push %rdi | ||
127 | push %r8 | ||
128 | push %r9 | ||
129 | push %r10 | ||
130 | push %r11 | ||
131 | call xen_force_evtchn_callback | ||
132 | pop %r11 | ||
133 | pop %r10 | ||
134 | pop %r9 | ||
135 | pop %r8 | ||
136 | pop %rdi | ||
137 | pop %rsi | ||
138 | pop %rdx | ||
139 | pop %rcx | ||
140 | pop %rax | ||
141 | #endif | ||
142 | ret | ||
diff --git a/arch/x86/xen/xen-asm.h b/arch/x86/xen/xen-asm.h new file mode 100644 index 000000000000..465276467a47 --- /dev/null +++ b/arch/x86/xen/xen-asm.h | |||
@@ -0,0 +1,12 @@ | |||
1 | #ifndef _XEN_XEN_ASM_H | ||
2 | #define _XEN_XEN_ASM_H | ||
3 | |||
4 | #include <linux/linkage.h> | ||
5 | |||
6 | #define RELOC(x, v) .globl x##_reloc; x##_reloc=v | ||
7 | #define ENDPATCH(x) .globl x##_end; x##_end=. | ||
8 | |||
9 | /* Pseudo-flag used for virtual NMI, which we don't implement yet */ | ||
10 | #define XEN_EFLAGS_NMI 0x80000000 | ||
11 | |||
12 | #endif | ||
diff --git a/arch/x86/xen/xen-asm_32.S b/arch/x86/xen/xen-asm_32.S index 42786f59d9c0..88e15deb8b82 100644 --- a/arch/x86/xen/xen-asm_32.S +++ b/arch/x86/xen/xen-asm_32.S | |||
@@ -1,117 +1,43 @@ | |||
1 | /* | 1 | /* |
2 | Asm versions of Xen pv-ops, suitable for either direct use or inlining. | 2 | * Asm versions of Xen pv-ops, suitable for either direct use or |
3 | The inline versions are the same as the direct-use versions, with the | 3 | * inlining. The inline versions are the same as the direct-use |
4 | pre- and post-amble chopped off. | 4 | * versions, with the pre- and post-amble chopped off. |
5 | 5 | * | |
6 | This code is encoded for size rather than absolute efficiency, | 6 | * This code is encoded for size rather than absolute efficiency, with |
7 | with a view to being able to inline as much as possible. | 7 | * a view to being able to inline as much as possible. |
8 | 8 | * | |
9 | We only bother with direct forms (ie, vcpu in pda) of the operations | 9 | * We only bother with direct forms (ie, vcpu in pda) of the |
10 | here; the indirect forms are better handled in C, since they're | 10 | * operations here; the indirect forms are better handled in C, since |
11 | generally too large to inline anyway. | 11 | * they're generally too large to inline anyway. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/linkage.h> | ||
15 | |||
16 | #include <asm/asm-offsets.h> | ||
17 | #include <asm/thread_info.h> | 14 | #include <asm/thread_info.h> |
18 | #include <asm/percpu.h> | ||
19 | #include <asm/processor-flags.h> | 15 | #include <asm/processor-flags.h> |
20 | #include <asm/segment.h> | 16 | #include <asm/segment.h> |
21 | 17 | ||
22 | #include <xen/interface/xen.h> | 18 | #include <xen/interface/xen.h> |
23 | 19 | ||
24 | #define RELOC(x, v) .globl x##_reloc; x##_reloc=v | 20 | #include "xen-asm.h" |
25 | #define ENDPATCH(x) .globl x##_end; x##_end=. | ||
26 | |||
27 | /* Pseudo-flag used for virtual NMI, which we don't implement yet */ | ||
28 | #define XEN_EFLAGS_NMI 0x80000000 | ||
29 | |||
30 | /* | ||
31 | Enable events. This clears the event mask and tests the pending | ||
32 | event status with one and operation. If there are pending | ||
33 | events, then enter the hypervisor to get them handled. | ||
34 | */ | ||
35 | ENTRY(xen_irq_enable_direct) | ||
36 | /* Unmask events */ | ||
37 | movb $0, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask | ||
38 | |||
39 | /* Preempt here doesn't matter because that will deal with | ||
40 | any pending interrupts. The pending check may end up being | ||
41 | run on the wrong CPU, but that doesn't hurt. */ | ||
42 | |||
43 | /* Test for pending */ | ||
44 | testb $0xff, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_pending | ||
45 | jz 1f | ||
46 | |||
47 | 2: call check_events | ||
48 | 1: | ||
49 | ENDPATCH(xen_irq_enable_direct) | ||
50 | ret | ||
51 | ENDPROC(xen_irq_enable_direct) | ||
52 | RELOC(xen_irq_enable_direct, 2b+1) | ||
53 | |||
54 | |||
55 | /* | ||
56 | Disabling events is simply a matter of making the event mask | ||
57 | non-zero. | ||
58 | */ | ||
59 | ENTRY(xen_irq_disable_direct) | ||
60 | movb $1, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask | ||
61 | ENDPATCH(xen_irq_disable_direct) | ||
62 | ret | ||
63 | ENDPROC(xen_irq_disable_direct) | ||
64 | RELOC(xen_irq_disable_direct, 0) | ||
65 | 21 | ||
66 | /* | 22 | /* |
67 | (xen_)save_fl is used to get the current interrupt enable status. | 23 | * Force an event check by making a hypercall, but preserve regs |
68 | Callers expect the status to be in X86_EFLAGS_IF, and other bits | 24 | * before making the call. |
69 | may be set in the return value. We take advantage of this by | ||
70 | making sure that X86_EFLAGS_IF has the right value (and other bits | ||
71 | in that byte are 0), but other bits in the return value are | ||
72 | undefined. We need to toggle the state of the bit, because | ||
73 | Xen and x86 use opposite senses (mask vs enable). | ||
74 | */ | 25 | */ |
75 | ENTRY(xen_save_fl_direct) | 26 | check_events: |
76 | testb $0xff, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask | 27 | push %eax |
77 | setz %ah | 28 | push %ecx |
78 | addb %ah,%ah | 29 | push %edx |
79 | ENDPATCH(xen_save_fl_direct) | 30 | call xen_force_evtchn_callback |
80 | ret | 31 | pop %edx |
81 | ENDPROC(xen_save_fl_direct) | 32 | pop %ecx |
82 | RELOC(xen_save_fl_direct, 0) | 33 | pop %eax |
83 | |||
84 | |||
85 | /* | ||
86 | In principle the caller should be passing us a value return | ||
87 | from xen_save_fl_direct, but for robustness sake we test only | ||
88 | the X86_EFLAGS_IF flag rather than the whole byte. After | ||
89 | setting the interrupt mask state, it checks for unmasked | ||
90 | pending events and enters the hypervisor to get them delivered | ||
91 | if so. | ||
92 | */ | ||
93 | ENTRY(xen_restore_fl_direct) | ||
94 | testb $X86_EFLAGS_IF>>8, %ah | ||
95 | setz PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask | ||
96 | /* Preempt here doesn't matter because that will deal with | ||
97 | any pending interrupts. The pending check may end up being | ||
98 | run on the wrong CPU, but that doesn't hurt. */ | ||
99 | |||
100 | /* check for unmasked and pending */ | ||
101 | cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_pending | ||
102 | jz 1f | ||
103 | 2: call check_events | ||
104 | 1: | ||
105 | ENDPATCH(xen_restore_fl_direct) | ||
106 | ret | 34 | ret |
107 | ENDPROC(xen_restore_fl_direct) | ||
108 | RELOC(xen_restore_fl_direct, 2b+1) | ||
109 | 35 | ||
110 | /* | 36 | /* |
111 | We can't use sysexit directly, because we're not running in ring0. | 37 | * We can't use sysexit directly, because we're not running in ring0. |
112 | But we can easily fake it up using iret. Assuming xen_sysexit | 38 | * But we can easily fake it up using iret. Assuming xen_sysexit is |
113 | is jumped to with a standard stack frame, we can just strip it | 39 | * jumped to with a standard stack frame, we can just strip it back to |
114 | back to a standard iret frame and use iret. | 40 | * a standard iret frame and use iret. |
115 | */ | 41 | */ |
116 | ENTRY(xen_sysexit) | 42 | ENTRY(xen_sysexit) |
117 | movl PT_EAX(%esp), %eax /* Shouldn't be necessary? */ | 43 | movl PT_EAX(%esp), %eax /* Shouldn't be necessary? */ |
@@ -122,33 +48,31 @@ ENTRY(xen_sysexit) | |||
122 | ENDPROC(xen_sysexit) | 48 | ENDPROC(xen_sysexit) |
123 | 49 | ||
124 | /* | 50 | /* |
125 | This is run where a normal iret would be run, with the same stack setup: | 51 | * This is run where a normal iret would be run, with the same stack setup: |
126 | 8: eflags | 52 | * 8: eflags |
127 | 4: cs | 53 | * 4: cs |
128 | esp-> 0: eip | 54 | * esp-> 0: eip |
129 | 55 | * | |
130 | This attempts to make sure that any pending events are dealt | 56 | * This attempts to make sure that any pending events are dealt with |
131 | with on return to usermode, but there is a small window in | 57 | * on return to usermode, but there is a small window in which an |
132 | which an event can happen just before entering usermode. If | 58 | * event can happen just before entering usermode. If the nested |
133 | the nested interrupt ends up setting one of the TIF_WORK_MASK | 59 | * interrupt ends up setting one of the TIF_WORK_MASK pending work |
134 | pending work flags, they will not be tested again before | 60 | * flags, they will not be tested again before returning to |
135 | returning to usermode. This means that a process can end up | 61 | * usermode. This means that a process can end up with pending work, |
136 | with pending work, which will be unprocessed until the process | 62 | * which will be unprocessed until the process enters and leaves the |
137 | enters and leaves the kernel again, which could be an | 63 | * kernel again, which could be an unbounded amount of time. This |
138 | unbounded amount of time. This means that a pending signal or | 64 | * means that a pending signal or reschedule event could be |
139 | reschedule event could be indefinitely delayed. | 65 | * indefinitely delayed. |
140 | 66 | * | |
141 | The fix is to notice a nested interrupt in the critical | 67 | * The fix is to notice a nested interrupt in the critical window, and |
142 | window, and if one occurs, then fold the nested interrupt into | 68 | * if one occurs, then fold the nested interrupt into the current |
143 | the current interrupt stack frame, and re-process it | 69 | * interrupt stack frame, and re-process it iteratively rather than |
144 | iteratively rather than recursively. This means that it will | 70 | * recursively. This means that it will exit via the normal path, and |
145 | exit via the normal path, and all pending work will be dealt | 71 | * all pending work will be dealt with appropriately. |
146 | with appropriately. | 72 | * |
147 | 73 | * Because the nested interrupt handler needs to deal with the current | |
148 | Because the nested interrupt handler needs to deal with the | 74 | * stack state in whatever form its in, we keep things simple by only |
149 | current stack state in whatever form its in, we keep things | 75 | * using a single register which is pushed/popped on the stack. |
150 | simple by only using a single register which is pushed/popped | ||
151 | on the stack. | ||
152 | */ | 76 | */ |
153 | ENTRY(xen_iret) | 77 | ENTRY(xen_iret) |
154 | /* test eflags for special cases */ | 78 | /* test eflags for special cases */ |
@@ -158,13 +82,15 @@ ENTRY(xen_iret) | |||
158 | push %eax | 82 | push %eax |
159 | ESP_OFFSET=4 # bytes pushed onto stack | 83 | ESP_OFFSET=4 # bytes pushed onto stack |
160 | 84 | ||
161 | /* Store vcpu_info pointer for easy access. Do it this | 85 | /* |
162 | way to avoid having to reload %fs */ | 86 | * Store vcpu_info pointer for easy access. Do it this way to |
87 | * avoid having to reload %fs | ||
88 | */ | ||
163 | #ifdef CONFIG_SMP | 89 | #ifdef CONFIG_SMP |
164 | GET_THREAD_INFO(%eax) | 90 | GET_THREAD_INFO(%eax) |
165 | movl TI_cpu(%eax),%eax | 91 | movl TI_cpu(%eax), %eax |
166 | movl __per_cpu_offset(,%eax,4),%eax | 92 | movl __per_cpu_offset(,%eax,4), %eax |
167 | mov per_cpu__xen_vcpu(%eax),%eax | 93 | mov per_cpu__xen_vcpu(%eax), %eax |
168 | #else | 94 | #else |
169 | movl per_cpu__xen_vcpu, %eax | 95 | movl per_cpu__xen_vcpu, %eax |
170 | #endif | 96 | #endif |
@@ -172,37 +98,46 @@ ENTRY(xen_iret) | |||
172 | /* check IF state we're restoring */ | 98 | /* check IF state we're restoring */ |
173 | testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp) | 99 | testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp) |
174 | 100 | ||
175 | /* Maybe enable events. Once this happens we could get a | 101 | /* |
176 | recursive event, so the critical region starts immediately | 102 | * Maybe enable events. Once this happens we could get a |
177 | afterwards. However, if that happens we don't end up | 103 | * recursive event, so the critical region starts immediately |
178 | resuming the code, so we don't have to be worried about | 104 | * afterwards. However, if that happens we don't end up |
179 | being preempted to another CPU. */ | 105 | * resuming the code, so we don't have to be worried about |
106 | * being preempted to another CPU. | ||
107 | */ | ||
180 | setz XEN_vcpu_info_mask(%eax) | 108 | setz XEN_vcpu_info_mask(%eax) |
181 | xen_iret_start_crit: | 109 | xen_iret_start_crit: |
182 | 110 | ||
183 | /* check for unmasked and pending */ | 111 | /* check for unmasked and pending */ |
184 | cmpw $0x0001, XEN_vcpu_info_pending(%eax) | 112 | cmpw $0x0001, XEN_vcpu_info_pending(%eax) |
185 | 113 | ||
186 | /* If there's something pending, mask events again so we | 114 | /* |
187 | can jump back into xen_hypervisor_callback */ | 115 | * If there's something pending, mask events again so we can |
116 | * jump back into xen_hypervisor_callback | ||
117 | */ | ||
188 | sete XEN_vcpu_info_mask(%eax) | 118 | sete XEN_vcpu_info_mask(%eax) |
189 | 119 | ||
190 | popl %eax | 120 | popl %eax |
191 | 121 | ||
192 | /* From this point on the registers are restored and the stack | 122 | /* |
193 | updated, so we don't need to worry about it if we're preempted */ | 123 | * From this point on the registers are restored and the stack |
124 | * updated, so we don't need to worry about it if we're | ||
125 | * preempted | ||
126 | */ | ||
194 | iret_restore_end: | 127 | iret_restore_end: |
195 | 128 | ||
196 | /* Jump to hypervisor_callback after fixing up the stack. | 129 | /* |
197 | Events are masked, so jumping out of the critical | 130 | * Jump to hypervisor_callback after fixing up the stack. |
198 | region is OK. */ | 131 | * Events are masked, so jumping out of the critical region is |
132 | * OK. | ||
133 | */ | ||
199 | je xen_hypervisor_callback | 134 | je xen_hypervisor_callback |
200 | 135 | ||
201 | 1: iret | 136 | 1: iret |
202 | xen_iret_end_crit: | 137 | xen_iret_end_crit: |
203 | .section __ex_table,"a" | 138 | .section __ex_table, "a" |
204 | .align 4 | 139 | .align 4 |
205 | .long 1b,iret_exc | 140 | .long 1b, iret_exc |
206 | .previous | 141 | .previous |
207 | 142 | ||
208 | hyper_iret: | 143 | hyper_iret: |
@@ -212,55 +147,55 @@ hyper_iret: | |||
212 | .globl xen_iret_start_crit, xen_iret_end_crit | 147 | .globl xen_iret_start_crit, xen_iret_end_crit |
213 | 148 | ||
214 | /* | 149 | /* |
215 | This is called by xen_hypervisor_callback in entry.S when it sees | 150 | * This is called by xen_hypervisor_callback in entry.S when it sees |
216 | that the EIP at the time of interrupt was between xen_iret_start_crit | 151 | * that the EIP at the time of interrupt was between |
217 | and xen_iret_end_crit. We're passed the EIP in %eax so we can do | 152 | * xen_iret_start_crit and xen_iret_end_crit. We're passed the EIP in |
218 | a more refined determination of what to do. | 153 | * %eax so we can do a more refined determination of what to do. |
219 | 154 | * | |
220 | The stack format at this point is: | 155 | * The stack format at this point is: |
221 | ---------------- | 156 | * ---------------- |
222 | ss : (ss/esp may be present if we came from usermode) | 157 | * ss : (ss/esp may be present if we came from usermode) |
223 | esp : | 158 | * esp : |
224 | eflags } outer exception info | 159 | * eflags } outer exception info |
225 | cs } | 160 | * cs } |
226 | eip } | 161 | * eip } |
227 | ---------------- <- edi (copy dest) | 162 | * ---------------- <- edi (copy dest) |
228 | eax : outer eax if it hasn't been restored | 163 | * eax : outer eax if it hasn't been restored |
229 | ---------------- | 164 | * ---------------- |
230 | eflags } nested exception info | 165 | * eflags } nested exception info |
231 | cs } (no ss/esp because we're nested | 166 | * cs } (no ss/esp because we're nested |
232 | eip } from the same ring) | 167 | * eip } from the same ring) |
233 | orig_eax }<- esi (copy src) | 168 | * orig_eax }<- esi (copy src) |
234 | - - - - - - - - | 169 | * - - - - - - - - |
235 | fs } | 170 | * fs } |
236 | es } | 171 | * es } |
237 | ds } SAVE_ALL state | 172 | * ds } SAVE_ALL state |
238 | eax } | 173 | * eax } |
239 | : : | 174 | * : : |
240 | ebx }<- esp | 175 | * ebx }<- esp |
241 | ---------------- | 176 | * ---------------- |
242 | 177 | * | |
243 | In order to deliver the nested exception properly, we need to shift | 178 | * In order to deliver the nested exception properly, we need to shift |
244 | everything from the return addr up to the error code so it | 179 | * everything from the return addr up to the error code so it sits |
245 | sits just under the outer exception info. This means that when we | 180 | * just under the outer exception info. This means that when we |
246 | handle the exception, we do it in the context of the outer exception | 181 | * handle the exception, we do it in the context of the outer |
247 | rather than starting a new one. | 182 | * exception rather than starting a new one. |
248 | 183 | * | |
249 | The only caveat is that if the outer eax hasn't been | 184 | * The only caveat is that if the outer eax hasn't been restored yet |
250 | restored yet (ie, it's still on stack), we need to insert | 185 | * (ie, it's still on stack), we need to insert its value into the |
251 | its value into the SAVE_ALL state before going on, since | 186 | * SAVE_ALL state before going on, since it's usermode state which we |
252 | it's usermode state which we eventually need to restore. | 187 | * eventually need to restore. |
253 | */ | 188 | */ |
254 | ENTRY(xen_iret_crit_fixup) | 189 | ENTRY(xen_iret_crit_fixup) |
255 | /* | 190 | /* |
256 | Paranoia: Make sure we're really coming from kernel space. | 191 | * Paranoia: Make sure we're really coming from kernel space. |
257 | One could imagine a case where userspace jumps into the | 192 | * One could imagine a case where userspace jumps into the |
258 | critical range address, but just before the CPU delivers a GP, | 193 | * critical range address, but just before the CPU delivers a |
259 | it decides to deliver an interrupt instead. Unlikely? | 194 | * GP, it decides to deliver an interrupt instead. Unlikely? |
260 | Definitely. Easy to avoid? Yes. The Intel documents | 195 | * Definitely. Easy to avoid? Yes. The Intel documents |
261 | explicitly say that the reported EIP for a bad jump is the | 196 | * explicitly say that the reported EIP for a bad jump is the |
262 | jump instruction itself, not the destination, but some virtual | 197 | * jump instruction itself, not the destination, but some |
263 | environments get this wrong. | 198 | * virtual environments get this wrong. |
264 | */ | 199 | */ |
265 | movl PT_CS(%esp), %ecx | 200 | movl PT_CS(%esp), %ecx |
266 | andl $SEGMENT_RPL_MASK, %ecx | 201 | andl $SEGMENT_RPL_MASK, %ecx |
@@ -270,15 +205,17 @@ ENTRY(xen_iret_crit_fixup) | |||
270 | lea PT_ORIG_EAX(%esp), %esi | 205 | lea PT_ORIG_EAX(%esp), %esi |
271 | lea PT_EFLAGS(%esp), %edi | 206 | lea PT_EFLAGS(%esp), %edi |
272 | 207 | ||
273 | /* If eip is before iret_restore_end then stack | 208 | /* |
274 | hasn't been restored yet. */ | 209 | * If eip is before iret_restore_end then stack |
210 | * hasn't been restored yet. | ||
211 | */ | ||
275 | cmp $iret_restore_end, %eax | 212 | cmp $iret_restore_end, %eax |
276 | jae 1f | 213 | jae 1f |
277 | 214 | ||
278 | movl 0+4(%edi),%eax /* copy EAX (just above top of frame) */ | 215 | movl 0+4(%edi), %eax /* copy EAX (just above top of frame) */ |
279 | movl %eax, PT_EAX(%esp) | 216 | movl %eax, PT_EAX(%esp) |
280 | 217 | ||
281 | lea ESP_OFFSET(%edi),%edi /* move dest up over saved regs */ | 218 | lea ESP_OFFSET(%edi), %edi /* move dest up over saved regs */ |
282 | 219 | ||
283 | /* set up the copy */ | 220 | /* set up the copy */ |
284 | 1: std | 221 | 1: std |
@@ -286,20 +223,6 @@ ENTRY(xen_iret_crit_fixup) | |||
286 | rep movsl | 223 | rep movsl |
287 | cld | 224 | cld |
288 | 225 | ||
289 | lea 4(%edi),%esp /* point esp to new frame */ | 226 | lea 4(%edi), %esp /* point esp to new frame */ |
290 | 2: jmp xen_do_upcall | 227 | 2: jmp xen_do_upcall |
291 | 228 | ||
292 | |||
293 | /* | ||
294 | Force an event check by making a hypercall, | ||
295 | but preserve regs before making the call. | ||
296 | */ | ||
297 | check_events: | ||
298 | push %eax | ||
299 | push %ecx | ||
300 | push %edx | ||
301 | call xen_force_evtchn_callback | ||
302 | pop %edx | ||
303 | pop %ecx | ||
304 | pop %eax | ||
305 | ret | ||
diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S index 05794c566e87..02f496a8dbaa 100644 --- a/arch/x86/xen/xen-asm_64.S +++ b/arch/x86/xen/xen-asm_64.S | |||
@@ -1,174 +1,45 @@ | |||
1 | /* | 1 | /* |
2 | Asm versions of Xen pv-ops, suitable for either direct use or inlining. | 2 | * Asm versions of Xen pv-ops, suitable for either direct use or |
3 | The inline versions are the same as the direct-use versions, with the | 3 | * inlining. The inline versions are the same as the direct-use |
4 | pre- and post-amble chopped off. | 4 | * versions, with the pre- and post-amble chopped off. |
5 | 5 | * | |
6 | This code is encoded for size rather than absolute efficiency, | 6 | * This code is encoded for size rather than absolute efficiency, with |
7 | with a view to being able to inline as much as possible. | 7 | * a view to being able to inline as much as possible. |
8 | 8 | * | |
9 | We only bother with direct forms (ie, vcpu in pda) of the operations | 9 | * We only bother with direct forms (ie, vcpu in pda) of the |
10 | here; the indirect forms are better handled in C, since they're | 10 | * operations here; the indirect forms are better handled in C, since |
11 | generally too large to inline anyway. | 11 | * they're generally too large to inline anyway. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/linkage.h> | ||
15 | |||
16 | #include <asm/asm-offsets.h> | ||
17 | #include <asm/processor-flags.h> | ||
18 | #include <asm/errno.h> | 14 | #include <asm/errno.h> |
15 | #include <asm/percpu.h> | ||
16 | #include <asm/processor-flags.h> | ||
19 | #include <asm/segment.h> | 17 | #include <asm/segment.h> |
20 | 18 | ||
21 | #include <xen/interface/xen.h> | 19 | #include <xen/interface/xen.h> |
22 | 20 | ||
23 | #define RELOC(x, v) .globl x##_reloc; x##_reloc=v | 21 | #include "xen-asm.h" |
24 | #define ENDPATCH(x) .globl x##_end; x##_end=. | ||
25 | |||
26 | /* Pseudo-flag used for virtual NMI, which we don't implement yet */ | ||
27 | #define XEN_EFLAGS_NMI 0x80000000 | ||
28 | |||
29 | #if 1 | ||
30 | /* | ||
31 | x86-64 does not yet support direct access to percpu variables | ||
32 | via a segment override, so we just need to make sure this code | ||
33 | never gets used | ||
34 | */ | ||
35 | #define BUG ud2a | ||
36 | #define PER_CPU_VAR(var, off) 0xdeadbeef | ||
37 | #endif | ||
38 | |||
39 | /* | ||
40 | Enable events. This clears the event mask and tests the pending | ||
41 | event status with one and operation. If there are pending | ||
42 | events, then enter the hypervisor to get them handled. | ||
43 | */ | ||
44 | ENTRY(xen_irq_enable_direct) | ||
45 | BUG | ||
46 | |||
47 | /* Unmask events */ | ||
48 | movb $0, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask) | ||
49 | |||
50 | /* Preempt here doesn't matter because that will deal with | ||
51 | any pending interrupts. The pending check may end up being | ||
52 | run on the wrong CPU, but that doesn't hurt. */ | ||
53 | |||
54 | /* Test for pending */ | ||
55 | testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending) | ||
56 | jz 1f | ||
57 | |||
58 | 2: call check_events | ||
59 | 1: | ||
60 | ENDPATCH(xen_irq_enable_direct) | ||
61 | ret | ||
62 | ENDPROC(xen_irq_enable_direct) | ||
63 | RELOC(xen_irq_enable_direct, 2b+1) | ||
64 | |||
65 | /* | ||
66 | Disabling events is simply a matter of making the event mask | ||
67 | non-zero. | ||
68 | */ | ||
69 | ENTRY(xen_irq_disable_direct) | ||
70 | BUG | ||
71 | |||
72 | movb $1, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask) | ||
73 | ENDPATCH(xen_irq_disable_direct) | ||
74 | ret | ||
75 | ENDPROC(xen_irq_disable_direct) | ||
76 | RELOC(xen_irq_disable_direct, 0) | ||
77 | |||
78 | /* | ||
79 | (xen_)save_fl is used to get the current interrupt enable status. | ||
80 | Callers expect the status to be in X86_EFLAGS_IF, and other bits | ||
81 | may be set in the return value. We take advantage of this by | ||
82 | making sure that X86_EFLAGS_IF has the right value (and other bits | ||
83 | in that byte are 0), but other bits in the return value are | ||
84 | undefined. We need to toggle the state of the bit, because | ||
85 | Xen and x86 use opposite senses (mask vs enable). | ||
86 | */ | ||
87 | ENTRY(xen_save_fl_direct) | ||
88 | BUG | ||
89 | |||
90 | testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask) | ||
91 | setz %ah | ||
92 | addb %ah,%ah | ||
93 | ENDPATCH(xen_save_fl_direct) | ||
94 | ret | ||
95 | ENDPROC(xen_save_fl_direct) | ||
96 | RELOC(xen_save_fl_direct, 0) | ||
97 | |||
98 | /* | ||
99 | In principle the caller should be passing us a value return | ||
100 | from xen_save_fl_direct, but for robustness sake we test only | ||
101 | the X86_EFLAGS_IF flag rather than the whole byte. After | ||
102 | setting the interrupt mask state, it checks for unmasked | ||
103 | pending events and enters the hypervisor to get them delivered | ||
104 | if so. | ||
105 | */ | ||
106 | ENTRY(xen_restore_fl_direct) | ||
107 | BUG | ||
108 | |||
109 | testb $X86_EFLAGS_IF>>8, %ah | ||
110 | setz PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask) | ||
111 | /* Preempt here doesn't matter because that will deal with | ||
112 | any pending interrupts. The pending check may end up being | ||
113 | run on the wrong CPU, but that doesn't hurt. */ | ||
114 | |||
115 | /* check for unmasked and pending */ | ||
116 | cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending) | ||
117 | jz 1f | ||
118 | 2: call check_events | ||
119 | 1: | ||
120 | ENDPATCH(xen_restore_fl_direct) | ||
121 | ret | ||
122 | ENDPROC(xen_restore_fl_direct) | ||
123 | RELOC(xen_restore_fl_direct, 2b+1) | ||
124 | |||
125 | |||
126 | /* | ||
127 | Force an event check by making a hypercall, | ||
128 | but preserve regs before making the call. | ||
129 | */ | ||
130 | check_events: | ||
131 | push %rax | ||
132 | push %rcx | ||
133 | push %rdx | ||
134 | push %rsi | ||
135 | push %rdi | ||
136 | push %r8 | ||
137 | push %r9 | ||
138 | push %r10 | ||
139 | push %r11 | ||
140 | call xen_force_evtchn_callback | ||
141 | pop %r11 | ||
142 | pop %r10 | ||
143 | pop %r9 | ||
144 | pop %r8 | ||
145 | pop %rdi | ||
146 | pop %rsi | ||
147 | pop %rdx | ||
148 | pop %rcx | ||
149 | pop %rax | ||
150 | ret | ||
151 | 22 | ||
152 | ENTRY(xen_adjust_exception_frame) | 23 | ENTRY(xen_adjust_exception_frame) |
153 | mov 8+0(%rsp),%rcx | 24 | mov 8+0(%rsp), %rcx |
154 | mov 8+8(%rsp),%r11 | 25 | mov 8+8(%rsp), %r11 |
155 | ret $16 | 26 | ret $16 |
156 | 27 | ||
157 | hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32 | 28 | hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32 |
158 | /* | 29 | /* |
159 | Xen64 iret frame: | 30 | * Xen64 iret frame: |
160 | 31 | * | |
161 | ss | 32 | * ss |
162 | rsp | 33 | * rsp |
163 | rflags | 34 | * rflags |
164 | cs | 35 | * cs |
165 | rip <-- standard iret frame | 36 | * rip <-- standard iret frame |
166 | 37 | * | |
167 | flags | 38 | * flags |
168 | 39 | * | |
169 | rcx } | 40 | * rcx } |
170 | r11 }<-- pushed by hypercall page | 41 | * r11 }<-- pushed by hypercall page |
171 | rsp -> rax } | 42 | * rsp->rax } |
172 | */ | 43 | */ |
173 | ENTRY(xen_iret) | 44 | ENTRY(xen_iret) |
174 | pushq $0 | 45 | pushq $0 |
@@ -177,8 +48,8 @@ ENDPATCH(xen_iret) | |||
177 | RELOC(xen_iret, 1b+1) | 48 | RELOC(xen_iret, 1b+1) |
178 | 49 | ||
179 | /* | 50 | /* |
180 | sysexit is not used for 64-bit processes, so it's | 51 | * sysexit is not used for 64-bit processes, so it's only ever used to |
181 | only ever used to return to 32-bit compat userspace. | 52 | * return to 32-bit compat userspace. |
182 | */ | 53 | */ |
183 | ENTRY(xen_sysexit) | 54 | ENTRY(xen_sysexit) |
184 | pushq $__USER32_DS | 55 | pushq $__USER32_DS |
@@ -193,13 +64,15 @@ ENDPATCH(xen_sysexit) | |||
193 | RELOC(xen_sysexit, 1b+1) | 64 | RELOC(xen_sysexit, 1b+1) |
194 | 65 | ||
195 | ENTRY(xen_sysret64) | 66 | ENTRY(xen_sysret64) |
196 | /* We're already on the usermode stack at this point, but still | 67 | /* |
197 | with the kernel gs, so we can easily switch back */ | 68 | * We're already on the usermode stack at this point, but |
198 | movq %rsp, %gs:pda_oldrsp | 69 | * still with the kernel gs, so we can easily switch back |
199 | movq %gs:pda_kernelstack,%rsp | 70 | */ |
71 | movq %rsp, PER_CPU_VAR(old_rsp) | ||
72 | movq PER_CPU_VAR(kernel_stack), %rsp | ||
200 | 73 | ||
201 | pushq $__USER_DS | 74 | pushq $__USER_DS |
202 | pushq %gs:pda_oldrsp | 75 | pushq PER_CPU_VAR(old_rsp) |
203 | pushq %r11 | 76 | pushq %r11 |
204 | pushq $__USER_CS | 77 | pushq $__USER_CS |
205 | pushq %rcx | 78 | pushq %rcx |
@@ -210,13 +83,15 @@ ENDPATCH(xen_sysret64) | |||
210 | RELOC(xen_sysret64, 1b+1) | 83 | RELOC(xen_sysret64, 1b+1) |
211 | 84 | ||
212 | ENTRY(xen_sysret32) | 85 | ENTRY(xen_sysret32) |
213 | /* We're already on the usermode stack at this point, but still | 86 | /* |
214 | with the kernel gs, so we can easily switch back */ | 87 | * We're already on the usermode stack at this point, but |
215 | movq %rsp, %gs:pda_oldrsp | 88 | * still with the kernel gs, so we can easily switch back |
216 | movq %gs:pda_kernelstack, %rsp | 89 | */ |
90 | movq %rsp, PER_CPU_VAR(old_rsp) | ||
91 | movq PER_CPU_VAR(kernel_stack), %rsp | ||
217 | 92 | ||
218 | pushq $__USER32_DS | 93 | pushq $__USER32_DS |
219 | pushq %gs:pda_oldrsp | 94 | pushq PER_CPU_VAR(old_rsp) |
220 | pushq %r11 | 95 | pushq %r11 |
221 | pushq $__USER32_CS | 96 | pushq $__USER32_CS |
222 | pushq %rcx | 97 | pushq %rcx |
@@ -227,28 +102,27 @@ ENDPATCH(xen_sysret32) | |||
227 | RELOC(xen_sysret32, 1b+1) | 102 | RELOC(xen_sysret32, 1b+1) |
228 | 103 | ||
229 | /* | 104 | /* |
230 | Xen handles syscall callbacks much like ordinary exceptions, | 105 | * Xen handles syscall callbacks much like ordinary exceptions, which |
231 | which means we have: | 106 | * means we have: |
232 | - kernel gs | 107 | * - kernel gs |
233 | - kernel rsp | 108 | * - kernel rsp |
234 | - an iret-like stack frame on the stack (including rcx and r11): | 109 | * - an iret-like stack frame on the stack (including rcx and r11): |
235 | ss | 110 | * ss |
236 | rsp | 111 | * rsp |
237 | rflags | 112 | * rflags |
238 | cs | 113 | * cs |
239 | rip | 114 | * rip |
240 | r11 | 115 | * r11 |
241 | rsp-> rcx | 116 | * rsp->rcx |
242 | 117 | * | |
243 | In all the entrypoints, we undo all that to make it look | 118 | * In all the entrypoints, we undo all that to make it look like a |
244 | like a CPU-generated syscall/sysenter and jump to the normal | 119 | * CPU-generated syscall/sysenter and jump to the normal entrypoint. |
245 | entrypoint. | ||
246 | */ | 120 | */ |
247 | 121 | ||
248 | .macro undo_xen_syscall | 122 | .macro undo_xen_syscall |
249 | mov 0*8(%rsp),%rcx | 123 | mov 0*8(%rsp), %rcx |
250 | mov 1*8(%rsp),%r11 | 124 | mov 1*8(%rsp), %r11 |
251 | mov 5*8(%rsp),%rsp | 125 | mov 5*8(%rsp), %rsp |
252 | .endm | 126 | .endm |
253 | 127 | ||
254 | /* Normal 64-bit system call target */ | 128 | /* Normal 64-bit system call target */ |
@@ -275,7 +149,7 @@ ENDPROC(xen_sysenter_target) | |||
275 | 149 | ||
276 | ENTRY(xen_syscall32_target) | 150 | ENTRY(xen_syscall32_target) |
277 | ENTRY(xen_sysenter_target) | 151 | ENTRY(xen_sysenter_target) |
278 | lea 16(%rsp), %rsp /* strip %rcx,%r11 */ | 152 | lea 16(%rsp), %rsp /* strip %rcx, %r11 */ |
279 | mov $-ENOSYS, %rax | 153 | mov $-ENOSYS, %rax |
280 | pushq $VGCF_in_syscall | 154 | pushq $VGCF_in_syscall |
281 | jmp hypercall_iret | 155 | jmp hypercall_iret |
diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S index 63d49a523ed3..1a5ff24e29c0 100644 --- a/arch/x86/xen/xen-head.S +++ b/arch/x86/xen/xen-head.S | |||
@@ -8,7 +8,7 @@ | |||
8 | 8 | ||
9 | #include <asm/boot.h> | 9 | #include <asm/boot.h> |
10 | #include <asm/asm.h> | 10 | #include <asm/asm.h> |
11 | #include <asm/page.h> | 11 | #include <asm/page_types.h> |
12 | 12 | ||
13 | #include <xen/interface/elfnote.h> | 13 | #include <xen/interface/elfnote.h> |
14 | #include <asm/xen/interface.h> | 14 | #include <asm/xen/interface.h> |
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index c1f8faf0a2c5..2f5ef2632ea2 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h | |||
@@ -10,9 +10,12 @@ | |||
10 | extern const char xen_hypervisor_callback[]; | 10 | extern const char xen_hypervisor_callback[]; |
11 | extern const char xen_failsafe_callback[]; | 11 | extern const char xen_failsafe_callback[]; |
12 | 12 | ||
13 | extern void *xen_initial_gdt; | ||
14 | |||
13 | struct trap_info; | 15 | struct trap_info; |
14 | void xen_copy_trap_info(struct trap_info *traps); | 16 | void xen_copy_trap_info(struct trap_info *traps); |
15 | 17 | ||
18 | DECLARE_PER_CPU(struct vcpu_info, xen_vcpu_info); | ||
16 | DECLARE_PER_CPU(unsigned long, xen_cr3); | 19 | DECLARE_PER_CPU(unsigned long, xen_cr3); |
17 | DECLARE_PER_CPU(unsigned long, xen_current_cr3); | 20 | DECLARE_PER_CPU(unsigned long, xen_current_cr3); |
18 | 21 | ||
@@ -22,6 +25,13 @@ extern struct shared_info *HYPERVISOR_shared_info; | |||
22 | 25 | ||
23 | void xen_setup_mfn_list_list(void); | 26 | void xen_setup_mfn_list_list(void); |
24 | void xen_setup_shared_info(void); | 27 | void xen_setup_shared_info(void); |
28 | void xen_setup_machphys_mapping(void); | ||
29 | pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn); | ||
30 | void xen_ident_map_ISA(void); | ||
31 | void xen_reserve_top(void); | ||
32 | |||
33 | void xen_leave_lazy(void); | ||
34 | void xen_post_allocator_init(void); | ||
25 | 35 | ||
26 | char * __init xen_memory_setup(void); | 36 | char * __init xen_memory_setup(void); |
27 | void __init xen_arch_setup(void); | 37 | void __init xen_arch_setup(void); |