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-rw-r--r--arch/x86/include/asm/mce.h3
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c4
-rw-r--r--arch/x86/kernel/irq.c10
3 files changed, 17 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index ac6e0303bf21..1156dae295ac 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -89,6 +89,7 @@ struct mce_log {
89extern int mce_disabled; 89extern int mce_disabled;
90 90
91#include <asm/atomic.h> 91#include <asm/atomic.h>
92#include <linux/percpu.h>
92 93
93void mce_setup(struct mce *m); 94void mce_setup(struct mce *m);
94void mce_log(struct mce *m); 95void mce_log(struct mce *m);
@@ -123,6 +124,8 @@ static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
123 124
124int mce_available(struct cpuinfo_x86 *c); 125int mce_available(struct cpuinfo_x86 *c);
125 126
127DECLARE_PER_CPU(unsigned, mce_exception_count);
128
126void mce_log_therm_throt_event(__u64 status); 129void mce_log_therm_throt_event(__u64 status);
127 130
128extern atomic_t mce_entry; 131extern atomic_t mce_entry;
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 1d0aa9c4e15b..287268d21836 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -57,6 +57,8 @@ int mce_disabled;
57 57
58atomic_t mce_entry; 58atomic_t mce_entry;
59 59
60DEFINE_PER_CPU(unsigned, mce_exception_count);
61
60/* 62/*
61 * Tolerant levels: 63 * Tolerant levels:
62 * 0: always panic on uncorrected errors, log corrected errors 64 * 0: always panic on uncorrected errors, log corrected errors
@@ -359,6 +361,8 @@ void do_machine_check(struct pt_regs *regs, long error_code)
359 361
360 atomic_inc(&mce_entry); 362 atomic_inc(&mce_entry);
361 363
364 __get_cpu_var(mce_exception_count)++;
365
362 if (notify_die(DIE_NMI, "machine check", regs, error_code, 366 if (notify_die(DIE_NMI, "machine check", regs, error_code,
363 18, SIGKILL) == NOTIFY_STOP) 367 18, SIGKILL) == NOTIFY_STOP)
364 goto out; 368 goto out;
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index a05660bf0299..05fc635c28c0 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -12,6 +12,7 @@
12#include <asm/io_apic.h> 12#include <asm/io_apic.h>
13#include <asm/irq.h> 13#include <asm/irq.h>
14#include <asm/idle.h> 14#include <asm/idle.h>
15#include <asm/mce.h>
15 16
16atomic_t irq_err_count; 17atomic_t irq_err_count;
17 18
@@ -94,6 +95,12 @@ static int show_other_interrupts(struct seq_file *p, int prec)
94 seq_printf(p, " Threshold APIC interrupts\n"); 95 seq_printf(p, " Threshold APIC interrupts\n");
95# endif 96# endif
96#endif 97#endif
98#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
99 seq_printf(p, "%*s: ", prec, "MCE");
100 for_each_online_cpu(j)
101 seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
102 seq_printf(p, " Machine check exceptions\n");
103#endif
97 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); 104 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
98#if defined(CONFIG_X86_IO_APIC) 105#if defined(CONFIG_X86_IO_APIC)
99 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count)); 106 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
@@ -161,6 +168,9 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
161{ 168{
162 u64 sum = irq_stats(cpu)->__nmi_count; 169 u64 sum = irq_stats(cpu)->__nmi_count;
163 170
171#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
172 sum += per_cpu(mce_exception_count, cpu);
173#endif
164#ifdef CONFIG_X86_LOCAL_APIC 174#ifdef CONFIG_X86_LOCAL_APIC
165 sum += irq_stats(cpu)->apic_timer_irqs; 175 sum += irq_stats(cpu)->apic_timer_irqs;
166 sum += irq_stats(cpu)->irq_spurious_count; 176 sum += irq_stats(cpu)->irq_spurious_count;