12 files changed, 56 insertions, 49 deletions

diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index 1a30c0440c6b..ac302a2fa339 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -251,13 +251,6 @@ struct amd_iommu {
         /* Pointer to PCI device of this IOMMU */
         struct pci_dev *dev;
 
-        /*
-         * Capability pointer. There could be more than one IOMMU per PCI
-         * device function if there are more than one AMD IOMMU capability
-         * pointers.
-         */
-        u16 cap_ptr;
-
         /* physical address of MMIO space */
         u64 mmio_phys;
         /* virtual address of MMIO space */
@@ -266,6 +259,13 @@ struct amd_iommu {
         /* capabilities of that IOMMU read from ACPI */
         u32 cap;
 
+        /*
+         * Capability pointer. There could be more than one IOMMU per PCI
+         * device function if there are more than one AMD IOMMU capability
+         * pointers.
+         */
+        u16 cap_ptr;
+
         /* pci domain of this IOMMU */
         u16 pci_seg;
 
@@ -284,19 +284,19 @@ struct amd_iommu {
         /* size of command buffer */
         u32 cmd_buf_size;
 
-        /* event buffer virtual address */
-        u8 *evt_buf;
         /* size of event buffer */
         u32 evt_buf_size;
+        /* event buffer virtual address */
+        u8 *evt_buf;
         /* MSI number for event interrupt */
         u16 evt_msi_num;
 
-        /* if one, we need to send a completion wait command */
-        int need_sync;
-
         /* true if interrupts for this IOMMU are already enabled */
         bool int_enabled;
 
+        /* if one, we need to send a completion wait command */
+        int need_sync;
+
         /* default dma_ops domain for that IOMMU */
         struct dma_ops_domain *default_dom;
 };
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 7f225a4b2a26..097794ff6b79 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -71,15 +71,13 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
 /* Make sure we keep the same behaviour */
 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
-#ifdef CONFIG_X86_32
-        return 0;
-#else
+#ifdef CONFIG_X86_64
         struct dma_mapping_ops *ops = get_dma_ops(dev);
         if (ops->mapping_error)
                 return ops->mapping_error(dev, dma_addr);
 
-        return (dma_addr == bad_dma_address);
 #endif
+        return (dma_addr == bad_dma_address);
 }
 
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 4850e4b02b61..ff386ff50ed7 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -239,7 +239,7 @@ struct pci_bus;
 void set_pci_bus_resources_arch_default(struct pci_bus *b);
 
 #ifdef CONFIG_SMP
-#define mc_capable()                    (boot_cpu_data.x86_max_cores > 1)
+#define mc_capable()    (cpus_weight(per_cpu(cpu_core_map, 0)) != nr_cpu_ids)
 #define smt_capable()                   (smp_num_siblings > 1)
 #endif
 
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index e4899e0e8787..a7b6dec6fc3f 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -187,6 +187,8 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
 
         spin_lock_irqsave(&iommu->lock, flags);
         ret = __iommu_queue_command(iommu, cmd);
+        if (!ret)
+                iommu->need_sync = 1;
         spin_unlock_irqrestore(&iommu->lock, flags);
 
         return ret;
@@ -210,10 +212,13 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
         cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
         CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
 
-        iommu->need_sync = 0;
-
         spin_lock_irqsave(&iommu->lock, flags);
 
+        if (!iommu->need_sync)
+                goto out;
+
+        iommu->need_sync = 0;
+
         ret = __iommu_queue_command(iommu, &cmd);
 
         if (ret)
@@ -254,8 +259,6 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
 
         ret = iommu_queue_command(iommu, &cmd);
 
-        iommu->need_sync = 1;
-
         return ret;
 }
 
@@ -281,8 +284,6 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
 
         ret = iommu_queue_command(iommu, &cmd);
 
-        iommu->need_sync = 1;
-
         return ret;
 }
 
@@ -343,7 +344,7 @@ static int iommu_map(struct protection_domain *dom,
         u64 __pte, *pte, *page;
 
         bus_addr  = PAGE_ALIGN(bus_addr);
-        phys_addr = PAGE_ALIGN(bus_addr);
+        phys_addr = PAGE_ALIGN(phys_addr);
 
         /* only support 512GB address spaces for now */
         if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK))
@@ -599,7 +600,7 @@ static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
                         continue;
 
                 p2 = IOMMU_PTE_PAGE(p1[i]);
-                for (j = 0; j < 512; ++i) {
+                for (j = 0; j < 512; ++j) {
                         if (!IOMMU_PTE_PRESENT(p2[j]))
                                 continue;
                         p3 = IOMMU_PTE_PAGE(p2[j]);
@@ -762,8 +763,6 @@ static void set_device_domain(struct amd_iommu *iommu,
         write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
 
         iommu_queue_inv_dev_entry(iommu, devid);
-
-        iommu->need_sync = 1;
 }
 
 /*****************************************************************************
@@ -858,6 +857,9 @@ static int get_device_resources(struct device *dev,
                 print_devid(_bdf, 1);
         }
 
+        if (domain_for_device(_bdf) == NULL)
+                set_device_domain(*iommu, *domain, _bdf);
+
         return 1;
 }
 
@@ -908,7 +910,7 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
         if (address >= dom->aperture_size)
                 return;
 
-        WARN_ON(address & 0xfffULL || address > dom->aperture_size);
+        WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size);
 
         pte  = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
         pte += IOMMU_PTE_L0_INDEX(address);
@@ -920,8 +922,8 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
 
 /*
  * This function contains common code for mapping of a physically
- * contiguous memory region into DMA address space. It is uses by all
- * mapping functions provided by this IOMMU driver.
+ * contiguous memory region into DMA address space. It is used by all
+ * mapping functions provided with this IOMMU driver.
  * Must be called with the domain lock held.
  */
 static dma_addr_t __map_single(struct device *dev,
@@ -981,7 +983,8 @@ static void __unmap_single(struct amd_iommu *iommu,
         dma_addr_t i, start;
         unsigned int pages;
 
-        if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size))
+        if ((dma_addr == bad_dma_address) ||
+            (dma_addr + size > dma_dom->aperture_size))
                 return;
 
         pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
@@ -1031,8 +1034,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
         if (addr == bad_dma_address)
                 goto out;
 
-        if (unlikely(iommu->need_sync))
-                iommu_completion_wait(iommu);
+        iommu_completion_wait(iommu);
 
 out:
         spin_unlock_irqrestore(&domain->lock, flags);
@@ -1060,8 +1062,7 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
 
         __unmap_single(iommu, domain->priv, dma_addr, size, dir);
 
-        if (unlikely(iommu->need_sync))
-                iommu_completion_wait(iommu);
+        iommu_completion_wait(iommu);
 
         spin_unlock_irqrestore(&domain->lock, flags);
 }
@@ -1127,8 +1128,7 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
                         goto unmap;
         }
 
-        if (unlikely(iommu->need_sync))
-                iommu_completion_wait(iommu);
+        iommu_completion_wait(iommu);
 
 out:
         spin_unlock_irqrestore(&domain->lock, flags);
@@ -1173,8 +1173,7 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
                 s->dma_address = s->dma_length = 0;
         }
 
-        if (unlikely(iommu->need_sync))
-                iommu_completion_wait(iommu);
+        iommu_completion_wait(iommu);
 
         spin_unlock_irqrestore(&domain->lock, flags);
 }
@@ -1225,8 +1224,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
                 goto out;
         }
 
-        if (unlikely(iommu->need_sync))
-                iommu_completion_wait(iommu);
+        iommu_completion_wait(iommu);
 
 out:
         spin_unlock_irqrestore(&domain->lock, flags);
@@ -1257,8 +1255,7 @@ static void free_coherent(struct device *dev, size_t size,
 
         __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
 
-        if (unlikely(iommu->need_sync))
-                iommu_completion_wait(iommu);
+        iommu_completion_wait(iommu);
 
         spin_unlock_irqrestore(&domain->lock, flags);
 
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index f98f4e1dba09..0f4c1fd5a1f4 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -604,6 +604,9 @@ static void __init __get_smp_config(unsigned int early)
                 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
                        "configuration information\n");
 
+        if (!mpf)
+                return;
+
         printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
                mpf->mpf_specification);
 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravirt-spinlocks.c
index 0e9f1982b1dd..95777b0faa73 100644
--- a/arch/x86/kernel/paravirt-spinlocks.c
+++ b/arch/x86/kernel/paravirt-spinlocks.c
@@ -7,7 +7,8 @@
 
 #include <asm/paravirt.h>
 
-static void default_spin_lock_flags(struct raw_spinlock *lock, unsigned long flags)
+static inline void
+default_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
 {
         __raw_spin_lock(lock);
 }
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index a42b02b4df68..ba7ad83e20a8 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -123,6 +123,8 @@ static void free_iommu(unsigned long offset, int size)
 
         spin_lock_irqsave(&iommu_bitmap_lock, flags);
         iommu_area_free(iommu_gart_bitmap, offset, size);
+        if (offset >= next_bit)
+                next_bit = offset + size;
         spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
 }
 
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index f1983d9477cd..410ddbc1aa2e 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -1038,13 +1038,13 @@ static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
         }
 
         rmap_write_protect(vcpu->kvm, sp->gfn);
+        kvm_unlink_unsync_page(vcpu->kvm, sp);
         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
                 kvm_mmu_zap_page(vcpu->kvm, sp);
                 return 1;
         }
 
         kvm_mmu_flush_tlb(vcpu);
-        kvm_unlink_unsync_page(vcpu->kvm, sp);
         return 0;
 }
 
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 613ec9aa674a..84eee43bbe74 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -331,6 +331,7 @@ static int FNAME(shadow_walk_entry)(struct kvm_shadow_walk *_sw,
                 r = kvm_read_guest_atomic(vcpu->kvm, gw->pte_gpa[level - 2],
                                           &curr_pte, sizeof(curr_pte));
                 if (r || curr_pte != gw->ptes[level - 2]) {
+                        kvm_mmu_put_page(shadow_page, sptep);
                         kvm_release_pfn_clean(sw->pfn);
                         sw->sptep = NULL;
                         return 1;
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index d06b4dc0e2ea..a4018b01e1f9 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3149,7 +3149,9 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
 
         if (cpu_has_virtual_nmis()) {
                 if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
-                        if (vmx_nmi_enabled(vcpu)) {
+                        if (vcpu->arch.interrupt.pending) {
+                                enable_nmi_window(vcpu);
+                        } else if (vmx_nmi_enabled(vcpu)) {
                                 vcpu->arch.nmi_pending = false;
                                 vcpu->arch.nmi_injected = true;
                         } else {
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 022cd41ea9b4..202864ad49a7 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -401,14 +401,13 @@ static int __init ppro_init(char **cpu_type)
                 *cpu_type = "i386/pii";
                 break;
         case 6 ... 8:
+        case 10 ... 11:
                 *cpu_type = "i386/piii";
                 break;
         case 9:
+        case 13:
                 *cpu_type = "i386/p6_mobile";
                 break;
-        case 10 ... 13:
-                *cpu_type = "i386/p6";
-                break;
         case 14:
                 *cpu_type = "i386/core";
                 break;
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 716d26f0e5d4..e9f80c744cf3 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -156,6 +156,8 @@ static void ppro_start(struct op_msrs const * const msrs)
         unsigned int low, high;
         int i;
 
+        if (!reset_value)
+                return;
         for (i = 0; i < num_counters; ++i) {
                 if (reset_value[i]) {
                         CTRL_READ(low, high, msrs, i);
@@ -171,6 +173,8 @@ static void ppro_stop(struct op_msrs const * const msrs)
         unsigned int low, high;
         int i;
 
+        if (!reset_value)
+                return;
         for (i = 0; i < num_counters; ++i) {
                 if (!reset_value[i])
                         continue;