diff options
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/setup_64.c | 35 | ||||
-rw-r--r-- | arch/x86/vdso/vdso32-setup.c | 8 |
2 files changed, 41 insertions, 2 deletions
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c index 540686be35d0..b80300710c08 100644 --- a/arch/x86/kernel/setup_64.c +++ b/arch/x86/kernel/setup_64.c | |||
@@ -885,6 +885,32 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) | |||
885 | srat_detect_node(); | 885 | srat_detect_node(); |
886 | } | 886 | } |
887 | 887 | ||
888 | static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c) | ||
889 | { | ||
890 | if (c->x86 == 0x6 && c->x86_model >= 0xf) | ||
891 | set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); | ||
892 | } | ||
893 | |||
894 | static void __cpuinit init_centaur(struct cpuinfo_x86 *c) | ||
895 | { | ||
896 | /* Cache sizes */ | ||
897 | unsigned n; | ||
898 | |||
899 | n = c->extended_cpuid_level; | ||
900 | if (n >= 0x80000008) { | ||
901 | unsigned eax = cpuid_eax(0x80000008); | ||
902 | c->x86_virt_bits = (eax >> 8) & 0xff; | ||
903 | c->x86_phys_bits = eax & 0xff; | ||
904 | } | ||
905 | |||
906 | if (c->x86 == 0x6 && c->x86_model >= 0xf) { | ||
907 | c->x86_cache_alignment = c->x86_clflush_size * 2; | ||
908 | set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); | ||
909 | set_cpu_cap(c, X86_FEATURE_REP_GOOD); | ||
910 | } | ||
911 | set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); | ||
912 | } | ||
913 | |||
888 | static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) | 914 | static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) |
889 | { | 915 | { |
890 | char *v = c->x86_vendor_id; | 916 | char *v = c->x86_vendor_id; |
@@ -893,6 +919,8 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) | |||
893 | c->x86_vendor = X86_VENDOR_AMD; | 919 | c->x86_vendor = X86_VENDOR_AMD; |
894 | else if (!strcmp(v, "GenuineIntel")) | 920 | else if (!strcmp(v, "GenuineIntel")) |
895 | c->x86_vendor = X86_VENDOR_INTEL; | 921 | c->x86_vendor = X86_VENDOR_INTEL; |
922 | else if (!strcmp(v, "CentaurHauls")) | ||
923 | c->x86_vendor = X86_VENDOR_CENTAUR; | ||
896 | else | 924 | else |
897 | c->x86_vendor = X86_VENDOR_UNKNOWN; | 925 | c->x86_vendor = X86_VENDOR_UNKNOWN; |
898 | } | 926 | } |
@@ -989,6 +1017,9 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) | |||
989 | if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15)) | 1017 | if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15)) |
990 | set_cpu_cap(c, X86_FEATURE_PAT); | 1018 | set_cpu_cap(c, X86_FEATURE_PAT); |
991 | break; | 1019 | break; |
1020 | case X86_VENDOR_CENTAUR: | ||
1021 | early_init_centaur(c); | ||
1022 | break; | ||
992 | } | 1023 | } |
993 | 1024 | ||
994 | } | 1025 | } |
@@ -1025,6 +1056,10 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |||
1025 | init_intel(c); | 1056 | init_intel(c); |
1026 | break; | 1057 | break; |
1027 | 1058 | ||
1059 | case X86_VENDOR_CENTAUR: | ||
1060 | init_centaur(c); | ||
1061 | break; | ||
1062 | |||
1028 | case X86_VENDOR_UNKNOWN: | 1063 | case X86_VENDOR_UNKNOWN: |
1029 | default: | 1064 | default: |
1030 | display_cacheinfo(c); | 1065 | display_cacheinfo(c); |
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c index f7e78d84fc01..e2af8eee80e3 100644 --- a/arch/x86/vdso/vdso32-setup.c +++ b/arch/x86/vdso/vdso32-setup.c | |||
@@ -210,8 +210,12 @@ static int use_sysenter __read_mostly = -1; | |||
210 | /* May not be __init: called during resume */ | 210 | /* May not be __init: called during resume */ |
211 | void syscall32_cpu_init(void) | 211 | void syscall32_cpu_init(void) |
212 | { | 212 | { |
213 | if (use_sysenter < 0) | 213 | if (use_sysenter < 0) { |
214 | use_sysenter = (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL); | 214 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
215 | use_sysenter = 1; | ||
216 | if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) | ||
217 | use_sysenter = 1; | ||
218 | } | ||
215 | 219 | ||
216 | /* Load these always in case some future AMD CPU supports | 220 | /* Load these always in case some future AMD CPU supports |
217 | SYSENTER from compat mode too. */ | 221 | SYSENTER from compat mode too. */ |