24 files changed, 69 insertions, 78 deletions

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9c39095b33fc..bc2fbadff9f9 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1803,7 +1803,7 @@ config DMAR
           remapping devices.
 
 config DMAR_DEFAULT_ON
-        def_bool n
+        def_bool y
         prompt "Enable DMA Remapping Devices by default"
         depends on DMAR
         help
diff --git a/arch/x86/include/asm/iomap.h b/arch/x86/include/asm/iomap.h
index c1f06289b14b..86af26091d6c 100644
--- a/arch/x86/include/asm/iomap.h
+++ b/arch/x86/include/asm/iomap.h
@@ -23,6 +23,9 @@
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 
+int
+is_io_mapping_possible(resource_size_t base, unsigned long size);
+
 void *
 iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
 
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h
index 07f1af494ca5..105fb90a0635 100644
--- a/arch/x86/include/asm/mmzone_32.h
+++ b/arch/x86/include/asm/mmzone_32.h
@@ -32,8 +32,6 @@ static inline void get_memcfg_numa(void)
         get_memcfg_numa_flat();
 }
 
-extern int early_pfn_to_nid(unsigned long pfn);
-
 extern void resume_map_numa_kva(pgd_t *pgd);
 
 #else /* !CONFIG_NUMA */
diff --git a/arch/x86/include/asm/mmzone_64.h b/arch/x86/include/asm/mmzone_64.h
index a5b3817d4b9e..a29f48c2a322 100644
--- a/arch/x86/include/asm/mmzone_64.h
+++ b/arch/x86/include/asm/mmzone_64.h
@@ -40,8 +40,6 @@ static inline __attribute__((pure)) int phys_to_nid(unsigned long addr)
 #define node_end_pfn(nid)       (NODE_DATA(nid)->node_start_pfn +       \
                                  NODE_DATA(nid)->node_spanned_pages)
 
-extern int early_pfn_to_nid(unsigned long pfn);
-
 #ifdef CONFIG_NUMA_EMU
 #define FAKE_NODE_MIN_SIZE      (64 * 1024 * 1024)
 #define FAKE_NODE_MIN_HASH_MASK (~(FAKE_NODE_MIN_SIZE - 1UL))
diff --git a/arch/x86/include/asm/seccomp_32.h b/arch/x86/include/asm/seccomp_32.h
index a6ad87b352c4..b811d6f5780c 100644
--- a/arch/x86/include/asm/seccomp_32.h
+++ b/arch/x86/include/asm/seccomp_32.h
@@ -1,12 +1,6 @@
 #ifndef _ASM_X86_SECCOMP_32_H
 #define _ASM_X86_SECCOMP_32_H
 
-#include <linux/thread_info.h>
-
-#ifdef TIF_32BIT
-#error "unexpected TIF_32BIT on i386"
-#endif
-
 #include <linux/unistd.h>
 
 #define __NR_seccomp_read __NR_read
diff --git a/arch/x86/include/asm/seccomp_64.h b/arch/x86/include/asm/seccomp_64.h
index 4171bb794e9e..84ec1bd161a5 100644
--- a/arch/x86/include/asm/seccomp_64.h
+++ b/arch/x86/include/asm/seccomp_64.h
@@ -1,14 +1,6 @@
 #ifndef _ASM_X86_SECCOMP_64_H
 #define _ASM_X86_SECCOMP_64_H
 
-#include <linux/thread_info.h>
-
-#ifdef TIF_32BIT
-#error "unexpected TIF_32BIT on x86_64"
-#else
-#define TIF_32BIT TIF_IA32
-#endif
-
 #include <linux/unistd.h>
 #include <asm/ia32_unistd.h>
 
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
index bcc293423a70..96258d9dc974 100644
--- a/arch/x86/kernel/acpi/wakeup_64.S
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -13,7 +13,6 @@
          * Hooray, we are in Long 64-bit mode (but still running in low memory)
          */
 ENTRY(wakeup_long64)
-wakeup_long64:
         movq    saved_magic, %rax
         movq    $0x123456789abcdef0, %rdx
         cmpq    %rdx, %rax
@@ -34,16 +33,12 @@ wakeup_long64:
 
         movq    saved_rip, %rax
         jmp     *%rax
+ENDPROC(wakeup_long64)
 
 bogus_64_magic:
         jmp     bogus_64_magic
 
-        .align 2
-        .p2align 4,,15
-.globl do_suspend_lowlevel
-        .type   do_suspend_lowlevel,@function
-do_suspend_lowlevel:
-.LFB5:
+ENTRY(do_suspend_lowlevel)
         subq    $8, %rsp
         xorl    %eax, %eax
         call    save_processor_state
@@ -67,7 +62,7 @@ do_suspend_lowlevel:
         pushfq
         popq    pt_regs_flags(%rax)
 
-        movq    $.L97, saved_rip(%rip)
+        movq    $resume_point, saved_rip(%rip)
 
         movq    %rsp, saved_rsp
         movq    %rbp, saved_rbp
@@ -78,14 +73,12 @@ do_suspend_lowlevel:
         addq    $8, %rsp
         movl    $3, %edi
         xorl    %eax, %eax
-        jmp     acpi_enter_sleep_state
-.L97:
-        .p2align 4,,7
-.L99:
-        .align 4
-        movl    $24, %eax
-        movw    %ax, %ds
+        call    acpi_enter_sleep_state
+        /* in case something went wrong, restore the machine status and go on */
+        jmp     resume_point
 
+        .align 4
+resume_point:
         /* We don't restore %rax, it must be 0 anyway */
         movq    $saved_context, %rax
         movq    saved_context_cr4(%rax), %rbx
@@ -117,12 +110,9 @@ do_suspend_lowlevel:
         xorl    %eax, %eax
         addq    $8, %rsp
         jmp     restore_processor_state
-.LFE5:
-.Lfe5:
-        .size   do_suspend_lowlevel, .Lfe5-do_suspend_lowlevel
-        
+ENDPROC(do_suspend_lowlevel)
+
 .data
-ALIGN
 ENTRY(saved_rbp)        .quad   0
 ENTRY(saved_rsi)        .quad   0
 ENTRY(saved_rdi)        .quad   0
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic.c
index 115449f869ee..570f36e44e59 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic.c
@@ -862,7 +862,7 @@ void clear_local_APIC(void)
         }
 
         /* lets not touch this if we didn't frob it */
-#if defined(CONFIG_X86_MCE_P4THERMAL) || defined(X86_MCE_INTEL)
+#if defined(CONFIG_X86_MCE_P4THERMAL) || defined(CONFIG_X86_MCE_INTEL)
         if (maxlvt >= 5) {
                 v = apic_read(APIC_LVTTHMR);
                 apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED);
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 98807bb095ad..266ec6c18b6c 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -1192,6 +1192,7 @@ static int suspend(int vetoable)
         device_suspend(PMSG_SUSPEND);
         local_irq_disable();
         device_power_down(PMSG_SUSPEND);
+        sysdev_suspend(PMSG_SUSPEND);
 
         local_irq_enable();
 
@@ -1208,6 +1209,7 @@ static int suspend(int vetoable)
         if (err != APM_SUCCESS)
                 apm_error("suspend", err);
         err = (err == APM_SUCCESS) ? 0 : -EIO;
+        sysdev_resume();
         device_power_up(PMSG_RESUME);
         local_irq_enable();
         device_resume(PMSG_RESUME);
@@ -1228,6 +1230,7 @@ static void standby(void)
 
         local_irq_disable();
         device_power_down(PMSG_SUSPEND);
+        sysdev_suspend(PMSG_SUSPEND);
         local_irq_enable();
 
         err = set_system_power_state(APM_STATE_STANDBY);
@@ -1235,6 +1238,7 @@ static void standby(void)
                 apm_error("standby", err);
 
         local_irq_disable();
+        sysdev_resume();
         device_power_up(PMSG_RESUME);
         local_irq_enable();
 }
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 1c838032fd37..fe79985ce0f2 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -295,11 +295,11 @@ void do_machine_check(struct pt_regs * regs, long error_code)
                  * If we know that the error was in user space, send a
                  * SIGBUS.  Otherwise, panic if tolerance is low.
                  *
-                 * do_exit() takes an awful lot of locks and has a slight
+                 * force_sig() takes an awful lot of locks and has a slight
                  * risk of deadlocking.
                  */
                 if (user_space) {
-                        do_exit(SIGBUS);
+                        force_sig(SIGBUS, current);
                 } else if (panic_on_oops || tolerant < 2) {
                         mce_panic("Uncorrected machine check",
                                 &panicm, mcestart);
@@ -490,7 +490,7 @@ static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
 
 }
 
-static void __cpuinit mce_cpu_features(struct cpuinfo_x86 *c)
+static void mce_cpu_features(struct cpuinfo_x86 *c)
 {
         switch (c->x86_vendor) {
         case X86_VENDOR_INTEL:
@@ -734,6 +734,7 @@ __setup("mce=", mcheck_enable);
 static int mce_resume(struct sys_device *dev)
 {
         mce_init(NULL);
+        mce_cpu_features(&current_cpu_data);
         return 0;
 }
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 8ae8c4ff094d..f2ee0ae29bd6 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -121,7 +121,7 @@ static long threshold_restart_bank(void *_tr)
 }
 
 /* cpu init entry point, called from mce.c with preempt off */
-void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
+void mce_amd_feature_init(struct cpuinfo_x86 *c)
 {
         unsigned int bank, block;
         unsigned int cpu = smp_processor_id();
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index 4b48f251fd39..f44c36624360 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -30,7 +30,7 @@ asmlinkage void smp_thermal_interrupt(void)
         irq_exit();
 }
 
-static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
+static void intel_init_thermal(struct cpuinfo_x86 *c)
 {
         u32 l, h;
         int tm2 = 0;
@@ -84,7 +84,7 @@ static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
         return;
 }
 
-void __cpuinit mce_intel_feature_init(struct cpuinfo_x86 *c)
+void mce_intel_feature_init(struct cpuinfo_x86 *c)
 {
         intel_init_thermal(c);
 }
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index a546f55c77b4..bd4da2af08ae 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -104,9 +104,6 @@ void cpu_idle(void)
                         check_pgt_cache();
                         rmb();
 
-                        if (rcu_pending(cpu))
-                                rcu_check_callbacks(cpu, 0);
-
                         if (cpu_is_offline(cpu))
                                 play_dead();
 
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 5a4c23d89892..06ca07f6ad86 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -1388,7 +1388,7 @@ void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
 #ifdef CONFIG_X86_32
 # define IS_IA32        1
 #elif defined CONFIG_IA32_EMULATION
-# define IS_IA32        test_thread_flag(TIF_IA32)
+# define IS_IA32        is_compat_task()
 #else
 # define IS_IA32        0
 #endif
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index e6e695acd725..241ec3923f61 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -115,7 +115,7 @@ unsigned long __init calibrate_cpu(void)
 
 static struct irqaction irq0 = {
         .handler        = timer_interrupt,
-        .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING,
+        .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER,
         .mask           = CPU_MASK_NONE,
         .name           = "timer"
 };
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index c4c1f9e09402..e5b088fffa40 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -202,7 +202,7 @@ static irqreturn_t vmi_timer_interrupt(int irq, void *dev_id)
 static struct irqaction vmi_clock_action  = {
         .name           = "vmi-timer",
         .handler        = vmi_timer_interrupt,
-        .flags          = IRQF_DISABLED | IRQF_NOBALANCING,
+        .flags          = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
         .mask           = CPU_MASK_ALL,
 };
 
@@ -283,10 +283,13 @@ void __devinit vmi_time_ap_init(void)
 #endif
 
 /** vmi clocksource */
+static struct clocksource clocksource_vmi;
 
 static cycle_t read_real_cycles(void)
 {
-        return vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
+        cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
+        return ret >= clocksource_vmi.cycle_last ?
+                ret : clocksource_vmi.cycle_last;
 }
 
 static struct clocksource clocksource_vmi = {
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
index a265a7c63190..50b591871128 100644
--- a/arch/x86/mach-default/setup.c
+++ b/arch/x86/mach-default/setup.c
@@ -96,7 +96,7 @@ void __init trap_init_hook(void)
 
 static struct irqaction irq0  = {
         .handler = timer_interrupt,
-        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
+        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
         .mask = CPU_MASK_NONE,
         .name = "timer"
 };
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
index d914a7996a66..8e5118371f0f 100644
--- a/arch/x86/mach-voyager/setup.c
+++ b/arch/x86/mach-voyager/setup.c
@@ -56,7 +56,7 @@ void __init trap_init_hook(void)
 
 static struct irqaction irq0 = {
         .handler = timer_interrupt,
-        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
+        .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
         .mask = CPU_MASK_NONE,
         .name = "timer"
 };
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
index 7ffcdeec4631..b9cc84a2a4fc 100644
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ b/arch/x86/mach-voyager/voyager_smp.c
@@ -65,7 +65,7 @@ static volatile unsigned long smp_invalidate_needed;
 
 /* Bitmask of CPUs present in the system - exported by i386_syms.c, used
  * by scheduler but indexed physically */
-cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
+static cpumask_t voyager_phys_cpu_present_map = CPU_MASK_NONE;
 
 /* The internal functions */
 static void send_CPI(__u32 cpuset, __u8 cpi);
@@ -366,19 +366,19 @@ void __init find_smp_config(void)
         /* set up everything for just this CPU, we can alter
          * this as we start the other CPUs later */
         /* now get the CPU disposition from the extended CMOS */
-        cpus_addr(phys_cpu_present_map)[0] =
+        cpus_addr(voyager_phys_cpu_present_map)[0] =
             voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
-        cpus_addr(phys_cpu_present_map)[0] |=
+        cpus_addr(voyager_phys_cpu_present_map)[0] |=
             voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
-        cpus_addr(phys_cpu_present_map)[0] |=
+        cpus_addr(voyager_phys_cpu_present_map)[0] |=
             voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
                                        2) << 16;
-        cpus_addr(phys_cpu_present_map)[0] |=
+        cpus_addr(voyager_phys_cpu_present_map)[0] |=
             voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
                                        3) << 24;
-        init_cpu_possible(&phys_cpu_present_map);
-        printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
-               cpus_addr(phys_cpu_present_map)[0]);
+        init_cpu_possible(&voyager_phys_cpu_present_map);
+        printk("VOYAGER SMP: voyager_phys_cpu_present_map = 0x%lx\n",
+               cpus_addr(voyager_phys_cpu_present_map)[0]);
         /* Here we set up the VIC to enable SMP */
         /* enable the CPIs by writing the base vector to their register */
         outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
@@ -628,15 +628,15 @@ void __init smp_boot_cpus(void)
                 /* now that the cat has probed the Voyager System Bus, sanity
                  * check the cpu map */
                 if (((voyager_quad_processors | voyager_extended_vic_processors)
-                     & cpus_addr(phys_cpu_present_map)[0]) !=
-                    cpus_addr(phys_cpu_present_map)[0]) {
+                     & cpus_addr(voyager_phys_cpu_present_map)[0]) !=
+                    cpus_addr(voyager_phys_cpu_present_map)[0]) {
                         /* should panic */
                         printk("\n\n***WARNING*** "
                                "Sanity check of CPU present map FAILED\n");
                 }
         } else if (voyager_level == 4)
                 voyager_extended_vic_processors =
-                    cpus_addr(phys_cpu_present_map)[0];
+                    cpus_addr(voyager_phys_cpu_present_map)[0];
 
         /* this sets up the idle task to run on the current cpu */
         voyager_extended_cpus = 1;
@@ -670,7 +670,7 @@ void __init smp_boot_cpus(void)
         /* loop over all the extended VIC CPUs and boot them.  The
          * Quad CPUs must be bootstrapped by their extended VIC cpu */
         for (i = 0; i < nr_cpu_ids; i++) {
-                if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
+                if (i == boot_cpu_id || !cpu_isset(i, voyager_phys_cpu_present_map))
                         continue;
                 do_boot_cpu(i);
                 /* This udelay seems to be needed for the Quad boots
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c
index ca53224fc56c..04102d42ff42 100644
--- a/arch/x86/mm/iomap_32.c
+++ b/arch/x86/mm/iomap_32.c
@@ -20,6 +20,17 @@
 #include <asm/pat.h>
 #include <linux/module.h>
 
+int is_io_mapping_possible(resource_size_t base, unsigned long size)
+{
+#ifndef CONFIG_X86_PAE
+        /* There is no way to map greater than 1 << 32 address without PAE */
+        if (base + size > 0x100000000ULL)
+                return 0;
+#endif
+        return 1;
+}
+EXPORT_SYMBOL_GPL(is_io_mapping_possible);
+
 /* Map 'pfn' using fixed map 'type' and protections 'prot'
  */
 void *
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index 71a14f89f89e..f3516da035d1 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -145,7 +145,7 @@ int __init compute_hash_shift(struct bootnode *nodes, int numnodes,
         return shift;
 }
 
-int early_pfn_to_nid(unsigned long pfn)
+int __meminit  __early_pfn_to_nid(unsigned long pfn)
 {
         return phys_to_nid(pfn << PAGE_SHIFT);
 }
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 8ca0d8566fc8..7be47d1a97e4 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -508,18 +508,13 @@ static int split_large_page(pte_t *kpte, unsigned long address)
 #endif
 
         /*
-         * Install the new, split up pagetable. Important details here:
+         * Install the new, split up pagetable.
          *
-         * On Intel the NX bit of all levels must be cleared to make a
-         * page executable. See section 4.13.2 of Intel 64 and IA-32
-         * Architectures Software Developer's Manual).
-         *
-         * Mark the entry present. The current mapping might be
-         * set to not present, which we preserved above.
+         * We use the standard kernel pagetable protections for the new
+         * pagetable protections, the actual ptes set above control the
+         * primary protection behavior:
          */
-        ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
-        pgprot_val(ref_prot) |= _PAGE_PRESENT;
-        __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
+        __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
         base = NULL;
 
 out_unlock:
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index aebbf67a79d0..e0ab173b6974 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -11,6 +11,7 @@
 #include <linux/bootmem.h>
 #include <linux/debugfs.h>
 #include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/gfp.h>
 #include <linux/mm.h>
 #include <linux/fs.h>
@@ -868,6 +869,7 @@ pgprot_t pgprot_writecombine(pgprot_t prot)
         else
                 return pgprot_noncached(prot);
 }
+EXPORT_SYMBOL_GPL(pgprot_writecombine);
 
 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
 
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index bea215230b20..b58e96338149 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1672,6 +1672,9 @@ asmlinkage void __init xen_start_kernel(void)
            possible map and a non-dummy shared_info. */
         per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
 
+        local_irq_disable();
+        early_boot_irqs_off();
+
         xen_raw_console_write("mapping kernel into physical memory\n");
         pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);