aboutsummaryrefslogtreecommitdiffstats
path: root/arch/x86
diff options
context:
space:
mode:
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/Kconfig64
-rw-r--r--arch/x86/Kconfig.cpu4
-rw-r--r--arch/x86/Kconfig.debug8
-rw-r--r--arch/x86/Makefile4
-rw-r--r--arch/x86/boot/a20.c5
-rw-r--r--arch/x86/boot/compressed/head_64.S5
-rw-r--r--arch/x86/boot/compressed/misc.c55
-rw-r--r--arch/x86/boot/compressed/relocs.c198
-rw-r--r--arch/x86/boot/cpu.c2
-rw-r--r--arch/x86/boot/main.c4
-rw-r--r--arch/x86/boot/pmjump.S4
-rw-r--r--arch/x86/boot/video-vga.c3
-rw-r--r--arch/x86/configs/i386_defconfig1711
-rw-r--r--arch/x86/configs/x86_64_defconfig1735
-rw-r--r--arch/x86/ia32/ia32entry.S6
-rw-r--r--arch/x86/kernel/Makefile4
-rw-r--r--arch/x86/kernel/acpi/boot.c2
-rw-r--r--arch/x86/kernel/amd_iommu.c962
-rw-r--r--arch/x86/kernel/amd_iommu_init.c875
-rw-r--r--arch/x86/kernel/aperture_64.c307
-rw-r--r--arch/x86/kernel/apic_32.c30
-rw-r--r--arch/x86/kernel/apic_64.c36
-rw-r--r--arch/x86/kernel/apm_32.c25
-rw-r--r--arch/x86/kernel/cpu/Makefile4
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c17
-rw-r--r--arch/x86/kernel/cpu/amd.c42
-rw-r--r--arch/x86/kernel/cpu/amd_64.c211
-rw-r--r--arch/x86/kernel/cpu/bugs.c27
-rw-r--r--arch/x86/kernel/cpu/bugs_64.c (renamed from arch/x86/kernel/bugs_64.c)0
-rw-r--r--arch/x86/kernel/cpu/centaur_64.c43
-rw-r--r--arch/x86/kernel/cpu/cpu.h5
-rw-r--r--arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c44
-rw-r--r--arch/x86/kernel/cpu/intel_64.c103
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c1
-rw-r--r--arch/x86/kernel/cpu/mcheck/k7.c36
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_64.c24
-rw-r--r--arch/x86/kernel/cpu/mcheck/p4.c90
-rw-r--r--arch/x86/kernel/early-quirks.c13
-rw-r--r--arch/x86/kernel/entry_32.S2
-rw-r--r--arch/x86/kernel/entry_64.S13
-rw-r--r--arch/x86/kernel/genx2apic_uv_x.c141
-rw-r--r--arch/x86/kernel/head_64.S27
-rw-r--r--arch/x86/kernel/hpet.c43
-rw-r--r--arch/x86/kernel/i387.c4
-rw-r--r--arch/x86/kernel/i8259.c (renamed from arch/x86/kernel/i8259_32.c)136
-rw-r--r--arch/x86/kernel/i8259_64.c512
-rw-r--r--arch/x86/kernel/io_apic_32.c478
-rw-r--r--arch/x86/kernel/io_apic_64.c138
-rw-r--r--arch/x86/kernel/ipi.c1
-rw-r--r--arch/x86/kernel/irq_32.c254
-rw-r--r--arch/x86/kernel/irq_64.c28
-rw-r--r--arch/x86/kernel/irqinit_32.c114
-rw-r--r--arch/x86/kernel/irqinit_64.c217
-rw-r--r--arch/x86/kernel/ldt.c6
-rw-r--r--arch/x86/kernel/machine_kexec_32.c4
-rw-r--r--arch/x86/kernel/microcode.c29
-rw-r--r--arch/x86/kernel/mmconf-fam10h_64.c1
-rw-r--r--arch/x86/kernel/nmi_32.c13
-rw-r--r--arch/x86/kernel/nmi_64.c11
-rw-r--r--arch/x86/kernel/paravirt.c4
-rw-r--r--arch/x86/kernel/pci-dma.c18
-rw-r--r--arch/x86/kernel/pci-gart_64.c83
-rw-r--r--arch/x86/kernel/process.c190
-rw-r--r--arch/x86/kernel/process_32.c61
-rw-r--r--arch/x86/kernel/process_64.c35
-rw-r--r--arch/x86/kernel/ptrace.c4
-rw-r--r--arch/x86/kernel/quirks.c58
-rw-r--r--arch/x86/kernel/reboot.c18
-rw-r--r--arch/x86/kernel/reboot_fixups_32.c4
-rw-r--r--arch/x86/kernel/setup_64.c454
-rw-r--r--arch/x86/kernel/smpboot.c7
-rw-r--r--arch/x86/kernel/sys_i386_32.c64
-rw-r--r--arch/x86/kernel/time_32.c3
-rw-r--r--arch/x86/kernel/time_64.c2
-rw-r--r--arch/x86/kernel/traps_64.c3
-rw-r--r--arch/x86/kernel/tsc_32.c12
-rw-r--r--arch/x86/kernel/tsc_64.c2
-rw-r--r--arch/x86/kernel/vmiclock_32.c3
-rw-r--r--arch/x86/kernel/vmlinux_32.lds.S7
-rw-r--r--arch/x86/kernel/vmlinux_64.lds.S8
-rw-r--r--arch/x86/kernel/vsmp_64.c3
-rw-r--r--arch/x86/lib/delay_32.c25
-rw-r--r--arch/x86/mach-visws/visws_apic.c3
-rw-r--r--arch/x86/math-emu/reg_constant.c8
-rw-r--r--arch/x86/mm/discontig_32.c54
-rw-r--r--arch/x86/mm/dump_pagetables.c2
-rw-r--r--arch/x86/mm/fault.c20
-rw-r--r--arch/x86/mm/init_32.c18
-rw-r--r--arch/x86/mm/init_64.c13
-rw-r--r--arch/x86/mm/ioremap.c16
-rw-r--r--arch/x86/mm/k8topology_64.c13
-rw-r--r--arch/x86/mm/pageattr.c41
-rw-r--r--arch/x86/mm/pat.c375
-rw-r--r--arch/x86/mm/pgtable.c2
-rw-r--r--arch/x86/mm/srat_64.c3
-rw-r--r--arch/x86/oprofile/nmi_int.c3
-rw-r--r--arch/x86/pci/Makefile_321
-rw-r--r--arch/x86/pci/Makefile_642
-rw-r--r--arch/x86/pci/acpi.c1
-rw-r--r--arch/x86/pci/amd_bus.c (renamed from arch/x86/pci/k8-bus_64.c)32
-rw-r--r--arch/x86/pci/direct.c25
-rw-r--r--arch/x86/pci/i386.c4
-rw-r--r--arch/x86/pci/irq.c261
-rw-r--r--arch/x86/pci/mmconfig-shared.c2
-rw-r--r--arch/x86/pci/pci.h1
-rw-r--r--arch/x86/vdso/vma.c2
-rw-r--r--arch/x86/xen/Kconfig10
-rw-r--r--arch/x86/xen/Makefile2
-rw-r--r--arch/x86/xen/enlighten.c132
-rw-r--r--arch/x86/xen/manage.c143
-rw-r--r--arch/x86/xen/mmu.c270
-rw-r--r--arch/x86/xen/mmu.h12
-rw-r--r--arch/x86/xen/multicalls.c40
-rw-r--r--arch/x86/xen/multicalls.h12
-rw-r--r--arch/x86/xen/setup.c5
-rw-r--r--arch/x86/xen/smp.c8
-rw-r--r--arch/x86/xen/suspend.c45
-rw-r--r--arch/x86/xen/time.c13
-rw-r--r--arch/x86/xen/xen-head.S5
-rw-r--r--arch/x86/xen/xen-ops.h11
120 files changed, 7704 insertions, 3855 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 23c352e408af..640dc62a7fa0 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -272,7 +272,7 @@ config X86_ELAN
272 272
273config X86_VOYAGER 273config X86_VOYAGER
274 bool "Voyager (NCR)" 274 bool "Voyager (NCR)"
275 depends on X86_32 && (SMP || BROKEN) 275 depends on X86_32 && (SMP || BROKEN) && !PCI
276 help 276 help
277 Voyager is an MCA-based 32-way capable SMP architecture proprietary 277 Voyager is an MCA-based 32-way capable SMP architecture proprietary
278 to NCR Corp. Machine classes 345x/35xx/4100/51xx are Voyager-based. 278 to NCR Corp. Machine classes 345x/35xx/4100/51xx are Voyager-based.
@@ -284,7 +284,7 @@ config X86_VOYAGER
284 284
285config X86_VISWS 285config X86_VISWS
286 bool "SGI 320/540 (Visual Workstation)" 286 bool "SGI 320/540 (Visual Workstation)"
287 depends on X86_32 287 depends on X86_32 && !PCI
288 help 288 help
289 The SGI Visual Workstation series is an IA32-based workstation 289 The SGI Visual Workstation series is an IA32-based workstation
290 based on SGI systems chips with some legacy PC hardware attached. 290 based on SGI systems chips with some legacy PC hardware attached.
@@ -307,7 +307,7 @@ if X86_GENERICARCH
307 307
308config X86_NUMAQ 308config X86_NUMAQ
309 bool "NUMAQ (IBM/Sequent)" 309 bool "NUMAQ (IBM/Sequent)"
310 depends on SMP && X86_32 && X86_MPPARSE 310 depends on SMP && X86_32 && PCI && X86_MPPARSE
311 select NUMA 311 select NUMA
312 help 312 help
313 This option is used for getting Linux to run on a NUMAQ (IBM/Sequent) 313 This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
@@ -356,7 +356,7 @@ config X86_RDC321X
356config X86_VSMP 356config X86_VSMP
357 bool "Support for ScaleMP vSMP" 357 bool "Support for ScaleMP vSMP"
358 select PARAVIRT 358 select PARAVIRT
359 depends on X86_64 359 depends on X86_64 && !PCI
360 help 360 help
361 Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is 361 Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
362 supposed to run on these EM64T-based machines. Only choose this option 362 supposed to run on these EM64T-based machines. Only choose this option
@@ -436,35 +436,19 @@ config PARAVIRT_CLOCK
436 436
437endif 437endif
438 438
439config MEMTEST_BOOTPARAM 439config MEMTEST
440 bool "Memtest boot parameter" 440 bool "Memtest"
441 depends on X86_64 441 depends on X86_64
442 default y 442 default y
443 help 443 help
444 This option adds a kernel parameter 'memtest', which allows memtest 444 This option adds a kernel parameter 'memtest', which allows memtest
445 to be disabled at boot. If this option is selected, memtest 445 to be set.
446 functionality can be disabled with memtest=0 on the kernel 446 memtest=0, mean disabled; -- default
447 command line. The purpose of this option is to allow a single 447 memtest=1, mean do 1 test pattern;
448 kernel image to be distributed with memtest built in, but not 448 ...
449 necessarily enabled. 449 memtest=4, mean do 4 test patterns.
450
451 If you are unsure how to answer this question, answer Y. 450 If you are unsure how to answer this question, answer Y.
452 451
453config MEMTEST_BOOTPARAM_VALUE
454 int "Memtest boot parameter default value (0-4)"
455 depends on MEMTEST_BOOTPARAM
456 range 0 4
457 default 0
458 help
459 This option sets the default value for the kernel parameter
460 'memtest', which allows memtest to be disabled at boot. If this
461 option is set to 0 (zero), the memtest kernel parameter will
462 default to 0, disabling memtest at bootup. If this option is
463 set to 4, the memtest kernel parameter will default to 4,
464 enabling memtest at bootup, and use that as pattern number.
465
466 If you are unsure how to answer this question, answer 0.
467
468config ACPI_SRAT 452config ACPI_SRAT
469 def_bool y 453 def_bool y
470 depends on X86_32 && ACPI && NUMA && X86_GENERICARCH 454 depends on X86_32 && ACPI && NUMA && X86_GENERICARCH
@@ -568,6 +552,21 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT
568 Calgary anyway, pass 'iommu=calgary' on the kernel command line. 552 Calgary anyway, pass 'iommu=calgary' on the kernel command line.
569 If unsure, say Y. 553 If unsure, say Y.
570 554
555config AMD_IOMMU
556 bool "AMD IOMMU support"
557 select SWIOTLB
558 depends on X86_64 && PCI && ACPI
559 help
560 With this option you can enable support for AMD IOMMU hardware in
561 your system. An IOMMU is a hardware component which provides
562 remapping of DMA memory accesses from devices. With an AMD IOMMU you
563 can isolate the the DMA memory of different devices and protect the
564 system from misbehaving device drivers or hardware.
565
566 You can find out if your system has an AMD IOMMU if you look into
567 your BIOS for an option to enable it or if you have an IVRS ACPI
568 table.
569
571# need this always selected by IOMMU for the VIA workaround 570# need this always selected by IOMMU for the VIA workaround
572config SWIOTLB 571config SWIOTLB
573 bool 572 bool
@@ -582,18 +581,18 @@ config IOMMU_HELPER
582 def_bool (CALGARY_IOMMU || GART_IOMMU || SWIOTLB) 581 def_bool (CALGARY_IOMMU || GART_IOMMU || SWIOTLB)
583 582
584config NR_CPUS 583config NR_CPUS
585 int "Maximum number of CPUs (2-255)" 584 int "Maximum number of CPUs (2-4096)"
586 range 2 255 585 range 2 4096
587 depends on SMP 586 depends on SMP
588 default "32" if X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000 587 default "32" if X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000
589 default "8" 588 default "8"
590 help 589 help
591 This allows you to specify the maximum number of CPUs which this 590 This allows you to specify the maximum number of CPUs which this
592 kernel will support. The maximum supported value is 255 and the 591 kernel will support. The maximum supported value is 4096 and the
593 minimum value which makes sense is 2. 592 minimum value which makes sense is 2.
594 593
595 This is purely to save memory - each supported CPU adds 594 This is purely to save memory - each supported CPU adds
596 approximately eight kilobytes to the kernel image. 595 approximately one kilobyte to the kernel image.
597 596
598config SCHED_SMT 597config SCHED_SMT
599 bool "SMT (Hyperthreading) scheduler support" 598 bool "SMT (Hyperthreading) scheduler support"
@@ -1528,8 +1527,7 @@ endmenu
1528menu "Bus options (PCI etc.)" 1527menu "Bus options (PCI etc.)"
1529 1528
1530config PCI 1529config PCI
1531 bool "PCI support" if !X86_VISWS && !X86_VSMP 1530 bool "PCI support"
1532 depends on !X86_VOYAGER
1533 default y 1531 default y
1534 select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC) 1532 select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
1535 help 1533 help
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 2ad6301849a1..3d22bb8175b4 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -399,6 +399,10 @@ config X86_TSC
399 def_bool y 399 def_bool y
400 depends on ((MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64 400 depends on ((MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64
401 401
402config X86_CMPXCHG64
403 def_bool y
404 depends on X86_PAE || X86_64
405
402# this should be set for all -march=.. options where the compiler 406# this should be set for all -march=.. options where the compiler
403# generates cmov. 407# generates cmov.
404config X86_CMOV 408config X86_CMOV
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index f7d413d6101a..f0684bb74faf 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -20,6 +20,14 @@ config NONPROMISC_DEVMEM
20 20
21 If in doubt, say Y. 21 If in doubt, say Y.
22 22
23config X86_VERBOSE_BOOTUP
24 bool "Enable verbose x86 bootup info messages"
25 default y
26 help
27 Enables the informational output from the decompression stage
28 (e.g. bzImage) of the boot. If you disable this you will still
29 see errors. Disable this if you want silent bootup.
30
23config EARLY_PRINTK 31config EARLY_PRINTK
24 bool "Early printk" if EMBEDDED 32 bool "Early printk" if EMBEDDED
25 default y 33 default y
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index d6650131659e..b03d24b44bf9 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -193,12 +193,12 @@ all: bzImage
193 193
194# KBUILD_IMAGE specify target image being built 194# KBUILD_IMAGE specify target image being built
195 KBUILD_IMAGE := $(boot)/bzImage 195 KBUILD_IMAGE := $(boot)/bzImage
196zImage zlilo zdisk: KBUILD_IMAGE := arch/x86/boot/zImage 196zImage zlilo zdisk: KBUILD_IMAGE := $(boot)/zImage
197 197
198zImage bzImage: vmlinux 198zImage bzImage: vmlinux
199 $(Q)$(MAKE) $(build)=$(boot) $(KBUILD_IMAGE) 199 $(Q)$(MAKE) $(build)=$(boot) $(KBUILD_IMAGE)
200 $(Q)mkdir -p $(objtree)/arch/$(UTS_MACHINE)/boot 200 $(Q)mkdir -p $(objtree)/arch/$(UTS_MACHINE)/boot
201 $(Q)ln -fsn ../../x86/boot/bzImage $(objtree)/arch/$(UTS_MACHINE)/boot/bzImage 201 $(Q)ln -fsn ../../x86/boot/bzImage $(objtree)/arch/$(UTS_MACHINE)/boot/$@
202 202
203compressed: zImage 203compressed: zImage
204 204
diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c
index e01aafd03bde..4063d630deff 100644
--- a/arch/x86/boot/a20.c
+++ b/arch/x86/boot/a20.c
@@ -1,7 +1,7 @@
1/* -*- linux-c -*- ------------------------------------------------------- * 1/* -*- linux-c -*- ------------------------------------------------------- *
2 * 2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds 3 * Copyright (C) 1991, 1992 Linus Torvalds
4 * Copyright 2007 rPath, Inc. - All Rights Reserved 4 * Copyright 2007-2008 rPath, Inc. - All Rights Reserved
5 * 5 *
6 * This file is part of the Linux kernel, and is made available under 6 * This file is part of the Linux kernel, and is made available under
7 * the terms of the GNU General Public License version 2. 7 * the terms of the GNU General Public License version 2.
@@ -95,6 +95,9 @@ static void enable_a20_kbc(void)
95 95
96 outb(0xdf, 0x60); /* A20 on */ 96 outb(0xdf, 0x60); /* A20 on */
97 empty_8042(); 97 empty_8042();
98
99 outb(0xff, 0x64); /* Null command, but UHCI wants it */
100 empty_8042();
98} 101}
99 102
100static void enable_a20_fast(void) 103static void enable_a20_fast(void)
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index d8819efac81d..1d5dff4123e1 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -30,6 +30,7 @@
30#include <asm/page.h> 30#include <asm/page.h>
31#include <asm/boot.h> 31#include <asm/boot.h>
32#include <asm/msr.h> 32#include <asm/msr.h>
33#include <asm/processor-flags.h>
33#include <asm/asm-offsets.h> 34#include <asm/asm-offsets.h>
34 35
35.section ".text.head" 36.section ".text.head"
@@ -109,7 +110,7 @@ startup_32:
109 110
110 /* Enable PAE mode */ 111 /* Enable PAE mode */
111 xorl %eax, %eax 112 xorl %eax, %eax
112 orl $(1 << 5), %eax 113 orl $(X86_CR4_PAE), %eax
113 movl %eax, %cr4 114 movl %eax, %cr4
114 115
115 /* 116 /*
@@ -170,7 +171,7 @@ startup_32:
170 pushl %eax 171 pushl %eax
171 172
172 /* Enter paged protected Mode, activating Long Mode */ 173 /* Enter paged protected Mode, activating Long Mode */
173 movl $0x80000001, %eax /* Enable Paging and Protected mode */ 174 movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */
174 movl %eax, %cr0 175 movl %eax, %cr0
175 176
176 /* Jump from 32bit compatibility mode into 64bit mode. */ 177 /* Jump from 32bit compatibility mode into 64bit mode. */
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index ba0be6a25ff7..bc5553b496f7 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -30,6 +30,7 @@
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/page.h> 31#include <asm/page.h>
32#include <asm/boot.h> 32#include <asm/boot.h>
33#include <asm/bootparam.h>
33 34
34/* WARNING!! 35/* WARNING!!
35 * This code is compiled with -fPIC and it is relocated dynamically 36 * This code is compiled with -fPIC and it is relocated dynamically
@@ -187,13 +188,8 @@ static void gzip_release(void **);
187/* 188/*
188 * This is set up by the setup-routine at boot-time 189 * This is set up by the setup-routine at boot-time
189 */ 190 */
190static unsigned char *real_mode; /* Pointer to real-mode data */ 191static struct boot_params *real_mode; /* Pointer to real-mode data */
191 192static int quiet;
192#define RM_EXT_MEM_K (*(unsigned short *)(real_mode + 0x2))
193#ifndef STANDARD_MEMORY_BIOS_CALL
194#define RM_ALT_MEM_K (*(unsigned long *)(real_mode + 0x1e0))
195#endif
196#define RM_SCREEN_INFO (*(struct screen_info *)(real_mode+0))
197 193
198extern unsigned char input_data[]; 194extern unsigned char input_data[];
199extern int input_len; 195extern int input_len;
@@ -206,7 +202,8 @@ static void free(void *where);
206static void *memset(void *s, int c, unsigned n); 202static void *memset(void *s, int c, unsigned n);
207static void *memcpy(void *dest, const void *src, unsigned n); 203static void *memcpy(void *dest, const void *src, unsigned n);
208 204
209static void putstr(const char *); 205static void __putstr(int, const char *);
206#define putstr(__x) __putstr(0, __x)
210 207
211#ifdef CONFIG_X86_64 208#ifdef CONFIG_X86_64
212#define memptr long 209#define memptr long
@@ -266,18 +263,24 @@ static void scroll(void)
266 vidmem[i] = ' '; 263 vidmem[i] = ' ';
267} 264}
268 265
269static void putstr(const char *s) 266static void __putstr(int error, const char *s)
270{ 267{
271 int x, y, pos; 268 int x, y, pos;
272 char c; 269 char c;
273 270
271#ifndef CONFIG_X86_VERBOSE_BOOTUP
272 if (!error)
273 return;
274#endif
275
274#ifdef CONFIG_X86_32 276#ifdef CONFIG_X86_32
275 if (RM_SCREEN_INFO.orig_video_mode == 0 && lines == 0 && cols == 0) 277 if (real_mode->screen_info.orig_video_mode == 0 &&
278 lines == 0 && cols == 0)
276 return; 279 return;
277#endif 280#endif
278 281
279 x = RM_SCREEN_INFO.orig_x; 282 x = real_mode->screen_info.orig_x;
280 y = RM_SCREEN_INFO.orig_y; 283 y = real_mode->screen_info.orig_y;
281 284
282 while ((c = *s++) != '\0') { 285 while ((c = *s++) != '\0') {
283 if (c == '\n') { 286 if (c == '\n') {
@@ -298,8 +301,8 @@ static void putstr(const char *s)
298 } 301 }
299 } 302 }
300 303
301 RM_SCREEN_INFO.orig_x = x; 304 real_mode->screen_info.orig_x = x;
302 RM_SCREEN_INFO.orig_y = y; 305 real_mode->screen_info.orig_y = y;
303 306
304 pos = (x + cols * y) * 2; /* Update cursor position */ 307 pos = (x + cols * y) * 2; /* Update cursor position */
305 outb(14, vidport); 308 outb(14, vidport);
@@ -362,9 +365,9 @@ static void flush_window(void)
362 365
363static void error(char *x) 366static void error(char *x)
364{ 367{
365 putstr("\n\n"); 368 __putstr(1, "\n\n");
366 putstr(x); 369 __putstr(1, x);
367 putstr("\n\n -- System halted"); 370 __putstr(1, "\n\n -- System halted");
368 371
369 while (1) 372 while (1)
370 asm("hlt"); 373 asm("hlt");
@@ -391,7 +394,8 @@ static void parse_elf(void *output)
391 return; 394 return;
392 } 395 }
393 396
394 putstr("Parsing ELF... "); 397 if (!quiet)
398 putstr("Parsing ELF... ");
395 399
396 phdrs = malloc(sizeof(*phdrs) * ehdr.e_phnum); 400 phdrs = malloc(sizeof(*phdrs) * ehdr.e_phnum);
397 if (!phdrs) 401 if (!phdrs)
@@ -426,7 +430,10 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
426{ 430{
427 real_mode = rmode; 431 real_mode = rmode;
428 432
429 if (RM_SCREEN_INFO.orig_video_mode == 7) { 433 if (real_mode->hdr.loadflags & QUIET_FLAG)
434 quiet = 1;
435
436 if (real_mode->screen_info.orig_video_mode == 7) {
430 vidmem = (char *) 0xb0000; 437 vidmem = (char *) 0xb0000;
431 vidport = 0x3b4; 438 vidport = 0x3b4;
432 } else { 439 } else {
@@ -434,8 +441,8 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
434 vidport = 0x3d4; 441 vidport = 0x3d4;
435 } 442 }
436 443
437 lines = RM_SCREEN_INFO.orig_video_lines; 444 lines = real_mode->screen_info.orig_video_lines;
438 cols = RM_SCREEN_INFO.orig_video_cols; 445 cols = real_mode->screen_info.orig_video_cols;
439 446
440 window = output; /* Output buffer (Normally at 1M) */ 447 window = output; /* Output buffer (Normally at 1M) */
441 free_mem_ptr = heap; /* Heap */ 448 free_mem_ptr = heap; /* Heap */
@@ -461,9 +468,11 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
461#endif 468#endif
462 469
463 makecrc(); 470 makecrc();
464 putstr("\nDecompressing Linux... "); 471 if (!quiet)
472 putstr("\nDecompressing Linux... ");
465 gunzip(); 473 gunzip();
466 parse_elf(output); 474 parse_elf(output);
467 putstr("done.\nBooting the kernel.\n"); 475 if (!quiet)
476 putstr("done.\nBooting the kernel.\n");
468 return; 477 return;
469} 478}
diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/boot/compressed/relocs.c
index edaadea90aaf..a1310c52fc0c 100644
--- a/arch/x86/boot/compressed/relocs.c
+++ b/arch/x86/boot/compressed/relocs.c
@@ -10,16 +10,20 @@
10#define USE_BSD 10#define USE_BSD
11#include <endian.h> 11#include <endian.h>
12 12
13#define MAX_SHDRS 100
14#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 13#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
15static Elf32_Ehdr ehdr; 14static Elf32_Ehdr ehdr;
16static Elf32_Shdr shdr[MAX_SHDRS];
17static Elf32_Sym *symtab[MAX_SHDRS];
18static Elf32_Rel *reltab[MAX_SHDRS];
19static char *strtab[MAX_SHDRS];
20static unsigned long reloc_count, reloc_idx; 15static unsigned long reloc_count, reloc_idx;
21static unsigned long *relocs; 16static unsigned long *relocs;
22 17
18struct section {
19 Elf32_Shdr shdr;
20 struct section *link;
21 Elf32_Sym *symtab;
22 Elf32_Rel *reltab;
23 char *strtab;
24};
25static struct section *secs;
26
23/* 27/*
24 * Following symbols have been audited. There values are constant and do 28 * Following symbols have been audited. There values are constant and do
25 * not change if bzImage is loaded at a different physical address than 29 * not change if bzImage is loaded at a different physical address than
@@ -35,7 +39,7 @@ static int is_safe_abs_reloc(const char* sym_name)
35{ 39{
36 int i; 40 int i;
37 41
38 for(i = 0; i < ARRAY_SIZE(safe_abs_relocs); i++) { 42 for (i = 0; i < ARRAY_SIZE(safe_abs_relocs); i++) {
39 if (!strcmp(sym_name, safe_abs_relocs[i])) 43 if (!strcmp(sym_name, safe_abs_relocs[i]))
40 /* Match found */ 44 /* Match found */
41 return 1; 45 return 1;
@@ -137,10 +141,10 @@ static const char *sec_name(unsigned shndx)
137{ 141{
138 const char *sec_strtab; 142 const char *sec_strtab;
139 const char *name; 143 const char *name;
140 sec_strtab = strtab[ehdr.e_shstrndx]; 144 sec_strtab = secs[ehdr.e_shstrndx].strtab;
141 name = "<noname>"; 145 name = "<noname>";
142 if (shndx < ehdr.e_shnum) { 146 if (shndx < ehdr.e_shnum) {
143 name = sec_strtab + shdr[shndx].sh_name; 147 name = sec_strtab + secs[shndx].shdr.sh_name;
144 } 148 }
145 else if (shndx == SHN_ABS) { 149 else if (shndx == SHN_ABS) {
146 name = "ABSOLUTE"; 150 name = "ABSOLUTE";
@@ -159,7 +163,7 @@ static const char *sym_name(const char *sym_strtab, Elf32_Sym *sym)
159 name = sym_strtab + sym->st_name; 163 name = sym_strtab + sym->st_name;
160 } 164 }
161 else { 165 else {
162 name = sec_name(shdr[sym->st_shndx].sh_name); 166 name = sec_name(secs[sym->st_shndx].shdr.sh_name);
163 } 167 }
164 return name; 168 return name;
165} 169}
@@ -244,29 +248,34 @@ static void read_ehdr(FILE *fp)
244static void read_shdrs(FILE *fp) 248static void read_shdrs(FILE *fp)
245{ 249{
246 int i; 250 int i;
247 if (ehdr.e_shnum > MAX_SHDRS) { 251 Elf32_Shdr shdr;
248 die("%d section headers supported: %d\n", 252
249 ehdr.e_shnum, MAX_SHDRS); 253 secs = calloc(ehdr.e_shnum, sizeof(struct section));
254 if (!secs) {
255 die("Unable to allocate %d section headers\n",
256 ehdr.e_shnum);
250 } 257 }
251 if (fseek(fp, ehdr.e_shoff, SEEK_SET) < 0) { 258 if (fseek(fp, ehdr.e_shoff, SEEK_SET) < 0) {
252 die("Seek to %d failed: %s\n", 259 die("Seek to %d failed: %s\n",
253 ehdr.e_shoff, strerror(errno)); 260 ehdr.e_shoff, strerror(errno));
254 } 261 }
255 if (fread(&shdr, sizeof(shdr[0]), ehdr.e_shnum, fp) != ehdr.e_shnum) { 262 for (i = 0; i < ehdr.e_shnum; i++) {
256 die("Cannot read ELF section headers: %s\n", 263 struct section *sec = &secs[i];
257 strerror(errno)); 264 if (fread(&shdr, sizeof shdr, 1, fp) != 1)
258 } 265 die("Cannot read ELF section headers %d/%d: %s\n",
259 for(i = 0; i < ehdr.e_shnum; i++) { 266 i, ehdr.e_shnum, strerror(errno));
260 shdr[i].sh_name = elf32_to_cpu(shdr[i].sh_name); 267 sec->shdr.sh_name = elf32_to_cpu(shdr.sh_name);
261 shdr[i].sh_type = elf32_to_cpu(shdr[i].sh_type); 268 sec->shdr.sh_type = elf32_to_cpu(shdr.sh_type);
262 shdr[i].sh_flags = elf32_to_cpu(shdr[i].sh_flags); 269 sec->shdr.sh_flags = elf32_to_cpu(shdr.sh_flags);
263 shdr[i].sh_addr = elf32_to_cpu(shdr[i].sh_addr); 270 sec->shdr.sh_addr = elf32_to_cpu(shdr.sh_addr);
264 shdr[i].sh_offset = elf32_to_cpu(shdr[i].sh_offset); 271 sec->shdr.sh_offset = elf32_to_cpu(shdr.sh_offset);
265 shdr[i].sh_size = elf32_to_cpu(shdr[i].sh_size); 272 sec->shdr.sh_size = elf32_to_cpu(shdr.sh_size);
266 shdr[i].sh_link = elf32_to_cpu(shdr[i].sh_link); 273 sec->shdr.sh_link = elf32_to_cpu(shdr.sh_link);
267 shdr[i].sh_info = elf32_to_cpu(shdr[i].sh_info); 274 sec->shdr.sh_info = elf32_to_cpu(shdr.sh_info);
268 shdr[i].sh_addralign = elf32_to_cpu(shdr[i].sh_addralign); 275 sec->shdr.sh_addralign = elf32_to_cpu(shdr.sh_addralign);
269 shdr[i].sh_entsize = elf32_to_cpu(shdr[i].sh_entsize); 276 sec->shdr.sh_entsize = elf32_to_cpu(shdr.sh_entsize);
277 if (sec->shdr.sh_link < ehdr.e_shnum)
278 sec->link = &secs[sec->shdr.sh_link];
270 } 279 }
271 280
272} 281}
@@ -274,20 +283,22 @@ static void read_shdrs(FILE *fp)
274static void read_strtabs(FILE *fp) 283static void read_strtabs(FILE *fp)
275{ 284{
276 int i; 285 int i;
277 for(i = 0; i < ehdr.e_shnum; i++) { 286 for (i = 0; i < ehdr.e_shnum; i++) {
278 if (shdr[i].sh_type != SHT_STRTAB) { 287 struct section *sec = &secs[i];
288 if (sec->shdr.sh_type != SHT_STRTAB) {
279 continue; 289 continue;
280 } 290 }
281 strtab[i] = malloc(shdr[i].sh_size); 291 sec->strtab = malloc(sec->shdr.sh_size);
282 if (!strtab[i]) { 292 if (!sec->strtab) {
283 die("malloc of %d bytes for strtab failed\n", 293 die("malloc of %d bytes for strtab failed\n",
284 shdr[i].sh_size); 294 sec->shdr.sh_size);
285 } 295 }
286 if (fseek(fp, shdr[i].sh_offset, SEEK_SET) < 0) { 296 if (fseek(fp, sec->shdr.sh_offset, SEEK_SET) < 0) {
287 die("Seek to %d failed: %s\n", 297 die("Seek to %d failed: %s\n",
288 shdr[i].sh_offset, strerror(errno)); 298 sec->shdr.sh_offset, strerror(errno));
289 } 299 }
290 if (fread(strtab[i], 1, shdr[i].sh_size, fp) != shdr[i].sh_size) { 300 if (fread(sec->strtab, 1, sec->shdr.sh_size, fp)
301 != sec->shdr.sh_size) {
291 die("Cannot read symbol table: %s\n", 302 die("Cannot read symbol table: %s\n",
292 strerror(errno)); 303 strerror(errno));
293 } 304 }
@@ -297,28 +308,31 @@ static void read_strtabs(FILE *fp)
297static void read_symtabs(FILE *fp) 308static void read_symtabs(FILE *fp)
298{ 309{
299 int i,j; 310 int i,j;
300 for(i = 0; i < ehdr.e_shnum; i++) { 311 for (i = 0; i < ehdr.e_shnum; i++) {
301 if (shdr[i].sh_type != SHT_SYMTAB) { 312 struct section *sec = &secs[i];
313 if (sec->shdr.sh_type != SHT_SYMTAB) {
302 continue; 314 continue;
303 } 315 }
304 symtab[i] = malloc(shdr[i].sh_size); 316 sec->symtab = malloc(sec->shdr.sh_size);
305 if (!symtab[i]) { 317 if (!sec->symtab) {
306 die("malloc of %d bytes for symtab failed\n", 318 die("malloc of %d bytes for symtab failed\n",
307 shdr[i].sh_size); 319 sec->shdr.sh_size);
308 } 320 }
309 if (fseek(fp, shdr[i].sh_offset, SEEK_SET) < 0) { 321 if (fseek(fp, sec->shdr.sh_offset, SEEK_SET) < 0) {
310 die("Seek to %d failed: %s\n", 322 die("Seek to %d failed: %s\n",
311 shdr[i].sh_offset, strerror(errno)); 323 sec->shdr.sh_offset, strerror(errno));
312 } 324 }
313 if (fread(symtab[i], 1, shdr[i].sh_size, fp) != shdr[i].sh_size) { 325 if (fread(sec->symtab, 1, sec->shdr.sh_size, fp)
326 != sec->shdr.sh_size) {
314 die("Cannot read symbol table: %s\n", 327 die("Cannot read symbol table: %s\n",
315 strerror(errno)); 328 strerror(errno));
316 } 329 }
317 for(j = 0; j < shdr[i].sh_size/sizeof(symtab[i][0]); j++) { 330 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) {
318 symtab[i][j].st_name = elf32_to_cpu(symtab[i][j].st_name); 331 Elf32_Sym *sym = &sec->symtab[j];
319 symtab[i][j].st_value = elf32_to_cpu(symtab[i][j].st_value); 332 sym->st_name = elf32_to_cpu(sym->st_name);
320 symtab[i][j].st_size = elf32_to_cpu(symtab[i][j].st_size); 333 sym->st_value = elf32_to_cpu(sym->st_value);
321 symtab[i][j].st_shndx = elf16_to_cpu(symtab[i][j].st_shndx); 334 sym->st_size = elf32_to_cpu(sym->st_size);
335 sym->st_shndx = elf16_to_cpu(sym->st_shndx);
322 } 336 }
323 } 337 }
324} 338}
@@ -327,26 +341,29 @@ static void read_symtabs(FILE *fp)
327static void read_relocs(FILE *fp) 341static void read_relocs(FILE *fp)
328{ 342{
329 int i,j; 343 int i,j;
330 for(i = 0; i < ehdr.e_shnum; i++) { 344 for (i = 0; i < ehdr.e_shnum; i++) {
331 if (shdr[i].sh_type != SHT_REL) { 345 struct section *sec = &secs[i];
346 if (sec->shdr.sh_type != SHT_REL) {
332 continue; 347 continue;
333 } 348 }
334 reltab[i] = malloc(shdr[i].sh_size); 349 sec->reltab = malloc(sec->shdr.sh_size);
335 if (!reltab[i]) { 350 if (!sec->reltab) {
336 die("malloc of %d bytes for relocs failed\n", 351 die("malloc of %d bytes for relocs failed\n",
337 shdr[i].sh_size); 352 sec->shdr.sh_size);
338 } 353 }
339 if (fseek(fp, shdr[i].sh_offset, SEEK_SET) < 0) { 354 if (fseek(fp, sec->shdr.sh_offset, SEEK_SET) < 0) {
340 die("Seek to %d failed: %s\n", 355 die("Seek to %d failed: %s\n",
341 shdr[i].sh_offset, strerror(errno)); 356 sec->shdr.sh_offset, strerror(errno));
342 } 357 }
343 if (fread(reltab[i], 1, shdr[i].sh_size, fp) != shdr[i].sh_size) { 358 if (fread(sec->reltab, 1, sec->shdr.sh_size, fp)
359 != sec->shdr.sh_size) {
344 die("Cannot read symbol table: %s\n", 360 die("Cannot read symbol table: %s\n",
345 strerror(errno)); 361 strerror(errno));
346 } 362 }
347 for(j = 0; j < shdr[i].sh_size/sizeof(reltab[0][0]); j++) { 363 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Rel); j++) {
348 reltab[i][j].r_offset = elf32_to_cpu(reltab[i][j].r_offset); 364 Elf32_Rel *rel = &sec->reltab[j];
349 reltab[i][j].r_info = elf32_to_cpu(reltab[i][j].r_info); 365 rel->r_offset = elf32_to_cpu(rel->r_offset);
366 rel->r_info = elf32_to_cpu(rel->r_info);
350 } 367 }
351 } 368 }
352} 369}
@@ -357,19 +374,21 @@ static void print_absolute_symbols(void)
357 int i; 374 int i;
358 printf("Absolute symbols\n"); 375 printf("Absolute symbols\n");
359 printf(" Num: Value Size Type Bind Visibility Name\n"); 376 printf(" Num: Value Size Type Bind Visibility Name\n");
360 for(i = 0; i < ehdr.e_shnum; i++) { 377 for (i = 0; i < ehdr.e_shnum; i++) {
378 struct section *sec = &secs[i];
361 char *sym_strtab; 379 char *sym_strtab;
362 Elf32_Sym *sh_symtab; 380 Elf32_Sym *sh_symtab;
363 int j; 381 int j;
364 if (shdr[i].sh_type != SHT_SYMTAB) { 382
383 if (sec->shdr.sh_type != SHT_SYMTAB) {
365 continue; 384 continue;
366 } 385 }
367 sh_symtab = symtab[i]; 386 sh_symtab = sec->symtab;
368 sym_strtab = strtab[shdr[i].sh_link]; 387 sym_strtab = sec->link->strtab;
369 for(j = 0; j < shdr[i].sh_size/sizeof(symtab[0][0]); j++) { 388 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) {
370 Elf32_Sym *sym; 389 Elf32_Sym *sym;
371 const char *name; 390 const char *name;
372 sym = &symtab[i][j]; 391 sym = &sec->symtab[j];
373 name = sym_name(sym_strtab, sym); 392 name = sym_name(sym_strtab, sym);
374 if (sym->st_shndx != SHN_ABS) { 393 if (sym->st_shndx != SHN_ABS) {
375 continue; 394 continue;
@@ -389,26 +408,27 @@ static void print_absolute_relocs(void)
389{ 408{
390 int i, printed = 0; 409 int i, printed = 0;
391 410
392 for(i = 0; i < ehdr.e_shnum; i++) { 411 for (i = 0; i < ehdr.e_shnum; i++) {
412 struct section *sec = &secs[i];
413 struct section *sec_applies, *sec_symtab;
393 char *sym_strtab; 414 char *sym_strtab;
394 Elf32_Sym *sh_symtab; 415 Elf32_Sym *sh_symtab;
395 unsigned sec_applies, sec_symtab;
396 int j; 416 int j;
397 if (shdr[i].sh_type != SHT_REL) { 417 if (sec->shdr.sh_type != SHT_REL) {
398 continue; 418 continue;
399 } 419 }
400 sec_symtab = shdr[i].sh_link; 420 sec_symtab = sec->link;
401 sec_applies = shdr[i].sh_info; 421 sec_applies = &secs[sec->shdr.sh_info];
402 if (!(shdr[sec_applies].sh_flags & SHF_ALLOC)) { 422 if (!(sec_applies->shdr.sh_flags & SHF_ALLOC)) {
403 continue; 423 continue;
404 } 424 }
405 sh_symtab = symtab[sec_symtab]; 425 sh_symtab = sec_symtab->symtab;
406 sym_strtab = strtab[shdr[sec_symtab].sh_link]; 426 sym_strtab = sec_symtab->link->strtab;
407 for(j = 0; j < shdr[i].sh_size/sizeof(reltab[0][0]); j++) { 427 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Rel); j++) {
408 Elf32_Rel *rel; 428 Elf32_Rel *rel;
409 Elf32_Sym *sym; 429 Elf32_Sym *sym;
410 const char *name; 430 const char *name;
411 rel = &reltab[i][j]; 431 rel = &sec->reltab[j];
412 sym = &sh_symtab[ELF32_R_SYM(rel->r_info)]; 432 sym = &sh_symtab[ELF32_R_SYM(rel->r_info)];
413 name = sym_name(sym_strtab, sym); 433 name = sym_name(sym_strtab, sym);
414 if (sym->st_shndx != SHN_ABS) { 434 if (sym->st_shndx != SHN_ABS) {
@@ -456,26 +476,28 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
456{ 476{
457 int i; 477 int i;
458 /* Walk through the relocations */ 478 /* Walk through the relocations */
459 for(i = 0; i < ehdr.e_shnum; i++) { 479 for (i = 0; i < ehdr.e_shnum; i++) {
460 char *sym_strtab; 480 char *sym_strtab;
461 Elf32_Sym *sh_symtab; 481 Elf32_Sym *sh_symtab;
462 unsigned sec_applies, sec_symtab; 482 struct section *sec_applies, *sec_symtab;
463 int j; 483 int j;
464 if (shdr[i].sh_type != SHT_REL) { 484 struct section *sec = &secs[i];
485
486 if (sec->shdr.sh_type != SHT_REL) {
465 continue; 487 continue;
466 } 488 }
467 sec_symtab = shdr[i].sh_link; 489 sec_symtab = sec->link;
468 sec_applies = shdr[i].sh_info; 490 sec_applies = &secs[sec->shdr.sh_info];
469 if (!(shdr[sec_applies].sh_flags & SHF_ALLOC)) { 491 if (!(sec_applies->shdr.sh_flags & SHF_ALLOC)) {
470 continue; 492 continue;
471 } 493 }
472 sh_symtab = symtab[sec_symtab]; 494 sh_symtab = sec_symtab->symtab;
473 sym_strtab = strtab[shdr[sec_symtab].sh_link]; 495 sym_strtab = sec->link->strtab;
474 for(j = 0; j < shdr[i].sh_size/sizeof(reltab[0][0]); j++) { 496 for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Rel); j++) {
475 Elf32_Rel *rel; 497 Elf32_Rel *rel;
476 Elf32_Sym *sym; 498 Elf32_Sym *sym;
477 unsigned r_type; 499 unsigned r_type;
478 rel = &reltab[i][j]; 500 rel = &sec->reltab[j];
479 sym = &sh_symtab[ELF32_R_SYM(rel->r_info)]; 501 sym = &sh_symtab[ELF32_R_SYM(rel->r_info)];
480 r_type = ELF32_R_TYPE(rel->r_info); 502 r_type = ELF32_R_TYPE(rel->r_info);
481 /* Don't visit relocations to absolute symbols */ 503 /* Don't visit relocations to absolute symbols */
@@ -539,7 +561,7 @@ static void emit_relocs(int as_text)
539 */ 561 */
540 printf(".section \".data.reloc\",\"a\"\n"); 562 printf(".section \".data.reloc\",\"a\"\n");
541 printf(".balign 4\n"); 563 printf(".balign 4\n");
542 for(i = 0; i < reloc_count; i++) { 564 for (i = 0; i < reloc_count; i++) {
543 printf("\t .long 0x%08lx\n", relocs[i]); 565 printf("\t .long 0x%08lx\n", relocs[i]);
544 } 566 }
545 printf("\n"); 567 printf("\n");
@@ -550,7 +572,7 @@ static void emit_relocs(int as_text)
550 /* Print a stop */ 572 /* Print a stop */
551 printf("%c%c%c%c", buf[0], buf[1], buf[2], buf[3]); 573 printf("%c%c%c%c", buf[0], buf[1], buf[2], buf[3]);
552 /* Now print each relocation */ 574 /* Now print each relocation */
553 for(i = 0; i < reloc_count; i++) { 575 for (i = 0; i < reloc_count; i++) {
554 buf[0] = (relocs[i] >> 0) & 0xff; 576 buf[0] = (relocs[i] >> 0) & 0xff;
555 buf[1] = (relocs[i] >> 8) & 0xff; 577 buf[1] = (relocs[i] >> 8) & 0xff;
556 buf[2] = (relocs[i] >> 16) & 0xff; 578 buf[2] = (relocs[i] >> 16) & 0xff;
@@ -577,7 +599,7 @@ int main(int argc, char **argv)
577 show_absolute_relocs = 0; 599 show_absolute_relocs = 0;
578 as_text = 0; 600 as_text = 0;
579 fname = NULL; 601 fname = NULL;
580 for(i = 1; i < argc; i++) { 602 for (i = 1; i < argc; i++) {
581 char *arg = argv[i]; 603 char *arg = argv[i];
582 if (*arg == '-') { 604 if (*arg == '-') {
583 if (strcmp(argv[1], "--abs-syms") == 0) { 605 if (strcmp(argv[1], "--abs-syms") == 0) {
diff --git a/arch/x86/boot/cpu.c b/arch/x86/boot/cpu.c
index 00e19edd852c..92d6fd73dc7d 100644
--- a/arch/x86/boot/cpu.c
+++ b/arch/x86/boot/cpu.c
@@ -28,6 +28,8 @@ static char *cpu_name(int level)
28 if (level == 64) { 28 if (level == 64) {
29 return "x86-64"; 29 return "x86-64";
30 } else { 30 } else {
31 if (level == 15)
32 level = 6;
31 sprintf(buf, "i%d86", level); 33 sprintf(buf, "i%d86", level);
32 return buf; 34 return buf;
33 } 35 }
diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c
index 77569a4a3be1..2296164b54d2 100644
--- a/arch/x86/boot/main.c
+++ b/arch/x86/boot/main.c
@@ -165,6 +165,10 @@ void main(void)
165 /* Set the video mode */ 165 /* Set the video mode */
166 set_video(); 166 set_video();
167 167
168 /* Parse command line for 'quiet' and pass it to decompressor. */
169 if (cmdline_find_option_bool("quiet"))
170 boot_params.hdr.loadflags |= QUIET_FLAG;
171
168 /* Do the last things and invoke protected mode */ 172 /* Do the last things and invoke protected mode */
169 go_to_protected_mode(); 173 go_to_protected_mode();
170} 174}
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S
index ab049d40a884..141b6e20ed31 100644
--- a/arch/x86/boot/pmjump.S
+++ b/arch/x86/boot/pmjump.S
@@ -33,6 +33,8 @@ protected_mode_jump:
33 movw %cs, %bx 33 movw %cs, %bx
34 shll $4, %ebx 34 shll $4, %ebx
35 addl %ebx, 2f 35 addl %ebx, 2f
36 jmp 1f # Short jump to serialize on 386/486
371:
36 38
37 movw $__BOOT_DS, %cx 39 movw $__BOOT_DS, %cx
38 movw $__BOOT_TSS, %di 40 movw $__BOOT_TSS, %di
@@ -40,8 +42,6 @@ protected_mode_jump:
40 movl %cr0, %edx 42 movl %cr0, %edx
41 orb $X86_CR0_PE, %dl # Protected mode 43 orb $X86_CR0_PE, %dl # Protected mode
42 movl %edx, %cr0 44 movl %edx, %cr0
43 jmp 1f # Short jump to serialize on 386/486
441:
45 45
46 # Transition to 32-bit mode 46 # Transition to 32-bit mode
47 .byte 0x66, 0xea # ljmpl opcode 47 .byte 0x66, 0xea # ljmpl opcode
diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c
index 40ecb8d7688c..b939cb476dec 100644
--- a/arch/x86/boot/video-vga.c
+++ b/arch/x86/boot/video-vga.c
@@ -259,8 +259,7 @@ static int vga_probe(void)
259 return mode_count[adapter]; 259 return mode_count[adapter];
260} 260}
261 261
262__videocard video_vga = 262__videocard video_vga = {
263{
264 .card_name = "VGA", 263 .card_name = "VGA",
265 .probe = vga_probe, 264 .probe = vga_probe,
266 .set_mode = vga_set_mode, 265 .set_mode = vga_set_mode,
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index ad7ddaaff588..9bc34e2033ec 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -1,54 +1,103 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22-git14 3# Linux kernel version: 2.6.26-rc1
4# Fri Jul 20 09:53:15 2007 4# Sun May 4 19:59:02 2008
5# 5#
6# CONFIG_64BIT is not set
6CONFIG_X86_32=y 7CONFIG_X86_32=y
8# CONFIG_X86_64 is not set
9CONFIG_X86=y
10CONFIG_DEFCONFIG_LIST="arch/x86/configs/i386_defconfig"
11# CONFIG_GENERIC_LOCKBREAK is not set
7CONFIG_GENERIC_TIME=y 12CONFIG_GENERIC_TIME=y
13CONFIG_GENERIC_CMOS_UPDATE=y
8CONFIG_CLOCKSOURCE_WATCHDOG=y 14CONFIG_CLOCKSOURCE_WATCHDOG=y
9CONFIG_GENERIC_CLOCKEVENTS=y 15CONFIG_GENERIC_CLOCKEVENTS=y
10CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y 16CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
11CONFIG_LOCKDEP_SUPPORT=y 17CONFIG_LOCKDEP_SUPPORT=y
12CONFIG_STACKTRACE_SUPPORT=y 18CONFIG_STACKTRACE_SUPPORT=y
13CONFIG_SEMAPHORE_SLEEPERS=y 19CONFIG_HAVE_LATENCYTOP_SUPPORT=y
14CONFIG_X86=y 20CONFIG_FAST_CMPXCHG_LOCAL=y
15CONFIG_MMU=y 21CONFIG_MMU=y
16CONFIG_ZONE_DMA=y 22CONFIG_ZONE_DMA=y
17CONFIG_QUICKLIST=y
18CONFIG_GENERIC_ISA_DMA=y 23CONFIG_GENERIC_ISA_DMA=y
19CONFIG_GENERIC_IOMAP=y 24CONFIG_GENERIC_IOMAP=y
20CONFIG_GENERIC_BUG=y 25CONFIG_GENERIC_BUG=y
21CONFIG_GENERIC_HWEIGHT=y 26CONFIG_GENERIC_HWEIGHT=y
27# CONFIG_GENERIC_GPIO is not set
22CONFIG_ARCH_MAY_HAVE_PC_FDC=y 28CONFIG_ARCH_MAY_HAVE_PC_FDC=y
23CONFIG_DMI=y 29# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 30CONFIG_RWSEM_XCHGADD_ALGORITHM=y
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_GENERIC_CALIBRATE_DELAY=y
35# CONFIG_GENERIC_TIME_VSYSCALL is not set
36CONFIG_ARCH_HAS_CPU_RELAX=y
37CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
38CONFIG_HAVE_SETUP_PER_CPU_AREA=y
39# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
40CONFIG_ARCH_HIBERNATION_POSSIBLE=y
41CONFIG_ARCH_SUSPEND_POSSIBLE=y
42# CONFIG_ZONE_DMA32 is not set
43CONFIG_ARCH_POPULATES_NODE_MAP=y
44# CONFIG_AUDIT_ARCH is not set
45CONFIG_ARCH_SUPPORTS_AOUT=y
46CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
47CONFIG_GENERIC_HARDIRQS=y
48CONFIG_GENERIC_IRQ_PROBE=y
49CONFIG_GENERIC_PENDING_IRQ=y
50CONFIG_X86_SMP=y
51CONFIG_X86_32_SMP=y
52CONFIG_X86_HT=y
53CONFIG_X86_BIOS_REBOOT=y
54CONFIG_X86_TRAMPOLINE=y
55CONFIG_KTIME_SCALAR=y
25 56
26# 57#
27# Code maturity level options 58# General setup
28# 59#
29CONFIG_EXPERIMENTAL=y 60CONFIG_EXPERIMENTAL=y
30CONFIG_LOCK_KERNEL=y 61CONFIG_LOCK_KERNEL=y
31CONFIG_INIT_ENV_ARG_LIMIT=32 62CONFIG_INIT_ENV_ARG_LIMIT=32
32
33#
34# General setup
35#
36CONFIG_LOCALVERSION="" 63CONFIG_LOCALVERSION=""
37CONFIG_LOCALVERSION_AUTO=y 64# CONFIG_LOCALVERSION_AUTO is not set
38CONFIG_SWAP=y 65CONFIG_SWAP=y
39CONFIG_SYSVIPC=y 66CONFIG_SYSVIPC=y
40CONFIG_SYSVIPC_SYSCTL=y 67CONFIG_SYSVIPC_SYSCTL=y
41CONFIG_POSIX_MQUEUE=y 68CONFIG_POSIX_MQUEUE=y
42# CONFIG_BSD_PROCESS_ACCT is not set 69CONFIG_BSD_PROCESS_ACCT=y
43# CONFIG_TASKSTATS is not set 70# CONFIG_BSD_PROCESS_ACCT_V3 is not set
44# CONFIG_USER_NS is not set 71CONFIG_TASKSTATS=y
45# CONFIG_AUDIT is not set 72CONFIG_TASK_DELAY_ACCT=y
46CONFIG_IKCONFIG=y 73CONFIG_TASK_XACCT=y
47CONFIG_IKCONFIG_PROC=y 74CONFIG_TASK_IO_ACCOUNTING=y
48CONFIG_LOG_BUF_SHIFT=18 75CONFIG_AUDIT=y
49# CONFIG_CPUSETS is not set 76CONFIG_AUDITSYSCALL=y
50CONFIG_SYSFS_DEPRECATED=y 77CONFIG_AUDIT_TREE=y
78# CONFIG_IKCONFIG is not set
79CONFIG_LOG_BUF_SHIFT=17
80CONFIG_CGROUPS=y
81# CONFIG_CGROUP_DEBUG is not set
82CONFIG_CGROUP_NS=y
83# CONFIG_CGROUP_DEVICE is not set
84CONFIG_CPUSETS=y
85CONFIG_GROUP_SCHED=y
86CONFIG_FAIR_GROUP_SCHED=y
87# CONFIG_RT_GROUP_SCHED is not set
88# CONFIG_USER_SCHED is not set
89CONFIG_CGROUP_SCHED=y
90CONFIG_CGROUP_CPUACCT=y
91CONFIG_RESOURCE_COUNTERS=y
92# CONFIG_CGROUP_MEM_RES_CTLR is not set
93# CONFIG_SYSFS_DEPRECATED_V2 is not set
94CONFIG_PROC_PID_CPUSET=y
51CONFIG_RELAY=y 95CONFIG_RELAY=y
96CONFIG_NAMESPACES=y
97CONFIG_UTS_NS=y
98CONFIG_IPC_NS=y
99CONFIG_USER_NS=y
100CONFIG_PID_NS=y
52CONFIG_BLK_DEV_INITRD=y 101CONFIG_BLK_DEV_INITRD=y
53CONFIG_INITRAMFS_SOURCE="" 102CONFIG_INITRAMFS_SOURCE=""
54CONFIG_CC_OPTIMIZE_FOR_SIZE=y 103CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -56,13 +105,15 @@ CONFIG_SYSCTL=y
56# CONFIG_EMBEDDED is not set 105# CONFIG_EMBEDDED is not set
57CONFIG_UID16=y 106CONFIG_UID16=y
58CONFIG_SYSCTL_SYSCALL=y 107CONFIG_SYSCTL_SYSCALL=y
108CONFIG_SYSCTL_SYSCALL_CHECK=y
59CONFIG_KALLSYMS=y 109CONFIG_KALLSYMS=y
60CONFIG_KALLSYMS_ALL=y 110CONFIG_KALLSYMS_ALL=y
61# CONFIG_KALLSYMS_EXTRA_PASS is not set 111CONFIG_KALLSYMS_EXTRA_PASS=y
62CONFIG_HOTPLUG=y 112CONFIG_HOTPLUG=y
63CONFIG_PRINTK=y 113CONFIG_PRINTK=y
64CONFIG_BUG=y 114CONFIG_BUG=y
65CONFIG_ELF_CORE=y 115CONFIG_ELF_CORE=y
116# CONFIG_COMPAT_BRK is not set
66CONFIG_BASE_FULL=y 117CONFIG_BASE_FULL=y
67CONFIG_FUTEX=y 118CONFIG_FUTEX=y
68CONFIG_ANON_INODES=y 119CONFIG_ANON_INODES=y
@@ -76,6 +127,17 @@ CONFIG_SLUB_DEBUG=y
76# CONFIG_SLAB is not set 127# CONFIG_SLAB is not set
77CONFIG_SLUB=y 128CONFIG_SLUB=y
78# CONFIG_SLOB is not set 129# CONFIG_SLOB is not set
130CONFIG_PROFILING=y
131CONFIG_MARKERS=y
132# CONFIG_OPROFILE is not set
133CONFIG_HAVE_OPROFILE=y
134CONFIG_KPROBES=y
135CONFIG_KRETPROBES=y
136CONFIG_HAVE_KPROBES=y
137CONFIG_HAVE_KRETPROBES=y
138# CONFIG_HAVE_DMA_ATTRS is not set
139CONFIG_PROC_PAGE_MONITOR=y
140CONFIG_SLABINFO=y
79CONFIG_RT_MUTEXES=y 141CONFIG_RT_MUTEXES=y
80# CONFIG_TINY_SHMEM is not set 142# CONFIG_TINY_SHMEM is not set
81CONFIG_BASE_SMALL=0 143CONFIG_BASE_SMALL=0
@@ -87,10 +149,10 @@ CONFIG_MODULE_FORCE_UNLOAD=y
87# CONFIG_KMOD is not set 149# CONFIG_KMOD is not set
88CONFIG_STOP_MACHINE=y 150CONFIG_STOP_MACHINE=y
89CONFIG_BLOCK=y 151CONFIG_BLOCK=y
90CONFIG_LBD=y 152# CONFIG_LBD is not set
91# CONFIG_BLK_DEV_IO_TRACE is not set 153CONFIG_BLK_DEV_IO_TRACE=y
92# CONFIG_LSF is not set 154# CONFIG_LSF is not set
93# CONFIG_BLK_DEV_BSG is not set 155CONFIG_BLK_DEV_BSG=y
94 156
95# 157#
96# IO Schedulers 158# IO Schedulers
@@ -103,7 +165,8 @@ CONFIG_IOSCHED_CFQ=y
103# CONFIG_DEFAULT_DEADLINE is not set 165# CONFIG_DEFAULT_DEADLINE is not set
104CONFIG_DEFAULT_CFQ=y 166CONFIG_DEFAULT_CFQ=y
105# CONFIG_DEFAULT_NOOP is not set 167# CONFIG_DEFAULT_NOOP is not set
106CONFIG_DEFAULT_IOSCHED="anticipatory" 168CONFIG_DEFAULT_IOSCHED="cfq"
169CONFIG_CLASSIC_RCU=y
107 170
108# 171#
109# Processor type and features 172# Processor type and features
@@ -111,18 +174,21 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
111CONFIG_TICK_ONESHOT=y 174CONFIG_TICK_ONESHOT=y
112CONFIG_NO_HZ=y 175CONFIG_NO_HZ=y
113CONFIG_HIGH_RES_TIMERS=y 176CONFIG_HIGH_RES_TIMERS=y
177CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
114CONFIG_SMP=y 178CONFIG_SMP=y
115# CONFIG_X86_PC is not set 179CONFIG_X86_PC=y
116# CONFIG_X86_ELAN is not set 180# CONFIG_X86_ELAN is not set
117# CONFIG_X86_VOYAGER is not set 181# CONFIG_X86_VOYAGER is not set
118# CONFIG_X86_NUMAQ is not set 182# CONFIG_X86_NUMAQ is not set
119# CONFIG_X86_SUMMIT is not set 183# CONFIG_X86_SUMMIT is not set
120# CONFIG_X86_BIGSMP is not set 184# CONFIG_X86_BIGSMP is not set
121# CONFIG_X86_VISWS is not set 185# CONFIG_X86_VISWS is not set
122CONFIG_X86_GENERICARCH=y 186# CONFIG_X86_GENERICARCH is not set
123# CONFIG_X86_ES7000 is not set 187# CONFIG_X86_ES7000 is not set
124# CONFIG_PARAVIRT is not set 188# CONFIG_X86_RDC321X is not set
125CONFIG_X86_CYCLONE_TIMER=y 189# CONFIG_X86_VSMP is not set
190CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
191# CONFIG_PARAVIRT_GUEST is not set
126# CONFIG_M386 is not set 192# CONFIG_M386 is not set
127# CONFIG_M486 is not set 193# CONFIG_M486 is not set
128# CONFIG_M586 is not set 194# CONFIG_M586 is not set
@@ -130,9 +196,8 @@ CONFIG_X86_CYCLONE_TIMER=y
130# CONFIG_M586MMX is not set 196# CONFIG_M586MMX is not set
131# CONFIG_M686 is not set 197# CONFIG_M686 is not set
132# CONFIG_MPENTIUMII is not set 198# CONFIG_MPENTIUMII is not set
133CONFIG_MPENTIUMIII=y 199# CONFIG_MPENTIUMIII is not set
134# CONFIG_MPENTIUMM is not set 200# CONFIG_MPENTIUMM is not set
135# CONFIG_MCORE2 is not set
136# CONFIG_MPENTIUM4 is not set 201# CONFIG_MPENTIUM4 is not set
137# CONFIG_MK6 is not set 202# CONFIG_MK6 is not set
138# CONFIG_MK7 is not set 203# CONFIG_MK7 is not set
@@ -147,14 +212,14 @@ CONFIG_MPENTIUMIII=y
147# CONFIG_MCYRIXIII is not set 212# CONFIG_MCYRIXIII is not set
148# CONFIG_MVIAC3_2 is not set 213# CONFIG_MVIAC3_2 is not set
149# CONFIG_MVIAC7 is not set 214# CONFIG_MVIAC7 is not set
150CONFIG_X86_GENERIC=y 215# CONFIG_MPSC is not set
216CONFIG_MCORE2=y
217# CONFIG_GENERIC_CPU is not set
218# CONFIG_X86_GENERIC is not set
219CONFIG_X86_CPU=y
151CONFIG_X86_CMPXCHG=y 220CONFIG_X86_CMPXCHG=y
152CONFIG_X86_L1_CACHE_SHIFT=7 221CONFIG_X86_L1_CACHE_SHIFT=6
153CONFIG_X86_XADD=y 222CONFIG_X86_XADD=y
154CONFIG_RWSEM_XCHGADD_ALGORITHM=y
155# CONFIG_ARCH_HAS_ILOG2_U32 is not set
156# CONFIG_ARCH_HAS_ILOG2_U64 is not set
157CONFIG_GENERIC_CALIBRATE_DELAY=y
158CONFIG_X86_WP_WORKS_OK=y 223CONFIG_X86_WP_WORKS_OK=y
159CONFIG_X86_INVLPG=y 224CONFIG_X86_INVLPG=y
160CONFIG_X86_BSWAP=y 225CONFIG_X86_BSWAP=y
@@ -162,106 +227,120 @@ CONFIG_X86_POPAD_OK=y
162CONFIG_X86_GOOD_APIC=y 227CONFIG_X86_GOOD_APIC=y
163CONFIG_X86_INTEL_USERCOPY=y 228CONFIG_X86_INTEL_USERCOPY=y
164CONFIG_X86_USE_PPRO_CHECKSUM=y 229CONFIG_X86_USE_PPRO_CHECKSUM=y
230CONFIG_X86_P6_NOP=y
165CONFIG_X86_TSC=y 231CONFIG_X86_TSC=y
166CONFIG_X86_CMOV=y 232CONFIG_X86_MINIMUM_CPU_FAMILY=6
167CONFIG_X86_MINIMUM_CPU_FAMILY=4 233CONFIG_X86_DEBUGCTLMSR=y
168CONFIG_HPET_TIMER=y 234CONFIG_HPET_TIMER=y
169CONFIG_HPET_EMULATE_RTC=y 235CONFIG_HPET_EMULATE_RTC=y
170CONFIG_NR_CPUS=32 236CONFIG_DMI=y
171CONFIG_SCHED_SMT=y 237# CONFIG_IOMMU_HELPER is not set
238CONFIG_NR_CPUS=4
239# CONFIG_SCHED_SMT is not set
172CONFIG_SCHED_MC=y 240CONFIG_SCHED_MC=y
173# CONFIG_PREEMPT_NONE is not set 241# CONFIG_PREEMPT_NONE is not set
174CONFIG_PREEMPT_VOLUNTARY=y 242CONFIG_PREEMPT_VOLUNTARY=y
175# CONFIG_PREEMPT is not set 243# CONFIG_PREEMPT is not set
176CONFIG_PREEMPT_BKL=y
177CONFIG_X86_LOCAL_APIC=y 244CONFIG_X86_LOCAL_APIC=y
178CONFIG_X86_IO_APIC=y 245CONFIG_X86_IO_APIC=y
179CONFIG_X86_MCE=y 246# CONFIG_X86_MCE is not set
180CONFIG_X86_MCE_NONFATAL=y
181CONFIG_X86_MCE_P4THERMAL=y
182CONFIG_VM86=y 247CONFIG_VM86=y
183# CONFIG_TOSHIBA is not set 248# CONFIG_TOSHIBA is not set
184# CONFIG_I8K is not set 249# CONFIG_I8K is not set
185# CONFIG_X86_REBOOTFIXUPS is not set 250# CONFIG_X86_REBOOTFIXUPS is not set
186CONFIG_MICROCODE=y 251# CONFIG_MICROCODE is not set
187CONFIG_MICROCODE_OLD_INTERFACE=y
188CONFIG_X86_MSR=y 252CONFIG_X86_MSR=y
189CONFIG_X86_CPUID=y 253CONFIG_X86_CPUID=y
190
191#
192# Firmware Drivers
193#
194# CONFIG_EDD is not set
195# CONFIG_DELL_RBU is not set
196# CONFIG_DCDBAS is not set
197CONFIG_DMIID=y
198# CONFIG_NOHIGHMEM is not set 254# CONFIG_NOHIGHMEM is not set
199CONFIG_HIGHMEM4G=y 255CONFIG_HIGHMEM4G=y
200# CONFIG_HIGHMEM64G is not set 256# CONFIG_HIGHMEM64G is not set
201CONFIG_PAGE_OFFSET=0xC0000000 257CONFIG_PAGE_OFFSET=0xC0000000
202CONFIG_HIGHMEM=y 258CONFIG_HIGHMEM=y
203CONFIG_ARCH_POPULATES_NODE_MAP=y 259CONFIG_NEED_NODE_MEMMAP_SIZE=y
260CONFIG_ARCH_FLATMEM_ENABLE=y
261CONFIG_ARCH_SPARSEMEM_ENABLE=y
262CONFIG_ARCH_SELECT_MEMORY_MODEL=y
204CONFIG_SELECT_MEMORY_MODEL=y 263CONFIG_SELECT_MEMORY_MODEL=y
205CONFIG_FLATMEM_MANUAL=y 264# CONFIG_FLATMEM_MANUAL is not set
206# CONFIG_DISCONTIGMEM_MANUAL is not set 265# CONFIG_DISCONTIGMEM_MANUAL is not set
207# CONFIG_SPARSEMEM_MANUAL is not set 266CONFIG_SPARSEMEM_MANUAL=y
208CONFIG_FLATMEM=y 267CONFIG_SPARSEMEM=y
209CONFIG_FLAT_NODE_MEM_MAP=y 268CONFIG_HAVE_MEMORY_PRESENT=y
210# CONFIG_SPARSEMEM_STATIC is not set 269CONFIG_SPARSEMEM_STATIC=y
270# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
271
272#
273# Memory hotplug is currently incompatible with Software Suspend
274#
275CONFIG_PAGEFLAGS_EXTENDED=y
211CONFIG_SPLIT_PTLOCK_CPUS=4 276CONFIG_SPLIT_PTLOCK_CPUS=4
212CONFIG_RESOURCES_64BIT=y 277CONFIG_RESOURCES_64BIT=y
213CONFIG_ZONE_DMA_FLAG=1 278CONFIG_ZONE_DMA_FLAG=1
214CONFIG_BOUNCE=y 279CONFIG_BOUNCE=y
215CONFIG_NR_QUICK=1
216CONFIG_VIRT_TO_BUS=y 280CONFIG_VIRT_TO_BUS=y
217# CONFIG_HIGHPTE is not set 281# CONFIG_HIGHPTE is not set
218# CONFIG_MATH_EMULATION is not set 282# CONFIG_MATH_EMULATION is not set
219CONFIG_MTRR=y 283CONFIG_MTRR=y
220# CONFIG_EFI is not set 284# CONFIG_X86_PAT is not set
285CONFIG_EFI=y
221# CONFIG_IRQBALANCE is not set 286# CONFIG_IRQBALANCE is not set
222CONFIG_SECCOMP=y 287CONFIG_SECCOMP=y
223# CONFIG_HZ_100 is not set 288# CONFIG_HZ_100 is not set
224CONFIG_HZ_250=y 289# CONFIG_HZ_250 is not set
225# CONFIG_HZ_300 is not set 290# CONFIG_HZ_300 is not set
226# CONFIG_HZ_1000 is not set 291CONFIG_HZ_1000=y
227CONFIG_HZ=250 292CONFIG_HZ=1000
228# CONFIG_KEXEC is not set 293CONFIG_SCHED_HRTICK=y
229# CONFIG_CRASH_DUMP is not set 294CONFIG_KEXEC=y
230CONFIG_PHYSICAL_START=0x100000 295CONFIG_CRASH_DUMP=y
231# CONFIG_RELOCATABLE is not set 296CONFIG_PHYSICAL_START=0x1000000
232CONFIG_PHYSICAL_ALIGN=0x100000 297CONFIG_RELOCATABLE=y
233# CONFIG_HOTPLUG_CPU is not set 298CONFIG_PHYSICAL_ALIGN=0x200000
234CONFIG_COMPAT_VDSO=y 299CONFIG_HOTPLUG_CPU=y
300# CONFIG_COMPAT_VDSO is not set
235CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 301CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
236 302
237# 303#
238# Power management options (ACPI, APM) 304# Power management options
239# 305#
240CONFIG_PM=y 306CONFIG_PM=y
241CONFIG_PM_LEGACY=y 307CONFIG_PM_DEBUG=y
242# CONFIG_PM_DEBUG is not set 308# CONFIG_PM_VERBOSE is not set
243 309CONFIG_CAN_PM_TRACE=y
244# 310CONFIG_PM_TRACE=y
245# ACPI (Advanced Configuration and Power Interface) Support 311CONFIG_PM_TRACE_RTC=y
246# 312CONFIG_PM_SLEEP_SMP=y
313CONFIG_PM_SLEEP=y
314CONFIG_SUSPEND=y
315CONFIG_SUSPEND_FREEZER=y
316CONFIG_HIBERNATION=y
317CONFIG_PM_STD_PARTITION=""
247CONFIG_ACPI=y 318CONFIG_ACPI=y
319CONFIG_ACPI_SLEEP=y
248CONFIG_ACPI_PROCFS=y 320CONFIG_ACPI_PROCFS=y
321CONFIG_ACPI_PROCFS_POWER=y
322CONFIG_ACPI_SYSFS_POWER=y
323CONFIG_ACPI_PROC_EVENT=y
249CONFIG_ACPI_AC=y 324CONFIG_ACPI_AC=y
250CONFIG_ACPI_BATTERY=y 325CONFIG_ACPI_BATTERY=y
251CONFIG_ACPI_BUTTON=y 326CONFIG_ACPI_BUTTON=y
252CONFIG_ACPI_FAN=y 327CONFIG_ACPI_FAN=y
253# CONFIG_ACPI_DOCK is not set 328CONFIG_ACPI_DOCK=y
329# CONFIG_ACPI_BAY is not set
254CONFIG_ACPI_PROCESSOR=y 330CONFIG_ACPI_PROCESSOR=y
331CONFIG_ACPI_HOTPLUG_CPU=y
255CONFIG_ACPI_THERMAL=y 332CONFIG_ACPI_THERMAL=y
333# CONFIG_ACPI_WMI is not set
256# CONFIG_ACPI_ASUS is not set 334# CONFIG_ACPI_ASUS is not set
257# CONFIG_ACPI_TOSHIBA is not set 335# CONFIG_ACPI_TOSHIBA is not set
258CONFIG_ACPI_BLACKLIST_YEAR=2001 336# CONFIG_ACPI_CUSTOM_DSDT is not set
259CONFIG_ACPI_DEBUG=y 337CONFIG_ACPI_BLACKLIST_YEAR=0
338# CONFIG_ACPI_DEBUG is not set
260CONFIG_ACPI_EC=y 339CONFIG_ACPI_EC=y
261CONFIG_ACPI_POWER=y 340CONFIG_ACPI_POWER=y
262CONFIG_ACPI_SYSTEM=y 341CONFIG_ACPI_SYSTEM=y
263CONFIG_X86_PM_TIMER=y 342CONFIG_X86_PM_TIMER=y
264# CONFIG_ACPI_CONTAINER is not set 343CONFIG_ACPI_CONTAINER=y
265# CONFIG_ACPI_SBS is not set 344# CONFIG_ACPI_SBS is not set
266# CONFIG_APM is not set 345# CONFIG_APM is not set
267 346
@@ -271,15 +350,17 @@ CONFIG_X86_PM_TIMER=y
271CONFIG_CPU_FREQ=y 350CONFIG_CPU_FREQ=y
272CONFIG_CPU_FREQ_TABLE=y 351CONFIG_CPU_FREQ_TABLE=y
273CONFIG_CPU_FREQ_DEBUG=y 352CONFIG_CPU_FREQ_DEBUG=y
274CONFIG_CPU_FREQ_STAT=y 353# CONFIG_CPU_FREQ_STAT is not set
275# CONFIG_CPU_FREQ_STAT_DETAILS is not set 354# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
276CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y 355# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
277# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set 356CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
357# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
358# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
278CONFIG_CPU_FREQ_GOV_PERFORMANCE=y 359CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
279# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set 360# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
280CONFIG_CPU_FREQ_GOV_USERSPACE=y 361CONFIG_CPU_FREQ_GOV_USERSPACE=y
281CONFIG_CPU_FREQ_GOV_ONDEMAND=y 362CONFIG_CPU_FREQ_GOV_ONDEMAND=y
282CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y 363# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
283 364
284# 365#
285# CPUFreq processor drivers 366# CPUFreq processor drivers
@@ -287,8 +368,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
287CONFIG_X86_ACPI_CPUFREQ=y 368CONFIG_X86_ACPI_CPUFREQ=y
288# CONFIG_X86_POWERNOW_K6 is not set 369# CONFIG_X86_POWERNOW_K6 is not set
289# CONFIG_X86_POWERNOW_K7 is not set 370# CONFIG_X86_POWERNOW_K7 is not set
290CONFIG_X86_POWERNOW_K8=y 371# CONFIG_X86_POWERNOW_K8 is not set
291CONFIG_X86_POWERNOW_K8_ACPI=y
292# CONFIG_X86_GX_SUSPMOD is not set 372# CONFIG_X86_GX_SUSPMOD is not set
293# CONFIG_X86_SPEEDSTEP_CENTRINO is not set 373# CONFIG_X86_SPEEDSTEP_CENTRINO is not set
294# CONFIG_X86_SPEEDSTEP_ICH is not set 374# CONFIG_X86_SPEEDSTEP_ICH is not set
@@ -302,43 +382,72 @@ CONFIG_X86_POWERNOW_K8_ACPI=y
302# 382#
303# shared options 383# shared options
304# 384#
305CONFIG_X86_ACPI_CPUFREQ_PROC_INTF=y 385# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
306# CONFIG_X86_SPEEDSTEP_LIB is not set 386# CONFIG_X86_SPEEDSTEP_LIB is not set
387CONFIG_CPU_IDLE=y
388CONFIG_CPU_IDLE_GOV_LADDER=y
389CONFIG_CPU_IDLE_GOV_MENU=y
307 390
308# 391#
309# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 392# Bus options (PCI etc.)
310# 393#
311CONFIG_PCI=y 394CONFIG_PCI=y
312# CONFIG_PCI_GOBIOS is not set 395# CONFIG_PCI_GOBIOS is not set
313# CONFIG_PCI_GOMMCONFIG is not set 396# CONFIG_PCI_GOMMCONFIG is not set
314# CONFIG_PCI_GODIRECT is not set 397# CONFIG_PCI_GODIRECT is not set
315CONFIG_PCI_GOANY=y 398CONFIG_PCI_GOANY=y
399# CONFIG_PCI_GOOLPC is not set
316CONFIG_PCI_BIOS=y 400CONFIG_PCI_BIOS=y
317CONFIG_PCI_DIRECT=y 401CONFIG_PCI_DIRECT=y
318CONFIG_PCI_MMCONFIG=y 402CONFIG_PCI_MMCONFIG=y
319# CONFIG_PCIEPORTBUS is not set 403CONFIG_PCI_DOMAINS=y
404CONFIG_PCIEPORTBUS=y
405# CONFIG_HOTPLUG_PCI_PCIE is not set
406CONFIG_PCIEAER=y
407# CONFIG_PCIEASPM is not set
320CONFIG_ARCH_SUPPORTS_MSI=y 408CONFIG_ARCH_SUPPORTS_MSI=y
321CONFIG_PCI_MSI=y 409CONFIG_PCI_MSI=y
410# CONFIG_PCI_LEGACY is not set
322# CONFIG_PCI_DEBUG is not set 411# CONFIG_PCI_DEBUG is not set
323# CONFIG_HT_IRQ is not set 412CONFIG_HT_IRQ=y
324CONFIG_ISA_DMA_API=y 413CONFIG_ISA_DMA_API=y
325# CONFIG_ISA is not set 414# CONFIG_ISA is not set
326# CONFIG_MCA is not set 415# CONFIG_MCA is not set
327# CONFIG_SCx200 is not set 416# CONFIG_SCx200 is not set
417# CONFIG_OLPC is not set
328CONFIG_K8_NB=y 418CONFIG_K8_NB=y
329 419CONFIG_PCCARD=y
330# 420# CONFIG_PCMCIA_DEBUG is not set
331# PCCARD (PCMCIA/CardBus) support 421CONFIG_PCMCIA=y
332# 422CONFIG_PCMCIA_LOAD_CIS=y
333# CONFIG_PCCARD is not set 423CONFIG_PCMCIA_IOCTL=y
334# CONFIG_HOTPLUG_PCI is not set 424CONFIG_CARDBUS=y
335 425
336# 426#
337# Executable file formats 427# PC-card bridges
428#
429CONFIG_YENTA=y
430CONFIG_YENTA_O2=y
431CONFIG_YENTA_RICOH=y
432CONFIG_YENTA_TI=y
433CONFIG_YENTA_ENE_TUNE=y
434CONFIG_YENTA_TOSHIBA=y
435# CONFIG_PD6729 is not set
436# CONFIG_I82092 is not set
437CONFIG_PCCARD_NONSTATIC=y
438CONFIG_HOTPLUG_PCI=y
439# CONFIG_HOTPLUG_PCI_FAKE is not set
440# CONFIG_HOTPLUG_PCI_IBM is not set
441# CONFIG_HOTPLUG_PCI_ACPI is not set
442# CONFIG_HOTPLUG_PCI_CPCI is not set
443# CONFIG_HOTPLUG_PCI_SHPC is not set
444
445#
446# Executable file formats / Emulations
338# 447#
339CONFIG_BINFMT_ELF=y 448CONFIG_BINFMT_ELF=y
340# CONFIG_BINFMT_AOUT is not set 449# CONFIG_BINFMT_AOUT is not set
341# CONFIG_BINFMT_MISC is not set 450CONFIG_BINFMT_MISC=y
342 451
343# 452#
344# Networking 453# Networking
@@ -349,59 +458,142 @@ CONFIG_NET=y
349# Networking options 458# Networking options
350# 459#
351CONFIG_PACKET=y 460CONFIG_PACKET=y
352# CONFIG_PACKET_MMAP is not set 461CONFIG_PACKET_MMAP=y
353CONFIG_UNIX=y 462CONFIG_UNIX=y
354CONFIG_XFRM=y 463CONFIG_XFRM=y
355# CONFIG_XFRM_USER is not set 464CONFIG_XFRM_USER=y
356# CONFIG_XFRM_SUB_POLICY is not set 465# CONFIG_XFRM_SUB_POLICY is not set
357# CONFIG_XFRM_MIGRATE is not set 466# CONFIG_XFRM_MIGRATE is not set
467# CONFIG_XFRM_STATISTICS is not set
358# CONFIG_NET_KEY is not set 468# CONFIG_NET_KEY is not set
359CONFIG_INET=y 469CONFIG_INET=y
360CONFIG_IP_MULTICAST=y 470CONFIG_IP_MULTICAST=y
361# CONFIG_IP_ADVANCED_ROUTER is not set 471CONFIG_IP_ADVANCED_ROUTER=y
472CONFIG_ASK_IP_FIB_HASH=y
473# CONFIG_IP_FIB_TRIE is not set
362CONFIG_IP_FIB_HASH=y 474CONFIG_IP_FIB_HASH=y
363CONFIG_IP_PNP=y 475CONFIG_IP_MULTIPLE_TABLES=y
364CONFIG_IP_PNP_DHCP=y 476CONFIG_IP_ROUTE_MULTIPATH=y
365# CONFIG_IP_PNP_BOOTP is not set 477CONFIG_IP_ROUTE_VERBOSE=y
366# CONFIG_IP_PNP_RARP is not set 478# CONFIG_IP_PNP is not set
367# CONFIG_NET_IPIP is not set 479# CONFIG_NET_IPIP is not set
368# CONFIG_NET_IPGRE is not set 480# CONFIG_NET_IPGRE is not set
369# CONFIG_IP_MROUTE is not set 481CONFIG_IP_MROUTE=y
482CONFIG_IP_PIMSM_V1=y
483CONFIG_IP_PIMSM_V2=y
370# CONFIG_ARPD is not set 484# CONFIG_ARPD is not set
371# CONFIG_SYN_COOKIES is not set 485CONFIG_SYN_COOKIES=y
372# CONFIG_INET_AH is not set 486# CONFIG_INET_AH is not set
373# CONFIG_INET_ESP is not set 487# CONFIG_INET_ESP is not set
374# CONFIG_INET_IPCOMP is not set 488# CONFIG_INET_IPCOMP is not set
375# CONFIG_INET_XFRM_TUNNEL is not set 489# CONFIG_INET_XFRM_TUNNEL is not set
376CONFIG_INET_TUNNEL=y 490CONFIG_INET_TUNNEL=y
377CONFIG_INET_XFRM_MODE_TRANSPORT=y 491# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
378CONFIG_INET_XFRM_MODE_TUNNEL=y 492# CONFIG_INET_XFRM_MODE_TUNNEL is not set
379# CONFIG_INET_XFRM_MODE_BEET is not set 493# CONFIG_INET_XFRM_MODE_BEET is not set
380CONFIG_INET_DIAG=y 494CONFIG_INET_LRO=y
381CONFIG_INET_TCP_DIAG=y 495# CONFIG_INET_DIAG is not set
382# CONFIG_TCP_CONG_ADVANCED is not set 496CONFIG_TCP_CONG_ADVANCED=y
497# CONFIG_TCP_CONG_BIC is not set
383CONFIG_TCP_CONG_CUBIC=y 498CONFIG_TCP_CONG_CUBIC=y
499# CONFIG_TCP_CONG_WESTWOOD is not set
500# CONFIG_TCP_CONG_HTCP is not set
501# CONFIG_TCP_CONG_HSTCP is not set
502# CONFIG_TCP_CONG_HYBLA is not set
503# CONFIG_TCP_CONG_VEGAS is not set
504# CONFIG_TCP_CONG_SCALABLE is not set
505# CONFIG_TCP_CONG_LP is not set
506# CONFIG_TCP_CONG_VENO is not set
507# CONFIG_TCP_CONG_YEAH is not set
508# CONFIG_TCP_CONG_ILLINOIS is not set
509# CONFIG_DEFAULT_BIC is not set
510CONFIG_DEFAULT_CUBIC=y
511# CONFIG_DEFAULT_HTCP is not set
512# CONFIG_DEFAULT_VEGAS is not set
513# CONFIG_DEFAULT_WESTWOOD is not set
514# CONFIG_DEFAULT_RENO is not set
384CONFIG_DEFAULT_TCP_CONG="cubic" 515CONFIG_DEFAULT_TCP_CONG="cubic"
385# CONFIG_TCP_MD5SIG is not set 516CONFIG_TCP_MD5SIG=y
517# CONFIG_IP_VS is not set
386CONFIG_IPV6=y 518CONFIG_IPV6=y
387# CONFIG_IPV6_PRIVACY is not set 519# CONFIG_IPV6_PRIVACY is not set
388# CONFIG_IPV6_ROUTER_PREF is not set 520# CONFIG_IPV6_ROUTER_PREF is not set
389# CONFIG_IPV6_OPTIMISTIC_DAD is not set 521# CONFIG_IPV6_OPTIMISTIC_DAD is not set
390# CONFIG_INET6_AH is not set 522CONFIG_INET6_AH=y
391# CONFIG_INET6_ESP is not set 523CONFIG_INET6_ESP=y
392# CONFIG_INET6_IPCOMP is not set 524# CONFIG_INET6_IPCOMP is not set
393# CONFIG_IPV6_MIP6 is not set 525# CONFIG_IPV6_MIP6 is not set
394# CONFIG_INET6_XFRM_TUNNEL is not set 526# CONFIG_INET6_XFRM_TUNNEL is not set
395# CONFIG_INET6_TUNNEL is not set 527# CONFIG_INET6_TUNNEL is not set
396CONFIG_INET6_XFRM_MODE_TRANSPORT=y 528CONFIG_INET6_XFRM_MODE_TRANSPORT=y
397CONFIG_INET6_XFRM_MODE_TUNNEL=y 529CONFIG_INET6_XFRM_MODE_TUNNEL=y
398# CONFIG_INET6_XFRM_MODE_BEET is not set 530CONFIG_INET6_XFRM_MODE_BEET=y
399# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set 531# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
400CONFIG_IPV6_SIT=y 532CONFIG_IPV6_SIT=y
533CONFIG_IPV6_NDISC_NODETYPE=y
401# CONFIG_IPV6_TUNNEL is not set 534# CONFIG_IPV6_TUNNEL is not set
402# CONFIG_IPV6_MULTIPLE_TABLES is not set 535# CONFIG_IPV6_MULTIPLE_TABLES is not set
403# CONFIG_NETWORK_SECMARK is not set 536# CONFIG_IPV6_MROUTE is not set
404# CONFIG_NETFILTER is not set 537CONFIG_NETLABEL=y
538CONFIG_NETWORK_SECMARK=y
539CONFIG_NETFILTER=y
540# CONFIG_NETFILTER_DEBUG is not set
541# CONFIG_NETFILTER_ADVANCED is not set
542
543#
544# Core Netfilter Configuration
545#
546CONFIG_NETFILTER_NETLINK=y
547CONFIG_NETFILTER_NETLINK_LOG=y
548CONFIG_NF_CONNTRACK=y
549CONFIG_NF_CONNTRACK_SECMARK=y
550CONFIG_NF_CONNTRACK_FTP=y
551CONFIG_NF_CONNTRACK_IRC=y
552CONFIG_NF_CONNTRACK_SIP=y
553CONFIG_NF_CT_NETLINK=y
554CONFIG_NETFILTER_XTABLES=y
555CONFIG_NETFILTER_XT_TARGET_MARK=y
556CONFIG_NETFILTER_XT_TARGET_NFLOG=y
557CONFIG_NETFILTER_XT_TARGET_SECMARK=y
558CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
559CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
560CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
561CONFIG_NETFILTER_XT_MATCH_MARK=y
562CONFIG_NETFILTER_XT_MATCH_POLICY=y
563CONFIG_NETFILTER_XT_MATCH_STATE=y
564
565#
566# IP: Netfilter Configuration
567#
568CONFIG_NF_CONNTRACK_IPV4=y
569CONFIG_NF_CONNTRACK_PROC_COMPAT=y
570CONFIG_IP_NF_IPTABLES=y
571CONFIG_IP_NF_FILTER=y
572CONFIG_IP_NF_TARGET_REJECT=y
573CONFIG_IP_NF_TARGET_LOG=y
574CONFIG_IP_NF_TARGET_ULOG=y
575CONFIG_NF_NAT=y
576CONFIG_NF_NAT_NEEDED=y
577CONFIG_IP_NF_TARGET_MASQUERADE=y
578CONFIG_NF_NAT_FTP=y
579CONFIG_NF_NAT_IRC=y
580# CONFIG_NF_NAT_TFTP is not set
581# CONFIG_NF_NAT_AMANDA is not set
582# CONFIG_NF_NAT_PPTP is not set
583# CONFIG_NF_NAT_H323 is not set
584CONFIG_NF_NAT_SIP=y
585CONFIG_IP_NF_MANGLE=y
586
587#
588# IPv6: Netfilter Configuration
589#
590CONFIG_NF_CONNTRACK_IPV6=y
591CONFIG_IP6_NF_IPTABLES=y
592CONFIG_IP6_NF_MATCH_IPV6HEADER=y
593CONFIG_IP6_NF_FILTER=y
594CONFIG_IP6_NF_TARGET_LOG=y
595CONFIG_IP6_NF_TARGET_REJECT=y
596CONFIG_IP6_NF_MANGLE=y
405# CONFIG_IP_DCCP is not set 597# CONFIG_IP_DCCP is not set
406# CONFIG_IP_SCTP is not set 598# CONFIG_IP_SCTP is not set
407# CONFIG_TIPC is not set 599# CONFIG_TIPC is not set
@@ -409,6 +601,7 @@ CONFIG_IPV6_SIT=y
409# CONFIG_BRIDGE is not set 601# CONFIG_BRIDGE is not set
410# CONFIG_VLAN_8021Q is not set 602# CONFIG_VLAN_8021Q is not set
411# CONFIG_DECNET is not set 603# CONFIG_DECNET is not set
604CONFIG_LLC=y
412# CONFIG_LLC2 is not set 605# CONFIG_LLC2 is not set
413# CONFIG_IPX is not set 606# CONFIG_IPX is not set
414# CONFIG_ATALK is not set 607# CONFIG_ATALK is not set
@@ -416,28 +609,99 @@ CONFIG_IPV6_SIT=y
416# CONFIG_LAPB is not set 609# CONFIG_LAPB is not set
417# CONFIG_ECONET is not set 610# CONFIG_ECONET is not set
418# CONFIG_WAN_ROUTER is not set 611# CONFIG_WAN_ROUTER is not set
419 612CONFIG_NET_SCHED=y
420# 613
421# QoS and/or fair queueing 614#
422# 615# Queueing/Scheduling
423# CONFIG_NET_SCHED is not set 616#
617# CONFIG_NET_SCH_CBQ is not set
618# CONFIG_NET_SCH_HTB is not set
619# CONFIG_NET_SCH_HFSC is not set
620# CONFIG_NET_SCH_PRIO is not set
621# CONFIG_NET_SCH_RR is not set
622# CONFIG_NET_SCH_RED is not set
623# CONFIG_NET_SCH_SFQ is not set
624# CONFIG_NET_SCH_TEQL is not set
625# CONFIG_NET_SCH_TBF is not set
626# CONFIG_NET_SCH_GRED is not set
627# CONFIG_NET_SCH_DSMARK is not set
628# CONFIG_NET_SCH_NETEM is not set
629# CONFIG_NET_SCH_INGRESS is not set
630
631#
632# Classification
633#
634CONFIG_NET_CLS=y
635# CONFIG_NET_CLS_BASIC is not set
636# CONFIG_NET_CLS_TCINDEX is not set
637# CONFIG_NET_CLS_ROUTE4 is not set
638# CONFIG_NET_CLS_FW is not set
639# CONFIG_NET_CLS_U32 is not set
640# CONFIG_NET_CLS_RSVP is not set
641# CONFIG_NET_CLS_RSVP6 is not set
642# CONFIG_NET_CLS_FLOW is not set
643CONFIG_NET_EMATCH=y
644CONFIG_NET_EMATCH_STACK=32
645# CONFIG_NET_EMATCH_CMP is not set
646# CONFIG_NET_EMATCH_NBYTE is not set
647# CONFIG_NET_EMATCH_U32 is not set
648# CONFIG_NET_EMATCH_META is not set
649# CONFIG_NET_EMATCH_TEXT is not set
650CONFIG_NET_CLS_ACT=y
651# CONFIG_NET_ACT_POLICE is not set
652# CONFIG_NET_ACT_GACT is not set
653# CONFIG_NET_ACT_MIRRED is not set
654# CONFIG_NET_ACT_IPT is not set
655# CONFIG_NET_ACT_NAT is not set
656# CONFIG_NET_ACT_PEDIT is not set
657# CONFIG_NET_ACT_SIMP is not set
658CONFIG_NET_SCH_FIFO=y
424 659
425# 660#
426# Network testing 661# Network testing
427# 662#
428# CONFIG_NET_PKTGEN is not set 663# CONFIG_NET_PKTGEN is not set
429# CONFIG_NET_TCPPROBE is not set 664# CONFIG_NET_TCPPROBE is not set
430# CONFIG_HAMRADIO is not set 665CONFIG_HAMRADIO=y
666
667#
668# Packet Radio protocols
669#
670# CONFIG_AX25 is not set
671# CONFIG_CAN is not set
431# CONFIG_IRDA is not set 672# CONFIG_IRDA is not set
432# CONFIG_BT is not set 673# CONFIG_BT is not set
433# CONFIG_AF_RXRPC is not set 674# CONFIG_AF_RXRPC is not set
675CONFIG_FIB_RULES=y
434 676
435# 677#
436# Wireless 678# Wireless
437# 679#
438# CONFIG_CFG80211 is not set 680CONFIG_CFG80211=y
439# CONFIG_WIRELESS_EXT is not set 681CONFIG_NL80211=y
440# CONFIG_MAC80211 is not set 682CONFIG_WIRELESS_EXT=y
683CONFIG_MAC80211=y
684
685#
686# Rate control algorithm selection
687#
688CONFIG_MAC80211_RC_DEFAULT_PID=y
689# CONFIG_MAC80211_RC_DEFAULT_NONE is not set
690
691#
692# Selecting 'y' for an algorithm will
693#
694
695#
696# build the algorithm into mac80211.
697#
698CONFIG_MAC80211_RC_DEFAULT="pid"
699CONFIG_MAC80211_RC_PID=y
700# CONFIG_MAC80211_MESH is not set
701CONFIG_MAC80211_LEDS=y
702# CONFIG_MAC80211_DEBUGFS is not set
703# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set
704# CONFIG_MAC80211_DEBUG is not set
441# CONFIG_IEEE80211 is not set 705# CONFIG_IEEE80211 is not set
442# CONFIG_RFKILL is not set 706# CONFIG_RFKILL is not set
443# CONFIG_NET_9P is not set 707# CONFIG_NET_9P is not set
@@ -449,13 +713,15 @@ CONFIG_IPV6_SIT=y
449# 713#
450# Generic Driver Options 714# Generic Driver Options
451# 715#
716CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
452CONFIG_STANDALONE=y 717CONFIG_STANDALONE=y
453CONFIG_PREVENT_FIRMWARE_BUILD=y 718CONFIG_PREVENT_FIRMWARE_BUILD=y
454CONFIG_FW_LOADER=y 719CONFIG_FW_LOADER=y
455# CONFIG_DEBUG_DRIVER is not set 720# CONFIG_DEBUG_DRIVER is not set
456# CONFIG_DEBUG_DEVRES is not set 721CONFIG_DEBUG_DEVRES=y
457# CONFIG_SYS_HYPERVISOR is not set 722# CONFIG_SYS_HYPERVISOR is not set
458# CONFIG_CONNECTOR is not set 723CONFIG_CONNECTOR=y
724CONFIG_PROC_EVENTS=y
459# CONFIG_MTD is not set 725# CONFIG_MTD is not set
460# CONFIG_PARPORT is not set 726# CONFIG_PARPORT is not set
461CONFIG_PNP=y 727CONFIG_PNP=y
@@ -466,7 +732,7 @@ CONFIG_PNP=y
466# 732#
467CONFIG_PNPACPI=y 733CONFIG_PNPACPI=y
468CONFIG_BLK_DEV=y 734CONFIG_BLK_DEV=y
469CONFIG_BLK_DEV_FD=y 735# CONFIG_BLK_DEV_FD is not set
470# CONFIG_BLK_CPQ_DA is not set 736# CONFIG_BLK_CPQ_DA is not set
471# CONFIG_BLK_CPQ_CISS_DA is not set 737# CONFIG_BLK_CPQ_CISS_DA is not set
472# CONFIG_BLK_DEV_DAC960 is not set 738# CONFIG_BLK_DEV_DAC960 is not set
@@ -479,8 +745,8 @@ CONFIG_BLK_DEV_LOOP=y
479# CONFIG_BLK_DEV_UB is not set 745# CONFIG_BLK_DEV_UB is not set
480CONFIG_BLK_DEV_RAM=y 746CONFIG_BLK_DEV_RAM=y
481CONFIG_BLK_DEV_RAM_COUNT=16 747CONFIG_BLK_DEV_RAM_COUNT=16
482CONFIG_BLK_DEV_RAM_SIZE=4096 748CONFIG_BLK_DEV_RAM_SIZE=16384
483CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 749# CONFIG_BLK_DEV_XIP is not set
484# CONFIG_CDROM_PKTCDVD is not set 750# CONFIG_CDROM_PKTCDVD is not set
485# CONFIG_ATA_OVER_ETH is not set 751# CONFIG_ATA_OVER_ETH is not set
486CONFIG_MISC_DEVICES=y 752CONFIG_MISC_DEVICES=y
@@ -489,73 +755,17 @@ CONFIG_MISC_DEVICES=y
489# CONFIG_EEPROM_93CX6 is not set 755# CONFIG_EEPROM_93CX6 is not set
490# CONFIG_SGI_IOC4 is not set 756# CONFIG_SGI_IOC4 is not set
491# CONFIG_TIFM_CORE is not set 757# CONFIG_TIFM_CORE is not set
758# CONFIG_ACER_WMI is not set
759# CONFIG_ASUS_LAPTOP is not set
760# CONFIG_FUJITSU_LAPTOP is not set
761# CONFIG_TC1100_WMI is not set
762# CONFIG_MSI_LAPTOP is not set
492# CONFIG_SONY_LAPTOP is not set 763# CONFIG_SONY_LAPTOP is not set
493# CONFIG_THINKPAD_ACPI is not set 764# CONFIG_THINKPAD_ACPI is not set
494CONFIG_IDE=y 765# CONFIG_INTEL_MENLOW is not set
495CONFIG_BLK_DEV_IDE=y 766# CONFIG_ENCLOSURE_SERVICES is not set
496 767CONFIG_HAVE_IDE=y
497# 768# CONFIG_IDE is not set
498# Please see Documentation/ide.txt for help/info on IDE drives
499#
500# CONFIG_BLK_DEV_IDE_SATA is not set
501# CONFIG_BLK_DEV_HD_IDE is not set
502CONFIG_BLK_DEV_IDEDISK=y
503CONFIG_IDEDISK_MULTI_MODE=y
504CONFIG_BLK_DEV_IDECD=y
505# CONFIG_BLK_DEV_IDETAPE is not set
506# CONFIG_BLK_DEV_IDEFLOPPY is not set
507# CONFIG_BLK_DEV_IDESCSI is not set
508CONFIG_BLK_DEV_IDEACPI=y
509# CONFIG_IDE_TASK_IOCTL is not set
510CONFIG_IDE_PROC_FS=y
511
512#
513# IDE chipset support/bugfixes
514#
515CONFIG_IDE_GENERIC=y
516# CONFIG_BLK_DEV_CMD640 is not set
517# CONFIG_BLK_DEV_IDEPNP is not set
518CONFIG_BLK_DEV_IDEPCI=y
519# CONFIG_IDEPCI_SHARE_IRQ is not set
520CONFIG_IDEPCI_PCIBUS_ORDER=y
521# CONFIG_BLK_DEV_OFFBOARD is not set
522# CONFIG_BLK_DEV_GENERIC is not set
523# CONFIG_BLK_DEV_OPTI621 is not set
524# CONFIG_BLK_DEV_RZ1000 is not set
525CONFIG_BLK_DEV_IDEDMA_PCI=y
526# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
527# CONFIG_IDEDMA_ONLYDISK is not set
528# CONFIG_BLK_DEV_AEC62XX is not set
529# CONFIG_BLK_DEV_ALI15X3 is not set
530CONFIG_BLK_DEV_AMD74XX=y
531# CONFIG_BLK_DEV_ATIIXP is not set
532# CONFIG_BLK_DEV_CMD64X is not set
533# CONFIG_BLK_DEV_TRIFLEX is not set
534# CONFIG_BLK_DEV_CY82C693 is not set
535# CONFIG_BLK_DEV_CS5520 is not set
536# CONFIG_BLK_DEV_CS5530 is not set
537# CONFIG_BLK_DEV_CS5535 is not set
538# CONFIG_BLK_DEV_HPT34X is not set
539# CONFIG_BLK_DEV_HPT366 is not set
540# CONFIG_BLK_DEV_JMICRON is not set
541# CONFIG_BLK_DEV_SC1200 is not set
542CONFIG_BLK_DEV_PIIX=y
543# CONFIG_BLK_DEV_IT8213 is not set
544# CONFIG_BLK_DEV_IT821X is not set
545# CONFIG_BLK_DEV_NS87415 is not set
546# CONFIG_BLK_DEV_PDC202XX_OLD is not set
547# CONFIG_BLK_DEV_PDC202XX_NEW is not set
548# CONFIG_BLK_DEV_SVWKS is not set
549# CONFIG_BLK_DEV_SIIMAGE is not set
550# CONFIG_BLK_DEV_SIS5513 is not set
551# CONFIG_BLK_DEV_SLC90E66 is not set
552# CONFIG_BLK_DEV_TRM290 is not set
553# CONFIG_BLK_DEV_VIA82CXXX is not set
554# CONFIG_BLK_DEV_TC86C001 is not set
555# CONFIG_IDE_ARM is not set
556CONFIG_BLK_DEV_IDEDMA=y
557# CONFIG_IDEDMA_IVB is not set
558# CONFIG_BLK_DEV_HD is not set
559 769
560# 770#
561# SCSI device support 771# SCSI device support
@@ -564,8 +774,8 @@ CONFIG_BLK_DEV_IDEDMA=y
564CONFIG_SCSI=y 774CONFIG_SCSI=y
565CONFIG_SCSI_DMA=y 775CONFIG_SCSI_DMA=y
566# CONFIG_SCSI_TGT is not set 776# CONFIG_SCSI_TGT is not set
567CONFIG_SCSI_NETLINK=y 777# CONFIG_SCSI_NETLINK is not set
568# CONFIG_SCSI_PROC_FS is not set 778CONFIG_SCSI_PROC_FS=y
569 779
570# 780#
571# SCSI support type (disk, tape, CD-ROM) 781# SCSI support type (disk, tape, CD-ROM)
@@ -574,7 +784,7 @@ CONFIG_BLK_DEV_SD=y
574# CONFIG_CHR_DEV_ST is not set 784# CONFIG_CHR_DEV_ST is not set
575# CONFIG_CHR_DEV_OSST is not set 785# CONFIG_CHR_DEV_OSST is not set
576CONFIG_BLK_DEV_SR=y 786CONFIG_BLK_DEV_SR=y
577# CONFIG_BLK_DEV_SR_VENDOR is not set 787CONFIG_BLK_DEV_SR_VENDOR=y
578CONFIG_CHR_DEV_SG=y 788CONFIG_CHR_DEV_SG=y
579# CONFIG_CHR_DEV_SCH is not set 789# CONFIG_CHR_DEV_SCH is not set
580 790
@@ -582,7 +792,7 @@ CONFIG_CHR_DEV_SG=y
582# Some SCSI devices (e.g. CD jukebox) support multiple LUNs 792# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
583# 793#
584# CONFIG_SCSI_MULTI_LUN is not set 794# CONFIG_SCSI_MULTI_LUN is not set
585# CONFIG_SCSI_CONSTANTS is not set 795CONFIG_SCSI_CONSTANTS=y
586# CONFIG_SCSI_LOGGING is not set 796# CONFIG_SCSI_LOGGING is not set
587# CONFIG_SCSI_SCAN_ASYNC is not set 797# CONFIG_SCSI_SCAN_ASYNC is not set
588CONFIG_SCSI_WAIT_SCAN=m 798CONFIG_SCSI_WAIT_SCAN=m
@@ -591,81 +801,37 @@ CONFIG_SCSI_WAIT_SCAN=m
591# SCSI Transports 801# SCSI Transports
592# 802#
593CONFIG_SCSI_SPI_ATTRS=y 803CONFIG_SCSI_SPI_ATTRS=y
594CONFIG_SCSI_FC_ATTRS=y 804# CONFIG_SCSI_FC_ATTRS is not set
595# CONFIG_SCSI_ISCSI_ATTRS is not set 805# CONFIG_SCSI_ISCSI_ATTRS is not set
596# CONFIG_SCSI_SAS_ATTRS is not set 806# CONFIG_SCSI_SAS_ATTRS is not set
597# CONFIG_SCSI_SAS_LIBSAS is not set 807# CONFIG_SCSI_SAS_LIBSAS is not set
598 808# CONFIG_SCSI_SRP_ATTRS is not set
599# 809# CONFIG_SCSI_LOWLEVEL is not set
600# SCSI low-level drivers 810# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
601#
602# CONFIG_ISCSI_TCP is not set
603CONFIG_BLK_DEV_3W_XXXX_RAID=y
604# CONFIG_SCSI_3W_9XXX is not set
605# CONFIG_SCSI_ACARD is not set
606# CONFIG_SCSI_AACRAID is not set
607CONFIG_SCSI_AIC7XXX=y
608CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
609CONFIG_AIC7XXX_RESET_DELAY_MS=5000
610CONFIG_AIC7XXX_DEBUG_ENABLE=y
611CONFIG_AIC7XXX_DEBUG_MASK=0
612CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
613# CONFIG_SCSI_AIC7XXX_OLD is not set
614CONFIG_SCSI_AIC79XX=y
615CONFIG_AIC79XX_CMDS_PER_DEVICE=32
616CONFIG_AIC79XX_RESET_DELAY_MS=4000
617# CONFIG_AIC79XX_DEBUG_ENABLE is not set
618CONFIG_AIC79XX_DEBUG_MASK=0
619# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set
620# CONFIG_SCSI_AIC94XX is not set
621# CONFIG_SCSI_DPT_I2O is not set
622# CONFIG_SCSI_ADVANSYS is not set
623# CONFIG_SCSI_ARCMSR is not set
624# CONFIG_MEGARAID_NEWGEN is not set
625# CONFIG_MEGARAID_LEGACY is not set
626# CONFIG_MEGARAID_SAS is not set
627# CONFIG_SCSI_HPTIOP is not set
628# CONFIG_SCSI_BUSLOGIC is not set
629# CONFIG_SCSI_DMX3191D is not set
630# CONFIG_SCSI_EATA is not set
631# CONFIG_SCSI_FUTURE_DOMAIN is not set
632# CONFIG_SCSI_GDTH is not set
633# CONFIG_SCSI_IPS is not set
634# CONFIG_SCSI_INITIO is not set
635# CONFIG_SCSI_INIA100 is not set
636# CONFIG_SCSI_STEX is not set
637# CONFIG_SCSI_SYM53C8XX_2 is not set
638# CONFIG_SCSI_IPR is not set
639# CONFIG_SCSI_QLOGIC_1280 is not set
640# CONFIG_SCSI_QLA_FC is not set
641# CONFIG_SCSI_QLA_ISCSI is not set
642# CONFIG_SCSI_LPFC is not set
643# CONFIG_SCSI_DC395x is not set
644# CONFIG_SCSI_DC390T is not set
645# CONFIG_SCSI_NSP32 is not set
646# CONFIG_SCSI_DEBUG is not set
647# CONFIG_SCSI_SRP is not set
648CONFIG_ATA=y 811CONFIG_ATA=y
649# CONFIG_ATA_NONSTANDARD is not set 812# CONFIG_ATA_NONSTANDARD is not set
650CONFIG_ATA_ACPI=y 813CONFIG_ATA_ACPI=y
814CONFIG_SATA_PMP=y
651CONFIG_SATA_AHCI=y 815CONFIG_SATA_AHCI=y
652CONFIG_SATA_SVW=y 816# CONFIG_SATA_SIL24 is not set
817CONFIG_ATA_SFF=y
818# CONFIG_SATA_SVW is not set
653CONFIG_ATA_PIIX=y 819CONFIG_ATA_PIIX=y
654# CONFIG_SATA_MV is not set 820# CONFIG_SATA_MV is not set
655CONFIG_SATA_NV=y 821# CONFIG_SATA_NV is not set
656# CONFIG_PDC_ADMA is not set 822# CONFIG_PDC_ADMA is not set
657# CONFIG_SATA_QSTOR is not set 823# CONFIG_SATA_QSTOR is not set
658# CONFIG_SATA_PROMISE is not set 824# CONFIG_SATA_PROMISE is not set
659# CONFIG_SATA_SX4 is not set 825# CONFIG_SATA_SX4 is not set
660CONFIG_SATA_SIL=y 826# CONFIG_SATA_SIL is not set
661# CONFIG_SATA_SIL24 is not set
662# CONFIG_SATA_SIS is not set 827# CONFIG_SATA_SIS is not set
663# CONFIG_SATA_ULI is not set 828# CONFIG_SATA_ULI is not set
664CONFIG_SATA_VIA=y 829# CONFIG_SATA_VIA is not set
665# CONFIG_SATA_VITESSE is not set 830# CONFIG_SATA_VITESSE is not set
666# CONFIG_SATA_INIC162X is not set 831# CONFIG_SATA_INIC162X is not set
832# CONFIG_PATA_ACPI is not set
667# CONFIG_PATA_ALI is not set 833# CONFIG_PATA_ALI is not set
668# CONFIG_PATA_AMD is not set 834CONFIG_PATA_AMD=y
669# CONFIG_PATA_ARTOP is not set 835# CONFIG_PATA_ARTOP is not set
670# CONFIG_PATA_ATIIXP is not set 836# CONFIG_PATA_ATIIXP is not set
671# CONFIG_PATA_CMD640_PCI is not set 837# CONFIG_PATA_CMD640_PCI is not set
@@ -673,6 +839,7 @@ CONFIG_SATA_VIA=y
673# CONFIG_PATA_CS5520 is not set 839# CONFIG_PATA_CS5520 is not set
674# CONFIG_PATA_CS5530 is not set 840# CONFIG_PATA_CS5530 is not set
675# CONFIG_PATA_CS5535 is not set 841# CONFIG_PATA_CS5535 is not set
842# CONFIG_PATA_CS5536 is not set
676# CONFIG_PATA_CYPRESS is not set 843# CONFIG_PATA_CYPRESS is not set
677# CONFIG_PATA_EFAR is not set 844# CONFIG_PATA_EFAR is not set
678# CONFIG_ATA_GENERIC is not set 845# CONFIG_ATA_GENERIC is not set
@@ -686,11 +853,14 @@ CONFIG_SATA_VIA=y
686# CONFIG_PATA_TRIFLEX is not set 853# CONFIG_PATA_TRIFLEX is not set
687# CONFIG_PATA_MARVELL is not set 854# CONFIG_PATA_MARVELL is not set
688# CONFIG_PATA_MPIIX is not set 855# CONFIG_PATA_MPIIX is not set
689# CONFIG_PATA_OLDPIIX is not set 856CONFIG_PATA_OLDPIIX=y
690# CONFIG_PATA_NETCELL is not set 857# CONFIG_PATA_NETCELL is not set
858# CONFIG_PATA_NINJA32 is not set
691# CONFIG_PATA_NS87410 is not set 859# CONFIG_PATA_NS87410 is not set
860# CONFIG_PATA_NS87415 is not set
692# CONFIG_PATA_OPTI is not set 861# CONFIG_PATA_OPTI is not set
693# CONFIG_PATA_OPTIDMA is not set 862# CONFIG_PATA_OPTIDMA is not set
863# CONFIG_PATA_PCMCIA is not set
694# CONFIG_PATA_PDC_OLD is not set 864# CONFIG_PATA_PDC_OLD is not set
695# CONFIG_PATA_RADISYS is not set 865# CONFIG_PATA_RADISYS is not set
696# CONFIG_PATA_RZ1000 is not set 866# CONFIG_PATA_RZ1000 is not set
@@ -702,65 +872,42 @@ CONFIG_SATA_VIA=y
702# CONFIG_PATA_VIA is not set 872# CONFIG_PATA_VIA is not set
703# CONFIG_PATA_WINBOND is not set 873# CONFIG_PATA_WINBOND is not set
704CONFIG_MD=y 874CONFIG_MD=y
705# CONFIG_BLK_DEV_MD is not set 875CONFIG_BLK_DEV_MD=y
876# CONFIG_MD_LINEAR is not set
877# CONFIG_MD_RAID0 is not set
878# CONFIG_MD_RAID1 is not set
879# CONFIG_MD_RAID10 is not set
880# CONFIG_MD_RAID456 is not set
881# CONFIG_MD_MULTIPATH is not set
882# CONFIG_MD_FAULTY is not set
706CONFIG_BLK_DEV_DM=y 883CONFIG_BLK_DEV_DM=y
707# CONFIG_DM_DEBUG is not set 884# CONFIG_DM_DEBUG is not set
708# CONFIG_DM_CRYPT is not set 885# CONFIG_DM_CRYPT is not set
709# CONFIG_DM_SNAPSHOT is not set 886# CONFIG_DM_SNAPSHOT is not set
710# CONFIG_DM_MIRROR is not set 887CONFIG_DM_MIRROR=y
711# CONFIG_DM_ZERO is not set 888CONFIG_DM_ZERO=y
712# CONFIG_DM_MULTIPATH is not set 889# CONFIG_DM_MULTIPATH is not set
713# CONFIG_DM_DELAY is not set 890# CONFIG_DM_DELAY is not set
714 891# CONFIG_DM_UEVENT is not set
715# 892# CONFIG_FUSION is not set
716# Fusion MPT device support
717#
718CONFIG_FUSION=y
719CONFIG_FUSION_SPI=y
720# CONFIG_FUSION_FC is not set
721# CONFIG_FUSION_SAS is not set
722CONFIG_FUSION_MAX_SGE=128
723# CONFIG_FUSION_CTL is not set
724 893
725# 894#
726# IEEE 1394 (FireWire) support 895# IEEE 1394 (FireWire) support
727# 896#
728# CONFIG_FIREWIRE is not set 897# CONFIG_FIREWIRE is not set
729CONFIG_IEEE1394=y 898# CONFIG_IEEE1394 is not set
730
731#
732# Subsystem Options
733#
734# CONFIG_IEEE1394_VERBOSEDEBUG is not set
735
736#
737# Controllers
738#
739
740#
741# Texas Instruments PCILynx requires I2C
742#
743CONFIG_IEEE1394_OHCI1394=y
744
745#
746# Protocols
747#
748# CONFIG_IEEE1394_VIDEO1394 is not set
749# CONFIG_IEEE1394_SBP2 is not set
750# CONFIG_IEEE1394_ETH1394_ROM_ENTRY is not set
751# CONFIG_IEEE1394_ETH1394 is not set
752# CONFIG_IEEE1394_DV1394 is not set
753CONFIG_IEEE1394_RAWIO=y
754# CONFIG_I2O is not set 899# CONFIG_I2O is not set
755CONFIG_MACINTOSH_DRIVERS=y 900CONFIG_MACINTOSH_DRIVERS=y
756# CONFIG_MAC_EMUMOUSEBTN is not set 901CONFIG_MAC_EMUMOUSEBTN=y
757CONFIG_NETDEVICES=y 902CONFIG_NETDEVICES=y
758CONFIG_NETDEVICES_MULTIQUEUE=y 903# CONFIG_NETDEVICES_MULTIQUEUE is not set
904# CONFIG_IFB is not set
759# CONFIG_DUMMY is not set 905# CONFIG_DUMMY is not set
760# CONFIG_BONDING is not set 906# CONFIG_BONDING is not set
761# CONFIG_MACVLAN is not set 907# CONFIG_MACVLAN is not set
762# CONFIG_EQUALIZER is not set 908# CONFIG_EQUALIZER is not set
763# CONFIG_TUN is not set 909# CONFIG_TUN is not set
910# CONFIG_VETH is not set
764# CONFIG_NET_SB1000 is not set 911# CONFIG_NET_SB1000 is not set
765# CONFIG_ARCNET is not set 912# CONFIG_ARCNET is not set
766# CONFIG_PHYLIB is not set 913# CONFIG_PHYLIB is not set
@@ -770,38 +917,40 @@ CONFIG_MII=y
770# CONFIG_SUNGEM is not set 917# CONFIG_SUNGEM is not set
771# CONFIG_CASSINI is not set 918# CONFIG_CASSINI is not set
772CONFIG_NET_VENDOR_3COM=y 919CONFIG_NET_VENDOR_3COM=y
773CONFIG_VORTEX=y 920# CONFIG_VORTEX is not set
774# CONFIG_TYPHOON is not set 921# CONFIG_TYPHOON is not set
775CONFIG_NET_TULIP=y 922CONFIG_NET_TULIP=y
776# CONFIG_DE2104X is not set 923# CONFIG_DE2104X is not set
777CONFIG_TULIP=y 924# CONFIG_TULIP is not set
778# CONFIG_TULIP_MWI is not set
779# CONFIG_TULIP_MMIO is not set
780# CONFIG_TULIP_NAPI is not set
781# CONFIG_DE4X5 is not set 925# CONFIG_DE4X5 is not set
782# CONFIG_WINBOND_840 is not set 926# CONFIG_WINBOND_840 is not set
783# CONFIG_DM9102 is not set 927# CONFIG_DM9102 is not set
784# CONFIG_ULI526X is not set 928# CONFIG_ULI526X is not set
929# CONFIG_PCMCIA_XIRCOM is not set
785# CONFIG_HP100 is not set 930# CONFIG_HP100 is not set
931# CONFIG_IBM_NEW_EMAC_ZMII is not set
932# CONFIG_IBM_NEW_EMAC_RGMII is not set
933# CONFIG_IBM_NEW_EMAC_TAH is not set
934# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
786CONFIG_NET_PCI=y 935CONFIG_NET_PCI=y
787# CONFIG_PCNET32 is not set 936# CONFIG_PCNET32 is not set
788# CONFIG_AMD8111_ETH is not set 937# CONFIG_AMD8111_ETH is not set
789# CONFIG_ADAPTEC_STARFIRE is not set 938# CONFIG_ADAPTEC_STARFIRE is not set
790CONFIG_B44=y 939# CONFIG_B44 is not set
791CONFIG_FORCEDETH=y 940CONFIG_FORCEDETH=y
792# CONFIG_FORCEDETH_NAPI is not set 941# CONFIG_FORCEDETH_NAPI is not set
793# CONFIG_DGRS is not set
794# CONFIG_EEPRO100 is not set 942# CONFIG_EEPRO100 is not set
795CONFIG_E100=y 943CONFIG_E100=y
796# CONFIG_FEALNX is not set 944# CONFIG_FEALNX is not set
797# CONFIG_NATSEMI is not set 945# CONFIG_NATSEMI is not set
798# CONFIG_NE2K_PCI is not set 946# CONFIG_NE2K_PCI is not set
799CONFIG_8139CP=y 947# CONFIG_8139CP is not set
800CONFIG_8139TOO=y 948CONFIG_8139TOO=y
801# CONFIG_8139TOO_PIO is not set 949CONFIG_8139TOO_PIO=y
802# CONFIG_8139TOO_TUNE_TWISTER is not set 950# CONFIG_8139TOO_TUNE_TWISTER is not set
803# CONFIG_8139TOO_8129 is not set 951# CONFIG_8139TOO_8129 is not set
804# CONFIG_8139_OLD_RX_RESET is not set 952# CONFIG_8139_OLD_RX_RESET is not set
953# CONFIG_R6040 is not set
805# CONFIG_SIS900 is not set 954# CONFIG_SIS900 is not set
806# CONFIG_EPIC100 is not set 955# CONFIG_EPIC100 is not set
807# CONFIG_SUNDANCE is not set 956# CONFIG_SUNDANCE is not set
@@ -814,34 +963,75 @@ CONFIG_NETDEV_1000=y
814CONFIG_E1000=y 963CONFIG_E1000=y
815# CONFIG_E1000_NAPI is not set 964# CONFIG_E1000_NAPI is not set
816# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set 965# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
966# CONFIG_E1000E is not set
967# CONFIG_E1000E_ENABLED is not set
968# CONFIG_IP1000 is not set
969# CONFIG_IGB is not set
817# CONFIG_NS83820 is not set 970# CONFIG_NS83820 is not set
818# CONFIG_HAMACHI is not set 971# CONFIG_HAMACHI is not set
819# CONFIG_YELLOWFIN is not set 972# CONFIG_YELLOWFIN is not set
820CONFIG_R8169=y 973# CONFIG_R8169 is not set
821# CONFIG_R8169_NAPI is not set
822# CONFIG_SIS190 is not set 974# CONFIG_SIS190 is not set
823# CONFIG_SKGE is not set 975# CONFIG_SKGE is not set
824CONFIG_SKY2=y 976CONFIG_SKY2=y
977# CONFIG_SKY2_DEBUG is not set
825# CONFIG_VIA_VELOCITY is not set 978# CONFIG_VIA_VELOCITY is not set
826CONFIG_TIGON3=y 979CONFIG_TIGON3=y
827CONFIG_BNX2=y 980# CONFIG_BNX2 is not set
828# CONFIG_QLA3XXX is not set 981# CONFIG_QLA3XXX is not set
829# CONFIG_ATL1 is not set 982# CONFIG_ATL1 is not set
830CONFIG_NETDEV_10000=y 983CONFIG_NETDEV_10000=y
831# CONFIG_CHELSIO_T1 is not set 984# CONFIG_CHELSIO_T1 is not set
832# CONFIG_CHELSIO_T3 is not set 985# CONFIG_CHELSIO_T3 is not set
986# CONFIG_IXGBE is not set
833# CONFIG_IXGB is not set 987# CONFIG_IXGB is not set
834# CONFIG_S2IO is not set 988# CONFIG_S2IO is not set
835# CONFIG_MYRI10GE is not set 989# CONFIG_MYRI10GE is not set
836# CONFIG_NETXEN_NIC is not set 990# CONFIG_NETXEN_NIC is not set
991# CONFIG_NIU is not set
837# CONFIG_MLX4_CORE is not set 992# CONFIG_MLX4_CORE is not set
838# CONFIG_TR is not set 993# CONFIG_TEHUTI is not set
994# CONFIG_BNX2X is not set
995# CONFIG_SFC is not set
996CONFIG_TR=y
997# CONFIG_IBMOL is not set
998# CONFIG_IBMLS is not set
999# CONFIG_3C359 is not set
1000# CONFIG_TMS380TR is not set
839 1001
840# 1002#
841# Wireless LAN 1003# Wireless LAN
842# 1004#
843# CONFIG_WLAN_PRE80211 is not set 1005# CONFIG_WLAN_PRE80211 is not set
844# CONFIG_WLAN_80211 is not set 1006CONFIG_WLAN_80211=y
1007# CONFIG_PCMCIA_RAYCS is not set
1008# CONFIG_IPW2100 is not set
1009# CONFIG_IPW2200 is not set
1010# CONFIG_LIBERTAS is not set
1011# CONFIG_AIRO is not set
1012# CONFIG_HERMES is not set
1013# CONFIG_ATMEL is not set
1014# CONFIG_AIRO_CS is not set
1015# CONFIG_PCMCIA_WL3501 is not set
1016# CONFIG_PRISM54 is not set
1017# CONFIG_USB_ZD1201 is not set
1018# CONFIG_USB_NET_RNDIS_WLAN is not set
1019# CONFIG_RTL8180 is not set
1020# CONFIG_RTL8187 is not set
1021# CONFIG_ADM8211 is not set
1022# CONFIG_P54_COMMON is not set
1023CONFIG_ATH5K=y
1024# CONFIG_ATH5K_DEBUG is not set
1025# CONFIG_IWLWIFI is not set
1026# CONFIG_IWLCORE is not set
1027# CONFIG_IWLWIFI_LEDS is not set
1028# CONFIG_IWL4965 is not set
1029# CONFIG_IWL3945 is not set
1030# CONFIG_HOSTAP is not set
1031# CONFIG_B43 is not set
1032# CONFIG_B43LEGACY is not set
1033# CONFIG_ZD1211RW is not set
1034# CONFIG_RT2X00 is not set
845 1035
846# 1036#
847# USB Network Adapters 1037# USB Network Adapters
@@ -850,16 +1040,27 @@ CONFIG_NETDEV_10000=y
850# CONFIG_USB_KAWETH is not set 1040# CONFIG_USB_KAWETH is not set
851# CONFIG_USB_PEGASUS is not set 1041# CONFIG_USB_PEGASUS is not set
852# CONFIG_USB_RTL8150 is not set 1042# CONFIG_USB_RTL8150 is not set
853# CONFIG_USB_USBNET_MII is not set
854# CONFIG_USB_USBNET is not set 1043# CONFIG_USB_USBNET is not set
1044CONFIG_NET_PCMCIA=y
1045# CONFIG_PCMCIA_3C589 is not set
1046# CONFIG_PCMCIA_3C574 is not set
1047# CONFIG_PCMCIA_FMVJ18X is not set
1048# CONFIG_PCMCIA_PCNET is not set
1049# CONFIG_PCMCIA_NMCLAN is not set
1050# CONFIG_PCMCIA_SMC91C92 is not set
1051# CONFIG_PCMCIA_XIRC2PS is not set
1052# CONFIG_PCMCIA_AXNET is not set
1053# CONFIG_PCMCIA_IBMTR is not set
855# CONFIG_WAN is not set 1054# CONFIG_WAN is not set
856# CONFIG_FDDI is not set 1055CONFIG_FDDI=y
1056# CONFIG_DEFXX is not set
1057# CONFIG_SKFP is not set
857# CONFIG_HIPPI is not set 1058# CONFIG_HIPPI is not set
858# CONFIG_PPP is not set 1059# CONFIG_PPP is not set
859# CONFIG_SLIP is not set 1060# CONFIG_SLIP is not set
860# CONFIG_NET_FC is not set 1061# CONFIG_NET_FC is not set
861# CONFIG_SHAPER is not set
862CONFIG_NETCONSOLE=y 1062CONFIG_NETCONSOLE=y
1063# CONFIG_NETCONSOLE_DYNAMIC is not set
863CONFIG_NETPOLL=y 1064CONFIG_NETPOLL=y
864# CONFIG_NETPOLL_TRAP is not set 1065# CONFIG_NETPOLL_TRAP is not set
865CONFIG_NET_POLL_CONTROLLER=y 1066CONFIG_NET_POLL_CONTROLLER=y
@@ -870,18 +1071,17 @@ CONFIG_NET_POLL_CONTROLLER=y
870# Input device support 1071# Input device support
871# 1072#
872CONFIG_INPUT=y 1073CONFIG_INPUT=y
873# CONFIG_INPUT_FF_MEMLESS is not set 1074CONFIG_INPUT_FF_MEMLESS=y
874# CONFIG_INPUT_POLLDEV is not set 1075CONFIG_INPUT_POLLDEV=y
875 1076
876# 1077#
877# Userland interfaces 1078# Userland interfaces
878# 1079#
879CONFIG_INPUT_MOUSEDEV=y 1080CONFIG_INPUT_MOUSEDEV=y
880CONFIG_INPUT_MOUSEDEV_PSAUX=y 1081# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
881CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 1082CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
882CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 1083CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
883# CONFIG_INPUT_JOYDEV is not set 1084# CONFIG_INPUT_JOYDEV is not set
884# CONFIG_INPUT_TSDEV is not set
885CONFIG_INPUT_EVDEV=y 1085CONFIG_INPUT_EVDEV=y
886# CONFIG_INPUT_EVBUG is not set 1086# CONFIG_INPUT_EVBUG is not set
887 1087
@@ -906,17 +1106,63 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y
906# CONFIG_MOUSE_SERIAL is not set 1106# CONFIG_MOUSE_SERIAL is not set
907# CONFIG_MOUSE_APPLETOUCH is not set 1107# CONFIG_MOUSE_APPLETOUCH is not set
908# CONFIG_MOUSE_VSXXXAA is not set 1108# CONFIG_MOUSE_VSXXXAA is not set
909# CONFIG_INPUT_JOYSTICK is not set 1109CONFIG_INPUT_JOYSTICK=y
910# CONFIG_INPUT_TABLET is not set 1110# CONFIG_JOYSTICK_ANALOG is not set
911# CONFIG_INPUT_TOUCHSCREEN is not set 1111# CONFIG_JOYSTICK_A3D is not set
912# CONFIG_INPUT_MISC is not set 1112# CONFIG_JOYSTICK_ADI is not set
1113# CONFIG_JOYSTICK_COBRA is not set
1114# CONFIG_JOYSTICK_GF2K is not set
1115# CONFIG_JOYSTICK_GRIP is not set
1116# CONFIG_JOYSTICK_GRIP_MP is not set
1117# CONFIG_JOYSTICK_GUILLEMOT is not set
1118# CONFIG_JOYSTICK_INTERACT is not set
1119# CONFIG_JOYSTICK_SIDEWINDER is not set
1120# CONFIG_JOYSTICK_TMDC is not set
1121# CONFIG_JOYSTICK_IFORCE is not set
1122# CONFIG_JOYSTICK_WARRIOR is not set
1123# CONFIG_JOYSTICK_MAGELLAN is not set
1124# CONFIG_JOYSTICK_SPACEORB is not set
1125# CONFIG_JOYSTICK_SPACEBALL is not set
1126# CONFIG_JOYSTICK_STINGER is not set
1127# CONFIG_JOYSTICK_TWIDJOY is not set
1128# CONFIG_JOYSTICK_ZHENHUA is not set
1129# CONFIG_JOYSTICK_JOYDUMP is not set
1130# CONFIG_JOYSTICK_XPAD is not set
1131CONFIG_INPUT_TABLET=y
1132# CONFIG_TABLET_USB_ACECAD is not set
1133# CONFIG_TABLET_USB_AIPTEK is not set
1134# CONFIG_TABLET_USB_GTCO is not set
1135# CONFIG_TABLET_USB_KBTAB is not set
1136# CONFIG_TABLET_USB_WACOM is not set
1137CONFIG_INPUT_TOUCHSCREEN=y
1138# CONFIG_TOUCHSCREEN_FUJITSU is not set
1139# CONFIG_TOUCHSCREEN_GUNZE is not set
1140# CONFIG_TOUCHSCREEN_ELO is not set
1141# CONFIG_TOUCHSCREEN_MTOUCH is not set
1142# CONFIG_TOUCHSCREEN_MK712 is not set
1143# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1144# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1145# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1146# CONFIG_TOUCHSCREEN_UCB1400 is not set
1147# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1148CONFIG_INPUT_MISC=y
1149# CONFIG_INPUT_PCSPKR is not set
1150# CONFIG_INPUT_APANEL is not set
1151# CONFIG_INPUT_WISTRON_BTNS is not set
1152# CONFIG_INPUT_ATLAS_BTNS is not set
1153# CONFIG_INPUT_ATI_REMOTE is not set
1154# CONFIG_INPUT_ATI_REMOTE2 is not set
1155# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1156# CONFIG_INPUT_POWERMATE is not set
1157# CONFIG_INPUT_YEALINK is not set
1158# CONFIG_INPUT_UINPUT is not set
913 1159
914# 1160#
915# Hardware I/O ports 1161# Hardware I/O ports
916# 1162#
917CONFIG_SERIO=y 1163CONFIG_SERIO=y
918CONFIG_SERIO_I8042=y 1164CONFIG_SERIO_I8042=y
919# CONFIG_SERIO_SERPORT is not set 1165CONFIG_SERIO_SERPORT=y
920# CONFIG_SERIO_CT82C710 is not set 1166# CONFIG_SERIO_CT82C710 is not set
921# CONFIG_SERIO_PCIPS2 is not set 1167# CONFIG_SERIO_PCIPS2 is not set
922CONFIG_SERIO_LIBPS2=y 1168CONFIG_SERIO_LIBPS2=y
@@ -929,8 +1175,26 @@ CONFIG_SERIO_LIBPS2=y
929CONFIG_VT=y 1175CONFIG_VT=y
930CONFIG_VT_CONSOLE=y 1176CONFIG_VT_CONSOLE=y
931CONFIG_HW_CONSOLE=y 1177CONFIG_HW_CONSOLE=y
932# CONFIG_VT_HW_CONSOLE_BINDING is not set 1178CONFIG_VT_HW_CONSOLE_BINDING=y
933# CONFIG_SERIAL_NONSTANDARD is not set 1179CONFIG_DEVKMEM=y
1180CONFIG_SERIAL_NONSTANDARD=y
1181# CONFIG_COMPUTONE is not set
1182# CONFIG_ROCKETPORT is not set
1183# CONFIG_CYCLADES is not set
1184# CONFIG_DIGIEPCA is not set
1185# CONFIG_MOXA_INTELLIO is not set
1186# CONFIG_MOXA_SMARTIO is not set
1187# CONFIG_ISI is not set
1188# CONFIG_SYNCLINK is not set
1189# CONFIG_SYNCLINKMP is not set
1190# CONFIG_SYNCLINK_GT is not set
1191# CONFIG_N_HDLC is not set
1192# CONFIG_RISCOM8 is not set
1193# CONFIG_SPECIALIX is not set
1194# CONFIG_SX is not set
1195# CONFIG_RIO is not set
1196# CONFIG_STALDRV is not set
1197# CONFIG_NOZOMI is not set
934 1198
935# 1199#
936# Serial drivers 1200# Serial drivers
@@ -940,9 +1204,14 @@ CONFIG_SERIAL_8250_CONSOLE=y
940CONFIG_FIX_EARLYCON_MEM=y 1204CONFIG_FIX_EARLYCON_MEM=y
941CONFIG_SERIAL_8250_PCI=y 1205CONFIG_SERIAL_8250_PCI=y
942CONFIG_SERIAL_8250_PNP=y 1206CONFIG_SERIAL_8250_PNP=y
943CONFIG_SERIAL_8250_NR_UARTS=4 1207# CONFIG_SERIAL_8250_CS is not set
1208CONFIG_SERIAL_8250_NR_UARTS=32
944CONFIG_SERIAL_8250_RUNTIME_UARTS=4 1209CONFIG_SERIAL_8250_RUNTIME_UARTS=4
945# CONFIG_SERIAL_8250_EXTENDED is not set 1210CONFIG_SERIAL_8250_EXTENDED=y
1211CONFIG_SERIAL_8250_MANY_PORTS=y
1212CONFIG_SERIAL_8250_SHARE_IRQ=y
1213CONFIG_SERIAL_8250_DETECT_IRQ=y
1214CONFIG_SERIAL_8250_RSA=y
946 1215
947# 1216#
948# Non-8250 serial port support 1217# Non-8250 serial port support
@@ -951,89 +1220,275 @@ CONFIG_SERIAL_CORE=y
951CONFIG_SERIAL_CORE_CONSOLE=y 1220CONFIG_SERIAL_CORE_CONSOLE=y
952# CONFIG_SERIAL_JSM is not set 1221# CONFIG_SERIAL_JSM is not set
953CONFIG_UNIX98_PTYS=y 1222CONFIG_UNIX98_PTYS=y
954CONFIG_LEGACY_PTYS=y 1223# CONFIG_LEGACY_PTYS is not set
955CONFIG_LEGACY_PTY_COUNT=256
956# CONFIG_IPMI_HANDLER is not set 1224# CONFIG_IPMI_HANDLER is not set
957# CONFIG_WATCHDOG is not set
958CONFIG_HW_RANDOM=y 1225CONFIG_HW_RANDOM=y
959CONFIG_HW_RANDOM_INTEL=y 1226# CONFIG_HW_RANDOM_INTEL is not set
960CONFIG_HW_RANDOM_AMD=y 1227# CONFIG_HW_RANDOM_AMD is not set
961CONFIG_HW_RANDOM_GEODE=y 1228CONFIG_HW_RANDOM_GEODE=y
962CONFIG_HW_RANDOM_VIA=y 1229CONFIG_HW_RANDOM_VIA=y
963# CONFIG_NVRAM is not set 1230CONFIG_NVRAM=y
964CONFIG_RTC=y
965# CONFIG_R3964 is not set 1231# CONFIG_R3964 is not set
966# CONFIG_APPLICOM is not set 1232# CONFIG_APPLICOM is not set
967# CONFIG_SONYPI is not set 1233# CONFIG_SONYPI is not set
968CONFIG_AGP=y 1234
969# CONFIG_AGP_ALI is not set 1235#
970# CONFIG_AGP_ATI is not set 1236# PCMCIA character devices
971# CONFIG_AGP_AMD is not set 1237#
972CONFIG_AGP_AMD64=y 1238# CONFIG_SYNCLINK_CS is not set
973CONFIG_AGP_INTEL=y 1239# CONFIG_CARDMAN_4000 is not set
974# CONFIG_AGP_NVIDIA is not set 1240# CONFIG_CARDMAN_4040 is not set
975# CONFIG_AGP_SIS is not set 1241# CONFIG_IPWIRELESS is not set
976# CONFIG_AGP_SWORKS is not set
977# CONFIG_AGP_VIA is not set
978# CONFIG_AGP_EFFICEON is not set
979# CONFIG_DRM is not set
980# CONFIG_MWAVE is not set 1242# CONFIG_MWAVE is not set
981# CONFIG_PC8736x_GPIO is not set 1243# CONFIG_PC8736x_GPIO is not set
982# CONFIG_NSC_GPIO is not set 1244# CONFIG_NSC_GPIO is not set
983# CONFIG_CS5535_GPIO is not set 1245# CONFIG_CS5535_GPIO is not set
984CONFIG_RAW_DRIVER=y 1246# CONFIG_RAW_DRIVER is not set
985CONFIG_MAX_RAW_DEVS=256
986CONFIG_HPET=y 1247CONFIG_HPET=y
987# CONFIG_HPET_RTC_IRQ is not set 1248# CONFIG_HPET_RTC_IRQ is not set
988CONFIG_HPET_MMAP=y 1249# CONFIG_HPET_MMAP is not set
989# CONFIG_HANGCHECK_TIMER is not set 1250# CONFIG_HANGCHECK_TIMER is not set
990# CONFIG_TCG_TPM is not set 1251# CONFIG_TCG_TPM is not set
991# CONFIG_TELCLOCK is not set 1252# CONFIG_TELCLOCK is not set
992CONFIG_DEVPORT=y 1253CONFIG_DEVPORT=y
993# CONFIG_I2C is not set 1254CONFIG_I2C=y
994 1255CONFIG_I2C_BOARDINFO=y
995# 1256# CONFIG_I2C_CHARDEV is not set
996# SPI support 1257
997# 1258#
1259# I2C Hardware Bus support
1260#
1261# CONFIG_I2C_ALI1535 is not set
1262# CONFIG_I2C_ALI1563 is not set
1263# CONFIG_I2C_ALI15X3 is not set
1264# CONFIG_I2C_AMD756 is not set
1265# CONFIG_I2C_AMD8111 is not set
1266CONFIG_I2C_I801=y
1267# CONFIG_I2C_I810 is not set
1268# CONFIG_I2C_PIIX4 is not set
1269# CONFIG_I2C_NFORCE2 is not set
1270# CONFIG_I2C_OCORES is not set
1271# CONFIG_I2C_PARPORT_LIGHT is not set
1272# CONFIG_I2C_PROSAVAGE is not set
1273# CONFIG_I2C_SAVAGE4 is not set
1274# CONFIG_I2C_SIMTEC is not set
1275# CONFIG_SCx200_ACB is not set
1276# CONFIG_I2C_SIS5595 is not set
1277# CONFIG_I2C_SIS630 is not set
1278# CONFIG_I2C_SIS96X is not set
1279# CONFIG_I2C_TAOS_EVM is not set
1280# CONFIG_I2C_STUB is not set
1281# CONFIG_I2C_TINY_USB is not set
1282# CONFIG_I2C_VIA is not set
1283# CONFIG_I2C_VIAPRO is not set
1284# CONFIG_I2C_VOODOO3 is not set
1285# CONFIG_I2C_PCA_PLATFORM is not set
1286
1287#
1288# Miscellaneous I2C Chip support
1289#
1290# CONFIG_DS1682 is not set
1291# CONFIG_SENSORS_EEPROM is not set
1292# CONFIG_SENSORS_PCF8574 is not set
1293# CONFIG_PCF8575 is not set
1294# CONFIG_SENSORS_PCF8591 is not set
1295# CONFIG_SENSORS_MAX6875 is not set
1296# CONFIG_SENSORS_TSL2550 is not set
1297# CONFIG_I2C_DEBUG_CORE is not set
1298# CONFIG_I2C_DEBUG_ALGO is not set
1299# CONFIG_I2C_DEBUG_BUS is not set
1300# CONFIG_I2C_DEBUG_CHIP is not set
998# CONFIG_SPI is not set 1301# CONFIG_SPI is not set
999# CONFIG_SPI_MASTER is not set
1000# CONFIG_W1 is not set 1302# CONFIG_W1 is not set
1001# CONFIG_POWER_SUPPLY is not set 1303CONFIG_POWER_SUPPLY=y
1304# CONFIG_POWER_SUPPLY_DEBUG is not set
1305# CONFIG_PDA_POWER is not set
1306# CONFIG_BATTERY_DS2760 is not set
1002# CONFIG_HWMON is not set 1307# CONFIG_HWMON is not set
1308CONFIG_THERMAL=y
1309CONFIG_WATCHDOG=y
1310# CONFIG_WATCHDOG_NOWAYOUT is not set
1311
1312#
1313# Watchdog Device Drivers
1314#
1315# CONFIG_SOFT_WATCHDOG is not set
1316# CONFIG_ACQUIRE_WDT is not set
1317# CONFIG_ADVANTECH_WDT is not set
1318# CONFIG_ALIM1535_WDT is not set
1319# CONFIG_ALIM7101_WDT is not set
1320# CONFIG_SC520_WDT is not set
1321# CONFIG_EUROTECH_WDT is not set
1322# CONFIG_IB700_WDT is not set
1323# CONFIG_IBMASR is not set
1324# CONFIG_WAFER_WDT is not set
1325# CONFIG_I6300ESB_WDT is not set
1326# CONFIG_ITCO_WDT is not set
1327# CONFIG_IT8712F_WDT is not set
1328# CONFIG_HP_WATCHDOG is not set
1329# CONFIG_SC1200_WDT is not set
1330# CONFIG_PC87413_WDT is not set
1331# CONFIG_60XX_WDT is not set
1332# CONFIG_SBC8360_WDT is not set
1333# CONFIG_SBC7240_WDT is not set
1334# CONFIG_CPU5_WDT is not set
1335# CONFIG_SMSC37B787_WDT is not set
1336# CONFIG_W83627HF_WDT is not set
1337# CONFIG_W83697HF_WDT is not set
1338# CONFIG_W83877F_WDT is not set
1339# CONFIG_W83977F_WDT is not set
1340# CONFIG_MACHZ_WDT is not set
1341# CONFIG_SBC_EPX_C3_WATCHDOG is not set
1342
1343#
1344# PCI-based Watchdog Cards
1345#
1346# CONFIG_PCIPCWATCHDOG is not set
1347# CONFIG_WDTPCI is not set
1348
1349#
1350# USB-based Watchdog Cards
1351#
1352# CONFIG_USBPCWATCHDOG is not set
1353
1354#
1355# Sonics Silicon Backplane
1356#
1357CONFIG_SSB_POSSIBLE=y
1358# CONFIG_SSB is not set
1003 1359
1004# 1360#
1005# Multifunction device drivers 1361# Multifunction device drivers
1006# 1362#
1007# CONFIG_MFD_SM501 is not set 1363# CONFIG_MFD_SM501 is not set
1364# CONFIG_HTC_PASIC3 is not set
1008 1365
1009# 1366#
1010# Multimedia devices 1367# Multimedia devices
1011# 1368#
1369
1370#
1371# Multimedia core support
1372#
1012# CONFIG_VIDEO_DEV is not set 1373# CONFIG_VIDEO_DEV is not set
1013# CONFIG_DVB_CORE is not set 1374# CONFIG_DVB_CORE is not set
1375
1376#
1377# Multimedia drivers
1378#
1014CONFIG_DAB=y 1379CONFIG_DAB=y
1015# CONFIG_USB_DABUSB is not set 1380# CONFIG_USB_DABUSB is not set
1016 1381
1017# 1382#
1018# Graphics support 1383# Graphics support
1019# 1384#
1020# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 1385CONFIG_AGP=y
1386# CONFIG_AGP_ALI is not set
1387# CONFIG_AGP_ATI is not set
1388# CONFIG_AGP_AMD is not set
1389CONFIG_AGP_AMD64=y
1390CONFIG_AGP_INTEL=y
1391# CONFIG_AGP_NVIDIA is not set
1392# CONFIG_AGP_SIS is not set
1393# CONFIG_AGP_SWORKS is not set
1394# CONFIG_AGP_VIA is not set
1395# CONFIG_AGP_EFFICEON is not set
1396CONFIG_DRM=y
1397# CONFIG_DRM_TDFX is not set
1398# CONFIG_DRM_R128 is not set
1399# CONFIG_DRM_RADEON is not set
1400# CONFIG_DRM_I810 is not set
1401# CONFIG_DRM_I830 is not set
1402CONFIG_DRM_I915=y
1403# CONFIG_DRM_MGA is not set
1404# CONFIG_DRM_SIS is not set
1405# CONFIG_DRM_VIA is not set
1406# CONFIG_DRM_SAVAGE is not set
1407# CONFIG_VGASTATE is not set
1408# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1409CONFIG_FB=y
1410# CONFIG_FIRMWARE_EDID is not set
1411# CONFIG_FB_DDC is not set
1412CONFIG_FB_CFB_FILLRECT=y
1413CONFIG_FB_CFB_COPYAREA=y
1414CONFIG_FB_CFB_IMAGEBLIT=y
1415# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1416# CONFIG_FB_SYS_FILLRECT is not set
1417# CONFIG_FB_SYS_COPYAREA is not set
1418# CONFIG_FB_SYS_IMAGEBLIT is not set
1419# CONFIG_FB_FOREIGN_ENDIAN is not set
1420# CONFIG_FB_SYS_FOPS is not set
1421CONFIG_FB_DEFERRED_IO=y
1422# CONFIG_FB_SVGALIB is not set
1423# CONFIG_FB_MACMODES is not set
1424# CONFIG_FB_BACKLIGHT is not set
1425CONFIG_FB_MODE_HELPERS=y
1426CONFIG_FB_TILEBLITTING=y
1427
1428#
1429# Frame buffer hardware drivers
1430#
1431# CONFIG_FB_CIRRUS is not set
1432# CONFIG_FB_PM2 is not set
1433# CONFIG_FB_CYBER2000 is not set
1434# CONFIG_FB_ARC is not set
1435# CONFIG_FB_ASILIANT is not set
1436# CONFIG_FB_IMSTT is not set
1437# CONFIG_FB_VGA16 is not set
1438# CONFIG_FB_UVESA is not set
1439# CONFIG_FB_VESA is not set
1440CONFIG_FB_EFI=y
1441# CONFIG_FB_IMAC is not set
1442# CONFIG_FB_N411 is not set
1443# CONFIG_FB_HGA is not set
1444# CONFIG_FB_S1D13XXX is not set
1445# CONFIG_FB_NVIDIA is not set
1446# CONFIG_FB_RIVA is not set
1447# CONFIG_FB_I810 is not set
1448# CONFIG_FB_LE80578 is not set
1449# CONFIG_FB_INTEL is not set
1450# CONFIG_FB_MATROX is not set
1451# CONFIG_FB_RADEON is not set
1452# CONFIG_FB_ATY128 is not set
1453# CONFIG_FB_ATY is not set
1454# CONFIG_FB_S3 is not set
1455# CONFIG_FB_SAVAGE is not set
1456# CONFIG_FB_SIS is not set
1457# CONFIG_FB_NEOMAGIC is not set
1458# CONFIG_FB_KYRO is not set
1459# CONFIG_FB_3DFX is not set
1460# CONFIG_FB_VOODOO1 is not set
1461# CONFIG_FB_VT8623 is not set
1462# CONFIG_FB_CYBLA is not set
1463# CONFIG_FB_TRIDENT is not set
1464# CONFIG_FB_ARK is not set
1465# CONFIG_FB_PM3 is not set
1466# CONFIG_FB_GEODE is not set
1467# CONFIG_FB_VIRTUAL is not set
1468CONFIG_BACKLIGHT_LCD_SUPPORT=y
1469# CONFIG_LCD_CLASS_DEVICE is not set
1470CONFIG_BACKLIGHT_CLASS_DEVICE=y
1471# CONFIG_BACKLIGHT_CORGI is not set
1472# CONFIG_BACKLIGHT_PROGEAR is not set
1021 1473
1022# 1474#
1023# Display device support 1475# Display device support
1024# 1476#
1025# CONFIG_DISPLAY_SUPPORT is not set 1477# CONFIG_DISPLAY_SUPPORT is not set
1026# CONFIG_VGASTATE is not set
1027# CONFIG_FB is not set
1028 1478
1029# 1479#
1030# Console display driver support 1480# Console display driver support
1031# 1481#
1032CONFIG_VGA_CONSOLE=y 1482CONFIG_VGA_CONSOLE=y
1033CONFIG_VGACON_SOFT_SCROLLBACK=y 1483CONFIG_VGACON_SOFT_SCROLLBACK=y
1034CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=128 1484CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64
1035CONFIG_VIDEO_SELECT=y 1485CONFIG_VIDEO_SELECT=y
1036CONFIG_DUMMY_CONSOLE=y 1486CONFIG_DUMMY_CONSOLE=y
1487# CONFIG_FRAMEBUFFER_CONSOLE is not set
1488CONFIG_LOGO=y
1489# CONFIG_LOGO_LINUX_MONO is not set
1490# CONFIG_LOGO_LINUX_VGA16 is not set
1491CONFIG_LOGO_LINUX_CLUT224=y
1037 1492
1038# 1493#
1039# Sound 1494# Sound
@@ -1043,33 +1498,167 @@ CONFIG_SOUND=y
1043# 1498#
1044# Advanced Linux Sound Architecture 1499# Advanced Linux Sound Architecture
1045# 1500#
1046# CONFIG_SND is not set 1501CONFIG_SND=y
1502CONFIG_SND_TIMER=y
1503CONFIG_SND_PCM=y
1504CONFIG_SND_HWDEP=y
1505CONFIG_SND_SEQUENCER=y
1506CONFIG_SND_SEQ_DUMMY=y
1507CONFIG_SND_OSSEMUL=y
1508CONFIG_SND_MIXER_OSS=y
1509CONFIG_SND_PCM_OSS=y
1510CONFIG_SND_PCM_OSS_PLUGINS=y
1511CONFIG_SND_SEQUENCER_OSS=y
1512CONFIG_SND_DYNAMIC_MINORS=y
1513CONFIG_SND_SUPPORT_OLD_API=y
1514CONFIG_SND_VERBOSE_PROCFS=y
1515# CONFIG_SND_VERBOSE_PRINTK is not set
1516# CONFIG_SND_DEBUG is not set
1517CONFIG_SND_VMASTER=y
1518
1519#
1520# Generic devices
1521#
1522# CONFIG_SND_PCSP is not set
1523# CONFIG_SND_DUMMY is not set
1524# CONFIG_SND_VIRMIDI is not set
1525# CONFIG_SND_MTPAV is not set
1526# CONFIG_SND_SERIAL_U16550 is not set
1527# CONFIG_SND_MPU401 is not set
1528
1529#
1530# PCI devices
1531#
1532# CONFIG_SND_AD1889 is not set
1533# CONFIG_SND_ALS300 is not set
1534# CONFIG_SND_ALS4000 is not set
1535# CONFIG_SND_ALI5451 is not set
1536# CONFIG_SND_ATIIXP is not set
1537# CONFIG_SND_ATIIXP_MODEM is not set
1538# CONFIG_SND_AU8810 is not set
1539# CONFIG_SND_AU8820 is not set
1540# CONFIG_SND_AU8830 is not set
1541# CONFIG_SND_AW2 is not set
1542# CONFIG_SND_AZT3328 is not set
1543# CONFIG_SND_BT87X is not set
1544# CONFIG_SND_CA0106 is not set
1545# CONFIG_SND_CMIPCI is not set
1546# CONFIG_SND_OXYGEN is not set
1547# CONFIG_SND_CS4281 is not set
1548# CONFIG_SND_CS46XX is not set
1549# CONFIG_SND_CS5530 is not set
1550# CONFIG_SND_CS5535AUDIO is not set
1551# CONFIG_SND_DARLA20 is not set
1552# CONFIG_SND_GINA20 is not set
1553# CONFIG_SND_LAYLA20 is not set
1554# CONFIG_SND_DARLA24 is not set
1555# CONFIG_SND_GINA24 is not set
1556# CONFIG_SND_LAYLA24 is not set
1557# CONFIG_SND_MONA is not set
1558# CONFIG_SND_MIA is not set
1559# CONFIG_SND_ECHO3G is not set
1560# CONFIG_SND_INDIGO is not set
1561# CONFIG_SND_INDIGOIO is not set
1562# CONFIG_SND_INDIGODJ is not set
1563# CONFIG_SND_EMU10K1 is not set
1564# CONFIG_SND_EMU10K1X is not set
1565# CONFIG_SND_ENS1370 is not set
1566# CONFIG_SND_ENS1371 is not set
1567# CONFIG_SND_ES1938 is not set
1568# CONFIG_SND_ES1968 is not set
1569# CONFIG_SND_FM801 is not set
1570CONFIG_SND_HDA_INTEL=y
1571CONFIG_SND_HDA_HWDEP=y
1572CONFIG_SND_HDA_CODEC_REALTEK=y
1573CONFIG_SND_HDA_CODEC_ANALOG=y
1574CONFIG_SND_HDA_CODEC_SIGMATEL=y
1575CONFIG_SND_HDA_CODEC_VIA=y
1576CONFIG_SND_HDA_CODEC_ATIHDMI=y
1577CONFIG_SND_HDA_CODEC_CONEXANT=y
1578CONFIG_SND_HDA_CODEC_CMEDIA=y
1579CONFIG_SND_HDA_CODEC_SI3054=y
1580CONFIG_SND_HDA_GENERIC=y
1581# CONFIG_SND_HDA_POWER_SAVE is not set
1582# CONFIG_SND_HDSP is not set
1583# CONFIG_SND_HDSPM is not set
1584# CONFIG_SND_HIFIER is not set
1585# CONFIG_SND_ICE1712 is not set
1586# CONFIG_SND_ICE1724 is not set
1587# CONFIG_SND_INTEL8X0 is not set
1588# CONFIG_SND_INTEL8X0M is not set
1589# CONFIG_SND_KORG1212 is not set
1590# CONFIG_SND_MAESTRO3 is not set
1591# CONFIG_SND_MIXART is not set
1592# CONFIG_SND_NM256 is not set
1593# CONFIG_SND_PCXHR is not set
1594# CONFIG_SND_RIPTIDE is not set
1595# CONFIG_SND_RME32 is not set
1596# CONFIG_SND_RME96 is not set
1597# CONFIG_SND_RME9652 is not set
1598# CONFIG_SND_SIS7019 is not set
1599# CONFIG_SND_SONICVIBES is not set
1600# CONFIG_SND_TRIDENT is not set
1601# CONFIG_SND_VIA82XX is not set
1602# CONFIG_SND_VIA82XX_MODEM is not set
1603# CONFIG_SND_VIRTUOSO is not set
1604# CONFIG_SND_VX222 is not set
1605# CONFIG_SND_YMFPCI is not set
1606
1607#
1608# USB devices
1609#
1610# CONFIG_SND_USB_AUDIO is not set
1611# CONFIG_SND_USB_USX2Y is not set
1612# CONFIG_SND_USB_CAIAQ is not set
1613
1614#
1615# PCMCIA devices
1616#
1617# CONFIG_SND_VXPOCKET is not set
1618# CONFIG_SND_PDAUDIOCF is not set
1619
1620#
1621# System on Chip audio support
1622#
1623# CONFIG_SND_SOC is not set
1624
1625#
1626# ALSA SoC audio for Freescale SOCs
1627#
1628
1629#
1630# SoC Audio for the Texas Instruments OMAP
1631#
1047 1632
1048# 1633#
1049# Open Sound System 1634# Open Sound System
1050# 1635#
1051CONFIG_SOUND_PRIME=y 1636# CONFIG_SOUND_PRIME is not set
1052# CONFIG_SOUND_TRIDENT is not set
1053# CONFIG_SOUND_MSNDCLAS is not set
1054# CONFIG_SOUND_MSNDPIN is not set
1055# CONFIG_SOUND_OSS is not set
1056CONFIG_HID_SUPPORT=y 1637CONFIG_HID_SUPPORT=y
1057CONFIG_HID=y 1638CONFIG_HID=y
1058# CONFIG_HID_DEBUG is not set 1639CONFIG_HID_DEBUG=y
1640CONFIG_HIDRAW=y
1059 1641
1060# 1642#
1061# USB Input Devices 1643# USB Input Devices
1062# 1644#
1063CONFIG_USB_HID=y 1645CONFIG_USB_HID=y
1064# CONFIG_USB_HIDINPUT_POWERBOOK is not set 1646CONFIG_USB_HIDINPUT_POWERBOOK=y
1065# CONFIG_HID_FF is not set 1647CONFIG_HID_FF=y
1066# CONFIG_USB_HIDDEV is not set 1648CONFIG_HID_PID=y
1649CONFIG_LOGITECH_FF=y
1650# CONFIG_LOGIRUMBLEPAD2_FF is not set
1651CONFIG_PANTHERLORD_FF=y
1652CONFIG_THRUSTMASTER_FF=y
1653CONFIG_ZEROPLUS_FF=y
1654CONFIG_USB_HIDDEV=y
1067CONFIG_USB_SUPPORT=y 1655CONFIG_USB_SUPPORT=y
1068CONFIG_USB_ARCH_HAS_HCD=y 1656CONFIG_USB_ARCH_HAS_HCD=y
1069CONFIG_USB_ARCH_HAS_OHCI=y 1657CONFIG_USB_ARCH_HAS_OHCI=y
1070CONFIG_USB_ARCH_HAS_EHCI=y 1658CONFIG_USB_ARCH_HAS_EHCI=y
1071CONFIG_USB=y 1659CONFIG_USB=y
1072# CONFIG_USB_DEBUG is not set 1660CONFIG_USB_DEBUG=y
1661CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
1073 1662
1074# 1663#
1075# Miscellaneous USB options 1664# Miscellaneous USB options
@@ -1077,18 +1666,18 @@ CONFIG_USB=y
1077CONFIG_USB_DEVICEFS=y 1666CONFIG_USB_DEVICEFS=y
1078# CONFIG_USB_DEVICE_CLASS is not set 1667# CONFIG_USB_DEVICE_CLASS is not set
1079# CONFIG_USB_DYNAMIC_MINORS is not set 1668# CONFIG_USB_DYNAMIC_MINORS is not set
1080# CONFIG_USB_SUSPEND is not set 1669CONFIG_USB_SUSPEND=y
1081# CONFIG_USB_PERSIST is not set
1082# CONFIG_USB_OTG is not set 1670# CONFIG_USB_OTG is not set
1083 1671
1084# 1672#
1085# USB Host Controller Drivers 1673# USB Host Controller Drivers
1086# 1674#
1675# CONFIG_USB_C67X00_HCD is not set
1087CONFIG_USB_EHCI_HCD=y 1676CONFIG_USB_EHCI_HCD=y
1088# CONFIG_USB_EHCI_SPLIT_ISO is not set
1089# CONFIG_USB_EHCI_ROOT_HUB_TT is not set 1677# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1090# CONFIG_USB_EHCI_TT_NEWSCHED is not set 1678# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1091# CONFIG_USB_ISP116X_HCD is not set 1679# CONFIG_USB_ISP116X_HCD is not set
1680# CONFIG_USB_ISP1760_HCD is not set
1092CONFIG_USB_OHCI_HCD=y 1681CONFIG_USB_OHCI_HCD=y
1093# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 1682# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1094# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set 1683# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1121,8 +1710,10 @@ CONFIG_USB_STORAGE=y
1121# CONFIG_USB_STORAGE_SDDR55 is not set 1710# CONFIG_USB_STORAGE_SDDR55 is not set
1122# CONFIG_USB_STORAGE_JUMPSHOT is not set 1711# CONFIG_USB_STORAGE_JUMPSHOT is not set
1123# CONFIG_USB_STORAGE_ALAUDA is not set 1712# CONFIG_USB_STORAGE_ALAUDA is not set
1713# CONFIG_USB_STORAGE_ONETOUCH is not set
1124# CONFIG_USB_STORAGE_KARMA is not set 1714# CONFIG_USB_STORAGE_KARMA is not set
1125# CONFIG_USB_LIBUSUAL is not set 1715# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1716CONFIG_USB_LIBUSUAL=y
1126 1717
1127# 1718#
1128# USB Imaging devices 1719# USB Imaging devices
@@ -1134,10 +1725,6 @@ CONFIG_USB_MON=y
1134# 1725#
1135# USB port drivers 1726# USB port drivers
1136# 1727#
1137
1138#
1139# USB Serial Converter support
1140#
1141# CONFIG_USB_SERIAL is not set 1728# CONFIG_USB_SERIAL is not set
1142 1729
1143# 1730#
@@ -1163,90 +1750,125 @@ CONFIG_USB_MON=y
1163# CONFIG_USB_TRANCEVIBRATOR is not set 1750# CONFIG_USB_TRANCEVIBRATOR is not set
1164# CONFIG_USB_IOWARRIOR is not set 1751# CONFIG_USB_IOWARRIOR is not set
1165# CONFIG_USB_TEST is not set 1752# CONFIG_USB_TEST is not set
1753# CONFIG_USB_GADGET is not set
1754# CONFIG_MMC is not set
1755# CONFIG_MEMSTICK is not set
1756CONFIG_NEW_LEDS=y
1757CONFIG_LEDS_CLASS=y
1166 1758
1167# 1759#
1168# USB DSL modem support 1760# LED drivers
1169# 1761#
1762# CONFIG_LEDS_CLEVO_MAIL is not set
1170 1763
1171# 1764#
1172# USB Gadget Support 1765# LED Triggers
1173# 1766#
1174# CONFIG_USB_GADGET is not set 1767CONFIG_LEDS_TRIGGERS=y
1175# CONFIG_MMC is not set 1768# CONFIG_LEDS_TRIGGER_TIMER is not set
1769# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1770# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1771# CONFIG_ACCESSIBILITY is not set
1772# CONFIG_INFINIBAND is not set
1773CONFIG_EDAC=y
1176 1774
1177# 1775#
1178# LED devices 1776# Reporting subsystems
1179# 1777#
1180# CONFIG_NEW_LEDS is not set 1778# CONFIG_EDAC_DEBUG is not set
1779# CONFIG_EDAC_MM_EDAC is not set
1780CONFIG_RTC_LIB=y
1781CONFIG_RTC_CLASS=y
1782# CONFIG_RTC_HCTOSYS is not set
1783# CONFIG_RTC_DEBUG is not set
1181 1784
1182# 1785#
1183# LED drivers 1786# RTC interfaces
1184# 1787#
1788CONFIG_RTC_INTF_SYSFS=y
1789CONFIG_RTC_INTF_PROC=y
1790CONFIG_RTC_INTF_DEV=y
1791# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1792# CONFIG_RTC_DRV_TEST is not set
1185 1793
1186# 1794#
1187# LED Triggers 1795# I2C RTC drivers
1188# 1796#
1189# CONFIG_INFINIBAND is not set 1797# CONFIG_RTC_DRV_DS1307 is not set
1190# CONFIG_EDAC is not set 1798# CONFIG_RTC_DRV_DS1374 is not set
1799# CONFIG_RTC_DRV_DS1672 is not set
1800# CONFIG_RTC_DRV_MAX6900 is not set
1801# CONFIG_RTC_DRV_RS5C372 is not set
1802# CONFIG_RTC_DRV_ISL1208 is not set
1803# CONFIG_RTC_DRV_X1205 is not set
1804# CONFIG_RTC_DRV_PCF8563 is not set
1805# CONFIG_RTC_DRV_PCF8583 is not set
1806# CONFIG_RTC_DRV_M41T80 is not set
1807# CONFIG_RTC_DRV_S35390A is not set
1191 1808
1192# 1809#
1193# Real Time Clock 1810# SPI RTC drivers
1194# 1811#
1195# CONFIG_RTC_CLASS is not set
1196 1812
1197# 1813#
1198# DMA Engine support 1814# Platform RTC drivers
1199# 1815#
1200# CONFIG_DMA_ENGINE is not set 1816CONFIG_RTC_DRV_CMOS=y
1817# CONFIG_RTC_DRV_DS1511 is not set
1818# CONFIG_RTC_DRV_DS1553 is not set
1819# CONFIG_RTC_DRV_DS1742 is not set
1820# CONFIG_RTC_DRV_STK17TA8 is not set
1821# CONFIG_RTC_DRV_M48T86 is not set
1822# CONFIG_RTC_DRV_M48T59 is not set
1823# CONFIG_RTC_DRV_V3020 is not set
1201 1824
1202# 1825#
1203# DMA Clients 1826# on-CPU RTC drivers
1204# 1827#
1828CONFIG_DMADEVICES=y
1205 1829
1206# 1830#
1207# DMA Devices 1831# DMA Devices
1208# 1832#
1209CONFIG_VIRTUALIZATION=y 1833# CONFIG_INTEL_IOATDMA is not set
1210# CONFIG_KVM is not set 1834# CONFIG_UIO is not set
1211 1835
1212# 1836#
1213# Userspace I/O 1837# Firmware Drivers
1214# 1838#
1215# CONFIG_UIO is not set 1839# CONFIG_EDD is not set
1840CONFIG_EFI_VARS=y
1841# CONFIG_DELL_RBU is not set
1842# CONFIG_DCDBAS is not set
1843CONFIG_DMIID=y
1844# CONFIG_ISCSI_IBFT_FIND is not set
1216 1845
1217# 1846#
1218# File systems 1847# File systems
1219# 1848#
1220CONFIG_EXT2_FS=y 1849# CONFIG_EXT2_FS is not set
1221CONFIG_EXT2_FS_XATTR=y
1222CONFIG_EXT2_FS_POSIX_ACL=y
1223# CONFIG_EXT2_FS_SECURITY is not set
1224# CONFIG_EXT2_FS_XIP is not set
1225CONFIG_EXT3_FS=y 1850CONFIG_EXT3_FS=y
1226CONFIG_EXT3_FS_XATTR=y 1851CONFIG_EXT3_FS_XATTR=y
1227CONFIG_EXT3_FS_POSIX_ACL=y 1852CONFIG_EXT3_FS_POSIX_ACL=y
1228# CONFIG_EXT3_FS_SECURITY is not set 1853CONFIG_EXT3_FS_SECURITY=y
1229# CONFIG_EXT4DEV_FS is not set 1854# CONFIG_EXT4DEV_FS is not set
1230CONFIG_JBD=y 1855CONFIG_JBD=y
1231# CONFIG_JBD_DEBUG is not set 1856# CONFIG_JBD_DEBUG is not set
1232CONFIG_FS_MBCACHE=y 1857CONFIG_FS_MBCACHE=y
1233CONFIG_REISERFS_FS=y 1858# CONFIG_REISERFS_FS is not set
1234# CONFIG_REISERFS_CHECK is not set
1235# CONFIG_REISERFS_PROC_INFO is not set
1236CONFIG_REISERFS_FS_XATTR=y
1237CONFIG_REISERFS_FS_POSIX_ACL=y
1238# CONFIG_REISERFS_FS_SECURITY is not set
1239# CONFIG_JFS_FS is not set 1859# CONFIG_JFS_FS is not set
1240CONFIG_FS_POSIX_ACL=y 1860CONFIG_FS_POSIX_ACL=y
1241# CONFIG_XFS_FS is not set 1861# CONFIG_XFS_FS is not set
1242# CONFIG_GFS2_FS is not set
1243# CONFIG_OCFS2_FS is not set 1862# CONFIG_OCFS2_FS is not set
1244# CONFIG_MINIX_FS is not set 1863CONFIG_DNOTIFY=y
1245# CONFIG_ROMFS_FS is not set
1246CONFIG_INOTIFY=y 1864CONFIG_INOTIFY=y
1247CONFIG_INOTIFY_USER=y 1865CONFIG_INOTIFY_USER=y
1248# CONFIG_QUOTA is not set 1866CONFIG_QUOTA=y
1249CONFIG_DNOTIFY=y 1867CONFIG_QUOTA_NETLINK_INTERFACE=y
1868# CONFIG_PRINT_QUOTA_WARNING is not set
1869# CONFIG_QFMT_V1 is not set
1870CONFIG_QFMT_V2=y
1871CONFIG_QUOTACTL=y
1250# CONFIG_AUTOFS_FS is not set 1872# CONFIG_AUTOFS_FS is not set
1251CONFIG_AUTOFS4_FS=y 1873CONFIG_AUTOFS4_FS=y
1252# CONFIG_FUSE_FS is not set 1874# CONFIG_FUSE_FS is not set
@@ -1256,8 +1878,8 @@ CONFIG_GENERIC_ACL=y
1256# CD-ROM/DVD Filesystems 1878# CD-ROM/DVD Filesystems
1257# 1879#
1258CONFIG_ISO9660_FS=y 1880CONFIG_ISO9660_FS=y
1259# CONFIG_JOLIET is not set 1881CONFIG_JOLIET=y
1260# CONFIG_ZISOFS is not set 1882CONFIG_ZISOFS=y
1261# CONFIG_UDF_FS is not set 1883# CONFIG_UDF_FS is not set
1262 1884
1263# 1885#
@@ -1275,13 +1897,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1275# 1897#
1276CONFIG_PROC_FS=y 1898CONFIG_PROC_FS=y
1277CONFIG_PROC_KCORE=y 1899CONFIG_PROC_KCORE=y
1900CONFIG_PROC_VMCORE=y
1278CONFIG_PROC_SYSCTL=y 1901CONFIG_PROC_SYSCTL=y
1279CONFIG_SYSFS=y 1902CONFIG_SYSFS=y
1280CONFIG_TMPFS=y 1903CONFIG_TMPFS=y
1281CONFIG_TMPFS_POSIX_ACL=y 1904CONFIG_TMPFS_POSIX_ACL=y
1282CONFIG_HUGETLBFS=y 1905CONFIG_HUGETLBFS=y
1283CONFIG_HUGETLB_PAGE=y 1906CONFIG_HUGETLB_PAGE=y
1284CONFIG_RAMFS=y
1285# CONFIG_CONFIGFS_FS is not set 1907# CONFIG_CONFIGFS_FS is not set
1286 1908
1287# 1909#
@@ -1289,6 +1911,7 @@ CONFIG_RAMFS=y
1289# 1911#
1290# CONFIG_ADFS_FS is not set 1912# CONFIG_ADFS_FS is not set
1291# CONFIG_AFFS_FS is not set 1913# CONFIG_AFFS_FS is not set
1914# CONFIG_ECRYPT_FS is not set
1292# CONFIG_HFS_FS is not set 1915# CONFIG_HFS_FS is not set
1293# CONFIG_HFSPLUS_FS is not set 1916# CONFIG_HFSPLUS_FS is not set
1294# CONFIG_BEFS_FS is not set 1917# CONFIG_BEFS_FS is not set
@@ -1296,33 +1919,15 @@ CONFIG_RAMFS=y
1296# CONFIG_EFS_FS is not set 1919# CONFIG_EFS_FS is not set
1297# CONFIG_CRAMFS is not set 1920# CONFIG_CRAMFS is not set
1298# CONFIG_VXFS_FS is not set 1921# CONFIG_VXFS_FS is not set
1922# CONFIG_MINIX_FS is not set
1299# CONFIG_HPFS_FS is not set 1923# CONFIG_HPFS_FS is not set
1300# CONFIG_QNX4FS_FS is not set 1924# CONFIG_QNX4FS_FS is not set
1925# CONFIG_ROMFS_FS is not set
1301# CONFIG_SYSV_FS is not set 1926# CONFIG_SYSV_FS is not set
1302# CONFIG_UFS_FS is not set 1927# CONFIG_UFS_FS is not set
1303 1928CONFIG_NETWORK_FILESYSTEMS=y
1304# 1929# CONFIG_NFS_FS is not set
1305# Network File Systems 1930# CONFIG_NFSD is not set
1306#
1307CONFIG_NFS_FS=y
1308CONFIG_NFS_V3=y
1309# CONFIG_NFS_V3_ACL is not set
1310# CONFIG_NFS_V4 is not set
1311# CONFIG_NFS_DIRECTIO is not set
1312CONFIG_NFSD=y
1313CONFIG_NFSD_V3=y
1314# CONFIG_NFSD_V3_ACL is not set
1315# CONFIG_NFSD_V4 is not set
1316CONFIG_NFSD_TCP=y
1317CONFIG_ROOT_NFS=y
1318CONFIG_LOCKD=y
1319CONFIG_LOCKD_V4=y
1320CONFIG_EXPORTFS=y
1321CONFIG_NFS_COMMON=y
1322CONFIG_SUNRPC=y
1323# CONFIG_SUNRPC_BIND34 is not set
1324# CONFIG_RPCSEC_GSS_KRB5 is not set
1325# CONFIG_RPCSEC_GSS_SPKM3 is not set
1326# CONFIG_SMB_FS is not set 1931# CONFIG_SMB_FS is not set
1327# CONFIG_CIFS is not set 1932# CONFIG_CIFS is not set
1328# CONFIG_NCP_FS is not set 1933# CONFIG_NCP_FS is not set
@@ -1332,14 +1937,26 @@ CONFIG_SUNRPC=y
1332# 1937#
1333# Partition Types 1938# Partition Types
1334# 1939#
1335# CONFIG_PARTITION_ADVANCED is not set 1940CONFIG_PARTITION_ADVANCED=y
1941# CONFIG_ACORN_PARTITION is not set
1942CONFIG_OSF_PARTITION=y
1943CONFIG_AMIGA_PARTITION=y
1944# CONFIG_ATARI_PARTITION is not set
1945CONFIG_MAC_PARTITION=y
1336CONFIG_MSDOS_PARTITION=y 1946CONFIG_MSDOS_PARTITION=y
1337 1947CONFIG_BSD_DISKLABEL=y
1338# 1948CONFIG_MINIX_SUBPARTITION=y
1339# Native Language Support 1949CONFIG_SOLARIS_X86_PARTITION=y
1340# 1950CONFIG_UNIXWARE_DISKLABEL=y
1951# CONFIG_LDM_PARTITION is not set
1952CONFIG_SGI_PARTITION=y
1953# CONFIG_ULTRIX_PARTITION is not set
1954CONFIG_SUN_PARTITION=y
1955CONFIG_KARMA_PARTITION=y
1956CONFIG_EFI_PARTITION=y
1957# CONFIG_SYSV68_PARTITION is not set
1341CONFIG_NLS=y 1958CONFIG_NLS=y
1342CONFIG_NLS_DEFAULT="iso8859-1" 1959CONFIG_NLS_DEFAULT="utf8"
1343CONFIG_NLS_CODEPAGE_437=y 1960CONFIG_NLS_CODEPAGE_437=y
1344# CONFIG_NLS_CODEPAGE_737 is not set 1961# CONFIG_NLS_CODEPAGE_737 is not set
1345# CONFIG_NLS_CODEPAGE_775 is not set 1962# CONFIG_NLS_CODEPAGE_775 is not set
@@ -1374,37 +1991,33 @@ CONFIG_NLS_ISO8859_1=y
1374# CONFIG_NLS_ISO8859_9 is not set 1991# CONFIG_NLS_ISO8859_9 is not set
1375# CONFIG_NLS_ISO8859_13 is not set 1992# CONFIG_NLS_ISO8859_13 is not set
1376# CONFIG_NLS_ISO8859_14 is not set 1993# CONFIG_NLS_ISO8859_14 is not set
1377CONFIG_NLS_ISO8859_15=y 1994# CONFIG_NLS_ISO8859_15 is not set
1378# CONFIG_NLS_KOI8_R is not set 1995# CONFIG_NLS_KOI8_R is not set
1379# CONFIG_NLS_KOI8_U is not set 1996# CONFIG_NLS_KOI8_U is not set
1380CONFIG_NLS_UTF8=y 1997CONFIG_NLS_UTF8=y
1381
1382#
1383# Distributed Lock Manager
1384#
1385# CONFIG_DLM is not set 1998# CONFIG_DLM is not set
1386CONFIG_INSTRUMENTATION=y
1387CONFIG_PROFILING=y
1388CONFIG_OPROFILE=y
1389CONFIG_KPROBES=y
1390 1999
1391# 2000#
1392# Kernel hacking 2001# Kernel hacking
1393# 2002#
1394CONFIG_TRACE_IRQFLAGS_SUPPORT=y 2003CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1395# CONFIG_PRINTK_TIME is not set 2004# CONFIG_PRINTK_TIME is not set
2005# CONFIG_ENABLE_WARN_DEPRECATED is not set
1396# CONFIG_ENABLE_MUST_CHECK is not set 2006# CONFIG_ENABLE_MUST_CHECK is not set
2007CONFIG_FRAME_WARN=2048
1397CONFIG_MAGIC_SYSRQ=y 2008CONFIG_MAGIC_SYSRQ=y
1398CONFIG_UNUSED_SYMBOLS=y 2009# CONFIG_UNUSED_SYMBOLS is not set
1399# CONFIG_DEBUG_FS is not set 2010CONFIG_DEBUG_FS=y
1400# CONFIG_HEADERS_CHECK is not set 2011# CONFIG_HEADERS_CHECK is not set
1401CONFIG_DEBUG_KERNEL=y 2012CONFIG_DEBUG_KERNEL=y
1402# CONFIG_DEBUG_SHIRQ is not set 2013# CONFIG_DEBUG_SHIRQ is not set
1403CONFIG_DETECT_SOFTLOCKUP=y 2014# CONFIG_DETECT_SOFTLOCKUP is not set
1404# CONFIG_SCHED_DEBUG is not set 2015# CONFIG_SCHED_DEBUG is not set
1405# CONFIG_SCHEDSTATS is not set 2016CONFIG_SCHEDSTATS=y
1406CONFIG_TIMER_STATS=y 2017CONFIG_TIMER_STATS=y
2018# CONFIG_DEBUG_OBJECTS is not set
1407# CONFIG_SLUB_DEBUG_ON is not set 2019# CONFIG_SLUB_DEBUG_ON is not set
2020# CONFIG_SLUB_STATS is not set
1408# CONFIG_DEBUG_RT_MUTEXES is not set 2021# CONFIG_DEBUG_RT_MUTEXES is not set
1409# CONFIG_RT_MUTEX_TESTER is not set 2022# CONFIG_RT_MUTEX_TESTER is not set
1410# CONFIG_DEBUG_SPINLOCK is not set 2023# CONFIG_DEBUG_SPINLOCK is not set
@@ -1419,48 +2032,174 @@ CONFIG_TIMER_STATS=y
1419CONFIG_DEBUG_BUGVERBOSE=y 2032CONFIG_DEBUG_BUGVERBOSE=y
1420# CONFIG_DEBUG_INFO is not set 2033# CONFIG_DEBUG_INFO is not set
1421# CONFIG_DEBUG_VM is not set 2034# CONFIG_DEBUG_VM is not set
2035# CONFIG_DEBUG_WRITECOUNT is not set
1422# CONFIG_DEBUG_LIST is not set 2036# CONFIG_DEBUG_LIST is not set
1423# CONFIG_FRAME_POINTER is not set 2037# CONFIG_DEBUG_SG is not set
1424CONFIG_OPTIMIZE_INLINING=y 2038CONFIG_FRAME_POINTER=y
2039# CONFIG_BOOT_PRINTK_DELAY is not set
1425# CONFIG_RCU_TORTURE_TEST is not set 2040# CONFIG_RCU_TORTURE_TEST is not set
2041# CONFIG_KPROBES_SANITY_TEST is not set
2042# CONFIG_BACKTRACE_SELF_TEST is not set
1426# CONFIG_LKDTM is not set 2043# CONFIG_LKDTM is not set
1427# CONFIG_FAULT_INJECTION is not set 2044# CONFIG_FAULT_INJECTION is not set
2045# CONFIG_LATENCYTOP is not set
2046CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
2047# CONFIG_SAMPLES is not set
2048# CONFIG_KGDB is not set
2049CONFIG_HAVE_ARCH_KGDB=y
2050# CONFIG_NONPROMISC_DEVMEM is not set
1428CONFIG_EARLY_PRINTK=y 2051CONFIG_EARLY_PRINTK=y
1429CONFIG_DEBUG_STACKOVERFLOW=y 2052CONFIG_DEBUG_STACKOVERFLOW=y
1430# CONFIG_DEBUG_STACK_USAGE is not set 2053CONFIG_DEBUG_STACK_USAGE=y
1431# CONFIG_DEBUG_RODATA is not set 2054# CONFIG_DEBUG_PAGEALLOC is not set
2055# CONFIG_X86_PTDUMP is not set
2056CONFIG_DEBUG_RODATA=y
2057# CONFIG_DEBUG_RODATA_TEST is not set
2058CONFIG_DEBUG_NX_TEST=m
1432# CONFIG_4KSTACKS is not set 2059# CONFIG_4KSTACKS is not set
1433CONFIG_X86_FIND_SMP_CONFIG=y 2060CONFIG_X86_FIND_SMP_CONFIG=y
1434CONFIG_X86_MPPARSE=y 2061CONFIG_X86_MPPARSE=y
1435CONFIG_DOUBLEFAULT=y 2062CONFIG_DOUBLEFAULT=y
2063CONFIG_IO_DELAY_TYPE_0X80=0
2064CONFIG_IO_DELAY_TYPE_0XED=1
2065CONFIG_IO_DELAY_TYPE_UDELAY=2
2066CONFIG_IO_DELAY_TYPE_NONE=3
2067CONFIG_IO_DELAY_0X80=y
2068# CONFIG_IO_DELAY_0XED is not set
2069# CONFIG_IO_DELAY_UDELAY is not set
2070# CONFIG_IO_DELAY_NONE is not set
2071CONFIG_DEFAULT_IO_DELAY_TYPE=0
2072CONFIG_DEBUG_BOOT_PARAMS=y
2073# CONFIG_CPA_DEBUG is not set
1436 2074
1437# 2075#
1438# Security options 2076# Security options
1439# 2077#
1440# CONFIG_KEYS is not set 2078CONFIG_KEYS=y
1441# CONFIG_SECURITY is not set 2079CONFIG_KEYS_DEBUG_PROC_KEYS=y
1442# CONFIG_CRYPTO is not set 2080CONFIG_SECURITY=y
2081CONFIG_SECURITY_NETWORK=y
2082# CONFIG_SECURITY_NETWORK_XFRM is not set
2083CONFIG_SECURITY_CAPABILITIES=y
2084CONFIG_SECURITY_FILE_CAPABILITIES=y
2085# CONFIG_SECURITY_ROOTPLUG is not set
2086CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
2087CONFIG_SECURITY_SELINUX=y
2088CONFIG_SECURITY_SELINUX_BOOTPARAM=y
2089CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
2090CONFIG_SECURITY_SELINUX_DISABLE=y
2091CONFIG_SECURITY_SELINUX_DEVELOP=y
2092CONFIG_SECURITY_SELINUX_AVC_STATS=y
2093CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
2094# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
2095# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
2096# CONFIG_SECURITY_SMACK is not set
2097CONFIG_CRYPTO=y
2098
2099#
2100# Crypto core or helper
2101#
2102CONFIG_CRYPTO_ALGAPI=y
2103CONFIG_CRYPTO_AEAD=y
2104CONFIG_CRYPTO_BLKCIPHER=y
2105CONFIG_CRYPTO_HASH=y
2106CONFIG_CRYPTO_MANAGER=y
2107# CONFIG_CRYPTO_GF128MUL is not set
2108# CONFIG_CRYPTO_NULL is not set
2109# CONFIG_CRYPTO_CRYPTD is not set
2110CONFIG_CRYPTO_AUTHENC=y
2111# CONFIG_CRYPTO_TEST is not set
2112
2113#
2114# Authenticated Encryption with Associated Data
2115#
2116# CONFIG_CRYPTO_CCM is not set
2117# CONFIG_CRYPTO_GCM is not set
2118# CONFIG_CRYPTO_SEQIV is not set
2119
2120#
2121# Block modes
2122#
2123CONFIG_CRYPTO_CBC=y
2124# CONFIG_CRYPTO_CTR is not set
2125# CONFIG_CRYPTO_CTS is not set
2126CONFIG_CRYPTO_ECB=y
2127# CONFIG_CRYPTO_LRW is not set
2128# CONFIG_CRYPTO_PCBC is not set
2129# CONFIG_CRYPTO_XTS is not set
2130
2131#
2132# Hash modes
2133#
2134CONFIG_CRYPTO_HMAC=y
2135# CONFIG_CRYPTO_XCBC is not set
2136
2137#
2138# Digest
2139#
2140# CONFIG_CRYPTO_CRC32C is not set
2141# CONFIG_CRYPTO_MD4 is not set
2142CONFIG_CRYPTO_MD5=y
2143# CONFIG_CRYPTO_MICHAEL_MIC is not set
2144CONFIG_CRYPTO_SHA1=y
2145# CONFIG_CRYPTO_SHA256 is not set
2146# CONFIG_CRYPTO_SHA512 is not set
2147# CONFIG_CRYPTO_TGR192 is not set
2148# CONFIG_CRYPTO_WP512 is not set
2149
2150#
2151# Ciphers
2152#
2153CONFIG_CRYPTO_AES=y
2154# CONFIG_CRYPTO_AES_586 is not set
2155# CONFIG_CRYPTO_ANUBIS is not set
2156CONFIG_CRYPTO_ARC4=y
2157# CONFIG_CRYPTO_BLOWFISH is not set
2158# CONFIG_CRYPTO_CAMELLIA is not set
2159# CONFIG_CRYPTO_CAST5 is not set
2160# CONFIG_CRYPTO_CAST6 is not set
2161CONFIG_CRYPTO_DES=y
2162# CONFIG_CRYPTO_FCRYPT is not set
2163# CONFIG_CRYPTO_KHAZAD is not set
2164# CONFIG_CRYPTO_SALSA20 is not set
2165# CONFIG_CRYPTO_SALSA20_586 is not set
2166# CONFIG_CRYPTO_SEED is not set
2167# CONFIG_CRYPTO_SERPENT is not set
2168# CONFIG_CRYPTO_TEA is not set
2169# CONFIG_CRYPTO_TWOFISH is not set
2170# CONFIG_CRYPTO_TWOFISH_586 is not set
2171
2172#
2173# Compression
2174#
2175# CONFIG_CRYPTO_DEFLATE is not set
2176# CONFIG_CRYPTO_LZO is not set
2177CONFIG_CRYPTO_HW=y
2178# CONFIG_CRYPTO_DEV_PADLOCK is not set
2179# CONFIG_CRYPTO_DEV_GEODE is not set
2180# CONFIG_CRYPTO_DEV_HIFN_795X is not set
2181CONFIG_HAVE_KVM=y
2182CONFIG_VIRTUALIZATION=y
2183# CONFIG_KVM is not set
2184# CONFIG_LGUEST is not set
2185# CONFIG_VIRTIO_PCI is not set
2186# CONFIG_VIRTIO_BALLOON is not set
1443 2187
1444# 2188#
1445# Library routines 2189# Library routines
1446# 2190#
1447CONFIG_BITREVERSE=y 2191CONFIG_BITREVERSE=y
2192CONFIG_GENERIC_FIND_FIRST_BIT=y
2193CONFIG_GENERIC_FIND_NEXT_BIT=y
1448# CONFIG_CRC_CCITT is not set 2194# CONFIG_CRC_CCITT is not set
1449# CONFIG_CRC16 is not set 2195# CONFIG_CRC16 is not set
1450# CONFIG_CRC_ITU_T is not set 2196# CONFIG_CRC_ITU_T is not set
1451CONFIG_CRC32=y 2197CONFIG_CRC32=y
1452# CONFIG_CRC7 is not set 2198# CONFIG_CRC7 is not set
1453# CONFIG_LIBCRC32C is not set 2199# CONFIG_LIBCRC32C is not set
2200CONFIG_AUDIT_GENERIC=y
1454CONFIG_ZLIB_INFLATE=y 2201CONFIG_ZLIB_INFLATE=y
1455CONFIG_PLIST=y 2202CONFIG_PLIST=y
1456CONFIG_HAS_IOMEM=y 2203CONFIG_HAS_IOMEM=y
1457CONFIG_HAS_IOPORT=y 2204CONFIG_HAS_IOPORT=y
1458CONFIG_HAS_DMA=y 2205CONFIG_HAS_DMA=y
1459CONFIG_GENERIC_HARDIRQS=y
1460CONFIG_GENERIC_IRQ_PROBE=y
1461CONFIG_GENERIC_PENDING_IRQ=y
1462CONFIG_X86_SMP=y
1463CONFIG_X86_HT=y
1464CONFIG_X86_BIOS_REBOOT=y
1465CONFIG_X86_TRAMPOLINE=y
1466CONFIG_KTIME_SCALAR=y
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index 2d6f5b2809d2..ae5124e064d4 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -1,64 +1,103 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.22-git14 3# Linux kernel version: 2.6.26-rc1
4# Fri Jul 20 09:53:15 2007 4# Sun May 4 19:59:57 2008
5# 5#
6CONFIG_X86_64=y
7CONFIG_64BIT=y 6CONFIG_64BIT=y
7# CONFIG_X86_32 is not set
8CONFIG_X86_64=y
8CONFIG_X86=y 9CONFIG_X86=y
10CONFIG_DEFCONFIG_LIST="arch/x86/configs/x86_64_defconfig"
11# CONFIG_GENERIC_LOCKBREAK is not set
9CONFIG_GENERIC_TIME=y 12CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_TIME_VSYSCALL=y
11CONFIG_GENERIC_CMOS_UPDATE=y 13CONFIG_GENERIC_CMOS_UPDATE=y
12CONFIG_ZONE_DMA32=y 14CONFIG_CLOCKSOURCE_WATCHDOG=y
15CONFIG_GENERIC_CLOCKEVENTS=y
16CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
13CONFIG_LOCKDEP_SUPPORT=y 17CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_STACKTRACE_SUPPORT=y 18CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_SEMAPHORE_SLEEPERS=y 19CONFIG_HAVE_LATENCYTOP_SUPPORT=y
20CONFIG_FAST_CMPXCHG_LOCAL=y
16CONFIG_MMU=y 21CONFIG_MMU=y
17CONFIG_ZONE_DMA=y 22CONFIG_ZONE_DMA=y
18CONFIG_QUICKLIST=y
19CONFIG_NR_QUICK=2
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21CONFIG_GENERIC_HWEIGHT=y
22CONFIG_GENERIC_CALIBRATE_DELAY=y
23CONFIG_X86_CMPXCHG=y
24CONFIG_EARLY_PRINTK=y
25CONFIG_GENERIC_ISA_DMA=y 23CONFIG_GENERIC_ISA_DMA=y
26CONFIG_GENERIC_IOMAP=y 24CONFIG_GENERIC_IOMAP=y
27CONFIG_ARCH_MAY_HAVE_PC_FDC=y
28CONFIG_ARCH_POPULATES_NODE_MAP=y
29CONFIG_DMI=y
30CONFIG_AUDIT_ARCH=y
31CONFIG_GENERIC_BUG=y 25CONFIG_GENERIC_BUG=y
26CONFIG_GENERIC_HWEIGHT=y
27# CONFIG_GENERIC_GPIO is not set
28CONFIG_ARCH_MAY_HAVE_PC_FDC=y
29CONFIG_RWSEM_GENERIC_SPINLOCK=y
30# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
32# CONFIG_ARCH_HAS_ILOG2_U32 is not set 31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
33# CONFIG_ARCH_HAS_ILOG2_U64 is not set 32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
34CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_GENERIC_CALIBRATE_DELAY=y
35CONFIG_GENERIC_TIME_VSYSCALL=y
36CONFIG_ARCH_HAS_CPU_RELAX=y
37CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
38CONFIG_HAVE_SETUP_PER_CPU_AREA=y
39CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y
40CONFIG_ARCH_HIBERNATION_POSSIBLE=y
41CONFIG_ARCH_SUSPEND_POSSIBLE=y
42CONFIG_ZONE_DMA32=y
43CONFIG_ARCH_POPULATES_NODE_MAP=y
44CONFIG_AUDIT_ARCH=y
45CONFIG_ARCH_SUPPORTS_AOUT=y
46CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
47CONFIG_GENERIC_HARDIRQS=y
48CONFIG_GENERIC_IRQ_PROBE=y
49CONFIG_GENERIC_PENDING_IRQ=y
50CONFIG_X86_SMP=y
51CONFIG_X86_64_SMP=y
52CONFIG_X86_HT=y
53CONFIG_X86_BIOS_REBOOT=y
54CONFIG_X86_TRAMPOLINE=y
55# CONFIG_KTIME_SCALAR is not set
35 56
36# 57#
37# Code maturity level options 58# General setup
38# 59#
39CONFIG_EXPERIMENTAL=y 60CONFIG_EXPERIMENTAL=y
40CONFIG_LOCK_KERNEL=y 61CONFIG_LOCK_KERNEL=y
41CONFIG_INIT_ENV_ARG_LIMIT=32 62CONFIG_INIT_ENV_ARG_LIMIT=32
42
43#
44# General setup
45#
46CONFIG_LOCALVERSION="" 63CONFIG_LOCALVERSION=""
47CONFIG_LOCALVERSION_AUTO=y 64# CONFIG_LOCALVERSION_AUTO is not set
48CONFIG_SWAP=y 65CONFIG_SWAP=y
49CONFIG_SYSVIPC=y 66CONFIG_SYSVIPC=y
50CONFIG_SYSVIPC_SYSCTL=y 67CONFIG_SYSVIPC_SYSCTL=y
51CONFIG_POSIX_MQUEUE=y 68CONFIG_POSIX_MQUEUE=y
52# CONFIG_BSD_PROCESS_ACCT is not set 69CONFIG_BSD_PROCESS_ACCT=y
53# CONFIG_TASKSTATS is not set 70# CONFIG_BSD_PROCESS_ACCT_V3 is not set
54# CONFIG_USER_NS is not set 71CONFIG_TASKSTATS=y
55# CONFIG_AUDIT is not set 72CONFIG_TASK_DELAY_ACCT=y
56CONFIG_IKCONFIG=y 73CONFIG_TASK_XACCT=y
57CONFIG_IKCONFIG_PROC=y 74CONFIG_TASK_IO_ACCOUNTING=y
58CONFIG_LOG_BUF_SHIFT=18 75CONFIG_AUDIT=y
59# CONFIG_CPUSETS is not set 76CONFIG_AUDITSYSCALL=y
60CONFIG_SYSFS_DEPRECATED=y 77CONFIG_AUDIT_TREE=y
78# CONFIG_IKCONFIG is not set
79CONFIG_LOG_BUF_SHIFT=17
80CONFIG_CGROUPS=y
81# CONFIG_CGROUP_DEBUG is not set
82CONFIG_CGROUP_NS=y
83# CONFIG_CGROUP_DEVICE is not set
84CONFIG_CPUSETS=y
85CONFIG_GROUP_SCHED=y
86CONFIG_FAIR_GROUP_SCHED=y
87# CONFIG_RT_GROUP_SCHED is not set
88# CONFIG_USER_SCHED is not set
89CONFIG_CGROUP_SCHED=y
90CONFIG_CGROUP_CPUACCT=y
91CONFIG_RESOURCE_COUNTERS=y
92# CONFIG_CGROUP_MEM_RES_CTLR is not set
93# CONFIG_SYSFS_DEPRECATED_V2 is not set
94CONFIG_PROC_PID_CPUSET=y
61CONFIG_RELAY=y 95CONFIG_RELAY=y
96CONFIG_NAMESPACES=y
97CONFIG_UTS_NS=y
98CONFIG_IPC_NS=y
99CONFIG_USER_NS=y
100CONFIG_PID_NS=y
62CONFIG_BLK_DEV_INITRD=y 101CONFIG_BLK_DEV_INITRD=y
63CONFIG_INITRAMFS_SOURCE="" 102CONFIG_INITRAMFS_SOURCE=""
64CONFIG_CC_OPTIMIZE_FOR_SIZE=y 103CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -66,13 +105,15 @@ CONFIG_SYSCTL=y
66# CONFIG_EMBEDDED is not set 105# CONFIG_EMBEDDED is not set
67CONFIG_UID16=y 106CONFIG_UID16=y
68CONFIG_SYSCTL_SYSCALL=y 107CONFIG_SYSCTL_SYSCALL=y
108CONFIG_SYSCTL_SYSCALL_CHECK=y
69CONFIG_KALLSYMS=y 109CONFIG_KALLSYMS=y
70CONFIG_KALLSYMS_ALL=y 110CONFIG_KALLSYMS_ALL=y
71# CONFIG_KALLSYMS_EXTRA_PASS is not set 111CONFIG_KALLSYMS_EXTRA_PASS=y
72CONFIG_HOTPLUG=y 112CONFIG_HOTPLUG=y
73CONFIG_PRINTK=y 113CONFIG_PRINTK=y
74CONFIG_BUG=y 114CONFIG_BUG=y
75CONFIG_ELF_CORE=y 115CONFIG_ELF_CORE=y
116# CONFIG_COMPAT_BRK is not set
76CONFIG_BASE_FULL=y 117CONFIG_BASE_FULL=y
77CONFIG_FUTEX=y 118CONFIG_FUTEX=y
78CONFIG_ANON_INODES=y 119CONFIG_ANON_INODES=y
@@ -82,9 +123,21 @@ CONFIG_TIMERFD=y
82CONFIG_EVENTFD=y 123CONFIG_EVENTFD=y
83CONFIG_SHMEM=y 124CONFIG_SHMEM=y
84CONFIG_VM_EVENT_COUNTERS=y 125CONFIG_VM_EVENT_COUNTERS=y
85CONFIG_SLAB=y 126CONFIG_SLUB_DEBUG=y
86# CONFIG_SLUB is not set 127# CONFIG_SLAB is not set
128CONFIG_SLUB=y
87# CONFIG_SLOB is not set 129# CONFIG_SLOB is not set
130CONFIG_PROFILING=y
131CONFIG_MARKERS=y
132# CONFIG_OPROFILE is not set
133CONFIG_HAVE_OPROFILE=y
134CONFIG_KPROBES=y
135CONFIG_KRETPROBES=y
136CONFIG_HAVE_KPROBES=y
137CONFIG_HAVE_KRETPROBES=y
138# CONFIG_HAVE_DMA_ATTRS is not set
139CONFIG_PROC_PAGE_MONITOR=y
140CONFIG_SLABINFO=y
88CONFIG_RT_MUTEXES=y 141CONFIG_RT_MUTEXES=y
89# CONFIG_TINY_SHMEM is not set 142# CONFIG_TINY_SHMEM is not set
90CONFIG_BASE_SMALL=0 143CONFIG_BASE_SMALL=0
@@ -96,14 +149,15 @@ CONFIG_MODULE_FORCE_UNLOAD=y
96# CONFIG_KMOD is not set 149# CONFIG_KMOD is not set
97CONFIG_STOP_MACHINE=y 150CONFIG_STOP_MACHINE=y
98CONFIG_BLOCK=y 151CONFIG_BLOCK=y
99# CONFIG_BLK_DEV_IO_TRACE is not set 152CONFIG_BLK_DEV_IO_TRACE=y
100# CONFIG_BLK_DEV_BSG is not set 153CONFIG_BLK_DEV_BSG=y
154CONFIG_BLOCK_COMPAT=y
101 155
102# 156#
103# IO Schedulers 157# IO Schedulers
104# 158#
105CONFIG_IOSCHED_NOOP=y 159CONFIG_IOSCHED_NOOP=y
106# CONFIG_IOSCHED_AS is not set 160CONFIG_IOSCHED_AS=y
107CONFIG_IOSCHED_DEADLINE=y 161CONFIG_IOSCHED_DEADLINE=y
108CONFIG_IOSCHED_CFQ=y 162CONFIG_IOSCHED_CFQ=y
109# CONFIG_DEFAULT_AS is not set 163# CONFIG_DEFAULT_AS is not set
@@ -111,107 +165,177 @@ CONFIG_IOSCHED_CFQ=y
111CONFIG_DEFAULT_CFQ=y 165CONFIG_DEFAULT_CFQ=y
112# CONFIG_DEFAULT_NOOP is not set 166# CONFIG_DEFAULT_NOOP is not set
113CONFIG_DEFAULT_IOSCHED="cfq" 167CONFIG_DEFAULT_IOSCHED="cfq"
168CONFIG_CLASSIC_RCU=y
114 169
115# 170#
116# Processor type and features 171# Processor type and features
117# 172#
173CONFIG_TICK_ONESHOT=y
174CONFIG_NO_HZ=y
175CONFIG_HIGH_RES_TIMERS=y
176CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
177CONFIG_SMP=y
118CONFIG_X86_PC=y 178CONFIG_X86_PC=y
179# CONFIG_X86_ELAN is not set
180# CONFIG_X86_VOYAGER is not set
181# CONFIG_X86_NUMAQ is not set
182# CONFIG_X86_SUMMIT is not set
183# CONFIG_X86_BIGSMP is not set
184# CONFIG_X86_VISWS is not set
185# CONFIG_X86_GENERICARCH is not set
186# CONFIG_X86_ES7000 is not set
187# CONFIG_X86_RDC321X is not set
119# CONFIG_X86_VSMP is not set 188# CONFIG_X86_VSMP is not set
189# CONFIG_PARAVIRT_GUEST is not set
190CONFIG_MEMTEST_BOOTPARAM=y
191CONFIG_MEMTEST_BOOTPARAM_VALUE=0
192# CONFIG_M386 is not set
193# CONFIG_M486 is not set
194# CONFIG_M586 is not set
195# CONFIG_M586TSC is not set
196# CONFIG_M586MMX is not set
197# CONFIG_M686 is not set
198# CONFIG_MPENTIUMII is not set
199# CONFIG_MPENTIUMIII is not set
200# CONFIG_MPENTIUMM is not set
201# CONFIG_MPENTIUM4 is not set
202# CONFIG_MK6 is not set
203# CONFIG_MK7 is not set
120# CONFIG_MK8 is not set 204# CONFIG_MK8 is not set
205# CONFIG_MCRUSOE is not set
206# CONFIG_MEFFICEON is not set
207# CONFIG_MWINCHIPC6 is not set
208# CONFIG_MWINCHIP2 is not set
209# CONFIG_MWINCHIP3D is not set
210# CONFIG_MGEODEGX1 is not set
211# CONFIG_MGEODE_LX is not set
212# CONFIG_MCYRIXIII is not set
213# CONFIG_MVIAC3_2 is not set
214# CONFIG_MVIAC7 is not set
121# CONFIG_MPSC is not set 215# CONFIG_MPSC is not set
122# CONFIG_MCORE2 is not set 216CONFIG_MCORE2=y
123CONFIG_GENERIC_CPU=y 217# CONFIG_GENERIC_CPU is not set
124CONFIG_X86_L1_CACHE_BYTES=128 218CONFIG_X86_CPU=y
125CONFIG_X86_L1_CACHE_SHIFT=7 219CONFIG_X86_L1_CACHE_BYTES=64
126CONFIG_X86_INTERNODE_CACHE_BYTES=128 220CONFIG_X86_INTERNODE_CACHE_BYTES=64
127CONFIG_X86_TSC=y 221CONFIG_X86_CMPXCHG=y
222CONFIG_X86_L1_CACHE_SHIFT=6
128CONFIG_X86_GOOD_APIC=y 223CONFIG_X86_GOOD_APIC=y
129# CONFIG_MICROCODE is not set 224CONFIG_X86_INTEL_USERCOPY=y
130CONFIG_X86_MSR=y 225CONFIG_X86_USE_PPRO_CHECKSUM=y
131CONFIG_X86_CPUID=y 226CONFIG_X86_P6_NOP=y
132CONFIG_X86_HT=y 227CONFIG_X86_TSC=y
133CONFIG_X86_IO_APIC=y 228CONFIG_X86_CMOV=y
134CONFIG_X86_LOCAL_APIC=y 229CONFIG_X86_MINIMUM_CPU_FAMILY=64
135CONFIG_MTRR=y 230CONFIG_X86_DEBUGCTLMSR=y
136CONFIG_SMP=y 231CONFIG_HPET_TIMER=y
137CONFIG_SCHED_SMT=y 232CONFIG_HPET_EMULATE_RTC=y
233CONFIG_DMI=y
234CONFIG_GART_IOMMU=y
235CONFIG_CALGARY_IOMMU=y
236CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y
237CONFIG_SWIOTLB=y
238CONFIG_IOMMU_HELPER=y
239CONFIG_NR_CPUS=4
240# CONFIG_SCHED_SMT is not set
138CONFIG_SCHED_MC=y 241CONFIG_SCHED_MC=y
139# CONFIG_PREEMPT_NONE is not set 242# CONFIG_PREEMPT_NONE is not set
140CONFIG_PREEMPT_VOLUNTARY=y 243CONFIG_PREEMPT_VOLUNTARY=y
141# CONFIG_PREEMPT is not set 244# CONFIG_PREEMPT is not set
142CONFIG_PREEMPT_BKL=y 245CONFIG_X86_LOCAL_APIC=y
246CONFIG_X86_IO_APIC=y
247# CONFIG_X86_MCE is not set
248# CONFIG_I8K is not set
249# CONFIG_MICROCODE is not set
250CONFIG_X86_MSR=y
251CONFIG_X86_CPUID=y
143CONFIG_NUMA=y 252CONFIG_NUMA=y
144CONFIG_K8_NUMA=y 253CONFIG_K8_NUMA=y
145CONFIG_NODES_SHIFT=6
146CONFIG_X86_64_ACPI_NUMA=y 254CONFIG_X86_64_ACPI_NUMA=y
147CONFIG_NUMA_EMU=y 255CONFIG_NODES_SPAN_OTHER_NODES=y
256# CONFIG_NUMA_EMU is not set
257CONFIG_NODES_SHIFT=6
258CONFIG_ARCH_SPARSEMEM_DEFAULT=y
259CONFIG_ARCH_SPARSEMEM_ENABLE=y
260CONFIG_ARCH_SELECT_MEMORY_MODEL=y
261CONFIG_SELECT_MEMORY_MODEL=y
262# CONFIG_FLATMEM_MANUAL is not set
263# CONFIG_DISCONTIGMEM_MANUAL is not set
264CONFIG_SPARSEMEM_MANUAL=y
265CONFIG_SPARSEMEM=y
148CONFIG_NEED_MULTIPLE_NODES=y 266CONFIG_NEED_MULTIPLE_NODES=y
267CONFIG_HAVE_MEMORY_PRESENT=y
149# CONFIG_SPARSEMEM_STATIC is not set 268# CONFIG_SPARSEMEM_STATIC is not set
269CONFIG_SPARSEMEM_EXTREME=y
270CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
271CONFIG_SPARSEMEM_VMEMMAP=y
272
273#
274# Memory hotplug is currently incompatible with Software Suspend
275#
276CONFIG_PAGEFLAGS_EXTENDED=y
150CONFIG_SPLIT_PTLOCK_CPUS=4 277CONFIG_SPLIT_PTLOCK_CPUS=4
151CONFIG_MIGRATION=y 278CONFIG_MIGRATION=y
152CONFIG_RESOURCES_64BIT=y 279CONFIG_RESOURCES_64BIT=y
153CONFIG_ZONE_DMA_FLAG=1 280CONFIG_ZONE_DMA_FLAG=1
154CONFIG_BOUNCE=y 281CONFIG_BOUNCE=y
155CONFIG_VIRT_TO_BUS=y 282CONFIG_VIRT_TO_BUS=y
156CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y 283CONFIG_MTRR=y
157CONFIG_OUT_OF_LINE_PFN_TO_PAGE=y 284# CONFIG_X86_PAT is not set
158CONFIG_NR_CPUS=32 285CONFIG_EFI=y
159CONFIG_PHYSICAL_ALIGN=0x200000
160CONFIG_HOTPLUG_CPU=y
161CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
162CONFIG_HPET_TIMER=y
163CONFIG_HPET_EMULATE_RTC=y
164CONFIG_GART_IOMMU=y
165# CONFIG_CALGARY_IOMMU is not set
166CONFIG_SWIOTLB=y
167CONFIG_X86_MCE=y
168CONFIG_X86_MCE_INTEL=y
169CONFIG_X86_MCE_AMD=y
170# CONFIG_KEXEC is not set
171# CONFIG_CRASH_DUMP is not set
172# CONFIG_RELOCATABLE is not set
173CONFIG_PHYSICAL_START=0x200000
174CONFIG_SECCOMP=y 286CONFIG_SECCOMP=y
175# CONFIG_CC_STACKPROTECTOR is not set
176# CONFIG_HZ_100 is not set 287# CONFIG_HZ_100 is not set
177CONFIG_HZ_250=y 288# CONFIG_HZ_250 is not set
178# CONFIG_HZ_300 is not set 289# CONFIG_HZ_300 is not set
179# CONFIG_HZ_1000 is not set 290CONFIG_HZ_1000=y
180CONFIG_HZ=250 291CONFIG_HZ=1000
181CONFIG_K8_NB=y 292CONFIG_SCHED_HRTICK=y
182CONFIG_GENERIC_HARDIRQS=y 293CONFIG_KEXEC=y
183CONFIG_GENERIC_IRQ_PROBE=y 294CONFIG_CRASH_DUMP=y
184CONFIG_ISA_DMA_API=y 295CONFIG_PHYSICAL_START=0x1000000
185CONFIG_GENERIC_PENDING_IRQ=y 296CONFIG_RELOCATABLE=y
297CONFIG_PHYSICAL_ALIGN=0x200000
298CONFIG_HOTPLUG_CPU=y
299# CONFIG_COMPAT_VDSO is not set
300CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
301CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
186 302
187# 303#
188# Power management options 304# Power management options
189# 305#
306CONFIG_ARCH_HIBERNATION_HEADER=y
190CONFIG_PM=y 307CONFIG_PM=y
191# CONFIG_PM_LEGACY is not set 308CONFIG_PM_DEBUG=y
192# CONFIG_PM_DEBUG is not set 309# CONFIG_PM_VERBOSE is not set
310CONFIG_CAN_PM_TRACE=y
311CONFIG_PM_TRACE=y
312CONFIG_PM_TRACE_RTC=y
313CONFIG_PM_SLEEP_SMP=y
314CONFIG_PM_SLEEP=y
315CONFIG_SUSPEND=y
316CONFIG_SUSPEND_FREEZER=y
193CONFIG_HIBERNATION=y 317CONFIG_HIBERNATION=y
194CONFIG_PM_STD_PARTITION="" 318CONFIG_PM_STD_PARTITION=""
195
196#
197# ACPI (Advanced Configuration and Power Interface) Support
198#
199CONFIG_ACPI=y 319CONFIG_ACPI=y
200CONFIG_ACPI_SLEEP=y 320CONFIG_ACPI_SLEEP=y
201CONFIG_ACPI_SLEEP_PROC_FS=y
202CONFIG_ACPI_SLEEP_PROC_SLEEP=y
203CONFIG_ACPI_PROCFS=y 321CONFIG_ACPI_PROCFS=y
322CONFIG_ACPI_PROCFS_POWER=y
323CONFIG_ACPI_SYSFS_POWER=y
324CONFIG_ACPI_PROC_EVENT=y
204CONFIG_ACPI_AC=y 325CONFIG_ACPI_AC=y
205CONFIG_ACPI_BATTERY=y 326CONFIG_ACPI_BATTERY=y
206CONFIG_ACPI_BUTTON=y 327CONFIG_ACPI_BUTTON=y
207CONFIG_ACPI_FAN=y 328CONFIG_ACPI_FAN=y
208# CONFIG_ACPI_DOCK is not set 329CONFIG_ACPI_DOCK=y
330# CONFIG_ACPI_BAY is not set
209CONFIG_ACPI_PROCESSOR=y 331CONFIG_ACPI_PROCESSOR=y
210CONFIG_ACPI_HOTPLUG_CPU=y 332CONFIG_ACPI_HOTPLUG_CPU=y
211CONFIG_ACPI_THERMAL=y 333CONFIG_ACPI_THERMAL=y
212CONFIG_ACPI_NUMA=y 334CONFIG_ACPI_NUMA=y
335# CONFIG_ACPI_WMI is not set
213# CONFIG_ACPI_ASUS is not set 336# CONFIG_ACPI_ASUS is not set
214# CONFIG_ACPI_TOSHIBA is not set 337# CONFIG_ACPI_TOSHIBA is not set
338# CONFIG_ACPI_CUSTOM_DSDT is not set
215CONFIG_ACPI_BLACKLIST_YEAR=0 339CONFIG_ACPI_BLACKLIST_YEAR=0
216# CONFIG_ACPI_DEBUG is not set 340# CONFIG_ACPI_DEBUG is not set
217CONFIG_ACPI_EC=y 341CONFIG_ACPI_EC=y
@@ -227,29 +351,34 @@ CONFIG_ACPI_CONTAINER=y
227CONFIG_CPU_FREQ=y 351CONFIG_CPU_FREQ=y
228CONFIG_CPU_FREQ_TABLE=y 352CONFIG_CPU_FREQ_TABLE=y
229CONFIG_CPU_FREQ_DEBUG=y 353CONFIG_CPU_FREQ_DEBUG=y
230CONFIG_CPU_FREQ_STAT=y 354# CONFIG_CPU_FREQ_STAT is not set
231# CONFIG_CPU_FREQ_STAT_DETAILS is not set 355# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
232CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y 356# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
233# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set 357CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
358# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
359# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
234CONFIG_CPU_FREQ_GOV_PERFORMANCE=y 360CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
235# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set 361# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
236CONFIG_CPU_FREQ_GOV_USERSPACE=y 362CONFIG_CPU_FREQ_GOV_USERSPACE=y
237CONFIG_CPU_FREQ_GOV_ONDEMAND=y 363CONFIG_CPU_FREQ_GOV_ONDEMAND=y
238CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y 364# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
239 365
240# 366#
241# CPUFreq processor drivers 367# CPUFreq processor drivers
242# 368#
243CONFIG_X86_POWERNOW_K8=y
244CONFIG_X86_POWERNOW_K8_ACPI=y
245# CONFIG_X86_SPEEDSTEP_CENTRINO is not set
246CONFIG_X86_ACPI_CPUFREQ=y 369CONFIG_X86_ACPI_CPUFREQ=y
370# CONFIG_X86_POWERNOW_K8 is not set
371# CONFIG_X86_SPEEDSTEP_CENTRINO is not set
372# CONFIG_X86_P4_CLOCKMOD is not set
247 373
248# 374#
249# shared options 375# shared options
250# 376#
251CONFIG_X86_ACPI_CPUFREQ_PROC_INTF=y 377# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
252# CONFIG_X86_SPEEDSTEP_LIB is not set 378# CONFIG_X86_SPEEDSTEP_LIB is not set
379CONFIG_CPU_IDLE=y
380CONFIG_CPU_IDLE_GOV_LADDER=y
381CONFIG_CPU_IDLE_GOV_MENU=y
253 382
254# 383#
255# Bus options (PCI etc.) 384# Bus options (PCI etc.)
@@ -257,27 +386,56 @@ CONFIG_X86_ACPI_CPUFREQ_PROC_INTF=y
257CONFIG_PCI=y 386CONFIG_PCI=y
258CONFIG_PCI_DIRECT=y 387CONFIG_PCI_DIRECT=y
259CONFIG_PCI_MMCONFIG=y 388CONFIG_PCI_MMCONFIG=y
389CONFIG_PCI_DOMAINS=y
390CONFIG_DMAR=y
391CONFIG_DMAR_GFX_WA=y
392CONFIG_DMAR_FLOPPY_WA=y
260CONFIG_PCIEPORTBUS=y 393CONFIG_PCIEPORTBUS=y
394# CONFIG_HOTPLUG_PCI_PCIE is not set
261CONFIG_PCIEAER=y 395CONFIG_PCIEAER=y
396# CONFIG_PCIEASPM is not set
262CONFIG_ARCH_SUPPORTS_MSI=y 397CONFIG_ARCH_SUPPORTS_MSI=y
263CONFIG_PCI_MSI=y 398CONFIG_PCI_MSI=y
399# CONFIG_PCI_LEGACY is not set
264# CONFIG_PCI_DEBUG is not set 400# CONFIG_PCI_DEBUG is not set
265# CONFIG_HT_IRQ is not set 401CONFIG_HT_IRQ=y
266 402CONFIG_ISA_DMA_API=y
267# 403CONFIG_K8_NB=y
268# PCCARD (PCMCIA/CardBus) support 404CONFIG_PCCARD=y
269# 405# CONFIG_PCMCIA_DEBUG is not set
270# CONFIG_PCCARD is not set 406CONFIG_PCMCIA=y
271# CONFIG_HOTPLUG_PCI is not set 407CONFIG_PCMCIA_LOAD_CIS=y
408CONFIG_PCMCIA_IOCTL=y
409CONFIG_CARDBUS=y
410
411#
412# PC-card bridges
413#
414CONFIG_YENTA=y
415CONFIG_YENTA_O2=y
416CONFIG_YENTA_RICOH=y
417CONFIG_YENTA_TI=y
418CONFIG_YENTA_ENE_TUNE=y
419CONFIG_YENTA_TOSHIBA=y
420# CONFIG_PD6729 is not set
421# CONFIG_I82092 is not set
422CONFIG_PCCARD_NONSTATIC=y
423CONFIG_HOTPLUG_PCI=y
424# CONFIG_HOTPLUG_PCI_FAKE is not set
425# CONFIG_HOTPLUG_PCI_ACPI is not set
426# CONFIG_HOTPLUG_PCI_CPCI is not set
427# CONFIG_HOTPLUG_PCI_SHPC is not set
272 428
273# 429#
274# Executable file formats / Emulations 430# Executable file formats / Emulations
275# 431#
276CONFIG_BINFMT_ELF=y 432CONFIG_BINFMT_ELF=y
277# CONFIG_BINFMT_MISC is not set 433CONFIG_COMPAT_BINFMT_ELF=y
434CONFIG_BINFMT_MISC=y
278CONFIG_IA32_EMULATION=y 435CONFIG_IA32_EMULATION=y
279CONFIG_IA32_AOUT=y 436# CONFIG_IA32_AOUT is not set
280CONFIG_COMPAT=y 437CONFIG_COMPAT=y
438CONFIG_COMPAT_FOR_U64_ALIGNMENT=y
281CONFIG_SYSVIPC_COMPAT=y 439CONFIG_SYSVIPC_COMPAT=y
282 440
283# 441#
@@ -289,22 +447,31 @@ CONFIG_NET=y
289# Networking options 447# Networking options
290# 448#
291CONFIG_PACKET=y 449CONFIG_PACKET=y
292# CONFIG_PACKET_MMAP is not set 450CONFIG_PACKET_MMAP=y
293CONFIG_UNIX=y 451CONFIG_UNIX=y
452CONFIG_XFRM=y
453CONFIG_XFRM_USER=y
454# CONFIG_XFRM_SUB_POLICY is not set
455# CONFIG_XFRM_MIGRATE is not set
456# CONFIG_XFRM_STATISTICS is not set
294# CONFIG_NET_KEY is not set 457# CONFIG_NET_KEY is not set
295CONFIG_INET=y 458CONFIG_INET=y
296CONFIG_IP_MULTICAST=y 459CONFIG_IP_MULTICAST=y
297# CONFIG_IP_ADVANCED_ROUTER is not set 460CONFIG_IP_ADVANCED_ROUTER=y
461CONFIG_ASK_IP_FIB_HASH=y
462# CONFIG_IP_FIB_TRIE is not set
298CONFIG_IP_FIB_HASH=y 463CONFIG_IP_FIB_HASH=y
299CONFIG_IP_PNP=y 464CONFIG_IP_MULTIPLE_TABLES=y
300CONFIG_IP_PNP_DHCP=y 465CONFIG_IP_ROUTE_MULTIPATH=y
301# CONFIG_IP_PNP_BOOTP is not set 466CONFIG_IP_ROUTE_VERBOSE=y
302# CONFIG_IP_PNP_RARP is not set 467# CONFIG_IP_PNP is not set
303# CONFIG_NET_IPIP is not set 468# CONFIG_NET_IPIP is not set
304# CONFIG_NET_IPGRE is not set 469# CONFIG_NET_IPGRE is not set
305# CONFIG_IP_MROUTE is not set 470CONFIG_IP_MROUTE=y
471CONFIG_IP_PIMSM_V1=y
472CONFIG_IP_PIMSM_V2=y
306# CONFIG_ARPD is not set 473# CONFIG_ARPD is not set
307# CONFIG_SYN_COOKIES is not set 474CONFIG_SYN_COOKIES=y
308# CONFIG_INET_AH is not set 475# CONFIG_INET_AH is not set
309# CONFIG_INET_ESP is not set 476# CONFIG_INET_ESP is not set
310# CONFIG_INET_IPCOMP is not set 477# CONFIG_INET_IPCOMP is not set
@@ -313,31 +480,109 @@ CONFIG_INET_TUNNEL=y
313# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 480# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
314# CONFIG_INET_XFRM_MODE_TUNNEL is not set 481# CONFIG_INET_XFRM_MODE_TUNNEL is not set
315# CONFIG_INET_XFRM_MODE_BEET is not set 482# CONFIG_INET_XFRM_MODE_BEET is not set
316CONFIG_INET_DIAG=y 483CONFIG_INET_LRO=y
317CONFIG_INET_TCP_DIAG=y 484# CONFIG_INET_DIAG is not set
318# CONFIG_TCP_CONG_ADVANCED is not set 485CONFIG_TCP_CONG_ADVANCED=y
486# CONFIG_TCP_CONG_BIC is not set
319CONFIG_TCP_CONG_CUBIC=y 487CONFIG_TCP_CONG_CUBIC=y
488# CONFIG_TCP_CONG_WESTWOOD is not set
489# CONFIG_TCP_CONG_HTCP is not set
490# CONFIG_TCP_CONG_HSTCP is not set
491# CONFIG_TCP_CONG_HYBLA is not set
492# CONFIG_TCP_CONG_VEGAS is not set
493# CONFIG_TCP_CONG_SCALABLE is not set
494# CONFIG_TCP_CONG_LP is not set
495# CONFIG_TCP_CONG_VENO is not set
496# CONFIG_TCP_CONG_YEAH is not set
497# CONFIG_TCP_CONG_ILLINOIS is not set
498# CONFIG_DEFAULT_BIC is not set
499CONFIG_DEFAULT_CUBIC=y
500# CONFIG_DEFAULT_HTCP is not set
501# CONFIG_DEFAULT_VEGAS is not set
502# CONFIG_DEFAULT_WESTWOOD is not set
503# CONFIG_DEFAULT_RENO is not set
320CONFIG_DEFAULT_TCP_CONG="cubic" 504CONFIG_DEFAULT_TCP_CONG="cubic"
321# CONFIG_TCP_MD5SIG is not set 505CONFIG_TCP_MD5SIG=y
506# CONFIG_IP_VS is not set
322CONFIG_IPV6=y 507CONFIG_IPV6=y
323# CONFIG_IPV6_PRIVACY is not set 508# CONFIG_IPV6_PRIVACY is not set
324# CONFIG_IPV6_ROUTER_PREF is not set 509# CONFIG_IPV6_ROUTER_PREF is not set
325# CONFIG_IPV6_OPTIMISTIC_DAD is not set 510# CONFIG_IPV6_OPTIMISTIC_DAD is not set
326# CONFIG_INET6_AH is not set 511CONFIG_INET6_AH=y
327# CONFIG_INET6_ESP is not set 512CONFIG_INET6_ESP=y
328# CONFIG_INET6_IPCOMP is not set 513# CONFIG_INET6_IPCOMP is not set
329# CONFIG_IPV6_MIP6 is not set 514# CONFIG_IPV6_MIP6 is not set
330# CONFIG_INET6_XFRM_TUNNEL is not set 515# CONFIG_INET6_XFRM_TUNNEL is not set
331# CONFIG_INET6_TUNNEL is not set 516# CONFIG_INET6_TUNNEL is not set
332# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set 517CONFIG_INET6_XFRM_MODE_TRANSPORT=y
333# CONFIG_INET6_XFRM_MODE_TUNNEL is not set 518CONFIG_INET6_XFRM_MODE_TUNNEL=y
334# CONFIG_INET6_XFRM_MODE_BEET is not set 519CONFIG_INET6_XFRM_MODE_BEET=y
335# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set 520# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
336CONFIG_IPV6_SIT=y 521CONFIG_IPV6_SIT=y
522CONFIG_IPV6_NDISC_NODETYPE=y
337# CONFIG_IPV6_TUNNEL is not set 523# CONFIG_IPV6_TUNNEL is not set
338# CONFIG_IPV6_MULTIPLE_TABLES is not set 524# CONFIG_IPV6_MULTIPLE_TABLES is not set
339# CONFIG_NETWORK_SECMARK is not set 525# CONFIG_IPV6_MROUTE is not set
340# CONFIG_NETFILTER is not set 526CONFIG_NETLABEL=y
527CONFIG_NETWORK_SECMARK=y
528CONFIG_NETFILTER=y
529# CONFIG_NETFILTER_DEBUG is not set
530# CONFIG_NETFILTER_ADVANCED is not set
531
532#
533# Core Netfilter Configuration
534#
535CONFIG_NETFILTER_NETLINK=y
536CONFIG_NETFILTER_NETLINK_LOG=y
537CONFIG_NF_CONNTRACK=y
538CONFIG_NF_CONNTRACK_SECMARK=y
539CONFIG_NF_CONNTRACK_FTP=y
540CONFIG_NF_CONNTRACK_IRC=y
541CONFIG_NF_CONNTRACK_SIP=y
542CONFIG_NF_CT_NETLINK=y
543CONFIG_NETFILTER_XTABLES=y
544CONFIG_NETFILTER_XT_TARGET_MARK=y
545CONFIG_NETFILTER_XT_TARGET_NFLOG=y
546CONFIG_NETFILTER_XT_TARGET_SECMARK=y
547CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
548CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
549CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
550CONFIG_NETFILTER_XT_MATCH_MARK=y
551CONFIG_NETFILTER_XT_MATCH_POLICY=y
552CONFIG_NETFILTER_XT_MATCH_STATE=y
553
554#
555# IP: Netfilter Configuration
556#
557CONFIG_NF_CONNTRACK_IPV4=y
558CONFIG_NF_CONNTRACK_PROC_COMPAT=y
559CONFIG_IP_NF_IPTABLES=y
560CONFIG_IP_NF_FILTER=y
561CONFIG_IP_NF_TARGET_REJECT=y
562CONFIG_IP_NF_TARGET_LOG=y
563CONFIG_IP_NF_TARGET_ULOG=y
564CONFIG_NF_NAT=y
565CONFIG_NF_NAT_NEEDED=y
566CONFIG_IP_NF_TARGET_MASQUERADE=y
567CONFIG_NF_NAT_FTP=y
568CONFIG_NF_NAT_IRC=y
569# CONFIG_NF_NAT_TFTP is not set
570# CONFIG_NF_NAT_AMANDA is not set
571# CONFIG_NF_NAT_PPTP is not set
572# CONFIG_NF_NAT_H323 is not set
573CONFIG_NF_NAT_SIP=y
574CONFIG_IP_NF_MANGLE=y
575
576#
577# IPv6: Netfilter Configuration
578#
579CONFIG_NF_CONNTRACK_IPV6=y
580CONFIG_IP6_NF_IPTABLES=y
581CONFIG_IP6_NF_MATCH_IPV6HEADER=y
582CONFIG_IP6_NF_FILTER=y
583CONFIG_IP6_NF_TARGET_LOG=y
584CONFIG_IP6_NF_TARGET_REJECT=y
585CONFIG_IP6_NF_MANGLE=y
341# CONFIG_IP_DCCP is not set 586# CONFIG_IP_DCCP is not set
342# CONFIG_IP_SCTP is not set 587# CONFIG_IP_SCTP is not set
343# CONFIG_TIPC is not set 588# CONFIG_TIPC is not set
@@ -345,6 +590,7 @@ CONFIG_IPV6_SIT=y
345# CONFIG_BRIDGE is not set 590# CONFIG_BRIDGE is not set
346# CONFIG_VLAN_8021Q is not set 591# CONFIG_VLAN_8021Q is not set
347# CONFIG_DECNET is not set 592# CONFIG_DECNET is not set
593CONFIG_LLC=y
348# CONFIG_LLC2 is not set 594# CONFIG_LLC2 is not set
349# CONFIG_IPX is not set 595# CONFIG_IPX is not set
350# CONFIG_ATALK is not set 596# CONFIG_ATALK is not set
@@ -352,28 +598,99 @@ CONFIG_IPV6_SIT=y
352# CONFIG_LAPB is not set 598# CONFIG_LAPB is not set
353# CONFIG_ECONET is not set 599# CONFIG_ECONET is not set
354# CONFIG_WAN_ROUTER is not set 600# CONFIG_WAN_ROUTER is not set
355 601CONFIG_NET_SCHED=y
356# 602
357# QoS and/or fair queueing 603#
358# 604# Queueing/Scheduling
359# CONFIG_NET_SCHED is not set 605#
606# CONFIG_NET_SCH_CBQ is not set
607# CONFIG_NET_SCH_HTB is not set
608# CONFIG_NET_SCH_HFSC is not set
609# CONFIG_NET_SCH_PRIO is not set
610# CONFIG_NET_SCH_RR is not set
611# CONFIG_NET_SCH_RED is not set
612# CONFIG_NET_SCH_SFQ is not set
613# CONFIG_NET_SCH_TEQL is not set
614# CONFIG_NET_SCH_TBF is not set
615# CONFIG_NET_SCH_GRED is not set
616# CONFIG_NET_SCH_DSMARK is not set
617# CONFIG_NET_SCH_NETEM is not set
618# CONFIG_NET_SCH_INGRESS is not set
619
620#
621# Classification
622#
623CONFIG_NET_CLS=y
624# CONFIG_NET_CLS_BASIC is not set
625# CONFIG_NET_CLS_TCINDEX is not set
626# CONFIG_NET_CLS_ROUTE4 is not set
627# CONFIG_NET_CLS_FW is not set
628# CONFIG_NET_CLS_U32 is not set
629# CONFIG_NET_CLS_RSVP is not set
630# CONFIG_NET_CLS_RSVP6 is not set
631# CONFIG_NET_CLS_FLOW is not set
632CONFIG_NET_EMATCH=y
633CONFIG_NET_EMATCH_STACK=32
634# CONFIG_NET_EMATCH_CMP is not set
635# CONFIG_NET_EMATCH_NBYTE is not set
636# CONFIG_NET_EMATCH_U32 is not set
637# CONFIG_NET_EMATCH_META is not set
638# CONFIG_NET_EMATCH_TEXT is not set
639CONFIG_NET_CLS_ACT=y
640# CONFIG_NET_ACT_POLICE is not set
641# CONFIG_NET_ACT_GACT is not set
642# CONFIG_NET_ACT_MIRRED is not set
643# CONFIG_NET_ACT_IPT is not set
644# CONFIG_NET_ACT_NAT is not set
645# CONFIG_NET_ACT_PEDIT is not set
646# CONFIG_NET_ACT_SIMP is not set
647CONFIG_NET_SCH_FIFO=y
360 648
361# 649#
362# Network testing 650# Network testing
363# 651#
364# CONFIG_NET_PKTGEN is not set 652# CONFIG_NET_PKTGEN is not set
365# CONFIG_NET_TCPPROBE is not set 653# CONFIG_NET_TCPPROBE is not set
366# CONFIG_HAMRADIO is not set 654CONFIG_HAMRADIO=y
655
656#
657# Packet Radio protocols
658#
659# CONFIG_AX25 is not set
660# CONFIG_CAN is not set
367# CONFIG_IRDA is not set 661# CONFIG_IRDA is not set
368# CONFIG_BT is not set 662# CONFIG_BT is not set
369# CONFIG_AF_RXRPC is not set 663# CONFIG_AF_RXRPC is not set
664CONFIG_FIB_RULES=y
370 665
371# 666#
372# Wireless 667# Wireless
373# 668#
374# CONFIG_CFG80211 is not set 669CONFIG_CFG80211=y
375# CONFIG_WIRELESS_EXT is not set 670CONFIG_NL80211=y
376# CONFIG_MAC80211 is not set 671CONFIG_WIRELESS_EXT=y
672CONFIG_MAC80211=y
673
674#
675# Rate control algorithm selection
676#
677CONFIG_MAC80211_RC_DEFAULT_PID=y
678# CONFIG_MAC80211_RC_DEFAULT_NONE is not set
679
680#
681# Selecting 'y' for an algorithm will
682#
683
684#
685# build the algorithm into mac80211.
686#
687CONFIG_MAC80211_RC_DEFAULT="pid"
688CONFIG_MAC80211_RC_PID=y
689# CONFIG_MAC80211_MESH is not set
690CONFIG_MAC80211_LEDS=y
691# CONFIG_MAC80211_DEBUGFS is not set
692# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set
693# CONFIG_MAC80211_DEBUG is not set
377# CONFIG_IEEE80211 is not set 694# CONFIG_IEEE80211 is not set
378# CONFIG_RFKILL is not set 695# CONFIG_RFKILL is not set
379# CONFIG_NET_9P is not set 696# CONFIG_NET_9P is not set
@@ -385,13 +702,15 @@ CONFIG_IPV6_SIT=y
385# 702#
386# Generic Driver Options 703# Generic Driver Options
387# 704#
705CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
388CONFIG_STANDALONE=y 706CONFIG_STANDALONE=y
389CONFIG_PREVENT_FIRMWARE_BUILD=y 707CONFIG_PREVENT_FIRMWARE_BUILD=y
390CONFIG_FW_LOADER=y 708CONFIG_FW_LOADER=y
391# CONFIG_DEBUG_DRIVER is not set 709# CONFIG_DEBUG_DRIVER is not set
392# CONFIG_DEBUG_DEVRES is not set 710CONFIG_DEBUG_DEVRES=y
393# CONFIG_SYS_HYPERVISOR is not set 711# CONFIG_SYS_HYPERVISOR is not set
394# CONFIG_CONNECTOR is not set 712CONFIG_CONNECTOR=y
713CONFIG_PROC_EVENTS=y
395# CONFIG_MTD is not set 714# CONFIG_MTD is not set
396# CONFIG_PARPORT is not set 715# CONFIG_PARPORT is not set
397CONFIG_PNP=y 716CONFIG_PNP=y
@@ -402,7 +721,7 @@ CONFIG_PNP=y
402# 721#
403CONFIG_PNPACPI=y 722CONFIG_PNPACPI=y
404CONFIG_BLK_DEV=y 723CONFIG_BLK_DEV=y
405CONFIG_BLK_DEV_FD=y 724# CONFIG_BLK_DEV_FD is not set
406# CONFIG_BLK_CPQ_DA is not set 725# CONFIG_BLK_CPQ_DA is not set
407# CONFIG_BLK_CPQ_CISS_DA is not set 726# CONFIG_BLK_CPQ_CISS_DA is not set
408# CONFIG_BLK_DEV_DAC960 is not set 727# CONFIG_BLK_DEV_DAC960 is not set
@@ -415,8 +734,8 @@ CONFIG_BLK_DEV_LOOP=y
415# CONFIG_BLK_DEV_UB is not set 734# CONFIG_BLK_DEV_UB is not set
416CONFIG_BLK_DEV_RAM=y 735CONFIG_BLK_DEV_RAM=y
417CONFIG_BLK_DEV_RAM_COUNT=16 736CONFIG_BLK_DEV_RAM_COUNT=16
418CONFIG_BLK_DEV_RAM_SIZE=4096 737CONFIG_BLK_DEV_RAM_SIZE=16384
419CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 738# CONFIG_BLK_DEV_XIP is not set
420# CONFIG_CDROM_PKTCDVD is not set 739# CONFIG_CDROM_PKTCDVD is not set
421# CONFIG_ATA_OVER_ETH is not set 740# CONFIG_ATA_OVER_ETH is not set
422CONFIG_MISC_DEVICES=y 741CONFIG_MISC_DEVICES=y
@@ -425,72 +744,16 @@ CONFIG_MISC_DEVICES=y
425# CONFIG_EEPROM_93CX6 is not set 744# CONFIG_EEPROM_93CX6 is not set
426# CONFIG_SGI_IOC4 is not set 745# CONFIG_SGI_IOC4 is not set
427# CONFIG_TIFM_CORE is not set 746# CONFIG_TIFM_CORE is not set
747# CONFIG_ACER_WMI is not set
748# CONFIG_ASUS_LAPTOP is not set
749# CONFIG_FUJITSU_LAPTOP is not set
750# CONFIG_MSI_LAPTOP is not set
428# CONFIG_SONY_LAPTOP is not set 751# CONFIG_SONY_LAPTOP is not set
429# CONFIG_THINKPAD_ACPI is not set 752# CONFIG_THINKPAD_ACPI is not set
430CONFIG_IDE=y 753# CONFIG_INTEL_MENLOW is not set
431CONFIG_BLK_DEV_IDE=y 754# CONFIG_ENCLOSURE_SERVICES is not set
432 755CONFIG_HAVE_IDE=y
433# 756# CONFIG_IDE is not set
434# Please see Documentation/ide.txt for help/info on IDE drives
435#
436# CONFIG_BLK_DEV_IDE_SATA is not set
437# CONFIG_BLK_DEV_HD_IDE is not set
438CONFIG_BLK_DEV_IDEDISK=y
439CONFIG_IDEDISK_MULTI_MODE=y
440CONFIG_BLK_DEV_IDECD=y
441# CONFIG_BLK_DEV_IDETAPE is not set
442# CONFIG_BLK_DEV_IDEFLOPPY is not set
443# CONFIG_BLK_DEV_IDESCSI is not set
444CONFIG_BLK_DEV_IDEACPI=y
445# CONFIG_IDE_TASK_IOCTL is not set
446CONFIG_IDE_PROC_FS=y
447
448#
449# IDE chipset support/bugfixes
450#
451CONFIG_IDE_GENERIC=y
452# CONFIG_BLK_DEV_CMD640 is not set
453# CONFIG_BLK_DEV_IDEPNP is not set
454CONFIG_BLK_DEV_IDEPCI=y
455# CONFIG_IDEPCI_SHARE_IRQ is not set
456CONFIG_IDEPCI_PCIBUS_ORDER=y
457# CONFIG_BLK_DEV_OFFBOARD is not set
458# CONFIG_BLK_DEV_GENERIC is not set
459# CONFIG_BLK_DEV_OPTI621 is not set
460# CONFIG_BLK_DEV_RZ1000 is not set
461CONFIG_BLK_DEV_IDEDMA_PCI=y
462# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
463# CONFIG_IDEDMA_ONLYDISK is not set
464# CONFIG_BLK_DEV_AEC62XX is not set
465# CONFIG_BLK_DEV_ALI15X3 is not set
466CONFIG_BLK_DEV_AMD74XX=y
467CONFIG_BLK_DEV_ATIIXP=y
468# CONFIG_BLK_DEV_CMD64X is not set
469# CONFIG_BLK_DEV_TRIFLEX is not set
470# CONFIG_BLK_DEV_CY82C693 is not set
471# CONFIG_BLK_DEV_CS5520 is not set
472# CONFIG_BLK_DEV_CS5530 is not set
473# CONFIG_BLK_DEV_HPT34X is not set
474# CONFIG_BLK_DEV_HPT366 is not set
475# CONFIG_BLK_DEV_JMICRON is not set
476# CONFIG_BLK_DEV_SC1200 is not set
477CONFIG_BLK_DEV_PIIX=y
478# CONFIG_BLK_DEV_IT8213 is not set
479# CONFIG_BLK_DEV_IT821X is not set
480# CONFIG_BLK_DEV_NS87415 is not set
481# CONFIG_BLK_DEV_PDC202XX_OLD is not set
482CONFIG_BLK_DEV_PDC202XX_NEW=y
483# CONFIG_BLK_DEV_SVWKS is not set
484# CONFIG_BLK_DEV_SIIMAGE is not set
485# CONFIG_BLK_DEV_SIS5513 is not set
486# CONFIG_BLK_DEV_SLC90E66 is not set
487# CONFIG_BLK_DEV_TRM290 is not set
488# CONFIG_BLK_DEV_VIA82CXXX is not set
489# CONFIG_BLK_DEV_TC86C001 is not set
490# CONFIG_IDE_ARM is not set
491CONFIG_BLK_DEV_IDEDMA=y
492# CONFIG_IDEDMA_IVB is not set
493# CONFIG_BLK_DEV_HD is not set
494 757
495# 758#
496# SCSI device support 759# SCSI device support
@@ -499,8 +762,8 @@ CONFIG_BLK_DEV_IDEDMA=y
499CONFIG_SCSI=y 762CONFIG_SCSI=y
500CONFIG_SCSI_DMA=y 763CONFIG_SCSI_DMA=y
501# CONFIG_SCSI_TGT is not set 764# CONFIG_SCSI_TGT is not set
502CONFIG_SCSI_NETLINK=y 765# CONFIG_SCSI_NETLINK is not set
503# CONFIG_SCSI_PROC_FS is not set 766CONFIG_SCSI_PROC_FS=y
504 767
505# 768#
506# SCSI support type (disk, tape, CD-ROM) 769# SCSI support type (disk, tape, CD-ROM)
@@ -509,7 +772,7 @@ CONFIG_BLK_DEV_SD=y
509# CONFIG_CHR_DEV_ST is not set 772# CONFIG_CHR_DEV_ST is not set
510# CONFIG_CHR_DEV_OSST is not set 773# CONFIG_CHR_DEV_OSST is not set
511CONFIG_BLK_DEV_SR=y 774CONFIG_BLK_DEV_SR=y
512# CONFIG_BLK_DEV_SR_VENDOR is not set 775CONFIG_BLK_DEV_SR_VENDOR=y
513CONFIG_CHR_DEV_SG=y 776CONFIG_CHR_DEV_SG=y
514# CONFIG_CHR_DEV_SCH is not set 777# CONFIG_CHR_DEV_SCH is not set
515 778
@@ -526,73 +789,37 @@ CONFIG_SCSI_WAIT_SCAN=m
526# SCSI Transports 789# SCSI Transports
527# 790#
528CONFIG_SCSI_SPI_ATTRS=y 791CONFIG_SCSI_SPI_ATTRS=y
529CONFIG_SCSI_FC_ATTRS=y 792# CONFIG_SCSI_FC_ATTRS is not set
530# CONFIG_SCSI_ISCSI_ATTRS is not set 793# CONFIG_SCSI_ISCSI_ATTRS is not set
531CONFIG_SCSI_SAS_ATTRS=y 794# CONFIG_SCSI_SAS_ATTRS is not set
532# CONFIG_SCSI_SAS_LIBSAS is not set 795# CONFIG_SCSI_SAS_LIBSAS is not set
533 796# CONFIG_SCSI_SRP_ATTRS is not set
534# 797# CONFIG_SCSI_LOWLEVEL is not set
535# SCSI low-level drivers 798# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
536#
537# CONFIG_ISCSI_TCP is not set
538# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
539# CONFIG_SCSI_3W_9XXX is not set
540# CONFIG_SCSI_ACARD is not set
541# CONFIG_SCSI_AACRAID is not set
542# CONFIG_SCSI_AIC7XXX is not set
543# CONFIG_SCSI_AIC7XXX_OLD is not set
544CONFIG_SCSI_AIC79XX=y
545CONFIG_AIC79XX_CMDS_PER_DEVICE=32
546CONFIG_AIC79XX_RESET_DELAY_MS=4000
547# CONFIG_AIC79XX_DEBUG_ENABLE is not set
548CONFIG_AIC79XX_DEBUG_MASK=0
549# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set
550# CONFIG_SCSI_AIC94XX is not set
551# CONFIG_SCSI_ARCMSR is not set
552# CONFIG_MEGARAID_NEWGEN is not set
553# CONFIG_MEGARAID_LEGACY is not set
554# CONFIG_MEGARAID_SAS is not set
555# CONFIG_SCSI_HPTIOP is not set
556# CONFIG_SCSI_BUSLOGIC is not set
557# CONFIG_SCSI_DMX3191D is not set
558# CONFIG_SCSI_EATA is not set
559# CONFIG_SCSI_FUTURE_DOMAIN is not set
560# CONFIG_SCSI_GDTH is not set
561# CONFIG_SCSI_IPS is not set
562# CONFIG_SCSI_INITIO is not set
563# CONFIG_SCSI_INIA100 is not set
564# CONFIG_SCSI_STEX is not set
565# CONFIG_SCSI_SYM53C8XX_2 is not set
566# CONFIG_SCSI_IPR is not set
567# CONFIG_SCSI_QLOGIC_1280 is not set
568# CONFIG_SCSI_QLA_FC is not set
569# CONFIG_SCSI_QLA_ISCSI is not set
570# CONFIG_SCSI_LPFC is not set
571# CONFIG_SCSI_DC395x is not set
572# CONFIG_SCSI_DC390T is not set
573# CONFIG_SCSI_DEBUG is not set
574# CONFIG_SCSI_SRP is not set
575CONFIG_ATA=y 799CONFIG_ATA=y
576# CONFIG_ATA_NONSTANDARD is not set 800# CONFIG_ATA_NONSTANDARD is not set
577CONFIG_ATA_ACPI=y 801CONFIG_ATA_ACPI=y
802CONFIG_SATA_PMP=y
578CONFIG_SATA_AHCI=y 803CONFIG_SATA_AHCI=y
579CONFIG_SATA_SVW=y 804# CONFIG_SATA_SIL24 is not set
805CONFIG_ATA_SFF=y
806# CONFIG_SATA_SVW is not set
580CONFIG_ATA_PIIX=y 807CONFIG_ATA_PIIX=y
581# CONFIG_SATA_MV is not set 808# CONFIG_SATA_MV is not set
582CONFIG_SATA_NV=y 809# CONFIG_SATA_NV is not set
583# CONFIG_PDC_ADMA is not set 810# CONFIG_PDC_ADMA is not set
584# CONFIG_SATA_QSTOR is not set 811# CONFIG_SATA_QSTOR is not set
585# CONFIG_SATA_PROMISE is not set 812# CONFIG_SATA_PROMISE is not set
586# CONFIG_SATA_SX4 is not set 813# CONFIG_SATA_SX4 is not set
587CONFIG_SATA_SIL=y 814# CONFIG_SATA_SIL is not set
588# CONFIG_SATA_SIL24 is not set
589# CONFIG_SATA_SIS is not set 815# CONFIG_SATA_SIS is not set
590# CONFIG_SATA_ULI is not set 816# CONFIG_SATA_ULI is not set
591CONFIG_SATA_VIA=y 817# CONFIG_SATA_VIA is not set
592# CONFIG_SATA_VITESSE is not set 818# CONFIG_SATA_VITESSE is not set
593# CONFIG_SATA_INIC162X is not set 819# CONFIG_SATA_INIC162X is not set
820# CONFIG_PATA_ACPI is not set
594# CONFIG_PATA_ALI is not set 821# CONFIG_PATA_ALI is not set
595# CONFIG_PATA_AMD is not set 822CONFIG_PATA_AMD=y
596# CONFIG_PATA_ARTOP is not set 823# CONFIG_PATA_ARTOP is not set
597# CONFIG_PATA_ATIIXP is not set 824# CONFIG_PATA_ATIIXP is not set
598# CONFIG_PATA_CMD640_PCI is not set 825# CONFIG_PATA_CMD640_PCI is not set
@@ -612,11 +839,14 @@ CONFIG_SATA_VIA=y
612# CONFIG_PATA_TRIFLEX is not set 839# CONFIG_PATA_TRIFLEX is not set
613# CONFIG_PATA_MARVELL is not set 840# CONFIG_PATA_MARVELL is not set
614# CONFIG_PATA_MPIIX is not set 841# CONFIG_PATA_MPIIX is not set
615# CONFIG_PATA_OLDPIIX is not set 842CONFIG_PATA_OLDPIIX=y
616# CONFIG_PATA_NETCELL is not set 843# CONFIG_PATA_NETCELL is not set
844# CONFIG_PATA_NINJA32 is not set
617# CONFIG_PATA_NS87410 is not set 845# CONFIG_PATA_NS87410 is not set
846# CONFIG_PATA_NS87415 is not set
618# CONFIG_PATA_OPTI is not set 847# CONFIG_PATA_OPTI is not set
619# CONFIG_PATA_OPTIDMA is not set 848# CONFIG_PATA_OPTIDMA is not set
849# CONFIG_PATA_PCMCIA is not set
620# CONFIG_PATA_PDC_OLD is not set 850# CONFIG_PATA_PDC_OLD is not set
621# CONFIG_PATA_RADISYS is not set 851# CONFIG_PATA_RADISYS is not set
622# CONFIG_PATA_RZ1000 is not set 852# CONFIG_PATA_RZ1000 is not set
@@ -628,65 +858,42 @@ CONFIG_SATA_VIA=y
628# CONFIG_PATA_VIA is not set 858# CONFIG_PATA_VIA is not set
629# CONFIG_PATA_WINBOND is not set 859# CONFIG_PATA_WINBOND is not set
630CONFIG_MD=y 860CONFIG_MD=y
631# CONFIG_BLK_DEV_MD is not set 861CONFIG_BLK_DEV_MD=y
862# CONFIG_MD_LINEAR is not set
863# CONFIG_MD_RAID0 is not set
864# CONFIG_MD_RAID1 is not set
865# CONFIG_MD_RAID10 is not set
866# CONFIG_MD_RAID456 is not set
867# CONFIG_MD_MULTIPATH is not set
868# CONFIG_MD_FAULTY is not set
632CONFIG_BLK_DEV_DM=y 869CONFIG_BLK_DEV_DM=y
633# CONFIG_DM_DEBUG is not set 870# CONFIG_DM_DEBUG is not set
634# CONFIG_DM_CRYPT is not set 871# CONFIG_DM_CRYPT is not set
635# CONFIG_DM_SNAPSHOT is not set 872# CONFIG_DM_SNAPSHOT is not set
636# CONFIG_DM_MIRROR is not set 873CONFIG_DM_MIRROR=y
637# CONFIG_DM_ZERO is not set 874CONFIG_DM_ZERO=y
638# CONFIG_DM_MULTIPATH is not set 875# CONFIG_DM_MULTIPATH is not set
639# CONFIG_DM_DELAY is not set 876# CONFIG_DM_DELAY is not set
640 877# CONFIG_DM_UEVENT is not set
641# 878# CONFIG_FUSION is not set
642# Fusion MPT device support
643#
644CONFIG_FUSION=y
645CONFIG_FUSION_SPI=y
646# CONFIG_FUSION_FC is not set
647# CONFIG_FUSION_SAS is not set
648CONFIG_FUSION_MAX_SGE=128
649# CONFIG_FUSION_CTL is not set
650 879
651# 880#
652# IEEE 1394 (FireWire) support 881# IEEE 1394 (FireWire) support
653# 882#
654# CONFIG_FIREWIRE is not set 883# CONFIG_FIREWIRE is not set
655CONFIG_IEEE1394=y 884# CONFIG_IEEE1394 is not set
656
657#
658# Subsystem Options
659#
660# CONFIG_IEEE1394_VERBOSEDEBUG is not set
661
662#
663# Controllers
664#
665
666#
667# Texas Instruments PCILynx requires I2C
668#
669CONFIG_IEEE1394_OHCI1394=y
670
671#
672# Protocols
673#
674# CONFIG_IEEE1394_VIDEO1394 is not set
675# CONFIG_IEEE1394_SBP2 is not set
676# CONFIG_IEEE1394_ETH1394_ROM_ENTRY is not set
677# CONFIG_IEEE1394_ETH1394 is not set
678# CONFIG_IEEE1394_DV1394 is not set
679CONFIG_IEEE1394_RAWIO=y
680# CONFIG_I2O is not set 885# CONFIG_I2O is not set
681CONFIG_MACINTOSH_DRIVERS=y 886CONFIG_MACINTOSH_DRIVERS=y
682# CONFIG_MAC_EMUMOUSEBTN is not set 887CONFIG_MAC_EMUMOUSEBTN=y
683CONFIG_NETDEVICES=y 888CONFIG_NETDEVICES=y
684CONFIG_NETDEVICES_MULTIQUEUE=y 889# CONFIG_NETDEVICES_MULTIQUEUE is not set
890# CONFIG_IFB is not set
685# CONFIG_DUMMY is not set 891# CONFIG_DUMMY is not set
686# CONFIG_BONDING is not set 892# CONFIG_BONDING is not set
687# CONFIG_MACVLAN is not set 893# CONFIG_MACVLAN is not set
688# CONFIG_EQUALIZER is not set 894# CONFIG_EQUALIZER is not set
689CONFIG_TUN=y 895# CONFIG_TUN is not set
896# CONFIG_VETH is not set
690# CONFIG_NET_SB1000 is not set 897# CONFIG_NET_SB1000 is not set
691# CONFIG_ARCNET is not set 898# CONFIG_ARCNET is not set
692# CONFIG_PHYLIB is not set 899# CONFIG_PHYLIB is not set
@@ -696,39 +903,40 @@ CONFIG_MII=y
696# CONFIG_SUNGEM is not set 903# CONFIG_SUNGEM is not set
697# CONFIG_CASSINI is not set 904# CONFIG_CASSINI is not set
698CONFIG_NET_VENDOR_3COM=y 905CONFIG_NET_VENDOR_3COM=y
699CONFIG_VORTEX=y 906# CONFIG_VORTEX is not set
700# CONFIG_TYPHOON is not set 907# CONFIG_TYPHOON is not set
701CONFIG_NET_TULIP=y 908CONFIG_NET_TULIP=y
702# CONFIG_DE2104X is not set 909# CONFIG_DE2104X is not set
703CONFIG_TULIP=y 910# CONFIG_TULIP is not set
704# CONFIG_TULIP_MWI is not set
705# CONFIG_TULIP_MMIO is not set
706# CONFIG_TULIP_NAPI is not set
707# CONFIG_DE4X5 is not set 911# CONFIG_DE4X5 is not set
708# CONFIG_WINBOND_840 is not set 912# CONFIG_WINBOND_840 is not set
709# CONFIG_DM9102 is not set 913# CONFIG_DM9102 is not set
710# CONFIG_ULI526X is not set 914# CONFIG_ULI526X is not set
915# CONFIG_PCMCIA_XIRCOM is not set
711# CONFIG_HP100 is not set 916# CONFIG_HP100 is not set
917# CONFIG_IBM_NEW_EMAC_ZMII is not set
918# CONFIG_IBM_NEW_EMAC_RGMII is not set
919# CONFIG_IBM_NEW_EMAC_TAH is not set
920# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
712CONFIG_NET_PCI=y 921CONFIG_NET_PCI=y
713# CONFIG_PCNET32 is not set 922# CONFIG_PCNET32 is not set
714CONFIG_AMD8111_ETH=y 923# CONFIG_AMD8111_ETH is not set
715# CONFIG_AMD8111E_NAPI is not set
716# CONFIG_ADAPTEC_STARFIRE is not set 924# CONFIG_ADAPTEC_STARFIRE is not set
717CONFIG_B44=y 925# CONFIG_B44 is not set
718CONFIG_FORCEDETH=y 926CONFIG_FORCEDETH=y
719# CONFIG_FORCEDETH_NAPI is not set 927# CONFIG_FORCEDETH_NAPI is not set
720# CONFIG_DGRS is not set
721# CONFIG_EEPRO100 is not set 928# CONFIG_EEPRO100 is not set
722CONFIG_E100=y 929CONFIG_E100=y
723# CONFIG_FEALNX is not set 930# CONFIG_FEALNX is not set
724# CONFIG_NATSEMI is not set 931# CONFIG_NATSEMI is not set
725# CONFIG_NE2K_PCI is not set 932# CONFIG_NE2K_PCI is not set
726CONFIG_8139CP=y 933# CONFIG_8139CP is not set
727CONFIG_8139TOO=y 934CONFIG_8139TOO=y
728# CONFIG_8139TOO_PIO is not set 935CONFIG_8139TOO_PIO=y
729# CONFIG_8139TOO_TUNE_TWISTER is not set 936# CONFIG_8139TOO_TUNE_TWISTER is not set
730# CONFIG_8139TOO_8129 is not set 937# CONFIG_8139TOO_8129 is not set
731# CONFIG_8139_OLD_RX_RESET is not set 938# CONFIG_8139_OLD_RX_RESET is not set
939# CONFIG_R6040 is not set
732# CONFIG_SIS900 is not set 940# CONFIG_SIS900 is not set
733# CONFIG_EPIC100 is not set 941# CONFIG_EPIC100 is not set
734# CONFIG_SUNDANCE is not set 942# CONFIG_SUNDANCE is not set
@@ -740,34 +948,74 @@ CONFIG_NETDEV_1000=y
740CONFIG_E1000=y 948CONFIG_E1000=y
741# CONFIG_E1000_NAPI is not set 949# CONFIG_E1000_NAPI is not set
742# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set 950# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
951# CONFIG_E1000E is not set
952# CONFIG_E1000E_ENABLED is not set
953# CONFIG_IP1000 is not set
954# CONFIG_IGB is not set
743# CONFIG_NS83820 is not set 955# CONFIG_NS83820 is not set
744# CONFIG_HAMACHI is not set 956# CONFIG_HAMACHI is not set
745# CONFIG_YELLOWFIN is not set 957# CONFIG_YELLOWFIN is not set
746# CONFIG_R8169 is not set 958# CONFIG_R8169 is not set
747# CONFIG_SIS190 is not set 959# CONFIG_SIS190 is not set
748# CONFIG_SKGE is not set 960# CONFIG_SKGE is not set
749# CONFIG_SKY2 is not set 961CONFIG_SKY2=y
962# CONFIG_SKY2_DEBUG is not set
750# CONFIG_VIA_VELOCITY is not set 963# CONFIG_VIA_VELOCITY is not set
751CONFIG_TIGON3=y 964CONFIG_TIGON3=y
752CONFIG_BNX2=y 965# CONFIG_BNX2 is not set
753# CONFIG_QLA3XXX is not set 966# CONFIG_QLA3XXX is not set
754# CONFIG_ATL1 is not set 967# CONFIG_ATL1 is not set
755CONFIG_NETDEV_10000=y 968CONFIG_NETDEV_10000=y
756# CONFIG_CHELSIO_T1 is not set 969# CONFIG_CHELSIO_T1 is not set
757# CONFIG_CHELSIO_T3 is not set 970# CONFIG_CHELSIO_T3 is not set
971# CONFIG_IXGBE is not set
758# CONFIG_IXGB is not set 972# CONFIG_IXGB is not set
759CONFIG_S2IO=m 973# CONFIG_S2IO is not set
760# CONFIG_S2IO_NAPI is not set
761# CONFIG_MYRI10GE is not set 974# CONFIG_MYRI10GE is not set
762# CONFIG_NETXEN_NIC is not set 975# CONFIG_NETXEN_NIC is not set
976# CONFIG_NIU is not set
763# CONFIG_MLX4_CORE is not set 977# CONFIG_MLX4_CORE is not set
764# CONFIG_TR is not set 978# CONFIG_TEHUTI is not set
979# CONFIG_BNX2X is not set
980# CONFIG_SFC is not set
981CONFIG_TR=y
982# CONFIG_IBMOL is not set
983# CONFIG_3C359 is not set
984# CONFIG_TMS380TR is not set
765 985
766# 986#
767# Wireless LAN 987# Wireless LAN
768# 988#
769# CONFIG_WLAN_PRE80211 is not set 989# CONFIG_WLAN_PRE80211 is not set
770# CONFIG_WLAN_80211 is not set 990CONFIG_WLAN_80211=y
991# CONFIG_PCMCIA_RAYCS is not set
992# CONFIG_IPW2100 is not set
993# CONFIG_IPW2200 is not set
994# CONFIG_LIBERTAS is not set
995# CONFIG_AIRO is not set
996# CONFIG_HERMES is not set
997# CONFIG_ATMEL is not set
998# CONFIG_AIRO_CS is not set
999# CONFIG_PCMCIA_WL3501 is not set
1000# CONFIG_PRISM54 is not set
1001# CONFIG_USB_ZD1201 is not set
1002# CONFIG_USB_NET_RNDIS_WLAN is not set
1003# CONFIG_RTL8180 is not set
1004# CONFIG_RTL8187 is not set
1005# CONFIG_ADM8211 is not set
1006# CONFIG_P54_COMMON is not set
1007CONFIG_ATH5K=y
1008# CONFIG_ATH5K_DEBUG is not set
1009# CONFIG_IWLWIFI is not set
1010# CONFIG_IWLCORE is not set
1011# CONFIG_IWLWIFI_LEDS is not set
1012# CONFIG_IWL4965 is not set
1013# CONFIG_IWL3945 is not set
1014# CONFIG_HOSTAP is not set
1015# CONFIG_B43 is not set
1016# CONFIG_B43LEGACY is not set
1017# CONFIG_ZD1211RW is not set
1018# CONFIG_RT2X00 is not set
771 1019
772# 1020#
773# USB Network Adapters 1021# USB Network Adapters
@@ -776,16 +1024,26 @@ CONFIG_S2IO=m
776# CONFIG_USB_KAWETH is not set 1024# CONFIG_USB_KAWETH is not set
777# CONFIG_USB_PEGASUS is not set 1025# CONFIG_USB_PEGASUS is not set
778# CONFIG_USB_RTL8150 is not set 1026# CONFIG_USB_RTL8150 is not set
779# CONFIG_USB_USBNET_MII is not set
780# CONFIG_USB_USBNET is not set 1027# CONFIG_USB_USBNET is not set
1028CONFIG_NET_PCMCIA=y
1029# CONFIG_PCMCIA_3C589 is not set
1030# CONFIG_PCMCIA_3C574 is not set
1031# CONFIG_PCMCIA_FMVJ18X is not set
1032# CONFIG_PCMCIA_PCNET is not set
1033# CONFIG_PCMCIA_NMCLAN is not set
1034# CONFIG_PCMCIA_SMC91C92 is not set
1035# CONFIG_PCMCIA_XIRC2PS is not set
1036# CONFIG_PCMCIA_AXNET is not set
781# CONFIG_WAN is not set 1037# CONFIG_WAN is not set
782# CONFIG_FDDI is not set 1038CONFIG_FDDI=y
1039# CONFIG_DEFXX is not set
1040# CONFIG_SKFP is not set
783# CONFIG_HIPPI is not set 1041# CONFIG_HIPPI is not set
784# CONFIG_PPP is not set 1042# CONFIG_PPP is not set
785# CONFIG_SLIP is not set 1043# CONFIG_SLIP is not set
786# CONFIG_NET_FC is not set 1044# CONFIG_NET_FC is not set
787# CONFIG_SHAPER is not set
788CONFIG_NETCONSOLE=y 1045CONFIG_NETCONSOLE=y
1046# CONFIG_NETCONSOLE_DYNAMIC is not set
789CONFIG_NETPOLL=y 1047CONFIG_NETPOLL=y
790# CONFIG_NETPOLL_TRAP is not set 1048# CONFIG_NETPOLL_TRAP is not set
791CONFIG_NET_POLL_CONTROLLER=y 1049CONFIG_NET_POLL_CONTROLLER=y
@@ -796,18 +1054,17 @@ CONFIG_NET_POLL_CONTROLLER=y
796# Input device support 1054# Input device support
797# 1055#
798CONFIG_INPUT=y 1056CONFIG_INPUT=y
799# CONFIG_INPUT_FF_MEMLESS is not set 1057CONFIG_INPUT_FF_MEMLESS=y
800# CONFIG_INPUT_POLLDEV is not set 1058CONFIG_INPUT_POLLDEV=y
801 1059
802# 1060#
803# Userland interfaces 1061# Userland interfaces
804# 1062#
805CONFIG_INPUT_MOUSEDEV=y 1063CONFIG_INPUT_MOUSEDEV=y
806CONFIG_INPUT_MOUSEDEV_PSAUX=y 1064# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
807CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 1065CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
808CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 1066CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
809# CONFIG_INPUT_JOYDEV is not set 1067# CONFIG_INPUT_JOYDEV is not set
810# CONFIG_INPUT_TSDEV is not set
811CONFIG_INPUT_EVDEV=y 1068CONFIG_INPUT_EVDEV=y
812# CONFIG_INPUT_EVBUG is not set 1069# CONFIG_INPUT_EVBUG is not set
813 1070
@@ -832,17 +1089,62 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y
832# CONFIG_MOUSE_SERIAL is not set 1089# CONFIG_MOUSE_SERIAL is not set
833# CONFIG_MOUSE_APPLETOUCH is not set 1090# CONFIG_MOUSE_APPLETOUCH is not set
834# CONFIG_MOUSE_VSXXXAA is not set 1091# CONFIG_MOUSE_VSXXXAA is not set
835# CONFIG_INPUT_JOYSTICK is not set 1092CONFIG_INPUT_JOYSTICK=y
836# CONFIG_INPUT_TABLET is not set 1093# CONFIG_JOYSTICK_ANALOG is not set
837# CONFIG_INPUT_TOUCHSCREEN is not set 1094# CONFIG_JOYSTICK_A3D is not set
838# CONFIG_INPUT_MISC is not set 1095# CONFIG_JOYSTICK_ADI is not set
1096# CONFIG_JOYSTICK_COBRA is not set
1097# CONFIG_JOYSTICK_GF2K is not set
1098# CONFIG_JOYSTICK_GRIP is not set
1099# CONFIG_JOYSTICK_GRIP_MP is not set
1100# CONFIG_JOYSTICK_GUILLEMOT is not set
1101# CONFIG_JOYSTICK_INTERACT is not set
1102# CONFIG_JOYSTICK_SIDEWINDER is not set
1103# CONFIG_JOYSTICK_TMDC is not set
1104# CONFIG_JOYSTICK_IFORCE is not set
1105# CONFIG_JOYSTICK_WARRIOR is not set
1106# CONFIG_JOYSTICK_MAGELLAN is not set
1107# CONFIG_JOYSTICK_SPACEORB is not set
1108# CONFIG_JOYSTICK_SPACEBALL is not set
1109# CONFIG_JOYSTICK_STINGER is not set
1110# CONFIG_JOYSTICK_TWIDJOY is not set
1111# CONFIG_JOYSTICK_ZHENHUA is not set
1112# CONFIG_JOYSTICK_JOYDUMP is not set
1113# CONFIG_JOYSTICK_XPAD is not set
1114CONFIG_INPUT_TABLET=y
1115# CONFIG_TABLET_USB_ACECAD is not set
1116# CONFIG_TABLET_USB_AIPTEK is not set
1117# CONFIG_TABLET_USB_GTCO is not set
1118# CONFIG_TABLET_USB_KBTAB is not set
1119# CONFIG_TABLET_USB_WACOM is not set
1120CONFIG_INPUT_TOUCHSCREEN=y
1121# CONFIG_TOUCHSCREEN_FUJITSU is not set
1122# CONFIG_TOUCHSCREEN_GUNZE is not set
1123# CONFIG_TOUCHSCREEN_ELO is not set
1124# CONFIG_TOUCHSCREEN_MTOUCH is not set
1125# CONFIG_TOUCHSCREEN_MK712 is not set
1126# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1127# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1128# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1129# CONFIG_TOUCHSCREEN_UCB1400 is not set
1130# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1131CONFIG_INPUT_MISC=y
1132# CONFIG_INPUT_PCSPKR is not set
1133# CONFIG_INPUT_APANEL is not set
1134# CONFIG_INPUT_ATLAS_BTNS is not set
1135# CONFIG_INPUT_ATI_REMOTE is not set
1136# CONFIG_INPUT_ATI_REMOTE2 is not set
1137# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1138# CONFIG_INPUT_POWERMATE is not set
1139# CONFIG_INPUT_YEALINK is not set
1140# CONFIG_INPUT_UINPUT is not set
839 1141
840# 1142#
841# Hardware I/O ports 1143# Hardware I/O ports
842# 1144#
843CONFIG_SERIO=y 1145CONFIG_SERIO=y
844CONFIG_SERIO_I8042=y 1146CONFIG_SERIO_I8042=y
845# CONFIG_SERIO_SERPORT is not set 1147CONFIG_SERIO_SERPORT=y
846# CONFIG_SERIO_CT82C710 is not set 1148# CONFIG_SERIO_CT82C710 is not set
847# CONFIG_SERIO_PCIPS2 is not set 1149# CONFIG_SERIO_PCIPS2 is not set
848CONFIG_SERIO_LIBPS2=y 1150CONFIG_SERIO_LIBPS2=y
@@ -855,8 +1157,26 @@ CONFIG_SERIO_LIBPS2=y
855CONFIG_VT=y 1157CONFIG_VT=y
856CONFIG_VT_CONSOLE=y 1158CONFIG_VT_CONSOLE=y
857CONFIG_HW_CONSOLE=y 1159CONFIG_HW_CONSOLE=y
858# CONFIG_VT_HW_CONSOLE_BINDING is not set 1160CONFIG_VT_HW_CONSOLE_BINDING=y
859# CONFIG_SERIAL_NONSTANDARD is not set 1161CONFIG_DEVKMEM=y
1162CONFIG_SERIAL_NONSTANDARD=y
1163# CONFIG_COMPUTONE is not set
1164# CONFIG_ROCKETPORT is not set
1165# CONFIG_CYCLADES is not set
1166# CONFIG_DIGIEPCA is not set
1167# CONFIG_MOXA_INTELLIO is not set
1168# CONFIG_MOXA_SMARTIO is not set
1169# CONFIG_ISI is not set
1170# CONFIG_SYNCLINK is not set
1171# CONFIG_SYNCLINKMP is not set
1172# CONFIG_SYNCLINK_GT is not set
1173# CONFIG_N_HDLC is not set
1174# CONFIG_RISCOM8 is not set
1175# CONFIG_SPECIALIX is not set
1176# CONFIG_SX is not set
1177# CONFIG_RIO is not set
1178# CONFIG_STALDRV is not set
1179# CONFIG_NOZOMI is not set
860 1180
861# 1181#
862# Serial drivers 1182# Serial drivers
@@ -866,9 +1186,14 @@ CONFIG_SERIAL_8250_CONSOLE=y
866CONFIG_FIX_EARLYCON_MEM=y 1186CONFIG_FIX_EARLYCON_MEM=y
867CONFIG_SERIAL_8250_PCI=y 1187CONFIG_SERIAL_8250_PCI=y
868CONFIG_SERIAL_8250_PNP=y 1188CONFIG_SERIAL_8250_PNP=y
869CONFIG_SERIAL_8250_NR_UARTS=4 1189# CONFIG_SERIAL_8250_CS is not set
1190CONFIG_SERIAL_8250_NR_UARTS=32
870CONFIG_SERIAL_8250_RUNTIME_UARTS=4 1191CONFIG_SERIAL_8250_RUNTIME_UARTS=4
871# CONFIG_SERIAL_8250_EXTENDED is not set 1192CONFIG_SERIAL_8250_EXTENDED=y
1193CONFIG_SERIAL_8250_MANY_PORTS=y
1194CONFIG_SERIAL_8250_SHARE_IRQ=y
1195CONFIG_SERIAL_8250_DETECT_IRQ=y
1196CONFIG_SERIAL_8250_RSA=y
872 1197
873# 1198#
874# Non-8250 serial port support 1199# Non-8250 serial port support
@@ -877,78 +1202,260 @@ CONFIG_SERIAL_CORE=y
877CONFIG_SERIAL_CORE_CONSOLE=y 1202CONFIG_SERIAL_CORE_CONSOLE=y
878# CONFIG_SERIAL_JSM is not set 1203# CONFIG_SERIAL_JSM is not set
879CONFIG_UNIX98_PTYS=y 1204CONFIG_UNIX98_PTYS=y
880CONFIG_LEGACY_PTYS=y 1205# CONFIG_LEGACY_PTYS is not set
881CONFIG_LEGACY_PTY_COUNT=256
882# CONFIG_IPMI_HANDLER is not set 1206# CONFIG_IPMI_HANDLER is not set
883# CONFIG_WATCHDOG is not set
884CONFIG_HW_RANDOM=y 1207CONFIG_HW_RANDOM=y
885CONFIG_HW_RANDOM_INTEL=y 1208# CONFIG_HW_RANDOM_INTEL is not set
886CONFIG_HW_RANDOM_AMD=y 1209# CONFIG_HW_RANDOM_AMD is not set
887# CONFIG_NVRAM is not set 1210CONFIG_NVRAM=y
888CONFIG_RTC=y
889# CONFIG_R3964 is not set 1211# CONFIG_R3964 is not set
890# CONFIG_APPLICOM is not set 1212# CONFIG_APPLICOM is not set
891CONFIG_AGP=y 1213
892CONFIG_AGP_AMD64=y 1214#
893CONFIG_AGP_INTEL=y 1215# PCMCIA character devices
894# CONFIG_AGP_SIS is not set 1216#
895# CONFIG_AGP_VIA is not set 1217# CONFIG_SYNCLINK_CS is not set
896# CONFIG_DRM is not set 1218# CONFIG_CARDMAN_4000 is not set
1219# CONFIG_CARDMAN_4040 is not set
1220# CONFIG_IPWIRELESS is not set
897# CONFIG_MWAVE is not set 1221# CONFIG_MWAVE is not set
898# CONFIG_PC8736x_GPIO is not set 1222# CONFIG_PC8736x_GPIO is not set
899CONFIG_RAW_DRIVER=y 1223# CONFIG_RAW_DRIVER is not set
900CONFIG_MAX_RAW_DEVS=256
901CONFIG_HPET=y 1224CONFIG_HPET=y
902# CONFIG_HPET_RTC_IRQ is not set 1225# CONFIG_HPET_RTC_IRQ is not set
903CONFIG_HPET_MMAP=y 1226# CONFIG_HPET_MMAP is not set
904# CONFIG_HANGCHECK_TIMER is not set 1227# CONFIG_HANGCHECK_TIMER is not set
905# CONFIG_TCG_TPM is not set 1228# CONFIG_TCG_TPM is not set
906# CONFIG_TELCLOCK is not set 1229# CONFIG_TELCLOCK is not set
907CONFIG_DEVPORT=y 1230CONFIG_DEVPORT=y
908# CONFIG_I2C is not set 1231CONFIG_I2C=y
909 1232CONFIG_I2C_BOARDINFO=y
910# 1233# CONFIG_I2C_CHARDEV is not set
911# SPI support 1234
912# 1235#
1236# I2C Hardware Bus support
1237#
1238# CONFIG_I2C_ALI1535 is not set
1239# CONFIG_I2C_ALI1563 is not set
1240# CONFIG_I2C_ALI15X3 is not set
1241# CONFIG_I2C_AMD756 is not set
1242# CONFIG_I2C_AMD8111 is not set
1243CONFIG_I2C_I801=y
1244# CONFIG_I2C_I810 is not set
1245# CONFIG_I2C_PIIX4 is not set
1246# CONFIG_I2C_NFORCE2 is not set
1247# CONFIG_I2C_OCORES is not set
1248# CONFIG_I2C_PARPORT_LIGHT is not set
1249# CONFIG_I2C_PROSAVAGE is not set
1250# CONFIG_I2C_SAVAGE4 is not set
1251# CONFIG_I2C_SIMTEC is not set
1252# CONFIG_I2C_SIS5595 is not set
1253# CONFIG_I2C_SIS630 is not set
1254# CONFIG_I2C_SIS96X is not set
1255# CONFIG_I2C_TAOS_EVM is not set
1256# CONFIG_I2C_STUB is not set
1257# CONFIG_I2C_TINY_USB is not set
1258# CONFIG_I2C_VIA is not set
1259# CONFIG_I2C_VIAPRO is not set
1260# CONFIG_I2C_VOODOO3 is not set
1261# CONFIG_I2C_PCA_PLATFORM is not set
1262
1263#
1264# Miscellaneous I2C Chip support
1265#
1266# CONFIG_DS1682 is not set
1267# CONFIG_SENSORS_EEPROM is not set
1268# CONFIG_SENSORS_PCF8574 is not set
1269# CONFIG_PCF8575 is not set
1270# CONFIG_SENSORS_PCF8591 is not set
1271# CONFIG_SENSORS_MAX6875 is not set
1272# CONFIG_SENSORS_TSL2550 is not set
1273# CONFIG_I2C_DEBUG_CORE is not set
1274# CONFIG_I2C_DEBUG_ALGO is not set
1275# CONFIG_I2C_DEBUG_BUS is not set
1276# CONFIG_I2C_DEBUG_CHIP is not set
913# CONFIG_SPI is not set 1277# CONFIG_SPI is not set
914# CONFIG_SPI_MASTER is not set
915# CONFIG_W1 is not set 1278# CONFIG_W1 is not set
916# CONFIG_POWER_SUPPLY is not set 1279CONFIG_POWER_SUPPLY=y
1280# CONFIG_POWER_SUPPLY_DEBUG is not set
1281# CONFIG_PDA_POWER is not set
1282# CONFIG_BATTERY_DS2760 is not set
917# CONFIG_HWMON is not set 1283# CONFIG_HWMON is not set
1284CONFIG_THERMAL=y
1285CONFIG_WATCHDOG=y
1286# CONFIG_WATCHDOG_NOWAYOUT is not set
1287
1288#
1289# Watchdog Device Drivers
1290#
1291# CONFIG_SOFT_WATCHDOG is not set
1292# CONFIG_ACQUIRE_WDT is not set
1293# CONFIG_ADVANTECH_WDT is not set
1294# CONFIG_ALIM1535_WDT is not set
1295# CONFIG_ALIM7101_WDT is not set
1296# CONFIG_SC520_WDT is not set
1297# CONFIG_EUROTECH_WDT is not set
1298# CONFIG_IB700_WDT is not set
1299# CONFIG_IBMASR is not set
1300# CONFIG_WAFER_WDT is not set
1301# CONFIG_I6300ESB_WDT is not set
1302# CONFIG_ITCO_WDT is not set
1303# CONFIG_IT8712F_WDT is not set
1304# CONFIG_HP_WATCHDOG is not set
1305# CONFIG_SC1200_WDT is not set
1306# CONFIG_PC87413_WDT is not set
1307# CONFIG_60XX_WDT is not set
1308# CONFIG_SBC8360_WDT is not set
1309# CONFIG_CPU5_WDT is not set
1310# CONFIG_SMSC37B787_WDT is not set
1311# CONFIG_W83627HF_WDT is not set
1312# CONFIG_W83697HF_WDT is not set
1313# CONFIG_W83877F_WDT is not set
1314# CONFIG_W83977F_WDT is not set
1315# CONFIG_MACHZ_WDT is not set
1316# CONFIG_SBC_EPX_C3_WATCHDOG is not set
1317
1318#
1319# PCI-based Watchdog Cards
1320#
1321# CONFIG_PCIPCWATCHDOG is not set
1322# CONFIG_WDTPCI is not set
1323
1324#
1325# USB-based Watchdog Cards
1326#
1327# CONFIG_USBPCWATCHDOG is not set
1328
1329#
1330# Sonics Silicon Backplane
1331#
1332CONFIG_SSB_POSSIBLE=y
1333# CONFIG_SSB is not set
918 1334
919# 1335#
920# Multifunction device drivers 1336# Multifunction device drivers
921# 1337#
922# CONFIG_MFD_SM501 is not set 1338# CONFIG_MFD_SM501 is not set
1339# CONFIG_HTC_PASIC3 is not set
923 1340
924# 1341#
925# Multimedia devices 1342# Multimedia devices
926# 1343#
1344
1345#
1346# Multimedia core support
1347#
927# CONFIG_VIDEO_DEV is not set 1348# CONFIG_VIDEO_DEV is not set
928# CONFIG_DVB_CORE is not set 1349# CONFIG_DVB_CORE is not set
1350
1351#
1352# Multimedia drivers
1353#
929CONFIG_DAB=y 1354CONFIG_DAB=y
930# CONFIG_USB_DABUSB is not set 1355# CONFIG_USB_DABUSB is not set
931 1356
932# 1357#
933# Graphics support 1358# Graphics support
934# 1359#
935# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 1360CONFIG_AGP=y
1361CONFIG_AGP_AMD64=y
1362CONFIG_AGP_INTEL=y
1363# CONFIG_AGP_SIS is not set
1364# CONFIG_AGP_VIA is not set
1365CONFIG_DRM=y
1366# CONFIG_DRM_TDFX is not set
1367# CONFIG_DRM_R128 is not set
1368# CONFIG_DRM_RADEON is not set
1369# CONFIG_DRM_I810 is not set
1370# CONFIG_DRM_I830 is not set
1371CONFIG_DRM_I915=y
1372# CONFIG_DRM_MGA is not set
1373# CONFIG_DRM_SIS is not set
1374# CONFIG_DRM_VIA is not set
1375# CONFIG_DRM_SAVAGE is not set
1376# CONFIG_VGASTATE is not set
1377# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1378CONFIG_FB=y
1379# CONFIG_FIRMWARE_EDID is not set
1380# CONFIG_FB_DDC is not set
1381CONFIG_FB_CFB_FILLRECT=y
1382CONFIG_FB_CFB_COPYAREA=y
1383CONFIG_FB_CFB_IMAGEBLIT=y
1384# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1385# CONFIG_FB_SYS_FILLRECT is not set
1386# CONFIG_FB_SYS_COPYAREA is not set
1387# CONFIG_FB_SYS_IMAGEBLIT is not set
1388# CONFIG_FB_FOREIGN_ENDIAN is not set
1389# CONFIG_FB_SYS_FOPS is not set
1390CONFIG_FB_DEFERRED_IO=y
1391# CONFIG_FB_SVGALIB is not set
1392# CONFIG_FB_MACMODES is not set
1393# CONFIG_FB_BACKLIGHT is not set
1394CONFIG_FB_MODE_HELPERS=y
1395CONFIG_FB_TILEBLITTING=y
1396
1397#
1398# Frame buffer hardware drivers
1399#
1400# CONFIG_FB_CIRRUS is not set
1401# CONFIG_FB_PM2 is not set
1402# CONFIG_FB_CYBER2000 is not set
1403# CONFIG_FB_ARC is not set
1404# CONFIG_FB_ASILIANT is not set
1405# CONFIG_FB_IMSTT is not set
1406# CONFIG_FB_VGA16 is not set
1407# CONFIG_FB_UVESA is not set
1408# CONFIG_FB_VESA is not set
1409CONFIG_FB_EFI=y
1410# CONFIG_FB_IMAC is not set
1411# CONFIG_FB_N411 is not set
1412# CONFIG_FB_HGA is not set
1413# CONFIG_FB_S1D13XXX is not set
1414# CONFIG_FB_NVIDIA is not set
1415# CONFIG_FB_RIVA is not set
1416# CONFIG_FB_LE80578 is not set
1417# CONFIG_FB_INTEL is not set
1418# CONFIG_FB_MATROX is not set
1419# CONFIG_FB_RADEON is not set
1420# CONFIG_FB_ATY128 is not set
1421# CONFIG_FB_ATY is not set
1422# CONFIG_FB_S3 is not set
1423# CONFIG_FB_SAVAGE is not set
1424# CONFIG_FB_SIS is not set
1425# CONFIG_FB_NEOMAGIC is not set
1426# CONFIG_FB_KYRO is not set
1427# CONFIG_FB_3DFX is not set
1428# CONFIG_FB_VOODOO1 is not set
1429# CONFIG_FB_VT8623 is not set
1430# CONFIG_FB_TRIDENT is not set
1431# CONFIG_FB_ARK is not set
1432# CONFIG_FB_PM3 is not set
1433# CONFIG_FB_GEODE is not set
1434# CONFIG_FB_VIRTUAL is not set
1435CONFIG_BACKLIGHT_LCD_SUPPORT=y
1436# CONFIG_LCD_CLASS_DEVICE is not set
1437CONFIG_BACKLIGHT_CLASS_DEVICE=y
1438# CONFIG_BACKLIGHT_CORGI is not set
1439# CONFIG_BACKLIGHT_PROGEAR is not set
936 1440
937# 1441#
938# Display device support 1442# Display device support
939# 1443#
940# CONFIG_DISPLAY_SUPPORT is not set 1444# CONFIG_DISPLAY_SUPPORT is not set
941# CONFIG_VGASTATE is not set
942# CONFIG_FB is not set
943 1445
944# 1446#
945# Console display driver support 1447# Console display driver support
946# 1448#
947CONFIG_VGA_CONSOLE=y 1449CONFIG_VGA_CONSOLE=y
948CONFIG_VGACON_SOFT_SCROLLBACK=y 1450CONFIG_VGACON_SOFT_SCROLLBACK=y
949CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=256 1451CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64
950CONFIG_VIDEO_SELECT=y 1452CONFIG_VIDEO_SELECT=y
951CONFIG_DUMMY_CONSOLE=y 1453CONFIG_DUMMY_CONSOLE=y
1454# CONFIG_FRAMEBUFFER_CONSOLE is not set
1455CONFIG_LOGO=y
1456# CONFIG_LOGO_LINUX_MONO is not set
1457# CONFIG_LOGO_LINUX_VGA16 is not set
1458CONFIG_LOGO_LINUX_CLUT224=y
952 1459
953# 1460#
954# Sound 1461# Sound
@@ -958,33 +1465,165 @@ CONFIG_SOUND=y
958# 1465#
959# Advanced Linux Sound Architecture 1466# Advanced Linux Sound Architecture
960# 1467#
961# CONFIG_SND is not set 1468CONFIG_SND=y
1469CONFIG_SND_TIMER=y
1470CONFIG_SND_PCM=y
1471CONFIG_SND_HWDEP=y
1472CONFIG_SND_SEQUENCER=y
1473CONFIG_SND_SEQ_DUMMY=y
1474CONFIG_SND_OSSEMUL=y
1475CONFIG_SND_MIXER_OSS=y
1476CONFIG_SND_PCM_OSS=y
1477CONFIG_SND_PCM_OSS_PLUGINS=y
1478CONFIG_SND_SEQUENCER_OSS=y
1479CONFIG_SND_DYNAMIC_MINORS=y
1480CONFIG_SND_SUPPORT_OLD_API=y
1481CONFIG_SND_VERBOSE_PROCFS=y
1482# CONFIG_SND_VERBOSE_PRINTK is not set
1483# CONFIG_SND_DEBUG is not set
1484CONFIG_SND_VMASTER=y
1485
1486#
1487# Generic devices
1488#
1489# CONFIG_SND_PCSP is not set
1490# CONFIG_SND_DUMMY is not set
1491# CONFIG_SND_VIRMIDI is not set
1492# CONFIG_SND_MTPAV is not set
1493# CONFIG_SND_SERIAL_U16550 is not set
1494# CONFIG_SND_MPU401 is not set
1495
1496#
1497# PCI devices
1498#
1499# CONFIG_SND_AD1889 is not set
1500# CONFIG_SND_ALS300 is not set
1501# CONFIG_SND_ALS4000 is not set
1502# CONFIG_SND_ALI5451 is not set
1503# CONFIG_SND_ATIIXP is not set
1504# CONFIG_SND_ATIIXP_MODEM is not set
1505# CONFIG_SND_AU8810 is not set
1506# CONFIG_SND_AU8820 is not set
1507# CONFIG_SND_AU8830 is not set
1508# CONFIG_SND_AW2 is not set
1509# CONFIG_SND_AZT3328 is not set
1510# CONFIG_SND_BT87X is not set
1511# CONFIG_SND_CA0106 is not set
1512# CONFIG_SND_CMIPCI is not set
1513# CONFIG_SND_OXYGEN is not set
1514# CONFIG_SND_CS4281 is not set
1515# CONFIG_SND_CS46XX is not set
1516# CONFIG_SND_CS5530 is not set
1517# CONFIG_SND_DARLA20 is not set
1518# CONFIG_SND_GINA20 is not set
1519# CONFIG_SND_LAYLA20 is not set
1520# CONFIG_SND_DARLA24 is not set
1521# CONFIG_SND_GINA24 is not set
1522# CONFIG_SND_LAYLA24 is not set
1523# CONFIG_SND_MONA is not set
1524# CONFIG_SND_MIA is not set
1525# CONFIG_SND_ECHO3G is not set
1526# CONFIG_SND_INDIGO is not set
1527# CONFIG_SND_INDIGOIO is not set
1528# CONFIG_SND_INDIGODJ is not set
1529# CONFIG_SND_EMU10K1 is not set
1530# CONFIG_SND_EMU10K1X is not set
1531# CONFIG_SND_ENS1370 is not set
1532# CONFIG_SND_ENS1371 is not set
1533# CONFIG_SND_ES1938 is not set
1534# CONFIG_SND_ES1968 is not set
1535# CONFIG_SND_FM801 is not set
1536CONFIG_SND_HDA_INTEL=y
1537CONFIG_SND_HDA_HWDEP=y
1538CONFIG_SND_HDA_CODEC_REALTEK=y
1539CONFIG_SND_HDA_CODEC_ANALOG=y
1540CONFIG_SND_HDA_CODEC_SIGMATEL=y
1541CONFIG_SND_HDA_CODEC_VIA=y
1542CONFIG_SND_HDA_CODEC_ATIHDMI=y
1543CONFIG_SND_HDA_CODEC_CONEXANT=y
1544CONFIG_SND_HDA_CODEC_CMEDIA=y
1545CONFIG_SND_HDA_CODEC_SI3054=y
1546CONFIG_SND_HDA_GENERIC=y
1547# CONFIG_SND_HDA_POWER_SAVE is not set
1548# CONFIG_SND_HDSP is not set
1549# CONFIG_SND_HDSPM is not set
1550# CONFIG_SND_HIFIER is not set
1551# CONFIG_SND_ICE1712 is not set
1552# CONFIG_SND_ICE1724 is not set
1553# CONFIG_SND_INTEL8X0 is not set
1554# CONFIG_SND_INTEL8X0M is not set
1555# CONFIG_SND_KORG1212 is not set
1556# CONFIG_SND_MAESTRO3 is not set
1557# CONFIG_SND_MIXART is not set
1558# CONFIG_SND_NM256 is not set
1559# CONFIG_SND_PCXHR is not set
1560# CONFIG_SND_RIPTIDE is not set
1561# CONFIG_SND_RME32 is not set
1562# CONFIG_SND_RME96 is not set
1563# CONFIG_SND_RME9652 is not set
1564# CONFIG_SND_SONICVIBES is not set
1565# CONFIG_SND_TRIDENT is not set
1566# CONFIG_SND_VIA82XX is not set
1567# CONFIG_SND_VIA82XX_MODEM is not set
1568# CONFIG_SND_VIRTUOSO is not set
1569# CONFIG_SND_VX222 is not set
1570# CONFIG_SND_YMFPCI is not set
1571
1572#
1573# USB devices
1574#
1575# CONFIG_SND_USB_AUDIO is not set
1576# CONFIG_SND_USB_USX2Y is not set
1577# CONFIG_SND_USB_CAIAQ is not set
1578
1579#
1580# PCMCIA devices
1581#
1582# CONFIG_SND_VXPOCKET is not set
1583# CONFIG_SND_PDAUDIOCF is not set
1584
1585#
1586# System on Chip audio support
1587#
1588# CONFIG_SND_SOC is not set
1589
1590#
1591# ALSA SoC audio for Freescale SOCs
1592#
1593
1594#
1595# SoC Audio for the Texas Instruments OMAP
1596#
962 1597
963# 1598#
964# Open Sound System 1599# Open Sound System
965# 1600#
966CONFIG_SOUND_PRIME=y 1601# CONFIG_SOUND_PRIME is not set
967# CONFIG_SOUND_TRIDENT is not set
968# CONFIG_SOUND_MSNDCLAS is not set
969# CONFIG_SOUND_MSNDPIN is not set
970# CONFIG_SOUND_OSS is not set
971CONFIG_HID_SUPPORT=y 1602CONFIG_HID_SUPPORT=y
972CONFIG_HID=y 1603CONFIG_HID=y
973# CONFIG_HID_DEBUG is not set 1604CONFIG_HID_DEBUG=y
1605CONFIG_HIDRAW=y
974 1606
975# 1607#
976# USB Input Devices 1608# USB Input Devices
977# 1609#
978CONFIG_USB_HID=y 1610CONFIG_USB_HID=y
979# CONFIG_USB_HIDINPUT_POWERBOOK is not set 1611CONFIG_USB_HIDINPUT_POWERBOOK=y
980# CONFIG_HID_FF is not set 1612CONFIG_HID_FF=y
981# CONFIG_USB_HIDDEV is not set 1613CONFIG_HID_PID=y
1614CONFIG_LOGITECH_FF=y
1615# CONFIG_LOGIRUMBLEPAD2_FF is not set
1616CONFIG_PANTHERLORD_FF=y
1617CONFIG_THRUSTMASTER_FF=y
1618CONFIG_ZEROPLUS_FF=y
1619CONFIG_USB_HIDDEV=y
982CONFIG_USB_SUPPORT=y 1620CONFIG_USB_SUPPORT=y
983CONFIG_USB_ARCH_HAS_HCD=y 1621CONFIG_USB_ARCH_HAS_HCD=y
984CONFIG_USB_ARCH_HAS_OHCI=y 1622CONFIG_USB_ARCH_HAS_OHCI=y
985CONFIG_USB_ARCH_HAS_EHCI=y 1623CONFIG_USB_ARCH_HAS_EHCI=y
986CONFIG_USB=y 1624CONFIG_USB=y
987# CONFIG_USB_DEBUG is not set 1625CONFIG_USB_DEBUG=y
1626CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
988 1627
989# 1628#
990# Miscellaneous USB options 1629# Miscellaneous USB options
@@ -992,18 +1631,18 @@ CONFIG_USB=y
992CONFIG_USB_DEVICEFS=y 1631CONFIG_USB_DEVICEFS=y
993# CONFIG_USB_DEVICE_CLASS is not set 1632# CONFIG_USB_DEVICE_CLASS is not set
994# CONFIG_USB_DYNAMIC_MINORS is not set 1633# CONFIG_USB_DYNAMIC_MINORS is not set
995# CONFIG_USB_SUSPEND is not set 1634CONFIG_USB_SUSPEND=y
996# CONFIG_USB_PERSIST is not set
997# CONFIG_USB_OTG is not set 1635# CONFIG_USB_OTG is not set
998 1636
999# 1637#
1000# USB Host Controller Drivers 1638# USB Host Controller Drivers
1001# 1639#
1640# CONFIG_USB_C67X00_HCD is not set
1002CONFIG_USB_EHCI_HCD=y 1641CONFIG_USB_EHCI_HCD=y
1003# CONFIG_USB_EHCI_SPLIT_ISO is not set
1004# CONFIG_USB_EHCI_ROOT_HUB_TT is not set 1642# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1005# CONFIG_USB_EHCI_TT_NEWSCHED is not set 1643# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1006# CONFIG_USB_ISP116X_HCD is not set 1644# CONFIG_USB_ISP116X_HCD is not set
1645# CONFIG_USB_ISP1760_HCD is not set
1007CONFIG_USB_OHCI_HCD=y 1646CONFIG_USB_OHCI_HCD=y
1008# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 1647# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1009# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set 1648# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
@@ -1036,8 +1675,10 @@ CONFIG_USB_STORAGE=y
1036# CONFIG_USB_STORAGE_SDDR55 is not set 1675# CONFIG_USB_STORAGE_SDDR55 is not set
1037# CONFIG_USB_STORAGE_JUMPSHOT is not set 1676# CONFIG_USB_STORAGE_JUMPSHOT is not set
1038# CONFIG_USB_STORAGE_ALAUDA is not set 1677# CONFIG_USB_STORAGE_ALAUDA is not set
1678# CONFIG_USB_STORAGE_ONETOUCH is not set
1039# CONFIG_USB_STORAGE_KARMA is not set 1679# CONFIG_USB_STORAGE_KARMA is not set
1040# CONFIG_USB_LIBUSUAL is not set 1680# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1681CONFIG_USB_LIBUSUAL=y
1041 1682
1042# 1683#
1043# USB Imaging devices 1684# USB Imaging devices
@@ -1049,10 +1690,6 @@ CONFIG_USB_MON=y
1049# 1690#
1050# USB port drivers 1691# USB port drivers
1051# 1692#
1052
1053#
1054# USB Serial Converter support
1055#
1056# CONFIG_USB_SERIAL is not set 1693# CONFIG_USB_SERIAL is not set
1057 1694
1058# 1695#
@@ -1078,98 +1715,126 @@ CONFIG_USB_MON=y
1078# CONFIG_USB_TRANCEVIBRATOR is not set 1715# CONFIG_USB_TRANCEVIBRATOR is not set
1079# CONFIG_USB_IOWARRIOR is not set 1716# CONFIG_USB_IOWARRIOR is not set
1080# CONFIG_USB_TEST is not set 1717# CONFIG_USB_TEST is not set
1718# CONFIG_USB_GADGET is not set
1719# CONFIG_MMC is not set
1720# CONFIG_MEMSTICK is not set
1721CONFIG_NEW_LEDS=y
1722CONFIG_LEDS_CLASS=y
1081 1723
1082# 1724#
1083# USB DSL modem support 1725# LED drivers
1084# 1726#
1727# CONFIG_LEDS_CLEVO_MAIL is not set
1085 1728
1086# 1729#
1087# USB Gadget Support 1730# LED Triggers
1088# 1731#
1089# CONFIG_USB_GADGET is not set 1732CONFIG_LEDS_TRIGGERS=y
1090# CONFIG_MMC is not set 1733# CONFIG_LEDS_TRIGGER_TIMER is not set
1734# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1735# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1736# CONFIG_ACCESSIBILITY is not set
1737# CONFIG_INFINIBAND is not set
1738CONFIG_EDAC=y
1091 1739
1092# 1740#
1093# LED devices 1741# Reporting subsystems
1094# 1742#
1095# CONFIG_NEW_LEDS is not set 1743# CONFIG_EDAC_DEBUG is not set
1744# CONFIG_EDAC_MM_EDAC is not set
1745CONFIG_RTC_LIB=y
1746CONFIG_RTC_CLASS=y
1747# CONFIG_RTC_HCTOSYS is not set
1748# CONFIG_RTC_DEBUG is not set
1096 1749
1097# 1750#
1098# LED drivers 1751# RTC interfaces
1099# 1752#
1753CONFIG_RTC_INTF_SYSFS=y
1754CONFIG_RTC_INTF_PROC=y
1755CONFIG_RTC_INTF_DEV=y
1756# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1757# CONFIG_RTC_DRV_TEST is not set
1100 1758
1101# 1759#
1102# LED Triggers 1760# I2C RTC drivers
1103# 1761#
1104# CONFIG_INFINIBAND is not set 1762# CONFIG_RTC_DRV_DS1307 is not set
1105# CONFIG_EDAC is not set 1763# CONFIG_RTC_DRV_DS1374 is not set
1764# CONFIG_RTC_DRV_DS1672 is not set
1765# CONFIG_RTC_DRV_MAX6900 is not set
1766# CONFIG_RTC_DRV_RS5C372 is not set
1767# CONFIG_RTC_DRV_ISL1208 is not set
1768# CONFIG_RTC_DRV_X1205 is not set
1769# CONFIG_RTC_DRV_PCF8563 is not set
1770# CONFIG_RTC_DRV_PCF8583 is not set
1771# CONFIG_RTC_DRV_M41T80 is not set
1772# CONFIG_RTC_DRV_S35390A is not set
1106 1773
1107# 1774#
1108# Real Time Clock 1775# SPI RTC drivers
1109# 1776#
1110# CONFIG_RTC_CLASS is not set
1111 1777
1112# 1778#
1113# DMA Engine support 1779# Platform RTC drivers
1114# 1780#
1115# CONFIG_DMA_ENGINE is not set 1781CONFIG_RTC_DRV_CMOS=y
1782# CONFIG_RTC_DRV_DS1511 is not set
1783# CONFIG_RTC_DRV_DS1553 is not set
1784# CONFIG_RTC_DRV_DS1742 is not set
1785# CONFIG_RTC_DRV_STK17TA8 is not set
1786# CONFIG_RTC_DRV_M48T86 is not set
1787# CONFIG_RTC_DRV_M48T59 is not set
1788# CONFIG_RTC_DRV_V3020 is not set
1116 1789
1117# 1790#
1118# DMA Clients 1791# on-CPU RTC drivers
1119# 1792#
1793CONFIG_DMADEVICES=y
1120 1794
1121# 1795#
1122# DMA Devices 1796# DMA Devices
1123# 1797#
1124CONFIG_VIRTUALIZATION=y 1798# CONFIG_INTEL_IOATDMA is not set
1125# CONFIG_KVM is not set
1126
1127#
1128# Userspace I/O
1129#
1130# CONFIG_UIO is not set 1799# CONFIG_UIO is not set
1131 1800
1132# 1801#
1133# Firmware Drivers 1802# Firmware Drivers
1134# 1803#
1135# CONFIG_EDD is not set 1804# CONFIG_EDD is not set
1805CONFIG_EFI_VARS=y
1136# CONFIG_DELL_RBU is not set 1806# CONFIG_DELL_RBU is not set
1137# CONFIG_DCDBAS is not set 1807# CONFIG_DCDBAS is not set
1138CONFIG_DMIID=y 1808CONFIG_DMIID=y
1809# CONFIG_ISCSI_IBFT_FIND is not set
1139 1810
1140# 1811#
1141# File systems 1812# File systems
1142# 1813#
1143CONFIG_EXT2_FS=y 1814# CONFIG_EXT2_FS is not set
1144CONFIG_EXT2_FS_XATTR=y
1145CONFIG_EXT2_FS_POSIX_ACL=y
1146# CONFIG_EXT2_FS_SECURITY is not set
1147# CONFIG_EXT2_FS_XIP is not set
1148CONFIG_EXT3_FS=y 1815CONFIG_EXT3_FS=y
1149CONFIG_EXT3_FS_XATTR=y 1816CONFIG_EXT3_FS_XATTR=y
1150CONFIG_EXT3_FS_POSIX_ACL=y 1817CONFIG_EXT3_FS_POSIX_ACL=y
1151# CONFIG_EXT3_FS_SECURITY is not set 1818CONFIG_EXT3_FS_SECURITY=y
1152# CONFIG_EXT4DEV_FS is not set 1819# CONFIG_EXT4DEV_FS is not set
1153CONFIG_JBD=y 1820CONFIG_JBD=y
1154# CONFIG_JBD_DEBUG is not set 1821# CONFIG_JBD_DEBUG is not set
1155CONFIG_FS_MBCACHE=y 1822CONFIG_FS_MBCACHE=y
1156CONFIG_REISERFS_FS=y 1823# CONFIG_REISERFS_FS is not set
1157# CONFIG_REISERFS_CHECK is not set
1158# CONFIG_REISERFS_PROC_INFO is not set
1159CONFIG_REISERFS_FS_XATTR=y
1160CONFIG_REISERFS_FS_POSIX_ACL=y
1161# CONFIG_REISERFS_FS_SECURITY is not set
1162# CONFIG_JFS_FS is not set 1824# CONFIG_JFS_FS is not set
1163CONFIG_FS_POSIX_ACL=y 1825CONFIG_FS_POSIX_ACL=y
1164# CONFIG_XFS_FS is not set 1826# CONFIG_XFS_FS is not set
1165# CONFIG_GFS2_FS is not set 1827# CONFIG_GFS2_FS is not set
1166# CONFIG_OCFS2_FS is not set 1828# CONFIG_OCFS2_FS is not set
1167# CONFIG_MINIX_FS is not set 1829CONFIG_DNOTIFY=y
1168# CONFIG_ROMFS_FS is not set
1169CONFIG_INOTIFY=y 1830CONFIG_INOTIFY=y
1170CONFIG_INOTIFY_USER=y 1831CONFIG_INOTIFY_USER=y
1171# CONFIG_QUOTA is not set 1832CONFIG_QUOTA=y
1172CONFIG_DNOTIFY=y 1833CONFIG_QUOTA_NETLINK_INTERFACE=y
1834# CONFIG_PRINT_QUOTA_WARNING is not set
1835# CONFIG_QFMT_V1 is not set
1836CONFIG_QFMT_V2=y
1837CONFIG_QUOTACTL=y
1173# CONFIG_AUTOFS_FS is not set 1838# CONFIG_AUTOFS_FS is not set
1174CONFIG_AUTOFS4_FS=y 1839CONFIG_AUTOFS4_FS=y
1175# CONFIG_FUSE_FS is not set 1840# CONFIG_FUSE_FS is not set
@@ -1180,7 +1845,7 @@ CONFIG_GENERIC_ACL=y
1180# 1845#
1181CONFIG_ISO9660_FS=y 1846CONFIG_ISO9660_FS=y
1182CONFIG_JOLIET=y 1847CONFIG_JOLIET=y
1183# CONFIG_ZISOFS is not set 1848CONFIG_ZISOFS=y
1184# CONFIG_UDF_FS is not set 1849# CONFIG_UDF_FS is not set
1185 1850
1186# 1851#
@@ -1198,13 +1863,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1198# 1863#
1199CONFIG_PROC_FS=y 1864CONFIG_PROC_FS=y
1200CONFIG_PROC_KCORE=y 1865CONFIG_PROC_KCORE=y
1866CONFIG_PROC_VMCORE=y
1201CONFIG_PROC_SYSCTL=y 1867CONFIG_PROC_SYSCTL=y
1202CONFIG_SYSFS=y 1868CONFIG_SYSFS=y
1203CONFIG_TMPFS=y 1869CONFIG_TMPFS=y
1204CONFIG_TMPFS_POSIX_ACL=y 1870CONFIG_TMPFS_POSIX_ACL=y
1205CONFIG_HUGETLBFS=y 1871CONFIG_HUGETLBFS=y
1206CONFIG_HUGETLB_PAGE=y 1872CONFIG_HUGETLB_PAGE=y
1207CONFIG_RAMFS=y
1208# CONFIG_CONFIGFS_FS is not set 1873# CONFIG_CONFIGFS_FS is not set
1209 1874
1210# 1875#
@@ -1212,6 +1877,7 @@ CONFIG_RAMFS=y
1212# 1877#
1213# CONFIG_ADFS_FS is not set 1878# CONFIG_ADFS_FS is not set
1214# CONFIG_AFFS_FS is not set 1879# CONFIG_AFFS_FS is not set
1880# CONFIG_ECRYPT_FS is not set
1215# CONFIG_HFS_FS is not set 1881# CONFIG_HFS_FS is not set
1216# CONFIG_HFSPLUS_FS is not set 1882# CONFIG_HFSPLUS_FS is not set
1217# CONFIG_BEFS_FS is not set 1883# CONFIG_BEFS_FS is not set
@@ -1219,33 +1885,15 @@ CONFIG_RAMFS=y
1219# CONFIG_EFS_FS is not set 1885# CONFIG_EFS_FS is not set
1220# CONFIG_CRAMFS is not set 1886# CONFIG_CRAMFS is not set
1221# CONFIG_VXFS_FS is not set 1887# CONFIG_VXFS_FS is not set
1888# CONFIG_MINIX_FS is not set
1222# CONFIG_HPFS_FS is not set 1889# CONFIG_HPFS_FS is not set
1223# CONFIG_QNX4FS_FS is not set 1890# CONFIG_QNX4FS_FS is not set
1891# CONFIG_ROMFS_FS is not set
1224# CONFIG_SYSV_FS is not set 1892# CONFIG_SYSV_FS is not set
1225# CONFIG_UFS_FS is not set 1893# CONFIG_UFS_FS is not set
1226 1894CONFIG_NETWORK_FILESYSTEMS=y
1227# 1895# CONFIG_NFS_FS is not set
1228# Network File Systems 1896# CONFIG_NFSD is not set
1229#
1230CONFIG_NFS_FS=y
1231CONFIG_NFS_V3=y
1232# CONFIG_NFS_V3_ACL is not set
1233# CONFIG_NFS_V4 is not set
1234# CONFIG_NFS_DIRECTIO is not set
1235CONFIG_NFSD=y
1236CONFIG_NFSD_V3=y
1237# CONFIG_NFSD_V3_ACL is not set
1238# CONFIG_NFSD_V4 is not set
1239CONFIG_NFSD_TCP=y
1240CONFIG_ROOT_NFS=y
1241CONFIG_LOCKD=y
1242CONFIG_LOCKD_V4=y
1243CONFIG_EXPORTFS=y
1244CONFIG_NFS_COMMON=y
1245CONFIG_SUNRPC=y
1246# CONFIG_SUNRPC_BIND34 is not set
1247# CONFIG_RPCSEC_GSS_KRB5 is not set
1248# CONFIG_RPCSEC_GSS_SPKM3 is not set
1249# CONFIG_SMB_FS is not set 1897# CONFIG_SMB_FS is not set
1250# CONFIG_CIFS is not set 1898# CONFIG_CIFS is not set
1251# CONFIG_NCP_FS is not set 1899# CONFIG_NCP_FS is not set
@@ -1255,14 +1903,26 @@ CONFIG_SUNRPC=y
1255# 1903#
1256# Partition Types 1904# Partition Types
1257# 1905#
1258# CONFIG_PARTITION_ADVANCED is not set 1906CONFIG_PARTITION_ADVANCED=y
1907# CONFIG_ACORN_PARTITION is not set
1908CONFIG_OSF_PARTITION=y
1909CONFIG_AMIGA_PARTITION=y
1910# CONFIG_ATARI_PARTITION is not set
1911CONFIG_MAC_PARTITION=y
1259CONFIG_MSDOS_PARTITION=y 1912CONFIG_MSDOS_PARTITION=y
1260 1913CONFIG_BSD_DISKLABEL=y
1261# 1914CONFIG_MINIX_SUBPARTITION=y
1262# Native Language Support 1915CONFIG_SOLARIS_X86_PARTITION=y
1263# 1916CONFIG_UNIXWARE_DISKLABEL=y
1917# CONFIG_LDM_PARTITION is not set
1918CONFIG_SGI_PARTITION=y
1919# CONFIG_ULTRIX_PARTITION is not set
1920CONFIG_SUN_PARTITION=y
1921CONFIG_KARMA_PARTITION=y
1922CONFIG_EFI_PARTITION=y
1923# CONFIG_SYSV68_PARTITION is not set
1264CONFIG_NLS=y 1924CONFIG_NLS=y
1265CONFIG_NLS_DEFAULT="iso8859-1" 1925CONFIG_NLS_DEFAULT="utf8"
1266CONFIG_NLS_CODEPAGE_437=y 1926CONFIG_NLS_CODEPAGE_437=y
1267# CONFIG_NLS_CODEPAGE_737 is not set 1927# CONFIG_NLS_CODEPAGE_737 is not set
1268# CONFIG_NLS_CODEPAGE_775 is not set 1928# CONFIG_NLS_CODEPAGE_775 is not set
@@ -1297,40 +1957,33 @@ CONFIG_NLS_ISO8859_1=y
1297# CONFIG_NLS_ISO8859_9 is not set 1957# CONFIG_NLS_ISO8859_9 is not set
1298# CONFIG_NLS_ISO8859_13 is not set 1958# CONFIG_NLS_ISO8859_13 is not set
1299# CONFIG_NLS_ISO8859_14 is not set 1959# CONFIG_NLS_ISO8859_14 is not set
1300CONFIG_NLS_ISO8859_15=y 1960# CONFIG_NLS_ISO8859_15 is not set
1301# CONFIG_NLS_KOI8_R is not set 1961# CONFIG_NLS_KOI8_R is not set
1302# CONFIG_NLS_KOI8_U is not set 1962# CONFIG_NLS_KOI8_U is not set
1303CONFIG_NLS_UTF8=y 1963CONFIG_NLS_UTF8=y
1304
1305#
1306# Distributed Lock Manager
1307#
1308# CONFIG_DLM is not set 1964# CONFIG_DLM is not set
1309 1965
1310# 1966#
1311# Instrumentation Support
1312#
1313CONFIG_PROFILING=y
1314CONFIG_OPROFILE=y
1315CONFIG_KPROBES=y
1316
1317#
1318# Kernel hacking 1967# Kernel hacking
1319# 1968#
1320CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1969CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1321# CONFIG_PRINTK_TIME is not set 1970# CONFIG_PRINTK_TIME is not set
1971# CONFIG_ENABLE_WARN_DEPRECATED is not set
1322# CONFIG_ENABLE_MUST_CHECK is not set 1972# CONFIG_ENABLE_MUST_CHECK is not set
1973CONFIG_FRAME_WARN=2048
1323CONFIG_MAGIC_SYSRQ=y 1974CONFIG_MAGIC_SYSRQ=y
1324CONFIG_UNUSED_SYMBOLS=y 1975# CONFIG_UNUSED_SYMBOLS is not set
1325CONFIG_DEBUG_FS=y 1976CONFIG_DEBUG_FS=y
1326# CONFIG_HEADERS_CHECK is not set 1977# CONFIG_HEADERS_CHECK is not set
1327CONFIG_DEBUG_KERNEL=y 1978CONFIG_DEBUG_KERNEL=y
1328# CONFIG_DEBUG_SHIRQ is not set 1979# CONFIG_DEBUG_SHIRQ is not set
1329CONFIG_DETECT_SOFTLOCKUP=y 1980# CONFIG_DETECT_SOFTLOCKUP is not set
1330# CONFIG_SCHED_DEBUG is not set 1981# CONFIG_SCHED_DEBUG is not set
1331# CONFIG_SCHEDSTATS is not set 1982CONFIG_SCHEDSTATS=y
1332CONFIG_TIMER_STATS=y 1983CONFIG_TIMER_STATS=y
1333# CONFIG_DEBUG_SLAB is not set 1984# CONFIG_DEBUG_OBJECTS is not set
1985# CONFIG_SLUB_DEBUG_ON is not set
1986# CONFIG_SLUB_STATS is not set
1334# CONFIG_DEBUG_RT_MUTEXES is not set 1987# CONFIG_DEBUG_RT_MUTEXES is not set
1335# CONFIG_RT_MUTEX_TESTER is not set 1988# CONFIG_RT_MUTEX_TESTER is not set
1336# CONFIG_DEBUG_SPINLOCK is not set 1989# CONFIG_DEBUG_SPINLOCK is not set
@@ -1344,28 +1997,162 @@ CONFIG_TIMER_STATS=y
1344CONFIG_DEBUG_BUGVERBOSE=y 1997CONFIG_DEBUG_BUGVERBOSE=y
1345# CONFIG_DEBUG_INFO is not set 1998# CONFIG_DEBUG_INFO is not set
1346# CONFIG_DEBUG_VM is not set 1999# CONFIG_DEBUG_VM is not set
2000# CONFIG_DEBUG_WRITECOUNT is not set
1347# CONFIG_DEBUG_LIST is not set 2001# CONFIG_DEBUG_LIST is not set
1348# CONFIG_FRAME_POINTER is not set 2002# CONFIG_DEBUG_SG is not set
1349CONFIG_OPTIMIZE_INLINING=y 2003CONFIG_FRAME_POINTER=y
2004# CONFIG_BOOT_PRINTK_DELAY is not set
1350# CONFIG_RCU_TORTURE_TEST is not set 2005# CONFIG_RCU_TORTURE_TEST is not set
2006# CONFIG_KPROBES_SANITY_TEST is not set
2007# CONFIG_BACKTRACE_SELF_TEST is not set
1351# CONFIG_LKDTM is not set 2008# CONFIG_LKDTM is not set
1352# CONFIG_FAULT_INJECTION is not set 2009# CONFIG_FAULT_INJECTION is not set
1353# CONFIG_DEBUG_RODATA is not set 2010# CONFIG_LATENCYTOP is not set
1354# CONFIG_IOMMU_DEBUG is not set 2011CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
2012# CONFIG_SAMPLES is not set
2013# CONFIG_KGDB is not set
2014CONFIG_HAVE_ARCH_KGDB=y
2015# CONFIG_NONPROMISC_DEVMEM is not set
2016CONFIG_EARLY_PRINTK=y
1355CONFIG_DEBUG_STACKOVERFLOW=y 2017CONFIG_DEBUG_STACKOVERFLOW=y
1356# CONFIG_DEBUG_STACK_USAGE is not set 2018CONFIG_DEBUG_STACK_USAGE=y
2019# CONFIG_DEBUG_PAGEALLOC is not set
2020# CONFIG_DEBUG_PER_CPU_MAPS is not set
2021# CONFIG_X86_PTDUMP is not set
2022CONFIG_DEBUG_RODATA=y
2023# CONFIG_DIRECT_GBPAGES is not set
2024# CONFIG_DEBUG_RODATA_TEST is not set
2025CONFIG_DEBUG_NX_TEST=m
2026CONFIG_X86_MPPARSE=y
2027# CONFIG_IOMMU_DEBUG is not set
2028CONFIG_IO_DELAY_TYPE_0X80=0
2029CONFIG_IO_DELAY_TYPE_0XED=1
2030CONFIG_IO_DELAY_TYPE_UDELAY=2
2031CONFIG_IO_DELAY_TYPE_NONE=3
2032CONFIG_IO_DELAY_0X80=y
2033# CONFIG_IO_DELAY_0XED is not set
2034# CONFIG_IO_DELAY_UDELAY is not set
2035# CONFIG_IO_DELAY_NONE is not set
2036CONFIG_DEFAULT_IO_DELAY_TYPE=0
2037CONFIG_DEBUG_BOOT_PARAMS=y
2038# CONFIG_CPA_DEBUG is not set
1357 2039
1358# 2040#
1359# Security options 2041# Security options
1360# 2042#
1361# CONFIG_KEYS is not set 2043CONFIG_KEYS=y
1362# CONFIG_SECURITY is not set 2044CONFIG_KEYS_DEBUG_PROC_KEYS=y
1363# CONFIG_CRYPTO is not set 2045CONFIG_SECURITY=y
2046CONFIG_SECURITY_NETWORK=y
2047# CONFIG_SECURITY_NETWORK_XFRM is not set
2048CONFIG_SECURITY_CAPABILITIES=y
2049CONFIG_SECURITY_FILE_CAPABILITIES=y
2050# CONFIG_SECURITY_ROOTPLUG is not set
2051CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
2052CONFIG_SECURITY_SELINUX=y
2053CONFIG_SECURITY_SELINUX_BOOTPARAM=y
2054CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
2055CONFIG_SECURITY_SELINUX_DISABLE=y
2056CONFIG_SECURITY_SELINUX_DEVELOP=y
2057CONFIG_SECURITY_SELINUX_AVC_STATS=y
2058CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
2059# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
2060# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
2061# CONFIG_SECURITY_SMACK is not set
2062CONFIG_CRYPTO=y
2063
2064#
2065# Crypto core or helper
2066#
2067CONFIG_CRYPTO_ALGAPI=y
2068CONFIG_CRYPTO_AEAD=y
2069CONFIG_CRYPTO_BLKCIPHER=y
2070CONFIG_CRYPTO_HASH=y
2071CONFIG_CRYPTO_MANAGER=y
2072# CONFIG_CRYPTO_GF128MUL is not set
2073# CONFIG_CRYPTO_NULL is not set
2074# CONFIG_CRYPTO_CRYPTD is not set
2075CONFIG_CRYPTO_AUTHENC=y
2076# CONFIG_CRYPTO_TEST is not set
2077
2078#
2079# Authenticated Encryption with Associated Data
2080#
2081# CONFIG_CRYPTO_CCM is not set
2082# CONFIG_CRYPTO_GCM is not set
2083# CONFIG_CRYPTO_SEQIV is not set
2084
2085#
2086# Block modes
2087#
2088CONFIG_CRYPTO_CBC=y
2089# CONFIG_CRYPTO_CTR is not set
2090# CONFIG_CRYPTO_CTS is not set
2091CONFIG_CRYPTO_ECB=y
2092# CONFIG_CRYPTO_LRW is not set
2093# CONFIG_CRYPTO_PCBC is not set
2094# CONFIG_CRYPTO_XTS is not set
2095
2096#
2097# Hash modes
2098#
2099CONFIG_CRYPTO_HMAC=y
2100# CONFIG_CRYPTO_XCBC is not set
2101
2102#
2103# Digest
2104#
2105# CONFIG_CRYPTO_CRC32C is not set
2106# CONFIG_CRYPTO_MD4 is not set
2107CONFIG_CRYPTO_MD5=y
2108# CONFIG_CRYPTO_MICHAEL_MIC is not set
2109CONFIG_CRYPTO_SHA1=y
2110# CONFIG_CRYPTO_SHA256 is not set
2111# CONFIG_CRYPTO_SHA512 is not set
2112# CONFIG_CRYPTO_TGR192 is not set
2113# CONFIG_CRYPTO_WP512 is not set
2114
2115#
2116# Ciphers
2117#
2118CONFIG_CRYPTO_AES=y
2119# CONFIG_CRYPTO_AES_X86_64 is not set
2120# CONFIG_CRYPTO_ANUBIS is not set
2121CONFIG_CRYPTO_ARC4=y
2122# CONFIG_CRYPTO_BLOWFISH is not set
2123# CONFIG_CRYPTO_CAMELLIA is not set
2124# CONFIG_CRYPTO_CAST5 is not set
2125# CONFIG_CRYPTO_CAST6 is not set
2126CONFIG_CRYPTO_DES=y
2127# CONFIG_CRYPTO_FCRYPT is not set
2128# CONFIG_CRYPTO_KHAZAD is not set
2129# CONFIG_CRYPTO_SALSA20 is not set
2130# CONFIG_CRYPTO_SALSA20_X86_64 is not set
2131# CONFIG_CRYPTO_SEED is not set
2132# CONFIG_CRYPTO_SERPENT is not set
2133# CONFIG_CRYPTO_TEA is not set
2134# CONFIG_CRYPTO_TWOFISH is not set
2135# CONFIG_CRYPTO_TWOFISH_X86_64 is not set
2136
2137#
2138# Compression
2139#
2140# CONFIG_CRYPTO_DEFLATE is not set
2141# CONFIG_CRYPTO_LZO is not set
2142CONFIG_CRYPTO_HW=y
2143# CONFIG_CRYPTO_DEV_HIFN_795X is not set
2144CONFIG_HAVE_KVM=y
2145CONFIG_VIRTUALIZATION=y
2146# CONFIG_KVM is not set
2147# CONFIG_VIRTIO_PCI is not set
2148# CONFIG_VIRTIO_BALLOON is not set
1364 2149
1365# 2150#
1366# Library routines 2151# Library routines
1367# 2152#
1368CONFIG_BITREVERSE=y 2153CONFIG_BITREVERSE=y
2154CONFIG_GENERIC_FIND_FIRST_BIT=y
2155CONFIG_GENERIC_FIND_NEXT_BIT=y
1369# CONFIG_CRC_CCITT is not set 2156# CONFIG_CRC_CCITT is not set
1370# CONFIG_CRC16 is not set 2157# CONFIG_CRC16 is not set
1371# CONFIG_CRC_ITU_T is not set 2158# CONFIG_CRC_ITU_T is not set
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index b5e329da166c..3aefbce2de48 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -370,13 +370,11 @@ quiet_ni_syscall:
370 PTREGSCALL stub32_rt_sigreturn, sys32_rt_sigreturn, %rdi 370 PTREGSCALL stub32_rt_sigreturn, sys32_rt_sigreturn, %rdi
371 PTREGSCALL stub32_sigreturn, sys32_sigreturn, %rdi 371 PTREGSCALL stub32_sigreturn, sys32_sigreturn, %rdi
372 PTREGSCALL stub32_sigaltstack, sys32_sigaltstack, %rdx 372 PTREGSCALL stub32_sigaltstack, sys32_sigaltstack, %rdx
373 PTREGSCALL stub32_sigsuspend, sys32_sigsuspend, %rcx
374 PTREGSCALL stub32_execve, sys32_execve, %rcx 373 PTREGSCALL stub32_execve, sys32_execve, %rcx
375 PTREGSCALL stub32_fork, sys_fork, %rdi 374 PTREGSCALL stub32_fork, sys_fork, %rdi
376 PTREGSCALL stub32_clone, sys32_clone, %rdx 375 PTREGSCALL stub32_clone, sys32_clone, %rdx
377 PTREGSCALL stub32_vfork, sys_vfork, %rdi 376 PTREGSCALL stub32_vfork, sys_vfork, %rdi
378 PTREGSCALL stub32_iopl, sys_iopl, %rsi 377 PTREGSCALL stub32_iopl, sys_iopl, %rsi
379 PTREGSCALL stub32_rt_sigsuspend, sys_rt_sigsuspend, %rdx
380 378
381ENTRY(ia32_ptregs_common) 379ENTRY(ia32_ptregs_common)
382 popq %r11 380 popq %r11
@@ -476,7 +474,7 @@ ia32_sys_call_table:
476 .quad sys_ssetmask 474 .quad sys_ssetmask
477 .quad sys_setreuid16 /* 70 */ 475 .quad sys_setreuid16 /* 70 */
478 .quad sys_setregid16 476 .quad sys_setregid16
479 .quad stub32_sigsuspend 477 .quad sys32_sigsuspend
480 .quad compat_sys_sigpending 478 .quad compat_sys_sigpending
481 .quad sys_sethostname 479 .quad sys_sethostname
482 .quad compat_sys_setrlimit /* 75 */ 480 .quad compat_sys_setrlimit /* 75 */
@@ -583,7 +581,7 @@ ia32_sys_call_table:
583 .quad sys32_rt_sigpending 581 .quad sys32_rt_sigpending
584 .quad compat_sys_rt_sigtimedwait 582 .quad compat_sys_rt_sigtimedwait
585 .quad sys32_rt_sigqueueinfo 583 .quad sys32_rt_sigqueueinfo
586 .quad stub32_rt_sigsuspend 584 .quad sys_rt_sigsuspend
587 .quad sys32_pread /* 180 */ 585 .quad sys32_pread /* 180 */
588 .quad sys32_pwrite 586 .quad sys32_pwrite
589 .quad sys_chown16 587 .quad sys_chown16
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index bcc2b123dabf..d1d4ee895270 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -18,14 +18,13 @@ CFLAGS_tsc_64.o := $(nostackp)
18obj-y := process_$(BITS).o signal_$(BITS).o entry_$(BITS).o 18obj-y := process_$(BITS).o signal_$(BITS).o entry_$(BITS).o
19obj-y += traps_$(BITS).o irq_$(BITS).o 19obj-y += traps_$(BITS).o irq_$(BITS).o
20obj-y += time_$(BITS).o ioport.o ldt.o 20obj-y += time_$(BITS).o ioport.o ldt.o
21obj-y += setup_$(BITS).o i8259_$(BITS).o setup.o 21obj-y += setup_$(BITS).o i8259.o irqinit_$(BITS).o setup.o
22obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o 22obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o
23obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o 23obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o
24obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o setup64.o 24obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o setup64.o
25obj-y += bootflag.o e820.o 25obj-y += bootflag.o e820.o
26obj-y += pci-dma.o quirks.o i8237.o topology.o kdebugfs.o 26obj-y += pci-dma.o quirks.o i8237.o topology.o kdebugfs.o
27obj-y += alternative.o i8253.o pci-nommu.o 27obj-y += alternative.o i8253.o pci-nommu.o
28obj-$(CONFIG_X86_64) += bugs_64.o
29obj-y += tsc_$(BITS).o io_delay.o rtc.o 28obj-y += tsc_$(BITS).o io_delay.o rtc.o
30 29
31obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o 30obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
@@ -100,6 +99,7 @@ ifeq ($(CONFIG_X86_64),y)
100 99
101 obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o 100 obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o
102 obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o 101 obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o
102 obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o
103 obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o 103 obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o
104 104
105 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o 105 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 9908ef45a6b2..6516359922ba 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -514,8 +514,6 @@ int acpi_register_gsi(u32 gsi, int triggering, int polarity)
514 * Make sure all (legacy) PCI IRQs are set as level-triggered. 514 * Make sure all (legacy) PCI IRQs are set as level-triggered.
515 */ 515 */
516 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { 516 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
517 extern void eisa_set_level_irq(unsigned int irq);
518
519 if (triggering == ACPI_LEVEL_SENSITIVE) 517 if (triggering == ACPI_LEVEL_SENSITIVE)
520 eisa_set_level_irq(gsi); 518 eisa_set_level_irq(gsi);
521 } 519 }
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
new file mode 100644
index 000000000000..f2766d84c7a0
--- /dev/null
+++ b/arch/x86/kernel/amd_iommu.c
@@ -0,0 +1,962 @@
1/*
2 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/pci.h>
21#include <linux/gfp.h>
22#include <linux/bitops.h>
23#include <linux/scatterlist.h>
24#include <linux/iommu-helper.h>
25#include <asm/proto.h>
26#include <asm/gart.h>
27#include <asm/amd_iommu_types.h>
28#include <asm/amd_iommu.h>
29
30#define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28))
31
32#define to_pages(addr, size) \
33 (round_up(((addr) & ~PAGE_MASK) + (size), PAGE_SIZE) >> PAGE_SHIFT)
34
35static DEFINE_RWLOCK(amd_iommu_devtable_lock);
36
37struct command {
38 u32 data[4];
39};
40
41static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
42 struct unity_map_entry *e);
43
44static int iommu_has_npcache(struct amd_iommu *iommu)
45{
46 return iommu->cap & IOMMU_CAP_NPCACHE;
47}
48
49static int __iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
50{
51 u32 tail, head;
52 u8 *target;
53
54 tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
55 target = (iommu->cmd_buf + tail);
56 memcpy_toio(target, cmd, sizeof(*cmd));
57 tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
58 head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
59 if (tail == head)
60 return -ENOMEM;
61 writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
62
63 return 0;
64}
65
66static int iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
67{
68 unsigned long flags;
69 int ret;
70
71 spin_lock_irqsave(&iommu->lock, flags);
72 ret = __iommu_queue_command(iommu, cmd);
73 spin_unlock_irqrestore(&iommu->lock, flags);
74
75 return ret;
76}
77
78static int iommu_completion_wait(struct amd_iommu *iommu)
79{
80 int ret;
81 struct command cmd;
82 volatile u64 ready = 0;
83 unsigned long ready_phys = virt_to_phys(&ready);
84
85 memset(&cmd, 0, sizeof(cmd));
86 cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK;
87 cmd.data[1] = HIGH_U32(ready_phys);
88 cmd.data[2] = 1; /* value written to 'ready' */
89 CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
90
91 iommu->need_sync = 0;
92
93 ret = iommu_queue_command(iommu, &cmd);
94
95 if (ret)
96 return ret;
97
98 while (!ready)
99 cpu_relax();
100
101 return 0;
102}
103
104static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
105{
106 struct command cmd;
107
108 BUG_ON(iommu == NULL);
109
110 memset(&cmd, 0, sizeof(cmd));
111 CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY);
112 cmd.data[0] = devid;
113
114 iommu->need_sync = 1;
115
116 return iommu_queue_command(iommu, &cmd);
117}
118
119static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
120 u64 address, u16 domid, int pde, int s)
121{
122 struct command cmd;
123
124 memset(&cmd, 0, sizeof(cmd));
125 address &= PAGE_MASK;
126 CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES);
127 cmd.data[1] |= domid;
128 cmd.data[2] = LOW_U32(address);
129 cmd.data[3] = HIGH_U32(address);
130 if (s)
131 cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
132 if (pde)
133 cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
134
135 iommu->need_sync = 1;
136
137 return iommu_queue_command(iommu, &cmd);
138}
139
140static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid,
141 u64 address, size_t size)
142{
143 int s = 0;
144 unsigned pages = to_pages(address, size);
145
146 address &= PAGE_MASK;
147
148 if (pages > 1) {
149 /*
150 * If we have to flush more than one page, flush all
151 * TLB entries for this domain
152 */
153 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
154 s = 1;
155 }
156
157 iommu_queue_inv_iommu_pages(iommu, address, domid, 0, s);
158
159 return 0;
160}
161
162static int iommu_map(struct protection_domain *dom,
163 unsigned long bus_addr,
164 unsigned long phys_addr,
165 int prot)
166{
167 u64 __pte, *pte, *page;
168
169 bus_addr = PAGE_ALIGN(bus_addr);
170 phys_addr = PAGE_ALIGN(bus_addr);
171
172 /* only support 512GB address spaces for now */
173 if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK))
174 return -EINVAL;
175
176 pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)];
177
178 if (!IOMMU_PTE_PRESENT(*pte)) {
179 page = (u64 *)get_zeroed_page(GFP_KERNEL);
180 if (!page)
181 return -ENOMEM;
182 *pte = IOMMU_L2_PDE(virt_to_phys(page));
183 }
184
185 pte = IOMMU_PTE_PAGE(*pte);
186 pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)];
187
188 if (!IOMMU_PTE_PRESENT(*pte)) {
189 page = (u64 *)get_zeroed_page(GFP_KERNEL);
190 if (!page)
191 return -ENOMEM;
192 *pte = IOMMU_L1_PDE(virt_to_phys(page));
193 }
194
195 pte = IOMMU_PTE_PAGE(*pte);
196 pte = &pte[IOMMU_PTE_L0_INDEX(bus_addr)];
197
198 if (IOMMU_PTE_PRESENT(*pte))
199 return -EBUSY;
200
201 __pte = phys_addr | IOMMU_PTE_P;
202 if (prot & IOMMU_PROT_IR)
203 __pte |= IOMMU_PTE_IR;
204 if (prot & IOMMU_PROT_IW)
205 __pte |= IOMMU_PTE_IW;
206
207 *pte = __pte;
208
209 return 0;
210}
211
212static int iommu_for_unity_map(struct amd_iommu *iommu,
213 struct unity_map_entry *entry)
214{
215 u16 bdf, i;
216
217 for (i = entry->devid_start; i <= entry->devid_end; ++i) {
218 bdf = amd_iommu_alias_table[i];
219 if (amd_iommu_rlookup_table[bdf] == iommu)
220 return 1;
221 }
222
223 return 0;
224}
225
226static int iommu_init_unity_mappings(struct amd_iommu *iommu)
227{
228 struct unity_map_entry *entry;
229 int ret;
230
231 list_for_each_entry(entry, &amd_iommu_unity_map, list) {
232 if (!iommu_for_unity_map(iommu, entry))
233 continue;
234 ret = dma_ops_unity_map(iommu->default_dom, entry);
235 if (ret)
236 return ret;
237 }
238
239 return 0;
240}
241
242static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
243 struct unity_map_entry *e)
244{
245 u64 addr;
246 int ret;
247
248 for (addr = e->address_start; addr < e->address_end;
249 addr += PAGE_SIZE) {
250 ret = iommu_map(&dma_dom->domain, addr, addr, e->prot);
251 if (ret)
252 return ret;
253 /*
254 * if unity mapping is in aperture range mark the page
255 * as allocated in the aperture
256 */
257 if (addr < dma_dom->aperture_size)
258 __set_bit(addr >> PAGE_SHIFT, dma_dom->bitmap);
259 }
260
261 return 0;
262}
263
264static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
265 u16 devid)
266{
267 struct unity_map_entry *e;
268 int ret;
269
270 list_for_each_entry(e, &amd_iommu_unity_map, list) {
271 if (!(devid >= e->devid_start && devid <= e->devid_end))
272 continue;
273 ret = dma_ops_unity_map(dma_dom, e);
274 if (ret)
275 return ret;
276 }
277
278 return 0;
279}
280
281static unsigned long dma_mask_to_pages(unsigned long mask)
282{
283 return (mask >> PAGE_SHIFT) +
284 (PAGE_ALIGN(mask & ~PAGE_MASK) >> PAGE_SHIFT);
285}
286
287static unsigned long dma_ops_alloc_addresses(struct device *dev,
288 struct dma_ops_domain *dom,
289 unsigned int pages)
290{
291 unsigned long limit = dma_mask_to_pages(*dev->dma_mask);
292 unsigned long address;
293 unsigned long size = dom->aperture_size >> PAGE_SHIFT;
294 unsigned long boundary_size;
295
296 boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
297 PAGE_SIZE) >> PAGE_SHIFT;
298 limit = limit < size ? limit : size;
299
300 if (dom->next_bit >= limit)
301 dom->next_bit = 0;
302
303 address = iommu_area_alloc(dom->bitmap, limit, dom->next_bit, pages,
304 0 , boundary_size, 0);
305 if (address == -1)
306 address = iommu_area_alloc(dom->bitmap, limit, 0, pages,
307 0, boundary_size, 0);
308
309 if (likely(address != -1)) {
310 dom->next_bit = address + pages;
311 address <<= PAGE_SHIFT;
312 } else
313 address = bad_dma_address;
314
315 WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size);
316
317 return address;
318}
319
320static void dma_ops_free_addresses(struct dma_ops_domain *dom,
321 unsigned long address,
322 unsigned int pages)
323{
324 address >>= PAGE_SHIFT;
325 iommu_area_free(dom->bitmap, address, pages);
326}
327
328static u16 domain_id_alloc(void)
329{
330 unsigned long flags;
331 int id;
332
333 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
334 id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID);
335 BUG_ON(id == 0);
336 if (id > 0 && id < MAX_DOMAIN_ID)
337 __set_bit(id, amd_iommu_pd_alloc_bitmap);
338 else
339 id = 0;
340 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
341
342 return id;
343}
344
345static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
346 unsigned long start_page,
347 unsigned int pages)
348{
349 unsigned int last_page = dom->aperture_size >> PAGE_SHIFT;
350
351 if (start_page + pages > last_page)
352 pages = last_page - start_page;
353
354 set_bit_string(dom->bitmap, start_page, pages);
355}
356
357static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
358{
359 int i, j;
360 u64 *p1, *p2, *p3;
361
362 p1 = dma_dom->domain.pt_root;
363
364 if (!p1)
365 return;
366
367 for (i = 0; i < 512; ++i) {
368 if (!IOMMU_PTE_PRESENT(p1[i]))
369 continue;
370
371 p2 = IOMMU_PTE_PAGE(p1[i]);
372 for (j = 0; j < 512; ++i) {
373 if (!IOMMU_PTE_PRESENT(p2[j]))
374 continue;
375 p3 = IOMMU_PTE_PAGE(p2[j]);
376 free_page((unsigned long)p3);
377 }
378
379 free_page((unsigned long)p2);
380 }
381
382 free_page((unsigned long)p1);
383}
384
385static void dma_ops_domain_free(struct dma_ops_domain *dom)
386{
387 if (!dom)
388 return;
389
390 dma_ops_free_pagetable(dom);
391
392 kfree(dom->pte_pages);
393
394 kfree(dom->bitmap);
395
396 kfree(dom);
397}
398
399static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
400 unsigned order)
401{
402 struct dma_ops_domain *dma_dom;
403 unsigned i, num_pte_pages;
404 u64 *l2_pde;
405 u64 address;
406
407 /*
408 * Currently the DMA aperture must be between 32 MB and 1GB in size
409 */
410 if ((order < 25) || (order > 30))
411 return NULL;
412
413 dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL);
414 if (!dma_dom)
415 return NULL;
416
417 spin_lock_init(&dma_dom->domain.lock);
418
419 dma_dom->domain.id = domain_id_alloc();
420 if (dma_dom->domain.id == 0)
421 goto free_dma_dom;
422 dma_dom->domain.mode = PAGE_MODE_3_LEVEL;
423 dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL);
424 dma_dom->domain.priv = dma_dom;
425 if (!dma_dom->domain.pt_root)
426 goto free_dma_dom;
427 dma_dom->aperture_size = (1ULL << order);
428 dma_dom->bitmap = kzalloc(dma_dom->aperture_size / (PAGE_SIZE * 8),
429 GFP_KERNEL);
430 if (!dma_dom->bitmap)
431 goto free_dma_dom;
432 /*
433 * mark the first page as allocated so we never return 0 as
434 * a valid dma-address. So we can use 0 as error value
435 */
436 dma_dom->bitmap[0] = 1;
437 dma_dom->next_bit = 0;
438
439 if (iommu->exclusion_start &&
440 iommu->exclusion_start < dma_dom->aperture_size) {
441 unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT;
442 int pages = to_pages(iommu->exclusion_start,
443 iommu->exclusion_length);
444 dma_ops_reserve_addresses(dma_dom, startpage, pages);
445 }
446
447 num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512);
448 dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *),
449 GFP_KERNEL);
450 if (!dma_dom->pte_pages)
451 goto free_dma_dom;
452
453 l2_pde = (u64 *)get_zeroed_page(GFP_KERNEL);
454 if (l2_pde == NULL)
455 goto free_dma_dom;
456
457 dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde));
458
459 for (i = 0; i < num_pte_pages; ++i) {
460 dma_dom->pte_pages[i] = (u64 *)get_zeroed_page(GFP_KERNEL);
461 if (!dma_dom->pte_pages[i])
462 goto free_dma_dom;
463 address = virt_to_phys(dma_dom->pte_pages[i]);
464 l2_pde[i] = IOMMU_L1_PDE(address);
465 }
466
467 return dma_dom;
468
469free_dma_dom:
470 dma_ops_domain_free(dma_dom);
471
472 return NULL;
473}
474
475static struct protection_domain *domain_for_device(u16 devid)
476{
477 struct protection_domain *dom;
478 unsigned long flags;
479
480 read_lock_irqsave(&amd_iommu_devtable_lock, flags);
481 dom = amd_iommu_pd_table[devid];
482 read_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
483
484 return dom;
485}
486
487static void set_device_domain(struct amd_iommu *iommu,
488 struct protection_domain *domain,
489 u16 devid)
490{
491 unsigned long flags;
492
493 u64 pte_root = virt_to_phys(domain->pt_root);
494
495 pte_root |= (domain->mode & 0x07) << 9;
496 pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | 2;
497
498 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
499 amd_iommu_dev_table[devid].data[0] = pte_root;
500 amd_iommu_dev_table[devid].data[1] = pte_root >> 32;
501 amd_iommu_dev_table[devid].data[2] = domain->id;
502
503 amd_iommu_pd_table[devid] = domain;
504 write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
505
506 iommu_queue_inv_dev_entry(iommu, devid);
507
508 iommu->need_sync = 1;
509}
510
511static int get_device_resources(struct device *dev,
512 struct amd_iommu **iommu,
513 struct protection_domain **domain,
514 u16 *bdf)
515{
516 struct dma_ops_domain *dma_dom;
517 struct pci_dev *pcidev;
518 u16 _bdf;
519
520 BUG_ON(!dev || dev->bus != &pci_bus_type || !dev->dma_mask);
521
522 pcidev = to_pci_dev(dev);
523 _bdf = (pcidev->bus->number << 8) | pcidev->devfn;
524
525 if (_bdf >= amd_iommu_last_bdf) {
526 *iommu = NULL;
527 *domain = NULL;
528 *bdf = 0xffff;
529 return 0;
530 }
531
532 *bdf = amd_iommu_alias_table[_bdf];
533
534 *iommu = amd_iommu_rlookup_table[*bdf];
535 if (*iommu == NULL)
536 return 0;
537 dma_dom = (*iommu)->default_dom;
538 *domain = domain_for_device(*bdf);
539 if (*domain == NULL) {
540 *domain = &dma_dom->domain;
541 set_device_domain(*iommu, *domain, *bdf);
542 printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
543 "device ", (*domain)->id);
544 print_devid(_bdf, 1);
545 }
546
547 return 1;
548}
549
550static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu,
551 struct dma_ops_domain *dom,
552 unsigned long address,
553 phys_addr_t paddr,
554 int direction)
555{
556 u64 *pte, __pte;
557
558 WARN_ON(address > dom->aperture_size);
559
560 paddr &= PAGE_MASK;
561
562 pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
563 pte += IOMMU_PTE_L0_INDEX(address);
564
565 __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC;
566
567 if (direction == DMA_TO_DEVICE)
568 __pte |= IOMMU_PTE_IR;
569 else if (direction == DMA_FROM_DEVICE)
570 __pte |= IOMMU_PTE_IW;
571 else if (direction == DMA_BIDIRECTIONAL)
572 __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW;
573
574 WARN_ON(*pte);
575
576 *pte = __pte;
577
578 return (dma_addr_t)address;
579}
580
581static void dma_ops_domain_unmap(struct amd_iommu *iommu,
582 struct dma_ops_domain *dom,
583 unsigned long address)
584{
585 u64 *pte;
586
587 if (address >= dom->aperture_size)
588 return;
589
590 WARN_ON(address & 0xfffULL || address > dom->aperture_size);
591
592 pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
593 pte += IOMMU_PTE_L0_INDEX(address);
594
595 WARN_ON(!*pte);
596
597 *pte = 0ULL;
598}
599
600static dma_addr_t __map_single(struct device *dev,
601 struct amd_iommu *iommu,
602 struct dma_ops_domain *dma_dom,
603 phys_addr_t paddr,
604 size_t size,
605 int dir)
606{
607 dma_addr_t offset = paddr & ~PAGE_MASK;
608 dma_addr_t address, start;
609 unsigned int pages;
610 int i;
611
612 pages = to_pages(paddr, size);
613 paddr &= PAGE_MASK;
614
615 address = dma_ops_alloc_addresses(dev, dma_dom, pages);
616 if (unlikely(address == bad_dma_address))
617 goto out;
618
619 start = address;
620 for (i = 0; i < pages; ++i) {
621 dma_ops_domain_map(iommu, dma_dom, start, paddr, dir);
622 paddr += PAGE_SIZE;
623 start += PAGE_SIZE;
624 }
625 address += offset;
626
627out:
628 return address;
629}
630
631static void __unmap_single(struct amd_iommu *iommu,
632 struct dma_ops_domain *dma_dom,
633 dma_addr_t dma_addr,
634 size_t size,
635 int dir)
636{
637 dma_addr_t i, start;
638 unsigned int pages;
639
640 if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size))
641 return;
642
643 pages = to_pages(dma_addr, size);
644 dma_addr &= PAGE_MASK;
645 start = dma_addr;
646
647 for (i = 0; i < pages; ++i) {
648 dma_ops_domain_unmap(iommu, dma_dom, start);
649 start += PAGE_SIZE;
650 }
651
652 dma_ops_free_addresses(dma_dom, dma_addr, pages);
653}
654
655static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
656 size_t size, int dir)
657{
658 unsigned long flags;
659 struct amd_iommu *iommu;
660 struct protection_domain *domain;
661 u16 devid;
662 dma_addr_t addr;
663
664 get_device_resources(dev, &iommu, &domain, &devid);
665
666 if (iommu == NULL || domain == NULL)
667 return (dma_addr_t)paddr;
668
669 spin_lock_irqsave(&domain->lock, flags);
670 addr = __map_single(dev, iommu, domain->priv, paddr, size, dir);
671 if (addr == bad_dma_address)
672 goto out;
673
674 if (iommu_has_npcache(iommu))
675 iommu_flush_pages(iommu, domain->id, addr, size);
676
677 if (iommu->need_sync)
678 iommu_completion_wait(iommu);
679
680out:
681 spin_unlock_irqrestore(&domain->lock, flags);
682
683 return addr;
684}
685
686static void unmap_single(struct device *dev, dma_addr_t dma_addr,
687 size_t size, int dir)
688{
689 unsigned long flags;
690 struct amd_iommu *iommu;
691 struct protection_domain *domain;
692 u16 devid;
693
694 if (!get_device_resources(dev, &iommu, &domain, &devid))
695 return;
696
697 spin_lock_irqsave(&domain->lock, flags);
698
699 __unmap_single(iommu, domain->priv, dma_addr, size, dir);
700
701 iommu_flush_pages(iommu, domain->id, dma_addr, size);
702
703 if (iommu->need_sync)
704 iommu_completion_wait(iommu);
705
706 spin_unlock_irqrestore(&domain->lock, flags);
707}
708
709static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist,
710 int nelems, int dir)
711{
712 struct scatterlist *s;
713 int i;
714
715 for_each_sg(sglist, s, nelems, i) {
716 s->dma_address = (dma_addr_t)sg_phys(s);
717 s->dma_length = s->length;
718 }
719
720 return nelems;
721}
722
723static int map_sg(struct device *dev, struct scatterlist *sglist,
724 int nelems, int dir)
725{
726 unsigned long flags;
727 struct amd_iommu *iommu;
728 struct protection_domain *domain;
729 u16 devid;
730 int i;
731 struct scatterlist *s;
732 phys_addr_t paddr;
733 int mapped_elems = 0;
734
735 get_device_resources(dev, &iommu, &domain, &devid);
736
737 if (!iommu || !domain)
738 return map_sg_no_iommu(dev, sglist, nelems, dir);
739
740 spin_lock_irqsave(&domain->lock, flags);
741
742 for_each_sg(sglist, s, nelems, i) {
743 paddr = sg_phys(s);
744
745 s->dma_address = __map_single(dev, iommu, domain->priv,
746 paddr, s->length, dir);
747
748 if (s->dma_address) {
749 s->dma_length = s->length;
750 mapped_elems++;
751 } else
752 goto unmap;
753 if (iommu_has_npcache(iommu))
754 iommu_flush_pages(iommu, domain->id, s->dma_address,
755 s->dma_length);
756 }
757
758 if (iommu->need_sync)
759 iommu_completion_wait(iommu);
760
761out:
762 spin_unlock_irqrestore(&domain->lock, flags);
763
764 return mapped_elems;
765unmap:
766 for_each_sg(sglist, s, mapped_elems, i) {
767 if (s->dma_address)
768 __unmap_single(iommu, domain->priv, s->dma_address,
769 s->dma_length, dir);
770 s->dma_address = s->dma_length = 0;
771 }
772
773 mapped_elems = 0;
774
775 goto out;
776}
777
778static void unmap_sg(struct device *dev, struct scatterlist *sglist,
779 int nelems, int dir)
780{
781 unsigned long flags;
782 struct amd_iommu *iommu;
783 struct protection_domain *domain;
784 struct scatterlist *s;
785 u16 devid;
786 int i;
787
788 if (!get_device_resources(dev, &iommu, &domain, &devid))
789 return;
790
791 spin_lock_irqsave(&domain->lock, flags);
792
793 for_each_sg(sglist, s, nelems, i) {
794 __unmap_single(iommu, domain->priv, s->dma_address,
795 s->dma_length, dir);
796 iommu_flush_pages(iommu, domain->id, s->dma_address,
797 s->dma_length);
798 s->dma_address = s->dma_length = 0;
799 }
800
801 if (iommu->need_sync)
802 iommu_completion_wait(iommu);
803
804 spin_unlock_irqrestore(&domain->lock, flags);
805}
806
807static void *alloc_coherent(struct device *dev, size_t size,
808 dma_addr_t *dma_addr, gfp_t flag)
809{
810 unsigned long flags;
811 void *virt_addr;
812 struct amd_iommu *iommu;
813 struct protection_domain *domain;
814 u16 devid;
815 phys_addr_t paddr;
816
817 virt_addr = (void *)__get_free_pages(flag, get_order(size));
818 if (!virt_addr)
819 return 0;
820
821 memset(virt_addr, 0, size);
822 paddr = virt_to_phys(virt_addr);
823
824 get_device_resources(dev, &iommu, &domain, &devid);
825
826 if (!iommu || !domain) {
827 *dma_addr = (dma_addr_t)paddr;
828 return virt_addr;
829 }
830
831 spin_lock_irqsave(&domain->lock, flags);
832
833 *dma_addr = __map_single(dev, iommu, domain->priv, paddr,
834 size, DMA_BIDIRECTIONAL);
835
836 if (*dma_addr == bad_dma_address) {
837 free_pages((unsigned long)virt_addr, get_order(size));
838 virt_addr = NULL;
839 goto out;
840 }
841
842 if (iommu_has_npcache(iommu))
843 iommu_flush_pages(iommu, domain->id, *dma_addr, size);
844
845 if (iommu->need_sync)
846 iommu_completion_wait(iommu);
847
848out:
849 spin_unlock_irqrestore(&domain->lock, flags);
850
851 return virt_addr;
852}
853
854static void free_coherent(struct device *dev, size_t size,
855 void *virt_addr, dma_addr_t dma_addr)
856{
857 unsigned long flags;
858 struct amd_iommu *iommu;
859 struct protection_domain *domain;
860 u16 devid;
861
862 get_device_resources(dev, &iommu, &domain, &devid);
863
864 if (!iommu || !domain)
865 goto free_mem;
866
867 spin_lock_irqsave(&domain->lock, flags);
868
869 __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
870 iommu_flush_pages(iommu, domain->id, dma_addr, size);
871
872 if (iommu->need_sync)
873 iommu_completion_wait(iommu);
874
875 spin_unlock_irqrestore(&domain->lock, flags);
876
877free_mem:
878 free_pages((unsigned long)virt_addr, get_order(size));
879}
880
881/*
882 * If the driver core informs the DMA layer if a driver grabs a device
883 * we don't need to preallocate the protection domains anymore.
884 * For now we have to.
885 */
886void prealloc_protection_domains(void)
887{
888 struct pci_dev *dev = NULL;
889 struct dma_ops_domain *dma_dom;
890 struct amd_iommu *iommu;
891 int order = amd_iommu_aperture_order;
892 u16 devid;
893
894 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
895 devid = (dev->bus->number << 8) | dev->devfn;
896 if (devid >= amd_iommu_last_bdf)
897 continue;
898 devid = amd_iommu_alias_table[devid];
899 if (domain_for_device(devid))
900 continue;
901 iommu = amd_iommu_rlookup_table[devid];
902 if (!iommu)
903 continue;
904 dma_dom = dma_ops_domain_alloc(iommu, order);
905 if (!dma_dom)
906 continue;
907 init_unity_mappings_for_device(dma_dom, devid);
908 set_device_domain(iommu, &dma_dom->domain, devid);
909 printk(KERN_INFO "AMD IOMMU: Allocated domain %d for device ",
910 dma_dom->domain.id);
911 print_devid(devid, 1);
912 }
913}
914
915static struct dma_mapping_ops amd_iommu_dma_ops = {
916 .alloc_coherent = alloc_coherent,
917 .free_coherent = free_coherent,
918 .map_single = map_single,
919 .unmap_single = unmap_single,
920 .map_sg = map_sg,
921 .unmap_sg = unmap_sg,
922};
923
924int __init amd_iommu_init_dma_ops(void)
925{
926 struct amd_iommu *iommu;
927 int order = amd_iommu_aperture_order;
928 int ret;
929
930 list_for_each_entry(iommu, &amd_iommu_list, list) {
931 iommu->default_dom = dma_ops_domain_alloc(iommu, order);
932 if (iommu->default_dom == NULL)
933 return -ENOMEM;
934 ret = iommu_init_unity_mappings(iommu);
935 if (ret)
936 goto free_domains;
937 }
938
939 if (amd_iommu_isolate)
940 prealloc_protection_domains();
941
942 iommu_detected = 1;
943 force_iommu = 1;
944 bad_dma_address = 0;
945#ifdef CONFIG_GART_IOMMU
946 gart_iommu_aperture_disabled = 1;
947 gart_iommu_aperture = 0;
948#endif
949
950 dma_ops = &amd_iommu_dma_ops;
951
952 return 0;
953
954free_domains:
955
956 list_for_each_entry(iommu, &amd_iommu_list, list) {
957 if (iommu->default_dom)
958 dma_ops_domain_free(iommu->default_dom);
959 }
960
961 return ret;
962}
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
new file mode 100644
index 000000000000..2a13e430437d
--- /dev/null
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -0,0 +1,875 @@
1/*
2 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
3 * Author: Joerg Roedel <joerg.roedel@amd.com>
4 * Leo Duran <leo.duran@amd.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/pci.h>
21#include <linux/acpi.h>
22#include <linux/gfp.h>
23#include <linux/list.h>
24#include <linux/sysdev.h>
25#include <asm/pci-direct.h>
26#include <asm/amd_iommu_types.h>
27#include <asm/amd_iommu.h>
28#include <asm/gart.h>
29
30/*
31 * definitions for the ACPI scanning code
32 */
33#define UPDATE_LAST_BDF(x) do {\
34 if ((x) > amd_iommu_last_bdf) \
35 amd_iommu_last_bdf = (x); \
36 } while (0);
37
38#define DEVID(bus, devfn) (((bus) << 8) | (devfn))
39#define PCI_BUS(x) (((x) >> 8) & 0xff)
40#define IVRS_HEADER_LENGTH 48
41#define TBL_SIZE(x) (1 << (PAGE_SHIFT + get_order(amd_iommu_last_bdf * (x))))
42
43#define ACPI_IVHD_TYPE 0x10
44#define ACPI_IVMD_TYPE_ALL 0x20
45#define ACPI_IVMD_TYPE 0x21
46#define ACPI_IVMD_TYPE_RANGE 0x22
47
48#define IVHD_DEV_ALL 0x01
49#define IVHD_DEV_SELECT 0x02
50#define IVHD_DEV_SELECT_RANGE_START 0x03
51#define IVHD_DEV_RANGE_END 0x04
52#define IVHD_DEV_ALIAS 0x42
53#define IVHD_DEV_ALIAS_RANGE 0x43
54#define IVHD_DEV_EXT_SELECT 0x46
55#define IVHD_DEV_EXT_SELECT_RANGE 0x47
56
57#define IVHD_FLAG_HT_TUN_EN 0x00
58#define IVHD_FLAG_PASSPW_EN 0x01
59#define IVHD_FLAG_RESPASSPW_EN 0x02
60#define IVHD_FLAG_ISOC_EN 0x03
61
62#define IVMD_FLAG_EXCL_RANGE 0x08
63#define IVMD_FLAG_UNITY_MAP 0x01
64
65#define ACPI_DEVFLAG_INITPASS 0x01
66#define ACPI_DEVFLAG_EXTINT 0x02
67#define ACPI_DEVFLAG_NMI 0x04
68#define ACPI_DEVFLAG_SYSMGT1 0x10
69#define ACPI_DEVFLAG_SYSMGT2 0x20
70#define ACPI_DEVFLAG_LINT0 0x40
71#define ACPI_DEVFLAG_LINT1 0x80
72#define ACPI_DEVFLAG_ATSDIS 0x10000000
73
74struct ivhd_header {
75 u8 type;
76 u8 flags;
77 u16 length;
78 u16 devid;
79 u16 cap_ptr;
80 u64 mmio_phys;
81 u16 pci_seg;
82 u16 info;
83 u32 reserved;
84} __attribute__((packed));
85
86struct ivhd_entry {
87 u8 type;
88 u16 devid;
89 u8 flags;
90 u32 ext;
91} __attribute__((packed));
92
93struct ivmd_header {
94 u8 type;
95 u8 flags;
96 u16 length;
97 u16 devid;
98 u16 aux;
99 u64 resv;
100 u64 range_start;
101 u64 range_length;
102} __attribute__((packed));
103
104static int __initdata amd_iommu_detected;
105
106u16 amd_iommu_last_bdf;
107struct list_head amd_iommu_unity_map;
108unsigned amd_iommu_aperture_order = 26;
109int amd_iommu_isolate;
110
111struct list_head amd_iommu_list;
112struct dev_table_entry *amd_iommu_dev_table;
113u16 *amd_iommu_alias_table;
114struct amd_iommu **amd_iommu_rlookup_table;
115struct protection_domain **amd_iommu_pd_table;
116unsigned long *amd_iommu_pd_alloc_bitmap;
117
118static u32 dev_table_size;
119static u32 alias_table_size;
120static u32 rlookup_table_size;
121
122static void __init iommu_set_exclusion_range(struct amd_iommu *iommu)
123{
124 u64 start = iommu->exclusion_start & PAGE_MASK;
125 u64 limit = (start + iommu->exclusion_length) & PAGE_MASK;
126 u64 entry;
127
128 if (!iommu->exclusion_start)
129 return;
130
131 entry = start | MMIO_EXCL_ENABLE_MASK;
132 memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET,
133 &entry, sizeof(entry));
134
135 entry = limit;
136 memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET,
137 &entry, sizeof(entry));
138}
139
140static void __init iommu_set_device_table(struct amd_iommu *iommu)
141{
142 u32 entry;
143
144 BUG_ON(iommu->mmio_base == NULL);
145
146 entry = virt_to_phys(amd_iommu_dev_table);
147 entry |= (dev_table_size >> 12) - 1;
148 memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET,
149 &entry, sizeof(entry));
150}
151
152static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
153{
154 u32 ctrl;
155
156 ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);
157 ctrl |= (1 << bit);
158 writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
159}
160
161static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
162{
163 u32 ctrl;
164
165 ctrl = (u64)readl(iommu->mmio_base + MMIO_CONTROL_OFFSET);
166 ctrl &= ~(1 << bit);
167 writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
168}
169
170void __init iommu_enable(struct amd_iommu *iommu)
171{
172 printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at ");
173 print_devid(iommu->devid, 0);
174 printk(" cap 0x%hx\n", iommu->cap_ptr);
175
176 iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
177}
178
179static u8 * __init iommu_map_mmio_space(u64 address)
180{
181 u8 *ret;
182
183 if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu"))
184 return NULL;
185
186 ret = ioremap_nocache(address, MMIO_REGION_LENGTH);
187 if (ret != NULL)
188 return ret;
189
190 release_mem_region(address, MMIO_REGION_LENGTH);
191
192 return NULL;
193}
194
195static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu)
196{
197 if (iommu->mmio_base)
198 iounmap(iommu->mmio_base);
199 release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH);
200}
201
202static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr)
203{
204 u32 cap;
205
206 cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET);
207 UPDATE_LAST_BDF(DEVID(MMIO_GET_BUS(cap), MMIO_GET_LD(cap)));
208
209 return 0;
210}
211
212static int __init find_last_devid_from_ivhd(struct ivhd_header *h)
213{
214 u8 *p = (void *)h, *end = (void *)h;
215 struct ivhd_entry *dev;
216
217 p += sizeof(*h);
218 end += h->length;
219
220 find_last_devid_on_pci(PCI_BUS(h->devid),
221 PCI_SLOT(h->devid),
222 PCI_FUNC(h->devid),
223 h->cap_ptr);
224
225 while (p < end) {
226 dev = (struct ivhd_entry *)p;
227 switch (dev->type) {
228 case IVHD_DEV_SELECT:
229 case IVHD_DEV_RANGE_END:
230 case IVHD_DEV_ALIAS:
231 case IVHD_DEV_EXT_SELECT:
232 UPDATE_LAST_BDF(dev->devid);
233 break;
234 default:
235 break;
236 }
237 p += 0x04 << (*p >> 6);
238 }
239
240 WARN_ON(p != end);
241
242 return 0;
243}
244
245static int __init find_last_devid_acpi(struct acpi_table_header *table)
246{
247 int i;
248 u8 checksum = 0, *p = (u8 *)table, *end = (u8 *)table;
249 struct ivhd_header *h;
250
251 /*
252 * Validate checksum here so we don't need to do it when
253 * we actually parse the table
254 */
255 for (i = 0; i < table->length; ++i)
256 checksum += p[i];
257 if (checksum != 0)
258 /* ACPI table corrupt */
259 return -ENODEV;
260
261 p += IVRS_HEADER_LENGTH;
262
263 end += table->length;
264 while (p < end) {
265 h = (struct ivhd_header *)p;
266 switch (h->type) {
267 case ACPI_IVHD_TYPE:
268 find_last_devid_from_ivhd(h);
269 break;
270 default:
271 break;
272 }
273 p += h->length;
274 }
275 WARN_ON(p != end);
276
277 return 0;
278}
279
280static u8 * __init alloc_command_buffer(struct amd_iommu *iommu)
281{
282 u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL,
283 get_order(CMD_BUFFER_SIZE));
284 u64 entry = 0;
285
286 if (cmd_buf == NULL)
287 return NULL;
288
289 iommu->cmd_buf_size = CMD_BUFFER_SIZE;
290
291 memset(cmd_buf, 0, CMD_BUFFER_SIZE);
292
293 entry = (u64)virt_to_phys(cmd_buf);
294 entry |= MMIO_CMD_SIZE_512;
295 memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET,
296 &entry, sizeof(entry));
297
298 iommu_feature_enable(iommu, CONTROL_CMDBUF_EN);
299
300 return cmd_buf;
301}
302
303static void __init free_command_buffer(struct amd_iommu *iommu)
304{
305 if (iommu->cmd_buf)
306 free_pages((unsigned long)iommu->cmd_buf,
307 get_order(CMD_BUFFER_SIZE));
308}
309
310static void set_dev_entry_bit(u16 devid, u8 bit)
311{
312 int i = (bit >> 5) & 0x07;
313 int _bit = bit & 0x1f;
314
315 amd_iommu_dev_table[devid].data[i] |= (1 << _bit);
316}
317
318static void __init set_dev_entry_from_acpi(u16 devid, u32 flags, u32 ext_flags)
319{
320 if (flags & ACPI_DEVFLAG_INITPASS)
321 set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS);
322 if (flags & ACPI_DEVFLAG_EXTINT)
323 set_dev_entry_bit(devid, DEV_ENTRY_EINT_PASS);
324 if (flags & ACPI_DEVFLAG_NMI)
325 set_dev_entry_bit(devid, DEV_ENTRY_NMI_PASS);
326 if (flags & ACPI_DEVFLAG_SYSMGT1)
327 set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1);
328 if (flags & ACPI_DEVFLAG_SYSMGT2)
329 set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2);
330 if (flags & ACPI_DEVFLAG_LINT0)
331 set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS);
332 if (flags & ACPI_DEVFLAG_LINT1)
333 set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS);
334}
335
336static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid)
337{
338 amd_iommu_rlookup_table[devid] = iommu;
339}
340
341static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m)
342{
343 struct amd_iommu *iommu = amd_iommu_rlookup_table[devid];
344
345 if (!(m->flags & IVMD_FLAG_EXCL_RANGE))
346 return;
347
348 if (iommu) {
349 set_dev_entry_bit(m->devid, DEV_ENTRY_EX);
350 iommu->exclusion_start = m->range_start;
351 iommu->exclusion_length = m->range_length;
352 }
353}
354
355static void __init init_iommu_from_pci(struct amd_iommu *iommu)
356{
357 int bus = PCI_BUS(iommu->devid);
358 int dev = PCI_SLOT(iommu->devid);
359 int fn = PCI_FUNC(iommu->devid);
360 int cap_ptr = iommu->cap_ptr;
361 u32 range;
362
363 iommu->cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_CAP_HDR_OFFSET);
364
365 range = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET);
366 iommu->first_device = DEVID(MMIO_GET_BUS(range), MMIO_GET_FD(range));
367 iommu->last_device = DEVID(MMIO_GET_BUS(range), MMIO_GET_LD(range));
368}
369
370static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
371 struct ivhd_header *h)
372{
373 u8 *p = (u8 *)h;
374 u8 *end = p, flags = 0;
375 u16 dev_i, devid = 0, devid_start = 0, devid_to = 0;
376 u32 ext_flags = 0;
377 bool alias = 0;
378 struct ivhd_entry *e;
379
380 /*
381 * First set the recommended feature enable bits from ACPI
382 * into the IOMMU control registers
383 */
384 h->flags & IVHD_FLAG_HT_TUN_EN ?
385 iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) :
386 iommu_feature_disable(iommu, CONTROL_HT_TUN_EN);
387
388 h->flags & IVHD_FLAG_PASSPW_EN ?
389 iommu_feature_enable(iommu, CONTROL_PASSPW_EN) :
390 iommu_feature_disable(iommu, CONTROL_PASSPW_EN);
391
392 h->flags & IVHD_FLAG_RESPASSPW_EN ?
393 iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) :
394 iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN);
395
396 h->flags & IVHD_FLAG_ISOC_EN ?
397 iommu_feature_enable(iommu, CONTROL_ISOC_EN) :
398 iommu_feature_disable(iommu, CONTROL_ISOC_EN);
399
400 /*
401 * make IOMMU memory accesses cache coherent
402 */
403 iommu_feature_enable(iommu, CONTROL_COHERENT_EN);
404
405 /*
406 * Done. Now parse the device entries
407 */
408 p += sizeof(struct ivhd_header);
409 end += h->length;
410
411 while (p < end) {
412 e = (struct ivhd_entry *)p;
413 switch (e->type) {
414 case IVHD_DEV_ALL:
415 for (dev_i = iommu->first_device;
416 dev_i <= iommu->last_device; ++dev_i)
417 set_dev_entry_from_acpi(dev_i, e->flags, 0);
418 break;
419 case IVHD_DEV_SELECT:
420 devid = e->devid;
421 set_dev_entry_from_acpi(devid, e->flags, 0);
422 break;
423 case IVHD_DEV_SELECT_RANGE_START:
424 devid_start = e->devid;
425 flags = e->flags;
426 ext_flags = 0;
427 alias = 0;
428 break;
429 case IVHD_DEV_ALIAS:
430 devid = e->devid;
431 devid_to = e->ext >> 8;
432 set_dev_entry_from_acpi(devid, e->flags, 0);
433 amd_iommu_alias_table[devid] = devid_to;
434 break;
435 case IVHD_DEV_ALIAS_RANGE:
436 devid_start = e->devid;
437 flags = e->flags;
438 devid_to = e->ext >> 8;
439 ext_flags = 0;
440 alias = 1;
441 break;
442 case IVHD_DEV_EXT_SELECT:
443 devid = e->devid;
444 set_dev_entry_from_acpi(devid, e->flags, e->ext);
445 break;
446 case IVHD_DEV_EXT_SELECT_RANGE:
447 devid_start = e->devid;
448 flags = e->flags;
449 ext_flags = e->ext;
450 alias = 0;
451 break;
452 case IVHD_DEV_RANGE_END:
453 devid = e->devid;
454 for (dev_i = devid_start; dev_i <= devid; ++dev_i) {
455 if (alias)
456 amd_iommu_alias_table[dev_i] = devid_to;
457 set_dev_entry_from_acpi(
458 amd_iommu_alias_table[dev_i],
459 flags, ext_flags);
460 }
461 break;
462 default:
463 break;
464 }
465
466 p += 0x04 << (e->type >> 6);
467 }
468}
469
470static int __init init_iommu_devices(struct amd_iommu *iommu)
471{
472 u16 i;
473
474 for (i = iommu->first_device; i <= iommu->last_device; ++i)
475 set_iommu_for_device(iommu, i);
476
477 return 0;
478}
479
480static void __init free_iommu_one(struct amd_iommu *iommu)
481{
482 free_command_buffer(iommu);
483 iommu_unmap_mmio_space(iommu);
484}
485
486static void __init free_iommu_all(void)
487{
488 struct amd_iommu *iommu, *next;
489
490 list_for_each_entry_safe(iommu, next, &amd_iommu_list, list) {
491 list_del(&iommu->list);
492 free_iommu_one(iommu);
493 kfree(iommu);
494 }
495}
496
497static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
498{
499 spin_lock_init(&iommu->lock);
500 list_add_tail(&iommu->list, &amd_iommu_list);
501
502 /*
503 * Copy data from ACPI table entry to the iommu struct
504 */
505 iommu->devid = h->devid;
506 iommu->cap_ptr = h->cap_ptr;
507 iommu->mmio_phys = h->mmio_phys;
508 iommu->mmio_base = iommu_map_mmio_space(h->mmio_phys);
509 if (!iommu->mmio_base)
510 return -ENOMEM;
511
512 iommu_set_device_table(iommu);
513 iommu->cmd_buf = alloc_command_buffer(iommu);
514 if (!iommu->cmd_buf)
515 return -ENOMEM;
516
517 init_iommu_from_pci(iommu);
518 init_iommu_from_acpi(iommu, h);
519 init_iommu_devices(iommu);
520
521 return 0;
522}
523
524static int __init init_iommu_all(struct acpi_table_header *table)
525{
526 u8 *p = (u8 *)table, *end = (u8 *)table;
527 struct ivhd_header *h;
528 struct amd_iommu *iommu;
529 int ret;
530
531 INIT_LIST_HEAD(&amd_iommu_list);
532
533 end += table->length;
534 p += IVRS_HEADER_LENGTH;
535
536 while (p < end) {
537 h = (struct ivhd_header *)p;
538 switch (*p) {
539 case ACPI_IVHD_TYPE:
540 iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL);
541 if (iommu == NULL)
542 return -ENOMEM;
543 ret = init_iommu_one(iommu, h);
544 if (ret)
545 return ret;
546 break;
547 default:
548 break;
549 }
550 p += h->length;
551
552 }
553 WARN_ON(p != end);
554
555 return 0;
556}
557
558static void __init free_unity_maps(void)
559{
560 struct unity_map_entry *entry, *next;
561
562 list_for_each_entry_safe(entry, next, &amd_iommu_unity_map, list) {
563 list_del(&entry->list);
564 kfree(entry);
565 }
566}
567
568static int __init init_exclusion_range(struct ivmd_header *m)
569{
570 int i;
571
572 switch (m->type) {
573 case ACPI_IVMD_TYPE:
574 set_device_exclusion_range(m->devid, m);
575 break;
576 case ACPI_IVMD_TYPE_ALL:
577 for (i = 0; i < amd_iommu_last_bdf; ++i)
578 set_device_exclusion_range(i, m);
579 break;
580 case ACPI_IVMD_TYPE_RANGE:
581 for (i = m->devid; i <= m->aux; ++i)
582 set_device_exclusion_range(i, m);
583 break;
584 default:
585 break;
586 }
587
588 return 0;
589}
590
591static int __init init_unity_map_range(struct ivmd_header *m)
592{
593 struct unity_map_entry *e = 0;
594
595 e = kzalloc(sizeof(*e), GFP_KERNEL);
596 if (e == NULL)
597 return -ENOMEM;
598
599 switch (m->type) {
600 default:
601 case ACPI_IVMD_TYPE:
602 e->devid_start = e->devid_end = m->devid;
603 break;
604 case ACPI_IVMD_TYPE_ALL:
605 e->devid_start = 0;
606 e->devid_end = amd_iommu_last_bdf;
607 break;
608 case ACPI_IVMD_TYPE_RANGE:
609 e->devid_start = m->devid;
610 e->devid_end = m->aux;
611 break;
612 }
613 e->address_start = PAGE_ALIGN(m->range_start);
614 e->address_end = e->address_start + PAGE_ALIGN(m->range_length);
615 e->prot = m->flags >> 1;
616
617 list_add_tail(&e->list, &amd_iommu_unity_map);
618
619 return 0;
620}
621
622static int __init init_memory_definitions(struct acpi_table_header *table)
623{
624 u8 *p = (u8 *)table, *end = (u8 *)table;
625 struct ivmd_header *m;
626
627 INIT_LIST_HEAD(&amd_iommu_unity_map);
628
629 end += table->length;
630 p += IVRS_HEADER_LENGTH;
631
632 while (p < end) {
633 m = (struct ivmd_header *)p;
634 if (m->flags & IVMD_FLAG_EXCL_RANGE)
635 init_exclusion_range(m);
636 else if (m->flags & IVMD_FLAG_UNITY_MAP)
637 init_unity_map_range(m);
638
639 p += m->length;
640 }
641
642 return 0;
643}
644
645static void __init enable_iommus(void)
646{
647 struct amd_iommu *iommu;
648
649 list_for_each_entry(iommu, &amd_iommu_list, list) {
650 iommu_set_exclusion_range(iommu);
651 iommu_enable(iommu);
652 }
653}
654
655/*
656 * Suspend/Resume support
657 * disable suspend until real resume implemented
658 */
659
660static int amd_iommu_resume(struct sys_device *dev)
661{
662 return 0;
663}
664
665static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state)
666{
667 return -EINVAL;
668}
669
670static struct sysdev_class amd_iommu_sysdev_class = {
671 .name = "amd_iommu",
672 .suspend = amd_iommu_suspend,
673 .resume = amd_iommu_resume,
674};
675
676static struct sys_device device_amd_iommu = {
677 .id = 0,
678 .cls = &amd_iommu_sysdev_class,
679};
680
681int __init amd_iommu_init(void)
682{
683 int i, ret = 0;
684
685
686 if (no_iommu) {
687 printk(KERN_INFO "AMD IOMMU disabled by kernel command line\n");
688 return 0;
689 }
690
691 if (!amd_iommu_detected)
692 return -ENODEV;
693
694 /*
695 * First parse ACPI tables to find the largest Bus/Dev/Func
696 * we need to handle. Upon this information the shared data
697 * structures for the IOMMUs in the system will be allocated
698 */
699 if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0)
700 return -ENODEV;
701
702 dev_table_size = TBL_SIZE(DEV_TABLE_ENTRY_SIZE);
703 alias_table_size = TBL_SIZE(ALIAS_TABLE_ENTRY_SIZE);
704 rlookup_table_size = TBL_SIZE(RLOOKUP_TABLE_ENTRY_SIZE);
705
706 ret = -ENOMEM;
707
708 /* Device table - directly used by all IOMMUs */
709 amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL,
710 get_order(dev_table_size));
711 if (amd_iommu_dev_table == NULL)
712 goto out;
713
714 /*
715 * Alias table - map PCI Bus/Dev/Func to Bus/Dev/Func the
716 * IOMMU see for that device
717 */
718 amd_iommu_alias_table = (void *)__get_free_pages(GFP_KERNEL,
719 get_order(alias_table_size));
720 if (amd_iommu_alias_table == NULL)
721 goto free;
722
723 /* IOMMU rlookup table - find the IOMMU for a specific device */
724 amd_iommu_rlookup_table = (void *)__get_free_pages(GFP_KERNEL,
725 get_order(rlookup_table_size));
726 if (amd_iommu_rlookup_table == NULL)
727 goto free;
728
729 /*
730 * Protection Domain table - maps devices to protection domains
731 * This table has the same size as the rlookup_table
732 */
733 amd_iommu_pd_table = (void *)__get_free_pages(GFP_KERNEL,
734 get_order(rlookup_table_size));
735 if (amd_iommu_pd_table == NULL)
736 goto free;
737
738 amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages(GFP_KERNEL,
739 get_order(MAX_DOMAIN_ID/8));
740 if (amd_iommu_pd_alloc_bitmap == NULL)
741 goto free;
742
743 /*
744 * memory is allocated now; initialize the device table with all zeroes
745 * and let all alias entries point to itself
746 */
747 memset(amd_iommu_dev_table, 0, dev_table_size);
748 for (i = 0; i < amd_iommu_last_bdf; ++i)
749 amd_iommu_alias_table[i] = i;
750
751 memset(amd_iommu_pd_table, 0, rlookup_table_size);
752 memset(amd_iommu_pd_alloc_bitmap, 0, MAX_DOMAIN_ID / 8);
753
754 /*
755 * never allocate domain 0 because its used as the non-allocated and
756 * error value placeholder
757 */
758 amd_iommu_pd_alloc_bitmap[0] = 1;
759
760 /*
761 * now the data structures are allocated and basically initialized
762 * start the real acpi table scan
763 */
764 ret = -ENODEV;
765 if (acpi_table_parse("IVRS", init_iommu_all) != 0)
766 goto free;
767
768 if (acpi_table_parse("IVRS", init_memory_definitions) != 0)
769 goto free;
770
771 ret = amd_iommu_init_dma_ops();
772 if (ret)
773 goto free;
774
775 ret = sysdev_class_register(&amd_iommu_sysdev_class);
776 if (ret)
777 goto free;
778
779 ret = sysdev_register(&device_amd_iommu);
780 if (ret)
781 goto free;
782
783 enable_iommus();
784
785 printk(KERN_INFO "AMD IOMMU: aperture size is %d MB\n",
786 (1 << (amd_iommu_aperture_order-20)));
787
788 printk(KERN_INFO "AMD IOMMU: device isolation ");
789 if (amd_iommu_isolate)
790 printk("enabled\n");
791 else
792 printk("disabled\n");
793
794out:
795 return ret;
796
797free:
798 if (amd_iommu_pd_alloc_bitmap)
799 free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, 1);
800
801 if (amd_iommu_pd_table)
802 free_pages((unsigned long)amd_iommu_pd_table,
803 get_order(rlookup_table_size));
804
805 if (amd_iommu_rlookup_table)
806 free_pages((unsigned long)amd_iommu_rlookup_table,
807 get_order(rlookup_table_size));
808
809 if (amd_iommu_alias_table)
810 free_pages((unsigned long)amd_iommu_alias_table,
811 get_order(alias_table_size));
812
813 if (amd_iommu_dev_table)
814 free_pages((unsigned long)amd_iommu_dev_table,
815 get_order(dev_table_size));
816
817 free_iommu_all();
818
819 free_unity_maps();
820
821 goto out;
822}
823
824static int __init early_amd_iommu_detect(struct acpi_table_header *table)
825{
826 return 0;
827}
828
829void __init amd_iommu_detect(void)
830{
831 if (swiotlb || no_iommu || iommu_detected)
832 return;
833
834 if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) {
835 iommu_detected = 1;
836 amd_iommu_detected = 1;
837#ifdef CONFIG_GART_IOMMU
838 gart_iommu_aperture_disabled = 1;
839 gart_iommu_aperture = 0;
840#endif
841 }
842}
843
844static int __init parse_amd_iommu_options(char *str)
845{
846 for (; *str; ++str) {
847 if (strcmp(str, "isolate") == 0)
848 amd_iommu_isolate = 1;
849 }
850
851 return 1;
852}
853
854static int __init parse_amd_iommu_size_options(char *str)
855{
856 for (; *str; ++str) {
857 if (strcmp(str, "32M") == 0)
858 amd_iommu_aperture_order = 25;
859 if (strcmp(str, "64M") == 0)
860 amd_iommu_aperture_order = 26;
861 if (strcmp(str, "128M") == 0)
862 amd_iommu_aperture_order = 27;
863 if (strcmp(str, "256M") == 0)
864 amd_iommu_aperture_order = 28;
865 if (strcmp(str, "512M") == 0)
866 amd_iommu_aperture_order = 29;
867 if (strcmp(str, "1G") == 0)
868 amd_iommu_aperture_order = 30;
869 }
870
871 return 1;
872}
873
874__setup("amd_iommu=", parse_amd_iommu_options);
875__setup("amd_iommu_size=", parse_amd_iommu_size_options);
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 66b140932b23..600470d464fa 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -35,6 +35,18 @@ int fallback_aper_force __initdata;
35 35
36int fix_aperture __initdata = 1; 36int fix_aperture __initdata = 1;
37 37
38struct bus_dev_range {
39 int bus;
40 int dev_base;
41 int dev_limit;
42};
43
44static struct bus_dev_range bus_dev_ranges[] __initdata = {
45 { 0x00, 0x18, 0x20},
46 { 0xff, 0x00, 0x20},
47 { 0xfe, 0x00, 0x20}
48};
49
38static struct resource gart_resource = { 50static struct resource gart_resource = {
39 .name = "GART", 51 .name = "GART",
40 .flags = IORESOURCE_MEM, 52 .flags = IORESOURCE_MEM,
@@ -55,8 +67,9 @@ static u32 __init allocate_aperture(void)
55 u32 aper_size; 67 u32 aper_size;
56 void *p; 68 void *p;
57 69
58 if (fallback_aper_order > 7) 70 /* aper_size should <= 1G */
59 fallback_aper_order = 7; 71 if (fallback_aper_order > 5)
72 fallback_aper_order = 5;
60 aper_size = (32 * 1024 * 1024) << fallback_aper_order; 73 aper_size = (32 * 1024 * 1024) << fallback_aper_order;
61 74
62 /* 75 /*
@@ -65,7 +78,20 @@ static u32 __init allocate_aperture(void)
65 * memory. Unfortunately we cannot move it up because that would 78 * memory. Unfortunately we cannot move it up because that would
66 * make the IOMMU useless. 79 * make the IOMMU useless.
67 */ 80 */
68 p = __alloc_bootmem_nopanic(aper_size, aper_size, 0); 81 /*
82 * using 512M as goal, in case kexec will load kernel_big
83 * that will do the on position decompress, and could overlap with
84 * that positon with gart that is used.
85 * sequende:
86 * kernel_small
87 * ==> kexec (with kdump trigger path or previous doesn't shutdown gart)
88 * ==> kernel_small(gart area become e820_reserved)
89 * ==> kexec (with kdump trigger path or previous doesn't shutdown gart)
90 * ==> kerne_big (uncompressed size will be big than 64M or 128M)
91 * so don't use 512M below as gart iommu, leave the space for kernel
92 * code for safe
93 */
94 p = __alloc_bootmem_nopanic(aper_size, aper_size, 512ULL<<20);
69 if (!p || __pa(p)+aper_size > 0xffffffff) { 95 if (!p || __pa(p)+aper_size > 0xffffffff) {
70 printk(KERN_ERR 96 printk(KERN_ERR
71 "Cannot allocate aperture memory hole (%p,%uK)\n", 97 "Cannot allocate aperture memory hole (%p,%uK)\n",
@@ -83,69 +109,53 @@ static u32 __init allocate_aperture(void)
83 return (u32)__pa(p); 109 return (u32)__pa(p);
84} 110}
85 111
86static int __init aperture_valid(u64 aper_base, u32 aper_size)
87{
88 if (!aper_base)
89 return 0;
90
91 if (aper_base + aper_size > 0x100000000UL) {
92 printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n");
93 return 0;
94 }
95 if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
96 printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n");
97 return 0;
98 }
99 if (aper_size < 64*1024*1024) {
100 printk(KERN_ERR "Aperture too small (%d MB)\n", aper_size>>20);
101 return 0;
102 }
103
104 return 1;
105}
106 112
107/* Find a PCI capability */ 113/* Find a PCI capability */
108static __u32 __init find_cap(int num, int slot, int func, int cap) 114static u32 __init find_cap(int bus, int slot, int func, int cap)
109{ 115{
110 int bytes; 116 int bytes;
111 u8 pos; 117 u8 pos;
112 118
113 if (!(read_pci_config_16(num, slot, func, PCI_STATUS) & 119 if (!(read_pci_config_16(bus, slot, func, PCI_STATUS) &
114 PCI_STATUS_CAP_LIST)) 120 PCI_STATUS_CAP_LIST))
115 return 0; 121 return 0;
116 122
117 pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST); 123 pos = read_pci_config_byte(bus, slot, func, PCI_CAPABILITY_LIST);
118 for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) { 124 for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
119 u8 id; 125 u8 id;
120 126
121 pos &= ~3; 127 pos &= ~3;
122 id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID); 128 id = read_pci_config_byte(bus, slot, func, pos+PCI_CAP_LIST_ID);
123 if (id == 0xff) 129 if (id == 0xff)
124 break; 130 break;
125 if (id == cap) 131 if (id == cap)
126 return pos; 132 return pos;
127 pos = read_pci_config_byte(num, slot, func, 133 pos = read_pci_config_byte(bus, slot, func,
128 pos+PCI_CAP_LIST_NEXT); 134 pos+PCI_CAP_LIST_NEXT);
129 } 135 }
130 return 0; 136 return 0;
131} 137}
132 138
133/* Read a standard AGPv3 bridge header */ 139/* Read a standard AGPv3 bridge header */
134static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order) 140static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order)
135{ 141{
136 u32 apsize; 142 u32 apsize;
137 u32 apsizereg; 143 u32 apsizereg;
138 int nbits; 144 int nbits;
139 u32 aper_low, aper_hi; 145 u32 aper_low, aper_hi;
140 u64 aper; 146 u64 aper;
147 u32 old_order;
141 148
142 printk(KERN_INFO "AGP bridge at %02x:%02x:%02x\n", num, slot, func); 149 printk(KERN_INFO "AGP bridge at %02x:%02x:%02x\n", bus, slot, func);
143 apsizereg = read_pci_config_16(num, slot, func, cap + 0x14); 150 apsizereg = read_pci_config_16(bus, slot, func, cap + 0x14);
144 if (apsizereg == 0xffffffff) { 151 if (apsizereg == 0xffffffff) {
145 printk(KERN_ERR "APSIZE in AGP bridge unreadable\n"); 152 printk(KERN_ERR "APSIZE in AGP bridge unreadable\n");
146 return 0; 153 return 0;
147 } 154 }
148 155
156 /* old_order could be the value from NB gart setting */
157 old_order = *order;
158
149 apsize = apsizereg & 0xfff; 159 apsize = apsizereg & 0xfff;
150 /* Some BIOS use weird encodings not in the AGPv3 table. */ 160 /* Some BIOS use weird encodings not in the AGPv3 table. */
151 if (apsize & 0xff) 161 if (apsize & 0xff)
@@ -155,14 +165,26 @@ static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order)
155 if ((int)*order < 0) /* < 32MB */ 165 if ((int)*order < 0) /* < 32MB */
156 *order = 0; 166 *order = 0;
157 167
158 aper_low = read_pci_config(num, slot, func, 0x10); 168 aper_low = read_pci_config(bus, slot, func, 0x10);
159 aper_hi = read_pci_config(num, slot, func, 0x14); 169 aper_hi = read_pci_config(bus, slot, func, 0x14);
160 aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32); 170 aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32);
161 171
172 /*
173 * On some sick chips, APSIZE is 0. It means it wants 4G
174 * so let double check that order, and lets trust AMD NB settings:
175 */
176 printk(KERN_INFO "Aperture from AGP @ %Lx old size %u MB\n",
177 aper, 32 << old_order);
178 if (aper + (32ULL<<(20 + *order)) > 0x100000000ULL) {
179 printk(KERN_INFO "Aperture size %u MB (APSIZE %x) is not right, using settings from NB\n",
180 32 << *order, apsizereg);
181 *order = old_order;
182 }
183
162 printk(KERN_INFO "Aperture from AGP @ %Lx size %u MB (APSIZE %x)\n", 184 printk(KERN_INFO "Aperture from AGP @ %Lx size %u MB (APSIZE %x)\n",
163 aper, 32 << *order, apsizereg); 185 aper, 32 << *order, apsizereg);
164 186
165 if (!aperture_valid(aper, (32*1024*1024) << *order)) 187 if (!aperture_valid(aper, (32*1024*1024) << *order, 32<<20))
166 return 0; 188 return 0;
167 return (u32)aper; 189 return (u32)aper;
168} 190}
@@ -180,17 +202,17 @@ static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order)
180 * the AGP bridges should be always an own bus on the HT hierarchy, 202 * the AGP bridges should be always an own bus on the HT hierarchy,
181 * but do it here for future safety. 203 * but do it here for future safety.
182 */ 204 */
183static __u32 __init search_agp_bridge(u32 *order, int *valid_agp) 205static u32 __init search_agp_bridge(u32 *order, int *valid_agp)
184{ 206{
185 int num, slot, func; 207 int bus, slot, func;
186 208
187 /* Poor man's PCI discovery */ 209 /* Poor man's PCI discovery */
188 for (num = 0; num < 256; num++) { 210 for (bus = 0; bus < 256; bus++) {
189 for (slot = 0; slot < 32; slot++) { 211 for (slot = 0; slot < 32; slot++) {
190 for (func = 0; func < 8; func++) { 212 for (func = 0; func < 8; func++) {
191 u32 class, cap; 213 u32 class, cap;
192 u8 type; 214 u8 type;
193 class = read_pci_config(num, slot, func, 215 class = read_pci_config(bus, slot, func,
194 PCI_CLASS_REVISION); 216 PCI_CLASS_REVISION);
195 if (class == 0xffffffff) 217 if (class == 0xffffffff)
196 break; 218 break;
@@ -199,17 +221,17 @@ static __u32 __init search_agp_bridge(u32 *order, int *valid_agp)
199 case PCI_CLASS_BRIDGE_HOST: 221 case PCI_CLASS_BRIDGE_HOST:
200 case PCI_CLASS_BRIDGE_OTHER: /* needed? */ 222 case PCI_CLASS_BRIDGE_OTHER: /* needed? */
201 /* AGP bridge? */ 223 /* AGP bridge? */
202 cap = find_cap(num, slot, func, 224 cap = find_cap(bus, slot, func,
203 PCI_CAP_ID_AGP); 225 PCI_CAP_ID_AGP);
204 if (!cap) 226 if (!cap)
205 break; 227 break;
206 *valid_agp = 1; 228 *valid_agp = 1;
207 return read_agp(num, slot, func, cap, 229 return read_agp(bus, slot, func, cap,
208 order); 230 order);
209 } 231 }
210 232
211 /* No multi-function device? */ 233 /* No multi-function device? */
212 type = read_pci_config_byte(num, slot, func, 234 type = read_pci_config_byte(bus, slot, func,
213 PCI_HEADER_TYPE); 235 PCI_HEADER_TYPE);
214 if (!(type & 0x80)) 236 if (!(type & 0x80))
215 break; 237 break;
@@ -249,36 +271,50 @@ void __init early_gart_iommu_check(void)
249 * or BIOS forget to put that in reserved. 271 * or BIOS forget to put that in reserved.
250 * try to update e820 to make that region as reserved. 272 * try to update e820 to make that region as reserved.
251 */ 273 */
252 int fix, num; 274 int i, fix, slot;
253 u32 ctl; 275 u32 ctl;
254 u32 aper_size = 0, aper_order = 0, last_aper_order = 0; 276 u32 aper_size = 0, aper_order = 0, last_aper_order = 0;
255 u64 aper_base = 0, last_aper_base = 0; 277 u64 aper_base = 0, last_aper_base = 0;
256 int aper_enabled = 0, last_aper_enabled = 0; 278 int aper_enabled = 0, last_aper_enabled = 0, last_valid = 0;
257 279
258 if (!early_pci_allowed()) 280 if (!early_pci_allowed())
259 return; 281 return;
260 282
283 /* This is mostly duplicate of iommu_hole_init */
261 fix = 0; 284 fix = 0;
262 for (num = 24; num < 32; num++) { 285 for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {
263 if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) 286 int bus;
264 continue; 287 int dev_base, dev_limit;
265 288
266 ctl = read_pci_config(0, num, 3, 0x90); 289 bus = bus_dev_ranges[i].bus;
267 aper_enabled = ctl & 1; 290 dev_base = bus_dev_ranges[i].dev_base;
268 aper_order = (ctl >> 1) & 7; 291 dev_limit = bus_dev_ranges[i].dev_limit;
269 aper_size = (32 * 1024 * 1024) << aper_order; 292
270 aper_base = read_pci_config(0, num, 3, 0x94) & 0x7fff; 293 for (slot = dev_base; slot < dev_limit; slot++) {
271 aper_base <<= 25; 294 if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
272 295 continue;
273 if ((last_aper_order && aper_order != last_aper_order) || 296
274 (last_aper_base && aper_base != last_aper_base) || 297 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL);
275 (last_aper_enabled && aper_enabled != last_aper_enabled)) { 298 aper_enabled = ctl & AMD64_GARTEN;
276 fix = 1; 299 aper_order = (ctl >> 1) & 7;
277 break; 300 aper_size = (32 * 1024 * 1024) << aper_order;
301 aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;
302 aper_base <<= 25;
303
304 if (last_valid) {
305 if ((aper_order != last_aper_order) ||
306 (aper_base != last_aper_base) ||
307 (aper_enabled != last_aper_enabled)) {
308 fix = 1;
309 break;
310 }
311 }
312
313 last_aper_order = aper_order;
314 last_aper_base = aper_base;
315 last_aper_enabled = aper_enabled;
316 last_valid = 1;
278 } 317 }
279 last_aper_order = aper_order;
280 last_aper_base = aper_base;
281 last_aper_enabled = aper_enabled;
282 } 318 }
283 319
284 if (!fix && !aper_enabled) 320 if (!fix && !aper_enabled)
@@ -290,32 +326,46 @@ void __init early_gart_iommu_check(void)
290 if (gart_fix_e820 && !fix && aper_enabled) { 326 if (gart_fix_e820 && !fix && aper_enabled) {
291 if (e820_any_mapped(aper_base, aper_base + aper_size, 327 if (e820_any_mapped(aper_base, aper_base + aper_size,
292 E820_RAM)) { 328 E820_RAM)) {
293 /* reserved it, so we can resuse it in second kernel */ 329 /* reserve it, so we can reuse it in second kernel */
294 printk(KERN_INFO "update e820 for GART\n"); 330 printk(KERN_INFO "update e820 for GART\n");
295 e820_add_region(aper_base, aper_size, E820_RESERVED); 331 e820_add_region(aper_base, aper_size, E820_RESERVED);
296 update_e820(); 332 update_e820();
297 } 333 }
298 return;
299 } 334 }
300 335
336 if (!fix)
337 return;
338
301 /* different nodes have different setting, disable them all at first*/ 339 /* different nodes have different setting, disable them all at first*/
302 for (num = 24; num < 32; num++) { 340 for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {
303 if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) 341 int bus;
304 continue; 342 int dev_base, dev_limit;
343
344 bus = bus_dev_ranges[i].bus;
345 dev_base = bus_dev_ranges[i].dev_base;
346 dev_limit = bus_dev_ranges[i].dev_limit;
347
348 for (slot = dev_base; slot < dev_limit; slot++) {
349 if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
350 continue;
305 351
306 ctl = read_pci_config(0, num, 3, 0x90); 352 ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL);
307 ctl &= ~1; 353 ctl &= ~AMD64_GARTEN;
308 write_pci_config(0, num, 3, 0x90, ctl); 354 write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl);
355 }
309 } 356 }
310 357
311} 358}
312 359
360static int __initdata printed_gart_size_msg;
361
313void __init gart_iommu_hole_init(void) 362void __init gart_iommu_hole_init(void)
314{ 363{
364 u32 agp_aper_base = 0, agp_aper_order = 0;
315 u32 aper_size, aper_alloc = 0, aper_order = 0, last_aper_order = 0; 365 u32 aper_size, aper_alloc = 0, aper_order = 0, last_aper_order = 0;
316 u64 aper_base, last_aper_base = 0; 366 u64 aper_base, last_aper_base = 0;
317 int fix, num, valid_agp = 0; 367 int fix, slot, valid_agp = 0;
318 int node; 368 int i, node;
319 369
320 if (gart_iommu_aperture_disabled || !fix_aperture || 370 if (gart_iommu_aperture_disabled || !fix_aperture ||
321 !early_pci_allowed()) 371 !early_pci_allowed())
@@ -323,38 +373,63 @@ void __init gart_iommu_hole_init(void)
323 373
324 printk(KERN_INFO "Checking aperture...\n"); 374 printk(KERN_INFO "Checking aperture...\n");
325 375
376 if (!fallback_aper_force)
377 agp_aper_base = search_agp_bridge(&agp_aper_order, &valid_agp);
378
326 fix = 0; 379 fix = 0;
327 node = 0; 380 node = 0;
328 for (num = 24; num < 32; num++) { 381 for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {
329 if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) 382 int bus;
330 continue; 383 int dev_base, dev_limit;
331 384
332 iommu_detected = 1; 385 bus = bus_dev_ranges[i].bus;
333 gart_iommu_aperture = 1; 386 dev_base = bus_dev_ranges[i].dev_base;
334 387 dev_limit = bus_dev_ranges[i].dev_limit;
335 aper_order = (read_pci_config(0, num, 3, 0x90) >> 1) & 7; 388
336 aper_size = (32 * 1024 * 1024) << aper_order; 389 for (slot = dev_base; slot < dev_limit; slot++) {
337 aper_base = read_pci_config(0, num, 3, 0x94) & 0x7fff; 390 if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
338 aper_base <<= 25; 391 continue;
339 392
340 printk(KERN_INFO "Node %d: aperture @ %Lx size %u MB\n", 393 iommu_detected = 1;
341 node, aper_base, aper_size >> 20); 394 gart_iommu_aperture = 1;
342 node++; 395
343 396 aper_order = (read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL) >> 1) & 7;
344 if (!aperture_valid(aper_base, aper_size)) { 397 aper_size = (32 * 1024 * 1024) << aper_order;
345 fix = 1; 398 aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff;
346 break; 399 aper_base <<= 25;
347 } 400
401 printk(KERN_INFO "Node %d: aperture @ %Lx size %u MB\n",
402 node, aper_base, aper_size >> 20);
403 node++;
404
405 if (!aperture_valid(aper_base, aper_size, 64<<20)) {
406 if (valid_agp && agp_aper_base &&
407 agp_aper_base == aper_base &&
408 agp_aper_order == aper_order) {
409 /* the same between two setting from NB and agp */
410 if (!no_iommu && end_pfn > MAX_DMA32_PFN && !printed_gart_size_msg) {
411 printk(KERN_ERR "you are using iommu with agp, but GART size is less than 64M\n");
412 printk(KERN_ERR "please increase GART size in your BIOS setup\n");
413 printk(KERN_ERR "if BIOS doesn't have that option, contact your HW vendor!\n");
414 printed_gart_size_msg = 1;
415 }
416 } else {
417 fix = 1;
418 goto out;
419 }
420 }
348 421
349 if ((last_aper_order && aper_order != last_aper_order) || 422 if ((last_aper_order && aper_order != last_aper_order) ||
350 (last_aper_base && aper_base != last_aper_base)) { 423 (last_aper_base && aper_base != last_aper_base)) {
351 fix = 1; 424 fix = 1;
352 break; 425 goto out;
426 }
427 last_aper_order = aper_order;
428 last_aper_base = aper_base;
353 } 429 }
354 last_aper_order = aper_order;
355 last_aper_base = aper_base;
356 } 430 }
357 431
432out:
358 if (!fix && !fallback_aper_force) { 433 if (!fix && !fallback_aper_force) {
359 if (last_aper_base) { 434 if (last_aper_base) {
360 unsigned long n = (32 * 1024 * 1024) << last_aper_order; 435 unsigned long n = (32 * 1024 * 1024) << last_aper_order;
@@ -364,8 +439,10 @@ void __init gart_iommu_hole_init(void)
364 return; 439 return;
365 } 440 }
366 441
367 if (!fallback_aper_force) 442 if (!fallback_aper_force) {
368 aper_alloc = search_agp_bridge(&aper_order, &valid_agp); 443 aper_alloc = agp_aper_base;
444 aper_order = agp_aper_order;
445 }
369 446
370 if (aper_alloc) { 447 if (aper_alloc) {
371 /* Got the aperture from the AGP bridge */ 448 /* Got the aperture from the AGP bridge */
@@ -401,16 +478,24 @@ void __init gart_iommu_hole_init(void)
401 } 478 }
402 479
403 /* Fix up the north bridges */ 480 /* Fix up the north bridges */
404 for (num = 24; num < 32; num++) { 481 for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {
405 if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) 482 int bus;
406 continue; 483 int dev_base, dev_limit;
407 484
408 /* 485 bus = bus_dev_ranges[i].bus;
409 * Don't enable translation yet. That is done later. 486 dev_base = bus_dev_ranges[i].dev_base;
410 * Assume this BIOS didn't initialise the GART so 487 dev_limit = bus_dev_ranges[i].dev_limit;
411 * just overwrite all previous bits 488 for (slot = dev_base; slot < dev_limit; slot++) {
412 */ 489 if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
413 write_pci_config(0, num, 3, 0x90, aper_order<<1); 490 continue;
414 write_pci_config(0, num, 3, 0x94, aper_alloc>>25); 491
492 /* Don't enable translation yet. That is done later.
493 Assume this BIOS didn't initialise the GART so
494 just overwrite all previous bits */
495 write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, aper_order << 1);
496 write_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE, aper_alloc >> 25);
497 }
415 } 498 }
499
500 set_up_gart_resume(aper_order, aper_alloc);
416} 501}
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 954d67931a50..570c362eca8c 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -64,13 +64,16 @@ static int enable_local_apic __initdata;
64 64
65/* Local APIC timer verification ok */ 65/* Local APIC timer verification ok */
66static int local_apic_timer_verify_ok; 66static int local_apic_timer_verify_ok;
67/* Disable local APIC timer from the kernel commandline or via dmi quirk 67/* Disable local APIC timer from the kernel commandline or via dmi quirk */
68 or using CPU MSR check */ 68static int local_apic_timer_disabled;
69int local_apic_timer_disabled;
70/* Local APIC timer works in C2 */ 69/* Local APIC timer works in C2 */
71int local_apic_timer_c2_ok; 70int local_apic_timer_c2_ok;
72EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok); 71EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok);
73 72
73int first_system_vector = 0xfe;
74
75char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE};
76
74/* 77/*
75 * Debug level, exported for io_apic.c 78 * Debug level, exported for io_apic.c
76 */ 79 */
@@ -1159,9 +1162,6 @@ static int __init detect_init_APIC(void)
1159 if (l & MSR_IA32_APICBASE_ENABLE) 1162 if (l & MSR_IA32_APICBASE_ENABLE)
1160 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; 1163 mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
1161 1164
1162 if (nmi_watchdog != NMI_NONE && nmi_watchdog != NMI_DISABLED)
1163 nmi_watchdog = NMI_LOCAL_APIC;
1164
1165 printk(KERN_INFO "Found and enabled local APIC!\n"); 1165 printk(KERN_INFO "Found and enabled local APIC!\n");
1166 1166
1167 apic_pm_activate(); 1167 apic_pm_activate();
@@ -1274,6 +1274,10 @@ int __init APIC_init_uniprocessor(void)
1274 1274
1275 setup_local_APIC(); 1275 setup_local_APIC();
1276 1276
1277#ifdef CONFIG_X86_IO_APIC
1278 if (!smp_found_config || skip_ioapic_setup || !nr_ioapics)
1279#endif
1280 localise_nmi_watchdog();
1277 end_local_APIC_setup(); 1281 end_local_APIC_setup();
1278#ifdef CONFIG_X86_IO_APIC 1282#ifdef CONFIG_X86_IO_APIC
1279 if (smp_found_config) 1283 if (smp_found_config)
@@ -1356,13 +1360,13 @@ void __init smp_intr_init(void)
1356 * The reschedule interrupt is a CPU-to-CPU reschedule-helper 1360 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1357 * IPI, driven by wakeup. 1361 * IPI, driven by wakeup.
1358 */ 1362 */
1359 set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); 1363 alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
1360 1364
1361 /* IPI for invalidation */ 1365 /* IPI for invalidation */
1362 set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt); 1366 alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
1363 1367
1364 /* IPI for generic function call */ 1368 /* IPI for generic function call */
1365 set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); 1369 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
1366} 1370}
1367#endif 1371#endif
1368 1372
@@ -1375,15 +1379,15 @@ void __init apic_intr_init(void)
1375 smp_intr_init(); 1379 smp_intr_init();
1376#endif 1380#endif
1377 /* self generated IPI for local APIC timer */ 1381 /* self generated IPI for local APIC timer */
1378 set_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); 1382 alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
1379 1383
1380 /* IPI vectors for APIC spurious and error interrupts */ 1384 /* IPI vectors for APIC spurious and error interrupts */
1381 set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); 1385 alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
1382 set_intr_gate(ERROR_APIC_VECTOR, error_interrupt); 1386 alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
1383 1387
1384 /* thermal monitor LVT interrupt */ 1388 /* thermal monitor LVT interrupt */
1385#ifdef CONFIG_X86_MCE_P4THERMAL 1389#ifdef CONFIG_X86_MCE_P4THERMAL
1386 set_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); 1390 alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
1387#endif 1391#endif
1388} 1392}
1389 1393
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index a4bd8fbb78a9..d7406aa1c985 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -43,7 +43,7 @@
43#include <mach_ipi.h> 43#include <mach_ipi.h>
44#include <mach_apic.h> 44#include <mach_apic.h>
45 45
46int disable_apic_timer __cpuinitdata; 46static int disable_apic_timer __cpuinitdata;
47static int apic_calibrate_pmtmr __initdata; 47static int apic_calibrate_pmtmr __initdata;
48int disable_apic; 48int disable_apic;
49 49
@@ -425,32 +425,8 @@ void __init setup_boot_APIC_clock(void)
425 setup_APIC_timer(); 425 setup_APIC_timer();
426} 426}
427 427
428/*
429 * AMD C1E enabled CPUs have a real nasty problem: Some BIOSes set the
430 * C1E flag only in the secondary CPU, so when we detect the wreckage
431 * we already have enabled the boot CPU local apic timer. Check, if
432 * disable_apic_timer is set and the DUMMY flag is cleared. If yes,
433 * set the DUMMY flag again and force the broadcast mode in the
434 * clockevents layer.
435 */
436static void __cpuinit check_boot_apic_timer_broadcast(void)
437{
438 if (!disable_apic_timer ||
439 (lapic_clockevent.features & CLOCK_EVT_FEAT_DUMMY))
440 return;
441
442 printk(KERN_INFO "AMD C1E detected late. Force timer broadcast.\n");
443 lapic_clockevent.features |= CLOCK_EVT_FEAT_DUMMY;
444
445 local_irq_enable();
446 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
447 &boot_cpu_physical_apicid);
448 local_irq_disable();
449}
450
451void __cpuinit setup_secondary_APIC_clock(void) 428void __cpuinit setup_secondary_APIC_clock(void)
452{ 429{
453 check_boot_apic_timer_broadcast();
454 setup_APIC_timer(); 430 setup_APIC_timer();
455} 431}
456 432
@@ -878,7 +854,7 @@ static int __init detect_init_APIC(void)
878 854
879void __init early_init_lapic_mapping(void) 855void __init early_init_lapic_mapping(void)
880{ 856{
881 unsigned long apic_phys; 857 unsigned long phys_addr;
882 858
883 /* 859 /*
884 * If no local APIC can be found then go out 860 * If no local APIC can be found then go out
@@ -887,11 +863,11 @@ void __init early_init_lapic_mapping(void)
887 if (!smp_found_config) 863 if (!smp_found_config)
888 return; 864 return;
889 865
890 apic_phys = mp_lapic_addr; 866 phys_addr = mp_lapic_addr;
891 867
892 set_fixmap_nocache(FIX_APIC_BASE, apic_phys); 868 set_fixmap_nocache(FIX_APIC_BASE, phys_addr);
893 apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", 869 apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",
894 APIC_BASE, apic_phys); 870 APIC_BASE, phys_addr);
895 871
896 /* 872 /*
897 * Fetch the APIC ID of the BSP in case we have a 873 * Fetch the APIC ID of the BSP in case we have a
@@ -957,6 +933,8 @@ int __init APIC_init_uniprocessor(void)
957 if (!skip_ioapic_setup && nr_ioapics) 933 if (!skip_ioapic_setup && nr_ioapics)
958 enable_IO_APIC(); 934 enable_IO_APIC();
959 935
936 if (!smp_found_config || skip_ioapic_setup || !nr_ioapics)
937 localise_nmi_watchdog();
960 end_local_APIC_setup(); 938 end_local_APIC_setup();
961 939
962 if (smp_found_config && !skip_ioapic_setup && nr_ioapics) 940 if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index bf9290e29013..00e6d1370954 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -228,6 +228,7 @@
228#include <linux/suspend.h> 228#include <linux/suspend.h>
229#include <linux/kthread.h> 229#include <linux/kthread.h>
230#include <linux/jiffies.h> 230#include <linux/jiffies.h>
231#include <linux/smp_lock.h>
231 232
232#include <asm/system.h> 233#include <asm/system.h>
233#include <asm/uaccess.h> 234#include <asm/uaccess.h>
@@ -1149,7 +1150,7 @@ static void queue_event(apm_event_t event, struct apm_user *sender)
1149 as->event_tail = 0; 1150 as->event_tail = 0;
1150 } 1151 }
1151 as->events[as->event_head] = event; 1152 as->events[as->event_head] = event;
1152 if ((!as->suser) || (!as->writer)) 1153 if (!as->suser || !as->writer)
1153 continue; 1154 continue;
1154 switch (event) { 1155 switch (event) {
1155 case APM_SYS_SUSPEND: 1156 case APM_SYS_SUSPEND:
@@ -1396,7 +1397,7 @@ static void apm_mainloop(void)
1396 1397
1397static int check_apm_user(struct apm_user *as, const char *func) 1398static int check_apm_user(struct apm_user *as, const char *func)
1398{ 1399{
1399 if ((as == NULL) || (as->magic != APM_BIOS_MAGIC)) { 1400 if (as == NULL || as->magic != APM_BIOS_MAGIC) {
1400 printk(KERN_ERR "apm: %s passed bad filp\n", func); 1401 printk(KERN_ERR "apm: %s passed bad filp\n", func);
1401 return 1; 1402 return 1;
1402 } 1403 }
@@ -1459,18 +1460,19 @@ static unsigned int do_poll(struct file *fp, poll_table *wait)
1459 return 0; 1460 return 0;
1460} 1461}
1461 1462
1462static int do_ioctl(struct inode *inode, struct file *filp, 1463static long do_ioctl(struct file *filp, u_int cmd, u_long arg)
1463 u_int cmd, u_long arg)
1464{ 1464{
1465 struct apm_user *as; 1465 struct apm_user *as;
1466 int ret;
1466 1467
1467 as = filp->private_data; 1468 as = filp->private_data;
1468 if (check_apm_user(as, "ioctl")) 1469 if (check_apm_user(as, "ioctl"))
1469 return -EIO; 1470 return -EIO;
1470 if ((!as->suser) || (!as->writer)) 1471 if (!as->suser || !as->writer)
1471 return -EPERM; 1472 return -EPERM;
1472 switch (cmd) { 1473 switch (cmd) {
1473 case APM_IOC_STANDBY: 1474 case APM_IOC_STANDBY:
1475 lock_kernel();
1474 if (as->standbys_read > 0) { 1476 if (as->standbys_read > 0) {
1475 as->standbys_read--; 1477 as->standbys_read--;
1476 as->standbys_pending--; 1478 as->standbys_pending--;
@@ -1479,8 +1481,10 @@ static int do_ioctl(struct inode *inode, struct file *filp,
1479 queue_event(APM_USER_STANDBY, as); 1481 queue_event(APM_USER_STANDBY, as);
1480 if (standbys_pending <= 0) 1482 if (standbys_pending <= 0)
1481 standby(); 1483 standby();
1484 unlock_kernel();
1482 break; 1485 break;
1483 case APM_IOC_SUSPEND: 1486 case APM_IOC_SUSPEND:
1487 lock_kernel();
1484 if (as->suspends_read > 0) { 1488 if (as->suspends_read > 0) {
1485 as->suspends_read--; 1489 as->suspends_read--;
1486 as->suspends_pending--; 1490 as->suspends_pending--;
@@ -1488,16 +1492,17 @@ static int do_ioctl(struct inode *inode, struct file *filp,
1488 } else 1492 } else
1489 queue_event(APM_USER_SUSPEND, as); 1493 queue_event(APM_USER_SUSPEND, as);
1490 if (suspends_pending <= 0) { 1494 if (suspends_pending <= 0) {
1491 return suspend(1); 1495 ret = suspend(1);
1492 } else { 1496 } else {
1493 as->suspend_wait = 1; 1497 as->suspend_wait = 1;
1494 wait_event_interruptible(apm_suspend_waitqueue, 1498 wait_event_interruptible(apm_suspend_waitqueue,
1495 as->suspend_wait == 0); 1499 as->suspend_wait == 0);
1496 return as->suspend_result; 1500 ret = as->suspend_result;
1497 } 1501 }
1498 break; 1502 unlock_kernel();
1503 return ret;
1499 default: 1504 default:
1500 return -EINVAL; 1505 return -ENOTTY;
1501 } 1506 }
1502 return 0; 1507 return 0;
1503} 1508}
@@ -1860,7 +1865,7 @@ static const struct file_operations apm_bios_fops = {
1860 .owner = THIS_MODULE, 1865 .owner = THIS_MODULE,
1861 .read = do_read, 1866 .read = do_read,
1862 .poll = do_poll, 1867 .poll = do_poll,
1863 .ioctl = do_ioctl, 1868 .unlocked_ioctl = do_ioctl,
1864 .open = do_open, 1869 .open = do_open,
1865 .release = do_release, 1870 .release = do_release,
1866}; 1871};
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index a0c6f8190887..65b1be5fe9ce 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -6,11 +6,15 @@ obj-y := intel_cacheinfo.o addon_cpuid_features.o
6obj-y += proc.o feature_names.o 6obj-y += proc.o feature_names.o
7 7
8obj-$(CONFIG_X86_32) += common.o bugs.o 8obj-$(CONFIG_X86_32) += common.o bugs.o
9obj-$(CONFIG_X86_64) += bugs_64.o
9obj-$(CONFIG_X86_32) += amd.o 10obj-$(CONFIG_X86_32) += amd.o
11obj-$(CONFIG_X86_64) += amd_64.o
10obj-$(CONFIG_X86_32) += cyrix.o 12obj-$(CONFIG_X86_32) += cyrix.o
11obj-$(CONFIG_X86_32) += centaur.o 13obj-$(CONFIG_X86_32) += centaur.o
14obj-$(CONFIG_X86_64) += centaur_64.o
12obj-$(CONFIG_X86_32) += transmeta.o 15obj-$(CONFIG_X86_32) += transmeta.o
13obj-$(CONFIG_X86_32) += intel.o 16obj-$(CONFIG_X86_32) += intel.o
17obj-$(CONFIG_X86_64) += intel_64.o
14obj-$(CONFIG_X86_32) += umc.o 18obj-$(CONFIG_X86_32) += umc.o
15 19
16obj-$(CONFIG_X86_MCE) += mcheck/ 20obj-$(CONFIG_X86_MCE) += mcheck/
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index c2e1ce33c7cb..84a8220a6072 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -1,9 +1,7 @@
1
2/* 1/*
3 * Routines to indentify additional cpu features that are scattered in 2 * Routines to indentify additional cpu features that are scattered in
4 * cpuid space. 3 * cpuid space.
5 */ 4 */
6
7#include <linux/cpu.h> 5#include <linux/cpu.h>
8 6
9#include <asm/pat.h> 7#include <asm/pat.h>
@@ -53,19 +51,20 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
53#ifdef CONFIG_X86_PAT 51#ifdef CONFIG_X86_PAT
54void __cpuinit validate_pat_support(struct cpuinfo_x86 *c) 52void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
55{ 53{
54 if (!cpu_has_pat)
55 pat_disable("PAT not supported by CPU.");
56
56 switch (c->x86_vendor) { 57 switch (c->x86_vendor) {
57 case X86_VENDOR_AMD:
58 if (c->x86 >= 0xf && c->x86 <= 0x11)
59 return;
60 break;
61 case X86_VENDOR_INTEL: 58 case X86_VENDOR_INTEL:
62 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15)) 59 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
63 return; 60 return;
64 break; 61 break;
62 case X86_VENDOR_AMD:
63 case X86_VENDOR_CENTAUR:
64 case X86_VENDOR_TRANSMETA:
65 return;
65 } 66 }
66 67
67 pat_disable(cpu_has_pat ? 68 pat_disable("PAT disabled. Not yet verified on this CPU type.");
68 "PAT disabled. Not yet verified on this CPU type." :
69 "PAT not supported by CPU.");
70} 69}
71#endif 70#endif
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 245866828294..81a07ca65d44 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -24,43 +24,6 @@
24extern void vide(void); 24extern void vide(void);
25__asm__(".align 4\nvide: ret"); 25__asm__(".align 4\nvide: ret");
26 26
27#ifdef CONFIG_X86_LOCAL_APIC
28#define ENABLE_C1E_MASK 0x18000000
29#define CPUID_PROCESSOR_SIGNATURE 1
30#define CPUID_XFAM 0x0ff00000
31#define CPUID_XFAM_K8 0x00000000
32#define CPUID_XFAM_10H 0x00100000
33#define CPUID_XFAM_11H 0x00200000
34#define CPUID_XMOD 0x000f0000
35#define CPUID_XMOD_REV_F 0x00040000
36
37/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */
38static __cpuinit int amd_apic_timer_broken(void)
39{
40 u32 lo, hi;
41 u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
42 switch (eax & CPUID_XFAM) {
43 case CPUID_XFAM_K8:
44 if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
45 break;
46 case CPUID_XFAM_10H:
47 case CPUID_XFAM_11H:
48 rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
49 if (lo & ENABLE_C1E_MASK) {
50 if (smp_processor_id() != boot_cpu_physical_apicid)
51 printk(KERN_INFO "AMD C1E detected late. "
52 " Force timer broadcast.\n");
53 return 1;
54 }
55 break;
56 default:
57 /* err on the side of caution */
58 return 1;
59 }
60 return 0;
61}
62#endif
63
64int force_mwait __cpuinitdata; 27int force_mwait __cpuinitdata;
65 28
66static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) 29static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
@@ -297,11 +260,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
297 num_cache_leaves = 3; 260 num_cache_leaves = 3;
298 } 261 }
299 262
300#ifdef CONFIG_X86_LOCAL_APIC
301 if (amd_apic_timer_broken())
302 local_apic_timer_disabled = 1;
303#endif
304
305 /* K6s reports MCEs but don't actually have all the MSRs */ 263 /* K6s reports MCEs but don't actually have all the MSRs */
306 if (c->x86 < 6) 264 if (c->x86 < 6)
307 clear_cpu_cap(c, X86_FEATURE_MCE); 265 clear_cpu_cap(c, X86_FEATURE_MCE);
diff --git a/arch/x86/kernel/cpu/amd_64.c b/arch/x86/kernel/cpu/amd_64.c
new file mode 100644
index 000000000000..30b7557c9641
--- /dev/null
+++ b/arch/x86/kernel/cpu/amd_64.c
@@ -0,0 +1,211 @@
1#include <linux/init.h>
2#include <linux/mm.h>
3
4#include <asm/numa_64.h>
5#include <asm/mmconfig.h>
6#include <asm/cacheflush.h>
7
8#include <mach_apic.h>
9
10#include "cpu.h"
11
12int force_mwait __cpuinitdata;
13
14#ifdef CONFIG_NUMA
15static int __cpuinit nearby_node(int apicid)
16{
17 int i, node;
18
19 for (i = apicid - 1; i >= 0; i--) {
20 node = apicid_to_node[i];
21 if (node != NUMA_NO_NODE && node_online(node))
22 return node;
23 }
24 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
25 node = apicid_to_node[i];
26 if (node != NUMA_NO_NODE && node_online(node))
27 return node;
28 }
29 return first_node(node_online_map); /* Shouldn't happen */
30}
31#endif
32
33/*
34 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
35 * Assumes number of cores is a power of two.
36 */
37static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
38{
39#ifdef CONFIG_SMP
40 unsigned bits;
41#ifdef CONFIG_NUMA
42 int cpu = smp_processor_id();
43 int node = 0;
44 unsigned apicid = hard_smp_processor_id();
45#endif
46 bits = c->x86_coreid_bits;
47
48 /* Low order bits define the core id (index of core in socket) */
49 c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);
50 /* Convert the initial APIC ID into the socket ID */
51 c->phys_proc_id = c->initial_apicid >> bits;
52
53#ifdef CONFIG_NUMA
54 node = c->phys_proc_id;
55 if (apicid_to_node[apicid] != NUMA_NO_NODE)
56 node = apicid_to_node[apicid];
57 if (!node_online(node)) {
58 /* Two possibilities here:
59 - The CPU is missing memory and no node was created.
60 In that case try picking one from a nearby CPU
61 - The APIC IDs differ from the HyperTransport node IDs
62 which the K8 northbridge parsing fills in.
63 Assume they are all increased by a constant offset,
64 but in the same order as the HT nodeids.
65 If that doesn't result in a usable node fall back to the
66 path for the previous case. */
67
68 int ht_nodeid = c->initial_apicid;
69
70 if (ht_nodeid >= 0 &&
71 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
72 node = apicid_to_node[ht_nodeid];
73 /* Pick a nearby node */
74 if (!node_online(node))
75 node = nearby_node(apicid);
76 }
77 numa_set_node(cpu, node);
78
79 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
80#endif
81#endif
82}
83
84static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
85{
86#ifdef CONFIG_SMP
87 unsigned bits, ecx;
88
89 /* Multi core CPU? */
90 if (c->extended_cpuid_level < 0x80000008)
91 return;
92
93 ecx = cpuid_ecx(0x80000008);
94
95 c->x86_max_cores = (ecx & 0xff) + 1;
96
97 /* CPU telling us the core id bits shift? */
98 bits = (ecx >> 12) & 0xF;
99
100 /* Otherwise recompute */
101 if (bits == 0) {
102 while ((1 << bits) < c->x86_max_cores)
103 bits++;
104 }
105
106 c->x86_coreid_bits = bits;
107
108#endif
109}
110
111static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
112{
113 early_init_amd_mc(c);
114
115 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
116 if (c->x86_power & (1<<8))
117 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
118}
119
120static void __cpuinit init_amd(struct cpuinfo_x86 *c)
121{
122 unsigned level;
123
124#ifdef CONFIG_SMP
125 unsigned long value;
126
127 /*
128 * Disable TLB flush filter by setting HWCR.FFDIS on K8
129 * bit 6 of msr C001_0015
130 *
131 * Errata 63 for SH-B3 steppings
132 * Errata 122 for all steppings (F+ have it disabled by default)
133 */
134 if (c->x86 == 15) {
135 rdmsrl(MSR_K8_HWCR, value);
136 value |= 1 << 6;
137 wrmsrl(MSR_K8_HWCR, value);
138 }
139#endif
140
141 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
142 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
143 clear_cpu_cap(c, 0*32+31);
144
145 /* On C+ stepping K8 rep microcode works well for copy/memset */
146 level = cpuid_eax(1);
147 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) ||
148 level >= 0x0f58))
149 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
150 if (c->x86 == 0x10 || c->x86 == 0x11)
151 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
152
153 /* Enable workaround for FXSAVE leak */
154 if (c->x86 >= 6)
155 set_cpu_cap(c, X86_FEATURE_FXSAVE_LEAK);
156
157 level = get_model_name(c);
158 if (!level) {
159 switch (c->x86) {
160 case 15:
161 /* Should distinguish Models here, but this is only
162 a fallback anyways. */
163 strcpy(c->x86_model_id, "Hammer");
164 break;
165 }
166 }
167 display_cacheinfo(c);
168
169 /* Multi core CPU? */
170 if (c->extended_cpuid_level >= 0x80000008)
171 amd_detect_cmp(c);
172
173 if (c->extended_cpuid_level >= 0x80000006 &&
174 (cpuid_edx(0x80000006) & 0xf000))
175 num_cache_leaves = 4;
176 else
177 num_cache_leaves = 3;
178
179 if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11)
180 set_cpu_cap(c, X86_FEATURE_K8);
181
182 /* MFENCE stops RDTSC speculation */
183 set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
184
185 if (c->x86 == 0x10)
186 fam10h_check_enable_mmcfg();
187
188 if (c == &boot_cpu_data && c->x86 >= 0xf && c->x86 <= 0x11) {
189 unsigned long long tseg;
190
191 /*
192 * Split up direct mapping around the TSEG SMM area.
193 * Don't do it for gbpages because there seems very little
194 * benefit in doing so.
195 */
196 if (!rdmsrl_safe(MSR_K8_TSEG_ADDR, &tseg) &&
197 (tseg >> PMD_SHIFT) <
198 (max_pfn_mapped >> (PMD_SHIFT-PAGE_SHIFT)))
199 set_memory_4k((unsigned long)__va(tseg), 1);
200 }
201}
202
203static struct cpu_dev amd_cpu_dev __cpuinitdata = {
204 .c_vendor = "AMD",
205 .c_ident = { "AuthenticAMD" },
206 .c_early_init = early_init_amd,
207 .c_init = init_amd,
208};
209
210cpu_vendor_dev_register(X86_VENDOR_AMD, &amd_cpu_dev);
211
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 170d2f5523b2..1b1c56bb338f 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -59,8 +59,12 @@ static void __init check_fpu(void)
59 return; 59 return;
60 } 60 }
61 61
62/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */ 62 /*
63 /* Test for the divl bug.. */ 63 * trap_init() enabled FXSR and company _before_ testing for FP
64 * problems here.
65 *
66 * Test for the divl bug..
67 */
64 __asm__("fninit\n\t" 68 __asm__("fninit\n\t"
65 "fldl %1\n\t" 69 "fldl %1\n\t"
66 "fdivl %2\n\t" 70 "fdivl %2\n\t"
@@ -108,10 +112,15 @@ static void __init check_popad(void)
108 "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx " 112 "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
109 : "=&a" (res) 113 : "=&a" (res)
110 : "d" (inp) 114 : "d" (inp)
111 : "ecx", "edi" ); 115 : "ecx", "edi");
112 /* If this fails, it means that any user program may lock the CPU hard. Too bad. */ 116 /*
113 if (res != 12345678) printk( "Buggy.\n" ); 117 * If this fails, it means that any user program may lock the
114 else printk( "OK.\n" ); 118 * CPU hard. Too bad.
119 */
120 if (res != 12345678)
121 printk("Buggy.\n");
122 else
123 printk("OK.\n");
115#endif 124#endif
116} 125}
117 126
@@ -137,7 +146,8 @@ static void __init check_config(void)
137 * i486+ only features! (WP works in supervisor mode and the 146 * i486+ only features! (WP works in supervisor mode and the
138 * new "invlpg" and "bswap" instructions) 147 * new "invlpg" and "bswap" instructions)
139 */ 148 */
140#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP) 149#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || \
150 defined(CONFIG_X86_BSWAP)
141 if (boot_cpu_data.x86 == 3) 151 if (boot_cpu_data.x86 == 3)
142 panic("Kernel requires i486+ for 'invlpg' and other features"); 152 panic("Kernel requires i486+ for 'invlpg' and other features");
143#endif 153#endif
@@ -170,6 +180,7 @@ void __init check_bugs(void)
170 check_fpu(); 180 check_fpu();
171 check_hlt(); 181 check_hlt();
172 check_popad(); 182 check_popad();
173 init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); 183 init_utsname()->machine[1] =
184 '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
174 alternative_instructions(); 185 alternative_instructions();
175} 186}
diff --git a/arch/x86/kernel/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c
index 9a3ed0649d4e..9a3ed0649d4e 100644
--- a/arch/x86/kernel/bugs_64.c
+++ b/arch/x86/kernel/cpu/bugs_64.c
diff --git a/arch/x86/kernel/cpu/centaur_64.c b/arch/x86/kernel/cpu/centaur_64.c
new file mode 100644
index 000000000000..13526fd5cce1
--- /dev/null
+++ b/arch/x86/kernel/cpu/centaur_64.c
@@ -0,0 +1,43 @@
1#include <linux/init.h>
2#include <linux/smp.h>
3
4#include <asm/cpufeature.h>
5#include <asm/processor.h>
6
7#include "cpu.h"
8
9static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
10{
11 if (c->x86 == 0x6 && c->x86_model >= 0xf)
12 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
13}
14
15static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
16{
17 /* Cache sizes */
18 unsigned n;
19
20 n = c->extended_cpuid_level;
21 if (n >= 0x80000008) {
22 unsigned eax = cpuid_eax(0x80000008);
23 c->x86_virt_bits = (eax >> 8) & 0xff;
24 c->x86_phys_bits = eax & 0xff;
25 }
26
27 if (c->x86 == 0x6 && c->x86_model >= 0xf) {
28 c->x86_cache_alignment = c->x86_clflush_size * 2;
29 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
30 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
31 }
32 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
33}
34
35static struct cpu_dev centaur_cpu_dev __cpuinitdata = {
36 .c_vendor = "Centaur",
37 .c_ident = { "CentaurHauls" },
38 .c_early_init = early_init_centaur,
39 .c_init = init_centaur,
40};
41
42cpu_vendor_dev_register(X86_VENDOR_CENTAUR, &centaur_cpu_dev);
43
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 783691b2a738..4d894e8565fe 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -1,3 +1,6 @@
1#ifndef ARCH_X86_CPU_H
2
3#define ARCH_X86_CPU_H
1 4
2struct cpu_model_info { 5struct cpu_model_info {
3 int vendor; 6 int vendor;
@@ -36,3 +39,5 @@ extern struct cpu_vendor_dev __x86cpuvendor_start[], __x86cpuvendor_end[];
36 39
37extern int get_model_name(struct cpuinfo_x86 *c); 40extern int get_model_name(struct cpuinfo_x86 *c);
38extern void display_cacheinfo(struct cpuinfo_x86 *c); 41extern void display_cacheinfo(struct cpuinfo_x86 *c);
42
43#endif
diff --git a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
index f03e9153618e..965ea52767ac 100644
--- a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -26,9 +26,10 @@
26#define NFORCE2_SAFE_DISTANCE 50 26#define NFORCE2_SAFE_DISTANCE 50
27 27
28/* Delay in ms between FSB changes */ 28/* Delay in ms between FSB changes */
29//#define NFORCE2_DELAY 10 29/* #define NFORCE2_DELAY 10 */
30 30
31/* nforce2_chipset: 31/*
32 * nforce2_chipset:
32 * FSB is changed using the chipset 33 * FSB is changed using the chipset
33 */ 34 */
34static struct pci_dev *nforce2_chipset_dev; 35static struct pci_dev *nforce2_chipset_dev;
@@ -36,13 +37,13 @@ static struct pci_dev *nforce2_chipset_dev;
36/* fid: 37/* fid:
37 * multiplier * 10 38 * multiplier * 10
38 */ 39 */
39static int fid = 0; 40static int fid;
40 41
41/* min_fsb, max_fsb: 42/* min_fsb, max_fsb:
42 * minimum and maximum FSB (= FSB at boot time) 43 * minimum and maximum FSB (= FSB at boot time)
43 */ 44 */
44static int min_fsb = 0; 45static int min_fsb;
45static int max_fsb = 0; 46static int max_fsb;
46 47
47MODULE_AUTHOR("Sebastian Witt <se.witt@gmx.net>"); 48MODULE_AUTHOR("Sebastian Witt <se.witt@gmx.net>");
48MODULE_DESCRIPTION("nForce2 FSB changing cpufreq driver"); 49MODULE_DESCRIPTION("nForce2 FSB changing cpufreq driver");
@@ -53,7 +54,7 @@ module_param(min_fsb, int, 0444);
53 54
54MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)"); 55MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)");
55MODULE_PARM_DESC(min_fsb, 56MODULE_PARM_DESC(min_fsb,
56 "Minimum FSB to use, if not defined: current FSB - 50"); 57 "Minimum FSB to use, if not defined: current FSB - 50");
57 58
58#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg) 59#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg)
59 60
@@ -139,7 +140,7 @@ static unsigned int nforce2_fsb_read(int bootfsb)
139 140
140 /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */ 141 /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */
141 nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 142 nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
142 0x01EF,PCI_ANY_ID,PCI_ANY_ID,NULL); 143 0x01EF, PCI_ANY_ID, PCI_ANY_ID, NULL);
143 if (!nforce2_sub5) 144 if (!nforce2_sub5)
144 return 0; 145 return 0;
145 146
@@ -147,13 +148,13 @@ static unsigned int nforce2_fsb_read(int bootfsb)
147 fsb /= 1000000; 148 fsb /= 1000000;
148 149
149 /* Check if PLL register is already set */ 150 /* Check if PLL register is already set */
150 pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp); 151 pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
151 152
152 if(bootfsb || !temp) 153 if (bootfsb || !temp)
153 return fsb; 154 return fsb;
154 155
155 /* Use PLL register FSB value */ 156 /* Use PLL register FSB value */
156 pci_read_config_dword(nforce2_chipset_dev,NFORCE2_PLLREG, &temp); 157 pci_read_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, &temp);
157 fsb = nforce2_calc_fsb(temp); 158 fsb = nforce2_calc_fsb(temp);
158 159
159 return fsb; 160 return fsb;
@@ -184,7 +185,7 @@ static int nforce2_set_fsb(unsigned int fsb)
184 } 185 }
185 186
186 /* First write? Then set actual value */ 187 /* First write? Then set actual value */
187 pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp); 188 pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
188 if (!temp) { 189 if (!temp) {
189 pll = nforce2_calc_pll(tfsb); 190 pll = nforce2_calc_pll(tfsb);
190 191
@@ -210,7 +211,8 @@ static int nforce2_set_fsb(unsigned int fsb)
210 tfsb--; 211 tfsb--;
211 212
212 /* Calculate the PLL reg. value */ 213 /* Calculate the PLL reg. value */
213 if ((pll = nforce2_calc_pll(tfsb)) == -1) 214 pll = nforce2_calc_pll(tfsb);
215 if (pll == -1)
214 return -EINVAL; 216 return -EINVAL;
215 217
216 nforce2_write_pll(pll); 218 nforce2_write_pll(pll);
@@ -249,7 +251,7 @@ static unsigned int nforce2_get(unsigned int cpu)
249static int nforce2_target(struct cpufreq_policy *policy, 251static int nforce2_target(struct cpufreq_policy *policy,
250 unsigned int target_freq, unsigned int relation) 252 unsigned int target_freq, unsigned int relation)
251{ 253{
252// unsigned long flags; 254/* unsigned long flags; */
253 struct cpufreq_freqs freqs; 255 struct cpufreq_freqs freqs;
254 unsigned int target_fsb; 256 unsigned int target_fsb;
255 257
@@ -271,17 +273,17 @@ static int nforce2_target(struct cpufreq_policy *policy,
271 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 273 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
272 274
273 /* Disable IRQs */ 275 /* Disable IRQs */
274 //local_irq_save(flags); 276 /* local_irq_save(flags); */
275 277
276 if (nforce2_set_fsb(target_fsb) < 0) 278 if (nforce2_set_fsb(target_fsb) < 0)
277 printk(KERN_ERR "cpufreq: Changing FSB to %d failed\n", 279 printk(KERN_ERR "cpufreq: Changing FSB to %d failed\n",
278 target_fsb); 280 target_fsb);
279 else 281 else
280 dprintk("Changed FSB successfully to %d\n", 282 dprintk("Changed FSB successfully to %d\n",
281 target_fsb); 283 target_fsb);
282 284
283 /* Enable IRQs */ 285 /* Enable IRQs */
284 //local_irq_restore(flags); 286 /* local_irq_restore(flags); */
285 287
286 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 288 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
287 289
@@ -302,8 +304,8 @@ static int nforce2_verify(struct cpufreq_policy *policy)
302 policy->max = (fsb_pol_max + 1) * fid * 100; 304 policy->max = (fsb_pol_max + 1) * fid * 100;
303 305
304 cpufreq_verify_within_limits(policy, 306 cpufreq_verify_within_limits(policy,
305 policy->cpuinfo.min_freq, 307 policy->cpuinfo.min_freq,
306 policy->cpuinfo.max_freq); 308 policy->cpuinfo.max_freq);
307 return 0; 309 return 0;
308} 310}
309 311
@@ -347,7 +349,7 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
347 /* Set maximum FSB to FSB at boot time */ 349 /* Set maximum FSB to FSB at boot time */
348 max_fsb = nforce2_fsb_read(1); 350 max_fsb = nforce2_fsb_read(1);
349 351
350 if(!max_fsb) 352 if (!max_fsb)
351 return -EIO; 353 return -EIO;
352 354
353 if (!min_fsb) 355 if (!min_fsb)
diff --git a/arch/x86/kernel/cpu/intel_64.c b/arch/x86/kernel/cpu/intel_64.c
new file mode 100644
index 000000000000..fcb1cc9d75ca
--- /dev/null
+++ b/arch/x86/kernel/cpu/intel_64.c
@@ -0,0 +1,103 @@
1#include <linux/init.h>
2#include <linux/smp.h>
3#include <asm/processor.h>
4#include <asm/ptrace.h>
5#include <asm/topology.h>
6#include <asm/numa_64.h>
7
8#include "cpu.h"
9
10static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
11{
12 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
13 (c->x86 == 0x6 && c->x86_model >= 0x0e))
14 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
15}
16
17/*
18 * find out the number of processor cores on the die
19 */
20static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
21{
22 unsigned int eax, t;
23
24 if (c->cpuid_level < 4)
25 return 1;
26
27 cpuid_count(4, 0, &eax, &t, &t, &t);
28
29 if (eax & 0x1f)
30 return ((eax >> 26) + 1);
31 else
32 return 1;
33}
34
35static void __cpuinit srat_detect_node(void)
36{
37#ifdef CONFIG_NUMA
38 unsigned node;
39 int cpu = smp_processor_id();
40 int apicid = hard_smp_processor_id();
41
42 /* Don't do the funky fallback heuristics the AMD version employs
43 for now. */
44 node = apicid_to_node[apicid];
45 if (node == NUMA_NO_NODE || !node_online(node))
46 node = first_node(node_online_map);
47 numa_set_node(cpu, node);
48
49 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
50#endif
51}
52
53static void __cpuinit init_intel(struct cpuinfo_x86 *c)
54{
55 /* Cache sizes */
56 unsigned n;
57
58 init_intel_cacheinfo(c);
59 if (c->cpuid_level > 9) {
60 unsigned eax = cpuid_eax(10);
61 /* Check for version and the number of counters */
62 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
63 set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
64 }
65
66 if (cpu_has_ds) {
67 unsigned int l1, l2;
68 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
69 if (!(l1 & (1<<11)))
70 set_cpu_cap(c, X86_FEATURE_BTS);
71 if (!(l1 & (1<<12)))
72 set_cpu_cap(c, X86_FEATURE_PEBS);
73 }
74
75
76 if (cpu_has_bts)
77 ds_init_intel(c);
78
79 n = c->extended_cpuid_level;
80 if (n >= 0x80000008) {
81 unsigned eax = cpuid_eax(0x80000008);
82 c->x86_virt_bits = (eax >> 8) & 0xff;
83 c->x86_phys_bits = eax & 0xff;
84 }
85
86 if (c->x86 == 15)
87 c->x86_cache_alignment = c->x86_clflush_size * 2;
88 if (c->x86 == 6)
89 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
90 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
91 c->x86_max_cores = intel_num_cpu_cores(c);
92
93 srat_detect_node();
94}
95
96static struct cpu_dev intel_cpu_dev __cpuinitdata = {
97 .c_vendor = "Intel",
98 .c_ident = { "GenuineIntel" },
99 .c_early_init = early_init_intel,
100 .c_init = init_intel,
101};
102cpu_vendor_dev_register(X86_VENDOR_INTEL, &intel_cpu_dev);
103
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 26d615dcb149..2c8afafa18e8 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -62,6 +62,7 @@ static struct _cache_table cache_table[] __cpuinitdata =
62 { 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */ 62 { 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
63 { 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */ 63 { 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */
64 { 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */ 64 { 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */
65 { 0x4e, LVL_2, 6144 }, /* 24-way set assoc, 64 byte line size */
65 { 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */ 66 { 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */
66 { 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */ 67 { 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */
67 { 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */ 68 { 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */
diff --git a/arch/x86/kernel/cpu/mcheck/k7.c b/arch/x86/kernel/cpu/mcheck/k7.c
index e633c9c2b764..f390c9f66351 100644
--- a/arch/x86/kernel/cpu/mcheck/k7.c
+++ b/arch/x86/kernel/cpu/mcheck/k7.c
@@ -9,23 +9,23 @@
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <linux/smp.h> 10#include <linux/smp.h>
11 11
12#include <asm/processor.h> 12#include <asm/processor.h>
13#include <asm/system.h> 13#include <asm/system.h>
14#include <asm/msr.h> 14#include <asm/msr.h>
15 15
16#include "mce.h" 16#include "mce.h"
17 17
18/* Machine Check Handler For AMD Athlon/Duron */ 18/* Machine Check Handler For AMD Athlon/Duron */
19static void k7_machine_check(struct pt_regs * regs, long error_code) 19static void k7_machine_check(struct pt_regs *regs, long error_code)
20{ 20{
21 int recover=1; 21 int recover = 1;
22 u32 alow, ahigh, high, low; 22 u32 alow, ahigh, high, low;
23 u32 mcgstl, mcgsth; 23 u32 mcgstl, mcgsth;
24 int i; 24 int i;
25 25
26 rdmsr (MSR_IA32_MCG_STATUS, mcgstl, mcgsth); 26 rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
27 if (mcgstl & (1<<0)) /* Recoverable ? */ 27 if (mcgstl & (1<<0)) /* Recoverable ? */
28 recover=0; 28 recover = 0;
29 29
30 printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", 30 printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
31 smp_processor_id(), mcgsth, mcgstl); 31 smp_processor_id(), mcgsth, mcgstl);
@@ -60,12 +60,12 @@ static void k7_machine_check(struct pt_regs * regs, long error_code)
60 } 60 }
61 61
62 if (recover&2) 62 if (recover&2)
63 panic ("CPU context corrupt"); 63 panic("CPU context corrupt");
64 if (recover&1) 64 if (recover&1)
65 panic ("Unable to continue"); 65 panic("Unable to continue");
66 printk (KERN_EMERG "Attempting to continue.\n"); 66 printk(KERN_EMERG "Attempting to continue.\n");
67 mcgstl &= ~(1<<2); 67 mcgstl &= ~(1<<2);
68 wrmsr (MSR_IA32_MCG_STATUS,mcgstl, mcgsth); 68 wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
69} 69}
70 70
71 71
@@ -81,25 +81,25 @@ void amd_mcheck_init(struct cpuinfo_x86 *c)
81 machine_check_vector = k7_machine_check; 81 machine_check_vector = k7_machine_check;
82 wmb(); 82 wmb();
83 83
84 printk (KERN_INFO "Intel machine check architecture supported.\n"); 84 printk(KERN_INFO "Intel machine check architecture supported.\n");
85 rdmsr (MSR_IA32_MCG_CAP, l, h); 85 rdmsr(MSR_IA32_MCG_CAP, l, h);
86 if (l & (1<<8)) /* Control register present ? */ 86 if (l & (1<<8)) /* Control register present ? */
87 wrmsr (MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); 87 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
88 nr_mce_banks = l & 0xff; 88 nr_mce_banks = l & 0xff;
89 89
90 /* Clear status for MC index 0 separately, we don't touch CTL, 90 /* Clear status for MC index 0 separately, we don't touch CTL,
91 * as some K7 Athlons cause spurious MCEs when its enabled. */ 91 * as some K7 Athlons cause spurious MCEs when its enabled. */
92 if (boot_cpu_data.x86 == 6) { 92 if (boot_cpu_data.x86 == 6) {
93 wrmsr (MSR_IA32_MC0_STATUS, 0x0, 0x0); 93 wrmsr(MSR_IA32_MC0_STATUS, 0x0, 0x0);
94 i = 1; 94 i = 1;
95 } else 95 } else
96 i = 0; 96 i = 0;
97 for (; i<nr_mce_banks; i++) { 97 for (; i < nr_mce_banks; i++) {
98 wrmsr (MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff); 98 wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
99 wrmsr (MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0); 99 wrmsr(MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
100 } 100 }
101 101
102 set_in_cr4 (X86_CR4_MCE); 102 set_in_cr4(X86_CR4_MCE);
103 printk (KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n", 103 printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",
104 smp_processor_id()); 104 smp_processor_id());
105} 105}
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index e07e8c068ae0..501ca1cea27d 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -31,7 +31,7 @@
31#include <asm/idle.h> 31#include <asm/idle.h>
32 32
33#define MISC_MCELOG_MINOR 227 33#define MISC_MCELOG_MINOR 227
34#define NR_BANKS 6 34#define NR_SYSFS_BANKS 6
35 35
36atomic_t mce_entry; 36atomic_t mce_entry;
37 37
@@ -46,7 +46,7 @@ static int mce_dont_init;
46 */ 46 */
47static int tolerant = 1; 47static int tolerant = 1;
48static int banks; 48static int banks;
49static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL }; 49static unsigned long bank[NR_SYSFS_BANKS] = { [0 ... NR_SYSFS_BANKS-1] = ~0UL };
50static unsigned long notify_user; 50static unsigned long notify_user;
51static int rip_msr; 51static int rip_msr;
52static int mce_bootlog = -1; 52static int mce_bootlog = -1;
@@ -209,7 +209,7 @@ void do_machine_check(struct pt_regs * regs, long error_code)
209 barrier(); 209 barrier();
210 210
211 for (i = 0; i < banks; i++) { 211 for (i = 0; i < banks; i++) {
212 if (!bank[i]) 212 if (i < NR_SYSFS_BANKS && !bank[i])
213 continue; 213 continue;
214 214
215 m.misc = 0; 215 m.misc = 0;
@@ -444,9 +444,10 @@ static void mce_init(void *dummy)
444 444
445 rdmsrl(MSR_IA32_MCG_CAP, cap); 445 rdmsrl(MSR_IA32_MCG_CAP, cap);
446 banks = cap & 0xff; 446 banks = cap & 0xff;
447 if (banks > NR_BANKS) { 447 if (banks > MCE_EXTENDED_BANK) {
448 printk(KERN_INFO "MCE: warning: using only %d banks\n", banks); 448 banks = MCE_EXTENDED_BANK;
449 banks = NR_BANKS; 449 printk(KERN_INFO "MCE: warning: using only %d banks\n",
450 MCE_EXTENDED_BANK);
450 } 451 }
451 /* Use accurate RIP reporting if available. */ 452 /* Use accurate RIP reporting if available. */
452 if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9) 453 if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9)
@@ -462,7 +463,11 @@ static void mce_init(void *dummy)
462 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); 463 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
463 464
464 for (i = 0; i < banks; i++) { 465 for (i = 0; i < banks; i++) {
465 wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]); 466 if (i < NR_SYSFS_BANKS)
467 wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
468 else
469 wrmsrl(MSR_IA32_MC0_CTL+4*i, ~0UL);
470
466 wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0); 471 wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
467 } 472 }
468} 473}
@@ -766,7 +771,10 @@ DEFINE_PER_CPU(struct sys_device, device_mce);
766 } \ 771 } \
767 static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name); 772 static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
768 773
769/* TBD should generate these dynamically based on number of available banks */ 774/*
775 * TBD should generate these dynamically based on number of available banks.
776 * Have only 6 contol banks in /sysfs until then.
777 */
770ACCESSOR(bank0ctl,bank[0],mce_restart()) 778ACCESSOR(bank0ctl,bank[0],mce_restart())
771ACCESSOR(bank1ctl,bank[1],mce_restart()) 779ACCESSOR(bank1ctl,bank[1],mce_restart())
772ACCESSOR(bank2ctl,bank[2],mce_restart()) 780ACCESSOR(bank2ctl,bank[2],mce_restart())
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c
index cb03345554a5..eef001ad3bde 100644
--- a/arch/x86/kernel/cpu/mcheck/p4.c
+++ b/arch/x86/kernel/cpu/mcheck/p4.c
@@ -8,7 +8,7 @@
8#include <linux/interrupt.h> 8#include <linux/interrupt.h>
9#include <linux/smp.h> 9#include <linux/smp.h>
10 10
11#include <asm/processor.h> 11#include <asm/processor.h>
12#include <asm/system.h> 12#include <asm/system.h>
13#include <asm/msr.h> 13#include <asm/msr.h>
14#include <asm/apic.h> 14#include <asm/apic.h>
@@ -32,12 +32,12 @@ struct intel_mce_extended_msrs {
32 /* u32 *reserved[]; */ 32 /* u32 *reserved[]; */
33}; 33};
34 34
35static int mce_num_extended_msrs = 0; 35static int mce_num_extended_msrs;
36 36
37 37
38#ifdef CONFIG_X86_MCE_P4THERMAL 38#ifdef CONFIG_X86_MCE_P4THERMAL
39static void unexpected_thermal_interrupt(struct pt_regs *regs) 39static void unexpected_thermal_interrupt(struct pt_regs *regs)
40{ 40{
41 printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n", 41 printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",
42 smp_processor_id()); 42 smp_processor_id());
43 add_taint(TAINT_MACHINE_CHECK); 43 add_taint(TAINT_MACHINE_CHECK);
@@ -83,7 +83,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
83 * be some SMM goo which handles it, so we can't even put a handler 83 * be some SMM goo which handles it, so we can't even put a handler
84 * since it might be delivered via SMI already -zwanem. 84 * since it might be delivered via SMI already -zwanem.
85 */ 85 */
86 rdmsr (MSR_IA32_MISC_ENABLE, l, h); 86 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
87 h = apic_read(APIC_LVTTHMR); 87 h = apic_read(APIC_LVTTHMR);
88 if ((l & (1<<3)) && (h & APIC_DM_SMI)) { 88 if ((l & (1<<3)) && (h & APIC_DM_SMI)) {
89 printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n", 89 printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n",
@@ -91,7 +91,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
91 return; /* -EBUSY */ 91 return; /* -EBUSY */
92 } 92 }
93 93
94 /* check whether a vector already exists, temporarily masked? */ 94 /* check whether a vector already exists, temporarily masked? */
95 if (h & APIC_VECTOR_MASK) { 95 if (h & APIC_VECTOR_MASK) {
96 printk(KERN_DEBUG "CPU%d: Thermal LVT vector (%#x) already " 96 printk(KERN_DEBUG "CPU%d: Thermal LVT vector (%#x) already "
97 "installed\n", 97 "installed\n",
@@ -104,18 +104,18 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
104 h |= (APIC_DM_FIXED | APIC_LVT_MASKED); /* we'll mask till we're ready */ 104 h |= (APIC_DM_FIXED | APIC_LVT_MASKED); /* we'll mask till we're ready */
105 apic_write_around(APIC_LVTTHMR, h); 105 apic_write_around(APIC_LVTTHMR, h);
106 106
107 rdmsr (MSR_IA32_THERM_INTERRUPT, l, h); 107 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
108 wrmsr (MSR_IA32_THERM_INTERRUPT, l | 0x03 , h); 108 wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03 , h);
109 109
110 /* ok we're good to go... */ 110 /* ok we're good to go... */
111 vendor_thermal_interrupt = intel_thermal_interrupt; 111 vendor_thermal_interrupt = intel_thermal_interrupt;
112
113 rdmsr (MSR_IA32_MISC_ENABLE, l, h);
114 wrmsr (MSR_IA32_MISC_ENABLE, l | (1<<3), h);
115 112
116 l = apic_read (APIC_LVTTHMR); 113 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
117 apic_write_around (APIC_LVTTHMR, l & ~APIC_LVT_MASKED); 114 wrmsr(MSR_IA32_MISC_ENABLE, l | (1<<3), h);
118 printk (KERN_INFO "CPU%d: Thermal monitoring enabled\n", cpu); 115
116 l = apic_read(APIC_LVTTHMR);
117 apic_write_around(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
118 printk(KERN_INFO "CPU%d: Thermal monitoring enabled\n", cpu);
119 119
120 /* enable thermal throttle processing */ 120 /* enable thermal throttle processing */
121 atomic_set(&therm_throt_en, 1); 121 atomic_set(&therm_throt_en, 1);
@@ -129,28 +129,28 @@ static inline void intel_get_extended_msrs(struct intel_mce_extended_msrs *r)
129{ 129{
130 u32 h; 130 u32 h;
131 131
132 rdmsr (MSR_IA32_MCG_EAX, r->eax, h); 132 rdmsr(MSR_IA32_MCG_EAX, r->eax, h);
133 rdmsr (MSR_IA32_MCG_EBX, r->ebx, h); 133 rdmsr(MSR_IA32_MCG_EBX, r->ebx, h);
134 rdmsr (MSR_IA32_MCG_ECX, r->ecx, h); 134 rdmsr(MSR_IA32_MCG_ECX, r->ecx, h);
135 rdmsr (MSR_IA32_MCG_EDX, r->edx, h); 135 rdmsr(MSR_IA32_MCG_EDX, r->edx, h);
136 rdmsr (MSR_IA32_MCG_ESI, r->esi, h); 136 rdmsr(MSR_IA32_MCG_ESI, r->esi, h);
137 rdmsr (MSR_IA32_MCG_EDI, r->edi, h); 137 rdmsr(MSR_IA32_MCG_EDI, r->edi, h);
138 rdmsr (MSR_IA32_MCG_EBP, r->ebp, h); 138 rdmsr(MSR_IA32_MCG_EBP, r->ebp, h);
139 rdmsr (MSR_IA32_MCG_ESP, r->esp, h); 139 rdmsr(MSR_IA32_MCG_ESP, r->esp, h);
140 rdmsr (MSR_IA32_MCG_EFLAGS, r->eflags, h); 140 rdmsr(MSR_IA32_MCG_EFLAGS, r->eflags, h);
141 rdmsr (MSR_IA32_MCG_EIP, r->eip, h); 141 rdmsr(MSR_IA32_MCG_EIP, r->eip, h);
142} 142}
143 143
144static void intel_machine_check(struct pt_regs * regs, long error_code) 144static void intel_machine_check(struct pt_regs *regs, long error_code)
145{ 145{
146 int recover=1; 146 int recover = 1;
147 u32 alow, ahigh, high, low; 147 u32 alow, ahigh, high, low;
148 u32 mcgstl, mcgsth; 148 u32 mcgstl, mcgsth;
149 int i; 149 int i;
150 150
151 rdmsr (MSR_IA32_MCG_STATUS, mcgstl, mcgsth); 151 rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
152 if (mcgstl & (1<<0)) /* Recoverable ? */ 152 if (mcgstl & (1<<0)) /* Recoverable ? */
153 recover=0; 153 recover = 0;
154 154
155 printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", 155 printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
156 smp_processor_id(), mcgsth, mcgstl); 156 smp_processor_id(), mcgsth, mcgstl);
@@ -191,20 +191,20 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
191 } 191 }
192 192
193 if (recover & 2) 193 if (recover & 2)
194 panic ("CPU context corrupt"); 194 panic("CPU context corrupt");
195 if (recover & 1) 195 if (recover & 1)
196 panic ("Unable to continue"); 196 panic("Unable to continue");
197 197
198 printk(KERN_EMERG "Attempting to continue.\n"); 198 printk(KERN_EMERG "Attempting to continue.\n");
199 /* 199 /*
200 * Do not clear the MSR_IA32_MCi_STATUS if the error is not 200 * Do not clear the MSR_IA32_MCi_STATUS if the error is not
201 * recoverable/continuable.This will allow BIOS to look at the MSRs 201 * recoverable/continuable.This will allow BIOS to look at the MSRs
202 * for errors if the OS could not log the error. 202 * for errors if the OS could not log the error.
203 */ 203 */
204 for (i=0; i<nr_mce_banks; i++) { 204 for (i = 0; i < nr_mce_banks; i++) {
205 u32 msr; 205 u32 msr;
206 msr = MSR_IA32_MC0_STATUS+i*4; 206 msr = MSR_IA32_MC0_STATUS+i*4;
207 rdmsr (msr, low, high); 207 rdmsr(msr, low, high);
208 if (high&(1<<31)) { 208 if (high&(1<<31)) {
209 /* Clear it */ 209 /* Clear it */
210 wrmsr(msr, 0UL, 0UL); 210 wrmsr(msr, 0UL, 0UL);
@@ -214,7 +214,7 @@ static void intel_machine_check(struct pt_regs * regs, long error_code)
214 } 214 }
215 } 215 }
216 mcgstl &= ~(1<<2); 216 mcgstl &= ~(1<<2);
217 wrmsr (MSR_IA32_MCG_STATUS,mcgstl, mcgsth); 217 wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
218} 218}
219 219
220 220
@@ -222,30 +222,30 @@ void intel_p4_mcheck_init(struct cpuinfo_x86 *c)
222{ 222{
223 u32 l, h; 223 u32 l, h;
224 int i; 224 int i;
225 225
226 machine_check_vector = intel_machine_check; 226 machine_check_vector = intel_machine_check;
227 wmb(); 227 wmb();
228 228
229 printk (KERN_INFO "Intel machine check architecture supported.\n"); 229 printk(KERN_INFO "Intel machine check architecture supported.\n");
230 rdmsr (MSR_IA32_MCG_CAP, l, h); 230 rdmsr(MSR_IA32_MCG_CAP, l, h);
231 if (l & (1<<8)) /* Control register present ? */ 231 if (l & (1<<8)) /* Control register present ? */
232 wrmsr (MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); 232 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
233 nr_mce_banks = l & 0xff; 233 nr_mce_banks = l & 0xff;
234 234
235 for (i=0; i<nr_mce_banks; i++) { 235 for (i = 0; i < nr_mce_banks; i++) {
236 wrmsr (MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff); 236 wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
237 wrmsr (MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0); 237 wrmsr(MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
238 } 238 }
239 239
240 set_in_cr4 (X86_CR4_MCE); 240 set_in_cr4(X86_CR4_MCE);
241 printk (KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n", 241 printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n",
242 smp_processor_id()); 242 smp_processor_id());
243 243
244 /* Check for P4/Xeon extended MCE MSRs */ 244 /* Check for P4/Xeon extended MCE MSRs */
245 rdmsr (MSR_IA32_MCG_CAP, l, h); 245 rdmsr(MSR_IA32_MCG_CAP, l, h);
246 if (l & (1<<9)) {/* MCG_EXT_P */ 246 if (l & (1<<9)) {/* MCG_EXT_P */
247 mce_num_extended_msrs = (l >> 16) & 0xff; 247 mce_num_extended_msrs = (l >> 16) & 0xff;
248 printk (KERN_INFO "CPU%d: Intel P4/Xeon Extended MCE MSRs (%d)" 248 printk(KERN_INFO "CPU%d: Intel P4/Xeon Extended MCE MSRs (%d)"
249 " available\n", 249 " available\n",
250 smp_processor_id(), mce_num_extended_msrs); 250 smp_processor_id(), mce_num_extended_msrs);
251 251
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 9f51e1ea9e82..84fd9f2a28ff 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -98,17 +98,6 @@ static void __init nvidia_bugs(int num, int slot, int func)
98 98
99} 99}
100 100
101static void __init ati_bugs(int num, int slot, int func)
102{
103#ifdef CONFIG_X86_IO_APIC
104 if (timer_over_8254 == 1) {
105 timer_over_8254 = 0;
106 printk(KERN_INFO
107 "ATI board detected. Disabling timer routing over 8254.\n");
108 }
109#endif
110}
111
112#define QFLAG_APPLY_ONCE 0x1 101#define QFLAG_APPLY_ONCE 0x1
113#define QFLAG_APPLIED 0x2 102#define QFLAG_APPLIED 0x2
114#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED) 103#define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
@@ -126,8 +115,6 @@ static struct chipset early_qrk[] __initdata = {
126 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs }, 115 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
127 { PCI_VENDOR_ID_VIA, PCI_ANY_ID, 116 { PCI_VENDOR_ID_VIA, PCI_ANY_ID,
128 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs }, 117 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
129 { PCI_VENDOR_ID_ATI, PCI_ANY_ID,
130 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, ati_bugs },
131 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB, 118 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
132 PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config }, 119 PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
133 {} 120 {}
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index c778e4fa55a2..159a1c76d2bd 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -51,7 +51,7 @@
51#include <asm/percpu.h> 51#include <asm/percpu.h>
52#include <asm/dwarf2.h> 52#include <asm/dwarf2.h>
53#include <asm/processor-flags.h> 53#include <asm/processor-flags.h>
54#include "irq_vectors.h" 54#include <asm/irq_vectors.h>
55 55
56/* 56/*
57 * We use macros for low-level operations which need to be overridden 57 * We use macros for low-level operations which need to be overridden
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 556a8df522a7..e4c5f951e68d 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -420,7 +420,6 @@ END(\label)
420 PTREGSCALL stub_clone, sys_clone, %r8 420 PTREGSCALL stub_clone, sys_clone, %r8
421 PTREGSCALL stub_fork, sys_fork, %rdi 421 PTREGSCALL stub_fork, sys_fork, %rdi
422 PTREGSCALL stub_vfork, sys_vfork, %rdi 422 PTREGSCALL stub_vfork, sys_vfork, %rdi
423 PTREGSCALL stub_rt_sigsuspend, sys_rt_sigsuspend, %rdx
424 PTREGSCALL stub_sigaltstack, sys_sigaltstack, %rdx 423 PTREGSCALL stub_sigaltstack, sys_sigaltstack, %rdx
425 PTREGSCALL stub_iopl, sys_iopl, %rsi 424 PTREGSCALL stub_iopl, sys_iopl, %rsi
426 425
@@ -926,11 +925,11 @@ error_kernelspace:
926 iret run with kernel gs again, so don't set the user space flag. 925 iret run with kernel gs again, so don't set the user space flag.
927 B stepping K8s sometimes report an truncated RIP for IRET 926 B stepping K8s sometimes report an truncated RIP for IRET
928 exceptions returning to compat mode. Check for these here too. */ 927 exceptions returning to compat mode. Check for these here too. */
929 leaq irq_return(%rip),%rbp 928 leaq irq_return(%rip),%rcx
930 cmpq %rbp,RIP(%rsp) 929 cmpq %rcx,RIP(%rsp)
931 je error_swapgs 930 je error_swapgs
932 movl %ebp,%ebp /* zero extend */ 931 movl %ecx,%ecx /* zero extend */
933 cmpq %rbp,RIP(%rsp) 932 cmpq %rcx,RIP(%rsp)
934 je error_swapgs 933 je error_swapgs
935 cmpq $gs_change,RIP(%rsp) 934 cmpq $gs_change,RIP(%rsp)
936 je error_swapgs 935 je error_swapgs
@@ -1120,10 +1119,6 @@ ENTRY(coprocessor_segment_overrun)
1120 zeroentry do_coprocessor_segment_overrun 1119 zeroentry do_coprocessor_segment_overrun
1121END(coprocessor_segment_overrun) 1120END(coprocessor_segment_overrun)
1122 1121
1123ENTRY(reserved)
1124 zeroentry do_reserved
1125END(reserved)
1126
1127 /* runs on exception stack */ 1122 /* runs on exception stack */
1128ENTRY(double_fault) 1123ENTRY(double_fault)
1129 XCPT_FRAME 1124 XCPT_FRAME
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index ebf13908a743..45e84acca8a9 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -5,7 +5,7 @@
5 * 5 *
6 * SGI UV APIC functions (note: not an Intel compatible APIC) 6 * SGI UV APIC functions (note: not an Intel compatible APIC)
7 * 7 *
8 * Copyright (C) 2007 Silicon Graphics, Inc. All rights reserved. 8 * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
9 */ 9 */
10 10
11#include <linux/threads.h> 11#include <linux/threads.h>
@@ -55,37 +55,37 @@ static cpumask_t uv_vector_allocation_domain(int cpu)
55int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip) 55int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip)
56{ 56{
57 unsigned long val; 57 unsigned long val;
58 int nasid; 58 int pnode;
59 59
60 nasid = uv_apicid_to_nasid(phys_apicid); 60 pnode = uv_apicid_to_pnode(phys_apicid);
61 val = (1UL << UVH_IPI_INT_SEND_SHFT) | 61 val = (1UL << UVH_IPI_INT_SEND_SHFT) |
62 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | 62 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
63 (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | 63 (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
64 APIC_DM_INIT; 64 APIC_DM_INIT;
65 uv_write_global_mmr64(nasid, UVH_IPI_INT, val); 65 uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
66 mdelay(10); 66 mdelay(10);
67 67
68 val = (1UL << UVH_IPI_INT_SEND_SHFT) | 68 val = (1UL << UVH_IPI_INT_SEND_SHFT) |
69 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | 69 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
70 (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | 70 (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
71 APIC_DM_STARTUP; 71 APIC_DM_STARTUP;
72 uv_write_global_mmr64(nasid, UVH_IPI_INT, val); 72 uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
73 return 0; 73 return 0;
74} 74}
75 75
76static void uv_send_IPI_one(int cpu, int vector) 76static void uv_send_IPI_one(int cpu, int vector)
77{ 77{
78 unsigned long val, apicid, lapicid; 78 unsigned long val, apicid, lapicid;
79 int nasid; 79 int pnode;
80 80
81 apicid = per_cpu(x86_cpu_to_apicid, cpu); /* ZZZ - cache node-local ? */ 81 apicid = per_cpu(x86_cpu_to_apicid, cpu); /* ZZZ - cache node-local ? */
82 lapicid = apicid & 0x3f; /* ZZZ macro needed */ 82 lapicid = apicid & 0x3f; /* ZZZ macro needed */
83 nasid = uv_apicid_to_nasid(apicid); 83 pnode = uv_apicid_to_pnode(apicid);
84 val = 84 val =
85 (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid << 85 (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid <<
86 UVH_IPI_INT_APIC_ID_SHFT) | 86 UVH_IPI_INT_APIC_ID_SHFT) |
87 (vector << UVH_IPI_INT_VECTOR_SHFT); 87 (vector << UVH_IPI_INT_VECTOR_SHFT);
88 uv_write_global_mmr64(nasid, UVH_IPI_INT, val); 88 uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
89} 89}
90 90
91static void uv_send_IPI_mask(cpumask_t mask, int vector) 91static void uv_send_IPI_mask(cpumask_t mask, int vector)
@@ -159,39 +159,81 @@ struct genapic apic_x2apic_uv_x = {
159 .phys_pkg_id = phys_pkg_id, /* Fixme ZZZ */ 159 .phys_pkg_id = phys_pkg_id, /* Fixme ZZZ */
160}; 160};
161 161
162static __cpuinit void set_x2apic_extra_bits(int nasid) 162static __cpuinit void set_x2apic_extra_bits(int pnode)
163{ 163{
164 __get_cpu_var(x2apic_extra_bits) = ((nasid >> 1) << 6); 164 __get_cpu_var(x2apic_extra_bits) = (pnode << 6);
165} 165}
166 166
167/* 167/*
168 * Called on boot cpu. 168 * Called on boot cpu.
169 */ 169 */
170static __init int boot_pnode_to_blade(int pnode)
171{
172 int blade;
173
174 for (blade = 0; blade < uv_num_possible_blades(); blade++)
175 if (pnode == uv_blade_info[blade].pnode)
176 return blade;
177 BUG();
178}
179
180struct redir_addr {
181 unsigned long redirect;
182 unsigned long alias;
183};
184
185#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
186
187static __initdata struct redir_addr redir_addrs[] = {
188 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG},
189 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG},
190 {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG},
191};
192
193static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size)
194{
195 union uvh_si_alias0_overlay_config_u alias;
196 union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect;
197 int i;
198
199 for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) {
200 alias.v = uv_read_local_mmr(redir_addrs[i].alias);
201 if (alias.s.base == 0) {
202 *size = (1UL << alias.s.m_alias);
203 redirect.v = uv_read_local_mmr(redir_addrs[i].redirect);
204 *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT;
205 return;
206 }
207 }
208 BUG();
209}
210
170static __init void uv_system_init(void) 211static __init void uv_system_init(void)
171{ 212{
172 union uvh_si_addr_map_config_u m_n_config; 213 union uvh_si_addr_map_config_u m_n_config;
173 int bytes, nid, cpu, lcpu, nasid, last_nasid, blade; 214 union uvh_node_id_u node_id;
174 unsigned long mmr_base; 215 unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size;
216 int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val;
217 unsigned long mmr_base, present;
175 218
176 m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG); 219 m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
220 m_val = m_n_config.s.m_skt;
221 n_val = m_n_config.s.n_skt;
177 mmr_base = 222 mmr_base =
178 uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) & 223 uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
179 ~UV_MMR_ENABLE; 224 ~UV_MMR_ENABLE;
180 printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base); 225 printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base);
181 226
182 last_nasid = -1; 227 for(i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++)
183 for_each_possible_cpu(cpu) { 228 uv_possible_blades +=
184 nid = cpu_to_node(cpu); 229 hweight64(uv_read_local_mmr( UVH_NODE_PRESENT_TABLE + i * 8));
185 nasid = uv_apicid_to_nasid(per_cpu(x86_cpu_to_apicid, cpu));
186 if (nasid != last_nasid)
187 uv_possible_blades++;
188 last_nasid = nasid;
189 }
190 printk(KERN_DEBUG "UV: Found %d blades\n", uv_num_possible_blades()); 230 printk(KERN_DEBUG "UV: Found %d blades\n", uv_num_possible_blades());
191 231
192 bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades(); 232 bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades();
193 uv_blade_info = alloc_bootmem_pages(bytes); 233 uv_blade_info = alloc_bootmem_pages(bytes);
194 234
235 get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
236
195 bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes(); 237 bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes();
196 uv_node_to_blade = alloc_bootmem_pages(bytes); 238 uv_node_to_blade = alloc_bootmem_pages(bytes);
197 memset(uv_node_to_blade, 255, bytes); 239 memset(uv_node_to_blade, 255, bytes);
@@ -200,43 +242,56 @@ static __init void uv_system_init(void)
200 uv_cpu_to_blade = alloc_bootmem_pages(bytes); 242 uv_cpu_to_blade = alloc_bootmem_pages(bytes);
201 memset(uv_cpu_to_blade, 255, bytes); 243 memset(uv_cpu_to_blade, 255, bytes);
202 244
203 last_nasid = -1; 245 blade = 0;
204 blade = -1; 246 for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) {
205 lcpu = -1; 247 present = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8);
206 for_each_possible_cpu(cpu) { 248 for (j = 0; j < 64; j++) {
207 nid = cpu_to_node(cpu); 249 if (!test_bit(j, &present))
208 nasid = uv_apicid_to_nasid(per_cpu(x86_cpu_to_apicid, cpu)); 250 continue;
209 if (nasid != last_nasid) { 251 uv_blade_info[blade].pnode = (i * 64 + j);
210 blade++; 252 uv_blade_info[blade].nr_possible_cpus = 0;
211 lcpu = -1;
212 uv_blade_info[blade].nr_posible_cpus = 0;
213 uv_blade_info[blade].nr_online_cpus = 0; 253 uv_blade_info[blade].nr_online_cpus = 0;
254 blade++;
214 } 255 }
215 last_nasid = nasid; 256 }
216 lcpu++;
217 257
218 uv_cpu_hub_info(cpu)->m_val = m_n_config.s.m_skt; 258 node_id.v = uv_read_local_mmr(UVH_NODE_ID);
219 uv_cpu_hub_info(cpu)->n_val = m_n_config.s.n_skt; 259 gnode_upper = (((unsigned long)node_id.s.node_id) &
260 ~((1 << n_val) - 1)) << m_val;
261
262 for_each_present_cpu(cpu) {
263 nid = cpu_to_node(cpu);
264 pnode = uv_apicid_to_pnode(per_cpu(x86_cpu_to_apicid, cpu));
265 blade = boot_pnode_to_blade(pnode);
266 lcpu = uv_blade_info[blade].nr_possible_cpus;
267 uv_blade_info[blade].nr_possible_cpus++;
268
269 uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
270 uv_cpu_hub_info(cpu)->lowmem_remap_top =
271 lowmem_redir_base + lowmem_redir_size;
272 uv_cpu_hub_info(cpu)->m_val = m_val;
273 uv_cpu_hub_info(cpu)->n_val = m_val;
220 uv_cpu_hub_info(cpu)->numa_blade_id = blade; 274 uv_cpu_hub_info(cpu)->numa_blade_id = blade;
221 uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; 275 uv_cpu_hub_info(cpu)->blade_processor_id = lcpu;
222 uv_cpu_hub_info(cpu)->local_nasid = nasid; 276 uv_cpu_hub_info(cpu)->pnode = pnode;
223 uv_cpu_hub_info(cpu)->gnode_upper = 277 uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) - 1;
224 nasid & ~((1 << uv_hub_info->n_val) - 1); 278 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
279 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
225 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; 280 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
226 uv_cpu_hub_info(cpu)->coherency_domain_number = 0;/* ZZZ */ 281 uv_cpu_hub_info(cpu)->coherency_domain_number = 0;/* ZZZ */
227 uv_blade_info[blade].nasid = nasid;
228 uv_blade_info[blade].nr_posible_cpus++;
229 uv_node_to_blade[nid] = blade; 282 uv_node_to_blade[nid] = blade;
230 uv_cpu_to_blade[cpu] = blade; 283 uv_cpu_to_blade[cpu] = blade;
231 284
232 printk(KERN_DEBUG "UV cpu %d, apicid 0x%x, nasid %d, nid %d\n", 285 printk(KERN_DEBUG "UV cpu %d, apicid 0x%x, pnode %d, nid %d, "
233 cpu, per_cpu(x86_cpu_to_apicid, cpu), nasid, nid); 286 "lcpu %d, blade %d\n",
234 printk(KERN_DEBUG "UV lcpu %d, blade %d\n", lcpu, blade); 287 cpu, per_cpu(x86_cpu_to_apicid, cpu), pnode, nid,
288 lcpu, blade);
235 } 289 }
236} 290}
237 291
238/* 292/*
239 * Called on each cpu to initialize the per_cpu UV data area. 293 * Called on each cpu to initialize the per_cpu UV data area.
294 * ZZZ hotplug not supported yet
240 */ 295 */
241void __cpuinit uv_cpu_init(void) 296void __cpuinit uv_cpu_init(void)
242{ 297{
@@ -246,5 +301,5 @@ void __cpuinit uv_cpu_init(void)
246 uv_blade_info[uv_numa_blade_id()].nr_online_cpus++; 301 uv_blade_info[uv_numa_blade_id()].nr_online_cpus++;
247 302
248 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) 303 if (get_uv_system_type() == UV_NON_UNIQUE_APIC)
249 set_x2apic_extra_bits(uv_hub_info->local_nasid); 304 set_x2apic_extra_bits(uv_hub_info->pnode);
250} 305}
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index b817974ef942..263b9d14753e 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -18,6 +18,7 @@
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/msr.h> 19#include <asm/msr.h>
20#include <asm/cache.h> 20#include <asm/cache.h>
21#include <asm/processor-flags.h>
21 22
22#ifdef CONFIG_PARAVIRT 23#ifdef CONFIG_PARAVIRT
23#include <asm/asm-offsets.h> 24#include <asm/asm-offsets.h>
@@ -154,9 +155,7 @@ ENTRY(secondary_startup_64)
154 */ 155 */
155 156
156 /* Enable PAE mode and PGE */ 157 /* Enable PAE mode and PGE */
157 xorq %rax, %rax 158 movl $(X86_CR4_PAE | X86_CR4_PGE), %eax
158 btsq $5, %rax
159 btsq $7, %rax
160 movq %rax, %cr4 159 movq %rax, %cr4
161 160
162 /* Setup early boot stage 4 level pagetables. */ 161 /* Setup early boot stage 4 level pagetables. */
@@ -184,14 +183,10 @@ ENTRY(secondary_startup_64)
1841: wrmsr /* Make changes effective */ 1831: wrmsr /* Make changes effective */
185 184
186 /* Setup cr0 */ 185 /* Setup cr0 */
187#define CR0_PM 1 /* protected mode */ 186#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
188#define CR0_MP (1<<1) 187 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
189#define CR0_ET (1<<4) 188 X86_CR0_PG)
190#define CR0_NE (1<<5) 189 movl $CR0_STATE, %eax
191#define CR0_WP (1<<16)
192#define CR0_AM (1<<18)
193#define CR0_PAGING (1<<31)
194 movl $CR0_PM|CR0_MP|CR0_ET|CR0_NE|CR0_WP|CR0_AM|CR0_PAGING,%eax
195 /* Make changes effective */ 190 /* Make changes effective */
196 movq %rax, %cr0 191 movq %rax, %cr0
197 192
@@ -327,11 +322,11 @@ early_idt_ripmsg:
327ENTRY(name) 322ENTRY(name)
328 323
329/* Automate the creation of 1 to 1 mapping pmd entries */ 324/* Automate the creation of 1 to 1 mapping pmd entries */
330#define PMDS(START, PERM, COUNT) \ 325#define PMDS(START, PERM, COUNT) \
331 i = 0 ; \ 326 i = 0 ; \
332 .rept (COUNT) ; \ 327 .rept (COUNT) ; \
333 .quad (START) + (i << 21) + (PERM) ; \ 328 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \
334 i = i + 1 ; \ 329 i = i + 1 ; \
335 .endr 330 .endr
336 331
337 /* 332 /*
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 9b5cfcdfc426..ea230ec69057 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -17,7 +17,7 @@
17 17
18/* FSEC = 10^-15 18/* FSEC = 10^-15
19 NSEC = 10^-9 */ 19 NSEC = 10^-9 */
20#define FSEC_PER_NSEC 1000000 20#define FSEC_PER_NSEC 1000000L
21 21
22/* 22/*
23 * HPET address is set in acpi/boot.c, when an ACPI entry exists 23 * HPET address is set in acpi/boot.c, when an ACPI entry exists
@@ -206,20 +206,19 @@ static void hpet_enable_legacy_int(void)
206 206
207static void hpet_legacy_clockevent_register(void) 207static void hpet_legacy_clockevent_register(void)
208{ 208{
209 uint64_t hpet_freq;
210
211 /* Start HPET legacy interrupts */ 209 /* Start HPET legacy interrupts */
212 hpet_enable_legacy_int(); 210 hpet_enable_legacy_int();
213 211
214 /* 212 /*
215 * The period is a femto seconds value. We need to calculate the 213 * The mult factor is defined as (include/linux/clockchips.h)
216 * scaled math multiplication factor for nanosecond to hpet tick 214 * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
217 * conversion. 215 * hpet_period is in units of femtoseconds (per cycle), so
216 * mult/2^shift = cyc/ns = 10^6/hpet_period
217 * mult = (10^6 * 2^shift)/hpet_period
218 * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
218 */ 219 */
219 hpet_freq = 1000000000000000ULL; 220 hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC,
220 do_div(hpet_freq, hpet_period); 221 hpet_period, hpet_clockevent.shift);
221 hpet_clockevent.mult = div_sc((unsigned long) hpet_freq,
222 NSEC_PER_SEC, hpet_clockevent.shift);
223 /* Calculate the min / max delta */ 222 /* Calculate the min / max delta */
224 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, 223 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
225 &hpet_clockevent); 224 &hpet_clockevent);
@@ -324,7 +323,7 @@ static struct clocksource clocksource_hpet = {
324 323
325static int hpet_clocksource_register(void) 324static int hpet_clocksource_register(void)
326{ 325{
327 u64 tmp, start, now; 326 u64 start, now;
328 cycle_t t1; 327 cycle_t t1;
329 328
330 /* Start the counter */ 329 /* Start the counter */
@@ -351,21 +350,15 @@ static int hpet_clocksource_register(void)
351 return -ENODEV; 350 return -ENODEV;
352 } 351 }
353 352
354 /* Initialize and register HPET clocksource 353 /*
355 * 354 * The definition of mult is (include/linux/clocksource.h)
356 * hpet period is in femto seconds per cycle 355 * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
357 * so we need to convert this to ns/cyc units 356 * so we first need to convert hpet_period to ns/cyc units:
358 * approximated by mult/2^shift 357 * mult/2^shift = ns/cyc = hpet_period/10^6
359 * 358 * mult = (hpet_period * 2^shift)/10^6
360 * fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift 359 * mult = (hpet_period << shift)/FSEC_PER_NSEC
361 * fsec/cyc * 1ns/1000000fsec * 2^shift = mult
362 * fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
363 * (fsec/cyc << shift)/1000000 = mult
364 * (hpet_period << shift)/FSEC_PER_NSEC = mult
365 */ 360 */
366 tmp = (u64)hpet_period << HPET_SHIFT; 361 clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT);
367 do_div(tmp, FSEC_PER_NSEC);
368 clocksource_hpet.mult = (u32)tmp;
369 362
370 clocksource_register(&clocksource_hpet); 363 clocksource_register(&clocksource_hpet);
371 364
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index 95e80e5033c3..eb9ddd8efb82 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -162,7 +162,7 @@ int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
162 int ret; 162 int ret;
163 163
164 if (!cpu_has_fxsr) 164 if (!cpu_has_fxsr)
165 return -EIO; 165 return -ENODEV;
166 166
167 ret = init_fpu(target); 167 ret = init_fpu(target);
168 if (ret) 168 if (ret)
@@ -179,7 +179,7 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
179 int ret; 179 int ret;
180 180
181 if (!cpu_has_fxsr) 181 if (!cpu_has_fxsr)
182 return -EIO; 182 return -ENODEV;
183 183
184 ret = init_fpu(target); 184 ret = init_fpu(target);
185 if (ret) 185 if (ret)
diff --git a/arch/x86/kernel/i8259_32.c b/arch/x86/kernel/i8259.c
index fe631967d625..dc92b49d9204 100644
--- a/arch/x86/kernel/i8259_32.c
+++ b/arch/x86/kernel/i8259.c
@@ -1,8 +1,10 @@
1#include <linux/linkage.h>
1#include <linux/errno.h> 2#include <linux/errno.h>
2#include <linux/signal.h> 3#include <linux/signal.h>
3#include <linux/sched.h> 4#include <linux/sched.h>
4#include <linux/ioport.h> 5#include <linux/ioport.h>
5#include <linux/interrupt.h> 6#include <linux/interrupt.h>
7#include <linux/timex.h>
6#include <linux/slab.h> 8#include <linux/slab.h>
7#include <linux/random.h> 9#include <linux/random.h>
8#include <linux/init.h> 10#include <linux/init.h>
@@ -10,10 +12,12 @@
10#include <linux/sysdev.h> 12#include <linux/sysdev.h>
11#include <linux/bitops.h> 13#include <linux/bitops.h>
12 14
15#include <asm/acpi.h>
13#include <asm/atomic.h> 16#include <asm/atomic.h>
14#include <asm/system.h> 17#include <asm/system.h>
15#include <asm/io.h> 18#include <asm/io.h>
16#include <asm/timer.h> 19#include <asm/timer.h>
20#include <asm/hw_irq.h>
17#include <asm/pgtable.h> 21#include <asm/pgtable.h>
18#include <asm/delay.h> 22#include <asm/delay.h>
19#include <asm/desc.h> 23#include <asm/desc.h>
@@ -32,7 +36,7 @@ static int i8259A_auto_eoi;
32DEFINE_SPINLOCK(i8259A_lock); 36DEFINE_SPINLOCK(i8259A_lock);
33static void mask_and_ack_8259A(unsigned int); 37static void mask_and_ack_8259A(unsigned int);
34 38
35static struct irq_chip i8259A_chip = { 39struct irq_chip i8259A_chip = {
36 .name = "XT-PIC", 40 .name = "XT-PIC",
37 .mask = disable_8259A_irq, 41 .mask = disable_8259A_irq,
38 .disable = disable_8259A_irq, 42 .disable = disable_8259A_irq,
@@ -125,14 +129,14 @@ static inline int i8259A_irq_real(unsigned int irq)
125 int irqmask = 1<<irq; 129 int irqmask = 1<<irq;
126 130
127 if (irq < 8) { 131 if (irq < 8) {
128 outb(0x0B,PIC_MASTER_CMD); /* ISR register */ 132 outb(0x0B, PIC_MASTER_CMD); /* ISR register */
129 value = inb(PIC_MASTER_CMD) & irqmask; 133 value = inb(PIC_MASTER_CMD) & irqmask;
130 outb(0x0A,PIC_MASTER_CMD); /* back to the IRR register */ 134 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */
131 return value; 135 return value;
132 } 136 }
133 outb(0x0B,PIC_SLAVE_CMD); /* ISR register */ 137 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */
134 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8); 138 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
135 outb(0x0A,PIC_SLAVE_CMD); /* back to the IRR register */ 139 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */
136 return value; 140 return value;
137} 141}
138 142
@@ -171,12 +175,14 @@ handle_real_irq:
171 if (irq & 8) { 175 if (irq & 8) {
172 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */ 176 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
173 outb(cached_slave_mask, PIC_SLAVE_IMR); 177 outb(cached_slave_mask, PIC_SLAVE_IMR);
174 outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ 178 /* 'Specific EOI' to slave */
175 outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ 179 outb(0x60+(irq&7), PIC_SLAVE_CMD);
180 /* 'Specific EOI' to master-IRQ2 */
181 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD);
176 } else { 182 } else {
177 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */ 183 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
178 outb(cached_master_mask, PIC_MASTER_IMR); 184 outb(cached_master_mask, PIC_MASTER_IMR);
179 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ 185 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
180 } 186 }
181 spin_unlock_irqrestore(&i8259A_lock, flags); 187 spin_unlock_irqrestore(&i8259A_lock, flags);
182 return; 188 return;
@@ -199,7 +205,8 @@ spurious_8259A_irq:
199 * lets ACK and report it. [once per IRQ] 205 * lets ACK and report it. [once per IRQ]
200 */ 206 */
201 if (!(spurious_irq_mask & irqmask)) { 207 if (!(spurious_irq_mask & irqmask)) {
202 printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq); 208 printk(KERN_DEBUG
209 "spurious 8259A interrupt: IRQ%d.\n", irq);
203 spurious_irq_mask |= irqmask; 210 spurious_irq_mask |= irqmask;
204 } 211 }
205 atomic_inc(&irq_err_count); 212 atomic_inc(&irq_err_count);
@@ -290,17 +297,28 @@ void init_8259A(int auto_eoi)
290 * outb_pic - this has to work on a wide range of PC hardware. 297 * outb_pic - this has to work on a wide range of PC hardware.
291 */ 298 */
292 outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */ 299 outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */
293 outb_pic(0x20 + 0, PIC_MASTER_IMR); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */ 300
294 outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR); /* 8259A-1 (the master) has a slave on IR2 */ 301 /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 on x86-64,
302 to 0x20-0x27 on i386 */
303 outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR);
304
305 /* 8259A-1 (the master) has a slave on IR2 */
306 outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR);
307
295 if (auto_eoi) /* master does Auto EOI */ 308 if (auto_eoi) /* master does Auto EOI */
296 outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR); 309 outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
297 else /* master expects normal EOI */ 310 else /* master expects normal EOI */
298 outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR); 311 outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
299 312
300 outb_pic(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */ 313 outb_pic(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */
301 outb_pic(0x20 + 8, PIC_SLAVE_IMR); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */ 314
302 outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR); /* 8259A-2 is a slave on master's IR2 */ 315 /* ICW2: 8259A-2 IR0-7 mapped to IRQ8_VECTOR */
303 outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); /* (slave's support for AEOI in flat mode is to be investigated) */ 316 outb_pic(IRQ8_VECTOR, PIC_SLAVE_IMR);
317 /* 8259A-2 is a slave on master's IR2 */
318 outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR);
319 /* (slave's support for AEOI in flat mode is to be investigated) */
320 outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR);
321
304 if (auto_eoi) 322 if (auto_eoi)
305 /* 323 /*
306 * In AEOI mode we just have to mask the interrupt 324 * In AEOI mode we just have to mask the interrupt
@@ -317,93 +335,3 @@ void init_8259A(int auto_eoi)
317 335
318 spin_unlock_irqrestore(&i8259A_lock, flags); 336 spin_unlock_irqrestore(&i8259A_lock, flags);
319} 337}
320
321/*
322 * Note that on a 486, we don't want to do a SIGFPE on an irq13
323 * as the irq is unreliable, and exception 16 works correctly
324 * (ie as explained in the intel literature). On a 386, you
325 * can't use exception 16 due to bad IBM design, so we have to
326 * rely on the less exact irq13.
327 *
328 * Careful.. Not only is IRQ13 unreliable, but it is also
329 * leads to races. IBM designers who came up with it should
330 * be shot.
331 */
332
333
334static irqreturn_t math_error_irq(int cpl, void *dev_id)
335{
336 extern void math_error(void __user *);
337 outb(0,0xF0);
338 if (ignore_fpu_irq || !boot_cpu_data.hard_math)
339 return IRQ_NONE;
340 math_error((void __user *)get_irq_regs()->ip);
341 return IRQ_HANDLED;
342}
343
344/*
345 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
346 * so allow interrupt sharing.
347 */
348static struct irqaction fpu_irq = {
349 .handler = math_error_irq,
350 .mask = CPU_MASK_NONE,
351 .name = "fpu",
352};
353
354void __init init_ISA_irqs (void)
355{
356 int i;
357
358#ifdef CONFIG_X86_LOCAL_APIC
359 init_bsp_APIC();
360#endif
361 init_8259A(0);
362
363 /*
364 * 16 old-style INTA-cycle interrupts:
365 */
366 for (i = 0; i < 16; i++) {
367 set_irq_chip_and_handler_name(i, &i8259A_chip,
368 handle_level_irq, "XT");
369 }
370}
371
372/* Overridden in paravirt.c */
373void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
374
375void __init native_init_IRQ(void)
376{
377 int i;
378
379 /* all the set up before the call gates are initialised */
380 pre_intr_init_hook();
381
382 /*
383 * Cover the whole vector space, no vector can escape
384 * us. (some of these will be overridden and become
385 * 'special' SMP interrupts)
386 */
387 for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) {
388 int vector = FIRST_EXTERNAL_VECTOR + i;
389 if (i >= NR_IRQS)
390 break;
391 /* SYSCALL_VECTOR was reserved in trap_init. */
392 if (!test_bit(vector, used_vectors))
393 set_intr_gate(vector, interrupt[i]);
394 }
395
396 /* setup after call gates are initialised (usually add in
397 * the architecture specific gates)
398 */
399 intr_init_hook();
400
401 /*
402 * External FPU? Set up irq13 if so, for
403 * original braindamaged IBM FERR coupling.
404 */
405 if (boot_cpu_data.hard_math && !cpu_has_fpu)
406 setup_irq(FPU_IRQ, &fpu_irq);
407
408 irq_ctx_init(smp_processor_id());
409}
diff --git a/arch/x86/kernel/i8259_64.c b/arch/x86/kernel/i8259_64.c
deleted file mode 100644
index fa57a1568508..000000000000
--- a/arch/x86/kernel/i8259_64.c
+++ /dev/null
@@ -1,512 +0,0 @@
1#include <linux/linkage.h>
2#include <linux/errno.h>
3#include <linux/signal.h>
4#include <linux/sched.h>
5#include <linux/ioport.h>
6#include <linux/interrupt.h>
7#include <linux/timex.h>
8#include <linux/slab.h>
9#include <linux/random.h>
10#include <linux/init.h>
11#include <linux/kernel_stat.h>
12#include <linux/sysdev.h>
13#include <linux/bitops.h>
14
15#include <asm/acpi.h>
16#include <asm/atomic.h>
17#include <asm/system.h>
18#include <asm/io.h>
19#include <asm/hw_irq.h>
20#include <asm/pgtable.h>
21#include <asm/delay.h>
22#include <asm/desc.h>
23#include <asm/apic.h>
24#include <asm/i8259.h>
25
26/*
27 * Common place to define all x86 IRQ vectors
28 *
29 * This builds up the IRQ handler stubs using some ugly macros in irq.h
30 *
31 * These macros create the low-level assembly IRQ routines that save
32 * register context and call do_IRQ(). do_IRQ() then does all the
33 * operations that are needed to keep the AT (or SMP IOAPIC)
34 * interrupt-controller happy.
35 */
36
37#define BI(x,y) \
38 BUILD_IRQ(x##y)
39
40#define BUILD_16_IRQS(x) \
41 BI(x,0) BI(x,1) BI(x,2) BI(x,3) \
42 BI(x,4) BI(x,5) BI(x,6) BI(x,7) \
43 BI(x,8) BI(x,9) BI(x,a) BI(x,b) \
44 BI(x,c) BI(x,d) BI(x,e) BI(x,f)
45
46/*
47 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
48 * (these are usually mapped to vectors 0x30-0x3f)
49 */
50
51/*
52 * The IO-APIC gives us many more interrupt sources. Most of these
53 * are unused but an SMP system is supposed to have enough memory ...
54 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
55 * across the spectrum, so we really want to be prepared to get all
56 * of these. Plus, more powerful systems might have more than 64
57 * IO-APIC registers.
58 *
59 * (these are usually mapped into the 0x30-0xff vector range)
60 */
61 BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3)
62BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7)
63BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb)
64BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf)
65
66#undef BUILD_16_IRQS
67#undef BI
68
69
70#define IRQ(x,y) \
71 IRQ##x##y##_interrupt
72
73#define IRQLIST_16(x) \
74 IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \
75 IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \
76 IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
77 IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
78
79/* for the irq vectors */
80static void (*__initdata interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = {
81 IRQLIST_16(0x2), IRQLIST_16(0x3),
82 IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
83 IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
84 IRQLIST_16(0xc), IRQLIST_16(0xd), IRQLIST_16(0xe), IRQLIST_16(0xf)
85};
86
87#undef IRQ
88#undef IRQLIST_16
89
90/*
91 * This is the 'legacy' 8259A Programmable Interrupt Controller,
92 * present in the majority of PC/AT boxes.
93 * plus some generic x86 specific things if generic specifics makes
94 * any sense at all.
95 * this file should become arch/i386/kernel/irq.c when the old irq.c
96 * moves to arch independent land
97 */
98
99static int i8259A_auto_eoi;
100DEFINE_SPINLOCK(i8259A_lock);
101static void mask_and_ack_8259A(unsigned int);
102
103static struct irq_chip i8259A_chip = {
104 .name = "XT-PIC",
105 .mask = disable_8259A_irq,
106 .disable = disable_8259A_irq,
107 .unmask = enable_8259A_irq,
108 .mask_ack = mask_and_ack_8259A,
109};
110
111/*
112 * 8259A PIC functions to handle ISA devices:
113 */
114
115/*
116 * This contains the irq mask for both 8259A irq controllers,
117 */
118unsigned int cached_irq_mask = 0xffff;
119
120/*
121 * Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
122 * boards the timer interrupt is not really connected to any IO-APIC pin,
123 * it's fed to the master 8259A's IR0 line only.
124 *
125 * Any '1' bit in this mask means the IRQ is routed through the IO-APIC.
126 * this 'mixed mode' IRQ handling costs nothing because it's only used
127 * at IRQ setup time.
128 */
129unsigned long io_apic_irqs;
130
131void disable_8259A_irq(unsigned int irq)
132{
133 unsigned int mask = 1 << irq;
134 unsigned long flags;
135
136 spin_lock_irqsave(&i8259A_lock, flags);
137 cached_irq_mask |= mask;
138 if (irq & 8)
139 outb(cached_slave_mask, PIC_SLAVE_IMR);
140 else
141 outb(cached_master_mask, PIC_MASTER_IMR);
142 spin_unlock_irqrestore(&i8259A_lock, flags);
143}
144
145void enable_8259A_irq(unsigned int irq)
146{
147 unsigned int mask = ~(1 << irq);
148 unsigned long flags;
149
150 spin_lock_irqsave(&i8259A_lock, flags);
151 cached_irq_mask &= mask;
152 if (irq & 8)
153 outb(cached_slave_mask, PIC_SLAVE_IMR);
154 else
155 outb(cached_master_mask, PIC_MASTER_IMR);
156 spin_unlock_irqrestore(&i8259A_lock, flags);
157}
158
159int i8259A_irq_pending(unsigned int irq)
160{
161 unsigned int mask = 1<<irq;
162 unsigned long flags;
163 int ret;
164
165 spin_lock_irqsave(&i8259A_lock, flags);
166 if (irq < 8)
167 ret = inb(PIC_MASTER_CMD) & mask;
168 else
169 ret = inb(PIC_SLAVE_CMD) & (mask >> 8);
170 spin_unlock_irqrestore(&i8259A_lock, flags);
171
172 return ret;
173}
174
175void make_8259A_irq(unsigned int irq)
176{
177 disable_irq_nosync(irq);
178 io_apic_irqs &= ~(1<<irq);
179 set_irq_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
180 "XT");
181 enable_irq(irq);
182}
183
184/*
185 * This function assumes to be called rarely. Switching between
186 * 8259A registers is slow.
187 * This has to be protected by the irq controller spinlock
188 * before being called.
189 */
190static inline int i8259A_irq_real(unsigned int irq)
191{
192 int value;
193 int irqmask = 1<<irq;
194
195 if (irq < 8) {
196 outb(0x0B,PIC_MASTER_CMD); /* ISR register */
197 value = inb(PIC_MASTER_CMD) & irqmask;
198 outb(0x0A,PIC_MASTER_CMD); /* back to the IRR register */
199 return value;
200 }
201 outb(0x0B,PIC_SLAVE_CMD); /* ISR register */
202 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
203 outb(0x0A,PIC_SLAVE_CMD); /* back to the IRR register */
204 return value;
205}
206
207/*
208 * Careful! The 8259A is a fragile beast, it pretty
209 * much _has_ to be done exactly like this (mask it
210 * first, _then_ send the EOI, and the order of EOI
211 * to the two 8259s is important!
212 */
213static void mask_and_ack_8259A(unsigned int irq)
214{
215 unsigned int irqmask = 1 << irq;
216 unsigned long flags;
217
218 spin_lock_irqsave(&i8259A_lock, flags);
219 /*
220 * Lightweight spurious IRQ detection. We do not want
221 * to overdo spurious IRQ handling - it's usually a sign
222 * of hardware problems, so we only do the checks we can
223 * do without slowing down good hardware unnecessarily.
224 *
225 * Note that IRQ7 and IRQ15 (the two spurious IRQs
226 * usually resulting from the 8259A-1|2 PICs) occur
227 * even if the IRQ is masked in the 8259A. Thus we
228 * can check spurious 8259A IRQs without doing the
229 * quite slow i8259A_irq_real() call for every IRQ.
230 * This does not cover 100% of spurious interrupts,
231 * but should be enough to warn the user that there
232 * is something bad going on ...
233 */
234 if (cached_irq_mask & irqmask)
235 goto spurious_8259A_irq;
236 cached_irq_mask |= irqmask;
237
238handle_real_irq:
239 if (irq & 8) {
240 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
241 outb(cached_slave_mask, PIC_SLAVE_IMR);
242 /* 'Specific EOI' to slave */
243 outb(0x60+(irq&7),PIC_SLAVE_CMD);
244 /* 'Specific EOI' to master-IRQ2 */
245 outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD);
246 } else {
247 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
248 outb(cached_master_mask, PIC_MASTER_IMR);
249 /* 'Specific EOI' to master */
250 outb(0x60+irq,PIC_MASTER_CMD);
251 }
252 spin_unlock_irqrestore(&i8259A_lock, flags);
253 return;
254
255spurious_8259A_irq:
256 /*
257 * this is the slow path - should happen rarely.
258 */
259 if (i8259A_irq_real(irq))
260 /*
261 * oops, the IRQ _is_ in service according to the
262 * 8259A - not spurious, go handle it.
263 */
264 goto handle_real_irq;
265
266 {
267 static int spurious_irq_mask;
268 /*
269 * At this point we can be sure the IRQ is spurious,
270 * lets ACK and report it. [once per IRQ]
271 */
272 if (!(spurious_irq_mask & irqmask)) {
273 printk(KERN_DEBUG
274 "spurious 8259A interrupt: IRQ%d.\n", irq);
275 spurious_irq_mask |= irqmask;
276 }
277 atomic_inc(&irq_err_count);
278 /*
279 * Theoretically we do not have to handle this IRQ,
280 * but in Linux this does not cause problems and is
281 * simpler for us.
282 */
283 goto handle_real_irq;
284 }
285}
286
287static char irq_trigger[2];
288/**
289 * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ
290 */
291static void restore_ELCR(char *trigger)
292{
293 outb(trigger[0], 0x4d0);
294 outb(trigger[1], 0x4d1);
295}
296
297static void save_ELCR(char *trigger)
298{
299 /* IRQ 0,1,2,8,13 are marked as reserved */
300 trigger[0] = inb(0x4d0) & 0xF8;
301 trigger[1] = inb(0x4d1) & 0xDE;
302}
303
304static int i8259A_resume(struct sys_device *dev)
305{
306 init_8259A(i8259A_auto_eoi);
307 restore_ELCR(irq_trigger);
308 return 0;
309}
310
311static int i8259A_suspend(struct sys_device *dev, pm_message_t state)
312{
313 save_ELCR(irq_trigger);
314 return 0;
315}
316
317static int i8259A_shutdown(struct sys_device *dev)
318{
319 /* Put the i8259A into a quiescent state that
320 * the kernel initialization code can get it
321 * out of.
322 */
323 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
324 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */
325 return 0;
326}
327
328static struct sysdev_class i8259_sysdev_class = {
329 .name = "i8259",
330 .suspend = i8259A_suspend,
331 .resume = i8259A_resume,
332 .shutdown = i8259A_shutdown,
333};
334
335static struct sys_device device_i8259A = {
336 .id = 0,
337 .cls = &i8259_sysdev_class,
338};
339
340static int __init i8259A_init_sysfs(void)
341{
342 int error = sysdev_class_register(&i8259_sysdev_class);
343 if (!error)
344 error = sysdev_register(&device_i8259A);
345 return error;
346}
347
348device_initcall(i8259A_init_sysfs);
349
350void init_8259A(int auto_eoi)
351{
352 unsigned long flags;
353
354 i8259A_auto_eoi = auto_eoi;
355
356 spin_lock_irqsave(&i8259A_lock, flags);
357
358 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
359 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
360
361 /*
362 * outb_pic - this has to work on a wide range of PC hardware.
363 */
364 outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */
365 /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 */
366 outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR);
367 /* 8259A-1 (the master) has a slave on IR2 */
368 outb_pic(0x04, PIC_MASTER_IMR);
369 if (auto_eoi) /* master does Auto EOI */
370 outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
371 else /* master expects normal EOI */
372 outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
373
374 outb_pic(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */
375 /* ICW2: 8259A-2 IR0-7 mapped to 0x38-0x3f */
376 outb_pic(IRQ8_VECTOR, PIC_SLAVE_IMR);
377 /* 8259A-2 is a slave on master's IR2 */
378 outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR);
379 /* (slave's support for AEOI in flat mode is to be investigated) */
380 outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR);
381
382 if (auto_eoi)
383 /*
384 * In AEOI mode we just have to mask the interrupt
385 * when acking.
386 */
387 i8259A_chip.mask_ack = disable_8259A_irq;
388 else
389 i8259A_chip.mask_ack = mask_and_ack_8259A;
390
391 udelay(100); /* wait for 8259A to initialize */
392
393 outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
394 outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */
395
396 spin_unlock_irqrestore(&i8259A_lock, flags);
397}
398
399
400
401
402/*
403 * IRQ2 is cascade interrupt to second interrupt controller
404 */
405
406static struct irqaction irq2 = {
407 .handler = no_action,
408 .mask = CPU_MASK_NONE,
409 .name = "cascade",
410};
411DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
412 [0 ... IRQ0_VECTOR - 1] = -1,
413 [IRQ0_VECTOR] = 0,
414 [IRQ1_VECTOR] = 1,
415 [IRQ2_VECTOR] = 2,
416 [IRQ3_VECTOR] = 3,
417 [IRQ4_VECTOR] = 4,
418 [IRQ5_VECTOR] = 5,
419 [IRQ6_VECTOR] = 6,
420 [IRQ7_VECTOR] = 7,
421 [IRQ8_VECTOR] = 8,
422 [IRQ9_VECTOR] = 9,
423 [IRQ10_VECTOR] = 10,
424 [IRQ11_VECTOR] = 11,
425 [IRQ12_VECTOR] = 12,
426 [IRQ13_VECTOR] = 13,
427 [IRQ14_VECTOR] = 14,
428 [IRQ15_VECTOR] = 15,
429 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
430};
431
432void __init init_ISA_irqs (void)
433{
434 int i;
435
436 init_bsp_APIC();
437 init_8259A(0);
438
439 for (i = 0; i < NR_IRQS; i++) {
440 irq_desc[i].status = IRQ_DISABLED;
441 irq_desc[i].action = NULL;
442 irq_desc[i].depth = 1;
443
444 if (i < 16) {
445 /*
446 * 16 old-style INTA-cycle interrupts:
447 */
448 set_irq_chip_and_handler_name(i, &i8259A_chip,
449 handle_level_irq, "XT");
450 } else {
451 /*
452 * 'high' PCI IRQs filled in on demand
453 */
454 irq_desc[i].chip = &no_irq_chip;
455 }
456 }
457}
458
459void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
460
461void __init native_init_IRQ(void)
462{
463 int i;
464
465 init_ISA_irqs();
466 /*
467 * Cover the whole vector space, no vector can escape
468 * us. (some of these will be overridden and become
469 * 'special' SMP interrupts)
470 */
471 for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) {
472 int vector = FIRST_EXTERNAL_VECTOR + i;
473 if (vector != IA32_SYSCALL_VECTOR)
474 set_intr_gate(vector, interrupt[i]);
475 }
476
477#ifdef CONFIG_SMP
478 /*
479 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
480 * IPI, driven by wakeup.
481 */
482 set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
483
484 /* IPIs for invalidation */
485 set_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0);
486 set_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1);
487 set_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2);
488 set_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3);
489 set_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4);
490 set_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5);
491 set_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6);
492 set_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7);
493
494 /* IPI for generic function call */
495 set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
496
497 /* Low priority IPI to cleanup after moving an irq */
498 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
499#endif
500 set_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
501 set_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
502
503 /* self generated IPI for local APIC timer */
504 set_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
505
506 /* IPI vectors for APIC spurious and error interrupts */
507 set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
508 set_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
509
510 if (!acpi_ioapic)
511 setup_irq(2, &irq2);
512}
diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c
index 0662817d61bf..fedb3b113ace 100644
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -58,7 +58,7 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
58static DEFINE_SPINLOCK(ioapic_lock); 58static DEFINE_SPINLOCK(ioapic_lock);
59static DEFINE_SPINLOCK(vector_lock); 59static DEFINE_SPINLOCK(vector_lock);
60 60
61int timer_over_8254 __initdata = 1; 61int timer_through_8259 __initdata;
62 62
63/* 63/*
64 * Is the SiS APIC rmw bug present ? 64 * Is the SiS APIC rmw bug present ?
@@ -245,7 +245,7 @@ static void __init replace_pin_at_irq(unsigned int irq,
245 } 245 }
246} 246}
247 247
248static void __modify_IO_APIC_irq (unsigned int irq, unsigned long enable, unsigned long disable) 248static void __modify_IO_APIC_irq(unsigned int irq, unsigned long enable, unsigned long disable)
249{ 249{
250 struct irq_pin_list *entry = irq_2_pin + irq; 250 struct irq_pin_list *entry = irq_2_pin + irq;
251 unsigned int pin, reg; 251 unsigned int pin, reg;
@@ -265,30 +265,32 @@ static void __modify_IO_APIC_irq (unsigned int irq, unsigned long enable, unsign
265} 265}
266 266
267/* mask = 1 */ 267/* mask = 1 */
268static void __mask_IO_APIC_irq (unsigned int irq) 268static void __mask_IO_APIC_irq(unsigned int irq)
269{ 269{
270 __modify_IO_APIC_irq(irq, 0x00010000, 0); 270 __modify_IO_APIC_irq(irq, IO_APIC_REDIR_MASKED, 0);
271} 271}
272 272
273/* mask = 0 */ 273/* mask = 0 */
274static void __unmask_IO_APIC_irq (unsigned int irq) 274static void __unmask_IO_APIC_irq(unsigned int irq)
275{ 275{
276 __modify_IO_APIC_irq(irq, 0, 0x00010000); 276 __modify_IO_APIC_irq(irq, 0, IO_APIC_REDIR_MASKED);
277} 277}
278 278
279/* mask = 1, trigger = 0 */ 279/* mask = 1, trigger = 0 */
280static void __mask_and_edge_IO_APIC_irq (unsigned int irq) 280static void __mask_and_edge_IO_APIC_irq(unsigned int irq)
281{ 281{
282 __modify_IO_APIC_irq(irq, 0x00010000, 0x00008000); 282 __modify_IO_APIC_irq(irq, IO_APIC_REDIR_MASKED,
283 IO_APIC_REDIR_LEVEL_TRIGGER);
283} 284}
284 285
285/* mask = 0, trigger = 1 */ 286/* mask = 0, trigger = 1 */
286static void __unmask_and_level_IO_APIC_irq (unsigned int irq) 287static void __unmask_and_level_IO_APIC_irq(unsigned int irq)
287{ 288{
288 __modify_IO_APIC_irq(irq, 0x00008000, 0x00010000); 289 __modify_IO_APIC_irq(irq, IO_APIC_REDIR_LEVEL_TRIGGER,
290 IO_APIC_REDIR_MASKED);
289} 291}
290 292
291static void mask_IO_APIC_irq (unsigned int irq) 293static void mask_IO_APIC_irq(unsigned int irq)
292{ 294{
293 unsigned long flags; 295 unsigned long flags;
294 296
@@ -297,7 +299,7 @@ static void mask_IO_APIC_irq (unsigned int irq)
297 spin_unlock_irqrestore(&ioapic_lock, flags); 299 spin_unlock_irqrestore(&ioapic_lock, flags);
298} 300}
299 301
300static void unmask_IO_APIC_irq (unsigned int irq) 302static void unmask_IO_APIC_irq(unsigned int irq)
301{ 303{
302 unsigned long flags; 304 unsigned long flags;
303 305
@@ -309,7 +311,7 @@ static void unmask_IO_APIC_irq (unsigned int irq)
309static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) 311static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
310{ 312{
311 struct IO_APIC_route_entry entry; 313 struct IO_APIC_route_entry entry;
312 314
313 /* Check delivery_mode to be sure we're not clearing an SMI pin */ 315 /* Check delivery_mode to be sure we're not clearing an SMI pin */
314 entry = ioapic_read_entry(apic, pin); 316 entry = ioapic_read_entry(apic, pin);
315 if (entry.delivery_mode == dest_SMI) 317 if (entry.delivery_mode == dest_SMI)
@@ -321,7 +323,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
321 ioapic_mask_entry(apic, pin); 323 ioapic_mask_entry(apic, pin);
322} 324}
323 325
324static void clear_IO_APIC (void) 326static void clear_IO_APIC(void)
325{ 327{
326 int apic, pin; 328 int apic, pin;
327 329
@@ -338,7 +340,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
338 struct irq_pin_list *entry = irq_2_pin + irq; 340 struct irq_pin_list *entry = irq_2_pin + irq;
339 unsigned int apicid_value; 341 unsigned int apicid_value;
340 cpumask_t tmp; 342 cpumask_t tmp;
341 343
342 cpus_and(tmp, cpumask, cpu_online_map); 344 cpus_and(tmp, cpumask, cpu_online_map);
343 if (cpus_empty(tmp)) 345 if (cpus_empty(tmp))
344 tmp = TARGET_CPUS; 346 tmp = TARGET_CPUS;
@@ -367,7 +369,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
367# include <linux/kernel_stat.h> /* kstat */ 369# include <linux/kernel_stat.h> /* kstat */
368# include <linux/slab.h> /* kmalloc() */ 370# include <linux/slab.h> /* kmalloc() */
369# include <linux/timer.h> 371# include <linux/timer.h>
370 372
371#define IRQBALANCE_CHECK_ARCH -999 373#define IRQBALANCE_CHECK_ARCH -999
372#define MAX_BALANCED_IRQ_INTERVAL (5*HZ) 374#define MAX_BALANCED_IRQ_INTERVAL (5*HZ)
373#define MIN_BALANCED_IRQ_INTERVAL (HZ/2) 375#define MIN_BALANCED_IRQ_INTERVAL (HZ/2)
@@ -379,14 +381,14 @@ static int physical_balance __read_mostly;
379static long balanced_irq_interval __read_mostly = MAX_BALANCED_IRQ_INTERVAL; 381static long balanced_irq_interval __read_mostly = MAX_BALANCED_IRQ_INTERVAL;
380 382
381static struct irq_cpu_info { 383static struct irq_cpu_info {
382 unsigned long * last_irq; 384 unsigned long *last_irq;
383 unsigned long * irq_delta; 385 unsigned long *irq_delta;
384 unsigned long irq; 386 unsigned long irq;
385} irq_cpu_data[NR_CPUS]; 387} irq_cpu_data[NR_CPUS];
386 388
387#define CPU_IRQ(cpu) (irq_cpu_data[cpu].irq) 389#define CPU_IRQ(cpu) (irq_cpu_data[cpu].irq)
388#define LAST_CPU_IRQ(cpu,irq) (irq_cpu_data[cpu].last_irq[irq]) 390#define LAST_CPU_IRQ(cpu, irq) (irq_cpu_data[cpu].last_irq[irq])
389#define IRQ_DELTA(cpu,irq) (irq_cpu_data[cpu].irq_delta[irq]) 391#define IRQ_DELTA(cpu, irq) (irq_cpu_data[cpu].irq_delta[irq])
390 392
391#define IDLE_ENOUGH(cpu,now) \ 393#define IDLE_ENOUGH(cpu,now) \
392 (idle_cpu(cpu) && ((now) - per_cpu(irq_stat, (cpu)).idle_timestamp > 1)) 394 (idle_cpu(cpu) && ((now) - per_cpu(irq_stat, (cpu)).idle_timestamp > 1))
@@ -425,8 +427,8 @@ inside:
425 if (cpu == -1) 427 if (cpu == -1)
426 cpu = NR_CPUS-1; 428 cpu = NR_CPUS-1;
427 } 429 }
428 } while (!cpu_online(cpu) || !IRQ_ALLOWED(cpu,allowed_mask) || 430 } while (!cpu_online(cpu) || !IRQ_ALLOWED(cpu, allowed_mask) ||
429 (search_idle && !IDLE_ENOUGH(cpu,now))); 431 (search_idle && !IDLE_ENOUGH(cpu, now)));
430 432
431 return cpu; 433 return cpu;
432} 434}
@@ -436,15 +438,14 @@ static inline void balance_irq(int cpu, int irq)
436 unsigned long now = jiffies; 438 unsigned long now = jiffies;
437 cpumask_t allowed_mask; 439 cpumask_t allowed_mask;
438 unsigned int new_cpu; 440 unsigned int new_cpu;
439 441
440 if (irqbalance_disabled) 442 if (irqbalance_disabled)
441 return; 443 return;
442 444
443 cpus_and(allowed_mask, cpu_online_map, balance_irq_affinity[irq]); 445 cpus_and(allowed_mask, cpu_online_map, balance_irq_affinity[irq]);
444 new_cpu = move(cpu, allowed_mask, now, 1); 446 new_cpu = move(cpu, allowed_mask, now, 1);
445 if (cpu != new_cpu) { 447 if (cpu != new_cpu)
446 set_pending_irq(irq, cpumask_of_cpu(new_cpu)); 448 set_pending_irq(irq, cpumask_of_cpu(new_cpu));
447 }
448} 449}
449 450
450static inline void rotate_irqs_among_cpus(unsigned long useful_load_threshold) 451static inline void rotate_irqs_among_cpus(unsigned long useful_load_threshold)
@@ -456,14 +457,14 @@ static inline void rotate_irqs_among_cpus(unsigned long useful_load_threshold)
456 if (!irq_desc[j].action) 457 if (!irq_desc[j].action)
457 continue; 458 continue;
458 /* Is it a significant load ? */ 459 /* Is it a significant load ? */
459 if (IRQ_DELTA(CPU_TO_PACKAGEINDEX(i),j) < 460 if (IRQ_DELTA(CPU_TO_PACKAGEINDEX(i), j) <
460 useful_load_threshold) 461 useful_load_threshold)
461 continue; 462 continue;
462 balance_irq(i, j); 463 balance_irq(i, j);
463 } 464 }
464 } 465 }
465 balanced_irq_interval = max((long)MIN_BALANCED_IRQ_INTERVAL, 466 balanced_irq_interval = max((long)MIN_BALANCED_IRQ_INTERVAL,
466 balanced_irq_interval - BALANCED_IRQ_LESS_DELTA); 467 balanced_irq_interval - BALANCED_IRQ_LESS_DELTA);
467 return; 468 return;
468} 469}
469 470
@@ -492,22 +493,22 @@ static void do_irq_balance(void)
492 /* Is this an active IRQ or balancing disabled ? */ 493 /* Is this an active IRQ or balancing disabled ? */
493 if (!irq_desc[j].action || irq_balancing_disabled(j)) 494 if (!irq_desc[j].action || irq_balancing_disabled(j))
494 continue; 495 continue;
495 if ( package_index == i ) 496 if (package_index == i)
496 IRQ_DELTA(package_index,j) = 0; 497 IRQ_DELTA(package_index, j) = 0;
497 /* Determine the total count per processor per IRQ */ 498 /* Determine the total count per processor per IRQ */
498 value_now = (unsigned long) kstat_cpu(i).irqs[j]; 499 value_now = (unsigned long) kstat_cpu(i).irqs[j];
499 500
500 /* Determine the activity per processor per IRQ */ 501 /* Determine the activity per processor per IRQ */
501 delta = value_now - LAST_CPU_IRQ(i,j); 502 delta = value_now - LAST_CPU_IRQ(i, j);
502 503
503 /* Update last_cpu_irq[][] for the next time */ 504 /* Update last_cpu_irq[][] for the next time */
504 LAST_CPU_IRQ(i,j) = value_now; 505 LAST_CPU_IRQ(i, j) = value_now;
505 506
506 /* Ignore IRQs whose rate is less than the clock */ 507 /* Ignore IRQs whose rate is less than the clock */
507 if (delta < useful_load_threshold) 508 if (delta < useful_load_threshold)
508 continue; 509 continue;
509 /* update the load for the processor or package total */ 510 /* update the load for the processor or package total */
510 IRQ_DELTA(package_index,j) += delta; 511 IRQ_DELTA(package_index, j) += delta;
511 512
512 /* Keep track of the higher numbered sibling as well */ 513 /* Keep track of the higher numbered sibling as well */
513 if (i != package_index) 514 if (i != package_index)
@@ -533,7 +534,8 @@ static void do_irq_balance(void)
533 max_cpu_irq = ULONG_MAX; 534 max_cpu_irq = ULONG_MAX;
534 535
535tryanothercpu: 536tryanothercpu:
536 /* Look for heaviest loaded processor. 537 /*
538 * Look for heaviest loaded processor.
537 * We may come back to get the next heaviest loaded processor. 539 * We may come back to get the next heaviest loaded processor.
538 * Skip processors with trivial loads. 540 * Skip processors with trivial loads.
539 */ 541 */
@@ -542,7 +544,7 @@ tryanothercpu:
542 for_each_online_cpu(i) { 544 for_each_online_cpu(i) {
543 if (i != CPU_TO_PACKAGEINDEX(i)) 545 if (i != CPU_TO_PACKAGEINDEX(i))
544 continue; 546 continue;
545 if (max_cpu_irq <= CPU_IRQ(i)) 547 if (max_cpu_irq <= CPU_IRQ(i))
546 continue; 548 continue;
547 if (tmp_cpu_irq < CPU_IRQ(i)) { 549 if (tmp_cpu_irq < CPU_IRQ(i)) {
548 tmp_cpu_irq = CPU_IRQ(i); 550 tmp_cpu_irq = CPU_IRQ(i);
@@ -551,8 +553,9 @@ tryanothercpu:
551 } 553 }
552 554
553 if (tmp_loaded == -1) { 555 if (tmp_loaded == -1) {
554 /* In the case of small number of heavy interrupt sources, 556 /*
555 * loading some of the cpus too much. We use Ingo's original 557 * In the case of small number of heavy interrupt sources,
558 * loading some of the cpus too much. We use Ingo's original
556 * approach to rotate them around. 559 * approach to rotate them around.
557 */ 560 */
558 if (!first_attempt && imbalance >= useful_load_threshold) { 561 if (!first_attempt && imbalance >= useful_load_threshold) {
@@ -561,13 +564,14 @@ tryanothercpu:
561 } 564 }
562 goto not_worth_the_effort; 565 goto not_worth_the_effort;
563 } 566 }
564 567
565 first_attempt = 0; /* heaviest search */ 568 first_attempt = 0; /* heaviest search */
566 max_cpu_irq = tmp_cpu_irq; /* load */ 569 max_cpu_irq = tmp_cpu_irq; /* load */
567 max_loaded = tmp_loaded; /* processor */ 570 max_loaded = tmp_loaded; /* processor */
568 imbalance = (max_cpu_irq - min_cpu_irq) / 2; 571 imbalance = (max_cpu_irq - min_cpu_irq) / 2;
569 572
570 /* if imbalance is less than approx 10% of max load, then 573 /*
574 * if imbalance is less than approx 10% of max load, then
571 * observe diminishing returns action. - quit 575 * observe diminishing returns action. - quit
572 */ 576 */
573 if (imbalance < (max_cpu_irq >> 3)) 577 if (imbalance < (max_cpu_irq >> 3))
@@ -583,26 +587,25 @@ tryanotherirq:
583 /* Is this an active IRQ? */ 587 /* Is this an active IRQ? */
584 if (!irq_desc[j].action) 588 if (!irq_desc[j].action)
585 continue; 589 continue;
586 if (imbalance <= IRQ_DELTA(max_loaded,j)) 590 if (imbalance <= IRQ_DELTA(max_loaded, j))
587 continue; 591 continue;
588 /* Try to find the IRQ that is closest to the imbalance 592 /* Try to find the IRQ that is closest to the imbalance
589 * without going over. 593 * without going over.
590 */ 594 */
591 if (move_this_load < IRQ_DELTA(max_loaded,j)) { 595 if (move_this_load < IRQ_DELTA(max_loaded, j)) {
592 move_this_load = IRQ_DELTA(max_loaded,j); 596 move_this_load = IRQ_DELTA(max_loaded, j);
593 selected_irq = j; 597 selected_irq = j;
594 } 598 }
595 } 599 }
596 if (selected_irq == -1) { 600 if (selected_irq == -1)
597 goto tryanothercpu; 601 goto tryanothercpu;
598 }
599 602
600 imbalance = move_this_load; 603 imbalance = move_this_load;
601 604
602 /* For physical_balance case, we accumulated both load 605 /* For physical_balance case, we accumulated both load
603 * values in the one of the siblings cpu_irq[], 606 * values in the one of the siblings cpu_irq[],
604 * to use the same code for physical and logical processors 607 * to use the same code for physical and logical processors
605 * as much as possible. 608 * as much as possible.
606 * 609 *
607 * NOTE: the cpu_irq[] array holds the sum of the load for 610 * NOTE: the cpu_irq[] array holds the sum of the load for
608 * sibling A and sibling B in the slot for the lowest numbered 611 * sibling A and sibling B in the slot for the lowest numbered
@@ -631,11 +634,11 @@ tryanotherirq:
631 /* mark for change destination */ 634 /* mark for change destination */
632 set_pending_irq(selected_irq, cpumask_of_cpu(min_loaded)); 635 set_pending_irq(selected_irq, cpumask_of_cpu(min_loaded));
633 636
634 /* Since we made a change, come back sooner to 637 /* Since we made a change, come back sooner to
635 * check for more variation. 638 * check for more variation.
636 */ 639 */
637 balanced_irq_interval = max((long)MIN_BALANCED_IRQ_INTERVAL, 640 balanced_irq_interval = max((long)MIN_BALANCED_IRQ_INTERVAL,
638 balanced_irq_interval - BALANCED_IRQ_LESS_DELTA); 641 balanced_irq_interval - BALANCED_IRQ_LESS_DELTA);
639 return; 642 return;
640 } 643 }
641 goto tryanotherirq; 644 goto tryanotherirq;
@@ -646,7 +649,7 @@ not_worth_the_effort:
646 * upward 649 * upward
647 */ 650 */
648 balanced_irq_interval = min((long)MAX_BALANCED_IRQ_INTERVAL, 651 balanced_irq_interval = min((long)MAX_BALANCED_IRQ_INTERVAL,
649 balanced_irq_interval + BALANCED_IRQ_MORE_DELTA); 652 balanced_irq_interval + BALANCED_IRQ_MORE_DELTA);
650 return; 653 return;
651} 654}
652 655
@@ -685,13 +688,13 @@ static int __init balanced_irq_init(void)
685 cpumask_t tmp; 688 cpumask_t tmp;
686 689
687 cpus_shift_right(tmp, cpu_online_map, 2); 690 cpus_shift_right(tmp, cpu_online_map, 2);
688 c = &boot_cpu_data; 691 c = &boot_cpu_data;
689 /* When not overwritten by the command line ask subarchitecture. */ 692 /* When not overwritten by the command line ask subarchitecture. */
690 if (irqbalance_disabled == IRQBALANCE_CHECK_ARCH) 693 if (irqbalance_disabled == IRQBALANCE_CHECK_ARCH)
691 irqbalance_disabled = NO_BALANCE_IRQ; 694 irqbalance_disabled = NO_BALANCE_IRQ;
692 if (irqbalance_disabled) 695 if (irqbalance_disabled)
693 return 0; 696 return 0;
694 697
695 /* disable irqbalance completely if there is only one processor online */ 698 /* disable irqbalance completely if there is only one processor online */
696 if (num_online_cpus() < 2) { 699 if (num_online_cpus() < 2) {
697 irqbalance_disabled = 1; 700 irqbalance_disabled = 1;
@@ -705,16 +708,14 @@ static int __init balanced_irq_init(void)
705 physical_balance = 1; 708 physical_balance = 1;
706 709
707 for_each_online_cpu(i) { 710 for_each_online_cpu(i) {
708 irq_cpu_data[i].irq_delta = kmalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL); 711 irq_cpu_data[i].irq_delta = kzalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL);
709 irq_cpu_data[i].last_irq = kmalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL); 712 irq_cpu_data[i].last_irq = kzalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL);
710 if (irq_cpu_data[i].irq_delta == NULL || irq_cpu_data[i].last_irq == NULL) { 713 if (irq_cpu_data[i].irq_delta == NULL || irq_cpu_data[i].last_irq == NULL) {
711 printk(KERN_ERR "balanced_irq_init: out of memory"); 714 printk(KERN_ERR "balanced_irq_init: out of memory");
712 goto failed; 715 goto failed;
713 } 716 }
714 memset(irq_cpu_data[i].irq_delta,0,sizeof(unsigned long) * NR_IRQS);
715 memset(irq_cpu_data[i].last_irq,0,sizeof(unsigned long) * NR_IRQS);
716 } 717 }
717 718
718 printk(KERN_INFO "Starting balanced_irq\n"); 719 printk(KERN_INFO "Starting balanced_irq\n");
719 if (!IS_ERR(kthread_run(balanced_irq, NULL, "kirqd"))) 720 if (!IS_ERR(kthread_run(balanced_irq, NULL, "kirqd")))
720 return 0; 721 return 0;
@@ -849,7 +850,7 @@ static int __init find_isa_irq_apic(int irq, int type)
849 } 850 }
850 if (i < mp_irq_entries) { 851 if (i < mp_irq_entries) {
851 int apic; 852 int apic;
852 for(apic = 0; apic < nr_ioapics; apic++) { 853 for (apic = 0; apic < nr_ioapics; apic++) {
853 if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic) 854 if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic)
854 return apic; 855 return apic;
855 } 856 }
@@ -886,7 +887,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
886 !mp_irqs[i].mp_irqtype && 887 !mp_irqs[i].mp_irqtype &&
887 (bus == lbus) && 888 (bus == lbus) &&
888 (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { 889 (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) {
889 int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq); 890 int irq = pin_2_irq(i, apic, mp_irqs[i].mp_dstirq);
890 891
891 if (!(apic || IO_APIC_IRQ(irq))) 892 if (!(apic || IO_APIC_IRQ(irq)))
892 continue; 893 continue;
@@ -906,7 +907,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
906EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); 907EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector);
907 908
908/* 909/*
909 * This function currently is only a helper for the i386 smp boot process where 910 * This function currently is only a helper for the i386 smp boot process where
910 * we need to reprogram the ioredtbls to cater for the cpus which have come online 911 * we need to reprogram the ioredtbls to cater for the cpus which have come online
911 * so mask in all cases should simply be TARGET_CPUS 912 * so mask in all cases should simply be TARGET_CPUS
912 */ 913 */
@@ -981,37 +982,36 @@ static int MPBIOS_polarity(int idx)
981 /* 982 /*
982 * Determine IRQ line polarity (high active or low active): 983 * Determine IRQ line polarity (high active or low active):
983 */ 984 */
984 switch (mp_irqs[idx].mp_irqflag & 3) 985 switch (mp_irqs[idx].mp_irqflag & 3) {
986 case 0: /* conforms, ie. bus-type dependent polarity */
985 { 987 {
986 case 0: /* conforms, ie. bus-type dependent polarity */ 988 polarity = test_bit(bus, mp_bus_not_pci)?
987 { 989 default_ISA_polarity(idx):
988 polarity = test_bit(bus, mp_bus_not_pci)? 990 default_PCI_polarity(idx);
989 default_ISA_polarity(idx): 991 break;
990 default_PCI_polarity(idx); 992 }
991 break; 993 case 1: /* high active */
992 } 994 {
993 case 1: /* high active */ 995 polarity = 0;
994 { 996 break;
995 polarity = 0; 997 }
996 break; 998 case 2: /* reserved */
997 } 999 {
998 case 2: /* reserved */ 1000 printk(KERN_WARNING "broken BIOS!!\n");
999 { 1001 polarity = 1;
1000 printk(KERN_WARNING "broken BIOS!!\n"); 1002 break;
1001 polarity = 1; 1003 }
1002 break; 1004 case 3: /* low active */
1003 } 1005 {
1004 case 3: /* low active */ 1006 polarity = 1;
1005 { 1007 break;
1006 polarity = 1; 1008 }
1007 break; 1009 default: /* invalid */
1008 } 1010 {
1009 default: /* invalid */ 1011 printk(KERN_WARNING "broken BIOS!!\n");
1010 { 1012 polarity = 1;
1011 printk(KERN_WARNING "broken BIOS!!\n"); 1013 break;
1012 polarity = 1; 1014 }
1013 break;
1014 }
1015 } 1015 }
1016 return polarity; 1016 return polarity;
1017} 1017}
@@ -1024,69 +1024,67 @@ static int MPBIOS_trigger(int idx)
1024 /* 1024 /*
1025 * Determine IRQ trigger mode (edge or level sensitive): 1025 * Determine IRQ trigger mode (edge or level sensitive):
1026 */ 1026 */
1027 switch ((mp_irqs[idx].mp_irqflag>>2) & 3) 1027 switch ((mp_irqs[idx].mp_irqflag>>2) & 3) {
1028 case 0: /* conforms, ie. bus-type dependent */
1028 { 1029 {
1029 case 0: /* conforms, ie. bus-type dependent */ 1030 trigger = test_bit(bus, mp_bus_not_pci)?
1030 { 1031 default_ISA_trigger(idx):
1031 trigger = test_bit(bus, mp_bus_not_pci)? 1032 default_PCI_trigger(idx);
1032 default_ISA_trigger(idx):
1033 default_PCI_trigger(idx);
1034#if defined(CONFIG_EISA) || defined(CONFIG_MCA) 1033#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
1035 switch (mp_bus_id_to_type[bus]) 1034 switch (mp_bus_id_to_type[bus]) {
1036 { 1035 case MP_BUS_ISA: /* ISA pin */
1037 case MP_BUS_ISA: /* ISA pin */ 1036 {
1038 { 1037 /* set before the switch */
1039 /* set before the switch */
1040 break;
1041 }
1042 case MP_BUS_EISA: /* EISA pin */
1043 {
1044 trigger = default_EISA_trigger(idx);
1045 break;
1046 }
1047 case MP_BUS_PCI: /* PCI pin */
1048 {
1049 /* set before the switch */
1050 break;
1051 }
1052 case MP_BUS_MCA: /* MCA pin */
1053 {
1054 trigger = default_MCA_trigger(idx);
1055 break;
1056 }
1057 default:
1058 {
1059 printk(KERN_WARNING "broken BIOS!!\n");
1060 trigger = 1;
1061 break;
1062 }
1063 }
1064#endif
1065 break; 1038 break;
1066 } 1039 }
1067 case 1: /* edge */ 1040 case MP_BUS_EISA: /* EISA pin */
1068 { 1041 {
1069 trigger = 0; 1042 trigger = default_EISA_trigger(idx);
1070 break; 1043 break;
1071 } 1044 }
1072 case 2: /* reserved */ 1045 case MP_BUS_PCI: /* PCI pin */
1073 { 1046 {
1074 printk(KERN_WARNING "broken BIOS!!\n"); 1047 /* set before the switch */
1075 trigger = 1;
1076 break; 1048 break;
1077 } 1049 }
1078 case 3: /* level */ 1050 case MP_BUS_MCA: /* MCA pin */
1079 { 1051 {
1080 trigger = 1; 1052 trigger = default_MCA_trigger(idx);
1081 break; 1053 break;
1082 } 1054 }
1083 default: /* invalid */ 1055 default:
1084 { 1056 {
1085 printk(KERN_WARNING "broken BIOS!!\n"); 1057 printk(KERN_WARNING "broken BIOS!!\n");
1086 trigger = 0; 1058 trigger = 1;
1087 break; 1059 break;
1088 } 1060 }
1089 } 1061 }
1062#endif
1063 break;
1064 }
1065 case 1: /* edge */
1066 {
1067 trigger = 0;
1068 break;
1069 }
1070 case 2: /* reserved */
1071 {
1072 printk(KERN_WARNING "broken BIOS!!\n");
1073 trigger = 1;
1074 break;
1075 }
1076 case 3: /* level */
1077 {
1078 trigger = 1;
1079 break;
1080 }
1081 default: /* invalid */
1082 {
1083 printk(KERN_WARNING "broken BIOS!!\n");
1084 trigger = 0;
1085 break;
1086 }
1087 }
1090 return trigger; 1088 return trigger;
1091} 1089}
1092 1090
@@ -1154,8 +1152,8 @@ static inline int IO_APIC_irq_trigger(int irq)
1154 1152
1155 for (apic = 0; apic < nr_ioapics; apic++) { 1153 for (apic = 0; apic < nr_ioapics; apic++) {
1156 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { 1154 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
1157 idx = find_irq_entry(apic,pin,mp_INT); 1155 idx = find_irq_entry(apic, pin, mp_INT);
1158 if ((idx != -1) && (irq == pin_2_irq(idx,apic,pin))) 1156 if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin)))
1159 return irq_trigger(idx); 1157 return irq_trigger(idx);
1160 } 1158 }
1161 } 1159 }
@@ -1170,7 +1168,7 @@ static u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 }
1170 1168
1171static int __assign_irq_vector(int irq) 1169static int __assign_irq_vector(int irq)
1172{ 1170{
1173 static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0; 1171 static int current_vector = FIRST_DEVICE_VECTOR, current_offset;
1174 int vector, offset; 1172 int vector, offset;
1175 1173
1176 BUG_ON((unsigned)irq >= NR_IRQ_VECTORS); 1174 BUG_ON((unsigned)irq >= NR_IRQ_VECTORS);
@@ -1182,7 +1180,7 @@ static int __assign_irq_vector(int irq)
1182 offset = current_offset; 1180 offset = current_offset;
1183next: 1181next:
1184 vector += 8; 1182 vector += 8;
1185 if (vector >= FIRST_SYSTEM_VECTOR) { 1183 if (vector >= first_system_vector) {
1186 offset = (offset + 1) % 8; 1184 offset = (offset + 1) % 8;
1187 vector = FIRST_DEVICE_VECTOR + offset; 1185 vector = FIRST_DEVICE_VECTOR + offset;
1188 } 1186 }
@@ -1243,15 +1241,15 @@ static void __init setup_IO_APIC_irqs(void)
1243 /* 1241 /*
1244 * add it to the IO-APIC irq-routing table: 1242 * add it to the IO-APIC irq-routing table:
1245 */ 1243 */
1246 memset(&entry,0,sizeof(entry)); 1244 memset(&entry, 0, sizeof(entry));
1247 1245
1248 entry.delivery_mode = INT_DELIVERY_MODE; 1246 entry.delivery_mode = INT_DELIVERY_MODE;
1249 entry.dest_mode = INT_DEST_MODE; 1247 entry.dest_mode = INT_DEST_MODE;
1250 entry.mask = 0; /* enable IRQ */ 1248 entry.mask = 0; /* enable IRQ */
1251 entry.dest.logical.logical_dest = 1249 entry.dest.logical.logical_dest =
1252 cpu_mask_to_apicid(TARGET_CPUS); 1250 cpu_mask_to_apicid(TARGET_CPUS);
1253 1251
1254 idx = find_irq_entry(apic,pin,mp_INT); 1252 idx = find_irq_entry(apic, pin, mp_INT);
1255 if (idx == -1) { 1253 if (idx == -1) {
1256 if (first_notcon) { 1254 if (first_notcon) {
1257 apic_printk(APIC_VERBOSE, KERN_DEBUG 1255 apic_printk(APIC_VERBOSE, KERN_DEBUG
@@ -1295,7 +1293,7 @@ static void __init setup_IO_APIC_irqs(void)
1295 vector = assign_irq_vector(irq); 1293 vector = assign_irq_vector(irq);
1296 entry.vector = vector; 1294 entry.vector = vector;
1297 ioapic_register_intr(irq, vector, IOAPIC_AUTO); 1295 ioapic_register_intr(irq, vector, IOAPIC_AUTO);
1298 1296
1299 if (!apic && (irq < 16)) 1297 if (!apic && (irq < 16))
1300 disable_8259A_irq(irq); 1298 disable_8259A_irq(irq);
1301 } 1299 }
@@ -1308,25 +1306,21 @@ static void __init setup_IO_APIC_irqs(void)
1308} 1306}
1309 1307
1310/* 1308/*
1311 * Set up the 8259A-master output pin: 1309 * Set up the timer pin, possibly with the 8259A-master behind.
1312 */ 1310 */
1313static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, int vector) 1311static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
1312 int vector)
1314{ 1313{
1315 struct IO_APIC_route_entry entry; 1314 struct IO_APIC_route_entry entry;
1316 1315
1317 memset(&entry,0,sizeof(entry)); 1316 memset(&entry, 0, sizeof(entry));
1318
1319 disable_8259A_irq(0);
1320
1321 /* mask LVT0 */
1322 apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
1323 1317
1324 /* 1318 /*
1325 * We use logical delivery to get the timer IRQ 1319 * We use logical delivery to get the timer IRQ
1326 * to the first CPU. 1320 * to the first CPU.
1327 */ 1321 */
1328 entry.dest_mode = INT_DEST_MODE; 1322 entry.dest_mode = INT_DEST_MODE;
1329 entry.mask = 0; /* unmask IRQ now */ 1323 entry.mask = 1; /* mask IRQ now */
1330 entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); 1324 entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
1331 entry.delivery_mode = INT_DELIVERY_MODE; 1325 entry.delivery_mode = INT_DELIVERY_MODE;
1332 entry.polarity = 0; 1326 entry.polarity = 0;
@@ -1335,17 +1329,14 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
1335 1329
1336 /* 1330 /*
1337 * The timer IRQ doesn't have to know that behind the 1331 * The timer IRQ doesn't have to know that behind the
1338 * scene we have a 8259A-master in AEOI mode ... 1332 * scene we may have a 8259A-master in AEOI mode ...
1339 */ 1333 */
1340 irq_desc[0].chip = &ioapic_chip; 1334 ioapic_register_intr(0, vector, IOAPIC_EDGE);
1341 set_irq_handler(0, handle_edge_irq);
1342 1335
1343 /* 1336 /*
1344 * Add it to the IO-APIC irq-routing table: 1337 * Add it to the IO-APIC irq-routing table:
1345 */ 1338 */
1346 ioapic_write_entry(apic, pin, entry); 1339 ioapic_write_entry(apic, pin, entry);
1347
1348 enable_8259A_irq(0);
1349} 1340}
1350 1341
1351void __init print_IO_APIC(void) 1342void __init print_IO_APIC(void)
@@ -1360,7 +1351,7 @@ void __init print_IO_APIC(void)
1360 if (apic_verbosity == APIC_QUIET) 1351 if (apic_verbosity == APIC_QUIET)
1361 return; 1352 return;
1362 1353
1363 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); 1354 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
1364 for (i = 0; i < nr_ioapics; i++) 1355 for (i = 0; i < nr_ioapics; i++)
1365 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", 1356 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
1366 mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]); 1357 mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]);
@@ -1465,7 +1456,7 @@ void __init print_IO_APIC(void)
1465 1456
1466#if 0 1457#if 0
1467 1458
1468static void print_APIC_bitfield (int base) 1459static void print_APIC_bitfield(int base)
1469{ 1460{
1470 unsigned int v; 1461 unsigned int v;
1471 int i, j; 1462 int i, j;
@@ -1486,7 +1477,7 @@ static void print_APIC_bitfield (int base)
1486 } 1477 }
1487} 1478}
1488 1479
1489void /*__init*/ print_local_APIC(void * dummy) 1480void /*__init*/ print_local_APIC(void *dummy)
1490{ 1481{
1491 unsigned int v, ver, maxlvt; 1482 unsigned int v, ver, maxlvt;
1492 1483
@@ -1495,6 +1486,7 @@ void /*__init*/ print_local_APIC(void * dummy)
1495 1486
1496 printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", 1487 printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n",
1497 smp_processor_id(), hard_smp_processor_id()); 1488 smp_processor_id(), hard_smp_processor_id());
1489 v = apic_read(APIC_ID);
1498 printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, 1490 printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v,
1499 GET_APIC_ID(read_apic_id())); 1491 GET_APIC_ID(read_apic_id()));
1500 v = apic_read(APIC_LVR); 1492 v = apic_read(APIC_LVR);
@@ -1569,7 +1561,7 @@ void /*__init*/ print_local_APIC(void * dummy)
1569 printk("\n"); 1561 printk("\n");
1570} 1562}
1571 1563
1572void print_all_local_APICs (void) 1564void print_all_local_APICs(void)
1573{ 1565{
1574 on_each_cpu(print_local_APIC, NULL, 1, 1); 1566 on_each_cpu(print_local_APIC, NULL, 1, 1);
1575} 1567}
@@ -1592,11 +1584,11 @@ void /*__init*/ print_PIC(void)
1592 v = inb(0xa0) << 8 | inb(0x20); 1584 v = inb(0xa0) << 8 | inb(0x20);
1593 printk(KERN_DEBUG "... PIC IRR: %04x\n", v); 1585 printk(KERN_DEBUG "... PIC IRR: %04x\n", v);
1594 1586
1595 outb(0x0b,0xa0); 1587 outb(0x0b, 0xa0);
1596 outb(0x0b,0x20); 1588 outb(0x0b, 0x20);
1597 v = inb(0xa0) << 8 | inb(0x20); 1589 v = inb(0xa0) << 8 | inb(0x20);
1598 outb(0x0a,0xa0); 1590 outb(0x0a, 0xa0);
1599 outb(0x0a,0x20); 1591 outb(0x0a, 0x20);
1600 1592
1601 spin_unlock_irqrestore(&i8259A_lock, flags); 1593 spin_unlock_irqrestore(&i8259A_lock, flags);
1602 1594
@@ -1632,7 +1624,7 @@ static void __init enable_IO_APIC(void)
1632 spin_unlock_irqrestore(&ioapic_lock, flags); 1624 spin_unlock_irqrestore(&ioapic_lock, flags);
1633 nr_ioapic_registers[apic] = reg_01.bits.entries+1; 1625 nr_ioapic_registers[apic] = reg_01.bits.entries+1;
1634 } 1626 }
1635 for(apic = 0; apic < nr_ioapics; apic++) { 1627 for (apic = 0; apic < nr_ioapics; apic++) {
1636 int pin; 1628 int pin;
1637 /* See if any of the pins is in ExtINT mode */ 1629 /* See if any of the pins is in ExtINT mode */
1638 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { 1630 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
@@ -1758,7 +1750,7 @@ static void __init setup_ioapic_ids_from_mpc(void)
1758 spin_lock_irqsave(&ioapic_lock, flags); 1750 spin_lock_irqsave(&ioapic_lock, flags);
1759 reg_00.raw = io_apic_read(apic, 0); 1751 reg_00.raw = io_apic_read(apic, 0);
1760 spin_unlock_irqrestore(&ioapic_lock, flags); 1752 spin_unlock_irqrestore(&ioapic_lock, flags);
1761 1753
1762 old_id = mp_ioapics[apic].mp_apicid; 1754 old_id = mp_ioapics[apic].mp_apicid;
1763 1755
1764 if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) { 1756 if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) {
@@ -1810,7 +1802,7 @@ static void __init setup_ioapic_ids_from_mpc(void)
1810 /* 1802 /*
1811 * Read the right value from the MPC table and 1803 * Read the right value from the MPC table and
1812 * write it into the ID register. 1804 * write it into the ID register.
1813 */ 1805 */
1814 apic_printk(APIC_VERBOSE, KERN_INFO 1806 apic_printk(APIC_VERBOSE, KERN_INFO
1815 "...changing IO-APIC physical APIC ID to %d ...", 1807 "...changing IO-APIC physical APIC ID to %d ...",
1816 mp_ioapics[apic].mp_apicid); 1808 mp_ioapics[apic].mp_apicid);
@@ -2027,7 +2019,7 @@ static void ack_apic(unsigned int irq)
2027 ack_APIC_irq(); 2019 ack_APIC_irq();
2028} 2020}
2029 2021
2030static void mask_lapic_irq (unsigned int irq) 2022static void mask_lapic_irq(unsigned int irq)
2031{ 2023{
2032 unsigned long v; 2024 unsigned long v;
2033 2025
@@ -2035,7 +2027,7 @@ static void mask_lapic_irq (unsigned int irq)
2035 apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); 2027 apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED);
2036} 2028}
2037 2029
2038static void unmask_lapic_irq (unsigned int irq) 2030static void unmask_lapic_irq(unsigned int irq)
2039{ 2031{
2040 unsigned long v; 2032 unsigned long v;
2041 2033
@@ -2044,7 +2036,7 @@ static void unmask_lapic_irq (unsigned int irq)
2044} 2036}
2045 2037
2046static struct irq_chip lapic_chip __read_mostly = { 2038static struct irq_chip lapic_chip __read_mostly = {
2047 .name = "local-APIC-edge", 2039 .name = "local-APIC",
2048 .mask = mask_lapic_irq, 2040 .mask = mask_lapic_irq,
2049 .unmask = unmask_lapic_irq, 2041 .unmask = unmask_lapic_irq,
2050 .eoi = ack_apic, 2042 .eoi = ack_apic,
@@ -2053,14 +2045,14 @@ static struct irq_chip lapic_chip __read_mostly = {
2053static void __init setup_nmi(void) 2045static void __init setup_nmi(void)
2054{ 2046{
2055 /* 2047 /*
2056 * Dirty trick to enable the NMI watchdog ... 2048 * Dirty trick to enable the NMI watchdog ...
2057 * We put the 8259A master into AEOI mode and 2049 * We put the 8259A master into AEOI mode and
2058 * unmask on all local APICs LVT0 as NMI. 2050 * unmask on all local APICs LVT0 as NMI.
2059 * 2051 *
2060 * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire') 2052 * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire')
2061 * is from Maciej W. Rozycki - so we do not have to EOI from 2053 * is from Maciej W. Rozycki - so we do not have to EOI from
2062 * the NMI handler or the timer interrupt. 2054 * the NMI handler or the timer interrupt.
2063 */ 2055 */
2064 apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ..."); 2056 apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ...");
2065 2057
2066 enable_NMI_through_LVT0(); 2058 enable_NMI_through_LVT0();
@@ -2136,11 +2128,16 @@ static inline void __init unlock_ExtINT_logic(void)
2136static inline void __init check_timer(void) 2128static inline void __init check_timer(void)
2137{ 2129{
2138 int apic1, pin1, apic2, pin2; 2130 int apic1, pin1, apic2, pin2;
2131 int no_pin1 = 0;
2139 int vector; 2132 int vector;
2133 unsigned int ver;
2140 unsigned long flags; 2134 unsigned long flags;
2141 2135
2142 local_irq_save(flags); 2136 local_irq_save(flags);
2143 2137
2138 ver = apic_read(APIC_LVR);
2139 ver = GET_APIC_VERSION(ver);
2140
2144 /* 2141 /*
2145 * get/set the timer IRQ vector: 2142 * get/set the timer IRQ vector:
2146 */ 2143 */
@@ -2149,17 +2146,17 @@ static inline void __init check_timer(void)
2149 set_intr_gate(vector, interrupt[0]); 2146 set_intr_gate(vector, interrupt[0]);
2150 2147
2151 /* 2148 /*
2152 * Subtle, code in do_timer_interrupt() expects an AEOI 2149 * As IRQ0 is to be enabled in the 8259A, the virtual
2153 * mode for the 8259A whenever interrupts are routed 2150 * wire has to be disabled in the local APIC. Also
2154 * through I/O APICs. Also IRQ0 has to be enabled in 2151 * timer interrupts need to be acknowledged manually in
2155 * the 8259A which implies the virtual wire has to be 2152 * the 8259A for the i82489DX when using the NMI
2156 * disabled in the local APIC. 2153 * watchdog as that APIC treats NMIs as level-triggered.
2154 * The AEOI mode will finish them in the 8259A
2155 * automatically.
2157 */ 2156 */
2158 apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); 2157 apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
2159 init_8259A(1); 2158 init_8259A(1);
2160 timer_ack = 1; 2159 timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
2161 if (timer_over_8254 > 0)
2162 enable_8259A_irq(0);
2163 2160
2164 pin1 = find_isa_irq_pin(0, mp_INT); 2161 pin1 = find_isa_irq_pin(0, mp_INT);
2165 apic1 = find_isa_irq_apic(0, mp_INT); 2162 apic1 = find_isa_irq_apic(0, mp_INT);
@@ -2169,14 +2166,33 @@ static inline void __init check_timer(void)
2169 printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", 2166 printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
2170 vector, apic1, pin1, apic2, pin2); 2167 vector, apic1, pin1, apic2, pin2);
2171 2168
2169 /*
2170 * Some BIOS writers are clueless and report the ExtINTA
2171 * I/O APIC input from the cascaded 8259A as the timer
2172 * interrupt input. So just in case, if only one pin
2173 * was found above, try it both directly and through the
2174 * 8259A.
2175 */
2176 if (pin1 == -1) {
2177 pin1 = pin2;
2178 apic1 = apic2;
2179 no_pin1 = 1;
2180 } else if (pin2 == -1) {
2181 pin2 = pin1;
2182 apic2 = apic1;
2183 }
2184
2172 if (pin1 != -1) { 2185 if (pin1 != -1) {
2173 /* 2186 /*
2174 * Ok, does IRQ0 through the IOAPIC work? 2187 * Ok, does IRQ0 through the IOAPIC work?
2175 */ 2188 */
2189 if (no_pin1) {
2190 add_pin_to_irq(0, apic1, pin1);
2191 setup_timer_IRQ0_pin(apic1, pin1, vector);
2192 }
2176 unmask_IO_APIC_irq(0); 2193 unmask_IO_APIC_irq(0);
2177 if (timer_irq_works()) { 2194 if (timer_irq_works()) {
2178 if (nmi_watchdog == NMI_IO_APIC) { 2195 if (nmi_watchdog == NMI_IO_APIC) {
2179 disable_8259A_irq(0);
2180 setup_nmi(); 2196 setup_nmi();
2181 enable_8259A_irq(0); 2197 enable_8259A_irq(0);
2182 } 2198 }
@@ -2185,43 +2201,46 @@ static inline void __init check_timer(void)
2185 goto out; 2201 goto out;
2186 } 2202 }
2187 clear_IO_APIC_pin(apic1, pin1); 2203 clear_IO_APIC_pin(apic1, pin1);
2188 printk(KERN_ERR "..MP-BIOS bug: 8254 timer not connected to " 2204 if (!no_pin1)
2189 "IO-APIC\n"); 2205 printk(KERN_ERR "..MP-BIOS bug: "
2190 } 2206 "8254 timer not connected to IO-APIC\n");
2191 2207
2192 printk(KERN_INFO "...trying to set up timer (IRQ0) through the 8259A ... "); 2208 printk(KERN_INFO "...trying to set up timer (IRQ0) "
2193 if (pin2 != -1) { 2209 "through the 8259A ... ");
2194 printk("\n..... (found pin %d) ...", pin2); 2210 printk("\n..... (found pin %d) ...", pin2);
2195 /* 2211 /*
2196 * legacy devices should be connected to IO APIC #0 2212 * legacy devices should be connected to IO APIC #0
2197 */ 2213 */
2198 setup_ExtINT_IRQ0_pin(apic2, pin2, vector); 2214 replace_pin_at_irq(0, apic1, pin1, apic2, pin2);
2215 setup_timer_IRQ0_pin(apic2, pin2, vector);
2216 unmask_IO_APIC_irq(0);
2217 enable_8259A_irq(0);
2199 if (timer_irq_works()) { 2218 if (timer_irq_works()) {
2200 printk("works.\n"); 2219 printk("works.\n");
2201 if (pin1 != -1) 2220 timer_through_8259 = 1;
2202 replace_pin_at_irq(0, apic1, pin1, apic2, pin2);
2203 else
2204 add_pin_to_irq(0, apic2, pin2);
2205 if (nmi_watchdog == NMI_IO_APIC) { 2221 if (nmi_watchdog == NMI_IO_APIC) {
2222 disable_8259A_irq(0);
2206 setup_nmi(); 2223 setup_nmi();
2224 enable_8259A_irq(0);
2207 } 2225 }
2208 goto out; 2226 goto out;
2209 } 2227 }
2210 /* 2228 /*
2211 * Cleanup, just in case ... 2229 * Cleanup, just in case ...
2212 */ 2230 */
2231 disable_8259A_irq(0);
2213 clear_IO_APIC_pin(apic2, pin2); 2232 clear_IO_APIC_pin(apic2, pin2);
2233 printk(" failed.\n");
2214 } 2234 }
2215 printk(" failed.\n");
2216 2235
2217 if (nmi_watchdog == NMI_IO_APIC) { 2236 if (nmi_watchdog == NMI_IO_APIC) {
2218 printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n"); 2237 printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n");
2219 nmi_watchdog = 0; 2238 nmi_watchdog = NMI_NONE;
2220 } 2239 }
2240 timer_ack = 0;
2221 2241
2222 printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); 2242 printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
2223 2243
2224 disable_8259A_irq(0);
2225 set_irq_chip_and_handler_name(0, &lapic_chip, handle_fasteoi_irq, 2244 set_irq_chip_and_handler_name(0, &lapic_chip, handle_fasteoi_irq,
2226 "fasteoi"); 2245 "fasteoi");
2227 apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ 2246 apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
@@ -2231,12 +2250,12 @@ static inline void __init check_timer(void)
2231 printk(" works.\n"); 2250 printk(" works.\n");
2232 goto out; 2251 goto out;
2233 } 2252 }
2253 disable_8259A_irq(0);
2234 apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector); 2254 apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector);
2235 printk(" failed.\n"); 2255 printk(" failed.\n");
2236 2256
2237 printk(KERN_INFO "...trying to set up timer as ExtINT IRQ..."); 2257 printk(KERN_INFO "...trying to set up timer as ExtINT IRQ...");
2238 2258
2239 timer_ack = 0;
2240 init_8259A(0); 2259 init_8259A(0);
2241 make_8259A_irq(0); 2260 make_8259A_irq(0);
2242 apic_write_around(APIC_LVT0, APIC_DM_EXTINT); 2261 apic_write_around(APIC_LVT0, APIC_DM_EXTINT);
@@ -2268,7 +2287,7 @@ void __init setup_IO_APIC(void)
2268 int i; 2287 int i;
2269 2288
2270 /* Reserve all the system vectors. */ 2289 /* Reserve all the system vectors. */
2271 for (i = FIRST_SYSTEM_VECTOR; i < NR_VECTORS; i++) 2290 for (i = first_system_vector; i < NR_VECTORS; i++)
2272 set_bit(i, used_vectors); 2291 set_bit(i, used_vectors);
2273 2292
2274 enable_IO_APIC(); 2293 enable_IO_APIC();
@@ -2293,28 +2312,14 @@ void __init setup_IO_APIC(void)
2293 print_IO_APIC(); 2312 print_IO_APIC();
2294} 2313}
2295 2314
2296static int __init setup_disable_8254_timer(char *s)
2297{
2298 timer_over_8254 = -1;
2299 return 1;
2300}
2301static int __init setup_enable_8254_timer(char *s)
2302{
2303 timer_over_8254 = 2;
2304 return 1;
2305}
2306
2307__setup("disable_8254_timer", setup_disable_8254_timer);
2308__setup("enable_8254_timer", setup_enable_8254_timer);
2309
2310/* 2315/*
2311 * Called after all the initialization is done. If we didnt find any 2316 * Called after all the initialization is done. If we didnt find any
2312 * APIC bugs then we can allow the modify fast path 2317 * APIC bugs then we can allow the modify fast path
2313 */ 2318 */
2314 2319
2315static int __init io_apic_bug_finalize(void) 2320static int __init io_apic_bug_finalize(void)
2316{ 2321{
2317 if(sis_apic_bug == -1) 2322 if (sis_apic_bug == -1)
2318 sis_apic_bug = 0; 2323 sis_apic_bug = 0;
2319 return 0; 2324 return 0;
2320} 2325}
@@ -2325,17 +2330,17 @@ struct sysfs_ioapic_data {
2325 struct sys_device dev; 2330 struct sys_device dev;
2326 struct IO_APIC_route_entry entry[0]; 2331 struct IO_APIC_route_entry entry[0];
2327}; 2332};
2328static struct sysfs_ioapic_data * mp_ioapic_data[MAX_IO_APICS]; 2333static struct sysfs_ioapic_data *mp_ioapic_data[MAX_IO_APICS];
2329 2334
2330static int ioapic_suspend(struct sys_device *dev, pm_message_t state) 2335static int ioapic_suspend(struct sys_device *dev, pm_message_t state)
2331{ 2336{
2332 struct IO_APIC_route_entry *entry; 2337 struct IO_APIC_route_entry *entry;
2333 struct sysfs_ioapic_data *data; 2338 struct sysfs_ioapic_data *data;
2334 int i; 2339 int i;
2335 2340
2336 data = container_of(dev, struct sysfs_ioapic_data, dev); 2341 data = container_of(dev, struct sysfs_ioapic_data, dev);
2337 entry = data->entry; 2342 entry = data->entry;
2338 for (i = 0; i < nr_ioapic_registers[dev->id]; i ++) 2343 for (i = 0; i < nr_ioapic_registers[dev->id]; i++)
2339 entry[i] = ioapic_read_entry(dev->id, i); 2344 entry[i] = ioapic_read_entry(dev->id, i);
2340 2345
2341 return 0; 2346 return 0;
@@ -2348,7 +2353,7 @@ static int ioapic_resume(struct sys_device *dev)
2348 unsigned long flags; 2353 unsigned long flags;
2349 union IO_APIC_reg_00 reg_00; 2354 union IO_APIC_reg_00 reg_00;
2350 int i; 2355 int i;
2351 2356
2352 data = container_of(dev, struct sysfs_ioapic_data, dev); 2357 data = container_of(dev, struct sysfs_ioapic_data, dev);
2353 entry = data->entry; 2358 entry = data->entry;
2354 2359
@@ -2359,7 +2364,7 @@ static int ioapic_resume(struct sys_device *dev)
2359 io_apic_write(dev->id, 0, reg_00.raw); 2364 io_apic_write(dev->id, 0, reg_00.raw);
2360 } 2365 }
2361 spin_unlock_irqrestore(&ioapic_lock, flags); 2366 spin_unlock_irqrestore(&ioapic_lock, flags);
2362 for (i = 0; i < nr_ioapic_registers[dev->id]; i ++) 2367 for (i = 0; i < nr_ioapic_registers[dev->id]; i++)
2363 ioapic_write_entry(dev->id, i, entry[i]); 2368 ioapic_write_entry(dev->id, i, entry[i]);
2364 2369
2365 return 0; 2370 return 0;
@@ -2373,24 +2378,23 @@ static struct sysdev_class ioapic_sysdev_class = {
2373 2378
2374static int __init ioapic_init_sysfs(void) 2379static int __init ioapic_init_sysfs(void)
2375{ 2380{
2376 struct sys_device * dev; 2381 struct sys_device *dev;
2377 int i, size, error = 0; 2382 int i, size, error = 0;
2378 2383
2379 error = sysdev_class_register(&ioapic_sysdev_class); 2384 error = sysdev_class_register(&ioapic_sysdev_class);
2380 if (error) 2385 if (error)
2381 return error; 2386 return error;
2382 2387
2383 for (i = 0; i < nr_ioapics; i++ ) { 2388 for (i = 0; i < nr_ioapics; i++) {
2384 size = sizeof(struct sys_device) + nr_ioapic_registers[i] 2389 size = sizeof(struct sys_device) + nr_ioapic_registers[i]
2385 * sizeof(struct IO_APIC_route_entry); 2390 * sizeof(struct IO_APIC_route_entry);
2386 mp_ioapic_data[i] = kmalloc(size, GFP_KERNEL); 2391 mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL);
2387 if (!mp_ioapic_data[i]) { 2392 if (!mp_ioapic_data[i]) {
2388 printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); 2393 printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i);
2389 continue; 2394 continue;
2390 } 2395 }
2391 memset(mp_ioapic_data[i], 0, size);
2392 dev = &mp_ioapic_data[i]->dev; 2396 dev = &mp_ioapic_data[i]->dev;
2393 dev->id = i; 2397 dev->id = i;
2394 dev->cls = &ioapic_sysdev_class; 2398 dev->cls = &ioapic_sysdev_class;
2395 error = sysdev_register(dev); 2399 error = sysdev_register(dev);
2396 if (error) { 2400 if (error) {
@@ -2465,7 +2469,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
2465 msg->address_lo = 2469 msg->address_lo =
2466 MSI_ADDR_BASE_LO | 2470 MSI_ADDR_BASE_LO |
2467 ((INT_DEST_MODE == 0) ? 2471 ((INT_DEST_MODE == 0) ?
2468 MSI_ADDR_DEST_MODE_PHYSICAL: 2472MSI_ADDR_DEST_MODE_PHYSICAL:
2469 MSI_ADDR_DEST_MODE_LOGICAL) | 2473 MSI_ADDR_DEST_MODE_LOGICAL) |
2470 ((INT_DELIVERY_MODE != dest_LowestPrio) ? 2474 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
2471 MSI_ADDR_REDIRECTION_CPU: 2475 MSI_ADDR_REDIRECTION_CPU:
@@ -2476,7 +2480,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
2476 MSI_DATA_TRIGGER_EDGE | 2480 MSI_DATA_TRIGGER_EDGE |
2477 MSI_DATA_LEVEL_ASSERT | 2481 MSI_DATA_LEVEL_ASSERT |
2478 ((INT_DELIVERY_MODE != dest_LowestPrio) ? 2482 ((INT_DELIVERY_MODE != dest_LowestPrio) ?
2479 MSI_DATA_DELIVERY_FIXED: 2483MSI_DATA_DELIVERY_FIXED:
2480 MSI_DATA_DELIVERY_LOWPRI) | 2484 MSI_DATA_DELIVERY_LOWPRI) |
2481 MSI_DATA_VECTOR(vector); 2485 MSI_DATA_VECTOR(vector);
2482 } 2486 }
@@ -2647,12 +2651,12 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
2647#endif /* CONFIG_HT_IRQ */ 2651#endif /* CONFIG_HT_IRQ */
2648 2652
2649/* -------------------------------------------------------------------------- 2653/* --------------------------------------------------------------------------
2650 ACPI-based IOAPIC Configuration 2654 ACPI-based IOAPIC Configuration
2651 -------------------------------------------------------------------------- */ 2655 -------------------------------------------------------------------------- */
2652 2656
2653#ifdef CONFIG_ACPI 2657#ifdef CONFIG_ACPI
2654 2658
2655int __init io_apic_get_unique_id (int ioapic, int apic_id) 2659int __init io_apic_get_unique_id(int ioapic, int apic_id)
2656{ 2660{
2657 union IO_APIC_reg_00 reg_00; 2661 union IO_APIC_reg_00 reg_00;
2658 static physid_mask_t apic_id_map = PHYSID_MASK_NONE; 2662 static physid_mask_t apic_id_map = PHYSID_MASK_NONE;
@@ -2661,10 +2665,10 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id)
2661 int i = 0; 2665 int i = 0;
2662 2666
2663 /* 2667 /*
2664 * The P4 platform supports up to 256 APIC IDs on two separate APIC 2668 * The P4 platform supports up to 256 APIC IDs on two separate APIC
2665 * buses (one for LAPICs, one for IOAPICs), where predecessors only 2669 * buses (one for LAPICs, one for IOAPICs), where predecessors only
2666 * supports up to 16 on one shared APIC bus. 2670 * supports up to 16 on one shared APIC bus.
2667 * 2671 *
2668 * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full 2672 * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full
2669 * advantage of new APIC bus architecture. 2673 * advantage of new APIC bus architecture.
2670 */ 2674 */
@@ -2683,7 +2687,7 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id)
2683 } 2687 }
2684 2688
2685 /* 2689 /*
2686 * Every APIC in a system must have a unique ID or we get lots of nice 2690 * Every APIC in a system must have a unique ID or we get lots of nice
2687 * 'stuck on smp_invalidate_needed IPI wait' messages. 2691 * 'stuck on smp_invalidate_needed IPI wait' messages.
2688 */ 2692 */
2689 if (check_apicid_used(apic_id_map, apic_id)) { 2693 if (check_apicid_used(apic_id_map, apic_id)) {
@@ -2700,7 +2704,7 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id)
2700 "trying %d\n", ioapic, apic_id, i); 2704 "trying %d\n", ioapic, apic_id, i);
2701 2705
2702 apic_id = i; 2706 apic_id = i;
2703 } 2707 }
2704 2708
2705 tmp = apicid_to_cpu_present(apic_id); 2709 tmp = apicid_to_cpu_present(apic_id);
2706 physids_or(apic_id_map, apic_id_map, tmp); 2710 physids_or(apic_id_map, apic_id_map, tmp);
@@ -2727,7 +2731,7 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id)
2727} 2731}
2728 2732
2729 2733
2730int __init io_apic_get_version (int ioapic) 2734int __init io_apic_get_version(int ioapic)
2731{ 2735{
2732 union IO_APIC_reg_01 reg_01; 2736 union IO_APIC_reg_01 reg_01;
2733 unsigned long flags; 2737 unsigned long flags;
@@ -2740,7 +2744,7 @@ int __init io_apic_get_version (int ioapic)
2740} 2744}
2741 2745
2742 2746
2743int __init io_apic_get_redir_entries (int ioapic) 2747int __init io_apic_get_redir_entries(int ioapic)
2744{ 2748{
2745 union IO_APIC_reg_01 reg_01; 2749 union IO_APIC_reg_01 reg_01;
2746 unsigned long flags; 2750 unsigned long flags;
@@ -2753,7 +2757,7 @@ int __init io_apic_get_redir_entries (int ioapic)
2753} 2757}
2754 2758
2755 2759
2756int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low) 2760int io_apic_set_pci_routing(int ioapic, int pin, int irq, int edge_level, int active_high_low)
2757{ 2761{
2758 struct IO_APIC_route_entry entry; 2762 struct IO_APIC_route_entry entry;
2759 2763
@@ -2769,7 +2773,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
2769 * corresponding device driver registers for this IRQ. 2773 * corresponding device driver registers for this IRQ.
2770 */ 2774 */
2771 2775
2772 memset(&entry,0,sizeof(entry)); 2776 memset(&entry, 0, sizeof(entry));
2773 2777
2774 entry.delivery_mode = INT_DELIVERY_MODE; 2778 entry.delivery_mode = INT_DELIVERY_MODE;
2775 entry.dest_mode = INT_DEST_MODE; 2779 entry.dest_mode = INT_DEST_MODE;
diff --git a/arch/x86/kernel/io_apic_64.c b/arch/x86/kernel/io_apic_64.c
index 339cf6f926dc..2eba4f4c14ba 100644
--- a/arch/x86/kernel/io_apic_64.c
+++ b/arch/x86/kernel/io_apic_64.c
@@ -61,7 +61,7 @@ struct irq_cfg {
61}; 61};
62 62
63/* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ 63/* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */
64struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { 64static struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
65 [0] = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR, }, 65 [0] = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR, },
66 [1] = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR, }, 66 [1] = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR, },
67 [2] = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR, }, 67 [2] = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR, },
@@ -82,6 +82,10 @@ struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
82 82
83static int assign_irq_vector(int irq, cpumask_t mask); 83static int assign_irq_vector(int irq, cpumask_t mask);
84 84
85int first_system_vector = 0xfe;
86
87char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE};
88
85#define __apicdebuginit __init 89#define __apicdebuginit __init
86 90
87int sis_apic_bug; /* not actually supported, dummy for compile */ 91int sis_apic_bug; /* not actually supported, dummy for compile */
@@ -90,7 +94,7 @@ static int no_timer_check;
90 94
91static int disable_timer_pin_1 __initdata; 95static int disable_timer_pin_1 __initdata;
92 96
93int timer_over_8254 __initdata = 1; 97int timer_through_8259 __initdata;
94 98
95/* Where if anywhere is the i8259 connect in external int mode */ 99/* Where if anywhere is the i8259 connect in external int mode */
96static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; 100static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
@@ -185,7 +189,7 @@ static bool io_apic_level_ack_pending(unsigned int irq)
185 break; 189 break;
186 reg = io_apic_read(entry->apic, 0x10 + pin*2); 190 reg = io_apic_read(entry->apic, 0x10 + pin*2);
187 /* Is the remote IRR bit set? */ 191 /* Is the remote IRR bit set? */
188 if ((reg >> 14) & 1) { 192 if (reg & IO_APIC_REDIR_REMOTE_IRR) {
189 spin_unlock_irqrestore(&ioapic_lock, flags); 193 spin_unlock_irqrestore(&ioapic_lock, flags);
190 return true; 194 return true;
191 } 195 }
@@ -300,7 +304,7 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, u8 vector)
300 break; 304 break;
301 io_apic_write(apic, 0x11 + pin*2, dest); 305 io_apic_write(apic, 0x11 + pin*2, dest);
302 reg = io_apic_read(apic, 0x10 + pin*2); 306 reg = io_apic_read(apic, 0x10 + pin*2);
303 reg &= ~0x000000ff; 307 reg &= ~IO_APIC_REDIR_VECTOR_MASK;
304 reg |= vector; 308 reg |= vector;
305 io_apic_modify(apic, reg); 309 io_apic_modify(apic, reg);
306 if (!entry->next) 310 if (!entry->next)
@@ -362,16 +366,37 @@ static void add_pin_to_irq(unsigned int irq, int apic, int pin)
362 entry->pin = pin; 366 entry->pin = pin;
363} 367}
364 368
369/*
370 * Reroute an IRQ to a different pin.
371 */
372static void __init replace_pin_at_irq(unsigned int irq,
373 int oldapic, int oldpin,
374 int newapic, int newpin)
375{
376 struct irq_pin_list *entry = irq_2_pin + irq;
377
378 while (1) {
379 if (entry->apic == oldapic && entry->pin == oldpin) {
380 entry->apic = newapic;
381 entry->pin = newpin;
382 }
383 if (!entry->next)
384 break;
385 entry = irq_2_pin + entry->next;
386 }
387}
388
365 389
366#define DO_ACTION(name,R,ACTION, FINAL) \ 390#define DO_ACTION(name,R,ACTION, FINAL) \
367 \ 391 \
368 static void name##_IO_APIC_irq (unsigned int irq) \ 392 static void name##_IO_APIC_irq (unsigned int irq) \
369 __DO_ACTION(R, ACTION, FINAL) 393 __DO_ACTION(R, ACTION, FINAL)
370 394
371DO_ACTION( __mask, 0, |= 0x00010000, io_apic_sync(entry->apic) ) 395/* mask = 1 */
372 /* mask = 1 */ 396DO_ACTION(__mask, 0, |= IO_APIC_REDIR_MASKED, io_apic_sync(entry->apic))
373DO_ACTION( __unmask, 0, &= 0xfffeffff, ) 397
374 /* mask = 0 */ 398/* mask = 0 */
399DO_ACTION(__unmask, 0, &= ~IO_APIC_REDIR_MASKED, )
375 400
376static void mask_IO_APIC_irq (unsigned int irq) 401static void mask_IO_APIC_irq (unsigned int irq)
377{ 402{
@@ -432,20 +457,6 @@ static int __init disable_timer_pin_setup(char *arg)
432} 457}
433__setup("disable_timer_pin_1", disable_timer_pin_setup); 458__setup("disable_timer_pin_1", disable_timer_pin_setup);
434 459
435static int __init setup_disable_8254_timer(char *s)
436{
437 timer_over_8254 = -1;
438 return 1;
439}
440static int __init setup_enable_8254_timer(char *s)
441{
442 timer_over_8254 = 2;
443 return 1;
444}
445
446__setup("disable_8254_timer", setup_disable_8254_timer);
447__setup("enable_8254_timer", setup_enable_8254_timer);
448
449 460
450/* 461/*
451 * Find the IRQ entry number of a certain pin. 462 * Find the IRQ entry number of a certain pin.
@@ -732,7 +743,7 @@ static int __assign_irq_vector(int irq, cpumask_t mask)
732 offset = current_offset; 743 offset = current_offset;
733next: 744next:
734 vector += 8; 745 vector += 8;
735 if (vector >= FIRST_SYSTEM_VECTOR) { 746 if (vector >= first_system_vector) {
736 /* If we run out of vectors on large boxen, must share them. */ 747 /* If we run out of vectors on large boxen, must share them. */
737 offset = (offset + 1) % 8; 748 offset = (offset + 1) % 8;
738 vector = FIRST_DEVICE_VECTOR + offset; 749 vector = FIRST_DEVICE_VECTOR + offset;
@@ -913,26 +924,21 @@ static void __init setup_IO_APIC_irqs(void)
913} 924}
914 925
915/* 926/*
916 * Set up the 8259A-master output pin as broadcast to all 927 * Set up the timer pin, possibly with the 8259A-master behind.
917 * CPUs.
918 */ 928 */
919static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, int vector) 929static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
930 int vector)
920{ 931{
921 struct IO_APIC_route_entry entry; 932 struct IO_APIC_route_entry entry;
922 933
923 memset(&entry, 0, sizeof(entry)); 934 memset(&entry, 0, sizeof(entry));
924 935
925 disable_8259A_irq(0);
926
927 /* mask LVT0 */
928 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
929
930 /* 936 /*
931 * We use logical delivery to get the timer IRQ 937 * We use logical delivery to get the timer IRQ
932 * to the first CPU. 938 * to the first CPU.
933 */ 939 */
934 entry.dest_mode = INT_DEST_MODE; 940 entry.dest_mode = INT_DEST_MODE;
935 entry.mask = 0; /* unmask IRQ now */ 941 entry.mask = 1; /* mask IRQ now */
936 entry.dest = cpu_mask_to_apicid(TARGET_CPUS); 942 entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
937 entry.delivery_mode = INT_DELIVERY_MODE; 943 entry.delivery_mode = INT_DELIVERY_MODE;
938 entry.polarity = 0; 944 entry.polarity = 0;
@@ -941,7 +947,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
941 947
942 /* 948 /*
943 * The timer IRQ doesn't have to know that behind the 949 * The timer IRQ doesn't have to know that behind the
944 * scene we have a 8259A-master in AEOI mode ... 950 * scene we may have a 8259A-master in AEOI mode ...
945 */ 951 */
946 set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge"); 952 set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge");
947 953
@@ -949,8 +955,6 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
949 * Add it to the IO-APIC irq-routing table: 955 * Add it to the IO-APIC irq-routing table:
950 */ 956 */
951 ioapic_write_entry(apic, pin, entry); 957 ioapic_write_entry(apic, pin, entry);
952
953 enable_8259A_irq(0);
954} 958}
955 959
956void __apicdebuginit print_IO_APIC(void) 960void __apicdebuginit print_IO_APIC(void)
@@ -1079,6 +1083,7 @@ void __apicdebuginit print_local_APIC(void * dummy)
1079 1083
1080 printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", 1084 printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n",
1081 smp_processor_id(), hard_smp_processor_id()); 1085 smp_processor_id(), hard_smp_processor_id());
1086 v = apic_read(APIC_ID);
1082 printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, GET_APIC_ID(read_apic_id())); 1087 printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, GET_APIC_ID(read_apic_id()));
1083 v = apic_read(APIC_LVR); 1088 v = apic_read(APIC_LVR);
1084 printk(KERN_INFO "... APIC VERSION: %08x\n", v); 1089 printk(KERN_INFO "... APIC VERSION: %08x\n", v);
@@ -1661,6 +1666,7 @@ static inline void __init check_timer(void)
1661 struct irq_cfg *cfg = irq_cfg + 0; 1666 struct irq_cfg *cfg = irq_cfg + 0;
1662 int apic1, pin1, apic2, pin2; 1667 int apic1, pin1, apic2, pin2;
1663 unsigned long flags; 1668 unsigned long flags;
1669 int no_pin1 = 0;
1664 1670
1665 local_irq_save(flags); 1671 local_irq_save(flags);
1666 1672
@@ -1671,16 +1677,11 @@ static inline void __init check_timer(void)
1671 assign_irq_vector(0, TARGET_CPUS); 1677 assign_irq_vector(0, TARGET_CPUS);
1672 1678
1673 /* 1679 /*
1674 * Subtle, code in do_timer_interrupt() expects an AEOI 1680 * As IRQ0 is to be enabled in the 8259A, the virtual
1675 * mode for the 8259A whenever interrupts are routed 1681 * wire has to be disabled in the local APIC.
1676 * through I/O APICs. Also IRQ0 has to be enabled in
1677 * the 8259A which implies the virtual wire has to be
1678 * disabled in the local APIC.
1679 */ 1682 */
1680 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); 1683 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
1681 init_8259A(1); 1684 init_8259A(1);
1682 if (timer_over_8254 > 0)
1683 enable_8259A_irq(0);
1684 1685
1685 pin1 = find_isa_irq_pin(0, mp_INT); 1686 pin1 = find_isa_irq_pin(0, mp_INT);
1686 apic1 = find_isa_irq_apic(0, mp_INT); 1687 apic1 = find_isa_irq_apic(0, mp_INT);
@@ -1690,15 +1691,39 @@ static inline void __init check_timer(void)
1690 apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", 1691 apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
1691 cfg->vector, apic1, pin1, apic2, pin2); 1692 cfg->vector, apic1, pin1, apic2, pin2);
1692 1693
1694 /*
1695 * Some BIOS writers are clueless and report the ExtINTA
1696 * I/O APIC input from the cascaded 8259A as the timer
1697 * interrupt input. So just in case, if only one pin
1698 * was found above, try it both directly and through the
1699 * 8259A.
1700 */
1701 if (pin1 == -1) {
1702 pin1 = pin2;
1703 apic1 = apic2;
1704 no_pin1 = 1;
1705 } else if (pin2 == -1) {
1706 pin2 = pin1;
1707 apic2 = apic1;
1708 }
1709
1710 replace_pin_at_irq(0, 0, 0, apic1, pin1);
1711 apic1 = 0;
1712 pin1 = 0;
1713 setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);
1714
1693 if (pin1 != -1) { 1715 if (pin1 != -1) {
1694 /* 1716 /*
1695 * Ok, does IRQ0 through the IOAPIC work? 1717 * Ok, does IRQ0 through the IOAPIC work?
1696 */ 1718 */
1719 if (no_pin1) {
1720 add_pin_to_irq(0, apic1, pin1);
1721 setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);
1722 }
1697 unmask_IO_APIC_irq(0); 1723 unmask_IO_APIC_irq(0);
1698 if (!no_timer_check && timer_irq_works()) { 1724 if (!no_timer_check && timer_irq_works()) {
1699 nmi_watchdog_default(); 1725 nmi_watchdog_default();
1700 if (nmi_watchdog == NMI_IO_APIC) { 1726 if (nmi_watchdog == NMI_IO_APIC) {
1701 disable_8259A_irq(0);
1702 setup_nmi(); 1727 setup_nmi();
1703 enable_8259A_irq(0); 1728 enable_8259A_irq(0);
1704 } 1729 }
@@ -1707,42 +1732,48 @@ static inline void __init check_timer(void)
1707 goto out; 1732 goto out;
1708 } 1733 }
1709 clear_IO_APIC_pin(apic1, pin1); 1734 clear_IO_APIC_pin(apic1, pin1);
1710 apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not " 1735 if (!no_pin1)
1711 "connected to IO-APIC\n"); 1736 apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: "
1712 } 1737 "8254 timer not connected to IO-APIC\n");
1713 1738
1714 apic_printk(APIC_VERBOSE,KERN_INFO "...trying to set up timer (IRQ0) " 1739 apic_printk(APIC_VERBOSE,KERN_INFO
1715 "through the 8259A ... "); 1740 "...trying to set up timer (IRQ0) "
1716 if (pin2 != -1) { 1741 "through the 8259A ... ");
1717 apic_printk(APIC_VERBOSE,"\n..... (found apic %d pin %d) ...", 1742 apic_printk(APIC_VERBOSE,"\n..... (found apic %d pin %d) ...",
1718 apic2, pin2); 1743 apic2, pin2);
1719 /* 1744 /*
1720 * legacy devices should be connected to IO APIC #0 1745 * legacy devices should be connected to IO APIC #0
1721 */ 1746 */
1722 setup_ExtINT_IRQ0_pin(apic2, pin2, cfg->vector); 1747 replace_pin_at_irq(0, apic1, pin1, apic2, pin2);
1748 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
1749 unmask_IO_APIC_irq(0);
1750 enable_8259A_irq(0);
1723 if (timer_irq_works()) { 1751 if (timer_irq_works()) {
1724 apic_printk(APIC_VERBOSE," works.\n"); 1752 apic_printk(APIC_VERBOSE," works.\n");
1753 timer_through_8259 = 1;
1725 nmi_watchdog_default(); 1754 nmi_watchdog_default();
1726 if (nmi_watchdog == NMI_IO_APIC) { 1755 if (nmi_watchdog == NMI_IO_APIC) {
1756 disable_8259A_irq(0);
1727 setup_nmi(); 1757 setup_nmi();
1758 enable_8259A_irq(0);
1728 } 1759 }
1729 goto out; 1760 goto out;
1730 } 1761 }
1731 /* 1762 /*
1732 * Cleanup, just in case ... 1763 * Cleanup, just in case ...
1733 */ 1764 */
1765 disable_8259A_irq(0);
1734 clear_IO_APIC_pin(apic2, pin2); 1766 clear_IO_APIC_pin(apic2, pin2);
1767 apic_printk(APIC_VERBOSE," failed.\n");
1735 } 1768 }
1736 apic_printk(APIC_VERBOSE," failed.\n");
1737 1769
1738 if (nmi_watchdog == NMI_IO_APIC) { 1770 if (nmi_watchdog == NMI_IO_APIC) {
1739 printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n"); 1771 printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n");
1740 nmi_watchdog = 0; 1772 nmi_watchdog = NMI_NONE;
1741 } 1773 }
1742 1774
1743 apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); 1775 apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
1744 1776
1745 disable_8259A_irq(0);
1746 irq_desc[0].chip = &lapic_irq_type; 1777 irq_desc[0].chip = &lapic_irq_type;
1747 apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ 1778 apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */
1748 enable_8259A_irq(0); 1779 enable_8259A_irq(0);
@@ -1751,6 +1782,7 @@ static inline void __init check_timer(void)
1751 apic_printk(APIC_VERBOSE," works.\n"); 1782 apic_printk(APIC_VERBOSE," works.\n");
1752 goto out; 1783 goto out;
1753 } 1784 }
1785 disable_8259A_irq(0);
1754 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); 1786 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
1755 apic_printk(APIC_VERBOSE," failed.\n"); 1787 apic_printk(APIC_VERBOSE," failed.\n");
1756 1788
diff --git a/arch/x86/kernel/ipi.c b/arch/x86/kernel/ipi.c
index c0df7b89ca23..9d98cda39ad9 100644
--- a/arch/x86/kernel/ipi.c
+++ b/arch/x86/kernel/ipi.c
@@ -8,7 +8,6 @@
8#include <linux/kernel_stat.h> 8#include <linux/kernel_stat.h>
9#include <linux/mc146818rtc.h> 9#include <linux/mc146818rtc.h>
10#include <linux/cache.h> 10#include <linux/cache.h>
11#include <linux/interrupt.h>
12#include <linux/cpu.h> 11#include <linux/cpu.h>
13#include <linux/module.h> 12#include <linux/module.h>
14 13
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 147352df28b9..47a6f6f12478 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -48,6 +48,29 @@ void ack_bad_irq(unsigned int irq)
48#endif 48#endif
49} 49}
50 50
51#ifdef CONFIG_DEBUG_STACKOVERFLOW
52/* Debugging check for stack overflow: is there less than 1KB free? */
53static int check_stack_overflow(void)
54{
55 long sp;
56
57 __asm__ __volatile__("andl %%esp,%0" :
58 "=r" (sp) : "0" (THREAD_SIZE - 1));
59
60 return sp < (sizeof(struct thread_info) + STACK_WARN);
61}
62
63static void print_stack_overflow(void)
64{
65 printk(KERN_WARNING "low stack detected by irq handler\n");
66 dump_stack();
67}
68
69#else
70static inline int check_stack_overflow(void) { return 0; }
71static inline void print_stack_overflow(void) { }
72#endif
73
51#ifdef CONFIG_4KSTACKS 74#ifdef CONFIG_4KSTACKS
52/* 75/*
53 * per-CPU IRQ handling contexts (thread information and stack) 76 * per-CPU IRQ handling contexts (thread information and stack)
@@ -59,48 +82,29 @@ union irq_ctx {
59 82
60static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly; 83static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
61static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; 84static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
62#endif
63 85
64/* 86static char softirq_stack[NR_CPUS * THREAD_SIZE]
65 * do_IRQ handles all normal device IRQ's (the special 87 __attribute__((__section__(".bss.page_aligned")));
66 * SMP cross-CPU interrupts have their own specific
67 * handlers).
68 */
69unsigned int do_IRQ(struct pt_regs *regs)
70{
71 struct pt_regs *old_regs;
72 /* high bit used in ret_from_ code */
73 int irq = ~regs->orig_ax;
74 struct irq_desc *desc = irq_desc + irq;
75#ifdef CONFIG_4KSTACKS
76 union irq_ctx *curctx, *irqctx;
77 u32 *isp;
78#endif
79 88
80 if (unlikely((unsigned)irq >= NR_IRQS)) { 89static char hardirq_stack[NR_CPUS * THREAD_SIZE]
81 printk(KERN_EMERG "%s: cannot handle IRQ %d\n", 90 __attribute__((__section__(".bss.page_aligned")));
82 __func__, irq);
83 BUG();
84 }
85 91
86 old_regs = set_irq_regs(regs); 92static void call_on_stack(void *func, void *stack)
87 irq_enter(); 93{
88#ifdef CONFIG_DEBUG_STACKOVERFLOW 94 asm volatile("xchgl %%ebx,%%esp \n"
89 /* Debugging check for stack overflow: is there less than 1KB free? */ 95 "call *%%edi \n"
90 { 96 "movl %%ebx,%%esp \n"
91 long sp; 97 : "=b" (stack)
92 98 : "0" (stack),
93 __asm__ __volatile__("andl %%esp,%0" : 99 "D"(func)
94 "=r" (sp) : "0" (THREAD_SIZE - 1)); 100 : "memory", "cc", "edx", "ecx", "eax");
95 if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) { 101}
96 printk("do_IRQ: stack overflow: %ld\n",
97 sp - sizeof(struct thread_info));
98 dump_stack();
99 }
100 }
101#endif
102 102
103#ifdef CONFIG_4KSTACKS 103static inline int
104execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
105{
106 union irq_ctx *curctx, *irqctx;
107 u32 *isp, arg1, arg2;
104 108
105 curctx = (union irq_ctx *) current_thread_info(); 109 curctx = (union irq_ctx *) current_thread_info();
106 irqctx = hardirq_ctx[smp_processor_id()]; 110 irqctx = hardirq_ctx[smp_processor_id()];
@@ -111,52 +115,39 @@ unsigned int do_IRQ(struct pt_regs *regs)
111 * handler) we can't do that and just have to keep using the 115 * handler) we can't do that and just have to keep using the
112 * current stack (which is the irq stack already after all) 116 * current stack (which is the irq stack already after all)
113 */ 117 */
114 if (curctx != irqctx) { 118 if (unlikely(curctx == irqctx))
115 int arg1, arg2, bx; 119 return 0;
116
117 /* build the stack frame on the IRQ stack */
118 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
119 irqctx->tinfo.task = curctx->tinfo.task;
120 irqctx->tinfo.previous_esp = current_stack_pointer;
121 120
122 /* 121 /* build the stack frame on the IRQ stack */
123 * Copy the softirq bits in preempt_count so that the 122 isp = (u32 *) ((char*)irqctx + sizeof(*irqctx));
124 * softirq checks work in the hardirq context. 123 irqctx->tinfo.task = curctx->tinfo.task;
125 */ 124 irqctx->tinfo.previous_esp = current_stack_pointer;
126 irqctx->tinfo.preempt_count =
127 (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
128 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
129
130 asm volatile(
131 " xchgl %%ebx,%%esp \n"
132 " call *%%edi \n"
133 " movl %%ebx,%%esp \n"
134 : "=a" (arg1), "=d" (arg2), "=b" (bx)
135 : "0" (irq), "1" (desc), "2" (isp),
136 "D" (desc->handle_irq)
137 : "memory", "cc", "ecx"
138 );
139 } else
140#endif
141 desc->handle_irq(irq, desc);
142 125
143 irq_exit(); 126 /*
144 set_irq_regs(old_regs); 127 * Copy the softirq bits in preempt_count so that the
128 * softirq checks work in the hardirq context.
129 */
130 irqctx->tinfo.preempt_count =
131 (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
132 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
133
134 if (unlikely(overflow))
135 call_on_stack(print_stack_overflow, isp);
136
137 asm volatile("xchgl %%ebx,%%esp \n"
138 "call *%%edi \n"
139 "movl %%ebx,%%esp \n"
140 : "=a" (arg1), "=d" (arg2), "=b" (isp)
141 : "0" (irq), "1" (desc), "2" (isp),
142 "D" (desc->handle_irq)
143 : "memory", "cc", "ecx");
145 return 1; 144 return 1;
146} 145}
147 146
148#ifdef CONFIG_4KSTACKS
149
150static char softirq_stack[NR_CPUS * THREAD_SIZE]
151 __attribute__((__section__(".bss.page_aligned")));
152
153static char hardirq_stack[NR_CPUS * THREAD_SIZE]
154 __attribute__((__section__(".bss.page_aligned")));
155
156/* 147/*
157 * allocate per-cpu stacks for hardirq and for softirq processing 148 * allocate per-cpu stacks for hardirq and for softirq processing
158 */ 149 */
159void irq_ctx_init(int cpu) 150void __cpuinit irq_ctx_init(int cpu)
160{ 151{
161 union irq_ctx *irqctx; 152 union irq_ctx *irqctx;
162 153
@@ -164,25 +155,25 @@ void irq_ctx_init(int cpu)
164 return; 155 return;
165 156
166 irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE]; 157 irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
167 irqctx->tinfo.task = NULL; 158 irqctx->tinfo.task = NULL;
168 irqctx->tinfo.exec_domain = NULL; 159 irqctx->tinfo.exec_domain = NULL;
169 irqctx->tinfo.cpu = cpu; 160 irqctx->tinfo.cpu = cpu;
170 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; 161 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
171 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); 162 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
172 163
173 hardirq_ctx[cpu] = irqctx; 164 hardirq_ctx[cpu] = irqctx;
174 165
175 irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE]; 166 irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
176 irqctx->tinfo.task = NULL; 167 irqctx->tinfo.task = NULL;
177 irqctx->tinfo.exec_domain = NULL; 168 irqctx->tinfo.exec_domain = NULL;
178 irqctx->tinfo.cpu = cpu; 169 irqctx->tinfo.cpu = cpu;
179 irqctx->tinfo.preempt_count = 0; 170 irqctx->tinfo.preempt_count = 0;
180 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); 171 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
181 172
182 softirq_ctx[cpu] = irqctx; 173 softirq_ctx[cpu] = irqctx;
183 174
184 printk("CPU %u irqstacks, hard=%p soft=%p\n", 175 printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n",
185 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]); 176 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
186} 177}
187 178
188void irq_ctx_exit(int cpu) 179void irq_ctx_exit(int cpu)
@@ -211,25 +202,56 @@ asmlinkage void do_softirq(void)
211 /* build the stack frame on the softirq stack */ 202 /* build the stack frame on the softirq stack */
212 isp = (u32*) ((char*)irqctx + sizeof(*irqctx)); 203 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
213 204
214 asm volatile( 205 call_on_stack(__do_softirq, isp);
215 " xchgl %%ebx,%%esp \n"
216 " call __do_softirq \n"
217 " movl %%ebx,%%esp \n"
218 : "=b"(isp)
219 : "0"(isp)
220 : "memory", "cc", "edx", "ecx", "eax"
221 );
222 /* 206 /*
223 * Shouldnt happen, we returned above if in_interrupt(): 207 * Shouldnt happen, we returned above if in_interrupt():
224 */ 208 */
225 WARN_ON_ONCE(softirq_count()); 209 WARN_ON_ONCE(softirq_count());
226 } 210 }
227 211
228 local_irq_restore(flags); 212 local_irq_restore(flags);
229} 213}
214
215#else
216static inline int
217execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; }
230#endif 218#endif
231 219
232/* 220/*
221 * do_IRQ handles all normal device IRQ's (the special
222 * SMP cross-CPU interrupts have their own specific
223 * handlers).
224 */
225unsigned int do_IRQ(struct pt_regs *regs)
226{
227 struct pt_regs *old_regs;
228 /* high bit used in ret_from_ code */
229 int overflow, irq = ~regs->orig_ax;
230 struct irq_desc *desc = irq_desc + irq;
231
232 if (unlikely((unsigned)irq >= NR_IRQS)) {
233 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
234 __func__, irq);
235 BUG();
236 }
237
238 old_regs = set_irq_regs(regs);
239 irq_enter();
240
241 overflow = check_stack_overflow();
242
243 if (!execute_on_irq_stack(overflow, desc, irq)) {
244 if (unlikely(overflow))
245 print_stack_overflow();
246 desc->handle_irq(irq, desc);
247 }
248
249 irq_exit();
250 set_irq_regs(old_regs);
251 return 1;
252}
253
254/*
233 * Interrupt statistics: 255 * Interrupt statistics:
234 */ 256 */
235 257
@@ -313,16 +335,20 @@ skip:
313 per_cpu(irq_stat,j).irq_tlb_count); 335 per_cpu(irq_stat,j).irq_tlb_count);
314 seq_printf(p, " TLB shootdowns\n"); 336 seq_printf(p, " TLB shootdowns\n");
315#endif 337#endif
338#ifdef CONFIG_X86_MCE
316 seq_printf(p, "TRM: "); 339 seq_printf(p, "TRM: ");
317 for_each_online_cpu(j) 340 for_each_online_cpu(j)
318 seq_printf(p, "%10u ", 341 seq_printf(p, "%10u ",
319 per_cpu(irq_stat,j).irq_thermal_count); 342 per_cpu(irq_stat,j).irq_thermal_count);
320 seq_printf(p, " Thermal event interrupts\n"); 343 seq_printf(p, " Thermal event interrupts\n");
344#endif
345#ifdef CONFIG_X86_LOCAL_APIC
321 seq_printf(p, "SPU: "); 346 seq_printf(p, "SPU: ");
322 for_each_online_cpu(j) 347 for_each_online_cpu(j)
323 seq_printf(p, "%10u ", 348 seq_printf(p, "%10u ",
324 per_cpu(irq_stat,j).irq_spurious_count); 349 per_cpu(irq_stat,j).irq_spurious_count);
325 seq_printf(p, " Spurious interrupts\n"); 350 seq_printf(p, " Spurious interrupts\n");
351#endif
326 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); 352 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
327#if defined(CONFIG_X86_IO_APIC) 353#if defined(CONFIG_X86_IO_APIC)
328 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count)); 354 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
@@ -331,6 +357,40 @@ skip:
331 return 0; 357 return 0;
332} 358}
333 359
360/*
361 * /proc/stat helpers
362 */
363u64 arch_irq_stat_cpu(unsigned int cpu)
364{
365 u64 sum = nmi_count(cpu);
366
367#ifdef CONFIG_X86_LOCAL_APIC
368 sum += per_cpu(irq_stat, cpu).apic_timer_irqs;
369#endif
370#ifdef CONFIG_SMP
371 sum += per_cpu(irq_stat, cpu).irq_resched_count;
372 sum += per_cpu(irq_stat, cpu).irq_call_count;
373 sum += per_cpu(irq_stat, cpu).irq_tlb_count;
374#endif
375#ifdef CONFIG_X86_MCE
376 sum += per_cpu(irq_stat, cpu).irq_thermal_count;
377#endif
378#ifdef CONFIG_X86_LOCAL_APIC
379 sum += per_cpu(irq_stat, cpu).irq_spurious_count;
380#endif
381 return sum;
382}
383
384u64 arch_irq_stat(void)
385{
386 u64 sum = atomic_read(&irq_err_count);
387
388#ifdef CONFIG_X86_IO_APIC
389 sum += atomic_read(&irq_mis_count);
390#endif
391 return sum;
392}
393
334#ifdef CONFIG_HOTPLUG_CPU 394#ifdef CONFIG_HOTPLUG_CPU
335#include <mach_apic.h> 395#include <mach_apic.h>
336 396
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 3aac15466a91..1f78b238d8d2 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -135,6 +135,7 @@ skip:
135 seq_printf(p, "%10u ", cpu_pda(j)->irq_tlb_count); 135 seq_printf(p, "%10u ", cpu_pda(j)->irq_tlb_count);
136 seq_printf(p, " TLB shootdowns\n"); 136 seq_printf(p, " TLB shootdowns\n");
137#endif 137#endif
138#ifdef CONFIG_X86_MCE
138 seq_printf(p, "TRM: "); 139 seq_printf(p, "TRM: ");
139 for_each_online_cpu(j) 140 for_each_online_cpu(j)
140 seq_printf(p, "%10u ", cpu_pda(j)->irq_thermal_count); 141 seq_printf(p, "%10u ", cpu_pda(j)->irq_thermal_count);
@@ -143,6 +144,7 @@ skip:
143 for_each_online_cpu(j) 144 for_each_online_cpu(j)
144 seq_printf(p, "%10u ", cpu_pda(j)->irq_threshold_count); 145 seq_printf(p, "%10u ", cpu_pda(j)->irq_threshold_count);
145 seq_printf(p, " Threshold APIC interrupts\n"); 146 seq_printf(p, " Threshold APIC interrupts\n");
147#endif
146 seq_printf(p, "SPU: "); 148 seq_printf(p, "SPU: ");
147 for_each_online_cpu(j) 149 for_each_online_cpu(j)
148 seq_printf(p, "%10u ", cpu_pda(j)->irq_spurious_count); 150 seq_printf(p, "%10u ", cpu_pda(j)->irq_spurious_count);
@@ -153,6 +155,32 @@ skip:
153} 155}
154 156
155/* 157/*
158 * /proc/stat helpers
159 */
160u64 arch_irq_stat_cpu(unsigned int cpu)
161{
162 u64 sum = cpu_pda(cpu)->__nmi_count;
163
164 sum += cpu_pda(cpu)->apic_timer_irqs;
165#ifdef CONFIG_SMP
166 sum += cpu_pda(cpu)->irq_resched_count;
167 sum += cpu_pda(cpu)->irq_call_count;
168 sum += cpu_pda(cpu)->irq_tlb_count;
169#endif
170#ifdef CONFIG_X86_MCE
171 sum += cpu_pda(cpu)->irq_thermal_count;
172 sum += cpu_pda(cpu)->irq_threshold_count;
173#endif
174 sum += cpu_pda(cpu)->irq_spurious_count;
175 return sum;
176}
177
178u64 arch_irq_stat(void)
179{
180 return atomic_read(&irq_err_count);
181}
182
183/*
156 * do_IRQ handles all normal device IRQ's (the special 184 * do_IRQ handles all normal device IRQ's (the special
157 * SMP cross-CPU interrupts have their own specific 185 * SMP cross-CPU interrupts have their own specific
158 * handlers). 186 * handlers).
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
new file mode 100644
index 000000000000..d66914287ee1
--- /dev/null
+++ b/arch/x86/kernel/irqinit_32.c
@@ -0,0 +1,114 @@
1#include <linux/errno.h>
2#include <linux/signal.h>
3#include <linux/sched.h>
4#include <linux/ioport.h>
5#include <linux/interrupt.h>
6#include <linux/slab.h>
7#include <linux/random.h>
8#include <linux/init.h>
9#include <linux/kernel_stat.h>
10#include <linux/sysdev.h>
11#include <linux/bitops.h>
12
13#include <asm/atomic.h>
14#include <asm/system.h>
15#include <asm/io.h>
16#include <asm/timer.h>
17#include <asm/pgtable.h>
18#include <asm/delay.h>
19#include <asm/desc.h>
20#include <asm/apic.h>
21#include <asm/arch_hooks.h>
22#include <asm/i8259.h>
23
24
25
26/*
27 * Note that on a 486, we don't want to do a SIGFPE on an irq13
28 * as the irq is unreliable, and exception 16 works correctly
29 * (ie as explained in the intel literature). On a 386, you
30 * can't use exception 16 due to bad IBM design, so we have to
31 * rely on the less exact irq13.
32 *
33 * Careful.. Not only is IRQ13 unreliable, but it is also
34 * leads to races. IBM designers who came up with it should
35 * be shot.
36 */
37
38
39static irqreturn_t math_error_irq(int cpl, void *dev_id)
40{
41 extern void math_error(void __user *);
42 outb(0,0xF0);
43 if (ignore_fpu_irq || !boot_cpu_data.hard_math)
44 return IRQ_NONE;
45 math_error((void __user *)get_irq_regs()->ip);
46 return IRQ_HANDLED;
47}
48
49/*
50 * New motherboards sometimes make IRQ 13 be a PCI interrupt,
51 * so allow interrupt sharing.
52 */
53static struct irqaction fpu_irq = {
54 .handler = math_error_irq,
55 .mask = CPU_MASK_NONE,
56 .name = "fpu",
57};
58
59void __init init_ISA_irqs (void)
60{
61 int i;
62
63#ifdef CONFIG_X86_LOCAL_APIC
64 init_bsp_APIC();
65#endif
66 init_8259A(0);
67
68 /*
69 * 16 old-style INTA-cycle interrupts:
70 */
71 for (i = 0; i < 16; i++) {
72 set_irq_chip_and_handler_name(i, &i8259A_chip,
73 handle_level_irq, "XT");
74 }
75}
76
77/* Overridden in paravirt.c */
78void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
79
80void __init native_init_IRQ(void)
81{
82 int i;
83
84 /* all the set up before the call gates are initialised */
85 pre_intr_init_hook();
86
87 /*
88 * Cover the whole vector space, no vector can escape
89 * us. (some of these will be overridden and become
90 * 'special' SMP interrupts)
91 */
92 for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) {
93 int vector = FIRST_EXTERNAL_VECTOR + i;
94 if (i >= NR_IRQS)
95 break;
96 /* SYSCALL_VECTOR was reserved in trap_init. */
97 if (!test_bit(vector, used_vectors))
98 set_intr_gate(vector, interrupt[i]);
99 }
100
101 /* setup after call gates are initialised (usually add in
102 * the architecture specific gates)
103 */
104 intr_init_hook();
105
106 /*
107 * External FPU? Set up irq13 if so, for
108 * original braindamaged IBM FERR coupling.
109 */
110 if (boot_cpu_data.hard_math && !cpu_has_fpu)
111 setup_irq(FPU_IRQ, &fpu_irq);
112
113 irq_ctx_init(smp_processor_id());
114}
diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c
new file mode 100644
index 000000000000..31f49e8f46a7
--- /dev/null
+++ b/arch/x86/kernel/irqinit_64.c
@@ -0,0 +1,217 @@
1#include <linux/linkage.h>
2#include <linux/errno.h>
3#include <linux/signal.h>
4#include <linux/sched.h>
5#include <linux/ioport.h>
6#include <linux/interrupt.h>
7#include <linux/timex.h>
8#include <linux/slab.h>
9#include <linux/random.h>
10#include <linux/init.h>
11#include <linux/kernel_stat.h>
12#include <linux/sysdev.h>
13#include <linux/bitops.h>
14
15#include <asm/acpi.h>
16#include <asm/atomic.h>
17#include <asm/system.h>
18#include <asm/io.h>
19#include <asm/hw_irq.h>
20#include <asm/pgtable.h>
21#include <asm/delay.h>
22#include <asm/desc.h>
23#include <asm/apic.h>
24#include <asm/i8259.h>
25
26/*
27 * Common place to define all x86 IRQ vectors
28 *
29 * This builds up the IRQ handler stubs using some ugly macros in irq.h
30 *
31 * These macros create the low-level assembly IRQ routines that save
32 * register context and call do_IRQ(). do_IRQ() then does all the
33 * operations that are needed to keep the AT (or SMP IOAPIC)
34 * interrupt-controller happy.
35 */
36
37#define IRQ_NAME2(nr) nr##_interrupt(void)
38#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
39
40/*
41 * SMP has a few special interrupts for IPI messages
42 */
43
44#define BUILD_IRQ(nr) \
45 asmlinkage void IRQ_NAME(nr); \
46 asm("\n.p2align\n" \
47 "IRQ" #nr "_interrupt:\n\t" \
48 "push $~(" #nr ") ; " \
49 "jmp common_interrupt");
50
51#define BI(x,y) \
52 BUILD_IRQ(x##y)
53
54#define BUILD_16_IRQS(x) \
55 BI(x,0) BI(x,1) BI(x,2) BI(x,3) \
56 BI(x,4) BI(x,5) BI(x,6) BI(x,7) \
57 BI(x,8) BI(x,9) BI(x,a) BI(x,b) \
58 BI(x,c) BI(x,d) BI(x,e) BI(x,f)
59
60/*
61 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
62 * (these are usually mapped to vectors 0x30-0x3f)
63 */
64
65/*
66 * The IO-APIC gives us many more interrupt sources. Most of these
67 * are unused but an SMP system is supposed to have enough memory ...
68 * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
69 * across the spectrum, so we really want to be prepared to get all
70 * of these. Plus, more powerful systems might have more than 64
71 * IO-APIC registers.
72 *
73 * (these are usually mapped into the 0x30-0xff vector range)
74 */
75 BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3)
76BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7)
77BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb)
78BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf)
79
80#undef BUILD_16_IRQS
81#undef BI
82
83
84#define IRQ(x,y) \
85 IRQ##x##y##_interrupt
86
87#define IRQLIST_16(x) \
88 IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \
89 IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \
90 IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
91 IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
92
93/* for the irq vectors */
94static void (*__initdata interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = {
95 IRQLIST_16(0x2), IRQLIST_16(0x3),
96 IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7),
97 IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb),
98 IRQLIST_16(0xc), IRQLIST_16(0xd), IRQLIST_16(0xe), IRQLIST_16(0xf)
99};
100
101#undef IRQ
102#undef IRQLIST_16
103
104
105
106
107/*
108 * IRQ2 is cascade interrupt to second interrupt controller
109 */
110
111static struct irqaction irq2 = {
112 .handler = no_action,
113 .mask = CPU_MASK_NONE,
114 .name = "cascade",
115};
116DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
117 [0 ... IRQ0_VECTOR - 1] = -1,
118 [IRQ0_VECTOR] = 0,
119 [IRQ1_VECTOR] = 1,
120 [IRQ2_VECTOR] = 2,
121 [IRQ3_VECTOR] = 3,
122 [IRQ4_VECTOR] = 4,
123 [IRQ5_VECTOR] = 5,
124 [IRQ6_VECTOR] = 6,
125 [IRQ7_VECTOR] = 7,
126 [IRQ8_VECTOR] = 8,
127 [IRQ9_VECTOR] = 9,
128 [IRQ10_VECTOR] = 10,
129 [IRQ11_VECTOR] = 11,
130 [IRQ12_VECTOR] = 12,
131 [IRQ13_VECTOR] = 13,
132 [IRQ14_VECTOR] = 14,
133 [IRQ15_VECTOR] = 15,
134 [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
135};
136
137static void __init init_ISA_irqs (void)
138{
139 int i;
140
141 init_bsp_APIC();
142 init_8259A(0);
143
144 for (i = 0; i < NR_IRQS; i++) {
145 irq_desc[i].status = IRQ_DISABLED;
146 irq_desc[i].action = NULL;
147 irq_desc[i].depth = 1;
148
149 if (i < 16) {
150 /*
151 * 16 old-style INTA-cycle interrupts:
152 */
153 set_irq_chip_and_handler_name(i, &i8259A_chip,
154 handle_level_irq, "XT");
155 } else {
156 /*
157 * 'high' PCI IRQs filled in on demand
158 */
159 irq_desc[i].chip = &no_irq_chip;
160 }
161 }
162}
163
164void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
165
166void __init native_init_IRQ(void)
167{
168 int i;
169
170 init_ISA_irqs();
171 /*
172 * Cover the whole vector space, no vector can escape
173 * us. (some of these will be overridden and become
174 * 'special' SMP interrupts)
175 */
176 for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) {
177 int vector = FIRST_EXTERNAL_VECTOR + i;
178 if (vector != IA32_SYSCALL_VECTOR)
179 set_intr_gate(vector, interrupt[i]);
180 }
181
182#ifdef CONFIG_SMP
183 /*
184 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
185 * IPI, driven by wakeup.
186 */
187 alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
188
189 /* IPIs for invalidation */
190 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0);
191 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1);
192 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2);
193 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3);
194 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4);
195 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5);
196 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6);
197 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7);
198
199 /* IPI for generic function call */
200 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
201
202 /* Low priority IPI to cleanup after moving an irq */
203 set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
204#endif
205 alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
206 alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
207
208 /* self generated IPI for local APIC timer */
209 alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
210
211 /* IPI vectors for APIC spurious and error interrupts */
212 alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
213 alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
214
215 if (!acpi_ioapic)
216 setup_irq(2, &irq2);
217}
diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c
index 0224c3637c73..21f2bae98c15 100644
--- a/arch/x86/kernel/ldt.c
+++ b/arch/x86/kernel/ldt.c
@@ -20,9 +20,9 @@
20#include <asm/mmu_context.h> 20#include <asm/mmu_context.h>
21 21
22#ifdef CONFIG_SMP 22#ifdef CONFIG_SMP
23static void flush_ldt(void *null) 23static void flush_ldt(void *current_mm)
24{ 24{
25 if (current->active_mm) 25 if (current->active_mm == current_mm)
26 load_LDT(&current->active_mm->context); 26 load_LDT(&current->active_mm->context);
27} 27}
28#endif 28#endif
@@ -68,7 +68,7 @@ static int alloc_ldt(mm_context_t *pc, int mincount, int reload)
68 load_LDT(pc); 68 load_LDT(pc);
69 mask = cpumask_of_cpu(smp_processor_id()); 69 mask = cpumask_of_cpu(smp_processor_id());
70 if (!cpus_equal(current->mm->cpu_vm_mask, mask)) 70 if (!cpus_equal(current->mm->cpu_vm_mask, mask))
71 smp_call_function(flush_ldt, NULL, 1, 1); 71 smp_call_function(flush_ldt, current->mm, 1, 1);
72 preempt_enable(); 72 preempt_enable();
73#else 73#else
74 load_LDT(pc); 74 load_LDT(pc);
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index d0b234c9fc31..f4960171bc66 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -39,7 +39,7 @@ static void set_idt(void *newidt, __u16 limit)
39 curidt.address = (unsigned long)newidt; 39 curidt.address = (unsigned long)newidt;
40 40
41 load_idt(&curidt); 41 load_idt(&curidt);
42}; 42}
43 43
44 44
45static void set_gdt(void *newgdt, __u16 limit) 45static void set_gdt(void *newgdt, __u16 limit)
@@ -51,7 +51,7 @@ static void set_gdt(void *newgdt, __u16 limit)
51 curgdt.address = (unsigned long)newgdt; 51 curgdt.address = (unsigned long)newgdt;
52 52
53 load_gdt(&curgdt); 53 load_gdt(&curgdt);
54}; 54}
55 55
56static void load_segments(void) 56static void load_segments(void)
57{ 57{
diff --git a/arch/x86/kernel/microcode.c b/arch/x86/kernel/microcode.c
index 69729e38b78a..9758fea87c5b 100644
--- a/arch/x86/kernel/microcode.c
+++ b/arch/x86/kernel/microcode.c
@@ -5,13 +5,14 @@
5 * 2006 Shaohua Li <shaohua.li@intel.com> 5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 * 6 *
7 * This driver allows to upgrade microcode on Intel processors 7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II, 8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc. 9 * Pentium III, Xeon, Pentium 4, etc.
10 * 10 *
11 * Reference: Section 8.10 of Volume III, Intel Pentium 4 Manual, 11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Order Number 245472 or free download from: 12 * Software Developer's Manual
13 * 13 * Order Number 253668 or free download from:
14 * http://developer.intel.com/design/pentium4/manuals/245472.htm 14 *
15 * http://developer.intel.com/design/pentium4/manuals/253668.htm
15 * 16 *
16 * For more information, go to http://www.urbanmyth.org/microcode 17 * For more information, go to http://www.urbanmyth.org/microcode
17 * 18 *
@@ -58,12 +59,12 @@
58 * nature of implementation. 59 * nature of implementation.
59 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> 60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
60 * Fix the panic when writing zero-length microcode chunk. 61 * Fix the panic when writing zero-length microcode chunk.
61 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, 62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
62 * Jun Nakajima <jun.nakajima@intel.com> 63 * Jun Nakajima <jun.nakajima@intel.com>
63 * Support for the microcode updates in the new format. 64 * Support for the microcode updates in the new format.
64 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> 65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
65 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl 66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
66 * because we no longer hold a copy of applied microcode 67 * because we no longer hold a copy of applied microcode
67 * in kernel memory. 68 * in kernel memory.
68 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> 69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
69 * Fix sigmatch() macro to handle old CPUs with pf == 0. 70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
@@ -320,11 +321,11 @@ static void apply_microcode(int cpu)
320 return; 321 return;
321 322
322 /* serialize access to the physical write to MSR 0x79 */ 323 /* serialize access to the physical write to MSR 0x79 */
323 spin_lock_irqsave(&microcode_update_lock, flags); 324 spin_lock_irqsave(&microcode_update_lock, flags);
324 325
325 /* write microcode via MSR 0x79 */ 326 /* write microcode via MSR 0x79 */
326 wrmsr(MSR_IA32_UCODE_WRITE, 327 wrmsr(MSR_IA32_UCODE_WRITE,
327 (unsigned long) uci->mc->bits, 328 (unsigned long) uci->mc->bits,
328 (unsigned long) uci->mc->bits >> 16 >> 16); 329 (unsigned long) uci->mc->bits >> 16 >> 16);
329 wrmsr(MSR_IA32_UCODE_REV, 0, 0); 330 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
330 331
@@ -341,7 +342,7 @@ static void apply_microcode(int cpu)
341 return; 342 return;
342 } 343 }
343 printk(KERN_INFO "microcode: CPU%d updated from revision " 344 printk(KERN_INFO "microcode: CPU%d updated from revision "
344 "0x%x to 0x%x, date = %08x \n", 345 "0x%x to 0x%x, date = %08x \n",
345 cpu_num, uci->rev, val[1], uci->mc->hdr.date); 346 cpu_num, uci->rev, val[1], uci->mc->hdr.date);
346 uci->rev = val[1]; 347 uci->rev = val[1];
347} 348}
@@ -534,7 +535,7 @@ static int cpu_request_microcode(int cpu)
534 c->x86, c->x86_model, c->x86_mask); 535 c->x86, c->x86_model, c->x86_mask);
535 error = request_firmware(&firmware, name, &microcode_pdev->dev); 536 error = request_firmware(&firmware, name, &microcode_pdev->dev);
536 if (error) { 537 if (error) {
537 pr_debug("microcode: ucode data file %s load failed\n", name); 538 pr_debug("microcode: data file %s load failed\n", name);
538 return error; 539 return error;
539 } 540 }
540 buf = firmware->data; 541 buf = firmware->data;
@@ -805,6 +806,9 @@ static int __init microcode_init (void)
805{ 806{
806 int error; 807 int error;
807 808
809 printk(KERN_INFO
810 "IA-32 Microcode Update Driver: v" MICROCODE_VERSION " <tigran@aivazian.fsnet.co.uk>\n");
811
808 error = microcode_dev_init(); 812 error = microcode_dev_init();
809 if (error) 813 if (error)
810 return error; 814 return error;
@@ -825,9 +829,6 @@ static int __init microcode_init (void)
825 } 829 }
826 830
827 register_hotcpu_notifier(&mc_cpu_notifier); 831 register_hotcpu_notifier(&mc_cpu_notifier);
828
829 printk(KERN_INFO
830 "IA-32 Microcode Update Driver: v" MICROCODE_VERSION " <tigran@aivazian.fsnet.co.uk>\n");
831 return 0; 832 return 0;
832} 833}
833 834
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c
index edc5fbfe85c0..fdfdc550b366 100644
--- a/arch/x86/kernel/mmconf-fam10h_64.c
+++ b/arch/x86/kernel/mmconf-fam10h_64.c
@@ -12,6 +12,7 @@
12#include <asm/io.h> 12#include <asm/io.h>
13#include <asm/msr.h> 13#include <asm/msr.h>
14#include <asm/acpi.h> 14#include <asm/acpi.h>
15#include <asm/mmconfig.h>
15 16
16#include "../pci/pci.h" 17#include "../pci/pci.h"
17 18
diff --git a/arch/x86/kernel/nmi_32.c b/arch/x86/kernel/nmi_32.c
index 84160f74eeb0..6580dae46277 100644
--- a/arch/x86/kernel/nmi_32.c
+++ b/arch/x86/kernel/nmi_32.c
@@ -24,8 +24,11 @@
24#include <linux/kdebug.h> 24#include <linux/kdebug.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26 26
27#include <asm/i8259.h>
28#include <asm/io_apic.h>
27#include <asm/smp.h> 29#include <asm/smp.h>
28#include <asm/nmi.h> 30#include <asm/nmi.h>
31#include <asm/timer.h>
29 32
30#include "mach_traps.h" 33#include "mach_traps.h"
31 34
@@ -81,7 +84,7 @@ int __init check_nmi_watchdog(void)
81 84
82 prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL); 85 prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
83 if (!prev_nmi_count) 86 if (!prev_nmi_count)
84 return -1; 87 goto error;
85 88
86 printk(KERN_INFO "Testing NMI watchdog ... "); 89 printk(KERN_INFO "Testing NMI watchdog ... ");
87 90
@@ -118,7 +121,7 @@ int __init check_nmi_watchdog(void)
118 if (!atomic_read(&nmi_active)) { 121 if (!atomic_read(&nmi_active)) {
119 kfree(prev_nmi_count); 122 kfree(prev_nmi_count);
120 atomic_set(&nmi_active, -1); 123 atomic_set(&nmi_active, -1);
121 return -1; 124 goto error;
122 } 125 }
123 printk("OK.\n"); 126 printk("OK.\n");
124 127
@@ -129,6 +132,12 @@ int __init check_nmi_watchdog(void)
129 132
130 kfree(prev_nmi_count); 133 kfree(prev_nmi_count);
131 return 0; 134 return 0;
135error:
136 if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
137 disable_8259A_irq(0);
138 timer_ack = 0;
139
140 return -1;
132} 141}
133 142
134static int __init setup_nmi_watchdog(char *str) 143static int __init setup_nmi_watchdog(char *str)
diff --git a/arch/x86/kernel/nmi_64.c b/arch/x86/kernel/nmi_64.c
index 5a29ded994fa..0060e44e8989 100644
--- a/arch/x86/kernel/nmi_64.c
+++ b/arch/x86/kernel/nmi_64.c
@@ -21,6 +21,8 @@
21#include <linux/cpumask.h> 21#include <linux/cpumask.h>
22#include <linux/kdebug.h> 22#include <linux/kdebug.h>
23 23
24#include <asm/i8259.h>
25#include <asm/io_apic.h>
24#include <asm/smp.h> 26#include <asm/smp.h>
25#include <asm/nmi.h> 27#include <asm/nmi.h>
26#include <asm/proto.h> 28#include <asm/proto.h>
@@ -90,7 +92,7 @@ int __init check_nmi_watchdog(void)
90 92
91 prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL); 93 prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
92 if (!prev_nmi_count) 94 if (!prev_nmi_count)
93 return -1; 95 goto error;
94 96
95 printk(KERN_INFO "Testing NMI watchdog ... "); 97 printk(KERN_INFO "Testing NMI watchdog ... ");
96 98
@@ -121,7 +123,7 @@ int __init check_nmi_watchdog(void)
121 if (!atomic_read(&nmi_active)) { 123 if (!atomic_read(&nmi_active)) {
122 kfree(prev_nmi_count); 124 kfree(prev_nmi_count);
123 atomic_set(&nmi_active, -1); 125 atomic_set(&nmi_active, -1);
124 return -1; 126 goto error;
125 } 127 }
126 printk("OK.\n"); 128 printk("OK.\n");
127 129
@@ -132,6 +134,11 @@ int __init check_nmi_watchdog(void)
132 134
133 kfree(prev_nmi_count); 135 kfree(prev_nmi_count);
134 return 0; 136 return 0;
137error:
138 if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
139 disable_8259A_irq(0);
140
141 return -1;
135} 142}
136 143
137static int __init setup_nmi_watchdog(char *str) 144static int __init setup_nmi_watchdog(char *str)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 74f0c5ea2a03..f1ab0f727007 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -380,6 +380,9 @@ struct pv_mmu_ops pv_mmu_ops = {
380 .pte_update = paravirt_nop, 380 .pte_update = paravirt_nop,
381 .pte_update_defer = paravirt_nop, 381 .pte_update_defer = paravirt_nop,
382 382
383 .ptep_modify_prot_start = __ptep_modify_prot_start,
384 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
385
383#ifdef CONFIG_HIGHPTE 386#ifdef CONFIG_HIGHPTE
384 .kmap_atomic_pte = kmap_atomic, 387 .kmap_atomic_pte = kmap_atomic,
385#endif 388#endif
@@ -403,6 +406,7 @@ struct pv_mmu_ops pv_mmu_ops = {
403#endif /* PAGETABLE_LEVELS >= 3 */ 406#endif /* PAGETABLE_LEVELS >= 3 */
404 407
405 .pte_val = native_pte_val, 408 .pte_val = native_pte_val,
409 .pte_flags = native_pte_val,
406 .pgd_val = native_pgd_val, 410 .pgd_val = native_pgd_val,
407 411
408 .make_pte = native_make_pte, 412 .make_pte = native_make_pte,
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index dc00a1331ace..cb0bdf440715 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -7,6 +7,7 @@
7#include <asm/dma.h> 7#include <asm/dma.h>
8#include <asm/gart.h> 8#include <asm/gart.h>
9#include <asm/calgary.h> 9#include <asm/calgary.h>
10#include <asm/amd_iommu.h>
10 11
11int forbid_dac __read_mostly; 12int forbid_dac __read_mostly;
12EXPORT_SYMBOL(forbid_dac); 13EXPORT_SYMBOL(forbid_dac);
@@ -77,10 +78,14 @@ void __init dma32_reserve_bootmem(void)
77 if (end_pfn <= MAX_DMA32_PFN) 78 if (end_pfn <= MAX_DMA32_PFN)
78 return; 79 return;
79 80
81 /*
82 * check aperture_64.c allocate_aperture() for reason about
83 * using 512M as goal
84 */
80 align = 64ULL<<20; 85 align = 64ULL<<20;
81 size = round_up(dma32_bootmem_size, align); 86 size = round_up(dma32_bootmem_size, align);
82 dma32_bootmem_ptr = __alloc_bootmem_nopanic(size, align, 87 dma32_bootmem_ptr = __alloc_bootmem_nopanic(size, align,
83 __pa(MAX_DMA_ADDRESS)); 88 512ULL<<20);
84 if (dma32_bootmem_ptr) 89 if (dma32_bootmem_ptr)
85 dma32_bootmem_size = size; 90 dma32_bootmem_size = size;
86 else 91 else
@@ -88,7 +93,6 @@ void __init dma32_reserve_bootmem(void)
88} 93}
89static void __init dma32_free_bootmem(void) 94static void __init dma32_free_bootmem(void)
90{ 95{
91 int node;
92 96
93 if (end_pfn <= MAX_DMA32_PFN) 97 if (end_pfn <= MAX_DMA32_PFN)
94 return; 98 return;
@@ -96,9 +100,7 @@ static void __init dma32_free_bootmem(void)
96 if (!dma32_bootmem_ptr) 100 if (!dma32_bootmem_ptr)
97 return; 101 return;
98 102
99 for_each_online_node(node) 103 free_bootmem(__pa(dma32_bootmem_ptr), dma32_bootmem_size);
100 free_bootmem_node(NODE_DATA(node), __pa(dma32_bootmem_ptr),
101 dma32_bootmem_size);
102 104
103 dma32_bootmem_ptr = NULL; 105 dma32_bootmem_ptr = NULL;
104 dma32_bootmem_size = 0; 106 dma32_bootmem_size = 0;
@@ -122,6 +124,8 @@ void __init pci_iommu_alloc(void)
122 124
123 detect_intel_iommu(); 125 detect_intel_iommu();
124 126
127 amd_iommu_detect();
128
125#ifdef CONFIG_SWIOTLB 129#ifdef CONFIG_SWIOTLB
126 pci_swiotlb_init(); 130 pci_swiotlb_init();
127#endif 131#endif
@@ -357,7 +361,7 @@ int dma_supported(struct device *dev, u64 mask)
357EXPORT_SYMBOL(dma_supported); 361EXPORT_SYMBOL(dma_supported);
358 362
359/* Allocate DMA memory on node near device */ 363/* Allocate DMA memory on node near device */
360noinline struct page * 364static noinline struct page *
361dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order) 365dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
362{ 366{
363 int node; 367 int node;
@@ -502,6 +506,8 @@ static int __init pci_iommu_init(void)
502 506
503 intel_iommu_init(); 507 intel_iommu_init();
504 508
509 amd_iommu_init();
510
505#ifdef CONFIG_GART_IOMMU 511#ifdef CONFIG_GART_IOMMU
506 gart_iommu_init(); 512 gart_iommu_init();
507#endif 513#endif
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index aa8ec928caa8..021f3c684a62 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -104,7 +104,6 @@ static unsigned long alloc_iommu(struct device *dev, int size)
104 size, base_index, boundary_size, 0); 104 size, base_index, boundary_size, 0);
105 } 105 }
106 if (offset != -1) { 106 if (offset != -1) {
107 set_bit_string(iommu_gart_bitmap, offset, size);
108 next_bit = offset+size; 107 next_bit = offset+size;
109 if (next_bit >= iommu_pages) { 108 if (next_bit >= iommu_pages) {
110 next_bit = 0; 109 next_bit = 0;
@@ -534,8 +533,8 @@ static __init unsigned read_aperture(struct pci_dev *dev, u32 *size)
534 unsigned aper_size = 0, aper_base_32, aper_order; 533 unsigned aper_size = 0, aper_base_32, aper_order;
535 u64 aper_base; 534 u64 aper_base;
536 535
537 pci_read_config_dword(dev, 0x94, &aper_base_32); 536 pci_read_config_dword(dev, AMD64_GARTAPERTUREBASE, &aper_base_32);
538 pci_read_config_dword(dev, 0x90, &aper_order); 537 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &aper_order);
539 aper_order = (aper_order >> 1) & 7; 538 aper_order = (aper_order >> 1) & 7;
540 539
541 aper_base = aper_base_32 & 0x7fff; 540 aper_base = aper_base_32 & 0x7fff;
@@ -549,14 +548,63 @@ static __init unsigned read_aperture(struct pci_dev *dev, u32 *size)
549 return aper_base; 548 return aper_base;
550} 549}
551 550
551static void enable_gart_translations(void)
552{
553 int i;
554
555 for (i = 0; i < num_k8_northbridges; i++) {
556 struct pci_dev *dev = k8_northbridges[i];
557
558 enable_gart_translation(dev, __pa(agp_gatt_table));
559 }
560}
561
562/*
563 * If fix_up_north_bridges is set, the north bridges have to be fixed up on
564 * resume in the same way as they are handled in gart_iommu_hole_init().
565 */
566static bool fix_up_north_bridges;
567static u32 aperture_order;
568static u32 aperture_alloc;
569
570void set_up_gart_resume(u32 aper_order, u32 aper_alloc)
571{
572 fix_up_north_bridges = true;
573 aperture_order = aper_order;
574 aperture_alloc = aper_alloc;
575}
576
552static int gart_resume(struct sys_device *dev) 577static int gart_resume(struct sys_device *dev)
553{ 578{
579 printk(KERN_INFO "PCI-DMA: Resuming GART IOMMU\n");
580
581 if (fix_up_north_bridges) {
582 int i;
583
584 printk(KERN_INFO "PCI-DMA: Restoring GART aperture settings\n");
585
586 for (i = 0; i < num_k8_northbridges; i++) {
587 struct pci_dev *dev = k8_northbridges[i];
588
589 /*
590 * Don't enable translations just yet. That is the next
591 * step. Restore the pre-suspend aperture settings.
592 */
593 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL,
594 aperture_order << 1);
595 pci_write_config_dword(dev, AMD64_GARTAPERTUREBASE,
596 aperture_alloc >> 25);
597 }
598 }
599
600 enable_gart_translations();
601
554 return 0; 602 return 0;
555} 603}
556 604
557static int gart_suspend(struct sys_device *dev, pm_message_t state) 605static int gart_suspend(struct sys_device *dev, pm_message_t state)
558{ 606{
559 return -EINVAL; 607 return 0;
560} 608}
561 609
562static struct sysdev_class gart_sysdev_class = { 610static struct sysdev_class gart_sysdev_class = {
@@ -614,27 +662,14 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
614 memset(gatt, 0, gatt_size); 662 memset(gatt, 0, gatt_size);
615 agp_gatt_table = gatt; 663 agp_gatt_table = gatt;
616 664
617 for (i = 0; i < num_k8_northbridges; i++) { 665 enable_gart_translations();
618 u32 gatt_reg;
619 u32 ctl;
620
621 dev = k8_northbridges[i];
622 gatt_reg = __pa(gatt) >> 12;
623 gatt_reg <<= 4;
624 pci_write_config_dword(dev, 0x98, gatt_reg);
625 pci_read_config_dword(dev, 0x90, &ctl);
626
627 ctl |= 1;
628 ctl &= ~((1<<4) | (1<<5));
629
630 pci_write_config_dword(dev, 0x90, ctl);
631 }
632 666
633 error = sysdev_class_register(&gart_sysdev_class); 667 error = sysdev_class_register(&gart_sysdev_class);
634 if (!error) 668 if (!error)
635 error = sysdev_register(&device_gart); 669 error = sysdev_register(&device_gart);
636 if (error) 670 if (error)
637 panic("Could not register gart_sysdev -- would corrupt data on next suspend"); 671 panic("Could not register gart_sysdev -- would corrupt data on next suspend");
672
638 flush_gart(); 673 flush_gart();
639 674
640 printk(KERN_INFO "PCI-DMA: aperture base @ %x size %u KB\n", 675 printk(KERN_INFO "PCI-DMA: aperture base @ %x size %u KB\n",
@@ -677,11 +712,11 @@ void gart_iommu_shutdown(void)
677 u32 ctl; 712 u32 ctl;
678 713
679 dev = k8_northbridges[i]; 714 dev = k8_northbridges[i];
680 pci_read_config_dword(dev, 0x90, &ctl); 715 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
681 716
682 ctl &= ~1; 717 ctl &= ~GARTEN;
683 718
684 pci_write_config_dword(dev, 0x90, ctl); 719 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
685 } 720 }
686} 721}
687 722
@@ -788,10 +823,10 @@ void __init gart_iommu_init(void)
788 wbinvd(); 823 wbinvd();
789 824
790 /* 825 /*
791 * Try to workaround a bug (thanks to BenH) 826 * Try to workaround a bug (thanks to BenH):
792 * Set unmapped entries to a scratch page instead of 0. 827 * Set unmapped entries to a scratch page instead of 0.
793 * Any prefetches that hit unmapped entries won't get an bus abort 828 * Any prefetches that hit unmapped entries won't get an bus abort
794 * then. 829 * then. (P2P bridge may be prefetching on DMA reads).
795 */ 830 */
796 scratch = get_zeroed_page(GFP_KERNEL); 831 scratch = get_zeroed_page(GFP_KERNEL);
797 if (!scratch) 832 if (!scratch)
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index ba370dc8685b..4061d63aabe7 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -6,6 +6,7 @@
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/pm.h> 8#include <linux/pm.h>
9#include <linux/clockchips.h>
9 10
10struct kmem_cache *task_xstate_cachep; 11struct kmem_cache *task_xstate_cachep;
11 12
@@ -45,6 +46,76 @@ void arch_task_cache_init(void)
45 SLAB_PANIC, NULL); 46 SLAB_PANIC, NULL);
46} 47}
47 48
49/*
50 * Idle related variables and functions
51 */
52unsigned long boot_option_idle_override = 0;
53EXPORT_SYMBOL(boot_option_idle_override);
54
55/*
56 * Powermanagement idle function, if any..
57 */
58void (*pm_idle)(void);
59EXPORT_SYMBOL(pm_idle);
60
61#ifdef CONFIG_X86_32
62/*
63 * This halt magic was a workaround for ancient floppy DMA
64 * wreckage. It should be safe to remove.
65 */
66static int hlt_counter;
67void disable_hlt(void)
68{
69 hlt_counter++;
70}
71EXPORT_SYMBOL(disable_hlt);
72
73void enable_hlt(void)
74{
75 hlt_counter--;
76}
77EXPORT_SYMBOL(enable_hlt);
78
79static inline int hlt_use_halt(void)
80{
81 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
82}
83#else
84static inline int hlt_use_halt(void)
85{
86 return 1;
87}
88#endif
89
90/*
91 * We use this if we don't have any better
92 * idle routine..
93 */
94void default_idle(void)
95{
96 if (hlt_use_halt()) {
97 current_thread_info()->status &= ~TS_POLLING;
98 /*
99 * TS_POLLING-cleared state must be visible before we
100 * test NEED_RESCHED:
101 */
102 smp_mb();
103
104 if (!need_resched())
105 safe_halt(); /* enables interrupts racelessly */
106 else
107 local_irq_enable();
108 current_thread_info()->status |= TS_POLLING;
109 } else {
110 local_irq_enable();
111 /* loop is done by the caller */
112 cpu_relax();
113 }
114}
115#ifdef CONFIG_APM_MODULE
116EXPORT_SYMBOL(default_idle);
117#endif
118
48static void do_nothing(void *unused) 119static void do_nothing(void *unused)
49{ 120{
50} 121}
@@ -122,44 +193,129 @@ static void poll_idle(void)
122 * 193 *
123 * idle=mwait overrides this decision and forces the usage of mwait. 194 * idle=mwait overrides this decision and forces the usage of mwait.
124 */ 195 */
196
197#define MWAIT_INFO 0x05
198#define MWAIT_ECX_EXTENDED_INFO 0x01
199#define MWAIT_EDX_C1 0xf0
200
125static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c) 201static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
126{ 202{
203 u32 eax, ebx, ecx, edx;
204
127 if (force_mwait) 205 if (force_mwait)
128 return 1; 206 return 1;
129 207
130 if (c->x86_vendor == X86_VENDOR_AMD) { 208 if (c->cpuid_level < MWAIT_INFO)
131 switch(c->x86) { 209 return 0;
132 case 0x10: 210
133 case 0x11: 211 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
134 return 0; 212 /* Check, whether EDX has extended info about MWAIT */
135 } 213 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
136 } 214 return 1;
215
216 /*
217 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
218 * C1 supports MWAIT
219 */
220 return (edx & MWAIT_EDX_C1);
221}
222
223/*
224 * Check for AMD CPUs, which have potentially C1E support
225 */
226static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
227{
228 if (c->x86_vendor != X86_VENDOR_AMD)
229 return 0;
230
231 if (c->x86 < 0x0F)
232 return 0;
233
234 /* Family 0x0f models < rev F do not have C1E */
235 if (c->x86 == 0x0f && c->x86_model < 0x40)
236 return 0;
237
137 return 1; 238 return 1;
138} 239}
139 240
140void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) 241/*
242 * C1E aware idle routine. We check for C1E active in the interrupt
243 * pending message MSR. If we detect C1E, then we handle it the same
244 * way as C3 power states (local apic timer and TSC stop)
245 */
246static void c1e_idle(void)
141{ 247{
142 static int selected; 248 static cpumask_t c1e_mask = CPU_MASK_NONE;
249 static int c1e_detected;
143 250
144 if (selected) 251 if (need_resched())
145 return; 252 return;
253
254 if (!c1e_detected) {
255 u32 lo, hi;
256
257 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
258 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
259 c1e_detected = 1;
260 mark_tsc_unstable("TSC halt in C1E");
261 printk(KERN_INFO "System has C1E enabled\n");
262 }
263 }
264
265 if (c1e_detected) {
266 int cpu = smp_processor_id();
267
268 if (!cpu_isset(cpu, c1e_mask)) {
269 cpu_set(cpu, c1e_mask);
270 /*
271 * Force broadcast so ACPI can not interfere. Needs
272 * to run with interrupts enabled as it uses
273 * smp_function_call.
274 */
275 local_irq_enable();
276 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
277 &cpu);
278 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
279 cpu);
280 local_irq_disable();
281 }
282 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
283
284 default_idle();
285
286 /*
287 * The switch back from broadcast mode needs to be
288 * called with interrupts disabled.
289 */
290 local_irq_disable();
291 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
292 local_irq_enable();
293 } else
294 default_idle();
295}
296
297void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
298{
146#ifdef CONFIG_X86_SMP 299#ifdef CONFIG_X86_SMP
147 if (pm_idle == poll_idle && smp_num_siblings > 1) { 300 if (pm_idle == poll_idle && smp_num_siblings > 1) {
148 printk(KERN_WARNING "WARNING: polling idle and HT enabled," 301 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
149 " performance may degrade.\n"); 302 " performance may degrade.\n");
150 } 303 }
151#endif 304#endif
305 if (pm_idle)
306 return;
307
152 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) { 308 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
153 /* 309 /*
154 * Skip, if setup has overridden idle.
155 * One CPU supports mwait => All CPUs supports mwait 310 * One CPU supports mwait => All CPUs supports mwait
156 */ 311 */
157 if (!pm_idle) { 312 printk(KERN_INFO "using mwait in idle threads.\n");
158 printk(KERN_INFO "using mwait in idle threads.\n"); 313 pm_idle = mwait_idle;
159 pm_idle = mwait_idle; 314 } else if (check_c1e_idle(c)) {
160 } 315 printk(KERN_INFO "using C1E aware idle routine\n");
161 } 316 pm_idle = c1e_idle;
162 selected = 1; 317 } else
318 pm_idle = default_idle;
163} 319}
164 320
165static int __init idle_setup(char *str) 321static int __init idle_setup(char *str)
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index e2db9ac5c61c..c2a11d77b1b5 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -58,11 +58,6 @@
58 58
59asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 59asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
60 60
61static int hlt_counter;
62
63unsigned long boot_option_idle_override = 0;
64EXPORT_SYMBOL(boot_option_idle_override);
65
66DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; 61DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
67EXPORT_PER_CPU_SYMBOL(current_task); 62EXPORT_PER_CPU_SYMBOL(current_task);
68 63
@@ -77,55 +72,6 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
77 return ((unsigned long *)tsk->thread.sp)[3]; 72 return ((unsigned long *)tsk->thread.sp)[3];
78} 73}
79 74
80/*
81 * Powermanagement idle function, if any..
82 */
83void (*pm_idle)(void);
84EXPORT_SYMBOL(pm_idle);
85
86void disable_hlt(void)
87{
88 hlt_counter++;
89}
90
91EXPORT_SYMBOL(disable_hlt);
92
93void enable_hlt(void)
94{
95 hlt_counter--;
96}
97
98EXPORT_SYMBOL(enable_hlt);
99
100/*
101 * We use this if we don't have any better
102 * idle routine..
103 */
104void default_idle(void)
105{
106 if (!hlt_counter && boot_cpu_data.hlt_works_ok) {
107 current_thread_info()->status &= ~TS_POLLING;
108 /*
109 * TS_POLLING-cleared state must be visible before we
110 * test NEED_RESCHED:
111 */
112 smp_mb();
113
114 if (!need_resched())
115 safe_halt(); /* enables interrupts racelessly */
116 else
117 local_irq_enable();
118 current_thread_info()->status |= TS_POLLING;
119 } else {
120 local_irq_enable();
121 /* loop is done by the caller */
122 cpu_relax();
123 }
124}
125#ifdef CONFIG_APM_MODULE
126EXPORT_SYMBOL(default_idle);
127#endif
128
129#ifdef CONFIG_HOTPLUG_CPU 75#ifdef CONFIG_HOTPLUG_CPU
130#include <asm/nmi.h> 76#include <asm/nmi.h>
131/* We don't actually take CPU down, just spin without interrupts. */ 77/* We don't actually take CPU down, just spin without interrupts. */
@@ -168,24 +114,19 @@ void cpu_idle(void)
168 while (1) { 114 while (1) {
169 tick_nohz_stop_sched_tick(); 115 tick_nohz_stop_sched_tick();
170 while (!need_resched()) { 116 while (!need_resched()) {
171 void (*idle)(void);
172 117
173 check_pgt_cache(); 118 check_pgt_cache();
174 rmb(); 119 rmb();
175 idle = pm_idle;
176 120
177 if (rcu_pending(cpu)) 121 if (rcu_pending(cpu))
178 rcu_check_callbacks(cpu, 0); 122 rcu_check_callbacks(cpu, 0);
179 123
180 if (!idle)
181 idle = default_idle;
182
183 if (cpu_is_offline(cpu)) 124 if (cpu_is_offline(cpu))
184 play_dead(); 125 play_dead();
185 126
186 local_irq_disable(); 127 local_irq_disable();
187 __get_cpu_var(irq_stat).idle_timestamp = jiffies; 128 __get_cpu_var(irq_stat).idle_timestamp = jiffies;
188 idle(); 129 pm_idle();
189 } 130 }
190 tick_nohz_restart_sched_tick(); 131 tick_nohz_restart_sched_tick();
191 preempt_enable_no_resched(); 132 preempt_enable_no_resched();
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index c6eb5c91e5f6..290183e9731a 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -56,15 +56,6 @@ asmlinkage extern void ret_from_fork(void);
56 56
57unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED; 57unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
58 58
59unsigned long boot_option_idle_override = 0;
60EXPORT_SYMBOL(boot_option_idle_override);
61
62/*
63 * Powermanagement idle function, if any..
64 */
65void (*pm_idle)(void);
66EXPORT_SYMBOL(pm_idle);
67
68static ATOMIC_NOTIFIER_HEAD(idle_notifier); 59static ATOMIC_NOTIFIER_HEAD(idle_notifier);
69 60
70void idle_notifier_register(struct notifier_block *n) 61void idle_notifier_register(struct notifier_block *n)
@@ -94,25 +85,6 @@ void exit_idle(void)
94 __exit_idle(); 85 __exit_idle();
95} 86}
96 87
97/*
98 * We use this if we don't have any better
99 * idle routine..
100 */
101void default_idle(void)
102{
103 current_thread_info()->status &= ~TS_POLLING;
104 /*
105 * TS_POLLING-cleared state must be visible before we
106 * test NEED_RESCHED:
107 */
108 smp_mb();
109 if (!need_resched())
110 safe_halt(); /* enables interrupts racelessly */
111 else
112 local_irq_enable();
113 current_thread_info()->status |= TS_POLLING;
114}
115
116#ifdef CONFIG_HOTPLUG_CPU 88#ifdef CONFIG_HOTPLUG_CPU
117DECLARE_PER_CPU(int, cpu_state); 89DECLARE_PER_CPU(int, cpu_state);
118 90
@@ -150,12 +122,9 @@ void cpu_idle(void)
150 while (1) { 122 while (1) {
151 tick_nohz_stop_sched_tick(); 123 tick_nohz_stop_sched_tick();
152 while (!need_resched()) { 124 while (!need_resched()) {
153 void (*idle)(void);
154 125
155 rmb(); 126 rmb();
156 idle = pm_idle; 127
157 if (!idle)
158 idle = default_idle;
159 if (cpu_is_offline(smp_processor_id())) 128 if (cpu_is_offline(smp_processor_id()))
160 play_dead(); 129 play_dead();
161 /* 130 /*
@@ -165,7 +134,7 @@ void cpu_idle(void)
165 */ 134 */
166 local_irq_disable(); 135 local_irq_disable();
167 enter_idle(); 136 enter_idle();
168 idle(); 137 pm_idle();
169 /* In many cases the interrupt that ended idle 138 /* In many cases the interrupt that ended idle
170 has already called exit_idle. But some idle 139 has already called exit_idle. But some idle
171 loops can be woken up without interrupt. */ 140 loops can be woken up without interrupt. */
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index a7835f282936..77040b6070e1 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -943,13 +943,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
943 return copy_regset_to_user(child, &user_x86_32_view, 943 return copy_regset_to_user(child, &user_x86_32_view,
944 REGSET_XFP, 944 REGSET_XFP,
945 0, sizeof(struct user_fxsr_struct), 945 0, sizeof(struct user_fxsr_struct),
946 datap); 946 datap) ? -EIO : 0;
947 947
948 case PTRACE_SETFPXREGS: /* Set the child extended FPU state. */ 948 case PTRACE_SETFPXREGS: /* Set the child extended FPU state. */
949 return copy_regset_from_user(child, &user_x86_32_view, 949 return copy_regset_from_user(child, &user_x86_32_view,
950 REGSET_XFP, 950 REGSET_XFP,
951 0, sizeof(struct user_fxsr_struct), 951 0, sizeof(struct user_fxsr_struct),
952 datap); 952 datap) ? -EIO : 0;
953#endif 953#endif
954 954
955#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION 955#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index d89a648fe710..79bdcd11c66e 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -65,6 +65,7 @@ static enum {
65 ICH_FORCE_HPET_RESUME, 65 ICH_FORCE_HPET_RESUME,
66 VT8237_FORCE_HPET_RESUME, 66 VT8237_FORCE_HPET_RESUME,
67 NVIDIA_FORCE_HPET_RESUME, 67 NVIDIA_FORCE_HPET_RESUME,
68 ATI_FORCE_HPET_RESUME,
68} force_hpet_resume_type; 69} force_hpet_resume_type;
69 70
70static void __iomem *rcba_base; 71static void __iomem *rcba_base;
@@ -158,6 +159,8 @@ static void ich_force_enable_hpet(struct pci_dev *dev)
158 159
159DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0, 160DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0,
160 ich_force_enable_hpet); 161 ich_force_enable_hpet);
162DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0,
163 ich_force_enable_hpet);
161DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, 164DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1,
162 ich_force_enable_hpet); 165 ich_force_enable_hpet);
163DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, 166DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0,
@@ -174,6 +177,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_7,
174 177
175static struct pci_dev *cached_dev; 178static struct pci_dev *cached_dev;
176 179
180static void hpet_print_force_info(void)
181{
182 printk(KERN_INFO "HPET not enabled in BIOS. "
183 "You might try hpet=force boot option\n");
184}
185
177static void old_ich_force_hpet_resume(void) 186static void old_ich_force_hpet_resume(void)
178{ 187{
179 u32 val; 188 u32 val;
@@ -253,6 +262,8 @@ static void old_ich_force_enable_hpet_user(struct pci_dev *dev)
253{ 262{
254 if (hpet_force_user) 263 if (hpet_force_user)
255 old_ich_force_enable_hpet(dev); 264 old_ich_force_enable_hpet(dev);
265 else
266 hpet_print_force_info();
256} 267}
257 268
258DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, 269DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0,
@@ -290,8 +301,13 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev)
290{ 301{
291 u32 uninitialized_var(val); 302 u32 uninitialized_var(val);
292 303
293 if (!hpet_force_user || hpet_address || force_hpet_address) 304 if (hpet_address || force_hpet_address)
305 return;
306
307 if (!hpet_force_user) {
308 hpet_print_force_info();
294 return; 309 return;
310 }
295 311
296 pci_read_config_dword(dev, 0x68, &val); 312 pci_read_config_dword(dev, 0x68, &val);
297 /* 313 /*
@@ -330,6 +346,36 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235,
330DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, 346DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237,
331 vt8237_force_enable_hpet); 347 vt8237_force_enable_hpet);
332 348
349static void ati_force_hpet_resume(void)
350{
351 pci_write_config_dword(cached_dev, 0x14, 0xfed00000);
352 printk(KERN_DEBUG "Force enabled HPET at resume\n");
353}
354
355static void ati_force_enable_hpet(struct pci_dev *dev)
356{
357 u32 uninitialized_var(val);
358
359 if (hpet_address || force_hpet_address)
360 return;
361
362 if (!hpet_force_user) {
363 hpet_print_force_info();
364 return;
365 }
366
367 pci_write_config_dword(dev, 0x14, 0xfed00000);
368 pci_read_config_dword(dev, 0x14, &val);
369 force_hpet_address = val;
370 force_hpet_resume_type = ATI_FORCE_HPET_RESUME;
371 dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at 0x%lx\n",
372 force_hpet_address);
373 cached_dev = dev;
374 return;
375}
376DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
377 ati_force_enable_hpet);
378
333/* 379/*
334 * Undocumented chipset feature taken from LinuxBIOS. 380 * Undocumented chipset feature taken from LinuxBIOS.
335 */ 381 */
@@ -343,8 +389,13 @@ static void nvidia_force_enable_hpet(struct pci_dev *dev)
343{ 389{
344 u32 uninitialized_var(val); 390 u32 uninitialized_var(val);
345 391
346 if (!hpet_force_user || hpet_address || force_hpet_address) 392 if (hpet_address || force_hpet_address)
393 return;
394
395 if (!hpet_force_user) {
396 hpet_print_force_info();
347 return; 397 return;
398 }
348 399
349 pci_write_config_dword(dev, 0x44, 0xfed00001); 400 pci_write_config_dword(dev, 0x44, 0xfed00001);
350 pci_read_config_dword(dev, 0x44, &val); 401 pci_read_config_dword(dev, 0x44, &val);
@@ -397,6 +448,9 @@ void force_hpet_resume(void)
397 case NVIDIA_FORCE_HPET_RESUME: 448 case NVIDIA_FORCE_HPET_RESUME:
398 nvidia_force_hpet_resume(); 449 nvidia_force_hpet_resume();
399 return; 450 return;
451 case ATI_FORCE_HPET_RESUME:
452 ati_force_hpet_resume();
453 return;
400 default: 454 default:
401 break; 455 break;
402 } 456 }
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index f6be7d5f82f8..f8a62160e151 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -27,7 +27,7 @@
27void (*pm_power_off)(void); 27void (*pm_power_off)(void);
28EXPORT_SYMBOL(pm_power_off); 28EXPORT_SYMBOL(pm_power_off);
29 29
30static long no_idt[3]; 30static const struct desc_ptr no_idt = {};
31static int reboot_mode; 31static int reboot_mode;
32enum reboot_type reboot_type = BOOT_KBD; 32enum reboot_type reboot_type = BOOT_KBD;
33int reboot_force; 33int reboot_force;
@@ -201,15 +201,15 @@ core_initcall(reboot_init);
201 controller to pulse the CPU reset line, which is more thorough, but 201 controller to pulse the CPU reset line, which is more thorough, but
202 doesn't work with at least one type of 486 motherboard. It is easy 202 doesn't work with at least one type of 486 motherboard. It is easy
203 to stop this code working; hence the copious comments. */ 203 to stop this code working; hence the copious comments. */
204static unsigned long long 204static const unsigned long long
205real_mode_gdt_entries [3] = 205real_mode_gdt_entries [3] =
206{ 206{
207 0x0000000000000000ULL, /* Null descriptor */ 207 0x0000000000000000ULL, /* Null descriptor */
208 0x00009a000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ 208 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
209 0x000092000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ 209 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
210}; 210};
211 211
212static struct desc_ptr 212static const struct desc_ptr
213real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, 213real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
214real_mode_idt = { 0x3ff, 0 }; 214real_mode_idt = { 0x3ff, 0 };
215 215
@@ -231,7 +231,7 @@ real_mode_idt = { 0x3ff, 0 };
231 231
232 More could be done here to set up the registers as if a CPU reset had 232 More could be done here to set up the registers as if a CPU reset had
233 occurred; hopefully real BIOSs don't assume much. */ 233 occurred; hopefully real BIOSs don't assume much. */
234static unsigned char real_mode_switch [] = 234static const unsigned char real_mode_switch [] =
235{ 235{
236 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ 236 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
237 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ 237 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
@@ -245,7 +245,7 @@ static unsigned char real_mode_switch [] =
245 0x24, 0x10, /* f: andb $0x10,al */ 245 0x24, 0x10, /* f: andb $0x10,al */
246 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ 246 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
247}; 247};
248static unsigned char jump_to_bios [] = 248static const unsigned char jump_to_bios [] =
249{ 249{
250 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ 250 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
251}; 251};
@@ -255,7 +255,7 @@ static unsigned char jump_to_bios [] =
255 * specified by the code and length parameters. 255 * specified by the code and length parameters.
256 * We assume that length will aways be less that 100! 256 * We assume that length will aways be less that 100!
257 */ 257 */
258void machine_real_restart(unsigned char *code, int length) 258void machine_real_restart(const unsigned char *code, int length)
259{ 259{
260 local_irq_disable(); 260 local_irq_disable();
261 261
@@ -368,7 +368,7 @@ static void native_machine_emergency_restart(void)
368 } 368 }
369 369
370 case BOOT_TRIPLE: 370 case BOOT_TRIPLE:
371 load_idt((const struct desc_ptr *)&no_idt); 371 load_idt(&no_idt);
372 __asm__ __volatile__("int3"); 372 __asm__ __volatile__("int3");
373 373
374 reboot_type = BOOT_KBD; 374 reboot_type = BOOT_KBD;
diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c
index dec0b5ec25c2..61a837743fe5 100644
--- a/arch/x86/kernel/reboot_fixups_32.c
+++ b/arch/x86/kernel/reboot_fixups_32.c
@@ -49,7 +49,7 @@ struct device_fixup {
49 void (*reboot_fixup)(struct pci_dev *); 49 void (*reboot_fixup)(struct pci_dev *);
50}; 50};
51 51
52static struct device_fixup fixups_table[] = { 52static const struct device_fixup fixups_table[] = {
53{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset }, 53{ PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset },
54{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset }, 54{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset },
55{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE, cs5530a_warm_reset }, 55{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE, cs5530a_warm_reset },
@@ -64,7 +64,7 @@ static struct device_fixup fixups_table[] = {
64 */ 64 */
65void mach_reboot_fixups(void) 65void mach_reboot_fixups(void)
66{ 66{
67 struct device_fixup *cur; 67 const struct device_fixup *cur;
68 struct pci_dev *dev; 68 struct pci_dev *dev;
69 int i; 69 int i;
70 70
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 3220c7b56eb3..9a87113ba996 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -72,6 +72,7 @@
72#include <asm/topology.h> 72#include <asm/topology.h>
73#include <asm/trampoline.h> 73#include <asm/trampoline.h>
74#include <asm/pat.h> 74#include <asm/pat.h>
75#include <asm/mmconfig.h>
75 76
76#include <mach_apic.h> 77#include <mach_apic.h>
77#ifdef CONFIG_PARAVIRT 78#ifdef CONFIG_PARAVIRT
@@ -80,6 +81,8 @@
80#define ARCH_SETUP 81#define ARCH_SETUP
81#endif 82#endif
82 83
84#include "cpu/cpu.h"
85
83/* 86/*
84 * Machine setup.. 87 * Machine setup..
85 */ 88 */
@@ -96,8 +99,6 @@ int bootloader_type;
96 99
97unsigned long saved_video_mode; 100unsigned long saved_video_mode;
98 101
99int force_mwait __cpuinitdata;
100
101/* 102/*
102 * Early DMI memory 103 * Early DMI memory
103 */ 104 */
@@ -119,7 +120,7 @@ EXPORT_SYMBOL_GPL(edid_info);
119 120
120extern int root_mountflags; 121extern int root_mountflags;
121 122
122char __initdata command_line[COMMAND_LINE_SIZE]; 123static char __initdata command_line[COMMAND_LINE_SIZE];
123 124
124static struct resource standard_io_resources[] = { 125static struct resource standard_io_resources[] = {
125 { .name = "dma1", .start = 0x00, .end = 0x1f, 126 { .name = "dma1", .start = 0x00, .end = 0x1f,
@@ -165,6 +166,7 @@ static struct resource bss_resource = {
165 .flags = IORESOURCE_RAM, 166 .flags = IORESOURCE_RAM,
166}; 167};
167 168
169static void __init early_cpu_init(void);
168static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c); 170static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c);
169 171
170#ifdef CONFIG_PROC_VMCORE 172#ifdef CONFIG_PROC_VMCORE
@@ -266,18 +268,6 @@ static inline void __init reserve_crashkernel(void)
266{} 268{}
267#endif 269#endif
268 270
269#ifdef CONFIG_PCI_MMCONFIG
270extern void __cpuinit fam10h_check_enable_mmcfg(void);
271extern void __init check_enable_amd_mmconf_dmi(void);
272#else
273void __cpuinit fam10h_check_enable_mmcfg(void)
274{
275}
276void __init check_enable_amd_mmconf_dmi(void)
277{
278}
279#endif
280
281/* 271/*
282 * setup_arch - architecture-specific boot-time initializations 272 * setup_arch - architecture-specific boot-time initializations
283 * 273 *
@@ -327,6 +317,7 @@ void __init setup_arch(char **cmdline_p)
327 bss_resource.start = virt_to_phys(&__bss_start); 317 bss_resource.start = virt_to_phys(&__bss_start);
328 bss_resource.end = virt_to_phys(&__bss_stop)-1; 318 bss_resource.end = virt_to_phys(&__bss_stop)-1;
329 319
320 early_cpu_init();
330 early_identify_cpu(&boot_cpu_data); 321 early_identify_cpu(&boot_cpu_data);
331 322
332 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); 323 strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
@@ -517,7 +508,20 @@ void __init setup_arch(char **cmdline_p)
517 check_enable_amd_mmconf_dmi(); 508 check_enable_amd_mmconf_dmi();
518} 509}
519 510
520static int __cpuinit get_model_name(struct cpuinfo_x86 *c) 511struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {};
512
513static void __cpuinit default_init(struct cpuinfo_x86 *c)
514{
515 display_cacheinfo(c);
516}
517
518static struct cpu_dev __cpuinitdata default_cpu = {
519 .c_init = default_init,
520 .c_vendor = "Unknown",
521};
522static struct cpu_dev *this_cpu __cpuinitdata = &default_cpu;
523
524int __cpuinit get_model_name(struct cpuinfo_x86 *c)
521{ 525{
522 unsigned int *v; 526 unsigned int *v;
523 527
@@ -533,7 +537,7 @@ static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
533} 537}
534 538
535 539
536static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) 540void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
537{ 541{
538 unsigned int n, dummy, eax, ebx, ecx, edx; 542 unsigned int n, dummy, eax, ebx, ecx, edx;
539 543
@@ -565,228 +569,6 @@ static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
565 } 569 }
566} 570}
567 571
568#ifdef CONFIG_NUMA
569static int __cpuinit nearby_node(int apicid)
570{
571 int i, node;
572
573 for (i = apicid - 1; i >= 0; i--) {
574 node = apicid_to_node[i];
575 if (node != NUMA_NO_NODE && node_online(node))
576 return node;
577 }
578 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
579 node = apicid_to_node[i];
580 if (node != NUMA_NO_NODE && node_online(node))
581 return node;
582 }
583 return first_node(node_online_map); /* Shouldn't happen */
584}
585#endif
586
587/*
588 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
589 * Assumes number of cores is a power of two.
590 */
591static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
592{
593#ifdef CONFIG_SMP
594 unsigned bits;
595#ifdef CONFIG_NUMA
596 int cpu = smp_processor_id();
597 int node = 0;
598 unsigned apicid = hard_smp_processor_id();
599#endif
600 bits = c->x86_coreid_bits;
601
602 /* Low order bits define the core id (index of core in socket) */
603 c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);
604 /* Convert the initial APIC ID into the socket ID */
605 c->phys_proc_id = c->initial_apicid >> bits;
606
607#ifdef CONFIG_NUMA
608 node = c->phys_proc_id;
609 if (apicid_to_node[apicid] != NUMA_NO_NODE)
610 node = apicid_to_node[apicid];
611 if (!node_online(node)) {
612 /* Two possibilities here:
613 - The CPU is missing memory and no node was created.
614 In that case try picking one from a nearby CPU
615 - The APIC IDs differ from the HyperTransport node IDs
616 which the K8 northbridge parsing fills in.
617 Assume they are all increased by a constant offset,
618 but in the same order as the HT nodeids.
619 If that doesn't result in a usable node fall back to the
620 path for the previous case. */
621
622 int ht_nodeid = c->initial_apicid;
623
624 if (ht_nodeid >= 0 &&
625 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
626 node = apicid_to_node[ht_nodeid];
627 /* Pick a nearby node */
628 if (!node_online(node))
629 node = nearby_node(apicid);
630 }
631 numa_set_node(cpu, node);
632
633 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
634#endif
635#endif
636}
637
638static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
639{
640#ifdef CONFIG_SMP
641 unsigned bits, ecx;
642
643 /* Multi core CPU? */
644 if (c->extended_cpuid_level < 0x80000008)
645 return;
646
647 ecx = cpuid_ecx(0x80000008);
648
649 c->x86_max_cores = (ecx & 0xff) + 1;
650
651 /* CPU telling us the core id bits shift? */
652 bits = (ecx >> 12) & 0xF;
653
654 /* Otherwise recompute */
655 if (bits == 0) {
656 while ((1 << bits) < c->x86_max_cores)
657 bits++;
658 }
659
660 c->x86_coreid_bits = bits;
661
662#endif
663}
664
665#define ENABLE_C1E_MASK 0x18000000
666#define CPUID_PROCESSOR_SIGNATURE 1
667#define CPUID_XFAM 0x0ff00000
668#define CPUID_XFAM_K8 0x00000000
669#define CPUID_XFAM_10H 0x00100000
670#define CPUID_XFAM_11H 0x00200000
671#define CPUID_XMOD 0x000f0000
672#define CPUID_XMOD_REV_F 0x00040000
673
674/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */
675static __cpuinit int amd_apic_timer_broken(void)
676{
677 u32 lo, hi, eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
678
679 switch (eax & CPUID_XFAM) {
680 case CPUID_XFAM_K8:
681 if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
682 break;
683 case CPUID_XFAM_10H:
684 case CPUID_XFAM_11H:
685 rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
686 if (lo & ENABLE_C1E_MASK)
687 return 1;
688 break;
689 default:
690 /* err on the side of caution */
691 return 1;
692 }
693 return 0;
694}
695
696static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
697{
698 early_init_amd_mc(c);
699
700 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
701 if (c->x86_power & (1<<8))
702 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
703}
704
705static void __cpuinit init_amd(struct cpuinfo_x86 *c)
706{
707 unsigned level;
708
709#ifdef CONFIG_SMP
710 unsigned long value;
711
712 /*
713 * Disable TLB flush filter by setting HWCR.FFDIS on K8
714 * bit 6 of msr C001_0015
715 *
716 * Errata 63 for SH-B3 steppings
717 * Errata 122 for all steppings (F+ have it disabled by default)
718 */
719 if (c->x86 == 15) {
720 rdmsrl(MSR_K8_HWCR, value);
721 value |= 1 << 6;
722 wrmsrl(MSR_K8_HWCR, value);
723 }
724#endif
725
726 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
727 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
728 clear_cpu_cap(c, 0*32+31);
729
730 /* On C+ stepping K8 rep microcode works well for copy/memset */
731 level = cpuid_eax(1);
732 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) ||
733 level >= 0x0f58))
734 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
735 if (c->x86 == 0x10 || c->x86 == 0x11)
736 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
737
738 /* Enable workaround for FXSAVE leak */
739 if (c->x86 >= 6)
740 set_cpu_cap(c, X86_FEATURE_FXSAVE_LEAK);
741
742 level = get_model_name(c);
743 if (!level) {
744 switch (c->x86) {
745 case 15:
746 /* Should distinguish Models here, but this is only
747 a fallback anyways. */
748 strcpy(c->x86_model_id, "Hammer");
749 break;
750 }
751 }
752 display_cacheinfo(c);
753
754 /* Multi core CPU? */
755 if (c->extended_cpuid_level >= 0x80000008)
756 amd_detect_cmp(c);
757
758 if (c->extended_cpuid_level >= 0x80000006 &&
759 (cpuid_edx(0x80000006) & 0xf000))
760 num_cache_leaves = 4;
761 else
762 num_cache_leaves = 3;
763
764 if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11)
765 set_cpu_cap(c, X86_FEATURE_K8);
766
767 /* MFENCE stops RDTSC speculation */
768 set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
769
770 if (c->x86 == 0x10)
771 fam10h_check_enable_mmcfg();
772
773 if (amd_apic_timer_broken())
774 disable_apic_timer = 1;
775
776 if (c == &boot_cpu_data && c->x86 >= 0xf && c->x86 <= 0x11) {
777 unsigned long long tseg;
778
779 /*
780 * Split up direct mapping around the TSEG SMM area.
781 * Don't do it for gbpages because there seems very little
782 * benefit in doing so.
783 */
784 if (!rdmsrl_safe(MSR_K8_TSEG_ADDR, &tseg) &&
785 (tseg >> PMD_SHIFT) < (max_pfn_mapped >> (PMD_SHIFT-PAGE_SHIFT)))
786 set_memory_4k((unsigned long)__va(tseg), 1);
787 }
788}
789
790void __cpuinit detect_ht(struct cpuinfo_x86 *c) 572void __cpuinit detect_ht(struct cpuinfo_x86 *c)
791{ 573{
792#ifdef CONFIG_SMP 574#ifdef CONFIG_SMP
@@ -837,135 +619,59 @@ out:
837#endif 619#endif
838} 620}
839 621
840/* 622static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
841 * find out the number of processor cores on the die
842 */
843static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
844{
845 unsigned int eax, t;
846
847 if (c->cpuid_level < 4)
848 return 1;
849
850 cpuid_count(4, 0, &eax, &t, &t, &t);
851
852 if (eax & 0x1f)
853 return ((eax >> 26) + 1);
854 else
855 return 1;
856}
857
858static void __cpuinit srat_detect_node(void)
859{
860#ifdef CONFIG_NUMA
861 unsigned node;
862 int cpu = smp_processor_id();
863 int apicid = hard_smp_processor_id();
864
865 /* Don't do the funky fallback heuristics the AMD version employs
866 for now. */
867 node = apicid_to_node[apicid];
868 if (node == NUMA_NO_NODE || !node_online(node))
869 node = first_node(node_online_map);
870 numa_set_node(cpu, node);
871
872 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
873#endif
874}
875
876static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
877{
878 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
879 (c->x86 == 0x6 && c->x86_model >= 0x0e))
880 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
881}
882
883static void __cpuinit init_intel(struct cpuinfo_x86 *c)
884{ 623{
885 /* Cache sizes */ 624 char *v = c->x86_vendor_id;
886 unsigned n; 625 int i;
887 626 static int printed;
888 init_intel_cacheinfo(c); 627
889 if (c->cpuid_level > 9) { 628 for (i = 0; i < X86_VENDOR_NUM; i++) {
890 unsigned eax = cpuid_eax(10); 629 if (cpu_devs[i]) {
891 /* Check for version and the number of counters */ 630 if (!strcmp(v, cpu_devs[i]->c_ident[0]) ||
892 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1)) 631 (cpu_devs[i]->c_ident[1] &&
893 set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON); 632 !strcmp(v, cpu_devs[i]->c_ident[1]))) {
633 c->x86_vendor = i;
634 this_cpu = cpu_devs[i];
635 return;
636 }
637 }
894 } 638 }
895 639 if (!printed) {
896 if (cpu_has_ds) { 640 printed++;
897 unsigned int l1, l2; 641 printk(KERN_ERR "CPU: Vendor unknown, using generic init.\n");
898 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); 642 printk(KERN_ERR "CPU: Your system may be unstable.\n");
899 if (!(l1 & (1<<11)))
900 set_cpu_cap(c, X86_FEATURE_BTS);
901 if (!(l1 & (1<<12)))
902 set_cpu_cap(c, X86_FEATURE_PEBS);
903 } 643 }
904 644 c->x86_vendor = X86_VENDOR_UNKNOWN;
905
906 if (cpu_has_bts)
907 ds_init_intel(c);
908
909 n = c->extended_cpuid_level;
910 if (n >= 0x80000008) {
911 unsigned eax = cpuid_eax(0x80000008);
912 c->x86_virt_bits = (eax >> 8) & 0xff;
913 c->x86_phys_bits = eax & 0xff;
914 /* CPUID workaround for Intel 0F34 CPU */
915 if (c->x86_vendor == X86_VENDOR_INTEL &&
916 c->x86 == 0xF && c->x86_model == 0x3 &&
917 c->x86_mask == 0x4)
918 c->x86_phys_bits = 36;
919 }
920
921 if (c->x86 == 15)
922 c->x86_cache_alignment = c->x86_clflush_size * 2;
923 if (c->x86 == 6)
924 set_cpu_cap(c, X86_FEATURE_REP_GOOD);
925 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
926 c->x86_max_cores = intel_num_cpu_cores(c);
927
928 srat_detect_node();
929}
930
931static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
932{
933 if (c->x86 == 0x6 && c->x86_model >= 0xf)
934 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
935} 645}
936 646
937static void __cpuinit init_centaur(struct cpuinfo_x86 *c) 647static void __init early_cpu_support_print(void)
938{ 648{
939 /* Cache sizes */ 649 int i,j;
940 unsigned n; 650 struct cpu_dev *cpu_devx;
941 651
942 n = c->extended_cpuid_level; 652 printk("KERNEL supported cpus:\n");
943 if (n >= 0x80000008) { 653 for (i = 0; i < X86_VENDOR_NUM; i++) {
944 unsigned eax = cpuid_eax(0x80000008); 654 cpu_devx = cpu_devs[i];
945 c->x86_virt_bits = (eax >> 8) & 0xff; 655 if (!cpu_devx)
946 c->x86_phys_bits = eax & 0xff; 656 continue;
947 } 657 for (j = 0; j < 2; j++) {
948 658 if (!cpu_devx->c_ident[j])
949 if (c->x86 == 0x6 && c->x86_model >= 0xf) { 659 continue;
950 c->x86_cache_alignment = c->x86_clflush_size * 2; 660 printk(" %s %s\n", cpu_devx->c_vendor,
951 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 661 cpu_devx->c_ident[j]);
952 set_cpu_cap(c, X86_FEATURE_REP_GOOD); 662 }
953 } 663 }
954 set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
955} 664}
956 665
957static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) 666static void __init early_cpu_init(void)
958{ 667{
959 char *v = c->x86_vendor_id; 668 struct cpu_vendor_dev *cvdev;
960 669
961 if (!strcmp(v, "AuthenticAMD")) 670 for (cvdev = __x86cpuvendor_start ;
962 c->x86_vendor = X86_VENDOR_AMD; 671 cvdev < __x86cpuvendor_end ;
963 else if (!strcmp(v, "GenuineIntel")) 672 cvdev++)
964 c->x86_vendor = X86_VENDOR_INTEL; 673 cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
965 else if (!strcmp(v, "CentaurHauls")) 674 early_cpu_support_print();
966 c->x86_vendor = X86_VENDOR_CENTAUR;
967 else
968 c->x86_vendor = X86_VENDOR_UNKNOWN;
969} 675}
970 676
971/* Do some early cpuid on the boot CPU to get some parameter that are 677/* Do some early cpuid on the boot CPU to get some parameter that are
@@ -1046,17 +752,9 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1046 if (c->extended_cpuid_level >= 0x80000007) 752 if (c->extended_cpuid_level >= 0x80000007)
1047 c->x86_power = cpuid_edx(0x80000007); 753 c->x86_power = cpuid_edx(0x80000007);
1048 754
1049 switch (c->x86_vendor) { 755 if (c->x86_vendor != X86_VENDOR_UNKNOWN &&
1050 case X86_VENDOR_AMD: 756 cpu_devs[c->x86_vendor]->c_early_init)
1051 early_init_amd(c); 757 cpu_devs[c->x86_vendor]->c_early_init(c);
1052 break;
1053 case X86_VENDOR_INTEL:
1054 early_init_intel(c);
1055 break;
1056 case X86_VENDOR_CENTAUR:
1057 early_init_centaur(c);
1058 break;
1059 }
1060 758
1061 validate_pat_support(c); 759 validate_pat_support(c);
1062} 760}
@@ -1084,24 +782,8 @@ void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1084 * At the end of this section, c->x86_capability better 782 * At the end of this section, c->x86_capability better
1085 * indicate the features this CPU genuinely supports! 783 * indicate the features this CPU genuinely supports!
1086 */ 784 */
1087 switch (c->x86_vendor) { 785 if (this_cpu->c_init)
1088 case X86_VENDOR_AMD: 786 this_cpu->c_init(c);
1089 init_amd(c);
1090 break;
1091
1092 case X86_VENDOR_INTEL:
1093 init_intel(c);
1094 break;
1095
1096 case X86_VENDOR_CENTAUR:
1097 init_centaur(c);
1098 break;
1099
1100 case X86_VENDOR_UNKNOWN:
1101 default:
1102 display_cacheinfo(c);
1103 break;
1104 }
1105 787
1106 detect_ht(c); 788 detect_ht(c);
1107 789
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 83e62137911b..6be701f3027f 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -59,7 +59,6 @@
59#include <asm/pgtable.h> 59#include <asm/pgtable.h>
60#include <asm/tlbflush.h> 60#include <asm/tlbflush.h>
61#include <asm/mtrr.h> 61#include <asm/mtrr.h>
62#include <asm/nmi.h>
63#include <asm/vmi.h> 62#include <asm/vmi.h>
64#include <asm/genapic.h> 63#include <asm/genapic.h>
65#include <linux/mc146818rtc.h> 64#include <linux/mc146818rtc.h>
@@ -1140,9 +1139,11 @@ static int __init smp_sanity_check(unsigned max_cpus)
1140 * If SMP should be disabled, then really disable it! 1139 * If SMP should be disabled, then really disable it!
1141 */ 1140 */
1142 if (!max_cpus) { 1141 if (!max_cpus) {
1143 printk(KERN_INFO "SMP mode deactivated," 1142 printk(KERN_INFO "SMP mode deactivated.\n");
1144 "forcing use of dummy APIC emulation.\n");
1145 smpboot_clear_io_apic(); 1143 smpboot_clear_io_apic();
1144
1145 localise_nmi_watchdog();
1146
1146#ifdef CONFIG_X86_32 1147#ifdef CONFIG_X86_32
1147 connect_bsp_APIC(); 1148 connect_bsp_APIC();
1148#endif 1149#endif
diff --git a/arch/x86/kernel/sys_i386_32.c b/arch/x86/kernel/sys_i386_32.c
index d2ab52cc1d6b..7066cb855a60 100644
--- a/arch/x86/kernel/sys_i386_32.c
+++ b/arch/x86/kernel/sys_i386_32.c
@@ -19,8 +19,8 @@
19#include <linux/utsname.h> 19#include <linux/utsname.h>
20#include <linux/ipc.h> 20#include <linux/ipc.h>
21 21
22#include <asm/uaccess.h> 22#include <linux/uaccess.h>
23#include <asm/unistd.h> 23#include <linux/unistd.h>
24 24
25asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 25asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
26 unsigned long prot, unsigned long flags, 26 unsigned long prot, unsigned long flags,
@@ -103,7 +103,7 @@ asmlinkage int old_select(struct sel_arg_struct __user *arg)
103 * 103 *
104 * This is really horribly ugly. 104 * This is really horribly ugly.
105 */ 105 */
106asmlinkage int sys_ipc (uint call, int first, int second, 106asmlinkage int sys_ipc(uint call, int first, int second,
107 int third, void __user *ptr, long fifth) 107 int third, void __user *ptr, long fifth)
108{ 108{
109 int version, ret; 109 int version, ret;
@@ -113,24 +113,24 @@ asmlinkage int sys_ipc (uint call, int first, int second,
113 113
114 switch (call) { 114 switch (call) {
115 case SEMOP: 115 case SEMOP:
116 return sys_semtimedop (first, (struct sembuf __user *)ptr, second, NULL); 116 return sys_semtimedop(first, (struct sembuf __user *)ptr, second, NULL);
117 case SEMTIMEDOP: 117 case SEMTIMEDOP:
118 return sys_semtimedop(first, (struct sembuf __user *)ptr, second, 118 return sys_semtimedop(first, (struct sembuf __user *)ptr, second,
119 (const struct timespec __user *)fifth); 119 (const struct timespec __user *)fifth);
120 120
121 case SEMGET: 121 case SEMGET:
122 return sys_semget (first, second, third); 122 return sys_semget(first, second, third);
123 case SEMCTL: { 123 case SEMCTL: {
124 union semun fourth; 124 union semun fourth;
125 if (!ptr) 125 if (!ptr)
126 return -EINVAL; 126 return -EINVAL;
127 if (get_user(fourth.__pad, (void __user * __user *) ptr)) 127 if (get_user(fourth.__pad, (void __user * __user *) ptr))
128 return -EFAULT; 128 return -EFAULT;
129 return sys_semctl (first, second, third, fourth); 129 return sys_semctl(first, second, third, fourth);
130 } 130 }
131 131
132 case MSGSND: 132 case MSGSND:
133 return sys_msgsnd (first, (struct msgbuf __user *) ptr, 133 return sys_msgsnd(first, (struct msgbuf __user *) ptr,
134 second, third); 134 second, third);
135 case MSGRCV: 135 case MSGRCV:
136 switch (version) { 136 switch (version) {
@@ -138,45 +138,45 @@ asmlinkage int sys_ipc (uint call, int first, int second,
138 struct ipc_kludge tmp; 138 struct ipc_kludge tmp;
139 if (!ptr) 139 if (!ptr)
140 return -EINVAL; 140 return -EINVAL;
141 141
142 if (copy_from_user(&tmp, 142 if (copy_from_user(&tmp,
143 (struct ipc_kludge __user *) ptr, 143 (struct ipc_kludge __user *) ptr,
144 sizeof (tmp))) 144 sizeof(tmp)))
145 return -EFAULT; 145 return -EFAULT;
146 return sys_msgrcv (first, tmp.msgp, second, 146 return sys_msgrcv(first, tmp.msgp, second,
147 tmp.msgtyp, third); 147 tmp.msgtyp, third);
148 } 148 }
149 default: 149 default:
150 return sys_msgrcv (first, 150 return sys_msgrcv(first,
151 (struct msgbuf __user *) ptr, 151 (struct msgbuf __user *) ptr,
152 second, fifth, third); 152 second, fifth, third);
153 } 153 }
154 case MSGGET: 154 case MSGGET:
155 return sys_msgget ((key_t) first, second); 155 return sys_msgget((key_t) first, second);
156 case MSGCTL: 156 case MSGCTL:
157 return sys_msgctl (first, second, (struct msqid_ds __user *) ptr); 157 return sys_msgctl(first, second, (struct msqid_ds __user *) ptr);
158 158
159 case SHMAT: 159 case SHMAT:
160 switch (version) { 160 switch (version) {
161 default: { 161 default: {
162 ulong raddr; 162 ulong raddr;
163 ret = do_shmat (first, (char __user *) ptr, second, &raddr); 163 ret = do_shmat(first, (char __user *) ptr, second, &raddr);
164 if (ret) 164 if (ret)
165 return ret; 165 return ret;
166 return put_user (raddr, (ulong __user *) third); 166 return put_user(raddr, (ulong __user *) third);
167 } 167 }
168 case 1: /* iBCS2 emulator entry point */ 168 case 1: /* iBCS2 emulator entry point */
169 if (!segment_eq(get_fs(), get_ds())) 169 if (!segment_eq(get_fs(), get_ds()))
170 return -EINVAL; 170 return -EINVAL;
171 /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */ 171 /* The "(ulong *) third" is valid _only_ because of the kernel segment thing */
172 return do_shmat (first, (char __user *) ptr, second, (ulong *) third); 172 return do_shmat(first, (char __user *) ptr, second, (ulong *) third);
173 } 173 }
174 case SHMDT: 174 case SHMDT:
175 return sys_shmdt ((char __user *)ptr); 175 return sys_shmdt((char __user *)ptr);
176 case SHMGET: 176 case SHMGET:
177 return sys_shmget (first, second, third); 177 return sys_shmget(first, second, third);
178 case SHMCTL: 178 case SHMCTL:
179 return sys_shmctl (first, second, 179 return sys_shmctl(first, second,
180 (struct shmid_ds __user *) ptr); 180 (struct shmid_ds __user *) ptr);
181 default: 181 default:
182 return -ENOSYS; 182 return -ENOSYS;
@@ -186,28 +186,28 @@ asmlinkage int sys_ipc (uint call, int first, int second,
186/* 186/*
187 * Old cruft 187 * Old cruft
188 */ 188 */
189asmlinkage int sys_uname(struct old_utsname __user * name) 189asmlinkage int sys_uname(struct old_utsname __user *name)
190{ 190{
191 int err; 191 int err;
192 if (!name) 192 if (!name)
193 return -EFAULT; 193 return -EFAULT;
194 down_read(&uts_sem); 194 down_read(&uts_sem);
195 err = copy_to_user(name, utsname(), sizeof (*name)); 195 err = copy_to_user(name, utsname(), sizeof(*name));
196 up_read(&uts_sem); 196 up_read(&uts_sem);
197 return err?-EFAULT:0; 197 return err? -EFAULT:0;
198} 198}
199 199
200asmlinkage int sys_olduname(struct oldold_utsname __user * name) 200asmlinkage int sys_olduname(struct oldold_utsname __user *name)
201{ 201{
202 int error; 202 int error;
203 203
204 if (!name) 204 if (!name)
205 return -EFAULT; 205 return -EFAULT;
206 if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname))) 206 if (!access_ok(VERIFY_WRITE, name, sizeof(struct oldold_utsname)))
207 return -EFAULT; 207 return -EFAULT;
208 208
209 down_read(&uts_sem); 209 down_read(&uts_sem);
210 210
211 error = __copy_to_user(&name->sysname, &utsname()->sysname, 211 error = __copy_to_user(&name->sysname, &utsname()->sysname,
212 __OLD_UTS_LEN); 212 __OLD_UTS_LEN);
213 error |= __put_user(0, name->sysname + __OLD_UTS_LEN); 213 error |= __put_user(0, name->sysname + __OLD_UTS_LEN);
@@ -223,9 +223,9 @@ asmlinkage int sys_olduname(struct oldold_utsname __user * name)
223 error |= __copy_to_user(&name->machine, &utsname()->machine, 223 error |= __copy_to_user(&name->machine, &utsname()->machine,
224 __OLD_UTS_LEN); 224 __OLD_UTS_LEN);
225 error |= __put_user(0, name->machine + __OLD_UTS_LEN); 225 error |= __put_user(0, name->machine + __OLD_UTS_LEN);
226 226
227 up_read(&uts_sem); 227 up_read(&uts_sem);
228 228
229 error = error ? -EFAULT : 0; 229 error = error ? -EFAULT : 0;
230 230
231 return error; 231 return error;
@@ -241,6 +241,6 @@ int kernel_execve(const char *filename, char *const argv[], char *const envp[])
241 long __res; 241 long __res;
242 asm volatile ("push %%ebx ; movl %2,%%ebx ; int $0x80 ; pop %%ebx" 242 asm volatile ("push %%ebx ; movl %2,%%ebx ; int $0x80 ; pop %%ebx"
243 : "=a" (__res) 243 : "=a" (__res)
244 : "0" (__NR_execve),"ri" (filename),"c" (argv), "d" (envp) : "memory"); 244 : "0" (__NR_execve), "ri" (filename), "c" (argv), "d" (envp) : "memory");
245 return __res; 245 return __res;
246} 246}
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 2ff21f398934..5f29f12da50c 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -84,8 +84,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
84 if (timer_ack) { 84 if (timer_ack) {
85 /* 85 /*
86 * Subtle, when I/O APICs are used we have to ack timer IRQ 86 * Subtle, when I/O APICs are used we have to ack timer IRQ
87 * manually to reset the IRR bit for do_slow_gettimeoffset(). 87 * manually to deassert NMI lines for the watchdog if run
88 * This will also deassert NMI lines for the watchdog if run
89 * on an 82489DX-based system. 88 * on an 82489DX-based system.
90 */ 89 */
91 spin_lock(&i8259A_lock); 90 spin_lock(&i8259A_lock);
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index c737849e2ef7..39ae8511a137 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -123,6 +123,8 @@ void __init time_init(void)
123 (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)) 123 (boot_cpu_data.x86_vendor == X86_VENDOR_AMD))
124 cpu_khz = calculate_cpu_khz(); 124 cpu_khz = calculate_cpu_khz();
125 125
126 lpj_fine = ((unsigned long)tsc_khz * 1000)/HZ;
127
126 if (unsynchronized_tsc()) 128 if (unsynchronized_tsc())
127 mark_tsc_unstable("TSCs unsynchronized"); 129 mark_tsc_unstable("TSCs unsynchronized");
128 130
diff --git a/arch/x86/kernel/traps_64.c b/arch/x86/kernel/traps_64.c
index adff76ea97c4..ec6d3b2130c4 100644
--- a/arch/x86/kernel/traps_64.c
+++ b/arch/x86/kernel/traps_64.c
@@ -71,7 +71,6 @@ asmlinkage void general_protection(void);
71asmlinkage void page_fault(void); 71asmlinkage void page_fault(void);
72asmlinkage void coprocessor_error(void); 72asmlinkage void coprocessor_error(void);
73asmlinkage void simd_coprocessor_error(void); 73asmlinkage void simd_coprocessor_error(void);
74asmlinkage void reserved(void);
75asmlinkage void alignment_check(void); 74asmlinkage void alignment_check(void);
76asmlinkage void machine_check(void); 75asmlinkage void machine_check(void);
77asmlinkage void spurious_interrupt_bug(void); 76asmlinkage void spurious_interrupt_bug(void);
@@ -702,12 +701,10 @@ DO_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
702DO_ERROR( 4, SIGSEGV, "overflow", overflow) 701DO_ERROR( 4, SIGSEGV, "overflow", overflow)
703DO_ERROR( 5, SIGSEGV, "bounds", bounds) 702DO_ERROR( 5, SIGSEGV, "bounds", bounds)
704DO_ERROR_INFO( 6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip) 703DO_ERROR_INFO( 6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
705DO_ERROR( 7, SIGSEGV, "device not available", device_not_available)
706DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun) 704DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
707DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS) 705DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
708DO_ERROR(11, SIGBUS, "segment not present", segment_not_present) 706DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
709DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0) 707DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
710DO_ERROR(18, SIGSEGV, "reserved", reserved)
711 708
712/* Runs on IST stack */ 709/* Runs on IST stack */
713asmlinkage void do_stack_segment(struct pt_regs *regs, long error_code) 710asmlinkage void do_stack_segment(struct pt_regs *regs, long error_code)
diff --git a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c
index 65b70637ad97..6240922e497c 100644
--- a/arch/x86/kernel/tsc_32.c
+++ b/arch/x86/kernel/tsc_32.c
@@ -1,6 +1,7 @@
1#include <linux/sched.h> 1#include <linux/sched.h>
2#include <linux/clocksource.h> 2#include <linux/clocksource.h>
3#include <linux/workqueue.h> 3#include <linux/workqueue.h>
4#include <linux/delay.h>
4#include <linux/cpufreq.h> 5#include <linux/cpufreq.h>
5#include <linux/jiffies.h> 6#include <linux/jiffies.h>
6#include <linux/init.h> 7#include <linux/init.h>
@@ -286,7 +287,6 @@ core_initcall(cpufreq_tsc);
286 287
287/* clock source code */ 288/* clock source code */
288 289
289static unsigned long current_tsc_khz;
290static struct clocksource clocksource_tsc; 290static struct clocksource clocksource_tsc;
291 291
292/* 292/*
@@ -404,6 +404,7 @@ static inline void check_geode_tsc_reliable(void) { }
404void __init tsc_init(void) 404void __init tsc_init(void)
405{ 405{
406 int cpu; 406 int cpu;
407 u64 lpj;
407 408
408 if (!cpu_has_tsc || tsc_disabled > 0) 409 if (!cpu_has_tsc || tsc_disabled > 0)
409 return; 410 return;
@@ -416,6 +417,10 @@ void __init tsc_init(void)
416 return; 417 return;
417 } 418 }
418 419
420 lpj = ((u64)tsc_khz * 1000);
421 do_div(lpj, HZ);
422 lpj_fine = lpj;
423
419 /* now allow native_sched_clock() to use rdtsc */ 424 /* now allow native_sched_clock() to use rdtsc */
420 tsc_disabled = 0; 425 tsc_disabled = 0;
421 426
@@ -439,9 +444,8 @@ void __init tsc_init(void)
439 444
440 unsynchronized_tsc(); 445 unsynchronized_tsc();
441 check_geode_tsc_reliable(); 446 check_geode_tsc_reliable();
442 current_tsc_khz = tsc_khz; 447 clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
443 clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz, 448 clocksource_tsc.shift);
444 clocksource_tsc.shift);
445 /* lower the rating if we already know its unstable: */ 449 /* lower the rating if we already know its unstable: */
446 if (check_tsc_unstable()) { 450 if (check_tsc_unstable()) {
447 clocksource_tsc.rating = 0; 451 clocksource_tsc.rating = 0;
diff --git a/arch/x86/kernel/tsc_64.c b/arch/x86/kernel/tsc_64.c
index 1784b8077a12..9898fb01edfd 100644
--- a/arch/x86/kernel/tsc_64.c
+++ b/arch/x86/kernel/tsc_64.c
@@ -242,7 +242,7 @@ void __init tsc_calibrate(void)
242 if (hpet) { 242 if (hpet) {
243 printk(KERN_INFO "TSC calibrated against HPET\n"); 243 printk(KERN_INFO "TSC calibrated against HPET\n");
244 if (hpet2 < hpet1) 244 if (hpet2 < hpet1)
245 hpet2 += 0x100000000; 245 hpet2 += 0x100000000UL;
246 hpet2 -= hpet1; 246 hpet2 -= hpet1;
247 tsc1 = (hpet2 * hpet_readl(HPET_PERIOD)) / 1000000; 247 tsc1 = (hpet2 * hpet_readl(HPET_PERIOD)) / 1000000;
248 } else { 248 } else {
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index a2b030780aa9..ba7d19e102b1 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -33,8 +33,7 @@
33#include <asm/apic.h> 33#include <asm/apic.h>
34#include <asm/timer.h> 34#include <asm/timer.h>
35#include <asm/i8253.h> 35#include <asm/i8253.h>
36 36#include <asm/irq_vectors.h>
37#include <irq_vectors.h>
38 37
39#define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT | VMI_CYCLES_REAL | vmi_get_alarm_wiring()) 38#define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
40#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring()) 39#define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring())
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index ce5ed083a1e9..2674f5796275 100644
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
@@ -60,13 +60,6 @@ SECTIONS
60 60
61 BUG_TABLE :text 61 BUG_TABLE :text
62 62
63 . = ALIGN(4);
64 .tracedata : AT(ADDR(.tracedata) - LOAD_OFFSET) {
65 __tracedata_start = .;
66 *(.tracedata)
67 __tracedata_end = .;
68 }
69
70 RODATA 63 RODATA
71 64
72 /* writeable */ 65 /* writeable */
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
index fad3674b06a5..fd246e22fe6b 100644
--- a/arch/x86/kernel/vmlinux_64.lds.S
+++ b/arch/x86/kernel/vmlinux_64.lds.S
@@ -53,13 +53,6 @@ SECTIONS
53 53
54 RODATA 54 RODATA
55 55
56 . = ALIGN(4);
57 .tracedata : AT(ADDR(.tracedata) - LOAD_OFFSET) {
58 __tracedata_start = .;
59 *(.tracedata)
60 __tracedata_end = .;
61 }
62
63 . = ALIGN(PAGE_SIZE); /* Align data segment to page size boundary */ 56 . = ALIGN(PAGE_SIZE); /* Align data segment to page size boundary */
64 /* Data */ 57 /* Data */
65 .data : AT(ADDR(.data) - LOAD_OFFSET) { 58 .data : AT(ADDR(.data) - LOAD_OFFSET) {
@@ -177,6 +170,7 @@ SECTIONS
177 *(.con_initcall.init) 170 *(.con_initcall.init)
178 } 171 }
179 __con_initcall_end = .; 172 __con_initcall_end = .;
173 . = ALIGN(16);
180 __x86cpuvendor_start = .; 174 __x86cpuvendor_start = .;
181 .x86cpuvendor.init : AT(ADDR(.x86cpuvendor.init) - LOAD_OFFSET) { 175 .x86cpuvendor.init : AT(ADDR(.x86cpuvendor.init) - LOAD_OFFSET) {
182 *(.x86cpuvendor.init) 176 *(.x86cpuvendor.init)
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index ba8c0b75ab0a..0c029e8959c7 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -15,9 +15,12 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/pci_ids.h> 16#include <linux/pci_ids.h>
17#include <linux/pci_regs.h> 17#include <linux/pci_regs.h>
18
19#include <asm/apic.h>
18#include <asm/pci-direct.h> 20#include <asm/pci-direct.h>
19#include <asm/io.h> 21#include <asm/io.h>
20#include <asm/paravirt.h> 22#include <asm/paravirt.h>
23#include <asm/setup.h>
21 24
22#if defined CONFIG_PCI && defined CONFIG_PARAVIRT 25#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
23/* 26/*
diff --git a/arch/x86/lib/delay_32.c b/arch/x86/lib/delay_32.c
index d710f2d167bb..ef691316f8b6 100644
--- a/arch/x86/lib/delay_32.c
+++ b/arch/x86/lib/delay_32.c
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 1993 Linus Torvalds 4 * Copyright (C) 1993 Linus Torvalds
5 * Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz> 5 * Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 * Copyright (C) 2008 Jiri Hladky <hladky _dot_ jiri _at_ gmail _dot_ com>
6 * 7 *
7 * The __delay function must _NOT_ be inlined as its execution time 8 * The __delay function must _NOT_ be inlined as its execution time
8 * depends wildly on alignment on many x86 processors. The additional 9 * depends wildly on alignment on many x86 processors. The additional
@@ -28,16 +29,22 @@
28/* simple loop based delay: */ 29/* simple loop based delay: */
29static void delay_loop(unsigned long loops) 30static void delay_loop(unsigned long loops)
30{ 31{
31 int d0;
32
33 __asm__ __volatile__( 32 __asm__ __volatile__(
34 "\tjmp 1f\n" 33 " test %0,%0 \n"
35 ".align 16\n" 34 " jz 3f \n"
36 "1:\tjmp 2f\n" 35 " jmp 1f \n"
37 ".align 16\n" 36
38 "2:\tdecl %0\n\tjns 2b" 37 ".align 16 \n"
39 :"=&a" (d0) 38 "1: jmp 2f \n"
40 :"0" (loops)); 39
40 ".align 16 \n"
41 "2: decl %0 \n"
42 " jnz 2b \n"
43 "3: decl %0 \n"
44
45 : /* we don't need output */
46 :"a" (loops)
47 );
41} 48}
42 49
43/* TSC based delay: */ 50/* TSC based delay: */
diff --git a/arch/x86/mach-visws/visws_apic.c b/arch/x86/mach-visws/visws_apic.c
index cef9cb1d15ac..d8b2cfd85d92 100644
--- a/arch/x86/mach-visws/visws_apic.c
+++ b/arch/x86/mach-visws/visws_apic.c
@@ -21,10 +21,9 @@
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/apic.h> 22#include <asm/apic.h>
23#include <asm/i8259.h> 23#include <asm/i8259.h>
24#include <asm/irq_vectors.h>
24 25
25#include "cobalt.h" 26#include "cobalt.h"
26#include "irq_vectors.h"
27
28 27
29static DEFINE_SPINLOCK(cobalt_lock); 28static DEFINE_SPINLOCK(cobalt_lock);
30 29
diff --git a/arch/x86/math-emu/reg_constant.c b/arch/x86/math-emu/reg_constant.c
index 04869e64b18e..00548354912f 100644
--- a/arch/x86/math-emu/reg_constant.c
+++ b/arch/x86/math-emu/reg_constant.c
@@ -16,8 +16,8 @@
16#include "reg_constant.h" 16#include "reg_constant.h"
17#include "control_w.h" 17#include "control_w.h"
18 18
19#define MAKE_REG(s,e,l,h) { l, h, \ 19#define MAKE_REG(s, e, l, h) { l, h, \
20 ((EXTENDED_Ebias+(e)) | ((SIGN_##s != 0)*0x8000)) } 20 ((EXTENDED_Ebias+(e)) | ((SIGN_##s != 0)*0x8000)) }
21 21
22FPU_REG const CONST_1 = MAKE_REG(POS, 0, 0x00000000, 0x80000000); 22FPU_REG const CONST_1 = MAKE_REG(POS, 0, 0x00000000, 0x80000000);
23#if 0 23#if 0
@@ -40,7 +40,7 @@ FPU_REG const CONST_PI2extra = MAKE_REG(NEG, -66,
40FPU_REG const CONST_Z = MAKE_REG(POS, EXP_UNDER, 0x0, 0x0); 40FPU_REG const CONST_Z = MAKE_REG(POS, EXP_UNDER, 0x0, 0x0);
41 41
42/* Only the sign and significand (and tag) are used in internal NaNs */ 42/* Only the sign and significand (and tag) are used in internal NaNs */
43/* The 80486 never generates one of these 43/* The 80486 never generates one of these
44FPU_REG const CONST_SNAN = MAKE_REG(POS, EXP_OVER, 0x00000001, 0x80000000); 44FPU_REG const CONST_SNAN = MAKE_REG(POS, EXP_OVER, 0x00000001, 0x80000000);
45 */ 45 */
46/* This is the real indefinite QNaN */ 46/* This is the real indefinite QNaN */
@@ -49,7 +49,7 @@ FPU_REG const CONST_QNaN = MAKE_REG(NEG, EXP_OVER, 0x00000000, 0xC0000000);
49/* Only the sign (and tag) is used in internal infinities */ 49/* Only the sign (and tag) is used in internal infinities */
50FPU_REG const CONST_INF = MAKE_REG(POS, EXP_OVER, 0x00000000, 0x80000000); 50FPU_REG const CONST_INF = MAKE_REG(POS, EXP_OVER, 0x00000000, 0x80000000);
51 51
52static void fld_const(FPU_REG const *c, int adj, u_char tag) 52static void fld_const(FPU_REG const * c, int adj, u_char tag)
53{ 53{
54 FPU_REG *st_new_ptr; 54 FPU_REG *st_new_ptr;
55 55
diff --git a/arch/x86/mm/discontig_32.c b/arch/x86/mm/discontig_32.c
index 6216e43b6e95..a2f73ba42b8b 100644
--- a/arch/x86/mm/discontig_32.c
+++ b/arch/x86/mm/discontig_32.c
@@ -156,7 +156,7 @@ static void __init propagate_e820_map_node(int nid)
156 */ 156 */
157static void __init allocate_pgdat(int nid) 157static void __init allocate_pgdat(int nid)
158{ 158{
159 if (nid && node_has_online_mem(nid)) 159 if (nid && node_has_online_mem(nid) && node_remap_start_vaddr[nid])
160 NODE_DATA(nid) = (pg_data_t *)node_remap_start_vaddr[nid]; 160 NODE_DATA(nid) = (pg_data_t *)node_remap_start_vaddr[nid];
161 else { 161 else {
162 unsigned long pgdat_phys; 162 unsigned long pgdat_phys;
@@ -172,16 +172,13 @@ static void __init allocate_pgdat(int nid)
172 nid, (unsigned long)NODE_DATA(nid)); 172 nid, (unsigned long)NODE_DATA(nid));
173} 173}
174 174
175#ifdef CONFIG_DISCONTIGMEM
176/* 175/*
177 * In the discontig memory model, a portion of the kernel virtual area (KVA) 176 * In the DISCONTIGMEM and SPARSEMEM memory model, a portion of the kernel
178 * is reserved and portions of nodes are mapped using it. This is to allow 177 * virtual address space (KVA) is reserved and portions of nodes are mapped
179 * node-local memory to be allocated for structures that would normally require 178 * using it. This is to allow node-local memory to be allocated for
180 * ZONE_NORMAL. The memory is allocated with alloc_remap() and callers 179 * structures that would normally require ZONE_NORMAL. The memory is
181 * should be prepared to allocate from the bootmem allocator instead. This KVA 180 * allocated with alloc_remap() and callers should be prepared to allocate
182 * mechanism is incompatible with SPARSEMEM as it makes assumptions about the 181 * from the bootmem allocator instead.
183 * layout of memory that are broken if alloc_remap() succeeds for some of the
184 * map and fails for others
185 */ 182 */
186static unsigned long node_remap_start_pfn[MAX_NUMNODES]; 183static unsigned long node_remap_start_pfn[MAX_NUMNODES];
187static void *node_remap_end_vaddr[MAX_NUMNODES]; 184static void *node_remap_end_vaddr[MAX_NUMNODES];
@@ -311,25 +308,6 @@ static void init_remap_allocator(int nid)
311 (ulong) node_remap_start_vaddr[nid], 308 (ulong) node_remap_start_vaddr[nid],
312 (ulong) node_remap_end_vaddr[nid]); 309 (ulong) node_remap_end_vaddr[nid]);
313} 310}
314#else
315void *alloc_remap(int nid, unsigned long size)
316{
317 return NULL;
318}
319
320static unsigned long calculate_numa_remap_pages(void)
321{
322 return 0;
323}
324
325static void init_remap_allocator(int nid)
326{
327}
328
329void __init remap_numa_kva(void)
330{
331}
332#endif /* CONFIG_DISCONTIGMEM */
333 311
334extern void setup_bootmem_allocator(void); 312extern void setup_bootmem_allocator(void);
335unsigned long __init setup_memory(void) 313unsigned long __init setup_memory(void)
@@ -480,3 +458,21 @@ int memory_add_physaddr_to_nid(u64 addr)
480 458
481EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); 459EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
482#endif 460#endif
461
462#if defined(CONFIG_ACPI_NUMA) && !defined(CONFIG_HAVE_ARCH_PARSE_SRAT)
463/*
464 * Dummy on 32-bit, for now:
465 */
466void __init acpi_numa_slit_init(struct acpi_table_slit *slit)
467{
468}
469
470void __init
471acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa)
472{
473}
474
475void __init acpi_numa_arch_fixup(void)
476{
477}
478#endif
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index 2c24bea92c66..0bb0caed8971 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -42,7 +42,7 @@ static struct addr_marker address_markers[] = {
42 { 0, "User Space" }, 42 { 0, "User Space" },
43#ifdef CONFIG_X86_64 43#ifdef CONFIG_X86_64
44 { 0x8000000000000000UL, "Kernel Space" }, 44 { 0x8000000000000000UL, "Kernel Space" },
45 { 0xffff810000000000UL, "Low Kernel Mapping" }, 45 { PAGE_OFFSET, "Low Kernel Mapping" },
46 { VMALLOC_START, "vmalloc() Area" }, 46 { VMALLOC_START, "vmalloc() Area" },
47 { VMEMMAP_START, "Vmemmap" }, 47 { VMEMMAP_START, "Vmemmap" },
48 { __START_KERNEL_map, "High Kernel Mapping" }, 48 { __START_KERNEL_map, "High Kernel Mapping" },
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index 8bcb6f40ccb6..578b76819551 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -55,11 +55,7 @@ static inline int notify_page_fault(struct pt_regs *regs)
55 int ret = 0; 55 int ret = 0;
56 56
57 /* kprobe_running() needs smp_processor_id() */ 57 /* kprobe_running() needs smp_processor_id() */
58#ifdef CONFIG_X86_32
59 if (!user_mode_vm(regs)) { 58 if (!user_mode_vm(regs)) {
60#else
61 if (!user_mode(regs)) {
62#endif
63 preempt_disable(); 59 preempt_disable();
64 if (kprobe_running() && kprobe_fault_handler(regs, 14)) 60 if (kprobe_running() && kprobe_fault_handler(regs, 14))
65 ret = 1; 61 ret = 1;
@@ -396,11 +392,7 @@ static void show_fault_oops(struct pt_regs *regs, unsigned long error_code,
396 printk(KERN_CONT "NULL pointer dereference"); 392 printk(KERN_CONT "NULL pointer dereference");
397 else 393 else
398 printk(KERN_CONT "paging request"); 394 printk(KERN_CONT "paging request");
399#ifdef CONFIG_X86_32 395 printk(KERN_CONT " at %p\n", (void *) address);
400 printk(KERN_CONT " at %08lx\n", address);
401#else
402 printk(KERN_CONT " at %016lx\n", address);
403#endif
404 printk(KERN_ALERT "IP:"); 396 printk(KERN_ALERT "IP:");
405 printk_address(regs->ip, 1); 397 printk_address(regs->ip, 1);
406 dump_pagetable(address); 398 dump_pagetable(address);
@@ -800,14 +792,10 @@ bad_area_nosemaphore:
800 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && 792 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
801 printk_ratelimit()) { 793 printk_ratelimit()) {
802 printk( 794 printk(
803#ifdef CONFIG_X86_32 795 "%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
804 "%s%s[%d]: segfault at %lx ip %08lx sp %08lx error %lx",
805#else
806 "%s%s[%d]: segfault at %lx ip %lx sp %lx error %lx",
807#endif
808 task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, 796 task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
809 tsk->comm, task_pid_nr(tsk), address, regs->ip, 797 tsk->comm, task_pid_nr(tsk), address,
810 regs->sp, error_code); 798 (void *) regs->ip, (void *) regs->sp, error_code);
811 print_vma_addr(" in ", regs->ip); 799 print_vma_addr(" in ", regs->ip);
812 printk("\n"); 800 printk("\n");
813 } 801 }
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index fb5694d788bf..65d55056b6e7 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -162,6 +162,7 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
162 pgd_t *pgd; 162 pgd_t *pgd;
163 pmd_t *pmd; 163 pmd_t *pmd;
164 pte_t *pte; 164 pte_t *pte;
165 unsigned pages_2m = 0, pages_4k = 0;
165 166
166 pgd_idx = pgd_index(PAGE_OFFSET); 167 pgd_idx = pgd_index(PAGE_OFFSET);
167 pgd = pgd_base + pgd_idx; 168 pgd = pgd_base + pgd_idx;
@@ -197,6 +198,7 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
197 is_kernel_text(addr2)) 198 is_kernel_text(addr2))
198 prot = PAGE_KERNEL_LARGE_EXEC; 199 prot = PAGE_KERNEL_LARGE_EXEC;
199 200
201 pages_2m++;
200 set_pmd(pmd, pfn_pmd(pfn, prot)); 202 set_pmd(pmd, pfn_pmd(pfn, prot));
201 203
202 pfn += PTRS_PER_PTE; 204 pfn += PTRS_PER_PTE;
@@ -213,11 +215,14 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
213 if (is_kernel_text(addr)) 215 if (is_kernel_text(addr))
214 prot = PAGE_KERNEL_EXEC; 216 prot = PAGE_KERNEL_EXEC;
215 217
218 pages_4k++;
216 set_pte(pte, pfn_pte(pfn, prot)); 219 set_pte(pte, pfn_pte(pfn, prot));
217 } 220 }
218 max_pfn_mapped = pfn; 221 max_pfn_mapped = pfn;
219 } 222 }
220 } 223 }
224 update_page_count(PG_LEVEL_2M, pages_2m);
225 update_page_count(PG_LEVEL_4K, pages_4k);
221} 226}
222 227
223/* 228/*
@@ -593,17 +598,6 @@ void __init mem_init(void)
593#ifdef CONFIG_FLATMEM 598#ifdef CONFIG_FLATMEM
594 BUG_ON(!mem_map); 599 BUG_ON(!mem_map);
595#endif 600#endif
596#ifdef CONFIG_HIGHMEM
597 /* check that fixmap and pkmap do not overlap */
598 if (PKMAP_BASE + LAST_PKMAP*PAGE_SIZE >= FIXADDR_START) {
599 printk(KERN_ERR
600 "fixmap and kmap areas overlap - this will crash\n");
601 printk(KERN_ERR "pkstart: %lxh pkend: %lxh fixstart %lxh\n",
602 PKMAP_BASE, PKMAP_BASE + LAST_PKMAP*PAGE_SIZE,
603 FIXADDR_START);
604 BUG();
605 }
606#endif
607 /* this will put all low memory onto the freelists */ 601 /* this will put all low memory onto the freelists */
608 totalram_pages += free_all_bootmem(); 602 totalram_pages += free_all_bootmem();
609 603
@@ -636,7 +630,6 @@ void __init mem_init(void)
636 (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)) 630 (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))
637 ); 631 );
638 632
639#if 1 /* double-sanity-check paranoia */
640 printk(KERN_INFO "virtual kernel memory layout:\n" 633 printk(KERN_INFO "virtual kernel memory layout:\n"
641 " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n" 634 " fixmap : 0x%08lx - 0x%08lx (%4ld kB)\n"
642#ifdef CONFIG_HIGHMEM 635#ifdef CONFIG_HIGHMEM
@@ -677,7 +670,6 @@ void __init mem_init(void)
677#endif 670#endif
678 BUG_ON(VMALLOC_START > VMALLOC_END); 671 BUG_ON(VMALLOC_START > VMALLOC_END);
679 BUG_ON((unsigned long)high_memory > VMALLOC_START); 672 BUG_ON((unsigned long)high_memory > VMALLOC_START);
680#endif /* double-sanity-check paranoia */
681 673
682 if (boot_cpu_data.wp_works_ok < 0) 674 if (boot_cpu_data.wp_works_ok < 0)
683 test_wp_bit(); 675 test_wp_bit();
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 5266f3141d6c..18c6a006e406 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -18,6 +18,7 @@
18#include <linux/swap.h> 18#include <linux/swap.h>
19#include <linux/smp.h> 19#include <linux/smp.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/initrd.h>
21#include <linux/pagemap.h> 22#include <linux/pagemap.h>
22#include <linux/bootmem.h> 23#include <linux/bootmem.h>
23#include <linux/proc_fs.h> 24#include <linux/proc_fs.h>
@@ -324,6 +325,8 @@ __meminit void early_iounmap(void *addr, unsigned long size)
324static unsigned long __meminit 325static unsigned long __meminit
325phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end) 326phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end)
326{ 327{
328 unsigned long pages = 0;
329
327 int i = pmd_index(address); 330 int i = pmd_index(address);
328 331
329 for (; i < PTRS_PER_PMD; i++, address += PMD_SIZE) { 332 for (; i < PTRS_PER_PMD; i++, address += PMD_SIZE) {
@@ -340,9 +343,11 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end)
340 if (pmd_val(*pmd)) 343 if (pmd_val(*pmd))
341 continue; 344 continue;
342 345
346 pages++;
343 set_pte((pte_t *)pmd, 347 set_pte((pte_t *)pmd,
344 pfn_pte(address >> PAGE_SHIFT, PAGE_KERNEL_LARGE)); 348 pfn_pte(address >> PAGE_SHIFT, PAGE_KERNEL_LARGE));
345 } 349 }
350 update_page_count(PG_LEVEL_2M, pages);
346 return address; 351 return address;
347} 352}
348 353
@@ -362,6 +367,7 @@ phys_pmd_update(pud_t *pud, unsigned long address, unsigned long end)
362static unsigned long __meminit 367static unsigned long __meminit
363phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end) 368phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end)
364{ 369{
370 unsigned long pages = 0;
365 unsigned long last_map_addr = end; 371 unsigned long last_map_addr = end;
366 int i = pud_index(addr); 372 int i = pud_index(addr);
367 373
@@ -386,6 +392,7 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end)
386 } 392 }
387 393
388 if (direct_gbpages) { 394 if (direct_gbpages) {
395 pages++;
389 set_pte((pte_t *)pud, 396 set_pte((pte_t *)pud,
390 pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_LARGE)); 397 pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_LARGE));
391 last_map_addr = (addr & PUD_MASK) + PUD_SIZE; 398 last_map_addr = (addr & PUD_MASK) + PUD_SIZE;
@@ -402,6 +409,7 @@ phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end)
402 unmap_low_page(pmd); 409 unmap_low_page(pmd);
403 } 410 }
404 __flush_tlb_all(); 411 __flush_tlb_all();
412 update_page_count(PG_LEVEL_1G, pages);
405 413
406 return last_map_addr >> PAGE_SHIFT; 414 return last_map_addr >> PAGE_SHIFT;
407} 415}
@@ -443,7 +451,7 @@ static void __init init_gbpages(void)
443 direct_gbpages = 0; 451 direct_gbpages = 0;
444} 452}
445 453
446#ifdef CONFIG_MEMTEST_BOOTPARAM 454#ifdef CONFIG_MEMTEST
447 455
448static void __init memtest(unsigned long start_phys, unsigned long size, 456static void __init memtest(unsigned long start_phys, unsigned long size,
449 unsigned pattern) 457 unsigned pattern)
@@ -505,7 +513,8 @@ static void __init memtest(unsigned long start_phys, unsigned long size,
505 513
506} 514}
507 515
508static int memtest_pattern __initdata = CONFIG_MEMTEST_BOOTPARAM_VALUE; 516/* default is disabled */
517static int memtest_pattern __initdata;
509 518
510static int __init parse_memtest(char *arg) 519static int __init parse_memtest(char *arg)
511{ 520{
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 2b2bb3f9b683..416ea415f5c2 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -142,7 +142,7 @@ static void __iomem *__ioremap_caller(resource_size_t phys_addr,
142 /* 142 /*
143 * Don't remap the low PCI/ISA area, it's always mapped.. 143 * Don't remap the low PCI/ISA area, it's always mapped..
144 */ 144 */
145 if (phys_addr >= ISA_START_ADDRESS && last_addr < ISA_END_ADDRESS) 145 if (is_ISA_range(phys_addr, last_addr))
146 return (__force void __iomem *)phys_to_virt(phys_addr); 146 return (__force void __iomem *)phys_to_virt(phys_addr);
147 147
148 /* 148 /*
@@ -261,7 +261,7 @@ void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size)
261{ 261{
262 /* 262 /*
263 * Ideally, this should be: 263 * Ideally, this should be:
264 * pat_wc_enabled ? _PAGE_CACHE_UC : _PAGE_CACHE_UC_MINUS; 264 * pat_enabled ? _PAGE_CACHE_UC : _PAGE_CACHE_UC_MINUS;
265 * 265 *
266 * Till we fix all X drivers to use ioremap_wc(), we will use 266 * Till we fix all X drivers to use ioremap_wc(), we will use
267 * UC MINUS. 267 * UC MINUS.
@@ -285,7 +285,7 @@ EXPORT_SYMBOL(ioremap_nocache);
285 */ 285 */
286void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size) 286void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size)
287{ 287{
288 if (pat_wc_enabled) 288 if (pat_enabled)
289 return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC, 289 return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC,
290 __builtin_return_address(0)); 290 __builtin_return_address(0));
291 else 291 else
@@ -318,8 +318,8 @@ void iounmap(volatile void __iomem *addr)
318 * vm_area and by simply returning an address into the kernel mapping 318 * vm_area and by simply returning an address into the kernel mapping
319 * of ISA space. So handle that here. 319 * of ISA space. So handle that here.
320 */ 320 */
321 if (addr >= phys_to_virt(ISA_START_ADDRESS) && 321 if ((void __force *)addr >= phys_to_virt(ISA_START_ADDRESS) &&
322 addr < phys_to_virt(ISA_END_ADDRESS)) 322 (void __force *)addr < phys_to_virt(ISA_END_ADDRESS))
323 return; 323 return;
324 324
325 addr = (volatile void __iomem *) 325 addr = (volatile void __iomem *)
@@ -332,7 +332,7 @@ void iounmap(volatile void __iomem *addr)
332 cpa takes care of the direct mappings. */ 332 cpa takes care of the direct mappings. */
333 read_lock(&vmlist_lock); 333 read_lock(&vmlist_lock);
334 for (p = vmlist; p; p = p->next) { 334 for (p = vmlist; p; p = p->next) {
335 if (p->addr == addr) 335 if (p->addr == (void __force *)addr)
336 break; 336 break;
337 } 337 }
338 read_unlock(&vmlist_lock); 338 read_unlock(&vmlist_lock);
@@ -346,7 +346,7 @@ void iounmap(volatile void __iomem *addr)
346 free_memtype(p->phys_addr, p->phys_addr + get_vm_area_size(p)); 346 free_memtype(p->phys_addr, p->phys_addr + get_vm_area_size(p));
347 347
348 /* Finally remove it */ 348 /* Finally remove it */
349 o = remove_vm_area((void *)addr); 349 o = remove_vm_area((void __force *)addr);
350 BUG_ON(p != o || o == NULL); 350 BUG_ON(p != o || o == NULL);
351 kfree(p); 351 kfree(p);
352} 352}
@@ -365,7 +365,7 @@ void *xlate_dev_mem_ptr(unsigned long phys)
365 if (page_is_ram(start >> PAGE_SHIFT)) 365 if (page_is_ram(start >> PAGE_SHIFT))
366 return __va(phys); 366 return __va(phys);
367 367
368 addr = (void *)ioremap(start, PAGE_SIZE); 368 addr = (void __force *)ioremap(start, PAGE_SIZE);
369 if (addr) 369 if (addr)
370 addr = (void *)((unsigned long)addr | (phys & ~PAGE_MASK)); 370 addr = (void *)((unsigned long)addr | (phys & ~PAGE_MASK));
371 371
diff --git a/arch/x86/mm/k8topology_64.c b/arch/x86/mm/k8topology_64.c
index f75aa2ae54a3..317573ec9256 100644
--- a/arch/x86/mm/k8topology_64.c
+++ b/arch/x86/mm/k8topology_64.c
@@ -22,6 +22,7 @@
22#include <asm/numa.h> 22#include <asm/numa.h>
23#include <asm/mpspec.h> 23#include <asm/mpspec.h>
24#include <asm/apic.h> 24#include <asm/apic.h>
25#include <asm/k8.h>
25 26
26static __init int find_northbridge(void) 27static __init int find_northbridge(void)
27{ 28{
@@ -77,17 +78,12 @@ static __init void early_get_boot_cpu_id(void)
77 78
78int __init k8_scan_nodes(unsigned long start, unsigned long end) 79int __init k8_scan_nodes(unsigned long start, unsigned long end)
79{ 80{
81 unsigned numnodes, cores, bits, apicid_base;
80 unsigned long prevbase; 82 unsigned long prevbase;
81 struct bootnode nodes[8]; 83 struct bootnode nodes[8];
82 int nodeid, i, nb;
83 unsigned char nodeids[8]; 84 unsigned char nodeids[8];
84 int found = 0; 85 int i, j, nb, found = 0;
85 u32 reg; 86 u32 nodeid, reg;
86 unsigned numnodes;
87 unsigned cores;
88 unsigned bits;
89 int j;
90 unsigned apicid_base;
91 87
92 if (!early_pci_allowed()) 88 if (!early_pci_allowed())
93 return -1; 89 return -1;
@@ -109,7 +105,6 @@ int __init k8_scan_nodes(unsigned long start, unsigned long end)
109 prevbase = 0; 105 prevbase = 0;
110 for (i = 0; i < 8; i++) { 106 for (i = 0; i < 8; i++) {
111 unsigned long base, limit; 107 unsigned long base, limit;
112 u32 nodeid;
113 108
114 base = read_pci_config(0, nb, 1, 0x40 + i*8); 109 base = read_pci_config(0, nb, 1, 0x40 + i*8);
115 limit = read_pci_config(0, nb, 1, 0x44 + i*8); 110 limit = read_pci_config(0, nb, 1, 0x44 + i*8);
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 60bcb5b6a37e..afd40054d157 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -34,6 +34,41 @@ struct cpa_data {
34 unsigned force_split : 1; 34 unsigned force_split : 1;
35}; 35};
36 36
37#ifdef CONFIG_PROC_FS
38static unsigned long direct_pages_count[PG_LEVEL_NUM];
39
40void update_page_count(int level, unsigned long pages)
41{
42 unsigned long flags;
43
44 /* Protect against CPA */
45 spin_lock_irqsave(&pgd_lock, flags);
46 direct_pages_count[level] += pages;
47 spin_unlock_irqrestore(&pgd_lock, flags);
48}
49
50static void split_page_count(int level)
51{
52 direct_pages_count[level]--;
53 direct_pages_count[level - 1] += PTRS_PER_PTE;
54}
55
56int arch_report_meminfo(char *page)
57{
58 int n = sprintf(page, "DirectMap4k: %8lu\n"
59 "DirectMap2M: %8lu\n",
60 direct_pages_count[PG_LEVEL_4K],
61 direct_pages_count[PG_LEVEL_2M]);
62#ifdef CONFIG_X86_64
63 n += sprintf(page + n, "DirectMap1G: %8lu\n",
64 direct_pages_count[PG_LEVEL_1G]);
65#endif
66 return n;
67}
68#else
69static inline void split_page_count(int level) { }
70#endif
71
37#ifdef CONFIG_X86_64 72#ifdef CONFIG_X86_64
38 73
39static inline unsigned long highmap_start_pfn(void) 74static inline unsigned long highmap_start_pfn(void)
@@ -500,6 +535,10 @@ static int split_large_page(pte_t *kpte, unsigned long address)
500 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc) 535 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
501 set_pte(&pbase[i], pfn_pte(pfn, ref_prot)); 536 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
502 537
538 if (address >= (unsigned long)__va(0) &&
539 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
540 split_page_count(level);
541
503 /* 542 /*
504 * Install the new, split up pagetable. Important details here: 543 * Install the new, split up pagetable. Important details here:
505 * 544 *
@@ -805,7 +844,7 @@ int _set_memory_wc(unsigned long addr, int numpages)
805 844
806int set_memory_wc(unsigned long addr, int numpages) 845int set_memory_wc(unsigned long addr, int numpages)
807{ 846{
808 if (!pat_wc_enabled) 847 if (!pat_enabled)
809 return set_memory_uc(addr, numpages); 848 return set_memory_uc(addr, numpages);
810 849
811 if (reserve_memtype(addr, addr + numpages * PAGE_SIZE, 850 if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 06b7a1c90fb8..a885a1019b8a 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -26,11 +26,11 @@
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28#ifdef CONFIG_X86_PAT 28#ifdef CONFIG_X86_PAT
29int __read_mostly pat_wc_enabled = 1; 29int __read_mostly pat_enabled = 1;
30 30
31void __cpuinit pat_disable(char *reason) 31void __cpuinit pat_disable(char *reason)
32{ 32{
33 pat_wc_enabled = 0; 33 pat_enabled = 0;
34 printk(KERN_INFO "%s\n", reason); 34 printk(KERN_INFO "%s\n", reason);
35} 35}
36 36
@@ -42,6 +42,19 @@ static int __init nopat(char *str)
42early_param("nopat", nopat); 42early_param("nopat", nopat);
43#endif 43#endif
44 44
45
46static int debug_enable;
47static int __init pat_debug_setup(char *str)
48{
49 debug_enable = 1;
50 return 0;
51}
52__setup("debugpat", pat_debug_setup);
53
54#define dprintk(fmt, arg...) \
55 do { if (debug_enable) printk(KERN_INFO fmt, ##arg); } while (0)
56
57
45static u64 __read_mostly boot_pat_state; 58static u64 __read_mostly boot_pat_state;
46 59
47enum { 60enum {
@@ -53,24 +66,25 @@ enum {
53 PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ 66 PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */
54}; 67};
55 68
56#define PAT(x,y) ((u64)PAT_ ## y << ((x)*8)) 69#define PAT(x, y) ((u64)PAT_ ## y << ((x)*8))
57 70
58void pat_init(void) 71void pat_init(void)
59{ 72{
60 u64 pat; 73 u64 pat;
61 74
62 if (!pat_wc_enabled) 75 if (!pat_enabled)
63 return; 76 return;
64 77
65 /* Paranoia check. */ 78 /* Paranoia check. */
66 if (!cpu_has_pat) { 79 if (!cpu_has_pat && boot_pat_state) {
67 printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
68 /* 80 /*
69 * Panic if this happens on the secondary CPU, and we 81 * If this happens we are on a secondary CPU, but
70 * switched to PAT on the boot CPU. We have no way to 82 * switched to PAT on the boot CPU. We have no way to
71 * undo PAT. 83 * undo PAT.
72 */ 84 */
73 BUG_ON(boot_pat_state); 85 printk(KERN_ERR "PAT enabled, "
86 "but not supported by secondary CPU\n");
87 BUG();
74 } 88 }
75 89
76 /* Set PWT to Write-Combining. All other bits stay the same */ 90 /* Set PWT to Write-Combining. All other bits stay the same */
@@ -86,8 +100,8 @@ void pat_init(void)
86 * 011 UC _PAGE_CACHE_UC 100 * 011 UC _PAGE_CACHE_UC
87 * PAT bit unused 101 * PAT bit unused
88 */ 102 */
89 pat = PAT(0,WB) | PAT(1,WC) | PAT(2,UC_MINUS) | PAT(3,UC) | 103 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
90 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC); 104 PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
91 105
92 /* Boot CPU check */ 106 /* Boot CPU check */
93 if (!boot_pat_state) 107 if (!boot_pat_state)
@@ -103,11 +117,11 @@ void pat_init(void)
103static char *cattr_name(unsigned long flags) 117static char *cattr_name(unsigned long flags)
104{ 118{
105 switch (flags & _PAGE_CACHE_MASK) { 119 switch (flags & _PAGE_CACHE_MASK) {
106 case _PAGE_CACHE_UC: return "uncached"; 120 case _PAGE_CACHE_UC: return "uncached";
107 case _PAGE_CACHE_UC_MINUS: return "uncached-minus"; 121 case _PAGE_CACHE_UC_MINUS: return "uncached-minus";
108 case _PAGE_CACHE_WB: return "write-back"; 122 case _PAGE_CACHE_WB: return "write-back";
109 case _PAGE_CACHE_WC: return "write-combining"; 123 case _PAGE_CACHE_WC: return "write-combining";
110 default: return "broken"; 124 default: return "broken";
111 } 125 }
112} 126}
113 127
@@ -145,47 +159,50 @@ static DEFINE_SPINLOCK(memtype_lock); /* protects memtype list */
145 * The intersection is based on "Effective Memory Type" tables in IA-32 159 * The intersection is based on "Effective Memory Type" tables in IA-32
146 * SDM vol 3a 160 * SDM vol 3a
147 */ 161 */
148static int pat_x_mtrr_type(u64 start, u64 end, unsigned long prot, 162static unsigned long pat_x_mtrr_type(u64 start, u64 end, unsigned long req_type)
149 unsigned long *ret_prot)
150{ 163{
151 unsigned long pat_type;
152 u8 mtrr_type;
153
154 pat_type = prot & _PAGE_CACHE_MASK;
155 prot &= (~_PAGE_CACHE_MASK);
156
157 /*
158 * We return the PAT request directly for types where PAT takes
159 * precedence with respect to MTRR and for UC_MINUS.
160 * Consistency checks with other PAT requests is done later
161 * while going through memtype list.
162 */
163 if (pat_type == _PAGE_CACHE_WC) {
164 *ret_prot = prot | _PAGE_CACHE_WC;
165 return 0;
166 } else if (pat_type == _PAGE_CACHE_UC_MINUS) {
167 *ret_prot = prot | _PAGE_CACHE_UC_MINUS;
168 return 0;
169 } else if (pat_type == _PAGE_CACHE_UC) {
170 *ret_prot = prot | _PAGE_CACHE_UC;
171 return 0;
172 }
173
174 /* 164 /*
175 * Look for MTRR hint to get the effective type in case where PAT 165 * Look for MTRR hint to get the effective type in case where PAT
176 * request is for WB. 166 * request is for WB.
177 */ 167 */
178 mtrr_type = mtrr_type_lookup(start, end); 168 if (req_type == _PAGE_CACHE_WB) {
169 u8 mtrr_type;
170
171 mtrr_type = mtrr_type_lookup(start, end);
172 if (mtrr_type == MTRR_TYPE_UNCACHABLE)
173 return _PAGE_CACHE_UC;
174 if (mtrr_type == MTRR_TYPE_WRCOMB)
175 return _PAGE_CACHE_WC;
176 }
179 177
180 if (mtrr_type == MTRR_TYPE_UNCACHABLE) { 178 return req_type;
181 *ret_prot = prot | _PAGE_CACHE_UC; 179}
182 } else if (mtrr_type == MTRR_TYPE_WRCOMB) { 180
183 *ret_prot = prot | _PAGE_CACHE_WC; 181static int chk_conflict(struct memtype *new, struct memtype *entry,
184 } else { 182 unsigned long *type)
185 *ret_prot = prot | _PAGE_CACHE_WB; 183{
184 if (new->type != entry->type) {
185 if (type) {
186 new->type = entry->type;
187 *type = entry->type;
188 } else
189 goto conflict;
186 } 190 }
187 191
192 /* check overlaps with more than one entry in the list */
193 list_for_each_entry_continue(entry, &memtype_list, nd) {
194 if (new->end <= entry->start)
195 break;
196 else if (new->type != entry->type)
197 goto conflict;
198 }
188 return 0; 199 return 0;
200
201 conflict:
202 printk(KERN_INFO "%s:%d conflicting memory types "
203 "%Lx-%Lx %s<->%s\n", current->comm, current->pid, new->start,
204 new->end, cattr_name(new->type), cattr_name(entry->type));
205 return -EBUSY;
189} 206}
190 207
191/* 208/*
@@ -198,37 +215,36 @@ static int pat_x_mtrr_type(u64 start, u64 end, unsigned long prot,
198 * req_type will have a special case value '-1', when requester want to inherit 215 * req_type will have a special case value '-1', when requester want to inherit
199 * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS. 216 * the memory type from mtrr (if WB), existing PAT, defaulting to UC_MINUS.
200 * 217 *
201 * If ret_type is NULL, function will return an error if it cannot reserve the 218 * If new_type is NULL, function will return an error if it cannot reserve the
202 * region with req_type. If ret_type is non-null, function will return 219 * region with req_type. If new_type is non-NULL, function will return
203 * available type in ret_type in case of no error. In case of any error 220 * available type in new_type in case of no error. In case of any error
204 * it will return a negative return value. 221 * it will return a negative return value.
205 */ 222 */
206int reserve_memtype(u64 start, u64 end, unsigned long req_type, 223int reserve_memtype(u64 start, u64 end, unsigned long req_type,
207 unsigned long *ret_type) 224 unsigned long *new_type)
208{ 225{
209 struct memtype *new_entry = NULL; 226 struct memtype *new, *entry;
210 struct memtype *parse;
211 unsigned long actual_type; 227 unsigned long actual_type;
228 struct list_head *where;
212 int err = 0; 229 int err = 0;
213 230
214 /* Only track when pat_wc_enabled */ 231 BUG_ON(start >= end); /* end is exclusive */
215 if (!pat_wc_enabled) { 232
233 if (!pat_enabled) {
216 /* This is identical to page table setting without PAT */ 234 /* This is identical to page table setting without PAT */
217 if (ret_type) { 235 if (new_type) {
218 if (req_type == -1) { 236 if (req_type == -1)
219 *ret_type = _PAGE_CACHE_WB; 237 *new_type = _PAGE_CACHE_WB;
220 } else { 238 else
221 *ret_type = req_type; 239 *new_type = req_type & _PAGE_CACHE_MASK;
222 }
223 } 240 }
224 return 0; 241 return 0;
225 } 242 }
226 243
227 /* Low ISA region is always mapped WB in page table. No need to track */ 244 /* Low ISA region is always mapped WB in page table. No need to track */
228 if (start >= ISA_START_ADDRESS && (end - 1) <= ISA_END_ADDRESS) { 245 if (is_ISA_range(start, end - 1)) {
229 if (ret_type) 246 if (new_type)
230 *ret_type = _PAGE_CACHE_WB; 247 *new_type = _PAGE_CACHE_WB;
231
232 return 0; 248 return 0;
233 } 249 }
234 250
@@ -241,206 +257,92 @@ int reserve_memtype(u64 start, u64 end, unsigned long req_type,
241 */ 257 */
242 u8 mtrr_type = mtrr_type_lookup(start, end); 258 u8 mtrr_type = mtrr_type_lookup(start, end);
243 259
244 if (mtrr_type == MTRR_TYPE_WRBACK) { 260 if (mtrr_type == MTRR_TYPE_WRBACK)
245 req_type = _PAGE_CACHE_WB;
246 actual_type = _PAGE_CACHE_WB; 261 actual_type = _PAGE_CACHE_WB;
247 } else { 262 else
248 req_type = _PAGE_CACHE_UC_MINUS;
249 actual_type = _PAGE_CACHE_UC_MINUS; 263 actual_type = _PAGE_CACHE_UC_MINUS;
250 } 264 } else
251 } else { 265 actual_type = pat_x_mtrr_type(start, end,
252 req_type &= _PAGE_CACHE_MASK; 266 req_type & _PAGE_CACHE_MASK);
253 err = pat_x_mtrr_type(start, end, req_type, &actual_type);
254 }
255
256 if (err) {
257 if (ret_type)
258 *ret_type = actual_type;
259
260 return -EINVAL;
261 }
262 267
263 new_entry = kmalloc(sizeof(struct memtype), GFP_KERNEL); 268 new = kmalloc(sizeof(struct memtype), GFP_KERNEL);
264 if (!new_entry) 269 if (!new)
265 return -ENOMEM; 270 return -ENOMEM;
266 271
267 new_entry->start = start; 272 new->start = start;
268 new_entry->end = end; 273 new->end = end;
269 new_entry->type = actual_type; 274 new->type = actual_type;
270 275
271 if (ret_type) 276 if (new_type)
272 *ret_type = actual_type; 277 *new_type = actual_type;
273 278
274 spin_lock(&memtype_lock); 279 spin_lock(&memtype_lock);
275 280
276 /* Search for existing mapping that overlaps the current range */ 281 /* Search for existing mapping that overlaps the current range */
277 list_for_each_entry(parse, &memtype_list, nd) { 282 where = NULL;
278 struct memtype *saved_ptr; 283 list_for_each_entry(entry, &memtype_list, nd) {
279 284 if (end <= entry->start) {
280 if (parse->start >= end) { 285 where = entry->nd.prev;
281 pr_debug("New Entry\n");
282 list_add(&new_entry->nd, parse->nd.prev);
283 new_entry = NULL;
284 break; 286 break;
285 } 287 } else if (start <= entry->start) { /* end > entry->start */
286 288 err = chk_conflict(new, entry, new_type);
287 if (start <= parse->start && end >= parse->start) { 289 if (!err) {
288 if (actual_type != parse->type && ret_type) { 290 dprintk("Overlap at 0x%Lx-0x%Lx\n",
289 actual_type = parse->type; 291 entry->start, entry->end);
290 *ret_type = actual_type; 292 where = entry->nd.prev;
291 new_entry->type = actual_type;
292 }
293
294 if (actual_type != parse->type) {
295 printk(
296 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
297 current->comm, current->pid,
298 start, end,
299 cattr_name(actual_type),
300 cattr_name(parse->type));
301 err = -EBUSY;
302 break;
303 } 293 }
304
305 saved_ptr = parse;
306 /*
307 * Check to see whether the request overlaps more
308 * than one entry in the list
309 */
310 list_for_each_entry_continue(parse, &memtype_list, nd) {
311 if (end <= parse->start) {
312 break;
313 }
314
315 if (actual_type != parse->type) {
316 printk(
317 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
318 current->comm, current->pid,
319 start, end,
320 cattr_name(actual_type),
321 cattr_name(parse->type));
322 err = -EBUSY;
323 break;
324 }
325 }
326
327 if (err) {
328 break;
329 }
330
331 pr_debug("Overlap at 0x%Lx-0x%Lx\n",
332 saved_ptr->start, saved_ptr->end);
333 /* No conflict. Go ahead and add this new entry */
334 list_add(&new_entry->nd, saved_ptr->nd.prev);
335 new_entry = NULL;
336 break; 294 break;
337 } 295 } else if (start < entry->end) { /* start > entry->start */
338 296 err = chk_conflict(new, entry, new_type);
339 if (start < parse->end) { 297 if (!err) {
340 if (actual_type != parse->type && ret_type) { 298 dprintk("Overlap at 0x%Lx-0x%Lx\n",
341 actual_type = parse->type; 299 entry->start, entry->end);
342 *ret_type = actual_type; 300 where = &entry->nd;
343 new_entry->type = actual_type;
344 }
345
346 if (actual_type != parse->type) {
347 printk(
348 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
349 current->comm, current->pid,
350 start, end,
351 cattr_name(actual_type),
352 cattr_name(parse->type));
353 err = -EBUSY;
354 break;
355 }
356
357 saved_ptr = parse;
358 /*
359 * Check to see whether the request overlaps more
360 * than one entry in the list
361 */
362 list_for_each_entry_continue(parse, &memtype_list, nd) {
363 if (end <= parse->start) {
364 break;
365 }
366
367 if (actual_type != parse->type) {
368 printk(
369 KERN_INFO "%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
370 current->comm, current->pid,
371 start, end,
372 cattr_name(actual_type),
373 cattr_name(parse->type));
374 err = -EBUSY;
375 break;
376 }
377 }
378
379 if (err) {
380 break;
381 } 301 }
382
383 pr_debug(KERN_INFO "Overlap at 0x%Lx-0x%Lx\n",
384 saved_ptr->start, saved_ptr->end);
385 /* No conflict. Go ahead and add this new entry */
386 list_add(&new_entry->nd, &saved_ptr->nd);
387 new_entry = NULL;
388 break; 302 break;
389 } 303 }
390 } 304 }
391 305
392 if (err) { 306 if (err) {
393 printk(KERN_INFO 307 printk(KERN_INFO "reserve_memtype failed 0x%Lx-0x%Lx, "
394 "reserve_memtype failed 0x%Lx-0x%Lx, track %s, req %s\n", 308 "track %s, req %s\n",
395 start, end, cattr_name(new_entry->type), 309 start, end, cattr_name(new->type), cattr_name(req_type));
396 cattr_name(req_type)); 310 kfree(new);
397 kfree(new_entry);
398 spin_unlock(&memtype_lock); 311 spin_unlock(&memtype_lock);
399 return err; 312 return err;
400 } 313 }
401 314
402 if (new_entry) { 315 if (where)
403 /* No conflict. Not yet added to the list. Add to the tail */ 316 list_add(&new->nd, where);
404 list_add_tail(&new_entry->nd, &memtype_list); 317 else
405 pr_debug("New Entry\n"); 318 list_add_tail(&new->nd, &memtype_list);
406 }
407
408 if (ret_type) {
409 pr_debug(
410 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",
411 start, end, cattr_name(actual_type),
412 cattr_name(req_type), cattr_name(*ret_type));
413 } else {
414 pr_debug(
415 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s\n",
416 start, end, cattr_name(actual_type),
417 cattr_name(req_type));
418 }
419 319
420 spin_unlock(&memtype_lock); 320 spin_unlock(&memtype_lock);
321
322 dprintk("reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",
323 start, end, cattr_name(new->type), cattr_name(req_type),
324 new_type ? cattr_name(*new_type) : "-");
325
421 return err; 326 return err;
422} 327}
423 328
424int free_memtype(u64 start, u64 end) 329int free_memtype(u64 start, u64 end)
425{ 330{
426 struct memtype *ml; 331 struct memtype *entry;
427 int err = -EINVAL; 332 int err = -EINVAL;
428 333
429 /* Only track when pat_wc_enabled */ 334 if (!pat_enabled)
430 if (!pat_wc_enabled) {
431 return 0; 335 return 0;
432 }
433 336
434 /* Low ISA region is always mapped WB. No need to track */ 337 /* Low ISA region is always mapped WB. No need to track */
435 if (start >= ISA_START_ADDRESS && end <= ISA_END_ADDRESS) { 338 if (is_ISA_range(start, end - 1))
436 return 0; 339 return 0;
437 }
438 340
439 spin_lock(&memtype_lock); 341 spin_lock(&memtype_lock);
440 list_for_each_entry(ml, &memtype_list, nd) { 342 list_for_each_entry(entry, &memtype_list, nd) {
441 if (ml->start == start && ml->end == end) { 343 if (entry->start == start && entry->end == end) {
442 list_del(&ml->nd); 344 list_del(&entry->nd);
443 kfree(ml); 345 kfree(entry);
444 err = 0; 346 err = 0;
445 break; 347 break;
446 } 348 }
@@ -452,7 +354,7 @@ int free_memtype(u64 start, u64 end)
452 current->comm, current->pid, start, end); 354 current->comm, current->pid, start, end);
453 } 355 }
454 356
455 pr_debug("free_memtype request 0x%Lx-0x%Lx\n", start, end); 357 dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end);
456 return err; 358 return err;
457} 359}
458 360
@@ -521,12 +423,12 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
521 * caching for the high addresses through the KEN pin, but 423 * caching for the high addresses through the KEN pin, but
522 * we maintain the tradition of paranoia in this code. 424 * we maintain the tradition of paranoia in this code.
523 */ 425 */
524 if (!pat_wc_enabled && 426 if (!pat_enabled &&
525 ! ( test_bit(X86_FEATURE_MTRR, boot_cpu_data.x86_capability) || 427 !(boot_cpu_has(X86_FEATURE_MTRR) ||
526 test_bit(X86_FEATURE_K6_MTRR, boot_cpu_data.x86_capability) || 428 boot_cpu_has(X86_FEATURE_K6_MTRR) ||
527 test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) || 429 boot_cpu_has(X86_FEATURE_CYRIX_ARR) ||
528 test_bit(X86_FEATURE_CENTAUR_MCR, boot_cpu_data.x86_capability)) && 430 boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) &&
529 (pfn << PAGE_SHIFT) >= __pa(high_memory)) { 431 (pfn << PAGE_SHIFT) >= __pa(high_memory)) {
530 flags = _PAGE_CACHE_UC; 432 flags = _PAGE_CACHE_UC;
531 } 433 }
532#endif 434#endif
@@ -548,7 +450,7 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
548 return 0; 450 return 0;
549 451
550 if (pfn <= max_pfn_mapped && 452 if (pfn <= max_pfn_mapped &&
551 ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) { 453 ioremap_change_attr((unsigned long)__va(offset), size, flags) < 0) {
552 free_memtype(offset, offset + size); 454 free_memtype(offset, offset + size);
553 printk(KERN_INFO 455 printk(KERN_INFO
554 "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n", 456 "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n",
@@ -586,4 +488,3 @@ void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
586 488
587 free_memtype(addr, addr + size); 489 free_memtype(addr, addr + size);
588} 490}
589
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 50159764f694..ee1d6d39edd4 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -255,7 +255,7 @@ int ptep_test_and_clear_young(struct vm_area_struct *vma,
255 255
256 if (pte_young(*ptep)) 256 if (pte_young(*ptep))
257 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, 257 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
258 &ptep->pte); 258 (unsigned long *) &ptep->pte);
259 259
260 if (ret) 260 if (ret)
261 pte_update(vma->vm_mm, addr, ptep); 261 pte_update(vma->vm_mm, addr, ptep);
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 99649dccad28..391d51035871 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -495,6 +495,7 @@ int __node_distance(int a, int b)
495 495
496EXPORT_SYMBOL(__node_distance); 496EXPORT_SYMBOL(__node_distance);
497 497
498#if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) || defined(CONFIG_ACPI_HOTPLUG_MEMORY)
498int memory_add_physaddr_to_nid(u64 start) 499int memory_add_physaddr_to_nid(u64 start)
499{ 500{
500 int i, ret = 0; 501 int i, ret = 0;
@@ -506,4 +507,4 @@ int memory_add_physaddr_to_nid(u64 start)
506 return ret; 507 return ret;
507} 508}
508EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid); 509EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
509 510#endif
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index cc48d3fde545..2b6ad5b9f9d5 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -269,12 +269,13 @@ static void nmi_cpu_shutdown(void *dummy)
269 269
270static void nmi_shutdown(void) 270static void nmi_shutdown(void)
271{ 271{
272 struct op_msrs *msrs = &__get_cpu_var(cpu_msrs); 272 struct op_msrs *msrs = &get_cpu_var(cpu_msrs);
273 nmi_enabled = 0; 273 nmi_enabled = 0;
274 on_each_cpu(nmi_cpu_shutdown, NULL, 0, 1); 274 on_each_cpu(nmi_cpu_shutdown, NULL, 0, 1);
275 unregister_die_notifier(&profile_exceptions_nb); 275 unregister_die_notifier(&profile_exceptions_nb);
276 model->shutdown(msrs); 276 model->shutdown(msrs);
277 free_msrs(); 277 free_msrs();
278 put_cpu_var(cpu_msrs);
278} 279}
279 280
280static void nmi_cpu_start(void *dummy) 281static void nmi_cpu_start(void *dummy)
diff --git a/arch/x86/pci/Makefile_32 b/arch/x86/pci/Makefile_32
index 962d96c0495a..a34fbf557926 100644
--- a/arch/x86/pci/Makefile_32
+++ b/arch/x86/pci/Makefile_32
@@ -23,3 +23,4 @@ pci-$(CONFIG_X86_NUMAQ) += numa.o
23pci-$(CONFIG_NUMA) += mp_bus_to_node.o 23pci-$(CONFIG_NUMA) += mp_bus_to_node.o
24 24
25obj-y += $(pci-y) common.o early.o 25obj-y += $(pci-y) common.o early.o
26obj-y += amd_bus.o
diff --git a/arch/x86/pci/Makefile_64 b/arch/x86/pci/Makefile_64
index 8fbd19832cf6..fd47068c95de 100644
--- a/arch/x86/pci/Makefile_64
+++ b/arch/x86/pci/Makefile_64
@@ -13,5 +13,5 @@ obj-y += legacy.o irq.o common.o early.o
13# mmconfig has a 64bit special 13# mmconfig has a 64bit special
14obj-$(CONFIG_PCI_MMCONFIG) += mmconfig_64.o direct.o mmconfig-shared.o 14obj-$(CONFIG_PCI_MMCONFIG) += mmconfig_64.o direct.o mmconfig-shared.o
15 15
16obj-y += k8-bus_64.o 16obj-y += amd_bus.o
17 17
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index d95de2f199cd..464279da49c4 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -218,7 +218,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
218 return bus; 218 return bus;
219} 219}
220 220
221extern int pci_routeirq;
222static int __init pci_acpi_init(void) 221static int __init pci_acpi_init(void)
223{ 222{
224 struct pci_dev *dev = NULL; 223 struct pci_dev *dev = NULL;
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/amd_bus.c
index bfefdf0f40d4..d02c598451ec 100644
--- a/arch/x86/pci/k8-bus_64.c
+++ b/arch/x86/pci/amd_bus.c
@@ -1,5 +1,9 @@
1#include <linux/init.h> 1#include <linux/init.h>
2#include <linux/pci.h> 2#include <linux/pci.h>
3#include "pci.h"
4
5#ifdef CONFIG_X86_64
6
3#include <asm/pci-direct.h> 7#include <asm/pci-direct.h>
4#include <asm/mpspec.h> 8#include <asm/mpspec.h>
5#include <linux/cpumask.h> 9#include <linux/cpumask.h>
@@ -526,3 +530,31 @@ static int __init early_fill_mp_bus_info(void)
526} 530}
527 531
528postcore_initcall(early_fill_mp_bus_info); 532postcore_initcall(early_fill_mp_bus_info);
533
534#endif
535
536/* common 32/64 bit code */
537
538#define ENABLE_CF8_EXT_CFG (1ULL << 46)
539
540static void enable_pci_io_ecs_per_cpu(void *unused)
541{
542 u64 reg;
543 rdmsrl(MSR_AMD64_NB_CFG, reg);
544 if (!(reg & ENABLE_CF8_EXT_CFG)) {
545 reg |= ENABLE_CF8_EXT_CFG;
546 wrmsrl(MSR_AMD64_NB_CFG, reg);
547 }
548}
549
550static int __init enable_pci_io_ecs(void)
551{
552 /* assume all cpus from fam10h have IO ECS */
553 if (boot_cpu_data.x86 < 0x10)
554 return 0;
555 on_each_cpu(enable_pci_io_ecs_per_cpu, NULL, 1, 1);
556 pci_probe |= PCI_HAS_IO_ECS;
557 return 0;
558}
559
560postcore_initcall(enable_pci_io_ecs);
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c
index 21d1e0e0d535..9915293500fb 100644
--- a/arch/x86/pci/direct.c
+++ b/arch/x86/pci/direct.c
@@ -8,18 +8,21 @@
8#include "pci.h" 8#include "pci.h"
9 9
10/* 10/*
11 * Functions for accessing PCI configuration space with type 1 accesses 11 * Functions for accessing PCI base (first 256 bytes) and extended
12 * (4096 bytes per PCI function) configuration space with type 1
13 * accesses.
12 */ 14 */
13 15
14#define PCI_CONF1_ADDRESS(bus, devfn, reg) \ 16#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
15 (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3)) 17 (0x80000000 | ((reg & 0xF00) << 16) | (bus << 16) \
18 | (devfn << 8) | (reg & 0xFC))
16 19
17static int pci_conf1_read(unsigned int seg, unsigned int bus, 20static int pci_conf1_read(unsigned int seg, unsigned int bus,
18 unsigned int devfn, int reg, int len, u32 *value) 21 unsigned int devfn, int reg, int len, u32 *value)
19{ 22{
20 unsigned long flags; 23 unsigned long flags;
21 24
22 if ((bus > 255) || (devfn > 255) || (reg > 255)) { 25 if ((bus > 255) || (devfn > 255) || (reg > 4095)) {
23 *value = -1; 26 *value = -1;
24 return -EINVAL; 27 return -EINVAL;
25 } 28 }
@@ -50,7 +53,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus,
50{ 53{
51 unsigned long flags; 54 unsigned long flags;
52 55
53 if ((bus > 255) || (devfn > 255) || (reg > 255)) 56 if ((bus > 255) || (devfn > 255) || (reg > 4095))
54 return -EINVAL; 57 return -EINVAL;
55 58
56 spin_lock_irqsave(&pci_config_lock, flags); 59 spin_lock_irqsave(&pci_config_lock, flags);
@@ -260,10 +263,18 @@ void __init pci_direct_init(int type)
260 return; 263 return;
261 printk(KERN_INFO "PCI: Using configuration type %d for base access\n", 264 printk(KERN_INFO "PCI: Using configuration type %d for base access\n",
262 type); 265 type);
263 if (type == 1) 266 if (type == 1) {
264 raw_pci_ops = &pci_direct_conf1; 267 raw_pci_ops = &pci_direct_conf1;
265 else 268 if (raw_pci_ext_ops)
266 raw_pci_ops = &pci_direct_conf2; 269 return;
270 if (!(pci_probe & PCI_HAS_IO_ECS))
271 return;
272 printk(KERN_INFO "PCI: Using configuration type 1 "
273 "for extended access\n");
274 raw_pci_ext_ops = &pci_direct_conf1;
275 return;
276 }
277 raw_pci_ops = &pci_direct_conf2;
267} 278}
268 279
269int __init pci_direct_probe(void) 280int __init pci_direct_probe(void)
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 10fb308fded8..6ccd7a108cd4 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -299,9 +299,9 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
299 return -EINVAL; 299 return -EINVAL;
300 300
301 prot = pgprot_val(vma->vm_page_prot); 301 prot = pgprot_val(vma->vm_page_prot);
302 if (pat_wc_enabled && write_combine) 302 if (pat_enabled && write_combine)
303 prot |= _PAGE_CACHE_WC; 303 prot |= _PAGE_CACHE_WC;
304 else if (pat_wc_enabled || boot_cpu_data.x86 > 3) 304 else if (pat_enabled || boot_cpu_data.x86 > 3)
305 /* 305 /*
306 * ioremap() and ioremap_nocache() defaults to UC MINUS for now. 306 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
307 * To avoid attribute conflicts, request UC MINUS here 307 * To avoid attribute conflicts, request UC MINUS here
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index ca8df9c260bc..f0859de23e20 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -11,8 +11,8 @@
11#include <linux/slab.h> 11#include <linux/slab.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/dmi.h> 13#include <linux/dmi.h>
14#include <asm/io.h> 14#include <linux/io.h>
15#include <asm/smp.h> 15#include <linux/smp.h>
16#include <asm/io_apic.h> 16#include <asm/io_apic.h>
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/acpi.h> 18#include <linux/acpi.h>
@@ -61,7 +61,7 @@ void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
61 * and perform checksum verification. 61 * and perform checksum verification.
62 */ 62 */
63 63
64static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr) 64static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr)
65{ 65{
66 struct irq_routing_table *rt; 66 struct irq_routing_table *rt;
67 int i; 67 int i;
@@ -74,7 +74,7 @@ static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
74 rt->size < sizeof(struct irq_routing_table)) 74 rt->size < sizeof(struct irq_routing_table))
75 return NULL; 75 return NULL;
76 sum = 0; 76 sum = 0;
77 for (i=0; i < rt->size; i++) 77 for (i = 0; i < rt->size; i++)
78 sum += addr[i]; 78 sum += addr[i];
79 if (!sum) { 79 if (!sum) {
80 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt); 80 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
@@ -100,7 +100,7 @@ static struct irq_routing_table * __init pirq_find_routing_table(void)
100 return rt; 100 return rt;
101 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n"); 101 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
102 } 102 }
103 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) { 103 for (addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
104 rt = pirq_check_routing_table(addr); 104 rt = pirq_check_routing_table(addr);
105 if (rt) 105 if (rt)
106 return rt; 106 return rt;
@@ -122,20 +122,20 @@ static void __init pirq_peer_trick(void)
122 struct irq_info *e; 122 struct irq_info *e;
123 123
124 memset(busmap, 0, sizeof(busmap)); 124 memset(busmap, 0, sizeof(busmap));
125 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) { 125 for (i = 0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
126 e = &rt->slots[i]; 126 e = &rt->slots[i];
127#ifdef DEBUG 127#ifdef DEBUG
128 { 128 {
129 int j; 129 int j;
130 DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot); 130 DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
131 for(j=0; j<4; j++) 131 for (j = 0; j < 4; j++)
132 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap); 132 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
133 DBG("\n"); 133 DBG("\n");
134 } 134 }
135#endif 135#endif
136 busmap[e->bus] = 1; 136 busmap[e->bus] = 1;
137 } 137 }
138 for(i = 1; i < 256; i++) { 138 for (i = 1; i < 256; i++) {
139 int node; 139 int node;
140 if (!busmap[i] || pci_find_bus(0, i)) 140 if (!busmap[i] || pci_find_bus(0, i))
141 continue; 141 continue;
@@ -285,7 +285,7 @@ static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
285 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 }; 285 static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
286 286
287 WARN_ON_ONCE(pirq > 4); 287 WARN_ON_ONCE(pirq > 4);
288 return read_config_nybble(router,0x43, pirqmap[pirq-1]); 288 return read_config_nybble(router, 0x43, pirqmap[pirq-1]);
289} 289}
290 290
291static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq) 291static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
@@ -314,7 +314,7 @@ static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
314 314
315/* 315/*
316 * Cyrix: nibble offset 0x5C 316 * Cyrix: nibble offset 0x5C
317 * 0x5C bits 7:4 is INTB bits 3:0 is INTA 317 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
318 * 0x5D bits 7:4 is INTD bits 3:0 is INTC 318 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
319 */ 319 */
320static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq) 320static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
@@ -350,7 +350,7 @@ static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
350 * Apparently there are systems implementing PCI routing table using 350 * Apparently there are systems implementing PCI routing table using
351 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D. 351 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
352 * We try our best to handle both link mappings. 352 * We try our best to handle both link mappings.
353 * 353 *
354 * Currently (2003-05-21) it appears most SiS chipsets follow the 354 * Currently (2003-05-21) it appears most SiS chipsets follow the
355 * definition of routing registers from the SiS-5595 southbridge. 355 * definition of routing registers from the SiS-5595 southbridge.
356 * According to the SiS 5595 datasheets the revision id's of the 356 * According to the SiS 5595 datasheets the revision id's of the
@@ -370,7 +370,7 @@ static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
370 * 370 *
371 * 0x62: USBIRQ: 371 * 0x62: USBIRQ:
372 * bit 6 OHCI function disabled (0), enabled (1) 372 * bit 6 OHCI function disabled (0), enabled (1)
373 * 373 *
374 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved 374 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
375 * 375 *
376 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved 376 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
@@ -487,9 +487,7 @@ static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq
487 u8 irq; 487 u8 irq;
488 irq = 0; 488 irq = 0;
489 if (pirq <= 4) 489 if (pirq <= 4)
490 {
491 irq = read_config_nybble(router, 0x56, pirq - 1); 490 irq = read_config_nybble(router, 0x56, pirq - 1);
492 }
493 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n", 491 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
494 dev->vendor, dev->device, pirq, irq); 492 dev->vendor, dev->device, pirq, irq);
495 return irq; 493 return irq;
@@ -497,12 +495,10 @@ static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq
497 495
498static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq) 496static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
499{ 497{
500 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n", 498 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
501 dev->vendor, dev->device, pirq, irq); 499 dev->vendor, dev->device, pirq, irq);
502 if (pirq <= 4) 500 if (pirq <= 4)
503 {
504 write_config_nybble(router, 0x56, pirq - 1, irq); 501 write_config_nybble(router, 0x56, pirq - 1, irq);
505 }
506 return 1; 502 return 1;
507} 503}
508 504
@@ -549,50 +545,49 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
549 if (pci_dev_present(pirq_440gx)) 545 if (pci_dev_present(pirq_440gx))
550 return 0; 546 return 0;
551 547
552 switch(device) 548 switch (device) {
553 { 549 case PCI_DEVICE_ID_INTEL_82371FB_0:
554 case PCI_DEVICE_ID_INTEL_82371FB_0: 550 case PCI_DEVICE_ID_INTEL_82371SB_0:
555 case PCI_DEVICE_ID_INTEL_82371SB_0: 551 case PCI_DEVICE_ID_INTEL_82371AB_0:
556 case PCI_DEVICE_ID_INTEL_82371AB_0: 552 case PCI_DEVICE_ID_INTEL_82371MX:
557 case PCI_DEVICE_ID_INTEL_82371MX: 553 case PCI_DEVICE_ID_INTEL_82443MX_0:
558 case PCI_DEVICE_ID_INTEL_82443MX_0: 554 case PCI_DEVICE_ID_INTEL_82801AA_0:
559 case PCI_DEVICE_ID_INTEL_82801AA_0: 555 case PCI_DEVICE_ID_INTEL_82801AB_0:
560 case PCI_DEVICE_ID_INTEL_82801AB_0: 556 case PCI_DEVICE_ID_INTEL_82801BA_0:
561 case PCI_DEVICE_ID_INTEL_82801BA_0: 557 case PCI_DEVICE_ID_INTEL_82801BA_10:
562 case PCI_DEVICE_ID_INTEL_82801BA_10: 558 case PCI_DEVICE_ID_INTEL_82801CA_0:
563 case PCI_DEVICE_ID_INTEL_82801CA_0: 559 case PCI_DEVICE_ID_INTEL_82801CA_12:
564 case PCI_DEVICE_ID_INTEL_82801CA_12: 560 case PCI_DEVICE_ID_INTEL_82801DB_0:
565 case PCI_DEVICE_ID_INTEL_82801DB_0: 561 case PCI_DEVICE_ID_INTEL_82801E_0:
566 case PCI_DEVICE_ID_INTEL_82801E_0: 562 case PCI_DEVICE_ID_INTEL_82801EB_0:
567 case PCI_DEVICE_ID_INTEL_82801EB_0: 563 case PCI_DEVICE_ID_INTEL_ESB_1:
568 case PCI_DEVICE_ID_INTEL_ESB_1: 564 case PCI_DEVICE_ID_INTEL_ICH6_0:
569 case PCI_DEVICE_ID_INTEL_ICH6_0: 565 case PCI_DEVICE_ID_INTEL_ICH6_1:
570 case PCI_DEVICE_ID_INTEL_ICH6_1: 566 case PCI_DEVICE_ID_INTEL_ICH7_0:
571 case PCI_DEVICE_ID_INTEL_ICH7_0: 567 case PCI_DEVICE_ID_INTEL_ICH7_1:
572 case PCI_DEVICE_ID_INTEL_ICH7_1: 568 case PCI_DEVICE_ID_INTEL_ICH7_30:
573 case PCI_DEVICE_ID_INTEL_ICH7_30: 569 case PCI_DEVICE_ID_INTEL_ICH7_31:
574 case PCI_DEVICE_ID_INTEL_ICH7_31: 570 case PCI_DEVICE_ID_INTEL_ESB2_0:
575 case PCI_DEVICE_ID_INTEL_ESB2_0: 571 case PCI_DEVICE_ID_INTEL_ICH8_0:
576 case PCI_DEVICE_ID_INTEL_ICH8_0: 572 case PCI_DEVICE_ID_INTEL_ICH8_1:
577 case PCI_DEVICE_ID_INTEL_ICH8_1: 573 case PCI_DEVICE_ID_INTEL_ICH8_2:
578 case PCI_DEVICE_ID_INTEL_ICH8_2: 574 case PCI_DEVICE_ID_INTEL_ICH8_3:
579 case PCI_DEVICE_ID_INTEL_ICH8_3: 575 case PCI_DEVICE_ID_INTEL_ICH8_4:
580 case PCI_DEVICE_ID_INTEL_ICH8_4: 576 case PCI_DEVICE_ID_INTEL_ICH9_0:
581 case PCI_DEVICE_ID_INTEL_ICH9_0: 577 case PCI_DEVICE_ID_INTEL_ICH9_1:
582 case PCI_DEVICE_ID_INTEL_ICH9_1: 578 case PCI_DEVICE_ID_INTEL_ICH9_2:
583 case PCI_DEVICE_ID_INTEL_ICH9_2: 579 case PCI_DEVICE_ID_INTEL_ICH9_3:
584 case PCI_DEVICE_ID_INTEL_ICH9_3: 580 case PCI_DEVICE_ID_INTEL_ICH9_4:
585 case PCI_DEVICE_ID_INTEL_ICH9_4: 581 case PCI_DEVICE_ID_INTEL_ICH9_5:
586 case PCI_DEVICE_ID_INTEL_ICH9_5: 582 case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
587 case PCI_DEVICE_ID_INTEL_TOLAPAI_0: 583 case PCI_DEVICE_ID_INTEL_ICH10_0:
588 case PCI_DEVICE_ID_INTEL_ICH10_0: 584 case PCI_DEVICE_ID_INTEL_ICH10_1:
589 case PCI_DEVICE_ID_INTEL_ICH10_1: 585 case PCI_DEVICE_ID_INTEL_ICH10_2:
590 case PCI_DEVICE_ID_INTEL_ICH10_2: 586 case PCI_DEVICE_ID_INTEL_ICH10_3:
591 case PCI_DEVICE_ID_INTEL_ICH10_3: 587 r->name = "PIIX/ICH";
592 r->name = "PIIX/ICH"; 588 r->get = pirq_piix_get;
593 r->get = pirq_piix_get; 589 r->set = pirq_piix_set;
594 r->set = pirq_piix_set; 590 return 1;
595 return 1;
596 } 591 }
597 return 0; 592 return 0;
598} 593}
@@ -606,7 +601,7 @@ static __init int via_router_probe(struct irq_router *r,
606 * workarounds for some buggy BIOSes 601 * workarounds for some buggy BIOSes
607 */ 602 */
608 if (device == PCI_DEVICE_ID_VIA_82C586_0) { 603 if (device == PCI_DEVICE_ID_VIA_82C586_0) {
609 switch(router->device) { 604 switch (router->device) {
610 case PCI_DEVICE_ID_VIA_82C686: 605 case PCI_DEVICE_ID_VIA_82C686:
611 /* 606 /*
612 * Asus k7m bios wrongly reports 82C686A 607 * Asus k7m bios wrongly reports 82C686A
@@ -631,7 +626,7 @@ static __init int via_router_probe(struct irq_router *r,
631 } 626 }
632 } 627 }
633 628
634 switch(device) { 629 switch (device) {
635 case PCI_DEVICE_ID_VIA_82C586_0: 630 case PCI_DEVICE_ID_VIA_82C586_0:
636 r->name = "VIA"; 631 r->name = "VIA";
637 r->get = pirq_via586_get; 632 r->get = pirq_via586_get;
@@ -654,13 +649,12 @@ static __init int via_router_probe(struct irq_router *r,
654 649
655static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 650static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
656{ 651{
657 switch(device) 652 switch (device) {
658 { 653 case PCI_DEVICE_ID_VLSI_82C534:
659 case PCI_DEVICE_ID_VLSI_82C534: 654 r->name = "VLSI 82C534";
660 r->name = "VLSI 82C534"; 655 r->get = pirq_vlsi_get;
661 r->get = pirq_vlsi_get; 656 r->set = pirq_vlsi_set;
662 r->set = pirq_vlsi_set; 657 return 1;
663 return 1;
664 } 658 }
665 return 0; 659 return 0;
666} 660}
@@ -668,14 +662,13 @@ static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router
668 662
669static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 663static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
670{ 664{
671 switch(device) 665 switch (device) {
672 { 666 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
673 case PCI_DEVICE_ID_SERVERWORKS_OSB4: 667 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
674 case PCI_DEVICE_ID_SERVERWORKS_CSB5: 668 r->name = "ServerWorks";
675 r->name = "ServerWorks"; 669 r->get = pirq_serverworks_get;
676 r->get = pirq_serverworks_get; 670 r->set = pirq_serverworks_set;
677 r->set = pirq_serverworks_set; 671 return 1;
678 return 1;
679 } 672 }
680 return 0; 673 return 0;
681} 674}
@@ -684,7 +677,7 @@ static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router,
684{ 677{
685 if (device != PCI_DEVICE_ID_SI_503) 678 if (device != PCI_DEVICE_ID_SI_503)
686 return 0; 679 return 0;
687 680
688 r->name = "SIS"; 681 r->name = "SIS";
689 r->get = pirq_sis_get; 682 r->get = pirq_sis_get;
690 r->set = pirq_sis_set; 683 r->set = pirq_sis_set;
@@ -693,47 +686,43 @@ static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router,
693 686
694static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 687static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
695{ 688{
696 switch(device) 689 switch (device) {
697 { 690 case PCI_DEVICE_ID_CYRIX_5520:
698 case PCI_DEVICE_ID_CYRIX_5520: 691 r->name = "NatSemi";
699 r->name = "NatSemi"; 692 r->get = pirq_cyrix_get;
700 r->get = pirq_cyrix_get; 693 r->set = pirq_cyrix_set;
701 r->set = pirq_cyrix_set; 694 return 1;
702 return 1;
703 } 695 }
704 return 0; 696 return 0;
705} 697}
706 698
707static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 699static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
708{ 700{
709 switch(device) 701 switch (device) {
710 { 702 case PCI_DEVICE_ID_OPTI_82C700:
711 case PCI_DEVICE_ID_OPTI_82C700: 703 r->name = "OPTI";
712 r->name = "OPTI"; 704 r->get = pirq_opti_get;
713 r->get = pirq_opti_get; 705 r->set = pirq_opti_set;
714 r->set = pirq_opti_set; 706 return 1;
715 return 1;
716 } 707 }
717 return 0; 708 return 0;
718} 709}
719 710
720static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 711static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
721{ 712{
722 switch(device) 713 switch (device) {
723 { 714 case PCI_DEVICE_ID_ITE_IT8330G_0:
724 case PCI_DEVICE_ID_ITE_IT8330G_0: 715 r->name = "ITE";
725 r->name = "ITE"; 716 r->get = pirq_ite_get;
726 r->get = pirq_ite_get; 717 r->set = pirq_ite_set;
727 r->set = pirq_ite_set; 718 return 1;
728 return 1;
729 } 719 }
730 return 0; 720 return 0;
731} 721}
732 722
733static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 723static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
734{ 724{
735 switch(device) 725 switch (device) {
736 {
737 case PCI_DEVICE_ID_AL_M1533: 726 case PCI_DEVICE_ID_AL_M1533:
738 case PCI_DEVICE_ID_AL_M1563: 727 case PCI_DEVICE_ID_AL_M1563:
739 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n"); 728 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
@@ -747,25 +736,24 @@ static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router,
747 736
748static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 737static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
749{ 738{
750 switch(device) 739 switch (device) {
751 { 740 case PCI_DEVICE_ID_AMD_VIPER_740B:
752 case PCI_DEVICE_ID_AMD_VIPER_740B: 741 r->name = "AMD756";
753 r->name = "AMD756"; 742 break;
754 break; 743 case PCI_DEVICE_ID_AMD_VIPER_7413:
755 case PCI_DEVICE_ID_AMD_VIPER_7413: 744 r->name = "AMD766";
756 r->name = "AMD766"; 745 break;
757 break; 746 case PCI_DEVICE_ID_AMD_VIPER_7443:
758 case PCI_DEVICE_ID_AMD_VIPER_7443: 747 r->name = "AMD768";
759 r->name = "AMD768"; 748 break;
760 break; 749 default:
761 default: 750 return 0;
762 return 0;
763 } 751 }
764 r->get = pirq_amd756_get; 752 r->get = pirq_amd756_get;
765 r->set = pirq_amd756_set; 753 r->set = pirq_amd756_set;
766 return 1; 754 return 1;
767} 755}
768 756
769static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device) 757static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
770{ 758{
771 switch (device) { 759 switch (device) {
@@ -807,7 +795,7 @@ static struct pci_dev *pirq_router_dev;
807 * FIXME: should we have an option to say "generic for 795 * FIXME: should we have an option to say "generic for
808 * chipset" ? 796 * chipset" ?
809 */ 797 */
810 798
811static void __init pirq_find_router(struct irq_router *r) 799static void __init pirq_find_router(struct irq_router *r)
812{ 800{
813 struct irq_routing_table *rt = pirq_table; 801 struct irq_routing_table *rt = pirq_table;
@@ -826,7 +814,7 @@ static void __init pirq_find_router(struct irq_router *r)
826 r->name = "default"; 814 r->name = "default";
827 r->get = NULL; 815 r->get = NULL;
828 r->set = NULL; 816 r->set = NULL;
829 817
830 DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n", 818 DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
831 rt->rtr_vendor, rt->rtr_device); 819 rt->rtr_vendor, rt->rtr_device);
832 820
@@ -837,7 +825,7 @@ static void __init pirq_find_router(struct irq_router *r)
837 return; 825 return;
838 } 826 }
839 827
840 for( h = pirq_routers; h->vendor; h++) { 828 for (h = pirq_routers; h->vendor; h++) {
841 /* First look for a router match */ 829 /* First look for a router match */
842 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device)) 830 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
843 break; 831 break;
@@ -889,7 +877,7 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
889 877
890 if (!pirq_table) 878 if (!pirq_table)
891 return 0; 879 return 0;
892 880
893 DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin); 881 DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
894 info = pirq_get_info(dev); 882 info = pirq_get_info(dev);
895 if (!info) { 883 if (!info) {
@@ -928,8 +916,10 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
928 */ 916 */
929 newirq = dev->irq; 917 newirq = dev->irq;
930 if (newirq && !((1 << newirq) & mask)) { 918 if (newirq && !((1 << newirq) & mask)) {
931 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0; 919 if (pci_probe & PCI_USE_PIRQ_MASK)
932 else printk("\n" KERN_WARNING 920 newirq = 0;
921 else
922 printk("\n" KERN_WARNING
933 "PCI: IRQ %i for device %s doesn't match PIRQ mask " 923 "PCI: IRQ %i for device %s doesn't match PIRQ mask "
934 "- try pci=usepirqmask\n" KERN_DEBUG, newirq, 924 "- try pci=usepirqmask\n" KERN_DEBUG, newirq,
935 pci_name(dev)); 925 pci_name(dev));
@@ -949,8 +939,8 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
949 irq = pirq & 0xf; 939 irq = pirq & 0xf;
950 DBG(" -> hardcoded IRQ %d\n", irq); 940 DBG(" -> hardcoded IRQ %d\n", irq);
951 msg = "Hardcoded"; 941 msg = "Hardcoded";
952 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \ 942 } else if (r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
953 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) { 943 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask))) {
954 DBG(" -> got IRQ %d\n", irq); 944 DBG(" -> got IRQ %d\n", irq);
955 msg = "Found"; 945 msg = "Found";
956 eisa_set_level_irq(irq); 946 eisa_set_level_irq(irq);
@@ -985,15 +975,15 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
985 continue; 975 continue;
986 if (info->irq[pin].link == pirq) { 976 if (info->irq[pin].link == pirq) {
987 /* We refuse to override the dev->irq information. Give a warning! */ 977 /* We refuse to override the dev->irq information. Give a warning! */
988 if ( dev2->irq && dev2->irq != irq && \ 978 if (dev2->irq && dev2->irq != irq && \
989 (!(pci_probe & PCI_USE_PIRQ_MASK) || \ 979 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
990 ((1 << dev2->irq) & mask)) ) { 980 ((1 << dev2->irq) & mask))) {
991#ifndef CONFIG_PCI_MSI 981#ifndef CONFIG_PCI_MSI
992 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n", 982 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
993 pci_name(dev2), dev2->irq, irq); 983 pci_name(dev2), dev2->irq, irq);
994#endif 984#endif
995 continue; 985 continue;
996 } 986 }
997 dev2->irq = irq; 987 dev2->irq = irq;
998 pirq_penalty[irq]++; 988 pirq_penalty[irq]++;
999 if (dev != dev2) 989 if (dev != dev2)
@@ -1031,8 +1021,7 @@ static void __init pcibios_fixup_irqs(void)
1031 /* 1021 /*
1032 * Recalculate IRQ numbers if we use the I/O APIC. 1022 * Recalculate IRQ numbers if we use the I/O APIC.
1033 */ 1023 */
1034 if (io_apic_assign_pci_irqs) 1024 if (io_apic_assign_pci_irqs) {
1035 {
1036 int irq; 1025 int irq;
1037 1026
1038 if (pin) { 1027 if (pin) {
@@ -1045,10 +1034,10 @@ static void __init pcibios_fixup_irqs(void)
1045 * busses itself so we should get into this branch reliably. 1034 * busses itself so we should get into this branch reliably.
1046 */ 1035 */
1047 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */ 1036 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1048 struct pci_dev * bridge = dev->bus->self; 1037 struct pci_dev *bridge = dev->bus->self;
1049 1038
1050 pin = (pin + PCI_SLOT(dev->devfn)) % 4; 1039 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1051 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number, 1040 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1052 PCI_SLOT(bridge->devfn), pin); 1041 PCI_SLOT(bridge->devfn), pin);
1053 if (irq >= 0) 1042 if (irq >= 0)
1054 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n", 1043 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
@@ -1138,7 +1127,7 @@ static int __init pcibios_irq_init(void)
1138 pirq_find_router(&pirq_router); 1127 pirq_find_router(&pirq_router);
1139 if (pirq_table->exclusive_irqs) { 1128 if (pirq_table->exclusive_irqs) {
1140 int i; 1129 int i;
1141 for (i=0; i<16; i++) 1130 for (i = 0; i < 16; i++)
1142 if (!(pirq_table->exclusive_irqs & (1 << i))) 1131 if (!(pirq_table->exclusive_irqs & (1 << i)))
1143 pirq_penalty[i] += 100; 1132 pirq_penalty[i] += 100;
1144 } 1133 }
@@ -1203,10 +1192,10 @@ static int pirq_enable_irq(struct pci_dev *dev)
1203 */ 1192 */
1204 temp_dev = dev; 1193 temp_dev = dev;
1205 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */ 1194 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1206 struct pci_dev * bridge = dev->bus->self; 1195 struct pci_dev *bridge = dev->bus->self;
1207 1196
1208 pin = (pin + PCI_SLOT(dev->devfn)) % 4; 1197 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1209 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number, 1198 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1210 PCI_SLOT(bridge->devfn), pin); 1199 PCI_SLOT(bridge->devfn), pin);
1211 if (irq >= 0) 1200 if (irq >= 0)
1212 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n", 1201 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 0cfebecf2a8f..23faaa890ffc 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -374,7 +374,7 @@ reject:
374 374
375static int __initdata known_bridge; 375static int __initdata known_bridge;
376 376
377void __init __pci_mmcfg_init(int early) 377static void __init __pci_mmcfg_init(int early)
378{ 378{
379 /* MMCONFIG disabled */ 379 /* MMCONFIG disabled */
380 if ((pci_probe & PCI_PROBE_MMCONF) == 0) 380 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h
index 720c4c554534..ba263e626a68 100644
--- a/arch/x86/pci/pci.h
+++ b/arch/x86/pci/pci.h
@@ -27,6 +27,7 @@
27#define PCI_CAN_SKIP_ISA_ALIGN 0x8000 27#define PCI_CAN_SKIP_ISA_ALIGN 0x8000
28#define PCI_USE__CRS 0x10000 28#define PCI_USE__CRS 0x10000
29#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000 29#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000
30#define PCI_HAS_IO_ECS 0x40000
30 31
31extern unsigned int pci_probe; 32extern unsigned int pci_probe;
32extern unsigned long pirq_table_addr; 33extern unsigned long pirq_table_addr;
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 3fdd51497a83..19a6cfaf5db9 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -16,7 +16,7 @@
16#include "vextern.h" /* Just for VMAGIC. */ 16#include "vextern.h" /* Just for VMAGIC. */
17#undef VEXTERN 17#undef VEXTERN
18 18
19int vdso_enabled = 1; 19unsigned int __read_mostly vdso_enabled = 1;
20 20
21extern char vdso_start[], vdso_end[]; 21extern char vdso_start[], vdso_end[];
22extern unsigned short vdso_sync_cpuid; 22extern unsigned short vdso_sync_cpuid;
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
index 6c388e593bc8..c2cc99580871 100644
--- a/arch/x86/xen/Kconfig
+++ b/arch/x86/xen/Kconfig
@@ -12,3 +12,13 @@ config XEN
12 This is the Linux Xen port. Enabling this will allow the 12 This is the Linux Xen port. Enabling this will allow the
13 kernel to boot in a paravirtualized environment under the 13 kernel to boot in a paravirtualized environment under the
14 Xen hypervisor. 14 Xen hypervisor.
15
16config XEN_MAX_DOMAIN_MEMORY
17 int "Maximum allowed size of a domain in gigabytes"
18 default 8
19 depends on XEN
20 help
21 The pseudo-physical to machine address array is sized
22 according to the maximum possible memory size of a Xen
23 domain. This array uses 1 page per gigabyte, so there's no
24 need to be too stingy here. \ No newline at end of file
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile
index 3d8df981d5fd..2ba2d1649131 100644
--- a/arch/x86/xen/Makefile
+++ b/arch/x86/xen/Makefile
@@ -1,4 +1,4 @@
1obj-y := enlighten.o setup.o multicalls.o mmu.o \ 1obj-y := enlighten.o setup.o multicalls.o mmu.o \
2 time.o manage.o xen-asm.o grant-table.o 2 time.o xen-asm.o grant-table.o suspend.o
3 3
4obj-$(CONFIG_SMP) += smp.o 4obj-$(CONFIG_SMP) += smp.o
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 275163f81464..fe60aa9fed0a 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -75,13 +75,13 @@ DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
75struct start_info *xen_start_info; 75struct start_info *xen_start_info;
76EXPORT_SYMBOL_GPL(xen_start_info); 76EXPORT_SYMBOL_GPL(xen_start_info);
77 77
78static /* __initdata */ struct shared_info dummy_shared_info; 78struct shared_info xen_dummy_shared_info;
79 79
80/* 80/*
81 * Point at some empty memory to start with. We map the real shared_info 81 * Point at some empty memory to start with. We map the real shared_info
82 * page as soon as fixmap is up and running. 82 * page as soon as fixmap is up and running.
83 */ 83 */
84struct shared_info *HYPERVISOR_shared_info = (void *)&dummy_shared_info; 84struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
85 85
86/* 86/*
87 * Flag to determine whether vcpu info placement is available on all 87 * Flag to determine whether vcpu info placement is available on all
@@ -98,13 +98,13 @@ struct shared_info *HYPERVISOR_shared_info = (void *)&dummy_shared_info;
98 */ 98 */
99static int have_vcpu_info_placement = 1; 99static int have_vcpu_info_placement = 1;
100 100
101static void __init xen_vcpu_setup(int cpu) 101static void xen_vcpu_setup(int cpu)
102{ 102{
103 struct vcpu_register_vcpu_info info; 103 struct vcpu_register_vcpu_info info;
104 int err; 104 int err;
105 struct vcpu_info *vcpup; 105 struct vcpu_info *vcpup;
106 106
107 BUG_ON(HYPERVISOR_shared_info == &dummy_shared_info); 107 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
108 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; 108 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
109 109
110 if (!have_vcpu_info_placement) 110 if (!have_vcpu_info_placement)
@@ -136,11 +136,41 @@ static void __init xen_vcpu_setup(int cpu)
136 } 136 }
137} 137}
138 138
139/*
140 * On restore, set the vcpu placement up again.
141 * If it fails, then we're in a bad state, since
142 * we can't back out from using it...
143 */
144void xen_vcpu_restore(void)
145{
146 if (have_vcpu_info_placement) {
147 int cpu;
148
149 for_each_online_cpu(cpu) {
150 bool other_cpu = (cpu != smp_processor_id());
151
152 if (other_cpu &&
153 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
154 BUG();
155
156 xen_vcpu_setup(cpu);
157
158 if (other_cpu &&
159 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
160 BUG();
161 }
162
163 BUG_ON(!have_vcpu_info_placement);
164 }
165}
166
139static void __init xen_banner(void) 167static void __init xen_banner(void)
140{ 168{
141 printk(KERN_INFO "Booting paravirtualized kernel on %s\n", 169 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
142 pv_info.name); 170 pv_info.name);
143 printk(KERN_INFO "Hypervisor signature: %s\n", xen_start_info->magic); 171 printk(KERN_INFO "Hypervisor signature: %s%s\n",
172 xen_start_info->magic,
173 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
144} 174}
145 175
146static void xen_cpuid(unsigned int *ax, unsigned int *bx, 176static void xen_cpuid(unsigned int *ax, unsigned int *bx,
@@ -235,13 +265,13 @@ static void xen_irq_enable(void)
235{ 265{
236 struct vcpu_info *vcpu; 266 struct vcpu_info *vcpu;
237 267
238 /* There's a one instruction preempt window here. We need to 268 /* We don't need to worry about being preempted here, since
239 make sure we're don't switch CPUs between getting the vcpu 269 either a) interrupts are disabled, so no preemption, or b)
240 pointer and updating the mask. */ 270 the caller is confused and is trying to re-enable interrupts
241 preempt_disable(); 271 on an indeterminate processor. */
272
242 vcpu = x86_read_percpu(xen_vcpu); 273 vcpu = x86_read_percpu(xen_vcpu);
243 vcpu->evtchn_upcall_mask = 0; 274 vcpu->evtchn_upcall_mask = 0;
244 preempt_enable_no_resched();
245 275
246 /* Doesn't matter if we get preempted here, because any 276 /* Doesn't matter if we get preempted here, because any
247 pending event will get dealt with anyway. */ 277 pending event will get dealt with anyway. */
@@ -254,7 +284,7 @@ static void xen_irq_enable(void)
254static void xen_safe_halt(void) 284static void xen_safe_halt(void)
255{ 285{
256 /* Blocking includes an implicit local_irq_enable(). */ 286 /* Blocking includes an implicit local_irq_enable(). */
257 if (HYPERVISOR_sched_op(SCHEDOP_block, 0) != 0) 287 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
258 BUG(); 288 BUG();
259} 289}
260 290
@@ -607,6 +637,30 @@ static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
607 xen_mc_issue(PARAVIRT_LAZY_MMU); 637 xen_mc_issue(PARAVIRT_LAZY_MMU);
608} 638}
609 639
640static void xen_clts(void)
641{
642 struct multicall_space mcs;
643
644 mcs = xen_mc_entry(0);
645
646 MULTI_fpu_taskswitch(mcs.mc, 0);
647
648 xen_mc_issue(PARAVIRT_LAZY_CPU);
649}
650
651static void xen_write_cr0(unsigned long cr0)
652{
653 struct multicall_space mcs;
654
655 /* Only pay attention to cr0.TS; everything else is
656 ignored. */
657 mcs = xen_mc_entry(0);
658
659 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
660
661 xen_mc_issue(PARAVIRT_LAZY_CPU);
662}
663
610static void xen_write_cr2(unsigned long cr2) 664static void xen_write_cr2(unsigned long cr2)
611{ 665{
612 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2; 666 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
@@ -624,8 +678,10 @@ static unsigned long xen_read_cr2_direct(void)
624 678
625static void xen_write_cr4(unsigned long cr4) 679static void xen_write_cr4(unsigned long cr4)
626{ 680{
627 /* Just ignore cr4 changes; Xen doesn't allow us to do 681 cr4 &= ~X86_CR4_PGE;
628 anything anyway. */ 682 cr4 &= ~X86_CR4_PSE;
683
684 native_write_cr4(cr4);
629} 685}
630 686
631static unsigned long xen_read_cr3(void) 687static unsigned long xen_read_cr3(void)
@@ -831,7 +887,7 @@ static __init void xen_pagetable_setup_start(pgd_t *base)
831 PFN_DOWN(__pa(xen_start_info->pt_base))); 887 PFN_DOWN(__pa(xen_start_info->pt_base)));
832} 888}
833 889
834static __init void setup_shared_info(void) 890void xen_setup_shared_info(void)
835{ 891{
836 if (!xen_feature(XENFEAT_auto_translated_physmap)) { 892 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
837 unsigned long addr = fix_to_virt(FIX_PARAVIRT_BOOTMAP); 893 unsigned long addr = fix_to_virt(FIX_PARAVIRT_BOOTMAP);
@@ -854,6 +910,8 @@ static __init void setup_shared_info(void)
854 /* In UP this is as good a place as any to set up shared info */ 910 /* In UP this is as good a place as any to set up shared info */
855 xen_setup_vcpu_info_placement(); 911 xen_setup_vcpu_info_placement();
856#endif 912#endif
913
914 xen_setup_mfn_list_list();
857} 915}
858 916
859static __init void xen_pagetable_setup_done(pgd_t *base) 917static __init void xen_pagetable_setup_done(pgd_t *base)
@@ -866,15 +924,23 @@ static __init void xen_pagetable_setup_done(pgd_t *base)
866 pv_mmu_ops.release_pmd = xen_release_pmd; 924 pv_mmu_ops.release_pmd = xen_release_pmd;
867 pv_mmu_ops.set_pte = xen_set_pte; 925 pv_mmu_ops.set_pte = xen_set_pte;
868 926
869 setup_shared_info(); 927 xen_setup_shared_info();
870 928
871 /* Actually pin the pagetable down, but we can't set PG_pinned 929 /* Actually pin the pagetable down, but we can't set PG_pinned
872 yet because the page structures don't exist yet. */ 930 yet because the page structures don't exist yet. */
873 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base))); 931 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base)));
874} 932}
875 933
934static __init void xen_post_allocator_init(void)
935{
936 pv_mmu_ops.set_pmd = xen_set_pmd;
937 pv_mmu_ops.set_pud = xen_set_pud;
938
939 xen_mark_init_mm_pinned();
940}
941
876/* This is called once we have the cpu_possible_map */ 942/* This is called once we have the cpu_possible_map */
877void __init xen_setup_vcpu_info_placement(void) 943void xen_setup_vcpu_info_placement(void)
878{ 944{
879 int cpu; 945 int cpu;
880 946
@@ -960,7 +1026,7 @@ static const struct pv_init_ops xen_init_ops __initdata = {
960 .banner = xen_banner, 1026 .banner = xen_banner,
961 .memory_setup = xen_memory_setup, 1027 .memory_setup = xen_memory_setup,
962 .arch_setup = xen_arch_setup, 1028 .arch_setup = xen_arch_setup,
963 .post_allocator_init = xen_mark_init_mm_pinned, 1029 .post_allocator_init = xen_post_allocator_init,
964}; 1030};
965 1031
966static const struct pv_time_ops xen_time_ops __initdata = { 1032static const struct pv_time_ops xen_time_ops __initdata = {
@@ -978,10 +1044,10 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = {
978 .set_debugreg = xen_set_debugreg, 1044 .set_debugreg = xen_set_debugreg,
979 .get_debugreg = xen_get_debugreg, 1045 .get_debugreg = xen_get_debugreg,
980 1046
981 .clts = native_clts, 1047 .clts = xen_clts,
982 1048
983 .read_cr0 = native_read_cr0, 1049 .read_cr0 = native_read_cr0,
984 .write_cr0 = native_write_cr0, 1050 .write_cr0 = xen_write_cr0,
985 1051
986 .read_cr4 = native_read_cr4, 1052 .read_cr4 = native_read_cr4,
987 .read_cr4_safe = native_read_cr4_safe, 1053 .read_cr4_safe = native_read_cr4_safe,
@@ -1072,9 +1138,13 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1072 1138
1073 .set_pte = NULL, /* see xen_pagetable_setup_* */ 1139 .set_pte = NULL, /* see xen_pagetable_setup_* */
1074 .set_pte_at = xen_set_pte_at, 1140 .set_pte_at = xen_set_pte_at,
1075 .set_pmd = xen_set_pmd, 1141 .set_pmd = xen_set_pmd_hyper,
1142
1143 .ptep_modify_prot_start = __ptep_modify_prot_start,
1144 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1076 1145
1077 .pte_val = xen_pte_val, 1146 .pte_val = xen_pte_val,
1147 .pte_flags = native_pte_val,
1078 .pgd_val = xen_pgd_val, 1148 .pgd_val = xen_pgd_val,
1079 1149
1080 .make_pte = xen_make_pte, 1150 .make_pte = xen_make_pte,
@@ -1082,7 +1152,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1082 1152
1083 .set_pte_atomic = xen_set_pte_atomic, 1153 .set_pte_atomic = xen_set_pte_atomic,
1084 .set_pte_present = xen_set_pte_at, 1154 .set_pte_present = xen_set_pte_at,
1085 .set_pud = xen_set_pud, 1155 .set_pud = xen_set_pud_hyper,
1086 .pte_clear = xen_pte_clear, 1156 .pte_clear = xen_pte_clear,
1087 .pmd_clear = xen_pmd_clear, 1157 .pmd_clear = xen_pmd_clear,
1088 1158
@@ -1114,11 +1184,13 @@ static const struct smp_ops xen_smp_ops __initdata = {
1114 1184
1115static void xen_reboot(int reason) 1185static void xen_reboot(int reason)
1116{ 1186{
1187 struct sched_shutdown r = { .reason = reason };
1188
1117#ifdef CONFIG_SMP 1189#ifdef CONFIG_SMP
1118 smp_send_stop(); 1190 smp_send_stop();
1119#endif 1191#endif
1120 1192
1121 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, reason)) 1193 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
1122 BUG(); 1194 BUG();
1123} 1195}
1124 1196
@@ -1173,6 +1245,8 @@ asmlinkage void __init xen_start_kernel(void)
1173 1245
1174 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0); 1246 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
1175 1247
1248 xen_setup_features();
1249
1176 /* Install Xen paravirt ops */ 1250 /* Install Xen paravirt ops */
1177 pv_info = xen_info; 1251 pv_info = xen_info;
1178 pv_init_ops = xen_init_ops; 1252 pv_init_ops = xen_init_ops;
@@ -1182,17 +1256,20 @@ asmlinkage void __init xen_start_kernel(void)
1182 pv_apic_ops = xen_apic_ops; 1256 pv_apic_ops = xen_apic_ops;
1183 pv_mmu_ops = xen_mmu_ops; 1257 pv_mmu_ops = xen_mmu_ops;
1184 1258
1259 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1260 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1261 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1262 }
1263
1185 machine_ops = xen_machine_ops; 1264 machine_ops = xen_machine_ops;
1186 1265
1187#ifdef CONFIG_SMP 1266#ifdef CONFIG_SMP
1188 smp_ops = xen_smp_ops; 1267 smp_ops = xen_smp_ops;
1189#endif 1268#endif
1190 1269
1191 xen_setup_features();
1192
1193 /* Get mfn list */ 1270 /* Get mfn list */
1194 if (!xen_feature(XENFEAT_auto_translated_physmap)) 1271 if (!xen_feature(XENFEAT_auto_translated_physmap))
1195 phys_to_machine_mapping = (unsigned long *)xen_start_info->mfn_list; 1272 xen_build_dynamic_phys_to_machine();
1196 1273
1197 pgd = (pgd_t *)xen_start_info->pt_base; 1274 pgd = (pgd_t *)xen_start_info->pt_base;
1198 1275
@@ -1233,8 +1310,11 @@ asmlinkage void __init xen_start_kernel(void)
1233 ? __pa(xen_start_info->mod_start) : 0; 1310 ? __pa(xen_start_info->mod_start) : 0;
1234 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1311 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1235 1312
1236 if (!is_initial_xendomain()) 1313 if (!is_initial_xendomain()) {
1314 add_preferred_console("xenboot", 0, NULL);
1315 add_preferred_console("tty", 0, NULL);
1237 add_preferred_console("hvc", 0, NULL); 1316 add_preferred_console("hvc", 0, NULL);
1317 }
1238 1318
1239 /* Start the world */ 1319 /* Start the world */
1240 i386_start_kernel(); 1320 i386_start_kernel();
diff --git a/arch/x86/xen/manage.c b/arch/x86/xen/manage.c
deleted file mode 100644
index aa7af9e6abc0..000000000000
--- a/arch/x86/xen/manage.c
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 * Handle extern requests for shutdown, reboot and sysrq
3 */
4#include <linux/kernel.h>
5#include <linux/err.h>
6#include <linux/reboot.h>
7#include <linux/sysrq.h>
8
9#include <xen/xenbus.h>
10
11#define SHUTDOWN_INVALID -1
12#define SHUTDOWN_POWEROFF 0
13#define SHUTDOWN_SUSPEND 2
14/* Code 3 is SHUTDOWN_CRASH, which we don't use because the domain can only
15 * report a crash, not be instructed to crash!
16 * HALT is the same as POWEROFF, as far as we're concerned. The tools use
17 * the distinction when we return the reason code to them.
18 */
19#define SHUTDOWN_HALT 4
20
21/* Ignore multiple shutdown requests. */
22static int shutting_down = SHUTDOWN_INVALID;
23
24static void shutdown_handler(struct xenbus_watch *watch,
25 const char **vec, unsigned int len)
26{
27 char *str;
28 struct xenbus_transaction xbt;
29 int err;
30
31 if (shutting_down != SHUTDOWN_INVALID)
32 return;
33
34 again:
35 err = xenbus_transaction_start(&xbt);
36 if (err)
37 return;
38
39 str = (char *)xenbus_read(xbt, "control", "shutdown", NULL);
40 /* Ignore read errors and empty reads. */
41 if (XENBUS_IS_ERR_READ(str)) {
42 xenbus_transaction_end(xbt, 1);
43 return;
44 }
45
46 xenbus_write(xbt, "control", "shutdown", "");
47
48 err = xenbus_transaction_end(xbt, 0);
49 if (err == -EAGAIN) {
50 kfree(str);
51 goto again;
52 }
53
54 if (strcmp(str, "poweroff") == 0 ||
55 strcmp(str, "halt") == 0)
56 orderly_poweroff(false);
57 else if (strcmp(str, "reboot") == 0)
58 ctrl_alt_del();
59 else {
60 printk(KERN_INFO "Ignoring shutdown request: %s\n", str);
61 shutting_down = SHUTDOWN_INVALID;
62 }
63
64 kfree(str);
65}
66
67static void sysrq_handler(struct xenbus_watch *watch, const char **vec,
68 unsigned int len)
69{
70 char sysrq_key = '\0';
71 struct xenbus_transaction xbt;
72 int err;
73
74 again:
75 err = xenbus_transaction_start(&xbt);
76 if (err)
77 return;
78 if (!xenbus_scanf(xbt, "control", "sysrq", "%c", &sysrq_key)) {
79 printk(KERN_ERR "Unable to read sysrq code in "
80 "control/sysrq\n");
81 xenbus_transaction_end(xbt, 1);
82 return;
83 }
84
85 if (sysrq_key != '\0')
86 xenbus_printf(xbt, "control", "sysrq", "%c", '\0');
87
88 err = xenbus_transaction_end(xbt, 0);
89 if (err == -EAGAIN)
90 goto again;
91
92 if (sysrq_key != '\0')
93 handle_sysrq(sysrq_key, NULL);
94}
95
96static struct xenbus_watch shutdown_watch = {
97 .node = "control/shutdown",
98 .callback = shutdown_handler
99};
100
101static struct xenbus_watch sysrq_watch = {
102 .node = "control/sysrq",
103 .callback = sysrq_handler
104};
105
106static int setup_shutdown_watcher(void)
107{
108 int err;
109
110 err = register_xenbus_watch(&shutdown_watch);
111 if (err) {
112 printk(KERN_ERR "Failed to set shutdown watcher\n");
113 return err;
114 }
115
116 err = register_xenbus_watch(&sysrq_watch);
117 if (err) {
118 printk(KERN_ERR "Failed to set sysrq watcher\n");
119 return err;
120 }
121
122 return 0;
123}
124
125static int shutdown_event(struct notifier_block *notifier,
126 unsigned long event,
127 void *data)
128{
129 setup_shutdown_watcher();
130 return NOTIFY_DONE;
131}
132
133static int __init setup_shutdown_event(void)
134{
135 static struct notifier_block xenstore_notifier = {
136 .notifier_call = shutdown_event
137 };
138 register_xenstore_notifier(&xenstore_notifier);
139
140 return 0;
141}
142
143subsys_initcall(setup_shutdown_event);
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 4e527e7893a8..42b3b9ed641d 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -56,6 +56,131 @@
56#include "multicalls.h" 56#include "multicalls.h"
57#include "mmu.h" 57#include "mmu.h"
58 58
59#define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
60#define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
61
62/* Placeholder for holes in the address space */
63static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE]
64 __attribute__((section(".data.page_aligned"))) =
65 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
66
67 /* Array of pointers to pages containing p2m entries */
68static unsigned long *p2m_top[TOP_ENTRIES]
69 __attribute__((section(".data.page_aligned"))) =
70 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
71
72/* Arrays of p2m arrays expressed in mfns used for save/restore */
73static unsigned long p2m_top_mfn[TOP_ENTRIES]
74 __attribute__((section(".bss.page_aligned")));
75
76static unsigned long p2m_top_mfn_list[
77 PAGE_ALIGN(TOP_ENTRIES / P2M_ENTRIES_PER_PAGE)]
78 __attribute__((section(".bss.page_aligned")));
79
80static inline unsigned p2m_top_index(unsigned long pfn)
81{
82 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
83 return pfn / P2M_ENTRIES_PER_PAGE;
84}
85
86static inline unsigned p2m_index(unsigned long pfn)
87{
88 return pfn % P2M_ENTRIES_PER_PAGE;
89}
90
91/* Build the parallel p2m_top_mfn structures */
92void xen_setup_mfn_list_list(void)
93{
94 unsigned pfn, idx;
95
96 for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
97 unsigned topidx = p2m_top_index(pfn);
98
99 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
100 }
101
102 for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
103 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
104 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
105 }
106
107 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
108
109 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
110 virt_to_mfn(p2m_top_mfn_list);
111 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
112}
113
114/* Set up p2m_top to point to the domain-builder provided p2m pages */
115void __init xen_build_dynamic_phys_to_machine(void)
116{
117 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
118 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
119 unsigned pfn;
120
121 for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
122 unsigned topidx = p2m_top_index(pfn);
123
124 p2m_top[topidx] = &mfn_list[pfn];
125 }
126}
127
128unsigned long get_phys_to_machine(unsigned long pfn)
129{
130 unsigned topidx, idx;
131
132 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
133 return INVALID_P2M_ENTRY;
134
135 topidx = p2m_top_index(pfn);
136 idx = p2m_index(pfn);
137 return p2m_top[topidx][idx];
138}
139EXPORT_SYMBOL_GPL(get_phys_to_machine);
140
141static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
142{
143 unsigned long *p;
144 unsigned i;
145
146 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
147 BUG_ON(p == NULL);
148
149 for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
150 p[i] = INVALID_P2M_ENTRY;
151
152 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
153 free_page((unsigned long)p);
154 else
155 *mfnp = virt_to_mfn(p);
156}
157
158void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
159{
160 unsigned topidx, idx;
161
162 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
163 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
164 return;
165 }
166
167 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
168 BUG_ON(mfn != INVALID_P2M_ENTRY);
169 return;
170 }
171
172 topidx = p2m_top_index(pfn);
173 if (p2m_top[topidx] == p2m_missing) {
174 /* no need to allocate a page to store an invalid entry */
175 if (mfn == INVALID_P2M_ENTRY)
176 return;
177 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
178 }
179
180 idx = p2m_index(pfn);
181 p2m_top[topidx][idx] = mfn;
182}
183
59xmaddr_t arbitrary_virt_to_machine(unsigned long address) 184xmaddr_t arbitrary_virt_to_machine(unsigned long address)
60{ 185{
61 unsigned int level; 186 unsigned int level;
@@ -98,24 +223,60 @@ void make_lowmem_page_readwrite(void *vaddr)
98} 223}
99 224
100 225
101void xen_set_pmd(pmd_t *ptr, pmd_t val) 226static bool page_pinned(void *ptr)
227{
228 struct page *page = virt_to_page(ptr);
229
230 return PagePinned(page);
231}
232
233static void extend_mmu_update(const struct mmu_update *update)
102{ 234{
103 struct multicall_space mcs; 235 struct multicall_space mcs;
104 struct mmu_update *u; 236 struct mmu_update *u;
105 237
106 preempt_disable(); 238 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
239
240 if (mcs.mc != NULL)
241 mcs.mc->args[1]++;
242 else {
243 mcs = __xen_mc_entry(sizeof(*u));
244 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
245 }
107 246
108 mcs = xen_mc_entry(sizeof(*u));
109 u = mcs.args; 247 u = mcs.args;
110 u->ptr = virt_to_machine(ptr).maddr; 248 *u = *update;
111 u->val = pmd_val_ma(val); 249}
112 MULTI_mmu_update(mcs.mc, u, 1, NULL, DOMID_SELF); 250
251void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
252{
253 struct mmu_update u;
254
255 preempt_disable();
256
257 xen_mc_batch();
258
259 u.ptr = virt_to_machine(ptr).maddr;
260 u.val = pmd_val_ma(val);
261 extend_mmu_update(&u);
113 262
114 xen_mc_issue(PARAVIRT_LAZY_MMU); 263 xen_mc_issue(PARAVIRT_LAZY_MMU);
115 264
116 preempt_enable(); 265 preempt_enable();
117} 266}
118 267
268void xen_set_pmd(pmd_t *ptr, pmd_t val)
269{
270 /* If page is not pinned, we can just update the entry
271 directly */
272 if (!page_pinned(ptr)) {
273 *ptr = val;
274 return;
275 }
276
277 xen_set_pmd_hyper(ptr, val);
278}
279
119/* 280/*
120 * Associate a virtual page frame with a given physical page frame 281 * Associate a virtual page frame with a given physical page frame
121 * and protection flags for that frame. 282 * and protection flags for that frame.
@@ -179,6 +340,26 @@ out:
179 preempt_enable(); 340 preempt_enable();
180} 341}
181 342
343pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
344{
345 /* Just return the pte as-is. We preserve the bits on commit */
346 return *ptep;
347}
348
349void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
350 pte_t *ptep, pte_t pte)
351{
352 struct mmu_update u;
353
354 xen_mc_batch();
355
356 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
357 u.val = pte_val_ma(pte);
358 extend_mmu_update(&u);
359
360 xen_mc_issue(PARAVIRT_LAZY_MMU);
361}
362
182/* Assume pteval_t is equivalent to all the other *val_t types. */ 363/* Assume pteval_t is equivalent to all the other *val_t types. */
183static pteval_t pte_mfn_to_pfn(pteval_t val) 364static pteval_t pte_mfn_to_pfn(pteval_t val)
184{ 365{
@@ -229,24 +410,35 @@ pmdval_t xen_pmd_val(pmd_t pmd)
229 return pte_mfn_to_pfn(pmd.pmd); 410 return pte_mfn_to_pfn(pmd.pmd);
230} 411}
231 412
232void xen_set_pud(pud_t *ptr, pud_t val) 413void xen_set_pud_hyper(pud_t *ptr, pud_t val)
233{ 414{
234 struct multicall_space mcs; 415 struct mmu_update u;
235 struct mmu_update *u;
236 416
237 preempt_disable(); 417 preempt_disable();
238 418
239 mcs = xen_mc_entry(sizeof(*u)); 419 xen_mc_batch();
240 u = mcs.args; 420
241 u->ptr = virt_to_machine(ptr).maddr; 421 u.ptr = virt_to_machine(ptr).maddr;
242 u->val = pud_val_ma(val); 422 u.val = pud_val_ma(val);
243 MULTI_mmu_update(mcs.mc, u, 1, NULL, DOMID_SELF); 423 extend_mmu_update(&u);
244 424
245 xen_mc_issue(PARAVIRT_LAZY_MMU); 425 xen_mc_issue(PARAVIRT_LAZY_MMU);
246 426
247 preempt_enable(); 427 preempt_enable();
248} 428}
249 429
430void xen_set_pud(pud_t *ptr, pud_t val)
431{
432 /* If page is not pinned, we can just update the entry
433 directly */
434 if (!page_pinned(ptr)) {
435 *ptr = val;
436 return;
437 }
438
439 xen_set_pud_hyper(ptr, val);
440}
441
250void xen_set_pte(pte_t *ptep, pte_t pte) 442void xen_set_pte(pte_t *ptep, pte_t pte)
251{ 443{
252 ptep->pte_high = pte.pte_high; 444 ptep->pte_high = pte.pte_high;
@@ -268,7 +460,7 @@ void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
268 460
269void xen_pmd_clear(pmd_t *pmdp) 461void xen_pmd_clear(pmd_t *pmdp)
270{ 462{
271 xen_set_pmd(pmdp, __pmd(0)); 463 set_pmd(pmdp, __pmd(0));
272} 464}
273 465
274pmd_t xen_make_pmd(pmdval_t pmd) 466pmd_t xen_make_pmd(pmdval_t pmd)
@@ -441,6 +633,29 @@ void xen_pgd_pin(pgd_t *pgd)
441 xen_mc_issue(0); 633 xen_mc_issue(0);
442} 634}
443 635
636/*
637 * On save, we need to pin all pagetables to make sure they get their
638 * mfns turned into pfns. Search the list for any unpinned pgds and pin
639 * them (unpinned pgds are not currently in use, probably because the
640 * process is under construction or destruction).
641 */
642void xen_mm_pin_all(void)
643{
644 unsigned long flags;
645 struct page *page;
646
647 spin_lock_irqsave(&pgd_lock, flags);
648
649 list_for_each_entry(page, &pgd_list, lru) {
650 if (!PagePinned(page)) {
651 xen_pgd_pin((pgd_t *)page_address(page));
652 SetPageSavePinned(page);
653 }
654 }
655
656 spin_unlock_irqrestore(&pgd_lock, flags);
657}
658
444/* The init_mm pagetable is really pinned as soon as its created, but 659/* The init_mm pagetable is really pinned as soon as its created, but
445 that's before we have page structures to store the bits. So do all 660 that's before we have page structures to store the bits. So do all
446 the book-keeping now. */ 661 the book-keeping now. */
@@ -498,6 +713,29 @@ static void xen_pgd_unpin(pgd_t *pgd)
498 xen_mc_issue(0); 713 xen_mc_issue(0);
499} 714}
500 715
716/*
717 * On resume, undo any pinning done at save, so that the rest of the
718 * kernel doesn't see any unexpected pinned pagetables.
719 */
720void xen_mm_unpin_all(void)
721{
722 unsigned long flags;
723 struct page *page;
724
725 spin_lock_irqsave(&pgd_lock, flags);
726
727 list_for_each_entry(page, &pgd_list, lru) {
728 if (PageSavePinned(page)) {
729 BUG_ON(!PagePinned(page));
730 printk("unpinning pinned %p\n", page_address(page));
731 xen_pgd_unpin((pgd_t *)page_address(page));
732 ClearPageSavePinned(page);
733 }
734 }
735
736 spin_unlock_irqrestore(&pgd_lock, flags);
737}
738
501void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) 739void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
502{ 740{
503 spin_lock(&next->page_table_lock); 741 spin_lock(&next->page_table_lock);
@@ -591,7 +829,7 @@ void xen_exit_mmap(struct mm_struct *mm)
591 spin_lock(&mm->page_table_lock); 829 spin_lock(&mm->page_table_lock);
592 830
593 /* pgd may not be pinned in the error exit path of execve */ 831 /* pgd may not be pinned in the error exit path of execve */
594 if (PagePinned(virt_to_page(mm->pgd))) 832 if (page_pinned(mm->pgd))
595 xen_pgd_unpin(mm->pgd); 833 xen_pgd_unpin(mm->pgd);
596 834
597 spin_unlock(&mm->page_table_lock); 835 spin_unlock(&mm->page_table_lock);
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h
index 5fe961caffd4..297bf9f5b8bc 100644
--- a/arch/x86/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
@@ -25,10 +25,6 @@ enum pt_level {
25 25
26void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); 26void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags);
27 27
28void xen_set_pte(pte_t *ptep, pte_t pteval);
29void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
30 pte_t *ptep, pte_t pteval);
31void xen_set_pmd(pmd_t *pmdp, pmd_t pmdval);
32 28
33void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next); 29void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next);
34void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm); 30void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm);
@@ -45,11 +41,19 @@ pte_t xen_make_pte(pteval_t);
45pmd_t xen_make_pmd(pmdval_t); 41pmd_t xen_make_pmd(pmdval_t);
46pgd_t xen_make_pgd(pgdval_t); 42pgd_t xen_make_pgd(pgdval_t);
47 43
44void xen_set_pte(pte_t *ptep, pte_t pteval);
48void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, 45void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
49 pte_t *ptep, pte_t pteval); 46 pte_t *ptep, pte_t pteval);
50void xen_set_pte_atomic(pte_t *ptep, pte_t pte); 47void xen_set_pte_atomic(pte_t *ptep, pte_t pte);
48void xen_set_pmd(pmd_t *pmdp, pmd_t pmdval);
51void xen_set_pud(pud_t *ptr, pud_t val); 49void xen_set_pud(pud_t *ptr, pud_t val);
50void xen_set_pmd_hyper(pmd_t *pmdp, pmd_t pmdval);
51void xen_set_pud_hyper(pud_t *ptr, pud_t val);
52void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); 52void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
53void xen_pmd_clear(pmd_t *pmdp); 53void xen_pmd_clear(pmd_t *pmdp);
54 54
55pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
56void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
57 pte_t *ptep, pte_t pte);
58
55#endif /* _XEN_MMU_H */ 59#endif /* _XEN_MMU_H */
diff --git a/arch/x86/xen/multicalls.c b/arch/x86/xen/multicalls.c
index 5791eb2e3750..3c63c4da7ed1 100644
--- a/arch/x86/xen/multicalls.c
+++ b/arch/x86/xen/multicalls.c
@@ -29,14 +29,14 @@
29#define MC_DEBUG 1 29#define MC_DEBUG 1
30 30
31#define MC_BATCH 32 31#define MC_BATCH 32
32#define MC_ARGS (MC_BATCH * 16 / sizeof(u64)) 32#define MC_ARGS (MC_BATCH * 16)
33 33
34struct mc_buffer { 34struct mc_buffer {
35 struct multicall_entry entries[MC_BATCH]; 35 struct multicall_entry entries[MC_BATCH];
36#if MC_DEBUG 36#if MC_DEBUG
37 struct multicall_entry debug[MC_BATCH]; 37 struct multicall_entry debug[MC_BATCH];
38#endif 38#endif
39 u64 args[MC_ARGS]; 39 unsigned char args[MC_ARGS];
40 struct callback { 40 struct callback {
41 void (*fn)(void *); 41 void (*fn)(void *);
42 void *data; 42 void *data;
@@ -107,20 +107,48 @@ struct multicall_space __xen_mc_entry(size_t args)
107{ 107{
108 struct mc_buffer *b = &__get_cpu_var(mc_buffer); 108 struct mc_buffer *b = &__get_cpu_var(mc_buffer);
109 struct multicall_space ret; 109 struct multicall_space ret;
110 unsigned argspace = (args + sizeof(u64) - 1) / sizeof(u64); 110 unsigned argidx = roundup(b->argidx, sizeof(u64));
111 111
112 BUG_ON(preemptible()); 112 BUG_ON(preemptible());
113 BUG_ON(argspace > MC_ARGS); 113 BUG_ON(b->argidx > MC_ARGS);
114 114
115 if (b->mcidx == MC_BATCH || 115 if (b->mcidx == MC_BATCH ||
116 (b->argidx + argspace) > MC_ARGS) 116 (argidx + args) > MC_ARGS) {
117 xen_mc_flush(); 117 xen_mc_flush();
118 argidx = roundup(b->argidx, sizeof(u64));
119 }
118 120
119 ret.mc = &b->entries[b->mcidx]; 121 ret.mc = &b->entries[b->mcidx];
120 b->mcidx++; 122 b->mcidx++;
123 ret.args = &b->args[argidx];
124 b->argidx = argidx + args;
125
126 BUG_ON(b->argidx > MC_ARGS);
127 return ret;
128}
129
130struct multicall_space xen_mc_extend_args(unsigned long op, size_t size)
131{
132 struct mc_buffer *b = &__get_cpu_var(mc_buffer);
133 struct multicall_space ret = { NULL, NULL };
134
135 BUG_ON(preemptible());
136 BUG_ON(b->argidx > MC_ARGS);
137
138 if (b->mcidx == 0)
139 return ret;
140
141 if (b->entries[b->mcidx - 1].op != op)
142 return ret;
143
144 if ((b->argidx + size) > MC_ARGS)
145 return ret;
146
147 ret.mc = &b->entries[b->mcidx - 1];
121 ret.args = &b->args[b->argidx]; 148 ret.args = &b->args[b->argidx];
122 b->argidx += argspace; 149 b->argidx += size;
123 150
151 BUG_ON(b->argidx > MC_ARGS);
124 return ret; 152 return ret;
125} 153}
126 154
diff --git a/arch/x86/xen/multicalls.h b/arch/x86/xen/multicalls.h
index 8bae996d99a3..858938241616 100644
--- a/arch/x86/xen/multicalls.h
+++ b/arch/x86/xen/multicalls.h
@@ -45,4 +45,16 @@ static inline void xen_mc_issue(unsigned mode)
45/* Set up a callback to be called when the current batch is flushed */ 45/* Set up a callback to be called when the current batch is flushed */
46void xen_mc_callback(void (*fn)(void *), void *data); 46void xen_mc_callback(void (*fn)(void *), void *data);
47 47
48/*
49 * Try to extend the arguments of the previous multicall command. The
50 * previous command's op must match. If it does, then it attempts to
51 * extend the argument space allocated to the multicall entry by
52 * arg_size bytes.
53 *
54 * The returned multicall_space will return with mc pointing to the
55 * command on success, or NULL on failure, and args pointing to the
56 * newly allocated space.
57 */
58struct multicall_space xen_mc_extend_args(unsigned long op, size_t arg_size);
59
48#endif /* _XEN_MULTICALLS_H */ 60#endif /* _XEN_MULTICALLS_H */
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 9001c9df04d8..a29575803204 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -16,6 +16,7 @@
16#include <asm/xen/hypervisor.h> 16#include <asm/xen/hypervisor.h>
17#include <asm/xen/hypercall.h> 17#include <asm/xen/hypercall.h>
18 18
19#include <xen/page.h>
19#include <xen/interface/callback.h> 20#include <xen/interface/callback.h>
20#include <xen/interface/physdev.h> 21#include <xen/interface/physdev.h>
21#include <xen/features.h> 22#include <xen/features.h>
@@ -27,8 +28,6 @@
27extern const char xen_hypervisor_callback[]; 28extern const char xen_hypervisor_callback[];
28extern const char xen_failsafe_callback[]; 29extern const char xen_failsafe_callback[];
29 30
30unsigned long *phys_to_machine_mapping;
31EXPORT_SYMBOL(phys_to_machine_mapping);
32 31
33/** 32/**
34 * machine_specific_memory_setup - Hook for machine specific memory setup. 33 * machine_specific_memory_setup - Hook for machine specific memory setup.
@@ -38,6 +37,8 @@ char * __init xen_memory_setup(void)
38{ 37{
39 unsigned long max_pfn = xen_start_info->nr_pages; 38 unsigned long max_pfn = xen_start_info->nr_pages;
40 39
40 max_pfn = min(MAX_DOMAIN_PAGES, max_pfn);
41
41 e820.nr_map = 0; 42 e820.nr_map = 0;
42 e820_add_region(0, LOWMEMSIZE(), E820_RAM); 43 e820_add_region(0, LOWMEMSIZE(), E820_RAM);
43 e820_add_region(HIGH_MEMORY, PFN_PHYS(max_pfn)-HIGH_MEMORY, E820_RAM); 44 e820_add_region(HIGH_MEMORY, PFN_PHYS(max_pfn)-HIGH_MEMORY, E820_RAM);
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index 94e69000f982..d2e3c20127d7 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -35,7 +35,7 @@
35#include "xen-ops.h" 35#include "xen-ops.h"
36#include "mmu.h" 36#include "mmu.h"
37 37
38static cpumask_t xen_cpu_initialized_map; 38cpumask_t xen_cpu_initialized_map;
39static DEFINE_PER_CPU(int, resched_irq) = -1; 39static DEFINE_PER_CPU(int, resched_irq) = -1;
40static DEFINE_PER_CPU(int, callfunc_irq) = -1; 40static DEFINE_PER_CPU(int, callfunc_irq) = -1;
41static DEFINE_PER_CPU(int, debug_irq) = -1; 41static DEFINE_PER_CPU(int, debug_irq) = -1;
@@ -65,6 +65,12 @@ static struct call_data_struct *call_data;
65 */ 65 */
66static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id) 66static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id)
67{ 67{
68#ifdef CONFIG_X86_32
69 __get_cpu_var(irq_stat).irq_resched_count++;
70#else
71 add_pda(irq_resched_count, 1);
72#endif
73
68 return IRQ_HANDLED; 74 return IRQ_HANDLED;
69} 75}
70 76
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
new file mode 100644
index 000000000000..251669a932d4
--- /dev/null
+++ b/arch/x86/xen/suspend.c
@@ -0,0 +1,45 @@
1#include <linux/types.h>
2
3#include <xen/interface/xen.h>
4#include <xen/grant_table.h>
5#include <xen/events.h>
6
7#include <asm/xen/hypercall.h>
8#include <asm/xen/page.h>
9
10#include "xen-ops.h"
11#include "mmu.h"
12
13void xen_pre_suspend(void)
14{
15 xen_start_info->store_mfn = mfn_to_pfn(xen_start_info->store_mfn);
16 xen_start_info->console.domU.mfn =
17 mfn_to_pfn(xen_start_info->console.domU.mfn);
18
19 BUG_ON(!irqs_disabled());
20
21 HYPERVISOR_shared_info = &xen_dummy_shared_info;
22 if (HYPERVISOR_update_va_mapping(fix_to_virt(FIX_PARAVIRT_BOOTMAP),
23 __pte_ma(0), 0))
24 BUG();
25}
26
27void xen_post_suspend(int suspend_cancelled)
28{
29 xen_setup_shared_info();
30
31 if (suspend_cancelled) {
32 xen_start_info->store_mfn =
33 pfn_to_mfn(xen_start_info->store_mfn);
34 xen_start_info->console.domU.mfn =
35 pfn_to_mfn(xen_start_info->console.domU.mfn);
36 } else {
37#ifdef CONFIG_SMP
38 xen_cpu_initialized_map = cpu_online_map;
39#endif
40 xen_vcpu_restore();
41 xen_timer_resume();
42 }
43
44}
45
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 41e217503c96..64f0038b9558 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -459,6 +459,19 @@ void xen_setup_cpu_clockevents(void)
459 clockevents_register_device(&__get_cpu_var(xen_clock_events)); 459 clockevents_register_device(&__get_cpu_var(xen_clock_events));
460} 460}
461 461
462void xen_timer_resume(void)
463{
464 int cpu;
465
466 if (xen_clockevent != &xen_vcpuop_clockevent)
467 return;
468
469 for_each_online_cpu(cpu) {
470 if (HYPERVISOR_vcpu_op(VCPUOP_stop_periodic_timer, cpu, NULL))
471 BUG();
472 }
473}
474
462__init void xen_time_init(void) 475__init void xen_time_init(void)
463{ 476{
464 int cpu = smp_processor_id(); 477 int cpu = smp_processor_id();
diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
index 6ec3b4f7719b..7c0cf6320a0a 100644
--- a/arch/x86/xen/xen-head.S
+++ b/arch/x86/xen/xen-head.S
@@ -7,6 +7,7 @@
7#include <linux/init.h> 7#include <linux/init.h>
8#include <asm/boot.h> 8#include <asm/boot.h>
9#include <xen/interface/elfnote.h> 9#include <xen/interface/elfnote.h>
10#include <asm/xen/interface.h>
10 11
11 __INIT 12 __INIT
12ENTRY(startup_xen) 13ENTRY(startup_xen)
@@ -32,5 +33,9 @@ ENTRY(hypercall_page)
32 ELFNOTE(Xen, XEN_ELFNOTE_FEATURES, .asciz "!writable_page_tables|pae_pgdir_above_4gb") 33 ELFNOTE(Xen, XEN_ELFNOTE_FEATURES, .asciz "!writable_page_tables|pae_pgdir_above_4gb")
33 ELFNOTE(Xen, XEN_ELFNOTE_PAE_MODE, .asciz "yes") 34 ELFNOTE(Xen, XEN_ELFNOTE_PAE_MODE, .asciz "yes")
34 ELFNOTE(Xen, XEN_ELFNOTE_LOADER, .asciz "generic") 35 ELFNOTE(Xen, XEN_ELFNOTE_LOADER, .asciz "generic")
36 ELFNOTE(Xen, XEN_ELFNOTE_L1_MFN_VALID,
37 .quad _PAGE_PRESENT; .quad _PAGE_PRESENT)
38 ELFNOTE(Xen, XEN_ELFNOTE_SUSPEND_CANCEL, .long 1)
39 ELFNOTE(Xen, XEN_ELFNOTE_HV_START_LOW, .long __HYPERVISOR_VIRT_START)
35 40
36#endif /*CONFIG_XEN */ 41#endif /*CONFIG_XEN */
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index f1063ae08037..9a055592a307 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -9,18 +9,26 @@
9extern const char xen_hypervisor_callback[]; 9extern const char xen_hypervisor_callback[];
10extern const char xen_failsafe_callback[]; 10extern const char xen_failsafe_callback[];
11 11
12struct trap_info;
12void xen_copy_trap_info(struct trap_info *traps); 13void xen_copy_trap_info(struct trap_info *traps);
13 14
14DECLARE_PER_CPU(unsigned long, xen_cr3); 15DECLARE_PER_CPU(unsigned long, xen_cr3);
15DECLARE_PER_CPU(unsigned long, xen_current_cr3); 16DECLARE_PER_CPU(unsigned long, xen_current_cr3);
16 17
17extern struct start_info *xen_start_info; 18extern struct start_info *xen_start_info;
19extern struct shared_info xen_dummy_shared_info;
18extern struct shared_info *HYPERVISOR_shared_info; 20extern struct shared_info *HYPERVISOR_shared_info;
19 21
22void xen_setup_mfn_list_list(void);
23void xen_setup_shared_info(void);
24
20char * __init xen_memory_setup(void); 25char * __init xen_memory_setup(void);
21void __init xen_arch_setup(void); 26void __init xen_arch_setup(void);
22void __init xen_init_IRQ(void); 27void __init xen_init_IRQ(void);
23void xen_enable_sysenter(void); 28void xen_enable_sysenter(void);
29void xen_vcpu_restore(void);
30
31void __init xen_build_dynamic_phys_to_machine(void);
24 32
25void xen_setup_timer(int cpu); 33void xen_setup_timer(int cpu);
26void xen_setup_cpu_clockevents(void); 34void xen_setup_cpu_clockevents(void);
@@ -29,6 +37,7 @@ void __init xen_time_init(void);
29unsigned long xen_get_wallclock(void); 37unsigned long xen_get_wallclock(void);
30int xen_set_wallclock(unsigned long time); 38int xen_set_wallclock(unsigned long time);
31unsigned long long xen_sched_clock(void); 39unsigned long long xen_sched_clock(void);
40void xen_timer_resume(void);
32 41
33irqreturn_t xen_debug_interrupt(int irq, void *dev_id); 42irqreturn_t xen_debug_interrupt(int irq, void *dev_id);
34 43
@@ -54,6 +63,8 @@ int xen_smp_call_function_single(int cpu, void (*func) (void *info), void *info,
54int xen_smp_call_function_mask(cpumask_t mask, void (*func)(void *), 63int xen_smp_call_function_mask(cpumask_t mask, void (*func)(void *),
55 void *info, int wait); 64 void *info, int wait);
56 65
66extern cpumask_t xen_cpu_initialized_map;
67
57 68
58/* Declare an asm function, along with symbols needed to make it 69/* Declare an asm function, along with symbols needed to make it
59 inlineable */ 70 inlineable */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-28 00:01:50 -0500