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-rw-r--r--arch/x86/xen/enlighten.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index bd8b8459c3d0..5240f563076d 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1070,6 +1070,23 @@ static inline void xen_write_cr8(unsigned long val)
1070 BUG_ON(val); 1070 BUG_ON(val);
1071} 1071}
1072#endif 1072#endif
1073
1074static u64 xen_read_msr_safe(unsigned int msr, int *err)
1075{
1076 u64 val;
1077
1078 val = native_read_msr_safe(msr, err);
1079 switch (msr) {
1080 case MSR_IA32_APICBASE:
1081#ifdef CONFIG_X86_X2APIC
1082 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
1083#endif
1084 val &= ~X2APIC_ENABLE;
1085 break;
1086 }
1087 return val;
1088}
1089
1073static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 1090static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1074{ 1091{
1075 int ret; 1092 int ret;
@@ -1240,7 +1257,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1240 1257
1241 .wbinvd = native_wbinvd, 1258 .wbinvd = native_wbinvd,
1242 1259
1243 .read_msr = native_read_msr_safe, 1260 .read_msr = xen_read_msr_safe,
1244 .write_msr = xen_write_msr_safe, 1261 .write_msr = xen_write_msr_safe,
1245 1262
1246 .read_tsc = native_read_tsc, 1263 .read_tsc = native_read_tsc,
@@ -1741,6 +1758,7 @@ asmlinkage __visible void __init xen_start_kernel(void)
1741#ifdef CONFIG_X86_32 1758#ifdef CONFIG_X86_32
1742 i386_start_kernel(); 1759 i386_start_kernel();
1743#else 1760#else
1761 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1744 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1762 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1745#endif 1763#endif
1746} 1764}