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-rw-r--r--arch/x86/pci/Makefile2
-rw-r--r--arch/x86/pci/Makefile_6417
-rw-r--r--arch/x86/pci/k8-bus_64.c83
-rw-r--r--arch/x86/pci/mmconfig_64.c157
4 files changed, 258 insertions, 1 deletions
diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
index b3e54c45d408..c5c8e485fc44 100644
--- a/arch/x86/pci/Makefile
+++ b/arch/x86/pci/Makefile
@@ -1,5 +1,5 @@
1ifeq ($(CONFIG_X86_32),y) 1ifeq ($(CONFIG_X86_32),y)
2include ${srctree}/arch/x86/pci/Makefile_32 2include ${srctree}/arch/x86/pci/Makefile_32
3else 3else
4include ${srctree}/arch/x86_64/pci/Makefile_64 4include ${srctree}/arch/x86/pci/Makefile_64
5endif 5endif
diff --git a/arch/x86/pci/Makefile_64 b/arch/x86/pci/Makefile_64
new file mode 100644
index 000000000000..7d8c467bf143
--- /dev/null
+++ b/arch/x86/pci/Makefile_64
@@ -0,0 +1,17 @@
1#
2# Makefile for X86_64 specific PCI routines
3#
4# Reuse the i386 PCI subsystem
5#
6EXTRA_CFLAGS += -Iarch/x86/pci
7
8obj-y := i386.o
9obj-$(CONFIG_PCI_DIRECT)+= direct.o
10obj-y += fixup.o init.o
11obj-$(CONFIG_ACPI) += acpi.o
12obj-y += legacy.o irq.o common.o early.o
13# mmconfig has a 64bit special
14obj-$(CONFIG_PCI_MMCONFIG) += mmconfig_64.o direct.o mmconfig-shared.o
15
16obj-$(CONFIG_NUMA) += k8-bus_64.o
17
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/k8-bus_64.c
new file mode 100644
index 000000000000..9cc813e29706
--- /dev/null
+++ b/arch/x86/pci/k8-bus_64.c
@@ -0,0 +1,83 @@
1#include <linux/init.h>
2#include <linux/pci.h>
3#include <asm/mpspec.h>
4#include <linux/cpumask.h>
5
6/*
7 * This discovers the pcibus <-> node mapping on AMD K8.
8 *
9 * RED-PEN need to call this again on PCI hotplug
10 * RED-PEN empty cpus get reported wrong
11 */
12
13#define NODE_ID_REGISTER 0x60
14#define NODE_ID(dword) (dword & 0x07)
15#define LDT_BUS_NUMBER_REGISTER_0 0x94
16#define LDT_BUS_NUMBER_REGISTER_1 0xB4
17#define LDT_BUS_NUMBER_REGISTER_2 0xD4
18#define NR_LDT_BUS_NUMBER_REGISTERS 3
19#define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 8) & 0xFF)
20#define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF)
21#define PCI_DEVICE_ID_K8HTCONFIG 0x1100
22
23/**
24 * fill_mp_bus_to_cpumask()
25 * fills the mp_bus_to_cpumask array based according to the LDT Bus Number
26 * Registers found in the K8 northbridge
27 */
28__init static int
29fill_mp_bus_to_cpumask(void)
30{
31 struct pci_dev *nb_dev = NULL;
32 int i, j;
33 u32 ldtbus, nid;
34 static int lbnr[3] = {
35 LDT_BUS_NUMBER_REGISTER_0,
36 LDT_BUS_NUMBER_REGISTER_1,
37 LDT_BUS_NUMBER_REGISTER_2
38 };
39
40 while ((nb_dev = pci_get_device(PCI_VENDOR_ID_AMD,
41 PCI_DEVICE_ID_K8HTCONFIG, nb_dev))) {
42 pci_read_config_dword(nb_dev, NODE_ID_REGISTER, &nid);
43
44 for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) {
45 pci_read_config_dword(nb_dev, lbnr[i], &ldtbus);
46 /*
47 * if there are no busses hanging off of the current
48 * ldt link then both the secondary and subordinate
49 * bus number fields are set to 0.
50 *
51 * RED-PEN
52 * This is slightly broken because it assumes
53 * HT node IDs == Linux node ids, which is not always
54 * true. However it is probably mostly true.
55 */
56 if (!(SECONDARY_LDT_BUS_NUMBER(ldtbus) == 0
57 && SUBORDINATE_LDT_BUS_NUMBER(ldtbus) == 0)) {
58 for (j = SECONDARY_LDT_BUS_NUMBER(ldtbus);
59 j <= SUBORDINATE_LDT_BUS_NUMBER(ldtbus);
60 j++) {
61 struct pci_bus *bus;
62 struct pci_sysdata *sd;
63
64 long node = NODE_ID(nid);
65 /* Algorithm a bit dumb, but
66 it shouldn't matter here */
67 bus = pci_find_bus(0, j);
68 if (!bus)
69 continue;
70 if (!node_online(node))
71 node = 0;
72
73 sd = bus->sysdata;
74 sd->node = node;
75 }
76 }
77 }
78 }
79
80 return 0;
81}
82
83fs_initcall(fill_mp_bus_to_cpumask);
diff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c
new file mode 100644
index 000000000000..4095e4d66a1d
--- /dev/null
+++ b/arch/x86/pci/mmconfig_64.c
@@ -0,0 +1,157 @@
1/*
2 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
3 *
4 * This is an 64bit optimized version that always keeps the full mmconfig
5 * space mapped. This allows lockless config space operation.
6 */
7
8#include <linux/pci.h>
9#include <linux/init.h>
10#include <linux/acpi.h>
11#include <linux/bitmap.h>
12#include <asm/e820.h>
13
14#include "pci.h"
15
16/* Static virtual mapping of the MMCONFIG aperture */
17struct mmcfg_virt {
18 struct acpi_mcfg_allocation *cfg;
19 char __iomem *virt;
20};
21static struct mmcfg_virt *pci_mmcfg_virt;
22
23static char __iomem *get_virt(unsigned int seg, unsigned bus)
24{
25 struct acpi_mcfg_allocation *cfg;
26 int cfg_num;
27
28 for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) {
29 cfg = pci_mmcfg_virt[cfg_num].cfg;
30 if (cfg->pci_segment == seg &&
31 (cfg->start_bus_number <= bus) &&
32 (cfg->end_bus_number >= bus))
33 return pci_mmcfg_virt[cfg_num].virt;
34 }
35
36 /* Fall back to type 0 */
37 return NULL;
38}
39
40static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
41{
42 char __iomem *addr;
43 if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS &&
44 test_bit(32*bus + PCI_SLOT(devfn), pci_mmcfg_fallback_slots))
45 return NULL;
46 addr = get_virt(seg, bus);
47 if (!addr)
48 return NULL;
49 return addr + ((bus << 20) | (devfn << 12));
50}
51
52static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
53 unsigned int devfn, int reg, int len, u32 *value)
54{
55 char __iomem *addr;
56
57 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
58 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {
59 *value = -1;
60 return -EINVAL;
61 }
62
63 addr = pci_dev_base(seg, bus, devfn);
64 if (!addr)
65 return pci_conf1_read(seg,bus,devfn,reg,len,value);
66
67 switch (len) {
68 case 1:
69 *value = mmio_config_readb(addr + reg);
70 break;
71 case 2:
72 *value = mmio_config_readw(addr + reg);
73 break;
74 case 4:
75 *value = mmio_config_readl(addr + reg);
76 break;
77 }
78
79 return 0;
80}
81
82static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
83 unsigned int devfn, int reg, int len, u32 value)
84{
85 char __iomem *addr;
86
87 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
88 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
89 return -EINVAL;
90
91 addr = pci_dev_base(seg, bus, devfn);
92 if (!addr)
93 return pci_conf1_write(seg,bus,devfn,reg,len,value);
94
95 switch (len) {
96 case 1:
97 mmio_config_writeb(addr + reg, value);
98 break;
99 case 2:
100 mmio_config_writew(addr + reg, value);
101 break;
102 case 4:
103 mmio_config_writel(addr + reg, value);
104 break;
105 }
106
107 return 0;
108}
109
110static struct pci_raw_ops pci_mmcfg = {
111 .read = pci_mmcfg_read,
112 .write = pci_mmcfg_write,
113};
114
115static void __iomem * __init mcfg_ioremap(struct acpi_mcfg_allocation *cfg)
116{
117 void __iomem *addr;
118 u32 size;
119
120 size = (cfg->end_bus_number + 1) << 20;
121 addr = ioremap_nocache(cfg->address, size);
122 if (addr) {
123 printk(KERN_INFO "PCI: Using MMCONFIG at %Lx - %Lx\n",
124 cfg->address, cfg->address + size - 1);
125 }
126 return addr;
127}
128
129int __init pci_mmcfg_arch_reachable(unsigned int seg, unsigned int bus,
130 unsigned int devfn)
131{
132 return pci_dev_base(seg, bus, devfn) != NULL;
133}
134
135int __init pci_mmcfg_arch_init(void)
136{
137 int i;
138 pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) *
139 pci_mmcfg_config_num, GFP_KERNEL);
140 if (pci_mmcfg_virt == NULL) {
141 printk(KERN_ERR "PCI: Can not allocate memory for mmconfig structures\n");
142 return 0;
143 }
144
145 for (i = 0; i < pci_mmcfg_config_num; ++i) {
146 pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
147 pci_mmcfg_virt[i].virt = mcfg_ioremap(&pci_mmcfg_config[i]);
148 if (!pci_mmcfg_virt[i].virt) {
149 printk(KERN_ERR "PCI: Cannot map mmconfig aperture for "
150 "segment %d\n",
151 pci_mmcfg_config[i].pci_segment);
152 return 0;
153 }
154 }
155 raw_pci_ops = &pci_mmcfg;
156 return 1;
157}