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Diffstat (limited to 'arch/x86/pci/common.c')
-rw-r--r--arch/x86/pci/common.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 1331fcf26143..fbeec31316cf 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -410,8 +410,6 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
410 return bus; 410 return bus;
411} 411}
412 412
413extern u8 pci_cache_line_size;
414
415int __init pcibios_init(void) 413int __init pcibios_init(void)
416{ 414{
417 struct cpuinfo_x86 *c = &boot_cpu_data; 415 struct cpuinfo_x86 *c = &boot_cpu_data;
@@ -426,11 +424,11 @@ int __init pcibios_init(void)
426 * and P4. It's also good for 386/486s (which actually have 16) 424 * and P4. It's also good for 386/486s (which actually have 16)
427 * as quite a few PCI devices do not support smaller values. 425 * as quite a few PCI devices do not support smaller values.
428 */ 426 */
429 pci_cache_line_size = 32 >> 2; 427 pci_dfl_cache_line_size = 32 >> 2;
430 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD) 428 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
431 pci_cache_line_size = 64 >> 2; /* K7 & K8 */ 429 pci_dfl_cache_line_size = 64 >> 2; /* K7 & K8 */
432 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL) 430 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
433 pci_cache_line_size = 128 >> 2; /* P4 */ 431 pci_dfl_cache_line_size = 128 >> 2; /* P4 */
434 432
435 pcibios_resource_survey(); 433 pcibios_resource_survey();
436 434