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-rw-r--r--arch/x86/oprofile/op_model_ppro.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 0a261a5c696e..cd72d5c73b49 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -118,6 +118,13 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
118 u64 val; 118 u64 val;
119 int i; 119 int i;
120 120
121 /*
122 * This can happen if perf counters are in use when
123 * we steal the die notifier NMI.
124 */
125 if (unlikely(!reset_value))
126 goto out;
127
121 for (i = 0 ; i < num_counters; ++i) { 128 for (i = 0 ; i < num_counters; ++i) {
122 if (!reset_value[i]) 129 if (!reset_value[i])
123 continue; 130 continue;
@@ -128,6 +135,7 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
128 wrmsrl(msrs->counters[i].addr, -reset_value[i]); 135 wrmsrl(msrs->counters[i].addr, -reset_value[i]);
129 } 136 }
130 137
138out:
131 /* Only P6 based Pentium M need to re-unmask the apic vector but it 139 /* Only P6 based Pentium M need to re-unmask the apic vector but it
132 * doesn't hurt other P6 variant */ 140 * doesn't hurt other P6 variant */
133 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); 141 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);