diff options
Diffstat (limited to 'arch/x86/oprofile/op_model_amd.c')
-rw-r--r-- | arch/x86/oprofile/op_model_amd.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c index 9fd8a567fe1e..9cbb710dc94b 100644 --- a/arch/x86/oprofile/op_model_amd.c +++ b/arch/x86/oprofile/op_model_amd.c | |||
@@ -609,16 +609,21 @@ static int setup_ibs_ctl(int ibs_eilvt_off) | |||
609 | return 0; | 609 | return 0; |
610 | } | 610 | } |
611 | 611 | ||
612 | /* | ||
613 | * This runs only on the current cpu. We try to find an LVT offset and | ||
614 | * setup the local APIC. For this we must disable preemption. On | ||
615 | * success we initialize all nodes with this offset. This updates then | ||
616 | * the offset in the IBS_CTL per-node msr. The per-core APIC setup of | ||
617 | * the IBS interrupt vector is called from op_amd_setup_ctrs()/op_- | ||
618 | * amd_cpu_shutdown() using the new offset. | ||
619 | */ | ||
612 | static int force_ibs_eilvt_setup(void) | 620 | static int force_ibs_eilvt_setup(void) |
613 | { | 621 | { |
614 | int offset; | 622 | int offset; |
615 | int ret; | 623 | int ret; |
616 | 624 | ||
617 | /* | ||
618 | * find the next free available EILVT entry, skip offset 0, | ||
619 | * pin search to this cpu | ||
620 | */ | ||
621 | preempt_disable(); | 625 | preempt_disable(); |
626 | /* find the next free available EILVT entry, skip offset 0 */ | ||
622 | for (offset = 1; offset < APIC_EILVT_NR_MAX; offset++) { | 627 | for (offset = 1; offset < APIC_EILVT_NR_MAX; offset++) { |
623 | if (get_eilvt(offset)) | 628 | if (get_eilvt(offset)) |
624 | break; | 629 | break; |