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-rw-r--r--arch/x86/mm/ioremap.c24
-rw-r--r--arch/x86/mm/pageattr.c5
-rw-r--r--arch/x86/mm/srat_64.c3
3 files changed, 18 insertions, 14 deletions
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 9f42d7e9c158..f4c95aec5acb 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -42,6 +42,22 @@ int page_is_ram(unsigned long pagenr)
42 unsigned long addr, end; 42 unsigned long addr, end;
43 int i; 43 int i;
44 44
45 /*
46 * A special case is the first 4Kb of memory;
47 * This is a BIOS owned area, not kernel ram, but generally
48 * not listed as such in the E820 table.
49 */
50 if (pagenr == 0)
51 return 0;
52
53 /*
54 * Second special case: Some BIOSen report the PC BIOS
55 * area (640->1Mb) as ram even though it is not.
56 */
57 if (pagenr >= (BIOS_BEGIN >> PAGE_SHIFT) &&
58 pagenr < (BIOS_END >> PAGE_SHIFT))
59 return 0;
60
45 for (i = 0; i < e820.nr_map; i++) { 61 for (i = 0; i < e820.nr_map; i++) {
46 /* 62 /*
47 * Not usable memory: 63 * Not usable memory:
@@ -51,14 +67,6 @@ int page_is_ram(unsigned long pagenr)
51 addr = (e820.map[i].addr + PAGE_SIZE-1) >> PAGE_SHIFT; 67 addr = (e820.map[i].addr + PAGE_SIZE-1) >> PAGE_SHIFT;
52 end = (e820.map[i].addr + e820.map[i].size) >> PAGE_SHIFT; 68 end = (e820.map[i].addr + e820.map[i].size) >> PAGE_SHIFT;
53 69
54 /*
55 * Sanity check: Some BIOSen report areas as RAM that
56 * are not. Notably the 640->1Mb area, which is the
57 * PCI BIOS area.
58 */
59 if (addr >= (BIOS_BEGIN >> PAGE_SHIFT) &&
60 end < (BIOS_END >> PAGE_SHIFT))
61 continue;
62 70
63 if ((pagenr >= addr) && (pagenr < end)) 71 if ((pagenr >= addr) && (pagenr < end))
64 return 1; 72 return 1;
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 3ee14996c829..e2a74ea11a53 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -513,7 +513,6 @@ static int __change_page_attr(struct cpa_data *cpa, int primary)
513 unsigned long address = cpa->vaddr; 513 unsigned long address = cpa->vaddr;
514 int do_split, err; 514 int do_split, err;
515 unsigned int level; 515 unsigned int level;
516 struct page *kpte_page;
517 pte_t *kpte, old_pte; 516 pte_t *kpte, old_pte;
518 517
519repeat: 518repeat:
@@ -532,10 +531,6 @@ repeat:
532 return -EINVAL; 531 return -EINVAL;
533 } 532 }
534 533
535 kpte_page = virt_to_page(kpte);
536 BUG_ON(PageLRU(kpte_page));
537 BUG_ON(PageCompound(kpte_page));
538
539 if (level == PG_LEVEL_4K) { 534 if (level == PG_LEVEL_4K) {
540 pte_t new_pte; 535 pte_t new_pte;
541 pgprot_t new_prot = pte_pgprot(old_pte); 536 pgprot_t new_prot = pte_pgprot(old_pte);
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index ecd91ea8a8ae..845001c617cc 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -166,7 +166,8 @@ static inline int save_add_info(void) {return 0;}
166 * Both SPARSE and RESERVE need nodes_add information. 166 * Both SPARSE and RESERVE need nodes_add information.
167 * This code supports one contiguous hot add area per node. 167 * This code supports one contiguous hot add area per node.
168 */ 168 */
169static int reserve_hotadd(int node, unsigned long start, unsigned long end) 169static int __init
170reserve_hotadd(int node, unsigned long start, unsigned long end)
170{ 171{
171 unsigned long s_pfn = start >> PAGE_SHIFT; 172 unsigned long s_pfn = start >> PAGE_SHIFT;
172 unsigned long e_pfn = end >> PAGE_SHIFT; 173 unsigned long e_pfn = end >> PAGE_SHIFT;