diff options
Diffstat (limited to 'arch/x86/mm/pageattr.c')
| -rw-r--r-- | arch/x86/mm/pageattr.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 8253bc97587e..9c4294986af7 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
| @@ -522,6 +522,17 @@ static int split_large_page(pte_t *kpte, unsigned long address) | |||
| 522 | * primary protection behavior: | 522 | * primary protection behavior: |
| 523 | */ | 523 | */ |
| 524 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); | 524 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); |
| 525 | |||
| 526 | /* | ||
| 527 | * Intel Atom errata AAH41 workaround. | ||
| 528 | * | ||
| 529 | * The real fix should be in hw or in a microcode update, but | ||
| 530 | * we also probabilistically try to reduce the window of having | ||
| 531 | * a large TLB mixed with 4K TLBs while instruction fetches are | ||
| 532 | * going on. | ||
| 533 | */ | ||
| 534 | __flush_tlb_all(); | ||
| 535 | |||
| 525 | base = NULL; | 536 | base = NULL; |
| 526 | 537 | ||
| 527 | out_unlock: | 538 | out_unlock: |
