diff options
Diffstat (limited to 'arch/x86/lib')
-rw-r--r-- | arch/x86/lib/x86-opcode-map.txt | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt index 5b83c51c12e0..819137904428 100644 --- a/arch/x86/lib/x86-opcode-map.txt +++ b/arch/x86/lib/x86-opcode-map.txt | |||
@@ -219,7 +219,9 @@ ab: STOS/W/D/Q Yv,rAX | |||
219 | ac: LODS/B AL,Xb | 219 | ac: LODS/B AL,Xb |
220 | ad: LODS/W/D/Q rAX,Xv | 220 | ad: LODS/W/D/Q rAX,Xv |
221 | ae: SCAS/B AL,Yb | 221 | ae: SCAS/B AL,Yb |
222 | af: SCAS/W/D/Q rAX,Xv | 222 | # Note: The May 2011 Intel manual shows Xv for the second parameter of the |
223 | # next instruction but Yv is correct | ||
224 | af: SCAS/W/D/Q rAX,Yv | ||
223 | # 0xb0 - 0xbf | 225 | # 0xb0 - 0xbf |
224 | b0: MOV AL/R8L,Ib | 226 | b0: MOV AL/R8L,Ib |
225 | b1: MOV CL/R9L,Ib | 227 | b1: MOV CL/R9L,Ib |
@@ -729,8 +731,8 @@ de: VAESDEC Vdq,Hdq,Wdq (66),(v1) | |||
729 | df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1) | 731 | df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1) |
730 | f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) | 732 | f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) |
731 | f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | 733 | f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) |
732 | f3: ANDN Gy,By,Ey (v) | 734 | f2: ANDN Gy,By,Ey (v) |
733 | f4: Grp17 (1A) | 735 | f3: Grp17 (1A) |
734 | f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) | 736 | f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) |
735 | f6: MULX By,Gy,rDX,Ey (F2),(v) | 737 | f6: MULX By,Gy,rDX,Ey (F2),(v) |
736 | f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) | 738 | f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v) |