diff options
Diffstat (limited to 'arch/x86/kvm/vmx.c')
| -rw-r--r-- | arch/x86/kvm/vmx.c | 393 |
1 files changed, 226 insertions, 167 deletions
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 7611af576829..bb481330716f 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c | |||
| @@ -91,6 +91,7 @@ struct vcpu_vmx { | |||
| 91 | } rmode; | 91 | } rmode; |
| 92 | int vpid; | 92 | int vpid; |
| 93 | bool emulation_required; | 93 | bool emulation_required; |
| 94 | enum emulation_result invalid_state_emulation_result; | ||
| 94 | 95 | ||
| 95 | /* Support for vnmi-less CPUs */ | 96 | /* Support for vnmi-less CPUs */ |
| 96 | int soft_vnmi_blocked; | 97 | int soft_vnmi_blocked; |
| @@ -189,21 +190,21 @@ static inline int is_page_fault(u32 intr_info) | |||
| 189 | { | 190 | { |
| 190 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 191 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | |
| 191 | INTR_INFO_VALID_MASK)) == | 192 | INTR_INFO_VALID_MASK)) == |
| 192 | (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK); | 193 | (INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK); |
| 193 | } | 194 | } |
| 194 | 195 | ||
| 195 | static inline int is_no_device(u32 intr_info) | 196 | static inline int is_no_device(u32 intr_info) |
| 196 | { | 197 | { |
| 197 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 198 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | |
| 198 | INTR_INFO_VALID_MASK)) == | 199 | INTR_INFO_VALID_MASK)) == |
| 199 | (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK); | 200 | (INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK); |
| 200 | } | 201 | } |
| 201 | 202 | ||
| 202 | static inline int is_invalid_opcode(u32 intr_info) | 203 | static inline int is_invalid_opcode(u32 intr_info) |
| 203 | { | 204 | { |
| 204 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 205 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | |
| 205 | INTR_INFO_VALID_MASK)) == | 206 | INTR_INFO_VALID_MASK)) == |
| 206 | (INTR_TYPE_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK); | 207 | (INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK); |
| 207 | } | 208 | } |
| 208 | 209 | ||
| 209 | static inline int is_external_interrupt(u32 intr_info) | 210 | static inline int is_external_interrupt(u32 intr_info) |
| @@ -480,8 +481,13 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu) | |||
| 480 | eb = (1u << PF_VECTOR) | (1u << UD_VECTOR); | 481 | eb = (1u << PF_VECTOR) | (1u << UD_VECTOR); |
| 481 | if (!vcpu->fpu_active) | 482 | if (!vcpu->fpu_active) |
| 482 | eb |= 1u << NM_VECTOR; | 483 | eb |= 1u << NM_VECTOR; |
| 483 | if (vcpu->guest_debug.enabled) | 484 | if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) { |
| 484 | eb |= 1u << DB_VECTOR; | 485 | if (vcpu->guest_debug & |
| 486 | (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) | ||
| 487 | eb |= 1u << DB_VECTOR; | ||
| 488 | if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) | ||
| 489 | eb |= 1u << BP_VECTOR; | ||
| 490 | } | ||
| 485 | if (vcpu->arch.rmode.active) | 491 | if (vcpu->arch.rmode.active) |
| 486 | eb = ~0; | 492 | eb = ~0; |
| 487 | if (vm_need_ept()) | 493 | if (vm_need_ept()) |
| @@ -747,29 +753,33 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr, | |||
| 747 | bool has_error_code, u32 error_code) | 753 | bool has_error_code, u32 error_code) |
| 748 | { | 754 | { |
| 749 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 755 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 756 | u32 intr_info = nr | INTR_INFO_VALID_MASK; | ||
| 750 | 757 | ||
| 751 | if (has_error_code) | 758 | if (has_error_code) { |
| 752 | vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code); | 759 | vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code); |
| 760 | intr_info |= INTR_INFO_DELIVER_CODE_MASK; | ||
| 761 | } | ||
| 753 | 762 | ||
| 754 | if (vcpu->arch.rmode.active) { | 763 | if (vcpu->arch.rmode.active) { |
| 755 | vmx->rmode.irq.pending = true; | 764 | vmx->rmode.irq.pending = true; |
| 756 | vmx->rmode.irq.vector = nr; | 765 | vmx->rmode.irq.vector = nr; |
| 757 | vmx->rmode.irq.rip = kvm_rip_read(vcpu); | 766 | vmx->rmode.irq.rip = kvm_rip_read(vcpu); |
| 758 | if (nr == BP_VECTOR) | 767 | if (nr == BP_VECTOR || nr == OF_VECTOR) |
| 759 | vmx->rmode.irq.rip++; | 768 | vmx->rmode.irq.rip++; |
| 760 | vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, | 769 | intr_info |= INTR_TYPE_SOFT_INTR; |
| 761 | nr | INTR_TYPE_SOFT_INTR | 770 | vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info); |
| 762 | | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0) | ||
| 763 | | INTR_INFO_VALID_MASK); | ||
| 764 | vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1); | 771 | vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1); |
| 765 | kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1); | 772 | kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1); |
| 766 | return; | 773 | return; |
| 767 | } | 774 | } |
| 768 | 775 | ||
| 769 | vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, | 776 | if (nr == BP_VECTOR || nr == OF_VECTOR) { |
| 770 | nr | INTR_TYPE_EXCEPTION | 777 | vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1); |
| 771 | | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0) | 778 | intr_info |= INTR_TYPE_SOFT_EXCEPTION; |
| 772 | | INTR_INFO_VALID_MASK); | 779 | } else |
| 780 | intr_info |= INTR_TYPE_HARD_EXCEPTION; | ||
| 781 | |||
| 782 | vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info); | ||
| 773 | } | 783 | } |
| 774 | 784 | ||
| 775 | static bool vmx_exception_injected(struct kvm_vcpu *vcpu) | 785 | static bool vmx_exception_injected(struct kvm_vcpu *vcpu) |
| @@ -856,11 +866,8 @@ static u64 guest_read_tsc(void) | |||
| 856 | * writes 'guest_tsc' into guest's timestamp counter "register" | 866 | * writes 'guest_tsc' into guest's timestamp counter "register" |
| 857 | * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc | 867 | * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc |
| 858 | */ | 868 | */ |
| 859 | static void guest_write_tsc(u64 guest_tsc) | 869 | static void guest_write_tsc(u64 guest_tsc, u64 host_tsc) |
| 860 | { | 870 | { |
| 861 | u64 host_tsc; | ||
| 862 | |||
| 863 | rdtscll(host_tsc); | ||
| 864 | vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc); | 871 | vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc); |
| 865 | } | 872 | } |
| 866 | 873 | ||
| @@ -925,14 +932,15 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data) | |||
| 925 | { | 932 | { |
| 926 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 933 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 927 | struct kvm_msr_entry *msr; | 934 | struct kvm_msr_entry *msr; |
| 935 | u64 host_tsc; | ||
| 928 | int ret = 0; | 936 | int ret = 0; |
| 929 | 937 | ||
| 930 | switch (msr_index) { | 938 | switch (msr_index) { |
| 931 | #ifdef CONFIG_X86_64 | ||
| 932 | case MSR_EFER: | 939 | case MSR_EFER: |
| 933 | vmx_load_host_state(vmx); | 940 | vmx_load_host_state(vmx); |
| 934 | ret = kvm_set_msr_common(vcpu, msr_index, data); | 941 | ret = kvm_set_msr_common(vcpu, msr_index, data); |
| 935 | break; | 942 | break; |
| 943 | #ifdef CONFIG_X86_64 | ||
| 936 | case MSR_FS_BASE: | 944 | case MSR_FS_BASE: |
| 937 | vmcs_writel(GUEST_FS_BASE, data); | 945 | vmcs_writel(GUEST_FS_BASE, data); |
| 938 | break; | 946 | break; |
| @@ -950,7 +958,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data) | |||
| 950 | vmcs_writel(GUEST_SYSENTER_ESP, data); | 958 | vmcs_writel(GUEST_SYSENTER_ESP, data); |
| 951 | break; | 959 | break; |
| 952 | case MSR_IA32_TIME_STAMP_COUNTER: | 960 | case MSR_IA32_TIME_STAMP_COUNTER: |
| 953 | guest_write_tsc(data); | 961 | rdtscll(host_tsc); |
| 962 | guest_write_tsc(data, host_tsc); | ||
| 954 | break; | 963 | break; |
| 955 | case MSR_P6_PERFCTR0: | 964 | case MSR_P6_PERFCTR0: |
| 956 | case MSR_P6_PERFCTR1: | 965 | case MSR_P6_PERFCTR1: |
| @@ -999,40 +1008,28 @@ static void vmx_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg) | |||
| 999 | } | 1008 | } |
| 1000 | } | 1009 | } |
| 1001 | 1010 | ||
| 1002 | static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg) | 1011 | static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg) |
| 1003 | { | 1012 | { |
| 1004 | unsigned long dr7 = 0x400; | 1013 | int old_debug = vcpu->guest_debug; |
| 1005 | int old_singlestep; | 1014 | unsigned long flags; |
| 1006 | |||
| 1007 | old_singlestep = vcpu->guest_debug.singlestep; | ||
| 1008 | |||
| 1009 | vcpu->guest_debug.enabled = dbg->enabled; | ||
| 1010 | if (vcpu->guest_debug.enabled) { | ||
| 1011 | int i; | ||
| 1012 | 1015 | ||
| 1013 | dr7 |= 0x200; /* exact */ | 1016 | vcpu->guest_debug = dbg->control; |
| 1014 | for (i = 0; i < 4; ++i) { | 1017 | if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE)) |
| 1015 | if (!dbg->breakpoints[i].enabled) | 1018 | vcpu->guest_debug = 0; |
| 1016 | continue; | ||
| 1017 | vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address; | ||
| 1018 | dr7 |= 2 << (i*2); /* global enable */ | ||
| 1019 | dr7 |= 0 << (i*4+16); /* execution breakpoint */ | ||
| 1020 | } | ||
| 1021 | 1019 | ||
| 1022 | vcpu->guest_debug.singlestep = dbg->singlestep; | 1020 | if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) |
| 1023 | } else | 1021 | vmcs_writel(GUEST_DR7, dbg->arch.debugreg[7]); |
| 1024 | vcpu->guest_debug.singlestep = 0; | 1022 | else |
| 1025 | 1023 | vmcs_writel(GUEST_DR7, vcpu->arch.dr7); | |
| 1026 | if (old_singlestep && !vcpu->guest_debug.singlestep) { | ||
| 1027 | unsigned long flags; | ||
| 1028 | 1024 | ||
| 1029 | flags = vmcs_readl(GUEST_RFLAGS); | 1025 | flags = vmcs_readl(GUEST_RFLAGS); |
| 1026 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) | ||
| 1027 | flags |= X86_EFLAGS_TF | X86_EFLAGS_RF; | ||
| 1028 | else if (old_debug & KVM_GUESTDBG_SINGLESTEP) | ||
| 1030 | flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF); | 1029 | flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF); |
| 1031 | vmcs_writel(GUEST_RFLAGS, flags); | 1030 | vmcs_writel(GUEST_RFLAGS, flags); |
| 1032 | } | ||
| 1033 | 1031 | ||
| 1034 | update_exception_bitmap(vcpu); | 1032 | update_exception_bitmap(vcpu); |
| 1035 | vmcs_writel(GUEST_DR7, dr7); | ||
| 1036 | 1033 | ||
| 1037 | return 0; | 1034 | return 0; |
| 1038 | } | 1035 | } |
| @@ -1433,6 +1430,29 @@ continue_rmode: | |||
| 1433 | init_rmode(vcpu->kvm); | 1430 | init_rmode(vcpu->kvm); |
| 1434 | } | 1431 | } |
| 1435 | 1432 | ||
| 1433 | static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer) | ||
| 1434 | { | ||
| 1435 | struct vcpu_vmx *vmx = to_vmx(vcpu); | ||
| 1436 | struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER); | ||
| 1437 | |||
| 1438 | vcpu->arch.shadow_efer = efer; | ||
| 1439 | if (!msr) | ||
| 1440 | return; | ||
| 1441 | if (efer & EFER_LMA) { | ||
| 1442 | vmcs_write32(VM_ENTRY_CONTROLS, | ||
| 1443 | vmcs_read32(VM_ENTRY_CONTROLS) | | ||
| 1444 | VM_ENTRY_IA32E_MODE); | ||
| 1445 | msr->data = efer; | ||
| 1446 | } else { | ||
| 1447 | vmcs_write32(VM_ENTRY_CONTROLS, | ||
| 1448 | vmcs_read32(VM_ENTRY_CONTROLS) & | ||
| 1449 | ~VM_ENTRY_IA32E_MODE); | ||
| 1450 | |||
| 1451 | msr->data = efer & ~EFER_LME; | ||
| 1452 | } | ||
| 1453 | setup_msrs(vmx); | ||
| 1454 | } | ||
| 1455 | |||
| 1436 | #ifdef CONFIG_X86_64 | 1456 | #ifdef CONFIG_X86_64 |
| 1437 | 1457 | ||
| 1438 | static void enter_lmode(struct kvm_vcpu *vcpu) | 1458 | static void enter_lmode(struct kvm_vcpu *vcpu) |
| @@ -1447,13 +1467,8 @@ static void enter_lmode(struct kvm_vcpu *vcpu) | |||
| 1447 | (guest_tr_ar & ~AR_TYPE_MASK) | 1467 | (guest_tr_ar & ~AR_TYPE_MASK) |
| 1448 | | AR_TYPE_BUSY_64_TSS); | 1468 | | AR_TYPE_BUSY_64_TSS); |
| 1449 | } | 1469 | } |
| 1450 | |||
| 1451 | vcpu->arch.shadow_efer |= EFER_LMA; | 1470 | vcpu->arch.shadow_efer |= EFER_LMA; |
| 1452 | 1471 | vmx_set_efer(vcpu, vcpu->arch.shadow_efer); | |
| 1453 | find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME; | ||
| 1454 | vmcs_write32(VM_ENTRY_CONTROLS, | ||
| 1455 | vmcs_read32(VM_ENTRY_CONTROLS) | ||
| 1456 | | VM_ENTRY_IA32E_MODE); | ||
| 1457 | } | 1472 | } |
| 1458 | 1473 | ||
| 1459 | static void exit_lmode(struct kvm_vcpu *vcpu) | 1474 | static void exit_lmode(struct kvm_vcpu *vcpu) |
| @@ -1612,30 +1627,6 @@ static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | |||
| 1612 | vmcs_writel(GUEST_CR4, hw_cr4); | 1627 | vmcs_writel(GUEST_CR4, hw_cr4); |
| 1613 | } | 1628 | } |
| 1614 | 1629 | ||
| 1615 | static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer) | ||
| 1616 | { | ||
| 1617 | struct vcpu_vmx *vmx = to_vmx(vcpu); | ||
| 1618 | struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER); | ||
| 1619 | |||
| 1620 | vcpu->arch.shadow_efer = efer; | ||
| 1621 | if (!msr) | ||
| 1622 | return; | ||
| 1623 | if (efer & EFER_LMA) { | ||
| 1624 | vmcs_write32(VM_ENTRY_CONTROLS, | ||
| 1625 | vmcs_read32(VM_ENTRY_CONTROLS) | | ||
| 1626 | VM_ENTRY_IA32E_MODE); | ||
| 1627 | msr->data = efer; | ||
| 1628 | |||
| 1629 | } else { | ||
| 1630 | vmcs_write32(VM_ENTRY_CONTROLS, | ||
| 1631 | vmcs_read32(VM_ENTRY_CONTROLS) & | ||
| 1632 | ~VM_ENTRY_IA32E_MODE); | ||
| 1633 | |||
| 1634 | msr->data = efer & ~EFER_LME; | ||
| 1635 | } | ||
| 1636 | setup_msrs(vmx); | ||
| 1637 | } | ||
| 1638 | |||
| 1639 | static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg) | 1630 | static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg) |
| 1640 | { | 1631 | { |
| 1641 | struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg]; | 1632 | struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg]; |
| @@ -1653,7 +1644,7 @@ static void vmx_get_segment(struct kvm_vcpu *vcpu, | |||
| 1653 | var->limit = vmcs_read32(sf->limit); | 1644 | var->limit = vmcs_read32(sf->limit); |
| 1654 | var->selector = vmcs_read16(sf->selector); | 1645 | var->selector = vmcs_read16(sf->selector); |
| 1655 | ar = vmcs_read32(sf->ar_bytes); | 1646 | ar = vmcs_read32(sf->ar_bytes); |
| 1656 | if (ar & AR_UNUSABLE_MASK) | 1647 | if ((ar & AR_UNUSABLE_MASK) && !emulate_invalid_guest_state) |
| 1657 | ar = 0; | 1648 | ar = 0; |
| 1658 | var->type = ar & 15; | 1649 | var->type = ar & 15; |
| 1659 | var->s = (ar >> 4) & 1; | 1650 | var->s = (ar >> 4) & 1; |
| @@ -1788,14 +1779,16 @@ static bool code_segment_valid(struct kvm_vcpu *vcpu) | |||
| 1788 | vmx_get_segment(vcpu, &cs, VCPU_SREG_CS); | 1779 | vmx_get_segment(vcpu, &cs, VCPU_SREG_CS); |
| 1789 | cs_rpl = cs.selector & SELECTOR_RPL_MASK; | 1780 | cs_rpl = cs.selector & SELECTOR_RPL_MASK; |
| 1790 | 1781 | ||
| 1782 | if (cs.unusable) | ||
| 1783 | return false; | ||
| 1791 | if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK)) | 1784 | if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK)) |
| 1792 | return false; | 1785 | return false; |
| 1793 | if (!cs.s) | 1786 | if (!cs.s) |
| 1794 | return false; | 1787 | return false; |
| 1795 | if (!(~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK))) { | 1788 | if (cs.type & AR_TYPE_WRITEABLE_MASK) { |
| 1796 | if (cs.dpl > cs_rpl) | 1789 | if (cs.dpl > cs_rpl) |
| 1797 | return false; | 1790 | return false; |
| 1798 | } else if (cs.type & AR_TYPE_CODE_MASK) { | 1791 | } else { |
| 1799 | if (cs.dpl != cs_rpl) | 1792 | if (cs.dpl != cs_rpl) |
| 1800 | return false; | 1793 | return false; |
| 1801 | } | 1794 | } |
| @@ -1814,7 +1807,9 @@ static bool stack_segment_valid(struct kvm_vcpu *vcpu) | |||
| 1814 | vmx_get_segment(vcpu, &ss, VCPU_SREG_SS); | 1807 | vmx_get_segment(vcpu, &ss, VCPU_SREG_SS); |
| 1815 | ss_rpl = ss.selector & SELECTOR_RPL_MASK; | 1808 | ss_rpl = ss.selector & SELECTOR_RPL_MASK; |
| 1816 | 1809 | ||
| 1817 | if ((ss.type != 3) || (ss.type != 7)) | 1810 | if (ss.unusable) |
| 1811 | return true; | ||
| 1812 | if (ss.type != 3 && ss.type != 7) | ||
| 1818 | return false; | 1813 | return false; |
| 1819 | if (!ss.s) | 1814 | if (!ss.s) |
| 1820 | return false; | 1815 | return false; |
| @@ -1834,6 +1829,8 @@ static bool data_segment_valid(struct kvm_vcpu *vcpu, int seg) | |||
| 1834 | vmx_get_segment(vcpu, &var, seg); | 1829 | vmx_get_segment(vcpu, &var, seg); |
| 1835 | rpl = var.selector & SELECTOR_RPL_MASK; | 1830 | rpl = var.selector & SELECTOR_RPL_MASK; |
| 1836 | 1831 | ||
| 1832 | if (var.unusable) | ||
| 1833 | return true; | ||
| 1837 | if (!var.s) | 1834 | if (!var.s) |
| 1838 | return false; | 1835 | return false; |
| 1839 | if (!var.present) | 1836 | if (!var.present) |
| @@ -1855,9 +1852,11 @@ static bool tr_valid(struct kvm_vcpu *vcpu) | |||
| 1855 | 1852 | ||
| 1856 | vmx_get_segment(vcpu, &tr, VCPU_SREG_TR); | 1853 | vmx_get_segment(vcpu, &tr, VCPU_SREG_TR); |
| 1857 | 1854 | ||
| 1855 | if (tr.unusable) | ||
| 1856 | return false; | ||
| 1858 | if (tr.selector & SELECTOR_TI_MASK) /* TI = 1 */ | 1857 | if (tr.selector & SELECTOR_TI_MASK) /* TI = 1 */ |
| 1859 | return false; | 1858 | return false; |
| 1860 | if ((tr.type != 3) || (tr.type != 11)) /* TODO: Check if guest is in IA32e mode */ | 1859 | if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */ |
| 1861 | return false; | 1860 | return false; |
| 1862 | if (!tr.present) | 1861 | if (!tr.present) |
| 1863 | return false; | 1862 | return false; |
| @@ -1871,6 +1870,8 @@ static bool ldtr_valid(struct kvm_vcpu *vcpu) | |||
| 1871 | 1870 | ||
| 1872 | vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR); | 1871 | vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR); |
| 1873 | 1872 | ||
| 1873 | if (ldtr.unusable) | ||
| 1874 | return true; | ||
| 1874 | if (ldtr.selector & SELECTOR_TI_MASK) /* TI = 1 */ | 1875 | if (ldtr.selector & SELECTOR_TI_MASK) /* TI = 1 */ |
| 1875 | return false; | 1876 | return false; |
| 1876 | if (ldtr.type != 2) | 1877 | if (ldtr.type != 2) |
| @@ -2112,7 +2113,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx) | |||
| 2112 | { | 2113 | { |
| 2113 | u32 host_sysenter_cs, msr_low, msr_high; | 2114 | u32 host_sysenter_cs, msr_low, msr_high; |
| 2114 | u32 junk; | 2115 | u32 junk; |
| 2115 | u64 host_pat; | 2116 | u64 host_pat, tsc_this, tsc_base; |
| 2116 | unsigned long a; | 2117 | unsigned long a; |
| 2117 | struct descriptor_table dt; | 2118 | struct descriptor_table dt; |
| 2118 | int i; | 2119 | int i; |
| @@ -2240,6 +2241,12 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx) | |||
| 2240 | vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL); | 2241 | vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL); |
| 2241 | vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK); | 2242 | vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK); |
| 2242 | 2243 | ||
| 2244 | tsc_base = vmx->vcpu.kvm->arch.vm_init_tsc; | ||
| 2245 | rdtscll(tsc_this); | ||
| 2246 | if (tsc_this < vmx->vcpu.kvm->arch.vm_init_tsc) | ||
| 2247 | tsc_base = tsc_this; | ||
| 2248 | |||
| 2249 | guest_write_tsc(0, tsc_base); | ||
| 2243 | 2250 | ||
| 2244 | return 0; | 2251 | return 0; |
| 2245 | } | 2252 | } |
| @@ -2319,7 +2326,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu) | |||
| 2319 | kvm_rip_write(vcpu, 0); | 2326 | kvm_rip_write(vcpu, 0); |
| 2320 | kvm_register_write(vcpu, VCPU_REGS_RSP, 0); | 2327 | kvm_register_write(vcpu, VCPU_REGS_RSP, 0); |
| 2321 | 2328 | ||
| 2322 | /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */ | ||
| 2323 | vmcs_writel(GUEST_DR7, 0x400); | 2329 | vmcs_writel(GUEST_DR7, 0x400); |
| 2324 | 2330 | ||
| 2325 | vmcs_writel(GUEST_GDTR_BASE, 0); | 2331 | vmcs_writel(GUEST_GDTR_BASE, 0); |
| @@ -2332,8 +2338,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu) | |||
| 2332 | vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0); | 2338 | vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0); |
| 2333 | vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0); | 2339 | vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0); |
| 2334 | 2340 | ||
| 2335 | guest_write_tsc(0); | ||
| 2336 | |||
| 2337 | /* Special registers */ | 2341 | /* Special registers */ |
| 2338 | vmcs_write64(GUEST_IA32_DEBUGCTL, 0); | 2342 | vmcs_write64(GUEST_IA32_DEBUGCTL, 0); |
| 2339 | 2343 | ||
| @@ -2486,6 +2490,11 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu, | |||
| 2486 | { | 2490 | { |
| 2487 | vmx_update_window_states(vcpu); | 2491 | vmx_update_window_states(vcpu); |
| 2488 | 2492 | ||
| 2493 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) | ||
| 2494 | vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO, | ||
| 2495 | GUEST_INTR_STATE_STI | | ||
| 2496 | GUEST_INTR_STATE_MOV_SS); | ||
| 2497 | |||
| 2489 | if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) { | 2498 | if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) { |
| 2490 | if (vcpu->arch.interrupt.pending) { | 2499 | if (vcpu->arch.interrupt.pending) { |
| 2491 | enable_nmi_window(vcpu); | 2500 | enable_nmi_window(vcpu); |
| @@ -2536,24 +2545,6 @@ static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr) | |||
| 2536 | return 0; | 2545 | return 0; |
| 2537 | } | 2546 | } |
| 2538 | 2547 | ||
| 2539 | static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu) | ||
| 2540 | { | ||
| 2541 | struct kvm_guest_debug *dbg = &vcpu->guest_debug; | ||
| 2542 | |||
| 2543 | set_debugreg(dbg->bp[0], 0); | ||
| 2544 | set_debugreg(dbg->bp[1], 1); | ||
| 2545 | set_debugreg(dbg->bp[2], 2); | ||
| 2546 | set_debugreg(dbg->bp[3], 3); | ||
| 2547 | |||
| 2548 | if (dbg->singlestep) { | ||
| 2549 | unsigned long flags; | ||
| 2550 | |||
| 2551 | flags = vmcs_readl(GUEST_RFLAGS); | ||
| 2552 | flags |= X86_EFLAGS_TF | X86_EFLAGS_RF; | ||
| 2553 | vmcs_writel(GUEST_RFLAGS, flags); | ||
| 2554 | } | ||
| 2555 | } | ||
| 2556 | |||
| 2557 | static int handle_rmode_exception(struct kvm_vcpu *vcpu, | 2548 | static int handle_rmode_exception(struct kvm_vcpu *vcpu, |
| 2558 | int vec, u32 err_code) | 2549 | int vec, u32 err_code) |
| 2559 | { | 2550 | { |
| @@ -2570,9 +2561,17 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu, | |||
| 2570 | * the required debugging infrastructure rework. | 2561 | * the required debugging infrastructure rework. |
| 2571 | */ | 2562 | */ |
| 2572 | switch (vec) { | 2563 | switch (vec) { |
| 2573 | case DE_VECTOR: | ||
| 2574 | case DB_VECTOR: | 2564 | case DB_VECTOR: |
| 2565 | if (vcpu->guest_debug & | ||
| 2566 | (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) | ||
| 2567 | return 0; | ||
| 2568 | kvm_queue_exception(vcpu, vec); | ||
| 2569 | return 1; | ||
| 2575 | case BP_VECTOR: | 2570 | case BP_VECTOR: |
| 2571 | if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) | ||
| 2572 | return 0; | ||
| 2573 | /* fall through */ | ||
| 2574 | case DE_VECTOR: | ||
| 2576 | case OF_VECTOR: | 2575 | case OF_VECTOR: |
| 2577 | case BR_VECTOR: | 2576 | case BR_VECTOR: |
| 2578 | case UD_VECTOR: | 2577 | case UD_VECTOR: |
| @@ -2589,8 +2588,8 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu, | |||
| 2589 | static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | 2588 | static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) |
| 2590 | { | 2589 | { |
| 2591 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 2590 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 2592 | u32 intr_info, error_code; | 2591 | u32 intr_info, ex_no, error_code; |
| 2593 | unsigned long cr2, rip; | 2592 | unsigned long cr2, rip, dr6; |
| 2594 | u32 vect_info; | 2593 | u32 vect_info; |
| 2595 | enum emulation_result er; | 2594 | enum emulation_result er; |
| 2596 | 2595 | ||
| @@ -2649,14 +2648,30 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 2649 | return 1; | 2648 | return 1; |
| 2650 | } | 2649 | } |
| 2651 | 2650 | ||
| 2652 | if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == | 2651 | ex_no = intr_info & INTR_INFO_VECTOR_MASK; |
| 2653 | (INTR_TYPE_EXCEPTION | 1)) { | 2652 | switch (ex_no) { |
| 2653 | case DB_VECTOR: | ||
| 2654 | dr6 = vmcs_readl(EXIT_QUALIFICATION); | ||
| 2655 | if (!(vcpu->guest_debug & | ||
| 2656 | (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) { | ||
| 2657 | vcpu->arch.dr6 = dr6 | DR6_FIXED_1; | ||
| 2658 | kvm_queue_exception(vcpu, DB_VECTOR); | ||
| 2659 | return 1; | ||
| 2660 | } | ||
| 2661 | kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1; | ||
| 2662 | kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7); | ||
| 2663 | /* fall through */ | ||
| 2664 | case BP_VECTOR: | ||
| 2654 | kvm_run->exit_reason = KVM_EXIT_DEBUG; | 2665 | kvm_run->exit_reason = KVM_EXIT_DEBUG; |
| 2655 | return 0; | 2666 | kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip; |
| 2667 | kvm_run->debug.arch.exception = ex_no; | ||
| 2668 | break; | ||
| 2669 | default: | ||
| 2670 | kvm_run->exit_reason = KVM_EXIT_EXCEPTION; | ||
| 2671 | kvm_run->ex.exception = ex_no; | ||
| 2672 | kvm_run->ex.error_code = error_code; | ||
| 2673 | break; | ||
| 2656 | } | 2674 | } |
| 2657 | kvm_run->exit_reason = KVM_EXIT_EXCEPTION; | ||
| 2658 | kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK; | ||
| 2659 | kvm_run->ex.error_code = error_code; | ||
| 2660 | return 0; | 2675 | return 0; |
| 2661 | } | 2676 | } |
| 2662 | 2677 | ||
| @@ -2677,7 +2692,7 @@ static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 2677 | static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | 2692 | static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) |
| 2678 | { | 2693 | { |
| 2679 | unsigned long exit_qualification; | 2694 | unsigned long exit_qualification; |
| 2680 | int size, down, in, string, rep; | 2695 | int size, in, string; |
| 2681 | unsigned port; | 2696 | unsigned port; |
| 2682 | 2697 | ||
| 2683 | ++vcpu->stat.io_exits; | 2698 | ++vcpu->stat.io_exits; |
| @@ -2693,8 +2708,6 @@ static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 2693 | 2708 | ||
| 2694 | size = (exit_qualification & 7) + 1; | 2709 | size = (exit_qualification & 7) + 1; |
| 2695 | in = (exit_qualification & 8) != 0; | 2710 | in = (exit_qualification & 8) != 0; |
| 2696 | down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0; | ||
| 2697 | rep = (exit_qualification & 32) != 0; | ||
| 2698 | port = exit_qualification >> 16; | 2711 | port = exit_qualification >> 16; |
| 2699 | 2712 | ||
| 2700 | skip_emulated_instruction(vcpu); | 2713 | skip_emulated_instruction(vcpu); |
| @@ -2795,21 +2808,44 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 2795 | unsigned long val; | 2808 | unsigned long val; |
| 2796 | int dr, reg; | 2809 | int dr, reg; |
| 2797 | 2810 | ||
| 2798 | /* | 2811 | dr = vmcs_readl(GUEST_DR7); |
| 2799 | * FIXME: this code assumes the host is debugging the guest. | 2812 | if (dr & DR7_GD) { |
| 2800 | * need to deal with guest debugging itself too. | 2813 | /* |
| 2801 | */ | 2814 | * As the vm-exit takes precedence over the debug trap, we |
| 2815 | * need to emulate the latter, either for the host or the | ||
| 2816 | * guest debugging itself. | ||
| 2817 | */ | ||
| 2818 | if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) { | ||
| 2819 | kvm_run->debug.arch.dr6 = vcpu->arch.dr6; | ||
| 2820 | kvm_run->debug.arch.dr7 = dr; | ||
| 2821 | kvm_run->debug.arch.pc = | ||
| 2822 | vmcs_readl(GUEST_CS_BASE) + | ||
| 2823 | vmcs_readl(GUEST_RIP); | ||
| 2824 | kvm_run->debug.arch.exception = DB_VECTOR; | ||
| 2825 | kvm_run->exit_reason = KVM_EXIT_DEBUG; | ||
| 2826 | return 0; | ||
| 2827 | } else { | ||
| 2828 | vcpu->arch.dr7 &= ~DR7_GD; | ||
| 2829 | vcpu->arch.dr6 |= DR6_BD; | ||
| 2830 | vmcs_writel(GUEST_DR7, vcpu->arch.dr7); | ||
| 2831 | kvm_queue_exception(vcpu, DB_VECTOR); | ||
| 2832 | return 1; | ||
| 2833 | } | ||
| 2834 | } | ||
| 2835 | |||
| 2802 | exit_qualification = vmcs_readl(EXIT_QUALIFICATION); | 2836 | exit_qualification = vmcs_readl(EXIT_QUALIFICATION); |
| 2803 | dr = exit_qualification & 7; | 2837 | dr = exit_qualification & DEBUG_REG_ACCESS_NUM; |
| 2804 | reg = (exit_qualification >> 8) & 15; | 2838 | reg = DEBUG_REG_ACCESS_REG(exit_qualification); |
| 2805 | if (exit_qualification & 16) { | 2839 | if (exit_qualification & TYPE_MOV_FROM_DR) { |
| 2806 | /* mov from dr */ | ||
| 2807 | switch (dr) { | 2840 | switch (dr) { |
| 2841 | case 0 ... 3: | ||
| 2842 | val = vcpu->arch.db[dr]; | ||
| 2843 | break; | ||
| 2808 | case 6: | 2844 | case 6: |
| 2809 | val = 0xffff0ff0; | 2845 | val = vcpu->arch.dr6; |
| 2810 | break; | 2846 | break; |
| 2811 | case 7: | 2847 | case 7: |
| 2812 | val = 0x400; | 2848 | val = vcpu->arch.dr7; |
| 2813 | break; | 2849 | break; |
| 2814 | default: | 2850 | default: |
| 2815 | val = 0; | 2851 | val = 0; |
| @@ -2817,7 +2853,38 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 2817 | kvm_register_write(vcpu, reg, val); | 2853 | kvm_register_write(vcpu, reg, val); |
| 2818 | KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler); | 2854 | KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler); |
| 2819 | } else { | 2855 | } else { |
| 2820 | /* mov to dr */ | 2856 | val = vcpu->arch.regs[reg]; |
| 2857 | switch (dr) { | ||
| 2858 | case 0 ... 3: | ||
| 2859 | vcpu->arch.db[dr] = val; | ||
| 2860 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) | ||
| 2861 | vcpu->arch.eff_db[dr] = val; | ||
| 2862 | break; | ||
| 2863 | case 4 ... 5: | ||
| 2864 | if (vcpu->arch.cr4 & X86_CR4_DE) | ||
| 2865 | kvm_queue_exception(vcpu, UD_VECTOR); | ||
| 2866 | break; | ||
| 2867 | case 6: | ||
| 2868 | if (val & 0xffffffff00000000ULL) { | ||
| 2869 | kvm_queue_exception(vcpu, GP_VECTOR); | ||
| 2870 | break; | ||
| 2871 | } | ||
| 2872 | vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1; | ||
| 2873 | break; | ||
| 2874 | case 7: | ||
| 2875 | if (val & 0xffffffff00000000ULL) { | ||
| 2876 | kvm_queue_exception(vcpu, GP_VECTOR); | ||
| 2877 | break; | ||
| 2878 | } | ||
| 2879 | vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1; | ||
| 2880 | if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) { | ||
| 2881 | vmcs_writel(GUEST_DR7, vcpu->arch.dr7); | ||
| 2882 | vcpu->arch.switch_db_regs = | ||
| 2883 | (val & DR7_BP_EN_MASK); | ||
| 2884 | } | ||
| 2885 | break; | ||
| 2886 | } | ||
| 2887 | KVMTRACE_2D(DR_WRITE, vcpu, (u32)dr, (u32)val, handler); | ||
| 2821 | } | 2888 | } |
| 2822 | skip_emulated_instruction(vcpu); | 2889 | skip_emulated_instruction(vcpu); |
| 2823 | return 1; | 2890 | return 1; |
| @@ -2968,17 +3035,25 @@ static int handle_task_switch(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 2968 | } | 3035 | } |
| 2969 | tss_selector = exit_qualification; | 3036 | tss_selector = exit_qualification; |
| 2970 | 3037 | ||
| 2971 | return kvm_task_switch(vcpu, tss_selector, reason); | 3038 | if (!kvm_task_switch(vcpu, tss_selector, reason)) |
| 3039 | return 0; | ||
| 3040 | |||
| 3041 | /* clear all local breakpoint enable flags */ | ||
| 3042 | vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55); | ||
| 3043 | |||
| 3044 | /* | ||
| 3045 | * TODO: What about debug traps on tss switch? | ||
| 3046 | * Are we supposed to inject them and update dr6? | ||
| 3047 | */ | ||
| 3048 | |||
| 3049 | return 1; | ||
| 2972 | } | 3050 | } |
| 2973 | 3051 | ||
| 2974 | static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | 3052 | static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) |
| 2975 | { | 3053 | { |
| 2976 | u64 exit_qualification; | 3054 | u64 exit_qualification; |
| 2977 | enum emulation_result er; | ||
| 2978 | gpa_t gpa; | 3055 | gpa_t gpa; |
| 2979 | unsigned long hva; | ||
| 2980 | int gla_validity; | 3056 | int gla_validity; |
| 2981 | int r; | ||
| 2982 | 3057 | ||
| 2983 | exit_qualification = vmcs_read64(EXIT_QUALIFICATION); | 3058 | exit_qualification = vmcs_read64(EXIT_QUALIFICATION); |
| 2984 | 3059 | ||
| @@ -3001,32 +3076,7 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 3001 | } | 3076 | } |
| 3002 | 3077 | ||
| 3003 | gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS); | 3078 | gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS); |
| 3004 | hva = gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT); | 3079 | return kvm_mmu_page_fault(vcpu, gpa & PAGE_MASK, 0); |
| 3005 | if (!kvm_is_error_hva(hva)) { | ||
| 3006 | r = kvm_mmu_page_fault(vcpu, gpa & PAGE_MASK, 0); | ||
| 3007 | if (r < 0) { | ||
| 3008 | printk(KERN_ERR "EPT: Not enough memory!\n"); | ||
| 3009 | return -ENOMEM; | ||
| 3010 | } | ||
| 3011 | return 1; | ||
| 3012 | } else { | ||
| 3013 | /* must be MMIO */ | ||
| 3014 | er = emulate_instruction(vcpu, kvm_run, 0, 0, 0); | ||
| 3015 | |||
| 3016 | if (er == EMULATE_FAIL) { | ||
| 3017 | printk(KERN_ERR | ||
| 3018 | "EPT: Fail to handle EPT violation vmexit!er is %d\n", | ||
| 3019 | er); | ||
| 3020 | printk(KERN_ERR "EPT: GPA: 0x%lx, GVA: 0x%lx\n", | ||
| 3021 | (long unsigned int)vmcs_read64(GUEST_PHYSICAL_ADDRESS), | ||
| 3022 | (long unsigned int)vmcs_read64(GUEST_LINEAR_ADDRESS)); | ||
| 3023 | printk(KERN_ERR "EPT: Exit qualification is 0x%lx\n", | ||
| 3024 | (long unsigned int)exit_qualification); | ||
| 3025 | return -ENOTSUPP; | ||
| 3026 | } else if (er == EMULATE_DO_MMIO) | ||
| 3027 | return 0; | ||
| 3028 | } | ||
| 3029 | return 1; | ||
| 3030 | } | 3080 | } |
| 3031 | 3081 | ||
| 3032 | static int handle_nmi_window(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | 3082 | static int handle_nmi_window(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) |
| @@ -3046,7 +3096,7 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu, | |||
| 3046 | struct kvm_run *kvm_run) | 3096 | struct kvm_run *kvm_run) |
| 3047 | { | 3097 | { |
| 3048 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 3098 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 3049 | int err; | 3099 | enum emulation_result err = EMULATE_DONE; |
| 3050 | 3100 | ||
| 3051 | preempt_enable(); | 3101 | preempt_enable(); |
| 3052 | local_irq_enable(); | 3102 | local_irq_enable(); |
| @@ -3071,10 +3121,7 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu, | |||
| 3071 | local_irq_disable(); | 3121 | local_irq_disable(); |
| 3072 | preempt_disable(); | 3122 | preempt_disable(); |
| 3073 | 3123 | ||
| 3074 | /* Guest state should be valid now except if we need to | 3124 | vmx->invalid_state_emulation_result = err; |
| 3075 | * emulate an MMIO */ | ||
| 3076 | if (guest_state_valid(vcpu)) | ||
| 3077 | vmx->emulation_required = 0; | ||
| 3078 | } | 3125 | } |
| 3079 | 3126 | ||
| 3080 | /* | 3127 | /* |
| @@ -3123,8 +3170,11 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) | |||
| 3123 | 3170 | ||
| 3124 | /* If we need to emulate an MMIO from handle_invalid_guest_state | 3171 | /* If we need to emulate an MMIO from handle_invalid_guest_state |
| 3125 | * we just return 0 */ | 3172 | * we just return 0 */ |
| 3126 | if (vmx->emulation_required && emulate_invalid_guest_state) | 3173 | if (vmx->emulation_required && emulate_invalid_guest_state) { |
| 3127 | return 0; | 3174 | if (guest_state_valid(vcpu)) |
| 3175 | vmx->emulation_required = 0; | ||
| 3176 | return vmx->invalid_state_emulation_result != EMULATE_DO_MMIO; | ||
| 3177 | } | ||
| 3128 | 3178 | ||
| 3129 | /* Access CR3 don't cause VMExit in paging mode, so we need | 3179 | /* Access CR3 don't cause VMExit in paging mode, so we need |
| 3130 | * to sync with guest real CR3. */ | 3180 | * to sync with guest real CR3. */ |
| @@ -3238,7 +3288,8 @@ static void vmx_complete_interrupts(struct vcpu_vmx *vmx) | |||
| 3238 | vmx->vcpu.arch.nmi_injected = false; | 3288 | vmx->vcpu.arch.nmi_injected = false; |
| 3239 | } | 3289 | } |
| 3240 | kvm_clear_exception_queue(&vmx->vcpu); | 3290 | kvm_clear_exception_queue(&vmx->vcpu); |
| 3241 | if (idtv_info_valid && type == INTR_TYPE_EXCEPTION) { | 3291 | if (idtv_info_valid && (type == INTR_TYPE_HARD_EXCEPTION || |
| 3292 | type == INTR_TYPE_SOFT_EXCEPTION)) { | ||
| 3242 | if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) { | 3293 | if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) { |
| 3243 | error = vmcs_read32(IDT_VECTORING_ERROR_CODE); | 3294 | error = vmcs_read32(IDT_VECTORING_ERROR_CODE); |
| 3244 | kvm_queue_exception_e(&vmx->vcpu, vector, error); | 3295 | kvm_queue_exception_e(&vmx->vcpu, vector, error); |
| @@ -3259,6 +3310,11 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu) | |||
| 3259 | 3310 | ||
| 3260 | vmx_update_window_states(vcpu); | 3311 | vmx_update_window_states(vcpu); |
| 3261 | 3312 | ||
| 3313 | if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) | ||
| 3314 | vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO, | ||
| 3315 | GUEST_INTR_STATE_STI | | ||
| 3316 | GUEST_INTR_STATE_MOV_SS); | ||
| 3317 | |||
| 3262 | if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) { | 3318 | if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) { |
| 3263 | if (vcpu->arch.interrupt.pending) { | 3319 | if (vcpu->arch.interrupt.pending) { |
| 3264 | enable_nmi_window(vcpu); | 3320 | enable_nmi_window(vcpu); |
| @@ -3347,6 +3403,8 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 3347 | */ | 3403 | */ |
| 3348 | vmcs_writel(HOST_CR0, read_cr0()); | 3404 | vmcs_writel(HOST_CR0, read_cr0()); |
| 3349 | 3405 | ||
| 3406 | set_debugreg(vcpu->arch.dr6, 6); | ||
| 3407 | |||
| 3350 | asm( | 3408 | asm( |
| 3351 | /* Store host registers */ | 3409 | /* Store host registers */ |
| 3352 | "push %%"R"dx; push %%"R"bp;" | 3410 | "push %%"R"dx; push %%"R"bp;" |
| @@ -3441,6 +3499,8 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |||
| 3441 | vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP)); | 3499 | vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP)); |
| 3442 | vcpu->arch.regs_dirty = 0; | 3500 | vcpu->arch.regs_dirty = 0; |
| 3443 | 3501 | ||
| 3502 | get_debugreg(vcpu->arch.dr6, 6); | ||
| 3503 | |||
| 3444 | vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD); | 3504 | vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD); |
| 3445 | if (vmx->rmode.irq.pending) | 3505 | if (vmx->rmode.irq.pending) |
| 3446 | fixup_rmode_irq(vmx); | 3506 | fixup_rmode_irq(vmx); |
| @@ -3595,7 +3655,6 @@ static struct kvm_x86_ops vmx_x86_ops = { | |||
| 3595 | .vcpu_put = vmx_vcpu_put, | 3655 | .vcpu_put = vmx_vcpu_put, |
| 3596 | 3656 | ||
| 3597 | .set_guest_debug = set_guest_debug, | 3657 | .set_guest_debug = set_guest_debug, |
| 3598 | .guest_debug_pre = kvm_guest_debug_pre, | ||
| 3599 | .get_msr = vmx_get_msr, | 3658 | .get_msr = vmx_get_msr, |
| 3600 | .set_msr = vmx_set_msr, | 3659 | .set_msr = vmx_set_msr, |
| 3601 | .get_segment_base = vmx_get_segment_base, | 3660 | .get_segment_base = vmx_get_segment_base, |
