diff options
Diffstat (limited to 'arch/x86/kvm/svm.c')
-rw-r--r-- | arch/x86/kvm/svm.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 161a5fa66d82..fc22e58d23b7 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c | |||
@@ -3127,13 +3127,15 @@ static int svm_set_vm_cr(struct kvm_vcpu *vcpu, u64 data) | |||
3127 | return 0; | 3127 | return 0; |
3128 | } | 3128 | } |
3129 | 3129 | ||
3130 | static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) | 3130 | static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) |
3131 | { | 3131 | { |
3132 | struct vcpu_svm *svm = to_svm(vcpu); | 3132 | struct vcpu_svm *svm = to_svm(vcpu); |
3133 | 3133 | ||
3134 | u32 ecx = msr->index; | ||
3135 | u64 data = msr->data; | ||
3134 | switch (ecx) { | 3136 | switch (ecx) { |
3135 | case MSR_IA32_TSC: | 3137 | case MSR_IA32_TSC: |
3136 | kvm_write_tsc(vcpu, data); | 3138 | kvm_write_tsc(vcpu, msr); |
3137 | break; | 3139 | break; |
3138 | case MSR_STAR: | 3140 | case MSR_STAR: |
3139 | svm->vmcb->save.star = data; | 3141 | svm->vmcb->save.star = data; |
@@ -3188,20 +3190,24 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data) | |||
3188 | vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); | 3190 | vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); |
3189 | break; | 3191 | break; |
3190 | default: | 3192 | default: |
3191 | return kvm_set_msr_common(vcpu, ecx, data); | 3193 | return kvm_set_msr_common(vcpu, msr); |
3192 | } | 3194 | } |
3193 | return 0; | 3195 | return 0; |
3194 | } | 3196 | } |
3195 | 3197 | ||
3196 | static int wrmsr_interception(struct vcpu_svm *svm) | 3198 | static int wrmsr_interception(struct vcpu_svm *svm) |
3197 | { | 3199 | { |
3200 | struct msr_data msr; | ||
3198 | u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX]; | 3201 | u32 ecx = svm->vcpu.arch.regs[VCPU_REGS_RCX]; |
3199 | u64 data = (svm->vcpu.arch.regs[VCPU_REGS_RAX] & -1u) | 3202 | u64 data = (svm->vcpu.arch.regs[VCPU_REGS_RAX] & -1u) |
3200 | | ((u64)(svm->vcpu.arch.regs[VCPU_REGS_RDX] & -1u) << 32); | 3203 | | ((u64)(svm->vcpu.arch.regs[VCPU_REGS_RDX] & -1u) << 32); |
3201 | 3204 | ||
3205 | msr.data = data; | ||
3206 | msr.index = ecx; | ||
3207 | msr.host_initiated = false; | ||
3202 | 3208 | ||
3203 | svm->next_rip = kvm_rip_read(&svm->vcpu) + 2; | 3209 | svm->next_rip = kvm_rip_read(&svm->vcpu) + 2; |
3204 | if (svm_set_msr(&svm->vcpu, ecx, data)) { | 3210 | if (svm_set_msr(&svm->vcpu, &msr)) { |
3205 | trace_kvm_msr_write_ex(ecx, data); | 3211 | trace_kvm_msr_write_ex(ecx, data); |
3206 | kvm_inject_gp(&svm->vcpu, 0); | 3212 | kvm_inject_gp(&svm->vcpu, 0); |
3207 | } else { | 3213 | } else { |