1 files changed, 808 insertions, 108 deletions

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index a9e769e4e251..1821c2078199 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -38,9 +38,6 @@ MODULE_LICENSE("GPL");
 #define IOPM_ALLOC_ORDER 2
 #define MSRPM_ALLOC_ORDER 1
 
-#define DR7_GD_MASK (1 << 13)
-#define DR6_BD_MASK (1 << 13)
-
 #define SEG_TYPE_LDT 2
 #define SEG_TYPE_BUSY_TSS16 3
 
@@ -50,6 +47,15 @@ MODULE_LICENSE("GPL");
 
 #define DEBUGCTL_RESERVED_BITS (~(0x3fULL))
 
+/* Turn on to get debugging output*/
+/* #define NESTED_DEBUG */
+
+#ifdef NESTED_DEBUG
+#define nsvm_printk(fmt, args...) printk(KERN_INFO fmt, ## args)
+#else
+#define nsvm_printk(fmt, args...) do {} while(0)
+#endif
+
 /* enable NPT for AMD64 and X86 with PAE */
 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
 static bool npt_enabled = true;
@@ -60,14 +66,29 @@ static int npt = 1;
 
 module_param(npt, int, S_IRUGO);
 
+static int nested = 0;
+module_param(nested, int, S_IRUGO);
+
 static void kvm_reput_irq(struct vcpu_svm *svm);
 static void svm_flush_tlb(struct kvm_vcpu *vcpu);
 
+static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override);
+static int nested_svm_vmexit(struct vcpu_svm *svm);
+static int nested_svm_vmsave(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque);
+static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
+                                      bool has_error_code, u32 error_code);
+
 static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
 {
         return container_of(vcpu, struct vcpu_svm, vcpu);
 }
 
+static inline bool is_nested(struct vcpu_svm *svm)
+{
+        return svm->nested_vmcb;
+}
+
 static unsigned long iopm_base;
 
 struct kvm_ldttss_desc {
@@ -157,32 +178,6 @@ static inline void kvm_write_cr2(unsigned long val)
         asm volatile ("mov %0, %%cr2" :: "r" (val));
 }
 
-static inline unsigned long read_dr6(void)
-{
-        unsigned long dr6;
-
-        asm volatile ("mov %%dr6, %0" : "=r" (dr6));
-        return dr6;
-}
-
-static inline void write_dr6(unsigned long val)
-{
-        asm volatile ("mov %0, %%dr6" :: "r" (val));
-}
-
-static inline unsigned long read_dr7(void)
-{
-        unsigned long dr7;
-
-        asm volatile ("mov %%dr7, %0" : "=r" (dr7));
-        return dr7;
-}
-
-static inline void write_dr7(unsigned long val)
-{
-        asm volatile ("mov %0, %%dr7" :: "r" (val));
-}
-
 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 {
         to_svm(vcpu)->asid_generation--;
@@ -198,7 +193,7 @@ static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
         if (!npt_enabled && !(efer & EFER_LMA))
                 efer &= ~EFER_LME;
 
-        to_svm(vcpu)->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
+        to_svm(vcpu)->vmcb->save.efer = efer | EFER_SVME;
         vcpu->arch.shadow_efer = efer;
 }
 
@@ -207,6 +202,11 @@ static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
+        /* If we are within a nested VM we'd better #VMEXIT and let the
+           guest handle the exception */
+        if (nested_svm_check_exception(svm, nr, has_error_code, error_code))
+                return;
+
         svm->vmcb->control.event_inj = nr
                 | SVM_EVTINJ_VALID
                 | (has_error_code ? SVM_EVTINJ_VALID_ERR : 0)
@@ -242,7 +242,7 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
         kvm_rip_write(vcpu, svm->next_rip);
         svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 
-        vcpu->arch.interrupt_window_open = 1;
+        vcpu->arch.interrupt_window_open = (svm->vcpu.arch.hflags & HF_GIF_MASK);
 }
 
 static int has_svm(void)
@@ -250,7 +250,7 @@ static int has_svm(void)
         const char *msg;
 
         if (!cpu_has_svm(&msg)) {
-                printk(KERN_INFO "has_svn: %s\n", msg);
+                printk(KERN_INFO "has_svm: %s\n", msg);
                 return 0;
         }
 
@@ -292,7 +292,7 @@ static void svm_hardware_enable(void *garbage)
         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 
         rdmsrl(MSR_EFER, efer);
-        wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
+        wrmsrl(MSR_EFER, efer | EFER_SVME);
 
         wrmsrl(MSR_VM_HSAVE_PA,
                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
@@ -417,6 +417,14 @@ static __init int svm_hardware_setup(void)
         if (boot_cpu_has(X86_FEATURE_NX))
                 kvm_enable_efer_bits(EFER_NX);
 
+        if (boot_cpu_has(X86_FEATURE_FXSR_OPT))
+                kvm_enable_efer_bits(EFER_FFXSR);
+
+        if (nested) {
+                printk(KERN_INFO "kvm: Nested Virtualization enabled\n");
+                kvm_enable_efer_bits(EFER_SVME);
+        }
+
         for_each_online_cpu(cpu) {
                 r = svm_cpu_init(cpu);
                 if (r)
@@ -559,7 +567,7 @@ static void init_vmcb(struct vcpu_svm *svm)
         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 
-        save->efer = MSR_EFER_SVME_MASK;
+        save->efer = EFER_SVME;
         save->dr6 = 0xffff0ff0;
         save->dr7 = 0x400;
         save->rflags = 2;
@@ -591,6 +599,9 @@ static void init_vmcb(struct vcpu_svm *svm)
                 save->cr4 = 0;
         }
         force_new_asid(&svm->vcpu);
+
+        svm->nested_vmcb = 0;
+        svm->vcpu.arch.hflags = HF_GIF_MASK;
 }
 
 static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
@@ -615,6 +626,8 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         struct vcpu_svm *svm;
         struct page *page;
         struct page *msrpm_pages;
+        struct page *hsave_page;
+        struct page *nested_msrpm_pages;
         int err;
 
         svm = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
@@ -637,14 +650,25 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
         if (!msrpm_pages)
                 goto uninit;
+
+        nested_msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
+        if (!nested_msrpm_pages)
+                goto uninit;
+
         svm->msrpm = page_address(msrpm_pages);
         svm_vcpu_init_msrpm(svm->msrpm);
 
+        hsave_page = alloc_page(GFP_KERNEL);
+        if (!hsave_page)
+                goto uninit;
+        svm->hsave = page_address(hsave_page);
+
+        svm->nested_msrpm = page_address(nested_msrpm_pages);
+
         svm->vmcb = page_address(page);
         clear_page(svm->vmcb);
         svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
         svm->asid_generation = 0;
-        memset(svm->db_regs, 0, sizeof(svm->db_regs));
         init_vmcb(svm);
 
         fx_init(&svm->vcpu);
@@ -669,6 +693,8 @@ static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 
         __free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
         __free_pages(virt_to_page(svm->msrpm), MSRPM_ALLOC_ORDER);
+        __free_page(virt_to_page(svm->hsave));
+        __free_pages(virt_to_page(svm->nested_msrpm), MSRPM_ALLOC_ORDER);
         kvm_vcpu_uninit(vcpu);
         kmem_cache_free(kvm_vcpu_cache, svm);
 }
@@ -718,6 +744,16 @@ static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
         to_svm(vcpu)->vmcb->save.rflags = rflags;
 }
 
+static void svm_set_vintr(struct vcpu_svm *svm)
+{
+        svm->vmcb->control.intercept |= 1ULL << INTERCEPT_VINTR;
+}
+
+static void svm_clear_vintr(struct vcpu_svm *svm)
+{
+        svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
+}
+
 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 {
         struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
@@ -760,20 +796,37 @@ static void svm_get_segment(struct kvm_vcpu *vcpu,
         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 
-        /*
-         * SVM always stores 0 for the 'G' bit in the CS selector in
-         * the VMCB on a VMEXIT. This hurts cross-vendor migration:
-         * Intel's VMENTRY has a check on the 'G' bit.
-         */
-        if (seg == VCPU_SREG_CS)
+        switch (seg) {
+        case VCPU_SREG_CS:
+                /*
+                 * SVM always stores 0 for the 'G' bit in the CS selector in
+                 * the VMCB on a VMEXIT. This hurts cross-vendor migration:
+                 * Intel's VMENTRY has a check on the 'G' bit.
+                 */
                 var->g = s->limit > 0xfffff;
-
-        /*
-         * Work around a bug where the busy flag in the tr selector
-         * isn't exposed
-         */
-        if (seg == VCPU_SREG_TR)
+                break;
+        case VCPU_SREG_TR:
+                /*
+                 * Work around a bug where the busy flag in the tr selector
+                 * isn't exposed
+                 */
                 var->type |= 0x2;
+                break;
+        case VCPU_SREG_DS:
+        case VCPU_SREG_ES:
+        case VCPU_SREG_FS:
+        case VCPU_SREG_GS:
+                /*
+                 * The accessed bit must always be set in the segment
+                 * descriptor cache, although it can be cleared in the
+                 * descriptor, the cached bit always remains at 1. Since
+                 * Intel has a check on this, set it here to support
+                 * cross-vendor migration.
+                 */
+                if (!var->unusable)
+                        var->type |= 0x1;
+                break;
+        }
 
         var->unusable = !var->present;
 }
@@ -905,9 +958,37 @@ static void svm_set_segment(struct kvm_vcpu *vcpu,
 
 }
 
-static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
+static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
 {
-        return -EOPNOTSUPP;
+        int old_debug = vcpu->guest_debug;
+        struct vcpu_svm *svm = to_svm(vcpu);
+
+        vcpu->guest_debug = dbg->control;
+
+        svm->vmcb->control.intercept_exceptions &=
+                ~((1 << DB_VECTOR) | (1 << BP_VECTOR));
+        if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
+                if (vcpu->guest_debug &
+                    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
+                        svm->vmcb->control.intercept_exceptions |=
+                                1 << DB_VECTOR;
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
+                        svm->vmcb->control.intercept_exceptions |=
+                                1 << BP_VECTOR;
+        } else
+                vcpu->guest_debug = 0;
+
+        if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                svm->vmcb->save.dr7 = dbg->arch.debugreg[7];
+        else
+                svm->vmcb->save.dr7 = vcpu->arch.dr7;
+
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                svm->vmcb->save.rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
+        else if (old_debug & KVM_GUESTDBG_SINGLESTEP)
+                svm->vmcb->save.rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
+
+        return 0;
 }
 
 static int svm_get_irq(struct kvm_vcpu *vcpu)
@@ -949,7 +1030,29 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *svm_data)
 
 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 {
-        unsigned long val = to_svm(vcpu)->db_regs[dr];
+        struct vcpu_svm *svm = to_svm(vcpu);
+        unsigned long val;
+
+        switch (dr) {
+        case 0 ... 3:
+                val = vcpu->arch.db[dr];
+                break;
+        case 6:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                        val = vcpu->arch.dr6;
+                else
+                        val = svm->vmcb->save.dr6;
+                break;
+        case 7:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                        val = vcpu->arch.dr7;
+                else
+                        val = svm->vmcb->save.dr7;
+                break;
+        default:
+                val = 0;
+        }
+
         KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler);
         return val;
 }
@@ -959,33 +1062,40 @@ static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
-        *exception = 0;
+        KVMTRACE_2D(DR_WRITE, vcpu, (u32)dr, (u32)value, handler);
 
-        if (svm->vmcb->save.dr7 & DR7_GD_MASK) {
-                svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
-                svm->vmcb->save.dr6 |= DR6_BD_MASK;
-                *exception = DB_VECTOR;
-                return;
-        }
+        *exception = 0;
 
         switch (dr) {
         case 0 ... 3:
-                svm->db_regs[dr] = value;
+                vcpu->arch.db[dr] = value;
+                if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
+                        vcpu->arch.eff_db[dr] = value;
                 return;
         case 4 ... 5:
-                if (vcpu->arch.cr4 & X86_CR4_DE) {
+                if (vcpu->arch.cr4 & X86_CR4_DE)
                         *exception = UD_VECTOR;
+                return;
+        case 6:
+                if (value & 0xffffffff00000000ULL) {
+                        *exception = GP_VECTOR;
                         return;
                 }
-        case 7: {
-                if (value & ~((1ULL << 32) - 1)) {
+                vcpu->arch.dr6 = (value & DR6_VOLATILE) | DR6_FIXED_1;
+                return;
+        case 7:
+                if (value & 0xffffffff00000000ULL) {
                         *exception = GP_VECTOR;
                         return;
                 }
-                svm->vmcb->save.dr7 = value;
+                vcpu->arch.dr7 = (value & DR7_VOLATILE) | DR7_FIXED_1;
+                if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
+                        svm->vmcb->save.dr7 = vcpu->arch.dr7;
+                        vcpu->arch.switch_db_regs = (value & DR7_BP_EN_MASK);
+                }
                 return;
-        }
         default:
+                /* FIXME: Possible case? */
                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
                        __func__, dr);
                 *exception = UD_VECTOR;
@@ -1031,6 +1141,27 @@ static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
 }
 
+static int db_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (!(svm->vcpu.guest_debug &
+              (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
+                kvm_queue_exception(&svm->vcpu, DB_VECTOR);
+                return 1;
+        }
+        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+        kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
+        kvm_run->debug.arch.exception = DB_VECTOR;
+        return 0;
+}
+
+static int bp_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+        kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
+        kvm_run->debug.arch.exception = BP_VECTOR;
+        return 0;
+}
+
 static int ud_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         int er;
@@ -1080,7 +1211,7 @@ static int shutdown_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */
-        int size, down, in, string, rep;
+        int size, in, string;
         unsigned port;
 
         ++svm->vcpu.stat.io_exits;
@@ -1099,8 +1230,6 @@ static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
         port = io_info >> 16;
         size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
-        rep = (io_info & SVM_IOIO_REP_MASK) != 0;
-        down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
 
         skip_emulated_instruction(&svm->vcpu);
         return kvm_emulate_pio(&svm->vcpu, kvm_run, in, size, port);
@@ -1139,6 +1268,567 @@ static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         return 1;
 }
 
+static int nested_svm_check_permissions(struct vcpu_svm *svm)
+{
+        if (!(svm->vcpu.arch.shadow_efer & EFER_SVME)
+            || !is_paging(&svm->vcpu)) {
+                kvm_queue_exception(&svm->vcpu, UD_VECTOR);
+                return 1;
+        }
+
+        if (svm->vmcb->save.cpl) {
+                kvm_inject_gp(&svm->vcpu, 0);
+                return 1;
+        }
+
+       return 0;
+}
+
+static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
+                                      bool has_error_code, u32 error_code)
+{
+        if (is_nested(svm)) {
+                svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
+                svm->vmcb->control.exit_code_hi = 0;
+                svm->vmcb->control.exit_info_1 = error_code;
+                svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
+                if (nested_svm_exit_handled(svm, false)) {
+                        nsvm_printk("VMexit -> EXCP 0x%x\n", nr);
+
+                        nested_svm_vmexit(svm);
+                        return 1;
+                }
+        }
+
+        return 0;
+}
+
+static inline int nested_svm_intr(struct vcpu_svm *svm)
+{
+        if (is_nested(svm)) {
+                if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
+                        return 0;
+
+                if (!(svm->vcpu.arch.hflags & HF_HIF_MASK))
+                        return 0;
+
+                svm->vmcb->control.exit_code = SVM_EXIT_INTR;
+
+                if (nested_svm_exit_handled(svm, false)) {
+                        nsvm_printk("VMexit -> INTR\n");
+                        nested_svm_vmexit(svm);
+                        return 1;
+                }
+        }
+
+        return 0;
+}
+
+static struct page *nested_svm_get_page(struct vcpu_svm *svm, u64 gpa)
+{
+        struct page *page;
+
+        down_read(&current->mm->mmap_sem);
+        page = gfn_to_page(svm->vcpu.kvm, gpa >> PAGE_SHIFT);
+        up_read(&current->mm->mmap_sem);
+
+        if (is_error_page(page)) {
+                printk(KERN_INFO "%s: could not find page at 0x%llx\n",
+                       __func__, gpa);
+                kvm_release_page_clean(page);
+                kvm_inject_gp(&svm->vcpu, 0);
+                return NULL;
+        }
+        return page;
+}
+
+static int nested_svm_do(struct vcpu_svm *svm,
+                         u64 arg1_gpa, u64 arg2_gpa, void *opaque,
+                         int (*handler)(struct vcpu_svm *svm,
+                                        void *arg1,
+                                        void *arg2,
+                                        void *opaque))
+{
+        struct page *arg1_page;
+        struct page *arg2_page = NULL;
+        void *arg1;
+        void *arg2 = NULL;
+        int retval;
+
+        arg1_page = nested_svm_get_page(svm, arg1_gpa);
+        if(arg1_page == NULL)
+                return 1;
+
+        if (arg2_gpa) {
+                arg2_page = nested_svm_get_page(svm, arg2_gpa);
+                if(arg2_page == NULL) {
+                        kvm_release_page_clean(arg1_page);
+                        return 1;
+                }
+        }
+
+        arg1 = kmap_atomic(arg1_page, KM_USER0);
+        if (arg2_gpa)
+                arg2 = kmap_atomic(arg2_page, KM_USER1);
+
+        retval = handler(svm, arg1, arg2, opaque);
+
+        kunmap_atomic(arg1, KM_USER0);
+        if (arg2_gpa)
+                kunmap_atomic(arg2, KM_USER1);
+
+        kvm_release_page_dirty(arg1_page);
+        if (arg2_gpa)
+                kvm_release_page_dirty(arg2_page);
+
+        return retval;
+}
+
+static int nested_svm_exit_handled_real(struct vcpu_svm *svm,
+                                        void *arg1,
+                                        void *arg2,
+                                        void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        bool kvm_overrides = *(bool *)opaque;
+        u32 exit_code = svm->vmcb->control.exit_code;
+
+        if (kvm_overrides) {
+                switch (exit_code) {
+                case SVM_EXIT_INTR:
+                case SVM_EXIT_NMI:
+                        return 0;
+                /* For now we are always handling NPFs when using them */
+                case SVM_EXIT_NPF:
+                        if (npt_enabled)
+                                return 0;
+                        break;
+                /* When we're shadowing, trap PFs */
+                case SVM_EXIT_EXCP_BASE + PF_VECTOR:
+                        if (!npt_enabled)
+                                return 0;
+                        break;
+                default:
+                        break;
+                }
+        }
+
+        switch (exit_code) {
+        case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR8: {
+                u32 cr_bits = 1 << (exit_code - SVM_EXIT_READ_CR0);
+                if (nested_vmcb->control.intercept_cr_read & cr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR8: {
+                u32 cr_bits = 1 << (exit_code - SVM_EXIT_WRITE_CR0);
+                if (nested_vmcb->control.intercept_cr_write & cr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR7: {
+                u32 dr_bits = 1 << (exit_code - SVM_EXIT_READ_DR0);
+                if (nested_vmcb->control.intercept_dr_read & dr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR7: {
+                u32 dr_bits = 1 << (exit_code - SVM_EXIT_WRITE_DR0);
+                if (nested_vmcb->control.intercept_dr_write & dr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
+                u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
+                if (nested_vmcb->control.intercept_exceptions & excp_bits)
+                        return 1;
+                break;
+        }
+        default: {
+                u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR);
+                nsvm_printk("exit code: 0x%x\n", exit_code);
+                if (nested_vmcb->control.intercept & exit_bits)
+                        return 1;
+        }
+        }
+
+        return 0;
+}
+
+static int nested_svm_exit_handled_msr(struct vcpu_svm *svm,
+                                       void *arg1, void *arg2,
+                                       void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        u8 *msrpm = (u8 *)arg2;
+        u32 t0, t1;
+        u32 msr = svm->vcpu.arch.regs[VCPU_REGS_RCX];
+        u32 param = svm->vmcb->control.exit_info_1 & 1;
+
+        if (!(nested_vmcb->control.intercept & (1ULL << INTERCEPT_MSR_PROT)))
+                return 0;
+
+        switch(msr) {
+        case 0 ... 0x1fff:
+                t0 = (msr * 2) % 8;
+                t1 = msr / 8;
+                break;
+        case 0xc0000000 ... 0xc0001fff:
+                t0 = (8192 + msr - 0xc0000000) * 2;
+                t1 = (t0 / 8);
+                t0 %= 8;
+                break;
+        case 0xc0010000 ... 0xc0011fff:
+                t0 = (16384 + msr - 0xc0010000) * 2;
+                t1 = (t0 / 8);
+                t0 %= 8;
+                break;
+        default:
+                return 1;
+                break;
+        }
+        if (msrpm[t1] & ((1 << param) << t0))
+                return 1;
+
+        return 0;
+}
+
+static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override)
+{
+        bool k = kvm_override;
+
+        switch (svm->vmcb->control.exit_code) {
+        case SVM_EXIT_MSR:
+                return nested_svm_do(svm, svm->nested_vmcb,
+                                     svm->nested_vmcb_msrpm, NULL,
+                                     nested_svm_exit_handled_msr);
+        default: break;
+        }
+
+        return nested_svm_do(svm, svm->nested_vmcb, 0, &k,
+                             nested_svm_exit_handled_real);
+}
+
+static int nested_svm_vmexit_real(struct vcpu_svm *svm, void *arg1,
+                                  void *arg2, void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        struct vmcb *hsave = svm->hsave;
+        u64 nested_save[] = { nested_vmcb->save.cr0,
+                              nested_vmcb->save.cr3,
+                              nested_vmcb->save.cr4,
+                              nested_vmcb->save.efer,
+                              nested_vmcb->control.intercept_cr_read,
+                              nested_vmcb->control.intercept_cr_write,
+                              nested_vmcb->control.intercept_dr_read,
+                              nested_vmcb->control.intercept_dr_write,
+                              nested_vmcb->control.intercept_exceptions,
+                              nested_vmcb->control.intercept,
+                              nested_vmcb->control.msrpm_base_pa,
+                              nested_vmcb->control.iopm_base_pa,
+                              nested_vmcb->control.tsc_offset };
+
+        /* Give the current vmcb to the guest */
+        memcpy(nested_vmcb, svm->vmcb, sizeof(struct vmcb));
+        nested_vmcb->save.cr0 = nested_save[0];
+        if (!npt_enabled)
+                nested_vmcb->save.cr3 = nested_save[1];
+        nested_vmcb->save.cr4 = nested_save[2];
+        nested_vmcb->save.efer = nested_save[3];
+        nested_vmcb->control.intercept_cr_read = nested_save[4];
+        nested_vmcb->control.intercept_cr_write = nested_save[5];
+        nested_vmcb->control.intercept_dr_read = nested_save[6];
+        nested_vmcb->control.intercept_dr_write = nested_save[7];
+        nested_vmcb->control.intercept_exceptions = nested_save[8];
+        nested_vmcb->control.intercept = nested_save[9];
+        nested_vmcb->control.msrpm_base_pa = nested_save[10];
+        nested_vmcb->control.iopm_base_pa = nested_save[11];
+        nested_vmcb->control.tsc_offset = nested_save[12];
+
+        /* We always set V_INTR_MASKING and remember the old value in hflags */
+        if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
+                nested_vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK;
+
+        if ((nested_vmcb->control.int_ctl & V_IRQ_MASK) &&
+            (nested_vmcb->control.int_vector)) {
+                nsvm_printk("WARNING: IRQ 0x%x still enabled on #VMEXIT\n",
+                                nested_vmcb->control.int_vector);
+        }
+
+        /* Restore the original control entries */
+        svm->vmcb->control = hsave->control;
+
+        /* Kill any pending exceptions */
+        if (svm->vcpu.arch.exception.pending == true)
+                nsvm_printk("WARNING: Pending Exception\n");
+        svm->vcpu.arch.exception.pending = false;
+
+        /* Restore selected save entries */
+        svm->vmcb->save.es = hsave->save.es;
+        svm->vmcb->save.cs = hsave->save.cs;
+        svm->vmcb->save.ss = hsave->save.ss;
+        svm->vmcb->save.ds = hsave->save.ds;
+        svm->vmcb->save.gdtr = hsave->save.gdtr;
+        svm->vmcb->save.idtr = hsave->save.idtr;
+        svm->vmcb->save.rflags = hsave->save.rflags;
+        svm_set_efer(&svm->vcpu, hsave->save.efer);
+        svm_set_cr0(&svm->vcpu, hsave->save.cr0 | X86_CR0_PE);
+        svm_set_cr4(&svm->vcpu, hsave->save.cr4);
+        if (npt_enabled) {
+                svm->vmcb->save.cr3 = hsave->save.cr3;
+                svm->vcpu.arch.cr3 = hsave->save.cr3;
+        } else {
+                kvm_set_cr3(&svm->vcpu, hsave->save.cr3);
+        }
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, hsave->save.rax);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, hsave->save.rsp);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, hsave->save.rip);
+        svm->vmcb->save.dr7 = 0;
+        svm->vmcb->save.cpl = 0;
+        svm->vmcb->control.exit_int_info = 0;
+
+        svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
+        /* Exit nested SVM mode */
+        svm->nested_vmcb = 0;
+
+        return 0;
+}
+
+static int nested_svm_vmexit(struct vcpu_svm *svm)
+{
+        nsvm_printk("VMexit\n");
+        if (nested_svm_do(svm, svm->nested_vmcb, 0,
+                          NULL, nested_svm_vmexit_real))
+                return 1;
+
+        kvm_mmu_reset_context(&svm->vcpu);
+        kvm_mmu_load(&svm->vcpu);
+
+        return 0;
+}
+
+static int nested_svm_vmrun_msrpm(struct vcpu_svm *svm, void *arg1,
+                                  void *arg2, void *opaque)
+{
+        int i;
+        u32 *nested_msrpm = (u32*)arg1;
+        for (i=0; i< PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER) / 4; i++)
+                svm->nested_msrpm[i] = svm->msrpm[i] | nested_msrpm[i];
+        svm->vmcb->control.msrpm_base_pa = __pa(svm->nested_msrpm);
+
+        return 0;
+}
+
+static int nested_svm_vmrun(struct vcpu_svm *svm, void *arg1,
+                            void *arg2, void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        struct vmcb *hsave = svm->hsave;
+
+        /* nested_vmcb is our indicator if nested SVM is activated */
+        svm->nested_vmcb = svm->vmcb->save.rax;
+
+        /* Clear internal status */
+        svm->vcpu.arch.exception.pending = false;
+
+        /* Save the old vmcb, so we don't need to pick what we save, but
+           can restore everything when a VMEXIT occurs */
+        memcpy(hsave, svm->vmcb, sizeof(struct vmcb));
+        /* We need to remember the original CR3 in the SPT case */
+        if (!npt_enabled)
+                hsave->save.cr3 = svm->vcpu.arch.cr3;
+        hsave->save.cr4 = svm->vcpu.arch.cr4;
+        hsave->save.rip = svm->next_rip;
+
+        if (svm->vmcb->save.rflags & X86_EFLAGS_IF)
+                svm->vcpu.arch.hflags |= HF_HIF_MASK;
+        else
+                svm->vcpu.arch.hflags &= ~HF_HIF_MASK;
+
+        /* Load the nested guest state */
+        svm->vmcb->save.es = nested_vmcb->save.es;
+        svm->vmcb->save.cs = nested_vmcb->save.cs;
+        svm->vmcb->save.ss = nested_vmcb->save.ss;
+        svm->vmcb->save.ds = nested_vmcb->save.ds;
+        svm->vmcb->save.gdtr = nested_vmcb->save.gdtr;
+        svm->vmcb->save.idtr = nested_vmcb->save.idtr;
+        svm->vmcb->save.rflags = nested_vmcb->save.rflags;
+        svm_set_efer(&svm->vcpu, nested_vmcb->save.efer);
+        svm_set_cr0(&svm->vcpu, nested_vmcb->save.cr0);
+        svm_set_cr4(&svm->vcpu, nested_vmcb->save.cr4);
+        if (npt_enabled) {
+                svm->vmcb->save.cr3 = nested_vmcb->save.cr3;
+                svm->vcpu.arch.cr3 = nested_vmcb->save.cr3;
+        } else {
+                kvm_set_cr3(&svm->vcpu, nested_vmcb->save.cr3);
+                kvm_mmu_reset_context(&svm->vcpu);
+        }
+        svm->vmcb->save.cr2 = nested_vmcb->save.cr2;
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, nested_vmcb->save.rax);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, nested_vmcb->save.rsp);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, nested_vmcb->save.rip);
+        /* In case we don't even reach vcpu_run, the fields are not updated */
+        svm->vmcb->save.rax = nested_vmcb->save.rax;
+        svm->vmcb->save.rsp = nested_vmcb->save.rsp;
+        svm->vmcb->save.rip = nested_vmcb->save.rip;
+        svm->vmcb->save.dr7 = nested_vmcb->save.dr7;
+        svm->vmcb->save.dr6 = nested_vmcb->save.dr6;
+        svm->vmcb->save.cpl = nested_vmcb->save.cpl;
+
+        /* We don't want a nested guest to be more powerful than the guest,
+           so all intercepts are ORed */
+        svm->vmcb->control.intercept_cr_read |=
+                nested_vmcb->control.intercept_cr_read;
+        svm->vmcb->control.intercept_cr_write |=
+                nested_vmcb->control.intercept_cr_write;
+        svm->vmcb->control.intercept_dr_read |=
+                nested_vmcb->control.intercept_dr_read;
+        svm->vmcb->control.intercept_dr_write |=
+                nested_vmcb->control.intercept_dr_write;
+        svm->vmcb->control.intercept_exceptions |=
+                nested_vmcb->control.intercept_exceptions;
+
+        svm->vmcb->control.intercept |= nested_vmcb->control.intercept;
+
+        svm->nested_vmcb_msrpm = nested_vmcb->control.msrpm_base_pa;
+
+        force_new_asid(&svm->vcpu);
+        svm->vmcb->control.exit_int_info = nested_vmcb->control.exit_int_info;
+        svm->vmcb->control.exit_int_info_err = nested_vmcb->control.exit_int_info_err;
+        svm->vmcb->control.int_ctl = nested_vmcb->control.int_ctl | V_INTR_MASKING_MASK;
+        if (nested_vmcb->control.int_ctl & V_IRQ_MASK) {
+                nsvm_printk("nSVM Injecting Interrupt: 0x%x\n",
+                                nested_vmcb->control.int_ctl);
+        }
+        if (nested_vmcb->control.int_ctl & V_INTR_MASKING_MASK)
+                svm->vcpu.arch.hflags |= HF_VINTR_MASK;
+        else
+                svm->vcpu.arch.hflags &= ~HF_VINTR_MASK;
+
+        nsvm_printk("nSVM exit_int_info: 0x%x | int_state: 0x%x\n",
+                        nested_vmcb->control.exit_int_info,
+                        nested_vmcb->control.int_state);
+
+        svm->vmcb->control.int_vector = nested_vmcb->control.int_vector;
+        svm->vmcb->control.int_state = nested_vmcb->control.int_state;
+        svm->vmcb->control.tsc_offset += nested_vmcb->control.tsc_offset;
+        if (nested_vmcb->control.event_inj & SVM_EVTINJ_VALID)
+                nsvm_printk("Injecting Event: 0x%x\n",
+                                nested_vmcb->control.event_inj);
+        svm->vmcb->control.event_inj = nested_vmcb->control.event_inj;
+        svm->vmcb->control.event_inj_err = nested_vmcb->control.event_inj_err;
+
+        svm->vcpu.arch.hflags |= HF_GIF_MASK;
+
+        return 0;
+}
+
+static int nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
+{
+        to_vmcb->save.fs = from_vmcb->save.fs;
+        to_vmcb->save.gs = from_vmcb->save.gs;
+        to_vmcb->save.tr = from_vmcb->save.tr;
+        to_vmcb->save.ldtr = from_vmcb->save.ldtr;
+        to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base;
+        to_vmcb->save.star = from_vmcb->save.star;
+        to_vmcb->save.lstar = from_vmcb->save.lstar;
+        to_vmcb->save.cstar = from_vmcb->save.cstar;
+        to_vmcb->save.sfmask = from_vmcb->save.sfmask;
+        to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs;
+        to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp;
+        to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip;
+
+        return 1;
+}
+
+static int nested_svm_vmload(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque)
+{
+        return nested_svm_vmloadsave((struct vmcb *)nested_vmcb, svm->vmcb);
+}
+
+static int nested_svm_vmsave(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque)
+{
+        return nested_svm_vmloadsave(svm->vmcb, (struct vmcb *)nested_vmcb);
+}
+
+static int vmload_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        nested_svm_do(svm, svm->vmcb->save.rax, 0, NULL, nested_svm_vmload);
+
+        return 1;
+}
+
+static int vmsave_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        nested_svm_do(svm, svm->vmcb->save.rax, 0, NULL, nested_svm_vmsave);
+
+        return 1;
+}
+
+static int vmrun_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        nsvm_printk("VMrun\n");
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        if (nested_svm_do(svm, svm->vmcb->save.rax, 0,
+                          NULL, nested_svm_vmrun))
+                return 1;
+
+        if (nested_svm_do(svm, svm->nested_vmcb_msrpm, 0,
+                      NULL, nested_svm_vmrun_msrpm))
+                return 1;
+
+        return 1;
+}
+
+static int stgi_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        svm->vcpu.arch.hflags |= HF_GIF_MASK;
+
+        return 1;
+}
+
+static int clgi_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
+
+        /* After a CLGI no interrupts should come */
+        svm_clear_vintr(svm);
+        svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
+
+        return 1;
+}
+
 static int invalid_op_interception(struct vcpu_svm *svm,
                                    struct kvm_run *kvm_run)
 {
@@ -1250,6 +1940,15 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
         case MSR_IA32_LASTINTTOIP:
                 *data = svm->vmcb->save.last_excp_to;
                 break;
+        case MSR_VM_HSAVE_PA:
+                *data = svm->hsave_msr;
+                break;
+        case MSR_VM_CR:
+                *data = 0;
+                break;
+        case MSR_IA32_UCODE_REV:
+                *data = 0x01000065;
+                break;
         default:
                 return kvm_get_msr_common(vcpu, ecx, data);
         }
@@ -1344,6 +2043,9 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", ecx, data);
 
                 break;
+        case MSR_VM_HSAVE_PA:
+                svm->hsave_msr = data;
+                break;
         default:
                 return kvm_set_msr_common(vcpu, ecx, data);
         }
@@ -1380,7 +2082,7 @@ static int interrupt_window_interception(struct vcpu_svm *svm,
 {
         KVMTRACE_0D(PEND_INTR, &svm->vcpu, handler);
 
-        svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
+        svm_clear_vintr(svm);
         svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
         /*
          * If the user space waits to inject interrupts, exit as soon as
@@ -1417,6 +2119,8 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
+        [SVM_EXIT_EXCP_BASE + DB_VECTOR]        = db_interception,
+        [SVM_EXIT_EXCP_BASE + BP_VECTOR]        = bp_interception,
         [SVM_EXIT_EXCP_BASE + UD_VECTOR]        = ud_interception,
         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
         [SVM_EXIT_EXCP_BASE + NM_VECTOR]        = nm_interception,
@@ -1436,12 +2140,12 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
         [SVM_EXIT_MSR]                          = msr_interception,
         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
-        [SVM_EXIT_VMRUN]                        = invalid_op_interception,
+        [SVM_EXIT_VMRUN]                        = vmrun_interception,
         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
-        [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
-        [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
-        [SVM_EXIT_STGI]                         = invalid_op_interception,
-        [SVM_EXIT_CLGI]                         = invalid_op_interception,
+        [SVM_EXIT_VMLOAD]                       = vmload_interception,
+        [SVM_EXIT_VMSAVE]                       = vmsave_interception,
+        [SVM_EXIT_STGI]                         = stgi_interception,
+        [SVM_EXIT_CLGI]                         = clgi_interception,
         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
         [SVM_EXIT_WBINVD]                       = emulate_on_interception,
         [SVM_EXIT_MONITOR]                      = invalid_op_interception,
@@ -1457,6 +2161,17 @@ static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
         KVMTRACE_3D(VMEXIT, vcpu, exit_code, (u32)svm->vmcb->save.rip,
                     (u32)((u64)svm->vmcb->save.rip >> 32), entryexit);
 
+        if (is_nested(svm)) {
+                nsvm_printk("nested handle_exit: 0x%x | 0x%lx | 0x%lx | 0x%lx\n",
+                            exit_code, svm->vmcb->control.exit_info_1,
+                            svm->vmcb->control.exit_info_2, svm->vmcb->save.rip);
+                if (nested_svm_exit_handled(svm, true)) {
+                        nested_svm_vmexit(svm);
+                        nsvm_printk("-> #VMEXIT\n");
+                        return 1;
+                }
+        }
+
         if (npt_enabled) {
                 int mmu_reload = 0;
                 if ((vcpu->arch.cr0 ^ svm->vmcb->save.cr0) & X86_CR0_PG) {
@@ -1544,6 +2259,8 @@ static void svm_set_irq(struct kvm_vcpu *vcpu, int irq)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
+        nested_svm_intr(svm);
+
         svm_inject_irq(svm, irq);
 }
 
@@ -1589,11 +2306,17 @@ static void svm_intr_assist(struct kvm_vcpu *vcpu)
         if (!kvm_cpu_has_interrupt(vcpu))
                 goto out;
 
+        if (nested_svm_intr(svm))
+                goto out;
+
+        if (!(svm->vcpu.arch.hflags & HF_GIF_MASK))
+                goto out;
+
         if (!(vmcb->save.rflags & X86_EFLAGS_IF) ||
             (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) ||
             (vmcb->control.event_inj & SVM_EVTINJ_VALID)) {
                 /* unable to deliver irq, set pending irq */
-                vmcb->control.intercept |= (1ULL << INTERCEPT_VINTR);
+                svm_set_vintr(svm);
                 svm_inject_irq(svm, 0x0);
                 goto out;
         }
@@ -1615,7 +2338,8 @@ static void kvm_reput_irq(struct vcpu_svm *svm)
         }
 
         svm->vcpu.arch.interrupt_window_open =
-                !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
+                !(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
+                 (svm->vcpu.arch.hflags & HF_GIF_MASK);
 }
 
 static void svm_do_inject_vector(struct vcpu_svm *svm)
@@ -1637,9 +2361,13 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
         struct vcpu_svm *svm = to_svm(vcpu);
         struct vmcb_control_area *control = &svm->vmcb->control;
 
+        if (nested_svm_intr(svm))
+                return;
+
         svm->vcpu.arch.interrupt_window_open =
                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
-                 (svm->vmcb->save.rflags & X86_EFLAGS_IF));
+                 (svm->vmcb->save.rflags & X86_EFLAGS_IF) &&
+                 (svm->vcpu.arch.hflags & HF_GIF_MASK));
 
         if (svm->vcpu.arch.interrupt_window_open && svm->vcpu.arch.irq_summary)
                 /*
@@ -1652,9 +2380,9 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
          */
         if (!svm->vcpu.arch.interrupt_window_open &&
             (svm->vcpu.arch.irq_summary || kvm_run->request_interrupt_window))
-                control->intercept |= 1ULL << INTERCEPT_VINTR;
-         else
-                control->intercept &= ~(1ULL << INTERCEPT_VINTR);
+                svm_set_vintr(svm);
+        else
+                svm_clear_vintr(svm);
 }
 
 static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
@@ -1662,22 +2390,6 @@ static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
         return 0;
 }
 
-static void save_db_regs(unsigned long *db_regs)
-{
-        asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
-        asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
-        asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
-        asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
-}
-
-static void load_db_regs(unsigned long *db_regs)
-{
-        asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
-        asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
-        asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
-        asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
-}
-
 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
 {
         force_new_asid(vcpu);
@@ -1736,19 +2448,12 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         gs_selector = kvm_read_gs();
         ldt_selector = kvm_read_ldt();
         svm->host_cr2 = kvm_read_cr2();
-        svm->host_dr6 = read_dr6();
-        svm->host_dr7 = read_dr7();
-        svm->vmcb->save.cr2 = vcpu->arch.cr2;
+        if (!is_nested(svm))
+                svm->vmcb->save.cr2 = vcpu->arch.cr2;
         /* required for live migration with NPT */
         if (npt_enabled)
                 svm->vmcb->save.cr3 = vcpu->arch.cr3;
 
-        if (svm->vmcb->save.dr7 & 0xff) {
-                write_dr7(0);
-                save_db_regs(svm->host_db_regs);
-                load_db_regs(svm->db_regs);
-        }
-
         clgi();
 
         local_irq_enable();
@@ -1824,16 +2529,11 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 #endif
                 );
 
-        if ((svm->vmcb->save.dr7 & 0xff))
-                load_db_regs(svm->host_db_regs);
-
         vcpu->arch.cr2 = svm->vmcb->save.cr2;
         vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
         vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
         vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
 
-        write_dr6(svm->host_dr6);
-        write_dr7(svm->host_dr7);
         kvm_write_cr2(svm->host_cr2);
 
         kvm_load_fs(fs_selector);