diff options
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 3 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/perf_event.h | 15 | ||||
-rw-r--r-- | arch/x86/kernel/reboot.c | 11 |
3 files changed, 25 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index dc1ec0dff939..ea04b342c026 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
@@ -387,7 +387,8 @@ static void init_intel(struct cpuinfo_x86 *c) | |||
387 | set_cpu_cap(c, X86_FEATURE_PEBS); | 387 | set_cpu_cap(c, X86_FEATURE_PEBS); |
388 | } | 388 | } |
389 | 389 | ||
390 | if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush) | 390 | if (c->x86 == 6 && cpu_has_clflush && |
391 | (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47)) | ||
391 | set_cpu_cap(c, X86_FEATURE_CLFLUSH_MONITOR); | 392 | set_cpu_cap(c, X86_FEATURE_CLFLUSH_MONITOR); |
392 | 393 | ||
393 | #ifdef CONFIG_X86_64 | 394 | #ifdef CONFIG_X86_64 |
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h index fd00bb29425d..c1a861829d81 100644 --- a/arch/x86/kernel/cpu/perf_event.h +++ b/arch/x86/kernel/cpu/perf_event.h | |||
@@ -262,11 +262,20 @@ struct cpu_hw_events { | |||
262 | __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \ | 262 | __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \ |
263 | HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_ST_HSW) | 263 | HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_ST_HSW) |
264 | 264 | ||
265 | #define EVENT_CONSTRAINT_END \ | 265 | /* |
266 | EVENT_CONSTRAINT(0, 0, 0) | 266 | * We define the end marker as having a weight of -1 |
267 | * to enable blacklisting of events using a counter bitmask | ||
268 | * of zero and thus a weight of zero. | ||
269 | * The end marker has a weight that cannot possibly be | ||
270 | * obtained from counting the bits in the bitmask. | ||
271 | */ | ||
272 | #define EVENT_CONSTRAINT_END { .weight = -1 } | ||
267 | 273 | ||
274 | /* | ||
275 | * Check for end marker with weight == -1 | ||
276 | */ | ||
268 | #define for_each_event_constraint(e, c) \ | 277 | #define for_each_event_constraint(e, c) \ |
269 | for ((e) = (c); (e)->weight; (e)++) | 278 | for ((e) = (c); (e)->weight != -1; (e)++) |
270 | 279 | ||
271 | /* | 280 | /* |
272 | * Extra registers for specific events. | 281 | * Extra registers for specific events. |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index da3c599584a3..c752cb43e52f 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -558,6 +558,17 @@ void native_machine_shutdown(void) | |||
558 | { | 558 | { |
559 | /* Stop the cpus and apics */ | 559 | /* Stop the cpus and apics */ |
560 | #ifdef CONFIG_X86_IO_APIC | 560 | #ifdef CONFIG_X86_IO_APIC |
561 | /* | ||
562 | * Disabling IO APIC before local APIC is a workaround for | ||
563 | * erratum AVR31 in "Intel Atom Processor C2000 Product Family | ||
564 | * Specification Update". In this situation, interrupts that target | ||
565 | * a Logical Processor whose Local APIC is either in the process of | ||
566 | * being hardware disabled or software disabled are neither delivered | ||
567 | * nor discarded. When this erratum occurs, the processor may hang. | ||
568 | * | ||
569 | * Even without the erratum, it still makes sense to quiet IO APIC | ||
570 | * before disabling Local APIC. | ||
571 | */ | ||
561 | disable_IO_APIC(); | 572 | disable_IO_APIC(); |
562 | #endif | 573 | #endif |
563 | 574 | ||