2 files changed, 42 insertions, 0 deletions

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 3ecece0217ef..3532d3bf8105 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -615,6 +615,25 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
         /* As a rule processors have APIC timer running in deep C states */
         if (c->x86 >= 0xf && !cpu_has_amd_erratum(amd_erratum_400))
                 set_cpu_cap(c, X86_FEATURE_ARAT);
+
+        /*
+         * Disable GART TLB Walk Errors on Fam10h. We do this here
+         * because this is always needed when GART is enabled, even in a
+         * kernel which has no MCE support built in.
+         */
+        if (c->x86 == 0x10) {
+                /*
+                 * BIOS should disable GartTlbWlk Errors themself. If
+                 * it doesn't do it here as suggested by the BKDG.
+                 *
+                 * Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=33012
+                 */
+                u64 mask;
+
+                rdmsrl(MSR_AMD64_MCx_MASK(4), mask);
+                mask |= (1 << 10);
+                wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
+        }
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index c2871d3c71b6..8ed8908cc9f7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -312,6 +312,26 @@ void __cpuinit smp_store_cpu_info(int id)
                 identify_secondary_cpu(c);
 }
 
+static void __cpuinit check_cpu_siblings_on_same_node(int cpu1, int cpu2)
+{
+        int node1 = early_cpu_to_node(cpu1);
+        int node2 = early_cpu_to_node(cpu2);
+
+        /*
+         * Our CPU scheduler assumes all logical cpus in the same physical cpu
+         * share the same node. But, buggy ACPI or NUMA emulation might assign
+         * them to different node. Fix it.
+         */
+        if (node1 != node2) {
+                pr_warning("CPU %d in node %d and CPU %d in node %d are in the same physical CPU. forcing same node %d\n",
+                           cpu1, node1, cpu2, node2, node2);
+
+                numa_remove_cpu(cpu1);
+                numa_set_node(cpu1, node2);
+                numa_add_cpu(cpu1);
+        }
+}
+
 static void __cpuinit link_thread_siblings(int cpu1, int cpu2)
 {
         cpumask_set_cpu(cpu1, cpu_sibling_mask(cpu2));
@@ -320,6 +340,7 @@ static void __cpuinit link_thread_siblings(int cpu1, int cpu2)
         cpumask_set_cpu(cpu2, cpu_core_mask(cpu1));
         cpumask_set_cpu(cpu1, cpu_llc_shared_mask(cpu2));
         cpumask_set_cpu(cpu2, cpu_llc_shared_mask(cpu1));
+        check_cpu_siblings_on_same_node(cpu1, cpu2);
 }
 
 
@@ -361,10 +382,12 @@ void __cpuinit set_cpu_sibling_map(int cpu)
                     per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
                         cpumask_set_cpu(i, cpu_llc_shared_mask(cpu));
                         cpumask_set_cpu(cpu, cpu_llc_shared_mask(i));
+                        check_cpu_siblings_on_same_node(cpu, i);
                 }
                 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
                         cpumask_set_cpu(i, cpu_core_mask(cpu));
                         cpumask_set_cpu(cpu, cpu_core_mask(i));
+                        check_cpu_siblings_on_same_node(cpu, i);
                         /*
                          *  Does this new cpu bringup a new core?
                          */