diff options
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r-- | arch/x86/kernel/cpu/common.c | 5 | ||||
-rw-r--r-- | arch/x86/kernel/entry_32.S | 19 | ||||
-rw-r--r-- | arch/x86/kernel/i387.c | 107 | ||||
-rw-r--r-- | arch/x86/kernel/irqinit.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/process.c | 20 | ||||
-rw-r--r-- | arch/x86/kernel/process_32.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/process_64.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/traps.c | 173 | ||||
-rw-r--r-- | arch/x86/kernel/xsave.c | 8 |
9 files changed, 136 insertions, 202 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 4868e4a951ee..c1c00d0b1692 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
@@ -1243,10 +1243,7 @@ void __cpuinit cpu_init(void) | |||
1243 | /* | 1243 | /* |
1244 | * Force FPU initialization: | 1244 | * Force FPU initialization: |
1245 | */ | 1245 | */ |
1246 | if (cpu_has_xsave) | 1246 | current_thread_info()->status = 0; |
1247 | current_thread_info()->status = TS_XSAVE; | ||
1248 | else | ||
1249 | current_thread_info()->status = 0; | ||
1250 | clear_used_math(); | 1247 | clear_used_math(); |
1251 | mxcsr_feature_mask_init(); | 1248 | mxcsr_feature_mask_init(); |
1252 | 1249 | ||
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 44a8e0dc6737..cd49141cf153 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S | |||
@@ -53,6 +53,7 @@ | |||
53 | #include <asm/processor-flags.h> | 53 | #include <asm/processor-flags.h> |
54 | #include <asm/ftrace.h> | 54 | #include <asm/ftrace.h> |
55 | #include <asm/irq_vectors.h> | 55 | #include <asm/irq_vectors.h> |
56 | #include <asm/cpufeature.h> | ||
56 | 57 | ||
57 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ | 58 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
58 | #include <linux/elf-em.h> | 59 | #include <linux/elf-em.h> |
@@ -905,7 +906,25 @@ ENTRY(simd_coprocessor_error) | |||
905 | RING0_INT_FRAME | 906 | RING0_INT_FRAME |
906 | pushl $0 | 907 | pushl $0 |
907 | CFI_ADJUST_CFA_OFFSET 4 | 908 | CFI_ADJUST_CFA_OFFSET 4 |
909 | #ifdef CONFIG_X86_INVD_BUG | ||
910 | /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */ | ||
911 | 661: pushl $do_general_protection | ||
912 | 662: | ||
913 | .section .altinstructions,"a" | ||
914 | .balign 4 | ||
915 | .long 661b | ||
916 | .long 663f | ||
917 | .byte X86_FEATURE_XMM | ||
918 | .byte 662b-661b | ||
919 | .byte 664f-663f | ||
920 | .previous | ||
921 | .section .altinstr_replacement,"ax" | ||
922 | 663: pushl $do_simd_coprocessor_error | ||
923 | 664: | ||
924 | .previous | ||
925 | #else | ||
908 | pushl $do_simd_coprocessor_error | 926 | pushl $do_simd_coprocessor_error |
927 | #endif | ||
909 | CFI_ADJUST_CFA_OFFSET 4 | 928 | CFI_ADJUST_CFA_OFFSET 4 |
910 | jmp error_code | 929 | jmp error_code |
911 | CFI_ENDPROC | 930 | CFI_ENDPROC |
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c index 54c31c285488..86cef6b32253 100644 --- a/arch/x86/kernel/i387.c +++ b/arch/x86/kernel/i387.c | |||
@@ -102,65 +102,62 @@ void __cpuinit fpu_init(void) | |||
102 | 102 | ||
103 | mxcsr_feature_mask_init(); | 103 | mxcsr_feature_mask_init(); |
104 | /* clean state in init */ | 104 | /* clean state in init */ |
105 | if (cpu_has_xsave) | 105 | current_thread_info()->status = 0; |
106 | current_thread_info()->status = TS_XSAVE; | ||
107 | else | ||
108 | current_thread_info()->status = 0; | ||
109 | clear_used_math(); | 106 | clear_used_math(); |
110 | } | 107 | } |
111 | #endif /* CONFIG_X86_64 */ | 108 | #endif /* CONFIG_X86_64 */ |
112 | 109 | ||
113 | /* | 110 | static void fpu_finit(struct fpu *fpu) |
114 | * The _current_ task is using the FPU for the first time | ||
115 | * so initialize it and set the mxcsr to its default | ||
116 | * value at reset if we support XMM instructions and then | ||
117 | * remeber the current task has used the FPU. | ||
118 | */ | ||
119 | int init_fpu(struct task_struct *tsk) | ||
120 | { | 111 | { |
121 | if (tsk_used_math(tsk)) { | ||
122 | if (HAVE_HWFP && tsk == current) | ||
123 | unlazy_fpu(tsk); | ||
124 | return 0; | ||
125 | } | ||
126 | |||
127 | /* | ||
128 | * Memory allocation at the first usage of the FPU and other state. | ||
129 | */ | ||
130 | if (!tsk->thread.xstate) { | ||
131 | tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep, | ||
132 | GFP_KERNEL); | ||
133 | if (!tsk->thread.xstate) | ||
134 | return -ENOMEM; | ||
135 | } | ||
136 | |||
137 | #ifdef CONFIG_X86_32 | 112 | #ifdef CONFIG_X86_32 |
138 | if (!HAVE_HWFP) { | 113 | if (!HAVE_HWFP) { |
139 | memset(tsk->thread.xstate, 0, xstate_size); | 114 | finit_soft_fpu(&fpu->state->soft); |
140 | finit_task(tsk); | 115 | return; |
141 | set_stopped_child_used_math(tsk); | ||
142 | return 0; | ||
143 | } | 116 | } |
144 | #endif | 117 | #endif |
145 | 118 | ||
146 | if (cpu_has_fxsr) { | 119 | if (cpu_has_fxsr) { |
147 | struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; | 120 | struct i387_fxsave_struct *fx = &fpu->state->fxsave; |
148 | 121 | ||
149 | memset(fx, 0, xstate_size); | 122 | memset(fx, 0, xstate_size); |
150 | fx->cwd = 0x37f; | 123 | fx->cwd = 0x37f; |
151 | if (cpu_has_xmm) | 124 | if (cpu_has_xmm) |
152 | fx->mxcsr = MXCSR_DEFAULT; | 125 | fx->mxcsr = MXCSR_DEFAULT; |
153 | } else { | 126 | } else { |
154 | struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; | 127 | struct i387_fsave_struct *fp = &fpu->state->fsave; |
155 | memset(fp, 0, xstate_size); | 128 | memset(fp, 0, xstate_size); |
156 | fp->cwd = 0xffff037fu; | 129 | fp->cwd = 0xffff037fu; |
157 | fp->swd = 0xffff0000u; | 130 | fp->swd = 0xffff0000u; |
158 | fp->twd = 0xffffffffu; | 131 | fp->twd = 0xffffffffu; |
159 | fp->fos = 0xffff0000u; | 132 | fp->fos = 0xffff0000u; |
160 | } | 133 | } |
134 | } | ||
135 | |||
136 | /* | ||
137 | * The _current_ task is using the FPU for the first time | ||
138 | * so initialize it and set the mxcsr to its default | ||
139 | * value at reset if we support XMM instructions and then | ||
140 | * remeber the current task has used the FPU. | ||
141 | */ | ||
142 | int init_fpu(struct task_struct *tsk) | ||
143 | { | ||
144 | int ret; | ||
145 | |||
146 | if (tsk_used_math(tsk)) { | ||
147 | if (HAVE_HWFP && tsk == current) | ||
148 | unlazy_fpu(tsk); | ||
149 | return 0; | ||
150 | } | ||
151 | |||
161 | /* | 152 | /* |
162 | * Only the device not available exception or ptrace can call init_fpu. | 153 | * Memory allocation at the first usage of the FPU and other state. |
163 | */ | 154 | */ |
155 | ret = fpu_alloc(&tsk->thread.fpu); | ||
156 | if (ret) | ||
157 | return ret; | ||
158 | |||
159 | fpu_finit(&tsk->thread.fpu); | ||
160 | |||
164 | set_stopped_child_used_math(tsk); | 161 | set_stopped_child_used_math(tsk); |
165 | return 0; | 162 | return 0; |
166 | } | 163 | } |
@@ -194,7 +191,7 @@ int xfpregs_get(struct task_struct *target, const struct user_regset *regset, | |||
194 | return ret; | 191 | return ret; |
195 | 192 | ||
196 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | 193 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
197 | &target->thread.xstate->fxsave, 0, -1); | 194 | &target->thread.fpu.state->fxsave, 0, -1); |
198 | } | 195 | } |
199 | 196 | ||
200 | int xfpregs_set(struct task_struct *target, const struct user_regset *regset, | 197 | int xfpregs_set(struct task_struct *target, const struct user_regset *regset, |
@@ -211,19 +208,19 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset, | |||
211 | return ret; | 208 | return ret; |
212 | 209 | ||
213 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | 210 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
214 | &target->thread.xstate->fxsave, 0, -1); | 211 | &target->thread.fpu.state->fxsave, 0, -1); |
215 | 212 | ||
216 | /* | 213 | /* |
217 | * mxcsr reserved bits must be masked to zero for security reasons. | 214 | * mxcsr reserved bits must be masked to zero for security reasons. |
218 | */ | 215 | */ |
219 | target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; | 216 | target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask; |
220 | 217 | ||
221 | /* | 218 | /* |
222 | * update the header bits in the xsave header, indicating the | 219 | * update the header bits in the xsave header, indicating the |
223 | * presence of FP and SSE state. | 220 | * presence of FP and SSE state. |
224 | */ | 221 | */ |
225 | if (cpu_has_xsave) | 222 | if (cpu_has_xsave) |
226 | target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE; | 223 | target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE; |
227 | 224 | ||
228 | return ret; | 225 | return ret; |
229 | } | 226 | } |
@@ -246,14 +243,14 @@ int xstateregs_get(struct task_struct *target, const struct user_regset *regset, | |||
246 | * memory layout in the thread struct, so that we can copy the entire | 243 | * memory layout in the thread struct, so that we can copy the entire |
247 | * xstateregs to the user using one user_regset_copyout(). | 244 | * xstateregs to the user using one user_regset_copyout(). |
248 | */ | 245 | */ |
249 | memcpy(&target->thread.xstate->fxsave.sw_reserved, | 246 | memcpy(&target->thread.fpu.state->fxsave.sw_reserved, |
250 | xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes)); | 247 | xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes)); |
251 | 248 | ||
252 | /* | 249 | /* |
253 | * Copy the xstate memory layout. | 250 | * Copy the xstate memory layout. |
254 | */ | 251 | */ |
255 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, | 252 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
256 | &target->thread.xstate->xsave, 0, -1); | 253 | &target->thread.fpu.state->xsave, 0, -1); |
257 | return ret; | 254 | return ret; |
258 | } | 255 | } |
259 | 256 | ||
@@ -272,14 +269,14 @@ int xstateregs_set(struct task_struct *target, const struct user_regset *regset, | |||
272 | return ret; | 269 | return ret; |
273 | 270 | ||
274 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | 271 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
275 | &target->thread.xstate->xsave, 0, -1); | 272 | &target->thread.fpu.state->xsave, 0, -1); |
276 | 273 | ||
277 | /* | 274 | /* |
278 | * mxcsr reserved bits must be masked to zero for security reasons. | 275 | * mxcsr reserved bits must be masked to zero for security reasons. |
279 | */ | 276 | */ |
280 | target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; | 277 | target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask; |
281 | 278 | ||
282 | xsave_hdr = &target->thread.xstate->xsave.xsave_hdr; | 279 | xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr; |
283 | 280 | ||
284 | xsave_hdr->xstate_bv &= pcntxt_mask; | 281 | xsave_hdr->xstate_bv &= pcntxt_mask; |
285 | /* | 282 | /* |
@@ -365,7 +362,7 @@ static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave) | |||
365 | static void | 362 | static void |
366 | convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk) | 363 | convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk) |
367 | { | 364 | { |
368 | struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; | 365 | struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave; |
369 | struct _fpreg *to = (struct _fpreg *) &env->st_space[0]; | 366 | struct _fpreg *to = (struct _fpreg *) &env->st_space[0]; |
370 | struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0]; | 367 | struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0]; |
371 | int i; | 368 | int i; |
@@ -405,7 +402,7 @@ static void convert_to_fxsr(struct task_struct *tsk, | |||
405 | const struct user_i387_ia32_struct *env) | 402 | const struct user_i387_ia32_struct *env) |
406 | 403 | ||
407 | { | 404 | { |
408 | struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; | 405 | struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave; |
409 | struct _fpreg *from = (struct _fpreg *) &env->st_space[0]; | 406 | struct _fpreg *from = (struct _fpreg *) &env->st_space[0]; |
410 | struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0]; | 407 | struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0]; |
411 | int i; | 408 | int i; |
@@ -445,7 +442,7 @@ int fpregs_get(struct task_struct *target, const struct user_regset *regset, | |||
445 | 442 | ||
446 | if (!cpu_has_fxsr) { | 443 | if (!cpu_has_fxsr) { |
447 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | 444 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
448 | &target->thread.xstate->fsave, 0, | 445 | &target->thread.fpu.state->fsave, 0, |
449 | -1); | 446 | -1); |
450 | } | 447 | } |
451 | 448 | ||
@@ -475,7 +472,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset, | |||
475 | 472 | ||
476 | if (!cpu_has_fxsr) { | 473 | if (!cpu_has_fxsr) { |
477 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | 474 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
478 | &target->thread.xstate->fsave, 0, -1); | 475 | &target->thread.fpu.state->fsave, 0, -1); |
479 | } | 476 | } |
480 | 477 | ||
481 | if (pos > 0 || count < sizeof(env)) | 478 | if (pos > 0 || count < sizeof(env)) |
@@ -490,7 +487,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset, | |||
490 | * presence of FP. | 487 | * presence of FP. |
491 | */ | 488 | */ |
492 | if (cpu_has_xsave) | 489 | if (cpu_has_xsave) |
493 | target->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FP; | 490 | target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP; |
494 | return ret; | 491 | return ret; |
495 | } | 492 | } |
496 | 493 | ||
@@ -501,7 +498,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset, | |||
501 | static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf) | 498 | static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf) |
502 | { | 499 | { |
503 | struct task_struct *tsk = current; | 500 | struct task_struct *tsk = current; |
504 | struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; | 501 | struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave; |
505 | 502 | ||
506 | fp->status = fp->swd; | 503 | fp->status = fp->swd; |
507 | if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct))) | 504 | if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct))) |
@@ -512,7 +509,7 @@ static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf) | |||
512 | static int save_i387_fxsave(struct _fpstate_ia32 __user *buf) | 509 | static int save_i387_fxsave(struct _fpstate_ia32 __user *buf) |
513 | { | 510 | { |
514 | struct task_struct *tsk = current; | 511 | struct task_struct *tsk = current; |
515 | struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; | 512 | struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave; |
516 | struct user_i387_ia32_struct env; | 513 | struct user_i387_ia32_struct env; |
517 | int err = 0; | 514 | int err = 0; |
518 | 515 | ||
@@ -547,7 +544,7 @@ static int save_i387_xsave(void __user *buf) | |||
547 | * header as well as change any contents in the memory layout. | 544 | * header as well as change any contents in the memory layout. |
548 | * xrestore as part of sigreturn will capture all the changes. | 545 | * xrestore as part of sigreturn will capture all the changes. |
549 | */ | 546 | */ |
550 | tsk->thread.xstate->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE; | 547 | tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE; |
551 | 548 | ||
552 | if (save_i387_fxsave(fx) < 0) | 549 | if (save_i387_fxsave(fx) < 0) |
553 | return -1; | 550 | return -1; |
@@ -599,7 +596,7 @@ static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf) | |||
599 | { | 596 | { |
600 | struct task_struct *tsk = current; | 597 | struct task_struct *tsk = current; |
601 | 598 | ||
602 | return __copy_from_user(&tsk->thread.xstate->fsave, buf, | 599 | return __copy_from_user(&tsk->thread.fpu.state->fsave, buf, |
603 | sizeof(struct i387_fsave_struct)); | 600 | sizeof(struct i387_fsave_struct)); |
604 | } | 601 | } |
605 | 602 | ||
@@ -610,10 +607,10 @@ static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf, | |||
610 | struct user_i387_ia32_struct env; | 607 | struct user_i387_ia32_struct env; |
611 | int err; | 608 | int err; |
612 | 609 | ||
613 | err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], | 610 | err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0], |
614 | size); | 611 | size); |
615 | /* mxcsr reserved bits must be masked to zero for security reasons */ | 612 | /* mxcsr reserved bits must be masked to zero for security reasons */ |
616 | tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; | 613 | tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask; |
617 | if (err || __copy_from_user(&env, buf, sizeof(env))) | 614 | if (err || __copy_from_user(&env, buf, sizeof(env))) |
618 | return 1; | 615 | return 1; |
619 | convert_to_fxsr(tsk, &env); | 616 | convert_to_fxsr(tsk, &env); |
@@ -629,7 +626,7 @@ static int restore_i387_xsave(void __user *buf) | |||
629 | struct i387_fxsave_struct __user *fx = | 626 | struct i387_fxsave_struct __user *fx = |
630 | (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0]; | 627 | (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0]; |
631 | struct xsave_hdr_struct *xsave_hdr = | 628 | struct xsave_hdr_struct *xsave_hdr = |
632 | ¤t->thread.xstate->xsave.xsave_hdr; | 629 | ¤t->thread.fpu.state->xsave.xsave_hdr; |
633 | u64 mask; | 630 | u64 mask; |
634 | int err; | 631 | int err; |
635 | 632 | ||
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c index 0ed2d300cd46..990ae7cfc578 100644 --- a/arch/x86/kernel/irqinit.c +++ b/arch/x86/kernel/irqinit.c | |||
@@ -60,7 +60,7 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id) | |||
60 | outb(0, 0xF0); | 60 | outb(0, 0xF0); |
61 | if (ignore_fpu_irq || !boot_cpu_data.hard_math) | 61 | if (ignore_fpu_irq || !boot_cpu_data.hard_math) |
62 | return IRQ_NONE; | 62 | return IRQ_NONE; |
63 | math_error((void __user *)get_irq_regs()->ip); | 63 | math_error(get_irq_regs(), 0, 16); |
64 | return IRQ_HANDLED; | 64 | return IRQ_HANDLED; |
65 | } | 65 | } |
66 | 66 | ||
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index cc6877535ef4..e7e35219b32f 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -31,24 +31,22 @@ struct kmem_cache *task_xstate_cachep; | |||
31 | 31 | ||
32 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) | 32 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) |
33 | { | 33 | { |
34 | int ret; | ||
35 | |||
34 | *dst = *src; | 36 | *dst = *src; |
35 | if (src->thread.xstate) { | 37 | if (fpu_allocated(&src->thread.fpu)) { |
36 | dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep, | 38 | memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu)); |
37 | GFP_KERNEL); | 39 | ret = fpu_alloc(&dst->thread.fpu); |
38 | if (!dst->thread.xstate) | 40 | if (ret) |
39 | return -ENOMEM; | 41 | return ret; |
40 | WARN_ON((unsigned long)dst->thread.xstate & 15); | 42 | fpu_copy(&dst->thread.fpu, &src->thread.fpu); |
41 | memcpy(dst->thread.xstate, src->thread.xstate, xstate_size); | ||
42 | } | 43 | } |
43 | return 0; | 44 | return 0; |
44 | } | 45 | } |
45 | 46 | ||
46 | void free_thread_xstate(struct task_struct *tsk) | 47 | void free_thread_xstate(struct task_struct *tsk) |
47 | { | 48 | { |
48 | if (tsk->thread.xstate) { | 49 | fpu_free(&tsk->thread.fpu); |
49 | kmem_cache_free(task_xstate_cachep, tsk->thread.xstate); | ||
50 | tsk->thread.xstate = NULL; | ||
51 | } | ||
52 | } | 50 | } |
53 | 51 | ||
54 | void free_thread_info(struct thread_info *ti) | 52 | void free_thread_info(struct thread_info *ti) |
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index 75090c589b7a..8d128783af47 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c | |||
@@ -309,7 +309,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |||
309 | 309 | ||
310 | /* we're going to use this soon, after a few expensive things */ | 310 | /* we're going to use this soon, after a few expensive things */ |
311 | if (preload_fpu) | 311 | if (preload_fpu) |
312 | prefetch(next->xstate); | 312 | prefetch(next->fpu.state); |
313 | 313 | ||
314 | /* | 314 | /* |
315 | * Reload esp0. | 315 | * Reload esp0. |
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 50cc84ac0a0d..3c2422a99f1f 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c | |||
@@ -388,7 +388,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) | |||
388 | 388 | ||
389 | /* we're going to use this soon, after a few expensive things */ | 389 | /* we're going to use this soon, after a few expensive things */ |
390 | if (preload_fpu) | 390 | if (preload_fpu) |
391 | prefetch(next->xstate); | 391 | prefetch(next->fpu.state); |
392 | 392 | ||
393 | /* | 393 | /* |
394 | * Reload esp0, LDT and the page table pointer: | 394 | * Reload esp0, LDT and the page table pointer: |
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 36f1bd9f8e76..02cfb9b8f5b1 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c | |||
@@ -108,15 +108,6 @@ static inline void preempt_conditional_cli(struct pt_regs *regs) | |||
108 | dec_preempt_count(); | 108 | dec_preempt_count(); |
109 | } | 109 | } |
110 | 110 | ||
111 | #ifdef CONFIG_X86_32 | ||
112 | static inline void | ||
113 | die_if_kernel(const char *str, struct pt_regs *regs, long err) | ||
114 | { | ||
115 | if (!user_mode_vm(regs)) | ||
116 | die(str, regs, err); | ||
117 | } | ||
118 | #endif | ||
119 | |||
120 | static void __kprobes | 111 | static void __kprobes |
121 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, | 112 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, |
122 | long error_code, siginfo_t *info) | 113 | long error_code, siginfo_t *info) |
@@ -585,55 +576,67 @@ dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) | |||
585 | return; | 576 | return; |
586 | } | 577 | } |
587 | 578 | ||
588 | #ifdef CONFIG_X86_64 | ||
589 | static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr) | ||
590 | { | ||
591 | if (fixup_exception(regs)) | ||
592 | return 1; | ||
593 | |||
594 | notify_die(DIE_GPF, str, regs, 0, trapnr, SIGFPE); | ||
595 | /* Illegal floating point operation in the kernel */ | ||
596 | current->thread.trap_no = trapnr; | ||
597 | die(str, regs, 0); | ||
598 | return 0; | ||
599 | } | ||
600 | #endif | ||
601 | |||
602 | /* | 579 | /* |
603 | * Note that we play around with the 'TS' bit in an attempt to get | 580 | * Note that we play around with the 'TS' bit in an attempt to get |
604 | * the correct behaviour even in the presence of the asynchronous | 581 | * the correct behaviour even in the presence of the asynchronous |
605 | * IRQ13 behaviour | 582 | * IRQ13 behaviour |
606 | */ | 583 | */ |
607 | void math_error(void __user *ip) | 584 | void math_error(struct pt_regs *regs, int error_code, int trapnr) |
608 | { | 585 | { |
609 | struct task_struct *task; | 586 | struct task_struct *task = current; |
610 | siginfo_t info; | 587 | siginfo_t info; |
611 | unsigned short cwd, swd, err; | 588 | unsigned short err; |
589 | char *str = (trapnr == 16) ? "fpu exception" : "simd exception"; | ||
590 | |||
591 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | ||
592 | return; | ||
593 | conditional_sti(regs); | ||
594 | |||
595 | if (!user_mode_vm(regs)) | ||
596 | { | ||
597 | if (!fixup_exception(regs)) { | ||
598 | task->thread.error_code = error_code; | ||
599 | task->thread.trap_no = trapnr; | ||
600 | die(str, regs, error_code); | ||
601 | } | ||
602 | return; | ||
603 | } | ||
612 | 604 | ||
613 | /* | 605 | /* |
614 | * Save the info for the exception handler and clear the error. | 606 | * Save the info for the exception handler and clear the error. |
615 | */ | 607 | */ |
616 | task = current; | ||
617 | save_init_fpu(task); | 608 | save_init_fpu(task); |
618 | task->thread.trap_no = 16; | 609 | task->thread.trap_no = trapnr; |
619 | task->thread.error_code = 0; | 610 | task->thread.error_code = error_code; |
620 | info.si_signo = SIGFPE; | 611 | info.si_signo = SIGFPE; |
621 | info.si_errno = 0; | 612 | info.si_errno = 0; |
622 | info.si_addr = ip; | 613 | info.si_addr = (void __user *)regs->ip; |
623 | /* | 614 | if (trapnr == 16) { |
624 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | 615 | unsigned short cwd, swd; |
625 | * status. 0x3f is the exception bits in these regs, 0x200 is the | 616 | /* |
626 | * C1 reg you need in case of a stack fault, 0x040 is the stack | 617 | * (~cwd & swd) will mask out exceptions that are not set to unmasked |
627 | * fault bit. We should only be taking one exception at a time, | 618 | * status. 0x3f is the exception bits in these regs, 0x200 is the |
628 | * so if this combination doesn't produce any single exception, | 619 | * C1 reg you need in case of a stack fault, 0x040 is the stack |
629 | * then we have a bad program that isn't synchronizing its FPU usage | 620 | * fault bit. We should only be taking one exception at a time, |
630 | * and it will suffer the consequences since we won't be able to | 621 | * so if this combination doesn't produce any single exception, |
631 | * fully reproduce the context of the exception | 622 | * then we have a bad program that isn't synchronizing its FPU usage |
632 | */ | 623 | * and it will suffer the consequences since we won't be able to |
633 | cwd = get_fpu_cwd(task); | 624 | * fully reproduce the context of the exception |
634 | swd = get_fpu_swd(task); | 625 | */ |
626 | cwd = get_fpu_cwd(task); | ||
627 | swd = get_fpu_swd(task); | ||
635 | 628 | ||
636 | err = swd & ~cwd; | 629 | err = swd & ~cwd; |
630 | } else { | ||
631 | /* | ||
632 | * The SIMD FPU exceptions are handled a little differently, as there | ||
633 | * is only a single status/control register. Thus, to determine which | ||
634 | * unmasked exception was caught we must mask the exception mask bits | ||
635 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | ||
636 | */ | ||
637 | unsigned short mxcsr = get_fpu_mxcsr(task); | ||
638 | err = ~(mxcsr >> 7) & mxcsr; | ||
639 | } | ||
637 | 640 | ||
638 | if (err & 0x001) { /* Invalid op */ | 641 | if (err & 0x001) { /* Invalid op */ |
639 | /* | 642 | /* |
@@ -662,97 +665,17 @@ void math_error(void __user *ip) | |||
662 | 665 | ||
663 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) | 666 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
664 | { | 667 | { |
665 | conditional_sti(regs); | ||
666 | |||
667 | #ifdef CONFIG_X86_32 | 668 | #ifdef CONFIG_X86_32 |
668 | ignore_fpu_irq = 1; | 669 | ignore_fpu_irq = 1; |
669 | #else | ||
670 | if (!user_mode(regs) && | ||
671 | kernel_math_error(regs, "kernel x87 math error", 16)) | ||
672 | return; | ||
673 | #endif | 670 | #endif |
674 | 671 | ||
675 | math_error((void __user *)regs->ip); | 672 | math_error(regs, error_code, 16); |
676 | } | ||
677 | |||
678 | static void simd_math_error(void __user *ip) | ||
679 | { | ||
680 | struct task_struct *task; | ||
681 | siginfo_t info; | ||
682 | unsigned short mxcsr; | ||
683 | |||
684 | /* | ||
685 | * Save the info for the exception handler and clear the error. | ||
686 | */ | ||
687 | task = current; | ||
688 | save_init_fpu(task); | ||
689 | task->thread.trap_no = 19; | ||
690 | task->thread.error_code = 0; | ||
691 | info.si_signo = SIGFPE; | ||
692 | info.si_errno = 0; | ||
693 | info.si_code = __SI_FAULT; | ||
694 | info.si_addr = ip; | ||
695 | /* | ||
696 | * The SIMD FPU exceptions are handled a little differently, as there | ||
697 | * is only a single status/control register. Thus, to determine which | ||
698 | * unmasked exception was caught we must mask the exception mask bits | ||
699 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | ||
700 | */ | ||
701 | mxcsr = get_fpu_mxcsr(task); | ||
702 | switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) { | ||
703 | case 0x000: | ||
704 | default: | ||
705 | break; | ||
706 | case 0x001: /* Invalid Op */ | ||
707 | info.si_code = FPE_FLTINV; | ||
708 | break; | ||
709 | case 0x002: /* Denormalize */ | ||
710 | case 0x010: /* Underflow */ | ||
711 | info.si_code = FPE_FLTUND; | ||
712 | break; | ||
713 | case 0x004: /* Zero Divide */ | ||
714 | info.si_code = FPE_FLTDIV; | ||
715 | break; | ||
716 | case 0x008: /* Overflow */ | ||
717 | info.si_code = FPE_FLTOVF; | ||
718 | break; | ||
719 | case 0x020: /* Precision */ | ||
720 | info.si_code = FPE_FLTRES; | ||
721 | break; | ||
722 | } | ||
723 | force_sig_info(SIGFPE, &info, task); | ||
724 | } | 673 | } |
725 | 674 | ||
726 | dotraplinkage void | 675 | dotraplinkage void |
727 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | 676 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) |
728 | { | 677 | { |
729 | conditional_sti(regs); | 678 | math_error(regs, error_code, 19); |
730 | |||
731 | #ifdef CONFIG_X86_32 | ||
732 | if (cpu_has_xmm) { | ||
733 | /* Handle SIMD FPU exceptions on PIII+ processors. */ | ||
734 | ignore_fpu_irq = 1; | ||
735 | simd_math_error((void __user *)regs->ip); | ||
736 | return; | ||
737 | } | ||
738 | /* | ||
739 | * Handle strange cache flush from user space exception | ||
740 | * in all other cases. This is undocumented behaviour. | ||
741 | */ | ||
742 | if (regs->flags & X86_VM_MASK) { | ||
743 | handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code); | ||
744 | return; | ||
745 | } | ||
746 | current->thread.trap_no = 19; | ||
747 | current->thread.error_code = error_code; | ||
748 | die_if_kernel("cache flush denied", regs, error_code); | ||
749 | force_sig(SIGSEGV, current); | ||
750 | #else | ||
751 | if (!user_mode(regs) && | ||
752 | kernel_math_error(regs, "kernel simd math error", 19)) | ||
753 | return; | ||
754 | simd_math_error((void __user *)regs->ip); | ||
755 | #endif | ||
756 | } | 679 | } |
757 | 680 | ||
758 | dotraplinkage void | 681 | dotraplinkage void |
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c index 782c3a362ec6..37e68fc5e24a 100644 --- a/arch/x86/kernel/xsave.c +++ b/arch/x86/kernel/xsave.c | |||
@@ -99,7 +99,7 @@ int save_i387_xstate(void __user *buf) | |||
99 | if (err) | 99 | if (err) |
100 | return err; | 100 | return err; |
101 | 101 | ||
102 | if (task_thread_info(tsk)->status & TS_XSAVE) | 102 | if (use_xsave()) |
103 | err = xsave_user(buf); | 103 | err = xsave_user(buf); |
104 | else | 104 | else |
105 | err = fxsave_user(buf); | 105 | err = fxsave_user(buf); |
@@ -109,14 +109,14 @@ int save_i387_xstate(void __user *buf) | |||
109 | task_thread_info(tsk)->status &= ~TS_USEDFPU; | 109 | task_thread_info(tsk)->status &= ~TS_USEDFPU; |
110 | stts(); | 110 | stts(); |
111 | } else { | 111 | } else { |
112 | if (__copy_to_user(buf, &tsk->thread.xstate->fxsave, | 112 | if (__copy_to_user(buf, &tsk->thread.fpu.state->fxsave, |
113 | xstate_size)) | 113 | xstate_size)) |
114 | return -1; | 114 | return -1; |
115 | } | 115 | } |
116 | 116 | ||
117 | clear_used_math(); /* trigger finit */ | 117 | clear_used_math(); /* trigger finit */ |
118 | 118 | ||
119 | if (task_thread_info(tsk)->status & TS_XSAVE) { | 119 | if (use_xsave()) { |
120 | struct _fpstate __user *fx = buf; | 120 | struct _fpstate __user *fx = buf; |
121 | struct _xstate __user *x = buf; | 121 | struct _xstate __user *x = buf; |
122 | u64 xstate_bv; | 122 | u64 xstate_bv; |
@@ -225,7 +225,7 @@ int restore_i387_xstate(void __user *buf) | |||
225 | clts(); | 225 | clts(); |
226 | task_thread_info(current)->status |= TS_USEDFPU; | 226 | task_thread_info(current)->status |= TS_USEDFPU; |
227 | } | 227 | } |
228 | if (task_thread_info(tsk)->status & TS_XSAVE) | 228 | if (use_xsave()) |
229 | err = restore_user_xstate(buf); | 229 | err = restore_user_xstate(buf); |
230 | else | 230 | else |
231 | err = fxrstor_checking((__force struct i387_fxsave_struct *) | 231 | err = fxrstor_checking((__force struct i387_fxsave_struct *) |