3 files changed, 29 insertions, 5 deletions

diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index bd72d94e713e..11b03d3c6fda 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -10,6 +10,7 @@
 #include <asm/pgtable.h>
 #include <asm/mce.h>
 #include <asm/nmi.h>
+#include <asm/vsyscall.h>
 
 #define MAX_PATCH_LEN (255-1)
 
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 395928de28ea..09b82093bc75 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -964,8 +964,34 @@ void __init setup_boot_APIC_clock (void)
         setup_APIC_timer();
 }
 
+/*
+ * AMD C1E enabled CPUs have a real nasty problem: Some BIOSes set the
+ * C1E flag only in the secondary CPU, so when we detect the wreckage
+ * we already have enabled the boot CPU local apic timer. Check, if
+ * disable_apic_timer is set and the DUMMY flag is cleared. If yes,
+ * set the DUMMY flag again and force the broadcast mode in the
+ * clockevents layer.
+ */
+void __cpuinit check_boot_apic_timer_broadcast(void)
+{
+        struct clock_event_device *levt = &per_cpu(lapic_events, boot_cpu_id);
+
+        if (!disable_apic_timer ||
+            (lapic_clockevent.features & CLOCK_EVT_FEAT_DUMMY))
+                return;
+
+        printk(KERN_INFO "AMD C1E detected late. Force timer broadcast.\n");
+        lapic_clockevent.features |= CLOCK_EVT_FEAT_DUMMY;
+        levt->features |= CLOCK_EVT_FEAT_DUMMY;
+
+        local_irq_enable();
+        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, &boot_cpu_id);
+        local_irq_disable();
+}
+
 void __cpuinit setup_secondary_APIC_clock(void)
 {
+        check_boot_apic_timer_broadcast();
         setup_APIC_timer();
 }
 
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c
index 57ccf7cb6b91..720a7d1f8862 100644
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -335,11 +335,6 @@ void __cpuinit start_secondary(void)
          */
         check_tsc_sync_target();
 
-        Dprintk("cpu %d: setting up apic clock\n", smp_processor_id());         
-        setup_secondary_APIC_clock();
-
-        Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());
-
         if (nmi_watchdog == NMI_IO_APIC) {
                 disable_8259A_irq(0);
                 enable_NMI_through_LVT0(NULL);
@@ -374,6 +369,8 @@ void __cpuinit start_secondary(void)
 
         unlock_ipi_call_lock();
 
+        setup_secondary_APIC_clock();
+
         cpu_idle();
 }