diff options
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r-- | arch/x86/kernel/alternative.c | 4 | ||||
-rw-r--r-- | arch/x86/kernel/asm-offsets_32.c | 14 | ||||
-rw-r--r-- | arch/x86/kernel/entry_32.S | 2 | ||||
-rw-r--r-- | arch/x86/kernel/paravirt_32.c | 224 | ||||
-rw-r--r-- | arch/x86/kernel/vmi_32.c | 201 |
5 files changed, 267 insertions, 178 deletions
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c index 11b03d3c6fda..42421437ded3 100644 --- a/arch/x86/kernel/alternative.c +++ b/arch/x86/kernel/alternative.c | |||
@@ -369,8 +369,8 @@ void apply_paravirt(struct paravirt_patch_site *start, | |||
369 | BUG_ON(p->len > MAX_PATCH_LEN); | 369 | BUG_ON(p->len > MAX_PATCH_LEN); |
370 | /* prep the buffer with the original instructions */ | 370 | /* prep the buffer with the original instructions */ |
371 | memcpy(insnbuf, p->instr, p->len); | 371 | memcpy(insnbuf, p->instr, p->len); |
372 | used = paravirt_ops.patch(p->instrtype, p->clobbers, insnbuf, | 372 | used = pv_init_ops.patch(p->instrtype, p->clobbers, insnbuf, |
373 | (unsigned long)p->instr, p->len); | 373 | (unsigned long)p->instr, p->len); |
374 | 374 | ||
375 | BUG_ON(used > p->len); | 375 | BUG_ON(used > p->len); |
376 | 376 | ||
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c index 8029742c0fc1..f1b7cdda82b3 100644 --- a/arch/x86/kernel/asm-offsets_32.c +++ b/arch/x86/kernel/asm-offsets_32.c | |||
@@ -116,12 +116,14 @@ void foo(void) | |||
116 | 116 | ||
117 | #ifdef CONFIG_PARAVIRT | 117 | #ifdef CONFIG_PARAVIRT |
118 | BLANK(); | 118 | BLANK(); |
119 | OFFSET(PARAVIRT_enabled, paravirt_ops, paravirt_enabled); | 119 | OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled); |
120 | OFFSET(PARAVIRT_irq_disable, paravirt_ops, irq_disable); | 120 | OFFSET(PARAVIRT_PATCH_pv_cpu_ops, paravirt_patch_template, pv_cpu_ops); |
121 | OFFSET(PARAVIRT_irq_enable, paravirt_ops, irq_enable); | 121 | OFFSET(PARAVIRT_PATCH_pv_irq_ops, paravirt_patch_template, pv_irq_ops); |
122 | OFFSET(PARAVIRT_irq_enable_sysexit, paravirt_ops, irq_enable_sysexit); | 122 | OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable); |
123 | OFFSET(PARAVIRT_iret, paravirt_ops, iret); | 123 | OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable); |
124 | OFFSET(PARAVIRT_read_cr0, paravirt_ops, read_cr0); | 124 | OFFSET(PV_CPU_iret, pv_cpu_ops, iret); |
125 | OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit); | ||
126 | OFFSET(PV_CPU_read_cr0, pv_cpu_ops, read_cr0); | ||
125 | #endif | 127 | #endif |
126 | 128 | ||
127 | #ifdef CONFIG_XEN | 129 | #ifdef CONFIG_XEN |
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 8099fea0a72f..dc7f938e5015 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S | |||
@@ -437,7 +437,7 @@ ldt_ss: | |||
437 | * is still available to implement the setting of the high | 437 | * is still available to implement the setting of the high |
438 | * 16-bits in the INTERRUPT_RETURN paravirt-op. | 438 | * 16-bits in the INTERRUPT_RETURN paravirt-op. |
439 | */ | 439 | */ |
440 | cmpl $0, paravirt_ops+PARAVIRT_enabled | 440 | cmpl $0, pv_info+PARAVIRT_enabled |
441 | jne restore_nocheck | 441 | jne restore_nocheck |
442 | #endif | 442 | #endif |
443 | 443 | ||
diff --git a/arch/x86/kernel/paravirt_32.c b/arch/x86/kernel/paravirt_32.c index 739cfb207dd7..6a80d67c2121 100644 --- a/arch/x86/kernel/paravirt_32.c +++ b/arch/x86/kernel/paravirt_32.c | |||
@@ -42,32 +42,33 @@ void _paravirt_nop(void) | |||
42 | static void __init default_banner(void) | 42 | static void __init default_banner(void) |
43 | { | 43 | { |
44 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", | 44 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
45 | paravirt_ops.name); | 45 | pv_info.name); |
46 | } | 46 | } |
47 | 47 | ||
48 | char *memory_setup(void) | 48 | char *memory_setup(void) |
49 | { | 49 | { |
50 | return paravirt_ops.memory_setup(); | 50 | return pv_init_ops.memory_setup(); |
51 | } | 51 | } |
52 | 52 | ||
53 | /* Simple instruction patching code. */ | 53 | /* Simple instruction patching code. */ |
54 | #define DEF_NATIVE(name, code) \ | 54 | #define DEF_NATIVE(ops, name, code) \ |
55 | extern const char start_##name[], end_##name[]; \ | 55 | extern const char start_##ops##_##name[], end_##ops##_##name[]; \ |
56 | asm("start_" #name ": " code "; end_" #name ":") | 56 | asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":") |
57 | 57 | ||
58 | DEF_NATIVE(irq_disable, "cli"); | 58 | DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); |
59 | DEF_NATIVE(irq_enable, "sti"); | 59 | DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); |
60 | DEF_NATIVE(restore_fl, "push %eax; popf"); | 60 | DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf"); |
61 | DEF_NATIVE(save_fl, "pushf; pop %eax"); | 61 | DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax"); |
62 | DEF_NATIVE(iret, "iret"); | 62 | DEF_NATIVE(pv_cpu_ops, iret, "iret"); |
63 | DEF_NATIVE(irq_enable_sysexit, "sti; sysexit"); | 63 | DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "sti; sysexit"); |
64 | DEF_NATIVE(read_cr2, "mov %cr2, %eax"); | 64 | DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax"); |
65 | DEF_NATIVE(write_cr3, "mov %eax, %cr3"); | 65 | DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3"); |
66 | DEF_NATIVE(read_cr3, "mov %cr3, %eax"); | 66 | DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax"); |
67 | DEF_NATIVE(clts, "clts"); | 67 | DEF_NATIVE(pv_cpu_ops, clts, "clts"); |
68 | DEF_NATIVE(read_tsc, "rdtsc"); | 68 | DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc"); |
69 | 69 | ||
70 | DEF_NATIVE(ud2a, "ud2a"); | 70 | /* Undefined instruction for dealing with missing ops pointers. */ |
71 | static const unsigned char ud2a[] = { 0x0f, 0x0b }; | ||
71 | 72 | ||
72 | static unsigned native_patch(u8 type, u16 clobbers, void *ibuf, | 73 | static unsigned native_patch(u8 type, u16 clobbers, void *ibuf, |
73 | unsigned long addr, unsigned len) | 74 | unsigned long addr, unsigned len) |
@@ -76,37 +77,29 @@ static unsigned native_patch(u8 type, u16 clobbers, void *ibuf, | |||
76 | unsigned ret; | 77 | unsigned ret; |
77 | 78 | ||
78 | switch(type) { | 79 | switch(type) { |
79 | #define SITE(x) case PARAVIRT_PATCH(x): start = start_##x; end = end_##x; goto patch_site | 80 | #define SITE(ops, x) \ |
80 | SITE(irq_disable); | 81 | case PARAVIRT_PATCH(ops.x): \ |
81 | SITE(irq_enable); | 82 | start = start_##ops##_##x; \ |
82 | SITE(restore_fl); | 83 | end = end_##ops##_##x; \ |
83 | SITE(save_fl); | 84 | goto patch_site |
84 | SITE(iret); | 85 | |
85 | SITE(irq_enable_sysexit); | 86 | SITE(pv_irq_ops, irq_disable); |
86 | SITE(read_cr2); | 87 | SITE(pv_irq_ops, irq_enable); |
87 | SITE(read_cr3); | 88 | SITE(pv_irq_ops, restore_fl); |
88 | SITE(write_cr3); | 89 | SITE(pv_irq_ops, save_fl); |
89 | SITE(clts); | 90 | SITE(pv_cpu_ops, iret); |
90 | SITE(read_tsc); | 91 | SITE(pv_cpu_ops, irq_enable_sysexit); |
92 | SITE(pv_mmu_ops, read_cr2); | ||
93 | SITE(pv_mmu_ops, read_cr3); | ||
94 | SITE(pv_mmu_ops, write_cr3); | ||
95 | SITE(pv_cpu_ops, clts); | ||
96 | SITE(pv_cpu_ops, read_tsc); | ||
91 | #undef SITE | 97 | #undef SITE |
92 | 98 | ||
93 | patch_site: | 99 | patch_site: |
94 | ret = paravirt_patch_insns(ibuf, len, start, end); | 100 | ret = paravirt_patch_insns(ibuf, len, start, end); |
95 | break; | 101 | break; |
96 | 102 | ||
97 | case PARAVIRT_PATCH(make_pgd): | ||
98 | case PARAVIRT_PATCH(make_pte): | ||
99 | case PARAVIRT_PATCH(pgd_val): | ||
100 | case PARAVIRT_PATCH(pte_val): | ||
101 | #ifdef CONFIG_X86_PAE | ||
102 | case PARAVIRT_PATCH(make_pmd): | ||
103 | case PARAVIRT_PATCH(pmd_val): | ||
104 | #endif | ||
105 | /* These functions end up returning exactly what | ||
106 | they're passed, in the same registers. */ | ||
107 | ret = paravirt_patch_nop(); | ||
108 | break; | ||
109 | |||
110 | default: | 103 | default: |
111 | ret = paravirt_patch_default(type, clobbers, ibuf, addr, len); | 104 | ret = paravirt_patch_default(type, clobbers, ibuf, addr, len); |
112 | break; | 105 | break; |
@@ -150,7 +143,7 @@ unsigned paravirt_patch_call(void *insnbuf, | |||
150 | return 5; | 143 | return 5; |
151 | } | 144 | } |
152 | 145 | ||
153 | unsigned paravirt_patch_jmp(const void *target, void *insnbuf, | 146 | unsigned paravirt_patch_jmp(void *insnbuf, const void *target, |
154 | unsigned long addr, unsigned len) | 147 | unsigned long addr, unsigned len) |
155 | { | 148 | { |
156 | struct branch *b = insnbuf; | 149 | struct branch *b = insnbuf; |
@@ -165,22 +158,37 @@ unsigned paravirt_patch_jmp(const void *target, void *insnbuf, | |||
165 | return 5; | 158 | return 5; |
166 | } | 159 | } |
167 | 160 | ||
161 | /* Neat trick to map patch type back to the call within the | ||
162 | * corresponding structure. */ | ||
163 | static void *get_call_destination(u8 type) | ||
164 | { | ||
165 | struct paravirt_patch_template tmpl = { | ||
166 | .pv_init_ops = pv_init_ops, | ||
167 | .pv_time_ops = pv_time_ops, | ||
168 | .pv_cpu_ops = pv_cpu_ops, | ||
169 | .pv_irq_ops = pv_irq_ops, | ||
170 | .pv_apic_ops = pv_apic_ops, | ||
171 | .pv_mmu_ops = pv_mmu_ops, | ||
172 | }; | ||
173 | return *((void **)&tmpl + type); | ||
174 | } | ||
175 | |||
168 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, | 176 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, |
169 | unsigned long addr, unsigned len) | 177 | unsigned long addr, unsigned len) |
170 | { | 178 | { |
171 | void *opfunc = *((void **)¶virt_ops + type); | 179 | void *opfunc = get_call_destination(type); |
172 | unsigned ret; | 180 | unsigned ret; |
173 | 181 | ||
174 | if (opfunc == NULL) | 182 | if (opfunc == NULL) |
175 | /* If there's no function, patch it with a ud2a (BUG) */ | 183 | /* If there's no function, patch it with a ud2a (BUG) */ |
176 | ret = paravirt_patch_insns(insnbuf, len, start_ud2a, end_ud2a); | 184 | ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a)); |
177 | else if (opfunc == paravirt_nop) | 185 | else if (opfunc == paravirt_nop) |
178 | /* If the operation is a nop, then nop the callsite */ | 186 | /* If the operation is a nop, then nop the callsite */ |
179 | ret = paravirt_patch_nop(); | 187 | ret = paravirt_patch_nop(); |
180 | else if (type == PARAVIRT_PATCH(iret) || | 188 | else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) || |
181 | type == PARAVIRT_PATCH(irq_enable_sysexit)) | 189 | type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit)) |
182 | /* If operation requires a jmp, then jmp */ | 190 | /* If operation requires a jmp, then jmp */ |
183 | ret = paravirt_patch_jmp(opfunc, insnbuf, addr, len); | 191 | ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len); |
184 | else | 192 | else |
185 | /* Otherwise call the function; assume target could | 193 | /* Otherwise call the function; assume target could |
186 | clobber any caller-save reg */ | 194 | clobber any caller-save reg */ |
@@ -205,7 +213,7 @@ unsigned paravirt_patch_insns(void *insnbuf, unsigned len, | |||
205 | 213 | ||
206 | void init_IRQ(void) | 214 | void init_IRQ(void) |
207 | { | 215 | { |
208 | paravirt_ops.init_IRQ(); | 216 | pv_irq_ops.init_IRQ(); |
209 | } | 217 | } |
210 | 218 | ||
211 | static void native_flush_tlb(void) | 219 | static void native_flush_tlb(void) |
@@ -233,7 +241,7 @@ extern void native_irq_enable_sysexit(void); | |||
233 | 241 | ||
234 | static int __init print_banner(void) | 242 | static int __init print_banner(void) |
235 | { | 243 | { |
236 | paravirt_ops.banner(); | 244 | pv_init_ops.banner(); |
237 | return 0; | 245 | return 0; |
238 | } | 246 | } |
239 | core_initcall(print_banner); | 247 | core_initcall(print_banner); |
@@ -273,47 +281,96 @@ int paravirt_disable_iospace(void) | |||
273 | return ret; | 281 | return ret; |
274 | } | 282 | } |
275 | 283 | ||
276 | struct paravirt_ops paravirt_ops = { | 284 | static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LAZY_NONE; |
285 | |||
286 | static inline void enter_lazy(enum paravirt_lazy_mode mode) | ||
287 | { | ||
288 | BUG_ON(x86_read_percpu(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE); | ||
289 | BUG_ON(preemptible()); | ||
290 | |||
291 | x86_write_percpu(paravirt_lazy_mode, mode); | ||
292 | } | ||
293 | |||
294 | void paravirt_leave_lazy(enum paravirt_lazy_mode mode) | ||
295 | { | ||
296 | BUG_ON(x86_read_percpu(paravirt_lazy_mode) != mode); | ||
297 | BUG_ON(preemptible()); | ||
298 | |||
299 | x86_write_percpu(paravirt_lazy_mode, PARAVIRT_LAZY_NONE); | ||
300 | } | ||
301 | |||
302 | void paravirt_enter_lazy_mmu(void) | ||
303 | { | ||
304 | enter_lazy(PARAVIRT_LAZY_MMU); | ||
305 | } | ||
306 | |||
307 | void paravirt_leave_lazy_mmu(void) | ||
308 | { | ||
309 | paravirt_leave_lazy(PARAVIRT_LAZY_MMU); | ||
310 | } | ||
311 | |||
312 | void paravirt_enter_lazy_cpu(void) | ||
313 | { | ||
314 | enter_lazy(PARAVIRT_LAZY_CPU); | ||
315 | } | ||
316 | |||
317 | void paravirt_leave_lazy_cpu(void) | ||
318 | { | ||
319 | paravirt_leave_lazy(PARAVIRT_LAZY_CPU); | ||
320 | } | ||
321 | |||
322 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void) | ||
323 | { | ||
324 | return x86_read_percpu(paravirt_lazy_mode); | ||
325 | } | ||
326 | |||
327 | struct pv_info pv_info = { | ||
277 | .name = "bare hardware", | 328 | .name = "bare hardware", |
278 | .paravirt_enabled = 0, | 329 | .paravirt_enabled = 0, |
279 | .kernel_rpl = 0, | 330 | .kernel_rpl = 0, |
280 | .shared_kernel_pmd = 1, /* Only used when CONFIG_X86_PAE is set */ | 331 | .shared_kernel_pmd = 1, /* Only used when CONFIG_X86_PAE is set */ |
332 | }; | ||
281 | 333 | ||
282 | .patch = native_patch, | 334 | struct pv_init_ops pv_init_ops = { |
335 | .patch = native_patch, | ||
283 | .banner = default_banner, | 336 | .banner = default_banner, |
284 | .arch_setup = paravirt_nop, | 337 | .arch_setup = paravirt_nop, |
285 | .memory_setup = machine_specific_memory_setup, | 338 | .memory_setup = machine_specific_memory_setup, |
339 | }; | ||
340 | |||
341 | struct pv_time_ops pv_time_ops = { | ||
342 | .time_init = hpet_time_init, | ||
286 | .get_wallclock = native_get_wallclock, | 343 | .get_wallclock = native_get_wallclock, |
287 | .set_wallclock = native_set_wallclock, | 344 | .set_wallclock = native_set_wallclock, |
288 | .time_init = hpet_time_init, | 345 | .sched_clock = native_sched_clock, |
346 | .get_cpu_khz = native_calculate_cpu_khz, | ||
347 | }; | ||
348 | |||
349 | struct pv_irq_ops pv_irq_ops = { | ||
289 | .init_IRQ = native_init_IRQ, | 350 | .init_IRQ = native_init_IRQ, |
351 | .save_fl = native_save_fl, | ||
352 | .restore_fl = native_restore_fl, | ||
353 | .irq_disable = native_irq_disable, | ||
354 | .irq_enable = native_irq_enable, | ||
355 | .safe_halt = native_safe_halt, | ||
356 | .halt = native_halt, | ||
357 | }; | ||
290 | 358 | ||
359 | struct pv_cpu_ops pv_cpu_ops = { | ||
291 | .cpuid = native_cpuid, | 360 | .cpuid = native_cpuid, |
292 | .get_debugreg = native_get_debugreg, | 361 | .get_debugreg = native_get_debugreg, |
293 | .set_debugreg = native_set_debugreg, | 362 | .set_debugreg = native_set_debugreg, |
294 | .clts = native_clts, | 363 | .clts = native_clts, |
295 | .read_cr0 = native_read_cr0, | 364 | .read_cr0 = native_read_cr0, |
296 | .write_cr0 = native_write_cr0, | 365 | .write_cr0 = native_write_cr0, |
297 | .read_cr2 = native_read_cr2, | ||
298 | .write_cr2 = native_write_cr2, | ||
299 | .read_cr3 = native_read_cr3, | ||
300 | .write_cr3 = native_write_cr3, | ||
301 | .read_cr4 = native_read_cr4, | 366 | .read_cr4 = native_read_cr4, |
302 | .read_cr4_safe = native_read_cr4_safe, | 367 | .read_cr4_safe = native_read_cr4_safe, |
303 | .write_cr4 = native_write_cr4, | 368 | .write_cr4 = native_write_cr4, |
304 | .save_fl = native_save_fl, | ||
305 | .restore_fl = native_restore_fl, | ||
306 | .irq_disable = native_irq_disable, | ||
307 | .irq_enable = native_irq_enable, | ||
308 | .safe_halt = native_safe_halt, | ||
309 | .halt = native_halt, | ||
310 | .wbinvd = native_wbinvd, | 369 | .wbinvd = native_wbinvd, |
311 | .read_msr = native_read_msr_safe, | 370 | .read_msr = native_read_msr_safe, |
312 | .write_msr = native_write_msr_safe, | 371 | .write_msr = native_write_msr_safe, |
313 | .read_tsc = native_read_tsc, | 372 | .read_tsc = native_read_tsc, |
314 | .read_pmc = native_read_pmc, | 373 | .read_pmc = native_read_pmc, |
315 | .sched_clock = native_sched_clock, | ||
316 | .get_cpu_khz = native_calculate_cpu_khz, | ||
317 | .load_tr_desc = native_load_tr_desc, | 374 | .load_tr_desc = native_load_tr_desc, |
318 | .set_ldt = native_set_ldt, | 375 | .set_ldt = native_set_ldt, |
319 | .load_gdt = native_load_gdt, | 376 | .load_gdt = native_load_gdt, |
@@ -327,9 +384,19 @@ struct paravirt_ops paravirt_ops = { | |||
327 | .write_idt_entry = write_dt_entry, | 384 | .write_idt_entry = write_dt_entry, |
328 | .load_esp0 = native_load_esp0, | 385 | .load_esp0 = native_load_esp0, |
329 | 386 | ||
387 | .irq_enable_sysexit = native_irq_enable_sysexit, | ||
388 | .iret = native_iret, | ||
389 | |||
330 | .set_iopl_mask = native_set_iopl_mask, | 390 | .set_iopl_mask = native_set_iopl_mask, |
331 | .io_delay = native_io_delay, | 391 | .io_delay = native_io_delay, |
332 | 392 | ||
393 | .lazy_mode = { | ||
394 | .enter = paravirt_nop, | ||
395 | .leave = paravirt_nop, | ||
396 | }, | ||
397 | }; | ||
398 | |||
399 | struct pv_apic_ops pv_apic_ops = { | ||
333 | #ifdef CONFIG_X86_LOCAL_APIC | 400 | #ifdef CONFIG_X86_LOCAL_APIC |
334 | .apic_write = native_apic_write, | 401 | .apic_write = native_apic_write, |
335 | .apic_write_atomic = native_apic_write_atomic, | 402 | .apic_write_atomic = native_apic_write_atomic, |
@@ -338,11 +405,17 @@ struct paravirt_ops paravirt_ops = { | |||
338 | .setup_secondary_clock = setup_secondary_APIC_clock, | 405 | .setup_secondary_clock = setup_secondary_APIC_clock, |
339 | .startup_ipi_hook = paravirt_nop, | 406 | .startup_ipi_hook = paravirt_nop, |
340 | #endif | 407 | #endif |
341 | .set_lazy_mode = paravirt_nop, | 408 | }; |
342 | 409 | ||
410 | struct pv_mmu_ops pv_mmu_ops = { | ||
343 | .pagetable_setup_start = native_pagetable_setup_start, | 411 | .pagetable_setup_start = native_pagetable_setup_start, |
344 | .pagetable_setup_done = native_pagetable_setup_done, | 412 | .pagetable_setup_done = native_pagetable_setup_done, |
345 | 413 | ||
414 | .read_cr2 = native_read_cr2, | ||
415 | .write_cr2 = native_write_cr2, | ||
416 | .read_cr3 = native_read_cr3, | ||
417 | .write_cr3 = native_write_cr3, | ||
418 | |||
346 | .flush_tlb_user = native_flush_tlb, | 419 | .flush_tlb_user = native_flush_tlb, |
347 | .flush_tlb_kernel = native_flush_tlb_global, | 420 | .flush_tlb_kernel = native_flush_tlb_global, |
348 | .flush_tlb_single = native_flush_tlb_single, | 421 | .flush_tlb_single = native_flush_tlb_single, |
@@ -381,12 +454,19 @@ struct paravirt_ops paravirt_ops = { | |||
381 | .make_pte = native_make_pte, | 454 | .make_pte = native_make_pte, |
382 | .make_pgd = native_make_pgd, | 455 | .make_pgd = native_make_pgd, |
383 | 456 | ||
384 | .irq_enable_sysexit = native_irq_enable_sysexit, | ||
385 | .iret = native_iret, | ||
386 | |||
387 | .dup_mmap = paravirt_nop, | 457 | .dup_mmap = paravirt_nop, |
388 | .exit_mmap = paravirt_nop, | 458 | .exit_mmap = paravirt_nop, |
389 | .activate_mm = paravirt_nop, | 459 | .activate_mm = paravirt_nop, |
460 | |||
461 | .lazy_mode = { | ||
462 | .enter = paravirt_nop, | ||
463 | .leave = paravirt_nop, | ||
464 | }, | ||
390 | }; | 465 | }; |
391 | 466 | ||
392 | EXPORT_SYMBOL(paravirt_ops); | 467 | EXPORT_SYMBOL_GPL(pv_time_ops); |
468 | EXPORT_SYMBOL_GPL(pv_cpu_ops); | ||
469 | EXPORT_SYMBOL_GPL(pv_mmu_ops); | ||
470 | EXPORT_SYMBOL_GPL(pv_apic_ops); | ||
471 | EXPORT_SYMBOL_GPL(pv_info); | ||
472 | EXPORT_SYMBOL (pv_irq_ops); | ||
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c index 18673e0f193b..f02bad68abaa 100644 --- a/arch/x86/kernel/vmi_32.c +++ b/arch/x86/kernel/vmi_32.c | |||
@@ -134,21 +134,21 @@ static unsigned vmi_patch(u8 type, u16 clobbers, void *insns, | |||
134 | unsigned long eip, unsigned len) | 134 | unsigned long eip, unsigned len) |
135 | { | 135 | { |
136 | switch (type) { | 136 | switch (type) { |
137 | case PARAVIRT_PATCH(irq_disable): | 137 | case PARAVIRT_PATCH(pv_irq_ops.irq_disable): |
138 | return patch_internal(VMI_CALL_DisableInterrupts, len, | 138 | return patch_internal(VMI_CALL_DisableInterrupts, len, |
139 | insns, eip); | 139 | insns, eip); |
140 | case PARAVIRT_PATCH(irq_enable): | 140 | case PARAVIRT_PATCH(pv_irq_ops.irq_enable): |
141 | return patch_internal(VMI_CALL_EnableInterrupts, len, | 141 | return patch_internal(VMI_CALL_EnableInterrupts, len, |
142 | insns, eip); | 142 | insns, eip); |
143 | case PARAVIRT_PATCH(restore_fl): | 143 | case PARAVIRT_PATCH(pv_irq_ops.restore_fl): |
144 | return patch_internal(VMI_CALL_SetInterruptMask, len, | 144 | return patch_internal(VMI_CALL_SetInterruptMask, len, |
145 | insns, eip); | 145 | insns, eip); |
146 | case PARAVIRT_PATCH(save_fl): | 146 | case PARAVIRT_PATCH(pv_irq_ops.save_fl): |
147 | return patch_internal(VMI_CALL_GetInterruptMask, len, | 147 | return patch_internal(VMI_CALL_GetInterruptMask, len, |
148 | insns, eip); | 148 | insns, eip); |
149 | case PARAVIRT_PATCH(iret): | 149 | case PARAVIRT_PATCH(pv_cpu_ops.iret): |
150 | return patch_internal(VMI_CALL_IRET, len, insns, eip); | 150 | return patch_internal(VMI_CALL_IRET, len, insns, eip); |
151 | case PARAVIRT_PATCH(irq_enable_sysexit): | 151 | case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit): |
152 | return patch_internal(VMI_CALL_SYSEXIT, len, insns, eip); | 152 | return patch_internal(VMI_CALL_SYSEXIT, len, insns, eip); |
153 | default: | 153 | default: |
154 | break; | 154 | break; |
@@ -552,24 +552,22 @@ vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip, | |||
552 | } | 552 | } |
553 | #endif | 553 | #endif |
554 | 554 | ||
555 | static void vmi_set_lazy_mode(enum paravirt_lazy_mode mode) | 555 | static void vmi_enter_lazy_cpu(void) |
556 | { | 556 | { |
557 | static DEFINE_PER_CPU(enum paravirt_lazy_mode, lazy_mode); | 557 | paravirt_enter_lazy_cpu(); |
558 | 558 | vmi_ops.set_lazy_mode(2); | |
559 | if (!vmi_ops.set_lazy_mode) | 559 | } |
560 | return; | ||
561 | 560 | ||
562 | /* Modes should never nest or overlap */ | 561 | static void vmi_enter_lazy_mmu(void) |
563 | BUG_ON(__get_cpu_var(lazy_mode) && !(mode == PARAVIRT_LAZY_NONE || | 562 | { |
564 | mode == PARAVIRT_LAZY_FLUSH)); | 563 | paravirt_enter_lazy_mmu(); |
564 | vmi_ops.set_lazy_mode(1); | ||
565 | } | ||
565 | 566 | ||
566 | if (mode == PARAVIRT_LAZY_FLUSH) { | 567 | static void vmi_leave_lazy(void) |
567 | vmi_ops.set_lazy_mode(0); | 568 | { |
568 | vmi_ops.set_lazy_mode(__get_cpu_var(lazy_mode)); | 569 | paravirt_leave_lazy(paravirt_get_lazy_mode()); |
569 | } else { | 570 | vmi_ops.set_lazy_mode(0); |
570 | vmi_ops.set_lazy_mode(mode); | ||
571 | __get_cpu_var(lazy_mode) = mode; | ||
572 | } | ||
573 | } | 571 | } |
574 | 572 | ||
575 | static inline int __init check_vmi_rom(struct vrom_header *rom) | 573 | static inline int __init check_vmi_rom(struct vrom_header *rom) |
@@ -690,9 +688,9 @@ do { \ | |||
690 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ | 688 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ |
691 | VMI_CALL_##vmicall); \ | 689 | VMI_CALL_##vmicall); \ |
692 | if (rel->type == VMI_RELOCATION_CALL_REL) \ | 690 | if (rel->type == VMI_RELOCATION_CALL_REL) \ |
693 | paravirt_ops.opname = (void *)rel->eip; \ | 691 | opname = (void *)rel->eip; \ |
694 | else if (rel->type == VMI_RELOCATION_NOP) \ | 692 | else if (rel->type == VMI_RELOCATION_NOP) \ |
695 | paravirt_ops.opname = (void *)vmi_nop; \ | 693 | opname = (void *)vmi_nop; \ |
696 | else if (rel->type != VMI_RELOCATION_NONE) \ | 694 | else if (rel->type != VMI_RELOCATION_NONE) \ |
697 | printk(KERN_WARNING "VMI: Unknown relocation " \ | 695 | printk(KERN_WARNING "VMI: Unknown relocation " \ |
698 | "type %d for " #vmicall"\n",\ | 696 | "type %d for " #vmicall"\n",\ |
@@ -712,7 +710,7 @@ do { \ | |||
712 | VMI_CALL_##vmicall); \ | 710 | VMI_CALL_##vmicall); \ |
713 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); \ | 711 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); \ |
714 | if (rel->type == VMI_RELOCATION_CALL_REL) { \ | 712 | if (rel->type == VMI_RELOCATION_CALL_REL) { \ |
715 | paravirt_ops.opname = wrapper; \ | 713 | opname = wrapper; \ |
716 | vmi_ops.cache = (void *)rel->eip; \ | 714 | vmi_ops.cache = (void *)rel->eip; \ |
717 | } \ | 715 | } \ |
718 | } while (0) | 716 | } while (0) |
@@ -732,11 +730,11 @@ static inline int __init activate_vmi(void) | |||
732 | } | 730 | } |
733 | savesegment(cs, kernel_cs); | 731 | savesegment(cs, kernel_cs); |
734 | 732 | ||
735 | paravirt_ops.paravirt_enabled = 1; | 733 | pv_info.paravirt_enabled = 1; |
736 | paravirt_ops.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK; | 734 | pv_info.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK; |
735 | pv_info.name = "vmi"; | ||
737 | 736 | ||
738 | paravirt_ops.patch = vmi_patch; | 737 | pv_init_ops.patch = vmi_patch; |
739 | paravirt_ops.name = "vmi"; | ||
740 | 738 | ||
741 | /* | 739 | /* |
742 | * Many of these operations are ABI compatible with VMI. | 740 | * Many of these operations are ABI compatible with VMI. |
@@ -754,26 +752,26 @@ static inline int __init activate_vmi(void) | |||
754 | */ | 752 | */ |
755 | 753 | ||
756 | /* CPUID is special, so very special it gets wrapped like a present */ | 754 | /* CPUID is special, so very special it gets wrapped like a present */ |
757 | para_wrap(cpuid, vmi_cpuid, cpuid, CPUID); | 755 | para_wrap(pv_cpu_ops.cpuid, vmi_cpuid, cpuid, CPUID); |
758 | 756 | ||
759 | para_fill(clts, CLTS); | 757 | para_fill(pv_cpu_ops.clts, CLTS); |
760 | para_fill(get_debugreg, GetDR); | 758 | para_fill(pv_cpu_ops.get_debugreg, GetDR); |
761 | para_fill(set_debugreg, SetDR); | 759 | para_fill(pv_cpu_ops.set_debugreg, SetDR); |
762 | para_fill(read_cr0, GetCR0); | 760 | para_fill(pv_cpu_ops.read_cr0, GetCR0); |
763 | para_fill(read_cr2, GetCR2); | 761 | para_fill(pv_mmu_ops.read_cr2, GetCR2); |
764 | para_fill(read_cr3, GetCR3); | 762 | para_fill(pv_mmu_ops.read_cr3, GetCR3); |
765 | para_fill(read_cr4, GetCR4); | 763 | para_fill(pv_cpu_ops.read_cr4, GetCR4); |
766 | para_fill(write_cr0, SetCR0); | 764 | para_fill(pv_cpu_ops.write_cr0, SetCR0); |
767 | para_fill(write_cr2, SetCR2); | 765 | para_fill(pv_mmu_ops.write_cr2, SetCR2); |
768 | para_fill(write_cr3, SetCR3); | 766 | para_fill(pv_mmu_ops.write_cr3, SetCR3); |
769 | para_fill(write_cr4, SetCR4); | 767 | para_fill(pv_cpu_ops.write_cr4, SetCR4); |
770 | para_fill(save_fl, GetInterruptMask); | 768 | para_fill(pv_irq_ops.save_fl, GetInterruptMask); |
771 | para_fill(restore_fl, SetInterruptMask); | 769 | para_fill(pv_irq_ops.restore_fl, SetInterruptMask); |
772 | para_fill(irq_disable, DisableInterrupts); | 770 | para_fill(pv_irq_ops.irq_disable, DisableInterrupts); |
773 | para_fill(irq_enable, EnableInterrupts); | 771 | para_fill(pv_irq_ops.irq_enable, EnableInterrupts); |
774 | 772 | ||
775 | para_fill(wbinvd, WBINVD); | 773 | para_fill(pv_cpu_ops.wbinvd, WBINVD); |
776 | para_fill(read_tsc, RDTSC); | 774 | para_fill(pv_cpu_ops.read_tsc, RDTSC); |
777 | 775 | ||
778 | /* The following we emulate with trap and emulate for now */ | 776 | /* The following we emulate with trap and emulate for now */ |
779 | /* paravirt_ops.read_msr = vmi_rdmsr */ | 777 | /* paravirt_ops.read_msr = vmi_rdmsr */ |
@@ -781,29 +779,38 @@ static inline int __init activate_vmi(void) | |||
781 | /* paravirt_ops.rdpmc = vmi_rdpmc */ | 779 | /* paravirt_ops.rdpmc = vmi_rdpmc */ |
782 | 780 | ||
783 | /* TR interface doesn't pass TR value, wrap */ | 781 | /* TR interface doesn't pass TR value, wrap */ |
784 | para_wrap(load_tr_desc, vmi_set_tr, set_tr, SetTR); | 782 | para_wrap(pv_cpu_ops.load_tr_desc, vmi_set_tr, set_tr, SetTR); |
785 | 783 | ||
786 | /* LDT is special, too */ | 784 | /* LDT is special, too */ |
787 | para_wrap(set_ldt, vmi_set_ldt, _set_ldt, SetLDT); | 785 | para_wrap(pv_cpu_ops.set_ldt, vmi_set_ldt, _set_ldt, SetLDT); |
788 | 786 | ||
789 | para_fill(load_gdt, SetGDT); | 787 | para_fill(pv_cpu_ops.load_gdt, SetGDT); |
790 | para_fill(load_idt, SetIDT); | 788 | para_fill(pv_cpu_ops.load_idt, SetIDT); |
791 | para_fill(store_gdt, GetGDT); | 789 | para_fill(pv_cpu_ops.store_gdt, GetGDT); |
792 | para_fill(store_idt, GetIDT); | 790 | para_fill(pv_cpu_ops.store_idt, GetIDT); |
793 | para_fill(store_tr, GetTR); | 791 | para_fill(pv_cpu_ops.store_tr, GetTR); |
794 | paravirt_ops.load_tls = vmi_load_tls; | 792 | pv_cpu_ops.load_tls = vmi_load_tls; |
795 | para_fill(write_ldt_entry, WriteLDTEntry); | 793 | para_fill(pv_cpu_ops.write_ldt_entry, WriteLDTEntry); |
796 | para_fill(write_gdt_entry, WriteGDTEntry); | 794 | para_fill(pv_cpu_ops.write_gdt_entry, WriteGDTEntry); |
797 | para_fill(write_idt_entry, WriteIDTEntry); | 795 | para_fill(pv_cpu_ops.write_idt_entry, WriteIDTEntry); |
798 | para_wrap(load_esp0, vmi_load_esp0, set_kernel_stack, UpdateKernelStack); | 796 | para_wrap(pv_cpu_ops.load_esp0, vmi_load_esp0, set_kernel_stack, UpdateKernelStack); |
799 | para_fill(set_iopl_mask, SetIOPLMask); | 797 | para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask); |
800 | para_fill(io_delay, IODelay); | 798 | para_fill(pv_cpu_ops.io_delay, IODelay); |
801 | para_wrap(set_lazy_mode, vmi_set_lazy_mode, set_lazy_mode, SetLazyMode); | 799 | |
800 | para_wrap(pv_cpu_ops.lazy_mode.enter, vmi_enter_lazy_cpu, | ||
801 | set_lazy_mode, SetLazyMode); | ||
802 | para_wrap(pv_cpu_ops.lazy_mode.leave, vmi_leave_lazy, | ||
803 | set_lazy_mode, SetLazyMode); | ||
804 | |||
805 | para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu, | ||
806 | set_lazy_mode, SetLazyMode); | ||
807 | para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy, | ||
808 | set_lazy_mode, SetLazyMode); | ||
802 | 809 | ||
803 | /* user and kernel flush are just handled with different flags to FlushTLB */ | 810 | /* user and kernel flush are just handled with different flags to FlushTLB */ |
804 | para_wrap(flush_tlb_user, vmi_flush_tlb_user, _flush_tlb, FlushTLB); | 811 | para_wrap(pv_mmu_ops.flush_tlb_user, vmi_flush_tlb_user, _flush_tlb, FlushTLB); |
805 | para_wrap(flush_tlb_kernel, vmi_flush_tlb_kernel, _flush_tlb, FlushTLB); | 812 | para_wrap(pv_mmu_ops.flush_tlb_kernel, vmi_flush_tlb_kernel, _flush_tlb, FlushTLB); |
806 | para_fill(flush_tlb_single, InvalPage); | 813 | para_fill(pv_mmu_ops.flush_tlb_single, InvalPage); |
807 | 814 | ||
808 | /* | 815 | /* |
809 | * Until a standard flag format can be agreed on, we need to | 816 | * Until a standard flag format can be agreed on, we need to |
@@ -819,41 +826,41 @@ static inline int __init activate_vmi(void) | |||
819 | #endif | 826 | #endif |
820 | 827 | ||
821 | if (vmi_ops.set_pte) { | 828 | if (vmi_ops.set_pte) { |
822 | paravirt_ops.set_pte = vmi_set_pte; | 829 | pv_mmu_ops.set_pte = vmi_set_pte; |
823 | paravirt_ops.set_pte_at = vmi_set_pte_at; | 830 | pv_mmu_ops.set_pte_at = vmi_set_pte_at; |
824 | paravirt_ops.set_pmd = vmi_set_pmd; | 831 | pv_mmu_ops.set_pmd = vmi_set_pmd; |
825 | #ifdef CONFIG_X86_PAE | 832 | #ifdef CONFIG_X86_PAE |
826 | paravirt_ops.set_pte_atomic = vmi_set_pte_atomic; | 833 | pv_mmu_ops.set_pte_atomic = vmi_set_pte_atomic; |
827 | paravirt_ops.set_pte_present = vmi_set_pte_present; | 834 | pv_mmu_ops.set_pte_present = vmi_set_pte_present; |
828 | paravirt_ops.set_pud = vmi_set_pud; | 835 | pv_mmu_ops.set_pud = vmi_set_pud; |
829 | paravirt_ops.pte_clear = vmi_pte_clear; | 836 | pv_mmu_ops.pte_clear = vmi_pte_clear; |
830 | paravirt_ops.pmd_clear = vmi_pmd_clear; | 837 | pv_mmu_ops.pmd_clear = vmi_pmd_clear; |
831 | #endif | 838 | #endif |
832 | } | 839 | } |
833 | 840 | ||
834 | if (vmi_ops.update_pte) { | 841 | if (vmi_ops.update_pte) { |
835 | paravirt_ops.pte_update = vmi_update_pte; | 842 | pv_mmu_ops.pte_update = vmi_update_pte; |
836 | paravirt_ops.pte_update_defer = vmi_update_pte_defer; | 843 | pv_mmu_ops.pte_update_defer = vmi_update_pte_defer; |
837 | } | 844 | } |
838 | 845 | ||
839 | vmi_ops.allocate_page = vmi_get_function(VMI_CALL_AllocatePage); | 846 | vmi_ops.allocate_page = vmi_get_function(VMI_CALL_AllocatePage); |
840 | if (vmi_ops.allocate_page) { | 847 | if (vmi_ops.allocate_page) { |
841 | paravirt_ops.alloc_pt = vmi_allocate_pt; | 848 | pv_mmu_ops.alloc_pt = vmi_allocate_pt; |
842 | paravirt_ops.alloc_pd = vmi_allocate_pd; | 849 | pv_mmu_ops.alloc_pd = vmi_allocate_pd; |
843 | paravirt_ops.alloc_pd_clone = vmi_allocate_pd_clone; | 850 | pv_mmu_ops.alloc_pd_clone = vmi_allocate_pd_clone; |
844 | } | 851 | } |
845 | 852 | ||
846 | vmi_ops.release_page = vmi_get_function(VMI_CALL_ReleasePage); | 853 | vmi_ops.release_page = vmi_get_function(VMI_CALL_ReleasePage); |
847 | if (vmi_ops.release_page) { | 854 | if (vmi_ops.release_page) { |
848 | paravirt_ops.release_pt = vmi_release_pt; | 855 | pv_mmu_ops.release_pt = vmi_release_pt; |
849 | paravirt_ops.release_pd = vmi_release_pd; | 856 | pv_mmu_ops.release_pd = vmi_release_pd; |
850 | } | 857 | } |
851 | 858 | ||
852 | /* Set linear is needed in all cases */ | 859 | /* Set linear is needed in all cases */ |
853 | vmi_ops.set_linear_mapping = vmi_get_function(VMI_CALL_SetLinearMapping); | 860 | vmi_ops.set_linear_mapping = vmi_get_function(VMI_CALL_SetLinearMapping); |
854 | #ifdef CONFIG_HIGHPTE | 861 | #ifdef CONFIG_HIGHPTE |
855 | if (vmi_ops.set_linear_mapping) | 862 | if (vmi_ops.set_linear_mapping) |
856 | paravirt_ops.kmap_atomic_pte = vmi_kmap_atomic_pte; | 863 | pv_mmu_ops.kmap_atomic_pte = vmi_kmap_atomic_pte; |
857 | #endif | 864 | #endif |
858 | 865 | ||
859 | /* | 866 | /* |
@@ -863,17 +870,17 @@ static inline int __init activate_vmi(void) | |||
863 | * the backend. They are performance critical anyway, so requiring | 870 | * the backend. They are performance critical anyway, so requiring |
864 | * a patch is not a big problem. | 871 | * a patch is not a big problem. |
865 | */ | 872 | */ |
866 | paravirt_ops.irq_enable_sysexit = (void *)0xfeedbab0; | 873 | pv_cpu_ops.irq_enable_sysexit = (void *)0xfeedbab0; |
867 | paravirt_ops.iret = (void *)0xbadbab0; | 874 | pv_cpu_ops.iret = (void *)0xbadbab0; |
868 | 875 | ||
869 | #ifdef CONFIG_SMP | 876 | #ifdef CONFIG_SMP |
870 | para_wrap(startup_ipi_hook, vmi_startup_ipi_hook, set_initial_ap_state, SetInitialAPState); | 877 | para_wrap(pv_apic_ops.startup_ipi_hook, vmi_startup_ipi_hook, set_initial_ap_state, SetInitialAPState); |
871 | #endif | 878 | #endif |
872 | 879 | ||
873 | #ifdef CONFIG_X86_LOCAL_APIC | 880 | #ifdef CONFIG_X86_LOCAL_APIC |
874 | para_fill(apic_read, APICRead); | 881 | para_fill(pv_apic_ops.apic_read, APICRead); |
875 | para_fill(apic_write, APICWrite); | 882 | para_fill(pv_apic_ops.apic_write, APICWrite); |
876 | para_fill(apic_write_atomic, APICWrite); | 883 | para_fill(pv_apic_ops.apic_write_atomic, APICWrite); |
877 | #endif | 884 | #endif |
878 | 885 | ||
879 | /* | 886 | /* |
@@ -891,15 +898,15 @@ static inline int __init activate_vmi(void) | |||
891 | vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm); | 898 | vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm); |
892 | vmi_timer_ops.cancel_alarm = | 899 | vmi_timer_ops.cancel_alarm = |
893 | vmi_get_function(VMI_CALL_CancelAlarm); | 900 | vmi_get_function(VMI_CALL_CancelAlarm); |
894 | paravirt_ops.time_init = vmi_time_init; | 901 | pv_time_ops.time_init = vmi_time_init; |
895 | paravirt_ops.get_wallclock = vmi_get_wallclock; | 902 | pv_time_ops.get_wallclock = vmi_get_wallclock; |
896 | paravirt_ops.set_wallclock = vmi_set_wallclock; | 903 | pv_time_ops.set_wallclock = vmi_set_wallclock; |
897 | #ifdef CONFIG_X86_LOCAL_APIC | 904 | #ifdef CONFIG_X86_LOCAL_APIC |
898 | paravirt_ops.setup_boot_clock = vmi_time_bsp_init; | 905 | pv_apic_ops.setup_boot_clock = vmi_time_bsp_init; |
899 | paravirt_ops.setup_secondary_clock = vmi_time_ap_init; | 906 | pv_apic_ops.setup_secondary_clock = vmi_time_ap_init; |
900 | #endif | 907 | #endif |
901 | paravirt_ops.sched_clock = vmi_sched_clock; | 908 | pv_time_ops.sched_clock = vmi_sched_clock; |
902 | paravirt_ops.get_cpu_khz = vmi_cpu_khz; | 909 | pv_time_ops.get_cpu_khz = vmi_cpu_khz; |
903 | 910 | ||
904 | /* We have true wallclock functions; disable CMOS clock sync */ | 911 | /* We have true wallclock functions; disable CMOS clock sync */ |
905 | no_sync_cmos_clock = 1; | 912 | no_sync_cmos_clock = 1; |
@@ -908,7 +915,7 @@ static inline int __init activate_vmi(void) | |||
908 | disable_vmi_timer = 1; | 915 | disable_vmi_timer = 1; |
909 | } | 916 | } |
910 | 917 | ||
911 | para_fill(safe_halt, Halt); | 918 | para_fill(pv_irq_ops.safe_halt, Halt); |
912 | 919 | ||
913 | /* | 920 | /* |
914 | * Alternative instruction rewriting doesn't happen soon enough | 921 | * Alternative instruction rewriting doesn't happen soon enough |