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-rw-r--r--arch/x86/kernel/amd_iommu.c9
-rw-r--r--arch/x86/kernel/cpu/common.c1
-rw-r--r--arch/x86/kernel/e820.c8
-rw-r--r--arch/x86/kernel/io_apic.c2
-rw-r--r--arch/x86/kernel/reboot.c6
-rw-r--r--arch/x86/kernel/tlb_32.c6
-rw-r--r--arch/x86/kernel/tlb_64.c5
-rw-r--r--arch/x86/kernel/tsc.c8
8 files changed, 31 insertions, 14 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index a8fd9ebdc8e2..331b318304eb 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -50,7 +50,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
50/* returns !0 if the IOMMU is caching non-present entries in its TLB */ 50/* returns !0 if the IOMMU is caching non-present entries in its TLB */
51static int iommu_has_npcache(struct amd_iommu *iommu) 51static int iommu_has_npcache(struct amd_iommu *iommu)
52{ 52{
53 return iommu->cap & IOMMU_CAP_NPCACHE; 53 return iommu->cap & (1UL << IOMMU_CAP_NPCACHE);
54} 54}
55 55
56/**************************************************************************** 56/****************************************************************************
@@ -536,6 +536,9 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom,
536{ 536{
537 address >>= PAGE_SHIFT; 537 address >>= PAGE_SHIFT;
538 iommu_area_free(dom->bitmap, address, pages); 538 iommu_area_free(dom->bitmap, address, pages);
539
540 if (address + pages >= dom->next_bit)
541 dom->need_flush = true;
539} 542}
540 543
541/**************************************************************************** 544/****************************************************************************
@@ -992,8 +995,10 @@ static void __unmap_single(struct amd_iommu *iommu,
992 995
993 dma_ops_free_addresses(dma_dom, dma_addr, pages); 996 dma_ops_free_addresses(dma_dom, dma_addr, pages);
994 997
995 if (amd_iommu_unmap_flush) 998 if (amd_iommu_unmap_flush || dma_dom->need_flush) {
996 iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size); 999 iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size);
1000 dma_dom->need_flush = false;
1001 }
997} 1002}
998 1003
999/* 1004/*
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 003a65395bd5..b9c9ea0217a9 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -20,6 +20,7 @@
20#include <asm/pat.h> 20#include <asm/pat.h>
21#include <asm/asm.h> 21#include <asm/asm.h>
22#include <asm/numa.h> 22#include <asm/numa.h>
23#include <asm/smp.h>
23#ifdef CONFIG_X86_LOCAL_APIC 24#ifdef CONFIG_X86_LOCAL_APIC
24#include <asm/mpspec.h> 25#include <asm/mpspec.h>
25#include <asm/apic.h> 26#include <asm/apic.h>
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index ce97bf3bed12..7aafeb5263ef 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -1290,15 +1290,17 @@ void __init e820_reserve_resources(void)
1290 res->start = e820.map[i].addr; 1290 res->start = e820.map[i].addr;
1291 res->end = end; 1291 res->end = end;
1292 1292
1293 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; 1293 res->flags = IORESOURCE_MEM;
1294 1294
1295 /* 1295 /*
1296 * don't register the region that could be conflicted with 1296 * don't register the region that could be conflicted with
1297 * pci device BAR resource and insert them later in 1297 * pci device BAR resource and insert them later in
1298 * pcibios_resource_survey() 1298 * pcibios_resource_survey()
1299 */ 1299 */
1300 if (e820.map[i].type != E820_RESERVED || res->start < (1ULL<<20)) 1300 if (e820.map[i].type != E820_RESERVED || res->start < (1ULL<<20)) {
1301 res->flags |= IORESOURCE_BUSY;
1301 insert_resource(&iomem_resource, res); 1302 insert_resource(&iomem_resource, res);
1303 }
1302 res++; 1304 res++;
1303 } 1305 }
1304 1306
@@ -1318,7 +1320,7 @@ void __init e820_reserve_resources_late(void)
1318 res = e820_res; 1320 res = e820_res;
1319 for (i = 0; i < e820.nr_map; i++) { 1321 for (i = 0; i < e820.nr_map; i++) {
1320 if (!res->parent && res->end) 1322 if (!res->parent && res->end)
1321 reserve_region_with_split(&iomem_resource, res->start, res->end, res->name); 1323 insert_resource_expand_to_fit(&iomem_resource, res);
1322 res++; 1324 res++;
1323 } 1325 }
1324} 1326}
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index b764d7429c61..7a3f2028e2eb 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -3611,6 +3611,8 @@ int __init probe_nr_irqs(void)
3611 /* something wrong ? */ 3611 /* something wrong ? */
3612 if (nr < nr_min) 3612 if (nr < nr_min)
3613 nr = nr_min; 3613 nr = nr_min;
3614 if (WARN_ON(nr > NR_IRQS))
3615 nr = NR_IRQS;
3614 3616
3615 return nr; 3617 return nr;
3616} 3618}
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index f4c93f1cfc19..724adfc63cb9 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -29,11 +29,7 @@ EXPORT_SYMBOL(pm_power_off);
29 29
30static const struct desc_ptr no_idt = {}; 30static const struct desc_ptr no_idt = {};
31static int reboot_mode; 31static int reboot_mode;
32/* 32enum reboot_type reboot_type = BOOT_KBD;
33 * Keyboard reset and triple fault may result in INIT, not RESET, which
34 * doesn't work when we're in vmx root mode. Try ACPI first.
35 */
36enum reboot_type reboot_type = BOOT_ACPI;
37int reboot_force; 33int reboot_force;
38 34
39#if defined(CONFIG_X86_32) && defined(CONFIG_SMP) 35#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
diff --git a/arch/x86/kernel/tlb_32.c b/arch/x86/kernel/tlb_32.c
index e00534b33534..f4049f3513b6 100644
--- a/arch/x86/kernel/tlb_32.c
+++ b/arch/x86/kernel/tlb_32.c
@@ -154,6 +154,12 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
154 flush_mm = mm; 154 flush_mm = mm;
155 flush_va = va; 155 flush_va = va;
156 cpus_or(flush_cpumask, cpumask, flush_cpumask); 156 cpus_or(flush_cpumask, cpumask, flush_cpumask);
157
158 /*
159 * Make the above memory operations globally visible before
160 * sending the IPI.
161 */
162 smp_mb();
157 /* 163 /*
158 * We have to send the IPI only to 164 * We have to send the IPI only to
159 * CPUs affected. 165 * CPUs affected.
diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/kernel/tlb_64.c
index dcbf7a1159ea..8f919ca69494 100644
--- a/arch/x86/kernel/tlb_64.c
+++ b/arch/x86/kernel/tlb_64.c
@@ -183,6 +183,11 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
183 cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask); 183 cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask);
184 184
185 /* 185 /*
186 * Make the above memory operations globally visible before
187 * sending the IPI.
188 */
189 smp_mb();
190 /*
186 * We have to send the IPI only to 191 * We have to send the IPI only to
187 * CPUs affected. 192 * CPUs affected.
188 */ 193 */
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 62348e4fd8d1..2ef80e301925 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -813,10 +813,6 @@ void __init tsc_init(void)
813 cpu_khz = calibrate_cpu(); 813 cpu_khz = calibrate_cpu();
814#endif 814#endif
815 815
816 lpj = ((u64)tsc_khz * 1000);
817 do_div(lpj, HZ);
818 lpj_fine = lpj;
819
820 printk("Detected %lu.%03lu MHz processor.\n", 816 printk("Detected %lu.%03lu MHz processor.\n",
821 (unsigned long)cpu_khz / 1000, 817 (unsigned long)cpu_khz / 1000,
822 (unsigned long)cpu_khz % 1000); 818 (unsigned long)cpu_khz % 1000);
@@ -836,6 +832,10 @@ void __init tsc_init(void)
836 /* now allow native_sched_clock() to use rdtsc */ 832 /* now allow native_sched_clock() to use rdtsc */
837 tsc_disabled = 0; 833 tsc_disabled = 0;
838 834
835 lpj = ((u64)tsc_khz * 1000);
836 do_div(lpj, HZ);
837 lpj_fine = lpj;
838
839 use_tsc_delay(); 839 use_tsc_delay();
840 /* Check and install the TSC clocksource */ 840 /* Check and install the TSC clocksource */
841 dmi_check_system(bad_tsc_dmi_table); 841 dmi_check_system(bad_tsc_dmi_table);