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Diffstat (limited to 'arch/x86/kernel/time_32.c')
-rw-r--r--arch/x86/kernel/time_32.c18
1 files changed, 3 insertions, 15 deletions
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 7a26bcf887f6..ec729cdcfa3d 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -78,21 +78,9 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
78 78
79 global_clock_event->event_handler(global_clock_event); 79 global_clock_event->event_handler(global_clock_event);
80 80
81#ifdef CONFIG_MCA 81 /* MCA bus quirk: Acknowledge irq0 by setting bit 7 in port 0x61 */
82 if (MCA_bus) { 82 if (MCA_bus)
83 /* The PS/2 uses level-triggered interrupts. You can't 83 outb_p(inb_p(0x61)| 0x80, 0x61);
84 turn them off, nor would you want to (any attempt to
85 enable edge-triggered interrupts usually gets intercepted by a
86 special hardware circuit). Hence we have to acknowledge
87 the timer interrupt. Through some incredibly stupid
88 design idea, the reset for IRQ 0 is done by setting the
89 high bit of the PPI port B (0x61). Note that some PS/2s,
90 notably the 55SX, work fine if this is removed. */
91
92 u8 irq_v = inb_p(0x61); /* read the current state */
93 outb_p(irq_v | 0x80, 0x61); /* reset the IRQ */
94 }
95#endif
96 84
97 return IRQ_HANDLED; 85 return IRQ_HANDLED;
98} 86}