diff options
Diffstat (limited to 'arch/x86/kernel/smpboot.c')
-rw-r--r-- | arch/x86/kernel/smpboot.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 332512767f4f..626618bf2f81 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -123,7 +123,6 @@ EXPORT_PER_CPU_SYMBOL(cpu_info); | |||
123 | 123 | ||
124 | static atomic_t init_deasserted; | 124 | static atomic_t init_deasserted; |
125 | 125 | ||
126 | static int boot_cpu_logical_apicid; | ||
127 | 126 | ||
128 | /* representing cpus for which sibling maps can be computed */ | 127 | /* representing cpus for which sibling maps can be computed */ |
129 | static cpumask_t cpu_sibling_setup_map; | 128 | static cpumask_t cpu_sibling_setup_map; |
@@ -165,6 +164,8 @@ static void unmap_cpu_to_node(int cpu) | |||
165 | #endif | 164 | #endif |
166 | 165 | ||
167 | #ifdef CONFIG_X86_32 | 166 | #ifdef CONFIG_X86_32 |
167 | static int boot_cpu_logical_apicid; | ||
168 | |||
168 | u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = | 169 | u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = |
169 | { [0 ... NR_CPUS-1] = BAD_APICID }; | 170 | { [0 ... NR_CPUS-1] = BAD_APICID }; |
170 | 171 | ||
@@ -210,7 +211,7 @@ static void __cpuinit smp_callin(void) | |||
210 | /* | 211 | /* |
211 | * (This works even if the APIC is not enabled.) | 212 | * (This works even if the APIC is not enabled.) |
212 | */ | 213 | */ |
213 | phys_id = GET_APIC_ID(read_apic_id()); | 214 | phys_id = read_apic_id(); |
214 | cpuid = smp_processor_id(); | 215 | cpuid = smp_processor_id(); |
215 | if (cpu_isset(cpuid, cpu_callin_map)) { | 216 | if (cpu_isset(cpuid, cpu_callin_map)) { |
216 | panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__, | 217 | panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__, |
@@ -546,8 +547,7 @@ static inline void __inquire_remote_apic(int apicid) | |||
546 | printk(KERN_CONT | 547 | printk(KERN_CONT |
547 | "a previous APIC delivery may have failed\n"); | 548 | "a previous APIC delivery may have failed\n"); |
548 | 549 | ||
549 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid)); | 550 | apic_icr_write(APIC_DM_REMRD | regs[i], apicid); |
550 | apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]); | ||
551 | 551 | ||
552 | timeout = 0; | 552 | timeout = 0; |
553 | do { | 553 | do { |
@@ -579,11 +579,9 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip) | |||
579 | int maxlvt; | 579 | int maxlvt; |
580 | 580 | ||
581 | /* Target chip */ | 581 | /* Target chip */ |
582 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid)); | ||
583 | |||
584 | /* Boot on the stack */ | 582 | /* Boot on the stack */ |
585 | /* Kick the second */ | 583 | /* Kick the second */ |
586 | apic_write(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL); | 584 | apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid); |
587 | 585 | ||
588 | pr_debug("Waiting for send to finish...\n"); | 586 | pr_debug("Waiting for send to finish...\n"); |
589 | send_status = safe_apic_wait_icr_idle(); | 587 | send_status = safe_apic_wait_icr_idle(); |
@@ -636,13 +634,11 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) | |||
636 | /* | 634 | /* |
637 | * Turn INIT on target chip | 635 | * Turn INIT on target chip |
638 | */ | 636 | */ |
639 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid)); | ||
640 | |||
641 | /* | 637 | /* |
642 | * Send IPI | 638 | * Send IPI |
643 | */ | 639 | */ |
644 | apic_write(APIC_ICR, | 640 | apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, |
645 | APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT); | 641 | phys_apicid); |
646 | 642 | ||
647 | pr_debug("Waiting for send to finish...\n"); | 643 | pr_debug("Waiting for send to finish...\n"); |
648 | send_status = safe_apic_wait_icr_idle(); | 644 | send_status = safe_apic_wait_icr_idle(); |
@@ -652,10 +648,8 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) | |||
652 | pr_debug("Deasserting INIT.\n"); | 648 | pr_debug("Deasserting INIT.\n"); |
653 | 649 | ||
654 | /* Target chip */ | 650 | /* Target chip */ |
655 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid)); | ||
656 | |||
657 | /* Send IPI */ | 651 | /* Send IPI */ |
658 | apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT); | 652 | apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid); |
659 | 653 | ||
660 | pr_debug("Waiting for send to finish...\n"); | 654 | pr_debug("Waiting for send to finish...\n"); |
661 | send_status = safe_apic_wait_icr_idle(); | 655 | send_status = safe_apic_wait_icr_idle(); |
@@ -698,11 +692,10 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) | |||
698 | */ | 692 | */ |
699 | 693 | ||
700 | /* Target chip */ | 694 | /* Target chip */ |
701 | apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid)); | ||
702 | |||
703 | /* Boot on the stack */ | 695 | /* Boot on the stack */ |
704 | /* Kick the second */ | 696 | /* Kick the second */ |
705 | apic_write(APIC_ICR, APIC_DM_STARTUP | (start_eip >> 12)); | 697 | apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12), |
698 | phys_apicid); | ||
706 | 699 | ||
707 | /* | 700 | /* |
708 | * Give the other CPU some time to accept the IPI. | 701 | * Give the other CPU some time to accept the IPI. |
@@ -1136,10 +1129,17 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) | |||
1136 | * Setup boot CPU information | 1129 | * Setup boot CPU information |
1137 | */ | 1130 | */ |
1138 | smp_store_cpu_info(0); /* Final full version of the data */ | 1131 | smp_store_cpu_info(0); /* Final full version of the data */ |
1132 | #ifdef CONFIG_X86_32 | ||
1139 | boot_cpu_logical_apicid = logical_smp_processor_id(); | 1133 | boot_cpu_logical_apicid = logical_smp_processor_id(); |
1134 | #endif | ||
1140 | current_thread_info()->cpu = 0; /* needed? */ | 1135 | current_thread_info()->cpu = 0; /* needed? */ |
1141 | set_cpu_sibling_map(0); | 1136 | set_cpu_sibling_map(0); |
1142 | 1137 | ||
1138 | #ifdef CONFIG_X86_64 | ||
1139 | enable_IR_x2apic(); | ||
1140 | setup_apic_routing(); | ||
1141 | #endif | ||
1142 | |||
1143 | if (smp_sanity_check(max_cpus) < 0) { | 1143 | if (smp_sanity_check(max_cpus) < 0) { |
1144 | printk(KERN_INFO "SMP disabled\n"); | 1144 | printk(KERN_INFO "SMP disabled\n"); |
1145 | disable_smp(); | 1145 | disable_smp(); |
@@ -1147,9 +1147,9 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) | |||
1147 | } | 1147 | } |
1148 | 1148 | ||
1149 | preempt_disable(); | 1149 | preempt_disable(); |
1150 | if (GET_APIC_ID(read_apic_id()) != boot_cpu_physical_apicid) { | 1150 | if (read_apic_id() != boot_cpu_physical_apicid) { |
1151 | panic("Boot APIC ID in local APIC unexpected (%d vs %d)", | 1151 | panic("Boot APIC ID in local APIC unexpected (%d vs %d)", |
1152 | GET_APIC_ID(read_apic_id()), boot_cpu_physical_apicid); | 1152 | read_apic_id(), boot_cpu_physical_apicid); |
1153 | /* Or can we switch back to PIC here? */ | 1153 | /* Or can we switch back to PIC here? */ |
1154 | } | 1154 | } |
1155 | preempt_enable(); | 1155 | preempt_enable(); |