1 files changed, 17 insertions, 12 deletions

diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index f18fd9c15247..e7e35219b32f 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -20,7 +20,6 @@
 #include <asm/idle.h>
 #include <asm/uaccess.h>
 #include <asm/i387.h>
-#include <asm/ds.h>
 #include <asm/debugreg.h>
 
 unsigned long idle_halt;
@@ -48,7 +47,6 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 void free_thread_xstate(struct task_struct *tsk)
 {
         fpu_free(&tsk->thread.fpu);
-        WARN(tsk->thread.ds_ctx, "leaking DS context\n");
 }
 
 void free_thread_info(struct thread_info *ti)
@@ -195,11 +193,16 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
         prev = &prev_p->thread;
         next = &next_p->thread;
 
-        if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
-            test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
-                ds_switch_to(prev_p, next_p);
-        else if (next->debugctlmsr != prev->debugctlmsr)
-                update_debugctlmsr(next->debugctlmsr);
+        if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
+            test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
+                unsigned long debugctl = get_debugctlmsr();
+
+                debugctl &= ~DEBUGCTLMSR_BTF;
+                if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
+                        debugctl |= DEBUGCTLMSR_BTF;
+
+                update_debugctlmsr(debugctl);
+        }
 
         if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
             test_tsk_thread_flag(next_p, TIF_NOTSC)) {
@@ -543,11 +546,13 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
                  * check OSVW bit for CPUs that are not affected
                  * by erratum #400
                  */
-                rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
-                if (val >= 2) {
-                        rdmsrl(MSR_AMD64_OSVW_STATUS, val);
-                        if (!(val & BIT(1)))
-                                goto no_c1e_idle;
+                if (cpu_has(c, X86_FEATURE_OSVW)) {
+                        rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
+                        if (val >= 2) {
+                                rdmsrl(MSR_AMD64_OSVW_STATUS, val);
+                                if (!(val & BIT(1)))
+                                        goto no_c1e_idle;
+                        }
                 }
                 return 1;
         }