diff options
Diffstat (limited to 'arch/x86/kernel/probe_32.c')
-rw-r--r-- | arch/x86/kernel/probe_32.c | 411 |
1 files changed, 411 insertions, 0 deletions
diff --git a/arch/x86/kernel/probe_32.c b/arch/x86/kernel/probe_32.c new file mode 100644 index 000000000000..22337b75de62 --- /dev/null +++ b/arch/x86/kernel/probe_32.c | |||
@@ -0,0 +1,411 @@ | |||
1 | /* | ||
2 | * Default generic APIC driver. This handles up to 8 CPUs. | ||
3 | * | ||
4 | * Copyright 2003 Andi Kleen, SuSE Labs. | ||
5 | * Subject to the GNU Public License, v.2 | ||
6 | * | ||
7 | * Generic x86 APIC driver probe layer. | ||
8 | */ | ||
9 | #include <linux/threads.h> | ||
10 | #include <linux/cpumask.h> | ||
11 | #include <linux/string.h> | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/ctype.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/errno.h> | ||
16 | #include <asm/fixmap.h> | ||
17 | #include <asm/mpspec.h> | ||
18 | #include <asm/apicdef.h> | ||
19 | #include <asm/genapic.h> | ||
20 | #include <asm/setup.h> | ||
21 | |||
22 | #include <linux/threads.h> | ||
23 | #include <linux/cpumask.h> | ||
24 | #include <asm/mpspec.h> | ||
25 | #include <asm/genapic.h> | ||
26 | #include <asm/fixmap.h> | ||
27 | #include <asm/apicdef.h> | ||
28 | #include <linux/kernel.h> | ||
29 | #include <linux/string.h> | ||
30 | #include <linux/smp.h> | ||
31 | #include <linux/init.h> | ||
32 | #include <asm/genapic.h> | ||
33 | #include <asm/ipi.h> | ||
34 | |||
35 | #include <linux/smp.h> | ||
36 | #include <linux/init.h> | ||
37 | #include <linux/interrupt.h> | ||
38 | #include <asm/acpi.h> | ||
39 | #include <asm/arch_hooks.h> | ||
40 | #include <asm/e820.h> | ||
41 | #include <asm/setup.h> | ||
42 | |||
43 | #include <asm/genapic.h> | ||
44 | |||
45 | #ifdef CONFIG_HOTPLUG_CPU | ||
46 | #define DEFAULT_SEND_IPI (1) | ||
47 | #else | ||
48 | #define DEFAULT_SEND_IPI (0) | ||
49 | #endif | ||
50 | |||
51 | int no_broadcast = DEFAULT_SEND_IPI; | ||
52 | |||
53 | #ifdef CONFIG_X86_LOCAL_APIC | ||
54 | |||
55 | static void default_vector_allocation_domain(int cpu, struct cpumask *retmask) | ||
56 | { | ||
57 | /* | ||
58 | * Careful. Some cpus do not strictly honor the set of cpus | ||
59 | * specified in the interrupt destination when using lowest | ||
60 | * priority interrupt delivery mode. | ||
61 | * | ||
62 | * In particular there was a hyperthreading cpu observed to | ||
63 | * deliver interrupts to the wrong hyperthread when only one | ||
64 | * hyperthread was specified in the interrupt desitination. | ||
65 | */ | ||
66 | *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } }; | ||
67 | } | ||
68 | |||
69 | /* should be called last. */ | ||
70 | static int probe_default(void) | ||
71 | { | ||
72 | return 1; | ||
73 | } | ||
74 | |||
75 | struct genapic apic_default = { | ||
76 | |||
77 | .name = "default", | ||
78 | .probe = probe_default, | ||
79 | .acpi_madt_oem_check = NULL, | ||
80 | .apic_id_registered = default_apic_id_registered, | ||
81 | |||
82 | .irq_delivery_mode = dest_LowestPrio, | ||
83 | /* logical delivery broadcast to all CPUs: */ | ||
84 | .irq_dest_mode = 1, | ||
85 | |||
86 | .target_cpus = default_target_cpus, | ||
87 | .disable_esr = 0, | ||
88 | .dest_logical = APIC_DEST_LOGICAL, | ||
89 | .check_apicid_used = default_check_apicid_used, | ||
90 | .check_apicid_present = default_check_apicid_present, | ||
91 | |||
92 | .vector_allocation_domain = default_vector_allocation_domain, | ||
93 | .init_apic_ldr = default_init_apic_ldr, | ||
94 | |||
95 | .ioapic_phys_id_map = default_ioapic_phys_id_map, | ||
96 | .setup_apic_routing = default_setup_apic_routing, | ||
97 | .multi_timer_check = NULL, | ||
98 | .apicid_to_node = default_apicid_to_node, | ||
99 | .cpu_to_logical_apicid = default_cpu_to_logical_apicid, | ||
100 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | ||
101 | .apicid_to_cpu_present = default_apicid_to_cpu_present, | ||
102 | .setup_portio_remap = NULL, | ||
103 | .check_phys_apicid_present = default_check_phys_apicid_present, | ||
104 | .enable_apic_mode = NULL, | ||
105 | .phys_pkg_id = default_phys_pkg_id, | ||
106 | .mps_oem_check = NULL, | ||
107 | |||
108 | .get_apic_id = default_get_apic_id, | ||
109 | .set_apic_id = NULL, | ||
110 | .apic_id_mask = 0x0F << 24, | ||
111 | |||
112 | .cpu_mask_to_apicid = default_cpu_mask_to_apicid, | ||
113 | .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, | ||
114 | |||
115 | .send_IPI_mask = default_send_IPI_mask_logical, | ||
116 | .send_IPI_mask_allbutself = default_send_IPI_mask_allbutself_logical, | ||
117 | .send_IPI_allbutself = default_send_IPI_allbutself, | ||
118 | .send_IPI_all = default_send_IPI_all, | ||
119 | .send_IPI_self = default_send_IPI_self, | ||
120 | |||
121 | .wakeup_cpu = NULL, | ||
122 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, | ||
123 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, | ||
124 | |||
125 | .wait_for_init_deassert = default_wait_for_init_deassert, | ||
126 | |||
127 | .smp_callin_clear_local_apic = NULL, | ||
128 | .store_NMI_vector = NULL, | ||
129 | .inquire_remote_apic = default_inquire_remote_apic, | ||
130 | }; | ||
131 | |||
132 | extern struct genapic apic_numaq; | ||
133 | extern struct genapic apic_summit; | ||
134 | extern struct genapic apic_bigsmp; | ||
135 | extern struct genapic apic_es7000; | ||
136 | extern struct genapic apic_default; | ||
137 | |||
138 | struct genapic *apic = &apic_default; | ||
139 | |||
140 | static struct genapic *apic_probe[] __initdata = { | ||
141 | #ifdef CONFIG_X86_NUMAQ | ||
142 | &apic_numaq, | ||
143 | #endif | ||
144 | #ifdef CONFIG_X86_SUMMIT | ||
145 | &apic_summit, | ||
146 | #endif | ||
147 | #ifdef CONFIG_X86_BIGSMP | ||
148 | &apic_bigsmp, | ||
149 | #endif | ||
150 | #ifdef CONFIG_X86_ES7000 | ||
151 | &apic_es7000, | ||
152 | #endif | ||
153 | &apic_default, /* must be last */ | ||
154 | NULL, | ||
155 | }; | ||
156 | |||
157 | static int cmdline_apic __initdata; | ||
158 | static int __init parse_apic(char *arg) | ||
159 | { | ||
160 | int i; | ||
161 | |||
162 | if (!arg) | ||
163 | return -EINVAL; | ||
164 | |||
165 | for (i = 0; apic_probe[i]; i++) { | ||
166 | if (!strcmp(apic_probe[i]->name, arg)) { | ||
167 | apic = apic_probe[i]; | ||
168 | cmdline_apic = 1; | ||
169 | return 0; | ||
170 | } | ||
171 | } | ||
172 | |||
173 | if (x86_quirks->update_genapic) | ||
174 | x86_quirks->update_genapic(); | ||
175 | |||
176 | /* Parsed again by __setup for debug/verbose */ | ||
177 | return 0; | ||
178 | } | ||
179 | early_param("apic", parse_apic); | ||
180 | |||
181 | void __init generic_bigsmp_probe(void) | ||
182 | { | ||
183 | #ifdef CONFIG_X86_BIGSMP | ||
184 | /* | ||
185 | * This routine is used to switch to bigsmp mode when | ||
186 | * - There is no apic= option specified by the user | ||
187 | * - generic_apic_probe() has chosen apic_default as the sub_arch | ||
188 | * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support | ||
189 | */ | ||
190 | |||
191 | if (!cmdline_apic && apic == &apic_default) { | ||
192 | if (apic_bigsmp.probe()) { | ||
193 | apic = &apic_bigsmp; | ||
194 | if (x86_quirks->update_genapic) | ||
195 | x86_quirks->update_genapic(); | ||
196 | printk(KERN_INFO "Overriding APIC driver with %s\n", | ||
197 | apic->name); | ||
198 | } | ||
199 | } | ||
200 | #endif | ||
201 | } | ||
202 | |||
203 | void __init generic_apic_probe(void) | ||
204 | { | ||
205 | if (!cmdline_apic) { | ||
206 | int i; | ||
207 | for (i = 0; apic_probe[i]; i++) { | ||
208 | if (apic_probe[i]->probe()) { | ||
209 | apic = apic_probe[i]; | ||
210 | break; | ||
211 | } | ||
212 | } | ||
213 | /* Not visible without early console */ | ||
214 | if (!apic_probe[i]) | ||
215 | panic("Didn't find an APIC driver"); | ||
216 | |||
217 | if (x86_quirks->update_genapic) | ||
218 | x86_quirks->update_genapic(); | ||
219 | } | ||
220 | printk(KERN_INFO "Using APIC driver %s\n", apic->name); | ||
221 | } | ||
222 | |||
223 | /* These functions can switch the APIC even after the initial ->probe() */ | ||
224 | |||
225 | int __init | ||
226 | generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | ||
227 | { | ||
228 | int i; | ||
229 | |||
230 | for (i = 0; apic_probe[i]; ++i) { | ||
231 | if (!apic_probe[i]->mps_oem_check) | ||
232 | continue; | ||
233 | if (!apic_probe[i]->mps_oem_check(mpc, oem, productid)) | ||
234 | continue; | ||
235 | |||
236 | if (!cmdline_apic) { | ||
237 | apic = apic_probe[i]; | ||
238 | if (x86_quirks->update_genapic) | ||
239 | x86_quirks->update_genapic(); | ||
240 | printk(KERN_INFO "Switched to APIC driver `%s'.\n", | ||
241 | apic->name); | ||
242 | } | ||
243 | return 1; | ||
244 | } | ||
245 | return 0; | ||
246 | } | ||
247 | |||
248 | int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
249 | { | ||
250 | int i; | ||
251 | |||
252 | for (i = 0; apic_probe[i]; ++i) { | ||
253 | if (!apic_probe[i]->acpi_madt_oem_check) | ||
254 | continue; | ||
255 | if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) | ||
256 | continue; | ||
257 | |||
258 | if (!cmdline_apic) { | ||
259 | apic = apic_probe[i]; | ||
260 | if (x86_quirks->update_genapic) | ||
261 | x86_quirks->update_genapic(); | ||
262 | printk(KERN_INFO "Switched to APIC driver `%s'.\n", | ||
263 | apic->name); | ||
264 | } | ||
265 | return 1; | ||
266 | } | ||
267 | return 0; | ||
268 | } | ||
269 | |||
270 | #endif /* CONFIG_X86_LOCAL_APIC */ | ||
271 | |||
272 | /** | ||
273 | * pre_intr_init_hook - initialisation prior to setting up interrupt vectors | ||
274 | * | ||
275 | * Description: | ||
276 | * Perform any necessary interrupt initialisation prior to setting up | ||
277 | * the "ordinary" interrupt call gates. For legacy reasons, the ISA | ||
278 | * interrupts should be initialised here if the machine emulates a PC | ||
279 | * in any way. | ||
280 | **/ | ||
281 | void __init pre_intr_init_hook(void) | ||
282 | { | ||
283 | if (x86_quirks->arch_pre_intr_init) { | ||
284 | if (x86_quirks->arch_pre_intr_init()) | ||
285 | return; | ||
286 | } | ||
287 | init_ISA_irqs(); | ||
288 | } | ||
289 | |||
290 | /** | ||
291 | * intr_init_hook - post gate setup interrupt initialisation | ||
292 | * | ||
293 | * Description: | ||
294 | * Fill in any interrupts that may have been left out by the general | ||
295 | * init_IRQ() routine. interrupts having to do with the machine rather | ||
296 | * than the devices on the I/O bus (like APIC interrupts in intel MP | ||
297 | * systems) are started here. | ||
298 | **/ | ||
299 | void __init intr_init_hook(void) | ||
300 | { | ||
301 | if (x86_quirks->arch_intr_init) { | ||
302 | if (x86_quirks->arch_intr_init()) | ||
303 | return; | ||
304 | } | ||
305 | } | ||
306 | |||
307 | /** | ||
308 | * pre_setup_arch_hook - hook called prior to any setup_arch() execution | ||
309 | * | ||
310 | * Description: | ||
311 | * generally used to activate any machine specific identification | ||
312 | * routines that may be needed before setup_arch() runs. On Voyager | ||
313 | * this is used to get the board revision and type. | ||
314 | **/ | ||
315 | void __init pre_setup_arch_hook(void) | ||
316 | { | ||
317 | } | ||
318 | |||
319 | /** | ||
320 | * trap_init_hook - initialise system specific traps | ||
321 | * | ||
322 | * Description: | ||
323 | * Called as the final act of trap_init(). Used in VISWS to initialise | ||
324 | * the various board specific APIC traps. | ||
325 | **/ | ||
326 | void __init trap_init_hook(void) | ||
327 | { | ||
328 | if (x86_quirks->arch_trap_init) { | ||
329 | if (x86_quirks->arch_trap_init()) | ||
330 | return; | ||
331 | } | ||
332 | } | ||
333 | |||
334 | static struct irqaction irq0 = { | ||
335 | .handler = timer_interrupt, | ||
336 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL, | ||
337 | .mask = CPU_MASK_NONE, | ||
338 | .name = "timer" | ||
339 | }; | ||
340 | |||
341 | /** | ||
342 | * pre_time_init_hook - do any specific initialisations before. | ||
343 | * | ||
344 | **/ | ||
345 | void __init pre_time_init_hook(void) | ||
346 | { | ||
347 | if (x86_quirks->arch_pre_time_init) | ||
348 | x86_quirks->arch_pre_time_init(); | ||
349 | } | ||
350 | |||
351 | /** | ||
352 | * time_init_hook - do any specific initialisations for the system timer. | ||
353 | * | ||
354 | * Description: | ||
355 | * Must plug the system timer interrupt source at HZ into the IRQ listed | ||
356 | * in irq_vectors.h:TIMER_IRQ | ||
357 | **/ | ||
358 | void __init time_init_hook(void) | ||
359 | { | ||
360 | if (x86_quirks->arch_time_init) { | ||
361 | /* | ||
362 | * A nonzero return code does not mean failure, it means | ||
363 | * that the architecture quirk does not want any | ||
364 | * generic (timer) setup to be performed after this: | ||
365 | */ | ||
366 | if (x86_quirks->arch_time_init()) | ||
367 | return; | ||
368 | } | ||
369 | |||
370 | irq0.mask = cpumask_of_cpu(0); | ||
371 | setup_irq(0, &irq0); | ||
372 | } | ||
373 | |||
374 | #ifdef CONFIG_MCA | ||
375 | /** | ||
376 | * mca_nmi_hook - hook into MCA specific NMI chain | ||
377 | * | ||
378 | * Description: | ||
379 | * The MCA (Microchannel Architecture) has an NMI chain for NMI sources | ||
380 | * along the MCA bus. Use this to hook into that chain if you will need | ||
381 | * it. | ||
382 | **/ | ||
383 | void mca_nmi_hook(void) | ||
384 | { | ||
385 | /* | ||
386 | * If I recall correctly, there's a whole bunch of other things that | ||
387 | * we can do to check for NMI problems, but that's all I know about | ||
388 | * at the moment. | ||
389 | */ | ||
390 | pr_warning("NMI generated from unknown source!\n"); | ||
391 | } | ||
392 | #endif | ||
393 | |||
394 | static __init int no_ipi_broadcast(char *str) | ||
395 | { | ||
396 | get_option(&str, &no_broadcast); | ||
397 | pr_info("Using %s mode\n", | ||
398 | no_broadcast ? "No IPI Broadcast" : "IPI Broadcast"); | ||
399 | return 1; | ||
400 | } | ||
401 | __setup("no_ipi_broadcast=", no_ipi_broadcast); | ||
402 | |||
403 | static int __init print_ipi_mode(void) | ||
404 | { | ||
405 | pr_info("Using IPI %s mode\n", | ||
406 | no_broadcast ? "No-Shortcut" : "Shortcut"); | ||
407 | return 0; | ||
408 | } | ||
409 | |||
410 | late_initcall(print_ipi_mode); | ||
411 | |||