diff options
Diffstat (limited to 'arch/x86/kernel/nmi_64.c')
-rw-r--r-- | arch/x86/kernel/nmi_64.c | 482 |
1 files changed, 0 insertions, 482 deletions
diff --git a/arch/x86/kernel/nmi_64.c b/arch/x86/kernel/nmi_64.c deleted file mode 100644 index 5a29ded994fa..000000000000 --- a/arch/x86/kernel/nmi_64.c +++ /dev/null | |||
@@ -1,482 +0,0 @@ | |||
1 | /* | ||
2 | * NMI watchdog support on APIC systems | ||
3 | * | ||
4 | * Started by Ingo Molnar <mingo@redhat.com> | ||
5 | * | ||
6 | * Fixes: | ||
7 | * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. | ||
8 | * Mikael Pettersson : Power Management for local APIC NMI watchdog. | ||
9 | * Pavel Machek and | ||
10 | * Mikael Pettersson : PM converted to driver model. Disable/enable API. | ||
11 | */ | ||
12 | |||
13 | #include <linux/nmi.h> | ||
14 | #include <linux/mm.h> | ||
15 | #include <linux/delay.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/sysdev.h> | ||
19 | #include <linux/sysctl.h> | ||
20 | #include <linux/kprobes.h> | ||
21 | #include <linux/cpumask.h> | ||
22 | #include <linux/kdebug.h> | ||
23 | |||
24 | #include <asm/smp.h> | ||
25 | #include <asm/nmi.h> | ||
26 | #include <asm/proto.h> | ||
27 | #include <asm/mce.h> | ||
28 | |||
29 | #include <mach_traps.h> | ||
30 | |||
31 | int unknown_nmi_panic; | ||
32 | int nmi_watchdog_enabled; | ||
33 | int panic_on_unrecovered_nmi; | ||
34 | |||
35 | static cpumask_t backtrace_mask = CPU_MASK_NONE; | ||
36 | |||
37 | /* nmi_active: | ||
38 | * >0: the lapic NMI watchdog is active, but can be disabled | ||
39 | * <0: the lapic NMI watchdog has not been set up, and cannot | ||
40 | * be enabled | ||
41 | * 0: the lapic NMI watchdog is disabled, but can be enabled | ||
42 | */ | ||
43 | atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ | ||
44 | static int panic_on_timeout; | ||
45 | |||
46 | unsigned int nmi_watchdog = NMI_DEFAULT; | ||
47 | static unsigned int nmi_hz = HZ; | ||
48 | |||
49 | static DEFINE_PER_CPU(short, wd_enabled); | ||
50 | |||
51 | /* Run after command line and cpu_init init, but before all other checks */ | ||
52 | void nmi_watchdog_default(void) | ||
53 | { | ||
54 | if (nmi_watchdog != NMI_DEFAULT) | ||
55 | return; | ||
56 | nmi_watchdog = NMI_NONE; | ||
57 | } | ||
58 | |||
59 | static int endflag __initdata = 0; | ||
60 | |||
61 | #ifdef CONFIG_SMP | ||
62 | /* The performance counters used by NMI_LOCAL_APIC don't trigger when | ||
63 | * the CPU is idle. To make sure the NMI watchdog really ticks on all | ||
64 | * CPUs during the test make them busy. | ||
65 | */ | ||
66 | static __init void nmi_cpu_busy(void *data) | ||
67 | { | ||
68 | local_irq_enable_in_hardirq(); | ||
69 | /* Intentionally don't use cpu_relax here. This is | ||
70 | to make sure that the performance counter really ticks, | ||
71 | even if there is a simulator or similar that catches the | ||
72 | pause instruction. On a real HT machine this is fine because | ||
73 | all other CPUs are busy with "useless" delay loops and don't | ||
74 | care if they get somewhat less cycles. */ | ||
75 | while (endflag == 0) | ||
76 | mb(); | ||
77 | } | ||
78 | #endif | ||
79 | |||
80 | int __init check_nmi_watchdog(void) | ||
81 | { | ||
82 | int *prev_nmi_count; | ||
83 | int cpu; | ||
84 | |||
85 | if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED)) | ||
86 | return 0; | ||
87 | |||
88 | if (!atomic_read(&nmi_active)) | ||
89 | return 0; | ||
90 | |||
91 | prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL); | ||
92 | if (!prev_nmi_count) | ||
93 | return -1; | ||
94 | |||
95 | printk(KERN_INFO "Testing NMI watchdog ... "); | ||
96 | |||
97 | #ifdef CONFIG_SMP | ||
98 | if (nmi_watchdog == NMI_LOCAL_APIC) | ||
99 | smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0); | ||
100 | #endif | ||
101 | |||
102 | for (cpu = 0; cpu < NR_CPUS; cpu++) | ||
103 | prev_nmi_count[cpu] = cpu_pda(cpu)->__nmi_count; | ||
104 | local_irq_enable(); | ||
105 | mdelay((20*1000)/nmi_hz); // wait 20 ticks | ||
106 | |||
107 | for_each_online_cpu(cpu) { | ||
108 | if (!per_cpu(wd_enabled, cpu)) | ||
109 | continue; | ||
110 | if (cpu_pda(cpu)->__nmi_count - prev_nmi_count[cpu] <= 5) { | ||
111 | printk(KERN_WARNING "WARNING: CPU#%d: NMI " | ||
112 | "appears to be stuck (%d->%d)!\n", | ||
113 | cpu, | ||
114 | prev_nmi_count[cpu], | ||
115 | cpu_pda(cpu)->__nmi_count); | ||
116 | per_cpu(wd_enabled, cpu) = 0; | ||
117 | atomic_dec(&nmi_active); | ||
118 | } | ||
119 | } | ||
120 | endflag = 1; | ||
121 | if (!atomic_read(&nmi_active)) { | ||
122 | kfree(prev_nmi_count); | ||
123 | atomic_set(&nmi_active, -1); | ||
124 | return -1; | ||
125 | } | ||
126 | printk("OK.\n"); | ||
127 | |||
128 | /* now that we know it works we can reduce NMI frequency to | ||
129 | something more reasonable; makes a difference in some configs */ | ||
130 | if (nmi_watchdog == NMI_LOCAL_APIC) | ||
131 | nmi_hz = lapic_adjust_nmi_hz(1); | ||
132 | |||
133 | kfree(prev_nmi_count); | ||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | static int __init setup_nmi_watchdog(char *str) | ||
138 | { | ||
139 | int nmi; | ||
140 | |||
141 | if (!strncmp(str,"panic",5)) { | ||
142 | panic_on_timeout = 1; | ||
143 | str = strchr(str, ','); | ||
144 | if (!str) | ||
145 | return 1; | ||
146 | ++str; | ||
147 | } | ||
148 | |||
149 | get_option(&str, &nmi); | ||
150 | |||
151 | if ((nmi >= NMI_INVALID) || (nmi < NMI_NONE)) | ||
152 | return 0; | ||
153 | |||
154 | nmi_watchdog = nmi; | ||
155 | return 1; | ||
156 | } | ||
157 | |||
158 | __setup("nmi_watchdog=", setup_nmi_watchdog); | ||
159 | |||
160 | #ifdef CONFIG_PM | ||
161 | |||
162 | static int nmi_pm_active; /* nmi_active before suspend */ | ||
163 | |||
164 | static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) | ||
165 | { | ||
166 | /* only CPU0 goes here, other CPUs should be offline */ | ||
167 | nmi_pm_active = atomic_read(&nmi_active); | ||
168 | stop_apic_nmi_watchdog(NULL); | ||
169 | BUG_ON(atomic_read(&nmi_active) != 0); | ||
170 | return 0; | ||
171 | } | ||
172 | |||
173 | static int lapic_nmi_resume(struct sys_device *dev) | ||
174 | { | ||
175 | /* only CPU0 goes here, other CPUs should be offline */ | ||
176 | if (nmi_pm_active > 0) { | ||
177 | setup_apic_nmi_watchdog(NULL); | ||
178 | touch_nmi_watchdog(); | ||
179 | } | ||
180 | return 0; | ||
181 | } | ||
182 | |||
183 | static struct sysdev_class nmi_sysclass = { | ||
184 | .name = "lapic_nmi", | ||
185 | .resume = lapic_nmi_resume, | ||
186 | .suspend = lapic_nmi_suspend, | ||
187 | }; | ||
188 | |||
189 | static struct sys_device device_lapic_nmi = { | ||
190 | .id = 0, | ||
191 | .cls = &nmi_sysclass, | ||
192 | }; | ||
193 | |||
194 | static int __init init_lapic_nmi_sysfs(void) | ||
195 | { | ||
196 | int error; | ||
197 | |||
198 | /* should really be a BUG_ON but b/c this is an | ||
199 | * init call, it just doesn't work. -dcz | ||
200 | */ | ||
201 | if (nmi_watchdog != NMI_LOCAL_APIC) | ||
202 | return 0; | ||
203 | |||
204 | if (atomic_read(&nmi_active) < 0) | ||
205 | return 0; | ||
206 | |||
207 | error = sysdev_class_register(&nmi_sysclass); | ||
208 | if (!error) | ||
209 | error = sysdev_register(&device_lapic_nmi); | ||
210 | return error; | ||
211 | } | ||
212 | /* must come after the local APIC's device_initcall() */ | ||
213 | late_initcall(init_lapic_nmi_sysfs); | ||
214 | |||
215 | #endif /* CONFIG_PM */ | ||
216 | |||
217 | static void __acpi_nmi_enable(void *__unused) | ||
218 | { | ||
219 | apic_write(APIC_LVT0, APIC_DM_NMI); | ||
220 | } | ||
221 | |||
222 | /* | ||
223 | * Enable timer based NMIs on all CPUs: | ||
224 | */ | ||
225 | void acpi_nmi_enable(void) | ||
226 | { | ||
227 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | ||
228 | on_each_cpu(__acpi_nmi_enable, NULL, 0, 1); | ||
229 | } | ||
230 | |||
231 | static void __acpi_nmi_disable(void *__unused) | ||
232 | { | ||
233 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); | ||
234 | } | ||
235 | |||
236 | /* | ||
237 | * Disable timer based NMIs on all CPUs: | ||
238 | */ | ||
239 | void acpi_nmi_disable(void) | ||
240 | { | ||
241 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | ||
242 | on_each_cpu(__acpi_nmi_disable, NULL, 0, 1); | ||
243 | } | ||
244 | |||
245 | void setup_apic_nmi_watchdog(void *unused) | ||
246 | { | ||
247 | if (__get_cpu_var(wd_enabled)) | ||
248 | return; | ||
249 | |||
250 | /* cheap hack to support suspend/resume */ | ||
251 | /* if cpu0 is not active neither should the other cpus */ | ||
252 | if ((smp_processor_id() != 0) && (atomic_read(&nmi_active) <= 0)) | ||
253 | return; | ||
254 | |||
255 | switch (nmi_watchdog) { | ||
256 | case NMI_LOCAL_APIC: | ||
257 | __get_cpu_var(wd_enabled) = 1; | ||
258 | if (lapic_watchdog_init(nmi_hz) < 0) { | ||
259 | __get_cpu_var(wd_enabled) = 0; | ||
260 | return; | ||
261 | } | ||
262 | /* FALL THROUGH */ | ||
263 | case NMI_IO_APIC: | ||
264 | __get_cpu_var(wd_enabled) = 1; | ||
265 | atomic_inc(&nmi_active); | ||
266 | } | ||
267 | } | ||
268 | |||
269 | void stop_apic_nmi_watchdog(void *unused) | ||
270 | { | ||
271 | /* only support LOCAL and IO APICs for now */ | ||
272 | if ((nmi_watchdog != NMI_LOCAL_APIC) && | ||
273 | (nmi_watchdog != NMI_IO_APIC)) | ||
274 | return; | ||
275 | if (__get_cpu_var(wd_enabled) == 0) | ||
276 | return; | ||
277 | if (nmi_watchdog == NMI_LOCAL_APIC) | ||
278 | lapic_watchdog_stop(); | ||
279 | __get_cpu_var(wd_enabled) = 0; | ||
280 | atomic_dec(&nmi_active); | ||
281 | } | ||
282 | |||
283 | /* | ||
284 | * the best way to detect whether a CPU has a 'hard lockup' problem | ||
285 | * is to check it's local APIC timer IRQ counts. If they are not | ||
286 | * changing then that CPU has some problem. | ||
287 | * | ||
288 | * as these watchdog NMI IRQs are generated on every CPU, we only | ||
289 | * have to check the current processor. | ||
290 | */ | ||
291 | |||
292 | static DEFINE_PER_CPU(unsigned, last_irq_sum); | ||
293 | static DEFINE_PER_CPU(local_t, alert_counter); | ||
294 | static DEFINE_PER_CPU(int, nmi_touch); | ||
295 | |||
296 | void touch_nmi_watchdog(void) | ||
297 | { | ||
298 | if (nmi_watchdog > 0) { | ||
299 | unsigned cpu; | ||
300 | |||
301 | /* | ||
302 | * Tell other CPUs to reset their alert counters. We cannot | ||
303 | * do it ourselves because the alert count increase is not | ||
304 | * atomic. | ||
305 | */ | ||
306 | for_each_present_cpu(cpu) { | ||
307 | if (per_cpu(nmi_touch, cpu) != 1) | ||
308 | per_cpu(nmi_touch, cpu) = 1; | ||
309 | } | ||
310 | } | ||
311 | |||
312 | touch_softlockup_watchdog(); | ||
313 | } | ||
314 | EXPORT_SYMBOL(touch_nmi_watchdog); | ||
315 | |||
316 | notrace __kprobes int | ||
317 | nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) | ||
318 | { | ||
319 | int sum; | ||
320 | int touched = 0; | ||
321 | int cpu = smp_processor_id(); | ||
322 | int rc = 0; | ||
323 | |||
324 | /* check for other users first */ | ||
325 | if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) | ||
326 | == NOTIFY_STOP) { | ||
327 | rc = 1; | ||
328 | touched = 1; | ||
329 | } | ||
330 | |||
331 | sum = read_pda(apic_timer_irqs) + read_pda(irq0_irqs); | ||
332 | if (__get_cpu_var(nmi_touch)) { | ||
333 | __get_cpu_var(nmi_touch) = 0; | ||
334 | touched = 1; | ||
335 | } | ||
336 | |||
337 | if (cpu_isset(cpu, backtrace_mask)) { | ||
338 | static DEFINE_SPINLOCK(lock); /* Serialise the printks */ | ||
339 | |||
340 | spin_lock(&lock); | ||
341 | printk("NMI backtrace for cpu %d\n", cpu); | ||
342 | dump_stack(); | ||
343 | spin_unlock(&lock); | ||
344 | cpu_clear(cpu, backtrace_mask); | ||
345 | } | ||
346 | |||
347 | #ifdef CONFIG_X86_MCE | ||
348 | /* Could check oops_in_progress here too, but it's safer | ||
349 | not too */ | ||
350 | if (atomic_read(&mce_entry) > 0) | ||
351 | touched = 1; | ||
352 | #endif | ||
353 | /* if the apic timer isn't firing, this cpu isn't doing much */ | ||
354 | if (!touched && __get_cpu_var(last_irq_sum) == sum) { | ||
355 | /* | ||
356 | * Ayiee, looks like this CPU is stuck ... | ||
357 | * wait a few IRQs (5 seconds) before doing the oops ... | ||
358 | */ | ||
359 | local_inc(&__get_cpu_var(alert_counter)); | ||
360 | if (local_read(&__get_cpu_var(alert_counter)) == 5*nmi_hz) | ||
361 | die_nmi("NMI Watchdog detected LOCKUP on CPU %d\n", regs, | ||
362 | panic_on_timeout); | ||
363 | } else { | ||
364 | __get_cpu_var(last_irq_sum) = sum; | ||
365 | local_set(&__get_cpu_var(alert_counter), 0); | ||
366 | } | ||
367 | |||
368 | /* see if the nmi watchdog went off */ | ||
369 | if (!__get_cpu_var(wd_enabled)) | ||
370 | return rc; | ||
371 | switch (nmi_watchdog) { | ||
372 | case NMI_LOCAL_APIC: | ||
373 | rc |= lapic_wd_event(nmi_hz); | ||
374 | break; | ||
375 | case NMI_IO_APIC: | ||
376 | /* don't know how to accurately check for this. | ||
377 | * just assume it was a watchdog timer interrupt | ||
378 | * This matches the old behaviour. | ||
379 | */ | ||
380 | rc = 1; | ||
381 | break; | ||
382 | } | ||
383 | return rc; | ||
384 | } | ||
385 | |||
386 | static unsigned ignore_nmis; | ||
387 | |||
388 | asmlinkage notrace __kprobes void | ||
389 | do_nmi(struct pt_regs *regs, long error_code) | ||
390 | { | ||
391 | nmi_enter(); | ||
392 | add_pda(__nmi_count,1); | ||
393 | if (!ignore_nmis) | ||
394 | default_do_nmi(regs); | ||
395 | nmi_exit(); | ||
396 | } | ||
397 | |||
398 | void stop_nmi(void) | ||
399 | { | ||
400 | acpi_nmi_disable(); | ||
401 | ignore_nmis++; | ||
402 | } | ||
403 | |||
404 | void restart_nmi(void) | ||
405 | { | ||
406 | ignore_nmis--; | ||
407 | acpi_nmi_enable(); | ||
408 | } | ||
409 | |||
410 | #ifdef CONFIG_SYSCTL | ||
411 | |||
412 | static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) | ||
413 | { | ||
414 | unsigned char reason = get_nmi_reason(); | ||
415 | char buf[64]; | ||
416 | |||
417 | sprintf(buf, "NMI received for unknown reason %02x\n", reason); | ||
418 | die_nmi(buf, regs, 1); /* Always panic here */ | ||
419 | return 0; | ||
420 | } | ||
421 | |||
422 | /* | ||
423 | * proc handler for /proc/sys/kernel/nmi | ||
424 | */ | ||
425 | int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, | ||
426 | void __user *buffer, size_t *length, loff_t *ppos) | ||
427 | { | ||
428 | int old_state; | ||
429 | |||
430 | nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; | ||
431 | old_state = nmi_watchdog_enabled; | ||
432 | proc_dointvec(table, write, file, buffer, length, ppos); | ||
433 | if (!!old_state == !!nmi_watchdog_enabled) | ||
434 | return 0; | ||
435 | |||
436 | if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) { | ||
437 | printk( KERN_WARNING "NMI watchdog is permanently disabled\n"); | ||
438 | return -EIO; | ||
439 | } | ||
440 | |||
441 | /* if nmi_watchdog is not set yet, then set it */ | ||
442 | nmi_watchdog_default(); | ||
443 | |||
444 | if (nmi_watchdog == NMI_LOCAL_APIC) { | ||
445 | if (nmi_watchdog_enabled) | ||
446 | enable_lapic_nmi_watchdog(); | ||
447 | else | ||
448 | disable_lapic_nmi_watchdog(); | ||
449 | } else { | ||
450 | printk( KERN_WARNING | ||
451 | "NMI watchdog doesn't know what hardware to touch\n"); | ||
452 | return -EIO; | ||
453 | } | ||
454 | return 0; | ||
455 | } | ||
456 | |||
457 | #endif | ||
458 | |||
459 | int do_nmi_callback(struct pt_regs *regs, int cpu) | ||
460 | { | ||
461 | #ifdef CONFIG_SYSCTL | ||
462 | if (unknown_nmi_panic) | ||
463 | return unknown_nmi_panic_callback(regs, cpu); | ||
464 | #endif | ||
465 | return 0; | ||
466 | } | ||
467 | |||
468 | void __trigger_all_cpu_backtrace(void) | ||
469 | { | ||
470 | int i; | ||
471 | |||
472 | backtrace_mask = cpu_online_map; | ||
473 | /* Wait for up to 10 seconds for all CPUs to do the backtrace */ | ||
474 | for (i = 0; i < 10 * 1000; i++) { | ||
475 | if (cpus_empty(backtrace_mask)) | ||
476 | break; | ||
477 | mdelay(1); | ||
478 | } | ||
479 | } | ||
480 | |||
481 | EXPORT_SYMBOL(nmi_active); | ||
482 | EXPORT_SYMBOL(nmi_watchdog); | ||