diff options
Diffstat (limited to 'arch/x86/kernel/mmconf-fam10h_64.c')
| -rw-r--r-- | arch/x86/kernel/mmconf-fam10h_64.c | 71 |
1 files changed, 34 insertions, 37 deletions
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c index 71825806cd44..ac861b8348e2 100644 --- a/arch/x86/kernel/mmconf-fam10h_64.c +++ b/arch/x86/kernel/mmconf-fam10h_64.c | |||
| @@ -25,7 +25,6 @@ struct pci_hostbridge_probe { | |||
| 25 | }; | 25 | }; |
| 26 | 26 | ||
| 27 | static u64 __cpuinitdata fam10h_pci_mmconf_base; | 27 | static u64 __cpuinitdata fam10h_pci_mmconf_base; |
| 28 | static int __cpuinitdata fam10h_pci_mmconf_base_status; | ||
| 29 | 28 | ||
| 30 | static struct pci_hostbridge_probe pci_probes[] __cpuinitdata = { | 29 | static struct pci_hostbridge_probe pci_probes[] __cpuinitdata = { |
| 31 | { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 }, | 30 | { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 }, |
| @@ -44,10 +43,12 @@ static int __cpuinit cmp_range(const void *x1, const void *x2) | |||
| 44 | return start1 - start2; | 43 | return start1 - start2; |
| 45 | } | 44 | } |
| 46 | 45 | ||
| 47 | /*[47:0] */ | 46 | #define MMCONF_UNIT (1ULL << FAM10H_MMIO_CONF_BASE_SHIFT) |
| 48 | /* need to avoid (0xfd<<32) and (0xfe<<32), ht used space */ | 47 | #define MMCONF_MASK (~(MMCONF_UNIT - 1)) |
| 48 | #define MMCONF_SIZE (MMCONF_UNIT << 8) | ||
| 49 | /* need to avoid (0xfd<<32), (0xfe<<32), and (0xff<<32), ht used space */ | ||
| 49 | #define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32) | 50 | #define FAM10H_PCI_MMCONF_BASE (0xfcULL<<32) |
| 50 | #define BASE_VALID(b) ((b != (0xfdULL << 32)) && (b != (0xfeULL << 32))) | 51 | #define BASE_VALID(b) ((b) + MMCONF_SIZE <= (0xfdULL<<32) || (b) >= (1ULL<<40)) |
| 51 | static void __cpuinit get_fam10h_pci_mmconf_base(void) | 52 | static void __cpuinit get_fam10h_pci_mmconf_base(void) |
| 52 | { | 53 | { |
| 53 | int i; | 54 | int i; |
| @@ -64,12 +65,11 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
| 64 | struct range range[8]; | 65 | struct range range[8]; |
| 65 | 66 | ||
| 66 | /* only try to get setting from BSP */ | 67 | /* only try to get setting from BSP */ |
| 67 | /* -1 or 1 */ | 68 | if (fam10h_pci_mmconf_base) |
| 68 | if (fam10h_pci_mmconf_base_status) | ||
| 69 | return; | 69 | return; |
| 70 | 70 | ||
| 71 | if (!early_pci_allowed()) | 71 | if (!early_pci_allowed()) |
| 72 | goto fail; | 72 | return; |
| 73 | 73 | ||
| 74 | found = 0; | 74 | found = 0; |
| 75 | for (i = 0; i < ARRAY_SIZE(pci_probes); i++) { | 75 | for (i = 0; i < ARRAY_SIZE(pci_probes); i++) { |
| @@ -91,7 +91,7 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
| 91 | } | 91 | } |
| 92 | 92 | ||
| 93 | if (!found) | 93 | if (!found) |
| 94 | goto fail; | 94 | return; |
| 95 | 95 | ||
| 96 | /* SYS_CFG */ | 96 | /* SYS_CFG */ |
| 97 | address = MSR_K8_SYSCFG; | 97 | address = MSR_K8_SYSCFG; |
| @@ -99,16 +99,16 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
| 99 | 99 | ||
| 100 | /* TOP_MEM2 is not enabled? */ | 100 | /* TOP_MEM2 is not enabled? */ |
| 101 | if (!(val & (1<<21))) { | 101 | if (!(val & (1<<21))) { |
| 102 | tom2 = 0; | 102 | tom2 = 1ULL << 32; |
| 103 | } else { | 103 | } else { |
| 104 | /* TOP_MEM2 */ | 104 | /* TOP_MEM2 */ |
| 105 | address = MSR_K8_TOP_MEM2; | 105 | address = MSR_K8_TOP_MEM2; |
| 106 | rdmsrl(address, val); | 106 | rdmsrl(address, val); |
| 107 | tom2 = val & (0xffffULL<<32); | 107 | tom2 = max(val & 0xffffff800000ULL, 1ULL << 32); |
| 108 | } | 108 | } |
| 109 | 109 | ||
| 110 | if (base <= tom2) | 110 | if (base <= tom2) |
| 111 | base = tom2 + (1ULL<<32); | 111 | base = (tom2 + 2 * MMCONF_UNIT - 1) & MMCONF_MASK; |
| 112 | 112 | ||
| 113 | /* | 113 | /* |
| 114 | * need to check if the range is in the high mmio range that is | 114 | * need to check if the range is in the high mmio range that is |
| @@ -123,11 +123,11 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
| 123 | if (!(reg & 3)) | 123 | if (!(reg & 3)) |
| 124 | continue; | 124 | continue; |
| 125 | 125 | ||
| 126 | start = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/ | 126 | start = (u64)(reg & 0xffffff00) << 8; /* 39:16 on 31:8*/ |
| 127 | reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); | 127 | reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3)); |
| 128 | end = (((u64)reg) << 8) & (0xffULL << 32); /* 39:16 on 31:8*/ | 128 | end = ((u64)(reg & 0xffffff00) << 8) | 0xffff; /* 39:16 on 31:8*/ |
| 129 | 129 | ||
| 130 | if (!end) | 130 | if (end < tom2) |
| 131 | continue; | 131 | continue; |
| 132 | 132 | ||
| 133 | range[hi_mmio_num].start = start; | 133 | range[hi_mmio_num].start = start; |
| @@ -143,32 +143,27 @@ static void __cpuinit get_fam10h_pci_mmconf_base(void) | |||
| 143 | 143 | ||
| 144 | if (range[hi_mmio_num - 1].end < base) | 144 | if (range[hi_mmio_num - 1].end < base) |
| 145 | goto out; | 145 | goto out; |
| 146 | if (range[0].start > base) | 146 | if (range[0].start > base + MMCONF_SIZE) |
| 147 | goto out; | 147 | goto out; |
| 148 | 148 | ||
| 149 | /* need to find one window */ | 149 | /* need to find one window */ |
| 150 | base = range[0].start - (1ULL << 32); | 150 | base = (range[0].start & MMCONF_MASK) - MMCONF_UNIT; |
| 151 | if ((base > tom2) && BASE_VALID(base)) | 151 | if ((base > tom2) && BASE_VALID(base)) |
| 152 | goto out; | 152 | goto out; |
| 153 | base = range[hi_mmio_num - 1].end + (1ULL << 32); | 153 | base = (range[hi_mmio_num - 1].end + MMCONF_UNIT) & MMCONF_MASK; |
| 154 | if ((base > tom2) && BASE_VALID(base)) | 154 | if (BASE_VALID(base)) |
| 155 | goto out; | 155 | goto out; |
| 156 | /* need to find window between ranges */ | 156 | /* need to find window between ranges */ |
| 157 | if (hi_mmio_num > 1) | 157 | for (i = 1; i < hi_mmio_num; i++) { |
| 158 | for (i = 0; i < hi_mmio_num - 1; i++) { | 158 | base = (range[i - 1].end + MMCONF_UNIT) & MMCONF_MASK; |
| 159 | if (range[i + 1].start > (range[i].end + (1ULL << 32))) { | 159 | val = range[i].start & MMCONF_MASK; |
| 160 | base = range[i].end + (1ULL << 32); | 160 | if (val >= base + MMCONF_SIZE && BASE_VALID(base)) |
| 161 | if ((base > tom2) && BASE_VALID(base)) | 161 | goto out; |
| 162 | goto out; | ||
| 163 | } | ||
| 164 | } | 162 | } |
| 165 | |||
| 166 | fail: | ||
| 167 | fam10h_pci_mmconf_base_status = -1; | ||
| 168 | return; | 163 | return; |
| 164 | |||
| 169 | out: | 165 | out: |
| 170 | fam10h_pci_mmconf_base = base; | 166 | fam10h_pci_mmconf_base = base; |
| 171 | fam10h_pci_mmconf_base_status = 1; | ||
| 172 | } | 167 | } |
| 173 | 168 | ||
| 174 | void __cpuinit fam10h_check_enable_mmcfg(void) | 169 | void __cpuinit fam10h_check_enable_mmcfg(void) |
| @@ -190,11 +185,10 @@ void __cpuinit fam10h_check_enable_mmcfg(void) | |||
| 190 | 185 | ||
| 191 | /* only trust the one handle 256 buses, if acpi=off */ | 186 | /* only trust the one handle 256 buses, if acpi=off */ |
| 192 | if (!acpi_pci_disabled || busnbits >= 8) { | 187 | if (!acpi_pci_disabled || busnbits >= 8) { |
| 193 | u64 base; | 188 | u64 base = val & MMCONF_MASK; |
| 194 | base = val & (0xffffULL << 32); | 189 | |
| 195 | if (fam10h_pci_mmconf_base_status <= 0) { | 190 | if (!fam10h_pci_mmconf_base) { |
| 196 | fam10h_pci_mmconf_base = base; | 191 | fam10h_pci_mmconf_base = base; |
| 197 | fam10h_pci_mmconf_base_status = 1; | ||
| 198 | return; | 192 | return; |
| 199 | } else if (fam10h_pci_mmconf_base == base) | 193 | } else if (fam10h_pci_mmconf_base == base) |
| 200 | return; | 194 | return; |
| @@ -206,8 +200,10 @@ void __cpuinit fam10h_check_enable_mmcfg(void) | |||
| 206 | * with 256 buses | 200 | * with 256 buses |
| 207 | */ | 201 | */ |
| 208 | get_fam10h_pci_mmconf_base(); | 202 | get_fam10h_pci_mmconf_base(); |
| 209 | if (fam10h_pci_mmconf_base_status <= 0) | 203 | if (!fam10h_pci_mmconf_base) { |
| 204 | pci_probe &= ~PCI_CHECK_ENABLE_AMD_MMCONF; | ||
| 210 | return; | 205 | return; |
| 206 | } | ||
| 211 | 207 | ||
| 212 | printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n"); | 208 | printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n"); |
| 213 | val &= ~((FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT) | | 209 | val &= ~((FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT) | |
| @@ -217,13 +213,13 @@ void __cpuinit fam10h_check_enable_mmcfg(void) | |||
| 217 | wrmsrl(address, val); | 213 | wrmsrl(address, val); |
| 218 | } | 214 | } |
| 219 | 215 | ||
| 220 | static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d) | 216 | static int __init set_check_enable_amd_mmconf(const struct dmi_system_id *d) |
| 221 | { | 217 | { |
| 222 | pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF; | 218 | pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF; |
| 223 | return 0; | 219 | return 0; |
| 224 | } | 220 | } |
| 225 | 221 | ||
| 226 | static const struct dmi_system_id __cpuinitconst mmconf_dmi_table[] = { | 222 | static const struct dmi_system_id __initconst mmconf_dmi_table[] = { |
| 227 | { | 223 | { |
| 228 | .callback = set_check_enable_amd_mmconf, | 224 | .callback = set_check_enable_amd_mmconf, |
| 229 | .ident = "Sun Microsystems Machine", | 225 | .ident = "Sun Microsystems Machine", |
| @@ -234,7 +230,8 @@ static const struct dmi_system_id __cpuinitconst mmconf_dmi_table[] = { | |||
| 234 | {} | 230 | {} |
| 235 | }; | 231 | }; |
| 236 | 232 | ||
| 237 | void __cpuinit check_enable_amd_mmconf_dmi(void) | 233 | /* Called from a __cpuinit function, but only on the BSP. */ |
| 234 | void __ref check_enable_amd_mmconf_dmi(void) | ||
| 238 | { | 235 | { |
| 239 | dmi_check_system(mmconf_dmi_table); | 236 | dmi_check_system(mmconf_dmi_table); |
| 240 | } | 237 | } |
