diff options
Diffstat (limited to 'arch/x86/kernel/microcode_amd.c')
-rw-r--r-- | arch/x86/kernel/microcode_amd.c | 40 |
1 files changed, 19 insertions, 21 deletions
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index 63123d902103..37542b67c57e 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c | |||
@@ -13,6 +13,9 @@ | |||
13 | * Licensed under the terms of the GNU General Public | 13 | * Licensed under the terms of the GNU General Public |
14 | * License version 2. See file COPYING for details. | 14 | * License version 2. See file COPYING for details. |
15 | */ | 15 | */ |
16 | |||
17 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
18 | |||
16 | #include <linux/firmware.h> | 19 | #include <linux/firmware.h> |
17 | #include <linux/pci_ids.h> | 20 | #include <linux/pci_ids.h> |
18 | #include <linux/uaccess.h> | 21 | #include <linux/uaccess.h> |
@@ -81,7 +84,7 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) | |||
81 | 84 | ||
82 | memset(csig, 0, sizeof(*csig)); | 85 | memset(csig, 0, sizeof(*csig)); |
83 | rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy); | 86 | rdmsr(MSR_AMD64_PATCH_LEVEL, csig->rev, dummy); |
84 | pr_info("microcode: CPU%d: patch_level=0x%x\n", cpu, csig->rev); | 87 | pr_info("CPU%d: patch_level=0x%x\n", cpu, csig->rev); |
85 | return 0; | 88 | return 0; |
86 | } | 89 | } |
87 | 90 | ||
@@ -111,8 +114,8 @@ static int get_matching_microcode(int cpu, void *mc, int rev) | |||
111 | 114 | ||
112 | /* ucode might be chipset specific -- currently we don't support this */ | 115 | /* ucode might be chipset specific -- currently we don't support this */ |
113 | if (mc_header->nb_dev_id || mc_header->sb_dev_id) { | 116 | if (mc_header->nb_dev_id || mc_header->sb_dev_id) { |
114 | pr_err(KERN_ERR "microcode: CPU%d: loading of chipset " | 117 | pr_err("CPU%d: loading of chipset specific code not yet supported\n", |
115 | "specific code not yet supported\n", cpu); | 118 | cpu); |
116 | return 0; | 119 | return 0; |
117 | } | 120 | } |
118 | 121 | ||
@@ -141,12 +144,12 @@ static int apply_microcode_amd(int cpu) | |||
141 | 144 | ||
142 | /* check current patch id and patch's id for match */ | 145 | /* check current patch id and patch's id for match */ |
143 | if (rev != mc_amd->hdr.patch_id) { | 146 | if (rev != mc_amd->hdr.patch_id) { |
144 | pr_err("microcode: CPU%d: update failed " | 147 | pr_err("CPU%d: update failed (for patch_level=0x%x)\n", |
145 | "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id); | 148 | cpu, mc_amd->hdr.patch_id); |
146 | return -1; | 149 | return -1; |
147 | } | 150 | } |
148 | 151 | ||
149 | pr_info("microcode: CPU%d: updated (new patch_level=0x%x)\n", cpu, rev); | 152 | pr_info("CPU%d: updated (new patch_level=0x%x)\n", cpu, rev); |
150 | uci->cpu_sig.rev = rev; | 153 | uci->cpu_sig.rev = rev; |
151 | 154 | ||
152 | return 0; | 155 | return 0; |
@@ -169,15 +172,14 @@ get_next_ucode(const u8 *buf, unsigned int size, unsigned int *mc_size) | |||
169 | return NULL; | 172 | return NULL; |
170 | 173 | ||
171 | if (section_hdr[0] != UCODE_UCODE_TYPE) { | 174 | if (section_hdr[0] != UCODE_UCODE_TYPE) { |
172 | pr_err("microcode: error: invalid type field in " | 175 | pr_err("error: invalid type field in container file section header\n"); |
173 | "container file section header\n"); | ||
174 | return NULL; | 176 | return NULL; |
175 | } | 177 | } |
176 | 178 | ||
177 | total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8)); | 179 | total_size = (unsigned long) (section_hdr[4] + (section_hdr[5] << 8)); |
178 | 180 | ||
179 | if (total_size > size || total_size > UCODE_MAX_SIZE) { | 181 | if (total_size > size || total_size > UCODE_MAX_SIZE) { |
180 | pr_err("microcode: error: size mismatch\n"); | 182 | pr_err("error: size mismatch\n"); |
181 | return NULL; | 183 | return NULL; |
182 | } | 184 | } |
183 | 185 | ||
@@ -206,14 +208,13 @@ static int install_equiv_cpu_table(const u8 *buf) | |||
206 | size = buf_pos[2]; | 208 | size = buf_pos[2]; |
207 | 209 | ||
208 | if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) { | 210 | if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE || !size) { |
209 | pr_err("microcode: error: invalid type field in " | 211 | pr_err("error: invalid type field in container file section header\n"); |
210 | "container file section header\n"); | ||
211 | return 0; | 212 | return 0; |
212 | } | 213 | } |
213 | 214 | ||
214 | equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size); | 215 | equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size); |
215 | if (!equiv_cpu_table) { | 216 | if (!equiv_cpu_table) { |
216 | pr_err("microcode: failed to allocate equivalent CPU table\n"); | 217 | pr_err("failed to allocate equivalent CPU table\n"); |
217 | return 0; | 218 | return 0; |
218 | } | 219 | } |
219 | 220 | ||
@@ -246,7 +247,7 @@ generic_load_microcode(int cpu, const u8 *data, size_t size) | |||
246 | 247 | ||
247 | offset = install_equiv_cpu_table(ucode_ptr); | 248 | offset = install_equiv_cpu_table(ucode_ptr); |
248 | if (!offset) { | 249 | if (!offset) { |
249 | pr_err("microcode: failed to create equivalent cpu table\n"); | 250 | pr_err("failed to create equivalent cpu table\n"); |
250 | return UCODE_ERROR; | 251 | return UCODE_ERROR; |
251 | } | 252 | } |
252 | 253 | ||
@@ -277,8 +278,7 @@ generic_load_microcode(int cpu, const u8 *data, size_t size) | |||
277 | if (!leftover) { | 278 | if (!leftover) { |
278 | vfree(uci->mc); | 279 | vfree(uci->mc); |
279 | uci->mc = new_mc; | 280 | uci->mc = new_mc; |
280 | pr_debug("microcode: CPU%d found a matching microcode " | 281 | pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n", |
281 | "update with version 0x%x (current=0x%x)\n", | ||
282 | cpu, new_rev, uci->cpu_sig.rev); | 282 | cpu, new_rev, uci->cpu_sig.rev); |
283 | } else { | 283 | } else { |
284 | vfree(new_mc); | 284 | vfree(new_mc); |
@@ -300,7 +300,7 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device) | |||
300 | return UCODE_NFOUND; | 300 | return UCODE_NFOUND; |
301 | 301 | ||
302 | if (*(u32 *)firmware->data != UCODE_MAGIC) { | 302 | if (*(u32 *)firmware->data != UCODE_MAGIC) { |
303 | pr_err("microcode: invalid UCODE_MAGIC (0x%08x)\n", | 303 | pr_err("invalid UCODE_MAGIC (0x%08x)\n", |
304 | *(u32 *)firmware->data); | 304 | *(u32 *)firmware->data); |
305 | return UCODE_ERROR; | 305 | return UCODE_ERROR; |
306 | } | 306 | } |
@@ -313,8 +313,7 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device) | |||
313 | static enum ucode_state | 313 | static enum ucode_state |
314 | request_microcode_user(int cpu, const void __user *buf, size_t size) | 314 | request_microcode_user(int cpu, const void __user *buf, size_t size) |
315 | { | 315 | { |
316 | pr_info("microcode: AMD microcode update via " | 316 | pr_info("AMD microcode update via /dev/cpu/microcode not supported\n"); |
317 | "/dev/cpu/microcode not supported\n"); | ||
318 | return UCODE_ERROR; | 317 | return UCODE_ERROR; |
319 | } | 318 | } |
320 | 319 | ||
@@ -334,14 +333,13 @@ void init_microcode_amd(struct device *device) | |||
334 | WARN_ON(c->x86_vendor != X86_VENDOR_AMD); | 333 | WARN_ON(c->x86_vendor != X86_VENDOR_AMD); |
335 | 334 | ||
336 | if (c->x86 < 0x10) { | 335 | if (c->x86 < 0x10) { |
337 | pr_warning("microcode: AMD CPU family 0x%x not supported\n", | 336 | pr_warning("AMD CPU family 0x%x not supported\n", c->x86); |
338 | c->x86); | ||
339 | return; | 337 | return; |
340 | } | 338 | } |
341 | supported_cpu = 1; | 339 | supported_cpu = 1; |
342 | 340 | ||
343 | if (request_firmware(&firmware, fw_name, device)) | 341 | if (request_firmware(&firmware, fw_name, device)) |
344 | pr_err("microcode: failed to load file %s\n", fw_name); | 342 | pr_err("failed to load file %s\n", fw_name); |
345 | } | 343 | } |
346 | 344 | ||
347 | void fini_microcode_amd(void) | 345 | void fini_microcode_amd(void) |