diff options
Diffstat (limited to 'arch/x86/kernel/i8259.c')
| -rw-r--r-- | arch/x86/kernel/i8259.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c index df89102bef80..8c93a84bb627 100644 --- a/arch/x86/kernel/i8259.c +++ b/arch/x86/kernel/i8259.c | |||
| @@ -32,7 +32,7 @@ | |||
| 32 | */ | 32 | */ |
| 33 | 33 | ||
| 34 | static int i8259A_auto_eoi; | 34 | static int i8259A_auto_eoi; |
| 35 | DEFINE_SPINLOCK(i8259A_lock); | 35 | DEFINE_RAW_SPINLOCK(i8259A_lock); |
| 36 | static void mask_and_ack_8259A(unsigned int); | 36 | static void mask_and_ack_8259A(unsigned int); |
| 37 | 37 | ||
| 38 | struct irq_chip i8259A_chip = { | 38 | struct irq_chip i8259A_chip = { |
| @@ -68,13 +68,13 @@ void disable_8259A_irq(unsigned int irq) | |||
| 68 | unsigned int mask = 1 << irq; | 68 | unsigned int mask = 1 << irq; |
| 69 | unsigned long flags; | 69 | unsigned long flags; |
| 70 | 70 | ||
| 71 | spin_lock_irqsave(&i8259A_lock, flags); | 71 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
| 72 | cached_irq_mask |= mask; | 72 | cached_irq_mask |= mask; |
| 73 | if (irq & 8) | 73 | if (irq & 8) |
| 74 | outb(cached_slave_mask, PIC_SLAVE_IMR); | 74 | outb(cached_slave_mask, PIC_SLAVE_IMR); |
| 75 | else | 75 | else |
| 76 | outb(cached_master_mask, PIC_MASTER_IMR); | 76 | outb(cached_master_mask, PIC_MASTER_IMR); |
| 77 | spin_unlock_irqrestore(&i8259A_lock, flags); | 77 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
| 78 | } | 78 | } |
| 79 | 79 | ||
| 80 | void enable_8259A_irq(unsigned int irq) | 80 | void enable_8259A_irq(unsigned int irq) |
| @@ -82,13 +82,13 @@ void enable_8259A_irq(unsigned int irq) | |||
| 82 | unsigned int mask = ~(1 << irq); | 82 | unsigned int mask = ~(1 << irq); |
| 83 | unsigned long flags; | 83 | unsigned long flags; |
| 84 | 84 | ||
| 85 | spin_lock_irqsave(&i8259A_lock, flags); | 85 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
| 86 | cached_irq_mask &= mask; | 86 | cached_irq_mask &= mask; |
| 87 | if (irq & 8) | 87 | if (irq & 8) |
| 88 | outb(cached_slave_mask, PIC_SLAVE_IMR); | 88 | outb(cached_slave_mask, PIC_SLAVE_IMR); |
| 89 | else | 89 | else |
| 90 | outb(cached_master_mask, PIC_MASTER_IMR); | 90 | outb(cached_master_mask, PIC_MASTER_IMR); |
| 91 | spin_unlock_irqrestore(&i8259A_lock, flags); | 91 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
| 92 | } | 92 | } |
| 93 | 93 | ||
| 94 | int i8259A_irq_pending(unsigned int irq) | 94 | int i8259A_irq_pending(unsigned int irq) |
| @@ -97,12 +97,12 @@ int i8259A_irq_pending(unsigned int irq) | |||
| 97 | unsigned long flags; | 97 | unsigned long flags; |
| 98 | int ret; | 98 | int ret; |
| 99 | 99 | ||
| 100 | spin_lock_irqsave(&i8259A_lock, flags); | 100 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
| 101 | if (irq < 8) | 101 | if (irq < 8) |
| 102 | ret = inb(PIC_MASTER_CMD) & mask; | 102 | ret = inb(PIC_MASTER_CMD) & mask; |
| 103 | else | 103 | else |
| 104 | ret = inb(PIC_SLAVE_CMD) & (mask >> 8); | 104 | ret = inb(PIC_SLAVE_CMD) & (mask >> 8); |
| 105 | spin_unlock_irqrestore(&i8259A_lock, flags); | 105 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
| 106 | 106 | ||
| 107 | return ret; | 107 | return ret; |
| 108 | } | 108 | } |
| @@ -150,7 +150,7 @@ static void mask_and_ack_8259A(unsigned int irq) | |||
| 150 | unsigned int irqmask = 1 << irq; | 150 | unsigned int irqmask = 1 << irq; |
| 151 | unsigned long flags; | 151 | unsigned long flags; |
| 152 | 152 | ||
| 153 | spin_lock_irqsave(&i8259A_lock, flags); | 153 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
| 154 | /* | 154 | /* |
| 155 | * Lightweight spurious IRQ detection. We do not want | 155 | * Lightweight spurious IRQ detection. We do not want |
| 156 | * to overdo spurious IRQ handling - it's usually a sign | 156 | * to overdo spurious IRQ handling - it's usually a sign |
| @@ -183,7 +183,7 @@ handle_real_irq: | |||
| 183 | outb(cached_master_mask, PIC_MASTER_IMR); | 183 | outb(cached_master_mask, PIC_MASTER_IMR); |
| 184 | outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ | 184 | outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ |
| 185 | } | 185 | } |
| 186 | spin_unlock_irqrestore(&i8259A_lock, flags); | 186 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
| 187 | return; | 187 | return; |
| 188 | 188 | ||
| 189 | spurious_8259A_irq: | 189 | spurious_8259A_irq: |
| @@ -285,24 +285,24 @@ void mask_8259A(void) | |||
| 285 | { | 285 | { |
| 286 | unsigned long flags; | 286 | unsigned long flags; |
| 287 | 287 | ||
| 288 | spin_lock_irqsave(&i8259A_lock, flags); | 288 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
| 289 | 289 | ||
| 290 | outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ | 290 | outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ |
| 291 | outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ | 291 | outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ |
| 292 | 292 | ||
| 293 | spin_unlock_irqrestore(&i8259A_lock, flags); | 293 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | void unmask_8259A(void) | 296 | void unmask_8259A(void) |
| 297 | { | 297 | { |
| 298 | unsigned long flags; | 298 | unsigned long flags; |
| 299 | 299 | ||
| 300 | spin_lock_irqsave(&i8259A_lock, flags); | 300 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
| 301 | 301 | ||
| 302 | outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ | 302 | outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ |
| 303 | outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ | 303 | outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ |
| 304 | 304 | ||
| 305 | spin_unlock_irqrestore(&i8259A_lock, flags); | 305 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
| 306 | } | 306 | } |
| 307 | 307 | ||
| 308 | void init_8259A(int auto_eoi) | 308 | void init_8259A(int auto_eoi) |
| @@ -311,7 +311,7 @@ void init_8259A(int auto_eoi) | |||
| 311 | 311 | ||
| 312 | i8259A_auto_eoi = auto_eoi; | 312 | i8259A_auto_eoi = auto_eoi; |
| 313 | 313 | ||
| 314 | spin_lock_irqsave(&i8259A_lock, flags); | 314 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
| 315 | 315 | ||
| 316 | outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ | 316 | outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ |
| 317 | outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ | 317 | outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ |
| @@ -356,5 +356,5 @@ void init_8259A(int auto_eoi) | |||
| 356 | outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ | 356 | outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ |
| 357 | outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ | 357 | outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ |
| 358 | 358 | ||
| 359 | spin_unlock_irqrestore(&i8259A_lock, flags); | 359 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
| 360 | } | 360 | } |
