11 files changed, 59 insertions, 47 deletions

diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 84a8220a6072..a6ef672adbba 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -56,9 +56,22 @@ void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
 
         switch (c->x86_vendor) {
         case X86_VENDOR_INTEL:
-                if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+                /*
+                 * There is a known erratum on Pentium III and Core Solo
+                 * and Core Duo CPUs.
+                 * " Page with PAT set to WC while associated MTRR is UC
+                 *   may consolidate to UC "
+                 * Because of this erratum, it is better to stick with
+                 * setting WC in MTRR rather than using PAT on these CPUs.
+                 *
+                 * Enable PAT WC only on P4, Core 2 or later CPUs.
+                 */
+                if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
                         return;
-                break;
+
+                pat_disable("PAT WC disabled due to known CPU erratum.");
+                return;
+
         case X86_VENDOR_AMD:
         case X86_VENDOR_CENTAUR:
         case X86_VENDOR_TRANSMETA:
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index c9b58a806e85..c8e315f1aa83 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -50,6 +50,8 @@ static double __initdata y = 3145727.0;
  */
 static void __init check_fpu(void)
 {
+        s32 fdiv_bug;
+
         if (!boot_cpu_data.hard_math) {
 #ifndef CONFIG_MATH_EMULATION
                 printk(KERN_EMERG "No coprocessor found and no math emulation present.\n");
@@ -74,8 +76,10 @@ static void __init check_fpu(void)
                 "fistpl %0\n\t"
                 "fwait\n\t"
                 "fninit"
-                : "=m" (*&boot_cpu_data.fdiv_bug)
+                : "=m" (*&fdiv_bug)
                 : "m" (*&x), "m" (*&y));
+
+        boot_cpu_data.fdiv_bug = fdiv_bug;
         if (boot_cpu_data.fdiv_bug)
                 printk("Hmm, FPU with FDIV bug.\n");
 }
diff --git a/arch/x86/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig
index cb7a5715596d..efae3b22a0ff 100644
--- a/arch/x86/kernel/cpu/cpufreq/Kconfig
+++ b/arch/x86/kernel/cpu/cpufreq/Kconfig
@@ -235,9 +235,9 @@ config X86_LONGHAUL
           If in doubt, say N.
 
 config X86_E_POWERSAVER
-        tristate "VIA C7 Enhanced PowerSaver (EXPERIMENTAL)"
+        tristate "VIA C7 Enhanced PowerSaver"
         select CPU_FREQ_TABLE
-        depends on X86_32 && EXPERIMENTAL
+        depends on X86_32
         help
           This adds the CPUFreq driver for VIA C7 processors.
 
diff --git a/arch/x86/kernel/cpu/cpufreq/elanfreq.c b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
index 94619c22f563..e4a4bf870e94 100644
--- a/arch/x86/kernel/cpu/cpufreq/elanfreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
@@ -44,7 +44,7 @@ struct s_elan_multiplier {
  * It is important that the frequencies
  * are listed in ascending order here!
  */
-struct s_elan_multiplier elan_multiplier[] = {
+static struct s_elan_multiplier elan_multiplier[] = {
         {1000,  0x02,   0x18},
         {2000,  0x02,   0x10},
         {4000,  0x02,   0x08},
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index c45ca6d4dce1..84bb395038d8 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -66,7 +66,6 @@ static u32 find_freq_from_fid(u32 fid)
         return 800 + (fid * 100);
 }
 
-
 /* Return a frequency in KHz, given an input fid */
 static u32 find_khz_freq_from_fid(u32 fid)
 {
@@ -78,7 +77,6 @@ static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 p
         return data[pstate].frequency;
 }
 
-
 /* Return the vco fid for an input fid
  *
  * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
@@ -166,7 +164,6 @@ static void fidvid_msr_init(void)
         wrmsr(MSR_FIDVID_CTL, lo, hi);
 }
 
-
 /* write the new fid value along with the other control fields to the msr */
 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
 {
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index 3fd7a67bb06a..e710a21bb6e8 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -134,23 +134,6 @@ static void __cpuinit set_cx86_memwb(void)
         setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);
 }
 
-static void __cpuinit set_cx86_inc(void)
-{
-        unsigned char ccr3;
-
-        printk(KERN_INFO "Enable Incrementor on Cyrix/NSC processor.\n");
-
-        ccr3 = getCx86(CX86_CCR3);
-        setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
-        /* PCR1 -- Performance Control */
-        /* Incrementor on, whatever that is */
-        setCx86(CX86_PCR1, getCx86(CX86_PCR1) | 0x02);
-        /* PCR0 -- Performance Control */
-        /* Incrementor Margin 10 */
-        setCx86(CX86_PCR0, getCx86(CX86_PCR0) | 0x04);
-        setCx86(CX86_CCR3, ccr3);       /* disable MAPEN */
-}
-
 /*
  *      Configure later MediaGX and/or Geode processor.
  */
@@ -174,7 +157,6 @@ static void __cpuinit geode_configure(void)
 
         set_cx86_memwb();
         set_cx86_reorder();
-        set_cx86_inc();
 
         local_irq_restore(flags);
 }
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index 65a339678ece..726a5fcdf341 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -759,6 +759,7 @@ static struct sysdev_class mce_sysclass = {
 };
 
 DEFINE_PER_CPU(struct sys_device, device_mce);
+void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu) __cpuinitdata;
 
 /* Why are there no generic functions for this? */
 #define ACCESSOR(name, var, start) \
@@ -883,9 +884,13 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
                 mce_create_device(cpu);
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
                 break;
         case CPU_DEAD:
         case CPU_DEAD_FROZEN:
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
                 mce_remove_device(cpu);
                 break;
         }
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 88736cadbaa6..5eb390a4b2e9 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -628,6 +628,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
         deallocate_threshold_block(cpu, bank);
 
 free_out:
+        kobject_del(b->kobj);
         kobject_put(b->kobj);
         kfree(b);
         per_cpu(threshold_banks, cpu)[bank] = NULL;
@@ -645,14 +646,11 @@ static void threshold_remove_device(unsigned int cpu)
 }
 
 /* get notified when a cpu comes on/off */
-static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb,
-                                            unsigned long action, void *hcpu)
+static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
+                                                     unsigned int cpu)
 {
-        /* cpu was unsigned int to begin with */
-        unsigned int cpu = (unsigned long)hcpu;
-
         if (cpu >= NR_CPUS)
-                goto out;
+                return;
 
         switch (action) {
         case CPU_ONLINE:
@@ -666,14 +664,8 @@ static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb,
         default:
                 break;
         }
-      out:
-        return NOTIFY_OK;
 }
 
-static struct notifier_block threshold_cpu_notifier __cpuinitdata = {
-        .notifier_call = threshold_cpu_callback,
-};
-
 static __init int threshold_init_device(void)
 {
         unsigned lcpu = 0;
@@ -684,7 +676,7 @@ static __init int threshold_init_device(void)
                 if (err)
                         return err;
         }
-        register_hotcpu_notifier(&threshold_cpu_notifier);
+        threshold_cpu_callback = amd_64_threshold_cpu_callback;
         return 0;
 }
 
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 509bd3d9eacd..cb7d3b6a80eb 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -379,6 +379,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
                              unsigned long *size, mtrr_type *type)
 {
         unsigned int mask_lo, mask_hi, base_lo, base_hi;
+        unsigned int tmp, hi;
 
         rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
         if ((mask_lo & 0x800) == 0) {
@@ -392,8 +393,23 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
         rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
 
         /* Work out the shifted address mask. */
-        mask_lo = size_or_mask | mask_hi << (32 - PAGE_SHIFT)
-            | mask_lo >> PAGE_SHIFT;
+        tmp = mask_hi << (32 - PAGE_SHIFT) | mask_lo >> PAGE_SHIFT;
+        mask_lo = size_or_mask | tmp;
+        /* Expand tmp with high bits to all 1s*/
+        hi = fls(tmp);
+        if (hi > 0) {
+                tmp |= ~((1<<(hi - 1)) - 1);
+
+                if (tmp != mask_lo) {
+                        static int once = 1;
+
+                        if (once) {
+                                printk(KERN_INFO "mtrr: your BIOS has set up an incorrect mask, fixing it up.\n");
+                                once = 0;
+                        }
+                        mask_lo = tmp;
+                }
+        }
 
         /* This works correctly if size is a power of two, i.e. a
            contiguous range. */
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 6f23969c8faf..b117d7f8a564 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -1496,11 +1496,8 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
 
         /* kvm/qemu doesn't have mtrr set right, don't trim them all */
         if (!highest_pfn) {
-                if (!kvm_para_available()) {
-                        printk(KERN_WARNING
+                WARN(!kvm_para_available(), KERN_WARNING
                                 "WARNING: strange, CPU MTRRs all blank?\n");
-                        WARN_ON(1);
-                }
                 return 0;
         }
 
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index de7439f82b92..05cc22dbd4ff 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -478,7 +478,13 @@ static int setup_p4_watchdog(unsigned nmi_hz)
                 perfctr_msr = MSR_P4_IQ_PERFCTR1;
                 evntsel_msr = MSR_P4_CRU_ESCR0;
                 cccr_msr = MSR_P4_IQ_CCCR1;
-                cccr_val = P4_CCCR_OVF_PMI1 | P4_CCCR_ESCR_SELECT(4);
+
+                /* Pentium 4 D processors don't support P4_CCCR_OVF_PMI1 */
+                if (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask == 4)
+                        cccr_val = P4_CCCR_OVF_PMI0;
+                else
+                        cccr_val = P4_CCCR_OVF_PMI1;
+                cccr_val |= P4_CCCR_ESCR_SELECT(4);
         }
 
         evntsel = P4_ESCR_EVENT_SELECT(0x3F)