diff options
Diffstat (limited to 'arch/x86/kernel/cpu')
| -rw-r--r-- | arch/x86/kernel/cpu/cpu_debug.c | 4 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce.c | 8 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/perf_counter.c | 14 |
4 files changed, 14 insertions, 14 deletions
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c index 6b2a52dd0403..dca325c03999 100644 --- a/arch/x86/kernel/cpu/cpu_debug.c +++ b/arch/x86/kernel/cpu/cpu_debug.c | |||
| @@ -30,8 +30,8 @@ | |||
| 30 | #include <asm/apic.h> | 30 | #include <asm/apic.h> |
| 31 | #include <asm/desc.h> | 31 | #include <asm/desc.h> |
| 32 | 32 | ||
| 33 | static DEFINE_PER_CPU(struct cpu_cpuX_base, cpu_arr[CPU_REG_ALL_BIT]); | 33 | static DEFINE_PER_CPU(struct cpu_cpuX_base [CPU_REG_ALL_BIT], cpu_arr); |
| 34 | static DEFINE_PER_CPU(struct cpu_private *, priv_arr[MAX_CPU_FILES]); | 34 | static DEFINE_PER_CPU(struct cpu_private * [MAX_CPU_FILES], priv_arr); |
| 35 | static DEFINE_PER_CPU(int, cpu_priv_count); | 35 | static DEFINE_PER_CPU(int, cpu_priv_count); |
| 36 | 36 | ||
| 37 | static DEFINE_MUTEX(cpu_debug_lock); | 37 | static DEFINE_MUTEX(cpu_debug_lock); |
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 9bfe9d2ea615..fdd51b554355 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c | |||
| @@ -1101,7 +1101,7 @@ void mce_log_therm_throt_event(__u64 status) | |||
| 1101 | */ | 1101 | */ |
| 1102 | static int check_interval = 5 * 60; /* 5 minutes */ | 1102 | static int check_interval = 5 * 60; /* 5 minutes */ |
| 1103 | 1103 | ||
| 1104 | static DEFINE_PER_CPU(int, next_interval); /* in jiffies */ | 1104 | static DEFINE_PER_CPU(int, mce_next_interval); /* in jiffies */ |
| 1105 | static DEFINE_PER_CPU(struct timer_list, mce_timer); | 1105 | static DEFINE_PER_CPU(struct timer_list, mce_timer); |
| 1106 | 1106 | ||
| 1107 | static void mcheck_timer(unsigned long data) | 1107 | static void mcheck_timer(unsigned long data) |
| @@ -1120,7 +1120,7 @@ static void mcheck_timer(unsigned long data) | |||
| 1120 | * Alert userspace if needed. If we logged an MCE, reduce the | 1120 | * Alert userspace if needed. If we logged an MCE, reduce the |
| 1121 | * polling interval, otherwise increase the polling interval. | 1121 | * polling interval, otherwise increase the polling interval. |
| 1122 | */ | 1122 | */ |
| 1123 | n = &__get_cpu_var(next_interval); | 1123 | n = &__get_cpu_var(mce_next_interval); |
| 1124 | if (mce_notify_irq()) | 1124 | if (mce_notify_irq()) |
| 1125 | *n = max(*n/2, HZ/100); | 1125 | *n = max(*n/2, HZ/100); |
| 1126 | else | 1126 | else |
| @@ -1335,7 +1335,7 @@ static void mce_cpu_features(struct cpuinfo_x86 *c) | |||
| 1335 | static void mce_init_timer(void) | 1335 | static void mce_init_timer(void) |
| 1336 | { | 1336 | { |
| 1337 | struct timer_list *t = &__get_cpu_var(mce_timer); | 1337 | struct timer_list *t = &__get_cpu_var(mce_timer); |
| 1338 | int *n = &__get_cpu_var(next_interval); | 1338 | int *n = &__get_cpu_var(mce_next_interval); |
| 1339 | 1339 | ||
| 1340 | if (mce_ignore_ce) | 1340 | if (mce_ignore_ce) |
| 1341 | return; | 1341 | return; |
| @@ -1935,7 +1935,7 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) | |||
| 1935 | case CPU_DOWN_FAILED: | 1935 | case CPU_DOWN_FAILED: |
| 1936 | case CPU_DOWN_FAILED_FROZEN: | 1936 | case CPU_DOWN_FAILED_FROZEN: |
| 1937 | t->expires = round_jiffies(jiffies + | 1937 | t->expires = round_jiffies(jiffies + |
| 1938 | __get_cpu_var(next_interval)); | 1938 | __get_cpu_var(mce_next_interval)); |
| 1939 | add_timer_on(t, cpu); | 1939 | add_timer_on(t, cpu); |
| 1940 | smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); | 1940 | smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); |
| 1941 | break; | 1941 | break; |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index 1fecba404fd8..8cd5224943b5 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c | |||
| @@ -69,7 +69,7 @@ struct threshold_bank { | |||
| 69 | struct threshold_block *blocks; | 69 | struct threshold_block *blocks; |
| 70 | cpumask_var_t cpus; | 70 | cpumask_var_t cpus; |
| 71 | }; | 71 | }; |
| 72 | static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]); | 72 | static DEFINE_PER_CPU(struct threshold_bank * [NR_BANKS], threshold_banks); |
| 73 | 73 | ||
| 74 | #ifdef CONFIG_SMP | 74 | #ifdef CONFIG_SMP |
| 75 | static unsigned char shared_bank[NR_BANKS] = { | 75 | static unsigned char shared_bank[NR_BANKS] = { |
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c index f9cd0849bd42..2732e2c1e4d3 100644 --- a/arch/x86/kernel/cpu/perf_counter.c +++ b/arch/x86/kernel/cpu/perf_counter.c | |||
| @@ -1211,7 +1211,7 @@ amd_pmu_disable_counter(struct hw_perf_counter *hwc, int idx) | |||
| 1211 | x86_pmu_disable_counter(hwc, idx); | 1211 | x86_pmu_disable_counter(hwc, idx); |
| 1212 | } | 1212 | } |
| 1213 | 1213 | ||
| 1214 | static DEFINE_PER_CPU(u64, prev_left[X86_PMC_IDX_MAX]); | 1214 | static DEFINE_PER_CPU(u64 [X86_PMC_IDX_MAX], pmc_prev_left); |
| 1215 | 1215 | ||
| 1216 | /* | 1216 | /* |
| 1217 | * Set the next IRQ period, based on the hwc->period_left value. | 1217 | * Set the next IRQ period, based on the hwc->period_left value. |
| @@ -1253,7 +1253,7 @@ x86_perf_counter_set_period(struct perf_counter *counter, | |||
| 1253 | if (left > x86_pmu.max_period) | 1253 | if (left > x86_pmu.max_period) |
| 1254 | left = x86_pmu.max_period; | 1254 | left = x86_pmu.max_period; |
| 1255 | 1255 | ||
| 1256 | per_cpu(prev_left[idx], smp_processor_id()) = left; | 1256 | per_cpu(pmc_prev_left[idx], smp_processor_id()) = left; |
| 1257 | 1257 | ||
| 1258 | /* | 1258 | /* |
| 1259 | * The hw counter starts counting from this counter offset, | 1259 | * The hw counter starts counting from this counter offset, |
| @@ -1470,7 +1470,7 @@ void perf_counter_print_debug(void) | |||
| 1470 | rdmsrl(x86_pmu.eventsel + idx, pmc_ctrl); | 1470 | rdmsrl(x86_pmu.eventsel + idx, pmc_ctrl); |
| 1471 | rdmsrl(x86_pmu.perfctr + idx, pmc_count); | 1471 | rdmsrl(x86_pmu.perfctr + idx, pmc_count); |
| 1472 | 1472 | ||
| 1473 | prev_left = per_cpu(prev_left[idx], cpu); | 1473 | prev_left = per_cpu(pmc_prev_left[idx], cpu); |
| 1474 | 1474 | ||
| 1475 | pr_info("CPU#%d: gen-PMC%d ctrl: %016llx\n", | 1475 | pr_info("CPU#%d: gen-PMC%d ctrl: %016llx\n", |
| 1476 | cpu, idx, pmc_ctrl); | 1476 | cpu, idx, pmc_ctrl); |
| @@ -2110,8 +2110,8 @@ void callchain_store(struct perf_callchain_entry *entry, u64 ip) | |||
| 2110 | entry->ip[entry->nr++] = ip; | 2110 | entry->ip[entry->nr++] = ip; |
| 2111 | } | 2111 | } |
| 2112 | 2112 | ||
| 2113 | static DEFINE_PER_CPU(struct perf_callchain_entry, irq_entry); | 2113 | static DEFINE_PER_CPU(struct perf_callchain_entry, pmc_irq_entry); |
| 2114 | static DEFINE_PER_CPU(struct perf_callchain_entry, nmi_entry); | 2114 | static DEFINE_PER_CPU(struct perf_callchain_entry, pmc_nmi_entry); |
| 2115 | static DEFINE_PER_CPU(int, in_nmi_frame); | 2115 | static DEFINE_PER_CPU(int, in_nmi_frame); |
| 2116 | 2116 | ||
| 2117 | 2117 | ||
| @@ -2264,9 +2264,9 @@ struct perf_callchain_entry *perf_callchain(struct pt_regs *regs) | |||
| 2264 | struct perf_callchain_entry *entry; | 2264 | struct perf_callchain_entry *entry; |
| 2265 | 2265 | ||
| 2266 | if (in_nmi()) | 2266 | if (in_nmi()) |
| 2267 | entry = &__get_cpu_var(nmi_entry); | 2267 | entry = &__get_cpu_var(pmc_nmi_entry); |
| 2268 | else | 2268 | else |
| 2269 | entry = &__get_cpu_var(irq_entry); | 2269 | entry = &__get_cpu_var(pmc_irq_entry); |
| 2270 | 2270 | ||
| 2271 | entry->nr = 0; | 2271 | entry->nr = 0; |
| 2272 | 2272 | ||