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Diffstat (limited to 'arch/x86/kernel/cpu/perf_event.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 641ccb9dddbc..6531b4bdb22d 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -553,9 +553,9 @@ static void x86_pmu_disable_all(void)
553 if (!test_bit(idx, cpuc->active_mask)) 553 if (!test_bit(idx, cpuc->active_mask))
554 continue; 554 continue;
555 rdmsrl(x86_pmu.eventsel + idx, val); 555 rdmsrl(x86_pmu.eventsel + idx, val);
556 if (!(val & ARCH_PERFMON_EVENTSEL0_ENABLE)) 556 if (!(val & ARCH_PERFMON_EVENTSEL_ENABLE))
557 continue; 557 continue;
558 val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE; 558 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
559 wrmsrl(x86_pmu.eventsel + idx, val); 559 wrmsrl(x86_pmu.eventsel + idx, val);
560 } 560 }
561} 561}
@@ -590,7 +590,7 @@ static void x86_pmu_enable_all(void)
590 continue; 590 continue;
591 591
592 val = event->hw.config; 592 val = event->hw.config;
593 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 593 val |= ARCH_PERFMON_EVENTSEL_ENABLE;
594 wrmsrl(x86_pmu.eventsel + idx, val); 594 wrmsrl(x86_pmu.eventsel + idx, val);
595 } 595 }
596} 596}
@@ -853,7 +853,7 @@ void hw_perf_enable(void)
853static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc, int idx) 853static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc, int idx)
854{ 854{
855 (void)checking_wrmsrl(hwc->config_base + idx, 855 (void)checking_wrmsrl(hwc->config_base + idx,
856 hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE); 856 hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE);
857} 857}
858 858
859static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx) 859static inline void x86_pmu_disable_event(struct hw_perf_event *hwc, int idx)